From 9741c5d549b39bf669a5ce08d36f7b45c3d2c1f0 Mon Sep 17 00:00:00 2001
From: Staf Verhaegen <staf.verhaegen@chipflow.io>
Date: Fri, 7 Jun 2024 11:33:40 +0200
Subject: [PATCH] [WIP]Update Minerva/sky130_c4m

* Reduce area
* Update blif file; used code
    #!/bin/env python3
    conv_text = (
      ("o2_x2", "or2_x1", None, None),
      ("o3_x2", "or3_x1", None, None),
      ("o4_x2", "or4_x1", None, None),
      ("a2_x2", "and2_x1", None, None),
      ("a3_x2", "and3_x1", None, None),
      ("a4_x2", "and4_x1", None, None),
      ("mx2_x2", "mux2_x1", None, None),
      ("nxr2_x1", "nexor2_x0", None, None), # Needs to be before next one
      ("xr2_x1", "xor2_x0", None, None),
      ("sff1_x4", "dff_x1", "ck=", "clk="),
      ("sff1r_x4", "dffnr_x1", "ck=", "clk="),
      ("ao22_x2", "and21nor_x1", "q=", "nq="),
      ("oa22_x2", "or21nand_x1", "q=", "nq="),
    )
    with open("non_generated/user_project_core_lambdasoc.blif", "r") as fin:
        with open("user_project_core_lambdasoc.blif", "w") as fout:
            for line in fin:
                for s, r, s2, r2 in conv_text:
                    if s in line:
                        line = line.replace(s, r)
                        if s2 is not None:
                            line = line.replace(s2, r2)
                fout.write(line)

TODO: PnR still fails.
---
 benchs/RISC-V/Minerva/sky130_c4m/doDesign.py  |     2 +-
 .../user_project_core_lambdasoc.blif          | 74446 ++++++++--------
 2 files changed, 37224 insertions(+), 37224 deletions(-)

diff --git a/benchs/RISC-V/Minerva/sky130_c4m/doDesign.py b/benchs/RISC-V/Minerva/sky130_c4m/doDesign.py
index d1a191f9..9131ff74 100755
--- a/benchs/RISC-V/Minerva/sky130_c4m/doDesign.py
+++ b/benchs/RISC-V/Minerva/sky130_c4m/doDesign.py
@@ -66,7 +66,7 @@ def scriptMain ( **kw ):
         conf.bColumns            = 2
         conf.bRows               = 2
         conf.chipName            = 'chip'
-        conf.coreSize            = ( u(210*10.0), u(210*10.0) )
+        conf.coreSize            = ( u(210*6.0), u(210*6.0) )
        #conf.chipSize            = ( u(  2020.0), u(  2060.0) )
         conf.coreToChipClass     = CoreToChip
         conf.useHTree( 'io_in_from_pad(0)', Spares.HEAVY_LEAF_LOAD )
diff --git a/benchs/RISC-V/Minerva/sky130_c4m/non_generated/user_project_core_lambdasoc.blif b/benchs/RISC-V/Minerva/sky130_c4m/non_generated/user_project_core_lambdasoc.blif
index f7c029eb..217155cf 100644
--- a/benchs/RISC-V/Minerva/sky130_c4m/non_generated/user_project_core_lambdasoc.blif
+++ b/benchs/RISC-V/Minerva/sky130_c4m/non_generated/user_project_core_lambdasoc.blif
@@ -12,162 +12,162 @@
 .subckt buf_x4 i=$abc$109383$new_n14737_ q=$abc$109383$new_n14738_
 .subckt buf_x4 i=soc.arbiter.grant q=$abc$109383$new_n14739_
 .subckt buf_x4 i=$abc$109383$new_n14739_ q=$abc$109383$new_n14740_
-.subckt mx2_x2 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[21] i1=soc.cpu.minerva.loadstore.dbus__adr[21] q=$abc$109383$new_n14741_
-.subckt a4_x2 i0=soc.rom.spimemio.rd_addr[5] i1=soc.rom.spimemio.rd_addr[4] i2=soc.rom.spimemio.rd_addr[3] i3=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14742_
-.subckt a4_x2 i0=$abc$109383$new_n14742_ i1=soc.rom.spimemio.rd_addr[8] i2=soc.rom.spimemio.rd_addr[7] i3=soc.rom.spimemio.rd_addr[6] q=$abc$109383$new_n14743_
-.subckt a4_x2 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[11] i2=soc.rom.spimemio.rd_addr[10] i3=soc.rom.spimemio.rd_addr[9] q=$abc$109383$new_n14744_
-.subckt a4_x2 i0=$abc$109383$new_n14744_ i1=soc.rom.spimemio.rd_addr[14] i2=soc.rom.spimemio.rd_addr[13] i3=soc.rom.spimemio.rd_addr[12] q=$abc$109383$new_n14745_
-.subckt a4_x2 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[17] i2=soc.rom.spimemio.rd_addr[16] i3=soc.rom.spimemio.rd_addr[15] q=$abc$109383$new_n14746_
-.subckt a4_x2 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[20] i2=soc.rom.spimemio.rd_addr[19] i3=soc.rom.spimemio.rd_addr[18] q=$abc$109383$new_n14747_
+.subckt mux2_x1 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[21] i1=soc.cpu.minerva.loadstore.dbus__adr[21] q=$abc$109383$new_n14741_
+.subckt and4_x1 i0=soc.rom.spimemio.rd_addr[5] i1=soc.rom.spimemio.rd_addr[4] i2=soc.rom.spimemio.rd_addr[3] i3=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14742_
+.subckt and4_x1 i0=$abc$109383$new_n14742_ i1=soc.rom.spimemio.rd_addr[8] i2=soc.rom.spimemio.rd_addr[7] i3=soc.rom.spimemio.rd_addr[6] q=$abc$109383$new_n14743_
+.subckt and4_x1 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[11] i2=soc.rom.spimemio.rd_addr[10] i3=soc.rom.spimemio.rd_addr[9] q=$abc$109383$new_n14744_
+.subckt and4_x1 i0=$abc$109383$new_n14744_ i1=soc.rom.spimemio.rd_addr[14] i2=soc.rom.spimemio.rd_addr[13] i3=soc.rom.spimemio.rd_addr[12] q=$abc$109383$new_n14745_
+.subckt and4_x1 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[17] i2=soc.rom.spimemio.rd_addr[16] i3=soc.rom.spimemio.rd_addr[15] q=$abc$109383$new_n14746_
+.subckt and4_x1 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[20] i2=soc.rom.spimemio.rd_addr[19] i3=soc.rom.spimemio.rd_addr[18] q=$abc$109383$new_n14747_
 .subckt buf_x4 i=$abc$109383$new_n14747_ q=$abc$109383$new_n14748_
-.subckt a3_x2 i0=$abc$109383$new_n14748_ i1=soc.rom.spimemio.rd_addr[22] i2=soc.rom.spimemio.rd_addr[21] q=$abc$109383$new_n14749_
-.subckt nxr2_x1 i0=$abc$109383$new_n14749_ i1=soc.rom.spimemio.rd_addr[23] nq=$abc$109383$new_n14750_
+.subckt and3_x1 i0=$abc$109383$new_n14748_ i1=soc.rom.spimemio.rd_addr[22] i2=soc.rom.spimemio.rd_addr[21] q=$abc$109383$new_n14749_
+.subckt nexor2_x0 i0=$abc$109383$new_n14749_ i1=soc.rom.spimemio.rd_addr[23] nq=$abc$109383$new_n14750_
 .subckt nand2_x0 i0=$abc$109383$new_n14750_ i1=$abc$109383$new_n14741_ nq=$abc$109383$new_n14751_
 .subckt nand3_x0 i0=$abc$109383$new_n14748_ i1=soc.rom.spimemio.rd_addr[22] i2=soc.rom.spimemio.rd_addr[21] nq=$abc$109383$new_n14752_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[23] nq=$abc$109383$new_n14753_
-.subckt oa22_x2 i0=$abc$109383$new_n14753_ i1=$abc$109383$new_n14752_ i2=$abc$109383$new_n14741_ q=$abc$109383$new_n14754_
-.subckt mx2_x2 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[18] i1=soc.cpu.minerva.loadstore.dbus__adr[18] q=$abc$109383$new_n14755_
+.subckt or21nand_x1 i0=$abc$109383$new_n14753_ i1=$abc$109383$new_n14752_ i2=$abc$109383$new_n14741_ nq=$abc$109383$new_n14754_
+.subckt mux2_x1 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[18] i1=soc.cpu.minerva.loadstore.dbus__adr[18] q=$abc$109383$new_n14755_
 .subckt buf_x4 i=$abc$109383$new_n14755_ q=$abc$109383$new_n14756_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[20] nq=$abc$109383$new_n14757_
-.subckt a3_x2 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[19] i2=soc.rom.spimemio.rd_addr[18] q=$abc$109383$new_n14758_
-.subckt nxr2_x1 i0=$abc$109383$new_n14758_ i1=$abc$109383$new_n14757_ nq=$abc$109383$new_n14759_
-.subckt nxr2_x1 i0=$abc$109383$new_n14759_ i1=$abc$109383$new_n14756_ nq=$abc$109383$new_n14760_
-.subckt a2_x2 i0=$abc$109383$new_n14748_ i1=soc.rom.spimemio.rd_addr[21] q=$abc$109383$new_n14761_
+.subckt and3_x1 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[19] i2=soc.rom.spimemio.rd_addr[18] q=$abc$109383$new_n14758_
+.subckt nexor2_x0 i0=$abc$109383$new_n14758_ i1=$abc$109383$new_n14757_ nq=$abc$109383$new_n14759_
+.subckt nexor2_x0 i0=$abc$109383$new_n14759_ i1=$abc$109383$new_n14756_ nq=$abc$109383$new_n14760_
+.subckt and2_x1 i0=$abc$109383$new_n14748_ i1=soc.rom.spimemio.rd_addr[21] q=$abc$109383$new_n14761_
 .subckt inv_x1 i=soc.rom.spimemio.rd_addr[22] nq=$abc$109383$new_n14762_
-.subckt mx2_x2 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[20] i1=soc.cpu.minerva.loadstore.dbus__adr[20] q=$abc$109383$new_n14763_
+.subckt mux2_x1 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[20] i1=soc.cpu.minerva.loadstore.dbus__adr[20] q=$abc$109383$new_n14763_
 .subckt buf_x4 i=$abc$109383$new_n14763_ q=$abc$109383$new_n14764_
-.subckt nxr2_x1 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n14762_ nq=$abc$109383$new_n14765_
-.subckt nxr2_x1 i0=$abc$109383$new_n14765_ i1=$abc$109383$new_n14761_ nq=$abc$109383$new_n14766_
+.subckt nexor2_x0 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n14762_ nq=$abc$109383$new_n14765_
+.subckt nexor2_x0 i0=$abc$109383$new_n14765_ i1=$abc$109383$new_n14761_ nq=$abc$109383$new_n14766_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[21] nq=$abc$109383$new_n14767_
-.subckt mx2_x2 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[19] i1=soc.cpu.minerva.loadstore.dbus__adr[19] q=$abc$109383$new_n14768_
-.subckt nxr2_x1 i0=$abc$109383$new_n14768_ i1=$abc$109383$new_n14767_ nq=$abc$109383$new_n14769_
-.subckt nxr2_x1 i0=$abc$109383$new_n14769_ i1=$abc$109383$new_n14748_ nq=$abc$109383$new_n14770_
+.subckt mux2_x1 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[19] i1=soc.cpu.minerva.loadstore.dbus__adr[19] q=$abc$109383$new_n14768_
+.subckt nexor2_x0 i0=$abc$109383$new_n14768_ i1=$abc$109383$new_n14767_ nq=$abc$109383$new_n14769_
+.subckt nexor2_x0 i0=$abc$109383$new_n14769_ i1=$abc$109383$new_n14748_ nq=$abc$109383$new_n14770_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[16] nq=$abc$109383$new_n14771_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[16] nq=$abc$109383$new_n14772_
 .subckt inv_x2 i=soc.arbiter.grant nq=$abc$109383$new_n14773_
 .subckt buf_x4 i=$abc$109383$new_n14773_ q=$abc$109383$new_n14774_
 .subckt buf_x4 i=$abc$109383$new_n14774_ q=$abc$109383$new_n14775_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n14772_ i1=$abc$109383$new_n14771_ q=$abc$109383$new_n14776_
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n14772_ i1=$abc$109383$new_n14771_ q=$abc$109383$new_n14776_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[18] nq=$abc$109383$new_n14777_
-.subckt nxr2_x1 i0=$abc$109383$new_n14746_ i1=$abc$109383$new_n14777_ nq=$abc$109383$new_n14778_
+.subckt nexor2_x0 i0=$abc$109383$new_n14746_ i1=$abc$109383$new_n14777_ nq=$abc$109383$new_n14778_
 .subckt nand2_x0 i0=$abc$109383$new_n14778_ i1=$abc$109383$new_n14776_ nq=$abc$109383$new_n14779_
-.subckt mx2_x2 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[14] i1=soc.cpu.minerva.loadstore.dbus__adr[14] q=$abc$109383$new_n14780_
+.subckt mux2_x1 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[14] i1=soc.cpu.minerva.loadstore.dbus__adr[14] q=$abc$109383$new_n14780_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[16] nq=$abc$109383$new_n14781_
-.subckt a2_x2 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[15] q=$abc$109383$new_n14782_
-.subckt nxr2_x1 i0=$abc$109383$new_n14782_ i1=$abc$109383$new_n14781_ nq=$abc$109383$new_n14783_
-.subckt nxr2_x1 i0=$abc$109383$new_n14783_ i1=$abc$109383$new_n14780_ nq=$abc$109383$new_n14784_
+.subckt and2_x1 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[15] q=$abc$109383$new_n14782_
+.subckt nexor2_x0 i0=$abc$109383$new_n14782_ i1=$abc$109383$new_n14781_ nq=$abc$109383$new_n14783_
+.subckt nexor2_x0 i0=$abc$109383$new_n14783_ i1=$abc$109383$new_n14780_ nq=$abc$109383$new_n14784_
 .subckt nand3_x0 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[16] i2=soc.rom.spimemio.rd_addr[15] nq=$abc$109383$new_n14785_
-.subckt mx2_x2 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[15] i1=soc.cpu.minerva.loadstore.dbus__adr[15] q=$abc$109383$new_n14786_
-.subckt nxr2_x1 i0=$abc$109383$new_n14786_ i1=soc.rom.spimemio.rd_addr[17] nq=$abc$109383$new_n14787_
-.subckt nxr2_x1 i0=$abc$109383$new_n14787_ i1=$abc$109383$new_n14785_ nq=$abc$109383$new_n14788_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[9] i1=soc.cpu.minerva.loadstore.dbus__adr[9] q=$abc$109383$new_n14789_
+.subckt mux2_x1 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[15] i1=soc.cpu.minerva.loadstore.dbus__adr[15] q=$abc$109383$new_n14786_
+.subckt nexor2_x0 i0=$abc$109383$new_n14786_ i1=soc.rom.spimemio.rd_addr[17] nq=$abc$109383$new_n14787_
+.subckt nexor2_x0 i0=$abc$109383$new_n14787_ i1=$abc$109383$new_n14785_ nq=$abc$109383$new_n14788_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[9] i1=soc.cpu.minerva.loadstore.dbus__adr[9] q=$abc$109383$new_n14789_
 .subckt buf_x4 i=$abc$109383$new_n14789_ q=$abc$109383$new_n14790_
-.subckt a3_x2 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[10] i2=soc.rom.spimemio.rd_addr[9] q=$abc$109383$new_n14791_
-.subckt nxr2_x1 i0=$abc$109383$new_n14791_ i1=soc.rom.spimemio.rd_addr[11] nq=$abc$109383$new_n14792_
+.subckt and3_x1 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[10] i2=soc.rom.spimemio.rd_addr[9] q=$abc$109383$new_n14791_
+.subckt nexor2_x0 i0=$abc$109383$new_n14791_ i1=soc.rom.spimemio.rd_addr[11] nq=$abc$109383$new_n14792_
 .subckt nand2_x0 i0=$abc$109383$new_n14792_ i1=$abc$109383$new_n14790_ nq=$abc$109383$new_n14793_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[9] nq=$abc$109383$new_n14794_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[9] nq=$abc$109383$new_n14795_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n14795_ i1=$abc$109383$new_n14794_ q=$abc$109383$new_n14796_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n14795_ i1=$abc$109383$new_n14794_ q=$abc$109383$new_n14796_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[11] nq=$abc$109383$new_n14797_
-.subckt nxr2_x1 i0=$abc$109383$new_n14791_ i1=$abc$109383$new_n14797_ nq=$abc$109383$new_n14798_
+.subckt nexor2_x0 i0=$abc$109383$new_n14791_ i1=$abc$109383$new_n14797_ nq=$abc$109383$new_n14798_
 .subckt nand2_x0 i0=$abc$109383$new_n14798_ i1=$abc$109383$new_n14796_ nq=$abc$109383$new_n14799_
 .subckt buf_x4 i=soc.arbiter.grant q=$abc$109383$new_n14800_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[11] i1=soc.cpu.minerva.loadstore.dbus__adr[11] q=$abc$109383$new_n14801_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[11] i1=soc.cpu.minerva.loadstore.dbus__adr[11] q=$abc$109383$new_n14801_
 .subckt buf_x4 i=$abc$109383$new_n14801_ q=$abc$109383$new_n14802_
-.subckt nxr2_x1 i0=$abc$109383$new_n14802_ i1=soc.rom.spimemio.rd_addr[13] nq=$abc$109383$new_n14803_
+.subckt nexor2_x0 i0=$abc$109383$new_n14802_ i1=soc.rom.spimemio.rd_addr[13] nq=$abc$109383$new_n14803_
 .subckt nand3_x0 i0=$abc$109383$new_n14803_ i1=$abc$109383$new_n14744_ i2=soc.rom.spimemio.rd_addr[12] nq=$abc$109383$new_n14804_
-.subckt a3_x2 i0=$abc$109383$new_n14804_ i1=$abc$109383$new_n14799_ i2=$abc$109383$new_n14793_ q=$abc$109383$new_n14805_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[10] i1=soc.cpu.minerva.loadstore.dbus__adr[10] q=$abc$109383$new_n14806_
+.subckt and3_x1 i0=$abc$109383$new_n14804_ i1=$abc$109383$new_n14799_ i2=$abc$109383$new_n14793_ q=$abc$109383$new_n14805_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[10] i1=soc.cpu.minerva.loadstore.dbus__adr[10] q=$abc$109383$new_n14806_
 .subckt buf_x4 i=$abc$109383$new_n14806_ q=$abc$109383$new_n14807_
-.subckt nxr2_x1 i0=$abc$109383$new_n14807_ i1=soc.rom.spimemio.rd_addr[12] nq=$abc$109383$new_n14808_
-.subckt a2_x2 i0=$abc$109383$new_n14808_ i1=$abc$109383$new_n14744_ q=$abc$109383$new_n14809_
+.subckt nexor2_x0 i0=$abc$109383$new_n14807_ i1=soc.rom.spimemio.rd_addr[12] nq=$abc$109383$new_n14808_
+.subckt and2_x1 i0=$abc$109383$new_n14808_ i1=$abc$109383$new_n14744_ q=$abc$109383$new_n14809_
 .subckt nand4_x0 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[11] i2=soc.rom.spimemio.rd_addr[10] i3=soc.rom.spimemio.rd_addr[9] nq=$abc$109383$new_n14810_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[12] nq=$abc$109383$new_n14811_
-.subckt nxr2_x1 i0=$abc$109383$new_n14807_ i1=$abc$109383$new_n14811_ nq=$abc$109383$new_n14812_
-.subckt a2_x2 i0=$abc$109383$new_n14812_ i1=$abc$109383$new_n14810_ q=$abc$109383$new_n14813_
+.subckt nexor2_x0 i0=$abc$109383$new_n14807_ i1=$abc$109383$new_n14811_ nq=$abc$109383$new_n14812_
+.subckt and2_x1 i0=$abc$109383$new_n14812_ i1=$abc$109383$new_n14810_ q=$abc$109383$new_n14813_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[10] nq=$abc$109383$new_n14814_
-.subckt a2_x2 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[9] q=$abc$109383$new_n14815_
-.subckt nxr2_x1 i0=$abc$109383$new_n14815_ i1=$abc$109383$new_n14814_ nq=$abc$109383$new_n14816_
+.subckt and2_x1 i0=$abc$109383$new_n14743_ i1=soc.rom.spimemio.rd_addr[9] q=$abc$109383$new_n14815_
+.subckt nexor2_x0 i0=$abc$109383$new_n14815_ i1=$abc$109383$new_n14814_ nq=$abc$109383$new_n14816_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[8] nq=$abc$109383$new_n14817_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[8] nq=$abc$109383$new_n14818_
-.subckt mx2_x2 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n14818_ i1=$abc$109383$new_n14817_ q=$abc$109383$new_n14819_
-.subckt oa22_x2 i0=$abc$109383$new_n14819_ i1=$abc$109383$new_n14816_ i2=$abc$109383$new_n14813_ q=$abc$109383$new_n14820_
+.subckt mux2_x1 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n14818_ i1=$abc$109383$new_n14817_ q=$abc$109383$new_n14819_
+.subckt or21nand_x1 i0=$abc$109383$new_n14819_ i1=$abc$109383$new_n14816_ i2=$abc$109383$new_n14813_ nq=$abc$109383$new_n14820_
 .subckt nor2_x0 i0=$abc$109383$new_n14820_ i1=$abc$109383$new_n14809_ nq=$abc$109383$new_n14821_
-.subckt oa22_x2 i0=soc.rom.spimemio.rd_addr[12] i1=$abc$109383$new_n14744_ i2=$abc$109383$new_n14803_ q=$abc$109383$new_n14822_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[8] i1=soc.cpu.minerva.loadstore.dbus__adr[8] q=$abc$109383$new_n14823_
+.subckt or21nand_x1 i0=soc.rom.spimemio.rd_addr[12] i1=$abc$109383$new_n14744_ i2=$abc$109383$new_n14803_ nq=$abc$109383$new_n14822_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[8] i1=soc.cpu.minerva.loadstore.dbus__adr[8] q=$abc$109383$new_n14823_
 .subckt buf_x4 i=$abc$109383$new_n14823_ q=$abc$109383$new_n14824_
-.subckt nxr2_x1 i0=$abc$109383$new_n14815_ i1=soc.rom.spimemio.rd_addr[10] nq=$abc$109383$new_n14825_
+.subckt nexor2_x0 i0=$abc$109383$new_n14815_ i1=soc.rom.spimemio.rd_addr[10] nq=$abc$109383$new_n14825_
 .subckt nand2_x0 i0=$abc$109383$new_n14825_ i1=$abc$109383$new_n14824_ nq=$abc$109383$new_n14826_
-.subckt a3_x2 i0=$abc$109383$new_n14742_ i1=soc.rom.spimemio.rd_addr[7] i2=soc.rom.spimemio.rd_addr[6] q=$abc$109383$new_n14827_
+.subckt and3_x1 i0=$abc$109383$new_n14742_ i1=soc.rom.spimemio.rd_addr[7] i2=soc.rom.spimemio.rd_addr[6] q=$abc$109383$new_n14827_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[8] nq=$abc$109383$new_n14828_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[6] i1=soc.cpu.minerva.loadstore.dbus__adr[6] q=$abc$109383$new_n14829_
-.subckt nxr2_x1 i0=$abc$109383$new_n14829_ i1=$abc$109383$new_n14828_ nq=$abc$109383$new_n14830_
-.subckt nxr2_x1 i0=$abc$109383$new_n14830_ i1=$abc$109383$new_n14827_ nq=$abc$109383$new_n14831_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[6] i1=soc.cpu.minerva.loadstore.dbus__adr[6] q=$abc$109383$new_n14829_
+.subckt nexor2_x0 i0=$abc$109383$new_n14829_ i1=$abc$109383$new_n14828_ nq=$abc$109383$new_n14830_
+.subckt nexor2_x0 i0=$abc$109383$new_n14830_ i1=$abc$109383$new_n14827_ nq=$abc$109383$new_n14831_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[9] nq=$abc$109383$new_n14832_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[7] i1=soc.cpu.minerva.loadstore.dbus__adr[7] q=$abc$109383$new_n14833_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[7] i1=soc.cpu.minerva.loadstore.dbus__adr[7] q=$abc$109383$new_n14833_
 .subckt buf_x4 i=$abc$109383$new_n14833_ q=$abc$109383$new_n14834_
-.subckt nxr2_x1 i0=$abc$109383$new_n14834_ i1=$abc$109383$new_n14832_ nq=$abc$109383$new_n14835_
-.subckt nxr2_x1 i0=$abc$109383$new_n14835_ i1=$abc$109383$new_n14743_ nq=$abc$109383$new_n14836_
-.subckt a2_x2 i0=$abc$109383$new_n14836_ i1=$abc$109383$new_n14831_ q=$abc$109383$new_n14837_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[4] i1=soc.cpu.minerva.loadstore.dbus__adr[4] q=$abc$109383$new_n14838_
+.subckt nexor2_x0 i0=$abc$109383$new_n14834_ i1=$abc$109383$new_n14832_ nq=$abc$109383$new_n14835_
+.subckt nexor2_x0 i0=$abc$109383$new_n14835_ i1=$abc$109383$new_n14743_ nq=$abc$109383$new_n14836_
+.subckt and2_x1 i0=$abc$109383$new_n14836_ i1=$abc$109383$new_n14831_ q=$abc$109383$new_n14837_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__adr[4] i1=soc.cpu.minerva.loadstore.dbus__adr[4] q=$abc$109383$new_n14838_
 .subckt buf_x4 i=$abc$109383$new_n14838_ q=$abc$109383$new_n14839_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[6] nq=$abc$109383$new_n14840_
-.subckt nxr2_x1 i0=$abc$109383$new_n14742_ i1=$abc$109383$new_n14840_ nq=$abc$109383$new_n14841_
-.subckt nxr2_x1 i0=$abc$109383$new_n14841_ i1=$abc$109383$new_n14839_ nq=$abc$109383$new_n14842_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[3] i1=soc.cpu.minerva.loadstore.dbus__adr[3] q=$abc$109383$new_n14843_
+.subckt nexor2_x0 i0=$abc$109383$new_n14742_ i1=$abc$109383$new_n14840_ nq=$abc$109383$new_n14841_
+.subckt nexor2_x0 i0=$abc$109383$new_n14841_ i1=$abc$109383$new_n14839_ nq=$abc$109383$new_n14842_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[3] i1=soc.cpu.minerva.loadstore.dbus__adr[3] q=$abc$109383$new_n14843_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[5] nq=$abc$109383$new_n14844_
-.subckt a3_x2 i0=soc.rom.spimemio.rd_addr[4] i1=soc.rom.spimemio.rd_addr[3] i2=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14845_
-.subckt nxr2_x1 i0=$abc$109383$new_n14845_ i1=$abc$109383$new_n14844_ nq=$abc$109383$new_n14846_
-.subckt nxr2_x1 i0=$abc$109383$new_n14846_ i1=$abc$109383$new_n14843_ nq=$abc$109383$new_n14847_
+.subckt and3_x1 i0=soc.rom.spimemio.rd_addr[4] i1=soc.rom.spimemio.rd_addr[3] i2=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14845_
+.subckt nexor2_x0 i0=$abc$109383$new_n14845_ i1=$abc$109383$new_n14844_ nq=$abc$109383$new_n14846_
+.subckt nexor2_x0 i0=$abc$109383$new_n14846_ i1=$abc$109383$new_n14843_ nq=$abc$109383$new_n14847_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[2] nq=$abc$109383$new_n14848_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[0] i1=soc.cpu.minerva.loadstore.dbus__adr[0] q=$abc$109383$new_n14849_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[0] i1=soc.cpu.minerva.loadstore.dbus__adr[0] q=$abc$109383$new_n14849_
 .subckt buf_x4 i=$abc$109383$new_n14849_ q=$abc$109383$new_n14850_
-.subckt nxr2_x1 i0=$abc$109383$new_n14850_ i1=$abc$109383$new_n14848_ nq=$abc$109383$new_n14851_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[1] i1=soc.cpu.minerva.loadstore.dbus__adr[1] q=$abc$109383$new_n14852_
-.subckt xr2_x1 i0=soc.rom.spimemio.rd_addr[3] i1=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14853_
-.subckt nxr2_x1 i0=$abc$109383$new_n14853_ i1=$abc$109383$new_n14852_ nq=$abc$109383$new_n14854_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[2] i1=soc.cpu.minerva.loadstore.dbus__adr[2] q=$abc$109383$new_n14855_
+.subckt nexor2_x0 i0=$abc$109383$new_n14850_ i1=$abc$109383$new_n14848_ nq=$abc$109383$new_n14851_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[1] i1=soc.cpu.minerva.loadstore.dbus__adr[1] q=$abc$109383$new_n14852_
+.subckt xor2_x0 i0=soc.rom.spimemio.rd_addr[3] i1=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14853_
+.subckt nexor2_x0 i0=$abc$109383$new_n14853_ i1=$abc$109383$new_n14852_ nq=$abc$109383$new_n14854_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[2] i1=soc.cpu.minerva.loadstore.dbus__adr[2] q=$abc$109383$new_n14855_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[4] nq=$abc$109383$new_n14856_
-.subckt a2_x2 i0=soc.rom.spimemio.rd_addr[3] i1=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14857_
-.subckt nxr2_x1 i0=$abc$109383$new_n14857_ i1=$abc$109383$new_n14856_ nq=$abc$109383$new_n14858_
-.subckt nxr2_x1 i0=$abc$109383$new_n14858_ i1=$abc$109383$new_n14855_ nq=$abc$109383$new_n14859_
-.subckt a3_x2 i0=$abc$109383$new_n14859_ i1=$abc$109383$new_n14854_ i2=$abc$109383$new_n14851_ q=$abc$109383$new_n14860_
-.subckt a3_x2 i0=$abc$109383$new_n14860_ i1=$abc$109383$new_n14847_ i2=$abc$109383$new_n14842_ q=$abc$109383$new_n14861_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[5] i1=soc.cpu.minerva.loadstore.dbus__adr[5] q=$abc$109383$new_n14862_
+.subckt and2_x1 i0=soc.rom.spimemio.rd_addr[3] i1=soc.rom.spimemio.rd_addr[2] q=$abc$109383$new_n14857_
+.subckt nexor2_x0 i0=$abc$109383$new_n14857_ i1=$abc$109383$new_n14856_ nq=$abc$109383$new_n14858_
+.subckt nexor2_x0 i0=$abc$109383$new_n14858_ i1=$abc$109383$new_n14855_ nq=$abc$109383$new_n14859_
+.subckt and3_x1 i0=$abc$109383$new_n14859_ i1=$abc$109383$new_n14854_ i2=$abc$109383$new_n14851_ q=$abc$109383$new_n14860_
+.subckt and3_x1 i0=$abc$109383$new_n14860_ i1=$abc$109383$new_n14847_ i2=$abc$109383$new_n14842_ q=$abc$109383$new_n14861_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[5] i1=soc.cpu.minerva.loadstore.dbus__adr[5] q=$abc$109383$new_n14862_
 .subckt buf_x4 i=$abc$109383$new_n14862_ q=$abc$109383$new_n14863_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[7] nq=$abc$109383$new_n14864_
-.subckt a2_x2 i0=$abc$109383$new_n14742_ i1=soc.rom.spimemio.rd_addr[6] q=$abc$109383$new_n14865_
-.subckt nxr2_x1 i0=$abc$109383$new_n14865_ i1=$abc$109383$new_n14864_ nq=$abc$109383$new_n14866_
-.subckt nxr2_x1 i0=$abc$109383$new_n14866_ i1=$abc$109383$new_n14863_ nq=$abc$109383$new_n14867_
-.subckt a3_x2 i0=$abc$109383$new_n14867_ i1=$abc$109383$new_n14861_ i2=$abc$109383$new_n14837_ q=$abc$109383$new_n14868_
-.subckt a4_x2 i0=$abc$109383$new_n14868_ i1=$abc$109383$new_n14826_ i2=$abc$109383$new_n14822_ i3=$abc$109383$new_n14821_ q=$abc$109383$new_n14869_
+.subckt and2_x1 i0=$abc$109383$new_n14742_ i1=soc.rom.spimemio.rd_addr[6] q=$abc$109383$new_n14865_
+.subckt nexor2_x0 i0=$abc$109383$new_n14865_ i1=$abc$109383$new_n14864_ nq=$abc$109383$new_n14866_
+.subckt nexor2_x0 i0=$abc$109383$new_n14866_ i1=$abc$109383$new_n14863_ nq=$abc$109383$new_n14867_
+.subckt and3_x1 i0=$abc$109383$new_n14867_ i1=$abc$109383$new_n14861_ i2=$abc$109383$new_n14837_ q=$abc$109383$new_n14868_
+.subckt and4_x1 i0=$abc$109383$new_n14868_ i1=$abc$109383$new_n14826_ i2=$abc$109383$new_n14822_ i3=$abc$109383$new_n14821_ q=$abc$109383$new_n14869_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[15] nq=$abc$109383$new_n14870_
-.subckt mx2_x2 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[13] i1=soc.cpu.minerva.loadstore.dbus__adr[13] q=$abc$109383$new_n14871_
+.subckt mux2_x1 cmd=$abc$109383$new_n14740_ i0=soc.cpu.minerva.fetch.ibus__adr[13] i1=soc.cpu.minerva.loadstore.dbus__adr[13] q=$abc$109383$new_n14871_
 .subckt buf_x4 i=$abc$109383$new_n14871_ q=$abc$109383$new_n14872_
-.subckt nxr2_x1 i0=$abc$109383$new_n14872_ i1=$abc$109383$new_n14870_ nq=$abc$109383$new_n14873_
-.subckt nxr2_x1 i0=$abc$109383$new_n14873_ i1=$abc$109383$new_n14745_ nq=$abc$109383$new_n14874_
-.subckt a3_x2 i0=$abc$109383$new_n14744_ i1=soc.rom.spimemio.rd_addr[13] i2=soc.rom.spimemio.rd_addr[12] q=$abc$109383$new_n14875_
+.subckt nexor2_x0 i0=$abc$109383$new_n14872_ i1=$abc$109383$new_n14870_ nq=$abc$109383$new_n14873_
+.subckt nexor2_x0 i0=$abc$109383$new_n14873_ i1=$abc$109383$new_n14745_ nq=$abc$109383$new_n14874_
+.subckt and3_x1 i0=$abc$109383$new_n14744_ i1=soc.rom.spimemio.rd_addr[13] i2=soc.rom.spimemio.rd_addr[12] q=$abc$109383$new_n14875_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[14] nq=$abc$109383$new_n14876_
-.subckt mx2_x2 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[12] i1=soc.cpu.minerva.loadstore.dbus__adr[12] q=$abc$109383$new_n14877_
+.subckt mux2_x1 cmd=$abc$109383$new_n14800_ i0=soc.cpu.minerva.fetch.ibus__adr[12] i1=soc.cpu.minerva.loadstore.dbus__adr[12] q=$abc$109383$new_n14877_
 .subckt buf_x4 i=$abc$109383$new_n14877_ q=$abc$109383$new_n14878_
-.subckt nxr2_x1 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n14876_ nq=$abc$109383$new_n14879_
-.subckt nxr2_x1 i0=$abc$109383$new_n14879_ i1=$abc$109383$new_n14875_ nq=$abc$109383$new_n14880_
-.subckt a2_x2 i0=$abc$109383$new_n14880_ i1=$abc$109383$new_n14874_ q=$abc$109383$new_n14881_
-.subckt a3_x2 i0=$abc$109383$new_n14881_ i1=$abc$109383$new_n14869_ i2=$abc$109383$new_n14805_ q=$abc$109383$new_n14882_
-.subckt a3_x2 i0=$abc$109383$new_n14882_ i1=$abc$109383$new_n14788_ i2=$abc$109383$new_n14784_ q=$abc$109383$new_n14883_
-.subckt a2_x2 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[18] q=$abc$109383$new_n14884_
+.subckt nexor2_x0 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n14876_ nq=$abc$109383$new_n14879_
+.subckt nexor2_x0 i0=$abc$109383$new_n14879_ i1=$abc$109383$new_n14875_ nq=$abc$109383$new_n14880_
+.subckt and2_x1 i0=$abc$109383$new_n14880_ i1=$abc$109383$new_n14874_ q=$abc$109383$new_n14881_
+.subckt and3_x1 i0=$abc$109383$new_n14881_ i1=$abc$109383$new_n14869_ i2=$abc$109383$new_n14805_ q=$abc$109383$new_n14882_
+.subckt and3_x1 i0=$abc$109383$new_n14882_ i1=$abc$109383$new_n14788_ i2=$abc$109383$new_n14784_ q=$abc$109383$new_n14883_
+.subckt and2_x1 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[18] q=$abc$109383$new_n14884_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[19] nq=$abc$109383$new_n14885_
-.subckt mx2_x2 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[17] i1=soc.cpu.minerva.loadstore.dbus__adr[17] q=$abc$109383$new_n14886_
+.subckt mux2_x1 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[17] i1=soc.cpu.minerva.loadstore.dbus__adr[17] q=$abc$109383$new_n14886_
 .subckt buf_x4 i=$abc$109383$new_n14886_ q=$abc$109383$new_n14887_
-.subckt nxr2_x1 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n14885_ nq=$abc$109383$new_n14888_
-.subckt nxr2_x1 i0=$abc$109383$new_n14888_ i1=$abc$109383$new_n14884_ nq=$abc$109383$new_n14889_
-.subckt ao22_x2 i0=$abc$109383$new_n14776_ i1=$abc$109383$new_n14778_ i2=$abc$109383$new_n14889_ q=$abc$109383$new_n14890_
-.subckt a3_x2 i0=$abc$109383$new_n14890_ i1=$abc$109383$new_n14883_ i2=$abc$109383$new_n14779_ q=$abc$109383$new_n14891_
-.subckt a4_x2 i0=$abc$109383$new_n14891_ i1=$abc$109383$new_n14770_ i2=$abc$109383$new_n14766_ i3=$abc$109383$new_n14760_ q=$abc$109383$new_n14892_
+.subckt nexor2_x0 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n14885_ nq=$abc$109383$new_n14888_
+.subckt nexor2_x0 i0=$abc$109383$new_n14888_ i1=$abc$109383$new_n14884_ nq=$abc$109383$new_n14889_
+.subckt and21nor_x1 i0=$abc$109383$new_n14776_ i1=$abc$109383$new_n14778_ i2=$abc$109383$new_n14889_ nq=$abc$109383$new_n14890_
+.subckt and3_x1 i0=$abc$109383$new_n14890_ i1=$abc$109383$new_n14883_ i2=$abc$109383$new_n14779_ q=$abc$109383$new_n14891_
+.subckt and4_x1 i0=$abc$109383$new_n14891_ i1=$abc$109383$new_n14770_ i2=$abc$109383$new_n14766_ i3=$abc$109383$new_n14760_ q=$abc$109383$new_n14892_
 .subckt nand3_x0 i0=$abc$109383$new_n14892_ i1=$abc$109383$new_n14754_ i2=$abc$109383$new_n14751_ nq=$abc$109383$new_n14893_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[26] nq=$abc$109383$new_n14894_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[26] nq=$abc$109383$new_n14895_
-.subckt mx2_x2 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n14895_ i1=$abc$109383$new_n14894_ q=$abc$109383$new_n14896_
+.subckt mux2_x1 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n14895_ i1=$abc$109383$new_n14894_ q=$abc$109383$new_n14896_
 .subckt buf_x4 i=$abc$109383$new_n14896_ q=$abc$109383$new_n14897_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[22] nq=$abc$109383$new_n14898_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[24] nq=$abc$109383$new_n14899_
@@ -180,264 +180,264 @@
 .subckt buf_x4 i=$abc$109383$new_n14905_ q=$abc$109383$new_n14906_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[27] nq=$abc$109383$new_n14907_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[27] nq=$abc$109383$new_n14908_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n14908_ i1=$abc$109383$new_n14907_ q=$abc$109383$new_n14909_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n14908_ i1=$abc$109383$new_n14907_ q=$abc$109383$new_n14909_
 .subckt nor3_x0 i0=soc.cpu.minerva.fetch.ibus__adr[29] i1=soc.cpu.minerva.fetch.ibus__adr[28] i2=$abc$109383$new_n14739_ nq=$abc$109383$new_n14910_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[28] nq=$abc$109383$new_n14911_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[29] nq=$abc$109383$new_n14912_
-.subckt a3_x2 i0=$abc$109383$new_n14912_ i1=$abc$109383$new_n14911_ i2=soc.arbiter.grant q=$abc$109383$new_n14913_
-.subckt ao22_x2 i0=$abc$109383$new_n14913_ i1=$abc$109383$new_n14910_ i2=$abc$109383$new_n14909_ q=$abc$109383$new_n14914_
+.subckt and3_x1 i0=$abc$109383$new_n14912_ i1=$abc$109383$new_n14911_ i2=soc.arbiter.grant q=$abc$109383$new_n14913_
+.subckt and21nor_x1 i0=$abc$109383$new_n14913_ i1=$abc$109383$new_n14910_ i2=$abc$109383$new_n14909_ nq=$abc$109383$new_n14914_
 .subckt buf_x4 i=$abc$109383$new_n14914_ q=$abc$109383$new_n14915_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__cyc i1=soc.cpu.minerva.loadstore.dbus__cyc q=$abc$109383$new_n14916_
-.subckt mx2_x2 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__stb i1=soc.cpu.minerva.loadstore.dbus__stb q=$abc$109383$new_n14917_
-.subckt a2_x2 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ q=$abc$109383$new_n14918_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__cyc i1=soc.cpu.minerva.loadstore.dbus__cyc q=$abc$109383$new_n14916_
+.subckt mux2_x1 cmd=$abc$109383$new_n14739_ i0=soc.cpu.minerva.fetch.ibus__stb i1=soc.cpu.minerva.loadstore.dbus__stb q=$abc$109383$new_n14917_
+.subckt and2_x1 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ q=$abc$109383$new_n14918_
 .subckt buf_x4 i=$abc$109383$new_n14918_ q=$abc$109383$new_n14919_
-.subckt a4_x2 i0=$abc$109383$new_n14919_ i1=$abc$109383$new_n14915_ i2=$abc$109383$new_n14906_ i3=$abc$109383$new_n14897_ q=$abc$109383$new_n14920_
+.subckt and4_x1 i0=$abc$109383$new_n14919_ i1=$abc$109383$new_n14915_ i2=$abc$109383$new_n14906_ i3=$abc$109383$new_n14897_ q=$abc$109383$new_n14920_
 .subckt buf_x4 i=$abc$109383$new_n14920_ q=$abc$109383$new_n14921_
-.subckt nxr2_x1 i0=$abc$109383$new_n14768_ i1=soc.rom.spimemio.rd_addr[21] nq=$abc$109383$new_n14922_
-.subckt nxr2_x1 i0=$abc$109383$new_n14834_ i1=soc.rom.spimemio.rd_addr[9] nq=$abc$109383$new_n14923_
-.subckt nxr2_x1 i0=$abc$109383$new_n14872_ i1=soc.rom.spimemio.rd_addr[15] nq=$abc$109383$new_n14924_
-.subckt nxr2_x1 i0=$abc$109383$new_n14878_ i1=soc.rom.spimemio.rd_addr[14] nq=$abc$109383$new_n14925_
-.subckt a4_x2 i0=$abc$109383$new_n14925_ i1=$abc$109383$new_n14924_ i2=$abc$109383$new_n14923_ i3=$abc$109383$new_n14922_ q=$abc$109383$new_n14926_
+.subckt nexor2_x0 i0=$abc$109383$new_n14768_ i1=soc.rom.spimemio.rd_addr[21] nq=$abc$109383$new_n14922_
+.subckt nexor2_x0 i0=$abc$109383$new_n14834_ i1=soc.rom.spimemio.rd_addr[9] nq=$abc$109383$new_n14923_
+.subckt nexor2_x0 i0=$abc$109383$new_n14872_ i1=soc.rom.spimemio.rd_addr[15] nq=$abc$109383$new_n14924_
+.subckt nexor2_x0 i0=$abc$109383$new_n14878_ i1=soc.rom.spimemio.rd_addr[14] nq=$abc$109383$new_n14925_
+.subckt and4_x1 i0=$abc$109383$new_n14925_ i1=$abc$109383$new_n14924_ i2=$abc$109383$new_n14923_ i3=$abc$109383$new_n14922_ q=$abc$109383$new_n14926_
 .subckt nand2_x0 i0=$abc$109383$new_n14824_ i1=$abc$109383$new_n14814_ nq=$abc$109383$new_n14927_
-.subckt o2_x2 i0=$abc$109383$new_n14756_ i1=$abc$109383$new_n14757_ q=$abc$109383$new_n14928_
+.subckt or2_x1 i0=$abc$109383$new_n14756_ i1=$abc$109383$new_n14757_ q=$abc$109383$new_n14928_
 .subckt buf_x4 i=$abc$109383$new_n14843_ q=$abc$109383$new_n14929_
 .subckt nand2_x0 i0=$abc$109383$new_n14929_ i1=$abc$109383$new_n14844_ nq=$abc$109383$new_n14930_
 .subckt nand2_x0 i0=$abc$109383$new_n14756_ i1=$abc$109383$new_n14757_ nq=$abc$109383$new_n14931_
-.subckt a2_x2 i0=$abc$109383$new_n14931_ i1=$abc$109383$new_n14930_ q=$abc$109383$new_n14932_
-.subckt a3_x2 i0=$abc$109383$new_n14932_ i1=$abc$109383$new_n14928_ i2=$abc$109383$new_n14927_ q=$abc$109383$new_n14933_
-.subckt ao22_x2 i0=$abc$109383$new_n14797_ i1=$abc$109383$new_n14790_ i2=soc.rom.spimemio.rd_valid q=$abc$109383$new_n14934_
-.subckt o2_x2 i0=$abc$109383$new_n14780_ i1=$abc$109383$new_n14781_ q=$abc$109383$new_n14935_
-.subckt o2_x2 i0=$abc$109383$new_n14855_ i1=$abc$109383$new_n14856_ q=$abc$109383$new_n14936_
-.subckt a3_x2 i0=$abc$109383$new_n14936_ i1=$abc$109383$new_n14935_ i2=$abc$109383$new_n14934_ q=$abc$109383$new_n14937_
-.subckt a3_x2 i0=$abc$109383$new_n14937_ i1=$abc$109383$new_n14933_ i2=$abc$109383$new_n14926_ q=$abc$109383$new_n14938_
-.subckt nxr2_x1 i0=$abc$109383$new_n14850_ i1=soc.rom.spimemio.rd_addr[2] nq=$abc$109383$new_n14939_
-.subckt nxr2_x1 i0=$abc$109383$new_n14887_ i1=soc.rom.spimemio.rd_addr[19] nq=$abc$109383$new_n14940_
-.subckt a3_x2 i0=$abc$109383$new_n14940_ i1=$abc$109383$new_n14939_ i2=$abc$109383$new_n14787_ q=$abc$109383$new_n14941_
-.subckt nxr2_x1 i0=$abc$109383$new_n14764_ i1=soc.rom.spimemio.rd_addr[22] nq=$abc$109383$new_n14942_
-.subckt nxr2_x1 i0=$abc$109383$new_n14829_ i1=soc.rom.spimemio.rd_addr[8] nq=$abc$109383$new_n14943_
-.subckt a4_x2 i0=$abc$109383$new_n14943_ i1=$abc$109383$new_n14808_ i2=$abc$109383$new_n14803_ i3=$abc$109383$new_n14942_ q=$abc$109383$new_n14944_
-.subckt a2_x2 i0=$abc$109383$new_n14944_ i1=$abc$109383$new_n14941_ q=$abc$109383$new_n14945_
+.subckt and2_x1 i0=$abc$109383$new_n14931_ i1=$abc$109383$new_n14930_ q=$abc$109383$new_n14932_
+.subckt and3_x1 i0=$abc$109383$new_n14932_ i1=$abc$109383$new_n14928_ i2=$abc$109383$new_n14927_ q=$abc$109383$new_n14933_
+.subckt and21nor_x1 i0=$abc$109383$new_n14797_ i1=$abc$109383$new_n14790_ i2=soc.rom.spimemio.rd_valid nq=$abc$109383$new_n14934_
+.subckt or2_x1 i0=$abc$109383$new_n14780_ i1=$abc$109383$new_n14781_ q=$abc$109383$new_n14935_
+.subckt or2_x1 i0=$abc$109383$new_n14855_ i1=$abc$109383$new_n14856_ q=$abc$109383$new_n14936_
+.subckt and3_x1 i0=$abc$109383$new_n14936_ i1=$abc$109383$new_n14935_ i2=$abc$109383$new_n14934_ q=$abc$109383$new_n14937_
+.subckt and3_x1 i0=$abc$109383$new_n14937_ i1=$abc$109383$new_n14933_ i2=$abc$109383$new_n14926_ q=$abc$109383$new_n14938_
+.subckt nexor2_x0 i0=$abc$109383$new_n14850_ i1=soc.rom.spimemio.rd_addr[2] nq=$abc$109383$new_n14939_
+.subckt nexor2_x0 i0=$abc$109383$new_n14887_ i1=soc.rom.spimemio.rd_addr[19] nq=$abc$109383$new_n14940_
+.subckt and3_x1 i0=$abc$109383$new_n14940_ i1=$abc$109383$new_n14939_ i2=$abc$109383$new_n14787_ q=$abc$109383$new_n14941_
+.subckt nexor2_x0 i0=$abc$109383$new_n14764_ i1=soc.rom.spimemio.rd_addr[22] nq=$abc$109383$new_n14942_
+.subckt nexor2_x0 i0=$abc$109383$new_n14829_ i1=soc.rom.spimemio.rd_addr[8] nq=$abc$109383$new_n14943_
+.subckt and4_x1 i0=$abc$109383$new_n14943_ i1=$abc$109383$new_n14808_ i2=$abc$109383$new_n14803_ i3=$abc$109383$new_n14942_ q=$abc$109383$new_n14944_
+.subckt and2_x1 i0=$abc$109383$new_n14944_ i1=$abc$109383$new_n14941_ q=$abc$109383$new_n14945_
 .subckt nand2_x0 i0=$abc$109383$new_n14945_ i1=$abc$109383$new_n14938_ nq=$abc$109383$new_n14946_
 .subckt nand2_x0 i0=$abc$109383$new_n14790_ i1=$abc$109383$new_n14797_ nq=$abc$109383$new_n14947_
-.subckt o2_x2 i0=$abc$109383$new_n14824_ i1=$abc$109383$new_n14814_ q=$abc$109383$new_n14948_
-.subckt mx2_x2 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[16] i1=soc.cpu.minerva.loadstore.dbus__adr[16] q=$abc$109383$new_n14949_
+.subckt or2_x1 i0=$abc$109383$new_n14824_ i1=$abc$109383$new_n14814_ q=$abc$109383$new_n14948_
+.subckt mux2_x1 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[16] i1=soc.cpu.minerva.loadstore.dbus__adr[16] q=$abc$109383$new_n14949_
 .subckt buf_x4 i=$abc$109383$new_n14949_ q=$abc$109383$new_n14950_
-.subckt nxr2_x1 i0=$abc$109383$new_n14950_ i1=soc.rom.spimemio.rd_addr[18] nq=$abc$109383$new_n14951_
-.subckt a3_x2 i0=$abc$109383$new_n14951_ i1=$abc$109383$new_n14948_ i2=$abc$109383$new_n14947_ q=$abc$109383$new_n14952_
-.subckt o2_x2 i0=$abc$109383$new_n14929_ i1=$abc$109383$new_n14844_ q=$abc$109383$new_n14953_
+.subckt nexor2_x0 i0=$abc$109383$new_n14950_ i1=soc.rom.spimemio.rd_addr[18] nq=$abc$109383$new_n14951_
+.subckt and3_x1 i0=$abc$109383$new_n14951_ i1=$abc$109383$new_n14948_ i2=$abc$109383$new_n14947_ q=$abc$109383$new_n14952_
+.subckt or2_x1 i0=$abc$109383$new_n14929_ i1=$abc$109383$new_n14844_ q=$abc$109383$new_n14953_
 .subckt buf_x4 i=$abc$109383$new_n14855_ q=$abc$109383$new_n14954_
 .subckt nand2_x0 i0=$abc$109383$new_n14954_ i1=$abc$109383$new_n14856_ nq=$abc$109383$new_n14955_
-.subckt nxr2_x1 i0=$abc$109383$new_n14839_ i1=soc.rom.spimemio.rd_addr[6] nq=$abc$109383$new_n14956_
-.subckt a3_x2 i0=$abc$109383$new_n14956_ i1=$abc$109383$new_n14955_ i2=$abc$109383$new_n14953_ q=$abc$109383$new_n14957_
-.subckt nxr2_x1 i0=$abc$109383$new_n14741_ i1=soc.rom.spimemio.rd_addr[23] nq=$abc$109383$new_n14958_
+.subckt nexor2_x0 i0=$abc$109383$new_n14839_ i1=soc.rom.spimemio.rd_addr[6] nq=$abc$109383$new_n14956_
+.subckt and3_x1 i0=$abc$109383$new_n14956_ i1=$abc$109383$new_n14955_ i2=$abc$109383$new_n14953_ q=$abc$109383$new_n14957_
+.subckt nexor2_x0 i0=$abc$109383$new_n14741_ i1=soc.rom.spimemio.rd_addr[23] nq=$abc$109383$new_n14958_
 .subckt nand2_x0 i0=$abc$109383$new_n14863_ i1=$abc$109383$new_n14864_ nq=$abc$109383$new_n14959_
-.subckt a2_x2 i0=$abc$109383$new_n14959_ i1=$abc$109383$new_n14958_ q=$abc$109383$new_n14960_
-.subckt nxr2_x1 i0=$abc$109383$new_n14852_ i1=soc.rom.spimemio.rd_addr[3] nq=$abc$109383$new_n14961_
+.subckt and2_x1 i0=$abc$109383$new_n14959_ i1=$abc$109383$new_n14958_ q=$abc$109383$new_n14960_
+.subckt nexor2_x0 i0=$abc$109383$new_n14852_ i1=soc.rom.spimemio.rd_addr[3] nq=$abc$109383$new_n14961_
 .subckt nand2_x0 i0=$abc$109383$new_n14780_ i1=$abc$109383$new_n14781_ nq=$abc$109383$new_n14962_
-.subckt o2_x2 i0=$abc$109383$new_n14863_ i1=$abc$109383$new_n14864_ q=$abc$109383$new_n14963_
-.subckt a3_x2 i0=$abc$109383$new_n14963_ i1=$abc$109383$new_n14962_ i2=$abc$109383$new_n14961_ q=$abc$109383$new_n14964_
-.subckt a4_x2 i0=$abc$109383$new_n14964_ i1=$abc$109383$new_n14960_ i2=$abc$109383$new_n14957_ i3=$abc$109383$new_n14952_ q=$abc$109383$new_n14965_
+.subckt or2_x1 i0=$abc$109383$new_n14863_ i1=$abc$109383$new_n14864_ q=$abc$109383$new_n14963_
+.subckt and3_x1 i0=$abc$109383$new_n14963_ i1=$abc$109383$new_n14962_ i2=$abc$109383$new_n14961_ q=$abc$109383$new_n14964_
+.subckt and4_x1 i0=$abc$109383$new_n14964_ i1=$abc$109383$new_n14960_ i2=$abc$109383$new_n14957_ i3=$abc$109383$new_n14952_ q=$abc$109383$new_n14965_
 .subckt nand2_x0 i0=$abc$109383$new_n14965_ i1=$abc$109383$new_n14921_ nq=$abc$109383$new_n14966_
-.subckt ao22_x2 i0=$abc$109383$new_n14966_ i1=$abc$109383$new_n14946_ i2=$abc$109383$new_n14921_ q=$abc$109383$new_n14967_
-.subckt a2_x2 i0=$abc$109383$new_n14967_ i1=soc.rom.spimemio.rd_valid q=$abc$109383$new_n14968_
+.subckt and21nor_x1 i0=$abc$109383$new_n14966_ i1=$abc$109383$new_n14946_ i2=$abc$109383$new_n14921_ nq=$abc$109383$new_n14967_
+.subckt and2_x1 i0=$abc$109383$new_n14967_ i1=soc.rom.spimemio.rd_valid q=$abc$109383$new_n14968_
 .subckt nand2_x0 i0=$abc$109383$new_n14968_ i1=$abc$109383$new_n14893_ nq=$abc$109383$new_n14969_
 .subckt buf_x4 i=$abc$109383$new_n14969_ q=$abc$109383$new_n14970_
 .subckt buf_x4 i=$abc$109383$new_n14970_ q=$abc$109383$new_n14971_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.xfer_ddr_q nq=$abc$109383$new_n14972_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.last_fetch nq=$abc$109383$new_n14973_
-.subckt oa22_x2 i0=soc.rom.spimemio.xfer.fetch i1=$abc$109383$new_n14973_ i2=$abc$109383$new_n14972_ q=$abc$109383$new_n14974_
-.subckt a2_x2 i0=$abc$109383$new_n14974_ i1=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n14975_
+.subckt or21nand_x1 i0=soc.rom.spimemio.xfer.fetch i1=$abc$109383$new_n14973_ i2=$abc$109383$new_n14972_ nq=$abc$109383$new_n14974_
+.subckt and2_x1 i0=$abc$109383$new_n14974_ i1=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n14975_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.fetch nq=$abc$109383$new_n14976_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.xfer_qspi nq=$abc$109383$new_n14977_
-.subckt o3_x2 i0=soc.rom.spimemio.xfer.xfer_ddr i1=soc.rom.spimemio.xfer.xfer_qspi i2=soc.rom.spimemio.xfer.xfer_dspi q=$abc$109383$new_n14978_
+.subckt or3_x1 i0=soc.rom.spimemio.xfer.xfer_ddr i1=soc.rom.spimemio.xfer.xfer_qspi i2=soc.rom.spimemio.xfer.xfer_dspi q=$abc$109383$new_n14978_
 .subckt buf_x4 i=$abc$109383$new_n14978_ q=$abc$109383$new_n14979_
 .subckt nand2_x0 i0=$abc$109383$new_n14979_ i1=$abc$109383$new_n14977_ nq=$abc$109383$new_n14980_
 .subckt inv_x1 i=soc.rom.spimemio.xfer.count[1] nq=$abc$109383$new_n14981_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.count[2] nq=$abc$109383$new_n14982_
 .subckt buf_x4 i=$abc$109383$new_n14982_ q=$abc$109383$new_n14983_
-.subckt a4_x2 i0=$abc$109383$new_n14983_ i1=soc.rom.spimemio.xfer.count[3] i2=$abc$109383$new_n14981_ i3=soc.rom.spimemio.xfer.flash_clk q=$abc$109383$new_n14984_
-.subckt o4_x2 i0=soc.rom.spimemio.xfer.count[2] i1=soc.rom.spimemio.xfer.count[3] i2=soc.rom.spimemio.xfer.count[0] i3=soc.rom.spimemio.xfer.count[1] q=$abc$109383$new_n14985_
+.subckt and4_x1 i0=$abc$109383$new_n14983_ i1=soc.rom.spimemio.xfer.count[3] i2=$abc$109383$new_n14981_ i3=soc.rom.spimemio.xfer.flash_clk q=$abc$109383$new_n14984_
+.subckt or4_x1 i0=soc.rom.spimemio.xfer.count[2] i1=soc.rom.spimemio.xfer.count[3] i2=soc.rom.spimemio.xfer.count[0] i3=soc.rom.spimemio.xfer.count[1] q=$abc$109383$new_n14985_
 .subckt buf_x4 i=$abc$109383$new_n14985_ q=$abc$109383$new_n14986_
 .subckt nand4_x0 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n14983_ i2=$abc$109383$new_n14981_ i3=soc.rom.spimemio.xfer.flash_clk nq=$abc$109383$new_n14987_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.count[3] nq=$abc$109383$new_n14988_
-.subckt oa22_x2 i0=$abc$109383$new_n14988_ i1=$abc$109383$new_n14987_ i2=$abc$109383$new_n14984_ q=$abc$109383$new_n14989_
+.subckt or21nand_x1 i0=$abc$109383$new_n14988_ i1=$abc$109383$new_n14987_ i2=$abc$109383$new_n14984_ nq=$abc$109383$new_n14989_
 .subckt nand2_x0 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n14983_ nq=$abc$109383$new_n14990_
 .subckt nand2_x0 i0=$abc$109383$new_n14981_ i1=soc.rom.spimemio.xfer.flash_clk nq=$abc$109383$new_n14991_
-.subckt mx2_x2 cmd=$abc$109383$new_n14991_ i0=$abc$109383$new_n14990_ i1=$abc$109383$new_n14983_ q=$abc$109383$new_n14992_
+.subckt mux2_x1 cmd=$abc$109383$new_n14991_ i0=$abc$109383$new_n14990_ i1=$abc$109383$new_n14983_ q=$abc$109383$new_n14992_
 .subckt inv_x1 i=soc.rom.spimemio.xfer.flash_clk nq=$abc$109383$new_n14993_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.count[1] i1=$abc$109383$new_n14993_ nq=$abc$109383$new_n14994_
 .subckt nor4_x0 i0=soc.rom.spimemio.xfer.count[2] i1=soc.rom.spimemio.xfer.count[3] i2=soc.rom.spimemio.xfer.count[0] i3=soc.rom.spimemio.xfer.count[1] nq=$abc$109383$new_n14995_
-.subckt ao22_x2 i0=$abc$109383$new_n14995_ i1=$abc$109383$new_n14991_ i2=$abc$109383$new_n14994_ q=$abc$109383$new_n14996_
+.subckt and21nor_x1 i0=$abc$109383$new_n14995_ i1=$abc$109383$new_n14991_ i2=$abc$109383$new_n14994_ nq=$abc$109383$new_n14996_
 .subckt inv_x1 i=soc.rom.spimemio.xfer.count[0] nq=$abc$109383$new_n14997_
-.subckt a2_x2 i0=soc.rom.spimemio.xfer.xfer_dspi i1=$abc$109383$new_n14997_ q=$abc$109383$new_n14998_
-.subckt a3_x2 i0=$abc$109383$new_n14998_ i1=$abc$109383$new_n14996_ i2=$abc$109383$new_n14992_ q=$abc$109383$new_n14999_
-.subckt oa22_x2 i0=$abc$109383$new_n14999_ i1=$abc$109383$new_n14989_ i2=$abc$109383$new_n14980_ q=$abc$109383$new_n15000_
+.subckt and2_x1 i0=soc.rom.spimemio.xfer.xfer_dspi i1=$abc$109383$new_n14997_ q=$abc$109383$new_n14998_
+.subckt and3_x1 i0=$abc$109383$new_n14998_ i1=$abc$109383$new_n14996_ i2=$abc$109383$new_n14992_ q=$abc$109383$new_n14999_
+.subckt or21nand_x1 i0=$abc$109383$new_n14999_ i1=$abc$109383$new_n14989_ i2=$abc$109383$new_n14980_ nq=$abc$109383$new_n15000_
 .subckt buf_x4 i=$abc$109383$new_n15000_ q=$abc$109383$new_n15001_
 .subckt nor4_x0 i0=soc.rom.spimemio.xfer.dummy_count[3] i1=soc.rom.spimemio.xfer.dummy_count[2] i2=soc.rom.spimemio.xfer.dummy_count[1] i3=soc.rom.spimemio.xfer.dummy_count[0] nq=$abc$109383$new_n15002_
 .subckt buf_x4 i=$abc$109383$new_n15002_ q=$abc$109383$new_n15003_
 .subckt nand4_x0 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n14997_ i2=$abc$109383$new_n14981_ i3=soc.rom.spimemio.xfer.flash_clk nq=$abc$109383$new_n15004_
-.subckt oa22_x2 i0=soc.rom.spimemio.xfer.flash_clk i1=$abc$109383$new_n14997_ i2=$abc$109383$new_n14981_ q=$abc$109383$new_n15005_
+.subckt or21nand_x1 i0=soc.rom.spimemio.xfer.flash_clk i1=$abc$109383$new_n14997_ i2=$abc$109383$new_n14981_ nq=$abc$109383$new_n15005_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.count[0] i1=$abc$109383$new_n14993_ nq=$abc$109383$new_n15006_
 .subckt nand2_x0 i0=$abc$109383$new_n14997_ i1=soc.rom.spimemio.xfer.flash_clk nq=$abc$109383$new_n15007_
-.subckt ao22_x2 i0=$abc$109383$new_n14995_ i1=$abc$109383$new_n15007_ i2=$abc$109383$new_n15006_ q=$abc$109383$new_n15008_
+.subckt and21nor_x1 i0=$abc$109383$new_n14995_ i1=$abc$109383$new_n15007_ i2=$abc$109383$new_n15006_ nq=$abc$109383$new_n15008_
 .subckt nor2_x0 i0=soc.rom.spimemio.xfer.count[2] i1=soc.rom.spimemio.xfer.count[3] nq=$abc$109383$new_n15009_
 .subckt nor3_x0 i0=soc.rom.spimemio.xfer.xfer_ddr i1=soc.rom.spimemio.xfer.xfer_qspi i2=soc.rom.spimemio.xfer.xfer_dspi nq=$abc$109383$new_n15010_
-.subckt a2_x2 i0=$abc$109383$new_n15010_ i1=$abc$109383$new_n15009_ q=$abc$109383$new_n15011_
+.subckt and2_x1 i0=$abc$109383$new_n15010_ i1=$abc$109383$new_n15009_ q=$abc$109383$new_n15011_
 .subckt nand4_x0 i0=$abc$109383$new_n15011_ i1=$abc$109383$new_n15008_ i2=$abc$109383$new_n15005_ i3=$abc$109383$new_n15004_ nq=$abc$109383$new_n15012_
 .subckt nand2_x0 i0=$abc$109383$new_n15012_ i1=$abc$109383$new_n14980_ nq=$abc$109383$new_n15013_
 .subckt nor2_x0 i0=soc.rom.spimemio.xfer.count[0] i1=soc.rom.spimemio.xfer.count[1] nq=$abc$109383$new_n15014_
-.subckt ao22_x2 i0=$abc$109383$new_n14995_ i1=soc.rom.spimemio.xfer.count[2] i2=$abc$109383$new_n14988_ q=$abc$109383$new_n15015_
-.subckt a2_x2 i0=soc.rom.spimemio.xfer.xfer_ddr i1=soc.rom.spimemio.xfer.xfer_qspi q=$abc$109383$new_n15016_
-.subckt a2_x2 i0=$abc$109383$new_n15016_ i1=$abc$109383$new_n15015_ q=$abc$109383$new_n15017_
-.subckt oa22_x2 i0=$abc$109383$new_n14985_ i1=$abc$109383$new_n14982_ i2=soc.rom.spimemio.xfer.count[3] q=$abc$109383$new_n15018_
+.subckt and21nor_x1 i0=$abc$109383$new_n14995_ i1=soc.rom.spimemio.xfer.count[2] i2=$abc$109383$new_n14988_ nq=$abc$109383$new_n15015_
+.subckt and2_x1 i0=soc.rom.spimemio.xfer.xfer_ddr i1=soc.rom.spimemio.xfer.xfer_qspi q=$abc$109383$new_n15016_
+.subckt and2_x1 i0=$abc$109383$new_n15016_ i1=$abc$109383$new_n15015_ q=$abc$109383$new_n15017_
+.subckt or21nand_x1 i0=$abc$109383$new_n14985_ i1=$abc$109383$new_n14982_ i2=soc.rom.spimemio.xfer.count[3] nq=$abc$109383$new_n15018_
 .subckt nand2_x0 i0=$abc$109383$new_n14983_ i1=soc.rom.spimemio.xfer.count[3] nq=$abc$109383$new_n15019_
 .subckt nand2_x0 i0=$abc$109383$new_n15019_ i1=$abc$109383$new_n15018_ nq=$abc$109383$new_n15020_
-.subckt mx2_x2 cmd=$abc$109383$new_n14993_ i0=$abc$109383$new_n15020_ i1=$abc$109383$new_n14988_ q=$abc$109383$new_n15021_
+.subckt mux2_x1 cmd=$abc$109383$new_n14993_ i0=$abc$109383$new_n15020_ i1=$abc$109383$new_n14988_ q=$abc$109383$new_n15021_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.xfer_ddr nq=$abc$109383$new_n15022_
-.subckt a2_x2 i0=$abc$109383$new_n15022_ i1=soc.rom.spimemio.xfer.xfer_qspi q=$abc$109383$new_n15023_
+.subckt and2_x1 i0=$abc$109383$new_n15022_ i1=soc.rom.spimemio.xfer.xfer_qspi q=$abc$109383$new_n15023_
 .subckt nand3_x0 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n14983_ i2=soc.rom.spimemio.xfer.flash_clk nq=$abc$109383$new_n15024_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.count[2] i1=$abc$109383$new_n14993_ nq=$abc$109383$new_n15025_
-.subckt a3_x2 i0=$abc$109383$new_n15025_ i1=$abc$109383$new_n15024_ i2=$abc$109383$new_n15023_ q=$abc$109383$new_n15026_
-.subckt oa22_x2 i0=$abc$109383$new_n15026_ i1=$abc$109383$new_n15021_ i2=$abc$109383$new_n15017_ q=$abc$109383$new_n15027_
-.subckt a2_x2 i0=$abc$109383$new_n15027_ i1=$abc$109383$new_n15014_ q=$abc$109383$new_n15028_
-.subckt ao22_x2 i0=$abc$109383$new_n15028_ i1=$abc$109383$new_n15013_ i2=$abc$109383$new_n15003_ q=$abc$109383$new_n15029_
+.subckt and3_x1 i0=$abc$109383$new_n15025_ i1=$abc$109383$new_n15024_ i2=$abc$109383$new_n15023_ q=$abc$109383$new_n15026_
+.subckt or21nand_x1 i0=$abc$109383$new_n15026_ i1=$abc$109383$new_n15021_ i2=$abc$109383$new_n15017_ nq=$abc$109383$new_n15027_
+.subckt and2_x1 i0=$abc$109383$new_n15027_ i1=$abc$109383$new_n15014_ q=$abc$109383$new_n15028_
+.subckt and21nor_x1 i0=$abc$109383$new_n15028_ i1=$abc$109383$new_n15013_ i2=$abc$109383$new_n15003_ nq=$abc$109383$new_n15029_
 .subckt buf_x4 i=$abc$109383$new_n15029_ q=$abc$109383$new_n15030_
-.subckt a3_x2 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=$abc$109383$new_n14976_ q=$abc$109383$new_n15031_
-.subckt ao22_x2 i0=soc.rom.spimemio.xfer.xfer_ddr_q i1=$abc$109383$new_n15031_ i2=$abc$109383$new_n14975_ q=$abc$109383$new_n15032_
+.subckt and3_x1 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=$abc$109383$new_n14976_ q=$abc$109383$new_n15031_
+.subckt and21nor_x1 i0=soc.rom.spimemio.xfer.xfer_ddr_q i1=$abc$109383$new_n15031_ i2=$abc$109383$new_n14975_ nq=$abc$109383$new_n15032_
 .subckt buf_x4 i=$abc$109383$new_n15032_ q=$abc$109383$new_n15033_
 .subckt nand4_x0 i0=$abc$109383$new_n15033_ i1=$abc$109383$new_n14971_ i2=$abc$109383$new_n14738_ i3=soc.rom.spimemio.state[10] nq=$abc$109383$new_n15034_
 .subckt buf_x4 i=soc.rom.spimemio.state[2] q=$abc$109383$new_n15035_
 .subckt nand4_x0 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=soc.rom.spimemio.din_valid i3=soc.rom.spimemio.xfer.resetn nq=$abc$109383$new_n15036_
-.subckt a2_x2 i0=$abc$109383$new_n15036_ i1=$abc$109383$new_n14736_ q=$abc$109383$new_n15037_
+.subckt and2_x1 i0=$abc$109383$new_n15036_ i1=$abc$109383$new_n14736_ q=$abc$109383$new_n15037_
 .subckt buf_x4 i=$abc$109383$new_n15037_ q=$abc$109383$new_n15038_
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n14971_ i2=$abc$109383$new_n15035_ nq=$abc$109383$new_n15039_
 .subckt inv_x0 i=soc.rom.spimemio.config_cont nq=$abc$109383$new_n15040_
 .subckt buf_x4 i=$abc$109383$new_n14737_ q=$abc$109383$new_n15041_
-.subckt a3_x2 i0=$abc$109383$new_n14943_ i1=$abc$109383$new_n14787_ i2=$abc$109383$new_n14922_ q=$abc$109383$new_n15042_
-.subckt nxr2_x1 i0=$abc$109383$new_n14863_ i1=soc.rom.spimemio.rd_addr[7] nq=$abc$109383$new_n15043_
-.subckt a4_x2 i0=$abc$109383$new_n15043_ i1=$abc$109383$new_n14958_ i2=$abc$109383$new_n14940_ i3=$abc$109383$new_n14923_ q=$abc$109383$new_n15044_
-.subckt a2_x2 i0=$abc$109383$new_n15044_ i1=$abc$109383$new_n15042_ q=$abc$109383$new_n15045_
-.subckt a4_x2 i0=$abc$109383$new_n14962_ i1=$abc$109383$new_n14947_ i2=$abc$109383$new_n14935_ i3=$abc$109383$new_n14924_ q=$abc$109383$new_n15046_
-.subckt a2_x2 i0=$abc$109383$new_n15046_ i1=$abc$109383$new_n14939_ q=$abc$109383$new_n15047_
+.subckt and3_x1 i0=$abc$109383$new_n14943_ i1=$abc$109383$new_n14787_ i2=$abc$109383$new_n14922_ q=$abc$109383$new_n15042_
+.subckt nexor2_x0 i0=$abc$109383$new_n14863_ i1=soc.rom.spimemio.rd_addr[7] nq=$abc$109383$new_n15043_
+.subckt and4_x1 i0=$abc$109383$new_n15043_ i1=$abc$109383$new_n14958_ i2=$abc$109383$new_n14940_ i3=$abc$109383$new_n14923_ q=$abc$109383$new_n15044_
+.subckt and2_x1 i0=$abc$109383$new_n15044_ i1=$abc$109383$new_n15042_ q=$abc$109383$new_n15045_
+.subckt and4_x1 i0=$abc$109383$new_n14962_ i1=$abc$109383$new_n14947_ i2=$abc$109383$new_n14935_ i3=$abc$109383$new_n14924_ q=$abc$109383$new_n15046_
+.subckt and2_x1 i0=$abc$109383$new_n15046_ i1=$abc$109383$new_n14939_ q=$abc$109383$new_n15047_
 .subckt nand2_x0 i0=$abc$109383$new_n14950_ i1=$abc$109383$new_n14777_ nq=$abc$109383$new_n15048_
-.subckt a4_x2 i0=$abc$109383$new_n15048_ i1=$abc$109383$new_n14948_ i2=$abc$109383$new_n14936_ i3=$abc$109383$new_n14930_ q=$abc$109383$new_n15049_
-.subckt a2_x2 i0=$abc$109383$new_n14931_ i1=$abc$109383$new_n14942_ q=$abc$109383$new_n15050_
-.subckt a2_x2 i0=$abc$109383$new_n14961_ i1=$abc$109383$new_n14925_ q=$abc$109383$new_n15051_
-.subckt o2_x2 i0=$abc$109383$new_n14950_ i1=$abc$109383$new_n14777_ q=$abc$109383$new_n15052_
-.subckt a3_x2 i0=$abc$109383$new_n15052_ i1=$abc$109383$new_n14928_ i2=$abc$109383$new_n14808_ q=$abc$109383$new_n15053_
-.subckt a4_x2 i0=$abc$109383$new_n15053_ i1=$abc$109383$new_n15051_ i2=$abc$109383$new_n15050_ i3=$abc$109383$new_n15049_ q=$abc$109383$new_n15054_
+.subckt and4_x1 i0=$abc$109383$new_n15048_ i1=$abc$109383$new_n14948_ i2=$abc$109383$new_n14936_ i3=$abc$109383$new_n14930_ q=$abc$109383$new_n15049_
+.subckt and2_x1 i0=$abc$109383$new_n14931_ i1=$abc$109383$new_n14942_ q=$abc$109383$new_n15050_
+.subckt and2_x1 i0=$abc$109383$new_n14961_ i1=$abc$109383$new_n14925_ q=$abc$109383$new_n15051_
+.subckt or2_x1 i0=$abc$109383$new_n14950_ i1=$abc$109383$new_n14777_ q=$abc$109383$new_n15052_
+.subckt and3_x1 i0=$abc$109383$new_n15052_ i1=$abc$109383$new_n14928_ i2=$abc$109383$new_n14808_ q=$abc$109383$new_n15053_
+.subckt and4_x1 i0=$abc$109383$new_n15053_ i1=$abc$109383$new_n15051_ i2=$abc$109383$new_n15050_ i3=$abc$109383$new_n15049_ q=$abc$109383$new_n15054_
 .subckt nand3_x0 i0=$abc$109383$new_n15054_ i1=$abc$109383$new_n15047_ i2=$abc$109383$new_n15045_ nq=$abc$109383$new_n15055_
-.subckt o2_x2 i0=$abc$109383$new_n14790_ i1=$abc$109383$new_n14797_ q=$abc$109383$new_n15056_
-.subckt o2_x2 i0=$abc$109383$new_n14839_ i1=$abc$109383$new_n14840_ q=$abc$109383$new_n15057_
-.subckt a3_x2 i0=$abc$109383$new_n15057_ i1=$abc$109383$new_n15056_ i2=$abc$109383$new_n14803_ q=$abc$109383$new_n15058_
+.subckt or2_x1 i0=$abc$109383$new_n14790_ i1=$abc$109383$new_n14797_ q=$abc$109383$new_n15056_
+.subckt or2_x1 i0=$abc$109383$new_n14839_ i1=$abc$109383$new_n14840_ q=$abc$109383$new_n15057_
+.subckt and3_x1 i0=$abc$109383$new_n15057_ i1=$abc$109383$new_n15056_ i2=$abc$109383$new_n14803_ q=$abc$109383$new_n15058_
 .subckt nand2_x0 i0=$abc$109383$new_n14839_ i1=$abc$109383$new_n14840_ nq=$abc$109383$new_n15059_
-.subckt a2_x2 i0=$abc$109383$new_n14955_ i1=$abc$109383$new_n14927_ q=$abc$109383$new_n15060_
-.subckt a3_x2 i0=$abc$109383$new_n15060_ i1=$abc$109383$new_n15059_ i2=$abc$109383$new_n14953_ q=$abc$109383$new_n15061_
-.subckt a3_x2 i0=$abc$109383$new_n15061_ i1=$abc$109383$new_n15058_ i2=soc.rom.spimemio.rd_valid q=$abc$109383$new_n15062_
+.subckt and2_x1 i0=$abc$109383$new_n14955_ i1=$abc$109383$new_n14927_ q=$abc$109383$new_n15060_
+.subckt and3_x1 i0=$abc$109383$new_n15060_ i1=$abc$109383$new_n15059_ i2=$abc$109383$new_n14953_ q=$abc$109383$new_n15061_
+.subckt and3_x1 i0=$abc$109383$new_n15061_ i1=$abc$109383$new_n15058_ i2=soc.rom.spimemio.rd_valid q=$abc$109383$new_n15062_
 .subckt nand2_x0 i0=$abc$109383$new_n15062_ i1=$abc$109383$new_n14921_ nq=$abc$109383$new_n15063_
-.subckt ao22_x2 i0=$abc$109383$new_n15063_ i1=$abc$109383$new_n15055_ i2=$abc$109383$new_n14921_ q=$abc$109383$new_n15064_
-.subckt nxr2_x1 i0=$abc$109383$new_n14758_ i1=soc.rom.spimemio.rd_addr[20] nq=$abc$109383$new_n15065_
+.subckt and21nor_x1 i0=$abc$109383$new_n15063_ i1=$abc$109383$new_n15055_ i2=$abc$109383$new_n14921_ nq=$abc$109383$new_n15064_
+.subckt nexor2_x0 i0=$abc$109383$new_n14758_ i1=soc.rom.spimemio.rd_addr[20] nq=$abc$109383$new_n15065_
 .subckt nand2_x0 i0=$abc$109383$new_n15065_ i1=$abc$109383$new_n14756_ nq=$abc$109383$new_n15066_
-.subckt nxr2_x1 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[18] nq=$abc$109383$new_n15067_
+.subckt nexor2_x0 i0=$abc$109383$new_n14746_ i1=soc.rom.spimemio.rd_addr[18] nq=$abc$109383$new_n15067_
 .subckt nand2_x0 i0=$abc$109383$new_n15067_ i1=$abc$109383$new_n14950_ nq=$abc$109383$new_n15068_
-.subckt a2_x2 i0=$abc$109383$new_n14744_ i1=soc.rom.spimemio.rd_addr[12] q=$abc$109383$new_n15069_
+.subckt and2_x1 i0=$abc$109383$new_n14744_ i1=soc.rom.spimemio.rd_addr[12] q=$abc$109383$new_n15069_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[13] nq=$abc$109383$new_n15070_
-.subckt nxr2_x1 i0=$abc$109383$new_n14802_ i1=$abc$109383$new_n15070_ nq=$abc$109383$new_n15071_
-.subckt nxr2_x1 i0=$abc$109383$new_n15071_ i1=$abc$109383$new_n15069_ nq=$abc$109383$new_n15072_
-.subckt a2_x2 i0=$abc$109383$new_n15072_ i1=$abc$109383$new_n14874_ q=$abc$109383$new_n15073_
-.subckt a4_x2 i0=$abc$109383$new_n14860_ i1=$abc$109383$new_n14847_ i2=$abc$109383$new_n14842_ i3=$abc$109383$new_n14831_ q=$abc$109383$new_n15074_
+.subckt nexor2_x0 i0=$abc$109383$new_n14802_ i1=$abc$109383$new_n15070_ nq=$abc$109383$new_n15071_
+.subckt nexor2_x0 i0=$abc$109383$new_n15071_ i1=$abc$109383$new_n15069_ nq=$abc$109383$new_n15072_
+.subckt and2_x1 i0=$abc$109383$new_n15072_ i1=$abc$109383$new_n14874_ q=$abc$109383$new_n15073_
+.subckt and4_x1 i0=$abc$109383$new_n14860_ i1=$abc$109383$new_n14847_ i2=$abc$109383$new_n14842_ i3=$abc$109383$new_n14831_ q=$abc$109383$new_n15074_
 .subckt nand2_x0 i0=$abc$109383$new_n14816_ i1=$abc$109383$new_n14819_ nq=$abc$109383$new_n15075_
-.subckt a2_x2 i0=$abc$109383$new_n14867_ i1=$abc$109383$new_n14836_ q=$abc$109383$new_n15076_
-.subckt a2_x2 i0=$abc$109383$new_n15076_ i1=$abc$109383$new_n15075_ q=$abc$109383$new_n15077_
-.subckt a3_x2 i0=$abc$109383$new_n15077_ i1=$abc$109383$new_n15074_ i2=$abc$109383$new_n14826_ q=$abc$109383$new_n15078_
-.subckt nxr2_x1 i0=$abc$109383$new_n14808_ i1=$abc$109383$new_n14810_ nq=$abc$109383$new_n15079_
-.subckt nxr2_x1 i0=$abc$109383$new_n14798_ i1=$abc$109383$new_n14790_ nq=$abc$109383$new_n15080_
-.subckt a2_x2 i0=$abc$109383$new_n15080_ i1=$abc$109383$new_n14880_ q=$abc$109383$new_n15081_
-.subckt a4_x2 i0=$abc$109383$new_n15081_ i1=$abc$109383$new_n15079_ i2=$abc$109383$new_n15078_ i3=$abc$109383$new_n15073_ q=$abc$109383$new_n15082_
+.subckt and2_x1 i0=$abc$109383$new_n14867_ i1=$abc$109383$new_n14836_ q=$abc$109383$new_n15076_
+.subckt and2_x1 i0=$abc$109383$new_n15076_ i1=$abc$109383$new_n15075_ q=$abc$109383$new_n15077_
+.subckt and3_x1 i0=$abc$109383$new_n15077_ i1=$abc$109383$new_n15074_ i2=$abc$109383$new_n14826_ q=$abc$109383$new_n15078_
+.subckt nexor2_x0 i0=$abc$109383$new_n14808_ i1=$abc$109383$new_n14810_ nq=$abc$109383$new_n15079_
+.subckt nexor2_x0 i0=$abc$109383$new_n14798_ i1=$abc$109383$new_n14790_ nq=$abc$109383$new_n15080_
+.subckt and2_x1 i0=$abc$109383$new_n15080_ i1=$abc$109383$new_n14880_ q=$abc$109383$new_n15081_
+.subckt and4_x1 i0=$abc$109383$new_n15081_ i1=$abc$109383$new_n15079_ i2=$abc$109383$new_n15078_ i3=$abc$109383$new_n15073_ q=$abc$109383$new_n15082_
 .subckt nand4_x0 i0=$abc$109383$new_n15082_ i1=$abc$109383$new_n15068_ i2=$abc$109383$new_n15066_ i3=$abc$109383$new_n14751_ nq=$abc$109383$new_n15083_
-.subckt a2_x2 i0=$abc$109383$new_n14766_ i1=$abc$109383$new_n14754_ q=$abc$109383$new_n15084_
+.subckt and2_x1 i0=$abc$109383$new_n14766_ i1=$abc$109383$new_n14754_ q=$abc$109383$new_n15084_
 .subckt nand2_x0 i0=$abc$109383$new_n14922_ i1=$abc$109383$new_n14748_ nq=$abc$109383$new_n15085_
-.subckt ao22_x2 i0=$abc$109383$new_n14748_ i1=$abc$109383$new_n14922_ i2=$abc$109383$new_n14788_ q=$abc$109383$new_n15086_
-.subckt a3_x2 i0=$abc$109383$new_n15086_ i1=$abc$109383$new_n14889_ i2=$abc$109383$new_n15085_ q=$abc$109383$new_n15087_
+.subckt and21nor_x1 i0=$abc$109383$new_n14748_ i1=$abc$109383$new_n14922_ i2=$abc$109383$new_n14788_ nq=$abc$109383$new_n15086_
+.subckt and3_x1 i0=$abc$109383$new_n15086_ i1=$abc$109383$new_n14889_ i2=$abc$109383$new_n15085_ q=$abc$109383$new_n15087_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[18] nq=$abc$109383$new_n15088_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[18] nq=$abc$109383$new_n15089_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n15089_ i1=$abc$109383$new_n15088_ q=$abc$109383$new_n15090_
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n15089_ i1=$abc$109383$new_n15088_ q=$abc$109383$new_n15090_
 .subckt nand2_x0 i0=$abc$109383$new_n14759_ i1=$abc$109383$new_n15090_ nq=$abc$109383$new_n15091_
-.subckt ao22_x2 i0=$abc$109383$new_n14950_ i1=$abc$109383$new_n15067_ i2=$abc$109383$new_n14784_ q=$abc$109383$new_n15092_
-.subckt a2_x2 i0=$abc$109383$new_n15092_ i1=$abc$109383$new_n15091_ q=$abc$109383$new_n15093_
+.subckt and21nor_x1 i0=$abc$109383$new_n14950_ i1=$abc$109383$new_n15067_ i2=$abc$109383$new_n14784_ nq=$abc$109383$new_n15092_
+.subckt and2_x1 i0=$abc$109383$new_n15092_ i1=$abc$109383$new_n15091_ q=$abc$109383$new_n15093_
 .subckt nand3_x0 i0=$abc$109383$new_n15093_ i1=$abc$109383$new_n15087_ i2=$abc$109383$new_n15084_ nq=$abc$109383$new_n15094_
-.subckt ao22_x2 i0=$abc$109383$new_n15094_ i1=$abc$109383$new_n15083_ i2=soc.rom.spimemio.rd_valid q=$abc$109383$new_n15095_
+.subckt and21nor_x1 i0=$abc$109383$new_n15094_ i1=$abc$109383$new_n15083_ i2=soc.rom.spimemio.rd_valid nq=$abc$109383$new_n15095_
 .subckt nand4_x0 i0=$abc$109383$new_n15095_ i1=$abc$109383$new_n15064_ i2=$abc$109383$new_n15041_ i3=$abc$109383$new_n15040_ nq=$abc$109383$new_n15096_
 .subckt nand3_x0 i0=$abc$109383$new_n15096_ i1=$abc$109383$new_n15039_ i2=$abc$109383$new_n15034_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[2]
 .subckt buf_x4 i=$abc$109383$new_n14970_ q=$abc$109383$new_n15098_
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n15098_ i2=soc.rom.spimemio.state[1] nq=$abc$109383$new_n15099_
-.subckt a4_x2 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=soc.rom.spimemio.din_valid i3=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n15100_
+.subckt and4_x1 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=soc.rom.spimemio.din_valid i3=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n15100_
 .subckt buf_x4 i=$abc$109383$new_n15100_ q=$abc$109383$new_n15101_
 .subckt buf_x4 i=$abc$109383$new_n15101_ q=$abc$109383$new_n15102_
 .subckt buf_x4 i=$abc$109383$new_n15102_ q=$abc$109383$new_n15103_
 .subckt buf_x4 i=soc.rom.spimemio.state[12] q=$abc$109383$new_n15104_
 .subckt buf_x4 i=soc.rom.spimemio.config_ddr q=$abc$109383$new_n15105_
-.subckt ao22_x2 i0=soc.rom.spimemio.config_qspi i1=$abc$109383$new_n15105_ i2=$abc$109383$new_n15104_ q=$abc$109383$new_n15106_
+.subckt and21nor_x1 i0=soc.rom.spimemio.config_qspi i1=$abc$109383$new_n15105_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n15106_
 .subckt nand4_x0 i0=$abc$109383$new_n15106_ i1=$abc$109383$new_n15103_ i2=$abc$109383$new_n15098_ i3=$abc$109383$new_n14738_ nq=$abc$109383$new_n15107_
 .subckt nand2_x0 i0=$abc$109383$new_n15107_ i1=$abc$109383$new_n15099_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[1]
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n15098_ i2=soc.rom.spimemio.state[0] nq=$abc$109383$new_n15109_
 .subckt nand2_x0 i0=$abc$109383$new_n15109_ i1=$abc$109383$new_n14738_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[0]
 .subckt buf_x4 i=soc.rom.spimemio.state[6] q=$abc$109383$new_n15111_
-.subckt mx2_x2 cmd=$abc$109383$new_n15036_ i0=$abc$109383$new_n15111_ i1=$abc$109383$new_n15104_ q=$abc$109383$new_n15112_
-.subckt a3_x2 i0=$abc$109383$new_n15112_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[12]
+.subckt mux2_x1 cmd=$abc$109383$new_n15036_ i0=$abc$109383$new_n15111_ i1=$abc$109383$new_n15104_ q=$abc$109383$new_n15112_
+.subckt and3_x1 i0=$abc$109383$new_n15112_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[12]
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n15098_ i2=soc.rom.spimemio.state[11] nq=$abc$109383$new_n15114_
 .subckt nand4_x0 i0=$abc$109383$new_n15102_ i1=$abc$109383$new_n14971_ i2=$abc$109383$new_n14738_ i3=soc.rom.spimemio.state[5] nq=$abc$109383$new_n15115_
 .subckt nand2_x0 i0=$abc$109383$new_n15115_ i1=$abc$109383$new_n15114_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[11]
 .subckt buf_x4 i=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n15117_
 .subckt nand2_x0 i0=$abc$109383$new_n14974_ i1=$abc$109383$new_n15117_ nq=$abc$109383$new_n15118_
 .subckt nand3_x0 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=$abc$109383$new_n14976_ nq=$abc$109383$new_n15119_
-.subckt oa22_x2 i0=$abc$109383$new_n14972_ i1=$abc$109383$new_n15119_ i2=$abc$109383$new_n15118_ q=$abc$109383$new_n15120_
+.subckt or21nand_x1 i0=$abc$109383$new_n14972_ i1=$abc$109383$new_n15119_ i2=$abc$109383$new_n15118_ nq=$abc$109383$new_n15120_
 .subckt nand4_x0 i0=$abc$109383$new_n15120_ i1=$abc$109383$new_n14971_ i2=$abc$109383$new_n14738_ i3=soc.rom.spimemio.state[10] nq=$abc$109383$new_n15121_
 .subckt nand4_x0 i0=$abc$109383$new_n15102_ i1=$abc$109383$new_n14971_ i2=$abc$109383$new_n14738_ i3=soc.rom.spimemio.state[4] nq=$abc$109383$new_n15122_
 .subckt nand2_x0 i0=$abc$109383$new_n15122_ i1=$abc$109383$new_n15121_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[10]
 .subckt buf_x4 i=soc.rst_sync1 q=$abc$109383$new_n15124_
-.subckt o2_x2 i0=soc.rom.spimemio.softreset i1=$abc$109383$new_n15124_ q=$abc$109383$new_n15125_
+.subckt or2_x1 i0=soc.rom.spimemio.softreset i1=$abc$109383$new_n15124_ q=$abc$109383$new_n15125_
 .subckt inv_x0 i=soc.rom.spimemio.state[9] nq=$abc$109383$new_n15126_
-.subckt a3_x2 i0=$abc$109383$new_n14962_ i1=$abc$109383$new_n14935_ i2=$abc$109383$new_n14939_ q=$abc$109383$new_n15127_
-.subckt a2_x2 i0=$abc$109383$new_n14940_ i1=$abc$109383$new_n14922_ q=$abc$109383$new_n15128_
-.subckt a3_x2 i0=$abc$109383$new_n14947_ i1=$abc$109383$new_n14924_ i2=$abc$109383$new_n14787_ q=$abc$109383$new_n15129_
-.subckt a3_x2 i0=$abc$109383$new_n14958_ i1=$abc$109383$new_n15056_ i2=$abc$109383$new_n14803_ q=$abc$109383$new_n15130_
-.subckt a4_x2 i0=$abc$109383$new_n15130_ i1=$abc$109383$new_n15129_ i2=$abc$109383$new_n15128_ i3=$abc$109383$new_n15127_ q=$abc$109383$new_n15131_
-.subckt a4_x2 i0=$abc$109383$new_n15057_ i1=$abc$109383$new_n14955_ i2=$abc$109383$new_n14953_ i3=$abc$109383$new_n14927_ q=$abc$109383$new_n15132_
+.subckt and3_x1 i0=$abc$109383$new_n14962_ i1=$abc$109383$new_n14935_ i2=$abc$109383$new_n14939_ q=$abc$109383$new_n15127_
+.subckt and2_x1 i0=$abc$109383$new_n14940_ i1=$abc$109383$new_n14922_ q=$abc$109383$new_n15128_
+.subckt and3_x1 i0=$abc$109383$new_n14947_ i1=$abc$109383$new_n14924_ i2=$abc$109383$new_n14787_ q=$abc$109383$new_n15129_
+.subckt and3_x1 i0=$abc$109383$new_n14958_ i1=$abc$109383$new_n15056_ i2=$abc$109383$new_n14803_ q=$abc$109383$new_n15130_
+.subckt and4_x1 i0=$abc$109383$new_n15130_ i1=$abc$109383$new_n15129_ i2=$abc$109383$new_n15128_ i3=$abc$109383$new_n15127_ q=$abc$109383$new_n15131_
+.subckt and4_x1 i0=$abc$109383$new_n15057_ i1=$abc$109383$new_n14955_ i2=$abc$109383$new_n14953_ i3=$abc$109383$new_n14927_ q=$abc$109383$new_n15132_
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[3] nq=$abc$109383$new_n15133_
-.subckt o2_x2 i0=$abc$109383$new_n14852_ i1=$abc$109383$new_n15133_ q=$abc$109383$new_n15134_
-.subckt a3_x2 i0=$abc$109383$new_n15134_ i1=$abc$109383$new_n15059_ i2=$abc$109383$new_n14936_ q=$abc$109383$new_n15135_
+.subckt or2_x1 i0=$abc$109383$new_n14852_ i1=$abc$109383$new_n15133_ q=$abc$109383$new_n15134_
+.subckt and3_x1 i0=$abc$109383$new_n15134_ i1=$abc$109383$new_n15059_ i2=$abc$109383$new_n14936_ q=$abc$109383$new_n15135_
 .subckt buf_x4 i=$abc$109383$new_n14852_ q=$abc$109383$new_n15136_
 .subckt nand2_x0 i0=$abc$109383$new_n15136_ i1=$abc$109383$new_n15133_ nq=$abc$109383$new_n15137_
-.subckt a2_x2 i0=$abc$109383$new_n15137_ i1=$abc$109383$new_n14930_ q=$abc$109383$new_n15138_
-.subckt a3_x2 i0=$abc$109383$new_n15043_ i1=$abc$109383$new_n14923_ i2=$abc$109383$new_n14943_ q=$abc$109383$new_n15139_
-.subckt a4_x2 i0=$abc$109383$new_n15139_ i1=$abc$109383$new_n15138_ i2=$abc$109383$new_n15135_ i3=$abc$109383$new_n15132_ q=$abc$109383$new_n15140_
+.subckt and2_x1 i0=$abc$109383$new_n15137_ i1=$abc$109383$new_n14930_ q=$abc$109383$new_n15138_
+.subckt and3_x1 i0=$abc$109383$new_n15043_ i1=$abc$109383$new_n14923_ i2=$abc$109383$new_n14943_ q=$abc$109383$new_n15139_
+.subckt and4_x1 i0=$abc$109383$new_n15139_ i1=$abc$109383$new_n15138_ i2=$abc$109383$new_n15135_ i3=$abc$109383$new_n15132_ q=$abc$109383$new_n15140_
 .subckt nand2_x0 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n14876_ nq=$abc$109383$new_n15141_
-.subckt ao22_x2 i0=$abc$109383$new_n14814_ i1=$abc$109383$new_n14824_ i2=$abc$109383$new_n15141_ q=$abc$109383$new_n15142_
-.subckt ao22_x2 i0=$abc$109383$new_n14876_ i1=$abc$109383$new_n14878_ i2=$abc$109383$new_n15048_ q=$abc$109383$new_n15143_
-.subckt o2_x2 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n14762_ q=$abc$109383$new_n15144_
+.subckt and21nor_x1 i0=$abc$109383$new_n14814_ i1=$abc$109383$new_n14824_ i2=$abc$109383$new_n15141_ nq=$abc$109383$new_n15142_
+.subckt and21nor_x1 i0=$abc$109383$new_n14876_ i1=$abc$109383$new_n14878_ i2=$abc$109383$new_n15048_ nq=$abc$109383$new_n15143_
+.subckt or2_x1 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n14762_ q=$abc$109383$new_n15144_
 .subckt nand2_x0 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n14762_ nq=$abc$109383$new_n15145_
-.subckt a4_x2 i0=$abc$109383$new_n15145_ i1=$abc$109383$new_n15144_ i2=$abc$109383$new_n15052_ i3=$abc$109383$new_n14928_ q=$abc$109383$new_n15146_
-.subckt a2_x2 i0=$abc$109383$new_n14931_ i1=soc.rom.spimemio.rd_valid q=$abc$109383$new_n15147_
-.subckt a2_x2 i0=$abc$109383$new_n15147_ i1=$abc$109383$new_n14808_ q=$abc$109383$new_n15148_
-.subckt a4_x2 i0=$abc$109383$new_n15148_ i1=$abc$109383$new_n15146_ i2=$abc$109383$new_n15143_ i3=$abc$109383$new_n15142_ q=$abc$109383$new_n15149_
+.subckt and4_x1 i0=$abc$109383$new_n15145_ i1=$abc$109383$new_n15144_ i2=$abc$109383$new_n15052_ i3=$abc$109383$new_n14928_ q=$abc$109383$new_n15146_
+.subckt and2_x1 i0=$abc$109383$new_n14931_ i1=soc.rom.spimemio.rd_valid q=$abc$109383$new_n15147_
+.subckt and2_x1 i0=$abc$109383$new_n15147_ i1=$abc$109383$new_n14808_ q=$abc$109383$new_n15148_
+.subckt and4_x1 i0=$abc$109383$new_n15148_ i1=$abc$109383$new_n15146_ i2=$abc$109383$new_n15143_ i3=$abc$109383$new_n15142_ q=$abc$109383$new_n15149_
 .subckt nand4_x0 i0=$abc$109383$new_n15149_ i1=$abc$109383$new_n15140_ i2=$abc$109383$new_n15131_ i3=$abc$109383$new_n14920_ nq=$abc$109383$new_n15150_
-.subckt oa22_x2 i0=$abc$109383$new_n15150_ i1=$abc$109383$new_n14921_ i2=$abc$109383$new_n15126_ q=$abc$109383$new_n15151_
+.subckt or21nand_x1 i0=$abc$109383$new_n15150_ i1=$abc$109383$new_n14921_ i2=$abc$109383$new_n15126_ nq=$abc$109383$new_n15151_
 .subckt nand3_x0 i0=$abc$109383$new_n14968_ i1=$abc$109383$new_n14893_ i2=soc.rom.spimemio.config_cont nq=$abc$109383$new_n15152_
-.subckt oa22_x2 i0=$abc$109383$new_n15152_ i1=$abc$109383$new_n15151_ i2=$abc$109383$new_n15125_ q=$abc$109383$new_n15153_
+.subckt or21nand_x1 i0=$abc$109383$new_n15152_ i1=$abc$109383$new_n15151_ i2=$abc$109383$new_n15125_ nq=$abc$109383$new_n15153_
 .subckt nand4_x0 i0=$abc$109383$new_n15102_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n15041_ i3=$abc$109383$new_n15035_ nq=$abc$109383$new_n15154_
 .subckt buf_x4 i=soc.rom.spimemio.state[9] q=$abc$109383$new_n15155_
-.subckt a2_x2 i0=$abc$109383$new_n15064_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n15156_
+.subckt and2_x1 i0=$abc$109383$new_n15064_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n15156_
 .subckt nand3_x0 i0=$abc$109383$new_n15156_ i1=$abc$109383$new_n15037_ i2=$abc$109383$new_n14971_ nq=$abc$109383$new_n15157_
 .subckt nand3_x0 i0=$abc$109383$new_n15157_ i1=$abc$109383$new_n15154_ i2=$abc$109383$new_n15153_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[9]
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n15098_ i2=soc.rom.spimemio.state[8] nq=$abc$109383$new_n15159_
 .subckt inv_x0 i=soc.rom.spimemio.state[3] nq=$abc$109383$new_n15160_
 .subckt nand4_x0 i0=$abc$109383$new_n14919_ i1=$abc$109383$new_n14915_ i2=$abc$109383$new_n14906_ i3=$abc$109383$new_n14897_ nq=$abc$109383$new_n15161_
-.subckt oa22_x2 i0=soc.rom.spimemio.rd_wait i1=$abc$109383$new_n15161_ i2=$abc$109383$new_n15160_ q=$abc$109383$new_n15162_
+.subckt or21nand_x1 i0=soc.rom.spimemio.rd_wait i1=$abc$109383$new_n15161_ i2=$abc$109383$new_n15160_ nq=$abc$109383$new_n15162_
 .subckt inv_x0 i=soc.rom.spimemio.state[1] nq=$abc$109383$new_n15163_
-.subckt o2_x2 i0=soc.rom.spimemio.config_ddr i1=soc.rom.spimemio.config_qspi q=$abc$109383$new_n15164_
+.subckt or2_x1 i0=soc.rom.spimemio.config_ddr i1=soc.rom.spimemio.config_qspi q=$abc$109383$new_n15164_
 .subckt inv_x0 i=$abc$109383$new_n15104_ nq=$abc$109383$new_n15165_
-.subckt ao22_x2 i0=$abc$109383$new_n15165_ i1=$abc$109383$new_n15164_ i2=$abc$109383$new_n15163_ q=$abc$109383$new_n15166_
+.subckt and21nor_x1 i0=$abc$109383$new_n15165_ i1=$abc$109383$new_n15164_ i2=$abc$109383$new_n15163_ nq=$abc$109383$new_n15166_
 .subckt nand2_x0 i0=$abc$109383$new_n15166_ i1=$abc$109383$new_n15162_ nq=$abc$109383$new_n15167_
 .subckt nand4_x0 i0=$abc$109383$new_n15167_ i1=$abc$109383$new_n15103_ i2=$abc$109383$new_n15098_ i3=$abc$109383$new_n14738_ nq=$abc$109383$new_n15168_
 .subckt nand2_x0 i0=$abc$109383$new_n15168_ i1=$abc$109383$new_n15159_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[8]
@@ -445,7 +445,7 @@
 .subckt nand4_x0 i0=$abc$109383$new_n15102_ i1=$abc$109383$new_n14971_ i2=$abc$109383$new_n15041_ i3=soc.rom.spimemio.state[0] nq=$abc$109383$new_n15171_
 .subckt nand2_x0 i0=$abc$109383$new_n15171_ i1=$abc$109383$new_n15170_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[7]
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n15098_ i2=$abc$109383$new_n15111_ nq=$abc$109383$new_n15173_
-.subckt a3_x2 i0=$abc$109383$new_n15150_ i1=$abc$109383$new_n14921_ i2=$abc$109383$new_n15155_ q=$abc$109383$new_n15174_
+.subckt and3_x1 i0=$abc$109383$new_n15150_ i1=$abc$109383$new_n14921_ i2=$abc$109383$new_n15155_ q=$abc$109383$new_n15174_
 .subckt nand4_x0 i0=$abc$109383$new_n15174_ i1=$abc$109383$new_n15102_ i2=$abc$109383$new_n14971_ i3=$abc$109383$new_n14738_ nq=$abc$109383$new_n15175_
 .subckt nand2_x0 i0=$abc$109383$new_n15175_ i1=$abc$109383$new_n15173_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[6]
 .subckt nand3_x0 i0=$abc$109383$new_n15038_ i1=$abc$109383$new_n15098_ i2=soc.rom.spimemio.state[5] nq=$abc$109383$new_n15177_
@@ -456,70 +456,70 @@
 .subckt nand2_x0 i0=$abc$109383$new_n15181_ i1=$abc$109383$new_n15180_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[4]
 .subckt nand4_x0 i0=$abc$109383$new_n15161_ i1=$abc$109383$new_n15041_ i2=soc.rom.spimemio.state[3] i3=soc.rom.spimemio.rd_wait nq=$abc$109383$new_n15183_
 .subckt inv_x0 i=soc.rom.spimemio.rd_wait nq=$abc$109383$new_n15184_
-.subckt ao22_x2 i0=$abc$109383$new_n15184_ i1=$abc$109383$new_n14921_ i2=soc.rom.spimemio.state[3] q=$abc$109383$new_n15185_
+.subckt and21nor_x1 i0=$abc$109383$new_n15184_ i1=$abc$109383$new_n14921_ i2=soc.rom.spimemio.state[3] nq=$abc$109383$new_n15185_
 .subckt nand3_x0 i0=$abc$109383$new_n15185_ i1=$abc$109383$new_n15038_ i2=$abc$109383$new_n15098_ nq=$abc$109383$new_n15186_
 .subckt nand4_x0 i0=$abc$109383$new_n15102_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n15041_ i3=soc.rom.spimemio.state[11] nq=$abc$109383$new_n15187_
 .subckt nand3_x0 i0=$abc$109383$new_n15187_ i1=$abc$109383$new_n15186_ i2=$abc$109383$new_n15183_ nq=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[3]
 .subckt buf_x4 i=soc.rom.spimemio.xfer.xfer_qspi q=$abc$109383$new_n15189_
 .subckt buf_x4 i=$abc$109383$new_n15189_ q=$abc$109383$new_n15190_
 .subckt buf_x4 i=$abc$109383$new_n15003_ q=$abc$109383$new_n15191_
-.subckt a3_x2 i0=$abc$109383$new_n15191_ i1=soc.rom.spimemio.xfer.obuffer[7] i2=$abc$109383$new_n15190_ q=soc.rom.spimemio.xfer.flash_io3_do
+.subckt and3_x1 i0=$abc$109383$new_n15191_ i1=soc.rom.spimemio.xfer.obuffer[7] i2=$abc$109383$new_n15190_ q=soc.rom.spimemio.xfer.flash_io3_do
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer_io3_90 i1=$abc$109383$new_n15105_ nq=$abc$109383$new_n15193_
 .subckt inv_x0 i=$abc$109383$new_n15105_ nq=$abc$109383$new_n15194_
 .subckt nand4_x0 i0=$abc$109383$new_n15191_ i1=soc.rom.spimemio.xfer.obuffer[7] i2=$abc$109383$new_n15194_ i3=$abc$109383$new_n15190_ nq=$abc$109383$new_n15195_
 .subckt nand2_x0 i0=$abc$109383$new_n15195_ i1=$abc$109383$new_n15193_ nq=$abc$109383$new_n15196_
 .subckt inv_x1 i=soc.rom.spimemio.config_en nq=$abc$109383$new_n15197_
-.subckt mx2_x2 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n15196_ i1=soc.rom.spimemio.config_do[3] q=soc.rom.$signal$13
-.subckt a3_x2 i0=$abc$109383$new_n15191_ i1=soc.rom.spimemio.xfer.obuffer[6] i2=$abc$109383$new_n15190_ q=soc.rom.spimemio.xfer.flash_io2_do
+.subckt mux2_x1 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n15196_ i1=soc.rom.spimemio.config_do[3] q=soc.rom.$signal$13
+.subckt and3_x1 i0=$abc$109383$new_n15191_ i1=soc.rom.spimemio.xfer.obuffer[6] i2=$abc$109383$new_n15190_ q=soc.rom.spimemio.xfer.flash_io2_do
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer_io2_90 i1=$abc$109383$new_n15105_ nq=$abc$109383$new_n15200_
 .subckt nand4_x0 i0=$abc$109383$new_n15191_ i1=soc.rom.spimemio.xfer.obuffer[6] i2=$abc$109383$new_n15194_ i3=$abc$109383$new_n15190_ nq=$abc$109383$new_n15201_
 .subckt nand2_x0 i0=$abc$109383$new_n15201_ i1=$abc$109383$new_n15200_ nq=$abc$109383$new_n15202_
-.subckt mx2_x2 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n15202_ i1=soc.rom.spimemio.config_do[2] q=soc.rom.$signal$10
-.subckt a3_x2 i0=$abc$109383$new_n15003_ i1=soc.rom.spimemio.xfer.obuffer[5] i2=$abc$109383$new_n15189_ q=$abc$109383$new_n15204_
+.subckt mux2_x1 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n15202_ i1=soc.rom.spimemio.config_do[2] q=soc.rom.$signal$10
+.subckt and3_x1 i0=$abc$109383$new_n15003_ i1=soc.rom.spimemio.xfer.obuffer[5] i2=$abc$109383$new_n15189_ q=$abc$109383$new_n15204_
 .subckt buf_x4 i=soc.rom.spimemio.xfer.xfer_dspi q=$abc$109383$new_n15205_
 .subckt buf_x4 i=$abc$109383$new_n14977_ q=$abc$109383$new_n15206_
 .subckt buf_x4 i=$abc$109383$new_n15206_ q=$abc$109383$new_n15207_
-.subckt a3_x2 i0=soc.rom.spimemio.xfer.obuffer[7] i1=$abc$109383$new_n15207_ i2=$abc$109383$new_n15205_ q=$abc$109383$new_n15208_
-.subckt oa22_x2 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n15208_ i2=$abc$109383$new_n15204_ q=soc.rom.spimemio.xfer.flash_io1_do
+.subckt and3_x1 i0=soc.rom.spimemio.xfer.obuffer[7] i1=$abc$109383$new_n15207_ i2=$abc$109383$new_n15205_ q=$abc$109383$new_n15208_
+.subckt or21nand_x1 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n15208_ i2=$abc$109383$new_n15204_ nq=soc.rom.spimemio.xfer.flash_io1_do
 .subckt buf_x4 i=soc.rom.spimemio.config_en q=$abc$109383$new_n15210_
-.subckt o2_x2 i0=soc.rom.spimemio.config_do[1] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n15211_
+.subckt or2_x1 i0=soc.rom.spimemio.config_do[1] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n15211_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer_io1_90 i1=$abc$109383$new_n15105_ nq=$abc$109383$new_n15212_
 .subckt nand2_x0 i0=$abc$109383$new_n15212_ i1=$abc$109383$new_n15210_ nq=$abc$109383$new_n15213_
-.subckt a4_x2 i0=$abc$109383$new_n15003_ i1=soc.rom.spimemio.xfer.obuffer[7] i2=$abc$109383$new_n15206_ i3=$abc$109383$new_n15205_ q=$abc$109383$new_n15214_
-.subckt ao22_x2 i0=$abc$109383$new_n15214_ i1=$abc$109383$new_n15204_ i2=$abc$109383$new_n15194_ q=$abc$109383$new_n15215_
-.subckt ao22_x2 i0=$abc$109383$new_n15215_ i1=$abc$109383$new_n15213_ i2=$abc$109383$new_n15211_ q=soc.rom.$signal$7
+.subckt and4_x1 i0=$abc$109383$new_n15003_ i1=soc.rom.spimemio.xfer.obuffer[7] i2=$abc$109383$new_n15206_ i3=$abc$109383$new_n15205_ q=$abc$109383$new_n15214_
+.subckt and21nor_x1 i0=$abc$109383$new_n15214_ i1=$abc$109383$new_n15204_ i2=$abc$109383$new_n15194_ nq=$abc$109383$new_n15215_
+.subckt and21nor_x1 i0=$abc$109383$new_n15215_ i1=$abc$109383$new_n15213_ i2=$abc$109383$new_n15211_ nq=soc.rom.$signal$7
 .subckt nor2_x0 i0=soc.rom.spimemio.xfer.xfer_qspi i1=$abc$109383$new_n15205_ nq=$abc$109383$new_n15217_
 .subckt nand2_x0 i0=$abc$109383$new_n15217_ i1=soc.rom.spimemio.xfer.xfer_ddr nq=$abc$109383$new_n15218_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.obuffer[6] nq=$abc$109383$new_n15219_
 .subckt nand3_x0 i0=$abc$109383$new_n15219_ i1=$abc$109383$new_n15206_ i2=$abc$109383$new_n15205_ nq=$abc$109383$new_n15220_
-.subckt a3_x2 i0=$abc$109383$new_n15220_ i1=$abc$109383$new_n15218_ i2=$abc$109383$new_n15003_ q=$abc$109383$new_n15221_
-.subckt o4_x2 i0=soc.rom.spimemio.xfer.obuffer[7] i1=soc.rom.spimemio.xfer.xfer_ddr i2=soc.rom.spimemio.xfer.xfer_qspi i3=$abc$109383$new_n15205_ q=$abc$109383$new_n15222_
-.subckt ao22_x2 i0=$abc$109383$new_n15206_ i1=soc.rom.spimemio.xfer.obuffer[4] i2=$abc$109383$new_n15222_ q=$abc$109383$new_n15223_
-.subckt a2_x2 i0=$abc$109383$new_n15223_ i1=$abc$109383$new_n15221_ q=soc.rom.spimemio.xfer.flash_io0_do
-.subckt o2_x2 i0=soc.rom.spimemio.config_do[0] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n15225_
+.subckt and3_x1 i0=$abc$109383$new_n15220_ i1=$abc$109383$new_n15218_ i2=$abc$109383$new_n15003_ q=$abc$109383$new_n15221_
+.subckt or4_x1 i0=soc.rom.spimemio.xfer.obuffer[7] i1=soc.rom.spimemio.xfer.xfer_ddr i2=soc.rom.spimemio.xfer.xfer_qspi i3=$abc$109383$new_n15205_ q=$abc$109383$new_n15222_
+.subckt and21nor_x1 i0=$abc$109383$new_n15206_ i1=soc.rom.spimemio.xfer.obuffer[4] i2=$abc$109383$new_n15222_ nq=$abc$109383$new_n15223_
+.subckt and2_x1 i0=$abc$109383$new_n15223_ i1=$abc$109383$new_n15221_ q=soc.rom.spimemio.xfer.flash_io0_do
+.subckt or2_x1 i0=soc.rom.spimemio.config_do[0] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n15225_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer_io0_90 i1=$abc$109383$new_n15105_ nq=$abc$109383$new_n15226_
 .subckt nand2_x0 i0=$abc$109383$new_n15226_ i1=$abc$109383$new_n15210_ nq=$abc$109383$new_n15227_
-.subckt a3_x2 i0=$abc$109383$new_n15223_ i1=$abc$109383$new_n15221_ i2=$abc$109383$new_n15194_ q=$abc$109383$new_n15228_
-.subckt ao22_x2 i0=$abc$109383$new_n15228_ i1=$abc$109383$new_n15227_ i2=$abc$109383$new_n15225_ q=soc.rom.$signal$4
+.subckt and3_x1 i0=$abc$109383$new_n15223_ i1=$abc$109383$new_n15221_ i2=$abc$109383$new_n15194_ q=$abc$109383$new_n15228_
+.subckt and21nor_x1 i0=$abc$109383$new_n15228_ i1=$abc$109383$new_n15227_ i2=$abc$109383$new_n15225_ nq=soc.rom.$signal$4
 .subckt buf_x4 i=soc.rom.spimemio.xfer.flash_clk q=$abc$109383$new_n15230_
-.subckt mx2_x2 cmd=$abc$109383$new_n15210_ i0=soc.rom.spimemio.config_clk i1=$abc$109383$new_n15230_ q=soc.rom.$signal
-.subckt mx2_x2 cmd=$abc$109383$new_n15210_ i0=soc.rom.spimemio.config_csb i1=soc.rom.spimemio.xfer.flash_csb q=soc.rom.$signal$2
+.subckt mux2_x1 cmd=$abc$109383$new_n15210_ i0=soc.rom.spimemio.config_clk i1=$abc$109383$new_n15230_ q=soc.rom.$signal
+.subckt mux2_x1 cmd=$abc$109383$new_n15210_ i0=soc.rom.spimemio.config_csb i1=soc.rom.spimemio.xfer.flash_csb q=soc.rom.$signal$2
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[16] nq=$abc$109383$new_n15233_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[16] nq=$abc$109383$new_n15234_
-.subckt ao22_x2 i0=soc.cpu.minerva.d.valid$1 i1=soc.cpu.minerva.x.valid$1 i2=soc.cpu.minerva.loadstore.dbus__cyc q=$abc$109383$new_n15235_
-.subckt o2_x2 i0=soc.cpu.minerva.divider.fsm_state i1=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n15236_
+.subckt and21nor_x1 i0=soc.cpu.minerva.d.valid$1 i1=soc.cpu.minerva.x.valid$1 i2=soc.cpu.minerva.loadstore.dbus__cyc nq=$abc$109383$new_n15235_
+.subckt or2_x1 i0=soc.cpu.minerva.divider.fsm_state i1=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n15236_
 .subckt nor2_x0 i0=$abc$109383$new_n15236_ i1=$abc$109383$new_n15235_ nq=$abc$109383$new_n15237_
 .subckt inv_x0 i=soc.cpu.minerva.payload__mret$118 nq=$abc$109383$new_n15238_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__branch_target$109[0] i1=soc.cpu.minerva.payload__branch_target$109[1] i2=soc.cpu.minerva.payload__branch_taken q=$abc$109383$new_n15239_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__branch_target$109[0] i1=soc.cpu.minerva.payload__branch_target$109[1] i2=soc.cpu.minerva.payload__branch_taken nq=$abc$109383$new_n15239_
 .subckt buf_x4 i=$abc$109383$new_n15239_ q=$abc$109383$new_n15240_
-.subckt o2_x2 i0=soc.cpu.minerva.payload__ebreak$84 i1=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n15241_
+.subckt or2_x1 i0=soc.cpu.minerva.payload__ebreak$84 i1=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n15241_
 .subckt nor2_x0 i0=$abc$109383$new_n15241_ i1=$abc$109383$new_n15240_ nq=$abc$109383$new_n15242_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__loadstore_misaligned$80 i1=soc.cpu.minerva.payload__load$97 q=$abc$109383$new_n15243_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__loadstore_misaligned$80 i1=soc.cpu.minerva.payload__store$99 i2=soc.cpu.minerva.payload__ecall$82 q=$abc$109383$new_n15244_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__loadstore_misaligned$80 i1=soc.cpu.minerva.payload__load$97 q=$abc$109383$new_n15243_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__loadstore_misaligned$80 i1=soc.cpu.minerva.payload__store$99 i2=soc.cpu.minerva.payload__ecall$82 nq=$abc$109383$new_n15244_
 .subckt nor2_x0 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n15243_ nq=$abc$109383$new_n15245_
 .subckt buf_x4 i=$abc$109383$new_n15245_ q=$abc$109383$new_n15246_
 .subckt nand3_x0 i0=soc.cpu.minerva.exception.mstatus__r__mie i1=soc.cpu.minerva.exception.mip__r__meip i2=soc.cpu.minerva.exception.mie__r__meie nq=$abc$109383$new_n15247_
-.subckt a4_x2 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ i3=$abc$109383$new_n15238_ q=$abc$109383$new_n15248_
+.subckt and4_x1 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ i3=$abc$109383$new_n15238_ q=$abc$109383$new_n15248_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_predict_taken$110 nq=$abc$109383$new_n15249_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__branch_taken i1=$abc$109383$new_n15249_ nq=$abc$109383$new_n15250_
 .subckt inv_x1 i=soc.cpu.minerva.payload__branch_taken nq=$abc$109383$new_n15251_
@@ -528,7 +528,7 @@
 .subckt nand2_x0 i0=$abc$109383$new_n15253_ i1=soc.cpu.minerva.x.valid$1 nq=$abc$109383$new_n15254_
 .subckt buf_x4 i=$abc$109383$new_n15254_ q=$abc$109383$new_n15255_
 .subckt inv_x0 i=soc.cpu.minerva.x.valid$1 nq=$abc$109383$new_n15256_
-.subckt oa22_x2 i0=$abc$109383$new_n15250_ i1=$abc$109383$new_n15248_ i2=$abc$109383$new_n15256_ q=$abc$109383$new_n15257_
+.subckt or21nand_x1 i0=$abc$109383$new_n15250_ i1=$abc$109383$new_n15248_ i2=$abc$109383$new_n15256_ nq=$abc$109383$new_n15257_
 .subckt buf_x4 i=$abc$109383$new_n15257_ q=$abc$109383$new_n15258_
 .subckt nand3_x0 i0=$abc$109383$new_n15258_ i1=soc.cpu.minerva.payload__fence_i i2=soc.cpu.minerva.d.valid$1 nq=$abc$109383$new_n15259_
 .subckt nand3_x0 i0=$abc$109383$new_n15259_ i1=$abc$109383$new_n15255_ i2=soc.cpu.minerva.f.valid$1 nq=$abc$109383$new_n15260_
@@ -537,81 +537,81 @@
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[9] q=$abc$109383$new_n15263_
 .subckt inv_x1 i=soc.cpu.minerva.payload__instruction$28[4] nq=$abc$109383$new_n15264_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[2] q=$abc$109383$new_n15265_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__instruction$28[3] i1=$abc$109383$new_n15265_ q=$abc$109383$new_n15266_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__instruction$28[3] i1=$abc$109383$new_n15265_ q=$abc$109383$new_n15266_
 .subckt nand4_x0 i0=$abc$109383$new_n15266_ i1=$abc$109383$new_n15264_ i2=soc.cpu.minerva.payload__instruction$28[5] i3=soc.cpu.minerva.payload__instruction$28[6] nq=$abc$109383$new_n15267_
 .subckt nor3_x0 i0=soc.cpu.minerva.payload__instruction$28[4] i1=soc.cpu.minerva.payload__instruction$28[5] i2=soc.cpu.minerva.payload__instruction$28[6] nq=$abc$109383$new_n15268_
 .subckt nand2_x0 i0=$abc$109383$new_n15268_ i1=$abc$109383$new_n15266_ nq=$abc$109383$new_n15269_
-.subckt o4_x2 i0=soc.cpu.minerva.payload__instruction$28[5] i1=soc.cpu.minerva.payload__instruction$28[3] i2=soc.cpu.minerva.payload__instruction$28[2] i3=soc.cpu.minerva.payload__instruction$28[6] q=$abc$109383$new_n15270_
-.subckt a2_x2 i0=$abc$109383$new_n15270_ i1=$abc$109383$new_n15269_ q=$abc$109383$new_n15271_
+.subckt or4_x1 i0=soc.cpu.minerva.payload__instruction$28[5] i1=soc.cpu.minerva.payload__instruction$28[3] i2=soc.cpu.minerva.payload__instruction$28[2] i3=soc.cpu.minerva.payload__instruction$28[6] q=$abc$109383$new_n15270_
+.subckt and2_x1 i0=$abc$109383$new_n15270_ i1=$abc$109383$new_n15269_ q=$abc$109383$new_n15271_
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__instruction$28[3] i1=$abc$109383$new_n15265_ nq=$abc$109383$new_n15272_
 .subckt buf_x4 i=$abc$109383$new_n15272_ q=$abc$109383$new_n15273_
-.subckt a3_x2 i0=soc.cpu.minerva.payload__instruction$28[4] i1=soc.cpu.minerva.payload__instruction$28[5] i2=soc.cpu.minerva.payload__instruction$28[6] q=$abc$109383$new_n15274_
+.subckt and3_x1 i0=soc.cpu.minerva.payload__instruction$28[4] i1=soc.cpu.minerva.payload__instruction$28[5] i2=soc.cpu.minerva.payload__instruction$28[6] q=$abc$109383$new_n15274_
 .subckt nand2_x0 i0=$abc$109383$new_n15274_ i1=$abc$109383$new_n15273_ nq=$abc$109383$new_n15275_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[3] nq=$abc$109383$new_n15276_
 .subckt nand2_x0 i0=$abc$109383$new_n15276_ i1=$abc$109383$new_n15265_ nq=$abc$109383$new_n15277_
 .subckt nand3_x0 i0=$abc$109383$new_n15264_ i1=soc.cpu.minerva.payload__instruction$28[5] i2=soc.cpu.minerva.payload__instruction$28[6] nq=$abc$109383$new_n15278_
-.subckt ao22_x2 i0=$abc$109383$new_n15278_ i1=$abc$109383$new_n15277_ i2=$abc$109383$new_n15275_ q=$abc$109383$new_n15279_
+.subckt and21nor_x1 i0=$abc$109383$new_n15278_ i1=$abc$109383$new_n15277_ i2=$abc$109383$new_n15275_ nq=$abc$109383$new_n15279_
 .subckt buf_x4 i=$abc$109383$new_n15279_ q=$abc$109383$new_n15280_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[5] q=$abc$109383$new_n15281_
 .subckt nand3_x0 i0=$abc$109383$new_n15273_ i1=$abc$109383$new_n15264_ i2=$abc$109383$new_n15281_ nq=$abc$109383$new_n15282_
 .subckt nand4_x0 i0=$abc$109383$new_n15282_ i1=$abc$109383$new_n15280_ i2=$abc$109383$new_n15271_ i3=$abc$109383$new_n15267_ nq=$abc$109383$new_n15283_
 .subckt buf_x4 i=$abc$109383$new_n15283_ q=$abc$109383$new_n15284_
 .subckt buf_x4 i=$abc$109383$new_n15284_ q=$abc$109383$new_n15285_
-.subckt a2_x2 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15263_ q=$abc$109383$new_n15286_
-.subckt nxr2_x1 i0=$abc$109383$new_n15286_ i1=soc.cpu.minerva.payload__csr_adr$65[9] nq=$abc$109383$new_n15287_
+.subckt and2_x1 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15263_ q=$abc$109383$new_n15286_
+.subckt nexor2_x0 i0=$abc$109383$new_n15286_ i1=soc.cpu.minerva.payload__csr_adr$65[9] nq=$abc$109383$new_n15287_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[11] nq=$abc$109383$new_n15288_
 .subckt inv_x1 i=soc.cpu.minerva.csrf_rp__addr[11] nq=$abc$109383$new_n15289_
-.subckt oa22_x2 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15289_ q=$abc$109383$new_n15290_
+.subckt or21nand_x1 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15289_ nq=$abc$109383$new_n15290_
 .subckt buf_x4 i=$abc$109383$new_n15290_ q=$abc$109383$new_n15291_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[7] nq=$abc$109383$new_n15292_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[6] q=$abc$109383$new_n15293_
 .subckt buf_x4 i=$abc$109383$new_n15264_ q=$abc$109383$new_n15294_
 .subckt nand4_x0 i0=$abc$109383$new_n15273_ i1=$abc$109383$new_n15294_ i2=$abc$109383$new_n15281_ i3=$abc$109383$new_n15293_ nq=$abc$109383$new_n15295_
-.subckt o2_x2 i0=$abc$109383$new_n15295_ i1=$abc$109383$new_n15292_ q=$abc$109383$new_n15296_
-.subckt a4_x2 i0=$abc$109383$new_n15266_ i1=$abc$109383$new_n15294_ i2=$abc$109383$new_n15281_ i3=$abc$109383$new_n15293_ q=$abc$109383$new_n15297_
+.subckt or2_x1 i0=$abc$109383$new_n15295_ i1=$abc$109383$new_n15292_ q=$abc$109383$new_n15296_
+.subckt and4_x1 i0=$abc$109383$new_n15266_ i1=$abc$109383$new_n15294_ i2=$abc$109383$new_n15281_ i3=$abc$109383$new_n15293_ q=$abc$109383$new_n15297_
 .subckt nand2_x0 i0=$abc$109383$new_n15297_ i1=soc.cpu.minerva.csrf_rp__addr[0] nq=$abc$109383$new_n15298_
-.subckt a2_x2 i0=$abc$109383$new_n15298_ i1=$abc$109383$new_n15296_ q=$abc$109383$new_n15299_
+.subckt and2_x1 i0=$abc$109383$new_n15298_ i1=$abc$109383$new_n15296_ q=$abc$109383$new_n15299_
 .subckt nor3_x0 i0=soc.cpu.minerva.payload__instruction$28[3] i1=$abc$109383$new_n15265_ i2=$abc$109383$new_n15293_ nq=$abc$109383$new_n15300_
 .subckt nand4_x0 i0=$abc$109383$new_n15300_ i1=soc.cpu.minerva.csrf_rp__addr[11] i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15281_ nq=$abc$109383$new_n15301_
-.subckt a3_x2 i0=$abc$109383$new_n15301_ i1=$abc$109383$new_n15299_ i2=$abc$109383$new_n15291_ q=$abc$109383$new_n15302_
+.subckt and3_x1 i0=$abc$109383$new_n15301_ i1=$abc$109383$new_n15299_ i2=$abc$109383$new_n15291_ q=$abc$109383$new_n15302_
 .subckt buf_x4 i=$abc$109383$new_n15302_ q=$abc$109383$new_n15303_
-.subckt nxr2_x1 i0=$abc$109383$new_n15303_ i1=$abc$109383$new_n15288_ nq=$abc$109383$new_n15304_
-.subckt a2_x2 i0=$abc$109383$new_n15285_ i1=soc.cpu.minerva.csrf_rp__addr[7] q=$abc$109383$new_n15305_
-.subckt nxr2_x1 i0=$abc$109383$new_n15305_ i1=soc.cpu.minerva.payload__csr_adr$65[7] nq=$abc$109383$new_n15306_
-.subckt a2_x2 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.csrf_rp__addr[6] q=$abc$109383$new_n15307_
-.subckt nxr2_x1 i0=$abc$109383$new_n15307_ i1=soc.cpu.minerva.payload__csr_adr$65[6] nq=$abc$109383$new_n15308_
-.subckt a2_x2 i0=$abc$109383$new_n15308_ i1=$abc$109383$new_n15306_ q=$abc$109383$new_n15309_
+.subckt nexor2_x0 i0=$abc$109383$new_n15303_ i1=$abc$109383$new_n15288_ nq=$abc$109383$new_n15304_
+.subckt and2_x1 i0=$abc$109383$new_n15285_ i1=soc.cpu.minerva.csrf_rp__addr[7] q=$abc$109383$new_n15305_
+.subckt nexor2_x0 i0=$abc$109383$new_n15305_ i1=soc.cpu.minerva.payload__csr_adr$65[7] nq=$abc$109383$new_n15306_
+.subckt and2_x1 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.csrf_rp__addr[6] q=$abc$109383$new_n15307_
+.subckt nexor2_x0 i0=$abc$109383$new_n15307_ i1=soc.cpu.minerva.payload__csr_adr$65[6] nq=$abc$109383$new_n15308_
+.subckt and2_x1 i0=$abc$109383$new_n15308_ i1=$abc$109383$new_n15306_ q=$abc$109383$new_n15309_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[4] nq=$abc$109383$new_n15310_
-.subckt a4_x2 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[11] i2=$abc$109383$new_n15264_ i3=$abc$109383$new_n15281_ q=$abc$109383$new_n15311_
+.subckt and4_x1 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[11] i2=$abc$109383$new_n15264_ i3=$abc$109383$new_n15281_ q=$abc$109383$new_n15311_
 .subckt nand3_x0 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15267_ nq=$abc$109383$new_n15312_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[4] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n15311_ q=$abc$109383$new_n15313_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[4] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n15311_ nq=$abc$109383$new_n15313_
 .subckt nand2_x0 i0=$abc$109383$new_n15313_ i1=$abc$109383$new_n15310_ nq=$abc$109383$new_n15314_
 .subckt nand4_x0 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[11] i2=$abc$109383$new_n15264_ i3=$abc$109383$new_n15281_ nq=$abc$109383$new_n15315_
-.subckt a3_x2 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15267_ q=$abc$109383$new_n15316_
+.subckt and3_x1 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15267_ q=$abc$109383$new_n15316_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[4] nq=$abc$109383$new_n15317_
-.subckt ao22_x2 i0=$abc$109383$new_n15317_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15315_ q=$abc$109383$new_n15318_
+.subckt and21nor_x1 i0=$abc$109383$new_n15317_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15315_ nq=$abc$109383$new_n15318_
 .subckt buf_x4 i=$abc$109383$new_n15318_ q=$abc$109383$new_n15319_
 .subckt nand2_x0 i0=$abc$109383$new_n15319_ i1=soc.cpu.minerva.payload__csr_adr$65[4] nq=$abc$109383$new_n15320_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[5] q=$abc$109383$new_n15321_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[5] nq=$abc$109383$new_n15322_
 .subckt buf_x4 i=$abc$109383$new_n15285_ q=$abc$109383$new_n15323_
 .subckt nand3_x0 i0=$abc$109383$new_n15323_ i1=$abc$109383$new_n15322_ i2=$abc$109383$new_n15321_ nq=$abc$109383$new_n15324_
-.subckt oa22_x2 i0=$abc$109383$new_n15321_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n15322_ q=$abc$109383$new_n15325_
-.subckt a4_x2 i0=$abc$109383$new_n15325_ i1=$abc$109383$new_n15324_ i2=$abc$109383$new_n15320_ i3=$abc$109383$new_n15314_ q=$abc$109383$new_n15326_
-.subckt a4_x2 i0=$abc$109383$new_n15326_ i1=$abc$109383$new_n15309_ i2=$abc$109383$new_n15304_ i3=$abc$109383$new_n15287_ q=$abc$109383$new_n15327_
+.subckt or21nand_x1 i0=$abc$109383$new_n15321_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n15322_ nq=$abc$109383$new_n15325_
+.subckt and4_x1 i0=$abc$109383$new_n15325_ i1=$abc$109383$new_n15324_ i2=$abc$109383$new_n15320_ i3=$abc$109383$new_n15314_ q=$abc$109383$new_n15326_
+.subckt and4_x1 i0=$abc$109383$new_n15326_ i1=$abc$109383$new_n15309_ i2=$abc$109383$new_n15304_ i3=$abc$109383$new_n15287_ q=$abc$109383$new_n15327_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$62[1] nq=$abc$109383$new_n15328_
 .subckt buf_x4 i=$abc$109383$new_n15281_ q=$abc$109383$new_n15329_
 .subckt buf_x4 i=$abc$109383$new_n15273_ q=$abc$109383$new_n15330_
 .subckt nand4_x0 i0=$abc$109383$new_n15330_ i1=soc.cpu.minerva.payload__instruction$28[8] i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15329_ nq=$abc$109383$new_n15331_
 .subckt inv_x1 i=soc.cpu.minerva.csrf_rp__addr[1] nq=$abc$109383$new_n15332_
-.subckt ao22_x2 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15331_ q=$abc$109383$new_n15333_
-.subckt nxr2_x1 i0=$abc$109383$new_n15333_ i1=$abc$109383$new_n15328_ nq=$abc$109383$new_n15334_
+.subckt and21nor_x1 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15331_ nq=$abc$109383$new_n15333_
+.subckt nexor2_x0 i0=$abc$109383$new_n15333_ i1=$abc$109383$new_n15328_ nq=$abc$109383$new_n15334_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[3] nq=$abc$109383$new_n15335_
 .subckt nand4_x0 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[10] i2=$abc$109383$new_n15264_ i3=$abc$109383$new_n15281_ nq=$abc$109383$new_n15336_
 .subckt inv_x1 i=soc.cpu.minerva.csrf_rp__addr[3] nq=$abc$109383$new_n15337_
-.subckt ao22_x2 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15336_ q=$abc$109383$new_n15338_
+.subckt and21nor_x1 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15336_ nq=$abc$109383$new_n15338_
 .subckt buf_x4 i=$abc$109383$new_n15338_ q=$abc$109383$new_n15339_
-.subckt nxr2_x1 i0=$abc$109383$new_n15339_ i1=$abc$109383$new_n15335_ nq=$abc$109383$new_n15340_
+.subckt nexor2_x0 i0=$abc$109383$new_n15339_ i1=$abc$109383$new_n15335_ nq=$abc$109383$new_n15340_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[11] q=$abc$109383$new_n15341_
 .subckt nand4_x0 i0=$abc$109383$new_n15273_ i1=$abc$109383$new_n15341_ i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15281_ nq=$abc$109383$new_n15342_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[15] nq=$abc$109383$new_n15343_
@@ -619,201 +619,201 @@
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[6] nq=$abc$109383$new_n15345_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[4] q=$abc$109383$new_n15346_
 .subckt nand4_x0 i0=$abc$109383$new_n15346_ i1=$abc$109383$new_n15276_ i2=$abc$109383$new_n15265_ i3=$abc$109383$new_n15345_ nq=$abc$109383$new_n15347_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15343_ q=$abc$109383$new_n15348_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15343_ nq=$abc$109383$new_n15348_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[14] q=$abc$109383$new_n15349_
 .subckt nor3_x0 i0=soc.cpu.minerva.payload__instruction$28[12] i1=soc.cpu.minerva.payload__instruction$28[13] i2=$abc$109383$new_n15349_ nq=$abc$109383$new_n15350_
-.subckt oa22_x2 i0=$abc$109383$new_n15344_ i1=$abc$109383$new_n15347_ i2=$abc$109383$new_n15350_ q=$abc$109383$new_n15351_
-.subckt a4_x2 i0=$abc$109383$new_n15351_ i1=$abc$109383$new_n15348_ i2=$abc$109383$new_n15342_ i3=$abc$109383$new_n15291_ q=$abc$109383$new_n15352_
-.subckt a2_x2 i0=$abc$109383$new_n15346_ i1=$abc$109383$new_n15329_ q=$abc$109383$new_n15353_
-.subckt o2_x2 i0=soc.cpu.minerva.payload__instruction$28[12] i1=soc.cpu.minerva.payload__instruction$28[13] q=$abc$109383$new_n15354_
-.subckt a4_x2 i0=$abc$109383$new_n15354_ i1=$abc$109383$new_n15353_ i2=$abc$109383$new_n15330_ i3=$abc$109383$new_n15293_ q=$abc$109383$new_n15355_
-.subckt a2_x2 i0=$abc$109383$new_n15355_ i1=$abc$109383$new_n15352_ q=$abc$109383$new_n15356_
-.subckt a3_x2 i0=$abc$109383$new_n15356_ i1=$abc$109383$new_n15340_ i2=$abc$109383$new_n15334_ q=$abc$109383$new_n15357_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__instruction$28[4] i1=$abc$109383$new_n15276_ i2=$abc$109383$new_n15265_ i3=$abc$109383$new_n15345_ q=$abc$109383$new_n15358_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[19] q=$abc$109383$new_n15359_
+.subckt or21nand_x1 i0=$abc$109383$new_n15344_ i1=$abc$109383$new_n15347_ i2=$abc$109383$new_n15350_ nq=$abc$109383$new_n15351_
+.subckt and4_x1 i0=$abc$109383$new_n15351_ i1=$abc$109383$new_n15348_ i2=$abc$109383$new_n15342_ i3=$abc$109383$new_n15291_ q=$abc$109383$new_n15352_
+.subckt and2_x1 i0=$abc$109383$new_n15346_ i1=$abc$109383$new_n15329_ q=$abc$109383$new_n15353_
+.subckt or2_x1 i0=soc.cpu.minerva.payload__instruction$28[12] i1=soc.cpu.minerva.payload__instruction$28[13] q=$abc$109383$new_n15354_
+.subckt and4_x1 i0=$abc$109383$new_n15354_ i1=$abc$109383$new_n15353_ i2=$abc$109383$new_n15330_ i3=$abc$109383$new_n15293_ q=$abc$109383$new_n15355_
+.subckt and2_x1 i0=$abc$109383$new_n15355_ i1=$abc$109383$new_n15352_ q=$abc$109383$new_n15356_
+.subckt and3_x1 i0=$abc$109383$new_n15356_ i1=$abc$109383$new_n15340_ i2=$abc$109383$new_n15334_ q=$abc$109383$new_n15357_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__instruction$28[4] i1=$abc$109383$new_n15276_ i2=$abc$109383$new_n15265_ i3=$abc$109383$new_n15345_ q=$abc$109383$new_n15358_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n15359_
 .subckt nand3_x0 i0=$abc$109383$new_n15282_ i1=$abc$109383$new_n15280_ i2=$abc$109383$new_n15271_ nq=$abc$109383$new_n15360_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n15359_ q=$abc$109383$new_n15361_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[17] q=$abc$109383$new_n15362_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n15362_ q=$abc$109383$new_n15363_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n15359_ nq=$abc$109383$new_n15361_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n15362_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n15362_ nq=$abc$109383$new_n15363_
 .subckt buf_x4 i=$abc$109383$new_n15347_ q=$abc$109383$new_n15364_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[10] nq=$abc$109383$new_n15365_
-.subckt oa22_x2 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n15365_ i2=$abc$109383$new_n15364_ q=$abc$109383$new_n15366_
+.subckt or21nand_x1 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n15365_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15366_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[7] nq=$abc$109383$new_n15367_
-.subckt oa22_x2 i0=$abc$109383$new_n15317_ i1=$abc$109383$new_n15367_ i2=$abc$109383$new_n15364_ q=$abc$109383$new_n15368_
+.subckt or21nand_x1 i0=$abc$109383$new_n15317_ i1=$abc$109383$new_n15367_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15368_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[6] nq=$abc$109383$new_n15369_
 .subckt inv_x0 i=$abc$109383$new_n15321_ nq=$abc$109383$new_n15370_
-.subckt oa22_x2 i0=$abc$109383$new_n15370_ i1=$abc$109383$new_n15369_ i2=$abc$109383$new_n15364_ q=$abc$109383$new_n15371_
-.subckt a3_x2 i0=$abc$109383$new_n15371_ i1=$abc$109383$new_n15368_ i2=$abc$109383$new_n15366_ q=$abc$109383$new_n15372_
+.subckt or21nand_x1 i0=$abc$109383$new_n15370_ i1=$abc$109383$new_n15369_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15371_
+.subckt and3_x1 i0=$abc$109383$new_n15371_ i1=$abc$109383$new_n15368_ i2=$abc$109383$new_n15366_ q=$abc$109383$new_n15372_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[18] nq=$abc$109383$new_n15373_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15373_ q=$abc$109383$new_n15374_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15233_ q=$abc$109383$new_n15375_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15373_ nq=$abc$109383$new_n15374_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15233_ nq=$abc$109383$new_n15375_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[8] nq=$abc$109383$new_n15376_
-.subckt oa22_x2 i0=$abc$109383$new_n15376_ i1=$abc$109383$new_n15289_ i2=$abc$109383$new_n15364_ q=$abc$109383$new_n15377_
+.subckt or21nand_x1 i0=$abc$109383$new_n15376_ i1=$abc$109383$new_n15289_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15377_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[2] nq=$abc$109383$new_n15378_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[0] nq=$abc$109383$new_n15379_
-.subckt oa22_x2 i0=$abc$109383$new_n15379_ i1=$abc$109383$new_n15378_ i2=$abc$109383$new_n15364_ q=$abc$109383$new_n15380_
-.subckt a4_x2 i0=$abc$109383$new_n15380_ i1=$abc$109383$new_n15377_ i2=$abc$109383$new_n15375_ i3=$abc$109383$new_n15374_ q=$abc$109383$new_n15381_
+.subckt or21nand_x1 i0=$abc$109383$new_n15379_ i1=$abc$109383$new_n15378_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15380_
+.subckt and4_x1 i0=$abc$109383$new_n15380_ i1=$abc$109383$new_n15377_ i2=$abc$109383$new_n15375_ i3=$abc$109383$new_n15374_ q=$abc$109383$new_n15381_
 .subckt nand2_x0 i0=$abc$109383$new_n15381_ i1=$abc$109383$new_n15372_ nq=$abc$109383$new_n15382_
 .subckt nor3_x0 i0=$abc$109383$new_n15382_ i1=$abc$109383$new_n15363_ i2=$abc$109383$new_n15361_ nq=$abc$109383$new_n15383_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[3] q=$abc$109383$new_n15384_
 .subckt buf_x4 i=$abc$109383$new_n15358_ q=$abc$109383$new_n15385_
 .subckt nand2_x0 i0=$abc$109383$new_n15385_ i1=$abc$109383$new_n15384_ nq=$abc$109383$new_n15386_
-.subckt a4_x2 i0=$abc$109383$new_n15282_ i1=$abc$109383$new_n15280_ i2=$abc$109383$new_n15271_ i3=$abc$109383$new_n15344_ q=$abc$109383$new_n15387_
-.subckt ao22_x2 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15387_ i2=$abc$109383$new_n15386_ q=$abc$109383$new_n15388_
+.subckt and4_x1 i0=$abc$109383$new_n15282_ i1=$abc$109383$new_n15280_ i2=$abc$109383$new_n15271_ i3=$abc$109383$new_n15344_ q=$abc$109383$new_n15387_
+.subckt and21nor_x1 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15387_ i2=$abc$109383$new_n15386_ nq=$abc$109383$new_n15388_
 .subckt nand2_x0 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[9] nq=$abc$109383$new_n15389_
 .subckt buf_x4 i=$abc$109383$new_n15387_ q=$abc$109383$new_n15390_
-.subckt ao22_x2 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n15389_ q=$abc$109383$new_n15391_
-.subckt a2_x2 i0=$abc$109383$new_n15391_ i1=$abc$109383$new_n15388_ q=$abc$109383$new_n15392_
-.subckt a2_x2 i0=$abc$109383$new_n15285_ i1=soc.cpu.minerva.csrf_rp__addr[8] q=$abc$109383$new_n15393_
-.subckt nxr2_x1 i0=$abc$109383$new_n15393_ i1=soc.cpu.minerva.payload__csr_adr$65[8] nq=$abc$109383$new_n15394_
-.subckt a2_x2 i0=$abc$109383$new_n15285_ i1=soc.cpu.minerva.csrf_rp__addr[10] q=$abc$109383$new_n15395_
-.subckt nxr2_x1 i0=$abc$109383$new_n15395_ i1=soc.cpu.minerva.payload__csr_adr$65[10] nq=$abc$109383$new_n15396_
-.subckt a2_x2 i0=$abc$109383$new_n15396_ i1=$abc$109383$new_n15394_ q=$abc$109383$new_n15397_
+.subckt and21nor_x1 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n15389_ nq=$abc$109383$new_n15391_
+.subckt and2_x1 i0=$abc$109383$new_n15391_ i1=$abc$109383$new_n15388_ q=$abc$109383$new_n15392_
+.subckt and2_x1 i0=$abc$109383$new_n15285_ i1=soc.cpu.minerva.csrf_rp__addr[8] q=$abc$109383$new_n15393_
+.subckt nexor2_x0 i0=$abc$109383$new_n15393_ i1=soc.cpu.minerva.payload__csr_adr$65[8] nq=$abc$109383$new_n15394_
+.subckt and2_x1 i0=$abc$109383$new_n15285_ i1=soc.cpu.minerva.csrf_rp__addr[10] q=$abc$109383$new_n15395_
+.subckt nexor2_x0 i0=$abc$109383$new_n15395_ i1=soc.cpu.minerva.payload__csr_adr$65[10] nq=$abc$109383$new_n15396_
+.subckt and2_x1 i0=$abc$109383$new_n15396_ i1=$abc$109383$new_n15394_ q=$abc$109383$new_n15397_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[2] nq=$abc$109383$new_n15398_
 .subckt nand4_x0 i0=$abc$109383$new_n15330_ i1=soc.cpu.minerva.payload__instruction$28[9] i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15281_ nq=$abc$109383$new_n15399_
-.subckt ao22_x2 i0=$abc$109383$new_n15378_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15399_ q=$abc$109383$new_n15400_
-.subckt nxr2_x1 i0=$abc$109383$new_n15400_ i1=$abc$109383$new_n15398_ nq=$abc$109383$new_n15401_
-.subckt oa22_x2 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15379_ q=$abc$109383$new_n15402_
+.subckt and21nor_x1 i0=$abc$109383$new_n15378_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15399_ nq=$abc$109383$new_n15400_
+.subckt nexor2_x0 i0=$abc$109383$new_n15400_ i1=$abc$109383$new_n15398_ nq=$abc$109383$new_n15401_
+.subckt or21nand_x1 i0=$abc$109383$new_n15280_ i1=$abc$109383$new_n15271_ i2=$abc$109383$new_n15379_ nq=$abc$109383$new_n15402_
 .subckt nand4_x0 i0=$abc$109383$new_n15300_ i1=soc.cpu.minerva.payload__instruction$28[7] i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15329_ nq=$abc$109383$new_n15403_
-.subckt oa22_x2 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ i2=soc.cpu.minerva.payload__branch_target$62[0] q=$abc$109383$new_n15404_
+.subckt or21nand_x1 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ i2=soc.cpu.minerva.payload__branch_target$62[0] nq=$abc$109383$new_n15404_
 .subckt nand3_x0 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ i2=soc.cpu.minerva.payload__branch_target$62[0] nq=$abc$109383$new_n15405_
-.subckt a3_x2 i0=$abc$109383$new_n15405_ i1=$abc$109383$new_n15404_ i2=soc.cpu.minerva.payload__csr_we$66 q=$abc$109383$new_n15406_
-.subckt a2_x2 i0=$abc$109383$new_n15406_ i1=$abc$109383$new_n15401_ q=$abc$109383$new_n15407_
-.subckt a4_x2 i0=$abc$109383$new_n15407_ i1=$abc$109383$new_n15397_ i2=$abc$109383$new_n15392_ i3=$abc$109383$new_n15383_ q=$abc$109383$new_n15408_
+.subckt and3_x1 i0=$abc$109383$new_n15405_ i1=$abc$109383$new_n15404_ i2=soc.cpu.minerva.payload__csr_we$66 q=$abc$109383$new_n15406_
+.subckt and2_x1 i0=$abc$109383$new_n15406_ i1=$abc$109383$new_n15401_ q=$abc$109383$new_n15407_
+.subckt and4_x1 i0=$abc$109383$new_n15407_ i1=$abc$109383$new_n15397_ i2=$abc$109383$new_n15392_ i3=$abc$109383$new_n15383_ q=$abc$109383$new_n15408_
 .subckt nand3_x0 i0=$abc$109383$new_n15408_ i1=$abc$109383$new_n15357_ i2=$abc$109383$new_n15327_ nq=$abc$109383$new_n15409_
 .subckt buf_x4 i=$abc$109383$new_n15344_ q=$abc$109383$new_n15410_
 .subckt nand2_x0 i0=$abc$109383$new_n15364_ i1=$abc$109383$new_n15410_ nq=$abc$109383$new_n15411_
 .subckt inv_x0 i=soc.cpu.minerva.payload__rd_we$42 nq=$abc$109383$new_n15412_
 .subckt nor4_x0 i0=soc.cpu.minerva.payload__instruction$34[11] i1=soc.cpu.minerva.payload__instruction$34[10] i2=soc.cpu.minerva.payload__instruction$34[7] i3=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n15413_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[9] nq=$abc$109383$new_n15414_
-.subckt oa22_x2 i0=$abc$109383$new_n15414_ i1=$abc$109383$new_n15413_ i2=$abc$109383$new_n15412_ q=$abc$109383$new_n15415_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$28[17] i1=soc.cpu.minerva.payload__instruction$34[9] nq=$abc$109383$new_n15416_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$28[16] i1=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n15417_
-.subckt a2_x2 i0=$abc$109383$new_n15417_ i1=$abc$109383$new_n15416_ q=$abc$109383$new_n15418_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$28[18] i1=soc.cpu.minerva.payload__instruction$34[10] nq=$abc$109383$new_n15419_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$28[19] i1=soc.cpu.minerva.payload__instruction$34[11] nq=$abc$109383$new_n15420_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$28[15] i1=soc.cpu.minerva.payload__instruction$34[7] nq=$abc$109383$new_n15421_
-.subckt a3_x2 i0=$abc$109383$new_n15421_ i1=$abc$109383$new_n15420_ i2=$abc$109383$new_n15419_ q=$abc$109383$new_n15422_
+.subckt or21nand_x1 i0=$abc$109383$new_n15414_ i1=$abc$109383$new_n15413_ i2=$abc$109383$new_n15412_ nq=$abc$109383$new_n15415_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$28[17] i1=soc.cpu.minerva.payload__instruction$34[9] nq=$abc$109383$new_n15416_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$28[16] i1=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n15417_
+.subckt and2_x1 i0=$abc$109383$new_n15417_ i1=$abc$109383$new_n15416_ q=$abc$109383$new_n15418_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$28[18] i1=soc.cpu.minerva.payload__instruction$34[10] nq=$abc$109383$new_n15419_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$28[19] i1=soc.cpu.minerva.payload__instruction$34[11] nq=$abc$109383$new_n15420_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$28[15] i1=soc.cpu.minerva.payload__instruction$34[7] nq=$abc$109383$new_n15421_
+.subckt and3_x1 i0=$abc$109383$new_n15421_ i1=$abc$109383$new_n15420_ i2=$abc$109383$new_n15419_ q=$abc$109383$new_n15422_
 .subckt nand2_x0 i0=$abc$109383$new_n15422_ i1=$abc$109383$new_n15418_ nq=$abc$109383$new_n15423_
-.subckt o3_x2 i0=$abc$109383$new_n15423_ i1=$abc$109383$new_n15415_ i2=$abc$109383$new_n15411_ q=$abc$109383$new_n15424_
+.subckt or3_x1 i0=$abc$109383$new_n15423_ i1=$abc$109383$new_n15415_ i2=$abc$109383$new_n15411_ q=$abc$109383$new_n15424_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[0] q=$abc$109383$new_n15425_
-.subckt xr2_x1 i0=$abc$109383$new_n15425_ i1=soc.cpu.minerva.payload__instruction$34[7] q=$abc$109383$new_n15426_
-.subckt nxr2_x1 i0=$abc$109383$new_n15384_ i1=soc.cpu.minerva.payload__instruction$34[10] nq=$abc$109383$new_n15427_
-.subckt nxr2_x1 i0=soc.cpu.minerva.csrf_rp__addr[2] i1=soc.cpu.minerva.payload__instruction$34[9] nq=$abc$109383$new_n15428_
+.subckt xor2_x0 i0=$abc$109383$new_n15425_ i1=soc.cpu.minerva.payload__instruction$34[7] q=$abc$109383$new_n15426_
+.subckt nexor2_x0 i0=$abc$109383$new_n15384_ i1=soc.cpu.minerva.payload__instruction$34[10] nq=$abc$109383$new_n15427_
+.subckt nexor2_x0 i0=soc.cpu.minerva.csrf_rp__addr[2] i1=soc.cpu.minerva.payload__instruction$34[9] nq=$abc$109383$new_n15428_
 .subckt nand2_x0 i0=$abc$109383$new_n15428_ i1=$abc$109383$new_n15427_ nq=$abc$109383$new_n15429_
-.subckt nxr2_x1 i0=soc.cpu.minerva.csrf_rp__addr[1] i1=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n15430_
-.subckt nxr2_x1 i0=soc.cpu.minerva.csrf_rp__addr[4] i1=soc.cpu.minerva.payload__instruction$34[11] nq=$abc$109383$new_n15431_
+.subckt nexor2_x0 i0=soc.cpu.minerva.csrf_rp__addr[1] i1=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n15430_
+.subckt nexor2_x0 i0=soc.cpu.minerva.csrf_rp__addr[4] i1=soc.cpu.minerva.payload__instruction$34[11] nq=$abc$109383$new_n15431_
 .subckt nand2_x0 i0=$abc$109383$new_n15431_ i1=$abc$109383$new_n15430_ nq=$abc$109383$new_n15432_
 .subckt nor4_x0 i0=$abc$109383$new_n15432_ i1=$abc$109383$new_n15429_ i2=$abc$109383$new_n15426_ i3=$abc$109383$new_n15415_ nq=$abc$109383$new_n15433_
 .subckt nand3_x0 i0=$abc$109383$new_n15433_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15434_
-.subckt a2_x2 i0=$abc$109383$new_n15434_ i1=$abc$109383$new_n15424_ q=$abc$109383$new_n15435_
-.subckt oa22_x2 i0=$abc$109383$new_n15435_ i1=$abc$109383$new_n15409_ i2=$abc$109383$new_n15262_ q=$abc$109383$new_n15436_
+.subckt and2_x1 i0=$abc$109383$new_n15434_ i1=$abc$109383$new_n15424_ q=$abc$109383$new_n15435_
+.subckt or21nand_x1 i0=$abc$109383$new_n15435_ i1=$abc$109383$new_n15409_ i2=$abc$109383$new_n15262_ nq=$abc$109383$new_n15436_
 .subckt inv_x0 i=soc.cpu.minerva.payload__bypass_m$90 nq=$abc$109383$new_n15437_
 .subckt nand2_x0 i0=$abc$109383$new_n15437_ i1=soc.cpu.minerva.x.valid$1 nq=$abc$109383$new_n15438_
 .subckt nand2_x0 i0=$abc$109383$new_n15392_ i1=$abc$109383$new_n15383_ nq=$abc$109383$new_n15439_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[3] nq=$abc$109383$new_n15440_
-.subckt nxr2_x1 i0=$abc$109383$new_n15339_ i1=$abc$109383$new_n15440_ nq=$abc$109383$new_n15441_
+.subckt nexor2_x0 i0=$abc$109383$new_n15339_ i1=$abc$109383$new_n15440_ nq=$abc$109383$new_n15441_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[2] nq=$abc$109383$new_n15442_
-.subckt nxr2_x1 i0=$abc$109383$new_n15400_ i1=$abc$109383$new_n15442_ nq=$abc$109383$new_n15443_
-.subckt a2_x2 i0=$abc$109383$new_n15443_ i1=$abc$109383$new_n15441_ q=$abc$109383$new_n15444_
-.subckt ao22_x2 i0=$abc$109383$new_n15376_ i1=$abc$109383$new_n15387_ i2=soc.cpu.minerva.payload__csr_adr$114[8] q=$abc$109383$new_n15445_
+.subckt nexor2_x0 i0=$abc$109383$new_n15400_ i1=$abc$109383$new_n15442_ nq=$abc$109383$new_n15443_
+.subckt and2_x1 i0=$abc$109383$new_n15443_ i1=$abc$109383$new_n15441_ q=$abc$109383$new_n15444_
+.subckt and21nor_x1 i0=$abc$109383$new_n15376_ i1=$abc$109383$new_n15387_ i2=soc.cpu.minerva.payload__csr_adr$114[8] nq=$abc$109383$new_n15445_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[9] nq=$abc$109383$new_n15446_
-.subckt a3_x2 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15446_ i2=soc.cpu.minerva.csrf_rp__addr[9] q=$abc$109383$new_n15447_
+.subckt and3_x1 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15446_ i2=soc.cpu.minerva.csrf_rp__addr[9] q=$abc$109383$new_n15447_
 .subckt inv_x0 i=soc.cpu.minerva.csrf_rp__addr[9] nq=$abc$109383$new_n15448_
-.subckt ao22_x2 i0=$abc$109383$new_n15448_ i1=$abc$109383$new_n15387_ i2=soc.cpu.minerva.payload__csr_adr$114[9] q=$abc$109383$new_n15449_
+.subckt and21nor_x1 i0=$abc$109383$new_n15448_ i1=$abc$109383$new_n15387_ i2=soc.cpu.minerva.payload__csr_adr$114[9] nq=$abc$109383$new_n15449_
 .subckt nor3_x0 i0=$abc$109383$new_n15449_ i1=$abc$109383$new_n15447_ i2=$abc$109383$new_n15445_ nq=$abc$109383$new_n15450_
 .subckt nand2_x0 i0=$abc$109383$new_n15333_ i1=soc.cpu.minerva.payload__csr_adr$114[1] nq=$abc$109383$new_n15451_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[7] nq=$abc$109383$new_n15452_
 .subckt nand3_x0 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15452_ i2=soc.cpu.minerva.csrf_rp__addr[7] nq=$abc$109383$new_n15453_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[4] nq=$abc$109383$new_n15454_
-.subckt nxr2_x1 i0=$abc$109383$new_n15319_ i1=$abc$109383$new_n15454_ nq=$abc$109383$new_n15455_
-.subckt a3_x2 i0=$abc$109383$new_n15455_ i1=$abc$109383$new_n15453_ i2=$abc$109383$new_n15451_ q=$abc$109383$new_n15456_
+.subckt nexor2_x0 i0=$abc$109383$new_n15319_ i1=$abc$109383$new_n15454_ nq=$abc$109383$new_n15455_
+.subckt and3_x1 i0=$abc$109383$new_n15455_ i1=$abc$109383$new_n15453_ i2=$abc$109383$new_n15451_ q=$abc$109383$new_n15456_
 .subckt nand3_x0 i0=$abc$109383$new_n15456_ i1=$abc$109383$new_n15450_ i2=$abc$109383$new_n15444_ nq=$abc$109383$new_n15457_
-.subckt oa22_x2 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ i2=soc.cpu.minerva.payload__csr_adr$114[0] q=$abc$109383$new_n15458_
-.subckt a2_x2 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15321_ q=$abc$109383$new_n15459_
-.subckt nxr2_x1 i0=$abc$109383$new_n15459_ i1=soc.cpu.minerva.payload__csr_adr$114[5] nq=$abc$109383$new_n15460_
+.subckt or21nand_x1 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ i2=soc.cpu.minerva.payload__csr_adr$114[0] nq=$abc$109383$new_n15458_
+.subckt and2_x1 i0=$abc$109383$new_n15285_ i1=$abc$109383$new_n15321_ q=$abc$109383$new_n15459_
+.subckt nexor2_x0 i0=$abc$109383$new_n15459_ i1=soc.cpu.minerva.payload__csr_adr$114[5] nq=$abc$109383$new_n15460_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[11] nq=$abc$109383$new_n15461_
-.subckt nxr2_x1 i0=$abc$109383$new_n15303_ i1=$abc$109383$new_n15461_ nq=$abc$109383$new_n15462_
-.subckt nxr2_x1 i0=$abc$109383$new_n15307_ i1=soc.cpu.minerva.payload__csr_adr$114[6] nq=$abc$109383$new_n15463_
-.subckt nxr2_x1 i0=$abc$109383$new_n15395_ i1=soc.cpu.minerva.payload__csr_adr$114[10] nq=$abc$109383$new_n15464_
-.subckt a3_x2 i0=$abc$109383$new_n15464_ i1=$abc$109383$new_n15463_ i2=$abc$109383$new_n15352_ q=$abc$109383$new_n15465_
+.subckt nexor2_x0 i0=$abc$109383$new_n15303_ i1=$abc$109383$new_n15461_ nq=$abc$109383$new_n15462_
+.subckt nexor2_x0 i0=$abc$109383$new_n15307_ i1=soc.cpu.minerva.payload__csr_adr$114[6] nq=$abc$109383$new_n15463_
+.subckt nexor2_x0 i0=$abc$109383$new_n15395_ i1=soc.cpu.minerva.payload__csr_adr$114[10] nq=$abc$109383$new_n15464_
+.subckt and3_x1 i0=$abc$109383$new_n15464_ i1=$abc$109383$new_n15463_ i2=$abc$109383$new_n15352_ q=$abc$109383$new_n15465_
 .subckt nand4_x0 i0=$abc$109383$new_n15465_ i1=$abc$109383$new_n15462_ i2=$abc$109383$new_n15460_ i3=$abc$109383$new_n15458_ nq=$abc$109383$new_n15466_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[7] q=$abc$109383$new_n15467_
-.subckt oa22_x2 i0=$abc$109383$new_n15467_ i1=$abc$109383$new_n15285_ i2=$abc$109383$new_n15452_ q=$abc$109383$new_n15468_
+.subckt or21nand_x1 i0=$abc$109383$new_n15467_ i1=$abc$109383$new_n15285_ i2=$abc$109383$new_n15452_ nq=$abc$109383$new_n15468_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[8] nq=$abc$109383$new_n15469_
 .subckt nand3_x0 i0=$abc$109383$new_n15323_ i1=$abc$109383$new_n15469_ i2=soc.cpu.minerva.csrf_rp__addr[8] nq=$abc$109383$new_n15470_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$114[1] nq=$abc$109383$new_n15471_
-.subckt a4_x2 i0=$abc$109383$new_n15330_ i1=soc.cpu.minerva.payload__instruction$28[8] i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15329_ q=$abc$109383$new_n15472_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[1] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n15472_ q=$abc$109383$new_n15473_
+.subckt and4_x1 i0=$abc$109383$new_n15330_ i1=soc.cpu.minerva.payload__instruction$28[8] i2=$abc$109383$new_n15294_ i3=$abc$109383$new_n15329_ q=$abc$109383$new_n15472_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[1] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n15472_ nq=$abc$109383$new_n15473_
 .subckt nand2_x0 i0=$abc$109383$new_n15473_ i1=$abc$109383$new_n15471_ nq=$abc$109383$new_n15474_
 .subckt nand3_x0 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ i2=soc.cpu.minerva.payload__csr_adr$114[0] nq=$abc$109383$new_n15475_
-.subckt a4_x2 i0=$abc$109383$new_n15354_ i1=$abc$109383$new_n15274_ i2=$abc$109383$new_n15330_ i3=soc.cpu.minerva.payload__csr_we$116 q=$abc$109383$new_n15476_
-.subckt a2_x2 i0=$abc$109383$new_n15476_ i1=$abc$109383$new_n15475_ q=$abc$109383$new_n15477_
+.subckt and4_x1 i0=$abc$109383$new_n15354_ i1=$abc$109383$new_n15274_ i2=$abc$109383$new_n15330_ i3=soc.cpu.minerva.payload__csr_we$116 q=$abc$109383$new_n15476_
+.subckt and2_x1 i0=$abc$109383$new_n15476_ i1=$abc$109383$new_n15475_ q=$abc$109383$new_n15477_
 .subckt nand4_x0 i0=$abc$109383$new_n15477_ i1=$abc$109383$new_n15474_ i2=$abc$109383$new_n15470_ i3=$abc$109383$new_n15468_ nq=$abc$109383$new_n15478_
-.subckt o4_x2 i0=$abc$109383$new_n15478_ i1=$abc$109383$new_n15466_ i2=$abc$109383$new_n15457_ i3=$abc$109383$new_n15439_ q=$abc$109383$new_n15479_
+.subckt or4_x1 i0=$abc$109383$new_n15478_ i1=$abc$109383$new_n15466_ i2=$abc$109383$new_n15457_ i3=$abc$109383$new_n15439_ q=$abc$109383$new_n15479_
 .subckt inv_x0 i=soc.cpu.minerva.payload__rd_we$88 nq=$abc$109383$new_n15480_
 .subckt nor4_x0 i0=soc.cpu.minerva.payload__instruction$73[11] i1=soc.cpu.minerva.payload__instruction$73[10] i2=soc.cpu.minerva.payload__instruction$73[7] i3=soc.cpu.minerva.payload__instruction$73[8] nq=$abc$109383$new_n15481_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[9] nq=$abc$109383$new_n15482_
-.subckt oa22_x2 i0=$abc$109383$new_n15482_ i1=$abc$109383$new_n15481_ i2=$abc$109383$new_n15480_ q=$abc$109383$new_n15483_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[9] i1=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n15484_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[8] i1=soc.cpu.minerva.payload__instruction$28[16] nq=$abc$109383$new_n15485_
-.subckt a2_x2 i0=$abc$109383$new_n15485_ i1=$abc$109383$new_n15484_ q=$abc$109383$new_n15486_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[7] i1=soc.cpu.minerva.payload__instruction$28[15] nq=$abc$109383$new_n15487_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[10] i1=soc.cpu.minerva.payload__instruction$28[18] nq=$abc$109383$new_n15488_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[11] i1=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n15489_
-.subckt a3_x2 i0=$abc$109383$new_n15489_ i1=$abc$109383$new_n15488_ i2=$abc$109383$new_n15487_ q=$abc$109383$new_n15490_
+.subckt or21nand_x1 i0=$abc$109383$new_n15482_ i1=$abc$109383$new_n15481_ i2=$abc$109383$new_n15480_ nq=$abc$109383$new_n15483_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[9] i1=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n15484_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[8] i1=soc.cpu.minerva.payload__instruction$28[16] nq=$abc$109383$new_n15485_
+.subckt and2_x1 i0=$abc$109383$new_n15485_ i1=$abc$109383$new_n15484_ q=$abc$109383$new_n15486_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[7] i1=soc.cpu.minerva.payload__instruction$28[15] nq=$abc$109383$new_n15487_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[10] i1=soc.cpu.minerva.payload__instruction$28[18] nq=$abc$109383$new_n15488_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[11] i1=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n15489_
+.subckt and3_x1 i0=$abc$109383$new_n15489_ i1=$abc$109383$new_n15488_ i2=$abc$109383$new_n15487_ q=$abc$109383$new_n15490_
 .subckt nand2_x0 i0=$abc$109383$new_n15490_ i1=$abc$109383$new_n15486_ nq=$abc$109383$new_n15491_
-.subckt o3_x2 i0=$abc$109383$new_n15491_ i1=$abc$109383$new_n15483_ i2=$abc$109383$new_n15411_ q=$abc$109383$new_n15492_
-.subckt o4_x2 i0=soc.cpu.minerva.payload__instruction$73[11] i1=soc.cpu.minerva.payload__instruction$73[10] i2=soc.cpu.minerva.payload__instruction$73[7] i3=soc.cpu.minerva.payload__instruction$73[8] q=$abc$109383$new_n15493_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__instruction$73[9] i1=$abc$109383$new_n15493_ i2=soc.cpu.minerva.payload__rd_we$88 q=$abc$109383$new_n15494_
+.subckt or3_x1 i0=$abc$109383$new_n15491_ i1=$abc$109383$new_n15483_ i2=$abc$109383$new_n15411_ q=$abc$109383$new_n15492_
+.subckt or4_x1 i0=soc.cpu.minerva.payload__instruction$73[11] i1=soc.cpu.minerva.payload__instruction$73[10] i2=soc.cpu.minerva.payload__instruction$73[7] i3=soc.cpu.minerva.payload__instruction$73[8] q=$abc$109383$new_n15493_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__instruction$73[9] i1=$abc$109383$new_n15493_ i2=soc.cpu.minerva.payload__rd_we$88 nq=$abc$109383$new_n15494_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[4] q=$abc$109383$new_n15495_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[11] i1=$abc$109383$new_n15495_ nq=$abc$109383$new_n15496_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[8] i1=soc.cpu.minerva.csrf_rp__addr[1] nq=$abc$109383$new_n15497_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[10] i1=$abc$109383$new_n15384_ nq=$abc$109383$new_n15498_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[9] i1=soc.cpu.minerva.csrf_rp__addr[2] nq=$abc$109383$new_n15499_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__instruction$73[7] i1=$abc$109383$new_n15425_ nq=$abc$109383$new_n15500_
-.subckt a4_x2 i0=$abc$109383$new_n15500_ i1=$abc$109383$new_n15499_ i2=$abc$109383$new_n15498_ i3=$abc$109383$new_n15497_ q=$abc$109383$new_n15501_
-.subckt a3_x2 i0=$abc$109383$new_n15501_ i1=$abc$109383$new_n15496_ i2=$abc$109383$new_n15494_ q=$abc$109383$new_n15502_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[11] i1=$abc$109383$new_n15495_ nq=$abc$109383$new_n15496_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[8] i1=soc.cpu.minerva.csrf_rp__addr[1] nq=$abc$109383$new_n15497_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[10] i1=$abc$109383$new_n15384_ nq=$abc$109383$new_n15498_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[9] i1=soc.cpu.minerva.csrf_rp__addr[2] nq=$abc$109383$new_n15499_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__instruction$73[7] i1=$abc$109383$new_n15425_ nq=$abc$109383$new_n15500_
+.subckt and4_x1 i0=$abc$109383$new_n15500_ i1=$abc$109383$new_n15499_ i2=$abc$109383$new_n15498_ i3=$abc$109383$new_n15497_ q=$abc$109383$new_n15501_
+.subckt and3_x1 i0=$abc$109383$new_n15501_ i1=$abc$109383$new_n15496_ i2=$abc$109383$new_n15494_ q=$abc$109383$new_n15502_
 .subckt nand3_x0 i0=$abc$109383$new_n15502_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n15364_ nq=$abc$109383$new_n15503_
-.subckt a2_x2 i0=$abc$109383$new_n15503_ i1=$abc$109383$new_n15492_ q=$abc$109383$new_n15504_
-.subckt oa22_x2 i0=$abc$109383$new_n15504_ i1=$abc$109383$new_n15479_ i2=$abc$109383$new_n15438_ q=$abc$109383$new_n15505_
-.subckt oa22_x2 i0=$abc$109383$new_n15505_ i1=$abc$109383$new_n15436_ i2=$abc$109383$new_n15260_ q=$abc$109383$new_n15506_
+.subckt and2_x1 i0=$abc$109383$new_n15503_ i1=$abc$109383$new_n15492_ q=$abc$109383$new_n15504_
+.subckt or21nand_x1 i0=$abc$109383$new_n15504_ i1=$abc$109383$new_n15479_ i2=$abc$109383$new_n15438_ nq=$abc$109383$new_n15505_
+.subckt or21nand_x1 i0=$abc$109383$new_n15505_ i1=$abc$109383$new_n15436_ i2=$abc$109383$new_n15260_ nq=$abc$109383$new_n15506_
 .subckt nand2_x0 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15237_ nq=$abc$109383$new_n15507_
 .subckt buf_x4 i=$abc$109383$new_n15507_ q=$abc$109383$new_n15508_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n15234_ i1=$abc$109383$new_n15233_ q=$abc$109383$new_n15509_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n15234_ i1=$abc$109383$new_n15233_ q=$abc$109383$new_n15509_
 .subckt buf_x4 i=$abc$109383$new_n15509_ q=$abc$109383$new_n15510_
 .subckt buf_x4 i=$abc$109383$new_n15510_ q=$abc$109383$new_n15511_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n15512_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[19] nq=$abc$109383$new_n15513_
 .subckt buf_x4 i=$abc$109383$new_n15508_ q=$abc$109383$new_n15514_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=$abc$109383$new_n15513_ i1=$abc$109383$new_n15512_ q=$abc$109383$new_n15515_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=$abc$109383$new_n15513_ i1=$abc$109383$new_n15512_ q=$abc$109383$new_n15515_
 .subckt buf_x4 i=$abc$109383$new_n15515_ q=$abc$109383$new_n15516_
 .subckt buf_x4 i=$abc$109383$new_n15516_ q=$abc$109383$new_n15517_
 .subckt buf_x4 i=$abc$109383$new_n15517_ q=$abc$109383$new_n15518_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[18] i1=soc.cpu.minerva.payload__instruction$28[18] q=$abc$109383$new_n15519_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[18] i1=soc.cpu.minerva.payload__instruction$28[18] q=$abc$109383$new_n15519_
 .subckt buf_x4 i=$abc$109383$new_n15519_ q=$abc$109383$new_n15520_
 .subckt buf_x4 i=$abc$109383$new_n15520_ q=$abc$109383$new_n15521_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[10][0] nq=$abc$109383$new_n15522_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[14][0] nq=$abc$109383$new_n15523_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n15524_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[17] nq=$abc$109383$new_n15525_
-.subckt mx2_x2 cmd=$abc$109383$new_n15507_ i0=$abc$109383$new_n15525_ i1=$abc$109383$new_n15524_ q=$abc$109383$new_n15526_
+.subckt mux2_x1 cmd=$abc$109383$new_n15507_ i0=$abc$109383$new_n15525_ i1=$abc$109383$new_n15524_ q=$abc$109383$new_n15526_
 .subckt buf_x4 i=$abc$109383$new_n15526_ q=$abc$109383$new_n15527_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n15528_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n15529_
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15523_ i1=$abc$109383$new_n15522_ q=$abc$109383$new_n15530_
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15523_ i1=$abc$109383$new_n15522_ q=$abc$109383$new_n15530_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][0] nq=$abc$109383$new_n15531_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[15][0] nq=$abc$109383$new_n15532_
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15532_ i1=$abc$109383$new_n15531_ q=$abc$109383$new_n15533_
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15532_ i1=$abc$109383$new_n15531_ q=$abc$109383$new_n15533_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[15] nq=$abc$109383$new_n15534_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n15534_ i1=$abc$109383$new_n15343_ q=$abc$109383$new_n15535_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n15534_ i1=$abc$109383$new_n15343_ q=$abc$109383$new_n15535_
 .subckt buf_x4 i=$abc$109383$new_n15535_ q=$abc$109383$new_n15536_
 .subckt buf_x4 i=$abc$109383$new_n15536_ q=$abc$109383$new_n15537_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n15538_
-.subckt mx2_x2 cmd=$abc$109383$new_n15538_ i0=$abc$109383$new_n15533_ i1=$abc$109383$new_n15530_ q=$abc$109383$new_n15539_
+.subckt mux2_x1 cmd=$abc$109383$new_n15538_ i0=$abc$109383$new_n15533_ i1=$abc$109383$new_n15530_ q=$abc$109383$new_n15539_
 .subckt nand2_x0 i0=$abc$109383$new_n15539_ i1=$abc$109383$new_n15521_ nq=$abc$109383$new_n15540_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[18] nq=$abc$109383$new_n15541_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=$abc$109383$new_n15541_ i1=$abc$109383$new_n15373_ q=$abc$109383$new_n15542_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=$abc$109383$new_n15541_ i1=$abc$109383$new_n15373_ q=$abc$109383$new_n15542_
 .subckt buf_x4 i=$abc$109383$new_n15542_ q=$abc$109383$new_n15543_
 .subckt buf_x4 i=$abc$109383$new_n15535_ q=$abc$109383$new_n15544_
 .subckt buf_x4 i=$abc$109383$new_n15544_ q=$abc$109383$new_n15545_
@@ -821,7 +821,7 @@
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n15547_
 .subckt buf_x4 i=$abc$109383$new_n15547_ q=$abc$109383$new_n15548_
 .subckt buf_x4 i=$abc$109383$new_n15548_ q=$abc$109383$new_n15549_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[6][0] i1=soc.cpu.minerva.gprf.mem._mem[2][0] q=$abc$109383$new_n15550_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[6][0] i1=soc.cpu.minerva.gprf.mem._mem[2][0] q=$abc$109383$new_n15550_
 .subckt nand2_x0 i0=$abc$109383$new_n15550_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n15551_
 .subckt buf_x4 i=$abc$109383$new_n15237_ q=$abc$109383$new_n15552_
 .subckt buf_x4 i=$abc$109383$new_n15506_ q=$abc$109383$new_n15553_
@@ -829,59 +829,59 @@
 .subckt buf_x4 i=$abc$109383$new_n15554_ q=$abc$109383$new_n15555_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n15556_
 .subckt buf_x4 i=$abc$109383$new_n15556_ q=$abc$109383$new_n15557_
-.subckt oa22_x2 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15552_ i2=$abc$109383$new_n15524_ q=$abc$109383$new_n15558_
+.subckt or21nand_x1 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15552_ i2=$abc$109383$new_n15524_ nq=$abc$109383$new_n15558_
 .subckt buf_x4 i=$abc$109383$new_n15558_ q=$abc$109383$new_n15559_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n15560_
 .subckt buf_x4 i=$abc$109383$new_n15560_ q=$abc$109383$new_n15561_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[7][0] q=$abc$109383$new_n15562_
-.subckt mx2_x2 cmd=$abc$109383$new_n15507_ i0=soc.cpu.minerva.fetch.ibus_rdata[15] i1=soc.cpu.minerva.payload__instruction$28[15] q=$abc$109383$new_n15563_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[7][0] nq=$abc$109383$new_n15562_
+.subckt mux2_x1 cmd=$abc$109383$new_n15507_ i0=soc.cpu.minerva.fetch.ibus_rdata[15] i1=soc.cpu.minerva.payload__instruction$28[15] q=$abc$109383$new_n15563_
 .subckt buf_x4 i=$abc$109383$new_n15563_ q=$abc$109383$new_n15564_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15565_
 .subckt buf_x4 i=$abc$109383$new_n15565_ q=$abc$109383$new_n15566_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[17] i1=soc.cpu.minerva.payload__instruction$28[17] q=$abc$109383$new_n15567_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[17] i1=soc.cpu.minerva.payload__instruction$28[17] q=$abc$109383$new_n15567_
 .subckt buf_x4 i=$abc$109383$new_n15567_ q=$abc$109383$new_n15568_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n15569_
 .subckt buf_x4 i=$abc$109383$new_n15569_ q=$abc$109383$new_n15570_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][0] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n15571_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][0] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n15571_
 .subckt nand2_x0 i0=$abc$109383$new_n15571_ i1=$abc$109383$new_n15562_ nq=$abc$109383$new_n15572_
 .subckt nand3_x0 i0=$abc$109383$new_n15572_ i1=$abc$109383$new_n15551_ i2=$abc$109383$new_n15543_ nq=$abc$109383$new_n15573_
 .subckt nand3_x0 i0=$abc$109383$new_n15573_ i1=$abc$109383$new_n15540_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n15574_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[19] i1=soc.cpu.minerva.payload__instruction$28[19] q=$abc$109383$new_n15575_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[19] i1=soc.cpu.minerva.payload__instruction$28[19] q=$abc$109383$new_n15575_
 .subckt buf_x4 i=$abc$109383$new_n15575_ q=$abc$109383$new_n15576_
 .subckt buf_x4 i=$abc$109383$new_n15576_ q=$abc$109383$new_n15577_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][0] nq=$abc$109383$new_n15578_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][0] nq=$abc$109383$new_n15579_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n15580_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=$abc$109383$new_n15579_ i1=$abc$109383$new_n15578_ q=$abc$109383$new_n15581_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=$abc$109383$new_n15579_ i1=$abc$109383$new_n15578_ q=$abc$109383$new_n15581_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][0] nq=$abc$109383$new_n15582_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][0] nq=$abc$109383$new_n15583_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n15584_
 .subckt buf_x4 i=$abc$109383$new_n15584_ q=$abc$109383$new_n15585_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15583_ i1=$abc$109383$new_n15582_ q=$abc$109383$new_n15586_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15583_ i1=$abc$109383$new_n15582_ q=$abc$109383$new_n15586_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15587_
 .subckt buf_x4 i=$abc$109383$new_n15587_ q=$abc$109383$new_n15588_
-.subckt mx2_x2 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n15586_ i1=$abc$109383$new_n15581_ q=$abc$109383$new_n15589_
+.subckt mux2_x1 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n15586_ i1=$abc$109383$new_n15581_ q=$abc$109383$new_n15589_
 .subckt nand2_x0 i0=$abc$109383$new_n15589_ i1=$abc$109383$new_n15520_ nq=$abc$109383$new_n15590_
 .subckt buf_x4 i=$abc$109383$new_n15536_ q=$abc$109383$new_n15591_
 .subckt buf_x4 i=$abc$109383$new_n15591_ q=$abc$109383$new_n15592_
 .subckt buf_x4 i=$abc$109383$new_n15548_ q=$abc$109383$new_n15593_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[22][0] i1=soc.cpu.minerva.gprf.mem._mem[18][0] q=$abc$109383$new_n15594_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[22][0] i1=soc.cpu.minerva.gprf.mem._mem[18][0] q=$abc$109383$new_n15594_
 .subckt nand2_x0 i0=$abc$109383$new_n15594_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n15595_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n15596_
 .subckt buf_x4 i=$abc$109383$new_n15596_ q=$abc$109383$new_n15597_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n15598_
 .subckt buf_x4 i=$abc$109383$new_n15598_ q=$abc$109383$new_n15599_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[23][0] q=$abc$109383$new_n15600_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[23][0] nq=$abc$109383$new_n15600_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15601_
 .subckt buf_x4 i=$abc$109383$new_n15601_ q=$abc$109383$new_n15602_
 .subckt buf_x4 i=$abc$109383$new_n15567_ q=$abc$109383$new_n15603_
 .subckt buf_x4 i=$abc$109383$new_n15603_ q=$abc$109383$new_n15604_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][0] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n15605_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][0] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n15605_
 .subckt nand2_x0 i0=$abc$109383$new_n15605_ i1=$abc$109383$new_n15600_ nq=$abc$109383$new_n15606_
 .subckt nand3_x0 i0=$abc$109383$new_n15606_ i1=$abc$109383$new_n15595_ i2=$abc$109383$new_n15543_ nq=$abc$109383$new_n15607_
 .subckt nand3_x0 i0=$abc$109383$new_n15607_ i1=$abc$109383$new_n15590_ i2=$abc$109383$new_n15577_ nq=$abc$109383$new_n15608_
-.subckt oa22_x2 i0=$abc$109383$new_n15608_ i1=$abc$109383$new_n15574_ i2=$abc$109383$new_n15511_ q=$abc$109383$new_n15609_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[16] i1=soc.cpu.minerva.payload__instruction$28[16] q=$abc$109383$new_n15610_
+.subckt or21nand_x1 i0=$abc$109383$new_n15608_ i1=$abc$109383$new_n15574_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n15609_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[16] i1=soc.cpu.minerva.payload__instruction$28[16] q=$abc$109383$new_n15610_
 .subckt buf_x4 i=$abc$109383$new_n15610_ q=$abc$109383$new_n15611_
 .subckt buf_x4 i=$abc$109383$new_n15611_ q=$abc$109383$new_n15612_
 .subckt buf_x4 i=$abc$109383$new_n15612_ q=$abc$109383$new_n15613_
@@ -889,27 +889,27 @@
 .subckt buf_x4 i=$abc$109383$new_n15614_ q=$abc$109383$new_n15615_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][0] nq=$abc$109383$new_n15616_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][0] nq=$abc$109383$new_n15617_
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15617_ i1=$abc$109383$new_n15616_ q=$abc$109383$new_n15618_
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15617_ i1=$abc$109383$new_n15616_ q=$abc$109383$new_n15618_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][0] nq=$abc$109383$new_n15619_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][0] nq=$abc$109383$new_n15620_
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15620_ i1=$abc$109383$new_n15619_ q=$abc$109383$new_n15621_
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=$abc$109383$new_n15620_ i1=$abc$109383$new_n15619_ q=$abc$109383$new_n15621_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15622_
 .subckt buf_x4 i=$abc$109383$new_n15622_ q=$abc$109383$new_n15623_
-.subckt mx2_x2 cmd=$abc$109383$new_n15623_ i0=$abc$109383$new_n15621_ i1=$abc$109383$new_n15618_ q=$abc$109383$new_n15624_
+.subckt mux2_x1 cmd=$abc$109383$new_n15623_ i0=$abc$109383$new_n15621_ i1=$abc$109383$new_n15618_ q=$abc$109383$new_n15624_
 .subckt nand2_x0 i0=$abc$109383$new_n15624_ i1=$abc$109383$new_n15520_ nq=$abc$109383$new_n15625_
 .subckt buf_x4 i=$abc$109383$new_n15536_ q=$abc$109383$new_n15626_
 .subckt buf_x4 i=$abc$109383$new_n15626_ q=$abc$109383$new_n15627_
 .subckt buf_x4 i=$abc$109383$new_n15548_ q=$abc$109383$new_n15628_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[20][0] i1=soc.cpu.minerva.gprf.mem._mem[16][0] q=$abc$109383$new_n15629_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[20][0] i1=soc.cpu.minerva.gprf.mem._mem[16][0] q=$abc$109383$new_n15629_
 .subckt nand2_x0 i0=$abc$109383$new_n15629_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n15630_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n15631_
 .subckt buf_x4 i=$abc$109383$new_n15631_ q=$abc$109383$new_n15632_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n15633_
 .subckt buf_x4 i=$abc$109383$new_n15633_ q=$abc$109383$new_n15634_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[21][0] q=$abc$109383$new_n15635_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[21][0] nq=$abc$109383$new_n15635_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n15636_
 .subckt buf_x4 i=$abc$109383$new_n15636_ q=$abc$109383$new_n15637_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][0] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n15638_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][0] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n15638_
 .subckt nand2_x0 i0=$abc$109383$new_n15638_ i1=$abc$109383$new_n15635_ nq=$abc$109383$new_n15639_
 .subckt nand3_x0 i0=$abc$109383$new_n15639_ i1=$abc$109383$new_n15630_ i2=$abc$109383$new_n15543_ nq=$abc$109383$new_n15640_
 .subckt nand3_x0 i0=$abc$109383$new_n15640_ i1=$abc$109383$new_n15625_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n15641_
@@ -917,1938 +917,1938 @@
 .subckt buf_x4 i=$abc$109383$new_n15642_ q=$abc$109383$new_n15643_
 .subckt buf_x4 i=$abc$109383$new_n15591_ q=$abc$109383$new_n15644_
 .subckt buf_x4 i=$abc$109383$new_n15548_ q=$abc$109383$new_n15645_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][0] i1=soc.cpu.minerva.gprf.mem._mem[8][0] q=$abc$109383$new_n15646_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][0] i1=soc.cpu.minerva.gprf.mem._mem[8][0] q=$abc$109383$new_n15646_
 .subckt nand2_x0 i0=$abc$109383$new_n15646_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n15647_
 .subckt buf_x4 i=$abc$109383$new_n15596_ q=$abc$109383$new_n15648_
 .subckt buf_x4 i=$abc$109383$new_n15598_ q=$abc$109383$new_n15649_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][0] q=$abc$109383$new_n15650_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][0] nq=$abc$109383$new_n15650_
 .subckt buf_x4 i=$abc$109383$new_n15587_ q=$abc$109383$new_n15651_
 .subckt buf_x4 i=$abc$109383$new_n15603_ q=$abc$109383$new_n15652_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][0] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ q=$abc$109383$new_n15653_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][0] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ nq=$abc$109383$new_n15653_
 .subckt nand2_x0 i0=$abc$109383$new_n15653_ i1=$abc$109383$new_n15650_ nq=$abc$109383$new_n15654_
 .subckt nand3_x0 i0=$abc$109383$new_n15654_ i1=$abc$109383$new_n15647_ i2=$abc$109383$new_n15520_ nq=$abc$109383$new_n15655_
 .subckt buf_x4 i=$abc$109383$new_n15591_ q=$abc$109383$new_n15656_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n15657_
 .subckt buf_x4 i=$abc$109383$new_n15657_ q=$abc$109383$new_n15658_
 .subckt buf_x4 i=$abc$109383$new_n15658_ q=$abc$109383$new_n15659_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[4][0] i1=soc.cpu.minerva.gprf.mem._mem[0][0] q=$abc$109383$new_n15660_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[4][0] i1=soc.cpu.minerva.gprf.mem._mem[0][0] q=$abc$109383$new_n15660_
 .subckt nand2_x0 i0=$abc$109383$new_n15660_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n15661_
 .subckt buf_x4 i=$abc$109383$new_n15554_ q=$abc$109383$new_n15662_
 .subckt buf_x4 i=$abc$109383$new_n15662_ q=$abc$109383$new_n15663_
 .subckt buf_x4 i=$abc$109383$new_n15558_ q=$abc$109383$new_n15664_
 .subckt buf_x4 i=$abc$109383$new_n15664_ q=$abc$109383$new_n15665_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][0] q=$abc$109383$new_n15666_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][0] nq=$abc$109383$new_n15666_
 .subckt buf_x4 i=$abc$109383$new_n15587_ q=$abc$109383$new_n15667_
 .subckt buf_x4 i=$abc$109383$new_n15567_ q=$abc$109383$new_n15668_
 .subckt buf_x4 i=$abc$109383$new_n15668_ q=$abc$109383$new_n15669_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][0] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n15670_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][0] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n15670_
 .subckt nand2_x0 i0=$abc$109383$new_n15670_ i1=$abc$109383$new_n15666_ nq=$abc$109383$new_n15671_
 .subckt nand3_x0 i0=$abc$109383$new_n15671_ i1=$abc$109383$new_n15661_ i2=$abc$109383$new_n15543_ nq=$abc$109383$new_n15672_
 .subckt nand3_x0 i0=$abc$109383$new_n15672_ i1=$abc$109383$new_n15655_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n15673_
-.subckt oa22_x2 i0=$abc$109383$new_n15673_ i1=$abc$109383$new_n15641_ i2=$abc$109383$new_n15613_ q=$abc$109383$new_n15674_
+.subckt or21nand_x1 i0=$abc$109383$new_n15673_ i1=$abc$109383$new_n15641_ i2=$abc$109383$new_n15613_ nq=$abc$109383$new_n15674_
 .subckt nand2_x0 i0=$abc$109383$new_n15674_ i1=$abc$109383$new_n15609_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[0]
 .subckt buf_x4 i=$abc$109383$new_n15543_ q=$abc$109383$new_n15676_
 .subckt buf_x4 i=$abc$109383$new_n15509_ q=$abc$109383$new_n15677_
 .subckt buf_x4 i=$abc$109383$new_n15677_ q=$abc$109383$new_n15678_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n15679_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n15680_
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][1] i1=soc.cpu.minerva.gprf.mem._mem[16][1] q=$abc$109383$new_n15681_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][1] i1=soc.cpu.minerva.gprf.mem._mem[16][1] q=$abc$109383$new_n15681_
 .subckt nand2_x0 i0=$abc$109383$new_n15681_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n15682_
 .subckt buf_x4 i=$abc$109383$new_n15662_ q=$abc$109383$new_n15683_
 .subckt buf_x4 i=$abc$109383$new_n15664_ q=$abc$109383$new_n15684_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][1] q=$abc$109383$new_n15685_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][1] nq=$abc$109383$new_n15685_
 .subckt buf_x4 i=$abc$109383$new_n15563_ q=$abc$109383$new_n15686_
 .subckt buf_x4 i=$abc$109383$new_n15686_ q=$abc$109383$new_n15687_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n15688_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][1] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n15689_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][1] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n15689_
 .subckt nand2_x0 i0=$abc$109383$new_n15689_ i1=$abc$109383$new_n15685_ nq=$abc$109383$new_n15690_
 .subckt nand3_x0 i0=$abc$109383$new_n15690_ i1=$abc$109383$new_n15682_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n15691_
 .subckt buf_x4 i=$abc$109383$new_n15611_ q=$abc$109383$new_n15692_
 .subckt buf_x4 i=$abc$109383$new_n15591_ q=$abc$109383$new_n15693_
 .subckt buf_x4 i=$abc$109383$new_n15658_ q=$abc$109383$new_n15694_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][1] i1=soc.cpu.minerva.gprf.mem._mem[18][1] q=$abc$109383$new_n15695_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][1] i1=soc.cpu.minerva.gprf.mem._mem[18][1] q=$abc$109383$new_n15695_
 .subckt nand2_x0 i0=$abc$109383$new_n15695_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n15696_
 .subckt buf_x4 i=$abc$109383$new_n15662_ q=$abc$109383$new_n15697_
 .subckt buf_x4 i=$abc$109383$new_n15664_ q=$abc$109383$new_n15698_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][1] q=$abc$109383$new_n15699_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][1] nq=$abc$109383$new_n15699_
 .subckt buf_x4 i=$abc$109383$new_n15686_ q=$abc$109383$new_n15700_
 .subckt buf_x4 i=$abc$109383$new_n15668_ q=$abc$109383$new_n15701_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][1] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n15702_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][1] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n15702_
 .subckt nand2_x0 i0=$abc$109383$new_n15702_ i1=$abc$109383$new_n15699_ nq=$abc$109383$new_n15703_
 .subckt nand3_x0 i0=$abc$109383$new_n15703_ i1=$abc$109383$new_n15696_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n15704_
-.subckt a3_x2 i0=$abc$109383$new_n15704_ i1=$abc$109383$new_n15691_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n15705_
+.subckt and3_x1 i0=$abc$109383$new_n15704_ i1=$abc$109383$new_n15691_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n15705_
 .subckt buf_x4 i=$abc$109383$new_n15611_ q=$abc$109383$new_n15706_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n15707_
 .subckt buf_x4 i=$abc$109383$new_n15707_ q=$abc$109383$new_n15708_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[6][1] i1=soc.cpu.minerva.gprf.mem._mem[2][1] q=$abc$109383$new_n15709_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[6][1] i1=soc.cpu.minerva.gprf.mem._mem[2][1] q=$abc$109383$new_n15709_
 .subckt nand2_x0 i0=$abc$109383$new_n15709_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n15710_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][1] q=$abc$109383$new_n15711_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][1] nq=$abc$109383$new_n15711_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15712_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][1] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n15713_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][1] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n15713_
 .subckt nand2_x0 i0=$abc$109383$new_n15713_ i1=$abc$109383$new_n15711_ nq=$abc$109383$new_n15714_
 .subckt nand3_x0 i0=$abc$109383$new_n15714_ i1=$abc$109383$new_n15710_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n15715_
 .subckt buf_x4 i=$abc$109383$new_n15677_ q=$abc$109383$new_n15716_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n15717_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][1] i1=soc.cpu.minerva.gprf.mem._mem[0][1] q=$abc$109383$new_n15718_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][1] i1=soc.cpu.minerva.gprf.mem._mem[0][1] q=$abc$109383$new_n15718_
 .subckt nand2_x0 i0=$abc$109383$new_n15718_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n15719_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n15720_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n15721_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][1] q=$abc$109383$new_n15722_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][1] nq=$abc$109383$new_n15722_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15723_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n15724_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][1] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n15725_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][1] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n15725_
 .subckt nand2_x0 i0=$abc$109383$new_n15725_ i1=$abc$109383$new_n15722_ nq=$abc$109383$new_n15726_
 .subckt nand3_x0 i0=$abc$109383$new_n15726_ i1=$abc$109383$new_n15719_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n15727_
-.subckt a3_x2 i0=$abc$109383$new_n15727_ i1=$abc$109383$new_n15715_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n15728_
-.subckt ao22_x2 i0=$abc$109383$new_n15728_ i1=$abc$109383$new_n15705_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n15729_
+.subckt and3_x1 i0=$abc$109383$new_n15727_ i1=$abc$109383$new_n15715_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n15728_
+.subckt and21nor_x1 i0=$abc$109383$new_n15728_ i1=$abc$109383$new_n15705_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n15729_
 .subckt buf_x4 i=$abc$109383$new_n15611_ q=$abc$109383$new_n15730_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][1] nq=$abc$109383$new_n15731_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][1] nq=$abc$109383$new_n15732_
-.subckt mx2_x2 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15732_ i1=$abc$109383$new_n15731_ q=$abc$109383$new_n15733_
+.subckt mux2_x1 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15732_ i1=$abc$109383$new_n15731_ q=$abc$109383$new_n15733_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][1] nq=$abc$109383$new_n15734_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][1] nq=$abc$109383$new_n15735_
-.subckt mx2_x2 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15735_ i1=$abc$109383$new_n15734_ q=$abc$109383$new_n15736_
-.subckt mx2_x2 cmd=$abc$109383$new_n15537_ i0=$abc$109383$new_n15736_ i1=$abc$109383$new_n15733_ q=$abc$109383$new_n15737_
+.subckt mux2_x1 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15735_ i1=$abc$109383$new_n15734_ q=$abc$109383$new_n15736_
+.subckt mux2_x1 cmd=$abc$109383$new_n15537_ i0=$abc$109383$new_n15736_ i1=$abc$109383$new_n15733_ q=$abc$109383$new_n15737_
 .subckt nand2_x0 i0=$abc$109383$new_n15737_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n15738_
 .subckt buf_x4 i=$abc$109383$new_n15677_ q=$abc$109383$new_n15739_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n15740_
 .subckt buf_x4 i=$abc$109383$new_n15584_ q=$abc$109383$new_n15741_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][1] i1=soc.cpu.minerva.gprf.mem._mem[24][1] q=$abc$109383$new_n15742_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][1] i1=soc.cpu.minerva.gprf.mem._mem[24][1] q=$abc$109383$new_n15742_
 .subckt nand2_x0 i0=$abc$109383$new_n15742_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n15743_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n15744_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n15745_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][1] q=$abc$109383$new_n15746_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][1] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n15747_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][1] nq=$abc$109383$new_n15746_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][1] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n15747_
 .subckt nand2_x0 i0=$abc$109383$new_n15747_ i1=$abc$109383$new_n15746_ nq=$abc$109383$new_n15748_
 .subckt nand3_x0 i0=$abc$109383$new_n15748_ i1=$abc$109383$new_n15743_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n15749_
-.subckt a3_x2 i0=$abc$109383$new_n15749_ i1=$abc$109383$new_n15738_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n15750_
+.subckt and3_x1 i0=$abc$109383$new_n15749_ i1=$abc$109383$new_n15738_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n15750_
 .subckt buf_x4 i=$abc$109383$new_n15707_ q=$abc$109383$new_n15751_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][1] i1=soc.cpu.minerva.gprf.mem._mem[8][1] q=$abc$109383$new_n15752_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][1] i1=soc.cpu.minerva.gprf.mem._mem[8][1] q=$abc$109383$new_n15752_
 .subckt nand2_x0 i0=$abc$109383$new_n15752_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n15753_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[13][1] q=$abc$109383$new_n15754_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[13][1] nq=$abc$109383$new_n15754_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n15755_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][1] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n15756_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][1] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n15756_
 .subckt nand2_x0 i0=$abc$109383$new_n15756_ i1=$abc$109383$new_n15754_ nq=$abc$109383$new_n15757_
 .subckt nand3_x0 i0=$abc$109383$new_n15757_ i1=$abc$109383$new_n15753_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n15758_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][1] i1=soc.cpu.minerva.gprf.mem._mem[11][1] q=$abc$109383$new_n15759_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[14][1] i1=soc.cpu.minerva.gprf.mem._mem[10][1] q=$abc$109383$new_n15760_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][1] i1=soc.cpu.minerva.gprf.mem._mem[11][1] q=$abc$109383$new_n15759_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[14][1] i1=soc.cpu.minerva.gprf.mem._mem[10][1] q=$abc$109383$new_n15760_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15761_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n15760_ i1=$abc$109383$new_n15759_ q=$abc$109383$new_n15762_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n15760_ i1=$abc$109383$new_n15759_ q=$abc$109383$new_n15762_
 .subckt buf_x4 i=$abc$109383$new_n15509_ q=$abc$109383$new_n15763_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n15762_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n15764_
-.subckt a2_x2 i0=$abc$109383$new_n15764_ i1=$abc$109383$new_n15758_ q=$abc$109383$new_n15765_
-.subckt ao22_x2 i0=$abc$109383$new_n15765_ i1=$abc$109383$new_n15750_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n15766_
-.subckt o2_x2 i0=$abc$109383$new_n15766_ i1=$abc$109383$new_n15729_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[1]
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n15762_ i2=$abc$109383$new_n15642_ nq=$abc$109383$new_n15764_
+.subckt and2_x1 i0=$abc$109383$new_n15764_ i1=$abc$109383$new_n15758_ q=$abc$109383$new_n15765_
+.subckt and21nor_x1 i0=$abc$109383$new_n15765_ i1=$abc$109383$new_n15750_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n15766_
+.subckt or2_x1 i0=$abc$109383$new_n15766_ i1=$abc$109383$new_n15729_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[1]
 .subckt buf_x4 i=$abc$109383$new_n15520_ q=$abc$109383$new_n15768_
 .subckt buf_x4 i=$abc$109383$new_n15577_ q=$abc$109383$new_n15769_
 .subckt buf_x4 i=$abc$109383$new_n15544_ q=$abc$109383$new_n15770_
 .subckt buf_x4 i=$abc$109383$new_n15770_ q=$abc$109383$new_n15771_
 .subckt buf_x4 i=$abc$109383$new_n15707_ q=$abc$109383$new_n15772_
 .subckt buf_x4 i=$abc$109383$new_n15772_ q=$abc$109383$new_n15773_
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][2] i1=soc.cpu.minerva.gprf.mem._mem[16][2] q=$abc$109383$new_n15774_
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][2] i1=soc.cpu.minerva.gprf.mem._mem[16][2] q=$abc$109383$new_n15774_
 .subckt nand2_x0 i0=$abc$109383$new_n15774_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n15775_
 .subckt buf_x4 i=$abc$109383$new_n15744_ q=$abc$109383$new_n15776_
 .subckt buf_x4 i=$abc$109383$new_n15745_ q=$abc$109383$new_n15777_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][2] q=$abc$109383$new_n15778_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][2] nq=$abc$109383$new_n15778_
 .subckt buf_x4 i=$abc$109383$new_n15723_ q=$abc$109383$new_n15779_
 .subckt buf_x4 i=$abc$109383$new_n15724_ q=$abc$109383$new_n15780_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][2] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n15781_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][2] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n15781_
 .subckt nand2_x0 i0=$abc$109383$new_n15781_ i1=$abc$109383$new_n15778_ nq=$abc$109383$new_n15782_
 .subckt nand3_x0 i0=$abc$109383$new_n15782_ i1=$abc$109383$new_n15775_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n15783_
 .subckt buf_x4 i=$abc$109383$new_n15610_ q=$abc$109383$new_n15784_
 .subckt buf_x4 i=$abc$109383$new_n15784_ q=$abc$109383$new_n15785_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][2] i1=soc.cpu.minerva.gprf.mem._mem[18][2] q=$abc$109383$new_n15786_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][2] i1=soc.cpu.minerva.gprf.mem._mem[18][2] q=$abc$109383$new_n15786_
 .subckt nand2_x0 i0=$abc$109383$new_n15786_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n15787_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][2] q=$abc$109383$new_n15788_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][2] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n15789_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][2] nq=$abc$109383$new_n15788_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][2] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n15789_
 .subckt nand2_x0 i0=$abc$109383$new_n15789_ i1=$abc$109383$new_n15788_ nq=$abc$109383$new_n15790_
 .subckt nand3_x0 i0=$abc$109383$new_n15790_ i1=$abc$109383$new_n15787_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n15791_
 .subckt nand3_x0 i0=$abc$109383$new_n15791_ i1=$abc$109383$new_n15783_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n15792_
 .subckt buf_x4 i=$abc$109383$new_n15784_ q=$abc$109383$new_n15793_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][2] nq=$abc$109383$new_n15794_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][2] nq=$abc$109383$new_n15795_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15795_ i1=$abc$109383$new_n15794_ q=$abc$109383$new_n15796_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15795_ i1=$abc$109383$new_n15794_ q=$abc$109383$new_n15796_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][2] nq=$abc$109383$new_n15797_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][2] nq=$abc$109383$new_n15798_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15798_ i1=$abc$109383$new_n15797_ q=$abc$109383$new_n15799_
-.subckt mx2_x2 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n15799_ i1=$abc$109383$new_n15796_ q=$abc$109383$new_n15800_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15798_ i1=$abc$109383$new_n15797_ q=$abc$109383$new_n15799_
+.subckt mux2_x1 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n15799_ i1=$abc$109383$new_n15796_ q=$abc$109383$new_n15800_
 .subckt nand2_x0 i0=$abc$109383$new_n15800_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n15801_
 .subckt buf_x4 i=$abc$109383$new_n15509_ q=$abc$109383$new_n15802_
 .subckt buf_x4 i=$abc$109383$new_n15802_ q=$abc$109383$new_n15803_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[4][2] i1=soc.cpu.minerva.gprf.mem._mem[0][2] q=$abc$109383$new_n15804_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[4][2] i1=soc.cpu.minerva.gprf.mem._mem[0][2] q=$abc$109383$new_n15804_
 .subckt nand2_x0 i0=$abc$109383$new_n15804_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n15805_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][2] q=$abc$109383$new_n15806_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][2] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n15807_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][2] nq=$abc$109383$new_n15806_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][2] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n15807_
 .subckt nand2_x0 i0=$abc$109383$new_n15807_ i1=$abc$109383$new_n15806_ nq=$abc$109383$new_n15808_
 .subckt nand3_x0 i0=$abc$109383$new_n15808_ i1=$abc$109383$new_n15805_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n15809_
 .subckt nand3_x0 i0=$abc$109383$new_n15809_ i1=$abc$109383$new_n15801_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n15810_
-.subckt oa22_x2 i0=$abc$109383$new_n15810_ i1=$abc$109383$new_n15792_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n15811_
+.subckt or21nand_x1 i0=$abc$109383$new_n15810_ i1=$abc$109383$new_n15792_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n15811_
 .subckt buf_x4 i=$abc$109383$new_n15543_ q=$abc$109383$new_n15812_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][2] nq=$abc$109383$new_n15813_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][2] nq=$abc$109383$new_n15814_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n15815_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15814_ i1=$abc$109383$new_n15813_ q=$abc$109383$new_n15816_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15814_ i1=$abc$109383$new_n15813_ q=$abc$109383$new_n15816_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][2] nq=$abc$109383$new_n15817_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][2] nq=$abc$109383$new_n15818_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15818_ i1=$abc$109383$new_n15817_ q=$abc$109383$new_n15819_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n15819_ i1=$abc$109383$new_n15816_ q=$abc$109383$new_n15820_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15818_ i1=$abc$109383$new_n15817_ q=$abc$109383$new_n15819_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n15819_ i1=$abc$109383$new_n15816_ q=$abc$109383$new_n15820_
 .subckt nand2_x0 i0=$abc$109383$new_n15820_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n15821_
 .subckt buf_x4 i=$abc$109383$new_n15802_ q=$abc$109383$new_n15822_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][2] i1=soc.cpu.minerva.gprf.mem._mem[24][2] q=$abc$109383$new_n15823_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][2] i1=soc.cpu.minerva.gprf.mem._mem[24][2] q=$abc$109383$new_n15823_
 .subckt nand2_x0 i0=$abc$109383$new_n15823_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n15824_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][2] q=$abc$109383$new_n15825_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][2] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n15826_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][2] nq=$abc$109383$new_n15825_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][2] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n15826_
 .subckt nand2_x0 i0=$abc$109383$new_n15826_ i1=$abc$109383$new_n15825_ nq=$abc$109383$new_n15827_
 .subckt nand3_x0 i0=$abc$109383$new_n15827_ i1=$abc$109383$new_n15824_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n15828_
 .subckt nand3_x0 i0=$abc$109383$new_n15828_ i1=$abc$109383$new_n15821_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n15829_
 .subckt buf_x4 i=$abc$109383$new_n15802_ q=$abc$109383$new_n15830_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][2] i1=soc.cpu.minerva.gprf.mem._mem[8][2] q=$abc$109383$new_n15831_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][2] i1=soc.cpu.minerva.gprf.mem._mem[8][2] q=$abc$109383$new_n15831_
 .subckt nand2_x0 i0=$abc$109383$new_n15831_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n15832_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][2] q=$abc$109383$new_n15833_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][2] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ q=$abc$109383$new_n15834_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][2] nq=$abc$109383$new_n15833_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][2] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ nq=$abc$109383$new_n15834_
 .subckt nand2_x0 i0=$abc$109383$new_n15834_ i1=$abc$109383$new_n15833_ nq=$abc$109383$new_n15835_
 .subckt nand3_x0 i0=$abc$109383$new_n15835_ i1=$abc$109383$new_n15832_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n15836_
 .subckt buf_x4 i=$abc$109383$new_n15784_ q=$abc$109383$new_n15837_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][2] i1=soc.cpu.minerva.gprf.mem._mem[10][2] q=$abc$109383$new_n15838_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][2] i1=soc.cpu.minerva.gprf.mem._mem[10][2] q=$abc$109383$new_n15838_
 .subckt nand2_x0 i0=$abc$109383$new_n15838_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n15839_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][2] q=$abc$109383$new_n15840_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][2] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n15841_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][2] nq=$abc$109383$new_n15840_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][2] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n15841_
 .subckt nand2_x0 i0=$abc$109383$new_n15841_ i1=$abc$109383$new_n15840_ nq=$abc$109383$new_n15842_
 .subckt nand3_x0 i0=$abc$109383$new_n15842_ i1=$abc$109383$new_n15839_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n15843_
 .subckt nand3_x0 i0=$abc$109383$new_n15843_ i1=$abc$109383$new_n15836_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n15844_
-.subckt oa22_x2 i0=$abc$109383$new_n15844_ i1=$abc$109383$new_n15829_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n15845_
+.subckt or21nand_x1 i0=$abc$109383$new_n15844_ i1=$abc$109383$new_n15829_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n15845_
 .subckt nand2_x0 i0=$abc$109383$new_n15845_ i1=$abc$109383$new_n15811_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[2]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][3] i1=soc.cpu.minerva.gprf.mem._mem[16][3] q=$abc$109383$new_n15847_
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][3] i1=soc.cpu.minerva.gprf.mem._mem[16][3] q=$abc$109383$new_n15847_
 .subckt nand2_x0 i0=$abc$109383$new_n15847_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n15848_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][3] q=$abc$109383$new_n15849_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][3] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n15850_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][3] nq=$abc$109383$new_n15849_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][3] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n15850_
 .subckt nand2_x0 i0=$abc$109383$new_n15850_ i1=$abc$109383$new_n15849_ nq=$abc$109383$new_n15851_
 .subckt nand3_x0 i0=$abc$109383$new_n15851_ i1=$abc$109383$new_n15848_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n15852_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][3] i1=soc.cpu.minerva.gprf.mem._mem[18][3] q=$abc$109383$new_n15853_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][3] i1=soc.cpu.minerva.gprf.mem._mem[18][3] q=$abc$109383$new_n15853_
 .subckt nand2_x0 i0=$abc$109383$new_n15853_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n15854_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][3] q=$abc$109383$new_n15855_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][3] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n15856_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][3] nq=$abc$109383$new_n15855_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][3] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n15856_
 .subckt nand2_x0 i0=$abc$109383$new_n15856_ i1=$abc$109383$new_n15855_ nq=$abc$109383$new_n15857_
 .subckt nand3_x0 i0=$abc$109383$new_n15857_ i1=$abc$109383$new_n15854_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n15858_
 .subckt nand3_x0 i0=$abc$109383$new_n15858_ i1=$abc$109383$new_n15852_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n15859_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][3] nq=$abc$109383$new_n15860_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][3] nq=$abc$109383$new_n15861_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15861_ i1=$abc$109383$new_n15860_ q=$abc$109383$new_n15862_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15861_ i1=$abc$109383$new_n15860_ q=$abc$109383$new_n15862_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][3] nq=$abc$109383$new_n15863_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][3] nq=$abc$109383$new_n15864_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15864_ i1=$abc$109383$new_n15863_ q=$abc$109383$new_n15865_
-.subckt mx2_x2 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n15865_ i1=$abc$109383$new_n15862_ q=$abc$109383$new_n15866_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n15864_ i1=$abc$109383$new_n15863_ q=$abc$109383$new_n15865_
+.subckt mux2_x1 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n15865_ i1=$abc$109383$new_n15862_ q=$abc$109383$new_n15866_
 .subckt nand2_x0 i0=$abc$109383$new_n15866_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n15867_
 .subckt buf_x4 i=$abc$109383$new_n15548_ q=$abc$109383$new_n15868_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][3] i1=soc.cpu.minerva.gprf.mem._mem[0][3] q=$abc$109383$new_n15869_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][3] i1=soc.cpu.minerva.gprf.mem._mem[0][3] q=$abc$109383$new_n15869_
 .subckt nand2_x0 i0=$abc$109383$new_n15869_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n15870_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][3] q=$abc$109383$new_n15871_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][3] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n15872_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][3] nq=$abc$109383$new_n15871_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][3] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n15872_
 .subckt nand2_x0 i0=$abc$109383$new_n15872_ i1=$abc$109383$new_n15871_ nq=$abc$109383$new_n15873_
 .subckt nand3_x0 i0=$abc$109383$new_n15873_ i1=$abc$109383$new_n15870_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n15874_
 .subckt nand3_x0 i0=$abc$109383$new_n15874_ i1=$abc$109383$new_n15867_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n15875_
-.subckt oa22_x2 i0=$abc$109383$new_n15875_ i1=$abc$109383$new_n15859_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n15876_
+.subckt or21nand_x1 i0=$abc$109383$new_n15875_ i1=$abc$109383$new_n15859_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n15876_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][3] nq=$abc$109383$new_n15877_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][3] nq=$abc$109383$new_n15878_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15878_ i1=$abc$109383$new_n15877_ q=$abc$109383$new_n15879_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15878_ i1=$abc$109383$new_n15877_ q=$abc$109383$new_n15879_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][3] nq=$abc$109383$new_n15880_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][3] nq=$abc$109383$new_n15881_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15881_ i1=$abc$109383$new_n15880_ q=$abc$109383$new_n15882_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n15882_ i1=$abc$109383$new_n15879_ q=$abc$109383$new_n15883_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n15881_ i1=$abc$109383$new_n15880_ q=$abc$109383$new_n15882_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n15882_ i1=$abc$109383$new_n15879_ q=$abc$109383$new_n15883_
 .subckt nand2_x0 i0=$abc$109383$new_n15883_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n15884_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][3] i1=soc.cpu.minerva.gprf.mem._mem[24][3] q=$abc$109383$new_n15885_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][3] i1=soc.cpu.minerva.gprf.mem._mem[24][3] q=$abc$109383$new_n15885_
 .subckt nand2_x0 i0=$abc$109383$new_n15885_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n15886_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][3] q=$abc$109383$new_n15887_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][3] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n15888_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][3] nq=$abc$109383$new_n15887_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][3] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n15888_
 .subckt nand2_x0 i0=$abc$109383$new_n15888_ i1=$abc$109383$new_n15887_ nq=$abc$109383$new_n15889_
 .subckt nand3_x0 i0=$abc$109383$new_n15889_ i1=$abc$109383$new_n15886_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n15890_
 .subckt nand3_x0 i0=$abc$109383$new_n15890_ i1=$abc$109383$new_n15884_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n15891_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][3] i1=soc.cpu.minerva.gprf.mem._mem[8][3] q=$abc$109383$new_n15892_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][3] i1=soc.cpu.minerva.gprf.mem._mem[8][3] q=$abc$109383$new_n15892_
 .subckt nand2_x0 i0=$abc$109383$new_n15892_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n15893_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][3] q=$abc$109383$new_n15894_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][3] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ q=$abc$109383$new_n15895_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][3] nq=$abc$109383$new_n15894_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][3] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ nq=$abc$109383$new_n15895_
 .subckt nand2_x0 i0=$abc$109383$new_n15895_ i1=$abc$109383$new_n15894_ nq=$abc$109383$new_n15896_
 .subckt nand3_x0 i0=$abc$109383$new_n15896_ i1=$abc$109383$new_n15893_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n15897_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][3] i1=soc.cpu.minerva.gprf.mem._mem[10][3] q=$abc$109383$new_n15898_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][3] i1=soc.cpu.minerva.gprf.mem._mem[10][3] q=$abc$109383$new_n15898_
 .subckt nand2_x0 i0=$abc$109383$new_n15898_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n15899_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][3] q=$abc$109383$new_n15900_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][3] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n15901_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][3] nq=$abc$109383$new_n15900_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][3] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n15901_
 .subckt nand2_x0 i0=$abc$109383$new_n15901_ i1=$abc$109383$new_n15900_ nq=$abc$109383$new_n15902_
 .subckt nand3_x0 i0=$abc$109383$new_n15902_ i1=$abc$109383$new_n15899_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n15903_
 .subckt nand3_x0 i0=$abc$109383$new_n15903_ i1=$abc$109383$new_n15897_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n15904_
-.subckt oa22_x2 i0=$abc$109383$new_n15904_ i1=$abc$109383$new_n15891_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n15905_
+.subckt or21nand_x1 i0=$abc$109383$new_n15904_ i1=$abc$109383$new_n15891_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n15905_
 .subckt nand2_x0 i0=$abc$109383$new_n15905_ i1=$abc$109383$new_n15876_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[3]
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][4] i1=soc.cpu.minerva.gprf.mem._mem[16][4] q=$abc$109383$new_n15907_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][4] i1=soc.cpu.minerva.gprf.mem._mem[16][4] q=$abc$109383$new_n15907_
 .subckt nand2_x0 i0=$abc$109383$new_n15907_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n15908_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][4] q=$abc$109383$new_n15909_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][4] nq=$abc$109383$new_n15909_
 .subckt buf_x4 i=$abc$109383$new_n15686_ q=$abc$109383$new_n15910_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][4] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n15911_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][4] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n15911_
 .subckt nand2_x0 i0=$abc$109383$new_n15911_ i1=$abc$109383$new_n15909_ nq=$abc$109383$new_n15912_
 .subckt nand3_x0 i0=$abc$109383$new_n15912_ i1=$abc$109383$new_n15908_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n15913_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][4] i1=soc.cpu.minerva.gprf.mem._mem[18][4] q=$abc$109383$new_n15914_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][4] i1=soc.cpu.minerva.gprf.mem._mem[18][4] q=$abc$109383$new_n15914_
 .subckt nand2_x0 i0=$abc$109383$new_n15914_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n15915_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][4] q=$abc$109383$new_n15916_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][4] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n15917_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][4] nq=$abc$109383$new_n15916_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][4] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n15917_
 .subckt nand2_x0 i0=$abc$109383$new_n15917_ i1=$abc$109383$new_n15916_ nq=$abc$109383$new_n15918_
 .subckt nand3_x0 i0=$abc$109383$new_n15918_ i1=$abc$109383$new_n15915_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n15919_
-.subckt a3_x2 i0=$abc$109383$new_n15919_ i1=$abc$109383$new_n15913_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n15920_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[6][4] i1=soc.cpu.minerva.gprf.mem._mem[2][4] q=$abc$109383$new_n15921_
+.subckt and3_x1 i0=$abc$109383$new_n15919_ i1=$abc$109383$new_n15913_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n15920_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[6][4] i1=soc.cpu.minerva.gprf.mem._mem[2][4] q=$abc$109383$new_n15921_
 .subckt nand2_x0 i0=$abc$109383$new_n15921_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n15922_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][4] q=$abc$109383$new_n15923_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][4] nq=$abc$109383$new_n15923_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n15924_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][4] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n15925_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][4] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n15925_
 .subckt nand2_x0 i0=$abc$109383$new_n15925_ i1=$abc$109383$new_n15923_ nq=$abc$109383$new_n15926_
 .subckt nand3_x0 i0=$abc$109383$new_n15926_ i1=$abc$109383$new_n15922_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n15927_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][4] i1=soc.cpu.minerva.gprf.mem._mem[0][4] q=$abc$109383$new_n15928_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][4] i1=soc.cpu.minerva.gprf.mem._mem[0][4] q=$abc$109383$new_n15928_
 .subckt nand2_x0 i0=$abc$109383$new_n15928_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n15929_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][4] q=$abc$109383$new_n15930_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][4] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n15931_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][4] nq=$abc$109383$new_n15930_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][4] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n15931_
 .subckt nand2_x0 i0=$abc$109383$new_n15931_ i1=$abc$109383$new_n15930_ nq=$abc$109383$new_n15932_
 .subckt nand3_x0 i0=$abc$109383$new_n15932_ i1=$abc$109383$new_n15929_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n15933_
-.subckt a3_x2 i0=$abc$109383$new_n15933_ i1=$abc$109383$new_n15927_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n15934_
-.subckt ao22_x2 i0=$abc$109383$new_n15934_ i1=$abc$109383$new_n15920_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n15935_
+.subckt and3_x1 i0=$abc$109383$new_n15933_ i1=$abc$109383$new_n15927_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n15934_
+.subckt and21nor_x1 i0=$abc$109383$new_n15934_ i1=$abc$109383$new_n15920_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n15935_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][4] nq=$abc$109383$new_n15936_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][4] nq=$abc$109383$new_n15937_
-.subckt mx2_x2 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15937_ i1=$abc$109383$new_n15936_ q=$abc$109383$new_n15938_
+.subckt mux2_x1 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15937_ i1=$abc$109383$new_n15936_ q=$abc$109383$new_n15938_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][4] nq=$abc$109383$new_n15939_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][4] nq=$abc$109383$new_n15940_
-.subckt mx2_x2 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15940_ i1=$abc$109383$new_n15939_ q=$abc$109383$new_n15941_
+.subckt mux2_x1 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n15940_ i1=$abc$109383$new_n15939_ q=$abc$109383$new_n15941_
 .subckt buf_x4 i=$abc$109383$new_n15536_ q=$abc$109383$new_n15942_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n15941_ i1=$abc$109383$new_n15938_ q=$abc$109383$new_n15943_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n15941_ i1=$abc$109383$new_n15938_ q=$abc$109383$new_n15943_
 .subckt nand2_x0 i0=$abc$109383$new_n15943_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n15944_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n15945_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][4] i1=soc.cpu.minerva.gprf.mem._mem[24][4] q=$abc$109383$new_n15946_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][4] i1=soc.cpu.minerva.gprf.mem._mem[24][4] q=$abc$109383$new_n15946_
 .subckt nand2_x0 i0=$abc$109383$new_n15946_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n15947_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][4] q=$abc$109383$new_n15948_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][4] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n15949_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][4] nq=$abc$109383$new_n15948_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][4] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n15949_
 .subckt nand2_x0 i0=$abc$109383$new_n15949_ i1=$abc$109383$new_n15948_ nq=$abc$109383$new_n15950_
 .subckt nand3_x0 i0=$abc$109383$new_n15950_ i1=$abc$109383$new_n15947_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n15951_
-.subckt a3_x2 i0=$abc$109383$new_n15951_ i1=$abc$109383$new_n15944_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n15952_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][4] i1=soc.cpu.minerva.gprf.mem._mem[8][4] q=$abc$109383$new_n15953_
+.subckt and3_x1 i0=$abc$109383$new_n15951_ i1=$abc$109383$new_n15944_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n15952_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][4] i1=soc.cpu.minerva.gprf.mem._mem[8][4] q=$abc$109383$new_n15953_
 .subckt nand2_x0 i0=$abc$109383$new_n15953_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n15954_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[13][4] q=$abc$109383$new_n15955_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][4] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n15956_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[13][4] nq=$abc$109383$new_n15955_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][4] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n15956_
 .subckt nand2_x0 i0=$abc$109383$new_n15956_ i1=$abc$109383$new_n15955_ nq=$abc$109383$new_n15957_
 .subckt nand3_x0 i0=$abc$109383$new_n15957_ i1=$abc$109383$new_n15954_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n15958_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][4] i1=soc.cpu.minerva.gprf.mem._mem[11][4] q=$abc$109383$new_n15959_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[14][4] i1=soc.cpu.minerva.gprf.mem._mem[10][4] q=$abc$109383$new_n15960_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n15960_ i1=$abc$109383$new_n15959_ q=$abc$109383$new_n15961_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n15961_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n15962_
-.subckt a2_x2 i0=$abc$109383$new_n15962_ i1=$abc$109383$new_n15958_ q=$abc$109383$new_n15963_
-.subckt ao22_x2 i0=$abc$109383$new_n15963_ i1=$abc$109383$new_n15952_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n15964_
-.subckt o2_x2 i0=$abc$109383$new_n15964_ i1=$abc$109383$new_n15935_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[4]
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][5] i1=soc.cpu.minerva.gprf.mem._mem[16][5] q=$abc$109383$new_n15966_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][4] i1=soc.cpu.minerva.gprf.mem._mem[11][4] q=$abc$109383$new_n15959_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[14][4] i1=soc.cpu.minerva.gprf.mem._mem[10][4] q=$abc$109383$new_n15960_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n15960_ i1=$abc$109383$new_n15959_ q=$abc$109383$new_n15961_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n15961_ i2=$abc$109383$new_n15642_ nq=$abc$109383$new_n15962_
+.subckt and2_x1 i0=$abc$109383$new_n15962_ i1=$abc$109383$new_n15958_ q=$abc$109383$new_n15963_
+.subckt and21nor_x1 i0=$abc$109383$new_n15963_ i1=$abc$109383$new_n15952_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n15964_
+.subckt or2_x1 i0=$abc$109383$new_n15964_ i1=$abc$109383$new_n15935_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[4]
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][5] i1=soc.cpu.minerva.gprf.mem._mem[16][5] q=$abc$109383$new_n15966_
 .subckt nand2_x0 i0=$abc$109383$new_n15966_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n15967_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][5] q=$abc$109383$new_n15968_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][5] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n15969_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][5] nq=$abc$109383$new_n15968_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][5] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n15969_
 .subckt nand2_x0 i0=$abc$109383$new_n15969_ i1=$abc$109383$new_n15968_ nq=$abc$109383$new_n15970_
 .subckt nand3_x0 i0=$abc$109383$new_n15970_ i1=$abc$109383$new_n15967_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n15971_
-.subckt mx2_x2 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[23][5] i1=soc.cpu.minerva.gprf.mem._mem[19][5] q=$abc$109383$new_n15972_
-.subckt mx2_x2 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[22][5] i1=soc.cpu.minerva.gprf.mem._mem[18][5] q=$abc$109383$new_n15973_
-.subckt mx2_x2 cmd=$abc$109383$new_n15587_ i0=$abc$109383$new_n15973_ i1=$abc$109383$new_n15972_ q=$abc$109383$new_n15974_
-.subckt ao22_x2 i0=$abc$109383$new_n15802_ i1=$abc$109383$new_n15974_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n15975_
-.subckt a2_x2 i0=$abc$109383$new_n15975_ i1=$abc$109383$new_n15971_ q=$abc$109383$new_n15976_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[6][5] i1=soc.cpu.minerva.gprf.mem._mem[2][5] q=$abc$109383$new_n15977_
+.subckt mux2_x1 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[23][5] i1=soc.cpu.minerva.gprf.mem._mem[19][5] q=$abc$109383$new_n15972_
+.subckt mux2_x1 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[22][5] i1=soc.cpu.minerva.gprf.mem._mem[18][5] q=$abc$109383$new_n15973_
+.subckt mux2_x1 cmd=$abc$109383$new_n15587_ i0=$abc$109383$new_n15973_ i1=$abc$109383$new_n15972_ q=$abc$109383$new_n15974_
+.subckt and21nor_x1 i0=$abc$109383$new_n15802_ i1=$abc$109383$new_n15974_ i2=$abc$109383$new_n15576_ nq=$abc$109383$new_n15975_
+.subckt and2_x1 i0=$abc$109383$new_n15975_ i1=$abc$109383$new_n15971_ q=$abc$109383$new_n15976_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[6][5] i1=soc.cpu.minerva.gprf.mem._mem[2][5] q=$abc$109383$new_n15977_
 .subckt nand2_x0 i0=$abc$109383$new_n15977_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n15978_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][5] q=$abc$109383$new_n15979_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][5] nq=$abc$109383$new_n15979_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n15980_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][5] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n15981_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][5] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n15981_
 .subckt nand2_x0 i0=$abc$109383$new_n15981_ i1=$abc$109383$new_n15979_ nq=$abc$109383$new_n15982_
 .subckt nand3_x0 i0=$abc$109383$new_n15982_ i1=$abc$109383$new_n15978_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n15983_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n15984_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][5] i1=soc.cpu.minerva.gprf.mem._mem[0][5] q=$abc$109383$new_n15985_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][5] i1=soc.cpu.minerva.gprf.mem._mem[0][5] q=$abc$109383$new_n15985_
 .subckt nand2_x0 i0=$abc$109383$new_n15985_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n15986_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][5] q=$abc$109383$new_n15987_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][5] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n15988_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][5] nq=$abc$109383$new_n15987_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][5] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n15988_
 .subckt nand2_x0 i0=$abc$109383$new_n15988_ i1=$abc$109383$new_n15987_ nq=$abc$109383$new_n15989_
 .subckt nand3_x0 i0=$abc$109383$new_n15989_ i1=$abc$109383$new_n15986_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n15990_
-.subckt a3_x2 i0=$abc$109383$new_n15990_ i1=$abc$109383$new_n15983_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n15991_
-.subckt ao22_x2 i0=$abc$109383$new_n15991_ i1=$abc$109383$new_n15976_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n15992_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][5] i1=soc.cpu.minerva.gprf.mem._mem[26][5] q=$abc$109383$new_n15993_
+.subckt and3_x1 i0=$abc$109383$new_n15990_ i1=$abc$109383$new_n15983_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n15991_
+.subckt and21nor_x1 i0=$abc$109383$new_n15991_ i1=$abc$109383$new_n15976_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n15992_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][5] i1=soc.cpu.minerva.gprf.mem._mem[26][5] q=$abc$109383$new_n15993_
 .subckt nand2_x0 i0=$abc$109383$new_n15993_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n15994_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][5] nq=$abc$109383$new_n15995_
-.subckt a3_x2 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n15995_ q=$abc$109383$new_n15996_
+.subckt and3_x1 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n15995_ q=$abc$109383$new_n15996_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][5] nq=$abc$109383$new_n15997_
-.subckt oa22_x2 i0=$abc$109383$new_n15997_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ q=$abc$109383$new_n15998_
-.subckt ao22_x2 i0=$abc$109383$new_n15998_ i1=$abc$109383$new_n15996_ i2=$abc$109383$new_n15611_ q=$abc$109383$new_n15999_
+.subckt or21nand_x1 i0=$abc$109383$new_n15997_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ nq=$abc$109383$new_n15998_
+.subckt and21nor_x1 i0=$abc$109383$new_n15998_ i1=$abc$109383$new_n15996_ i2=$abc$109383$new_n15611_ nq=$abc$109383$new_n15999_
 .subckt nand2_x0 i0=$abc$109383$new_n15999_ i1=$abc$109383$new_n15994_ nq=$abc$109383$new_n16000_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][5] i1=soc.cpu.minerva.gprf.mem._mem[24][5] q=$abc$109383$new_n16001_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][5] i1=soc.cpu.minerva.gprf.mem._mem[24][5] q=$abc$109383$new_n16001_
 .subckt nand2_x0 i0=$abc$109383$new_n16001_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16002_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][5] q=$abc$109383$new_n16003_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][5] nq=$abc$109383$new_n16003_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n16004_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][5] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16005_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][5] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16005_
 .subckt nand2_x0 i0=$abc$109383$new_n16005_ i1=$abc$109383$new_n16003_ nq=$abc$109383$new_n16006_
 .subckt nand3_x0 i0=$abc$109383$new_n16006_ i1=$abc$109383$new_n16002_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n16007_
-.subckt a3_x2 i0=$abc$109383$new_n16007_ i1=$abc$109383$new_n16000_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16008_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][5] i1=soc.cpu.minerva.gprf.mem._mem[8][5] q=$abc$109383$new_n16009_
+.subckt and3_x1 i0=$abc$109383$new_n16007_ i1=$abc$109383$new_n16000_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16008_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][5] i1=soc.cpu.minerva.gprf.mem._mem[8][5] q=$abc$109383$new_n16009_
 .subckt nand2_x0 i0=$abc$109383$new_n16009_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n16010_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n16011_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n16012_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][5] q=$abc$109383$new_n16013_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][5] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n16014_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][5] nq=$abc$109383$new_n16013_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][5] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n16014_
 .subckt nand2_x0 i0=$abc$109383$new_n16014_ i1=$abc$109383$new_n16013_ nq=$abc$109383$new_n16015_
 .subckt nand3_x0 i0=$abc$109383$new_n16015_ i1=$abc$109383$new_n16010_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n16016_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][5] i1=soc.cpu.minerva.gprf.mem._mem[11][5] q=$abc$109383$new_n16017_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[14][5] i1=soc.cpu.minerva.gprf.mem._mem[10][5] q=$abc$109383$new_n16018_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16018_ i1=$abc$109383$new_n16017_ q=$abc$109383$new_n16019_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16019_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n16020_
-.subckt a2_x2 i0=$abc$109383$new_n16020_ i1=$abc$109383$new_n16016_ q=$abc$109383$new_n16021_
-.subckt ao22_x2 i0=$abc$109383$new_n16021_ i1=$abc$109383$new_n16008_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16022_
-.subckt o2_x2 i0=$abc$109383$new_n16022_ i1=$abc$109383$new_n15992_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[5]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][6] i1=soc.cpu.minerva.gprf.mem._mem[16][6] q=$abc$109383$new_n16024_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][5] i1=soc.cpu.minerva.gprf.mem._mem[11][5] q=$abc$109383$new_n16017_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[14][5] i1=soc.cpu.minerva.gprf.mem._mem[10][5] q=$abc$109383$new_n16018_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16018_ i1=$abc$109383$new_n16017_ q=$abc$109383$new_n16019_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16019_ i2=$abc$109383$new_n15642_ nq=$abc$109383$new_n16020_
+.subckt and2_x1 i0=$abc$109383$new_n16020_ i1=$abc$109383$new_n16016_ q=$abc$109383$new_n16021_
+.subckt and21nor_x1 i0=$abc$109383$new_n16021_ i1=$abc$109383$new_n16008_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16022_
+.subckt or2_x1 i0=$abc$109383$new_n16022_ i1=$abc$109383$new_n15992_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[5]
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][6] i1=soc.cpu.minerva.gprf.mem._mem[16][6] q=$abc$109383$new_n16024_
 .subckt nand2_x0 i0=$abc$109383$new_n16024_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n16025_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][6] q=$abc$109383$new_n16026_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][6] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n16027_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][6] nq=$abc$109383$new_n16026_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][6] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n16027_
 .subckt nand2_x0 i0=$abc$109383$new_n16027_ i1=$abc$109383$new_n16026_ nq=$abc$109383$new_n16028_
 .subckt nand3_x0 i0=$abc$109383$new_n16028_ i1=$abc$109383$new_n16025_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n16029_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][6] i1=soc.cpu.minerva.gprf.mem._mem[18][6] q=$abc$109383$new_n16030_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][6] i1=soc.cpu.minerva.gprf.mem._mem[18][6] q=$abc$109383$new_n16030_
 .subckt nand2_x0 i0=$abc$109383$new_n16030_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n16031_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][6] q=$abc$109383$new_n16032_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][6] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n16033_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][6] nq=$abc$109383$new_n16032_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][6] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n16033_
 .subckt nand2_x0 i0=$abc$109383$new_n16033_ i1=$abc$109383$new_n16032_ nq=$abc$109383$new_n16034_
 .subckt nand3_x0 i0=$abc$109383$new_n16034_ i1=$abc$109383$new_n16031_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n16035_
 .subckt nand3_x0 i0=$abc$109383$new_n16035_ i1=$abc$109383$new_n16029_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n16036_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][6] nq=$abc$109383$new_n16037_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][6] nq=$abc$109383$new_n16038_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16038_ i1=$abc$109383$new_n16037_ q=$abc$109383$new_n16039_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16038_ i1=$abc$109383$new_n16037_ q=$abc$109383$new_n16039_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][6] nq=$abc$109383$new_n16040_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][6] nq=$abc$109383$new_n16041_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16041_ i1=$abc$109383$new_n16040_ q=$abc$109383$new_n16042_
-.subckt mx2_x2 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n16042_ i1=$abc$109383$new_n16039_ q=$abc$109383$new_n16043_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16041_ i1=$abc$109383$new_n16040_ q=$abc$109383$new_n16042_
+.subckt mux2_x1 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n16042_ i1=$abc$109383$new_n16039_ q=$abc$109383$new_n16043_
 .subckt nand2_x0 i0=$abc$109383$new_n16043_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n16044_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][6] i1=soc.cpu.minerva.gprf.mem._mem[0][6] q=$abc$109383$new_n16045_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][6] i1=soc.cpu.minerva.gprf.mem._mem[0][6] q=$abc$109383$new_n16045_
 .subckt nand2_x0 i0=$abc$109383$new_n16045_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n16046_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][6] q=$abc$109383$new_n16047_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][6] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n16048_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][6] nq=$abc$109383$new_n16047_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][6] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n16048_
 .subckt nand2_x0 i0=$abc$109383$new_n16048_ i1=$abc$109383$new_n16047_ nq=$abc$109383$new_n16049_
 .subckt nand3_x0 i0=$abc$109383$new_n16049_ i1=$abc$109383$new_n16046_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n16050_
 .subckt nand3_x0 i0=$abc$109383$new_n16050_ i1=$abc$109383$new_n16044_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n16051_
-.subckt oa22_x2 i0=$abc$109383$new_n16051_ i1=$abc$109383$new_n16036_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n16052_
+.subckt or21nand_x1 i0=$abc$109383$new_n16051_ i1=$abc$109383$new_n16036_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n16052_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][6] nq=$abc$109383$new_n16053_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][6] nq=$abc$109383$new_n16054_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16054_ i1=$abc$109383$new_n16053_ q=$abc$109383$new_n16055_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16054_ i1=$abc$109383$new_n16053_ q=$abc$109383$new_n16055_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][6] nq=$abc$109383$new_n16056_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][6] nq=$abc$109383$new_n16057_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16057_ i1=$abc$109383$new_n16056_ q=$abc$109383$new_n16058_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16058_ i1=$abc$109383$new_n16055_ q=$abc$109383$new_n16059_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16057_ i1=$abc$109383$new_n16056_ q=$abc$109383$new_n16058_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16058_ i1=$abc$109383$new_n16055_ q=$abc$109383$new_n16059_
 .subckt nand2_x0 i0=$abc$109383$new_n16059_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n16060_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][6] i1=soc.cpu.minerva.gprf.mem._mem[24][6] q=$abc$109383$new_n16061_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][6] i1=soc.cpu.minerva.gprf.mem._mem[24][6] q=$abc$109383$new_n16061_
 .subckt nand2_x0 i0=$abc$109383$new_n16061_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n16062_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][6] q=$abc$109383$new_n16063_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][6] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n16064_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][6] nq=$abc$109383$new_n16063_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][6] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n16064_
 .subckt nand2_x0 i0=$abc$109383$new_n16064_ i1=$abc$109383$new_n16063_ nq=$abc$109383$new_n16065_
 .subckt nand3_x0 i0=$abc$109383$new_n16065_ i1=$abc$109383$new_n16062_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n16066_
 .subckt nand3_x0 i0=$abc$109383$new_n16066_ i1=$abc$109383$new_n16060_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n16067_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][6] i1=soc.cpu.minerva.gprf.mem._mem[8][6] q=$abc$109383$new_n16068_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[12][6] i1=soc.cpu.minerva.gprf.mem._mem[8][6] q=$abc$109383$new_n16068_
 .subckt nand2_x0 i0=$abc$109383$new_n16068_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n16069_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][6] q=$abc$109383$new_n16070_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][6] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ q=$abc$109383$new_n16071_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][6] nq=$abc$109383$new_n16070_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][6] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ nq=$abc$109383$new_n16071_
 .subckt nand2_x0 i0=$abc$109383$new_n16071_ i1=$abc$109383$new_n16070_ nq=$abc$109383$new_n16072_
 .subckt nand3_x0 i0=$abc$109383$new_n16072_ i1=$abc$109383$new_n16069_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n16073_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][6] i1=soc.cpu.minerva.gprf.mem._mem[10][6] q=$abc$109383$new_n16074_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][6] i1=soc.cpu.minerva.gprf.mem._mem[10][6] q=$abc$109383$new_n16074_
 .subckt nand2_x0 i0=$abc$109383$new_n16074_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n16075_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][6] q=$abc$109383$new_n16076_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][6] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n16077_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][6] nq=$abc$109383$new_n16076_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][6] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n16077_
 .subckt nand2_x0 i0=$abc$109383$new_n16077_ i1=$abc$109383$new_n16076_ nq=$abc$109383$new_n16078_
 .subckt nand3_x0 i0=$abc$109383$new_n16078_ i1=$abc$109383$new_n16075_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n16079_
 .subckt nand3_x0 i0=$abc$109383$new_n16079_ i1=$abc$109383$new_n16073_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n16080_
-.subckt oa22_x2 i0=$abc$109383$new_n16080_ i1=$abc$109383$new_n16067_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n16081_
+.subckt or21nand_x1 i0=$abc$109383$new_n16080_ i1=$abc$109383$new_n16067_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n16081_
 .subckt nand2_x0 i0=$abc$109383$new_n16081_ i1=$abc$109383$new_n16052_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[6]
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][7] i1=soc.cpu.minerva.gprf.mem._mem[16][7] q=$abc$109383$new_n16083_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][7] i1=soc.cpu.minerva.gprf.mem._mem[16][7] q=$abc$109383$new_n16083_
 .subckt nand2_x0 i0=$abc$109383$new_n16083_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n16084_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][7] q=$abc$109383$new_n16085_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][7] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16086_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][7] nq=$abc$109383$new_n16085_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][7] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16086_
 .subckt nand2_x0 i0=$abc$109383$new_n16086_ i1=$abc$109383$new_n16085_ nq=$abc$109383$new_n16087_
 .subckt nand3_x0 i0=$abc$109383$new_n16087_ i1=$abc$109383$new_n16084_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n16088_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][7] i1=soc.cpu.minerva.gprf.mem._mem[18][7] q=$abc$109383$new_n16089_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][7] i1=soc.cpu.minerva.gprf.mem._mem[18][7] q=$abc$109383$new_n16089_
 .subckt nand2_x0 i0=$abc$109383$new_n16089_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n16090_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][7] q=$abc$109383$new_n16091_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][7] nq=$abc$109383$new_n16091_
 .subckt buf_x4 i=$abc$109383$new_n15686_ q=$abc$109383$new_n16092_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][7] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16093_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][7] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16093_
 .subckt nand2_x0 i0=$abc$109383$new_n16093_ i1=$abc$109383$new_n16091_ nq=$abc$109383$new_n16094_
 .subckt nand3_x0 i0=$abc$109383$new_n16094_ i1=$abc$109383$new_n16090_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n16095_
-.subckt a3_x2 i0=$abc$109383$new_n16095_ i1=$abc$109383$new_n16088_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16096_
+.subckt and3_x1 i0=$abc$109383$new_n16095_ i1=$abc$109383$new_n16088_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16096_
 .subckt buf_x4 i=$abc$109383$new_n15707_ q=$abc$109383$new_n16097_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][7] i1=soc.cpu.minerva.gprf.mem._mem[2][7] q=$abc$109383$new_n16098_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][7] i1=soc.cpu.minerva.gprf.mem._mem[2][7] q=$abc$109383$new_n16098_
 .subckt nand2_x0 i0=$abc$109383$new_n16098_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n16099_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][7] q=$abc$109383$new_n16100_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][7] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16101_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[7][7] nq=$abc$109383$new_n16100_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][7] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16101_
 .subckt nand2_x0 i0=$abc$109383$new_n16101_ i1=$abc$109383$new_n16100_ nq=$abc$109383$new_n16102_
 .subckt nand3_x0 i0=$abc$109383$new_n16102_ i1=$abc$109383$new_n16099_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16103_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][7] i1=soc.cpu.minerva.gprf.mem._mem[0][7] q=$abc$109383$new_n16104_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[4][7] i1=soc.cpu.minerva.gprf.mem._mem[0][7] q=$abc$109383$new_n16104_
 .subckt nand2_x0 i0=$abc$109383$new_n16104_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16105_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][7] q=$abc$109383$new_n16106_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][7] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n16107_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][7] nq=$abc$109383$new_n16106_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][7] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n16107_
 .subckt nand2_x0 i0=$abc$109383$new_n16107_ i1=$abc$109383$new_n16106_ nq=$abc$109383$new_n16108_
 .subckt nand3_x0 i0=$abc$109383$new_n16108_ i1=$abc$109383$new_n16105_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n16109_
-.subckt a3_x2 i0=$abc$109383$new_n16109_ i1=$abc$109383$new_n16103_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16110_
-.subckt ao22_x2 i0=$abc$109383$new_n16110_ i1=$abc$109383$new_n16096_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16111_
+.subckt and3_x1 i0=$abc$109383$new_n16109_ i1=$abc$109383$new_n16103_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16110_
+.subckt and21nor_x1 i0=$abc$109383$new_n16110_ i1=$abc$109383$new_n16096_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16111_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][7] nq=$abc$109383$new_n16112_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][7] nq=$abc$109383$new_n16113_
 .subckt buf_x4 i=$abc$109383$new_n15657_ q=$abc$109383$new_n16114_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16113_ i1=$abc$109383$new_n16112_ q=$abc$109383$new_n16115_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16113_ i1=$abc$109383$new_n16112_ q=$abc$109383$new_n16115_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][7] nq=$abc$109383$new_n16116_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][7] nq=$abc$109383$new_n16117_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16117_ i1=$abc$109383$new_n16116_ q=$abc$109383$new_n16118_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16118_ i1=$abc$109383$new_n16115_ q=$abc$109383$new_n16119_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16117_ i1=$abc$109383$new_n16116_ q=$abc$109383$new_n16118_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16118_ i1=$abc$109383$new_n16115_ q=$abc$109383$new_n16119_
 .subckt nand2_x0 i0=$abc$109383$new_n16119_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16120_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][7] i1=soc.cpu.minerva.gprf.mem._mem[24][7] q=$abc$109383$new_n16121_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][7] i1=soc.cpu.minerva.gprf.mem._mem[24][7] q=$abc$109383$new_n16121_
 .subckt nand2_x0 i0=$abc$109383$new_n16121_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16122_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][7] q=$abc$109383$new_n16123_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][7] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16124_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][7] nq=$abc$109383$new_n16123_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][7] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16124_
 .subckt nand2_x0 i0=$abc$109383$new_n16124_ i1=$abc$109383$new_n16123_ nq=$abc$109383$new_n16125_
 .subckt nand3_x0 i0=$abc$109383$new_n16125_ i1=$abc$109383$new_n16122_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n16126_
-.subckt a3_x2 i0=$abc$109383$new_n16126_ i1=$abc$109383$new_n16120_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16127_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][7] i1=soc.cpu.minerva.gprf.mem._mem[8][7] q=$abc$109383$new_n16128_
+.subckt and3_x1 i0=$abc$109383$new_n16126_ i1=$abc$109383$new_n16120_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16127_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][7] i1=soc.cpu.minerva.gprf.mem._mem[8][7] q=$abc$109383$new_n16128_
 .subckt nand2_x0 i0=$abc$109383$new_n16128_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n16129_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][7] q=$abc$109383$new_n16130_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][7] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n16131_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][7] nq=$abc$109383$new_n16130_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][7] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n16131_
 .subckt nand2_x0 i0=$abc$109383$new_n16131_ i1=$abc$109383$new_n16130_ nq=$abc$109383$new_n16132_
 .subckt nand3_x0 i0=$abc$109383$new_n16132_ i1=$abc$109383$new_n16129_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n16133_
-.subckt mx2_x2 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][7] i1=soc.cpu.minerva.gprf.mem._mem[11][7] q=$abc$109383$new_n16134_
+.subckt mux2_x1 cmd=$abc$109383$new_n15547_ i0=soc.cpu.minerva.gprf.mem._mem[15][7] i1=soc.cpu.minerva.gprf.mem._mem[11][7] q=$abc$109383$new_n16134_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n16135_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][7] i1=soc.cpu.minerva.gprf.mem._mem[10][7] q=$abc$109383$new_n16136_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16136_ i1=$abc$109383$new_n16134_ q=$abc$109383$new_n16137_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16137_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n16138_
-.subckt a2_x2 i0=$abc$109383$new_n16138_ i1=$abc$109383$new_n16133_ q=$abc$109383$new_n16139_
-.subckt ao22_x2 i0=$abc$109383$new_n16139_ i1=$abc$109383$new_n16127_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16140_
-.subckt o2_x2 i0=$abc$109383$new_n16140_ i1=$abc$109383$new_n16111_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[7]
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][8] i1=soc.cpu.minerva.gprf.mem._mem[16][8] q=$abc$109383$new_n16142_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][7] i1=soc.cpu.minerva.gprf.mem._mem[10][7] q=$abc$109383$new_n16136_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16136_ i1=$abc$109383$new_n16134_ q=$abc$109383$new_n16137_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16137_ i2=$abc$109383$new_n15642_ nq=$abc$109383$new_n16138_
+.subckt and2_x1 i0=$abc$109383$new_n16138_ i1=$abc$109383$new_n16133_ q=$abc$109383$new_n16139_
+.subckt and21nor_x1 i0=$abc$109383$new_n16139_ i1=$abc$109383$new_n16127_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16140_
+.subckt or2_x1 i0=$abc$109383$new_n16140_ i1=$abc$109383$new_n16111_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[7]
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][8] i1=soc.cpu.minerva.gprf.mem._mem[16][8] q=$abc$109383$new_n16142_
 .subckt nand2_x0 i0=$abc$109383$new_n16142_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n16143_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][8] q=$abc$109383$new_n16144_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][8] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n16145_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][8] nq=$abc$109383$new_n16144_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][8] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n16145_
 .subckt nand2_x0 i0=$abc$109383$new_n16145_ i1=$abc$109383$new_n16144_ nq=$abc$109383$new_n16146_
 .subckt nand3_x0 i0=$abc$109383$new_n16146_ i1=$abc$109383$new_n16143_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n16147_
-.subckt mx2_x2 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[23][8] i1=soc.cpu.minerva.gprf.mem._mem[19][8] q=$abc$109383$new_n16148_
-.subckt mx2_x2 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[22][8] i1=soc.cpu.minerva.gprf.mem._mem[18][8] q=$abc$109383$new_n16149_
-.subckt mx2_x2 cmd=$abc$109383$new_n15587_ i0=$abc$109383$new_n16149_ i1=$abc$109383$new_n16148_ q=$abc$109383$new_n16150_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16150_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n16151_
-.subckt a2_x2 i0=$abc$109383$new_n16151_ i1=$abc$109383$new_n16147_ q=$abc$109383$new_n16152_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][8] i1=soc.cpu.minerva.gprf.mem._mem[2][8] q=$abc$109383$new_n16153_
+.subckt mux2_x1 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[23][8] i1=soc.cpu.minerva.gprf.mem._mem[19][8] q=$abc$109383$new_n16148_
+.subckt mux2_x1 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[22][8] i1=soc.cpu.minerva.gprf.mem._mem[18][8] q=$abc$109383$new_n16149_
+.subckt mux2_x1 cmd=$abc$109383$new_n15587_ i0=$abc$109383$new_n16149_ i1=$abc$109383$new_n16148_ q=$abc$109383$new_n16150_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16150_ i2=$abc$109383$new_n15576_ nq=$abc$109383$new_n16151_
+.subckt and2_x1 i0=$abc$109383$new_n16151_ i1=$abc$109383$new_n16147_ q=$abc$109383$new_n16152_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][8] i1=soc.cpu.minerva.gprf.mem._mem[2][8] q=$abc$109383$new_n16153_
 .subckt nand2_x0 i0=$abc$109383$new_n16153_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n16154_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n16155_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n16156_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][8] q=$abc$109383$new_n16157_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][8] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16158_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][8] nq=$abc$109383$new_n16157_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][8] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16158_
 .subckt nand2_x0 i0=$abc$109383$new_n16158_ i1=$abc$109383$new_n16157_ nq=$abc$109383$new_n16159_
 .subckt nand3_x0 i0=$abc$109383$new_n16159_ i1=$abc$109383$new_n16154_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16160_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n16161_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][8] i1=soc.cpu.minerva.gprf.mem._mem[0][8] q=$abc$109383$new_n16162_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][8] i1=soc.cpu.minerva.gprf.mem._mem[0][8] q=$abc$109383$new_n16162_
 .subckt nand2_x0 i0=$abc$109383$new_n16162_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16163_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][8] q=$abc$109383$new_n16164_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][8] nq=$abc$109383$new_n16164_
 .subckt buf_x4 i=$abc$109383$new_n15686_ q=$abc$109383$new_n16165_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][8] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16166_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][8] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16166_
 .subckt nand2_x0 i0=$abc$109383$new_n16166_ i1=$abc$109383$new_n16164_ nq=$abc$109383$new_n16167_
 .subckt nand3_x0 i0=$abc$109383$new_n16167_ i1=$abc$109383$new_n16163_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n16168_
-.subckt a3_x2 i0=$abc$109383$new_n16168_ i1=$abc$109383$new_n16160_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16169_
-.subckt ao22_x2 i0=$abc$109383$new_n16169_ i1=$abc$109383$new_n16152_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16170_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][8] i1=soc.cpu.minerva.gprf.mem._mem[26][8] q=$abc$109383$new_n16171_
+.subckt and3_x1 i0=$abc$109383$new_n16168_ i1=$abc$109383$new_n16160_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16169_
+.subckt and21nor_x1 i0=$abc$109383$new_n16169_ i1=$abc$109383$new_n16152_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16170_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][8] i1=soc.cpu.minerva.gprf.mem._mem[26][8] q=$abc$109383$new_n16171_
 .subckt nand2_x0 i0=$abc$109383$new_n16171_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n16172_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][8] nq=$abc$109383$new_n16173_
-.subckt a3_x2 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n16173_ q=$abc$109383$new_n16174_
+.subckt and3_x1 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n16173_ q=$abc$109383$new_n16174_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][8] nq=$abc$109383$new_n16175_
-.subckt oa22_x2 i0=$abc$109383$new_n16175_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ q=$abc$109383$new_n16176_
-.subckt ao22_x2 i0=$abc$109383$new_n16176_ i1=$abc$109383$new_n16174_ i2=$abc$109383$new_n15611_ q=$abc$109383$new_n16177_
+.subckt or21nand_x1 i0=$abc$109383$new_n16175_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ nq=$abc$109383$new_n16176_
+.subckt and21nor_x1 i0=$abc$109383$new_n16176_ i1=$abc$109383$new_n16174_ i2=$abc$109383$new_n15611_ nq=$abc$109383$new_n16177_
 .subckt nand2_x0 i0=$abc$109383$new_n16177_ i1=$abc$109383$new_n16172_ nq=$abc$109383$new_n16178_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][8] i1=soc.cpu.minerva.gprf.mem._mem[24][8] q=$abc$109383$new_n16179_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][8] i1=soc.cpu.minerva.gprf.mem._mem[24][8] q=$abc$109383$new_n16179_
 .subckt nand2_x0 i0=$abc$109383$new_n16179_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16180_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][8] q=$abc$109383$new_n16181_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][8] nq=$abc$109383$new_n16181_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n16182_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][8] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16183_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][8] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16183_
 .subckt nand2_x0 i0=$abc$109383$new_n16183_ i1=$abc$109383$new_n16181_ nq=$abc$109383$new_n16184_
 .subckt nand3_x0 i0=$abc$109383$new_n16184_ i1=$abc$109383$new_n16180_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n16185_
-.subckt a3_x2 i0=$abc$109383$new_n16185_ i1=$abc$109383$new_n16178_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16186_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][8] i1=soc.cpu.minerva.gprf.mem._mem[8][8] q=$abc$109383$new_n16187_
+.subckt and3_x1 i0=$abc$109383$new_n16185_ i1=$abc$109383$new_n16178_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16186_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][8] i1=soc.cpu.minerva.gprf.mem._mem[8][8] q=$abc$109383$new_n16187_
 .subckt nand2_x0 i0=$abc$109383$new_n16187_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n16188_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][8] q=$abc$109383$new_n16189_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][8] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n16190_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][8] nq=$abc$109383$new_n16189_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][8] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n16190_
 .subckt nand2_x0 i0=$abc$109383$new_n16190_ i1=$abc$109383$new_n16189_ nq=$abc$109383$new_n16191_
 .subckt nand3_x0 i0=$abc$109383$new_n16191_ i1=$abc$109383$new_n16188_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n16192_
 .subckt buf_x4 i=$abc$109383$new_n15516_ q=$abc$109383$new_n16193_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][8] i1=soc.cpu.minerva.gprf.mem._mem[11][8] q=$abc$109383$new_n16194_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][8] i1=soc.cpu.minerva.gprf.mem._mem[10][8] q=$abc$109383$new_n16195_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16195_ i1=$abc$109383$new_n16194_ q=$abc$109383$new_n16196_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16196_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16197_
-.subckt a2_x2 i0=$abc$109383$new_n16197_ i1=$abc$109383$new_n16192_ q=$abc$109383$new_n16198_
-.subckt ao22_x2 i0=$abc$109383$new_n16198_ i1=$abc$109383$new_n16186_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16199_
-.subckt o2_x2 i0=$abc$109383$new_n16199_ i1=$abc$109383$new_n16170_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[8]
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][9] i1=soc.cpu.minerva.gprf.mem._mem[16][9] q=$abc$109383$new_n16201_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][8] i1=soc.cpu.minerva.gprf.mem._mem[11][8] q=$abc$109383$new_n16194_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][8] i1=soc.cpu.minerva.gprf.mem._mem[10][8] q=$abc$109383$new_n16195_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16195_ i1=$abc$109383$new_n16194_ q=$abc$109383$new_n16196_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16196_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16197_
+.subckt and2_x1 i0=$abc$109383$new_n16197_ i1=$abc$109383$new_n16192_ q=$abc$109383$new_n16198_
+.subckt and21nor_x1 i0=$abc$109383$new_n16198_ i1=$abc$109383$new_n16186_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16199_
+.subckt or2_x1 i0=$abc$109383$new_n16199_ i1=$abc$109383$new_n16170_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[8]
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][9] i1=soc.cpu.minerva.gprf.mem._mem[16][9] q=$abc$109383$new_n16201_
 .subckt nand2_x0 i0=$abc$109383$new_n16201_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n16202_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][9] q=$abc$109383$new_n16203_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][9] nq=$abc$109383$new_n16203_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n16204_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][9] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16205_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][9] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16205_
 .subckt nand2_x0 i0=$abc$109383$new_n16205_ i1=$abc$109383$new_n16203_ nq=$abc$109383$new_n16206_
 .subckt nand3_x0 i0=$abc$109383$new_n16206_ i1=$abc$109383$new_n16202_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n16207_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][9] i1=soc.cpu.minerva.gprf.mem._mem[18][9] q=$abc$109383$new_n16208_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][9] i1=soc.cpu.minerva.gprf.mem._mem[18][9] q=$abc$109383$new_n16208_
 .subckt nand2_x0 i0=$abc$109383$new_n16208_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n16209_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][9] q=$abc$109383$new_n16210_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][9] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16211_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][9] nq=$abc$109383$new_n16210_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][9] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16211_
 .subckt nand2_x0 i0=$abc$109383$new_n16211_ i1=$abc$109383$new_n16210_ nq=$abc$109383$new_n16212_
 .subckt nand3_x0 i0=$abc$109383$new_n16212_ i1=$abc$109383$new_n16209_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n16213_
-.subckt a3_x2 i0=$abc$109383$new_n16213_ i1=$abc$109383$new_n16207_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16214_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][9] i1=soc.cpu.minerva.gprf.mem._mem[2][9] q=$abc$109383$new_n16215_
+.subckt and3_x1 i0=$abc$109383$new_n16213_ i1=$abc$109383$new_n16207_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16214_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][9] i1=soc.cpu.minerva.gprf.mem._mem[2][9] q=$abc$109383$new_n16215_
 .subckt nand2_x0 i0=$abc$109383$new_n16215_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n16216_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][9] q=$abc$109383$new_n16217_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][9] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16218_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][9] nq=$abc$109383$new_n16217_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][9] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16218_
 .subckt nand2_x0 i0=$abc$109383$new_n16218_ i1=$abc$109383$new_n16217_ nq=$abc$109383$new_n16219_
 .subckt nand3_x0 i0=$abc$109383$new_n16219_ i1=$abc$109383$new_n16216_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16220_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][9] i1=soc.cpu.minerva.gprf.mem._mem[0][9] q=$abc$109383$new_n16221_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][9] i1=soc.cpu.minerva.gprf.mem._mem[0][9] q=$abc$109383$new_n16221_
 .subckt nand2_x0 i0=$abc$109383$new_n16221_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16222_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][9] q=$abc$109383$new_n16223_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][9] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16224_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][9] nq=$abc$109383$new_n16223_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][9] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16224_
 .subckt nand2_x0 i0=$abc$109383$new_n16224_ i1=$abc$109383$new_n16223_ nq=$abc$109383$new_n16225_
 .subckt nand3_x0 i0=$abc$109383$new_n16225_ i1=$abc$109383$new_n16222_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n16226_
-.subckt a3_x2 i0=$abc$109383$new_n16226_ i1=$abc$109383$new_n16220_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16227_
-.subckt ao22_x2 i0=$abc$109383$new_n16227_ i1=$abc$109383$new_n16214_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16228_
+.subckt and3_x1 i0=$abc$109383$new_n16226_ i1=$abc$109383$new_n16220_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16227_
+.subckt and21nor_x1 i0=$abc$109383$new_n16227_ i1=$abc$109383$new_n16214_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16228_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][9] nq=$abc$109383$new_n16229_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][9] nq=$abc$109383$new_n16230_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16230_ i1=$abc$109383$new_n16229_ q=$abc$109383$new_n16231_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16230_ i1=$abc$109383$new_n16229_ q=$abc$109383$new_n16231_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][9] nq=$abc$109383$new_n16232_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][9] nq=$abc$109383$new_n16233_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16233_ i1=$abc$109383$new_n16232_ q=$abc$109383$new_n16234_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16234_ i1=$abc$109383$new_n16231_ q=$abc$109383$new_n16235_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16233_ i1=$abc$109383$new_n16232_ q=$abc$109383$new_n16234_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16234_ i1=$abc$109383$new_n16231_ q=$abc$109383$new_n16235_
 .subckt nand2_x0 i0=$abc$109383$new_n16235_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16236_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][9] i1=soc.cpu.minerva.gprf.mem._mem[24][9] q=$abc$109383$new_n16237_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=soc.cpu.minerva.gprf.mem._mem[28][9] i1=soc.cpu.minerva.gprf.mem._mem[24][9] q=$abc$109383$new_n16237_
 .subckt nand2_x0 i0=$abc$109383$new_n16237_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16238_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][9] q=$abc$109383$new_n16239_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][9] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16240_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[29][9] nq=$abc$109383$new_n16239_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][9] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16240_
 .subckt nand2_x0 i0=$abc$109383$new_n16240_ i1=$abc$109383$new_n16239_ nq=$abc$109383$new_n16241_
 .subckt nand3_x0 i0=$abc$109383$new_n16241_ i1=$abc$109383$new_n16238_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n16242_
-.subckt a3_x2 i0=$abc$109383$new_n16242_ i1=$abc$109383$new_n16236_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16243_
+.subckt and3_x1 i0=$abc$109383$new_n16242_ i1=$abc$109383$new_n16236_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16243_
 .subckt buf_x4 i=$abc$109383$new_n15509_ q=$abc$109383$new_n16244_
 .subckt buf_x4 i=$abc$109383$new_n15536_ q=$abc$109383$new_n16245_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][9] i1=soc.cpu.minerva.gprf.mem._mem[8][9] q=$abc$109383$new_n16246_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][9] i1=soc.cpu.minerva.gprf.mem._mem[8][9] q=$abc$109383$new_n16246_
 .subckt nand2_x0 i0=$abc$109383$new_n16246_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16247_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][9] q=$abc$109383$new_n16248_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][9] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n16249_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][9] nq=$abc$109383$new_n16248_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][9] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n16249_
 .subckt nand2_x0 i0=$abc$109383$new_n16249_ i1=$abc$109383$new_n16248_ nq=$abc$109383$new_n16250_
 .subckt nand3_x0 i0=$abc$109383$new_n16250_ i1=$abc$109383$new_n16247_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16251_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][9] i1=soc.cpu.minerva.gprf.mem._mem[11][9] q=$abc$109383$new_n16252_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][9] i1=soc.cpu.minerva.gprf.mem._mem[10][9] q=$abc$109383$new_n16253_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16253_ i1=$abc$109383$new_n16252_ q=$abc$109383$new_n16254_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16254_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16255_
-.subckt a2_x2 i0=$abc$109383$new_n16255_ i1=$abc$109383$new_n16251_ q=$abc$109383$new_n16256_
-.subckt ao22_x2 i0=$abc$109383$new_n16256_ i1=$abc$109383$new_n16243_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16257_
-.subckt o2_x2 i0=$abc$109383$new_n16257_ i1=$abc$109383$new_n16228_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[9]
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][9] i1=soc.cpu.minerva.gprf.mem._mem[11][9] q=$abc$109383$new_n16252_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][9] i1=soc.cpu.minerva.gprf.mem._mem[10][9] q=$abc$109383$new_n16253_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16253_ i1=$abc$109383$new_n16252_ q=$abc$109383$new_n16254_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16254_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16255_
+.subckt and2_x1 i0=$abc$109383$new_n16255_ i1=$abc$109383$new_n16251_ q=$abc$109383$new_n16256_
+.subckt and21nor_x1 i0=$abc$109383$new_n16256_ i1=$abc$109383$new_n16243_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16257_
+.subckt or2_x1 i0=$abc$109383$new_n16257_ i1=$abc$109383$new_n16228_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[9]
 .subckt buf_x4 i=$abc$109383$new_n15677_ q=$abc$109383$new_n16259_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n16260_
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][10] i1=soc.cpu.minerva.gprf.mem._mem[16][10] q=$abc$109383$new_n16261_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][10] i1=soc.cpu.minerva.gprf.mem._mem[16][10] q=$abc$109383$new_n16261_
 .subckt nand2_x0 i0=$abc$109383$new_n16261_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16262_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n16263_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n16264_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][10] q=$abc$109383$new_n16265_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][10] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16266_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][10] nq=$abc$109383$new_n16265_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][10] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16266_
 .subckt nand2_x0 i0=$abc$109383$new_n16266_ i1=$abc$109383$new_n16265_ nq=$abc$109383$new_n16267_
 .subckt nand3_x0 i0=$abc$109383$new_n16267_ i1=$abc$109383$new_n16262_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16268_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][10] i1=soc.cpu.minerva.gprf.mem._mem[18][10] q=$abc$109383$new_n16269_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][10] i1=soc.cpu.minerva.gprf.mem._mem[18][10] q=$abc$109383$new_n16269_
 .subckt nand2_x0 i0=$abc$109383$new_n16269_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n16270_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][10] q=$abc$109383$new_n16271_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[23][10] nq=$abc$109383$new_n16271_
 .subckt buf_x4 i=$abc$109383$new_n15668_ q=$abc$109383$new_n16272_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][10] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16273_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][10] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16273_
 .subckt nand2_x0 i0=$abc$109383$new_n16273_ i1=$abc$109383$new_n16271_ nq=$abc$109383$new_n16274_
 .subckt nand3_x0 i0=$abc$109383$new_n16274_ i1=$abc$109383$new_n16270_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n16275_
-.subckt a3_x2 i0=$abc$109383$new_n16275_ i1=$abc$109383$new_n16268_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16276_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][10] i1=soc.cpu.minerva.gprf.mem._mem[2][10] q=$abc$109383$new_n16277_
+.subckt and3_x1 i0=$abc$109383$new_n16275_ i1=$abc$109383$new_n16268_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16276_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][10] i1=soc.cpu.minerva.gprf.mem._mem[2][10] q=$abc$109383$new_n16277_
 .subckt nand2_x0 i0=$abc$109383$new_n16277_ i1=$abc$109383$new_n15545_ nq=$abc$109383$new_n16278_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][10] q=$abc$109383$new_n16279_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][10] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16280_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][10] nq=$abc$109383$new_n16279_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][10] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16280_
 .subckt nand2_x0 i0=$abc$109383$new_n16280_ i1=$abc$109383$new_n16279_ nq=$abc$109383$new_n16281_
 .subckt nand3_x0 i0=$abc$109383$new_n16281_ i1=$abc$109383$new_n16278_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16282_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][10] i1=soc.cpu.minerva.gprf.mem._mem[0][10] q=$abc$109383$new_n16283_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][10] i1=soc.cpu.minerva.gprf.mem._mem[0][10] q=$abc$109383$new_n16283_
 .subckt nand2_x0 i0=$abc$109383$new_n16283_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16284_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][10] q=$abc$109383$new_n16285_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][10] nq=$abc$109383$new_n16285_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n16286_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][10] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16287_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][10] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16287_
 .subckt nand2_x0 i0=$abc$109383$new_n16287_ i1=$abc$109383$new_n16285_ nq=$abc$109383$new_n16288_
 .subckt nand3_x0 i0=$abc$109383$new_n16288_ i1=$abc$109383$new_n16284_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n16289_
-.subckt a3_x2 i0=$abc$109383$new_n16289_ i1=$abc$109383$new_n16282_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16290_
-.subckt ao22_x2 i0=$abc$109383$new_n16290_ i1=$abc$109383$new_n16276_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16291_
+.subckt and3_x1 i0=$abc$109383$new_n16289_ i1=$abc$109383$new_n16282_ i2=$abc$109383$new_n15517_ q=$abc$109383$new_n16290_
+.subckt and21nor_x1 i0=$abc$109383$new_n16290_ i1=$abc$109383$new_n16276_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16291_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][10] nq=$abc$109383$new_n16292_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][10] nq=$abc$109383$new_n16293_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16293_ i1=$abc$109383$new_n16292_ q=$abc$109383$new_n16294_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16293_ i1=$abc$109383$new_n16292_ q=$abc$109383$new_n16294_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][10] nq=$abc$109383$new_n16295_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][10] nq=$abc$109383$new_n16296_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16296_ i1=$abc$109383$new_n16295_ q=$abc$109383$new_n16297_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16297_ i1=$abc$109383$new_n16294_ q=$abc$109383$new_n16298_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16296_ i1=$abc$109383$new_n16295_ q=$abc$109383$new_n16297_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16297_ i1=$abc$109383$new_n16294_ q=$abc$109383$new_n16298_
 .subckt nand2_x0 i0=$abc$109383$new_n16298_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16299_
 .subckt buf_x4 i=$abc$109383$new_n15584_ q=$abc$109383$new_n16300_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][10] i1=soc.cpu.minerva.gprf.mem._mem[24][10] q=$abc$109383$new_n16301_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][10] i1=soc.cpu.minerva.gprf.mem._mem[24][10] q=$abc$109383$new_n16301_
 .subckt nand2_x0 i0=$abc$109383$new_n16301_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16302_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n16303_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n16304_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][10] q=$abc$109383$new_n16305_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][10] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16306_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][10] nq=$abc$109383$new_n16305_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][10] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16306_
 .subckt nand2_x0 i0=$abc$109383$new_n16306_ i1=$abc$109383$new_n16305_ nq=$abc$109383$new_n16307_
 .subckt nand3_x0 i0=$abc$109383$new_n16307_ i1=$abc$109383$new_n16302_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n16308_
-.subckt a3_x2 i0=$abc$109383$new_n16308_ i1=$abc$109383$new_n16299_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16309_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][10] i1=soc.cpu.minerva.gprf.mem._mem[8][10] q=$abc$109383$new_n16310_
+.subckt and3_x1 i0=$abc$109383$new_n16308_ i1=$abc$109383$new_n16299_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16309_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][10] i1=soc.cpu.minerva.gprf.mem._mem[8][10] q=$abc$109383$new_n16310_
 .subckt nand2_x0 i0=$abc$109383$new_n16310_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16311_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][10] q=$abc$109383$new_n16312_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][10] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n16313_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][10] nq=$abc$109383$new_n16312_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][10] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n16313_
 .subckt nand2_x0 i0=$abc$109383$new_n16313_ i1=$abc$109383$new_n16312_ nq=$abc$109383$new_n16314_
 .subckt nand3_x0 i0=$abc$109383$new_n16314_ i1=$abc$109383$new_n16311_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16315_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][10] i1=soc.cpu.minerva.gprf.mem._mem[11][10] q=$abc$109383$new_n16316_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][10] i1=soc.cpu.minerva.gprf.mem._mem[10][10] q=$abc$109383$new_n16317_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16317_ i1=$abc$109383$new_n16316_ q=$abc$109383$new_n16318_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][10] i1=soc.cpu.minerva.gprf.mem._mem[11][10] q=$abc$109383$new_n16316_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][10] i1=soc.cpu.minerva.gprf.mem._mem[10][10] q=$abc$109383$new_n16317_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16317_ i1=$abc$109383$new_n16316_ q=$abc$109383$new_n16318_
 .subckt buf_x4 i=$abc$109383$new_n15509_ q=$abc$109383$new_n16319_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16318_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16320_
-.subckt a2_x2 i0=$abc$109383$new_n16320_ i1=$abc$109383$new_n16315_ q=$abc$109383$new_n16321_
-.subckt ao22_x2 i0=$abc$109383$new_n16321_ i1=$abc$109383$new_n16309_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16322_
-.subckt o2_x2 i0=$abc$109383$new_n16322_ i1=$abc$109383$new_n16291_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[10]
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][11] i1=soc.cpu.minerva.gprf.mem._mem[16][11] q=$abc$109383$new_n16324_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16318_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16320_
+.subckt and2_x1 i0=$abc$109383$new_n16320_ i1=$abc$109383$new_n16315_ q=$abc$109383$new_n16321_
+.subckt and21nor_x1 i0=$abc$109383$new_n16321_ i1=$abc$109383$new_n16309_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16322_
+.subckt or2_x1 i0=$abc$109383$new_n16322_ i1=$abc$109383$new_n16291_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[10]
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][11] i1=soc.cpu.minerva.gprf.mem._mem[16][11] q=$abc$109383$new_n16324_
 .subckt nand2_x0 i0=$abc$109383$new_n16324_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16325_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][11] q=$abc$109383$new_n16326_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][11] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16327_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][11] nq=$abc$109383$new_n16326_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][11] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16327_
 .subckt nand2_x0 i0=$abc$109383$new_n16327_ i1=$abc$109383$new_n16326_ nq=$abc$109383$new_n16328_
 .subckt nand3_x0 i0=$abc$109383$new_n16328_ i1=$abc$109383$new_n16325_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16329_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n16330_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][11] i1=soc.cpu.minerva.gprf.mem._mem[18][11] q=$abc$109383$new_n16331_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][11] i1=soc.cpu.minerva.gprf.mem._mem[18][11] q=$abc$109383$new_n16331_
 .subckt nand2_x0 i0=$abc$109383$new_n16331_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16332_
 .subckt buf_x4 i=$abc$109383$new_n15662_ q=$abc$109383$new_n16333_
 .subckt buf_x4 i=$abc$109383$new_n15664_ q=$abc$109383$new_n16334_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][11] q=$abc$109383$new_n16335_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][11] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16336_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][11] nq=$abc$109383$new_n16335_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][11] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16336_
 .subckt nand2_x0 i0=$abc$109383$new_n16336_ i1=$abc$109383$new_n16335_ nq=$abc$109383$new_n16337_
 .subckt nand3_x0 i0=$abc$109383$new_n16337_ i1=$abc$109383$new_n16332_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n16338_
-.subckt a3_x2 i0=$abc$109383$new_n16338_ i1=$abc$109383$new_n16329_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16339_
+.subckt and3_x1 i0=$abc$109383$new_n16338_ i1=$abc$109383$new_n16329_ i2=$abc$109383$new_n15577_ q=$abc$109383$new_n16339_
 .subckt buf_x4 i=$abc$109383$new_n15516_ q=$abc$109383$new_n16340_
 .subckt buf_x4 i=$abc$109383$new_n15544_ q=$abc$109383$new_n16341_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][11] i1=soc.cpu.minerva.gprf.mem._mem[2][11] q=$abc$109383$new_n16342_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][11] i1=soc.cpu.minerva.gprf.mem._mem[2][11] q=$abc$109383$new_n16342_
 .subckt nand2_x0 i0=$abc$109383$new_n16342_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16343_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][11] q=$abc$109383$new_n16344_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][11] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16345_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][11] nq=$abc$109383$new_n16344_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][11] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16345_
 .subckt nand2_x0 i0=$abc$109383$new_n16345_ i1=$abc$109383$new_n16344_ nq=$abc$109383$new_n16346_
 .subckt nand3_x0 i0=$abc$109383$new_n16346_ i1=$abc$109383$new_n16343_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16347_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][11] i1=soc.cpu.minerva.gprf.mem._mem[0][11] q=$abc$109383$new_n16348_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][11] i1=soc.cpu.minerva.gprf.mem._mem[0][11] q=$abc$109383$new_n16348_
 .subckt nand2_x0 i0=$abc$109383$new_n16348_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16349_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][11] q=$abc$109383$new_n16350_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][11] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16351_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[5][11] nq=$abc$109383$new_n16350_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][11] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16351_
 .subckt nand2_x0 i0=$abc$109383$new_n16351_ i1=$abc$109383$new_n16350_ nq=$abc$109383$new_n16352_
 .subckt nand3_x0 i0=$abc$109383$new_n16352_ i1=$abc$109383$new_n16349_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n16353_
-.subckt a3_x2 i0=$abc$109383$new_n16353_ i1=$abc$109383$new_n16347_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16354_
-.subckt ao22_x2 i0=$abc$109383$new_n16354_ i1=$abc$109383$new_n16339_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16355_
+.subckt and3_x1 i0=$abc$109383$new_n16353_ i1=$abc$109383$new_n16347_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16354_
+.subckt and21nor_x1 i0=$abc$109383$new_n16354_ i1=$abc$109383$new_n16339_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16355_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][11] nq=$abc$109383$new_n16356_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][11] nq=$abc$109383$new_n16357_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16357_ i1=$abc$109383$new_n16356_ q=$abc$109383$new_n16358_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16357_ i1=$abc$109383$new_n16356_ q=$abc$109383$new_n16358_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][11] nq=$abc$109383$new_n16359_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][11] nq=$abc$109383$new_n16360_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16360_ i1=$abc$109383$new_n16359_ q=$abc$109383$new_n16361_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16361_ i1=$abc$109383$new_n16358_ q=$abc$109383$new_n16362_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16360_ i1=$abc$109383$new_n16359_ q=$abc$109383$new_n16361_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16361_ i1=$abc$109383$new_n16358_ q=$abc$109383$new_n16362_
 .subckt nand2_x0 i0=$abc$109383$new_n16362_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16363_
 .subckt buf_x4 i=$abc$109383$new_n15677_ q=$abc$109383$new_n16364_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][11] i1=soc.cpu.minerva.gprf.mem._mem[24][11] q=$abc$109383$new_n16365_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][11] i1=soc.cpu.minerva.gprf.mem._mem[24][11] q=$abc$109383$new_n16365_
 .subckt nand2_x0 i0=$abc$109383$new_n16365_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16366_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][11] q=$abc$109383$new_n16367_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][11] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16368_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][11] nq=$abc$109383$new_n16367_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][11] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16368_
 .subckt nand2_x0 i0=$abc$109383$new_n16368_ i1=$abc$109383$new_n16367_ nq=$abc$109383$new_n16369_
 .subckt nand3_x0 i0=$abc$109383$new_n16369_ i1=$abc$109383$new_n16366_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16370_
-.subckt a3_x2 i0=$abc$109383$new_n16370_ i1=$abc$109383$new_n16363_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16371_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][11] i1=soc.cpu.minerva.gprf.mem._mem[8][11] q=$abc$109383$new_n16372_
+.subckt and3_x1 i0=$abc$109383$new_n16370_ i1=$abc$109383$new_n16363_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16371_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[12][11] i1=soc.cpu.minerva.gprf.mem._mem[8][11] q=$abc$109383$new_n16372_
 .subckt nand2_x0 i0=$abc$109383$new_n16372_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16373_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][11] q=$abc$109383$new_n16374_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][11] nq=$abc$109383$new_n16374_
 .subckt buf_x4 i=$abc$109383$new_n15564_ q=$abc$109383$new_n16375_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][11] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16376_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][11] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16376_
 .subckt nand2_x0 i0=$abc$109383$new_n16376_ i1=$abc$109383$new_n16374_ nq=$abc$109383$new_n16377_
 .subckt nand3_x0 i0=$abc$109383$new_n16377_ i1=$abc$109383$new_n16373_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16378_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][11] i1=soc.cpu.minerva.gprf.mem._mem[11][11] q=$abc$109383$new_n16379_
-.subckt mx2_x2 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][11] i1=soc.cpu.minerva.gprf.mem._mem[10][11] q=$abc$109383$new_n16380_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[15][11] i1=soc.cpu.minerva.gprf.mem._mem[11][11] q=$abc$109383$new_n16379_
+.subckt mux2_x1 cmd=$abc$109383$new_n16135_ i0=soc.cpu.minerva.gprf.mem._mem[14][11] i1=soc.cpu.minerva.gprf.mem._mem[10][11] q=$abc$109383$new_n16380_
 .subckt buf_x4 i=$abc$109383$new_n15563_ q=$abc$109383$new_n16381_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16380_ i1=$abc$109383$new_n16379_ q=$abc$109383$new_n16382_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16382_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16383_
-.subckt a2_x2 i0=$abc$109383$new_n16383_ i1=$abc$109383$new_n16378_ q=$abc$109383$new_n16384_
-.subckt ao22_x2 i0=$abc$109383$new_n16384_ i1=$abc$109383$new_n16371_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16385_
-.subckt o2_x2 i0=$abc$109383$new_n16385_ i1=$abc$109383$new_n16355_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[11]
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][12] i1=soc.cpu.minerva.gprf.mem._mem[16][12] q=$abc$109383$new_n16387_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16380_ i1=$abc$109383$new_n16379_ q=$abc$109383$new_n16382_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16382_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16383_
+.subckt and2_x1 i0=$abc$109383$new_n16383_ i1=$abc$109383$new_n16378_ q=$abc$109383$new_n16384_
+.subckt and21nor_x1 i0=$abc$109383$new_n16384_ i1=$abc$109383$new_n16371_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16385_
+.subckt or2_x1 i0=$abc$109383$new_n16385_ i1=$abc$109383$new_n16355_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[11]
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][12] i1=soc.cpu.minerva.gprf.mem._mem[16][12] q=$abc$109383$new_n16387_
 .subckt nand2_x0 i0=$abc$109383$new_n16387_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n16388_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][12] q=$abc$109383$new_n16389_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][12] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n16390_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][12] nq=$abc$109383$new_n16389_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][12] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n16390_
 .subckt nand2_x0 i0=$abc$109383$new_n16390_ i1=$abc$109383$new_n16389_ nq=$abc$109383$new_n16391_
 .subckt nand3_x0 i0=$abc$109383$new_n16391_ i1=$abc$109383$new_n16388_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n16392_
-.subckt mx2_x2 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[23][12] i1=soc.cpu.minerva.gprf.mem._mem[19][12] q=$abc$109383$new_n16393_
-.subckt mx2_x2 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[22][12] i1=soc.cpu.minerva.gprf.mem._mem[18][12] q=$abc$109383$new_n16394_
-.subckt mx2_x2 cmd=$abc$109383$new_n15587_ i0=$abc$109383$new_n16394_ i1=$abc$109383$new_n16393_ q=$abc$109383$new_n16395_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16395_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n16396_
-.subckt a2_x2 i0=$abc$109383$new_n16396_ i1=$abc$109383$new_n16392_ q=$abc$109383$new_n16397_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][12] i1=soc.cpu.minerva.gprf.mem._mem[2][12] q=$abc$109383$new_n16398_
+.subckt mux2_x1 cmd=$abc$109383$new_n15584_ i0=soc.cpu.minerva.gprf.mem._mem[23][12] i1=soc.cpu.minerva.gprf.mem._mem[19][12] q=$abc$109383$new_n16393_
+.subckt mux2_x1 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[22][12] i1=soc.cpu.minerva.gprf.mem._mem[18][12] q=$abc$109383$new_n16394_
+.subckt mux2_x1 cmd=$abc$109383$new_n15587_ i0=$abc$109383$new_n16394_ i1=$abc$109383$new_n16393_ q=$abc$109383$new_n16395_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16395_ i2=$abc$109383$new_n15576_ nq=$abc$109383$new_n16396_
+.subckt and2_x1 i0=$abc$109383$new_n16396_ i1=$abc$109383$new_n16392_ q=$abc$109383$new_n16397_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][12] i1=soc.cpu.minerva.gprf.mem._mem[2][12] q=$abc$109383$new_n16398_
 .subckt nand2_x0 i0=$abc$109383$new_n16398_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16399_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][12] q=$abc$109383$new_n16400_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][12] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16401_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][12] nq=$abc$109383$new_n16400_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][12] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16401_
 .subckt nand2_x0 i0=$abc$109383$new_n16401_ i1=$abc$109383$new_n16400_ nq=$abc$109383$new_n16402_
 .subckt nand3_x0 i0=$abc$109383$new_n16402_ i1=$abc$109383$new_n16399_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16403_
 .subckt buf_x4 i=$abc$109383$new_n15677_ q=$abc$109383$new_n16404_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][12] i1=soc.cpu.minerva.gprf.mem._mem[0][12] q=$abc$109383$new_n16405_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][12] i1=soc.cpu.minerva.gprf.mem._mem[0][12] q=$abc$109383$new_n16405_
 .subckt nand2_x0 i0=$abc$109383$new_n16405_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16406_
 .subckt buf_x4 i=$abc$109383$new_n15555_ q=$abc$109383$new_n16407_
 .subckt buf_x4 i=$abc$109383$new_n15559_ q=$abc$109383$new_n16408_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][12] q=$abc$109383$new_n16409_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][12] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16410_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][12] nq=$abc$109383$new_n16409_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][12] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16410_
 .subckt nand2_x0 i0=$abc$109383$new_n16410_ i1=$abc$109383$new_n16409_ nq=$abc$109383$new_n16411_
 .subckt nand3_x0 i0=$abc$109383$new_n16411_ i1=$abc$109383$new_n16406_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16412_
-.subckt a3_x2 i0=$abc$109383$new_n16412_ i1=$abc$109383$new_n16403_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16413_
-.subckt ao22_x2 i0=$abc$109383$new_n16413_ i1=$abc$109383$new_n16397_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16414_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][12] i1=soc.cpu.minerva.gprf.mem._mem[26][12] q=$abc$109383$new_n16415_
+.subckt and3_x1 i0=$abc$109383$new_n16412_ i1=$abc$109383$new_n16403_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16413_
+.subckt and21nor_x1 i0=$abc$109383$new_n16413_ i1=$abc$109383$new_n16397_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16414_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][12] i1=soc.cpu.minerva.gprf.mem._mem[26][12] q=$abc$109383$new_n16415_
 .subckt nand2_x0 i0=$abc$109383$new_n16415_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n16416_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][12] nq=$abc$109383$new_n16417_
-.subckt a3_x2 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n16417_ q=$abc$109383$new_n16418_
+.subckt and3_x1 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n16417_ q=$abc$109383$new_n16418_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][12] nq=$abc$109383$new_n16419_
-.subckt oa22_x2 i0=$abc$109383$new_n16419_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ q=$abc$109383$new_n16420_
-.subckt ao22_x2 i0=$abc$109383$new_n16420_ i1=$abc$109383$new_n16418_ i2=$abc$109383$new_n15611_ q=$abc$109383$new_n16421_
+.subckt or21nand_x1 i0=$abc$109383$new_n16419_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ nq=$abc$109383$new_n16420_
+.subckt and21nor_x1 i0=$abc$109383$new_n16420_ i1=$abc$109383$new_n16418_ i2=$abc$109383$new_n15611_ nq=$abc$109383$new_n16421_
 .subckt nand2_x0 i0=$abc$109383$new_n16421_ i1=$abc$109383$new_n16416_ nq=$abc$109383$new_n16422_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][12] i1=soc.cpu.minerva.gprf.mem._mem[24][12] q=$abc$109383$new_n16423_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][12] i1=soc.cpu.minerva.gprf.mem._mem[24][12] q=$abc$109383$new_n16423_
 .subckt nand2_x0 i0=$abc$109383$new_n16423_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16424_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][12] q=$abc$109383$new_n16425_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][12] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16426_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][12] nq=$abc$109383$new_n16425_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][12] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16426_
 .subckt nand2_x0 i0=$abc$109383$new_n16426_ i1=$abc$109383$new_n16425_ nq=$abc$109383$new_n16427_
 .subckt nand3_x0 i0=$abc$109383$new_n16427_ i1=$abc$109383$new_n16424_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16428_
-.subckt a3_x2 i0=$abc$109383$new_n16428_ i1=$abc$109383$new_n16422_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16429_
+.subckt and3_x1 i0=$abc$109383$new_n16428_ i1=$abc$109383$new_n16422_ i2=$abc$109383$new_n15614_ q=$abc$109383$new_n16429_
 .subckt buf_x4 i=$abc$109383$new_n15547_ q=$abc$109383$new_n16430_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][12] i1=soc.cpu.minerva.gprf.mem._mem[8][12] q=$abc$109383$new_n16431_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][12] i1=soc.cpu.minerva.gprf.mem._mem[8][12] q=$abc$109383$new_n16431_
 .subckt nand2_x0 i0=$abc$109383$new_n16431_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16432_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][12] q=$abc$109383$new_n16433_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][12] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16434_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][12] nq=$abc$109383$new_n16433_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][12] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16434_
 .subckt nand2_x0 i0=$abc$109383$new_n16434_ i1=$abc$109383$new_n16433_ nq=$abc$109383$new_n16435_
 .subckt nand3_x0 i0=$abc$109383$new_n16435_ i1=$abc$109383$new_n16432_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16436_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n16437_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][12] i1=soc.cpu.minerva.gprf.mem._mem[11][12] q=$abc$109383$new_n16438_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][12] i1=soc.cpu.minerva.gprf.mem._mem[10][12] q=$abc$109383$new_n16439_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16439_ i1=$abc$109383$new_n16438_ q=$abc$109383$new_n16440_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16440_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16441_
-.subckt a2_x2 i0=$abc$109383$new_n16441_ i1=$abc$109383$new_n16436_ q=$abc$109383$new_n16442_
-.subckt ao22_x2 i0=$abc$109383$new_n16442_ i1=$abc$109383$new_n16429_ i2=$abc$109383$new_n15521_ q=$abc$109383$new_n16443_
-.subckt o2_x2 i0=$abc$109383$new_n16443_ i1=$abc$109383$new_n16414_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[12]
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][12] i1=soc.cpu.minerva.gprf.mem._mem[11][12] q=$abc$109383$new_n16438_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][12] i1=soc.cpu.minerva.gprf.mem._mem[10][12] q=$abc$109383$new_n16439_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16439_ i1=$abc$109383$new_n16438_ q=$abc$109383$new_n16440_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16440_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16441_
+.subckt and2_x1 i0=$abc$109383$new_n16441_ i1=$abc$109383$new_n16436_ q=$abc$109383$new_n16442_
+.subckt and21nor_x1 i0=$abc$109383$new_n16442_ i1=$abc$109383$new_n16429_ i2=$abc$109383$new_n15521_ nq=$abc$109383$new_n16443_
+.subckt or2_x1 i0=$abc$109383$new_n16443_ i1=$abc$109383$new_n16414_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[12]
 .subckt buf_x4 i=$abc$109383$new_n15576_ q=$abc$109383$new_n16445_
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][13] i1=soc.cpu.minerva.gprf.mem._mem[16][13] q=$abc$109383$new_n16446_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=soc.cpu.minerva.gprf.mem._mem[20][13] i1=soc.cpu.minerva.gprf.mem._mem[16][13] q=$abc$109383$new_n16446_
 .subckt nand2_x0 i0=$abc$109383$new_n16446_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16447_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][13] q=$abc$109383$new_n16448_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][13] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16449_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][13] nq=$abc$109383$new_n16448_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][13] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16449_
 .subckt nand2_x0 i0=$abc$109383$new_n16449_ i1=$abc$109383$new_n16448_ nq=$abc$109383$new_n16450_
 .subckt nand3_x0 i0=$abc$109383$new_n16450_ i1=$abc$109383$new_n16447_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16451_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][13] i1=soc.cpu.minerva.gprf.mem._mem[18][13] q=$abc$109383$new_n16452_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[22][13] i1=soc.cpu.minerva.gprf.mem._mem[18][13] q=$abc$109383$new_n16452_
 .subckt nand2_x0 i0=$abc$109383$new_n16452_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16453_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][13] q=$abc$109383$new_n16454_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][13] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16455_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][13] nq=$abc$109383$new_n16454_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][13] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16455_
 .subckt nand2_x0 i0=$abc$109383$new_n16455_ i1=$abc$109383$new_n16454_ nq=$abc$109383$new_n16456_
 .subckt nand3_x0 i0=$abc$109383$new_n16456_ i1=$abc$109383$new_n16453_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n16457_
-.subckt a3_x2 i0=$abc$109383$new_n16457_ i1=$abc$109383$new_n16451_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16458_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][13] i1=soc.cpu.minerva.gprf.mem._mem[2][13] q=$abc$109383$new_n16459_
+.subckt and3_x1 i0=$abc$109383$new_n16457_ i1=$abc$109383$new_n16451_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16458_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][13] i1=soc.cpu.minerva.gprf.mem._mem[2][13] q=$abc$109383$new_n16459_
 .subckt nand2_x0 i0=$abc$109383$new_n16459_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16460_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][13] q=$abc$109383$new_n16461_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][13] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16462_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][13] nq=$abc$109383$new_n16461_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][13] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16462_
 .subckt nand2_x0 i0=$abc$109383$new_n16462_ i1=$abc$109383$new_n16461_ nq=$abc$109383$new_n16463_
 .subckt nand3_x0 i0=$abc$109383$new_n16463_ i1=$abc$109383$new_n16460_ i2=$abc$109383$new_n15706_ nq=$abc$109383$new_n16464_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][13] i1=soc.cpu.minerva.gprf.mem._mem[0][13] q=$abc$109383$new_n16465_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][13] i1=soc.cpu.minerva.gprf.mem._mem[0][13] q=$abc$109383$new_n16465_
 .subckt nand2_x0 i0=$abc$109383$new_n16465_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16466_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][13] q=$abc$109383$new_n16467_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][13] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16468_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][13] nq=$abc$109383$new_n16467_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][13] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16468_
 .subckt nand2_x0 i0=$abc$109383$new_n16468_ i1=$abc$109383$new_n16467_ nq=$abc$109383$new_n16469_
 .subckt nand3_x0 i0=$abc$109383$new_n16469_ i1=$abc$109383$new_n16466_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16470_
-.subckt a3_x2 i0=$abc$109383$new_n16470_ i1=$abc$109383$new_n16464_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16471_
-.subckt ao22_x2 i0=$abc$109383$new_n16471_ i1=$abc$109383$new_n16458_ i2=$abc$109383$new_n15676_ q=$abc$109383$new_n16472_
+.subckt and3_x1 i0=$abc$109383$new_n16470_ i1=$abc$109383$new_n16464_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16471_
+.subckt and21nor_x1 i0=$abc$109383$new_n16471_ i1=$abc$109383$new_n16458_ i2=$abc$109383$new_n15676_ nq=$abc$109383$new_n16472_
 .subckt buf_x4 i=$abc$109383$new_n15520_ q=$abc$109383$new_n16473_
 .subckt buf_x4 i=$abc$109383$new_n15576_ q=$abc$109383$new_n16474_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][13] nq=$abc$109383$new_n16475_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][13] nq=$abc$109383$new_n16476_
-.subckt mx2_x2 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16476_ i1=$abc$109383$new_n16475_ q=$abc$109383$new_n16477_
+.subckt mux2_x1 cmd=$abc$109383$new_n16114_ i0=$abc$109383$new_n16476_ i1=$abc$109383$new_n16475_ q=$abc$109383$new_n16477_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][13] nq=$abc$109383$new_n16478_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][13] nq=$abc$109383$new_n16479_
 .subckt buf_x4 i=$abc$109383$new_n15657_ q=$abc$109383$new_n16480_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16479_ i1=$abc$109383$new_n16478_ q=$abc$109383$new_n16481_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16481_ i1=$abc$109383$new_n16477_ q=$abc$109383$new_n16482_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16479_ i1=$abc$109383$new_n16478_ q=$abc$109383$new_n16481_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16481_ i1=$abc$109383$new_n16477_ q=$abc$109383$new_n16482_
 .subckt nand2_x0 i0=$abc$109383$new_n16482_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16483_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][13] i1=soc.cpu.minerva.gprf.mem._mem[24][13] q=$abc$109383$new_n16484_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][13] i1=soc.cpu.minerva.gprf.mem._mem[24][13] q=$abc$109383$new_n16484_
 .subckt nand2_x0 i0=$abc$109383$new_n16484_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16485_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][13] q=$abc$109383$new_n16486_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][13] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16487_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][13] nq=$abc$109383$new_n16486_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][13] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16487_
 .subckt nand2_x0 i0=$abc$109383$new_n16487_ i1=$abc$109383$new_n16486_ nq=$abc$109383$new_n16488_
 .subckt nand3_x0 i0=$abc$109383$new_n16488_ i1=$abc$109383$new_n16485_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16489_
-.subckt a3_x2 i0=$abc$109383$new_n16489_ i1=$abc$109383$new_n16483_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16490_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][13] i1=soc.cpu.minerva.gprf.mem._mem[8][13] q=$abc$109383$new_n16491_
+.subckt and3_x1 i0=$abc$109383$new_n16489_ i1=$abc$109383$new_n16483_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16490_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][13] i1=soc.cpu.minerva.gprf.mem._mem[8][13] q=$abc$109383$new_n16491_
 .subckt nand2_x0 i0=$abc$109383$new_n16491_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16492_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][13] q=$abc$109383$new_n16493_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][13] nq=$abc$109383$new_n16493_
 .subckt buf_x4 i=$abc$109383$new_n15568_ q=$abc$109383$new_n16494_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][13] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16495_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][13] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16495_
 .subckt nand2_x0 i0=$abc$109383$new_n16495_ i1=$abc$109383$new_n16493_ nq=$abc$109383$new_n16496_
 .subckt nand3_x0 i0=$abc$109383$new_n16496_ i1=$abc$109383$new_n16492_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16497_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][13] i1=soc.cpu.minerva.gprf.mem._mem[11][13] q=$abc$109383$new_n16498_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][13] i1=soc.cpu.minerva.gprf.mem._mem[10][13] q=$abc$109383$new_n16499_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16499_ i1=$abc$109383$new_n16498_ q=$abc$109383$new_n16500_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16500_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16501_
-.subckt a2_x2 i0=$abc$109383$new_n16501_ i1=$abc$109383$new_n16497_ q=$abc$109383$new_n16502_
-.subckt ao22_x2 i0=$abc$109383$new_n16502_ i1=$abc$109383$new_n16490_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16503_
-.subckt o2_x2 i0=$abc$109383$new_n16503_ i1=$abc$109383$new_n16472_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[13]
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][13] i1=soc.cpu.minerva.gprf.mem._mem[11][13] q=$abc$109383$new_n16498_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][13] i1=soc.cpu.minerva.gprf.mem._mem[10][13] q=$abc$109383$new_n16499_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16499_ i1=$abc$109383$new_n16498_ q=$abc$109383$new_n16500_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16500_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16501_
+.subckt and2_x1 i0=$abc$109383$new_n16501_ i1=$abc$109383$new_n16497_ q=$abc$109383$new_n16502_
+.subckt and21nor_x1 i0=$abc$109383$new_n16502_ i1=$abc$109383$new_n16490_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16503_
+.subckt or2_x1 i0=$abc$109383$new_n16503_ i1=$abc$109383$new_n16472_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[13]
 .subckt buf_x4 i=$abc$109383$new_n15543_ q=$abc$109383$new_n16505_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n16506_
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][14] i1=soc.cpu.minerva.gprf.mem._mem[16][14] q=$abc$109383$new_n16507_
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][14] i1=soc.cpu.minerva.gprf.mem._mem[16][14] q=$abc$109383$new_n16507_
 .subckt nand2_x0 i0=$abc$109383$new_n16507_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16508_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][14] q=$abc$109383$new_n16509_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][14] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16510_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][14] nq=$abc$109383$new_n16509_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][14] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16510_
 .subckt nand2_x0 i0=$abc$109383$new_n16510_ i1=$abc$109383$new_n16509_ nq=$abc$109383$new_n16511_
 .subckt nand3_x0 i0=$abc$109383$new_n16511_ i1=$abc$109383$new_n16508_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16512_
 .subckt buf_x4 i=$abc$109383$new_n15658_ q=$abc$109383$new_n16513_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][14] i1=soc.cpu.minerva.gprf.mem._mem[18][14] q=$abc$109383$new_n16514_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][14] i1=soc.cpu.minerva.gprf.mem._mem[18][14] q=$abc$109383$new_n16514_
 .subckt nand2_x0 i0=$abc$109383$new_n16514_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16515_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][14] q=$abc$109383$new_n16516_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][14] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16517_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][14] nq=$abc$109383$new_n16516_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][14] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16517_
 .subckt nand2_x0 i0=$abc$109383$new_n16517_ i1=$abc$109383$new_n16516_ nq=$abc$109383$new_n16518_
 .subckt nand3_x0 i0=$abc$109383$new_n16518_ i1=$abc$109383$new_n16515_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n16519_
-.subckt a3_x2 i0=$abc$109383$new_n16519_ i1=$abc$109383$new_n16512_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16520_
+.subckt and3_x1 i0=$abc$109383$new_n16519_ i1=$abc$109383$new_n16512_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16520_
 .subckt buf_x4 i=$abc$109383$new_n15611_ q=$abc$109383$new_n16521_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][14] i1=soc.cpu.minerva.gprf.mem._mem[2][14] q=$abc$109383$new_n16522_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][14] i1=soc.cpu.minerva.gprf.mem._mem[2][14] q=$abc$109383$new_n16522_
 .subckt nand2_x0 i0=$abc$109383$new_n16522_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16523_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][14] q=$abc$109383$new_n16524_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][14] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ q=$abc$109383$new_n16525_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][14] nq=$abc$109383$new_n16524_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][14] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15924_ nq=$abc$109383$new_n16525_
 .subckt nand2_x0 i0=$abc$109383$new_n16525_ i1=$abc$109383$new_n16524_ nq=$abc$109383$new_n16526_
 .subckt nand3_x0 i0=$abc$109383$new_n16526_ i1=$abc$109383$new_n16523_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n16527_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][14] i1=soc.cpu.minerva.gprf.mem._mem[0][14] q=$abc$109383$new_n16528_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][14] i1=soc.cpu.minerva.gprf.mem._mem[0][14] q=$abc$109383$new_n16528_
 .subckt nand2_x0 i0=$abc$109383$new_n16528_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16529_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][14] q=$abc$109383$new_n16530_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][14] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16531_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][14] nq=$abc$109383$new_n16530_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][14] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16531_
 .subckt nand2_x0 i0=$abc$109383$new_n16531_ i1=$abc$109383$new_n16530_ nq=$abc$109383$new_n16532_
 .subckt nand3_x0 i0=$abc$109383$new_n16532_ i1=$abc$109383$new_n16529_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16533_
-.subckt a3_x2 i0=$abc$109383$new_n16533_ i1=$abc$109383$new_n16527_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16534_
-.subckt ao22_x2 i0=$abc$109383$new_n16534_ i1=$abc$109383$new_n16520_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n16535_
+.subckt and3_x1 i0=$abc$109383$new_n16533_ i1=$abc$109383$new_n16527_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16534_
+.subckt and21nor_x1 i0=$abc$109383$new_n16534_ i1=$abc$109383$new_n16520_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n16535_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][14] nq=$abc$109383$new_n16536_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][14] nq=$abc$109383$new_n16537_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16537_ i1=$abc$109383$new_n16536_ q=$abc$109383$new_n16538_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16537_ i1=$abc$109383$new_n16536_ q=$abc$109383$new_n16538_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][14] nq=$abc$109383$new_n16539_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][14] nq=$abc$109383$new_n16540_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16540_ i1=$abc$109383$new_n16539_ q=$abc$109383$new_n16541_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16541_ i1=$abc$109383$new_n16538_ q=$abc$109383$new_n16542_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16540_ i1=$abc$109383$new_n16539_ q=$abc$109383$new_n16541_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16541_ i1=$abc$109383$new_n16538_ q=$abc$109383$new_n16542_
 .subckt nand2_x0 i0=$abc$109383$new_n16542_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16543_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][14] i1=soc.cpu.minerva.gprf.mem._mem[24][14] q=$abc$109383$new_n16544_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][14] i1=soc.cpu.minerva.gprf.mem._mem[24][14] q=$abc$109383$new_n16544_
 .subckt nand2_x0 i0=$abc$109383$new_n16544_ i1=$abc$109383$new_n15945_ nq=$abc$109383$new_n16545_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][14] q=$abc$109383$new_n16546_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][14] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16547_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][14] nq=$abc$109383$new_n16546_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][14] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16547_
 .subckt nand2_x0 i0=$abc$109383$new_n16547_ i1=$abc$109383$new_n16546_ nq=$abc$109383$new_n16548_
 .subckt nand3_x0 i0=$abc$109383$new_n16548_ i1=$abc$109383$new_n16545_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16549_
-.subckt a3_x2 i0=$abc$109383$new_n16549_ i1=$abc$109383$new_n16543_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16550_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][14] i1=soc.cpu.minerva.gprf.mem._mem[8][14] q=$abc$109383$new_n16551_
+.subckt and3_x1 i0=$abc$109383$new_n16549_ i1=$abc$109383$new_n16543_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16550_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][14] i1=soc.cpu.minerva.gprf.mem._mem[8][14] q=$abc$109383$new_n16551_
 .subckt nand2_x0 i0=$abc$109383$new_n16551_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16552_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][14] q=$abc$109383$new_n16553_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][14] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16554_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][14] nq=$abc$109383$new_n16553_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][14] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16554_
 .subckt nand2_x0 i0=$abc$109383$new_n16554_ i1=$abc$109383$new_n16553_ nq=$abc$109383$new_n16555_
 .subckt nand3_x0 i0=$abc$109383$new_n16555_ i1=$abc$109383$new_n16552_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16556_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][14] i1=soc.cpu.minerva.gprf.mem._mem[11][14] q=$abc$109383$new_n16557_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][14] i1=soc.cpu.minerva.gprf.mem._mem[10][14] q=$abc$109383$new_n16558_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16558_ i1=$abc$109383$new_n16557_ q=$abc$109383$new_n16559_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16559_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16560_
-.subckt a2_x2 i0=$abc$109383$new_n16560_ i1=$abc$109383$new_n16556_ q=$abc$109383$new_n16561_
-.subckt ao22_x2 i0=$abc$109383$new_n16561_ i1=$abc$109383$new_n16550_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16562_
-.subckt o2_x2 i0=$abc$109383$new_n16562_ i1=$abc$109383$new_n16535_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[14]
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][15] i1=soc.cpu.minerva.gprf.mem._mem[16][15] q=$abc$109383$new_n16564_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][14] i1=soc.cpu.minerva.gprf.mem._mem[11][14] q=$abc$109383$new_n16557_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][14] i1=soc.cpu.minerva.gprf.mem._mem[10][14] q=$abc$109383$new_n16558_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16558_ i1=$abc$109383$new_n16557_ q=$abc$109383$new_n16559_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16559_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16560_
+.subckt and2_x1 i0=$abc$109383$new_n16560_ i1=$abc$109383$new_n16556_ q=$abc$109383$new_n16561_
+.subckt and21nor_x1 i0=$abc$109383$new_n16561_ i1=$abc$109383$new_n16550_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16562_
+.subckt or2_x1 i0=$abc$109383$new_n16562_ i1=$abc$109383$new_n16535_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[14]
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][15] i1=soc.cpu.minerva.gprf.mem._mem[16][15] q=$abc$109383$new_n16564_
 .subckt nand2_x0 i0=$abc$109383$new_n16564_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n16565_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][15] q=$abc$109383$new_n16566_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][15] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n16567_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][15] nq=$abc$109383$new_n16566_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][15] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n16567_
 .subckt nand2_x0 i0=$abc$109383$new_n16567_ i1=$abc$109383$new_n16566_ nq=$abc$109383$new_n16568_
 .subckt nand3_x0 i0=$abc$109383$new_n16568_ i1=$abc$109383$new_n16565_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n16569_
-.subckt mx2_x2 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[23][15] i1=soc.cpu.minerva.gprf.mem._mem[19][15] q=$abc$109383$new_n16570_
-.subckt mx2_x2 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[22][15] i1=soc.cpu.minerva.gprf.mem._mem[18][15] q=$abc$109383$new_n16571_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16571_ i1=$abc$109383$new_n16570_ q=$abc$109383$new_n16572_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16572_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n16573_
-.subckt a2_x2 i0=$abc$109383$new_n16573_ i1=$abc$109383$new_n16569_ q=$abc$109383$new_n16574_
+.subckt mux2_x1 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[23][15] i1=soc.cpu.minerva.gprf.mem._mem[19][15] q=$abc$109383$new_n16570_
+.subckt mux2_x1 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[22][15] i1=soc.cpu.minerva.gprf.mem._mem[18][15] q=$abc$109383$new_n16571_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n16571_ i1=$abc$109383$new_n16570_ q=$abc$109383$new_n16572_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n16572_ i2=$abc$109383$new_n15576_ nq=$abc$109383$new_n16573_
+.subckt and2_x1 i0=$abc$109383$new_n16573_ i1=$abc$109383$new_n16569_ q=$abc$109383$new_n16574_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][15] nq=$abc$109383$new_n16575_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][15] nq=$abc$109383$new_n16576_
-.subckt mx2_x2 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n16576_ i1=$abc$109383$new_n16575_ q=$abc$109383$new_n16577_
+.subckt mux2_x1 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n16576_ i1=$abc$109383$new_n16575_ q=$abc$109383$new_n16577_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][15] nq=$abc$109383$new_n16578_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][15] nq=$abc$109383$new_n16579_
-.subckt mx2_x2 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n16579_ i1=$abc$109383$new_n16578_ q=$abc$109383$new_n16580_
-.subckt mx2_x2 cmd=$abc$109383$new_n15601_ i0=$abc$109383$new_n16580_ i1=$abc$109383$new_n16577_ q=$abc$109383$new_n16581_
+.subckt mux2_x1 cmd=$abc$109383$new_n15658_ i0=$abc$109383$new_n16579_ i1=$abc$109383$new_n16578_ q=$abc$109383$new_n16580_
+.subckt mux2_x1 cmd=$abc$109383$new_n15601_ i0=$abc$109383$new_n16580_ i1=$abc$109383$new_n16577_ q=$abc$109383$new_n16581_
 .subckt nand2_x0 i0=$abc$109383$new_n16581_ i1=$abc$109383$new_n15612_ nq=$abc$109383$new_n16582_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][15] i1=soc.cpu.minerva.gprf.mem._mem[0][15] q=$abc$109383$new_n16583_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][15] i1=soc.cpu.minerva.gprf.mem._mem[0][15] q=$abc$109383$new_n16583_
 .subckt nand2_x0 i0=$abc$109383$new_n16583_ i1=$abc$109383$new_n15984_ nq=$abc$109383$new_n16584_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][15] q=$abc$109383$new_n16585_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][15] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16586_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][15] nq=$abc$109383$new_n16585_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][15] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16586_
 .subckt nand2_x0 i0=$abc$109383$new_n16586_ i1=$abc$109383$new_n16585_ nq=$abc$109383$new_n16587_
 .subckt nand3_x0 i0=$abc$109383$new_n16587_ i1=$abc$109383$new_n16584_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16588_
-.subckt a3_x2 i0=$abc$109383$new_n16588_ i1=$abc$109383$new_n16582_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16589_
-.subckt ao22_x2 i0=$abc$109383$new_n16589_ i1=$abc$109383$new_n16574_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n16590_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][15] i1=soc.cpu.minerva.gprf.mem._mem[26][15] q=$abc$109383$new_n16591_
+.subckt and3_x1 i0=$abc$109383$new_n16588_ i1=$abc$109383$new_n16582_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16589_
+.subckt and21nor_x1 i0=$abc$109383$new_n16589_ i1=$abc$109383$new_n16574_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n16590_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][15] i1=soc.cpu.minerva.gprf.mem._mem[26][15] q=$abc$109383$new_n16591_
 .subckt nand2_x0 i0=$abc$109383$new_n16591_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n16592_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][15] nq=$abc$109383$new_n16593_
-.subckt a3_x2 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n16593_ q=$abc$109383$new_n16594_
+.subckt and3_x1 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n16593_ q=$abc$109383$new_n16594_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][15] nq=$abc$109383$new_n16595_
-.subckt oa22_x2 i0=$abc$109383$new_n16595_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ q=$abc$109383$new_n16596_
-.subckt ao22_x2 i0=$abc$109383$new_n16596_ i1=$abc$109383$new_n16594_ i2=$abc$109383$new_n15611_ q=$abc$109383$new_n16597_
+.subckt or21nand_x1 i0=$abc$109383$new_n16595_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ nq=$abc$109383$new_n16596_
+.subckt and21nor_x1 i0=$abc$109383$new_n16596_ i1=$abc$109383$new_n16594_ i2=$abc$109383$new_n15611_ nq=$abc$109383$new_n16597_
 .subckt nand2_x0 i0=$abc$109383$new_n16597_ i1=$abc$109383$new_n16592_ nq=$abc$109383$new_n16598_
 .subckt buf_x4 i=$abc$109383$new_n15537_ q=$abc$109383$new_n16599_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][15] i1=soc.cpu.minerva.gprf.mem._mem[24][15] q=$abc$109383$new_n16600_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][15] i1=soc.cpu.minerva.gprf.mem._mem[24][15] q=$abc$109383$new_n16600_
 .subckt nand2_x0 i0=$abc$109383$new_n16600_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n16601_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][15] q=$abc$109383$new_n16602_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][15] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ q=$abc$109383$new_n16603_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][15] nq=$abc$109383$new_n16602_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][15] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n16004_ nq=$abc$109383$new_n16603_
 .subckt nand2_x0 i0=$abc$109383$new_n16603_ i1=$abc$109383$new_n16602_ nq=$abc$109383$new_n16604_
 .subckt nand3_x0 i0=$abc$109383$new_n16604_ i1=$abc$109383$new_n16601_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16605_
-.subckt a3_x2 i0=$abc$109383$new_n16605_ i1=$abc$109383$new_n16598_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16606_
-.subckt mx2_x2 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][15] i1=soc.cpu.minerva.gprf.mem._mem[8][15] q=$abc$109383$new_n16607_
+.subckt and3_x1 i0=$abc$109383$new_n16605_ i1=$abc$109383$new_n16598_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16606_
+.subckt mux2_x1 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][15] i1=soc.cpu.minerva.gprf.mem._mem[8][15] q=$abc$109383$new_n16607_
 .subckt nand2_x0 i0=$abc$109383$new_n16607_ i1=$abc$109383$new_n15591_ nq=$abc$109383$new_n16608_
-.subckt oa22_x2 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=soc.cpu.minerva.gprf.mem._mem[13][15] q=$abc$109383$new_n16609_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][15] i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15587_ q=$abc$109383$new_n16610_
+.subckt or21nand_x1 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=soc.cpu.minerva.gprf.mem._mem[13][15] nq=$abc$109383$new_n16609_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][15] i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15587_ nq=$abc$109383$new_n16610_
 .subckt nand2_x0 i0=$abc$109383$new_n16610_ i1=$abc$109383$new_n16609_ nq=$abc$109383$new_n16611_
 .subckt nand3_x0 i0=$abc$109383$new_n16611_ i1=$abc$109383$new_n16608_ i2=$abc$109383$new_n15802_ nq=$abc$109383$new_n16612_
-.subckt mx2_x2 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[14][15] i1=soc.cpu.minerva.gprf.mem._mem[10][15] q=$abc$109383$new_n16613_
+.subckt mux2_x1 cmd=$abc$109383$new_n15751_ i0=soc.cpu.minerva.gprf.mem._mem[14][15] i1=soc.cpu.minerva.gprf.mem._mem[10][15] q=$abc$109383$new_n16613_
 .subckt nand2_x0 i0=$abc$109383$new_n16613_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n16614_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[15][15] q=$abc$109383$new_n16615_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][15] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ q=$abc$109383$new_n16616_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[15][15] nq=$abc$109383$new_n16615_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][15] i1=$abc$109383$new_n15755_ i2=$abc$109383$new_n15601_ nq=$abc$109383$new_n16616_
 .subckt nand2_x0 i0=$abc$109383$new_n16616_ i1=$abc$109383$new_n16615_ nq=$abc$109383$new_n16617_
 .subckt nand3_x0 i0=$abc$109383$new_n16617_ i1=$abc$109383$new_n16614_ i2=$abc$109383$new_n15784_ nq=$abc$109383$new_n16618_
-.subckt a3_x2 i0=$abc$109383$new_n16618_ i1=$abc$109383$new_n16612_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n16619_
-.subckt ao22_x2 i0=$abc$109383$new_n16619_ i1=$abc$109383$new_n16606_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16620_
-.subckt o2_x2 i0=$abc$109383$new_n16620_ i1=$abc$109383$new_n16590_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[15]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][16] i1=soc.cpu.minerva.gprf.mem._mem[16][16] q=$abc$109383$new_n16622_
+.subckt and3_x1 i0=$abc$109383$new_n16618_ i1=$abc$109383$new_n16612_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n16619_
+.subckt and21nor_x1 i0=$abc$109383$new_n16619_ i1=$abc$109383$new_n16606_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16620_
+.subckt or2_x1 i0=$abc$109383$new_n16620_ i1=$abc$109383$new_n16590_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[15]
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][16] i1=soc.cpu.minerva.gprf.mem._mem[16][16] q=$abc$109383$new_n16622_
 .subckt nand2_x0 i0=$abc$109383$new_n16622_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n16623_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][16] q=$abc$109383$new_n16624_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][16] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n16625_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][16] nq=$abc$109383$new_n16624_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][16] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n16625_
 .subckt nand2_x0 i0=$abc$109383$new_n16625_ i1=$abc$109383$new_n16624_ nq=$abc$109383$new_n16626_
 .subckt nand3_x0 i0=$abc$109383$new_n16626_ i1=$abc$109383$new_n16623_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n16627_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][16] i1=soc.cpu.minerva.gprf.mem._mem[18][16] q=$abc$109383$new_n16628_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][16] i1=soc.cpu.minerva.gprf.mem._mem[18][16] q=$abc$109383$new_n16628_
 .subckt nand2_x0 i0=$abc$109383$new_n16628_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n16629_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][16] q=$abc$109383$new_n16630_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][16] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n16631_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][16] nq=$abc$109383$new_n16630_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][16] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n16631_
 .subckt nand2_x0 i0=$abc$109383$new_n16631_ i1=$abc$109383$new_n16630_ nq=$abc$109383$new_n16632_
 .subckt nand3_x0 i0=$abc$109383$new_n16632_ i1=$abc$109383$new_n16629_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n16633_
 .subckt nand3_x0 i0=$abc$109383$new_n16633_ i1=$abc$109383$new_n16627_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n16634_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][16] nq=$abc$109383$new_n16635_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][16] nq=$abc$109383$new_n16636_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16636_ i1=$abc$109383$new_n16635_ q=$abc$109383$new_n16637_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16636_ i1=$abc$109383$new_n16635_ q=$abc$109383$new_n16637_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][16] nq=$abc$109383$new_n16638_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][16] nq=$abc$109383$new_n16639_
-.subckt mx2_x2 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16639_ i1=$abc$109383$new_n16638_ q=$abc$109383$new_n16640_
-.subckt mx2_x2 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n16640_ i1=$abc$109383$new_n16637_ q=$abc$109383$new_n16641_
+.subckt mux2_x1 cmd=$abc$109383$new_n15585_ i0=$abc$109383$new_n16639_ i1=$abc$109383$new_n16638_ q=$abc$109383$new_n16640_
+.subckt mux2_x1 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n16640_ i1=$abc$109383$new_n16637_ q=$abc$109383$new_n16641_
 .subckt nand2_x0 i0=$abc$109383$new_n16641_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n16642_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][16] i1=soc.cpu.minerva.gprf.mem._mem[0][16] q=$abc$109383$new_n16643_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][16] i1=soc.cpu.minerva.gprf.mem._mem[0][16] q=$abc$109383$new_n16643_
 .subckt nand2_x0 i0=$abc$109383$new_n16643_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n16644_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][16] q=$abc$109383$new_n16645_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][16] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n16646_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][16] nq=$abc$109383$new_n16645_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][16] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n16646_
 .subckt nand2_x0 i0=$abc$109383$new_n16646_ i1=$abc$109383$new_n16645_ nq=$abc$109383$new_n16647_
 .subckt nand3_x0 i0=$abc$109383$new_n16647_ i1=$abc$109383$new_n16644_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n16648_
 .subckt nand3_x0 i0=$abc$109383$new_n16648_ i1=$abc$109383$new_n16642_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n16649_
-.subckt oa22_x2 i0=$abc$109383$new_n16649_ i1=$abc$109383$new_n16634_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n16650_
+.subckt or21nand_x1 i0=$abc$109383$new_n16649_ i1=$abc$109383$new_n16634_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n16650_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][16] nq=$abc$109383$new_n16651_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][16] nq=$abc$109383$new_n16652_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16652_ i1=$abc$109383$new_n16651_ q=$abc$109383$new_n16653_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16652_ i1=$abc$109383$new_n16651_ q=$abc$109383$new_n16653_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][16] nq=$abc$109383$new_n16654_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][16] nq=$abc$109383$new_n16655_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16655_ i1=$abc$109383$new_n16654_ q=$abc$109383$new_n16656_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16656_ i1=$abc$109383$new_n16653_ q=$abc$109383$new_n16657_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16655_ i1=$abc$109383$new_n16654_ q=$abc$109383$new_n16656_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16656_ i1=$abc$109383$new_n16653_ q=$abc$109383$new_n16657_
 .subckt nand2_x0 i0=$abc$109383$new_n16657_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n16658_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][16] i1=soc.cpu.minerva.gprf.mem._mem[24][16] q=$abc$109383$new_n16659_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][16] i1=soc.cpu.minerva.gprf.mem._mem[24][16] q=$abc$109383$new_n16659_
 .subckt nand2_x0 i0=$abc$109383$new_n16659_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n16660_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][16] q=$abc$109383$new_n16661_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][16] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n16662_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][16] nq=$abc$109383$new_n16661_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][16] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n16662_
 .subckt nand2_x0 i0=$abc$109383$new_n16662_ i1=$abc$109383$new_n16661_ nq=$abc$109383$new_n16663_
 .subckt nand3_x0 i0=$abc$109383$new_n16663_ i1=$abc$109383$new_n16660_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n16664_
 .subckt nand3_x0 i0=$abc$109383$new_n16664_ i1=$abc$109383$new_n16658_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n16665_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][16] i1=soc.cpu.minerva.gprf.mem._mem[8][16] q=$abc$109383$new_n16666_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][16] i1=soc.cpu.minerva.gprf.mem._mem[8][16] q=$abc$109383$new_n16666_
 .subckt nand2_x0 i0=$abc$109383$new_n16666_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n16667_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][16] q=$abc$109383$new_n16668_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][16] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ q=$abc$109383$new_n16669_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][16] nq=$abc$109383$new_n16668_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][16] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15651_ nq=$abc$109383$new_n16669_
 .subckt nand2_x0 i0=$abc$109383$new_n16669_ i1=$abc$109383$new_n16668_ nq=$abc$109383$new_n16670_
 .subckt nand3_x0 i0=$abc$109383$new_n16670_ i1=$abc$109383$new_n16667_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n16671_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][16] i1=soc.cpu.minerva.gprf.mem._mem[10][16] q=$abc$109383$new_n16672_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][16] i1=soc.cpu.minerva.gprf.mem._mem[10][16] q=$abc$109383$new_n16672_
 .subckt nand2_x0 i0=$abc$109383$new_n16672_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n16673_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][16] q=$abc$109383$new_n16674_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][16] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n16675_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][16] nq=$abc$109383$new_n16674_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][16] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n16675_
 .subckt nand2_x0 i0=$abc$109383$new_n16675_ i1=$abc$109383$new_n16674_ nq=$abc$109383$new_n16676_
 .subckt nand3_x0 i0=$abc$109383$new_n16676_ i1=$abc$109383$new_n16673_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n16677_
 .subckt nand3_x0 i0=$abc$109383$new_n16677_ i1=$abc$109383$new_n16671_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n16678_
-.subckt oa22_x2 i0=$abc$109383$new_n16678_ i1=$abc$109383$new_n16665_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n16679_
+.subckt or21nand_x1 i0=$abc$109383$new_n16678_ i1=$abc$109383$new_n16665_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n16679_
 .subckt nand2_x0 i0=$abc$109383$new_n16679_ i1=$abc$109383$new_n16650_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[16]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][17] i1=soc.cpu.minerva.gprf.mem._mem[16][17] q=$abc$109383$new_n16681_
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][17] i1=soc.cpu.minerva.gprf.mem._mem[16][17] q=$abc$109383$new_n16681_
 .subckt nand2_x0 i0=$abc$109383$new_n16681_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16682_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][17] q=$abc$109383$new_n16683_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][17] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16684_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][17] nq=$abc$109383$new_n16683_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][17] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16684_
 .subckt nand2_x0 i0=$abc$109383$new_n16684_ i1=$abc$109383$new_n16683_ nq=$abc$109383$new_n16685_
 .subckt nand3_x0 i0=$abc$109383$new_n16685_ i1=$abc$109383$new_n16682_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16686_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][17] i1=soc.cpu.minerva.gprf.mem._mem[18][17] q=$abc$109383$new_n16687_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][17] i1=soc.cpu.minerva.gprf.mem._mem[18][17] q=$abc$109383$new_n16687_
 .subckt nand2_x0 i0=$abc$109383$new_n16687_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16688_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][17] q=$abc$109383$new_n16689_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][17] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16690_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][17] nq=$abc$109383$new_n16689_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][17] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16690_
 .subckt nand2_x0 i0=$abc$109383$new_n16690_ i1=$abc$109383$new_n16689_ nq=$abc$109383$new_n16691_
 .subckt nand3_x0 i0=$abc$109383$new_n16691_ i1=$abc$109383$new_n16688_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n16692_
-.subckt a3_x2 i0=$abc$109383$new_n16692_ i1=$abc$109383$new_n16686_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16693_
-.subckt mx2_x2 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][17] i1=soc.cpu.minerva.gprf.mem._mem[2][17] q=$abc$109383$new_n16694_
+.subckt and3_x1 i0=$abc$109383$new_n16692_ i1=$abc$109383$new_n16686_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16693_
+.subckt mux2_x1 cmd=$abc$109383$new_n16097_ i0=soc.cpu.minerva.gprf.mem._mem[6][17] i1=soc.cpu.minerva.gprf.mem._mem[2][17] q=$abc$109383$new_n16694_
 .subckt nand2_x0 i0=$abc$109383$new_n16694_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16695_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][17] q=$abc$109383$new_n16696_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][17] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n16697_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][17] nq=$abc$109383$new_n16696_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][17] i1=$abc$109383$new_n15980_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n16697_
 .subckt nand2_x0 i0=$abc$109383$new_n16697_ i1=$abc$109383$new_n16696_ nq=$abc$109383$new_n16698_
 .subckt nand3_x0 i0=$abc$109383$new_n16698_ i1=$abc$109383$new_n16695_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n16699_
-.subckt mx2_x2 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][17] i1=soc.cpu.minerva.gprf.mem._mem[0][17] q=$abc$109383$new_n16700_
+.subckt mux2_x1 cmd=$abc$109383$new_n16161_ i0=soc.cpu.minerva.gprf.mem._mem[4][17] i1=soc.cpu.minerva.gprf.mem._mem[0][17] q=$abc$109383$new_n16700_
 .subckt nand2_x0 i0=$abc$109383$new_n16700_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n16701_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][17] q=$abc$109383$new_n16702_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][17] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16703_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][17] nq=$abc$109383$new_n16702_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][17] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16703_
 .subckt nand2_x0 i0=$abc$109383$new_n16703_ i1=$abc$109383$new_n16702_ nq=$abc$109383$new_n16704_
 .subckt nand3_x0 i0=$abc$109383$new_n16704_ i1=$abc$109383$new_n16701_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16705_
-.subckt a3_x2 i0=$abc$109383$new_n16705_ i1=$abc$109383$new_n16699_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16706_
-.subckt ao22_x2 i0=$abc$109383$new_n16706_ i1=$abc$109383$new_n16693_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n16707_
+.subckt and3_x1 i0=$abc$109383$new_n16705_ i1=$abc$109383$new_n16699_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16706_
+.subckt and21nor_x1 i0=$abc$109383$new_n16706_ i1=$abc$109383$new_n16693_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n16707_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][17] nq=$abc$109383$new_n16708_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][17] nq=$abc$109383$new_n16709_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16709_ i1=$abc$109383$new_n16708_ q=$abc$109383$new_n16710_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16709_ i1=$abc$109383$new_n16708_ q=$abc$109383$new_n16710_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][17] nq=$abc$109383$new_n16711_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][17] nq=$abc$109383$new_n16712_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16712_ i1=$abc$109383$new_n16711_ q=$abc$109383$new_n16713_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16713_ i1=$abc$109383$new_n16710_ q=$abc$109383$new_n16714_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16712_ i1=$abc$109383$new_n16711_ q=$abc$109383$new_n16713_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16713_ i1=$abc$109383$new_n16710_ q=$abc$109383$new_n16714_
 .subckt nand2_x0 i0=$abc$109383$new_n16714_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16715_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][17] i1=soc.cpu.minerva.gprf.mem._mem[24][17] q=$abc$109383$new_n16716_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][17] i1=soc.cpu.minerva.gprf.mem._mem[24][17] q=$abc$109383$new_n16716_
 .subckt nand2_x0 i0=$abc$109383$new_n16716_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n16717_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][17] q=$abc$109383$new_n16718_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][17] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n16719_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][17] nq=$abc$109383$new_n16718_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][17] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n16719_
 .subckt nand2_x0 i0=$abc$109383$new_n16719_ i1=$abc$109383$new_n16718_ nq=$abc$109383$new_n16720_
 .subckt nand3_x0 i0=$abc$109383$new_n16720_ i1=$abc$109383$new_n16717_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16721_
-.subckt a3_x2 i0=$abc$109383$new_n16721_ i1=$abc$109383$new_n16715_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16722_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][17] i1=soc.cpu.minerva.gprf.mem._mem[8][17] q=$abc$109383$new_n16723_
+.subckt and3_x1 i0=$abc$109383$new_n16721_ i1=$abc$109383$new_n16715_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16722_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][17] i1=soc.cpu.minerva.gprf.mem._mem[8][17] q=$abc$109383$new_n16723_
 .subckt nand2_x0 i0=$abc$109383$new_n16723_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16724_
-.subckt oa22_x2 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][17] q=$abc$109383$new_n16725_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][17] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16726_
+.subckt or21nand_x1 i0=$abc$109383$new_n16012_ i1=$abc$109383$new_n16011_ i2=soc.cpu.minerva.gprf.mem._mem[13][17] nq=$abc$109383$new_n16725_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][17] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16726_
 .subckt nand2_x0 i0=$abc$109383$new_n16726_ i1=$abc$109383$new_n16725_ nq=$abc$109383$new_n16727_
 .subckt nand3_x0 i0=$abc$109383$new_n16727_ i1=$abc$109383$new_n16724_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16728_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][17] i1=soc.cpu.minerva.gprf.mem._mem[11][17] q=$abc$109383$new_n16729_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][17] i1=soc.cpu.minerva.gprf.mem._mem[10][17] q=$abc$109383$new_n16730_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16730_ i1=$abc$109383$new_n16729_ q=$abc$109383$new_n16731_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16731_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16732_
-.subckt a2_x2 i0=$abc$109383$new_n16732_ i1=$abc$109383$new_n16728_ q=$abc$109383$new_n16733_
-.subckt ao22_x2 i0=$abc$109383$new_n16733_ i1=$abc$109383$new_n16722_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16734_
-.subckt o2_x2 i0=$abc$109383$new_n16734_ i1=$abc$109383$new_n16707_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[17]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][18] i1=soc.cpu.minerva.gprf.mem._mem[16][18] q=$abc$109383$new_n16736_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][17] i1=soc.cpu.minerva.gprf.mem._mem[11][17] q=$abc$109383$new_n16729_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[14][17] i1=soc.cpu.minerva.gprf.mem._mem[10][17] q=$abc$109383$new_n16730_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16730_ i1=$abc$109383$new_n16729_ q=$abc$109383$new_n16731_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16731_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16732_
+.subckt and2_x1 i0=$abc$109383$new_n16732_ i1=$abc$109383$new_n16728_ q=$abc$109383$new_n16733_
+.subckt and21nor_x1 i0=$abc$109383$new_n16733_ i1=$abc$109383$new_n16722_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16734_
+.subckt or2_x1 i0=$abc$109383$new_n16734_ i1=$abc$109383$new_n16707_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[17]
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][18] i1=soc.cpu.minerva.gprf.mem._mem[16][18] q=$abc$109383$new_n16736_
 .subckt nand2_x0 i0=$abc$109383$new_n16736_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16737_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][18] q=$abc$109383$new_n16738_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][18] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16739_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][18] nq=$abc$109383$new_n16738_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][18] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16739_
 .subckt nand2_x0 i0=$abc$109383$new_n16739_ i1=$abc$109383$new_n16738_ nq=$abc$109383$new_n16740_
 .subckt nand3_x0 i0=$abc$109383$new_n16740_ i1=$abc$109383$new_n16737_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16741_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][18] i1=soc.cpu.minerva.gprf.mem._mem[18][18] q=$abc$109383$new_n16742_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][18] i1=soc.cpu.minerva.gprf.mem._mem[18][18] q=$abc$109383$new_n16742_
 .subckt nand2_x0 i0=$abc$109383$new_n16742_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16743_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][18] q=$abc$109383$new_n16744_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][18] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16745_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][18] nq=$abc$109383$new_n16744_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][18] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16745_
 .subckt nand2_x0 i0=$abc$109383$new_n16745_ i1=$abc$109383$new_n16744_ nq=$abc$109383$new_n16746_
 .subckt nand3_x0 i0=$abc$109383$new_n16746_ i1=$abc$109383$new_n16743_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n16747_
-.subckt a3_x2 i0=$abc$109383$new_n16747_ i1=$abc$109383$new_n16741_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16748_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][18] i1=soc.cpu.minerva.gprf.mem._mem[2][18] q=$abc$109383$new_n16749_
+.subckt and3_x1 i0=$abc$109383$new_n16747_ i1=$abc$109383$new_n16741_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16748_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][18] i1=soc.cpu.minerva.gprf.mem._mem[2][18] q=$abc$109383$new_n16749_
 .subckt nand2_x0 i0=$abc$109383$new_n16749_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16750_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][18] q=$abc$109383$new_n16751_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][18] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n16752_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][18] nq=$abc$109383$new_n16751_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][18] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n16752_
 .subckt nand2_x0 i0=$abc$109383$new_n16752_ i1=$abc$109383$new_n16751_ nq=$abc$109383$new_n16753_
 .subckt nand3_x0 i0=$abc$109383$new_n16753_ i1=$abc$109383$new_n16750_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n16754_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][18] i1=soc.cpu.minerva.gprf.mem._mem[0][18] q=$abc$109383$new_n16755_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][18] i1=soc.cpu.minerva.gprf.mem._mem[0][18] q=$abc$109383$new_n16755_
 .subckt nand2_x0 i0=$abc$109383$new_n16755_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n16756_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][18] q=$abc$109383$new_n16757_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][18] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ q=$abc$109383$new_n16758_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][18] nq=$abc$109383$new_n16757_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][18] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n16165_ nq=$abc$109383$new_n16758_
 .subckt nand2_x0 i0=$abc$109383$new_n16758_ i1=$abc$109383$new_n16757_ nq=$abc$109383$new_n16759_
 .subckt nand3_x0 i0=$abc$109383$new_n16759_ i1=$abc$109383$new_n16756_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16760_
-.subckt a3_x2 i0=$abc$109383$new_n16760_ i1=$abc$109383$new_n16754_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16761_
-.subckt ao22_x2 i0=$abc$109383$new_n16761_ i1=$abc$109383$new_n16748_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n16762_
+.subckt and3_x1 i0=$abc$109383$new_n16760_ i1=$abc$109383$new_n16754_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16761_
+.subckt and21nor_x1 i0=$abc$109383$new_n16761_ i1=$abc$109383$new_n16748_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n16762_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][18] nq=$abc$109383$new_n16763_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][18] nq=$abc$109383$new_n16764_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16764_ i1=$abc$109383$new_n16763_ q=$abc$109383$new_n16765_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16764_ i1=$abc$109383$new_n16763_ q=$abc$109383$new_n16765_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][18] nq=$abc$109383$new_n16766_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][18] nq=$abc$109383$new_n16767_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16767_ i1=$abc$109383$new_n16766_ q=$abc$109383$new_n16768_
-.subckt mx2_x2 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16768_ i1=$abc$109383$new_n16765_ q=$abc$109383$new_n16769_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16767_ i1=$abc$109383$new_n16766_ q=$abc$109383$new_n16768_
+.subckt mux2_x1 cmd=$abc$109383$new_n15942_ i0=$abc$109383$new_n16768_ i1=$abc$109383$new_n16765_ q=$abc$109383$new_n16769_
 .subckt nand2_x0 i0=$abc$109383$new_n16769_ i1=$abc$109383$new_n15730_ nq=$abc$109383$new_n16770_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][18] i1=soc.cpu.minerva.gprf.mem._mem[24][18] q=$abc$109383$new_n16771_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][18] i1=soc.cpu.minerva.gprf.mem._mem[24][18] q=$abc$109383$new_n16771_
 .subckt nand2_x0 i0=$abc$109383$new_n16771_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n16772_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][18] q=$abc$109383$new_n16773_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][18] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n16774_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][18] nq=$abc$109383$new_n16773_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][18] i1=$abc$109383$new_n16182_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n16774_
 .subckt nand2_x0 i0=$abc$109383$new_n16774_ i1=$abc$109383$new_n16773_ nq=$abc$109383$new_n16775_
 .subckt nand3_x0 i0=$abc$109383$new_n16775_ i1=$abc$109383$new_n16772_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16776_
-.subckt a3_x2 i0=$abc$109383$new_n16776_ i1=$abc$109383$new_n16770_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16777_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][18] i1=soc.cpu.minerva.gprf.mem._mem[8][18] q=$abc$109383$new_n16778_
+.subckt and3_x1 i0=$abc$109383$new_n16776_ i1=$abc$109383$new_n16770_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16777_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][18] i1=soc.cpu.minerva.gprf.mem._mem[8][18] q=$abc$109383$new_n16778_
 .subckt nand2_x0 i0=$abc$109383$new_n16778_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16779_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][18] q=$abc$109383$new_n16780_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][18] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16781_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][18] nq=$abc$109383$new_n16780_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][18] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16781_
 .subckt nand2_x0 i0=$abc$109383$new_n16781_ i1=$abc$109383$new_n16780_ nq=$abc$109383$new_n16782_
 .subckt nand3_x0 i0=$abc$109383$new_n16782_ i1=$abc$109383$new_n16779_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16783_
-.subckt mx2_x2 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][18] i1=soc.cpu.minerva.gprf.mem._mem[11][18] q=$abc$109383$new_n16784_
+.subckt mux2_x1 cmd=$abc$109383$new_n16437_ i0=soc.cpu.minerva.gprf.mem._mem[15][18] i1=soc.cpu.minerva.gprf.mem._mem[11][18] q=$abc$109383$new_n16784_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n16785_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][18] i1=soc.cpu.minerva.gprf.mem._mem[10][18] q=$abc$109383$new_n16786_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16786_ i1=$abc$109383$new_n16784_ q=$abc$109383$new_n16787_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16787_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16788_
-.subckt a2_x2 i0=$abc$109383$new_n16788_ i1=$abc$109383$new_n16783_ q=$abc$109383$new_n16789_
-.subckt ao22_x2 i0=$abc$109383$new_n16789_ i1=$abc$109383$new_n16777_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16790_
-.subckt o2_x2 i0=$abc$109383$new_n16790_ i1=$abc$109383$new_n16762_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[18]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][19] i1=soc.cpu.minerva.gprf.mem._mem[16][19] q=$abc$109383$new_n16792_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][18] i1=soc.cpu.minerva.gprf.mem._mem[10][18] q=$abc$109383$new_n16786_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16786_ i1=$abc$109383$new_n16784_ q=$abc$109383$new_n16787_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16787_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16788_
+.subckt and2_x1 i0=$abc$109383$new_n16788_ i1=$abc$109383$new_n16783_ q=$abc$109383$new_n16789_
+.subckt and21nor_x1 i0=$abc$109383$new_n16789_ i1=$abc$109383$new_n16777_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16790_
+.subckt or2_x1 i0=$abc$109383$new_n16790_ i1=$abc$109383$new_n16762_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[18]
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][19] i1=soc.cpu.minerva.gprf.mem._mem[16][19] q=$abc$109383$new_n16792_
 .subckt nand2_x0 i0=$abc$109383$new_n16792_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n16793_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][19] q=$abc$109383$new_n16794_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][19] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n16795_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][19] nq=$abc$109383$new_n16794_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][19] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n16795_
 .subckt nand2_x0 i0=$abc$109383$new_n16795_ i1=$abc$109383$new_n16794_ nq=$abc$109383$new_n16796_
 .subckt nand3_x0 i0=$abc$109383$new_n16796_ i1=$abc$109383$new_n16793_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n16797_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][19] i1=soc.cpu.minerva.gprf.mem._mem[18][19] q=$abc$109383$new_n16798_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][19] i1=soc.cpu.minerva.gprf.mem._mem[18][19] q=$abc$109383$new_n16798_
 .subckt nand2_x0 i0=$abc$109383$new_n16798_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n16799_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][19] q=$abc$109383$new_n16800_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][19] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n16801_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][19] nq=$abc$109383$new_n16800_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][19] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n16801_
 .subckt nand2_x0 i0=$abc$109383$new_n16801_ i1=$abc$109383$new_n16800_ nq=$abc$109383$new_n16802_
 .subckt nand3_x0 i0=$abc$109383$new_n16802_ i1=$abc$109383$new_n16799_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n16803_
 .subckt nand3_x0 i0=$abc$109383$new_n16803_ i1=$abc$109383$new_n16797_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n16804_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][19] nq=$abc$109383$new_n16805_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][19] nq=$abc$109383$new_n16806_
 .subckt buf_x4 i=$abc$109383$new_n15584_ q=$abc$109383$new_n16807_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16806_ i1=$abc$109383$new_n16805_ q=$abc$109383$new_n16808_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16806_ i1=$abc$109383$new_n16805_ q=$abc$109383$new_n16808_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][19] nq=$abc$109383$new_n16809_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][19] nq=$abc$109383$new_n16810_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16810_ i1=$abc$109383$new_n16809_ q=$abc$109383$new_n16811_
-.subckt mx2_x2 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n16811_ i1=$abc$109383$new_n16808_ q=$abc$109383$new_n16812_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16810_ i1=$abc$109383$new_n16809_ q=$abc$109383$new_n16811_
+.subckt mux2_x1 cmd=$abc$109383$new_n15588_ i0=$abc$109383$new_n16811_ i1=$abc$109383$new_n16808_ q=$abc$109383$new_n16812_
 .subckt nand2_x0 i0=$abc$109383$new_n16812_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n16813_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][19] i1=soc.cpu.minerva.gprf.mem._mem[0][19] q=$abc$109383$new_n16814_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][19] i1=soc.cpu.minerva.gprf.mem._mem[0][19] q=$abc$109383$new_n16814_
 .subckt nand2_x0 i0=$abc$109383$new_n16814_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n16815_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][19] q=$abc$109383$new_n16816_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][19] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n16817_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][19] nq=$abc$109383$new_n16816_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][19] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n16817_
 .subckt nand2_x0 i0=$abc$109383$new_n16817_ i1=$abc$109383$new_n16816_ nq=$abc$109383$new_n16818_
 .subckt nand3_x0 i0=$abc$109383$new_n16818_ i1=$abc$109383$new_n16815_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n16819_
 .subckt nand3_x0 i0=$abc$109383$new_n16819_ i1=$abc$109383$new_n16813_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n16820_
-.subckt oa22_x2 i0=$abc$109383$new_n16820_ i1=$abc$109383$new_n16804_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n16821_
+.subckt or21nand_x1 i0=$abc$109383$new_n16820_ i1=$abc$109383$new_n16804_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n16821_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][19] nq=$abc$109383$new_n16822_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][19] nq=$abc$109383$new_n16823_
-.subckt mx2_x2 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16823_ i1=$abc$109383$new_n16822_ q=$abc$109383$new_n16824_
+.subckt mux2_x1 cmd=$abc$109383$new_n15815_ i0=$abc$109383$new_n16823_ i1=$abc$109383$new_n16822_ q=$abc$109383$new_n16824_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][19] nq=$abc$109383$new_n16825_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][19] nq=$abc$109383$new_n16826_
 .subckt buf_x4 i=$abc$109383$new_n15528_ q=$abc$109383$new_n16827_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n16826_ i1=$abc$109383$new_n16825_ q=$abc$109383$new_n16828_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16828_ i1=$abc$109383$new_n16824_ q=$abc$109383$new_n16829_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n16826_ i1=$abc$109383$new_n16825_ q=$abc$109383$new_n16828_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16828_ i1=$abc$109383$new_n16824_ q=$abc$109383$new_n16829_
 .subckt nand2_x0 i0=$abc$109383$new_n16829_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n16830_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][19] i1=soc.cpu.minerva.gprf.mem._mem[24][19] q=$abc$109383$new_n16831_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[28][19] i1=soc.cpu.minerva.gprf.mem._mem[24][19] q=$abc$109383$new_n16831_
 .subckt nand2_x0 i0=$abc$109383$new_n16831_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n16832_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][19] q=$abc$109383$new_n16833_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][19] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n16834_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][19] nq=$abc$109383$new_n16833_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][19] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n16834_
 .subckt nand2_x0 i0=$abc$109383$new_n16834_ i1=$abc$109383$new_n16833_ nq=$abc$109383$new_n16835_
 .subckt nand3_x0 i0=$abc$109383$new_n16835_ i1=$abc$109383$new_n16832_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n16836_
 .subckt nand3_x0 i0=$abc$109383$new_n16836_ i1=$abc$109383$new_n16830_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n16837_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][19] i1=soc.cpu.minerva.gprf.mem._mem[8][19] q=$abc$109383$new_n16838_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][19] i1=soc.cpu.minerva.gprf.mem._mem[8][19] q=$abc$109383$new_n16838_
 .subckt nand2_x0 i0=$abc$109383$new_n16838_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n16839_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][19] q=$abc$109383$new_n16840_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][19] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n16841_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][19] nq=$abc$109383$new_n16840_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][19] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n16841_
 .subckt nand2_x0 i0=$abc$109383$new_n16841_ i1=$abc$109383$new_n16840_ nq=$abc$109383$new_n16842_
 .subckt nand3_x0 i0=$abc$109383$new_n16842_ i1=$abc$109383$new_n16839_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n16843_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][19] i1=soc.cpu.minerva.gprf.mem._mem[10][19] q=$abc$109383$new_n16844_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][19] i1=soc.cpu.minerva.gprf.mem._mem[10][19] q=$abc$109383$new_n16844_
 .subckt nand2_x0 i0=$abc$109383$new_n16844_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n16845_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][19] q=$abc$109383$new_n16846_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][19] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n16847_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[15][19] nq=$abc$109383$new_n16846_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][19] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n16847_
 .subckt nand2_x0 i0=$abc$109383$new_n16847_ i1=$abc$109383$new_n16846_ nq=$abc$109383$new_n16848_
 .subckt nand3_x0 i0=$abc$109383$new_n16848_ i1=$abc$109383$new_n16845_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n16849_
 .subckt nand3_x0 i0=$abc$109383$new_n16849_ i1=$abc$109383$new_n16843_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n16850_
-.subckt oa22_x2 i0=$abc$109383$new_n16850_ i1=$abc$109383$new_n16837_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n16851_
+.subckt or21nand_x1 i0=$abc$109383$new_n16850_ i1=$abc$109383$new_n16837_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n16851_
 .subckt nand2_x0 i0=$abc$109383$new_n16851_ i1=$abc$109383$new_n16821_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[19]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][20] i1=soc.cpu.minerva.gprf.mem._mem[16][20] q=$abc$109383$new_n16853_
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][20] i1=soc.cpu.minerva.gprf.mem._mem[16][20] q=$abc$109383$new_n16853_
 .subckt nand2_x0 i0=$abc$109383$new_n16853_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16854_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][20] q=$abc$109383$new_n16855_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][20] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ q=$abc$109383$new_n16856_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][20] nq=$abc$109383$new_n16855_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][20] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15910_ nq=$abc$109383$new_n16856_
 .subckt nand2_x0 i0=$abc$109383$new_n16856_ i1=$abc$109383$new_n16855_ nq=$abc$109383$new_n16857_
 .subckt nand3_x0 i0=$abc$109383$new_n16857_ i1=$abc$109383$new_n16854_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16858_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][20] i1=soc.cpu.minerva.gprf.mem._mem[18][20] q=$abc$109383$new_n16859_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][20] i1=soc.cpu.minerva.gprf.mem._mem[18][20] q=$abc$109383$new_n16859_
 .subckt nand2_x0 i0=$abc$109383$new_n16859_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16860_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][20] q=$abc$109383$new_n16861_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][20] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16862_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][20] nq=$abc$109383$new_n16861_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][20] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16862_
 .subckt nand2_x0 i0=$abc$109383$new_n16862_ i1=$abc$109383$new_n16861_ nq=$abc$109383$new_n16863_
 .subckt nand3_x0 i0=$abc$109383$new_n16863_ i1=$abc$109383$new_n16860_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n16864_
-.subckt a3_x2 i0=$abc$109383$new_n16864_ i1=$abc$109383$new_n16858_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16865_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][20] i1=soc.cpu.minerva.gprf.mem._mem[2][20] q=$abc$109383$new_n16866_
+.subckt and3_x1 i0=$abc$109383$new_n16864_ i1=$abc$109383$new_n16858_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16865_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][20] i1=soc.cpu.minerva.gprf.mem._mem[2][20] q=$abc$109383$new_n16866_
 .subckt nand2_x0 i0=$abc$109383$new_n16866_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16867_
-.subckt oa22_x2 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][20] q=$abc$109383$new_n16868_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][20] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n16869_
+.subckt or21nand_x1 i0=$abc$109383$new_n16156_ i1=$abc$109383$new_n16155_ i2=soc.cpu.minerva.gprf.mem._mem[7][20] nq=$abc$109383$new_n16868_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][20] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n16869_
 .subckt nand2_x0 i0=$abc$109383$new_n16869_ i1=$abc$109383$new_n16868_ nq=$abc$109383$new_n16870_
 .subckt nand3_x0 i0=$abc$109383$new_n16870_ i1=$abc$109383$new_n16867_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n16871_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][20] i1=soc.cpu.minerva.gprf.mem._mem[0][20] q=$abc$109383$new_n16872_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][20] i1=soc.cpu.minerva.gprf.mem._mem[0][20] q=$abc$109383$new_n16872_
 .subckt nand2_x0 i0=$abc$109383$new_n16872_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n16873_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][20] q=$abc$109383$new_n16874_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][20] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n16875_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][20] nq=$abc$109383$new_n16874_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][20] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n16875_
 .subckt nand2_x0 i0=$abc$109383$new_n16875_ i1=$abc$109383$new_n16874_ nq=$abc$109383$new_n16876_
 .subckt nand3_x0 i0=$abc$109383$new_n16876_ i1=$abc$109383$new_n16873_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16877_
-.subckt a3_x2 i0=$abc$109383$new_n16877_ i1=$abc$109383$new_n16871_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16878_
-.subckt ao22_x2 i0=$abc$109383$new_n16878_ i1=$abc$109383$new_n16865_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n16879_
+.subckt and3_x1 i0=$abc$109383$new_n16877_ i1=$abc$109383$new_n16871_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16878_
+.subckt and21nor_x1 i0=$abc$109383$new_n16878_ i1=$abc$109383$new_n16865_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n16879_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][20] nq=$abc$109383$new_n16880_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][20] nq=$abc$109383$new_n16881_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16881_ i1=$abc$109383$new_n16880_ q=$abc$109383$new_n16882_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16881_ i1=$abc$109383$new_n16880_ q=$abc$109383$new_n16882_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][20] nq=$abc$109383$new_n16883_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][20] nq=$abc$109383$new_n16884_
-.subckt mx2_x2 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16884_ i1=$abc$109383$new_n16883_ q=$abc$109383$new_n16885_
-.subckt mx2_x2 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n16885_ i1=$abc$109383$new_n16882_ q=$abc$109383$new_n16886_
+.subckt mux2_x1 cmd=$abc$109383$new_n16480_ i0=$abc$109383$new_n16884_ i1=$abc$109383$new_n16883_ q=$abc$109383$new_n16885_
+.subckt mux2_x1 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n16885_ i1=$abc$109383$new_n16882_ q=$abc$109383$new_n16886_
 .subckt nand2_x0 i0=$abc$109383$new_n16886_ i1=$abc$109383$new_n15784_ nq=$abc$109383$new_n16887_
-.subckt mx2_x2 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][20] i1=soc.cpu.minerva.gprf.mem._mem[24][20] q=$abc$109383$new_n16888_
+.subckt mux2_x1 cmd=$abc$109383$new_n16300_ i0=soc.cpu.minerva.gprf.mem._mem[28][20] i1=soc.cpu.minerva.gprf.mem._mem[24][20] q=$abc$109383$new_n16888_
 .subckt nand2_x0 i0=$abc$109383$new_n16888_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n16889_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][20] q=$abc$109383$new_n16890_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][20] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n16891_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][20] nq=$abc$109383$new_n16890_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][20] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n16891_
 .subckt nand2_x0 i0=$abc$109383$new_n16891_ i1=$abc$109383$new_n16890_ nq=$abc$109383$new_n16892_
 .subckt nand3_x0 i0=$abc$109383$new_n16892_ i1=$abc$109383$new_n16889_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16893_
-.subckt a3_x2 i0=$abc$109383$new_n16893_ i1=$abc$109383$new_n16887_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16894_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][20] i1=soc.cpu.minerva.gprf.mem._mem[8][20] q=$abc$109383$new_n16895_
+.subckt and3_x1 i0=$abc$109383$new_n16893_ i1=$abc$109383$new_n16887_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16894_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][20] i1=soc.cpu.minerva.gprf.mem._mem[8][20] q=$abc$109383$new_n16895_
 .subckt nand2_x0 i0=$abc$109383$new_n16895_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16896_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][20] q=$abc$109383$new_n16897_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][20] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16898_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][20] nq=$abc$109383$new_n16897_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][20] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16898_
 .subckt nand2_x0 i0=$abc$109383$new_n16898_ i1=$abc$109383$new_n16897_ nq=$abc$109383$new_n16899_
 .subckt nand3_x0 i0=$abc$109383$new_n16899_ i1=$abc$109383$new_n16896_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16900_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][20] i1=soc.cpu.minerva.gprf.mem._mem[11][20] q=$abc$109383$new_n16901_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][20] i1=soc.cpu.minerva.gprf.mem._mem[10][20] q=$abc$109383$new_n16902_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16902_ i1=$abc$109383$new_n16901_ q=$abc$109383$new_n16903_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16903_ i2=$abc$109383$new_n16193_ q=$abc$109383$new_n16904_
-.subckt a2_x2 i0=$abc$109383$new_n16904_ i1=$abc$109383$new_n16900_ q=$abc$109383$new_n16905_
-.subckt ao22_x2 i0=$abc$109383$new_n16905_ i1=$abc$109383$new_n16894_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16906_
-.subckt o2_x2 i0=$abc$109383$new_n16906_ i1=$abc$109383$new_n16879_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[20]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][21] i1=soc.cpu.minerva.gprf.mem._mem[16][21] q=$abc$109383$new_n16908_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][20] i1=soc.cpu.minerva.gprf.mem._mem[11][20] q=$abc$109383$new_n16901_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][20] i1=soc.cpu.minerva.gprf.mem._mem[10][20] q=$abc$109383$new_n16902_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16902_ i1=$abc$109383$new_n16901_ q=$abc$109383$new_n16903_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16903_ i2=$abc$109383$new_n16193_ nq=$abc$109383$new_n16904_
+.subckt and2_x1 i0=$abc$109383$new_n16904_ i1=$abc$109383$new_n16900_ q=$abc$109383$new_n16905_
+.subckt and21nor_x1 i0=$abc$109383$new_n16905_ i1=$abc$109383$new_n16894_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16906_
+.subckt or2_x1 i0=$abc$109383$new_n16906_ i1=$abc$109383$new_n16879_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[20]
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][21] i1=soc.cpu.minerva.gprf.mem._mem[16][21] q=$abc$109383$new_n16908_
 .subckt nand2_x0 i0=$abc$109383$new_n16908_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n16909_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][21] q=$abc$109383$new_n16910_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][21] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n16911_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][21] nq=$abc$109383$new_n16910_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][21] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n16911_
 .subckt nand2_x0 i0=$abc$109383$new_n16911_ i1=$abc$109383$new_n16910_ nq=$abc$109383$new_n16912_
 .subckt nand3_x0 i0=$abc$109383$new_n16912_ i1=$abc$109383$new_n16909_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n16913_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][21] i1=soc.cpu.minerva.gprf.mem._mem[18][21] q=$abc$109383$new_n16914_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][21] i1=soc.cpu.minerva.gprf.mem._mem[18][21] q=$abc$109383$new_n16914_
 .subckt nand2_x0 i0=$abc$109383$new_n16914_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n16915_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][21] q=$abc$109383$new_n16916_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][21] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ q=$abc$109383$new_n16917_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][21] nq=$abc$109383$new_n16916_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][21] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n16092_ nq=$abc$109383$new_n16917_
 .subckt nand2_x0 i0=$abc$109383$new_n16917_ i1=$abc$109383$new_n16916_ nq=$abc$109383$new_n16918_
 .subckt nand3_x0 i0=$abc$109383$new_n16918_ i1=$abc$109383$new_n16915_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n16919_
-.subckt a3_x2 i0=$abc$109383$new_n16919_ i1=$abc$109383$new_n16913_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16920_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][21] i1=soc.cpu.minerva.gprf.mem._mem[2][21] q=$abc$109383$new_n16921_
+.subckt and3_x1 i0=$abc$109383$new_n16919_ i1=$abc$109383$new_n16913_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n16920_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][21] i1=soc.cpu.minerva.gprf.mem._mem[2][21] q=$abc$109383$new_n16921_
 .subckt nand2_x0 i0=$abc$109383$new_n16921_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n16922_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][21] q=$abc$109383$new_n16923_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][21] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n16924_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][21] nq=$abc$109383$new_n16923_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][21] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n16924_
 .subckt nand2_x0 i0=$abc$109383$new_n16924_ i1=$abc$109383$new_n16923_ nq=$abc$109383$new_n16925_
 .subckt nand3_x0 i0=$abc$109383$new_n16925_ i1=$abc$109383$new_n16922_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n16926_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][21] i1=soc.cpu.minerva.gprf.mem._mem[0][21] q=$abc$109383$new_n16927_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][21] i1=soc.cpu.minerva.gprf.mem._mem[0][21] q=$abc$109383$new_n16927_
 .subckt nand2_x0 i0=$abc$109383$new_n16927_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n16928_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][21] q=$abc$109383$new_n16929_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][21] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n16930_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][21] nq=$abc$109383$new_n16929_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][21] i1=$abc$109383$new_n16286_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n16930_
 .subckt nand2_x0 i0=$abc$109383$new_n16930_ i1=$abc$109383$new_n16929_ nq=$abc$109383$new_n16931_
 .subckt nand3_x0 i0=$abc$109383$new_n16931_ i1=$abc$109383$new_n16928_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n16932_
-.subckt a3_x2 i0=$abc$109383$new_n16932_ i1=$abc$109383$new_n16926_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16933_
-.subckt ao22_x2 i0=$abc$109383$new_n16933_ i1=$abc$109383$new_n16920_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n16934_
+.subckt and3_x1 i0=$abc$109383$new_n16932_ i1=$abc$109383$new_n16926_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n16933_
+.subckt and21nor_x1 i0=$abc$109383$new_n16933_ i1=$abc$109383$new_n16920_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n16934_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][21] nq=$abc$109383$new_n16935_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][21] nq=$abc$109383$new_n16936_
 .subckt buf_x4 i=$abc$109383$new_n15527_ q=$abc$109383$new_n16937_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n16936_ i1=$abc$109383$new_n16935_ q=$abc$109383$new_n16938_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n16936_ i1=$abc$109383$new_n16935_ q=$abc$109383$new_n16938_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][21] nq=$abc$109383$new_n16939_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][21] nq=$abc$109383$new_n16940_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n16940_ i1=$abc$109383$new_n16939_ q=$abc$109383$new_n16941_
-.subckt mx2_x2 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n16941_ i1=$abc$109383$new_n16938_ q=$abc$109383$new_n16942_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n16940_ i1=$abc$109383$new_n16939_ q=$abc$109383$new_n16941_
+.subckt mux2_x1 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n16941_ i1=$abc$109383$new_n16938_ q=$abc$109383$new_n16942_
 .subckt nand2_x0 i0=$abc$109383$new_n16942_ i1=$abc$109383$new_n15784_ nq=$abc$109383$new_n16943_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][21] i1=soc.cpu.minerva.gprf.mem._mem[24][21] q=$abc$109383$new_n16944_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][21] i1=soc.cpu.minerva.gprf.mem._mem[24][21] q=$abc$109383$new_n16944_
 .subckt nand2_x0 i0=$abc$109383$new_n16944_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n16945_
-.subckt oa22_x2 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][21] q=$abc$109383$new_n16946_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][21] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n16947_
+.subckt or21nand_x1 i0=$abc$109383$new_n16304_ i1=$abc$109383$new_n16303_ i2=soc.cpu.minerva.gprf.mem._mem[29][21] nq=$abc$109383$new_n16946_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][21] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n16947_
 .subckt nand2_x0 i0=$abc$109383$new_n16947_ i1=$abc$109383$new_n16946_ nq=$abc$109383$new_n16948_
 .subckt nand3_x0 i0=$abc$109383$new_n16948_ i1=$abc$109383$new_n16945_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n16949_
-.subckt a3_x2 i0=$abc$109383$new_n16949_ i1=$abc$109383$new_n16943_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16950_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][21] i1=soc.cpu.minerva.gprf.mem._mem[8][21] q=$abc$109383$new_n16951_
+.subckt and3_x1 i0=$abc$109383$new_n16949_ i1=$abc$109383$new_n16943_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n16950_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][21] i1=soc.cpu.minerva.gprf.mem._mem[8][21] q=$abc$109383$new_n16951_
 .subckt nand2_x0 i0=$abc$109383$new_n16951_ i1=$abc$109383$new_n16245_ nq=$abc$109383$new_n16952_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][21] q=$abc$109383$new_n16953_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][21] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n16954_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][21] nq=$abc$109383$new_n16953_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][21] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n16954_
 .subckt nand2_x0 i0=$abc$109383$new_n16954_ i1=$abc$109383$new_n16953_ nq=$abc$109383$new_n16955_
 .subckt nand3_x0 i0=$abc$109383$new_n16955_ i1=$abc$109383$new_n16952_ i2=$abc$109383$new_n16244_ nq=$abc$109383$new_n16956_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][21] i1=soc.cpu.minerva.gprf.mem._mem[11][21] q=$abc$109383$new_n16957_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][21] i1=soc.cpu.minerva.gprf.mem._mem[10][21] q=$abc$109383$new_n16958_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16958_ i1=$abc$109383$new_n16957_ q=$abc$109383$new_n16959_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16959_ i2=$abc$109383$new_n15516_ q=$abc$109383$new_n16960_
-.subckt a2_x2 i0=$abc$109383$new_n16960_ i1=$abc$109383$new_n16956_ q=$abc$109383$new_n16961_
-.subckt ao22_x2 i0=$abc$109383$new_n16961_ i1=$abc$109383$new_n16950_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n16962_
-.subckt o2_x2 i0=$abc$109383$new_n16962_ i1=$abc$109383$new_n16934_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[21]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][22] i1=soc.cpu.minerva.gprf.mem._mem[16][22] q=$abc$109383$new_n16964_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][21] i1=soc.cpu.minerva.gprf.mem._mem[11][21] q=$abc$109383$new_n16957_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][21] i1=soc.cpu.minerva.gprf.mem._mem[10][21] q=$abc$109383$new_n16958_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n16958_ i1=$abc$109383$new_n16957_ q=$abc$109383$new_n16959_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n16959_ i2=$abc$109383$new_n15516_ nq=$abc$109383$new_n16960_
+.subckt and2_x1 i0=$abc$109383$new_n16960_ i1=$abc$109383$new_n16956_ q=$abc$109383$new_n16961_
+.subckt and21nor_x1 i0=$abc$109383$new_n16961_ i1=$abc$109383$new_n16950_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n16962_
+.subckt or2_x1 i0=$abc$109383$new_n16962_ i1=$abc$109383$new_n16934_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[21]
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][22] i1=soc.cpu.minerva.gprf.mem._mem[16][22] q=$abc$109383$new_n16964_
 .subckt nand2_x0 i0=$abc$109383$new_n16964_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n16965_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][22] q=$abc$109383$new_n16966_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][22] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n16967_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][22] nq=$abc$109383$new_n16966_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][22] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n16967_
 .subckt nand2_x0 i0=$abc$109383$new_n16967_ i1=$abc$109383$new_n16966_ nq=$abc$109383$new_n16968_
 .subckt nand3_x0 i0=$abc$109383$new_n16968_ i1=$abc$109383$new_n16965_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n16969_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][22] i1=soc.cpu.minerva.gprf.mem._mem[18][22] q=$abc$109383$new_n16970_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][22] i1=soc.cpu.minerva.gprf.mem._mem[18][22] q=$abc$109383$new_n16970_
 .subckt nand2_x0 i0=$abc$109383$new_n16970_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n16971_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][22] q=$abc$109383$new_n16972_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][22] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n16973_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][22] nq=$abc$109383$new_n16972_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][22] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n16973_
 .subckt nand2_x0 i0=$abc$109383$new_n16973_ i1=$abc$109383$new_n16972_ nq=$abc$109383$new_n16974_
 .subckt nand3_x0 i0=$abc$109383$new_n16974_ i1=$abc$109383$new_n16971_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n16975_
 .subckt nand3_x0 i0=$abc$109383$new_n16975_ i1=$abc$109383$new_n16969_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n16976_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][22] nq=$abc$109383$new_n16977_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][22] nq=$abc$109383$new_n16978_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16978_ i1=$abc$109383$new_n16977_ q=$abc$109383$new_n16979_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16978_ i1=$abc$109383$new_n16977_ q=$abc$109383$new_n16979_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][22] nq=$abc$109383$new_n16980_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][22] nq=$abc$109383$new_n16981_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16981_ i1=$abc$109383$new_n16980_ q=$abc$109383$new_n16982_
-.subckt mx2_x2 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n16982_ i1=$abc$109383$new_n16979_ q=$abc$109383$new_n16983_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n16981_ i1=$abc$109383$new_n16980_ q=$abc$109383$new_n16982_
+.subckt mux2_x1 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n16982_ i1=$abc$109383$new_n16979_ q=$abc$109383$new_n16983_
 .subckt nand2_x0 i0=$abc$109383$new_n16983_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n16984_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][22] i1=soc.cpu.minerva.gprf.mem._mem[0][22] q=$abc$109383$new_n16985_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][22] i1=soc.cpu.minerva.gprf.mem._mem[0][22] q=$abc$109383$new_n16985_
 .subckt nand2_x0 i0=$abc$109383$new_n16985_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n16986_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][22] q=$abc$109383$new_n16987_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][22] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n16988_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[5][22] nq=$abc$109383$new_n16987_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][22] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n16988_
 .subckt nand2_x0 i0=$abc$109383$new_n16988_ i1=$abc$109383$new_n16987_ nq=$abc$109383$new_n16989_
 .subckt nand3_x0 i0=$abc$109383$new_n16989_ i1=$abc$109383$new_n16986_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n16990_
 .subckt nand3_x0 i0=$abc$109383$new_n16990_ i1=$abc$109383$new_n16984_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n16991_
-.subckt oa22_x2 i0=$abc$109383$new_n16991_ i1=$abc$109383$new_n16976_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n16992_
+.subckt or21nand_x1 i0=$abc$109383$new_n16991_ i1=$abc$109383$new_n16976_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n16992_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][22] nq=$abc$109383$new_n16993_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][22] nq=$abc$109383$new_n16994_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n16994_ i1=$abc$109383$new_n16993_ q=$abc$109383$new_n16995_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n16994_ i1=$abc$109383$new_n16993_ q=$abc$109383$new_n16995_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][22] nq=$abc$109383$new_n16996_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][22] nq=$abc$109383$new_n16997_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n16997_ i1=$abc$109383$new_n16996_ q=$abc$109383$new_n16998_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16998_ i1=$abc$109383$new_n16995_ q=$abc$109383$new_n16999_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n16997_ i1=$abc$109383$new_n16996_ q=$abc$109383$new_n16998_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n16998_ i1=$abc$109383$new_n16995_ q=$abc$109383$new_n16999_
 .subckt nand2_x0 i0=$abc$109383$new_n16999_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n17000_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][22] i1=soc.cpu.minerva.gprf.mem._mem[24][22] q=$abc$109383$new_n17001_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][22] i1=soc.cpu.minerva.gprf.mem._mem[24][22] q=$abc$109383$new_n17001_
 .subckt nand2_x0 i0=$abc$109383$new_n17001_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n17002_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][22] q=$abc$109383$new_n17003_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][22] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n17004_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][22] nq=$abc$109383$new_n17003_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][22] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n17004_
 .subckt nand2_x0 i0=$abc$109383$new_n17004_ i1=$abc$109383$new_n17003_ nq=$abc$109383$new_n17005_
 .subckt nand3_x0 i0=$abc$109383$new_n17005_ i1=$abc$109383$new_n17002_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n17006_
 .subckt nand3_x0 i0=$abc$109383$new_n17006_ i1=$abc$109383$new_n17000_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n17007_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][22] i1=soc.cpu.minerva.gprf.mem._mem[8][22] q=$abc$109383$new_n17008_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][22] i1=soc.cpu.minerva.gprf.mem._mem[8][22] q=$abc$109383$new_n17008_
 .subckt nand2_x0 i0=$abc$109383$new_n17008_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n17009_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][22] q=$abc$109383$new_n17010_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][22] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n17011_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][22] nq=$abc$109383$new_n17010_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][22] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n17011_
 .subckt nand2_x0 i0=$abc$109383$new_n17011_ i1=$abc$109383$new_n17010_ nq=$abc$109383$new_n17012_
 .subckt nand3_x0 i0=$abc$109383$new_n17012_ i1=$abc$109383$new_n17009_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n17013_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][22] i1=soc.cpu.minerva.gprf.mem._mem[10][22] q=$abc$109383$new_n17014_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][22] i1=soc.cpu.minerva.gprf.mem._mem[10][22] q=$abc$109383$new_n17014_
 .subckt nand2_x0 i0=$abc$109383$new_n17014_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n17015_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][22] q=$abc$109383$new_n17016_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][22] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n17017_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][22] nq=$abc$109383$new_n17016_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][22] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n17017_
 .subckt nand2_x0 i0=$abc$109383$new_n17017_ i1=$abc$109383$new_n17016_ nq=$abc$109383$new_n17018_
 .subckt nand3_x0 i0=$abc$109383$new_n17018_ i1=$abc$109383$new_n17015_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n17019_
 .subckt nand3_x0 i0=$abc$109383$new_n17019_ i1=$abc$109383$new_n17013_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n17020_
-.subckt oa22_x2 i0=$abc$109383$new_n17020_ i1=$abc$109383$new_n17007_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n17021_
+.subckt or21nand_x1 i0=$abc$109383$new_n17020_ i1=$abc$109383$new_n17007_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n17021_
 .subckt nand2_x0 i0=$abc$109383$new_n17021_ i1=$abc$109383$new_n16992_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[22]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][23] i1=soc.cpu.minerva.gprf.mem._mem[16][23] q=$abc$109383$new_n17023_
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][23] i1=soc.cpu.minerva.gprf.mem._mem[16][23] q=$abc$109383$new_n17023_
 .subckt nand2_x0 i0=$abc$109383$new_n17023_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n17024_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][23] q=$abc$109383$new_n17025_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][23] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n17026_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][23] nq=$abc$109383$new_n17025_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][23] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n17026_
 .subckt nand2_x0 i0=$abc$109383$new_n17026_ i1=$abc$109383$new_n17025_ nq=$abc$109383$new_n17027_
 .subckt nand3_x0 i0=$abc$109383$new_n17027_ i1=$abc$109383$new_n17024_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n17028_
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][23] i1=soc.cpu.minerva.gprf.mem._mem[18][23] q=$abc$109383$new_n17029_
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[22][23] i1=soc.cpu.minerva.gprf.mem._mem[18][23] q=$abc$109383$new_n17029_
 .subckt nand2_x0 i0=$abc$109383$new_n17029_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n17030_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][23] q=$abc$109383$new_n17031_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][23] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n17032_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][23] nq=$abc$109383$new_n17031_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][23] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n17032_
 .subckt nand2_x0 i0=$abc$109383$new_n17032_ i1=$abc$109383$new_n17031_ nq=$abc$109383$new_n17033_
 .subckt nand3_x0 i0=$abc$109383$new_n17033_ i1=$abc$109383$new_n17030_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n17034_
 .subckt nand3_x0 i0=$abc$109383$new_n17034_ i1=$abc$109383$new_n17028_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n17035_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][23] nq=$abc$109383$new_n17036_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][23] nq=$abc$109383$new_n17037_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17037_ i1=$abc$109383$new_n17036_ q=$abc$109383$new_n17038_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17037_ i1=$abc$109383$new_n17036_ q=$abc$109383$new_n17038_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][23] nq=$abc$109383$new_n17039_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][23] nq=$abc$109383$new_n17040_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17040_ i1=$abc$109383$new_n17039_ q=$abc$109383$new_n17041_
-.subckt mx2_x2 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17041_ i1=$abc$109383$new_n17038_ q=$abc$109383$new_n17042_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17040_ i1=$abc$109383$new_n17039_ q=$abc$109383$new_n17041_
+.subckt mux2_x1 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17041_ i1=$abc$109383$new_n17038_ q=$abc$109383$new_n17042_
 .subckt nand2_x0 i0=$abc$109383$new_n17042_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n17043_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][23] i1=soc.cpu.minerva.gprf.mem._mem[0][23] q=$abc$109383$new_n17044_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][23] i1=soc.cpu.minerva.gprf.mem._mem[0][23] q=$abc$109383$new_n17044_
 .subckt nand2_x0 i0=$abc$109383$new_n17044_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n17045_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][23] q=$abc$109383$new_n17046_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][23] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n17047_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][23] nq=$abc$109383$new_n17046_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][23] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n17047_
 .subckt nand2_x0 i0=$abc$109383$new_n17047_ i1=$abc$109383$new_n17046_ nq=$abc$109383$new_n17048_
 .subckt nand3_x0 i0=$abc$109383$new_n17048_ i1=$abc$109383$new_n17045_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n17049_
 .subckt nand3_x0 i0=$abc$109383$new_n17049_ i1=$abc$109383$new_n17043_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n17050_
-.subckt oa22_x2 i0=$abc$109383$new_n17050_ i1=$abc$109383$new_n17035_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n17051_
+.subckt or21nand_x1 i0=$abc$109383$new_n17050_ i1=$abc$109383$new_n17035_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n17051_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][23] nq=$abc$109383$new_n17052_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][23] nq=$abc$109383$new_n17053_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17053_ i1=$abc$109383$new_n17052_ q=$abc$109383$new_n17054_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17053_ i1=$abc$109383$new_n17052_ q=$abc$109383$new_n17054_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][23] nq=$abc$109383$new_n17055_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][23] nq=$abc$109383$new_n17056_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17056_ i1=$abc$109383$new_n17055_ q=$abc$109383$new_n17057_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n17057_ i1=$abc$109383$new_n17054_ q=$abc$109383$new_n17058_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17056_ i1=$abc$109383$new_n17055_ q=$abc$109383$new_n17057_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n17057_ i1=$abc$109383$new_n17054_ q=$abc$109383$new_n17058_
 .subckt nand2_x0 i0=$abc$109383$new_n17058_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n17059_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][23] i1=soc.cpu.minerva.gprf.mem._mem[24][23] q=$abc$109383$new_n17060_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][23] i1=soc.cpu.minerva.gprf.mem._mem[24][23] q=$abc$109383$new_n17060_
 .subckt nand2_x0 i0=$abc$109383$new_n17060_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n17061_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][23] q=$abc$109383$new_n17062_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][23] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15588_ q=$abc$109383$new_n17063_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][23] nq=$abc$109383$new_n17062_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][23] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15588_ nq=$abc$109383$new_n17063_
 .subckt nand2_x0 i0=$abc$109383$new_n17063_ i1=$abc$109383$new_n17062_ nq=$abc$109383$new_n17064_
 .subckt nand3_x0 i0=$abc$109383$new_n17064_ i1=$abc$109383$new_n17061_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n17065_
 .subckt nand3_x0 i0=$abc$109383$new_n17065_ i1=$abc$109383$new_n17059_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n17066_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][23] i1=soc.cpu.minerva.gprf.mem._mem[8][23] q=$abc$109383$new_n17067_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][23] i1=soc.cpu.minerva.gprf.mem._mem[8][23] q=$abc$109383$new_n17067_
 .subckt nand2_x0 i0=$abc$109383$new_n17067_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n17068_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][23] q=$abc$109383$new_n17069_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][23] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n17070_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[13][23] nq=$abc$109383$new_n17069_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][23] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n17070_
 .subckt nand2_x0 i0=$abc$109383$new_n17070_ i1=$abc$109383$new_n17069_ nq=$abc$109383$new_n17071_
 .subckt nand3_x0 i0=$abc$109383$new_n17071_ i1=$abc$109383$new_n17068_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n17072_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][23] i1=soc.cpu.minerva.gprf.mem._mem[10][23] q=$abc$109383$new_n17073_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][23] i1=soc.cpu.minerva.gprf.mem._mem[10][23] q=$abc$109383$new_n17073_
 .subckt nand2_x0 i0=$abc$109383$new_n17073_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n17074_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][23] q=$abc$109383$new_n17075_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][23] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n17076_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][23] nq=$abc$109383$new_n17075_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][23] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n17076_
 .subckt nand2_x0 i0=$abc$109383$new_n17076_ i1=$abc$109383$new_n17075_ nq=$abc$109383$new_n17077_
 .subckt nand3_x0 i0=$abc$109383$new_n17077_ i1=$abc$109383$new_n17074_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n17078_
 .subckt nand3_x0 i0=$abc$109383$new_n17078_ i1=$abc$109383$new_n17072_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n17079_
-.subckt oa22_x2 i0=$abc$109383$new_n17079_ i1=$abc$109383$new_n17066_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n17080_
+.subckt or21nand_x1 i0=$abc$109383$new_n17079_ i1=$abc$109383$new_n17066_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n17080_
 .subckt nand2_x0 i0=$abc$109383$new_n17080_ i1=$abc$109383$new_n17051_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[23]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][24] i1=soc.cpu.minerva.gprf.mem._mem[16][24] q=$abc$109383$new_n17082_
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][24] i1=soc.cpu.minerva.gprf.mem._mem[16][24] q=$abc$109383$new_n17082_
 .subckt nand2_x0 i0=$abc$109383$new_n17082_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n17083_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][24] q=$abc$109383$new_n17084_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][24] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n17085_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][24] nq=$abc$109383$new_n17084_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][24] i1=$abc$109383$new_n16204_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n17085_
 .subckt nand2_x0 i0=$abc$109383$new_n17085_ i1=$abc$109383$new_n17084_ nq=$abc$109383$new_n17086_
 .subckt nand3_x0 i0=$abc$109383$new_n17086_ i1=$abc$109383$new_n17083_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n17087_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][24] i1=soc.cpu.minerva.gprf.mem._mem[18][24] q=$abc$109383$new_n17088_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][24] i1=soc.cpu.minerva.gprf.mem._mem[18][24] q=$abc$109383$new_n17088_
 .subckt nand2_x0 i0=$abc$109383$new_n17088_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n17089_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][24] q=$abc$109383$new_n17090_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][24] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n17091_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][24] nq=$abc$109383$new_n17090_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][24] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n17091_
 .subckt nand2_x0 i0=$abc$109383$new_n17091_ i1=$abc$109383$new_n17090_ nq=$abc$109383$new_n17092_
 .subckt nand3_x0 i0=$abc$109383$new_n17092_ i1=$abc$109383$new_n17089_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n17093_
-.subckt a3_x2 i0=$abc$109383$new_n17093_ i1=$abc$109383$new_n17087_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17094_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][24] i1=soc.cpu.minerva.gprf.mem._mem[2][24] q=$abc$109383$new_n17095_
+.subckt and3_x1 i0=$abc$109383$new_n17093_ i1=$abc$109383$new_n17087_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17094_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][24] i1=soc.cpu.minerva.gprf.mem._mem[2][24] q=$abc$109383$new_n17095_
 .subckt nand2_x0 i0=$abc$109383$new_n17095_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n17096_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][24] q=$abc$109383$new_n17097_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][24] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n17098_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][24] nq=$abc$109383$new_n17097_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][24] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n17098_
 .subckt nand2_x0 i0=$abc$109383$new_n17098_ i1=$abc$109383$new_n17097_ nq=$abc$109383$new_n17099_
 .subckt nand3_x0 i0=$abc$109383$new_n17099_ i1=$abc$109383$new_n17096_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n17100_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][24] i1=soc.cpu.minerva.gprf.mem._mem[0][24] q=$abc$109383$new_n17101_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][24] i1=soc.cpu.minerva.gprf.mem._mem[0][24] q=$abc$109383$new_n17101_
 .subckt nand2_x0 i0=$abc$109383$new_n17101_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n17102_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][24] q=$abc$109383$new_n17103_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][24] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n17104_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][24] nq=$abc$109383$new_n17103_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][24] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n17104_
 .subckt nand2_x0 i0=$abc$109383$new_n17104_ i1=$abc$109383$new_n17103_ nq=$abc$109383$new_n17105_
 .subckt nand3_x0 i0=$abc$109383$new_n17105_ i1=$abc$109383$new_n17102_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n17106_
-.subckt a3_x2 i0=$abc$109383$new_n17106_ i1=$abc$109383$new_n17100_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n17107_
-.subckt ao22_x2 i0=$abc$109383$new_n17107_ i1=$abc$109383$new_n17094_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n17108_
+.subckt and3_x1 i0=$abc$109383$new_n17106_ i1=$abc$109383$new_n17100_ i2=$abc$109383$new_n16340_ q=$abc$109383$new_n17107_
+.subckt and21nor_x1 i0=$abc$109383$new_n17107_ i1=$abc$109383$new_n17094_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n17108_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][24] nq=$abc$109383$new_n17109_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][24] nq=$abc$109383$new_n17110_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17110_ i1=$abc$109383$new_n17109_ q=$abc$109383$new_n17111_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17110_ i1=$abc$109383$new_n17109_ q=$abc$109383$new_n17111_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][24] nq=$abc$109383$new_n17112_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][24] nq=$abc$109383$new_n17113_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17113_ i1=$abc$109383$new_n17112_ q=$abc$109383$new_n17114_
-.subckt mx2_x2 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17114_ i1=$abc$109383$new_n17111_ q=$abc$109383$new_n17115_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17113_ i1=$abc$109383$new_n17112_ q=$abc$109383$new_n17114_
+.subckt mux2_x1 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17114_ i1=$abc$109383$new_n17111_ q=$abc$109383$new_n17115_
 .subckt nand2_x0 i0=$abc$109383$new_n17115_ i1=$abc$109383$new_n15784_ nq=$abc$109383$new_n17116_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][24] i1=soc.cpu.minerva.gprf.mem._mem[24][24] q=$abc$109383$new_n17117_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][24] i1=soc.cpu.minerva.gprf.mem._mem[24][24] q=$abc$109383$new_n17117_
 .subckt nand2_x0 i0=$abc$109383$new_n17117_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n17118_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][24] q=$abc$109383$new_n17119_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][24] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n17120_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][24] nq=$abc$109383$new_n17119_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][24] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n17120_
 .subckt nand2_x0 i0=$abc$109383$new_n17120_ i1=$abc$109383$new_n17119_ nq=$abc$109383$new_n17121_
 .subckt nand3_x0 i0=$abc$109383$new_n17121_ i1=$abc$109383$new_n17118_ i2=$abc$109383$new_n16364_ nq=$abc$109383$new_n17122_
-.subckt a3_x2 i0=$abc$109383$new_n17122_ i1=$abc$109383$new_n17116_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n17123_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][24] i1=soc.cpu.minerva.gprf.mem._mem[8][24] q=$abc$109383$new_n17124_
+.subckt and3_x1 i0=$abc$109383$new_n17122_ i1=$abc$109383$new_n17116_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n17123_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][24] i1=soc.cpu.minerva.gprf.mem._mem[8][24] q=$abc$109383$new_n17124_
 .subckt nand2_x0 i0=$abc$109383$new_n17124_ i1=$abc$109383$new_n15591_ nq=$abc$109383$new_n17125_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][24] q=$abc$109383$new_n17126_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][24] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n17127_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][24] nq=$abc$109383$new_n17126_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][24] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n17127_
 .subckt nand2_x0 i0=$abc$109383$new_n17127_ i1=$abc$109383$new_n17126_ nq=$abc$109383$new_n17128_
 .subckt nand3_x0 i0=$abc$109383$new_n17128_ i1=$abc$109383$new_n17125_ i2=$abc$109383$new_n15802_ nq=$abc$109383$new_n17129_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][24] i1=soc.cpu.minerva.gprf.mem._mem[11][24] q=$abc$109383$new_n17130_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][24] i1=soc.cpu.minerva.gprf.mem._mem[10][24] q=$abc$109383$new_n17131_
-.subckt mx2_x2 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n17131_ i1=$abc$109383$new_n17130_ q=$abc$109383$new_n17132_
-.subckt ao22_x2 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n17132_ i2=$abc$109383$new_n15516_ q=$abc$109383$new_n17133_
-.subckt a2_x2 i0=$abc$109383$new_n17133_ i1=$abc$109383$new_n17129_ q=$abc$109383$new_n17134_
-.subckt ao22_x2 i0=$abc$109383$new_n17134_ i1=$abc$109383$new_n17123_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n17135_
-.subckt o2_x2 i0=$abc$109383$new_n17135_ i1=$abc$109383$new_n17108_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[24]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][25] i1=soc.cpu.minerva.gprf.mem._mem[16][25] q=$abc$109383$new_n17137_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][24] i1=soc.cpu.minerva.gprf.mem._mem[11][24] q=$abc$109383$new_n17130_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][24] i1=soc.cpu.minerva.gprf.mem._mem[10][24] q=$abc$109383$new_n17131_
+.subckt mux2_x1 cmd=$abc$109383$new_n16381_ i0=$abc$109383$new_n17131_ i1=$abc$109383$new_n17130_ q=$abc$109383$new_n17132_
+.subckt and21nor_x1 i0=$abc$109383$new_n16319_ i1=$abc$109383$new_n17132_ i2=$abc$109383$new_n15516_ nq=$abc$109383$new_n17133_
+.subckt and2_x1 i0=$abc$109383$new_n17133_ i1=$abc$109383$new_n17129_ q=$abc$109383$new_n17134_
+.subckt and21nor_x1 i0=$abc$109383$new_n17134_ i1=$abc$109383$new_n17123_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n17135_
+.subckt or2_x1 i0=$abc$109383$new_n17135_ i1=$abc$109383$new_n17108_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[24]
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][25] i1=soc.cpu.minerva.gprf.mem._mem[16][25] q=$abc$109383$new_n17137_
 .subckt nand2_x0 i0=$abc$109383$new_n17137_ i1=$abc$109383$new_n16260_ nq=$abc$109383$new_n17138_
-.subckt oa22_x2 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][25] q=$abc$109383$new_n17139_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][25] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n17140_
+.subckt or21nand_x1 i0=$abc$109383$new_n16264_ i1=$abc$109383$new_n16263_ i2=soc.cpu.minerva.gprf.mem._mem[21][25] nq=$abc$109383$new_n17139_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][25] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n17140_
 .subckt nand2_x0 i0=$abc$109383$new_n17140_ i1=$abc$109383$new_n17139_ nq=$abc$109383$new_n17141_
 .subckt nand3_x0 i0=$abc$109383$new_n17141_ i1=$abc$109383$new_n17138_ i2=$abc$109383$new_n16259_ nq=$abc$109383$new_n17142_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][25] i1=soc.cpu.minerva.gprf.mem._mem[18][25] q=$abc$109383$new_n17143_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][25] i1=soc.cpu.minerva.gprf.mem._mem[18][25] q=$abc$109383$new_n17143_
 .subckt nand2_x0 i0=$abc$109383$new_n17143_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n17144_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][25] q=$abc$109383$new_n17145_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][25] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n17146_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][25] nq=$abc$109383$new_n17145_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][25] i1=$abc$109383$new_n16272_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n17146_
 .subckt nand2_x0 i0=$abc$109383$new_n17146_ i1=$abc$109383$new_n17145_ nq=$abc$109383$new_n17147_
 .subckt nand3_x0 i0=$abc$109383$new_n17147_ i1=$abc$109383$new_n17144_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n17148_
-.subckt a3_x2 i0=$abc$109383$new_n17148_ i1=$abc$109383$new_n17142_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17149_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][25] i1=soc.cpu.minerva.gprf.mem._mem[2][25] q=$abc$109383$new_n17150_
+.subckt and3_x1 i0=$abc$109383$new_n17148_ i1=$abc$109383$new_n17142_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17149_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][25] i1=soc.cpu.minerva.gprf.mem._mem[2][25] q=$abc$109383$new_n17150_
 .subckt nand2_x0 i0=$abc$109383$new_n17150_ i1=$abc$109383$new_n16341_ nq=$abc$109383$new_n17151_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][25] q=$abc$109383$new_n17152_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][25] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n17153_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][25] nq=$abc$109383$new_n17152_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][25] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n17153_
 .subckt nand2_x0 i0=$abc$109383$new_n17153_ i1=$abc$109383$new_n17152_ nq=$abc$109383$new_n17154_
 .subckt nand3_x0 i0=$abc$109383$new_n17154_ i1=$abc$109383$new_n17151_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n17155_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][25] i1=soc.cpu.minerva.gprf.mem._mem[0][25] q=$abc$109383$new_n17156_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][25] i1=soc.cpu.minerva.gprf.mem._mem[0][25] q=$abc$109383$new_n17156_
 .subckt nand2_x0 i0=$abc$109383$new_n17156_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n17157_
-.subckt oa22_x2 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][25] q=$abc$109383$new_n17158_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][25] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n17159_
+.subckt or21nand_x1 i0=$abc$109383$new_n16408_ i1=$abc$109383$new_n16407_ i2=soc.cpu.minerva.gprf.mem._mem[5][25] nq=$abc$109383$new_n17158_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][25] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n17159_
 .subckt nand2_x0 i0=$abc$109383$new_n17159_ i1=$abc$109383$new_n17158_ nq=$abc$109383$new_n17160_
 .subckt nand3_x0 i0=$abc$109383$new_n17160_ i1=$abc$109383$new_n17157_ i2=$abc$109383$new_n16404_ nq=$abc$109383$new_n17161_
-.subckt a3_x2 i0=$abc$109383$new_n17161_ i1=$abc$109383$new_n17155_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17162_
-.subckt ao22_x2 i0=$abc$109383$new_n17162_ i1=$abc$109383$new_n17149_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n17163_
+.subckt and3_x1 i0=$abc$109383$new_n17161_ i1=$abc$109383$new_n17155_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17162_
+.subckt and21nor_x1 i0=$abc$109383$new_n17162_ i1=$abc$109383$new_n17149_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n17163_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][25] nq=$abc$109383$new_n17164_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][25] nq=$abc$109383$new_n17165_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17165_ i1=$abc$109383$new_n17164_ q=$abc$109383$new_n17166_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17165_ i1=$abc$109383$new_n17164_ q=$abc$109383$new_n17166_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][25] nq=$abc$109383$new_n17167_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][25] nq=$abc$109383$new_n17168_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17168_ i1=$abc$109383$new_n17167_ q=$abc$109383$new_n17169_
-.subckt mx2_x2 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17169_ i1=$abc$109383$new_n17166_ q=$abc$109383$new_n17170_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17168_ i1=$abc$109383$new_n17167_ q=$abc$109383$new_n17169_
+.subckt mux2_x1 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17169_ i1=$abc$109383$new_n17166_ q=$abc$109383$new_n17170_
 .subckt nand2_x0 i0=$abc$109383$new_n17170_ i1=$abc$109383$new_n15784_ nq=$abc$109383$new_n17171_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][25] i1=soc.cpu.minerva.gprf.mem._mem[24][25] q=$abc$109383$new_n17172_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][25] i1=soc.cpu.minerva.gprf.mem._mem[24][25] q=$abc$109383$new_n17172_
 .subckt nand2_x0 i0=$abc$109383$new_n17172_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n17173_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][25] q=$abc$109383$new_n17174_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][25] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n17175_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][25] nq=$abc$109383$new_n17174_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][25] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n17175_
 .subckt nand2_x0 i0=$abc$109383$new_n17175_ i1=$abc$109383$new_n17174_ nq=$abc$109383$new_n17176_
 .subckt nand3_x0 i0=$abc$109383$new_n17176_ i1=$abc$109383$new_n17173_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n17177_
-.subckt a3_x2 i0=$abc$109383$new_n17177_ i1=$abc$109383$new_n17171_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n17178_
-.subckt mx2_x2 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][25] i1=soc.cpu.minerva.gprf.mem._mem[8][25] q=$abc$109383$new_n17179_
+.subckt and3_x1 i0=$abc$109383$new_n17177_ i1=$abc$109383$new_n17171_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n17178_
+.subckt mux2_x1 cmd=$abc$109383$new_n16430_ i0=soc.cpu.minerva.gprf.mem._mem[12][25] i1=soc.cpu.minerva.gprf.mem._mem[8][25] q=$abc$109383$new_n17179_
 .subckt nand2_x0 i0=$abc$109383$new_n17179_ i1=$abc$109383$new_n15591_ nq=$abc$109383$new_n17180_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][25] q=$abc$109383$new_n17181_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][25] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ q=$abc$109383$new_n17182_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][25] nq=$abc$109383$new_n17181_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][25] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n16375_ nq=$abc$109383$new_n17182_
 .subckt nand2_x0 i0=$abc$109383$new_n17182_ i1=$abc$109383$new_n17181_ nq=$abc$109383$new_n17183_
 .subckt nand3_x0 i0=$abc$109383$new_n17183_ i1=$abc$109383$new_n17180_ i2=$abc$109383$new_n15802_ nq=$abc$109383$new_n17184_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][25] i1=soc.cpu.minerva.gprf.mem._mem[11][25] q=$abc$109383$new_n17185_
-.subckt mx2_x2 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][25] i1=soc.cpu.minerva.gprf.mem._mem[10][25] q=$abc$109383$new_n17186_
-.subckt mx2_x2 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17186_ i1=$abc$109383$new_n17185_ q=$abc$109383$new_n17187_
-.subckt ao22_x2 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17187_ i2=$abc$109383$new_n15516_ q=$abc$109383$new_n17188_
-.subckt a2_x2 i0=$abc$109383$new_n17188_ i1=$abc$109383$new_n17184_ q=$abc$109383$new_n17189_
-.subckt ao22_x2 i0=$abc$109383$new_n17189_ i1=$abc$109383$new_n17178_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n17190_
-.subckt o2_x2 i0=$abc$109383$new_n17190_ i1=$abc$109383$new_n17163_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[25]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][26] i1=soc.cpu.minerva.gprf.mem._mem[16][26] q=$abc$109383$new_n17192_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[15][25] i1=soc.cpu.minerva.gprf.mem._mem[11][25] q=$abc$109383$new_n17185_
+.subckt mux2_x1 cmd=$abc$109383$new_n16785_ i0=soc.cpu.minerva.gprf.mem._mem[14][25] i1=soc.cpu.minerva.gprf.mem._mem[10][25] q=$abc$109383$new_n17186_
+.subckt mux2_x1 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17186_ i1=$abc$109383$new_n17185_ q=$abc$109383$new_n17187_
+.subckt and21nor_x1 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17187_ i2=$abc$109383$new_n15516_ nq=$abc$109383$new_n17188_
+.subckt and2_x1 i0=$abc$109383$new_n17188_ i1=$abc$109383$new_n17184_ q=$abc$109383$new_n17189_
+.subckt and21nor_x1 i0=$abc$109383$new_n17189_ i1=$abc$109383$new_n17178_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n17190_
+.subckt or2_x1 i0=$abc$109383$new_n17190_ i1=$abc$109383$new_n17163_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[25]
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][26] i1=soc.cpu.minerva.gprf.mem._mem[16][26] q=$abc$109383$new_n17192_
 .subckt nand2_x0 i0=$abc$109383$new_n17192_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n17193_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[21][26] q=$abc$109383$new_n17194_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][26] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n17195_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[21][26] nq=$abc$109383$new_n17194_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][26] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n17195_
 .subckt nand2_x0 i0=$abc$109383$new_n17195_ i1=$abc$109383$new_n17194_ nq=$abc$109383$new_n17196_
 .subckt nand3_x0 i0=$abc$109383$new_n17196_ i1=$abc$109383$new_n17193_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n17197_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][26] i1=soc.cpu.minerva.gprf.mem._mem[18][26] q=$abc$109383$new_n17198_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][26] i1=soc.cpu.minerva.gprf.mem._mem[18][26] q=$abc$109383$new_n17198_
 .subckt nand2_x0 i0=$abc$109383$new_n17198_ i1=$abc$109383$new_n16330_ nq=$abc$109383$new_n17199_
-.subckt oa22_x2 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][26] q=$abc$109383$new_n17200_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][26] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n17201_
+.subckt or21nand_x1 i0=$abc$109383$new_n16334_ i1=$abc$109383$new_n16333_ i2=soc.cpu.minerva.gprf.mem._mem[23][26] nq=$abc$109383$new_n17200_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][26] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n17201_
 .subckt nand2_x0 i0=$abc$109383$new_n17201_ i1=$abc$109383$new_n17200_ nq=$abc$109383$new_n17202_
 .subckt nand3_x0 i0=$abc$109383$new_n17202_ i1=$abc$109383$new_n17199_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n17203_
-.subckt a3_x2 i0=$abc$109383$new_n17203_ i1=$abc$109383$new_n17197_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17204_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][26] i1=soc.cpu.minerva.gprf.mem._mem[2][26] q=$abc$109383$new_n17205_
+.subckt and3_x1 i0=$abc$109383$new_n17203_ i1=$abc$109383$new_n17197_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17204_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][26] i1=soc.cpu.minerva.gprf.mem._mem[2][26] q=$abc$109383$new_n17205_
 .subckt nand2_x0 i0=$abc$109383$new_n17205_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n17206_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][26] q=$abc$109383$new_n17207_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][26] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n17208_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][26] nq=$abc$109383$new_n17207_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][26] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n17208_
 .subckt nand2_x0 i0=$abc$109383$new_n17208_ i1=$abc$109383$new_n17207_ nq=$abc$109383$new_n17209_
 .subckt nand3_x0 i0=$abc$109383$new_n17209_ i1=$abc$109383$new_n17206_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n17210_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][26] i1=soc.cpu.minerva.gprf.mem._mem[0][26] q=$abc$109383$new_n17211_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][26] i1=soc.cpu.minerva.gprf.mem._mem[0][26] q=$abc$109383$new_n17211_
 .subckt nand2_x0 i0=$abc$109383$new_n17211_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n17212_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[5][26] q=$abc$109383$new_n17213_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][26] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n17214_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[5][26] nq=$abc$109383$new_n17213_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][26] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n17214_
 .subckt nand2_x0 i0=$abc$109383$new_n17214_ i1=$abc$109383$new_n17213_ nq=$abc$109383$new_n17215_
 .subckt nand3_x0 i0=$abc$109383$new_n17215_ i1=$abc$109383$new_n17212_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n17216_
-.subckt a3_x2 i0=$abc$109383$new_n17216_ i1=$abc$109383$new_n17210_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17217_
-.subckt ao22_x2 i0=$abc$109383$new_n17217_ i1=$abc$109383$new_n17204_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n17218_
+.subckt and3_x1 i0=$abc$109383$new_n17216_ i1=$abc$109383$new_n17210_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17217_
+.subckt and21nor_x1 i0=$abc$109383$new_n17217_ i1=$abc$109383$new_n17204_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n17218_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][26] nq=$abc$109383$new_n17219_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][26] nq=$abc$109383$new_n17220_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17220_ i1=$abc$109383$new_n17219_ q=$abc$109383$new_n17221_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17220_ i1=$abc$109383$new_n17219_ q=$abc$109383$new_n17221_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][26] nq=$abc$109383$new_n17222_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][26] nq=$abc$109383$new_n17223_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17223_ i1=$abc$109383$new_n17222_ q=$abc$109383$new_n17224_
-.subckt mx2_x2 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17224_ i1=$abc$109383$new_n17221_ q=$abc$109383$new_n17225_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17223_ i1=$abc$109383$new_n17222_ q=$abc$109383$new_n17224_
+.subckt mux2_x1 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17224_ i1=$abc$109383$new_n17221_ q=$abc$109383$new_n17225_
 .subckt nand2_x0 i0=$abc$109383$new_n17225_ i1=$abc$109383$new_n15784_ nq=$abc$109383$new_n17226_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][26] i1=soc.cpu.minerva.gprf.mem._mem[24][26] q=$abc$109383$new_n17227_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][26] i1=soc.cpu.minerva.gprf.mem._mem[24][26] q=$abc$109383$new_n17227_
 .subckt nand2_x0 i0=$abc$109383$new_n17227_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n17228_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][26] q=$abc$109383$new_n17229_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][26] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n17230_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][26] nq=$abc$109383$new_n17229_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][26] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n17230_
 .subckt nand2_x0 i0=$abc$109383$new_n17230_ i1=$abc$109383$new_n17229_ nq=$abc$109383$new_n17231_
 .subckt nand3_x0 i0=$abc$109383$new_n17231_ i1=$abc$109383$new_n17228_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n17232_
-.subckt a3_x2 i0=$abc$109383$new_n17232_ i1=$abc$109383$new_n17226_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n17233_
-.subckt mx2_x2 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][26] i1=soc.cpu.minerva.gprf.mem._mem[8][26] q=$abc$109383$new_n17234_
+.subckt and3_x1 i0=$abc$109383$new_n17232_ i1=$abc$109383$new_n17226_ i2=$abc$109383$new_n16474_ q=$abc$109383$new_n17233_
+.subckt mux2_x1 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][26] i1=soc.cpu.minerva.gprf.mem._mem[8][26] q=$abc$109383$new_n17234_
 .subckt nand2_x0 i0=$abc$109383$new_n17234_ i1=$abc$109383$new_n15591_ nq=$abc$109383$new_n17235_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][26] q=$abc$109383$new_n17236_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][26] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n15587_ q=$abc$109383$new_n17237_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][26] nq=$abc$109383$new_n17236_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][26] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n15587_ nq=$abc$109383$new_n17237_
 .subckt nand2_x0 i0=$abc$109383$new_n17237_ i1=$abc$109383$new_n17236_ nq=$abc$109383$new_n17238_
 .subckt nand3_x0 i0=$abc$109383$new_n17238_ i1=$abc$109383$new_n17235_ i2=$abc$109383$new_n15802_ nq=$abc$109383$new_n17239_
-.subckt mx2_x2 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[15][26] i1=soc.cpu.minerva.gprf.mem._mem[11][26] q=$abc$109383$new_n17240_
-.subckt mx2_x2 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[14][26] i1=soc.cpu.minerva.gprf.mem._mem[10][26] q=$abc$109383$new_n17241_
-.subckt mx2_x2 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17241_ i1=$abc$109383$new_n17240_ q=$abc$109383$new_n17242_
-.subckt ao22_x2 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17242_ i2=$abc$109383$new_n15516_ q=$abc$109383$new_n17243_
-.subckt a2_x2 i0=$abc$109383$new_n17243_ i1=$abc$109383$new_n17239_ q=$abc$109383$new_n17244_
-.subckt ao22_x2 i0=$abc$109383$new_n17244_ i1=$abc$109383$new_n17233_ i2=$abc$109383$new_n16473_ q=$abc$109383$new_n17245_
-.subckt o2_x2 i0=$abc$109383$new_n17245_ i1=$abc$109383$new_n17218_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[26]
-.subckt mx2_x2 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][27] i1=soc.cpu.minerva.gprf.mem._mem[16][27] q=$abc$109383$new_n17247_
+.subckt mux2_x1 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[15][26] i1=soc.cpu.minerva.gprf.mem._mem[11][26] q=$abc$109383$new_n17240_
+.subckt mux2_x1 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[14][26] i1=soc.cpu.minerva.gprf.mem._mem[10][26] q=$abc$109383$new_n17241_
+.subckt mux2_x1 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17241_ i1=$abc$109383$new_n17240_ q=$abc$109383$new_n17242_
+.subckt and21nor_x1 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17242_ i2=$abc$109383$new_n15516_ nq=$abc$109383$new_n17243_
+.subckt and2_x1 i0=$abc$109383$new_n17243_ i1=$abc$109383$new_n17239_ q=$abc$109383$new_n17244_
+.subckt and21nor_x1 i0=$abc$109383$new_n17244_ i1=$abc$109383$new_n17233_ i2=$abc$109383$new_n16473_ nq=$abc$109383$new_n17245_
+.subckt or2_x1 i0=$abc$109383$new_n17245_ i1=$abc$109383$new_n17218_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[26]
+.subckt mux2_x1 cmd=$abc$109383$new_n15529_ i0=soc.cpu.minerva.gprf.mem._mem[20][27] i1=soc.cpu.minerva.gprf.mem._mem[16][27] q=$abc$109383$new_n17247_
 .subckt nand2_x0 i0=$abc$109383$new_n17247_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n17248_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][27] q=$abc$109383$new_n17249_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][27] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n17250_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[21][27] nq=$abc$109383$new_n17249_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][27] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n17250_
 .subckt nand2_x0 i0=$abc$109383$new_n17250_ i1=$abc$109383$new_n17249_ nq=$abc$109383$new_n17251_
 .subckt nand3_x0 i0=$abc$109383$new_n17251_ i1=$abc$109383$new_n17248_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n17252_
-.subckt mx2_x2 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[23][27] i1=soc.cpu.minerva.gprf.mem._mem[19][27] q=$abc$109383$new_n17253_
-.subckt mx2_x2 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[22][27] i1=soc.cpu.minerva.gprf.mem._mem[18][27] q=$abc$109383$new_n17254_
-.subckt mx2_x2 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n17254_ i1=$abc$109383$new_n17253_ q=$abc$109383$new_n17255_
-.subckt ao22_x2 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n17255_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n17256_
-.subckt a2_x2 i0=$abc$109383$new_n17256_ i1=$abc$109383$new_n17252_ q=$abc$109383$new_n17257_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][27] i1=soc.cpu.minerva.gprf.mem._mem[2][27] q=$abc$109383$new_n17258_
+.subckt mux2_x1 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[23][27] i1=soc.cpu.minerva.gprf.mem._mem[19][27] q=$abc$109383$new_n17253_
+.subckt mux2_x1 cmd=$abc$109383$new_n15707_ i0=soc.cpu.minerva.gprf.mem._mem[22][27] i1=soc.cpu.minerva.gprf.mem._mem[18][27] q=$abc$109383$new_n17254_
+.subckt mux2_x1 cmd=$abc$109383$new_n15761_ i0=$abc$109383$new_n17254_ i1=$abc$109383$new_n17253_ q=$abc$109383$new_n17255_
+.subckt and21nor_x1 i0=$abc$109383$new_n15763_ i1=$abc$109383$new_n17255_ i2=$abc$109383$new_n15576_ nq=$abc$109383$new_n17256_
+.subckt and2_x1 i0=$abc$109383$new_n17256_ i1=$abc$109383$new_n17252_ q=$abc$109383$new_n17257_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][27] i1=soc.cpu.minerva.gprf.mem._mem[2][27] q=$abc$109383$new_n17258_
 .subckt nand2_x0 i0=$abc$109383$new_n17258_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n17259_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][27] q=$abc$109383$new_n17260_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][27] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n17261_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][27] nq=$abc$109383$new_n17260_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][27] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n17261_
 .subckt nand2_x0 i0=$abc$109383$new_n17261_ i1=$abc$109383$new_n17260_ nq=$abc$109383$new_n17262_
 .subckt nand3_x0 i0=$abc$109383$new_n17262_ i1=$abc$109383$new_n17259_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n17263_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][27] i1=soc.cpu.minerva.gprf.mem._mem[0][27] q=$abc$109383$new_n17264_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][27] i1=soc.cpu.minerva.gprf.mem._mem[0][27] q=$abc$109383$new_n17264_
 .subckt nand2_x0 i0=$abc$109383$new_n17264_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n17265_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[5][27] q=$abc$109383$new_n17266_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][27] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n17267_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[5][27] nq=$abc$109383$new_n17266_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][27] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n17267_
 .subckt nand2_x0 i0=$abc$109383$new_n17267_ i1=$abc$109383$new_n17266_ nq=$abc$109383$new_n17268_
 .subckt nand3_x0 i0=$abc$109383$new_n17268_ i1=$abc$109383$new_n17265_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n17269_
-.subckt a3_x2 i0=$abc$109383$new_n17269_ i1=$abc$109383$new_n17263_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17270_
-.subckt ao22_x2 i0=$abc$109383$new_n17270_ i1=$abc$109383$new_n17257_ i2=$abc$109383$new_n16505_ q=$abc$109383$new_n17271_
-.subckt mx2_x2 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][27] i1=soc.cpu.minerva.gprf.mem._mem[26][27] q=$abc$109383$new_n17272_
+.subckt and3_x1 i0=$abc$109383$new_n17269_ i1=$abc$109383$new_n17263_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17270_
+.subckt and21nor_x1 i0=$abc$109383$new_n17270_ i1=$abc$109383$new_n17257_ i2=$abc$109383$new_n16505_ nq=$abc$109383$new_n17271_
+.subckt mux2_x1 cmd=$abc$109383$new_n15717_ i0=soc.cpu.minerva.gprf.mem._mem[30][27] i1=soc.cpu.minerva.gprf.mem._mem[26][27] q=$abc$109383$new_n17272_
 .subckt nand2_x0 i0=$abc$109383$new_n17272_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n17273_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][27] nq=$abc$109383$new_n17274_
-.subckt a3_x2 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n17274_ q=$abc$109383$new_n17275_
+.subckt and3_x1 i0=$abc$109383$new_n15664_ i1=$abc$109383$new_n15662_ i2=$abc$109383$new_n17274_ q=$abc$109383$new_n17275_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][27] nq=$abc$109383$new_n17276_
-.subckt oa22_x2 i0=$abc$109383$new_n17276_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ q=$abc$109383$new_n17277_
-.subckt ao22_x2 i0=$abc$109383$new_n17277_ i1=$abc$109383$new_n17275_ i2=$abc$109383$new_n15611_ q=$abc$109383$new_n17278_
+.subckt or21nand_x1 i0=$abc$109383$new_n17276_ i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15536_ nq=$abc$109383$new_n17277_
+.subckt and21nor_x1 i0=$abc$109383$new_n17277_ i1=$abc$109383$new_n17275_ i2=$abc$109383$new_n15611_ nq=$abc$109383$new_n17278_
 .subckt nand2_x0 i0=$abc$109383$new_n17278_ i1=$abc$109383$new_n17273_ nq=$abc$109383$new_n17279_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][27] i1=soc.cpu.minerva.gprf.mem._mem[24][27] q=$abc$109383$new_n17280_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][27] i1=soc.cpu.minerva.gprf.mem._mem[24][27] q=$abc$109383$new_n17280_
 .subckt nand2_x0 i0=$abc$109383$new_n17280_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n17281_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][27] q=$abc$109383$new_n17282_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][27] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n17283_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][27] nq=$abc$109383$new_n17282_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][27] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n17283_
 .subckt nand2_x0 i0=$abc$109383$new_n17283_ i1=$abc$109383$new_n17282_ nq=$abc$109383$new_n17284_
 .subckt nand3_x0 i0=$abc$109383$new_n17284_ i1=$abc$109383$new_n17281_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n17285_
-.subckt a3_x2 i0=$abc$109383$new_n17285_ i1=$abc$109383$new_n17279_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n17286_
-.subckt mx2_x2 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][27] i1=soc.cpu.minerva.gprf.mem._mem[8][27] q=$abc$109383$new_n17287_
+.subckt and3_x1 i0=$abc$109383$new_n17285_ i1=$abc$109383$new_n17279_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n17286_
+.subckt mux2_x1 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][27] i1=soc.cpu.minerva.gprf.mem._mem[8][27] q=$abc$109383$new_n17287_
 .subckt nand2_x0 i0=$abc$109383$new_n17287_ i1=$abc$109383$new_n15591_ nq=$abc$109383$new_n17288_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][27] q=$abc$109383$new_n17289_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][27] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n15587_ q=$abc$109383$new_n17290_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][27] nq=$abc$109383$new_n17289_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][27] i1=$abc$109383$new_n16494_ i2=$abc$109383$new_n15587_ nq=$abc$109383$new_n17290_
 .subckt nand2_x0 i0=$abc$109383$new_n17290_ i1=$abc$109383$new_n17289_ nq=$abc$109383$new_n17291_
 .subckt nand3_x0 i0=$abc$109383$new_n17291_ i1=$abc$109383$new_n17288_ i2=$abc$109383$new_n15802_ nq=$abc$109383$new_n17292_
-.subckt mx2_x2 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[15][27] i1=soc.cpu.minerva.gprf.mem._mem[11][27] q=$abc$109383$new_n17293_
-.subckt mx2_x2 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[14][27] i1=soc.cpu.minerva.gprf.mem._mem[10][27] q=$abc$109383$new_n17294_
-.subckt mx2_x2 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17294_ i1=$abc$109383$new_n17293_ q=$abc$109383$new_n17295_
-.subckt ao22_x2 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17295_ i2=$abc$109383$new_n15516_ q=$abc$109383$new_n17296_
-.subckt a2_x2 i0=$abc$109383$new_n17296_ i1=$abc$109383$new_n17292_ q=$abc$109383$new_n17297_
-.subckt ao22_x2 i0=$abc$109383$new_n17297_ i1=$abc$109383$new_n17286_ i2=$abc$109383$new_n15520_ q=$abc$109383$new_n17298_
-.subckt o2_x2 i0=$abc$109383$new_n17298_ i1=$abc$109383$new_n17271_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[27]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][28] i1=soc.cpu.minerva.gprf.mem._mem[16][28] q=$abc$109383$new_n17300_
+.subckt mux2_x1 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[15][27] i1=soc.cpu.minerva.gprf.mem._mem[11][27] q=$abc$109383$new_n17293_
+.subckt mux2_x1 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[14][27] i1=soc.cpu.minerva.gprf.mem._mem[10][27] q=$abc$109383$new_n17294_
+.subckt mux2_x1 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17294_ i1=$abc$109383$new_n17293_ q=$abc$109383$new_n17295_
+.subckt and21nor_x1 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17295_ i2=$abc$109383$new_n15516_ nq=$abc$109383$new_n17296_
+.subckt and2_x1 i0=$abc$109383$new_n17296_ i1=$abc$109383$new_n17292_ q=$abc$109383$new_n17297_
+.subckt and21nor_x1 i0=$abc$109383$new_n17297_ i1=$abc$109383$new_n17286_ i2=$abc$109383$new_n15520_ nq=$abc$109383$new_n17298_
+.subckt or2_x1 i0=$abc$109383$new_n17298_ i1=$abc$109383$new_n17271_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[27]
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][28] i1=soc.cpu.minerva.gprf.mem._mem[16][28] q=$abc$109383$new_n17300_
 .subckt nand2_x0 i0=$abc$109383$new_n17300_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n17301_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][28] q=$abc$109383$new_n17302_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][28] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n17303_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][28] nq=$abc$109383$new_n17302_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][28] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n17303_
 .subckt nand2_x0 i0=$abc$109383$new_n17303_ i1=$abc$109383$new_n17302_ nq=$abc$109383$new_n17304_
 .subckt nand3_x0 i0=$abc$109383$new_n17304_ i1=$abc$109383$new_n17301_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n17305_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[22][28] i1=soc.cpu.minerva.gprf.mem._mem[18][28] q=$abc$109383$new_n17306_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[22][28] i1=soc.cpu.minerva.gprf.mem._mem[18][28] q=$abc$109383$new_n17306_
 .subckt nand2_x0 i0=$abc$109383$new_n17306_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n17307_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][28] q=$abc$109383$new_n17308_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][28] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n17309_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][28] nq=$abc$109383$new_n17308_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][28] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n17309_
 .subckt nand2_x0 i0=$abc$109383$new_n17309_ i1=$abc$109383$new_n17308_ nq=$abc$109383$new_n17310_
 .subckt nand3_x0 i0=$abc$109383$new_n17310_ i1=$abc$109383$new_n17307_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n17311_
 .subckt nand3_x0 i0=$abc$109383$new_n17311_ i1=$abc$109383$new_n17305_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n17312_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][28] nq=$abc$109383$new_n17313_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][28] nq=$abc$109383$new_n17314_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17314_ i1=$abc$109383$new_n17313_ q=$abc$109383$new_n17315_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17314_ i1=$abc$109383$new_n17313_ q=$abc$109383$new_n17315_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][28] nq=$abc$109383$new_n17316_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][28] nq=$abc$109383$new_n17317_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17317_ i1=$abc$109383$new_n17316_ q=$abc$109383$new_n17318_
-.subckt mx2_x2 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17318_ i1=$abc$109383$new_n17315_ q=$abc$109383$new_n17319_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17317_ i1=$abc$109383$new_n17316_ q=$abc$109383$new_n17318_
+.subckt mux2_x1 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17318_ i1=$abc$109383$new_n17315_ q=$abc$109383$new_n17319_
 .subckt nand2_x0 i0=$abc$109383$new_n17319_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n17320_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][28] i1=soc.cpu.minerva.gprf.mem._mem[0][28] q=$abc$109383$new_n17321_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][28] i1=soc.cpu.minerva.gprf.mem._mem[0][28] q=$abc$109383$new_n17321_
 .subckt nand2_x0 i0=$abc$109383$new_n17321_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n17322_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][28] q=$abc$109383$new_n17323_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][28] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n17324_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][28] nq=$abc$109383$new_n17323_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][28] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n17324_
 .subckt nand2_x0 i0=$abc$109383$new_n17324_ i1=$abc$109383$new_n17323_ nq=$abc$109383$new_n17325_
 .subckt nand3_x0 i0=$abc$109383$new_n17325_ i1=$abc$109383$new_n17322_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n17326_
 .subckt nand3_x0 i0=$abc$109383$new_n17326_ i1=$abc$109383$new_n17320_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n17327_
-.subckt oa22_x2 i0=$abc$109383$new_n17327_ i1=$abc$109383$new_n17312_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n17328_
+.subckt or21nand_x1 i0=$abc$109383$new_n17327_ i1=$abc$109383$new_n17312_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n17328_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][28] nq=$abc$109383$new_n17329_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][28] nq=$abc$109383$new_n17330_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17330_ i1=$abc$109383$new_n17329_ q=$abc$109383$new_n17331_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17330_ i1=$abc$109383$new_n17329_ q=$abc$109383$new_n17331_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][28] nq=$abc$109383$new_n17332_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][28] nq=$abc$109383$new_n17333_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17333_ i1=$abc$109383$new_n17332_ q=$abc$109383$new_n17334_
-.subckt mx2_x2 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n17334_ i1=$abc$109383$new_n17331_ q=$abc$109383$new_n17335_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17333_ i1=$abc$109383$new_n17332_ q=$abc$109383$new_n17334_
+.subckt mux2_x1 cmd=$abc$109383$new_n15770_ i0=$abc$109383$new_n17334_ i1=$abc$109383$new_n17331_ q=$abc$109383$new_n17335_
 .subckt nand2_x0 i0=$abc$109383$new_n17335_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n17336_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][28] i1=soc.cpu.minerva.gprf.mem._mem[24][28] q=$abc$109383$new_n17337_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][28] i1=soc.cpu.minerva.gprf.mem._mem[24][28] q=$abc$109383$new_n17337_
 .subckt nand2_x0 i0=$abc$109383$new_n17337_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n17338_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][28] q=$abc$109383$new_n17339_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][28] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15588_ q=$abc$109383$new_n17340_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[29][28] nq=$abc$109383$new_n17339_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][28] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15588_ nq=$abc$109383$new_n17340_
 .subckt nand2_x0 i0=$abc$109383$new_n17340_ i1=$abc$109383$new_n17339_ nq=$abc$109383$new_n17341_
 .subckt nand3_x0 i0=$abc$109383$new_n17341_ i1=$abc$109383$new_n17338_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n17342_
 .subckt nand3_x0 i0=$abc$109383$new_n17342_ i1=$abc$109383$new_n17336_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n17343_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][28] i1=soc.cpu.minerva.gprf.mem._mem[8][28] q=$abc$109383$new_n17344_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][28] i1=soc.cpu.minerva.gprf.mem._mem[8][28] q=$abc$109383$new_n17344_
 .subckt nand2_x0 i0=$abc$109383$new_n17344_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n17345_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[13][28] q=$abc$109383$new_n17346_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][28] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n17347_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[13][28] nq=$abc$109383$new_n17346_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][28] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n17347_
 .subckt nand2_x0 i0=$abc$109383$new_n17347_ i1=$abc$109383$new_n17346_ nq=$abc$109383$new_n17348_
 .subckt nand3_x0 i0=$abc$109383$new_n17348_ i1=$abc$109383$new_n17345_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n17349_
-.subckt mx2_x2 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][28] i1=soc.cpu.minerva.gprf.mem._mem[10][28] q=$abc$109383$new_n17350_
+.subckt mux2_x1 cmd=$abc$109383$new_n15659_ i0=soc.cpu.minerva.gprf.mem._mem[14][28] i1=soc.cpu.minerva.gprf.mem._mem[10][28] q=$abc$109383$new_n17350_
 .subckt nand2_x0 i0=$abc$109383$new_n17350_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n17351_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][28] q=$abc$109383$new_n17352_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][28] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n17353_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][28] nq=$abc$109383$new_n17352_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][28] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n17353_
 .subckt nand2_x0 i0=$abc$109383$new_n17353_ i1=$abc$109383$new_n17352_ nq=$abc$109383$new_n17354_
 .subckt nand3_x0 i0=$abc$109383$new_n17354_ i1=$abc$109383$new_n17351_ i2=$abc$109383$new_n15837_ nq=$abc$109383$new_n17355_
 .subckt nand3_x0 i0=$abc$109383$new_n17355_ i1=$abc$109383$new_n17349_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n17356_
-.subckt oa22_x2 i0=$abc$109383$new_n17356_ i1=$abc$109383$new_n17343_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n17357_
+.subckt or21nand_x1 i0=$abc$109383$new_n17356_ i1=$abc$109383$new_n17343_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n17357_
 .subckt nand2_x0 i0=$abc$109383$new_n17357_ i1=$abc$109383$new_n17328_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[28]
-.subckt mx2_x2 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][29] i1=soc.cpu.minerva.gprf.mem._mem[16][29] q=$abc$109383$new_n17359_
+.subckt mux2_x1 cmd=$abc$109383$new_n15773_ i0=soc.cpu.minerva.gprf.mem._mem[20][29] i1=soc.cpu.minerva.gprf.mem._mem[16][29] q=$abc$109383$new_n17359_
 .subckt nand2_x0 i0=$abc$109383$new_n17359_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n17360_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][29] q=$abc$109383$new_n17361_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][29] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ q=$abc$109383$new_n17362_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][29] nq=$abc$109383$new_n17361_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][29] i1=$abc$109383$new_n15780_ i2=$abc$109383$new_n15779_ nq=$abc$109383$new_n17362_
 .subckt nand2_x0 i0=$abc$109383$new_n17362_ i1=$abc$109383$new_n17361_ nq=$abc$109383$new_n17363_
 .subckt nand3_x0 i0=$abc$109383$new_n17363_ i1=$abc$109383$new_n17360_ i2=$abc$109383$new_n15511_ nq=$abc$109383$new_n17364_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[22][29] i1=soc.cpu.minerva.gprf.mem._mem[18][29] q=$abc$109383$new_n17365_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[22][29] i1=soc.cpu.minerva.gprf.mem._mem[18][29] q=$abc$109383$new_n17365_
 .subckt nand2_x0 i0=$abc$109383$new_n17365_ i1=$abc$109383$new_n15546_ nq=$abc$109383$new_n17366_
-.subckt oa22_x2 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][29] q=$abc$109383$new_n17367_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][29] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n17368_
+.subckt or21nand_x1 i0=$abc$109383$new_n15561_ i1=$abc$109383$new_n15557_ i2=soc.cpu.minerva.gprf.mem._mem[23][29] nq=$abc$109383$new_n17367_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][29] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n17368_
 .subckt nand2_x0 i0=$abc$109383$new_n17368_ i1=$abc$109383$new_n17367_ nq=$abc$109383$new_n17369_
 .subckt nand3_x0 i0=$abc$109383$new_n17369_ i1=$abc$109383$new_n17366_ i2=$abc$109383$new_n15785_ nq=$abc$109383$new_n17370_
 .subckt nand3_x0 i0=$abc$109383$new_n17370_ i1=$abc$109383$new_n17364_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n17371_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][29] nq=$abc$109383$new_n17372_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][29] nq=$abc$109383$new_n17373_
-.subckt mx2_x2 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17373_ i1=$abc$109383$new_n17372_ q=$abc$109383$new_n17374_
+.subckt mux2_x1 cmd=$abc$109383$new_n16807_ i0=$abc$109383$new_n17373_ i1=$abc$109383$new_n17372_ q=$abc$109383$new_n17374_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][29] nq=$abc$109383$new_n17375_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][29] nq=$abc$109383$new_n17376_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=$abc$109383$new_n17376_ i1=$abc$109383$new_n17375_ q=$abc$109383$new_n17377_
-.subckt mx2_x2 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17377_ i1=$abc$109383$new_n17374_ q=$abc$109383$new_n17378_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=$abc$109383$new_n17376_ i1=$abc$109383$new_n17375_ q=$abc$109383$new_n17377_
+.subckt mux2_x1 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17377_ i1=$abc$109383$new_n17374_ q=$abc$109383$new_n17378_
 .subckt nand2_x0 i0=$abc$109383$new_n17378_ i1=$abc$109383$new_n15793_ nq=$abc$109383$new_n17379_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][29] i1=soc.cpu.minerva.gprf.mem._mem[0][29] q=$abc$109383$new_n17380_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][29] i1=soc.cpu.minerva.gprf.mem._mem[0][29] q=$abc$109383$new_n17380_
 .subckt nand2_x0 i0=$abc$109383$new_n17380_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n17381_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][29] q=$abc$109383$new_n17382_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][29] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n17383_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][29] nq=$abc$109383$new_n17382_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][29] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n17383_
 .subckt nand2_x0 i0=$abc$109383$new_n17383_ i1=$abc$109383$new_n17382_ nq=$abc$109383$new_n17384_
 .subckt nand3_x0 i0=$abc$109383$new_n17384_ i1=$abc$109383$new_n17381_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n17385_
 .subckt nand3_x0 i0=$abc$109383$new_n17385_ i1=$abc$109383$new_n17379_ i2=$abc$109383$new_n15518_ nq=$abc$109383$new_n17386_
-.subckt oa22_x2 i0=$abc$109383$new_n17386_ i1=$abc$109383$new_n17371_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n17387_
+.subckt or21nand_x1 i0=$abc$109383$new_n17386_ i1=$abc$109383$new_n17371_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n17387_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][29] nq=$abc$109383$new_n17388_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][29] nq=$abc$109383$new_n17389_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17389_ i1=$abc$109383$new_n17388_ q=$abc$109383$new_n17390_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17389_ i1=$abc$109383$new_n17388_ q=$abc$109383$new_n17390_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][29] nq=$abc$109383$new_n17391_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][29] nq=$abc$109383$new_n17392_
-.subckt mx2_x2 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17392_ i1=$abc$109383$new_n17391_ q=$abc$109383$new_n17393_
-.subckt mx2_x2 cmd=$abc$109383$new_n15545_ i0=$abc$109383$new_n17393_ i1=$abc$109383$new_n17390_ q=$abc$109383$new_n17394_
+.subckt mux2_x1 cmd=$abc$109383$new_n16827_ i0=$abc$109383$new_n17392_ i1=$abc$109383$new_n17391_ q=$abc$109383$new_n17393_
+.subckt mux2_x1 cmd=$abc$109383$new_n15545_ i0=$abc$109383$new_n17393_ i1=$abc$109383$new_n17390_ q=$abc$109383$new_n17394_
 .subckt nand2_x0 i0=$abc$109383$new_n17394_ i1=$abc$109383$new_n15613_ nq=$abc$109383$new_n17395_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][29] i1=soc.cpu.minerva.gprf.mem._mem[24][29] q=$abc$109383$new_n17396_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][29] i1=soc.cpu.minerva.gprf.mem._mem[24][29] q=$abc$109383$new_n17396_
 .subckt nand2_x0 i0=$abc$109383$new_n17396_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n17397_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[29][29] q=$abc$109383$new_n17398_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][29] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15588_ q=$abc$109383$new_n17399_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[29][29] nq=$abc$109383$new_n17398_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][29] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15588_ nq=$abc$109383$new_n17399_
 .subckt nand2_x0 i0=$abc$109383$new_n17399_ i1=$abc$109383$new_n17398_ nq=$abc$109383$new_n17400_
 .subckt nand3_x0 i0=$abc$109383$new_n17400_ i1=$abc$109383$new_n17397_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n17401_
 .subckt nand3_x0 i0=$abc$109383$new_n17401_ i1=$abc$109383$new_n17395_ i2=$abc$109383$new_n15615_ nq=$abc$109383$new_n17402_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][29] i1=soc.cpu.minerva.gprf.mem._mem[8][29] q=$abc$109383$new_n17403_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][29] i1=soc.cpu.minerva.gprf.mem._mem[8][29] q=$abc$109383$new_n17403_
 .subckt nand2_x0 i0=$abc$109383$new_n17403_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n17404_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[13][29] q=$abc$109383$new_n17405_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][29] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n17406_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[13][29] nq=$abc$109383$new_n17405_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][29] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n17406_
 .subckt nand2_x0 i0=$abc$109383$new_n17406_ i1=$abc$109383$new_n17405_ nq=$abc$109383$new_n17407_
 .subckt nand3_x0 i0=$abc$109383$new_n17407_ i1=$abc$109383$new_n17404_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n17408_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[14][29] i1=soc.cpu.minerva.gprf.mem._mem[10][29] q=$abc$109383$new_n17409_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[14][29] i1=soc.cpu.minerva.gprf.mem._mem[10][29] q=$abc$109383$new_n17409_
 .subckt nand2_x0 i0=$abc$109383$new_n17409_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n17410_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][29] q=$abc$109383$new_n17411_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][29] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n17412_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][29] nq=$abc$109383$new_n17411_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][29] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n17412_
 .subckt nand2_x0 i0=$abc$109383$new_n17412_ i1=$abc$109383$new_n17411_ nq=$abc$109383$new_n17413_
 .subckt nand3_x0 i0=$abc$109383$new_n17413_ i1=$abc$109383$new_n17410_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n17414_
 .subckt nand3_x0 i0=$abc$109383$new_n17414_ i1=$abc$109383$new_n17408_ i2=$abc$109383$new_n15517_ nq=$abc$109383$new_n17415_
-.subckt oa22_x2 i0=$abc$109383$new_n17415_ i1=$abc$109383$new_n17402_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n17416_
+.subckt or21nand_x1 i0=$abc$109383$new_n17415_ i1=$abc$109383$new_n17402_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n17416_
 .subckt nand2_x0 i0=$abc$109383$new_n17416_ i1=$abc$109383$new_n17387_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[29]
-.subckt mx2_x2 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][30] i1=soc.cpu.minerva.gprf.mem._mem[16][30] q=$abc$109383$new_n17418_
+.subckt mux2_x1 cmd=$abc$109383$new_n16506_ i0=soc.cpu.minerva.gprf.mem._mem[20][30] i1=soc.cpu.minerva.gprf.mem._mem[16][30] q=$abc$109383$new_n17418_
 .subckt nand2_x0 i0=$abc$109383$new_n17418_ i1=$abc$109383$new_n15538_ nq=$abc$109383$new_n17419_
-.subckt oa22_x2 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[21][30] q=$abc$109383$new_n17420_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][30] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ q=$abc$109383$new_n17421_
+.subckt or21nand_x1 i0=$abc$109383$new_n15721_ i1=$abc$109383$new_n15720_ i2=soc.cpu.minerva.gprf.mem._mem[21][30] nq=$abc$109383$new_n17420_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][30] i1=$abc$109383$new_n15724_ i2=$abc$109383$new_n15723_ nq=$abc$109383$new_n17421_
 .subckt nand2_x0 i0=$abc$109383$new_n17421_ i1=$abc$109383$new_n17420_ nq=$abc$109383$new_n17422_
 .subckt nand3_x0 i0=$abc$109383$new_n17422_ i1=$abc$109383$new_n17419_ i2=$abc$109383$new_n15716_ nq=$abc$109383$new_n17423_
-.subckt mx2_x2 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][30] i1=soc.cpu.minerva.gprf.mem._mem[18][30] q=$abc$109383$new_n17424_
+.subckt mux2_x1 cmd=$abc$109383$new_n16513_ i0=soc.cpu.minerva.gprf.mem._mem[22][30] i1=soc.cpu.minerva.gprf.mem._mem[18][30] q=$abc$109383$new_n17424_
 .subckt nand2_x0 i0=$abc$109383$new_n17424_ i1=$abc$109383$new_n15679_ nq=$abc$109383$new_n17425_
-.subckt oa22_x2 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[23][30] q=$abc$109383$new_n17426_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][30] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ q=$abc$109383$new_n17427_
+.subckt or21nand_x1 i0=$abc$109383$new_n15684_ i1=$abc$109383$new_n15683_ i2=soc.cpu.minerva.gprf.mem._mem[23][30] nq=$abc$109383$new_n17426_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][30] i1=$abc$109383$new_n15688_ i2=$abc$109383$new_n15687_ nq=$abc$109383$new_n17427_
 .subckt nand2_x0 i0=$abc$109383$new_n17427_ i1=$abc$109383$new_n17426_ nq=$abc$109383$new_n17428_
 .subckt nand3_x0 i0=$abc$109383$new_n17428_ i1=$abc$109383$new_n17425_ i2=$abc$109383$new_n15612_ nq=$abc$109383$new_n17429_
-.subckt a3_x2 i0=$abc$109383$new_n17429_ i1=$abc$109383$new_n17423_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17430_
-.subckt mx2_x2 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][30] i1=soc.cpu.minerva.gprf.mem._mem[2][30] q=$abc$109383$new_n17431_
+.subckt and3_x1 i0=$abc$109383$new_n17429_ i1=$abc$109383$new_n17423_ i2=$abc$109383$new_n16445_ q=$abc$109383$new_n17430_
+.subckt mux2_x1 cmd=$abc$109383$new_n15772_ i0=soc.cpu.minerva.gprf.mem._mem[6][30] i1=soc.cpu.minerva.gprf.mem._mem[2][30] q=$abc$109383$new_n17431_
 .subckt nand2_x0 i0=$abc$109383$new_n17431_ i1=$abc$109383$new_n15626_ nq=$abc$109383$new_n17432_
-.subckt oa22_x2 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][30] q=$abc$109383$new_n17433_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][30] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ q=$abc$109383$new_n17434_
+.subckt or21nand_x1 i0=$abc$109383$new_n15633_ i1=$abc$109383$new_n15631_ i2=soc.cpu.minerva.gprf.mem._mem[7][30] nq=$abc$109383$new_n17433_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][30] i1=$abc$109383$new_n15603_ i2=$abc$109383$new_n15622_ nq=$abc$109383$new_n17434_
 .subckt nand2_x0 i0=$abc$109383$new_n17434_ i1=$abc$109383$new_n17433_ nq=$abc$109383$new_n17435_
 .subckt nand3_x0 i0=$abc$109383$new_n17435_ i1=$abc$109383$new_n17432_ i2=$abc$109383$new_n16521_ nq=$abc$109383$new_n17436_
-.subckt mx2_x2 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][30] i1=soc.cpu.minerva.gprf.mem._mem[0][30] q=$abc$109383$new_n17437_
+.subckt mux2_x1 cmd=$abc$109383$new_n15580_ i0=soc.cpu.minerva.gprf.mem._mem[4][30] i1=soc.cpu.minerva.gprf.mem._mem[0][30] q=$abc$109383$new_n17437_
 .subckt nand2_x0 i0=$abc$109383$new_n17437_ i1=$abc$109383$new_n15740_ nq=$abc$109383$new_n17438_
-.subckt oa22_x2 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[5][30] q=$abc$109383$new_n17439_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][30] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ q=$abc$109383$new_n17440_
+.subckt or21nand_x1 i0=$abc$109383$new_n15745_ i1=$abc$109383$new_n15744_ i2=soc.cpu.minerva.gprf.mem._mem[5][30] nq=$abc$109383$new_n17439_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][30] i1=$abc$109383$new_n15569_ i2=$abc$109383$new_n15565_ nq=$abc$109383$new_n17440_
 .subckt nand2_x0 i0=$abc$109383$new_n17440_ i1=$abc$109383$new_n17439_ nq=$abc$109383$new_n17441_
 .subckt nand3_x0 i0=$abc$109383$new_n17441_ i1=$abc$109383$new_n17438_ i2=$abc$109383$new_n15739_ nq=$abc$109383$new_n17442_
-.subckt a3_x2 i0=$abc$109383$new_n17442_ i1=$abc$109383$new_n17436_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17443_
-.subckt ao22_x2 i0=$abc$109383$new_n17443_ i1=$abc$109383$new_n17430_ i2=$abc$109383$new_n15543_ q=$abc$109383$new_n17444_
+.subckt and3_x1 i0=$abc$109383$new_n17442_ i1=$abc$109383$new_n17436_ i2=$abc$109383$new_n15642_ q=$abc$109383$new_n17443_
+.subckt and21nor_x1 i0=$abc$109383$new_n17443_ i1=$abc$109383$new_n17430_ i2=$abc$109383$new_n15543_ nq=$abc$109383$new_n17444_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][30] nq=$abc$109383$new_n17445_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][30] nq=$abc$109383$new_n17446_
-.subckt mx2_x2 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17446_ i1=$abc$109383$new_n17445_ q=$abc$109383$new_n17447_
+.subckt mux2_x1 cmd=$abc$109383$new_n16937_ i0=$abc$109383$new_n17446_ i1=$abc$109383$new_n17445_ q=$abc$109383$new_n17447_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][30] nq=$abc$109383$new_n17448_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][30] nq=$abc$109383$new_n17449_
-.subckt mx2_x2 cmd=$abc$109383$new_n15528_ i0=$abc$109383$new_n17449_ i1=$abc$109383$new_n17448_ q=$abc$109383$new_n17450_
-.subckt mx2_x2 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17450_ i1=$abc$109383$new_n17447_ q=$abc$109383$new_n17451_
+.subckt mux2_x1 cmd=$abc$109383$new_n15528_ i0=$abc$109383$new_n17449_ i1=$abc$109383$new_n17448_ q=$abc$109383$new_n17450_
+.subckt mux2_x1 cmd=$abc$109383$new_n15544_ i0=$abc$109383$new_n17450_ i1=$abc$109383$new_n17447_ q=$abc$109383$new_n17451_
 .subckt nand2_x0 i0=$abc$109383$new_n17451_ i1=$abc$109383$new_n15784_ nq=$abc$109383$new_n17452_
-.subckt mx2_x2 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][30] i1=soc.cpu.minerva.gprf.mem._mem[24][30] q=$abc$109383$new_n17453_
+.subckt mux2_x1 cmd=$abc$109383$new_n15708_ i0=soc.cpu.minerva.gprf.mem._mem[28][30] i1=soc.cpu.minerva.gprf.mem._mem[24][30] q=$abc$109383$new_n17453_
 .subckt nand2_x0 i0=$abc$109383$new_n17453_ i1=$abc$109383$new_n16599_ nq=$abc$109383$new_n17454_
-.subckt oa22_x2 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][30] q=$abc$109383$new_n17455_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][30] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ q=$abc$109383$new_n17456_
+.subckt or21nand_x1 i0=$abc$109383$new_n15560_ i1=$abc$109383$new_n15556_ i2=soc.cpu.minerva.gprf.mem._mem[29][30] nq=$abc$109383$new_n17455_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][30] i1=$abc$109383$new_n15636_ i2=$abc$109383$new_n15712_ nq=$abc$109383$new_n17456_
 .subckt nand2_x0 i0=$abc$109383$new_n17456_ i1=$abc$109383$new_n17455_ nq=$abc$109383$new_n17457_
 .subckt nand3_x0 i0=$abc$109383$new_n17457_ i1=$abc$109383$new_n17454_ i2=$abc$109383$new_n15510_ nq=$abc$109383$new_n17458_
-.subckt a3_x2 i0=$abc$109383$new_n17458_ i1=$abc$109383$new_n17452_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n17459_
-.subckt mx2_x2 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][30] i1=soc.cpu.minerva.gprf.mem._mem[8][30] q=$abc$109383$new_n17460_
+.subckt and3_x1 i0=$abc$109383$new_n17458_ i1=$abc$109383$new_n17452_ i2=$abc$109383$new_n15576_ q=$abc$109383$new_n17459_
+.subckt mux2_x1 cmd=$abc$109383$new_n15548_ i0=soc.cpu.minerva.gprf.mem._mem[12][30] i1=soc.cpu.minerva.gprf.mem._mem[8][30] q=$abc$109383$new_n17460_
 .subckt nand2_x0 i0=$abc$109383$new_n17460_ i1=$abc$109383$new_n15591_ nq=$abc$109383$new_n17461_
-.subckt oa22_x2 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][30] q=$abc$109383$new_n17462_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][30] i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15587_ q=$abc$109383$new_n17463_
+.subckt or21nand_x1 i0=$abc$109383$new_n15598_ i1=$abc$109383$new_n15596_ i2=soc.cpu.minerva.gprf.mem._mem[13][30] nq=$abc$109383$new_n17462_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][30] i1=$abc$109383$new_n15668_ i2=$abc$109383$new_n15587_ nq=$abc$109383$new_n17463_
 .subckt nand2_x0 i0=$abc$109383$new_n17463_ i1=$abc$109383$new_n17462_ nq=$abc$109383$new_n17464_
 .subckt nand3_x0 i0=$abc$109383$new_n17464_ i1=$abc$109383$new_n17461_ i2=$abc$109383$new_n15802_ nq=$abc$109383$new_n17465_
-.subckt mx2_x2 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[15][30] i1=soc.cpu.minerva.gprf.mem._mem[11][30] q=$abc$109383$new_n17466_
-.subckt mx2_x2 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[14][30] i1=soc.cpu.minerva.gprf.mem._mem[10][30] q=$abc$109383$new_n17467_
-.subckt mx2_x2 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17467_ i1=$abc$109383$new_n17466_ q=$abc$109383$new_n17468_
-.subckt ao22_x2 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17468_ i2=$abc$109383$new_n15516_ q=$abc$109383$new_n17469_
-.subckt a2_x2 i0=$abc$109383$new_n17469_ i1=$abc$109383$new_n17465_ q=$abc$109383$new_n17470_
-.subckt ao22_x2 i0=$abc$109383$new_n17470_ i1=$abc$109383$new_n17459_ i2=$abc$109383$new_n15520_ q=$abc$109383$new_n17471_
-.subckt o2_x2 i0=$abc$109383$new_n17471_ i1=$abc$109383$new_n17444_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[30]
-.subckt mx2_x2 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[20][31] i1=soc.cpu.minerva.gprf.mem._mem[16][31] q=$abc$109383$new_n17473_
+.subckt mux2_x1 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[15][30] i1=soc.cpu.minerva.gprf.mem._mem[11][30] q=$abc$109383$new_n17466_
+.subckt mux2_x1 cmd=$abc$109383$new_n15657_ i0=soc.cpu.minerva.gprf.mem._mem[14][30] i1=soc.cpu.minerva.gprf.mem._mem[10][30] q=$abc$109383$new_n17467_
+.subckt mux2_x1 cmd=$abc$109383$new_n15686_ i0=$abc$109383$new_n17467_ i1=$abc$109383$new_n17466_ q=$abc$109383$new_n17468_
+.subckt and21nor_x1 i0=$abc$109383$new_n15677_ i1=$abc$109383$new_n17468_ i2=$abc$109383$new_n15516_ nq=$abc$109383$new_n17469_
+.subckt and2_x1 i0=$abc$109383$new_n17469_ i1=$abc$109383$new_n17465_ q=$abc$109383$new_n17470_
+.subckt and21nor_x1 i0=$abc$109383$new_n17470_ i1=$abc$109383$new_n17459_ i2=$abc$109383$new_n15520_ nq=$abc$109383$new_n17471_
+.subckt or2_x1 i0=$abc$109383$new_n17471_ i1=$abc$109383$new_n17444_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[30]
+.subckt mux2_x1 cmd=$abc$109383$new_n15549_ i0=soc.cpu.minerva.gprf.mem._mem[20][31] i1=soc.cpu.minerva.gprf.mem._mem[16][31] q=$abc$109383$new_n17473_
 .subckt nand2_x0 i0=$abc$109383$new_n17473_ i1=$abc$109383$new_n15771_ nq=$abc$109383$new_n17474_
-.subckt oa22_x2 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][31] q=$abc$109383$new_n17475_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][31] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ q=$abc$109383$new_n17476_
+.subckt or21nand_x1 i0=$abc$109383$new_n15777_ i1=$abc$109383$new_n15776_ i2=soc.cpu.minerva.gprf.mem._mem[21][31] nq=$abc$109383$new_n17475_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][31] i1=$abc$109383$new_n15570_ i2=$abc$109383$new_n15566_ nq=$abc$109383$new_n17476_
 .subckt nand2_x0 i0=$abc$109383$new_n17476_ i1=$abc$109383$new_n17475_ nq=$abc$109383$new_n17477_
 .subckt nand3_x0 i0=$abc$109383$new_n17477_ i1=$abc$109383$new_n17474_ i2=$abc$109383$new_n15822_ nq=$abc$109383$new_n17478_
-.subckt mx2_x2 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[22][31] i1=soc.cpu.minerva.gprf.mem._mem[18][31] q=$abc$109383$new_n17479_
+.subckt mux2_x1 cmd=$abc$109383$new_n15628_ i0=soc.cpu.minerva.gprf.mem._mem[22][31] i1=soc.cpu.minerva.gprf.mem._mem[18][31] q=$abc$109383$new_n17479_
 .subckt nand2_x0 i0=$abc$109383$new_n17479_ i1=$abc$109383$new_n15627_ nq=$abc$109383$new_n17480_
-.subckt oa22_x2 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[23][31] q=$abc$109383$new_n17481_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][31] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ q=$abc$109383$new_n17482_
+.subckt or21nand_x1 i0=$abc$109383$new_n15634_ i1=$abc$109383$new_n15632_ i2=soc.cpu.minerva.gprf.mem._mem[23][31] nq=$abc$109383$new_n17481_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][31] i1=$abc$109383$new_n15637_ i2=$abc$109383$new_n15623_ nq=$abc$109383$new_n17482_
 .subckt nand2_x0 i0=$abc$109383$new_n17482_ i1=$abc$109383$new_n17481_ nq=$abc$109383$new_n17483_
 .subckt nand3_x0 i0=$abc$109383$new_n17483_ i1=$abc$109383$new_n17480_ i2=$abc$109383$new_n15793_ nq=$abc$109383$new_n17484_
 .subckt nand3_x0 i0=$abc$109383$new_n17484_ i1=$abc$109383$new_n17478_ i2=$abc$109383$new_n15769_ nq=$abc$109383$new_n17485_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][31] nq=$abc$109383$new_n17486_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][31] nq=$abc$109383$new_n17487_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=$abc$109383$new_n17487_ i1=$abc$109383$new_n17486_ q=$abc$109383$new_n17488_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=$abc$109383$new_n17487_ i1=$abc$109383$new_n17486_ q=$abc$109383$new_n17488_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][31] nq=$abc$109383$new_n17489_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][31] nq=$abc$109383$new_n17490_
-.subckt mx2_x2 cmd=$abc$109383$new_n15741_ i0=$abc$109383$new_n17490_ i1=$abc$109383$new_n17489_ q=$abc$109383$new_n17491_
-.subckt mx2_x2 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17491_ i1=$abc$109383$new_n17488_ q=$abc$109383$new_n17492_
+.subckt mux2_x1 cmd=$abc$109383$new_n15741_ i0=$abc$109383$new_n17490_ i1=$abc$109383$new_n17489_ q=$abc$109383$new_n17491_
+.subckt mux2_x1 cmd=$abc$109383$new_n15651_ i0=$abc$109383$new_n17491_ i1=$abc$109383$new_n17488_ q=$abc$109383$new_n17492_
 .subckt nand2_x0 i0=$abc$109383$new_n17492_ i1=$abc$109383$new_n15837_ nq=$abc$109383$new_n17493_
-.subckt mx2_x2 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][31] i1=soc.cpu.minerva.gprf.mem._mem[0][31] q=$abc$109383$new_n17494_
+.subckt mux2_x1 cmd=$abc$109383$new_n15868_ i0=soc.cpu.minerva.gprf.mem._mem[4][31] i1=soc.cpu.minerva.gprf.mem._mem[0][31] q=$abc$109383$new_n17494_
 .subckt nand2_x0 i0=$abc$109383$new_n17494_ i1=$abc$109383$new_n15656_ nq=$abc$109383$new_n17495_
-.subckt oa22_x2 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][31] q=$abc$109383$new_n17496_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][31] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ q=$abc$109383$new_n17497_
+.subckt or21nand_x1 i0=$abc$109383$new_n15665_ i1=$abc$109383$new_n15663_ i2=soc.cpu.minerva.gprf.mem._mem[5][31] nq=$abc$109383$new_n17496_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][31] i1=$abc$109383$new_n15669_ i2=$abc$109383$new_n15667_ nq=$abc$109383$new_n17497_
 .subckt nand2_x0 i0=$abc$109383$new_n17497_ i1=$abc$109383$new_n17496_ nq=$abc$109383$new_n17498_
 .subckt nand3_x0 i0=$abc$109383$new_n17498_ i1=$abc$109383$new_n17495_ i2=$abc$109383$new_n15678_ nq=$abc$109383$new_n17499_
 .subckt nand3_x0 i0=$abc$109383$new_n17499_ i1=$abc$109383$new_n17493_ i2=$abc$109383$new_n15643_ nq=$abc$109383$new_n17500_
-.subckt oa22_x2 i0=$abc$109383$new_n17500_ i1=$abc$109383$new_n17485_ i2=$abc$109383$new_n15768_ q=$abc$109383$new_n17501_
+.subckt or21nand_x1 i0=$abc$109383$new_n17500_ i1=$abc$109383$new_n17485_ i2=$abc$109383$new_n15768_ nq=$abc$109383$new_n17501_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][31] nq=$abc$109383$new_n17502_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][31] nq=$abc$109383$new_n17503_
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=$abc$109383$new_n17503_ i1=$abc$109383$new_n17502_ q=$abc$109383$new_n17504_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=$abc$109383$new_n17503_ i1=$abc$109383$new_n17502_ q=$abc$109383$new_n17504_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[27][31] nq=$abc$109383$new_n17505_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[31][31] nq=$abc$109383$new_n17506_
-.subckt mx2_x2 cmd=$abc$109383$new_n15680_ i0=$abc$109383$new_n17506_ i1=$abc$109383$new_n17505_ q=$abc$109383$new_n17507_
-.subckt mx2_x2 cmd=$abc$109383$new_n15545_ i0=$abc$109383$new_n17507_ i1=$abc$109383$new_n17504_ q=$abc$109383$new_n17508_
+.subckt mux2_x1 cmd=$abc$109383$new_n15680_ i0=$abc$109383$new_n17506_ i1=$abc$109383$new_n17505_ q=$abc$109383$new_n17507_
+.subckt mux2_x1 cmd=$abc$109383$new_n15545_ i0=$abc$109383$new_n17507_ i1=$abc$109383$new_n17504_ q=$abc$109383$new_n17508_
 .subckt nand2_x0 i0=$abc$109383$new_n17508_ i1=$abc$109383$new_n15785_ nq=$abc$109383$new_n17509_
-.subckt mx2_x2 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][31] i1=soc.cpu.minerva.gprf.mem._mem[24][31] q=$abc$109383$new_n17510_
+.subckt mux2_x1 cmd=$abc$109383$new_n15645_ i0=soc.cpu.minerva.gprf.mem._mem[28][31] i1=soc.cpu.minerva.gprf.mem._mem[24][31] q=$abc$109383$new_n17510_
 .subckt nand2_x0 i0=$abc$109383$new_n17510_ i1=$abc$109383$new_n15644_ nq=$abc$109383$new_n17511_
-.subckt oa22_x2 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[29][31] q=$abc$109383$new_n17512_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][31] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15588_ q=$abc$109383$new_n17513_
+.subckt or21nand_x1 i0=$abc$109383$new_n15649_ i1=$abc$109383$new_n15648_ i2=soc.cpu.minerva.gprf.mem._mem[29][31] nq=$abc$109383$new_n17512_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][31] i1=$abc$109383$new_n15652_ i2=$abc$109383$new_n15588_ nq=$abc$109383$new_n17513_
 .subckt nand2_x0 i0=$abc$109383$new_n17513_ i1=$abc$109383$new_n17512_ nq=$abc$109383$new_n17514_
 .subckt nand3_x0 i0=$abc$109383$new_n17514_ i1=$abc$109383$new_n17511_ i2=$abc$109383$new_n15830_ nq=$abc$109383$new_n17515_
 .subckt nand3_x0 i0=$abc$109383$new_n17515_ i1=$abc$109383$new_n17509_ i2=$abc$109383$new_n15577_ nq=$abc$109383$new_n17516_
-.subckt mx2_x2 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][31] i1=soc.cpu.minerva.gprf.mem._mem[8][31] q=$abc$109383$new_n17517_
+.subckt mux2_x1 cmd=$abc$109383$new_n15593_ i0=soc.cpu.minerva.gprf.mem._mem[12][31] i1=soc.cpu.minerva.gprf.mem._mem[8][31] q=$abc$109383$new_n17517_
 .subckt nand2_x0 i0=$abc$109383$new_n17517_ i1=$abc$109383$new_n15592_ nq=$abc$109383$new_n17518_
-.subckt oa22_x2 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[13][31] q=$abc$109383$new_n17519_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][31] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ q=$abc$109383$new_n17520_
+.subckt or21nand_x1 i0=$abc$109383$new_n15599_ i1=$abc$109383$new_n15597_ i2=soc.cpu.minerva.gprf.mem._mem[13][31] nq=$abc$109383$new_n17519_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][31] i1=$abc$109383$new_n15604_ i2=$abc$109383$new_n15602_ nq=$abc$109383$new_n17520_
 .subckt nand2_x0 i0=$abc$109383$new_n17520_ i1=$abc$109383$new_n17519_ nq=$abc$109383$new_n17521_
 .subckt nand3_x0 i0=$abc$109383$new_n17521_ i1=$abc$109383$new_n17518_ i2=$abc$109383$new_n15803_ nq=$abc$109383$new_n17522_
-.subckt mx2_x2 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[14][31] i1=soc.cpu.minerva.gprf.mem._mem[10][31] q=$abc$109383$new_n17523_
+.subckt mux2_x1 cmd=$abc$109383$new_n15694_ i0=soc.cpu.minerva.gprf.mem._mem[14][31] i1=soc.cpu.minerva.gprf.mem._mem[10][31] q=$abc$109383$new_n17523_
 .subckt nand2_x0 i0=$abc$109383$new_n17523_ i1=$abc$109383$new_n15693_ nq=$abc$109383$new_n17524_
-.subckt oa22_x2 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][31] q=$abc$109383$new_n17525_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][31] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ q=$abc$109383$new_n17526_
+.subckt or21nand_x1 i0=$abc$109383$new_n15698_ i1=$abc$109383$new_n15697_ i2=soc.cpu.minerva.gprf.mem._mem[15][31] nq=$abc$109383$new_n17525_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][31] i1=$abc$109383$new_n15701_ i2=$abc$109383$new_n15700_ nq=$abc$109383$new_n17526_
 .subckt nand2_x0 i0=$abc$109383$new_n17526_ i1=$abc$109383$new_n17525_ nq=$abc$109383$new_n17527_
 .subckt nand3_x0 i0=$abc$109383$new_n17527_ i1=$abc$109383$new_n17524_ i2=$abc$109383$new_n15692_ nq=$abc$109383$new_n17528_
 .subckt nand3_x0 i0=$abc$109383$new_n17528_ i1=$abc$109383$new_n17522_ i2=$abc$109383$new_n15517_ nq=$abc$109383$new_n17529_
-.subckt oa22_x2 i0=$abc$109383$new_n17529_ i1=$abc$109383$new_n17516_ i2=$abc$109383$new_n15812_ q=$abc$109383$new_n17530_
+.subckt or21nand_x1 i0=$abc$109383$new_n17529_ i1=$abc$109383$new_n17516_ i2=$abc$109383$new_n15812_ nq=$abc$109383$new_n17530_
 .subckt nand2_x0 i0=$abc$109383$new_n17530_ i1=$abc$109383$new_n17501_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[31]
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[24] nq=$abc$109383$new_n17532_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n17532_ i1=$abc$109383$new_n15317_ q=$abc$109383$new_n17533_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n17532_ i1=$abc$109383$new_n15317_ q=$abc$109383$new_n17533_
 .subckt buf_x4 i=$abc$109383$new_n17533_ q=$abc$109383$new_n17534_
 .subckt buf_x4 i=$abc$109383$new_n17534_ q=$abc$109383$new_n17535_
 .subckt buf_x4 i=$abc$109383$new_n17535_ q=$abc$109383$new_n17536_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[23] i1=$abc$109383$new_n15384_ q=$abc$109383$new_n17537_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[23] i1=$abc$109383$new_n15384_ q=$abc$109383$new_n17537_
 .subckt buf_x4 i=$abc$109383$new_n17537_ q=$abc$109383$new_n17538_
 .subckt buf_x4 i=$abc$109383$new_n17538_ q=$abc$109383$new_n17539_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[21] nq=$abc$109383$new_n17540_
-.subckt mx2_x2 cmd=$abc$109383$new_n15507_ i0=$abc$109383$new_n17540_ i1=$abc$109383$new_n15332_ q=$abc$109383$new_n17541_
+.subckt mux2_x1 cmd=$abc$109383$new_n15507_ i0=$abc$109383$new_n17540_ i1=$abc$109383$new_n15332_ q=$abc$109383$new_n17541_
 .subckt buf_x4 i=$abc$109383$new_n17541_ q=$abc$109383$new_n17542_
 .subckt buf_x4 i=$abc$109383$new_n17542_ q=$abc$109383$new_n17543_
 .subckt buf_x4 i=$abc$109383$new_n17543_ q=$abc$109383$new_n17544_
 .subckt buf_x4 i=$abc$109383$new_n17544_ q=$abc$109383$new_n17545_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[20] nq=$abc$109383$new_n17546_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n17546_ i1=$abc$109383$new_n15379_ q=$abc$109383$new_n17547_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=$abc$109383$new_n17546_ i1=$abc$109383$new_n15379_ q=$abc$109383$new_n17547_
 .subckt buf_x4 i=$abc$109383$new_n17547_ q=$abc$109383$new_n17548_
 .subckt buf_x4 i=$abc$109383$new_n17548_ q=$abc$109383$new_n17549_
 .subckt buf_x4 i=$abc$109383$new_n17549_ q=$abc$109383$new_n17550_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[22] nq=$abc$109383$new_n17551_
-.subckt mx2_x2 cmd=$abc$109383$new_n15507_ i0=$abc$109383$new_n17551_ i1=$abc$109383$new_n15378_ q=$abc$109383$new_n17552_
+.subckt mux2_x1 cmd=$abc$109383$new_n15507_ i0=$abc$109383$new_n17551_ i1=$abc$109383$new_n15378_ q=$abc$109383$new_n17552_
 .subckt buf_x4 i=$abc$109383$new_n17552_ q=$abc$109383$new_n17553_
 .subckt buf_x4 i=$abc$109383$new_n17553_ q=$abc$109383$new_n17554_
 .subckt buf_x4 i=$abc$109383$new_n17554_ q=$abc$109383$new_n17555_
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[12][0] i1=soc.cpu.minerva.gprf.mem._mem[8][0] q=$abc$109383$new_n17556_
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[12][0] i1=soc.cpu.minerva.gprf.mem._mem[8][0] q=$abc$109383$new_n17556_
 .subckt nand2_x0 i0=$abc$109383$new_n17556_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n17557_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][0] nq=$abc$109383$new_n17558_
 .subckt nand3_x0 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15552_ i2=soc.cpu.minerva.fetch.ibus_rdata[22] nq=$abc$109383$new_n17559_
 .subckt buf_x4 i=$abc$109383$new_n17559_ q=$abc$109383$new_n17560_
 .subckt buf_x4 i=$abc$109383$new_n17560_ q=$abc$109383$new_n17561_
-.subckt oa22_x2 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15552_ i2=$abc$109383$new_n15378_ q=$abc$109383$new_n17562_
+.subckt or21nand_x1 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15552_ i2=$abc$109383$new_n15378_ nq=$abc$109383$new_n17562_
 .subckt buf_x4 i=$abc$109383$new_n17562_ q=$abc$109383$new_n17563_
 .subckt buf_x4 i=$abc$109383$new_n17563_ q=$abc$109383$new_n17564_
 .subckt buf_x4 i=$abc$109383$new_n17564_ q=$abc$109383$new_n17565_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=$abc$109383$new_n17558_ nq=$abc$109383$new_n17566_
-.subckt mx2_x2 cmd=$abc$109383$new_n15507_ i0=soc.cpu.minerva.fetch.ibus_rdata[20] i1=$abc$109383$new_n15425_ q=$abc$109383$new_n17567_
+.subckt mux2_x1 cmd=$abc$109383$new_n15507_ i0=soc.cpu.minerva.fetch.ibus_rdata[20] i1=$abc$109383$new_n15425_ q=$abc$109383$new_n17567_
 .subckt buf_x4 i=$abc$109383$new_n17567_ q=$abc$109383$new_n17568_
 .subckt buf_x4 i=$abc$109383$new_n17568_ q=$abc$109383$new_n17569_
 .subckt buf_x4 i=$abc$109383$new_n17569_ q=$abc$109383$new_n17570_
 .subckt buf_x4 i=$abc$109383$new_n17553_ q=$abc$109383$new_n17571_
 .subckt buf_x4 i=$abc$109383$new_n17571_ q=$abc$109383$new_n17572_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][0] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n17573_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][0] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n17573_
 .subckt nand2_x0 i0=$abc$109383$new_n17573_ i1=$abc$109383$new_n17566_ nq=$abc$109383$new_n17574_
 .subckt nand3_x0 i0=$abc$109383$new_n17574_ i1=$abc$109383$new_n17557_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n17575_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[1] q=$abc$109383$new_n17576_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[21] i1=$abc$109383$new_n17576_ q=$abc$109383$new_n17577_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[21] i1=$abc$109383$new_n17576_ q=$abc$109383$new_n17577_
 .subckt buf_x4 i=$abc$109383$new_n17577_ q=$abc$109383$new_n17578_
 .subckt buf_x4 i=$abc$109383$new_n17578_ q=$abc$109383$new_n17579_
 .subckt buf_x4 i=$abc$109383$new_n17559_ q=$abc$109383$new_n17580_
@@ -2860,22 +2860,22 @@
 .subckt buf_x4 i=$abc$109383$new_n17552_ q=$abc$109383$new_n17586_
 .subckt buf_x4 i=$abc$109383$new_n17586_ q=$abc$109383$new_n17587_
 .subckt buf_x4 i=$abc$109383$new_n17587_ q=$abc$109383$new_n17588_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][0] i1=$abc$109383$new_n17588_ i2=$abc$109383$new_n17585_ q=$abc$109383$new_n17589_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][0] i1=$abc$109383$new_n17588_ i2=$abc$109383$new_n17585_ nq=$abc$109383$new_n17589_
 .subckt nand2_x0 i0=$abc$109383$new_n17589_ i1=$abc$109383$new_n17584_ nq=$abc$109383$new_n17590_
 .subckt buf_x4 i=$abc$109383$new_n17554_ q=$abc$109383$new_n17591_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[14][0] i1=soc.cpu.minerva.gprf.mem._mem[10][0] q=$abc$109383$new_n17592_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[14][0] i1=soc.cpu.minerva.gprf.mem._mem[10][0] q=$abc$109383$new_n17592_
 .subckt nand2_x0 i0=$abc$109383$new_n17592_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n17593_
 .subckt nand3_x0 i0=$abc$109383$new_n17593_ i1=$abc$109383$new_n17590_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n17594_
-.subckt a3_x2 i0=$abc$109383$new_n17594_ i1=$abc$109383$new_n17575_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n17595_
+.subckt and3_x1 i0=$abc$109383$new_n17594_ i1=$abc$109383$new_n17575_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n17595_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[23] nq=$abc$109383$new_n17596_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=$abc$109383$new_n17596_ i1=$abc$109383$new_n15337_ q=$abc$109383$new_n17597_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=$abc$109383$new_n17596_ i1=$abc$109383$new_n15337_ q=$abc$109383$new_n17597_
 .subckt buf_x4 i=$abc$109383$new_n17597_ q=$abc$109383$new_n17598_
 .subckt buf_x4 i=$abc$109383$new_n17578_ q=$abc$109383$new_n17599_
 .subckt buf_x4 i=$abc$109383$new_n17548_ q=$abc$109383$new_n17600_
 .subckt buf_x4 i=$abc$109383$new_n17600_ q=$abc$109383$new_n17601_
 .subckt buf_x4 i=$abc$109383$new_n17552_ q=$abc$109383$new_n17602_
 .subckt buf_x4 i=$abc$109383$new_n17602_ q=$abc$109383$new_n17603_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[6][0] i1=soc.cpu.minerva.gprf.mem._mem[2][0] q=$abc$109383$new_n17604_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[6][0] i1=soc.cpu.minerva.gprf.mem._mem[2][0] q=$abc$109383$new_n17604_
 .subckt nand2_x0 i0=$abc$109383$new_n17604_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n17605_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][0] nq=$abc$109383$new_n17606_
 .subckt buf_x4 i=$abc$109383$new_n17559_ q=$abc$109383$new_n17607_
@@ -2886,29 +2886,29 @@
 .subckt buf_x4 i=$abc$109383$new_n17568_ q=$abc$109383$new_n17612_
 .subckt buf_x4 i=$abc$109383$new_n17612_ q=$abc$109383$new_n17613_
 .subckt buf_x4 i=$abc$109383$new_n17554_ q=$abc$109383$new_n17614_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][0] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n17615_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][0] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n17615_
 .subckt nand2_x0 i0=$abc$109383$new_n17615_ i1=$abc$109383$new_n17611_ nq=$abc$109383$new_n17616_
 .subckt nand3_x0 i0=$abc$109383$new_n17616_ i1=$abc$109383$new_n17605_ i2=$abc$109383$new_n17599_ nq=$abc$109383$new_n17617_
 .subckt buf_x4 i=$abc$109383$new_n17548_ q=$abc$109383$new_n17618_
 .subckt buf_x4 i=$abc$109383$new_n17618_ q=$abc$109383$new_n17619_
 .subckt buf_x4 i=$abc$109383$new_n17553_ q=$abc$109383$new_n17620_
 .subckt buf_x4 i=$abc$109383$new_n17620_ q=$abc$109383$new_n17621_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][0] i1=soc.cpu.minerva.gprf.mem._mem[0][0] q=$abc$109383$new_n17622_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][0] i1=soc.cpu.minerva.gprf.mem._mem[0][0] q=$abc$109383$new_n17622_
 .subckt nand2_x0 i0=$abc$109383$new_n17622_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n17623_
 .subckt buf_x4 i=$abc$109383$new_n17580_ q=$abc$109383$new_n17624_
 .subckt buf_x4 i=$abc$109383$new_n17563_ q=$abc$109383$new_n17625_
-.subckt oa22_x2 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[5][0] q=$abc$109383$new_n17626_
+.subckt or21nand_x1 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[5][0] nq=$abc$109383$new_n17626_
 .subckt buf_x4 i=$abc$109383$new_n17612_ q=$abc$109383$new_n17627_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[2] q=$abc$109383$new_n17628_
-.subckt mx2_x2 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[22] i1=$abc$109383$new_n17628_ q=$abc$109383$new_n17629_
+.subckt mux2_x1 cmd=$abc$109383$new_n15508_ i0=soc.cpu.minerva.fetch.ibus_rdata[22] i1=$abc$109383$new_n17628_ q=$abc$109383$new_n17629_
 .subckt buf_x4 i=$abc$109383$new_n17629_ q=$abc$109383$new_n17630_
 .subckt buf_x4 i=$abc$109383$new_n17630_ q=$abc$109383$new_n17631_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][0] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17627_ q=$abc$109383$new_n17632_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][0] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17627_ nq=$abc$109383$new_n17632_
 .subckt nand2_x0 i0=$abc$109383$new_n17632_ i1=$abc$109383$new_n17626_ nq=$abc$109383$new_n17633_
 .subckt nand3_x0 i0=$abc$109383$new_n17633_ i1=$abc$109383$new_n17623_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n17634_
-.subckt a3_x2 i0=$abc$109383$new_n17634_ i1=$abc$109383$new_n17617_ i2=$abc$109383$new_n17598_ q=$abc$109383$new_n17635_
-.subckt ao22_x2 i0=$abc$109383$new_n17635_ i1=$abc$109383$new_n17595_ i2=$abc$109383$new_n17536_ q=$abc$109383$new_n17636_
-.subckt mx2_x2 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[24] i1=$abc$109383$new_n15495_ q=$abc$109383$new_n17637_
+.subckt and3_x1 i0=$abc$109383$new_n17634_ i1=$abc$109383$new_n17617_ i2=$abc$109383$new_n17598_ q=$abc$109383$new_n17635_
+.subckt and21nor_x1 i0=$abc$109383$new_n17635_ i1=$abc$109383$new_n17595_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n17636_
+.subckt mux2_x1 cmd=$abc$109383$new_n15514_ i0=soc.cpu.minerva.fetch.ibus_rdata[24] i1=$abc$109383$new_n15495_ q=$abc$109383$new_n17637_
 .subckt buf_x4 i=$abc$109383$new_n17637_ q=$abc$109383$new_n17638_
 .subckt buf_x4 i=$abc$109383$new_n17638_ q=$abc$109383$new_n17639_
 .subckt buf_x4 i=$abc$109383$new_n17639_ q=$abc$109383$new_n17640_
@@ -2920,46 +2920,46 @@
 .subckt buf_x4 i=$abc$109383$new_n17645_ q=$abc$109383$new_n17646_
 .subckt buf_x4 i=$abc$109383$new_n17567_ q=$abc$109383$new_n17647_
 .subckt buf_x4 i=$abc$109383$new_n17647_ q=$abc$109383$new_n17648_
-.subckt mx2_x2 cmd=$abc$109383$new_n17648_ i0=soc.cpu.minerva.gprf.mem._mem[28][0] i1=soc.cpu.minerva.gprf.mem._mem[29][0] q=$abc$109383$new_n17649_
+.subckt mux2_x1 cmd=$abc$109383$new_n17648_ i0=soc.cpu.minerva.gprf.mem._mem[28][0] i1=soc.cpu.minerva.gprf.mem._mem[29][0] q=$abc$109383$new_n17649_
 .subckt nand2_x0 i0=$abc$109383$new_n17649_ i1=$abc$109383$new_n17646_ nq=$abc$109383$new_n17650_
 .subckt nand3_x0 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n15552_ i2=soc.cpu.minerva.fetch.ibus_rdata[20] nq=$abc$109383$new_n17651_
-.subckt oa22_x2 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n15552_ i2=$abc$109383$new_n15379_ q=$abc$109383$new_n17652_
+.subckt or21nand_x1 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n15552_ i2=$abc$109383$new_n15379_ nq=$abc$109383$new_n17652_
 .subckt buf_x4 i=$abc$109383$new_n17652_ q=$abc$109383$new_n17653_
-.subckt oa22_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[31][0] q=$abc$109383$new_n17654_
+.subckt or21nand_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[31][0] nq=$abc$109383$new_n17654_
 .subckt buf_x4 i=$abc$109383$new_n17568_ q=$abc$109383$new_n17655_
 .subckt buf_x4 i=$abc$109383$new_n17655_ q=$abc$109383$new_n17656_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][0] i1=$abc$109383$new_n17656_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n17657_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][0] i1=$abc$109383$new_n17656_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n17657_
 .subckt nand2_x0 i0=$abc$109383$new_n17657_ i1=$abc$109383$new_n17654_ nq=$abc$109383$new_n17658_
 .subckt nand3_x0 i0=$abc$109383$new_n17658_ i1=$abc$109383$new_n17650_ i2=$abc$109383$new_n17642_ nq=$abc$109383$new_n17659_
 .subckt buf_x4 i=$abc$109383$new_n17588_ q=$abc$109383$new_n17660_
 .subckt buf_x4 i=$abc$109383$new_n17568_ q=$abc$109383$new_n17661_
 .subckt buf_x4 i=$abc$109383$new_n17661_ q=$abc$109383$new_n17662_
-.subckt mx2_x2 cmd=$abc$109383$new_n17662_ i0=soc.cpu.minerva.gprf.mem._mem[24][0] i1=soc.cpu.minerva.gprf.mem._mem[25][0] q=$abc$109383$new_n17663_
+.subckt mux2_x1 cmd=$abc$109383$new_n17662_ i0=soc.cpu.minerva.gprf.mem._mem[24][0] i1=soc.cpu.minerva.gprf.mem._mem[25][0] q=$abc$109383$new_n17663_
 .subckt nand2_x0 i0=$abc$109383$new_n17663_ i1=$abc$109383$new_n17646_ nq=$abc$109383$new_n17664_
 .subckt buf_x4 i=$abc$109383$new_n17651_ q=$abc$109383$new_n17665_
-.subckt oa22_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[27][0] q=$abc$109383$new_n17666_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][0] i1=$abc$109383$new_n17613_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n17667_
+.subckt or21nand_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[27][0] nq=$abc$109383$new_n17666_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][0] i1=$abc$109383$new_n17613_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n17667_
 .subckt nand2_x0 i0=$abc$109383$new_n17667_ i1=$abc$109383$new_n17666_ nq=$abc$109383$new_n17668_
 .subckt nand3_x0 i0=$abc$109383$new_n17668_ i1=$abc$109383$new_n17664_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n17669_
-.subckt a3_x2 i0=$abc$109383$new_n17669_ i1=$abc$109383$new_n17659_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n17670_
+.subckt and3_x1 i0=$abc$109383$new_n17669_ i1=$abc$109383$new_n17659_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n17670_
 .subckt buf_x4 i=$abc$109383$new_n17644_ q=$abc$109383$new_n17671_
 .subckt buf_x4 i=$abc$109383$new_n17671_ q=$abc$109383$new_n17672_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[16][0] nq=$abc$109383$new_n17673_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[20][0] nq=$abc$109383$new_n17674_
-.subckt mx2_x2 cmd=$abc$109383$new_n17554_ i0=$abc$109383$new_n17674_ i1=$abc$109383$new_n17673_ q=$abc$109383$new_n17675_
+.subckt mux2_x1 cmd=$abc$109383$new_n17554_ i0=$abc$109383$new_n17674_ i1=$abc$109383$new_n17673_ q=$abc$109383$new_n17675_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][0] nq=$abc$109383$new_n17676_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][0] nq=$abc$109383$new_n17677_
-.subckt mx2_x2 cmd=$abc$109383$new_n17554_ i0=$abc$109383$new_n17677_ i1=$abc$109383$new_n17676_ q=$abc$109383$new_n17678_
-.subckt mx2_x2 cmd=$abc$109383$new_n17600_ i0=$abc$109383$new_n17678_ i1=$abc$109383$new_n17675_ q=$abc$109383$new_n17679_
+.subckt mux2_x1 cmd=$abc$109383$new_n17554_ i0=$abc$109383$new_n17677_ i1=$abc$109383$new_n17676_ q=$abc$109383$new_n17678_
+.subckt mux2_x1 cmd=$abc$109383$new_n17600_ i0=$abc$109383$new_n17678_ i1=$abc$109383$new_n17675_ q=$abc$109383$new_n17679_
 .subckt nand2_x0 i0=$abc$109383$new_n17679_ i1=$abc$109383$new_n17672_ nq=$abc$109383$new_n17680_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[22][0] i1=soc.cpu.minerva.gprf.mem._mem[18][0] q=$abc$109383$new_n17681_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[23][0] i1=soc.cpu.minerva.gprf.mem._mem[19][0] q=$abc$109383$new_n17682_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[22][0] i1=soc.cpu.minerva.gprf.mem._mem[18][0] q=$abc$109383$new_n17681_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[23][0] i1=soc.cpu.minerva.gprf.mem._mem[19][0] q=$abc$109383$new_n17682_
 .subckt buf_x4 i=$abc$109383$new_n17547_ q=$abc$109383$new_n17683_
-.subckt mx2_x2 cmd=$abc$109383$new_n17683_ i0=$abc$109383$new_n17682_ i1=$abc$109383$new_n17681_ q=$abc$109383$new_n17684_
-.subckt ao22_x2 i0=$abc$109383$new_n17684_ i1=$abc$109383$new_n17544_ i2=$abc$109383$new_n17598_ q=$abc$109383$new_n17685_
-.subckt a2_x2 i0=$abc$109383$new_n17685_ i1=$abc$109383$new_n17680_ q=$abc$109383$new_n17686_
-.subckt ao22_x2 i0=$abc$109383$new_n17686_ i1=$abc$109383$new_n17670_ i2=$abc$109383$new_n17640_ q=$abc$109383$new_n17687_
-.subckt o2_x2 i0=$abc$109383$new_n17687_ i1=$abc$109383$new_n17636_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[0]
+.subckt mux2_x1 cmd=$abc$109383$new_n17683_ i0=$abc$109383$new_n17682_ i1=$abc$109383$new_n17681_ q=$abc$109383$new_n17684_
+.subckt and21nor_x1 i0=$abc$109383$new_n17684_ i1=$abc$109383$new_n17544_ i2=$abc$109383$new_n17598_ nq=$abc$109383$new_n17685_
+.subckt and2_x1 i0=$abc$109383$new_n17685_ i1=$abc$109383$new_n17680_ q=$abc$109383$new_n17686_
+.subckt and21nor_x1 i0=$abc$109383$new_n17686_ i1=$abc$109383$new_n17670_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n17687_
+.subckt or2_x1 i0=$abc$109383$new_n17687_ i1=$abc$109383$new_n17636_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[0]
 .subckt buf_x4 i=$abc$109383$new_n17539_ q=$abc$109383$new_n17689_
 .subckt buf_x4 i=$abc$109383$new_n17534_ q=$abc$109383$new_n17690_
 .subckt buf_x4 i=$abc$109383$new_n17690_ q=$abc$109383$new_n17691_
@@ -2970,7 +2970,7 @@
 .subckt buf_x4 i=$abc$109383$new_n17552_ q=$abc$109383$new_n17696_
 .subckt buf_x4 i=$abc$109383$new_n17696_ q=$abc$109383$new_n17697_
 .subckt buf_x4 i=$abc$109383$new_n17697_ q=$abc$109383$new_n17698_
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[12][1] i1=soc.cpu.minerva.gprf.mem._mem[8][1] q=$abc$109383$new_n17699_
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[12][1] i1=soc.cpu.minerva.gprf.mem._mem[8][1] q=$abc$109383$new_n17699_
 .subckt nand2_x0 i0=$abc$109383$new_n17699_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n17700_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][1] nq=$abc$109383$new_n17701_
 .subckt buf_x4 i=$abc$109383$new_n17607_ q=$abc$109383$new_n17702_
@@ -2982,7 +2982,7 @@
 .subckt buf_x4 i=$abc$109383$new_n17553_ q=$abc$109383$new_n17708_
 .subckt buf_x4 i=$abc$109383$new_n17708_ q=$abc$109383$new_n17709_
 .subckt buf_x4 i=$abc$109383$new_n17709_ q=$abc$109383$new_n17710_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][1] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n17711_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][1] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n17711_
 .subckt nand2_x0 i0=$abc$109383$new_n17711_ i1=$abc$109383$new_n17706_ nq=$abc$109383$new_n17712_
 .subckt nand3_x0 i0=$abc$109383$new_n17712_ i1=$abc$109383$new_n17700_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n17713_
 .subckt buf_x4 i=$abc$109383$new_n17577_ q=$abc$109383$new_n17714_
@@ -2990,27 +2990,27 @@
 .subckt buf_x4 i=$abc$109383$new_n17715_ q=$abc$109383$new_n17716_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][1] nq=$abc$109383$new_n17717_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n17717_ nq=$abc$109383$new_n17718_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][1] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n17719_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][1] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n17719_
 .subckt nand2_x0 i0=$abc$109383$new_n17719_ i1=$abc$109383$new_n17718_ nq=$abc$109383$new_n17720_
 .subckt buf_x4 i=$abc$109383$new_n17548_ q=$abc$109383$new_n17721_
 .subckt buf_x4 i=$abc$109383$new_n17721_ q=$abc$109383$new_n17722_
 .subckt buf_x4 i=$abc$109383$new_n17722_ q=$abc$109383$new_n17723_
 .subckt buf_x4 i=$abc$109383$new_n17586_ q=$abc$109383$new_n17724_
 .subckt buf_x4 i=$abc$109383$new_n17724_ q=$abc$109383$new_n17725_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[14][1] i1=soc.cpu.minerva.gprf.mem._mem[10][1] q=$abc$109383$new_n17726_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[14][1] i1=soc.cpu.minerva.gprf.mem._mem[10][1] q=$abc$109383$new_n17726_
 .subckt nand2_x0 i0=$abc$109383$new_n17726_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n17727_
 .subckt nand3_x0 i0=$abc$109383$new_n17727_ i1=$abc$109383$new_n17720_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n17728_
 .subckt nand3_x0 i0=$abc$109383$new_n17728_ i1=$abc$109383$new_n17713_ i2=$abc$109383$new_n17692_ nq=$abc$109383$new_n17729_
 .subckt buf_x4 i=$abc$109383$new_n17554_ q=$abc$109383$new_n17730_
-.subckt mx2_x2 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n15732_ i1=$abc$109383$new_n15731_ q=$abc$109383$new_n17731_
-.subckt mx2_x2 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n15735_ i1=$abc$109383$new_n15734_ q=$abc$109383$new_n17732_
-.subckt mx2_x2 cmd=$abc$109383$new_n17601_ i0=$abc$109383$new_n17732_ i1=$abc$109383$new_n17731_ q=$abc$109383$new_n17733_
+.subckt mux2_x1 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n15732_ i1=$abc$109383$new_n15731_ q=$abc$109383$new_n17731_
+.subckt mux2_x1 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n15735_ i1=$abc$109383$new_n15734_ q=$abc$109383$new_n17732_
+.subckt mux2_x1 cmd=$abc$109383$new_n17601_ i0=$abc$109383$new_n17732_ i1=$abc$109383$new_n17731_ q=$abc$109383$new_n17733_
 .subckt nand2_x0 i0=$abc$109383$new_n17733_ i1=$abc$109383$new_n17716_ nq=$abc$109383$new_n17734_
 .subckt buf_x4 i=$abc$109383$new_n17643_ q=$abc$109383$new_n17735_
 .subckt buf_x4 i=$abc$109383$new_n17735_ q=$abc$109383$new_n17736_
 .subckt buf_x4 i=$abc$109383$new_n17736_ q=$abc$109383$new_n17737_
 .subckt buf_x4 i=$abc$109383$new_n17737_ q=$abc$109383$new_n17738_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[28][1] i1=soc.cpu.minerva.gprf.mem._mem[24][1] q=$abc$109383$new_n17739_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[28][1] i1=soc.cpu.minerva.gprf.mem._mem[24][1] q=$abc$109383$new_n17739_
 .subckt nand2_x0 i0=$abc$109383$new_n17739_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n17740_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][1] nq=$abc$109383$new_n17741_
 .subckt buf_x4 i=$abc$109383$new_n17624_ q=$abc$109383$new_n17742_
@@ -3018,7 +3018,7 @@
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n17741_ nq=$abc$109383$new_n17744_
 .subckt buf_x4 i=$abc$109383$new_n17613_ q=$abc$109383$new_n17745_
 .subckt buf_x4 i=$abc$109383$new_n17591_ q=$abc$109383$new_n17746_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][1] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n17747_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][1] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n17747_
 .subckt nand2_x0 i0=$abc$109383$new_n17747_ i1=$abc$109383$new_n17744_ nq=$abc$109383$new_n17748_
 .subckt nand3_x0 i0=$abc$109383$new_n17748_ i1=$abc$109383$new_n17740_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n17749_
 .subckt nand3_x0 i0=$abc$109383$new_n17749_ i1=$abc$109383$new_n17734_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n17750_
@@ -3026,37 +3026,37 @@
 .subckt buf_x4 i=$abc$109383$new_n17638_ q=$abc$109383$new_n17752_
 .subckt buf_x4 i=$abc$109383$new_n17752_ q=$abc$109383$new_n17753_
 .subckt buf_x4 i=$abc$109383$new_n17672_ q=$abc$109383$new_n17754_
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][1] i1=soc.cpu.minerva.gprf.mem._mem[16][1] q=$abc$109383$new_n17755_
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][1] i1=soc.cpu.minerva.gprf.mem._mem[16][1] q=$abc$109383$new_n17755_
 .subckt nand2_x0 i0=$abc$109383$new_n17755_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n17756_
 .subckt buf_x4 i=$abc$109383$new_n17581_ q=$abc$109383$new_n17757_
 .subckt buf_x4 i=$abc$109383$new_n17563_ q=$abc$109383$new_n17758_
 .subckt buf_x4 i=$abc$109383$new_n17758_ q=$abc$109383$new_n17759_
-.subckt oa22_x2 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=soc.cpu.minerva.gprf.mem._mem[21][1] q=$abc$109383$new_n17760_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][1] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n17761_
+.subckt or21nand_x1 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=soc.cpu.minerva.gprf.mem._mem[21][1] nq=$abc$109383$new_n17760_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][1] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n17761_
 .subckt nand2_x0 i0=$abc$109383$new_n17761_ i1=$abc$109383$new_n17760_ nq=$abc$109383$new_n17762_
 .subckt nand3_x0 i0=$abc$109383$new_n17762_ i1=$abc$109383$new_n17756_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n17763_
 .subckt buf_x4 i=$abc$109383$new_n17600_ q=$abc$109383$new_n17764_
 .subckt buf_x4 i=$abc$109383$new_n17764_ q=$abc$109383$new_n17765_
 .subckt buf_x4 i=$abc$109383$new_n17696_ q=$abc$109383$new_n17766_
 .subckt buf_x4 i=$abc$109383$new_n17766_ q=$abc$109383$new_n17767_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][1] i1=soc.cpu.minerva.gprf.mem._mem[18][1] q=$abc$109383$new_n17768_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][1] i1=soc.cpu.minerva.gprf.mem._mem[18][1] q=$abc$109383$new_n17768_
 .subckt nand2_x0 i0=$abc$109383$new_n17768_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n17769_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[23][1] q=$abc$109383$new_n17770_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[23][1] nq=$abc$109383$new_n17770_
 .subckt buf_x4 i=$abc$109383$new_n17613_ q=$abc$109383$new_n17771_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][1] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n17772_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][1] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n17772_
 .subckt nand2_x0 i0=$abc$109383$new_n17772_ i1=$abc$109383$new_n17770_ nq=$abc$109383$new_n17773_
 .subckt nand3_x0 i0=$abc$109383$new_n17773_ i1=$abc$109383$new_n17769_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n17774_
 .subckt nand3_x0 i0=$abc$109383$new_n17774_ i1=$abc$109383$new_n17763_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n17775_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[4][1] i1=soc.cpu.minerva.gprf.mem._mem[0][1] q=$abc$109383$new_n17776_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[5][1] i1=soc.cpu.minerva.gprf.mem._mem[1][1] q=$abc$109383$new_n17777_
-.subckt mx2_x2 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n17777_ i1=$abc$109383$new_n17776_ q=$abc$109383$new_n17778_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[6][1] i1=soc.cpu.minerva.gprf.mem._mem[2][1] q=$abc$109383$new_n17779_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[7][1] i1=soc.cpu.minerva.gprf.mem._mem[3][1] q=$abc$109383$new_n17780_
-.subckt mx2_x2 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n17780_ i1=$abc$109383$new_n17779_ q=$abc$109383$new_n17781_
-.subckt mx2_x2 cmd=$abc$109383$new_n17672_ i0=$abc$109383$new_n17781_ i1=$abc$109383$new_n17778_ q=$abc$109383$new_n17782_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[4][1] i1=soc.cpu.minerva.gprf.mem._mem[0][1] q=$abc$109383$new_n17776_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[5][1] i1=soc.cpu.minerva.gprf.mem._mem[1][1] q=$abc$109383$new_n17777_
+.subckt mux2_x1 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n17777_ i1=$abc$109383$new_n17776_ q=$abc$109383$new_n17778_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[6][1] i1=soc.cpu.minerva.gprf.mem._mem[2][1] q=$abc$109383$new_n17779_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[7][1] i1=soc.cpu.minerva.gprf.mem._mem[3][1] q=$abc$109383$new_n17780_
+.subckt mux2_x1 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n17780_ i1=$abc$109383$new_n17779_ q=$abc$109383$new_n17781_
+.subckt mux2_x1 cmd=$abc$109383$new_n17672_ i0=$abc$109383$new_n17781_ i1=$abc$109383$new_n17778_ q=$abc$109383$new_n17782_
 .subckt nand2_x0 i0=$abc$109383$new_n17782_ i1=$abc$109383$new_n17692_ nq=$abc$109383$new_n17783_
 .subckt nand2_x0 i0=$abc$109383$new_n17783_ i1=$abc$109383$new_n17775_ nq=$abc$109383$new_n17784_
-.subckt ao22_x2 i0=$abc$109383$new_n17689_ i1=$abc$109383$new_n17784_ i2=$abc$109383$new_n17751_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[1]
+.subckt and21nor_x1 i0=$abc$109383$new_n17689_ i1=$abc$109383$new_n17784_ i2=$abc$109383$new_n17751_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[1]
 .subckt buf_x4 i=$abc$109383$new_n17539_ q=$abc$109383$new_n17786_
 .subckt buf_x4 i=$abc$109383$new_n17630_ q=$abc$109383$new_n17787_
 .subckt buf_x4 i=$abc$109383$new_n17787_ q=$abc$109383$new_n17788_
@@ -3065,81 +3065,81 @@
 .subckt nand3_x0 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15552_ i2=soc.cpu.minerva.fetch.ibus_rdata[21] nq=$abc$109383$new_n17791_
 .subckt buf_x4 i=$abc$109383$new_n17791_ q=$abc$109383$new_n17792_
 .subckt buf_x4 i=$abc$109383$new_n17792_ q=$abc$109383$new_n17793_
-.subckt oa22_x2 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15237_ i2=$abc$109383$new_n15332_ q=$abc$109383$new_n17794_
+.subckt or21nand_x1 i0=$abc$109383$new_n15506_ i1=$abc$109383$new_n15237_ i2=$abc$109383$new_n15332_ nq=$abc$109383$new_n17794_
 .subckt buf_x4 i=$abc$109383$new_n17794_ q=$abc$109383$new_n17795_
 .subckt buf_x4 i=$abc$109383$new_n17795_ q=$abc$109383$new_n17796_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n17790_ nq=$abc$109383$new_n17797_
 .subckt buf_x4 i=$abc$109383$new_n17547_ q=$abc$109383$new_n17798_
 .subckt buf_x4 i=$abc$109383$new_n17542_ q=$abc$109383$new_n17799_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][2] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17798_ q=$abc$109383$new_n17800_
-.subckt a2_x2 i0=$abc$109383$new_n17800_ i1=$abc$109383$new_n17797_ q=$abc$109383$new_n17801_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][2] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17798_ nq=$abc$109383$new_n17800_
+.subckt and2_x1 i0=$abc$109383$new_n17800_ i1=$abc$109383$new_n17797_ q=$abc$109383$new_n17801_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][2] nq=$abc$109383$new_n17802_
 .subckt buf_x4 i=$abc$109383$new_n17792_ q=$abc$109383$new_n17803_
 .subckt buf_x4 i=$abc$109383$new_n17795_ q=$abc$109383$new_n17804_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n17802_ nq=$abc$109383$new_n17805_
 .subckt buf_x4 i=$abc$109383$new_n17568_ q=$abc$109383$new_n17806_
 .subckt buf_x4 i=$abc$109383$new_n17542_ q=$abc$109383$new_n17807_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][2] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ q=$abc$109383$new_n17808_
-.subckt a2_x2 i0=$abc$109383$new_n17808_ i1=$abc$109383$new_n17805_ q=$abc$109383$new_n17809_
-.subckt ao22_x2 i0=$abc$109383$new_n17809_ i1=$abc$109383$new_n17801_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n17810_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][2] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ nq=$abc$109383$new_n17808_
+.subckt and2_x1 i0=$abc$109383$new_n17808_ i1=$abc$109383$new_n17805_ q=$abc$109383$new_n17809_
+.subckt and21nor_x1 i0=$abc$109383$new_n17809_ i1=$abc$109383$new_n17801_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n17810_
 .subckt buf_x4 i=$abc$109383$new_n17534_ q=$abc$109383$new_n17811_
 .subckt buf_x4 i=$abc$109383$new_n17643_ q=$abc$109383$new_n17812_
-.subckt mx2_x2 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[15][2] i1=soc.cpu.minerva.gprf.mem._mem[13][2] q=$abc$109383$new_n17813_
-.subckt mx2_x2 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[14][2] i1=soc.cpu.minerva.gprf.mem._mem[12][2] q=$abc$109383$new_n17814_
+.subckt mux2_x1 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[15][2] i1=soc.cpu.minerva.gprf.mem._mem[13][2] q=$abc$109383$new_n17813_
+.subckt mux2_x1 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[14][2] i1=soc.cpu.minerva.gprf.mem._mem[12][2] q=$abc$109383$new_n17814_
 .subckt buf_x4 i=$abc$109383$new_n17647_ q=$abc$109383$new_n17815_
-.subckt mx2_x2 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n17814_ i1=$abc$109383$new_n17813_ q=$abc$109383$new_n17816_
-.subckt a2_x2 i0=$abc$109383$new_n17816_ i1=$abc$109383$new_n17811_ q=$abc$109383$new_n17817_
-.subckt ao22_x2 i0=$abc$109383$new_n17817_ i1=$abc$109383$new_n17810_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n17818_
+.subckt mux2_x1 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n17814_ i1=$abc$109383$new_n17813_ q=$abc$109383$new_n17816_
+.subckt and2_x1 i0=$abc$109383$new_n17816_ i1=$abc$109383$new_n17811_ q=$abc$109383$new_n17817_
+.subckt and21nor_x1 i0=$abc$109383$new_n17817_ i1=$abc$109383$new_n17810_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n17818_
 .subckt buf_x4 i=$abc$109383$new_n17638_ q=$abc$109383$new_n17819_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][2] nq=$abc$109383$new_n17820_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n17820_ nq=$abc$109383$new_n17821_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][2] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n17822_
-.subckt a2_x2 i0=$abc$109383$new_n17822_ i1=$abc$109383$new_n17821_ q=$abc$109383$new_n17823_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][2] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n17822_
+.subckt and2_x1 i0=$abc$109383$new_n17822_ i1=$abc$109383$new_n17821_ q=$abc$109383$new_n17823_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][2] nq=$abc$109383$new_n17824_
 .subckt buf_x4 i=$abc$109383$new_n17792_ q=$abc$109383$new_n17825_
 .subckt buf_x4 i=$abc$109383$new_n17795_ q=$abc$109383$new_n17826_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n17824_ nq=$abc$109383$new_n17827_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][2] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17612_ q=$abc$109383$new_n17828_
-.subckt a2_x2 i0=$abc$109383$new_n17828_ i1=$abc$109383$new_n17827_ q=$abc$109383$new_n17829_
-.subckt ao22_x2 i0=$abc$109383$new_n17829_ i1=$abc$109383$new_n17823_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n17830_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][2] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17612_ nq=$abc$109383$new_n17828_
+.subckt and2_x1 i0=$abc$109383$new_n17828_ i1=$abc$109383$new_n17827_ q=$abc$109383$new_n17829_
+.subckt and21nor_x1 i0=$abc$109383$new_n17829_ i1=$abc$109383$new_n17823_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n17830_
 .subckt buf_x4 i=$abc$109383$new_n17541_ q=$abc$109383$new_n17831_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[11][2] i1=soc.cpu.minerva.gprf.mem._mem[9][2] q=$abc$109383$new_n17832_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[10][2] i1=soc.cpu.minerva.gprf.mem._mem[8][2] q=$abc$109383$new_n17833_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[11][2] i1=soc.cpu.minerva.gprf.mem._mem[9][2] q=$abc$109383$new_n17832_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[10][2] i1=soc.cpu.minerva.gprf.mem._mem[8][2] q=$abc$109383$new_n17833_
 .subckt buf_x4 i=$abc$109383$new_n17647_ q=$abc$109383$new_n17834_
-.subckt mx2_x2 cmd=$abc$109383$new_n17834_ i0=$abc$109383$new_n17833_ i1=$abc$109383$new_n17832_ q=$abc$109383$new_n17835_
-.subckt a2_x2 i0=$abc$109383$new_n17835_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n17836_
-.subckt ao22_x2 i0=$abc$109383$new_n17836_ i1=$abc$109383$new_n17830_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n17837_
-.subckt ao22_x2 i0=$abc$109383$new_n17837_ i1=$abc$109383$new_n17818_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n17838_
+.subckt mux2_x1 cmd=$abc$109383$new_n17834_ i0=$abc$109383$new_n17833_ i1=$abc$109383$new_n17832_ q=$abc$109383$new_n17835_
+.subckt and2_x1 i0=$abc$109383$new_n17835_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n17836_
+.subckt and21nor_x1 i0=$abc$109383$new_n17836_ i1=$abc$109383$new_n17830_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n17837_
+.subckt and21nor_x1 i0=$abc$109383$new_n17837_ i1=$abc$109383$new_n17818_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n17838_
 .subckt buf_x4 i=$abc$109383$new_n17598_ q=$abc$109383$new_n17839_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[20][2] i1=soc.cpu.minerva.gprf.mem._mem[16][2] q=$abc$109383$new_n17840_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[20][2] i1=soc.cpu.minerva.gprf.mem._mem[16][2] q=$abc$109383$new_n17840_
 .subckt nand2_x0 i0=$abc$109383$new_n17840_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n17841_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][2] nq=$abc$109383$new_n17842_
 .subckt buf_x4 i=$abc$109383$new_n15552_ q=$abc$109383$new_n17843_
-.subckt a3_x2 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[22] q=$abc$109383$new_n17844_
-.subckt o2_x2 i0=$abc$109383$new_n15236_ i1=$abc$109383$new_n15235_ q=$abc$109383$new_n17845_
+.subckt and3_x1 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[22] q=$abc$109383$new_n17844_
+.subckt or2_x1 i0=$abc$109383$new_n15236_ i1=$abc$109383$new_n15235_ q=$abc$109383$new_n17845_
 .subckt buf_x4 i=$abc$109383$new_n17845_ q=$abc$109383$new_n17846_
-.subckt a2_x2 i0=$abc$109383$new_n15505_ i1=$abc$109383$new_n15436_ q=$abc$109383$new_n17847_
+.subckt and2_x1 i0=$abc$109383$new_n15505_ i1=$abc$109383$new_n15436_ q=$abc$109383$new_n17847_
 .subckt nor2_x0 i0=$abc$109383$new_n17847_ i1=$abc$109383$new_n15260_ nq=$abc$109383$new_n17848_
 .subckt buf_x4 i=$abc$109383$new_n17848_ q=$abc$109383$new_n17849_
-.subckt ao22_x2 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n17628_ q=$abc$109383$new_n17850_
-.subckt ao22_x2 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n17842_ q=$abc$109383$new_n17851_
+.subckt and21nor_x1 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n17628_ nq=$abc$109383$new_n17850_
+.subckt and21nor_x1 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n17842_ nq=$abc$109383$new_n17851_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][2] nq=$abc$109383$new_n17852_
-.subckt oa22_x2 i0=$abc$109383$new_n17852_ i1=$abc$109383$new_n17724_ i2=$abc$109383$new_n17798_ q=$abc$109383$new_n17853_
-.subckt ao22_x2 i0=$abc$109383$new_n17853_ i1=$abc$109383$new_n17851_ i2=$abc$109383$new_n17544_ q=$abc$109383$new_n17854_
+.subckt or21nand_x1 i0=$abc$109383$new_n17852_ i1=$abc$109383$new_n17724_ i2=$abc$109383$new_n17798_ nq=$abc$109383$new_n17853_
+.subckt and21nor_x1 i0=$abc$109383$new_n17853_ i1=$abc$109383$new_n17851_ i2=$abc$109383$new_n17544_ nq=$abc$109383$new_n17854_
 .subckt nand2_x0 i0=$abc$109383$new_n17854_ i1=$abc$109383$new_n17841_ nq=$abc$109383$new_n17855_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][2] nq=$abc$109383$new_n17856_
 .subckt nand3_x0 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n17856_ nq=$abc$109383$new_n17857_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][2] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n17858_
-.subckt a2_x2 i0=$abc$109383$new_n17858_ i1=$abc$109383$new_n17857_ q=$abc$109383$new_n17859_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][2] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n17858_
+.subckt and2_x1 i0=$abc$109383$new_n17858_ i1=$abc$109383$new_n17857_ q=$abc$109383$new_n17859_
 .subckt buf_x4 i=$abc$109383$new_n17812_ q=$abc$109383$new_n17860_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[22][2] i1=soc.cpu.minerva.gprf.mem._mem[18][2] q=$abc$109383$new_n17861_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[22][2] i1=soc.cpu.minerva.gprf.mem._mem[18][2] q=$abc$109383$new_n17861_
 .subckt buf_x4 i=$abc$109383$new_n17547_ q=$abc$109383$new_n17862_
-.subckt oa22_x2 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n17861_ i2=$abc$109383$new_n17860_ q=$abc$109383$new_n17863_
-.subckt ao22_x2 i0=$abc$109383$new_n17863_ i1=$abc$109383$new_n17859_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n17864_
-.subckt a2_x2 i0=$abc$109383$new_n17864_ i1=$abc$109383$new_n17855_ q=$abc$109383$new_n17865_
+.subckt or21nand_x1 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n17861_ i2=$abc$109383$new_n17860_ nq=$abc$109383$new_n17863_
+.subckt and21nor_x1 i0=$abc$109383$new_n17863_ i1=$abc$109383$new_n17859_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n17864_
+.subckt and2_x1 i0=$abc$109383$new_n17864_ i1=$abc$109383$new_n17855_ q=$abc$109383$new_n17865_
 .subckt buf_x4 i=$abc$109383$new_n17534_ q=$abc$109383$new_n17866_
 .subckt buf_x4 i=$abc$109383$new_n17696_ q=$abc$109383$new_n17867_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[4][2] i1=soc.cpu.minerva.gprf.mem._mem[0][2] q=$abc$109383$new_n17868_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[4][2] i1=soc.cpu.minerva.gprf.mem._mem[0][2] q=$abc$109383$new_n17868_
 .subckt nand2_x0 i0=$abc$109383$new_n17868_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n17869_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][2] nq=$abc$109383$new_n17870_
 .subckt buf_x4 i=$abc$109383$new_n17607_ q=$abc$109383$new_n17871_
@@ -3147,1773 +3147,1773 @@
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n17870_ nq=$abc$109383$new_n17873_
 .subckt buf_x4 i=$abc$109383$new_n17655_ q=$abc$109383$new_n17874_
 .subckt buf_x4 i=$abc$109383$new_n17620_ q=$abc$109383$new_n17875_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][2] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n17876_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][2] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n17876_
 .subckt nand2_x0 i0=$abc$109383$new_n17876_ i1=$abc$109383$new_n17873_ nq=$abc$109383$new_n17877_
 .subckt nand3_x0 i0=$abc$109383$new_n17877_ i1=$abc$109383$new_n17869_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n17878_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[6][2] i1=soc.cpu.minerva.gprf.mem._mem[2][2] q=$abc$109383$new_n17879_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[6][2] i1=soc.cpu.minerva.gprf.mem._mem[2][2] q=$abc$109383$new_n17879_
 .subckt nand2_x0 i0=$abc$109383$new_n17879_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n17880_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n15794_ nq=$abc$109383$new_n17881_
 .subckt buf_x4 i=$abc$109383$new_n17612_ q=$abc$109383$new_n17882_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][2] i1=$abc$109383$new_n17555_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n17883_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][2] i1=$abc$109383$new_n17555_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n17883_
 .subckt nand2_x0 i0=$abc$109383$new_n17883_ i1=$abc$109383$new_n17881_ nq=$abc$109383$new_n17884_
 .subckt nand3_x0 i0=$abc$109383$new_n17884_ i1=$abc$109383$new_n17880_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n17885_
-.subckt a3_x2 i0=$abc$109383$new_n17885_ i1=$abc$109383$new_n17878_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n17886_
-.subckt ao22_x2 i0=$abc$109383$new_n17886_ i1=$abc$109383$new_n17865_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n17887_
-.subckt o2_x2 i0=$abc$109383$new_n17887_ i1=$abc$109383$new_n17838_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[2]
+.subckt and3_x1 i0=$abc$109383$new_n17885_ i1=$abc$109383$new_n17878_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n17886_
+.subckt and21nor_x1 i0=$abc$109383$new_n17886_ i1=$abc$109383$new_n17865_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n17887_
+.subckt or2_x1 i0=$abc$109383$new_n17887_ i1=$abc$109383$new_n17838_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[2]
 .subckt buf_x4 i=$abc$109383$new_n17603_ q=$abc$109383$new_n17889_
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][3] i1=soc.cpu.minerva.gprf.mem._mem[16][3] q=$abc$109383$new_n17890_
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][3] i1=soc.cpu.minerva.gprf.mem._mem[16][3] q=$abc$109383$new_n17890_
 .subckt nand2_x0 i0=$abc$109383$new_n17890_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n17891_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][3] nq=$abc$109383$new_n17892_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n17892_ nq=$abc$109383$new_n17893_
 .subckt buf_x4 i=$abc$109383$new_n17572_ q=$abc$109383$new_n17894_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][3] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n17895_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][3] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n17895_
 .subckt nand2_x0 i0=$abc$109383$new_n17895_ i1=$abc$109383$new_n17893_ nq=$abc$109383$new_n17896_
 .subckt nand3_x0 i0=$abc$109383$new_n17896_ i1=$abc$109383$new_n17891_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n17897_
 .subckt buf_x4 i=$abc$109383$new_n17715_ q=$abc$109383$new_n17898_
 .subckt buf_x4 i=$abc$109383$new_n17694_ q=$abc$109383$new_n17899_
 .subckt buf_x4 i=$abc$109383$new_n17766_ q=$abc$109383$new_n17900_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][3] i1=soc.cpu.minerva.gprf.mem._mem[18][3] q=$abc$109383$new_n17901_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][3] i1=soc.cpu.minerva.gprf.mem._mem[18][3] q=$abc$109383$new_n17901_
 .subckt nand2_x0 i0=$abc$109383$new_n17901_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n17902_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[23][3] q=$abc$109383$new_n17903_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[23][3] nq=$abc$109383$new_n17903_
 .subckt buf_x4 i=$abc$109383$new_n17806_ q=$abc$109383$new_n17904_
 .subckt buf_x4 i=$abc$109383$new_n17904_ q=$abc$109383$new_n17905_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][3] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n17906_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][3] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n17906_
 .subckt nand2_x0 i0=$abc$109383$new_n17906_ i1=$abc$109383$new_n17903_ nq=$abc$109383$new_n17907_
 .subckt nand3_x0 i0=$abc$109383$new_n17907_ i1=$abc$109383$new_n17902_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n17908_
 .subckt nand3_x0 i0=$abc$109383$new_n17908_ i1=$abc$109383$new_n17897_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n17909_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[4][3] i1=soc.cpu.minerva.gprf.mem._mem[0][3] q=$abc$109383$new_n17910_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[4][3] i1=soc.cpu.minerva.gprf.mem._mem[0][3] q=$abc$109383$new_n17910_
 .subckt nand2_x0 i0=$abc$109383$new_n17910_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n17911_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[5][3] q=$abc$109383$new_n17912_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][3] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n17913_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[5][3] nq=$abc$109383$new_n17912_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][3] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n17913_
 .subckt nand2_x0 i0=$abc$109383$new_n17913_ i1=$abc$109383$new_n17912_ nq=$abc$109383$new_n17914_
 .subckt nand3_x0 i0=$abc$109383$new_n17914_ i1=$abc$109383$new_n17911_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n17915_
 .subckt buf_x4 i=$abc$109383$new_n17715_ q=$abc$109383$new_n17916_
 .subckt buf_x4 i=$abc$109383$new_n17724_ q=$abc$109383$new_n17917_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[6][3] i1=soc.cpu.minerva.gprf.mem._mem[2][3] q=$abc$109383$new_n17918_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[6][3] i1=soc.cpu.minerva.gprf.mem._mem[2][3] q=$abc$109383$new_n17918_
 .subckt nand2_x0 i0=$abc$109383$new_n17918_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n17919_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n15860_ nq=$abc$109383$new_n17920_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][3] i1=$abc$109383$new_n17889_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n17921_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][3] i1=$abc$109383$new_n17889_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n17921_
 .subckt nand2_x0 i0=$abc$109383$new_n17921_ i1=$abc$109383$new_n17920_ nq=$abc$109383$new_n17922_
 .subckt nand3_x0 i0=$abc$109383$new_n17922_ i1=$abc$109383$new_n17919_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n17923_
 .subckt nand3_x0 i0=$abc$109383$new_n17923_ i1=$abc$109383$new_n17915_ i2=$abc$109383$new_n17692_ nq=$abc$109383$new_n17924_
-.subckt oa22_x2 i0=$abc$109383$new_n17924_ i1=$abc$109383$new_n17909_ i2=$abc$109383$new_n17689_ q=$abc$109383$new_n17925_
+.subckt or21nand_x1 i0=$abc$109383$new_n17924_ i1=$abc$109383$new_n17909_ i2=$abc$109383$new_n17689_ nq=$abc$109383$new_n17925_
 .subckt buf_x4 i=$abc$109383$new_n17598_ q=$abc$109383$new_n17926_
 .subckt buf_x4 i=$abc$109383$new_n17926_ q=$abc$109383$new_n17927_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=$abc$109383$new_n15878_ i1=$abc$109383$new_n15877_ q=$abc$109383$new_n17928_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=$abc$109383$new_n15881_ i1=$abc$109383$new_n15880_ q=$abc$109383$new_n17929_
-.subckt mx2_x2 cmd=$abc$109383$new_n17694_ i0=$abc$109383$new_n17929_ i1=$abc$109383$new_n17928_ q=$abc$109383$new_n17930_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=$abc$109383$new_n15878_ i1=$abc$109383$new_n15877_ q=$abc$109383$new_n17928_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=$abc$109383$new_n15881_ i1=$abc$109383$new_n15880_ q=$abc$109383$new_n17929_
+.subckt mux2_x1 cmd=$abc$109383$new_n17694_ i0=$abc$109383$new_n17929_ i1=$abc$109383$new_n17928_ q=$abc$109383$new_n17930_
 .subckt nand2_x0 i0=$abc$109383$new_n17930_ i1=$abc$109383$new_n17898_ nq=$abc$109383$new_n17931_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[28][3] i1=soc.cpu.minerva.gprf.mem._mem[24][3] q=$abc$109383$new_n17932_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[28][3] i1=soc.cpu.minerva.gprf.mem._mem[24][3] q=$abc$109383$new_n17932_
 .subckt nand2_x0 i0=$abc$109383$new_n17932_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n17933_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[29][3] q=$abc$109383$new_n17934_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[29][3] nq=$abc$109383$new_n17934_
 .subckt buf_x4 i=$abc$109383$new_n17641_ q=$abc$109383$new_n17935_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][3] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n17936_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][3] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n17936_
 .subckt nand2_x0 i0=$abc$109383$new_n17936_ i1=$abc$109383$new_n17934_ nq=$abc$109383$new_n17937_
 .subckt nand3_x0 i0=$abc$109383$new_n17937_ i1=$abc$109383$new_n17933_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n17938_
 .subckt nand3_x0 i0=$abc$109383$new_n17938_ i1=$abc$109383$new_n17931_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n17939_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[12][3] i1=soc.cpu.minerva.gprf.mem._mem[8][3] q=$abc$109383$new_n17940_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[12][3] i1=soc.cpu.minerva.gprf.mem._mem[8][3] q=$abc$109383$new_n17940_
 .subckt nand2_x0 i0=$abc$109383$new_n17940_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n17941_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][3] nq=$abc$109383$new_n17942_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n17942_ nq=$abc$109383$new_n17943_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][3] i1=$abc$109383$new_n17889_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n17944_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][3] i1=$abc$109383$new_n17889_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n17944_
 .subckt nand2_x0 i0=$abc$109383$new_n17944_ i1=$abc$109383$new_n17943_ nq=$abc$109383$new_n17945_
 .subckt nand3_x0 i0=$abc$109383$new_n17945_ i1=$abc$109383$new_n17941_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n17946_
 .subckt buf_x4 i=$abc$109383$new_n17862_ q=$abc$109383$new_n17947_
 .subckt buf_x4 i=$abc$109383$new_n17947_ q=$abc$109383$new_n17948_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[14][3] i1=soc.cpu.minerva.gprf.mem._mem[10][3] q=$abc$109383$new_n17949_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[14][3] i1=soc.cpu.minerva.gprf.mem._mem[10][3] q=$abc$109383$new_n17949_
 .subckt nand2_x0 i0=$abc$109383$new_n17949_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n17950_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][3] nq=$abc$109383$new_n17951_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n17951_ nq=$abc$109383$new_n17952_
 .subckt buf_x4 i=$abc$109383$new_n17656_ q=$abc$109383$new_n17953_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][3] i1=$abc$109383$new_n17900_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n17954_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][3] i1=$abc$109383$new_n17900_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n17954_
 .subckt nand2_x0 i0=$abc$109383$new_n17954_ i1=$abc$109383$new_n17952_ nq=$abc$109383$new_n17955_
 .subckt nand3_x0 i0=$abc$109383$new_n17955_ i1=$abc$109383$new_n17950_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n17956_
 .subckt nand3_x0 i0=$abc$109383$new_n17956_ i1=$abc$109383$new_n17946_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n17957_
-.subckt oa22_x2 i0=$abc$109383$new_n17957_ i1=$abc$109383$new_n17939_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n17958_
+.subckt or21nand_x1 i0=$abc$109383$new_n17957_ i1=$abc$109383$new_n17939_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n17958_
 .subckt nand2_x0 i0=$abc$109383$new_n17958_ i1=$abc$109383$new_n17925_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[3]
 .subckt buf_x4 i=$abc$109383$new_n17819_ q=$abc$109383$new_n17960_
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[20][4] i1=soc.cpu.minerva.gprf.mem._mem[16][4] q=$abc$109383$new_n17961_
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[20][4] i1=soc.cpu.minerva.gprf.mem._mem[16][4] q=$abc$109383$new_n17961_
 .subckt nand2_x0 i0=$abc$109383$new_n17961_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n17962_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][4] nq=$abc$109383$new_n17963_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=$abc$109383$new_n17963_ nq=$abc$109383$new_n17964_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][4] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n17965_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][4] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n17965_
 .subckt nand2_x0 i0=$abc$109383$new_n17965_ i1=$abc$109383$new_n17964_ nq=$abc$109383$new_n17966_
 .subckt nand3_x0 i0=$abc$109383$new_n17966_ i1=$abc$109383$new_n17962_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n17967_
 .subckt buf_x4 i=$abc$109383$new_n17549_ q=$abc$109383$new_n17968_
-.subckt mx2_x2 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[22][4] i1=soc.cpu.minerva.gprf.mem._mem[18][4] q=$abc$109383$new_n17969_
+.subckt mux2_x1 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[22][4] i1=soc.cpu.minerva.gprf.mem._mem[18][4] q=$abc$109383$new_n17969_
 .subckt nand2_x0 i0=$abc$109383$new_n17969_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n17970_
-.subckt oa22_x2 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[23][4] q=$abc$109383$new_n17971_
+.subckt or21nand_x1 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[23][4] nq=$abc$109383$new_n17971_
 .subckt buf_x4 i=$abc$109383$new_n17569_ q=$abc$109383$new_n17972_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][4] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n17972_ q=$abc$109383$new_n17973_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][4] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n17972_ nq=$abc$109383$new_n17973_
 .subckt nand2_x0 i0=$abc$109383$new_n17973_ i1=$abc$109383$new_n17971_ nq=$abc$109383$new_n17974_
 .subckt nand3_x0 i0=$abc$109383$new_n17974_ i1=$abc$109383$new_n17970_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n17975_
-.subckt a3_x2 i0=$abc$109383$new_n17975_ i1=$abc$109383$new_n17967_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n17976_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[6][4] i1=soc.cpu.minerva.gprf.mem._mem[2][4] q=$abc$109383$new_n17977_
+.subckt and3_x1 i0=$abc$109383$new_n17975_ i1=$abc$109383$new_n17967_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n17976_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[6][4] i1=soc.cpu.minerva.gprf.mem._mem[2][4] q=$abc$109383$new_n17977_
 .subckt nand2_x0 i0=$abc$109383$new_n17977_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n17978_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][4] nq=$abc$109383$new_n17979_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n17979_ nq=$abc$109383$new_n17980_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][4] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n17981_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][4] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n17981_
 .subckt nand2_x0 i0=$abc$109383$new_n17981_ i1=$abc$109383$new_n17980_ nq=$abc$109383$new_n17982_
 .subckt nand3_x0 i0=$abc$109383$new_n17982_ i1=$abc$109383$new_n17978_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n17983_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][4] i1=soc.cpu.minerva.gprf.mem._mem[0][4] q=$abc$109383$new_n17984_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][4] i1=soc.cpu.minerva.gprf.mem._mem[0][4] q=$abc$109383$new_n17984_
 .subckt nand2_x0 i0=$abc$109383$new_n17984_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n17985_
-.subckt oa22_x2 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[5][4] q=$abc$109383$new_n17986_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][4] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17627_ q=$abc$109383$new_n17987_
+.subckt or21nand_x1 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[5][4] nq=$abc$109383$new_n17986_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][4] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17627_ nq=$abc$109383$new_n17987_
 .subckt nand2_x0 i0=$abc$109383$new_n17987_ i1=$abc$109383$new_n17986_ nq=$abc$109383$new_n17988_
 .subckt nand3_x0 i0=$abc$109383$new_n17988_ i1=$abc$109383$new_n17985_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n17989_
-.subckt a3_x2 i0=$abc$109383$new_n17989_ i1=$abc$109383$new_n17983_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n17990_
-.subckt ao22_x2 i0=$abc$109383$new_n17990_ i1=$abc$109383$new_n17976_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n17991_
+.subckt and3_x1 i0=$abc$109383$new_n17989_ i1=$abc$109383$new_n17983_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n17990_
+.subckt and21nor_x1 i0=$abc$109383$new_n17990_ i1=$abc$109383$new_n17976_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n17991_
 .subckt buf_x4 i=$abc$109383$new_n17671_ q=$abc$109383$new_n17992_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[12][4] i1=soc.cpu.minerva.gprf.mem._mem[8][4] q=$abc$109383$new_n17993_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[12][4] i1=soc.cpu.minerva.gprf.mem._mem[8][4] q=$abc$109383$new_n17993_
 .subckt nand2_x0 i0=$abc$109383$new_n17993_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n17994_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][4] nq=$abc$109383$new_n17995_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n17995_ nq=$abc$109383$new_n17996_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][4] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n17997_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][4] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n17997_
 .subckt nand2_x0 i0=$abc$109383$new_n17997_ i1=$abc$109383$new_n17996_ nq=$abc$109383$new_n17998_
 .subckt nand3_x0 i0=$abc$109383$new_n17998_ i1=$abc$109383$new_n17994_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n17999_
 .subckt buf_x4 i=$abc$109383$new_n17552_ q=$abc$109383$new_n18000_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[15][4] i1=soc.cpu.minerva.gprf.mem._mem[11][4] q=$abc$109383$new_n18001_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[14][4] i1=soc.cpu.minerva.gprf.mem._mem[10][4] q=$abc$109383$new_n18002_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[15][4] i1=soc.cpu.minerva.gprf.mem._mem[11][4] q=$abc$109383$new_n18001_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[14][4] i1=soc.cpu.minerva.gprf.mem._mem[10][4] q=$abc$109383$new_n18002_
 .subckt buf_x4 i=$abc$109383$new_n17647_ q=$abc$109383$new_n18003_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18002_ i1=$abc$109383$new_n18001_ q=$abc$109383$new_n18004_
-.subckt ao22_x2 i0=$abc$109383$new_n18004_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n18005_
-.subckt a2_x2 i0=$abc$109383$new_n18005_ i1=$abc$109383$new_n17999_ q=$abc$109383$new_n18006_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[30][4] i1=soc.cpu.minerva.gprf.mem._mem[26][4] q=$abc$109383$new_n18007_
-.subckt a2_x2 i0=$abc$109383$new_n18007_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18008_
-.subckt oa22_x2 i0=$abc$109383$new_n17562_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[31][4] q=$abc$109383$new_n18009_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][4] i1=$abc$109383$new_n17629_ i2=$abc$109383$new_n17655_ q=$abc$109383$new_n18010_
-.subckt a2_x2 i0=$abc$109383$new_n18010_ i1=$abc$109383$new_n18009_ q=$abc$109383$new_n18011_
-.subckt ao22_x2 i0=$abc$109383$new_n18011_ i1=$abc$109383$new_n18008_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n18012_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[28][4] i1=soc.cpu.minerva.gprf.mem._mem[24][4] q=$abc$109383$new_n18013_
-.subckt a2_x2 i0=$abc$109383$new_n18013_ i1=$abc$109383$new_n17862_ q=$abc$109383$new_n18014_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18002_ i1=$abc$109383$new_n18001_ q=$abc$109383$new_n18004_
+.subckt and21nor_x1 i0=$abc$109383$new_n18004_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n18005_
+.subckt and2_x1 i0=$abc$109383$new_n18005_ i1=$abc$109383$new_n17999_ q=$abc$109383$new_n18006_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[30][4] i1=soc.cpu.minerva.gprf.mem._mem[26][4] q=$abc$109383$new_n18007_
+.subckt and2_x1 i0=$abc$109383$new_n18007_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18008_
+.subckt or21nand_x1 i0=$abc$109383$new_n17562_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[31][4] nq=$abc$109383$new_n18009_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][4] i1=$abc$109383$new_n17629_ i2=$abc$109383$new_n17655_ nq=$abc$109383$new_n18010_
+.subckt and2_x1 i0=$abc$109383$new_n18010_ i1=$abc$109383$new_n18009_ q=$abc$109383$new_n18011_
+.subckt and21nor_x1 i0=$abc$109383$new_n18011_ i1=$abc$109383$new_n18008_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n18012_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[28][4] i1=soc.cpu.minerva.gprf.mem._mem[24][4] q=$abc$109383$new_n18013_
+.subckt and2_x1 i0=$abc$109383$new_n18013_ i1=$abc$109383$new_n17862_ q=$abc$109383$new_n18014_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][4] nq=$abc$109383$new_n18015_
 .subckt nand3_x0 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=$abc$109383$new_n18015_ nq=$abc$109383$new_n18016_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][4] i1=$abc$109383$new_n17602_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n18017_
-.subckt a2_x2 i0=$abc$109383$new_n18017_ i1=$abc$109383$new_n18016_ q=$abc$109383$new_n18018_
-.subckt ao22_x2 i0=$abc$109383$new_n18018_ i1=$abc$109383$new_n18014_ i2=$abc$109383$new_n17671_ q=$abc$109383$new_n18019_
-.subckt ao22_x2 i0=$abc$109383$new_n18019_ i1=$abc$109383$new_n18012_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n18020_
-.subckt ao22_x2 i0=$abc$109383$new_n18020_ i1=$abc$109383$new_n18006_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n18021_
-.subckt o2_x2 i0=$abc$109383$new_n18021_ i1=$abc$109383$new_n17991_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[4]
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[12][5] i1=soc.cpu.minerva.gprf.mem._mem[8][5] q=$abc$109383$new_n18023_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][4] i1=$abc$109383$new_n17602_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n18017_
+.subckt and2_x1 i0=$abc$109383$new_n18017_ i1=$abc$109383$new_n18016_ q=$abc$109383$new_n18018_
+.subckt and21nor_x1 i0=$abc$109383$new_n18018_ i1=$abc$109383$new_n18014_ i2=$abc$109383$new_n17671_ nq=$abc$109383$new_n18019_
+.subckt and21nor_x1 i0=$abc$109383$new_n18019_ i1=$abc$109383$new_n18012_ i2=$abc$109383$new_n17752_ nq=$abc$109383$new_n18020_
+.subckt and21nor_x1 i0=$abc$109383$new_n18020_ i1=$abc$109383$new_n18006_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n18021_
+.subckt or2_x1 i0=$abc$109383$new_n18021_ i1=$abc$109383$new_n17991_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[4]
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[12][5] i1=soc.cpu.minerva.gprf.mem._mem[8][5] q=$abc$109383$new_n18023_
 .subckt nand2_x0 i0=$abc$109383$new_n18023_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n18024_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][5] nq=$abc$109383$new_n18025_
 .subckt buf_x4 i=$abc$109383$new_n17871_ q=$abc$109383$new_n18026_
 .subckt buf_x4 i=$abc$109383$new_n17872_ q=$abc$109383$new_n18027_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18025_ nq=$abc$109383$new_n18028_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][5] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n18029_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][5] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n18029_
 .subckt nand2_x0 i0=$abc$109383$new_n18029_ i1=$abc$109383$new_n18028_ nq=$abc$109383$new_n18030_
 .subckt nand3_x0 i0=$abc$109383$new_n18030_ i1=$abc$109383$new_n18024_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n18031_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][5] nq=$abc$109383$new_n18032_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18032_ nq=$abc$109383$new_n18033_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][5] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n18034_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][5] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n18034_
 .subckt nand2_x0 i0=$abc$109383$new_n18034_ i1=$abc$109383$new_n18033_ nq=$abc$109383$new_n18035_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[14][5] i1=soc.cpu.minerva.gprf.mem._mem[10][5] q=$abc$109383$new_n18036_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[14][5] i1=soc.cpu.minerva.gprf.mem._mem[10][5] q=$abc$109383$new_n18036_
 .subckt nand2_x0 i0=$abc$109383$new_n18036_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n18037_
 .subckt nand3_x0 i0=$abc$109383$new_n18037_ i1=$abc$109383$new_n18035_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n18038_
 .subckt nand3_x0 i0=$abc$109383$new_n18038_ i1=$abc$109383$new_n18031_ i2=$abc$109383$new_n17692_ nq=$abc$109383$new_n18039_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[26][5] nq=$abc$109383$new_n18040_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[30][5] nq=$abc$109383$new_n18041_
-.subckt mx2_x2 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n18041_ i1=$abc$109383$new_n18040_ q=$abc$109383$new_n18042_
-.subckt mx2_x2 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n15997_ i1=$abc$109383$new_n15995_ q=$abc$109383$new_n18043_
-.subckt mx2_x2 cmd=$abc$109383$new_n17601_ i0=$abc$109383$new_n18043_ i1=$abc$109383$new_n18042_ q=$abc$109383$new_n18044_
+.subckt mux2_x1 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n18041_ i1=$abc$109383$new_n18040_ q=$abc$109383$new_n18042_
+.subckt mux2_x1 cmd=$abc$109383$new_n17730_ i0=$abc$109383$new_n15997_ i1=$abc$109383$new_n15995_ q=$abc$109383$new_n18043_
+.subckt mux2_x1 cmd=$abc$109383$new_n17601_ i0=$abc$109383$new_n18043_ i1=$abc$109383$new_n18042_ q=$abc$109383$new_n18044_
 .subckt nand2_x0 i0=$abc$109383$new_n18044_ i1=$abc$109383$new_n17716_ nq=$abc$109383$new_n18045_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[28][5] i1=soc.cpu.minerva.gprf.mem._mem[24][5] q=$abc$109383$new_n18046_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[28][5] i1=soc.cpu.minerva.gprf.mem._mem[24][5] q=$abc$109383$new_n18046_
 .subckt nand2_x0 i0=$abc$109383$new_n18046_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n18047_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[29][5] q=$abc$109383$new_n18048_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][5] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n18049_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[29][5] nq=$abc$109383$new_n18048_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][5] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n18049_
 .subckt nand2_x0 i0=$abc$109383$new_n18049_ i1=$abc$109383$new_n18048_ nq=$abc$109383$new_n18050_
 .subckt nand3_x0 i0=$abc$109383$new_n18050_ i1=$abc$109383$new_n18047_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18051_
 .subckt nand3_x0 i0=$abc$109383$new_n18051_ i1=$abc$109383$new_n18045_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n18052_
 .subckt nand3_x0 i0=$abc$109383$new_n18052_ i1=$abc$109383$new_n18039_ i2=$abc$109383$new_n17689_ nq=$abc$109383$new_n18053_
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][5] i1=soc.cpu.minerva.gprf.mem._mem[16][5] q=$abc$109383$new_n18054_
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][5] i1=soc.cpu.minerva.gprf.mem._mem[16][5] q=$abc$109383$new_n18054_
 .subckt nand2_x0 i0=$abc$109383$new_n18054_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n18055_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][5] nq=$abc$109383$new_n18056_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18056_ nq=$abc$109383$new_n18057_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][5] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n18058_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][5] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n18058_
 .subckt nand2_x0 i0=$abc$109383$new_n18058_ i1=$abc$109383$new_n18057_ nq=$abc$109383$new_n18059_
 .subckt nand3_x0 i0=$abc$109383$new_n18059_ i1=$abc$109383$new_n18055_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n18060_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][5] i1=soc.cpu.minerva.gprf.mem._mem[18][5] q=$abc$109383$new_n18061_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][5] i1=soc.cpu.minerva.gprf.mem._mem[18][5] q=$abc$109383$new_n18061_
 .subckt nand2_x0 i0=$abc$109383$new_n18061_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18062_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[23][5] q=$abc$109383$new_n18063_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][5] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n18064_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[23][5] nq=$abc$109383$new_n18063_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][5] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n18064_
 .subckt nand2_x0 i0=$abc$109383$new_n18064_ i1=$abc$109383$new_n18063_ nq=$abc$109383$new_n18065_
 .subckt nand3_x0 i0=$abc$109383$new_n18065_ i1=$abc$109383$new_n18062_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n18066_
 .subckt nand3_x0 i0=$abc$109383$new_n18066_ i1=$abc$109383$new_n18060_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n18067_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[4][5] i1=soc.cpu.minerva.gprf.mem._mem[0][5] q=$abc$109383$new_n18068_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[5][5] i1=soc.cpu.minerva.gprf.mem._mem[1][5] q=$abc$109383$new_n18069_
-.subckt mx2_x2 cmd=$abc$109383$new_n17618_ i0=$abc$109383$new_n18069_ i1=$abc$109383$new_n18068_ q=$abc$109383$new_n18070_
-.subckt mx2_x2 cmd=$abc$109383$new_n17554_ i0=soc.cpu.minerva.gprf.mem._mem[6][5] i1=soc.cpu.minerva.gprf.mem._mem[2][5] q=$abc$109383$new_n18071_
-.subckt mx2_x2 cmd=$abc$109383$new_n17554_ i0=soc.cpu.minerva.gprf.mem._mem[7][5] i1=soc.cpu.minerva.gprf.mem._mem[3][5] q=$abc$109383$new_n18072_
-.subckt mx2_x2 cmd=$abc$109383$new_n17618_ i0=$abc$109383$new_n18072_ i1=$abc$109383$new_n18071_ q=$abc$109383$new_n18073_
-.subckt mx2_x2 cmd=$abc$109383$new_n17672_ i0=$abc$109383$new_n18073_ i1=$abc$109383$new_n18070_ q=$abc$109383$new_n18074_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[4][5] i1=soc.cpu.minerva.gprf.mem._mem[0][5] q=$abc$109383$new_n18068_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[5][5] i1=soc.cpu.minerva.gprf.mem._mem[1][5] q=$abc$109383$new_n18069_
+.subckt mux2_x1 cmd=$abc$109383$new_n17618_ i0=$abc$109383$new_n18069_ i1=$abc$109383$new_n18068_ q=$abc$109383$new_n18070_
+.subckt mux2_x1 cmd=$abc$109383$new_n17554_ i0=soc.cpu.minerva.gprf.mem._mem[6][5] i1=soc.cpu.minerva.gprf.mem._mem[2][5] q=$abc$109383$new_n18071_
+.subckt mux2_x1 cmd=$abc$109383$new_n17554_ i0=soc.cpu.minerva.gprf.mem._mem[7][5] i1=soc.cpu.minerva.gprf.mem._mem[3][5] q=$abc$109383$new_n18072_
+.subckt mux2_x1 cmd=$abc$109383$new_n17618_ i0=$abc$109383$new_n18072_ i1=$abc$109383$new_n18071_ q=$abc$109383$new_n18073_
+.subckt mux2_x1 cmd=$abc$109383$new_n17672_ i0=$abc$109383$new_n18073_ i1=$abc$109383$new_n18070_ q=$abc$109383$new_n18074_
 .subckt nand2_x0 i0=$abc$109383$new_n18074_ i1=$abc$109383$new_n17692_ nq=$abc$109383$new_n18075_
 .subckt nand2_x0 i0=$abc$109383$new_n18075_ i1=$abc$109383$new_n18067_ nq=$abc$109383$new_n18076_
-.subckt ao22_x2 i0=$abc$109383$new_n17689_ i1=$abc$109383$new_n18076_ i2=$abc$109383$new_n18053_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[5]
-.subckt mx2_x2 cmd=$abc$109383$new_n17709_ i0=soc.cpu.minerva.gprf.mem._mem[20][6] i1=soc.cpu.minerva.gprf.mem._mem[16][6] q=$abc$109383$new_n18078_
+.subckt and21nor_x1 i0=$abc$109383$new_n17689_ i1=$abc$109383$new_n18076_ i2=$abc$109383$new_n18053_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[5]
+.subckt mux2_x1 cmd=$abc$109383$new_n17709_ i0=soc.cpu.minerva.gprf.mem._mem[20][6] i1=soc.cpu.minerva.gprf.mem._mem[16][6] q=$abc$109383$new_n18078_
 .subckt nand2_x0 i0=$abc$109383$new_n18078_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n18079_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][6] nq=$abc$109383$new_n18080_
-.subckt a3_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n18080_ q=$abc$109383$new_n18081_
+.subckt and3_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n18080_ q=$abc$109383$new_n18081_
 .subckt buf_x4 i=$abc$109383$new_n17629_ q=$abc$109383$new_n18082_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][6] nq=$abc$109383$new_n18083_
-.subckt oa22_x2 i0=$abc$109383$new_n18083_ i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17862_ q=$abc$109383$new_n18084_
-.subckt ao22_x2 i0=$abc$109383$new_n18084_ i1=$abc$109383$new_n18081_ i2=$abc$109383$new_n17544_ q=$abc$109383$new_n18085_
+.subckt or21nand_x1 i0=$abc$109383$new_n18083_ i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17862_ nq=$abc$109383$new_n18084_
+.subckt and21nor_x1 i0=$abc$109383$new_n18084_ i1=$abc$109383$new_n18081_ i2=$abc$109383$new_n17544_ nq=$abc$109383$new_n18085_
 .subckt nand2_x0 i0=$abc$109383$new_n18085_ i1=$abc$109383$new_n18079_ nq=$abc$109383$new_n18086_
-.subckt oa22_x2 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[23][6] q=$abc$109383$new_n18087_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][6] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17648_ q=$abc$109383$new_n18088_
-.subckt a2_x2 i0=$abc$109383$new_n18088_ i1=$abc$109383$new_n18087_ q=$abc$109383$new_n18089_
-.subckt mx2_x2 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[22][6] i1=soc.cpu.minerva.gprf.mem._mem[18][6] q=$abc$109383$new_n18090_
-.subckt oa22_x2 i0=$abc$109383$new_n17721_ i1=$abc$109383$new_n18090_ i2=$abc$109383$new_n17645_ q=$abc$109383$new_n18091_
-.subckt ao22_x2 i0=$abc$109383$new_n18091_ i1=$abc$109383$new_n18089_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n18092_
-.subckt a2_x2 i0=$abc$109383$new_n18092_ i1=$abc$109383$new_n18086_ q=$abc$109383$new_n18093_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[4][6] i1=soc.cpu.minerva.gprf.mem._mem[0][6] q=$abc$109383$new_n18094_
+.subckt or21nand_x1 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[23][6] nq=$abc$109383$new_n18087_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][6] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17648_ nq=$abc$109383$new_n18088_
+.subckt and2_x1 i0=$abc$109383$new_n18088_ i1=$abc$109383$new_n18087_ q=$abc$109383$new_n18089_
+.subckt mux2_x1 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[22][6] i1=soc.cpu.minerva.gprf.mem._mem[18][6] q=$abc$109383$new_n18090_
+.subckt or21nand_x1 i0=$abc$109383$new_n17721_ i1=$abc$109383$new_n18090_ i2=$abc$109383$new_n17645_ nq=$abc$109383$new_n18091_
+.subckt and21nor_x1 i0=$abc$109383$new_n18091_ i1=$abc$109383$new_n18089_ i2=$abc$109383$new_n17752_ nq=$abc$109383$new_n18092_
+.subckt and2_x1 i0=$abc$109383$new_n18092_ i1=$abc$109383$new_n18086_ q=$abc$109383$new_n18093_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[4][6] i1=soc.cpu.minerva.gprf.mem._mem[0][6] q=$abc$109383$new_n18094_
 .subckt nand2_x0 i0=$abc$109383$new_n18094_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n18095_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][6] nq=$abc$109383$new_n18096_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n18096_ nq=$abc$109383$new_n18097_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][6] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n18098_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][6] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n18098_
 .subckt nand2_x0 i0=$abc$109383$new_n18098_ i1=$abc$109383$new_n18097_ nq=$abc$109383$new_n18099_
 .subckt nand3_x0 i0=$abc$109383$new_n18099_ i1=$abc$109383$new_n18095_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n18100_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[6][6] i1=soc.cpu.minerva.gprf.mem._mem[2][6] q=$abc$109383$new_n18101_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[6][6] i1=soc.cpu.minerva.gprf.mem._mem[2][6] q=$abc$109383$new_n18101_
 .subckt nand2_x0 i0=$abc$109383$new_n18101_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n18102_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n16037_ nq=$abc$109383$new_n18103_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][6] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17627_ q=$abc$109383$new_n18104_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][6] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17627_ nq=$abc$109383$new_n18104_
 .subckt nand2_x0 i0=$abc$109383$new_n18104_ i1=$abc$109383$new_n18103_ nq=$abc$109383$new_n18105_
 .subckt nand3_x0 i0=$abc$109383$new_n18105_ i1=$abc$109383$new_n18102_ i2=$abc$109383$new_n17599_ nq=$abc$109383$new_n18106_
-.subckt a3_x2 i0=$abc$109383$new_n18106_ i1=$abc$109383$new_n18100_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n18107_
-.subckt ao22_x2 i0=$abc$109383$new_n18107_ i1=$abc$109383$new_n18093_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n18108_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[28][6] i1=soc.cpu.minerva.gprf.mem._mem[24][6] q=$abc$109383$new_n18109_
+.subckt and3_x1 i0=$abc$109383$new_n18106_ i1=$abc$109383$new_n18100_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n18107_
+.subckt and21nor_x1 i0=$abc$109383$new_n18107_ i1=$abc$109383$new_n18093_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n18108_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[28][6] i1=soc.cpu.minerva.gprf.mem._mem[24][6] q=$abc$109383$new_n18109_
 .subckt nand2_x0 i0=$abc$109383$new_n18109_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n18110_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][6] nq=$abc$109383$new_n18111_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n18111_ nq=$abc$109383$new_n18112_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][6] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n18113_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][6] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n18113_
 .subckt nand2_x0 i0=$abc$109383$new_n18113_ i1=$abc$109383$new_n18112_ nq=$abc$109383$new_n18114_
 .subckt nand3_x0 i0=$abc$109383$new_n18114_ i1=$abc$109383$new_n18110_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n18115_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[31][6] i1=soc.cpu.minerva.gprf.mem._mem[27][6] q=$abc$109383$new_n18116_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[30][6] i1=soc.cpu.minerva.gprf.mem._mem[26][6] q=$abc$109383$new_n18117_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18117_ i1=$abc$109383$new_n18116_ q=$abc$109383$new_n18118_
-.subckt ao22_x2 i0=$abc$109383$new_n18118_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n18119_
-.subckt a2_x2 i0=$abc$109383$new_n18119_ i1=$abc$109383$new_n18115_ q=$abc$109383$new_n18120_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[12][6] i1=soc.cpu.minerva.gprf.mem._mem[8][6] q=$abc$109383$new_n18121_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[31][6] i1=soc.cpu.minerva.gprf.mem._mem[27][6] q=$abc$109383$new_n18116_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[30][6] i1=soc.cpu.minerva.gprf.mem._mem[26][6] q=$abc$109383$new_n18117_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18117_ i1=$abc$109383$new_n18116_ q=$abc$109383$new_n18118_
+.subckt and21nor_x1 i0=$abc$109383$new_n18118_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n18119_
+.subckt and2_x1 i0=$abc$109383$new_n18119_ i1=$abc$109383$new_n18115_ q=$abc$109383$new_n18120_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[12][6] i1=soc.cpu.minerva.gprf.mem._mem[8][6] q=$abc$109383$new_n18121_
 .subckt nand2_x0 i0=$abc$109383$new_n18121_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n18122_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][6] nq=$abc$109383$new_n18123_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n18123_ nq=$abc$109383$new_n18124_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][6] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n18125_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][6] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n18125_
 .subckt nand2_x0 i0=$abc$109383$new_n18125_ i1=$abc$109383$new_n18124_ nq=$abc$109383$new_n18126_
 .subckt nand3_x0 i0=$abc$109383$new_n18126_ i1=$abc$109383$new_n18122_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n18127_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[14][6] i1=soc.cpu.minerva.gprf.mem._mem[10][6] q=$abc$109383$new_n18128_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[14][6] i1=soc.cpu.minerva.gprf.mem._mem[10][6] q=$abc$109383$new_n18128_
 .subckt nand2_x0 i0=$abc$109383$new_n18128_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n18129_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][6] nq=$abc$109383$new_n18130_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n18130_ nq=$abc$109383$new_n18131_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][6] i1=$abc$109383$new_n17555_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n18132_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][6] i1=$abc$109383$new_n17555_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n18132_
 .subckt nand2_x0 i0=$abc$109383$new_n18132_ i1=$abc$109383$new_n18131_ nq=$abc$109383$new_n18133_
 .subckt nand3_x0 i0=$abc$109383$new_n18133_ i1=$abc$109383$new_n18129_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n18134_
-.subckt a3_x2 i0=$abc$109383$new_n18134_ i1=$abc$109383$new_n18127_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18135_
-.subckt ao22_x2 i0=$abc$109383$new_n18135_ i1=$abc$109383$new_n18120_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n18136_
-.subckt o2_x2 i0=$abc$109383$new_n18136_ i1=$abc$109383$new_n18108_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[6]
+.subckt and3_x1 i0=$abc$109383$new_n18134_ i1=$abc$109383$new_n18127_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18135_
+.subckt and21nor_x1 i0=$abc$109383$new_n18135_ i1=$abc$109383$new_n18120_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n18136_
+.subckt or2_x1 i0=$abc$109383$new_n18136_ i1=$abc$109383$new_n18108_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[6]
 .subckt buf_x4 i=$abc$109383$new_n17552_ q=$abc$109383$new_n18138_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[22][7] i1=soc.cpu.minerva.gprf.mem._mem[18][7] q=$abc$109383$new_n18139_
-.subckt a2_x2 i0=$abc$109383$new_n18139_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18140_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[22][7] i1=soc.cpu.minerva.gprf.mem._mem[18][7] q=$abc$109383$new_n18139_
+.subckt and2_x1 i0=$abc$109383$new_n18139_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18140_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][7] nq=$abc$109383$new_n18141_
 .subckt nand3_x0 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=$abc$109383$new_n18141_ nq=$abc$109383$new_n18142_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][7] i1=$abc$109383$new_n17554_ i2=$abc$109383$new_n17655_ q=$abc$109383$new_n18143_
-.subckt a2_x2 i0=$abc$109383$new_n18143_ i1=$abc$109383$new_n18142_ q=$abc$109383$new_n18144_
-.subckt ao22_x2 i0=$abc$109383$new_n18144_ i1=$abc$109383$new_n18140_ i2=$abc$109383$new_n17598_ q=$abc$109383$new_n18145_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=$abc$109383$new_n16117_ i1=$abc$109383$new_n16116_ q=$abc$109383$new_n18146_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][7] i1=$abc$109383$new_n17554_ i2=$abc$109383$new_n17655_ nq=$abc$109383$new_n18143_
+.subckt and2_x1 i0=$abc$109383$new_n18143_ i1=$abc$109383$new_n18142_ q=$abc$109383$new_n18144_
+.subckt and21nor_x1 i0=$abc$109383$new_n18144_ i1=$abc$109383$new_n18140_ i2=$abc$109383$new_n17598_ nq=$abc$109383$new_n18145_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=$abc$109383$new_n16117_ i1=$abc$109383$new_n16116_ q=$abc$109383$new_n18146_
 .subckt nand2_x0 i0=$abc$109383$new_n18146_ i1=$abc$109383$new_n17972_ nq=$abc$109383$new_n18147_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[30][7] i1=soc.cpu.minerva.gprf.mem._mem[26][7] q=$abc$109383$new_n18148_
-.subckt ao22_x2 i0=$abc$109383$new_n18148_ i1=$abc$109383$new_n17648_ i2=$abc$109383$new_n17538_ q=$abc$109383$new_n18149_
-.subckt a2_x2 i0=$abc$109383$new_n18149_ i1=$abc$109383$new_n18147_ q=$abc$109383$new_n18150_
-.subckt ao22_x2 i0=$abc$109383$new_n18150_ i1=$abc$109383$new_n18145_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n18151_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[30][7] i1=soc.cpu.minerva.gprf.mem._mem[26][7] q=$abc$109383$new_n18148_
+.subckt and21nor_x1 i0=$abc$109383$new_n18148_ i1=$abc$109383$new_n17648_ i2=$abc$109383$new_n17538_ nq=$abc$109383$new_n18149_
+.subckt and2_x1 i0=$abc$109383$new_n18149_ i1=$abc$109383$new_n18147_ q=$abc$109383$new_n18150_
+.subckt and21nor_x1 i0=$abc$109383$new_n18150_ i1=$abc$109383$new_n18145_ i2=$abc$109383$new_n17752_ nq=$abc$109383$new_n18151_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[15][7] nq=$abc$109383$new_n18152_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[14][7] nq=$abc$109383$new_n18153_
-.subckt mx2_x2 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18153_ i1=$abc$109383$new_n18152_ q=$abc$109383$new_n18154_
+.subckt mux2_x1 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18153_ i1=$abc$109383$new_n18152_ q=$abc$109383$new_n18154_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][7] nq=$abc$109383$new_n18155_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][7] nq=$abc$109383$new_n18156_
-.subckt mx2_x2 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18156_ i1=$abc$109383$new_n18155_ q=$abc$109383$new_n18157_
-.subckt mx2_x2 cmd=$abc$109383$new_n17537_ i0=$abc$109383$new_n18157_ i1=$abc$109383$new_n18154_ q=$abc$109383$new_n18158_
+.subckt mux2_x1 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18156_ i1=$abc$109383$new_n18155_ q=$abc$109383$new_n18157_
+.subckt mux2_x1 cmd=$abc$109383$new_n17537_ i0=$abc$109383$new_n18157_ i1=$abc$109383$new_n18154_ q=$abc$109383$new_n18158_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][7] nq=$abc$109383$new_n18159_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[10][7] nq=$abc$109383$new_n18160_
-.subckt mx2_x2 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18160_ i1=$abc$109383$new_n18159_ q=$abc$109383$new_n18161_
+.subckt mux2_x1 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18160_ i1=$abc$109383$new_n18159_ q=$abc$109383$new_n18161_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][7] nq=$abc$109383$new_n18162_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][7] nq=$abc$109383$new_n18163_
-.subckt mx2_x2 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18163_ i1=$abc$109383$new_n18162_ q=$abc$109383$new_n18164_
-.subckt mx2_x2 cmd=$abc$109383$new_n17537_ i0=$abc$109383$new_n18164_ i1=$abc$109383$new_n18161_ q=$abc$109383$new_n18165_
-.subckt mx2_x2 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18165_ i1=$abc$109383$new_n18158_ q=$abc$109383$new_n18166_
+.subckt mux2_x1 cmd=$abc$109383$new_n17568_ i0=$abc$109383$new_n18163_ i1=$abc$109383$new_n18162_ q=$abc$109383$new_n18164_
+.subckt mux2_x1 cmd=$abc$109383$new_n17537_ i0=$abc$109383$new_n18164_ i1=$abc$109383$new_n18161_ q=$abc$109383$new_n18165_
+.subckt mux2_x1 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18165_ i1=$abc$109383$new_n18158_ q=$abc$109383$new_n18166_
 .subckt nor2_x0 i0=$abc$109383$new_n18166_ i1=$abc$109383$new_n17960_ nq=$abc$109383$new_n18167_
-.subckt ao22_x2 i0=$abc$109383$new_n18167_ i1=$abc$109383$new_n18151_ i2=$abc$109383$new_n17898_ q=$abc$109383$new_n18168_
+.subckt and21nor_x1 i0=$abc$109383$new_n18167_ i1=$abc$109383$new_n18151_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n18168_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][7] nq=$abc$109383$new_n18169_
 .subckt buf_x4 i=$abc$109383$new_n15553_ q=$abc$109383$new_n18170_
 .subckt nand3_x0 i0=$abc$109383$new_n18170_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[23] nq=$abc$109383$new_n18171_
-.subckt oa22_x2 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=$abc$109383$new_n15337_ q=$abc$109383$new_n18172_
-.subckt oa22_x2 i0=$abc$109383$new_n18172_ i1=$abc$109383$new_n18171_ i2=$abc$109383$new_n18169_ q=$abc$109383$new_n18173_
+.subckt or21nand_x1 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=$abc$109383$new_n15337_ nq=$abc$109383$new_n18172_
+.subckt or21nand_x1 i0=$abc$109383$new_n18172_ i1=$abc$109383$new_n18171_ i2=$abc$109383$new_n18169_ nq=$abc$109383$new_n18173_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][7] nq=$abc$109383$new_n18174_
-.subckt ao22_x2 i0=$abc$109383$new_n18174_ i1=$abc$109383$new_n17538_ i2=$abc$109383$new_n17585_ q=$abc$109383$new_n18175_
+.subckt and21nor_x1 i0=$abc$109383$new_n18174_ i1=$abc$109383$new_n17538_ i2=$abc$109383$new_n17585_ nq=$abc$109383$new_n18175_
 .subckt nand2_x0 i0=$abc$109383$new_n18175_ i1=$abc$109383$new_n18173_ nq=$abc$109383$new_n18176_
-.subckt a3_x2 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[23] q=$abc$109383$new_n18177_
-.subckt ao22_x2 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n15384_ q=$abc$109383$new_n18178_
-.subckt ao22_x2 i0=$abc$109383$new_n18178_ i1=$abc$109383$new_n18177_ i2=soc.cpu.minerva.gprf.mem._mem[24][7] q=$abc$109383$new_n18179_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[16][7] i1=$abc$109383$new_n17598_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n18180_
-.subckt ao22_x2 i0=$abc$109383$new_n18180_ i1=$abc$109383$new_n18179_ i2=$abc$109383$new_n17698_ q=$abc$109383$new_n18181_
+.subckt and3_x1 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[23] q=$abc$109383$new_n18177_
+.subckt and21nor_x1 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n15384_ nq=$abc$109383$new_n18178_
+.subckt and21nor_x1 i0=$abc$109383$new_n18178_ i1=$abc$109383$new_n18177_ i2=soc.cpu.minerva.gprf.mem._mem[24][7] nq=$abc$109383$new_n18179_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[16][7] i1=$abc$109383$new_n17598_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n18180_
+.subckt and21nor_x1 i0=$abc$109383$new_n18180_ i1=$abc$109383$new_n18179_ i2=$abc$109383$new_n17698_ nq=$abc$109383$new_n18181_
 .subckt nand2_x0 i0=$abc$109383$new_n18181_ i1=$abc$109383$new_n18176_ nq=$abc$109383$new_n18182_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][7] nq=$abc$109383$new_n18183_
-.subckt oa22_x2 i0=$abc$109383$new_n18172_ i1=$abc$109383$new_n18171_ i2=$abc$109383$new_n18183_ q=$abc$109383$new_n18184_
+.subckt or21nand_x1 i0=$abc$109383$new_n18172_ i1=$abc$109383$new_n18171_ i2=$abc$109383$new_n18183_ nq=$abc$109383$new_n18184_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][7] nq=$abc$109383$new_n18185_
-.subckt ao22_x2 i0=$abc$109383$new_n18185_ i1=$abc$109383$new_n17538_ i2=$abc$109383$new_n17585_ q=$abc$109383$new_n18186_
+.subckt and21nor_x1 i0=$abc$109383$new_n18185_ i1=$abc$109383$new_n17538_ i2=$abc$109383$new_n17585_ nq=$abc$109383$new_n18186_
 .subckt nand2_x0 i0=$abc$109383$new_n18186_ i1=$abc$109383$new_n18184_ nq=$abc$109383$new_n18187_
-.subckt ao22_x2 i0=$abc$109383$new_n18178_ i1=$abc$109383$new_n18177_ i2=soc.cpu.minerva.gprf.mem._mem[28][7] q=$abc$109383$new_n18188_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[20][7] i1=$abc$109383$new_n17597_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n18189_
-.subckt ao22_x2 i0=$abc$109383$new_n18189_ i1=$abc$109383$new_n18188_ i2=$abc$109383$new_n17935_ q=$abc$109383$new_n18190_
+.subckt and21nor_x1 i0=$abc$109383$new_n18178_ i1=$abc$109383$new_n18177_ i2=soc.cpu.minerva.gprf.mem._mem[28][7] nq=$abc$109383$new_n18188_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[20][7] i1=$abc$109383$new_n17597_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n18189_
+.subckt and21nor_x1 i0=$abc$109383$new_n18189_ i1=$abc$109383$new_n18188_ i2=$abc$109383$new_n17935_ nq=$abc$109383$new_n18190_
 .subckt nand2_x0 i0=$abc$109383$new_n18190_ i1=$abc$109383$new_n18187_ nq=$abc$109383$new_n18191_
 .subckt nand2_x0 i0=$abc$109383$new_n18191_ i1=$abc$109383$new_n18182_ nq=$abc$109383$new_n18192_
-.subckt mx2_x2 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[12][7] i1=soc.cpu.minerva.gprf.mem._mem[8][7] q=$abc$109383$new_n18193_
+.subckt mux2_x1 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[12][7] i1=soc.cpu.minerva.gprf.mem._mem[8][7] q=$abc$109383$new_n18193_
 .subckt nand2_x0 i0=$abc$109383$new_n18193_ i1=$abc$109383$new_n17947_ nq=$abc$109383$new_n18194_
-.subckt oa22_x2 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=soc.cpu.minerva.gprf.mem._mem[13][7] q=$abc$109383$new_n18195_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][7] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n18196_
+.subckt or21nand_x1 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=soc.cpu.minerva.gprf.mem._mem[13][7] nq=$abc$109383$new_n18195_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][7] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n18196_
 .subckt nand2_x0 i0=$abc$109383$new_n18196_ i1=$abc$109383$new_n18195_ nq=$abc$109383$new_n18197_
 .subckt nand3_x0 i0=$abc$109383$new_n18197_ i1=$abc$109383$new_n18194_ i2=$abc$109383$new_n17538_ nq=$abc$109383$new_n18198_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[4][7] i1=soc.cpu.minerva.gprf.mem._mem[0][7] q=$abc$109383$new_n18199_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[4][7] i1=soc.cpu.minerva.gprf.mem._mem[0][7] q=$abc$109383$new_n18199_
 .subckt nand2_x0 i0=$abc$109383$new_n18199_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n18200_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][7] nq=$abc$109383$new_n18201_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n18201_ nq=$abc$109383$new_n18202_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][7] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n18203_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][7] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n18203_
 .subckt nand2_x0 i0=$abc$109383$new_n18203_ i1=$abc$109383$new_n18202_ nq=$abc$109383$new_n18204_
 .subckt nand3_x0 i0=$abc$109383$new_n18204_ i1=$abc$109383$new_n18200_ i2=$abc$109383$new_n17598_ nq=$abc$109383$new_n18205_
-.subckt a2_x2 i0=$abc$109383$new_n18205_ i1=$abc$109383$new_n18198_ q=$abc$109383$new_n18206_
-.subckt mx2_x2 cmd=$abc$109383$new_n17960_ i0=$abc$109383$new_n18206_ i1=$abc$109383$new_n18192_ q=$abc$109383$new_n18207_
-.subckt oa22_x2 i0=$abc$109383$new_n17693_ i1=$abc$109383$new_n18207_ i2=$abc$109383$new_n18168_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[7]
+.subckt and2_x1 i0=$abc$109383$new_n18205_ i1=$abc$109383$new_n18198_ q=$abc$109383$new_n18206_
+.subckt mux2_x1 cmd=$abc$109383$new_n17960_ i0=$abc$109383$new_n18206_ i1=$abc$109383$new_n18192_ q=$abc$109383$new_n18207_
+.subckt or21nand_x1 i0=$abc$109383$new_n17693_ i1=$abc$109383$new_n18207_ i2=$abc$109383$new_n18168_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[7]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[13][8] nq=$abc$109383$new_n18209_
 .subckt buf_x4 i=$abc$109383$new_n17653_ q=$abc$109383$new_n18210_
-.subckt oa22_x2 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=$abc$109383$new_n18209_ q=$abc$109383$new_n18211_
+.subckt or21nand_x1 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=$abc$109383$new_n18209_ nq=$abc$109383$new_n18211_
 .subckt buf_x4 i=$abc$109383$new_n17648_ q=$abc$109383$new_n18212_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[12][8] nq=$abc$109383$new_n18213_
-.subckt ao22_x2 i0=$abc$109383$new_n18213_ i1=$abc$109383$new_n18212_ i2=$abc$109383$new_n17935_ q=$abc$109383$new_n18214_
+.subckt and21nor_x1 i0=$abc$109383$new_n18213_ i1=$abc$109383$new_n18212_ i2=$abc$109383$new_n17935_ nq=$abc$109383$new_n18214_
 .subckt nand2_x0 i0=$abc$109383$new_n18214_ i1=$abc$109383$new_n18211_ nq=$abc$109383$new_n18215_
-.subckt a3_x2 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[20] q=$abc$109383$new_n18216_
+.subckt and3_x1 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n17843_ i2=soc.cpu.minerva.fetch.ibus_rdata[20] q=$abc$109383$new_n18216_
 .subckt buf_x4 i=$abc$109383$new_n15425_ q=$abc$109383$new_n18217_
-.subckt ao22_x2 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n18217_ q=$abc$109383$new_n18218_
-.subckt ao22_x2 i0=$abc$109383$new_n18218_ i1=$abc$109383$new_n18216_ i2=soc.cpu.minerva.gprf.mem._mem[9][8] q=$abc$109383$new_n18219_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[8][8] i1=$abc$109383$new_n17600_ i2=$abc$109383$new_n17641_ q=$abc$109383$new_n18220_
-.subckt ao22_x2 i0=$abc$109383$new_n18220_ i1=$abc$109383$new_n18219_ i2=$abc$109383$new_n17646_ q=$abc$109383$new_n18221_
+.subckt and21nor_x1 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n18217_ nq=$abc$109383$new_n18218_
+.subckt and21nor_x1 i0=$abc$109383$new_n18218_ i1=$abc$109383$new_n18216_ i2=soc.cpu.minerva.gprf.mem._mem[9][8] nq=$abc$109383$new_n18219_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[8][8] i1=$abc$109383$new_n17600_ i2=$abc$109383$new_n17641_ nq=$abc$109383$new_n18220_
+.subckt and21nor_x1 i0=$abc$109383$new_n18220_ i1=$abc$109383$new_n18219_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n18221_
 .subckt nand2_x0 i0=$abc$109383$new_n18221_ i1=$abc$109383$new_n18215_ nq=$abc$109383$new_n18222_
 .subckt buf_x4 i=$abc$109383$new_n17627_ q=$abc$109383$new_n18223_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][8] nq=$abc$109383$new_n18224_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[15][8] nq=$abc$109383$new_n18225_
-.subckt mx2_x2 cmd=$abc$109383$new_n17588_ i0=$abc$109383$new_n18225_ i1=$abc$109383$new_n18224_ q=$abc$109383$new_n18226_
+.subckt mux2_x1 cmd=$abc$109383$new_n17588_ i0=$abc$109383$new_n18225_ i1=$abc$109383$new_n18224_ q=$abc$109383$new_n18226_
 .subckt nand2_x0 i0=$abc$109383$new_n18226_ i1=$abc$109383$new_n18223_ nq=$abc$109383$new_n18227_
 .subckt buf_x4 i=$abc$109383$new_n17714_ q=$abc$109383$new_n18228_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[14][8] i1=soc.cpu.minerva.gprf.mem._mem[10][8] q=$abc$109383$new_n18229_
-.subckt ao22_x2 i0=$abc$109383$new_n18212_ i1=$abc$109383$new_n18229_ i2=$abc$109383$new_n18228_ q=$abc$109383$new_n18230_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[14][8] i1=soc.cpu.minerva.gprf.mem._mem[10][8] q=$abc$109383$new_n18229_
+.subckt and21nor_x1 i0=$abc$109383$new_n18212_ i1=$abc$109383$new_n18229_ i2=$abc$109383$new_n18228_ nq=$abc$109383$new_n18230_
 .subckt nand2_x0 i0=$abc$109383$new_n18230_ i1=$abc$109383$new_n18227_ nq=$abc$109383$new_n18231_
-.subckt oa22_x2 i0=$abc$109383$new_n18231_ i1=$abc$109383$new_n18222_ i2=$abc$109383$new_n17640_ q=$abc$109383$new_n18232_
+.subckt or21nand_x1 i0=$abc$109383$new_n18231_ i1=$abc$109383$new_n18222_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n18232_
 .subckt buf_x4 i=$abc$109383$new_n17534_ q=$abc$109383$new_n18233_
 .subckt buf_x4 i=$abc$109383$new_n18233_ q=$abc$109383$new_n18234_
-.subckt mx2_x2 cmd=$abc$109383$new_n17587_ i0=soc.cpu.minerva.gprf.mem._mem[30][8] i1=soc.cpu.minerva.gprf.mem._mem[26][8] q=$abc$109383$new_n18235_
-.subckt mx2_x2 cmd=$abc$109383$new_n17587_ i0=soc.cpu.minerva.gprf.mem._mem[31][8] i1=soc.cpu.minerva.gprf.mem._mem[27][8] q=$abc$109383$new_n18236_
-.subckt mx2_x2 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n18236_ i1=$abc$109383$new_n18235_ q=$abc$109383$new_n18237_
+.subckt mux2_x1 cmd=$abc$109383$new_n17587_ i0=soc.cpu.minerva.gprf.mem._mem[30][8] i1=soc.cpu.minerva.gprf.mem._mem[26][8] q=$abc$109383$new_n18235_
+.subckt mux2_x1 cmd=$abc$109383$new_n17587_ i0=soc.cpu.minerva.gprf.mem._mem[31][8] i1=soc.cpu.minerva.gprf.mem._mem[27][8] q=$abc$109383$new_n18236_
+.subckt mux2_x1 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n18236_ i1=$abc$109383$new_n18235_ q=$abc$109383$new_n18237_
 .subckt nand2_x0 i0=$abc$109383$new_n18237_ i1=$abc$109383$new_n17579_ nq=$abc$109383$new_n18238_
-.subckt mx2_x2 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[28][8] i1=soc.cpu.minerva.gprf.mem._mem[24][8] q=$abc$109383$new_n18239_
+.subckt mux2_x1 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[28][8] i1=soc.cpu.minerva.gprf.mem._mem[24][8] q=$abc$109383$new_n18239_
 .subckt nand2_x0 i0=$abc$109383$new_n18239_ i1=$abc$109383$new_n17947_ nq=$abc$109383$new_n18240_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][8] nq=$abc$109383$new_n18241_
 .subckt nand3_x0 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=$abc$109383$new_n18241_ nq=$abc$109383$new_n18242_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][8] i1=$abc$109383$new_n17766_ i2=$abc$109383$new_n17648_ q=$abc$109383$new_n18243_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][8] i1=$abc$109383$new_n17766_ i2=$abc$109383$new_n17648_ nq=$abc$109383$new_n18243_
 .subckt nand2_x0 i0=$abc$109383$new_n18243_ i1=$abc$109383$new_n18242_ nq=$abc$109383$new_n18244_
-.subckt oa22_x2 i0=$abc$109383$new_n18244_ i1=$abc$109383$new_n18240_ i2=$abc$109383$new_n18228_ q=$abc$109383$new_n18245_
-.subckt oa22_x2 i0=$abc$109383$new_n18245_ i1=$abc$109383$new_n18238_ i2=$abc$109383$new_n18234_ q=$abc$109383$new_n18246_
-.subckt oa22_x2 i0=$abc$109383$new_n18246_ i1=$abc$109383$new_n18232_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n18247_
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][8] i1=soc.cpu.minerva.gprf.mem._mem[16][8] q=$abc$109383$new_n18248_
+.subckt or21nand_x1 i0=$abc$109383$new_n18244_ i1=$abc$109383$new_n18240_ i2=$abc$109383$new_n18228_ nq=$abc$109383$new_n18245_
+.subckt or21nand_x1 i0=$abc$109383$new_n18245_ i1=$abc$109383$new_n18238_ i2=$abc$109383$new_n18234_ nq=$abc$109383$new_n18246_
+.subckt or21nand_x1 i0=$abc$109383$new_n18246_ i1=$abc$109383$new_n18232_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n18247_
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][8] i1=soc.cpu.minerva.gprf.mem._mem[16][8] q=$abc$109383$new_n18248_
 .subckt nand2_x0 i0=$abc$109383$new_n18248_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n18249_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][8] nq=$abc$109383$new_n18250_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18250_ nq=$abc$109383$new_n18251_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][8] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n18252_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][8] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n18252_
 .subckt nand2_x0 i0=$abc$109383$new_n18252_ i1=$abc$109383$new_n18251_ nq=$abc$109383$new_n18253_
 .subckt nand3_x0 i0=$abc$109383$new_n18253_ i1=$abc$109383$new_n18249_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n18254_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][8] i1=soc.cpu.minerva.gprf.mem._mem[18][8] q=$abc$109383$new_n18255_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][8] i1=soc.cpu.minerva.gprf.mem._mem[18][8] q=$abc$109383$new_n18255_
 .subckt nand2_x0 i0=$abc$109383$new_n18255_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18256_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][8] nq=$abc$109383$new_n18257_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n18257_ nq=$abc$109383$new_n18258_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][8] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n18259_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][8] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n18259_
 .subckt nand2_x0 i0=$abc$109383$new_n18259_ i1=$abc$109383$new_n18258_ nq=$abc$109383$new_n18260_
 .subckt nand3_x0 i0=$abc$109383$new_n18260_ i1=$abc$109383$new_n18256_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n18261_
 .subckt nand3_x0 i0=$abc$109383$new_n18261_ i1=$abc$109383$new_n18254_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n18262_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[6][8] i1=soc.cpu.minerva.gprf.mem._mem[2][8] q=$abc$109383$new_n18263_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[6][8] i1=soc.cpu.minerva.gprf.mem._mem[2][8] q=$abc$109383$new_n18263_
 .subckt nand2_x0 i0=$abc$109383$new_n18263_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n18264_
-.subckt oa22_x2 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[7][8] q=$abc$109383$new_n18265_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][8] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n18266_
+.subckt or21nand_x1 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[7][8] nq=$abc$109383$new_n18265_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][8] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n18266_
 .subckt nand2_x0 i0=$abc$109383$new_n18266_ i1=$abc$109383$new_n18265_ nq=$abc$109383$new_n18267_
 .subckt nand3_x0 i0=$abc$109383$new_n18267_ i1=$abc$109383$new_n18264_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n18268_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[4][8] i1=soc.cpu.minerva.gprf.mem._mem[0][8] q=$abc$109383$new_n18269_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[4][8] i1=soc.cpu.minerva.gprf.mem._mem[0][8] q=$abc$109383$new_n18269_
 .subckt nand2_x0 i0=$abc$109383$new_n18269_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18270_
-.subckt oa22_x2 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[5][8] q=$abc$109383$new_n18271_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][8] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n18272_
+.subckt or21nand_x1 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[5][8] nq=$abc$109383$new_n18271_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][8] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n18272_
 .subckt nand2_x0 i0=$abc$109383$new_n18272_ i1=$abc$109383$new_n18271_ nq=$abc$109383$new_n18273_
 .subckt nand3_x0 i0=$abc$109383$new_n18273_ i1=$abc$109383$new_n18270_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18274_
 .subckt nand3_x0 i0=$abc$109383$new_n18274_ i1=$abc$109383$new_n18268_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n18275_
-.subckt oa22_x2 i0=$abc$109383$new_n18275_ i1=$abc$109383$new_n18262_ i2=$abc$109383$new_n17689_ q=$abc$109383$new_n18276_
+.subckt or21nand_x1 i0=$abc$109383$new_n18275_ i1=$abc$109383$new_n18262_ i2=$abc$109383$new_n17689_ nq=$abc$109383$new_n18276_
 .subckt nand2_x0 i0=$abc$109383$new_n18276_ i1=$abc$109383$new_n18247_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[8]
-.subckt mx2_x2 cmd=$abc$109383$new_n17730_ i0=soc.cpu.minerva.gprf.mem._mem[20][9] i1=soc.cpu.minerva.gprf.mem._mem[16][9] q=$abc$109383$new_n18278_
+.subckt mux2_x1 cmd=$abc$109383$new_n17730_ i0=soc.cpu.minerva.gprf.mem._mem[20][9] i1=soc.cpu.minerva.gprf.mem._mem[16][9] q=$abc$109383$new_n18278_
 .subckt nand2_x0 i0=$abc$109383$new_n18278_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n18279_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][9] nq=$abc$109383$new_n18280_
-.subckt ao22_x2 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n18280_ q=$abc$109383$new_n18281_
+.subckt and21nor_x1 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n18280_ nq=$abc$109383$new_n18281_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][9] nq=$abc$109383$new_n18282_
-.subckt oa22_x2 i0=$abc$109383$new_n18282_ i1=$abc$109383$new_n17724_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n18283_
-.subckt ao22_x2 i0=$abc$109383$new_n18283_ i1=$abc$109383$new_n18281_ i2=$abc$109383$new_n17544_ q=$abc$109383$new_n18284_
+.subckt or21nand_x1 i0=$abc$109383$new_n18282_ i1=$abc$109383$new_n17724_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n18283_
+.subckt and21nor_x1 i0=$abc$109383$new_n18283_ i1=$abc$109383$new_n18281_ i2=$abc$109383$new_n17544_ nq=$abc$109383$new_n18284_
 .subckt nand2_x0 i0=$abc$109383$new_n18284_ i1=$abc$109383$new_n18279_ nq=$abc$109383$new_n18285_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][9] nq=$abc$109383$new_n18286_
 .subckt nand3_x0 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n18286_ nq=$abc$109383$new_n18287_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][9] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n18003_ q=$abc$109383$new_n18288_
-.subckt a2_x2 i0=$abc$109383$new_n18288_ i1=$abc$109383$new_n18287_ q=$abc$109383$new_n18289_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[22][9] i1=soc.cpu.minerva.gprf.mem._mem[18][9] q=$abc$109383$new_n18290_
-.subckt oa22_x2 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n18290_ i2=$abc$109383$new_n17543_ q=$abc$109383$new_n18291_
-.subckt ao22_x2 i0=$abc$109383$new_n18291_ i1=$abc$109383$new_n18289_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n18292_
-.subckt a2_x2 i0=$abc$109383$new_n18292_ i1=$abc$109383$new_n18285_ q=$abc$109383$new_n18293_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[4][9] i1=soc.cpu.minerva.gprf.mem._mem[0][9] q=$abc$109383$new_n18294_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][9] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n18003_ nq=$abc$109383$new_n18288_
+.subckt and2_x1 i0=$abc$109383$new_n18288_ i1=$abc$109383$new_n18287_ q=$abc$109383$new_n18289_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[22][9] i1=soc.cpu.minerva.gprf.mem._mem[18][9] q=$abc$109383$new_n18290_
+.subckt or21nand_x1 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n18290_ i2=$abc$109383$new_n17543_ nq=$abc$109383$new_n18291_
+.subckt and21nor_x1 i0=$abc$109383$new_n18291_ i1=$abc$109383$new_n18289_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n18292_
+.subckt and2_x1 i0=$abc$109383$new_n18292_ i1=$abc$109383$new_n18285_ q=$abc$109383$new_n18293_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[4][9] i1=soc.cpu.minerva.gprf.mem._mem[0][9] q=$abc$109383$new_n18294_
 .subckt nand2_x0 i0=$abc$109383$new_n18294_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n18295_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][9] nq=$abc$109383$new_n18296_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n18296_ nq=$abc$109383$new_n18297_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][9] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n18298_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][9] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n18298_
 .subckt nand2_x0 i0=$abc$109383$new_n18298_ i1=$abc$109383$new_n18297_ nq=$abc$109383$new_n18299_
 .subckt nand3_x0 i0=$abc$109383$new_n18299_ i1=$abc$109383$new_n18295_ i2=$abc$109383$new_n17672_ nq=$abc$109383$new_n18300_
-.subckt mx2_x2 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[7][9] i1=soc.cpu.minerva.gprf.mem._mem[3][9] q=$abc$109383$new_n18301_
-.subckt mx2_x2 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[6][9] i1=soc.cpu.minerva.gprf.mem._mem[2][9] q=$abc$109383$new_n18302_
-.subckt mx2_x2 cmd=$abc$109383$new_n17806_ i0=$abc$109383$new_n18302_ i1=$abc$109383$new_n18301_ q=$abc$109383$new_n18303_
-.subckt ao22_x2 i0=$abc$109383$new_n18303_ i1=$abc$109383$new_n17544_ i2=$abc$109383$new_n18233_ q=$abc$109383$new_n18304_
-.subckt a2_x2 i0=$abc$109383$new_n18304_ i1=$abc$109383$new_n18300_ q=$abc$109383$new_n18305_
-.subckt ao22_x2 i0=$abc$109383$new_n18305_ i1=$abc$109383$new_n18293_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n18306_
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[28][9] i1=soc.cpu.minerva.gprf.mem._mem[24][9] q=$abc$109383$new_n18307_
+.subckt mux2_x1 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[7][9] i1=soc.cpu.minerva.gprf.mem._mem[3][9] q=$abc$109383$new_n18301_
+.subckt mux2_x1 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[6][9] i1=soc.cpu.minerva.gprf.mem._mem[2][9] q=$abc$109383$new_n18302_
+.subckt mux2_x1 cmd=$abc$109383$new_n17806_ i0=$abc$109383$new_n18302_ i1=$abc$109383$new_n18301_ q=$abc$109383$new_n18303_
+.subckt and21nor_x1 i0=$abc$109383$new_n18303_ i1=$abc$109383$new_n17544_ i2=$abc$109383$new_n18233_ nq=$abc$109383$new_n18304_
+.subckt and2_x1 i0=$abc$109383$new_n18304_ i1=$abc$109383$new_n18300_ q=$abc$109383$new_n18305_
+.subckt and21nor_x1 i0=$abc$109383$new_n18305_ i1=$abc$109383$new_n18293_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n18306_
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[28][9] i1=soc.cpu.minerva.gprf.mem._mem[24][9] q=$abc$109383$new_n18307_
 .subckt nand2_x0 i0=$abc$109383$new_n18307_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n18308_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][9] nq=$abc$109383$new_n18309_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n18309_ nq=$abc$109383$new_n18310_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][9] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ q=$abc$109383$new_n18311_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][9] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ nq=$abc$109383$new_n18311_
 .subckt nand2_x0 i0=$abc$109383$new_n18311_ i1=$abc$109383$new_n18310_ nq=$abc$109383$new_n18312_
 .subckt nand3_x0 i0=$abc$109383$new_n18312_ i1=$abc$109383$new_n18308_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n18313_
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=$abc$109383$new_n16233_ i1=$abc$109383$new_n16232_ q=$abc$109383$new_n18314_
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=$abc$109383$new_n16230_ i1=$abc$109383$new_n16229_ q=$abc$109383$new_n18315_
-.subckt mx2_x2 cmd=$abc$109383$new_n17771_ i0=$abc$109383$new_n18315_ i1=$abc$109383$new_n18314_ q=$abc$109383$new_n18316_
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=$abc$109383$new_n16233_ i1=$abc$109383$new_n16232_ q=$abc$109383$new_n18314_
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=$abc$109383$new_n16230_ i1=$abc$109383$new_n16229_ q=$abc$109383$new_n18315_
+.subckt mux2_x1 cmd=$abc$109383$new_n17771_ i0=$abc$109383$new_n18315_ i1=$abc$109383$new_n18314_ q=$abc$109383$new_n18316_
 .subckt nand2_x0 i0=$abc$109383$new_n18316_ i1=$abc$109383$new_n17898_ nq=$abc$109383$new_n18317_
 .subckt nand3_x0 i0=$abc$109383$new_n18317_ i1=$abc$109383$new_n18313_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n18318_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[15][9] i1=soc.cpu.minerva.gprf.mem._mem[11][9] q=$abc$109383$new_n18319_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[14][9] i1=soc.cpu.minerva.gprf.mem._mem[10][9] q=$abc$109383$new_n18320_
-.subckt mx2_x2 cmd=$abc$109383$new_n17570_ i0=$abc$109383$new_n18320_ i1=$abc$109383$new_n18319_ q=$abc$109383$new_n18321_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[13][9] i1=soc.cpu.minerva.gprf.mem._mem[9][9] q=$abc$109383$new_n18322_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[12][9] i1=soc.cpu.minerva.gprf.mem._mem[8][9] q=$abc$109383$new_n18323_
-.subckt mx2_x2 cmd=$abc$109383$new_n17570_ i0=$abc$109383$new_n18323_ i1=$abc$109383$new_n18322_ q=$abc$109383$new_n18324_
-.subckt mx2_x2 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n18324_ i1=$abc$109383$new_n18321_ q=$abc$109383$new_n18325_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[15][9] i1=soc.cpu.minerva.gprf.mem._mem[11][9] q=$abc$109383$new_n18319_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[14][9] i1=soc.cpu.minerva.gprf.mem._mem[10][9] q=$abc$109383$new_n18320_
+.subckt mux2_x1 cmd=$abc$109383$new_n17570_ i0=$abc$109383$new_n18320_ i1=$abc$109383$new_n18319_ q=$abc$109383$new_n18321_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[13][9] i1=soc.cpu.minerva.gprf.mem._mem[9][9] q=$abc$109383$new_n18322_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[12][9] i1=soc.cpu.minerva.gprf.mem._mem[8][9] q=$abc$109383$new_n18323_
+.subckt mux2_x1 cmd=$abc$109383$new_n17570_ i0=$abc$109383$new_n18323_ i1=$abc$109383$new_n18322_ q=$abc$109383$new_n18324_
+.subckt mux2_x1 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n18324_ i1=$abc$109383$new_n18321_ q=$abc$109383$new_n18325_
 .subckt nand2_x0 i0=$abc$109383$new_n18325_ i1=$abc$109383$new_n17692_ nq=$abc$109383$new_n18326_
 .subckt nand2_x0 i0=$abc$109383$new_n18326_ i1=$abc$109383$new_n18318_ nq=$abc$109383$new_n18327_
-.subckt oa22_x2 i0=$abc$109383$new_n17689_ i1=$abc$109383$new_n18327_ i2=$abc$109383$new_n18306_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[9]
+.subckt or21nand_x1 i0=$abc$109383$new_n17689_ i1=$abc$109383$new_n18327_ i2=$abc$109383$new_n18306_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[9]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][10] nq=$abc$109383$new_n18329_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n18329_ nq=$abc$109383$new_n18330_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][10] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17798_ q=$abc$109383$new_n18331_
-.subckt a2_x2 i0=$abc$109383$new_n18331_ i1=$abc$109383$new_n18330_ q=$abc$109383$new_n18332_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][10] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17798_ nq=$abc$109383$new_n18331_
+.subckt and2_x1 i0=$abc$109383$new_n18331_ i1=$abc$109383$new_n18330_ q=$abc$109383$new_n18332_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][10] nq=$abc$109383$new_n18333_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n18333_ nq=$abc$109383$new_n18334_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][10] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ q=$abc$109383$new_n18335_
-.subckt a2_x2 i0=$abc$109383$new_n18335_ i1=$abc$109383$new_n18334_ q=$abc$109383$new_n18336_
-.subckt ao22_x2 i0=$abc$109383$new_n18336_ i1=$abc$109383$new_n18332_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n18337_
-.subckt mx2_x2 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[15][10] i1=soc.cpu.minerva.gprf.mem._mem[13][10] q=$abc$109383$new_n18338_
-.subckt mx2_x2 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[14][10] i1=soc.cpu.minerva.gprf.mem._mem[12][10] q=$abc$109383$new_n18339_
-.subckt mx2_x2 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n18339_ i1=$abc$109383$new_n18338_ q=$abc$109383$new_n18340_
-.subckt a2_x2 i0=$abc$109383$new_n18340_ i1=$abc$109383$new_n17811_ q=$abc$109383$new_n18341_
-.subckt ao22_x2 i0=$abc$109383$new_n18341_ i1=$abc$109383$new_n18337_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n18342_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][10] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ nq=$abc$109383$new_n18335_
+.subckt and2_x1 i0=$abc$109383$new_n18335_ i1=$abc$109383$new_n18334_ q=$abc$109383$new_n18336_
+.subckt and21nor_x1 i0=$abc$109383$new_n18336_ i1=$abc$109383$new_n18332_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n18337_
+.subckt mux2_x1 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[15][10] i1=soc.cpu.minerva.gprf.mem._mem[13][10] q=$abc$109383$new_n18338_
+.subckt mux2_x1 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[14][10] i1=soc.cpu.minerva.gprf.mem._mem[12][10] q=$abc$109383$new_n18339_
+.subckt mux2_x1 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n18339_ i1=$abc$109383$new_n18338_ q=$abc$109383$new_n18340_
+.subckt and2_x1 i0=$abc$109383$new_n18340_ i1=$abc$109383$new_n17811_ q=$abc$109383$new_n18341_
+.subckt and21nor_x1 i0=$abc$109383$new_n18341_ i1=$abc$109383$new_n18337_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n18342_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][10] nq=$abc$109383$new_n18343_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n18343_ nq=$abc$109383$new_n18344_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][10] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n18345_
-.subckt a2_x2 i0=$abc$109383$new_n18345_ i1=$abc$109383$new_n18344_ q=$abc$109383$new_n18346_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][10] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n18345_
+.subckt and2_x1 i0=$abc$109383$new_n18345_ i1=$abc$109383$new_n18344_ q=$abc$109383$new_n18346_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][10] nq=$abc$109383$new_n18347_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n18347_ nq=$abc$109383$new_n18348_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][10] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17612_ q=$abc$109383$new_n18349_
-.subckt a2_x2 i0=$abc$109383$new_n18349_ i1=$abc$109383$new_n18348_ q=$abc$109383$new_n18350_
-.subckt ao22_x2 i0=$abc$109383$new_n18350_ i1=$abc$109383$new_n18346_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n18351_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][10] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17612_ nq=$abc$109383$new_n18349_
+.subckt and2_x1 i0=$abc$109383$new_n18349_ i1=$abc$109383$new_n18348_ q=$abc$109383$new_n18350_
+.subckt and21nor_x1 i0=$abc$109383$new_n18350_ i1=$abc$109383$new_n18346_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n18351_
 .subckt buf_x4 i=$abc$109383$new_n17541_ q=$abc$109383$new_n18352_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[11][10] i1=soc.cpu.minerva.gprf.mem._mem[9][10] q=$abc$109383$new_n18353_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][10] i1=soc.cpu.minerva.gprf.mem._mem[8][10] q=$abc$109383$new_n18354_
-.subckt mx2_x2 cmd=$abc$109383$new_n17834_ i0=$abc$109383$new_n18354_ i1=$abc$109383$new_n18353_ q=$abc$109383$new_n18355_
-.subckt a2_x2 i0=$abc$109383$new_n18355_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18356_
-.subckt ao22_x2 i0=$abc$109383$new_n18356_ i1=$abc$109383$new_n18351_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n18357_
-.subckt ao22_x2 i0=$abc$109383$new_n18357_ i1=$abc$109383$new_n18342_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n18358_
-.subckt mx2_x2 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[20][10] i1=soc.cpu.minerva.gprf.mem._mem[16][10] q=$abc$109383$new_n18359_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[11][10] i1=soc.cpu.minerva.gprf.mem._mem[9][10] q=$abc$109383$new_n18353_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][10] i1=soc.cpu.minerva.gprf.mem._mem[8][10] q=$abc$109383$new_n18354_
+.subckt mux2_x1 cmd=$abc$109383$new_n17834_ i0=$abc$109383$new_n18354_ i1=$abc$109383$new_n18353_ q=$abc$109383$new_n18355_
+.subckt and2_x1 i0=$abc$109383$new_n18355_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18356_
+.subckt and21nor_x1 i0=$abc$109383$new_n18356_ i1=$abc$109383$new_n18351_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n18357_
+.subckt and21nor_x1 i0=$abc$109383$new_n18357_ i1=$abc$109383$new_n18342_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n18358_
+.subckt mux2_x1 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[20][10] i1=soc.cpu.minerva.gprf.mem._mem[16][10] q=$abc$109383$new_n18359_
 .subckt nand2_x0 i0=$abc$109383$new_n18359_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n18360_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][10] nq=$abc$109383$new_n18361_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n18361_ nq=$abc$109383$new_n18362_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][10] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n18363_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][10] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n18363_
 .subckt nand2_x0 i0=$abc$109383$new_n18363_ i1=$abc$109383$new_n18362_ nq=$abc$109383$new_n18364_
 .subckt nand3_x0 i0=$abc$109383$new_n18364_ i1=$abc$109383$new_n18360_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n18365_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[23][10] i1=soc.cpu.minerva.gprf.mem._mem[19][10] q=$abc$109383$new_n18366_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[22][10] i1=soc.cpu.minerva.gprf.mem._mem[18][10] q=$abc$109383$new_n18367_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18367_ i1=$abc$109383$new_n18366_ q=$abc$109383$new_n18368_
-.subckt ao22_x2 i0=$abc$109383$new_n18368_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n18369_
-.subckt a2_x2 i0=$abc$109383$new_n18369_ i1=$abc$109383$new_n18365_ q=$abc$109383$new_n18370_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[4][10] i1=soc.cpu.minerva.gprf.mem._mem[0][10] q=$abc$109383$new_n18371_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[23][10] i1=soc.cpu.minerva.gprf.mem._mem[19][10] q=$abc$109383$new_n18366_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[22][10] i1=soc.cpu.minerva.gprf.mem._mem[18][10] q=$abc$109383$new_n18367_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18367_ i1=$abc$109383$new_n18366_ q=$abc$109383$new_n18368_
+.subckt and21nor_x1 i0=$abc$109383$new_n18368_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n18369_
+.subckt and2_x1 i0=$abc$109383$new_n18369_ i1=$abc$109383$new_n18365_ q=$abc$109383$new_n18370_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[4][10] i1=soc.cpu.minerva.gprf.mem._mem[0][10] q=$abc$109383$new_n18371_
 .subckt nand2_x0 i0=$abc$109383$new_n18371_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n18372_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][10] nq=$abc$109383$new_n18373_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n18373_ nq=$abc$109383$new_n18374_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][10] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n18375_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][10] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n18375_
 .subckt nand2_x0 i0=$abc$109383$new_n18375_ i1=$abc$109383$new_n18374_ nq=$abc$109383$new_n18376_
 .subckt nand3_x0 i0=$abc$109383$new_n18376_ i1=$abc$109383$new_n18372_ i2=$abc$109383$new_n17672_ nq=$abc$109383$new_n18377_
-.subckt oa22_x2 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[7][10] q=$abc$109383$new_n18378_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][10] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17569_ q=$abc$109383$new_n18379_
-.subckt a2_x2 i0=$abc$109383$new_n18379_ i1=$abc$109383$new_n18378_ q=$abc$109383$new_n18380_
-.subckt mx2_x2 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[6][10] i1=soc.cpu.minerva.gprf.mem._mem[2][10] q=$abc$109383$new_n18381_
-.subckt oa22_x2 i0=$abc$109383$new_n17798_ i1=$abc$109383$new_n18381_ i2=$abc$109383$new_n17543_ q=$abc$109383$new_n18382_
-.subckt ao22_x2 i0=$abc$109383$new_n18382_ i1=$abc$109383$new_n18380_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n18383_
-.subckt a2_x2 i0=$abc$109383$new_n18383_ i1=$abc$109383$new_n18377_ q=$abc$109383$new_n18384_
-.subckt ao22_x2 i0=$abc$109383$new_n18384_ i1=$abc$109383$new_n18370_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n18385_
-.subckt o2_x2 i0=$abc$109383$new_n18385_ i1=$abc$109383$new_n18358_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[10]
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][11] i1=soc.cpu.minerva.gprf.mem._mem[16][11] q=$abc$109383$new_n18387_
+.subckt or21nand_x1 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[7][10] nq=$abc$109383$new_n18378_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][10] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17569_ nq=$abc$109383$new_n18379_
+.subckt and2_x1 i0=$abc$109383$new_n18379_ i1=$abc$109383$new_n18378_ q=$abc$109383$new_n18380_
+.subckt mux2_x1 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[6][10] i1=soc.cpu.minerva.gprf.mem._mem[2][10] q=$abc$109383$new_n18381_
+.subckt or21nand_x1 i0=$abc$109383$new_n17798_ i1=$abc$109383$new_n18381_ i2=$abc$109383$new_n17543_ nq=$abc$109383$new_n18382_
+.subckt and21nor_x1 i0=$abc$109383$new_n18382_ i1=$abc$109383$new_n18380_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n18383_
+.subckt and2_x1 i0=$abc$109383$new_n18383_ i1=$abc$109383$new_n18377_ q=$abc$109383$new_n18384_
+.subckt and21nor_x1 i0=$abc$109383$new_n18384_ i1=$abc$109383$new_n18370_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n18385_
+.subckt or2_x1 i0=$abc$109383$new_n18385_ i1=$abc$109383$new_n18358_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[10]
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][11] i1=soc.cpu.minerva.gprf.mem._mem[16][11] q=$abc$109383$new_n18387_
 .subckt nand2_x0 i0=$abc$109383$new_n18387_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n18388_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][11] nq=$abc$109383$new_n18389_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n18389_ nq=$abc$109383$new_n18390_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][11] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n18391_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][11] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n18391_
 .subckt nand2_x0 i0=$abc$109383$new_n18391_ i1=$abc$109383$new_n18390_ nq=$abc$109383$new_n18392_
 .subckt nand3_x0 i0=$abc$109383$new_n18392_ i1=$abc$109383$new_n18388_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n18393_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][11] i1=soc.cpu.minerva.gprf.mem._mem[18][11] q=$abc$109383$new_n18394_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][11] i1=soc.cpu.minerva.gprf.mem._mem[18][11] q=$abc$109383$new_n18394_
 .subckt nand2_x0 i0=$abc$109383$new_n18394_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18395_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][11] nq=$abc$109383$new_n18396_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n18396_ nq=$abc$109383$new_n18397_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][11] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n18398_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][11] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n18398_
 .subckt nand2_x0 i0=$abc$109383$new_n18398_ i1=$abc$109383$new_n18397_ nq=$abc$109383$new_n18399_
 .subckt nand3_x0 i0=$abc$109383$new_n18399_ i1=$abc$109383$new_n18395_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n18400_
 .subckt nand3_x0 i0=$abc$109383$new_n18400_ i1=$abc$109383$new_n18393_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n18401_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[4][11] i1=soc.cpu.minerva.gprf.mem._mem[0][11] q=$abc$109383$new_n18402_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[4][11] i1=soc.cpu.minerva.gprf.mem._mem[0][11] q=$abc$109383$new_n18402_
 .subckt nand2_x0 i0=$abc$109383$new_n18402_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18403_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][11] nq=$abc$109383$new_n18404_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n18404_ nq=$abc$109383$new_n18405_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][11] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n18406_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][11] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n18406_
 .subckt nand2_x0 i0=$abc$109383$new_n18406_ i1=$abc$109383$new_n18405_ nq=$abc$109383$new_n18407_
 .subckt nand3_x0 i0=$abc$109383$new_n18407_ i1=$abc$109383$new_n18403_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n18408_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[6][11] i1=soc.cpu.minerva.gprf.mem._mem[2][11] q=$abc$109383$new_n18409_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[6][11] i1=soc.cpu.minerva.gprf.mem._mem[2][11] q=$abc$109383$new_n18409_
 .subckt nand2_x0 i0=$abc$109383$new_n18409_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18410_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][11] nq=$abc$109383$new_n18411_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n18411_ nq=$abc$109383$new_n18412_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][11] i1=$abc$109383$new_n17698_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n18413_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][11] i1=$abc$109383$new_n17698_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n18413_
 .subckt nand2_x0 i0=$abc$109383$new_n18413_ i1=$abc$109383$new_n18412_ nq=$abc$109383$new_n18414_
 .subckt nand3_x0 i0=$abc$109383$new_n18414_ i1=$abc$109383$new_n18410_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n18415_
 .subckt nand3_x0 i0=$abc$109383$new_n18415_ i1=$abc$109383$new_n18408_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n18416_
-.subckt oa22_x2 i0=$abc$109383$new_n18416_ i1=$abc$109383$new_n18401_ i2=$abc$109383$new_n17689_ q=$abc$109383$new_n18417_
+.subckt or21nand_x1 i0=$abc$109383$new_n18416_ i1=$abc$109383$new_n18401_ i2=$abc$109383$new_n17689_ nq=$abc$109383$new_n18417_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n16359_ nq=$abc$109383$new_n18418_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][11] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ q=$abc$109383$new_n18419_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][11] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ nq=$abc$109383$new_n18419_
 .subckt nand2_x0 i0=$abc$109383$new_n18419_ i1=$abc$109383$new_n18418_ nq=$abc$109383$new_n18420_
-.subckt mx2_x2 cmd=$abc$109383$new_n17572_ i0=$abc$109383$new_n16357_ i1=$abc$109383$new_n16356_ q=$abc$109383$new_n18421_
-.subckt ao22_x2 i0=$abc$109383$new_n18223_ i1=$abc$109383$new_n18421_ i2=$abc$109383$new_n17599_ q=$abc$109383$new_n18422_
+.subckt mux2_x1 cmd=$abc$109383$new_n17572_ i0=$abc$109383$new_n16357_ i1=$abc$109383$new_n16356_ q=$abc$109383$new_n18421_
+.subckt and21nor_x1 i0=$abc$109383$new_n18223_ i1=$abc$109383$new_n18421_ i2=$abc$109383$new_n17599_ nq=$abc$109383$new_n18422_
 .subckt nand2_x0 i0=$abc$109383$new_n18422_ i1=$abc$109383$new_n18420_ nq=$abc$109383$new_n18423_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[28][11] i1=soc.cpu.minerva.gprf.mem._mem[24][11] q=$abc$109383$new_n18424_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[28][11] i1=soc.cpu.minerva.gprf.mem._mem[24][11] q=$abc$109383$new_n18424_
 .subckt nand2_x0 i0=$abc$109383$new_n18424_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18425_
-.subckt oa22_x2 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[29][11] q=$abc$109383$new_n18426_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][11] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n18427_
+.subckt or21nand_x1 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=soc.cpu.minerva.gprf.mem._mem[29][11] nq=$abc$109383$new_n18426_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][11] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n18427_
 .subckt nand2_x0 i0=$abc$109383$new_n18427_ i1=$abc$109383$new_n18426_ nq=$abc$109383$new_n18428_
 .subckt nand3_x0 i0=$abc$109383$new_n18428_ i1=$abc$109383$new_n18425_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18429_
 .subckt nand3_x0 i0=$abc$109383$new_n18429_ i1=$abc$109383$new_n18423_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n18430_
-.subckt mx2_x2 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[12][11] i1=soc.cpu.minerva.gprf.mem._mem[8][11] q=$abc$109383$new_n18431_
+.subckt mux2_x1 cmd=$abc$109383$new_n17725_ i0=soc.cpu.minerva.gprf.mem._mem[12][11] i1=soc.cpu.minerva.gprf.mem._mem[8][11] q=$abc$109383$new_n18431_
 .subckt nand2_x0 i0=$abc$109383$new_n18431_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n18432_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][11] nq=$abc$109383$new_n18433_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n18433_ nq=$abc$109383$new_n18434_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][11] i1=$abc$109383$new_n17889_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n18435_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][11] i1=$abc$109383$new_n17889_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n18435_
 .subckt nand2_x0 i0=$abc$109383$new_n18435_ i1=$abc$109383$new_n18434_ nq=$abc$109383$new_n18436_
 .subckt nand3_x0 i0=$abc$109383$new_n18436_ i1=$abc$109383$new_n18432_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18437_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[14][11] i1=soc.cpu.minerva.gprf.mem._mem[10][11] q=$abc$109383$new_n18438_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[14][11] i1=soc.cpu.minerva.gprf.mem._mem[10][11] q=$abc$109383$new_n18438_
 .subckt nand2_x0 i0=$abc$109383$new_n18438_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18439_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][11] nq=$abc$109383$new_n18440_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n18440_ nq=$abc$109383$new_n18441_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][11] i1=$abc$109383$new_n17900_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n18442_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][11] i1=$abc$109383$new_n17900_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n18442_
 .subckt nand2_x0 i0=$abc$109383$new_n18442_ i1=$abc$109383$new_n18441_ nq=$abc$109383$new_n18443_
 .subckt nand3_x0 i0=$abc$109383$new_n18443_ i1=$abc$109383$new_n18439_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n18444_
 .subckt nand3_x0 i0=$abc$109383$new_n18444_ i1=$abc$109383$new_n18437_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n18445_
-.subckt oa22_x2 i0=$abc$109383$new_n18445_ i1=$abc$109383$new_n18430_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n18446_
+.subckt or21nand_x1 i0=$abc$109383$new_n18445_ i1=$abc$109383$new_n18430_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n18446_
 .subckt nand2_x0 i0=$abc$109383$new_n18446_ i1=$abc$109383$new_n18417_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[11]
-.subckt mx2_x2 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[20][12] i1=soc.cpu.minerva.gprf.mem._mem[16][12] q=$abc$109383$new_n18448_
+.subckt mux2_x1 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[20][12] i1=soc.cpu.minerva.gprf.mem._mem[16][12] q=$abc$109383$new_n18448_
 .subckt nand2_x0 i0=$abc$109383$new_n18448_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n18449_
-.subckt oa22_x2 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[21][12] q=$abc$109383$new_n18450_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][12] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n17972_ q=$abc$109383$new_n18451_
+.subckt or21nand_x1 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[21][12] nq=$abc$109383$new_n18450_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][12] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n17972_ nq=$abc$109383$new_n18451_
 .subckt nand2_x0 i0=$abc$109383$new_n18451_ i1=$abc$109383$new_n18450_ nq=$abc$109383$new_n18452_
 .subckt nand3_x0 i0=$abc$109383$new_n18452_ i1=$abc$109383$new_n18449_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n18453_
-.subckt mx2_x2 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[23][12] i1=soc.cpu.minerva.gprf.mem._mem[19][12] q=$abc$109383$new_n18454_
-.subckt mx2_x2 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[22][12] i1=soc.cpu.minerva.gprf.mem._mem[18][12] q=$abc$109383$new_n18455_
-.subckt mx2_x2 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n18455_ i1=$abc$109383$new_n18454_ q=$abc$109383$new_n18456_
-.subckt ao22_x2 i0=$abc$109383$new_n18456_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n18457_
-.subckt a2_x2 i0=$abc$109383$new_n18457_ i1=$abc$109383$new_n18453_ q=$abc$109383$new_n18458_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][12] i1=soc.cpu.minerva.gprf.mem._mem[0][12] q=$abc$109383$new_n18459_
+.subckt mux2_x1 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[23][12] i1=soc.cpu.minerva.gprf.mem._mem[19][12] q=$abc$109383$new_n18454_
+.subckt mux2_x1 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[22][12] i1=soc.cpu.minerva.gprf.mem._mem[18][12] q=$abc$109383$new_n18455_
+.subckt mux2_x1 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n18455_ i1=$abc$109383$new_n18454_ q=$abc$109383$new_n18456_
+.subckt and21nor_x1 i0=$abc$109383$new_n18456_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n18457_
+.subckt and2_x1 i0=$abc$109383$new_n18457_ i1=$abc$109383$new_n18453_ q=$abc$109383$new_n18458_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][12] i1=soc.cpu.minerva.gprf.mem._mem[0][12] q=$abc$109383$new_n18459_
 .subckt nand2_x0 i0=$abc$109383$new_n18459_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n18460_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][12] nq=$abc$109383$new_n18461_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n18461_ nq=$abc$109383$new_n18462_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][12] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n18463_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][12] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n18463_
 .subckt nand2_x0 i0=$abc$109383$new_n18463_ i1=$abc$109383$new_n18462_ nq=$abc$109383$new_n18464_
 .subckt nand3_x0 i0=$abc$109383$new_n18464_ i1=$abc$109383$new_n18460_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n18465_
-.subckt oa22_x2 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[7][12] q=$abc$109383$new_n18466_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][12] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n18467_
-.subckt a2_x2 i0=$abc$109383$new_n18467_ i1=$abc$109383$new_n18466_ q=$abc$109383$new_n18468_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][12] i1=soc.cpu.minerva.gprf.mem._mem[2][12] q=$abc$109383$new_n18469_
-.subckt oa22_x2 i0=$abc$109383$new_n17721_ i1=$abc$109383$new_n18469_ i2=$abc$109383$new_n17736_ q=$abc$109383$new_n18470_
-.subckt ao22_x2 i0=$abc$109383$new_n18470_ i1=$abc$109383$new_n18468_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n18471_
-.subckt a2_x2 i0=$abc$109383$new_n18471_ i1=$abc$109383$new_n18465_ q=$abc$109383$new_n18472_
-.subckt ao22_x2 i0=$abc$109383$new_n18472_ i1=$abc$109383$new_n18458_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n18473_
+.subckt or21nand_x1 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[7][12] nq=$abc$109383$new_n18466_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][12] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n18467_
+.subckt and2_x1 i0=$abc$109383$new_n18467_ i1=$abc$109383$new_n18466_ q=$abc$109383$new_n18468_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][12] i1=soc.cpu.minerva.gprf.mem._mem[2][12] q=$abc$109383$new_n18469_
+.subckt or21nand_x1 i0=$abc$109383$new_n17721_ i1=$abc$109383$new_n18469_ i2=$abc$109383$new_n17736_ nq=$abc$109383$new_n18470_
+.subckt and21nor_x1 i0=$abc$109383$new_n18470_ i1=$abc$109383$new_n18468_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n18471_
+.subckt and2_x1 i0=$abc$109383$new_n18471_ i1=$abc$109383$new_n18465_ q=$abc$109383$new_n18472_
+.subckt and21nor_x1 i0=$abc$109383$new_n18472_ i1=$abc$109383$new_n18458_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n18473_
 .subckt buf_x4 i=$abc$109383$new_n17538_ q=$abc$109383$new_n18474_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[12][12] i1=soc.cpu.minerva.gprf.mem._mem[8][12] q=$abc$109383$new_n18475_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[12][12] i1=soc.cpu.minerva.gprf.mem._mem[8][12] q=$abc$109383$new_n18475_
 .subckt nand2_x0 i0=$abc$109383$new_n18475_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n18476_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][12] nq=$abc$109383$new_n18477_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n18477_ nq=$abc$109383$new_n18478_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][12] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n18479_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][12] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n18479_
 .subckt nand2_x0 i0=$abc$109383$new_n18479_ i1=$abc$109383$new_n18478_ nq=$abc$109383$new_n18480_
 .subckt nand3_x0 i0=$abc$109383$new_n18480_ i1=$abc$109383$new_n18476_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n18481_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][12] nq=$abc$109383$new_n18482_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=$abc$109383$new_n18482_ nq=$abc$109383$new_n18483_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][12] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17972_ q=$abc$109383$new_n18484_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][12] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17972_ nq=$abc$109383$new_n18484_
 .subckt nand2_x0 i0=$abc$109383$new_n18484_ i1=$abc$109383$new_n18483_ nq=$abc$109383$new_n18485_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[14][12] i1=soc.cpu.minerva.gprf.mem._mem[10][12] q=$abc$109383$new_n18486_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[14][12] i1=soc.cpu.minerva.gprf.mem._mem[10][12] q=$abc$109383$new_n18486_
 .subckt nand2_x0 i0=$abc$109383$new_n18486_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n18487_
 .subckt nand3_x0 i0=$abc$109383$new_n18487_ i1=$abc$109383$new_n18485_ i2=$abc$109383$new_n17599_ nq=$abc$109383$new_n18488_
-.subckt a3_x2 i0=$abc$109383$new_n18488_ i1=$abc$109383$new_n18481_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n18489_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[30][12] i1=soc.cpu.minerva.gprf.mem._mem[26][12] q=$abc$109383$new_n18490_
-.subckt a2_x2 i0=$abc$109383$new_n18490_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18491_
+.subckt and3_x1 i0=$abc$109383$new_n18488_ i1=$abc$109383$new_n18481_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n18489_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[30][12] i1=soc.cpu.minerva.gprf.mem._mem[26][12] q=$abc$109383$new_n18490_
+.subckt and2_x1 i0=$abc$109383$new_n18490_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18491_
 .subckt nand3_x0 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=$abc$109383$new_n16417_ nq=$abc$109383$new_n18492_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][12] i1=$abc$109383$new_n17620_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n18493_
-.subckt a2_x2 i0=$abc$109383$new_n18493_ i1=$abc$109383$new_n18492_ q=$abc$109383$new_n18494_
-.subckt ao22_x2 i0=$abc$109383$new_n18494_ i1=$abc$109383$new_n18491_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n18495_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[28][12] i1=soc.cpu.minerva.gprf.mem._mem[24][12] q=$abc$109383$new_n18496_
-.subckt a2_x2 i0=$abc$109383$new_n18496_ i1=$abc$109383$new_n17862_ q=$abc$109383$new_n18497_
-.subckt oa22_x2 i0=$abc$109383$new_n17562_ i1=$abc$109383$new_n17559_ i2=soc.cpu.minerva.gprf.mem._mem[29][12] q=$abc$109383$new_n18498_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][12] i1=$abc$109383$new_n17629_ i2=$abc$109383$new_n17647_ q=$abc$109383$new_n18499_
-.subckt a2_x2 i0=$abc$109383$new_n18499_ i1=$abc$109383$new_n18498_ q=$abc$109383$new_n18500_
-.subckt ao22_x2 i0=$abc$109383$new_n18500_ i1=$abc$109383$new_n18497_ i2=$abc$109383$new_n17671_ q=$abc$109383$new_n18501_
-.subckt ao22_x2 i0=$abc$109383$new_n18501_ i1=$abc$109383$new_n18495_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n18502_
-.subckt ao22_x2 i0=$abc$109383$new_n18502_ i1=$abc$109383$new_n18489_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n18503_
-.subckt o2_x2 i0=$abc$109383$new_n18503_ i1=$abc$109383$new_n18473_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[12]
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][12] i1=$abc$109383$new_n17620_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n18493_
+.subckt and2_x1 i0=$abc$109383$new_n18493_ i1=$abc$109383$new_n18492_ q=$abc$109383$new_n18494_
+.subckt and21nor_x1 i0=$abc$109383$new_n18494_ i1=$abc$109383$new_n18491_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n18495_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[28][12] i1=soc.cpu.minerva.gprf.mem._mem[24][12] q=$abc$109383$new_n18496_
+.subckt and2_x1 i0=$abc$109383$new_n18496_ i1=$abc$109383$new_n17862_ q=$abc$109383$new_n18497_
+.subckt or21nand_x1 i0=$abc$109383$new_n17562_ i1=$abc$109383$new_n17559_ i2=soc.cpu.minerva.gprf.mem._mem[29][12] nq=$abc$109383$new_n18498_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][12] i1=$abc$109383$new_n17629_ i2=$abc$109383$new_n17647_ nq=$abc$109383$new_n18499_
+.subckt and2_x1 i0=$abc$109383$new_n18499_ i1=$abc$109383$new_n18498_ q=$abc$109383$new_n18500_
+.subckt and21nor_x1 i0=$abc$109383$new_n18500_ i1=$abc$109383$new_n18497_ i2=$abc$109383$new_n17671_ nq=$abc$109383$new_n18501_
+.subckt and21nor_x1 i0=$abc$109383$new_n18501_ i1=$abc$109383$new_n18495_ i2=$abc$109383$new_n17752_ nq=$abc$109383$new_n18502_
+.subckt and21nor_x1 i0=$abc$109383$new_n18502_ i1=$abc$109383$new_n18489_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n18503_
+.subckt or2_x1 i0=$abc$109383$new_n18503_ i1=$abc$109383$new_n18473_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[12]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][13] nq=$abc$109383$new_n18505_
 .subckt buf_x4 i=$abc$109383$new_n17803_ q=$abc$109383$new_n18506_
 .subckt buf_x4 i=$abc$109383$new_n17826_ q=$abc$109383$new_n18507_
 .subckt nand3_x0 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18505_ nq=$abc$109383$new_n18508_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][13] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17572_ q=$abc$109383$new_n18509_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][13] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17572_ nq=$abc$109383$new_n18509_
 .subckt nand2_x0 i0=$abc$109383$new_n18509_ i1=$abc$109383$new_n18508_ nq=$abc$109383$new_n18510_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][13] nq=$abc$109383$new_n18511_
 .subckt buf_x4 i=$abc$109383$new_n17825_ q=$abc$109383$new_n18512_
 .subckt nand3_x0 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18511_ nq=$abc$109383$new_n18513_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][13] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17631_ q=$abc$109383$new_n18514_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][13] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17631_ nq=$abc$109383$new_n18514_
 .subckt nand2_x0 i0=$abc$109383$new_n18514_ i1=$abc$109383$new_n18513_ nq=$abc$109383$new_n18515_
-.subckt oa22_x2 i0=$abc$109383$new_n18515_ i1=$abc$109383$new_n18510_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18516_
-.subckt mx2_x2 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[15][13] i1=soc.cpu.minerva.gprf.mem._mem[13][13] q=$abc$109383$new_n18517_
-.subckt mx2_x2 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[11][13] i1=soc.cpu.minerva.gprf.mem._mem[9][13] q=$abc$109383$new_n18518_
-.subckt mx2_x2 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18518_ i1=$abc$109383$new_n18517_ q=$abc$109383$new_n18519_
+.subckt or21nand_x1 i0=$abc$109383$new_n18515_ i1=$abc$109383$new_n18510_ i2=$abc$109383$new_n17866_ nq=$abc$109383$new_n18516_
+.subckt mux2_x1 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[15][13] i1=soc.cpu.minerva.gprf.mem._mem[13][13] q=$abc$109383$new_n18517_
+.subckt mux2_x1 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[11][13] i1=soc.cpu.minerva.gprf.mem._mem[9][13] q=$abc$109383$new_n18518_
+.subckt mux2_x1 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18518_ i1=$abc$109383$new_n18517_ q=$abc$109383$new_n18519_
 .subckt nand2_x0 i0=$abc$109383$new_n18519_ i1=$abc$109383$new_n18234_ nq=$abc$109383$new_n18520_
-.subckt oa22_x2 i0=$abc$109383$new_n18520_ i1=$abc$109383$new_n18516_ i2=$abc$109383$new_n17899_ q=$abc$109383$new_n18521_
+.subckt or21nand_x1 i0=$abc$109383$new_n18520_ i1=$abc$109383$new_n18516_ i2=$abc$109383$new_n17899_ nq=$abc$109383$new_n18521_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][13] nq=$abc$109383$new_n18522_
 .subckt buf_x4 i=$abc$109383$new_n17826_ q=$abc$109383$new_n18523_
 .subckt nand3_x0 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18522_ nq=$abc$109383$new_n18524_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][13] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17709_ q=$abc$109383$new_n18525_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][13] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17709_ nq=$abc$109383$new_n18525_
 .subckt nand2_x0 i0=$abc$109383$new_n18525_ i1=$abc$109383$new_n18524_ nq=$abc$109383$new_n18526_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][13] nq=$abc$109383$new_n18527_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n18527_ nq=$abc$109383$new_n18528_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][13] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17641_ q=$abc$109383$new_n18529_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][13] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17641_ nq=$abc$109383$new_n18529_
 .subckt nand2_x0 i0=$abc$109383$new_n18529_ i1=$abc$109383$new_n18528_ nq=$abc$109383$new_n18530_
-.subckt oa22_x2 i0=$abc$109383$new_n18530_ i1=$abc$109383$new_n18526_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n18531_
+.subckt or21nand_x1 i0=$abc$109383$new_n18530_ i1=$abc$109383$new_n18526_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n18531_
 .subckt buf_x4 i=$abc$109383$new_n17643_ q=$abc$109383$new_n18532_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][13] i1=soc.cpu.minerva.gprf.mem._mem[12][13] q=$abc$109383$new_n18533_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[10][13] i1=soc.cpu.minerva.gprf.mem._mem[8][13] q=$abc$109383$new_n18534_
-.subckt mx2_x2 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18534_ i1=$abc$109383$new_n18533_ q=$abc$109383$new_n18535_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][13] i1=soc.cpu.minerva.gprf.mem._mem[12][13] q=$abc$109383$new_n18533_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[10][13] i1=soc.cpu.minerva.gprf.mem._mem[8][13] q=$abc$109383$new_n18534_
+.subckt mux2_x1 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18534_ i1=$abc$109383$new_n18533_ q=$abc$109383$new_n18535_
 .subckt nand2_x0 i0=$abc$109383$new_n18535_ i1=$abc$109383$new_n17691_ nq=$abc$109383$new_n18536_
-.subckt oa22_x2 i0=$abc$109383$new_n18536_ i1=$abc$109383$new_n18531_ i2=$abc$109383$new_n18223_ q=$abc$109383$new_n18537_
-.subckt oa22_x2 i0=$abc$109383$new_n18537_ i1=$abc$109383$new_n18521_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n18538_
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][13] i1=soc.cpu.minerva.gprf.mem._mem[16][13] q=$abc$109383$new_n18539_
+.subckt or21nand_x1 i0=$abc$109383$new_n18536_ i1=$abc$109383$new_n18531_ i2=$abc$109383$new_n18223_ nq=$abc$109383$new_n18537_
+.subckt or21nand_x1 i0=$abc$109383$new_n18537_ i1=$abc$109383$new_n18521_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n18538_
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[20][13] i1=soc.cpu.minerva.gprf.mem._mem[16][13] q=$abc$109383$new_n18539_
 .subckt nand2_x0 i0=$abc$109383$new_n18539_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n18540_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][13] nq=$abc$109383$new_n18541_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18541_ nq=$abc$109383$new_n18542_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][13] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n18543_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][13] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n18543_
 .subckt nand2_x0 i0=$abc$109383$new_n18543_ i1=$abc$109383$new_n18542_ nq=$abc$109383$new_n18544_
 .subckt nand3_x0 i0=$abc$109383$new_n18544_ i1=$abc$109383$new_n18540_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n18545_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][13] nq=$abc$109383$new_n18546_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18546_ nq=$abc$109383$new_n18547_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][13] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n18548_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][13] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n18548_
 .subckt nand2_x0 i0=$abc$109383$new_n18548_ i1=$abc$109383$new_n18547_ nq=$abc$109383$new_n18549_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[22][13] i1=soc.cpu.minerva.gprf.mem._mem[18][13] q=$abc$109383$new_n18550_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[22][13] i1=soc.cpu.minerva.gprf.mem._mem[18][13] q=$abc$109383$new_n18550_
 .subckt nand2_x0 i0=$abc$109383$new_n18550_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18551_
 .subckt nand3_x0 i0=$abc$109383$new_n18551_ i1=$abc$109383$new_n18549_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n18552_
 .subckt nand3_x0 i0=$abc$109383$new_n18552_ i1=$abc$109383$new_n18545_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n18553_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][13] nq=$abc$109383$new_n18554_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][13] nq=$abc$109383$new_n18555_
-.subckt mx2_x2 cmd=$abc$109383$new_n17662_ i0=$abc$109383$new_n18555_ i1=$abc$109383$new_n18554_ q=$abc$109383$new_n18556_
+.subckt mux2_x1 cmd=$abc$109383$new_n17662_ i0=$abc$109383$new_n18555_ i1=$abc$109383$new_n18554_ q=$abc$109383$new_n18556_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][13] nq=$abc$109383$new_n18557_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][13] nq=$abc$109383$new_n18558_
-.subckt mx2_x2 cmd=$abc$109383$new_n17662_ i0=$abc$109383$new_n18558_ i1=$abc$109383$new_n18557_ q=$abc$109383$new_n18559_
-.subckt mx2_x2 cmd=$abc$109383$new_n17642_ i0=$abc$109383$new_n18559_ i1=$abc$109383$new_n18556_ q=$abc$109383$new_n18560_
+.subckt mux2_x1 cmd=$abc$109383$new_n17662_ i0=$abc$109383$new_n18558_ i1=$abc$109383$new_n18557_ q=$abc$109383$new_n18559_
+.subckt mux2_x1 cmd=$abc$109383$new_n17642_ i0=$abc$109383$new_n18559_ i1=$abc$109383$new_n18556_ q=$abc$109383$new_n18560_
 .subckt nand2_x0 i0=$abc$109383$new_n18560_ i1=$abc$109383$new_n17716_ nq=$abc$109383$new_n18561_
-.subckt mx2_x2 cmd=$abc$109383$new_n17612_ i0=soc.cpu.minerva.gprf.mem._mem[4][13] i1=soc.cpu.minerva.gprf.mem._mem[5][13] q=$abc$109383$new_n18562_
-.subckt mx2_x2 cmd=$abc$109383$new_n17612_ i0=soc.cpu.minerva.gprf.mem._mem[0][13] i1=soc.cpu.minerva.gprf.mem._mem[1][13] q=$abc$109383$new_n18563_
-.subckt mx2_x2 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18563_ i1=$abc$109383$new_n18562_ q=$abc$109383$new_n18564_
-.subckt ao22_x2 i0=$abc$109383$new_n18564_ i1=$abc$109383$new_n17579_ i2=$abc$109383$new_n18234_ q=$abc$109383$new_n18565_
+.subckt mux2_x1 cmd=$abc$109383$new_n17612_ i0=soc.cpu.minerva.gprf.mem._mem[4][13] i1=soc.cpu.minerva.gprf.mem._mem[5][13] q=$abc$109383$new_n18562_
+.subckt mux2_x1 cmd=$abc$109383$new_n17612_ i0=soc.cpu.minerva.gprf.mem._mem[0][13] i1=soc.cpu.minerva.gprf.mem._mem[1][13] q=$abc$109383$new_n18563_
+.subckt mux2_x1 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n18563_ i1=$abc$109383$new_n18562_ q=$abc$109383$new_n18564_
+.subckt and21nor_x1 i0=$abc$109383$new_n18564_ i1=$abc$109383$new_n17579_ i2=$abc$109383$new_n18234_ nq=$abc$109383$new_n18565_
 .subckt nand2_x0 i0=$abc$109383$new_n18565_ i1=$abc$109383$new_n18561_ nq=$abc$109383$new_n18566_
-.subckt oa22_x2 i0=$abc$109383$new_n18566_ i1=$abc$109383$new_n18553_ i2=$abc$109383$new_n17689_ q=$abc$109383$new_n18567_
+.subckt or21nand_x1 i0=$abc$109383$new_n18566_ i1=$abc$109383$new_n18553_ i2=$abc$109383$new_n17689_ nq=$abc$109383$new_n18567_
 .subckt nand2_x0 i0=$abc$109383$new_n18567_ i1=$abc$109383$new_n18538_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[13]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][14] nq=$abc$109383$new_n18569_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n18569_ nq=$abc$109383$new_n18570_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][14] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17798_ q=$abc$109383$new_n18571_
-.subckt a2_x2 i0=$abc$109383$new_n18571_ i1=$abc$109383$new_n18570_ q=$abc$109383$new_n18572_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][14] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17798_ nq=$abc$109383$new_n18571_
+.subckt and2_x1 i0=$abc$109383$new_n18571_ i1=$abc$109383$new_n18570_ q=$abc$109383$new_n18572_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][14] nq=$abc$109383$new_n18573_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n18573_ nq=$abc$109383$new_n18574_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][14] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ q=$abc$109383$new_n18575_
-.subckt a2_x2 i0=$abc$109383$new_n18575_ i1=$abc$109383$new_n18574_ q=$abc$109383$new_n18576_
-.subckt ao22_x2 i0=$abc$109383$new_n18576_ i1=$abc$109383$new_n18572_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n18577_
-.subckt mx2_x2 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[15][14] i1=soc.cpu.minerva.gprf.mem._mem[13][14] q=$abc$109383$new_n18578_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[14][14] i1=soc.cpu.minerva.gprf.mem._mem[12][14] q=$abc$109383$new_n18579_
-.subckt mx2_x2 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n18579_ i1=$abc$109383$new_n18578_ q=$abc$109383$new_n18580_
-.subckt a2_x2 i0=$abc$109383$new_n18580_ i1=$abc$109383$new_n18233_ q=$abc$109383$new_n18581_
-.subckt ao22_x2 i0=$abc$109383$new_n18581_ i1=$abc$109383$new_n18577_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n18582_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][14] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ nq=$abc$109383$new_n18575_
+.subckt and2_x1 i0=$abc$109383$new_n18575_ i1=$abc$109383$new_n18574_ q=$abc$109383$new_n18576_
+.subckt and21nor_x1 i0=$abc$109383$new_n18576_ i1=$abc$109383$new_n18572_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n18577_
+.subckt mux2_x1 cmd=$abc$109383$new_n17812_ i0=soc.cpu.minerva.gprf.mem._mem[15][14] i1=soc.cpu.minerva.gprf.mem._mem[13][14] q=$abc$109383$new_n18578_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[14][14] i1=soc.cpu.minerva.gprf.mem._mem[12][14] q=$abc$109383$new_n18579_
+.subckt mux2_x1 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n18579_ i1=$abc$109383$new_n18578_ q=$abc$109383$new_n18580_
+.subckt and2_x1 i0=$abc$109383$new_n18580_ i1=$abc$109383$new_n18233_ q=$abc$109383$new_n18581_
+.subckt and21nor_x1 i0=$abc$109383$new_n18581_ i1=$abc$109383$new_n18577_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n18582_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][14] nq=$abc$109383$new_n18583_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n18583_ nq=$abc$109383$new_n18584_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][14] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n18585_
-.subckt a2_x2 i0=$abc$109383$new_n18585_ i1=$abc$109383$new_n18584_ q=$abc$109383$new_n18586_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][14] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n18585_
+.subckt and2_x1 i0=$abc$109383$new_n18585_ i1=$abc$109383$new_n18584_ q=$abc$109383$new_n18586_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][14] nq=$abc$109383$new_n18587_
 .subckt buf_x4 i=$abc$109383$new_n17792_ q=$abc$109383$new_n18588_
 .subckt buf_x4 i=$abc$109383$new_n17795_ q=$abc$109383$new_n18589_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n18587_ nq=$abc$109383$new_n18590_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][14] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17612_ q=$abc$109383$new_n18591_
-.subckt a2_x2 i0=$abc$109383$new_n18591_ i1=$abc$109383$new_n18590_ q=$abc$109383$new_n18592_
-.subckt ao22_x2 i0=$abc$109383$new_n18592_ i1=$abc$109383$new_n18586_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n18593_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[11][14] i1=soc.cpu.minerva.gprf.mem._mem[9][14] q=$abc$109383$new_n18594_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][14] i1=soc.cpu.minerva.gprf.mem._mem[8][14] q=$abc$109383$new_n18595_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18595_ i1=$abc$109383$new_n18594_ q=$abc$109383$new_n18596_
-.subckt a2_x2 i0=$abc$109383$new_n18596_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18597_
-.subckt ao22_x2 i0=$abc$109383$new_n18597_ i1=$abc$109383$new_n18593_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n18598_
-.subckt ao22_x2 i0=$abc$109383$new_n18598_ i1=$abc$109383$new_n18582_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n18599_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[20][14] i1=soc.cpu.minerva.gprf.mem._mem[16][14] q=$abc$109383$new_n18600_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][14] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17612_ nq=$abc$109383$new_n18591_
+.subckt and2_x1 i0=$abc$109383$new_n18591_ i1=$abc$109383$new_n18590_ q=$abc$109383$new_n18592_
+.subckt and21nor_x1 i0=$abc$109383$new_n18592_ i1=$abc$109383$new_n18586_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n18593_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[11][14] i1=soc.cpu.minerva.gprf.mem._mem[9][14] q=$abc$109383$new_n18594_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][14] i1=soc.cpu.minerva.gprf.mem._mem[8][14] q=$abc$109383$new_n18595_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18595_ i1=$abc$109383$new_n18594_ q=$abc$109383$new_n18596_
+.subckt and2_x1 i0=$abc$109383$new_n18596_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18597_
+.subckt and21nor_x1 i0=$abc$109383$new_n18597_ i1=$abc$109383$new_n18593_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n18598_
+.subckt and21nor_x1 i0=$abc$109383$new_n18598_ i1=$abc$109383$new_n18582_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n18599_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[20][14] i1=soc.cpu.minerva.gprf.mem._mem[16][14] q=$abc$109383$new_n18600_
 .subckt nand2_x0 i0=$abc$109383$new_n18600_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n18601_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][14] nq=$abc$109383$new_n18602_
-.subckt ao22_x2 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n18602_ q=$abc$109383$new_n18603_
+.subckt and21nor_x1 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n18602_ nq=$abc$109383$new_n18603_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][14] nq=$abc$109383$new_n18604_
-.subckt oa22_x2 i0=$abc$109383$new_n18604_ i1=$abc$109383$new_n17724_ i2=$abc$109383$new_n17798_ q=$abc$109383$new_n18605_
-.subckt ao22_x2 i0=$abc$109383$new_n18605_ i1=$abc$109383$new_n18603_ i2=$abc$109383$new_n17544_ q=$abc$109383$new_n18606_
+.subckt or21nand_x1 i0=$abc$109383$new_n18604_ i1=$abc$109383$new_n17724_ i2=$abc$109383$new_n17798_ nq=$abc$109383$new_n18605_
+.subckt and21nor_x1 i0=$abc$109383$new_n18605_ i1=$abc$109383$new_n18603_ i2=$abc$109383$new_n17544_ nq=$abc$109383$new_n18606_
 .subckt nand2_x0 i0=$abc$109383$new_n18606_ i1=$abc$109383$new_n18601_ nq=$abc$109383$new_n18607_
-.subckt oa22_x2 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[23][14] q=$abc$109383$new_n18608_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][14] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n18609_
-.subckt a2_x2 i0=$abc$109383$new_n18609_ i1=$abc$109383$new_n18608_ q=$abc$109383$new_n18610_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[22][14] i1=soc.cpu.minerva.gprf.mem._mem[18][14] q=$abc$109383$new_n18611_
-.subckt oa22_x2 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n18611_ i2=$abc$109383$new_n17860_ q=$abc$109383$new_n18612_
-.subckt ao22_x2 i0=$abc$109383$new_n18612_ i1=$abc$109383$new_n18610_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n18613_
-.subckt a2_x2 i0=$abc$109383$new_n18613_ i1=$abc$109383$new_n18607_ q=$abc$109383$new_n18614_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[4][14] i1=soc.cpu.minerva.gprf.mem._mem[0][14] q=$abc$109383$new_n18615_
+.subckt or21nand_x1 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[23][14] nq=$abc$109383$new_n18608_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][14] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n18609_
+.subckt and2_x1 i0=$abc$109383$new_n18609_ i1=$abc$109383$new_n18608_ q=$abc$109383$new_n18610_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[22][14] i1=soc.cpu.minerva.gprf.mem._mem[18][14] q=$abc$109383$new_n18611_
+.subckt or21nand_x1 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n18611_ i2=$abc$109383$new_n17860_ nq=$abc$109383$new_n18612_
+.subckt and21nor_x1 i0=$abc$109383$new_n18612_ i1=$abc$109383$new_n18610_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n18613_
+.subckt and2_x1 i0=$abc$109383$new_n18613_ i1=$abc$109383$new_n18607_ q=$abc$109383$new_n18614_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[4][14] i1=soc.cpu.minerva.gprf.mem._mem[0][14] q=$abc$109383$new_n18615_
 .subckt nand2_x0 i0=$abc$109383$new_n18615_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n18616_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][14] nq=$abc$109383$new_n18617_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n18617_ nq=$abc$109383$new_n18618_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][14] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n18619_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][14] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n18619_
 .subckt nand2_x0 i0=$abc$109383$new_n18619_ i1=$abc$109383$new_n18618_ nq=$abc$109383$new_n18620_
 .subckt nand3_x0 i0=$abc$109383$new_n18620_ i1=$abc$109383$new_n18616_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n18621_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[6][14] i1=soc.cpu.minerva.gprf.mem._mem[2][14] q=$abc$109383$new_n18622_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[6][14] i1=soc.cpu.minerva.gprf.mem._mem[2][14] q=$abc$109383$new_n18622_
 .subckt nand2_x0 i0=$abc$109383$new_n18622_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n18623_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][14] nq=$abc$109383$new_n18624_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n18624_ nq=$abc$109383$new_n18625_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][14] i1=$abc$109383$new_n17555_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n18626_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][14] i1=$abc$109383$new_n17555_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n18626_
 .subckt nand2_x0 i0=$abc$109383$new_n18626_ i1=$abc$109383$new_n18625_ nq=$abc$109383$new_n18627_
 .subckt nand3_x0 i0=$abc$109383$new_n18627_ i1=$abc$109383$new_n18623_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n18628_
-.subckt a3_x2 i0=$abc$109383$new_n18628_ i1=$abc$109383$new_n18621_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18629_
-.subckt ao22_x2 i0=$abc$109383$new_n18629_ i1=$abc$109383$new_n18614_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n18630_
-.subckt o2_x2 i0=$abc$109383$new_n18630_ i1=$abc$109383$new_n18599_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[14]
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[20][15] i1=soc.cpu.minerva.gprf.mem._mem[16][15] q=$abc$109383$new_n18632_
+.subckt and3_x1 i0=$abc$109383$new_n18628_ i1=$abc$109383$new_n18621_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18629_
+.subckt and21nor_x1 i0=$abc$109383$new_n18629_ i1=$abc$109383$new_n18614_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n18630_
+.subckt or2_x1 i0=$abc$109383$new_n18630_ i1=$abc$109383$new_n18599_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[14]
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[20][15] i1=soc.cpu.minerva.gprf.mem._mem[16][15] q=$abc$109383$new_n18632_
 .subckt nand2_x0 i0=$abc$109383$new_n18632_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n18633_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][15] nq=$abc$109383$new_n18634_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=$abc$109383$new_n18634_ nq=$abc$109383$new_n18635_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][15] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n18636_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][15] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n18636_
 .subckt nand2_x0 i0=$abc$109383$new_n18636_ i1=$abc$109383$new_n18635_ nq=$abc$109383$new_n18637_
 .subckt nand3_x0 i0=$abc$109383$new_n18637_ i1=$abc$109383$new_n18633_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n18638_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][15] nq=$abc$109383$new_n18639_
 .subckt nand3_x0 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=$abc$109383$new_n18639_ nq=$abc$109383$new_n18640_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][15] i1=$abc$109383$new_n17588_ i2=$abc$109383$new_n17585_ q=$abc$109383$new_n18641_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][15] i1=$abc$109383$new_n17588_ i2=$abc$109383$new_n17585_ nq=$abc$109383$new_n18641_
 .subckt nand2_x0 i0=$abc$109383$new_n18641_ i1=$abc$109383$new_n18640_ nq=$abc$109383$new_n18642_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[22][15] i1=soc.cpu.minerva.gprf.mem._mem[18][15] q=$abc$109383$new_n18643_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[22][15] i1=soc.cpu.minerva.gprf.mem._mem[18][15] q=$abc$109383$new_n18643_
 .subckt nand2_x0 i0=$abc$109383$new_n18643_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n18644_
 .subckt nand3_x0 i0=$abc$109383$new_n18644_ i1=$abc$109383$new_n18642_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n18645_
-.subckt a3_x2 i0=$abc$109383$new_n18645_ i1=$abc$109383$new_n18638_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n18646_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][15] i1=soc.cpu.minerva.gprf.mem._mem[0][15] q=$abc$109383$new_n18647_
+.subckt and3_x1 i0=$abc$109383$new_n18645_ i1=$abc$109383$new_n18638_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n18646_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][15] i1=soc.cpu.minerva.gprf.mem._mem[0][15] q=$abc$109383$new_n18647_
 .subckt nand2_x0 i0=$abc$109383$new_n18647_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n18648_
-.subckt oa22_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[5][15] q=$abc$109383$new_n18649_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][15] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n18650_
+.subckt or21nand_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[5][15] nq=$abc$109383$new_n18649_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][15] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n18650_
 .subckt nand2_x0 i0=$abc$109383$new_n18650_ i1=$abc$109383$new_n18649_ nq=$abc$109383$new_n18651_
 .subckt nand3_x0 i0=$abc$109383$new_n18651_ i1=$abc$109383$new_n18648_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n18652_
 .subckt nand3_x0 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n16575_ nq=$abc$109383$new_n18653_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][15] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n18654_
-.subckt a2_x2 i0=$abc$109383$new_n18654_ i1=$abc$109383$new_n18653_ q=$abc$109383$new_n18655_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][15] i1=soc.cpu.minerva.gprf.mem._mem[2][15] q=$abc$109383$new_n18656_
-.subckt oa22_x2 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n18656_ i2=$abc$109383$new_n17736_ q=$abc$109383$new_n18657_
-.subckt ao22_x2 i0=$abc$109383$new_n18657_ i1=$abc$109383$new_n18655_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n18658_
-.subckt a2_x2 i0=$abc$109383$new_n18658_ i1=$abc$109383$new_n18652_ q=$abc$109383$new_n18659_
-.subckt ao22_x2 i0=$abc$109383$new_n18659_ i1=$abc$109383$new_n18646_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n18660_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[12][15] i1=soc.cpu.minerva.gprf.mem._mem[8][15] q=$abc$109383$new_n18661_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][15] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n18654_
+.subckt and2_x1 i0=$abc$109383$new_n18654_ i1=$abc$109383$new_n18653_ q=$abc$109383$new_n18655_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][15] i1=soc.cpu.minerva.gprf.mem._mem[2][15] q=$abc$109383$new_n18656_
+.subckt or21nand_x1 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n18656_ i2=$abc$109383$new_n17736_ nq=$abc$109383$new_n18657_
+.subckt and21nor_x1 i0=$abc$109383$new_n18657_ i1=$abc$109383$new_n18655_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n18658_
+.subckt and2_x1 i0=$abc$109383$new_n18658_ i1=$abc$109383$new_n18652_ q=$abc$109383$new_n18659_
+.subckt and21nor_x1 i0=$abc$109383$new_n18659_ i1=$abc$109383$new_n18646_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n18660_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[12][15] i1=soc.cpu.minerva.gprf.mem._mem[8][15] q=$abc$109383$new_n18661_
 .subckt nand2_x0 i0=$abc$109383$new_n18661_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n18662_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][15] nq=$abc$109383$new_n18663_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n18663_ nq=$abc$109383$new_n18664_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][15] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n18665_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][15] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n18665_
 .subckt nand2_x0 i0=$abc$109383$new_n18665_ i1=$abc$109383$new_n18664_ nq=$abc$109383$new_n18666_
 .subckt nand3_x0 i0=$abc$109383$new_n18666_ i1=$abc$109383$new_n18662_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n18667_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][15] nq=$abc$109383$new_n18668_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=$abc$109383$new_n18668_ nq=$abc$109383$new_n18669_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][15] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n18670_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][15] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n18670_
 .subckt nand2_x0 i0=$abc$109383$new_n18670_ i1=$abc$109383$new_n18669_ nq=$abc$109383$new_n18671_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[14][15] i1=soc.cpu.minerva.gprf.mem._mem[10][15] q=$abc$109383$new_n18672_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[14][15] i1=soc.cpu.minerva.gprf.mem._mem[10][15] q=$abc$109383$new_n18672_
 .subckt nand2_x0 i0=$abc$109383$new_n18672_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n18673_
 .subckt nand3_x0 i0=$abc$109383$new_n18673_ i1=$abc$109383$new_n18671_ i2=$abc$109383$new_n17599_ nq=$abc$109383$new_n18674_
-.subckt a3_x2 i0=$abc$109383$new_n18674_ i1=$abc$109383$new_n18667_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n18675_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[30][15] i1=soc.cpu.minerva.gprf.mem._mem[26][15] q=$abc$109383$new_n18676_
-.subckt a2_x2 i0=$abc$109383$new_n18676_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18677_
+.subckt and3_x1 i0=$abc$109383$new_n18674_ i1=$abc$109383$new_n18667_ i2=$abc$109383$new_n17691_ q=$abc$109383$new_n18675_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[30][15] i1=soc.cpu.minerva.gprf.mem._mem[26][15] q=$abc$109383$new_n18676_
+.subckt and2_x1 i0=$abc$109383$new_n18676_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n18677_
 .subckt nand3_x0 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=$abc$109383$new_n16593_ nq=$abc$109383$new_n18678_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][15] i1=$abc$109383$new_n17620_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n18679_
-.subckt a2_x2 i0=$abc$109383$new_n18679_ i1=$abc$109383$new_n18678_ q=$abc$109383$new_n18680_
-.subckt ao22_x2 i0=$abc$109383$new_n18680_ i1=$abc$109383$new_n18677_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n18681_
-.subckt mx2_x2 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[28][15] i1=soc.cpu.minerva.gprf.mem._mem[24][15] q=$abc$109383$new_n18682_
-.subckt a2_x2 i0=$abc$109383$new_n18682_ i1=$abc$109383$new_n17798_ q=$abc$109383$new_n18683_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][15] i1=$abc$109383$new_n17620_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n18679_
+.subckt and2_x1 i0=$abc$109383$new_n18679_ i1=$abc$109383$new_n18678_ q=$abc$109383$new_n18680_
+.subckt and21nor_x1 i0=$abc$109383$new_n18680_ i1=$abc$109383$new_n18677_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n18681_
+.subckt mux2_x1 cmd=$abc$109383$new_n18000_ i0=soc.cpu.minerva.gprf.mem._mem[28][15] i1=soc.cpu.minerva.gprf.mem._mem[24][15] q=$abc$109383$new_n18682_
+.subckt and2_x1 i0=$abc$109383$new_n18682_ i1=$abc$109383$new_n17798_ q=$abc$109383$new_n18683_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][15] nq=$abc$109383$new_n18684_
 .subckt nand3_x0 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=$abc$109383$new_n18684_ nq=$abc$109383$new_n18685_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][15] i1=$abc$109383$new_n17602_ i2=$abc$109383$new_n17647_ q=$abc$109383$new_n18686_
-.subckt a2_x2 i0=$abc$109383$new_n18686_ i1=$abc$109383$new_n18685_ q=$abc$109383$new_n18687_
-.subckt ao22_x2 i0=$abc$109383$new_n18687_ i1=$abc$109383$new_n18683_ i2=$abc$109383$new_n17671_ q=$abc$109383$new_n18688_
-.subckt ao22_x2 i0=$abc$109383$new_n18688_ i1=$abc$109383$new_n18681_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n18689_
-.subckt ao22_x2 i0=$abc$109383$new_n18689_ i1=$abc$109383$new_n18675_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n18690_
-.subckt o2_x2 i0=$abc$109383$new_n18690_ i1=$abc$109383$new_n18660_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[15]
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][15] i1=$abc$109383$new_n17602_ i2=$abc$109383$new_n17647_ nq=$abc$109383$new_n18686_
+.subckt and2_x1 i0=$abc$109383$new_n18686_ i1=$abc$109383$new_n18685_ q=$abc$109383$new_n18687_
+.subckt and21nor_x1 i0=$abc$109383$new_n18687_ i1=$abc$109383$new_n18683_ i2=$abc$109383$new_n17671_ nq=$abc$109383$new_n18688_
+.subckt and21nor_x1 i0=$abc$109383$new_n18688_ i1=$abc$109383$new_n18681_ i2=$abc$109383$new_n17752_ nq=$abc$109383$new_n18689_
+.subckt and21nor_x1 i0=$abc$109383$new_n18689_ i1=$abc$109383$new_n18675_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n18690_
+.subckt or2_x1 i0=$abc$109383$new_n18690_ i1=$abc$109383$new_n18660_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[15]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[23][16] nq=$abc$109383$new_n18692_
-.subckt oa22_x2 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18692_ q=$abc$109383$new_n18693_
+.subckt or21nand_x1 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18692_ nq=$abc$109383$new_n18693_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][16] nq=$abc$109383$new_n18694_
-.subckt ao22_x2 i0=$abc$109383$new_n18694_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n18695_
+.subckt and21nor_x1 i0=$abc$109383$new_n18694_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n18695_
 .subckt nand2_x0 i0=$abc$109383$new_n18695_ i1=$abc$109383$new_n18693_ nq=$abc$109383$new_n18696_
-.subckt a3_x2 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n15552_ i2=soc.cpu.minerva.fetch.ibus_rdata[21] q=$abc$109383$new_n18697_
-.subckt ao22_x2 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n17576_ q=$abc$109383$new_n18698_
+.subckt and3_x1 i0=$abc$109383$new_n15553_ i1=$abc$109383$new_n15552_ i2=soc.cpu.minerva.fetch.ibus_rdata[21] q=$abc$109383$new_n18697_
+.subckt and21nor_x1 i0=$abc$109383$new_n17849_ i1=$abc$109383$new_n17846_ i2=$abc$109383$new_n17576_ nq=$abc$109383$new_n18698_
 .subckt buf_x4 i=$abc$109383$new_n18698_ q=$abc$109383$new_n18699_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][16] q=$abc$109383$new_n18700_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[20][16] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n18701_
-.subckt ao22_x2 i0=$abc$109383$new_n18701_ i1=$abc$109383$new_n18700_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n18702_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][16] nq=$abc$109383$new_n18700_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[20][16] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n18701_
+.subckt and21nor_x1 i0=$abc$109383$new_n18701_ i1=$abc$109383$new_n18700_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n18702_
 .subckt nand2_x0 i0=$abc$109383$new_n18702_ i1=$abc$109383$new_n18696_ nq=$abc$109383$new_n18703_
 .subckt nand3_x0 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[6][16] nq=$abc$109383$new_n18704_
-.subckt ao22_x2 i0=$abc$109383$new_n16636_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n18228_ q=$abc$109383$new_n18705_
+.subckt and21nor_x1 i0=$abc$109383$new_n16636_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n18228_ nq=$abc$109383$new_n18705_
 .subckt nand2_x0 i0=$abc$109383$new_n18705_ i1=$abc$109383$new_n18704_ nq=$abc$109383$new_n18706_
-.subckt a3_x2 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][16] q=$abc$109383$new_n18707_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][16] i1=$abc$109383$new_n17662_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n18708_
-.subckt ao22_x2 i0=$abc$109383$new_n18708_ i1=$abc$109383$new_n18707_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n18709_
+.subckt and3_x1 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][16] q=$abc$109383$new_n18707_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][16] i1=$abc$109383$new_n17662_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n18708_
+.subckt and21nor_x1 i0=$abc$109383$new_n18708_ i1=$abc$109383$new_n18707_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n18709_
 .subckt nand2_x0 i0=$abc$109383$new_n18709_ i1=$abc$109383$new_n18706_ nq=$abc$109383$new_n18710_
-.subckt oa22_x2 i0=$abc$109383$new_n18710_ i1=$abc$109383$new_n18703_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n18711_
+.subckt or21nand_x1 i0=$abc$109383$new_n18710_ i1=$abc$109383$new_n18703_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n18711_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][16] nq=$abc$109383$new_n18712_
 .subckt nand3_x0 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18712_ nq=$abc$109383$new_n18713_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][16] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n18714_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][16] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n18714_
 .subckt nand2_x0 i0=$abc$109383$new_n18714_ i1=$abc$109383$new_n18713_ nq=$abc$109383$new_n18715_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][16] nq=$abc$109383$new_n18716_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n18716_ nq=$abc$109383$new_n18717_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][16] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n18718_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][16] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n18718_
 .subckt nand2_x0 i0=$abc$109383$new_n18718_ i1=$abc$109383$new_n18717_ nq=$abc$109383$new_n18719_
-.subckt oa22_x2 i0=$abc$109383$new_n18719_ i1=$abc$109383$new_n18715_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n18720_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[15][16] i1=soc.cpu.minerva.gprf.mem._mem[13][16] q=$abc$109383$new_n18721_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][16] i1=soc.cpu.minerva.gprf.mem._mem[12][16] q=$abc$109383$new_n18722_
-.subckt mx2_x2 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n18722_ i1=$abc$109383$new_n18721_ q=$abc$109383$new_n18723_
+.subckt or21nand_x1 i0=$abc$109383$new_n18719_ i1=$abc$109383$new_n18715_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n18720_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[15][16] i1=soc.cpu.minerva.gprf.mem._mem[13][16] q=$abc$109383$new_n18721_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][16] i1=soc.cpu.minerva.gprf.mem._mem[12][16] q=$abc$109383$new_n18722_
+.subckt mux2_x1 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n18722_ i1=$abc$109383$new_n18721_ q=$abc$109383$new_n18723_
 .subckt nand2_x0 i0=$abc$109383$new_n18723_ i1=$abc$109383$new_n17691_ nq=$abc$109383$new_n18724_
-.subckt oa22_x2 i0=$abc$109383$new_n18724_ i1=$abc$109383$new_n18720_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n18725_
-.subckt oa22_x2 i0=$abc$109383$new_n18725_ i1=$abc$109383$new_n18711_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n18726_
+.subckt or21nand_x1 i0=$abc$109383$new_n18724_ i1=$abc$109383$new_n18720_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n18725_
+.subckt or21nand_x1 i0=$abc$109383$new_n18725_ i1=$abc$109383$new_n18711_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n18726_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][16] nq=$abc$109383$new_n18727_
 .subckt nand3_x0 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18727_ nq=$abc$109383$new_n18728_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][16] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n18729_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][16] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n18729_
 .subckt nand2_x0 i0=$abc$109383$new_n18729_ i1=$abc$109383$new_n18728_ nq=$abc$109383$new_n18730_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][16] nq=$abc$109383$new_n18731_
 .subckt nand3_x0 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18731_ nq=$abc$109383$new_n18732_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][16] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n18733_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][16] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n18733_
 .subckt nand2_x0 i0=$abc$109383$new_n18733_ i1=$abc$109383$new_n18732_ nq=$abc$109383$new_n18734_
-.subckt oa22_x2 i0=$abc$109383$new_n18734_ i1=$abc$109383$new_n18730_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18735_
-.subckt mx2_x2 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[11][16] i1=soc.cpu.minerva.gprf.mem._mem[9][16] q=$abc$109383$new_n18736_
-.subckt mx2_x2 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[10][16] i1=soc.cpu.minerva.gprf.mem._mem[8][16] q=$abc$109383$new_n18737_
-.subckt mx2_x2 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n18737_ i1=$abc$109383$new_n18736_ q=$abc$109383$new_n18738_
+.subckt or21nand_x1 i0=$abc$109383$new_n18734_ i1=$abc$109383$new_n18730_ i2=$abc$109383$new_n17866_ nq=$abc$109383$new_n18735_
+.subckt mux2_x1 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[11][16] i1=soc.cpu.minerva.gprf.mem._mem[9][16] q=$abc$109383$new_n18736_
+.subckt mux2_x1 cmd=$abc$109383$new_n17543_ i0=soc.cpu.minerva.gprf.mem._mem[10][16] i1=soc.cpu.minerva.gprf.mem._mem[8][16] q=$abc$109383$new_n18737_
+.subckt mux2_x1 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n18737_ i1=$abc$109383$new_n18736_ q=$abc$109383$new_n18738_
 .subckt nand2_x0 i0=$abc$109383$new_n18738_ i1=$abc$109383$new_n18234_ nq=$abc$109383$new_n18739_
-.subckt oa22_x2 i0=$abc$109383$new_n18739_ i1=$abc$109383$new_n18735_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n18740_
+.subckt or21nand_x1 i0=$abc$109383$new_n18739_ i1=$abc$109383$new_n18735_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n18740_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][16] nq=$abc$109383$new_n18741_
-.subckt oa22_x2 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18741_ q=$abc$109383$new_n18742_
+.subckt or21nand_x1 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18741_ nq=$abc$109383$new_n18742_
 .subckt buf_x4 i=$abc$109383$new_n17714_ q=$abc$109383$new_n18743_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][16] nq=$abc$109383$new_n18744_
-.subckt ao22_x2 i0=$abc$109383$new_n18744_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n18745_
+.subckt and21nor_x1 i0=$abc$109383$new_n18744_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n18745_
 .subckt nand2_x0 i0=$abc$109383$new_n18745_ i1=$abc$109383$new_n18742_ nq=$abc$109383$new_n18746_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][16] q=$abc$109383$new_n18747_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[16][16] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17648_ q=$abc$109383$new_n18748_
-.subckt ao22_x2 i0=$abc$109383$new_n18748_ i1=$abc$109383$new_n18747_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n18749_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][16] nq=$abc$109383$new_n18747_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[16][16] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17648_ nq=$abc$109383$new_n18748_
+.subckt and21nor_x1 i0=$abc$109383$new_n18748_ i1=$abc$109383$new_n18747_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n18749_
 .subckt nand2_x0 i0=$abc$109383$new_n18749_ i1=$abc$109383$new_n18746_ nq=$abc$109383$new_n18750_
 .subckt nand3_x0 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[2][16] nq=$abc$109383$new_n18751_
-.subckt ao22_x2 i0=$abc$109383$new_n16635_ i1=$abc$109383$new_n17549_ i2=$abc$109383$new_n18743_ q=$abc$109383$new_n18752_
+.subckt and21nor_x1 i0=$abc$109383$new_n16635_ i1=$abc$109383$new_n17549_ i2=$abc$109383$new_n18743_ nq=$abc$109383$new_n18752_
 .subckt nand2_x0 i0=$abc$109383$new_n18752_ i1=$abc$109383$new_n18751_ nq=$abc$109383$new_n18753_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][16] q=$abc$109383$new_n18754_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][16] i1=$abc$109383$new_n17815_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n18755_
-.subckt ao22_x2 i0=$abc$109383$new_n18755_ i1=$abc$109383$new_n18754_ i2=$abc$109383$new_n18233_ q=$abc$109383$new_n18756_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][16] q=$abc$109383$new_n18754_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][16] i1=$abc$109383$new_n17815_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n18755_
+.subckt and21nor_x1 i0=$abc$109383$new_n18755_ i1=$abc$109383$new_n18754_ i2=$abc$109383$new_n18233_ nq=$abc$109383$new_n18756_
 .subckt nand2_x0 i0=$abc$109383$new_n18756_ i1=$abc$109383$new_n18753_ nq=$abc$109383$new_n18757_
-.subckt oa22_x2 i0=$abc$109383$new_n18757_ i1=$abc$109383$new_n18750_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n18758_
-.subckt oa22_x2 i0=$abc$109383$new_n18758_ i1=$abc$109383$new_n18740_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n18759_
+.subckt or21nand_x1 i0=$abc$109383$new_n18757_ i1=$abc$109383$new_n18750_ i2=$abc$109383$new_n17539_ nq=$abc$109383$new_n18758_
+.subckt or21nand_x1 i0=$abc$109383$new_n18758_ i1=$abc$109383$new_n18740_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n18759_
 .subckt nand2_x0 i0=$abc$109383$new_n18759_ i1=$abc$109383$new_n18726_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[16]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][17] nq=$abc$109383$new_n18761_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n18761_ nq=$abc$109383$new_n18762_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][17] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17548_ q=$abc$109383$new_n18763_
-.subckt a2_x2 i0=$abc$109383$new_n18763_ i1=$abc$109383$new_n18762_ q=$abc$109383$new_n18764_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][17] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17548_ nq=$abc$109383$new_n18763_
+.subckt and2_x1 i0=$abc$109383$new_n18763_ i1=$abc$109383$new_n18762_ q=$abc$109383$new_n18764_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][17] nq=$abc$109383$new_n18765_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n18765_ nq=$abc$109383$new_n18766_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][17] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17655_ q=$abc$109383$new_n18767_
-.subckt a2_x2 i0=$abc$109383$new_n18767_ i1=$abc$109383$new_n18766_ q=$abc$109383$new_n18768_
-.subckt ao22_x2 i0=$abc$109383$new_n18768_ i1=$abc$109383$new_n18764_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n18769_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[15][17] i1=soc.cpu.minerva.gprf.mem._mem[13][17] q=$abc$109383$new_n18770_
-.subckt mx2_x2 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[14][17] i1=soc.cpu.minerva.gprf.mem._mem[12][17] q=$abc$109383$new_n18771_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18771_ i1=$abc$109383$new_n18770_ q=$abc$109383$new_n18772_
-.subckt a2_x2 i0=$abc$109383$new_n18772_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18773_
-.subckt ao22_x2 i0=$abc$109383$new_n18773_ i1=$abc$109383$new_n18769_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n18774_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][17] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17655_ nq=$abc$109383$new_n18767_
+.subckt and2_x1 i0=$abc$109383$new_n18767_ i1=$abc$109383$new_n18766_ q=$abc$109383$new_n18768_
+.subckt and21nor_x1 i0=$abc$109383$new_n18768_ i1=$abc$109383$new_n18764_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n18769_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[15][17] i1=soc.cpu.minerva.gprf.mem._mem[13][17] q=$abc$109383$new_n18770_
+.subckt mux2_x1 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[14][17] i1=soc.cpu.minerva.gprf.mem._mem[12][17] q=$abc$109383$new_n18771_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n18771_ i1=$abc$109383$new_n18770_ q=$abc$109383$new_n18772_
+.subckt and2_x1 i0=$abc$109383$new_n18772_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18773_
+.subckt and21nor_x1 i0=$abc$109383$new_n18773_ i1=$abc$109383$new_n18769_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n18774_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][17] nq=$abc$109383$new_n18775_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n18775_ nq=$abc$109383$new_n18776_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][17] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17548_ q=$abc$109383$new_n18777_
-.subckt a2_x2 i0=$abc$109383$new_n18777_ i1=$abc$109383$new_n18776_ q=$abc$109383$new_n18778_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][17] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17548_ nq=$abc$109383$new_n18777_
+.subckt and2_x1 i0=$abc$109383$new_n18777_ i1=$abc$109383$new_n18776_ q=$abc$109383$new_n18778_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][17] nq=$abc$109383$new_n18779_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n18779_ nq=$abc$109383$new_n18780_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][17] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n18781_
-.subckt a2_x2 i0=$abc$109383$new_n18781_ i1=$abc$109383$new_n18780_ q=$abc$109383$new_n18782_
-.subckt ao22_x2 i0=$abc$109383$new_n18782_ i1=$abc$109383$new_n18778_ i2=$abc$109383$new_n17638_ q=$abc$109383$new_n18783_
-.subckt mx2_x2 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[11][17] i1=soc.cpu.minerva.gprf.mem._mem[9][17] q=$abc$109383$new_n18784_
-.subckt mx2_x2 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[10][17] i1=soc.cpu.minerva.gprf.mem._mem[8][17] q=$abc$109383$new_n18785_
-.subckt mx2_x2 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n18785_ i1=$abc$109383$new_n18784_ q=$abc$109383$new_n18786_
-.subckt a2_x2 i0=$abc$109383$new_n18786_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18787_
-.subckt ao22_x2 i0=$abc$109383$new_n18787_ i1=$abc$109383$new_n18783_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n18788_
-.subckt ao22_x2 i0=$abc$109383$new_n18788_ i1=$abc$109383$new_n18774_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n18789_
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][17] i1=soc.cpu.minerva.gprf.mem._mem[16][17] q=$abc$109383$new_n18790_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][17] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n18781_
+.subckt and2_x1 i0=$abc$109383$new_n18781_ i1=$abc$109383$new_n18780_ q=$abc$109383$new_n18782_
+.subckt and21nor_x1 i0=$abc$109383$new_n18782_ i1=$abc$109383$new_n18778_ i2=$abc$109383$new_n17638_ nq=$abc$109383$new_n18783_
+.subckt mux2_x1 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[11][17] i1=soc.cpu.minerva.gprf.mem._mem[9][17] q=$abc$109383$new_n18784_
+.subckt mux2_x1 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[10][17] i1=soc.cpu.minerva.gprf.mem._mem[8][17] q=$abc$109383$new_n18785_
+.subckt mux2_x1 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n18785_ i1=$abc$109383$new_n18784_ q=$abc$109383$new_n18786_
+.subckt and2_x1 i0=$abc$109383$new_n18786_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n18787_
+.subckt and21nor_x1 i0=$abc$109383$new_n18787_ i1=$abc$109383$new_n18783_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n18788_
+.subckt and21nor_x1 i0=$abc$109383$new_n18788_ i1=$abc$109383$new_n18774_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n18789_
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][17] i1=soc.cpu.minerva.gprf.mem._mem[16][17] q=$abc$109383$new_n18790_
 .subckt nand2_x0 i0=$abc$109383$new_n18790_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n18791_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][17] nq=$abc$109383$new_n18792_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n18792_ nq=$abc$109383$new_n18793_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][17] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ q=$abc$109383$new_n18794_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][17] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ nq=$abc$109383$new_n18794_
 .subckt nand2_x0 i0=$abc$109383$new_n18794_ i1=$abc$109383$new_n18793_ nq=$abc$109383$new_n18795_
 .subckt nand3_x0 i0=$abc$109383$new_n18795_ i1=$abc$109383$new_n18791_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n18796_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][17] i1=soc.cpu.minerva.gprf.mem._mem[18][17] q=$abc$109383$new_n18797_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][17] i1=soc.cpu.minerva.gprf.mem._mem[18][17] q=$abc$109383$new_n18797_
 .subckt nand2_x0 i0=$abc$109383$new_n18797_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n18798_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][17] nq=$abc$109383$new_n18799_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18799_ nq=$abc$109383$new_n18800_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][17] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n18801_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][17] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n18801_
 .subckt nand2_x0 i0=$abc$109383$new_n18801_ i1=$abc$109383$new_n18800_ nq=$abc$109383$new_n18802_
 .subckt nand3_x0 i0=$abc$109383$new_n18802_ i1=$abc$109383$new_n18798_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n18803_
 .subckt nand3_x0 i0=$abc$109383$new_n18803_ i1=$abc$109383$new_n18796_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n18804_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[7][17] i1=soc.cpu.minerva.gprf.mem._mem[3][17] q=$abc$109383$new_n18805_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[6][17] i1=soc.cpu.minerva.gprf.mem._mem[2][17] q=$abc$109383$new_n18806_
-.subckt mx2_x2 cmd=$abc$109383$new_n17570_ i0=$abc$109383$new_n18806_ i1=$abc$109383$new_n18805_ q=$abc$109383$new_n18807_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[7][17] i1=soc.cpu.minerva.gprf.mem._mem[3][17] q=$abc$109383$new_n18805_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[6][17] i1=soc.cpu.minerva.gprf.mem._mem[2][17] q=$abc$109383$new_n18806_
+.subckt mux2_x1 cmd=$abc$109383$new_n17570_ i0=$abc$109383$new_n18806_ i1=$abc$109383$new_n18805_ q=$abc$109383$new_n18807_
 .subckt buf_x4 i=$abc$109383$new_n17553_ q=$abc$109383$new_n18808_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[5][17] i1=soc.cpu.minerva.gprf.mem._mem[1][17] q=$abc$109383$new_n18809_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[4][17] i1=soc.cpu.minerva.gprf.mem._mem[0][17] q=$abc$109383$new_n18810_
-.subckt mx2_x2 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n18810_ i1=$abc$109383$new_n18809_ q=$abc$109383$new_n18811_
-.subckt mx2_x2 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n18811_ i1=$abc$109383$new_n18807_ q=$abc$109383$new_n18812_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[5][17] i1=soc.cpu.minerva.gprf.mem._mem[1][17] q=$abc$109383$new_n18809_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[4][17] i1=soc.cpu.minerva.gprf.mem._mem[0][17] q=$abc$109383$new_n18810_
+.subckt mux2_x1 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n18810_ i1=$abc$109383$new_n18809_ q=$abc$109383$new_n18811_
+.subckt mux2_x1 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n18811_ i1=$abc$109383$new_n18807_ q=$abc$109383$new_n18812_
 .subckt nand2_x0 i0=$abc$109383$new_n18812_ i1=$abc$109383$new_n17692_ nq=$abc$109383$new_n18813_
 .subckt nand2_x0 i0=$abc$109383$new_n18813_ i1=$abc$109383$new_n18804_ nq=$abc$109383$new_n18814_
-.subckt oa22_x2 i0=$abc$109383$new_n17927_ i1=$abc$109383$new_n18814_ i2=$abc$109383$new_n18789_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[17]
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][18] i1=soc.cpu.minerva.gprf.mem._mem[16][18] q=$abc$109383$new_n18816_
+.subckt or21nand_x1 i0=$abc$109383$new_n17927_ i1=$abc$109383$new_n18814_ i2=$abc$109383$new_n18789_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[17]
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][18] i1=soc.cpu.minerva.gprf.mem._mem[16][18] q=$abc$109383$new_n18816_
 .subckt nand2_x0 i0=$abc$109383$new_n18816_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n18817_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][18] nq=$abc$109383$new_n18818_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n18818_ nq=$abc$109383$new_n18819_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][18] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n18820_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][18] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n18820_
 .subckt nand2_x0 i0=$abc$109383$new_n18820_ i1=$abc$109383$new_n18819_ nq=$abc$109383$new_n18821_
 .subckt nand3_x0 i0=$abc$109383$new_n18821_ i1=$abc$109383$new_n18817_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n18822_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][18] i1=soc.cpu.minerva.gprf.mem._mem[18][18] q=$abc$109383$new_n18823_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][18] i1=soc.cpu.minerva.gprf.mem._mem[18][18] q=$abc$109383$new_n18823_
 .subckt nand2_x0 i0=$abc$109383$new_n18823_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18824_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][18] nq=$abc$109383$new_n18825_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n18825_ nq=$abc$109383$new_n18826_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][18] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n18827_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][18] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n18827_
 .subckt nand2_x0 i0=$abc$109383$new_n18827_ i1=$abc$109383$new_n18826_ nq=$abc$109383$new_n18828_
 .subckt nand3_x0 i0=$abc$109383$new_n18828_ i1=$abc$109383$new_n18824_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n18829_
 .subckt nand3_x0 i0=$abc$109383$new_n18829_ i1=$abc$109383$new_n18822_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n18830_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[6][18] i1=soc.cpu.minerva.gprf.mem._mem[2][18] q=$abc$109383$new_n18831_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[6][18] i1=soc.cpu.minerva.gprf.mem._mem[2][18] q=$abc$109383$new_n18831_
 .subckt nand2_x0 i0=$abc$109383$new_n18831_ i1=$abc$109383$new_n17765_ nq=$abc$109383$new_n18832_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][18] nq=$abc$109383$new_n18833_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n18833_ nq=$abc$109383$new_n18834_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][18] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ q=$abc$109383$new_n18835_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][18] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17771_ nq=$abc$109383$new_n18835_
 .subckt nand2_x0 i0=$abc$109383$new_n18835_ i1=$abc$109383$new_n18834_ nq=$abc$109383$new_n18836_
 .subckt nand3_x0 i0=$abc$109383$new_n18836_ i1=$abc$109383$new_n18832_ i2=$abc$109383$new_n17716_ nq=$abc$109383$new_n18837_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[4][18] i1=soc.cpu.minerva.gprf.mem._mem[0][18] q=$abc$109383$new_n18838_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[4][18] i1=soc.cpu.minerva.gprf.mem._mem[0][18] q=$abc$109383$new_n18838_
 .subckt nand2_x0 i0=$abc$109383$new_n18838_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18839_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][18] nq=$abc$109383$new_n18840_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n18840_ nq=$abc$109383$new_n18841_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][18] i1=$abc$109383$new_n17698_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n18842_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][18] i1=$abc$109383$new_n17698_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n18842_
 .subckt nand2_x0 i0=$abc$109383$new_n18842_ i1=$abc$109383$new_n18841_ nq=$abc$109383$new_n18843_
 .subckt nand3_x0 i0=$abc$109383$new_n18843_ i1=$abc$109383$new_n18839_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18844_
 .subckt nand3_x0 i0=$abc$109383$new_n18844_ i1=$abc$109383$new_n18837_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n18845_
-.subckt oa22_x2 i0=$abc$109383$new_n18845_ i1=$abc$109383$new_n18830_ i2=$abc$109383$new_n17689_ q=$abc$109383$new_n18846_
-.subckt mx2_x2 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[12][18] i1=soc.cpu.minerva.gprf.mem._mem[8][18] q=$abc$109383$new_n18847_
+.subckt or21nand_x1 i0=$abc$109383$new_n18845_ i1=$abc$109383$new_n18830_ i2=$abc$109383$new_n17689_ nq=$abc$109383$new_n18846_
+.subckt mux2_x1 cmd=$abc$109383$new_n17698_ i0=soc.cpu.minerva.gprf.mem._mem[12][18] i1=soc.cpu.minerva.gprf.mem._mem[8][18] q=$abc$109383$new_n18847_
 .subckt nand2_x0 i0=$abc$109383$new_n18847_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n18848_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][18] nq=$abc$109383$new_n18849_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18849_ nq=$abc$109383$new_n18850_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][18] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n18851_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][18] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n18851_
 .subckt nand2_x0 i0=$abc$109383$new_n18851_ i1=$abc$109383$new_n18850_ nq=$abc$109383$new_n18852_
 .subckt nand3_x0 i0=$abc$109383$new_n18852_ i1=$abc$109383$new_n18848_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n18853_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][18] nq=$abc$109383$new_n18854_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n18854_ nq=$abc$109383$new_n18855_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][18] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n18856_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][18] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n18856_
 .subckt nand2_x0 i0=$abc$109383$new_n18856_ i1=$abc$109383$new_n18855_ nq=$abc$109383$new_n18857_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[14][18] i1=soc.cpu.minerva.gprf.mem._mem[10][18] q=$abc$109383$new_n18858_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[14][18] i1=soc.cpu.minerva.gprf.mem._mem[10][18] q=$abc$109383$new_n18858_
 .subckt nand2_x0 i0=$abc$109383$new_n18858_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18859_
 .subckt nand3_x0 i0=$abc$109383$new_n18859_ i1=$abc$109383$new_n18857_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n18860_
 .subckt nand3_x0 i0=$abc$109383$new_n18860_ i1=$abc$109383$new_n18853_ i2=$abc$109383$new_n17692_ nq=$abc$109383$new_n18861_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[30][18] i1=soc.cpu.minerva.gprf.mem._mem[26][18] q=$abc$109383$new_n18862_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[30][18] i1=soc.cpu.minerva.gprf.mem._mem[26][18] q=$abc$109383$new_n18862_
 .subckt nand2_x0 i0=$abc$109383$new_n18862_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n18863_
-.subckt oa22_x2 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=soc.cpu.minerva.gprf.mem._mem[31][18] q=$abc$109383$new_n18864_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][18] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17662_ q=$abc$109383$new_n18865_
+.subckt or21nand_x1 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=soc.cpu.minerva.gprf.mem._mem[31][18] nq=$abc$109383$new_n18864_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][18] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17662_ nq=$abc$109383$new_n18865_
 .subckt nand2_x0 i0=$abc$109383$new_n18865_ i1=$abc$109383$new_n18864_ nq=$abc$109383$new_n18866_
-.subckt oa22_x2 i0=$abc$109383$new_n18866_ i1=$abc$109383$new_n18863_ i2=$abc$109383$new_n17737_ q=$abc$109383$new_n18867_
-.subckt mx2_x2 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[28][18] i1=soc.cpu.minerva.gprf.mem._mem[24][18] q=$abc$109383$new_n18868_
+.subckt or21nand_x1 i0=$abc$109383$new_n18866_ i1=$abc$109383$new_n18863_ i2=$abc$109383$new_n17737_ nq=$abc$109383$new_n18867_
+.subckt mux2_x1 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[28][18] i1=soc.cpu.minerva.gprf.mem._mem[24][18] q=$abc$109383$new_n18868_
 .subckt nand2_x0 i0=$abc$109383$new_n18868_ i1=$abc$109383$new_n17947_ nq=$abc$109383$new_n18869_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][18] nq=$abc$109383$new_n18870_
 .subckt nand3_x0 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=$abc$109383$new_n18870_ nq=$abc$109383$new_n18871_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][18] i1=$abc$109383$new_n17867_ i2=$abc$109383$new_n17648_ q=$abc$109383$new_n18872_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][18] i1=$abc$109383$new_n17867_ i2=$abc$109383$new_n17648_ nq=$abc$109383$new_n18872_
 .subckt nand2_x0 i0=$abc$109383$new_n18872_ i1=$abc$109383$new_n18871_ nq=$abc$109383$new_n18873_
-.subckt oa22_x2 i0=$abc$109383$new_n18873_ i1=$abc$109383$new_n18869_ i2=$abc$109383$new_n18228_ q=$abc$109383$new_n18874_
-.subckt oa22_x2 i0=$abc$109383$new_n18874_ i1=$abc$109383$new_n18867_ i2=$abc$109383$new_n18234_ q=$abc$109383$new_n18875_
-.subckt oa22_x2 i0=$abc$109383$new_n18875_ i1=$abc$109383$new_n18861_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n18876_
+.subckt or21nand_x1 i0=$abc$109383$new_n18873_ i1=$abc$109383$new_n18869_ i2=$abc$109383$new_n18228_ nq=$abc$109383$new_n18874_
+.subckt or21nand_x1 i0=$abc$109383$new_n18874_ i1=$abc$109383$new_n18867_ i2=$abc$109383$new_n18234_ nq=$abc$109383$new_n18875_
+.subckt or21nand_x1 i0=$abc$109383$new_n18875_ i1=$abc$109383$new_n18861_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n18876_
 .subckt nand2_x0 i0=$abc$109383$new_n18876_ i1=$abc$109383$new_n18846_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[18]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[23][19] nq=$abc$109383$new_n18878_
-.subckt oa22_x2 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18878_ q=$abc$109383$new_n18879_
+.subckt or21nand_x1 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18878_ nq=$abc$109383$new_n18879_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][19] nq=$abc$109383$new_n18880_
-.subckt ao22_x2 i0=$abc$109383$new_n18880_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n18881_
+.subckt and21nor_x1 i0=$abc$109383$new_n18880_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n18881_
 .subckt nand2_x0 i0=$abc$109383$new_n18881_ i1=$abc$109383$new_n18879_ nq=$abc$109383$new_n18882_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][19] q=$abc$109383$new_n18883_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[20][19] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17662_ q=$abc$109383$new_n18884_
-.subckt ao22_x2 i0=$abc$109383$new_n18884_ i1=$abc$109383$new_n18883_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n18885_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][19] nq=$abc$109383$new_n18883_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[20][19] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17662_ nq=$abc$109383$new_n18884_
+.subckt and21nor_x1 i0=$abc$109383$new_n18884_ i1=$abc$109383$new_n18883_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n18885_
 .subckt nand2_x0 i0=$abc$109383$new_n18885_ i1=$abc$109383$new_n18882_ nq=$abc$109383$new_n18886_
 .subckt nand3_x0 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[6][19] nq=$abc$109383$new_n18887_
-.subckt ao22_x2 i0=$abc$109383$new_n16806_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n18743_ q=$abc$109383$new_n18888_
+.subckt and21nor_x1 i0=$abc$109383$new_n16806_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n18743_ nq=$abc$109383$new_n18888_
 .subckt nand2_x0 i0=$abc$109383$new_n18888_ i1=$abc$109383$new_n18887_ nq=$abc$109383$new_n18889_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][19] q=$abc$109383$new_n18890_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][19] i1=$abc$109383$new_n17662_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n18891_
-.subckt ao22_x2 i0=$abc$109383$new_n18891_ i1=$abc$109383$new_n18890_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n18892_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][19] q=$abc$109383$new_n18890_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][19] i1=$abc$109383$new_n17662_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n18891_
+.subckt and21nor_x1 i0=$abc$109383$new_n18891_ i1=$abc$109383$new_n18890_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n18892_
 .subckt nand2_x0 i0=$abc$109383$new_n18892_ i1=$abc$109383$new_n18889_ nq=$abc$109383$new_n18893_
-.subckt oa22_x2 i0=$abc$109383$new_n18893_ i1=$abc$109383$new_n18886_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n18894_
+.subckt or21nand_x1 i0=$abc$109383$new_n18893_ i1=$abc$109383$new_n18886_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n18894_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][19] nq=$abc$109383$new_n18895_
 .subckt nand3_x0 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18895_ nq=$abc$109383$new_n18896_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][19] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n18897_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][19] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n18897_
 .subckt nand2_x0 i0=$abc$109383$new_n18897_ i1=$abc$109383$new_n18896_ nq=$abc$109383$new_n18898_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][19] nq=$abc$109383$new_n18899_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n18899_ nq=$abc$109383$new_n18900_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][19] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n18901_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][19] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n18901_
 .subckt nand2_x0 i0=$abc$109383$new_n18901_ i1=$abc$109383$new_n18900_ nq=$abc$109383$new_n18902_
-.subckt oa22_x2 i0=$abc$109383$new_n18902_ i1=$abc$109383$new_n18898_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n18903_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[15][19] i1=soc.cpu.minerva.gprf.mem._mem[13][19] q=$abc$109383$new_n18904_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][19] i1=soc.cpu.minerva.gprf.mem._mem[12][19] q=$abc$109383$new_n18905_
-.subckt mx2_x2 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n18905_ i1=$abc$109383$new_n18904_ q=$abc$109383$new_n18906_
+.subckt or21nand_x1 i0=$abc$109383$new_n18902_ i1=$abc$109383$new_n18898_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n18903_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[15][19] i1=soc.cpu.minerva.gprf.mem._mem[13][19] q=$abc$109383$new_n18904_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][19] i1=soc.cpu.minerva.gprf.mem._mem[12][19] q=$abc$109383$new_n18905_
+.subckt mux2_x1 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n18905_ i1=$abc$109383$new_n18904_ q=$abc$109383$new_n18906_
 .subckt nand2_x0 i0=$abc$109383$new_n18906_ i1=$abc$109383$new_n17691_ nq=$abc$109383$new_n18907_
-.subckt oa22_x2 i0=$abc$109383$new_n18907_ i1=$abc$109383$new_n18903_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n18908_
-.subckt oa22_x2 i0=$abc$109383$new_n18908_ i1=$abc$109383$new_n18894_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n18909_
+.subckt or21nand_x1 i0=$abc$109383$new_n18907_ i1=$abc$109383$new_n18903_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n18908_
+.subckt or21nand_x1 i0=$abc$109383$new_n18908_ i1=$abc$109383$new_n18894_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n18909_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][19] nq=$abc$109383$new_n18910_
 .subckt nand3_x0 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n18910_ nq=$abc$109383$new_n18911_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][19] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n18912_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][19] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n18912_
 .subckt nand2_x0 i0=$abc$109383$new_n18912_ i1=$abc$109383$new_n18911_ nq=$abc$109383$new_n18913_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][19] nq=$abc$109383$new_n18914_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n18914_ nq=$abc$109383$new_n18915_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][19] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n18916_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][19] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n18916_
 .subckt nand2_x0 i0=$abc$109383$new_n18916_ i1=$abc$109383$new_n18915_ nq=$abc$109383$new_n18917_
-.subckt oa22_x2 i0=$abc$109383$new_n18917_ i1=$abc$109383$new_n18913_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n18918_
-.subckt mx2_x2 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[11][19] i1=soc.cpu.minerva.gprf.mem._mem[9][19] q=$abc$109383$new_n18919_
-.subckt mx2_x2 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[10][19] i1=soc.cpu.minerva.gprf.mem._mem[8][19] q=$abc$109383$new_n18920_
-.subckt mx2_x2 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n18920_ i1=$abc$109383$new_n18919_ q=$abc$109383$new_n18921_
+.subckt or21nand_x1 i0=$abc$109383$new_n18917_ i1=$abc$109383$new_n18913_ i2=$abc$109383$new_n17866_ nq=$abc$109383$new_n18918_
+.subckt mux2_x1 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[11][19] i1=soc.cpu.minerva.gprf.mem._mem[9][19] q=$abc$109383$new_n18919_
+.subckt mux2_x1 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[10][19] i1=soc.cpu.minerva.gprf.mem._mem[8][19] q=$abc$109383$new_n18920_
+.subckt mux2_x1 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n18920_ i1=$abc$109383$new_n18919_ q=$abc$109383$new_n18921_
 .subckt nand2_x0 i0=$abc$109383$new_n18921_ i1=$abc$109383$new_n18234_ nq=$abc$109383$new_n18922_
-.subckt oa22_x2 i0=$abc$109383$new_n18922_ i1=$abc$109383$new_n18918_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n18923_
+.subckt or21nand_x1 i0=$abc$109383$new_n18922_ i1=$abc$109383$new_n18918_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n18923_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][19] nq=$abc$109383$new_n18924_
-.subckt oa22_x2 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18924_ q=$abc$109383$new_n18925_
+.subckt or21nand_x1 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n18924_ nq=$abc$109383$new_n18925_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][19] nq=$abc$109383$new_n18926_
-.subckt ao22_x2 i0=$abc$109383$new_n18926_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n18927_
+.subckt and21nor_x1 i0=$abc$109383$new_n18926_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n18927_
 .subckt nand2_x0 i0=$abc$109383$new_n18927_ i1=$abc$109383$new_n18925_ nq=$abc$109383$new_n18928_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][19] q=$abc$109383$new_n18929_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[16][19] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17648_ q=$abc$109383$new_n18930_
-.subckt ao22_x2 i0=$abc$109383$new_n18930_ i1=$abc$109383$new_n18929_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n18931_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][19] nq=$abc$109383$new_n18929_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[16][19] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17648_ nq=$abc$109383$new_n18930_
+.subckt and21nor_x1 i0=$abc$109383$new_n18930_ i1=$abc$109383$new_n18929_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n18931_
 .subckt nand2_x0 i0=$abc$109383$new_n18931_ i1=$abc$109383$new_n18928_ nq=$abc$109383$new_n18932_
 .subckt nand3_x0 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[2][19] nq=$abc$109383$new_n18933_
-.subckt ao22_x2 i0=$abc$109383$new_n16805_ i1=$abc$109383$new_n17549_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n18934_
+.subckt and21nor_x1 i0=$abc$109383$new_n16805_ i1=$abc$109383$new_n17549_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n18934_
 .subckt nand2_x0 i0=$abc$109383$new_n18934_ i1=$abc$109383$new_n18933_ nq=$abc$109383$new_n18935_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][19] q=$abc$109383$new_n18936_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][19] i1=$abc$109383$new_n17815_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n18937_
-.subckt ao22_x2 i0=$abc$109383$new_n18937_ i1=$abc$109383$new_n18936_ i2=$abc$109383$new_n18233_ q=$abc$109383$new_n18938_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][19] q=$abc$109383$new_n18936_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][19] i1=$abc$109383$new_n17815_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n18937_
+.subckt and21nor_x1 i0=$abc$109383$new_n18937_ i1=$abc$109383$new_n18936_ i2=$abc$109383$new_n18233_ nq=$abc$109383$new_n18938_
 .subckt nand2_x0 i0=$abc$109383$new_n18938_ i1=$abc$109383$new_n18935_ nq=$abc$109383$new_n18939_
-.subckt oa22_x2 i0=$abc$109383$new_n18939_ i1=$abc$109383$new_n18932_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n18940_
-.subckt oa22_x2 i0=$abc$109383$new_n18940_ i1=$abc$109383$new_n18923_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n18941_
+.subckt or21nand_x1 i0=$abc$109383$new_n18939_ i1=$abc$109383$new_n18932_ i2=$abc$109383$new_n17539_ nq=$abc$109383$new_n18940_
+.subckt or21nand_x1 i0=$abc$109383$new_n18940_ i1=$abc$109383$new_n18923_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n18941_
 .subckt nand2_x0 i0=$abc$109383$new_n18941_ i1=$abc$109383$new_n18909_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[19]
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[30][20] i1=soc.cpu.minerva.gprf.mem._mem[26][20] q=$abc$109383$new_n18943_
-.subckt mx2_x2 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[31][20] i1=soc.cpu.minerva.gprf.mem._mem[27][20] q=$abc$109383$new_n18944_
-.subckt mx2_x2 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n18944_ i1=$abc$109383$new_n18943_ q=$abc$109383$new_n18945_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[30][20] i1=soc.cpu.minerva.gprf.mem._mem[26][20] q=$abc$109383$new_n18943_
+.subckt mux2_x1 cmd=$abc$109383$new_n17571_ i0=soc.cpu.minerva.gprf.mem._mem[31][20] i1=soc.cpu.minerva.gprf.mem._mem[27][20] q=$abc$109383$new_n18944_
+.subckt mux2_x1 cmd=$abc$109383$new_n17549_ i0=$abc$109383$new_n18944_ i1=$abc$109383$new_n18943_ q=$abc$109383$new_n18945_
 .subckt nand2_x0 i0=$abc$109383$new_n18945_ i1=$abc$109383$new_n17579_ nq=$abc$109383$new_n18946_
-.subckt mx2_x2 cmd=$abc$109383$new_n17587_ i0=soc.cpu.minerva.gprf.mem._mem[28][20] i1=soc.cpu.minerva.gprf.mem._mem[24][20] q=$abc$109383$new_n18947_
+.subckt mux2_x1 cmd=$abc$109383$new_n17587_ i0=soc.cpu.minerva.gprf.mem._mem[28][20] i1=soc.cpu.minerva.gprf.mem._mem[24][20] q=$abc$109383$new_n18947_
 .subckt nand2_x0 i0=$abc$109383$new_n18947_ i1=$abc$109383$new_n17947_ nq=$abc$109383$new_n18948_
-.subckt oa22_x2 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[29][20] q=$abc$109383$new_n18949_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][20] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17815_ q=$abc$109383$new_n18950_
+.subckt or21nand_x1 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=soc.cpu.minerva.gprf.mem._mem[29][20] nq=$abc$109383$new_n18949_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][20] i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17815_ nq=$abc$109383$new_n18950_
 .subckt nand2_x0 i0=$abc$109383$new_n18950_ i1=$abc$109383$new_n18949_ nq=$abc$109383$new_n18951_
-.subckt oa22_x2 i0=$abc$109383$new_n18951_ i1=$abc$109383$new_n18948_ i2=$abc$109383$new_n18228_ q=$abc$109383$new_n18952_
-.subckt oa22_x2 i0=$abc$109383$new_n18952_ i1=$abc$109383$new_n18946_ i2=$abc$109383$new_n18234_ q=$abc$109383$new_n18953_
-.subckt mx2_x2 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[12][20] i1=soc.cpu.minerva.gprf.mem._mem[8][20] q=$abc$109383$new_n18954_
+.subckt or21nand_x1 i0=$abc$109383$new_n18951_ i1=$abc$109383$new_n18948_ i2=$abc$109383$new_n18228_ nq=$abc$109383$new_n18952_
+.subckt or21nand_x1 i0=$abc$109383$new_n18952_ i1=$abc$109383$new_n18946_ i2=$abc$109383$new_n18234_ nq=$abc$109383$new_n18953_
+.subckt mux2_x1 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[12][20] i1=soc.cpu.minerva.gprf.mem._mem[8][20] q=$abc$109383$new_n18954_
 .subckt nand2_x0 i0=$abc$109383$new_n18954_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18955_
-.subckt oa22_x2 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=soc.cpu.minerva.gprf.mem._mem[13][20] q=$abc$109383$new_n18956_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][20] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n18957_
+.subckt or21nand_x1 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=soc.cpu.minerva.gprf.mem._mem[13][20] nq=$abc$109383$new_n18956_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][20] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n18957_
 .subckt nand2_x0 i0=$abc$109383$new_n18957_ i1=$abc$109383$new_n18956_ nq=$abc$109383$new_n18958_
 .subckt nand3_x0 i0=$abc$109383$new_n18958_ i1=$abc$109383$new_n18955_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18959_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][20] nq=$abc$109383$new_n18960_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n18960_ nq=$abc$109383$new_n18961_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][20] i1=$abc$109383$new_n17725_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n18962_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][20] i1=$abc$109383$new_n17725_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n18962_
 .subckt nand2_x0 i0=$abc$109383$new_n18962_ i1=$abc$109383$new_n18961_ nq=$abc$109383$new_n18963_
-.subckt mx2_x2 cmd=$abc$109383$new_n17572_ i0=soc.cpu.minerva.gprf.mem._mem[14][20] i1=soc.cpu.minerva.gprf.mem._mem[10][20] q=$abc$109383$new_n18964_
+.subckt mux2_x1 cmd=$abc$109383$new_n17572_ i0=soc.cpu.minerva.gprf.mem._mem[14][20] i1=soc.cpu.minerva.gprf.mem._mem[10][20] q=$abc$109383$new_n18964_
 .subckt nand2_x0 i0=$abc$109383$new_n18964_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n18965_
 .subckt nand3_x0 i0=$abc$109383$new_n18965_ i1=$abc$109383$new_n18963_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n18966_
 .subckt nand3_x0 i0=$abc$109383$new_n18966_ i1=$abc$109383$new_n18959_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n18967_
 .subckt nand2_x0 i0=$abc$109383$new_n18967_ i1=$abc$109383$new_n18953_ nq=$abc$109383$new_n18968_
-.subckt mx2_x2 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[20][20] i1=soc.cpu.minerva.gprf.mem._mem[16][20] q=$abc$109383$new_n18969_
+.subckt mux2_x1 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[20][20] i1=soc.cpu.minerva.gprf.mem._mem[16][20] q=$abc$109383$new_n18969_
 .subckt nand2_x0 i0=$abc$109383$new_n18969_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n18970_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][20] nq=$abc$109383$new_n18971_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n18971_ nq=$abc$109383$new_n18972_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][20] i1=$abc$109383$new_n17900_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n18973_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][20] i1=$abc$109383$new_n17900_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n18973_
 .subckt nand2_x0 i0=$abc$109383$new_n18973_ i1=$abc$109383$new_n18972_ nq=$abc$109383$new_n18974_
 .subckt nand3_x0 i0=$abc$109383$new_n18974_ i1=$abc$109383$new_n18970_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n18975_
-.subckt mx2_x2 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[22][20] i1=soc.cpu.minerva.gprf.mem._mem[18][20] q=$abc$109383$new_n18976_
+.subckt mux2_x1 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[22][20] i1=soc.cpu.minerva.gprf.mem._mem[18][20] q=$abc$109383$new_n18976_
 .subckt nand2_x0 i0=$abc$109383$new_n18976_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n18977_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][20] nq=$abc$109383$new_n18978_
 .subckt nand3_x0 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=$abc$109383$new_n18978_ nq=$abc$109383$new_n18979_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][20] i1=$abc$109383$new_n17725_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n18980_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][20] i1=$abc$109383$new_n17725_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n18980_
 .subckt nand2_x0 i0=$abc$109383$new_n18980_ i1=$abc$109383$new_n18979_ nq=$abc$109383$new_n18981_
 .subckt nand3_x0 i0=$abc$109383$new_n18981_ i1=$abc$109383$new_n18977_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n18982_
 .subckt nand3_x0 i0=$abc$109383$new_n18982_ i1=$abc$109383$new_n18975_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n18983_
-.subckt mx2_x2 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[4][20] i1=soc.cpu.minerva.gprf.mem._mem[0][20] q=$abc$109383$new_n18984_
-.subckt mx2_x2 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[5][20] i1=soc.cpu.minerva.gprf.mem._mem[1][20] q=$abc$109383$new_n18985_
-.subckt mx2_x2 cmd=$abc$109383$new_n17600_ i0=$abc$109383$new_n18985_ i1=$abc$109383$new_n18984_ q=$abc$109383$new_n18986_
-.subckt mx2_x2 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[6][20] i1=soc.cpu.minerva.gprf.mem._mem[2][20] q=$abc$109383$new_n18987_
-.subckt mx2_x2 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[7][20] i1=soc.cpu.minerva.gprf.mem._mem[3][20] q=$abc$109383$new_n18988_
-.subckt mx2_x2 cmd=$abc$109383$new_n17600_ i0=$abc$109383$new_n18988_ i1=$abc$109383$new_n18987_ q=$abc$109383$new_n18989_
-.subckt mx2_x2 cmd=$abc$109383$new_n17646_ i0=$abc$109383$new_n18989_ i1=$abc$109383$new_n18986_ q=$abc$109383$new_n18990_
+.subckt mux2_x1 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[4][20] i1=soc.cpu.minerva.gprf.mem._mem[0][20] q=$abc$109383$new_n18984_
+.subckt mux2_x1 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[5][20] i1=soc.cpu.minerva.gprf.mem._mem[1][20] q=$abc$109383$new_n18985_
+.subckt mux2_x1 cmd=$abc$109383$new_n17600_ i0=$abc$109383$new_n18985_ i1=$abc$109383$new_n18984_ q=$abc$109383$new_n18986_
+.subckt mux2_x1 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[6][20] i1=soc.cpu.minerva.gprf.mem._mem[2][20] q=$abc$109383$new_n18987_
+.subckt mux2_x1 cmd=$abc$109383$new_n17620_ i0=soc.cpu.minerva.gprf.mem._mem[7][20] i1=soc.cpu.minerva.gprf.mem._mem[3][20] q=$abc$109383$new_n18988_
+.subckt mux2_x1 cmd=$abc$109383$new_n17600_ i0=$abc$109383$new_n18988_ i1=$abc$109383$new_n18987_ q=$abc$109383$new_n18989_
+.subckt mux2_x1 cmd=$abc$109383$new_n17646_ i0=$abc$109383$new_n18989_ i1=$abc$109383$new_n18986_ q=$abc$109383$new_n18990_
 .subckt nand2_x0 i0=$abc$109383$new_n18990_ i1=$abc$109383$new_n17536_ nq=$abc$109383$new_n18991_
 .subckt nand2_x0 i0=$abc$109383$new_n18991_ i1=$abc$109383$new_n18983_ nq=$abc$109383$new_n18992_
-.subckt mx2_x2 cmd=$abc$109383$new_n17786_ i0=$abc$109383$new_n18992_ i1=$abc$109383$new_n18968_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[20]
+.subckt mux2_x1 cmd=$abc$109383$new_n17786_ i0=$abc$109383$new_n18992_ i1=$abc$109383$new_n18968_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[20]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][21] nq=$abc$109383$new_n18994_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n18994_ nq=$abc$109383$new_n18995_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][21] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n18996_
-.subckt a2_x2 i0=$abc$109383$new_n18996_ i1=$abc$109383$new_n18995_ q=$abc$109383$new_n18997_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][21] i1=$abc$109383$new_n17799_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n18996_
+.subckt and2_x1 i0=$abc$109383$new_n18996_ i1=$abc$109383$new_n18995_ q=$abc$109383$new_n18997_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][21] nq=$abc$109383$new_n18998_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n18998_ nq=$abc$109383$new_n18999_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][21] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ q=$abc$109383$new_n19000_
-.subckt a2_x2 i0=$abc$109383$new_n19000_ i1=$abc$109383$new_n18999_ q=$abc$109383$new_n19001_
-.subckt ao22_x2 i0=$abc$109383$new_n19001_ i1=$abc$109383$new_n18997_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n19002_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[15][21] i1=soc.cpu.minerva.gprf.mem._mem[13][21] q=$abc$109383$new_n19003_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[14][21] i1=soc.cpu.minerva.gprf.mem._mem[12][21] q=$abc$109383$new_n19004_
-.subckt mx2_x2 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n19004_ i1=$abc$109383$new_n19003_ q=$abc$109383$new_n19005_
-.subckt a2_x2 i0=$abc$109383$new_n19005_ i1=$abc$109383$new_n18233_ q=$abc$109383$new_n19006_
-.subckt ao22_x2 i0=$abc$109383$new_n19006_ i1=$abc$109383$new_n19002_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n19007_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][21] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17806_ nq=$abc$109383$new_n19000_
+.subckt and2_x1 i0=$abc$109383$new_n19000_ i1=$abc$109383$new_n18999_ q=$abc$109383$new_n19001_
+.subckt and21nor_x1 i0=$abc$109383$new_n19001_ i1=$abc$109383$new_n18997_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n19002_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[15][21] i1=soc.cpu.minerva.gprf.mem._mem[13][21] q=$abc$109383$new_n19003_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[14][21] i1=soc.cpu.minerva.gprf.mem._mem[12][21] q=$abc$109383$new_n19004_
+.subckt mux2_x1 cmd=$abc$109383$new_n17815_ i0=$abc$109383$new_n19004_ i1=$abc$109383$new_n19003_ q=$abc$109383$new_n19005_
+.subckt and2_x1 i0=$abc$109383$new_n19005_ i1=$abc$109383$new_n18233_ q=$abc$109383$new_n19006_
+.subckt and21nor_x1 i0=$abc$109383$new_n19006_ i1=$abc$109383$new_n19002_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n19007_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][21] nq=$abc$109383$new_n19008_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n19008_ nq=$abc$109383$new_n19009_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][21] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n19010_
-.subckt a2_x2 i0=$abc$109383$new_n19010_ i1=$abc$109383$new_n19009_ q=$abc$109383$new_n19011_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][21] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n19010_
+.subckt and2_x1 i0=$abc$109383$new_n19010_ i1=$abc$109383$new_n19009_ q=$abc$109383$new_n19011_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][21] nq=$abc$109383$new_n19012_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n19012_ nq=$abc$109383$new_n19013_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][21] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17612_ q=$abc$109383$new_n19014_
-.subckt a2_x2 i0=$abc$109383$new_n19014_ i1=$abc$109383$new_n19013_ q=$abc$109383$new_n19015_
-.subckt ao22_x2 i0=$abc$109383$new_n19015_ i1=$abc$109383$new_n19011_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n19016_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[11][21] i1=soc.cpu.minerva.gprf.mem._mem[9][21] q=$abc$109383$new_n19017_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][21] i1=soc.cpu.minerva.gprf.mem._mem[8][21] q=$abc$109383$new_n19018_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n19018_ i1=$abc$109383$new_n19017_ q=$abc$109383$new_n19019_
-.subckt a2_x2 i0=$abc$109383$new_n19019_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19020_
-.subckt ao22_x2 i0=$abc$109383$new_n19020_ i1=$abc$109383$new_n19016_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n19021_
-.subckt ao22_x2 i0=$abc$109383$new_n19021_ i1=$abc$109383$new_n19007_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n19022_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[20][21] i1=soc.cpu.minerva.gprf.mem._mem[16][21] q=$abc$109383$new_n19023_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][21] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17612_ nq=$abc$109383$new_n19014_
+.subckt and2_x1 i0=$abc$109383$new_n19014_ i1=$abc$109383$new_n19013_ q=$abc$109383$new_n19015_
+.subckt and21nor_x1 i0=$abc$109383$new_n19015_ i1=$abc$109383$new_n19011_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n19016_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[11][21] i1=soc.cpu.minerva.gprf.mem._mem[9][21] q=$abc$109383$new_n19017_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][21] i1=soc.cpu.minerva.gprf.mem._mem[8][21] q=$abc$109383$new_n19018_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n19018_ i1=$abc$109383$new_n19017_ q=$abc$109383$new_n19019_
+.subckt and2_x1 i0=$abc$109383$new_n19019_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19020_
+.subckt and21nor_x1 i0=$abc$109383$new_n19020_ i1=$abc$109383$new_n19016_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n19021_
+.subckt and21nor_x1 i0=$abc$109383$new_n19021_ i1=$abc$109383$new_n19007_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n19022_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[20][21] i1=soc.cpu.minerva.gprf.mem._mem[16][21] q=$abc$109383$new_n19023_
 .subckt nand2_x0 i0=$abc$109383$new_n19023_ i1=$abc$109383$new_n17601_ nq=$abc$109383$new_n19024_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][21] nq=$abc$109383$new_n19025_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n19025_ nq=$abc$109383$new_n19026_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][21] i1=$abc$109383$new_n17591_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n19027_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][21] i1=$abc$109383$new_n17591_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n19027_
 .subckt nand2_x0 i0=$abc$109383$new_n19027_ i1=$abc$109383$new_n19026_ nq=$abc$109383$new_n19028_
 .subckt nand3_x0 i0=$abc$109383$new_n19028_ i1=$abc$109383$new_n19024_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n19029_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][21] nq=$abc$109383$new_n19030_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=$abc$109383$new_n19030_ nq=$abc$109383$new_n19031_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][21] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n19032_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][21] i1=$abc$109383$new_n17572_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n19032_
 .subckt nand2_x0 i0=$abc$109383$new_n19032_ i1=$abc$109383$new_n19031_ nq=$abc$109383$new_n19033_
-.subckt mx2_x2 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[22][21] i1=soc.cpu.minerva.gprf.mem._mem[18][21] q=$abc$109383$new_n19034_
+.subckt mux2_x1 cmd=$abc$109383$new_n17603_ i0=soc.cpu.minerva.gprf.mem._mem[22][21] i1=soc.cpu.minerva.gprf.mem._mem[18][21] q=$abc$109383$new_n19034_
 .subckt nand2_x0 i0=$abc$109383$new_n19034_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n19035_
 .subckt nand3_x0 i0=$abc$109383$new_n19035_ i1=$abc$109383$new_n19033_ i2=$abc$109383$new_n17599_ nq=$abc$109383$new_n19036_
-.subckt a3_x2 i0=$abc$109383$new_n19036_ i1=$abc$109383$new_n19029_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19037_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[4][21] i1=soc.cpu.minerva.gprf.mem._mem[0][21] q=$abc$109383$new_n19038_
+.subckt and3_x1 i0=$abc$109383$new_n19036_ i1=$abc$109383$new_n19029_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19037_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[4][21] i1=soc.cpu.minerva.gprf.mem._mem[0][21] q=$abc$109383$new_n19038_
 .subckt nand2_x0 i0=$abc$109383$new_n19038_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n19039_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][21] nq=$abc$109383$new_n19040_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n19040_ nq=$abc$109383$new_n19041_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][21] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n19042_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][21] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n19042_
 .subckt nand2_x0 i0=$abc$109383$new_n19042_ i1=$abc$109383$new_n19041_ nq=$abc$109383$new_n19043_
 .subckt nand3_x0 i0=$abc$109383$new_n19043_ i1=$abc$109383$new_n19039_ i2=$abc$109383$new_n17672_ nq=$abc$109383$new_n19044_
-.subckt oa22_x2 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[7][21] q=$abc$109383$new_n19045_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][21] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17569_ q=$abc$109383$new_n19046_
-.subckt a2_x2 i0=$abc$109383$new_n19046_ i1=$abc$109383$new_n19045_ q=$abc$109383$new_n19047_
-.subckt mx2_x2 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[6][21] i1=soc.cpu.minerva.gprf.mem._mem[2][21] q=$abc$109383$new_n19048_
-.subckt oa22_x2 i0=$abc$109383$new_n17798_ i1=$abc$109383$new_n19048_ i2=$abc$109383$new_n17543_ q=$abc$109383$new_n19049_
-.subckt ao22_x2 i0=$abc$109383$new_n19049_ i1=$abc$109383$new_n19047_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n19050_
-.subckt a2_x2 i0=$abc$109383$new_n19050_ i1=$abc$109383$new_n19044_ q=$abc$109383$new_n19051_
-.subckt ao22_x2 i0=$abc$109383$new_n19051_ i1=$abc$109383$new_n19037_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n19052_
-.subckt o2_x2 i0=$abc$109383$new_n19052_ i1=$abc$109383$new_n19022_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[21]
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[20][22] i1=soc.cpu.minerva.gprf.mem._mem[16][22] q=$abc$109383$new_n19054_
+.subckt or21nand_x1 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[7][21] nq=$abc$109383$new_n19045_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][21] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17569_ nq=$abc$109383$new_n19046_
+.subckt and2_x1 i0=$abc$109383$new_n19046_ i1=$abc$109383$new_n19045_ q=$abc$109383$new_n19047_
+.subckt mux2_x1 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[6][21] i1=soc.cpu.minerva.gprf.mem._mem[2][21] q=$abc$109383$new_n19048_
+.subckt or21nand_x1 i0=$abc$109383$new_n17798_ i1=$abc$109383$new_n19048_ i2=$abc$109383$new_n17543_ nq=$abc$109383$new_n19049_
+.subckt and21nor_x1 i0=$abc$109383$new_n19049_ i1=$abc$109383$new_n19047_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n19050_
+.subckt and2_x1 i0=$abc$109383$new_n19050_ i1=$abc$109383$new_n19044_ q=$abc$109383$new_n19051_
+.subckt and21nor_x1 i0=$abc$109383$new_n19051_ i1=$abc$109383$new_n19037_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n19052_
+.subckt or2_x1 i0=$abc$109383$new_n19052_ i1=$abc$109383$new_n19022_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[21]
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[20][22] i1=soc.cpu.minerva.gprf.mem._mem[16][22] q=$abc$109383$new_n19054_
 .subckt nand2_x0 i0=$abc$109383$new_n19054_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n19055_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][22] nq=$abc$109383$new_n19056_
 .subckt nand3_x0 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n19056_ nq=$abc$109383$new_n19057_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][22] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n19058_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][22] i1=$abc$109383$new_n17709_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n19058_
 .subckt nand2_x0 i0=$abc$109383$new_n19058_ i1=$abc$109383$new_n19057_ nq=$abc$109383$new_n19059_
 .subckt nand3_x0 i0=$abc$109383$new_n19059_ i1=$abc$109383$new_n19055_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n19060_
-.subckt mx2_x2 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[22][22] i1=soc.cpu.minerva.gprf.mem._mem[18][22] q=$abc$109383$new_n19061_
+.subckt mux2_x1 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[22][22] i1=soc.cpu.minerva.gprf.mem._mem[18][22] q=$abc$109383$new_n19061_
 .subckt nand2_x0 i0=$abc$109383$new_n19061_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n19062_
-.subckt oa22_x2 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[23][22] q=$abc$109383$new_n19063_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][22] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n17972_ q=$abc$109383$new_n19064_
+.subckt or21nand_x1 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[23][22] nq=$abc$109383$new_n19063_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][22] i1=$abc$109383$new_n17787_ i2=$abc$109383$new_n17972_ nq=$abc$109383$new_n19064_
 .subckt nand2_x0 i0=$abc$109383$new_n19064_ i1=$abc$109383$new_n19063_ nq=$abc$109383$new_n19065_
 .subckt nand3_x0 i0=$abc$109383$new_n19065_ i1=$abc$109383$new_n19062_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n19066_
-.subckt a3_x2 i0=$abc$109383$new_n19066_ i1=$abc$109383$new_n19060_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n19067_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][22] i1=soc.cpu.minerva.gprf.mem._mem[0][22] q=$abc$109383$new_n19068_
+.subckt and3_x1 i0=$abc$109383$new_n19066_ i1=$abc$109383$new_n19060_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n19067_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[4][22] i1=soc.cpu.minerva.gprf.mem._mem[0][22] q=$abc$109383$new_n19068_
 .subckt nand2_x0 i0=$abc$109383$new_n19068_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n19069_
-.subckt oa22_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[5][22] q=$abc$109383$new_n19070_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][22] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n19071_
+.subckt or21nand_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[5][22] nq=$abc$109383$new_n19070_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][22] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n19071_
 .subckt nand2_x0 i0=$abc$109383$new_n19071_ i1=$abc$109383$new_n19070_ nq=$abc$109383$new_n19072_
 .subckt nand3_x0 i0=$abc$109383$new_n19072_ i1=$abc$109383$new_n19069_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n19073_
 .subckt nand3_x0 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n16977_ nq=$abc$109383$new_n19074_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][22] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n17834_ q=$abc$109383$new_n19075_
-.subckt a2_x2 i0=$abc$109383$new_n19075_ i1=$abc$109383$new_n19074_ q=$abc$109383$new_n19076_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][22] i1=soc.cpu.minerva.gprf.mem._mem[2][22] q=$abc$109383$new_n19077_
-.subckt oa22_x2 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n19077_ i2=$abc$109383$new_n17736_ q=$abc$109383$new_n19078_
-.subckt ao22_x2 i0=$abc$109383$new_n19078_ i1=$abc$109383$new_n19076_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n19079_
-.subckt a2_x2 i0=$abc$109383$new_n19079_ i1=$abc$109383$new_n19073_ q=$abc$109383$new_n19080_
-.subckt ao22_x2 i0=$abc$109383$new_n19080_ i1=$abc$109383$new_n19067_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n19081_
-.subckt mx2_x2 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[28][22] i1=soc.cpu.minerva.gprf.mem._mem[24][22] q=$abc$109383$new_n19082_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][22] i1=$abc$109383$new_n17587_ i2=$abc$109383$new_n17834_ nq=$abc$109383$new_n19075_
+.subckt and2_x1 i0=$abc$109383$new_n19075_ i1=$abc$109383$new_n19074_ q=$abc$109383$new_n19076_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][22] i1=soc.cpu.minerva.gprf.mem._mem[2][22] q=$abc$109383$new_n19077_
+.subckt or21nand_x1 i0=$abc$109383$new_n17862_ i1=$abc$109383$new_n19077_ i2=$abc$109383$new_n17736_ nq=$abc$109383$new_n19078_
+.subckt and21nor_x1 i0=$abc$109383$new_n19078_ i1=$abc$109383$new_n19076_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n19079_
+.subckt and2_x1 i0=$abc$109383$new_n19079_ i1=$abc$109383$new_n19073_ q=$abc$109383$new_n19080_
+.subckt and21nor_x1 i0=$abc$109383$new_n19080_ i1=$abc$109383$new_n19067_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n19081_
+.subckt mux2_x1 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[28][22] i1=soc.cpu.minerva.gprf.mem._mem[24][22] q=$abc$109383$new_n19082_
 .subckt nand2_x0 i0=$abc$109383$new_n19082_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n19083_
-.subckt oa22_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[29][22] q=$abc$109383$new_n19084_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][22] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n19085_
+.subckt or21nand_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[29][22] nq=$abc$109383$new_n19084_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][22] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n19085_
 .subckt nand2_x0 i0=$abc$109383$new_n19085_ i1=$abc$109383$new_n19084_ nq=$abc$109383$new_n19086_
 .subckt nand3_x0 i0=$abc$109383$new_n19086_ i1=$abc$109383$new_n19083_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n19087_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[31][22] i1=soc.cpu.minerva.gprf.mem._mem[27][22] q=$abc$109383$new_n19088_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[30][22] i1=soc.cpu.minerva.gprf.mem._mem[26][22] q=$abc$109383$new_n19089_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n19089_ i1=$abc$109383$new_n19088_ q=$abc$109383$new_n19090_
-.subckt ao22_x2 i0=$abc$109383$new_n19090_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n19091_
-.subckt a2_x2 i0=$abc$109383$new_n19091_ i1=$abc$109383$new_n19087_ q=$abc$109383$new_n19092_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[12][22] i1=soc.cpu.minerva.gprf.mem._mem[8][22] q=$abc$109383$new_n19093_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[31][22] i1=soc.cpu.minerva.gprf.mem._mem[27][22] q=$abc$109383$new_n19088_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[30][22] i1=soc.cpu.minerva.gprf.mem._mem[26][22] q=$abc$109383$new_n19089_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n19089_ i1=$abc$109383$new_n19088_ q=$abc$109383$new_n19090_
+.subckt and21nor_x1 i0=$abc$109383$new_n19090_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n19091_
+.subckt and2_x1 i0=$abc$109383$new_n19091_ i1=$abc$109383$new_n19087_ q=$abc$109383$new_n19092_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[12][22] i1=soc.cpu.minerva.gprf.mem._mem[8][22] q=$abc$109383$new_n19093_
 .subckt nand2_x0 i0=$abc$109383$new_n19093_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n19094_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][22] nq=$abc$109383$new_n19095_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n19095_ nq=$abc$109383$new_n19096_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[13][22] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n19097_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[13][22] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n19097_
 .subckt nand2_x0 i0=$abc$109383$new_n19097_ i1=$abc$109383$new_n19096_ nq=$abc$109383$new_n19098_
 .subckt nand3_x0 i0=$abc$109383$new_n19098_ i1=$abc$109383$new_n19094_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n19099_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[14][22] i1=soc.cpu.minerva.gprf.mem._mem[10][22] q=$abc$109383$new_n19100_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[14][22] i1=soc.cpu.minerva.gprf.mem._mem[10][22] q=$abc$109383$new_n19100_
 .subckt nand2_x0 i0=$abc$109383$new_n19100_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n19101_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][22] nq=$abc$109383$new_n19102_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n19102_ nq=$abc$109383$new_n19103_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[15][22] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n19104_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[15][22] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n19104_
 .subckt nand2_x0 i0=$abc$109383$new_n19104_ i1=$abc$109383$new_n19103_ nq=$abc$109383$new_n19105_
 .subckt nand3_x0 i0=$abc$109383$new_n19105_ i1=$abc$109383$new_n19101_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n19106_
-.subckt a3_x2 i0=$abc$109383$new_n19106_ i1=$abc$109383$new_n19099_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19107_
-.subckt ao22_x2 i0=$abc$109383$new_n19107_ i1=$abc$109383$new_n19092_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n19108_
-.subckt o2_x2 i0=$abc$109383$new_n19108_ i1=$abc$109383$new_n19081_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[22]
-.subckt mx2_x2 cmd=$abc$109383$new_n17554_ i0=soc.cpu.minerva.gprf.mem._mem[22][23] i1=soc.cpu.minerva.gprf.mem._mem[18][23] q=$abc$109383$new_n19110_
-.subckt a2_x2 i0=$abc$109383$new_n19110_ i1=$abc$109383$new_n17600_ q=$abc$109383$new_n19111_
-.subckt oa22_x2 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[23][23] q=$abc$109383$new_n19112_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][23] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17806_ q=$abc$109383$new_n19113_
-.subckt a2_x2 i0=$abc$109383$new_n19113_ i1=$abc$109383$new_n19112_ q=$abc$109383$new_n19114_
-.subckt ao22_x2 i0=$abc$109383$new_n19114_ i1=$abc$109383$new_n19111_ i2=$abc$109383$new_n17598_ q=$abc$109383$new_n19115_
-.subckt mx2_x2 cmd=$abc$109383$new_n17587_ i0=$abc$109383$new_n17053_ i1=$abc$109383$new_n17052_ q=$abc$109383$new_n19116_
+.subckt and3_x1 i0=$abc$109383$new_n19106_ i1=$abc$109383$new_n19099_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19107_
+.subckt and21nor_x1 i0=$abc$109383$new_n19107_ i1=$abc$109383$new_n19092_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n19108_
+.subckt or2_x1 i0=$abc$109383$new_n19108_ i1=$abc$109383$new_n19081_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[22]
+.subckt mux2_x1 cmd=$abc$109383$new_n17554_ i0=soc.cpu.minerva.gprf.mem._mem[22][23] i1=soc.cpu.minerva.gprf.mem._mem[18][23] q=$abc$109383$new_n19110_
+.subckt and2_x1 i0=$abc$109383$new_n19110_ i1=$abc$109383$new_n17600_ q=$abc$109383$new_n19111_
+.subckt or21nand_x1 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[23][23] nq=$abc$109383$new_n19112_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][23] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17806_ nq=$abc$109383$new_n19113_
+.subckt and2_x1 i0=$abc$109383$new_n19113_ i1=$abc$109383$new_n19112_ q=$abc$109383$new_n19114_
+.subckt and21nor_x1 i0=$abc$109383$new_n19114_ i1=$abc$109383$new_n19111_ i2=$abc$109383$new_n17598_ nq=$abc$109383$new_n19115_
+.subckt mux2_x1 cmd=$abc$109383$new_n17587_ i0=$abc$109383$new_n17053_ i1=$abc$109383$new_n17052_ q=$abc$109383$new_n19116_
 .subckt nand2_x0 i0=$abc$109383$new_n19116_ i1=$abc$109383$new_n17947_ nq=$abc$109383$new_n19117_
-.subckt mx2_x2 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[31][23] i1=soc.cpu.minerva.gprf.mem._mem[27][23] q=$abc$109383$new_n19118_
-.subckt ao22_x2 i0=$abc$109383$new_n19118_ i1=$abc$109383$new_n17600_ i2=$abc$109383$new_n17538_ q=$abc$109383$new_n19119_
-.subckt a2_x2 i0=$abc$109383$new_n19119_ i1=$abc$109383$new_n19117_ q=$abc$109383$new_n19120_
-.subckt ao22_x2 i0=$abc$109383$new_n19120_ i1=$abc$109383$new_n19115_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n19121_
+.subckt mux2_x1 cmd=$abc$109383$new_n17602_ i0=soc.cpu.minerva.gprf.mem._mem[31][23] i1=soc.cpu.minerva.gprf.mem._mem[27][23] q=$abc$109383$new_n19118_
+.subckt and21nor_x1 i0=$abc$109383$new_n19118_ i1=$abc$109383$new_n17600_ i2=$abc$109383$new_n17538_ nq=$abc$109383$new_n19119_
+.subckt and2_x1 i0=$abc$109383$new_n19119_ i1=$abc$109383$new_n19117_ q=$abc$109383$new_n19120_
+.subckt and21nor_x1 i0=$abc$109383$new_n19120_ i1=$abc$109383$new_n19115_ i2=$abc$109383$new_n17960_ nq=$abc$109383$new_n19121_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[15][23] nq=$abc$109383$new_n19122_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[14][23] nq=$abc$109383$new_n19123_
-.subckt mx2_x2 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n19123_ i1=$abc$109383$new_n19122_ q=$abc$109383$new_n19124_
-.subckt mx2_x2 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n17040_ i1=$abc$109383$new_n17037_ q=$abc$109383$new_n19125_
-.subckt mx2_x2 cmd=$abc$109383$new_n17538_ i0=$abc$109383$new_n19125_ i1=$abc$109383$new_n19124_ q=$abc$109383$new_n19126_
+.subckt mux2_x1 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n19123_ i1=$abc$109383$new_n19122_ q=$abc$109383$new_n19124_
+.subckt mux2_x1 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n17040_ i1=$abc$109383$new_n17037_ q=$abc$109383$new_n19125_
+.subckt mux2_x1 cmd=$abc$109383$new_n17538_ i0=$abc$109383$new_n19125_ i1=$abc$109383$new_n19124_ q=$abc$109383$new_n19126_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[11][23] nq=$abc$109383$new_n19127_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[10][23] nq=$abc$109383$new_n19128_
-.subckt mx2_x2 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n19128_ i1=$abc$109383$new_n19127_ q=$abc$109383$new_n19129_
-.subckt mx2_x2 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n17039_ i1=$abc$109383$new_n17036_ q=$abc$109383$new_n19130_
-.subckt mx2_x2 cmd=$abc$109383$new_n17537_ i0=$abc$109383$new_n19130_ i1=$abc$109383$new_n19129_ q=$abc$109383$new_n19131_
-.subckt mx2_x2 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n19131_ i1=$abc$109383$new_n19126_ q=$abc$109383$new_n19132_
+.subckt mux2_x1 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n19128_ i1=$abc$109383$new_n19127_ q=$abc$109383$new_n19129_
+.subckt mux2_x1 cmd=$abc$109383$new_n17647_ i0=$abc$109383$new_n17039_ i1=$abc$109383$new_n17036_ q=$abc$109383$new_n19130_
+.subckt mux2_x1 cmd=$abc$109383$new_n17537_ i0=$abc$109383$new_n19130_ i1=$abc$109383$new_n19129_ q=$abc$109383$new_n19131_
+.subckt mux2_x1 cmd=$abc$109383$new_n17787_ i0=$abc$109383$new_n19131_ i1=$abc$109383$new_n19126_ q=$abc$109383$new_n19132_
 .subckt nor2_x0 i0=$abc$109383$new_n19132_ i1=$abc$109383$new_n17960_ nq=$abc$109383$new_n19133_
-.subckt ao22_x2 i0=$abc$109383$new_n19133_ i1=$abc$109383$new_n19121_ i2=$abc$109383$new_n17898_ q=$abc$109383$new_n19134_
+.subckt and21nor_x1 i0=$abc$109383$new_n19133_ i1=$abc$109383$new_n19121_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n19134_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[13][23] nq=$abc$109383$new_n19135_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[12][23] nq=$abc$109383$new_n19136_
-.subckt mx2_x2 cmd=$abc$109383$new_n17661_ i0=$abc$109383$new_n19136_ i1=$abc$109383$new_n19135_ q=$abc$109383$new_n19137_
+.subckt mux2_x1 cmd=$abc$109383$new_n17661_ i0=$abc$109383$new_n19136_ i1=$abc$109383$new_n19135_ q=$abc$109383$new_n19137_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][23] nq=$abc$109383$new_n19138_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[8][23] nq=$abc$109383$new_n19139_
-.subckt mx2_x2 cmd=$abc$109383$new_n17661_ i0=$abc$109383$new_n19139_ i1=$abc$109383$new_n19138_ q=$abc$109383$new_n19140_
-.subckt mx2_x2 cmd=$abc$109383$new_n17631_ i0=$abc$109383$new_n19140_ i1=$abc$109383$new_n19137_ q=$abc$109383$new_n19141_
+.subckt mux2_x1 cmd=$abc$109383$new_n17661_ i0=$abc$109383$new_n19139_ i1=$abc$109383$new_n19138_ q=$abc$109383$new_n19140_
+.subckt mux2_x1 cmd=$abc$109383$new_n17631_ i0=$abc$109383$new_n19140_ i1=$abc$109383$new_n19137_ q=$abc$109383$new_n19141_
 .subckt nand2_x0 i0=$abc$109383$new_n19141_ i1=$abc$109383$new_n17538_ nq=$abc$109383$new_n19142_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[5][23] nq=$abc$109383$new_n19143_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[4][23] nq=$abc$109383$new_n19144_
-.subckt mx2_x2 cmd=$abc$109383$new_n17655_ i0=$abc$109383$new_n19144_ i1=$abc$109383$new_n19143_ q=$abc$109383$new_n19145_
+.subckt mux2_x1 cmd=$abc$109383$new_n17655_ i0=$abc$109383$new_n19144_ i1=$abc$109383$new_n19143_ q=$abc$109383$new_n19145_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][23] nq=$abc$109383$new_n19146_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[0][23] nq=$abc$109383$new_n19147_
-.subckt mx2_x2 cmd=$abc$109383$new_n17655_ i0=$abc$109383$new_n19147_ i1=$abc$109383$new_n19146_ q=$abc$109383$new_n19148_
-.subckt mx2_x2 cmd=$abc$109383$new_n17631_ i0=$abc$109383$new_n19148_ i1=$abc$109383$new_n19145_ q=$abc$109383$new_n19149_
+.subckt mux2_x1 cmd=$abc$109383$new_n17655_ i0=$abc$109383$new_n19147_ i1=$abc$109383$new_n19146_ q=$abc$109383$new_n19148_
+.subckt mux2_x1 cmd=$abc$109383$new_n17631_ i0=$abc$109383$new_n19148_ i1=$abc$109383$new_n19145_ q=$abc$109383$new_n19149_
 .subckt nand2_x0 i0=$abc$109383$new_n19149_ i1=$abc$109383$new_n17598_ nq=$abc$109383$new_n19150_
-.subckt a3_x2 i0=$abc$109383$new_n19150_ i1=$abc$109383$new_n19142_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19151_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[20][23] i1=soc.cpu.minerva.gprf.mem._mem[16][23] q=$abc$109383$new_n19152_
+.subckt and3_x1 i0=$abc$109383$new_n19150_ i1=$abc$109383$new_n19142_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19151_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[20][23] i1=soc.cpu.minerva.gprf.mem._mem[16][23] q=$abc$109383$new_n19152_
 .subckt nand2_x0 i0=$abc$109383$new_n19152_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n19153_
-.subckt oa22_x2 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[21][23] q=$abc$109383$new_n19154_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[17][23] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n19155_
+.subckt or21nand_x1 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[21][23] nq=$abc$109383$new_n19154_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[17][23] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n19155_
 .subckt nand2_x0 i0=$abc$109383$new_n19155_ i1=$abc$109383$new_n19154_ nq=$abc$109383$new_n19156_
 .subckt nand3_x0 i0=$abc$109383$new_n19156_ i1=$abc$109383$new_n19153_ i2=$abc$109383$new_n17598_ nq=$abc$109383$new_n19157_
-.subckt oa22_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[29][23] q=$abc$109383$new_n19158_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][23] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n19159_
+.subckt or21nand_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[29][23] nq=$abc$109383$new_n19158_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][23] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n19159_
 .subckt nand2_x0 i0=$abc$109383$new_n19159_ i1=$abc$109383$new_n19158_ nq=$abc$109383$new_n19160_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[28][23] i1=soc.cpu.minerva.gprf.mem._mem[24][23] q=$abc$109383$new_n19161_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[28][23] i1=soc.cpu.minerva.gprf.mem._mem[24][23] q=$abc$109383$new_n19161_
 .subckt nand2_x0 i0=$abc$109383$new_n19161_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n19162_
 .subckt nand3_x0 i0=$abc$109383$new_n19162_ i1=$abc$109383$new_n19160_ i2=$abc$109383$new_n17538_ nq=$abc$109383$new_n19163_
-.subckt a3_x2 i0=$abc$109383$new_n19163_ i1=$abc$109383$new_n19157_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19164_
-.subckt ao22_x2 i0=$abc$109383$new_n19164_ i1=$abc$109383$new_n19151_ i2=$abc$109383$new_n17754_ q=$abc$109383$new_n19165_
-.subckt o2_x2 i0=$abc$109383$new_n19165_ i1=$abc$109383$new_n19134_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[23]
+.subckt and3_x1 i0=$abc$109383$new_n19163_ i1=$abc$109383$new_n19157_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19164_
+.subckt and21nor_x1 i0=$abc$109383$new_n19164_ i1=$abc$109383$new_n19151_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n19165_
+.subckt or2_x1 i0=$abc$109383$new_n19165_ i1=$abc$109383$new_n19134_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[23]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][24] nq=$abc$109383$new_n19167_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n19167_ nq=$abc$109383$new_n19168_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][24] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17548_ q=$abc$109383$new_n19169_
-.subckt a2_x2 i0=$abc$109383$new_n19169_ i1=$abc$109383$new_n19168_ q=$abc$109383$new_n19170_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][24] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17548_ nq=$abc$109383$new_n19169_
+.subckt and2_x1 i0=$abc$109383$new_n19169_ i1=$abc$109383$new_n19168_ q=$abc$109383$new_n19170_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][24] nq=$abc$109383$new_n19171_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n19171_ nq=$abc$109383$new_n19172_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][24] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17655_ q=$abc$109383$new_n19173_
-.subckt a2_x2 i0=$abc$109383$new_n19173_ i1=$abc$109383$new_n19172_ q=$abc$109383$new_n19174_
-.subckt ao22_x2 i0=$abc$109383$new_n19174_ i1=$abc$109383$new_n19170_ i2=$abc$109383$new_n17638_ q=$abc$109383$new_n19175_
-.subckt mx2_x2 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[15][24] i1=soc.cpu.minerva.gprf.mem._mem[13][24] q=$abc$109383$new_n19176_
-.subckt mx2_x2 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[14][24] i1=soc.cpu.minerva.gprf.mem._mem[12][24] q=$abc$109383$new_n19177_
-.subckt mx2_x2 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n19177_ i1=$abc$109383$new_n19176_ q=$abc$109383$new_n19178_
-.subckt a2_x2 i0=$abc$109383$new_n19178_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19179_
-.subckt ao22_x2 i0=$abc$109383$new_n19179_ i1=$abc$109383$new_n19175_ i2=$abc$109383$new_n17642_ q=$abc$109383$new_n19180_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][24] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17655_ nq=$abc$109383$new_n19173_
+.subckt and2_x1 i0=$abc$109383$new_n19173_ i1=$abc$109383$new_n19172_ q=$abc$109383$new_n19174_
+.subckt and21nor_x1 i0=$abc$109383$new_n19174_ i1=$abc$109383$new_n19170_ i2=$abc$109383$new_n17638_ nq=$abc$109383$new_n19175_
+.subckt mux2_x1 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[15][24] i1=soc.cpu.minerva.gprf.mem._mem[13][24] q=$abc$109383$new_n19176_
+.subckt mux2_x1 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[14][24] i1=soc.cpu.minerva.gprf.mem._mem[12][24] q=$abc$109383$new_n19177_
+.subckt mux2_x1 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n19177_ i1=$abc$109383$new_n19176_ q=$abc$109383$new_n19178_
+.subckt and2_x1 i0=$abc$109383$new_n19178_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19179_
+.subckt and21nor_x1 i0=$abc$109383$new_n19179_ i1=$abc$109383$new_n19175_ i2=$abc$109383$new_n17642_ nq=$abc$109383$new_n19180_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][24] nq=$abc$109383$new_n19181_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n19181_ nq=$abc$109383$new_n19182_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][24] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17548_ q=$abc$109383$new_n19183_
-.subckt a2_x2 i0=$abc$109383$new_n19183_ i1=$abc$109383$new_n19182_ q=$abc$109383$new_n19184_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][24] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17548_ nq=$abc$109383$new_n19183_
+.subckt and2_x1 i0=$abc$109383$new_n19183_ i1=$abc$109383$new_n19182_ q=$abc$109383$new_n19184_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][24] nq=$abc$109383$new_n19185_
 .subckt nand3_x0 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19185_ nq=$abc$109383$new_n19186_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][24] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n19187_
-.subckt a2_x2 i0=$abc$109383$new_n19187_ i1=$abc$109383$new_n19186_ q=$abc$109383$new_n19188_
-.subckt ao22_x2 i0=$abc$109383$new_n19188_ i1=$abc$109383$new_n19184_ i2=$abc$109383$new_n17638_ q=$abc$109383$new_n19189_
-.subckt mx2_x2 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[11][24] i1=soc.cpu.minerva.gprf.mem._mem[9][24] q=$abc$109383$new_n19190_
-.subckt mx2_x2 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[10][24] i1=soc.cpu.minerva.gprf.mem._mem[8][24] q=$abc$109383$new_n19191_
-.subckt mx2_x2 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n19191_ i1=$abc$109383$new_n19190_ q=$abc$109383$new_n19192_
-.subckt a2_x2 i0=$abc$109383$new_n19192_ i1=$abc$109383$new_n17534_ q=$abc$109383$new_n19193_
-.subckt ao22_x2 i0=$abc$109383$new_n19193_ i1=$abc$109383$new_n19189_ i2=$abc$109383$new_n17894_ q=$abc$109383$new_n19194_
-.subckt ao22_x2 i0=$abc$109383$new_n19194_ i1=$abc$109383$new_n19180_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n19195_
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][24] i1=soc.cpu.minerva.gprf.mem._mem[16][24] q=$abc$109383$new_n19196_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][24] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n19187_
+.subckt and2_x1 i0=$abc$109383$new_n19187_ i1=$abc$109383$new_n19186_ q=$abc$109383$new_n19188_
+.subckt and21nor_x1 i0=$abc$109383$new_n19188_ i1=$abc$109383$new_n19184_ i2=$abc$109383$new_n17638_ nq=$abc$109383$new_n19189_
+.subckt mux2_x1 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[11][24] i1=soc.cpu.minerva.gprf.mem._mem[9][24] q=$abc$109383$new_n19190_
+.subckt mux2_x1 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[10][24] i1=soc.cpu.minerva.gprf.mem._mem[8][24] q=$abc$109383$new_n19191_
+.subckt mux2_x1 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n19191_ i1=$abc$109383$new_n19190_ q=$abc$109383$new_n19192_
+.subckt and2_x1 i0=$abc$109383$new_n19192_ i1=$abc$109383$new_n17534_ q=$abc$109383$new_n19193_
+.subckt and21nor_x1 i0=$abc$109383$new_n19193_ i1=$abc$109383$new_n19189_ i2=$abc$109383$new_n17894_ nq=$abc$109383$new_n19194_
+.subckt and21nor_x1 i0=$abc$109383$new_n19194_ i1=$abc$109383$new_n19180_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n19195_
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][24] i1=soc.cpu.minerva.gprf.mem._mem[16][24] q=$abc$109383$new_n19196_
 .subckt nand2_x0 i0=$abc$109383$new_n19196_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n19197_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][24] nq=$abc$109383$new_n19198_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n19198_ nq=$abc$109383$new_n19199_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][24] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ q=$abc$109383$new_n19200_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][24] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n18223_ nq=$abc$109383$new_n19200_
 .subckt nand2_x0 i0=$abc$109383$new_n19200_ i1=$abc$109383$new_n19199_ nq=$abc$109383$new_n19201_
 .subckt nand3_x0 i0=$abc$109383$new_n19201_ i1=$abc$109383$new_n19197_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n19202_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][24] i1=soc.cpu.minerva.gprf.mem._mem[18][24] q=$abc$109383$new_n19203_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][24] i1=soc.cpu.minerva.gprf.mem._mem[18][24] q=$abc$109383$new_n19203_
 .subckt nand2_x0 i0=$abc$109383$new_n19203_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n19204_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][24] nq=$abc$109383$new_n19205_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n19205_ nq=$abc$109383$new_n19206_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][24] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n19207_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][24] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n19207_
 .subckt nand2_x0 i0=$abc$109383$new_n19207_ i1=$abc$109383$new_n19206_ nq=$abc$109383$new_n19208_
 .subckt nand3_x0 i0=$abc$109383$new_n19208_ i1=$abc$109383$new_n19204_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n19209_
 .subckt nand3_x0 i0=$abc$109383$new_n19209_ i1=$abc$109383$new_n19202_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n19210_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[7][24] i1=soc.cpu.minerva.gprf.mem._mem[3][24] q=$abc$109383$new_n19211_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[6][24] i1=soc.cpu.minerva.gprf.mem._mem[2][24] q=$abc$109383$new_n19212_
-.subckt mx2_x2 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19212_ i1=$abc$109383$new_n19211_ q=$abc$109383$new_n19213_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[5][24] i1=soc.cpu.minerva.gprf.mem._mem[1][24] q=$abc$109383$new_n19214_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[4][24] i1=soc.cpu.minerva.gprf.mem._mem[0][24] q=$abc$109383$new_n19215_
-.subckt mx2_x2 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19215_ i1=$abc$109383$new_n19214_ q=$abc$109383$new_n19216_
-.subckt mx2_x2 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n19216_ i1=$abc$109383$new_n19213_ q=$abc$109383$new_n19217_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[7][24] i1=soc.cpu.minerva.gprf.mem._mem[3][24] q=$abc$109383$new_n19211_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[6][24] i1=soc.cpu.minerva.gprf.mem._mem[2][24] q=$abc$109383$new_n19212_
+.subckt mux2_x1 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19212_ i1=$abc$109383$new_n19211_ q=$abc$109383$new_n19213_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[5][24] i1=soc.cpu.minerva.gprf.mem._mem[1][24] q=$abc$109383$new_n19214_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[4][24] i1=soc.cpu.minerva.gprf.mem._mem[0][24] q=$abc$109383$new_n19215_
+.subckt mux2_x1 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19215_ i1=$abc$109383$new_n19214_ q=$abc$109383$new_n19216_
+.subckt mux2_x1 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n19216_ i1=$abc$109383$new_n19213_ q=$abc$109383$new_n19217_
 .subckt nand2_x0 i0=$abc$109383$new_n19217_ i1=$abc$109383$new_n17692_ nq=$abc$109383$new_n19218_
 .subckt nand2_x0 i0=$abc$109383$new_n19218_ i1=$abc$109383$new_n19210_ nq=$abc$109383$new_n19219_
-.subckt oa22_x2 i0=$abc$109383$new_n17927_ i1=$abc$109383$new_n19219_ i2=$abc$109383$new_n19195_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[24]
+.subckt or21nand_x1 i0=$abc$109383$new_n17927_ i1=$abc$109383$new_n19219_ i2=$abc$109383$new_n19195_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[24]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][25] nq=$abc$109383$new_n19221_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n19221_ nq=$abc$109383$new_n19222_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][25] i1=$abc$109383$new_n18532_ i2=$abc$109383$new_n17724_ q=$abc$109383$new_n19223_
-.subckt a2_x2 i0=$abc$109383$new_n19223_ i1=$abc$109383$new_n19222_ q=$abc$109383$new_n19224_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][25] i1=$abc$109383$new_n18532_ i2=$abc$109383$new_n17724_ nq=$abc$109383$new_n19223_
+.subckt and2_x1 i0=$abc$109383$new_n19223_ i1=$abc$109383$new_n19222_ q=$abc$109383$new_n19224_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][25] nq=$abc$109383$new_n19225_
 .subckt nand3_x0 i0=$abc$109383$new_n17804_ i1=$abc$109383$new_n17803_ i2=$abc$109383$new_n19225_ nq=$abc$109383$new_n19226_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][25] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17630_ q=$abc$109383$new_n19227_
-.subckt a2_x2 i0=$abc$109383$new_n19227_ i1=$abc$109383$new_n19226_ q=$abc$109383$new_n19228_
-.subckt ao22_x2 i0=$abc$109383$new_n19228_ i1=$abc$109383$new_n19224_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n19229_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[15][25] i1=soc.cpu.minerva.gprf.mem._mem[13][25] q=$abc$109383$new_n19230_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[11][25] i1=soc.cpu.minerva.gprf.mem._mem[9][25] q=$abc$109383$new_n19231_
-.subckt mx2_x2 cmd=$abc$109383$new_n18082_ i0=$abc$109383$new_n19231_ i1=$abc$109383$new_n19230_ q=$abc$109383$new_n19232_
-.subckt a2_x2 i0=$abc$109383$new_n19232_ i1=$abc$109383$new_n18233_ q=$abc$109383$new_n19233_
-.subckt ao22_x2 i0=$abc$109383$new_n19233_ i1=$abc$109383$new_n19229_ i2=$abc$109383$new_n18223_ q=$abc$109383$new_n19234_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][25] i1=$abc$109383$new_n17807_ i2=$abc$109383$new_n17630_ nq=$abc$109383$new_n19227_
+.subckt and2_x1 i0=$abc$109383$new_n19227_ i1=$abc$109383$new_n19226_ q=$abc$109383$new_n19228_
+.subckt and21nor_x1 i0=$abc$109383$new_n19228_ i1=$abc$109383$new_n19224_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n19229_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[15][25] i1=soc.cpu.minerva.gprf.mem._mem[13][25] q=$abc$109383$new_n19230_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[11][25] i1=soc.cpu.minerva.gprf.mem._mem[9][25] q=$abc$109383$new_n19231_
+.subckt mux2_x1 cmd=$abc$109383$new_n18082_ i0=$abc$109383$new_n19231_ i1=$abc$109383$new_n19230_ q=$abc$109383$new_n19232_
+.subckt and2_x1 i0=$abc$109383$new_n19232_ i1=$abc$109383$new_n18233_ q=$abc$109383$new_n19233_
+.subckt and21nor_x1 i0=$abc$109383$new_n19233_ i1=$abc$109383$new_n19229_ i2=$abc$109383$new_n18223_ nq=$abc$109383$new_n19234_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][25] nq=$abc$109383$new_n19235_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n19235_ nq=$abc$109383$new_n19236_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][25] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17587_ q=$abc$109383$new_n19237_
-.subckt a2_x2 i0=$abc$109383$new_n19237_ i1=$abc$109383$new_n19236_ q=$abc$109383$new_n19238_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][25] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17587_ nq=$abc$109383$new_n19237_
+.subckt and2_x1 i0=$abc$109383$new_n19237_ i1=$abc$109383$new_n19236_ q=$abc$109383$new_n19238_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][25] nq=$abc$109383$new_n19239_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n19239_ nq=$abc$109383$new_n19240_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][25] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17630_ q=$abc$109383$new_n19241_
-.subckt a2_x2 i0=$abc$109383$new_n19241_ i1=$abc$109383$new_n19240_ q=$abc$109383$new_n19242_
-.subckt ao22_x2 i0=$abc$109383$new_n19242_ i1=$abc$109383$new_n19238_ i2=$abc$109383$new_n17819_ q=$abc$109383$new_n19243_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[14][25] i1=soc.cpu.minerva.gprf.mem._mem[12][25] q=$abc$109383$new_n19244_
-.subckt mx2_x2 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][25] i1=soc.cpu.minerva.gprf.mem._mem[8][25] q=$abc$109383$new_n19245_
-.subckt mx2_x2 cmd=$abc$109383$new_n18082_ i0=$abc$109383$new_n19245_ i1=$abc$109383$new_n19244_ q=$abc$109383$new_n19246_
-.subckt a2_x2 i0=$abc$109383$new_n19246_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19247_
-.subckt ao22_x2 i0=$abc$109383$new_n19247_ i1=$abc$109383$new_n19243_ i2=$abc$109383$new_n17968_ q=$abc$109383$new_n19248_
-.subckt ao22_x2 i0=$abc$109383$new_n19248_ i1=$abc$109383$new_n19234_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n19249_
-.subckt mx2_x2 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[20][25] i1=soc.cpu.minerva.gprf.mem._mem[16][25] q=$abc$109383$new_n19250_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][25] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17630_ nq=$abc$109383$new_n19241_
+.subckt and2_x1 i0=$abc$109383$new_n19241_ i1=$abc$109383$new_n19240_ q=$abc$109383$new_n19242_
+.subckt and21nor_x1 i0=$abc$109383$new_n19242_ i1=$abc$109383$new_n19238_ i2=$abc$109383$new_n17819_ nq=$abc$109383$new_n19243_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[14][25] i1=soc.cpu.minerva.gprf.mem._mem[12][25] q=$abc$109383$new_n19244_
+.subckt mux2_x1 cmd=$abc$109383$new_n18352_ i0=soc.cpu.minerva.gprf.mem._mem[10][25] i1=soc.cpu.minerva.gprf.mem._mem[8][25] q=$abc$109383$new_n19245_
+.subckt mux2_x1 cmd=$abc$109383$new_n18082_ i0=$abc$109383$new_n19245_ i1=$abc$109383$new_n19244_ q=$abc$109383$new_n19246_
+.subckt and2_x1 i0=$abc$109383$new_n19246_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19247_
+.subckt and21nor_x1 i0=$abc$109383$new_n19247_ i1=$abc$109383$new_n19243_ i2=$abc$109383$new_n17968_ nq=$abc$109383$new_n19248_
+.subckt and21nor_x1 i0=$abc$109383$new_n19248_ i1=$abc$109383$new_n19234_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n19249_
+.subckt mux2_x1 cmd=$abc$109383$new_n17621_ i0=soc.cpu.minerva.gprf.mem._mem[20][25] i1=soc.cpu.minerva.gprf.mem._mem[16][25] q=$abc$109383$new_n19250_
 .subckt nand2_x0 i0=$abc$109383$new_n19250_ i1=$abc$109383$new_n17619_ nq=$abc$109383$new_n19251_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][25] nq=$abc$109383$new_n19252_
-.subckt a3_x2 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n19252_ q=$abc$109383$new_n19253_
+.subckt and3_x1 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n19252_ q=$abc$109383$new_n19253_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][25] nq=$abc$109383$new_n19254_
-.subckt oa22_x2 i0=$abc$109383$new_n19254_ i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n19255_
-.subckt ao22_x2 i0=$abc$109383$new_n19255_ i1=$abc$109383$new_n19253_ i2=$abc$109383$new_n17544_ q=$abc$109383$new_n19256_
+.subckt or21nand_x1 i0=$abc$109383$new_n19254_ i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n19255_
+.subckt and21nor_x1 i0=$abc$109383$new_n19255_ i1=$abc$109383$new_n19253_ i2=$abc$109383$new_n17544_ nq=$abc$109383$new_n19256_
 .subckt nand2_x0 i0=$abc$109383$new_n19256_ i1=$abc$109383$new_n19251_ nq=$abc$109383$new_n19257_
-.subckt mx2_x2 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[22][25] i1=soc.cpu.minerva.gprf.mem._mem[18][25] q=$abc$109383$new_n19258_
+.subckt mux2_x1 cmd=$abc$109383$new_n17614_ i0=soc.cpu.minerva.gprf.mem._mem[22][25] i1=soc.cpu.minerva.gprf.mem._mem[18][25] q=$abc$109383$new_n19258_
 .subckt nand2_x0 i0=$abc$109383$new_n19258_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n19259_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][25] nq=$abc$109383$new_n19260_
-.subckt a3_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n19260_ q=$abc$109383$new_n19261_
+.subckt and3_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17560_ i2=$abc$109383$new_n19260_ q=$abc$109383$new_n19261_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[23][25] nq=$abc$109383$new_n19262_
-.subckt oa22_x2 i0=$abc$109383$new_n19262_ i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17798_ q=$abc$109383$new_n19263_
-.subckt ao22_x2 i0=$abc$109383$new_n19263_ i1=$abc$109383$new_n19261_ i2=$abc$109383$new_n18743_ q=$abc$109383$new_n19264_
+.subckt or21nand_x1 i0=$abc$109383$new_n19262_ i1=$abc$109383$new_n18082_ i2=$abc$109383$new_n17798_ nq=$abc$109383$new_n19263_
+.subckt and21nor_x1 i0=$abc$109383$new_n19263_ i1=$abc$109383$new_n19261_ i2=$abc$109383$new_n18743_ nq=$abc$109383$new_n19264_
 .subckt nand2_x0 i0=$abc$109383$new_n19264_ i1=$abc$109383$new_n19259_ nq=$abc$109383$new_n19265_
-.subckt a3_x2 i0=$abc$109383$new_n19265_ i1=$abc$109383$new_n19257_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19266_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[4][25] i1=soc.cpu.minerva.gprf.mem._mem[0][25] q=$abc$109383$new_n19267_
+.subckt and3_x1 i0=$abc$109383$new_n19265_ i1=$abc$109383$new_n19257_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19266_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[4][25] i1=soc.cpu.minerva.gprf.mem._mem[0][25] q=$abc$109383$new_n19267_
 .subckt nand2_x0 i0=$abc$109383$new_n19267_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n19268_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[1][25] nq=$abc$109383$new_n19269_
 .subckt nand3_x0 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=$abc$109383$new_n19269_ nq=$abc$109383$new_n19270_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][25] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n19271_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][25] i1=$abc$109383$new_n17875_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n19271_
 .subckt nand2_x0 i0=$abc$109383$new_n19271_ i1=$abc$109383$new_n19270_ nq=$abc$109383$new_n19272_
 .subckt nand3_x0 i0=$abc$109383$new_n19272_ i1=$abc$109383$new_n19268_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n19273_
-.subckt mx2_x2 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[6][25] i1=soc.cpu.minerva.gprf.mem._mem[2][25] q=$abc$109383$new_n19274_
+.subckt mux2_x1 cmd=$abc$109383$new_n17697_ i0=soc.cpu.minerva.gprf.mem._mem[6][25] i1=soc.cpu.minerva.gprf.mem._mem[2][25] q=$abc$109383$new_n19274_
 .subckt nand2_x0 i0=$abc$109383$new_n19274_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n19275_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][25] nq=$abc$109383$new_n19276_
 .subckt nand3_x0 i0=$abc$109383$new_n17872_ i1=$abc$109383$new_n17871_ i2=$abc$109383$new_n19276_ nq=$abc$109383$new_n19277_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][25] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n19278_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][25] i1=$abc$109383$new_n17730_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n19278_
 .subckt nand2_x0 i0=$abc$109383$new_n19278_ i1=$abc$109383$new_n19277_ nq=$abc$109383$new_n19279_
 .subckt nand3_x0 i0=$abc$109383$new_n19279_ i1=$abc$109383$new_n19275_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n19280_
-.subckt a3_x2 i0=$abc$109383$new_n19280_ i1=$abc$109383$new_n19273_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19281_
-.subckt ao22_x2 i0=$abc$109383$new_n19281_ i1=$abc$109383$new_n19266_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n19282_
-.subckt o2_x2 i0=$abc$109383$new_n19282_ i1=$abc$109383$new_n19249_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[25]
-.subckt mx2_x2 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[4][26] i1=soc.cpu.minerva.gprf.mem._mem[0][26] q=$abc$109383$new_n19284_
+.subckt and3_x1 i0=$abc$109383$new_n19280_ i1=$abc$109383$new_n19273_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19281_
+.subckt and21nor_x1 i0=$abc$109383$new_n19281_ i1=$abc$109383$new_n19266_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n19282_
+.subckt or2_x1 i0=$abc$109383$new_n19282_ i1=$abc$109383$new_n19249_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[25]
+.subckt mux2_x1 cmd=$abc$109383$new_n17555_ i0=soc.cpu.minerva.gprf.mem._mem[4][26] i1=soc.cpu.minerva.gprf.mem._mem[0][26] q=$abc$109383$new_n19284_
 .subckt nand2_x0 i0=$abc$109383$new_n19284_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n19285_
-.subckt oa22_x2 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[5][26] q=$abc$109383$new_n19286_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][26] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17570_ q=$abc$109383$new_n19287_
+.subckt or21nand_x1 i0=$abc$109383$new_n17625_ i1=$abc$109383$new_n17624_ i2=soc.cpu.minerva.gprf.mem._mem[5][26] nq=$abc$109383$new_n19286_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][26] i1=$abc$109383$new_n17631_ i2=$abc$109383$new_n17570_ nq=$abc$109383$new_n19287_
 .subckt nand2_x0 i0=$abc$109383$new_n19287_ i1=$abc$109383$new_n19286_ nq=$abc$109383$new_n19288_
 .subckt nand3_x0 i0=$abc$109383$new_n19288_ i1=$abc$109383$new_n19285_ i2=$abc$109383$new_n17545_ nq=$abc$109383$new_n19289_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][26] nq=$abc$109383$new_n19290_
 .subckt nand3_x0 i0=$abc$109383$new_n17583_ i1=$abc$109383$new_n17582_ i2=$abc$109383$new_n19290_ nq=$abc$109383$new_n19291_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[7][26] i1=$abc$109383$new_n17588_ i2=$abc$109383$new_n17585_ q=$abc$109383$new_n19292_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[7][26] i1=$abc$109383$new_n17588_ i2=$abc$109383$new_n17585_ nq=$abc$109383$new_n19292_
 .subckt nand2_x0 i0=$abc$109383$new_n19292_ i1=$abc$109383$new_n19291_ nq=$abc$109383$new_n19293_
-.subckt mx2_x2 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[6][26] i1=soc.cpu.minerva.gprf.mem._mem[2][26] q=$abc$109383$new_n19294_
+.subckt mux2_x1 cmd=$abc$109383$new_n17591_ i0=soc.cpu.minerva.gprf.mem._mem[6][26] i1=soc.cpu.minerva.gprf.mem._mem[2][26] q=$abc$109383$new_n19294_
 .subckt nand2_x0 i0=$abc$109383$new_n19294_ i1=$abc$109383$new_n17550_ nq=$abc$109383$new_n19295_
 .subckt nand3_x0 i0=$abc$109383$new_n19295_ i1=$abc$109383$new_n19293_ i2=$abc$109383$new_n17579_ nq=$abc$109383$new_n19296_
-.subckt a3_x2 i0=$abc$109383$new_n19296_ i1=$abc$109383$new_n19289_ i2=$abc$109383$new_n18234_ q=$abc$109383$new_n19297_
+.subckt and3_x1 i0=$abc$109383$new_n19296_ i1=$abc$109383$new_n19289_ i2=$abc$109383$new_n18234_ q=$abc$109383$new_n19297_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[20][26] nq=$abc$109383$new_n19298_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[22][26] nq=$abc$109383$new_n19299_
-.subckt mx2_x2 cmd=$abc$109383$new_n17644_ i0=$abc$109383$new_n19299_ i1=$abc$109383$new_n19298_ q=$abc$109383$new_n19300_
+.subckt mux2_x1 cmd=$abc$109383$new_n17644_ i0=$abc$109383$new_n19299_ i1=$abc$109383$new_n19298_ q=$abc$109383$new_n19300_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[16][26] nq=$abc$109383$new_n19301_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[18][26] nq=$abc$109383$new_n19302_
-.subckt mx2_x2 cmd=$abc$109383$new_n17644_ i0=$abc$109383$new_n19302_ i1=$abc$109383$new_n19301_ q=$abc$109383$new_n19303_
-.subckt mx2_x2 cmd=$abc$109383$new_n17631_ i0=$abc$109383$new_n19303_ i1=$abc$109383$new_n19300_ q=$abc$109383$new_n19304_
+.subckt mux2_x1 cmd=$abc$109383$new_n17644_ i0=$abc$109383$new_n19302_ i1=$abc$109383$new_n19301_ q=$abc$109383$new_n19303_
+.subckt mux2_x1 cmd=$abc$109383$new_n17631_ i0=$abc$109383$new_n19303_ i1=$abc$109383$new_n19300_ q=$abc$109383$new_n19304_
 .subckt nand2_x0 i0=$abc$109383$new_n19304_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n19305_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[23][26] i1=soc.cpu.minerva.gprf.mem._mem[21][26] q=$abc$109383$new_n19306_
-.subckt mx2_x2 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[19][26] i1=soc.cpu.minerva.gprf.mem._mem[17][26] q=$abc$109383$new_n19307_
-.subckt mx2_x2 cmd=$abc$109383$new_n18082_ i0=$abc$109383$new_n19307_ i1=$abc$109383$new_n19306_ q=$abc$109383$new_n19308_
-.subckt ao22_x2 i0=$abc$109383$new_n19308_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n19309_
-.subckt a2_x2 i0=$abc$109383$new_n19309_ i1=$abc$109383$new_n19305_ q=$abc$109383$new_n19310_
-.subckt ao22_x2 i0=$abc$109383$new_n19310_ i1=$abc$109383$new_n19297_ i2=$abc$109383$new_n17839_ q=$abc$109383$new_n19311_
-.subckt mx2_x2 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[28][26] i1=soc.cpu.minerva.gprf.mem._mem[24][26] q=$abc$109383$new_n19312_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[23][26] i1=soc.cpu.minerva.gprf.mem._mem[21][26] q=$abc$109383$new_n19306_
+.subckt mux2_x1 cmd=$abc$109383$new_n17831_ i0=soc.cpu.minerva.gprf.mem._mem[19][26] i1=soc.cpu.minerva.gprf.mem._mem[17][26] q=$abc$109383$new_n19307_
+.subckt mux2_x1 cmd=$abc$109383$new_n18082_ i0=$abc$109383$new_n19307_ i1=$abc$109383$new_n19306_ q=$abc$109383$new_n19308_
+.subckt and21nor_x1 i0=$abc$109383$new_n19308_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n19309_
+.subckt and2_x1 i0=$abc$109383$new_n19309_ i1=$abc$109383$new_n19305_ q=$abc$109383$new_n19310_
+.subckt and21nor_x1 i0=$abc$109383$new_n19310_ i1=$abc$109383$new_n19297_ i2=$abc$109383$new_n17839_ nq=$abc$109383$new_n19311_
+.subckt mux2_x1 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[28][26] i1=soc.cpu.minerva.gprf.mem._mem[24][26] q=$abc$109383$new_n19312_
 .subckt nand2_x0 i0=$abc$109383$new_n19312_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n19313_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][26] nq=$abc$109383$new_n19314_
 .subckt nand3_x0 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17608_ i2=$abc$109383$new_n19314_ nq=$abc$109383$new_n19315_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[29][26] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17904_ q=$abc$109383$new_n19316_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[29][26] i1=$abc$109383$new_n17614_ i2=$abc$109383$new_n17904_ nq=$abc$109383$new_n19316_
 .subckt nand2_x0 i0=$abc$109383$new_n19316_ i1=$abc$109383$new_n19315_ nq=$abc$109383$new_n19317_
 .subckt nand3_x0 i0=$abc$109383$new_n19317_ i1=$abc$109383$new_n19313_ i2=$abc$109383$new_n17992_ nq=$abc$109383$new_n19318_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[31][26] i1=soc.cpu.minerva.gprf.mem._mem[27][26] q=$abc$109383$new_n19319_
-.subckt mx2_x2 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[30][26] i1=soc.cpu.minerva.gprf.mem._mem[26][26] q=$abc$109383$new_n19320_
-.subckt mx2_x2 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n19320_ i1=$abc$109383$new_n19319_ q=$abc$109383$new_n19321_
-.subckt ao22_x2 i0=$abc$109383$new_n19321_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n19322_
-.subckt a2_x2 i0=$abc$109383$new_n19322_ i1=$abc$109383$new_n19318_ q=$abc$109383$new_n19323_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[12][26] i1=soc.cpu.minerva.gprf.mem._mem[8][26] q=$abc$109383$new_n19324_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[31][26] i1=soc.cpu.minerva.gprf.mem._mem[27][26] q=$abc$109383$new_n19319_
+.subckt mux2_x1 cmd=$abc$109383$new_n17586_ i0=soc.cpu.minerva.gprf.mem._mem[30][26] i1=soc.cpu.minerva.gprf.mem._mem[26][26] q=$abc$109383$new_n19320_
+.subckt mux2_x1 cmd=$abc$109383$new_n18003_ i0=$abc$109383$new_n19320_ i1=$abc$109383$new_n19319_ q=$abc$109383$new_n19321_
+.subckt and21nor_x1 i0=$abc$109383$new_n19321_ i1=$abc$109383$new_n17737_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n19322_
+.subckt and2_x1 i0=$abc$109383$new_n19322_ i1=$abc$109383$new_n19318_ q=$abc$109383$new_n19323_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[12][26] i1=soc.cpu.minerva.gprf.mem._mem[8][26] q=$abc$109383$new_n19324_
 .subckt nand2_x0 i0=$abc$109383$new_n19324_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n19325_
-.subckt oa22_x2 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[13][26] q=$abc$109383$new_n19326_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][26] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17882_ q=$abc$109383$new_n19327_
+.subckt or21nand_x1 i0=$abc$109383$new_n17758_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[13][26] nq=$abc$109383$new_n19326_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][26] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17882_ nq=$abc$109383$new_n19327_
 .subckt nand2_x0 i0=$abc$109383$new_n19327_ i1=$abc$109383$new_n19326_ nq=$abc$109383$new_n19328_
 .subckt nand3_x0 i0=$abc$109383$new_n19328_ i1=$abc$109383$new_n19325_ i2=$abc$109383$new_n17672_ nq=$abc$109383$new_n19329_
-.subckt oa22_x2 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[15][26] q=$abc$109383$new_n19330_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[11][26] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17569_ q=$abc$109383$new_n19331_
-.subckt a2_x2 i0=$abc$109383$new_n19331_ i1=$abc$109383$new_n19330_ q=$abc$109383$new_n19332_
-.subckt mx2_x2 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[14][26] i1=soc.cpu.minerva.gprf.mem._mem[10][26] q=$abc$109383$new_n19333_
-.subckt oa22_x2 i0=$abc$109383$new_n17798_ i1=$abc$109383$new_n19333_ i2=$abc$109383$new_n17543_ q=$abc$109383$new_n19334_
-.subckt ao22_x2 i0=$abc$109383$new_n19334_ i1=$abc$109383$new_n19332_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n19335_
-.subckt a2_x2 i0=$abc$109383$new_n19335_ i1=$abc$109383$new_n19329_ q=$abc$109383$new_n19336_
-.subckt ao22_x2 i0=$abc$109383$new_n19336_ i1=$abc$109383$new_n19323_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n19337_
-.subckt o2_x2 i0=$abc$109383$new_n19337_ i1=$abc$109383$new_n19311_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[26]
-.subckt mx2_x2 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[30][27] i1=soc.cpu.minerva.gprf.mem._mem[26][27] q=$abc$109383$new_n19339_
+.subckt or21nand_x1 i0=$abc$109383$new_n17563_ i1=$abc$109383$new_n17580_ i2=soc.cpu.minerva.gprf.mem._mem[15][26] nq=$abc$109383$new_n19330_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[11][26] i1=$abc$109383$new_n17630_ i2=$abc$109383$new_n17569_ nq=$abc$109383$new_n19331_
+.subckt and2_x1 i0=$abc$109383$new_n19331_ i1=$abc$109383$new_n19330_ q=$abc$109383$new_n19332_
+.subckt mux2_x1 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[14][26] i1=soc.cpu.minerva.gprf.mem._mem[10][26] q=$abc$109383$new_n19333_
+.subckt or21nand_x1 i0=$abc$109383$new_n17798_ i1=$abc$109383$new_n19333_ i2=$abc$109383$new_n17543_ nq=$abc$109383$new_n19334_
+.subckt and21nor_x1 i0=$abc$109383$new_n19334_ i1=$abc$109383$new_n19332_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n19335_
+.subckt and2_x1 i0=$abc$109383$new_n19335_ i1=$abc$109383$new_n19329_ q=$abc$109383$new_n19336_
+.subckt and21nor_x1 i0=$abc$109383$new_n19336_ i1=$abc$109383$new_n19323_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n19337_
+.subckt or2_x1 i0=$abc$109383$new_n19337_ i1=$abc$109383$new_n19311_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[26]
+.subckt mux2_x1 cmd=$abc$109383$new_n17875_ i0=soc.cpu.minerva.gprf.mem._mem[30][27] i1=soc.cpu.minerva.gprf.mem._mem[26][27] q=$abc$109383$new_n19339_
 .subckt nand2_x0 i0=$abc$109383$new_n19339_ i1=$abc$109383$new_n17694_ nq=$abc$109383$new_n19340_
 .subckt nand3_x0 i0=$abc$109383$new_n17704_ i1=$abc$109383$new_n17702_ i2=$abc$109383$new_n17274_ nq=$abc$109383$new_n19341_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][27] i1=$abc$109383$new_n17591_ i2=$abc$109383$new_n17613_ q=$abc$109383$new_n19342_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][27] i1=$abc$109383$new_n17591_ i2=$abc$109383$new_n17613_ nq=$abc$109383$new_n19342_
 .subckt nand2_x0 i0=$abc$109383$new_n19342_ i1=$abc$109383$new_n19341_ nq=$abc$109383$new_n19343_
-.subckt oa22_x2 i0=$abc$109383$new_n19343_ i1=$abc$109383$new_n19340_ i2=$abc$109383$new_n17672_ q=$abc$109383$new_n19344_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[28][27] i1=soc.cpu.minerva.gprf.mem._mem[24][27] q=$abc$109383$new_n19345_
+.subckt or21nand_x1 i0=$abc$109383$new_n19343_ i1=$abc$109383$new_n19340_ i2=$abc$109383$new_n17672_ nq=$abc$109383$new_n19344_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[28][27] i1=soc.cpu.minerva.gprf.mem._mem[24][27] q=$abc$109383$new_n19345_
 .subckt nand2_x0 i0=$abc$109383$new_n19345_ i1=$abc$109383$new_n17764_ nq=$abc$109383$new_n19346_
-.subckt oa22_x2 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[29][27] q=$abc$109383$new_n19347_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][27] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n19348_
+.subckt or21nand_x1 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[29][27] nq=$abc$109383$new_n19347_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][27] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n19348_
 .subckt nand2_x0 i0=$abc$109383$new_n19348_ i1=$abc$109383$new_n19347_ nq=$abc$109383$new_n19349_
-.subckt oa22_x2 i0=$abc$109383$new_n19349_ i1=$abc$109383$new_n19346_ i2=$abc$109383$new_n17715_ q=$abc$109383$new_n19350_
-.subckt oa22_x2 i0=$abc$109383$new_n19350_ i1=$abc$109383$new_n19344_ i2=$abc$109383$new_n17536_ q=$abc$109383$new_n19351_
+.subckt or21nand_x1 i0=$abc$109383$new_n19349_ i1=$abc$109383$new_n19346_ i2=$abc$109383$new_n17715_ nq=$abc$109383$new_n19350_
+.subckt or21nand_x1 i0=$abc$109383$new_n19350_ i1=$abc$109383$new_n19344_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n19351_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[9][27] nq=$abc$109383$new_n19352_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[13][27] nq=$abc$109383$new_n19353_
-.subckt mx2_x2 cmd=$abc$109383$new_n17588_ i0=$abc$109383$new_n19353_ i1=$abc$109383$new_n19352_ q=$abc$109383$new_n19354_
+.subckt mux2_x1 cmd=$abc$109383$new_n17588_ i0=$abc$109383$new_n19353_ i1=$abc$109383$new_n19352_ q=$abc$109383$new_n19354_
 .subckt nand2_x0 i0=$abc$109383$new_n19354_ i1=$abc$109383$new_n18223_ nq=$abc$109383$new_n19355_
-.subckt mx2_x2 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[12][27] i1=soc.cpu.minerva.gprf.mem._mem[8][27] q=$abc$109383$new_n19356_
-.subckt ao22_x2 i0=$abc$109383$new_n18212_ i1=$abc$109383$new_n19356_ i2=$abc$109383$new_n17737_ q=$abc$109383$new_n19357_
+.subckt mux2_x1 cmd=$abc$109383$new_n17766_ i0=soc.cpu.minerva.gprf.mem._mem[12][27] i1=soc.cpu.minerva.gprf.mem._mem[8][27] q=$abc$109383$new_n19356_
+.subckt and21nor_x1 i0=$abc$109383$new_n18212_ i1=$abc$109383$new_n19356_ i2=$abc$109383$new_n17737_ nq=$abc$109383$new_n19357_
 .subckt nand2_x0 i0=$abc$109383$new_n19357_ i1=$abc$109383$new_n19355_ nq=$abc$109383$new_n19358_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[10][27] nq=$abc$109383$new_n19359_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[14][27] nq=$abc$109383$new_n19360_
-.subckt mx2_x2 cmd=$abc$109383$new_n17572_ i0=$abc$109383$new_n19360_ i1=$abc$109383$new_n19359_ q=$abc$109383$new_n19361_
+.subckt mux2_x1 cmd=$abc$109383$new_n17572_ i0=$abc$109383$new_n19360_ i1=$abc$109383$new_n19359_ q=$abc$109383$new_n19361_
 .subckt nand2_x0 i0=$abc$109383$new_n19361_ i1=$abc$109383$new_n17968_ nq=$abc$109383$new_n19362_
-.subckt mx2_x2 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[15][27] i1=soc.cpu.minerva.gprf.mem._mem[11][27] q=$abc$109383$new_n19363_
-.subckt ao22_x2 i0=$abc$109383$new_n17549_ i1=$abc$109383$new_n19363_ i2=$abc$109383$new_n18228_ q=$abc$109383$new_n19364_
+.subckt mux2_x1 cmd=$abc$109383$new_n17724_ i0=soc.cpu.minerva.gprf.mem._mem[15][27] i1=soc.cpu.minerva.gprf.mem._mem[11][27] q=$abc$109383$new_n19363_
+.subckt and21nor_x1 i0=$abc$109383$new_n17549_ i1=$abc$109383$new_n19363_ i2=$abc$109383$new_n18228_ nq=$abc$109383$new_n19364_
 .subckt nand2_x0 i0=$abc$109383$new_n19364_ i1=$abc$109383$new_n19362_ nq=$abc$109383$new_n19365_
-.subckt oa22_x2 i0=$abc$109383$new_n19365_ i1=$abc$109383$new_n19358_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n19366_
-.subckt oa22_x2 i0=$abc$109383$new_n19366_ i1=$abc$109383$new_n19351_ i2=$abc$109383$new_n17927_ q=$abc$109383$new_n19367_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[20][27] i1=soc.cpu.minerva.gprf.mem._mem[16][27] q=$abc$109383$new_n19368_
+.subckt or21nand_x1 i0=$abc$109383$new_n19365_ i1=$abc$109383$new_n19358_ i2=$abc$109383$new_n17960_ nq=$abc$109383$new_n19366_
+.subckt or21nand_x1 i0=$abc$109383$new_n19366_ i1=$abc$109383$new_n19351_ i2=$abc$109383$new_n17927_ nq=$abc$109383$new_n19367_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[20][27] i1=soc.cpu.minerva.gprf.mem._mem[16][27] q=$abc$109383$new_n19368_
 .subckt nand2_x0 i0=$abc$109383$new_n19368_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n19369_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][27] nq=$abc$109383$new_n19370_
 .subckt nand3_x0 i0=$abc$109383$new_n18027_ i1=$abc$109383$new_n18026_ i2=$abc$109383$new_n19370_ nq=$abc$109383$new_n19371_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][27] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n19372_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][27] i1=$abc$109383$new_n17710_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n19372_
 .subckt nand2_x0 i0=$abc$109383$new_n19372_ i1=$abc$109383$new_n19371_ nq=$abc$109383$new_n19373_
 .subckt nand3_x0 i0=$abc$109383$new_n19373_ i1=$abc$109383$new_n19369_ i2=$abc$109383$new_n17754_ nq=$abc$109383$new_n19374_
-.subckt mx2_x2 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][27] i1=soc.cpu.minerva.gprf.mem._mem[18][27] q=$abc$109383$new_n19375_
+.subckt mux2_x1 cmd=$abc$109383$new_n17767_ i0=soc.cpu.minerva.gprf.mem._mem[22][27] i1=soc.cpu.minerva.gprf.mem._mem[18][27] q=$abc$109383$new_n19375_
 .subckt nand2_x0 i0=$abc$109383$new_n19375_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n19376_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][27] nq=$abc$109383$new_n19377_
 .subckt nand3_x0 i0=$abc$109383$new_n17743_ i1=$abc$109383$new_n17742_ i2=$abc$109383$new_n19377_ nq=$abc$109383$new_n19378_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[23][27] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n19379_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[23][27] i1=$abc$109383$new_n17746_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n19379_
 .subckt nand2_x0 i0=$abc$109383$new_n19379_ i1=$abc$109383$new_n19378_ nq=$abc$109383$new_n19380_
 .subckt nand3_x0 i0=$abc$109383$new_n19380_ i1=$abc$109383$new_n19376_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n19381_
 .subckt nand3_x0 i0=$abc$109383$new_n19381_ i1=$abc$109383$new_n19374_ i2=$abc$109383$new_n17640_ nq=$abc$109383$new_n19382_
-.subckt mx2_x2 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[6][27] i1=soc.cpu.minerva.gprf.mem._mem[2][27] q=$abc$109383$new_n19383_
+.subckt mux2_x1 cmd=$abc$109383$new_n17917_ i0=soc.cpu.minerva.gprf.mem._mem[6][27] i1=soc.cpu.minerva.gprf.mem._mem[2][27] q=$abc$109383$new_n19383_
 .subckt nand2_x0 i0=$abc$109383$new_n19383_ i1=$abc$109383$new_n17723_ nq=$abc$109383$new_n19384_
-.subckt oa22_x2 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[7][27] q=$abc$109383$new_n19385_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[3][27] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ q=$abc$109383$new_n19386_
+.subckt or21nand_x1 i0=$abc$109383$new_n17565_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[7][27] nq=$abc$109383$new_n19385_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[3][27] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17745_ nq=$abc$109383$new_n19386_
 .subckt nand2_x0 i0=$abc$109383$new_n19386_ i1=$abc$109383$new_n19385_ nq=$abc$109383$new_n19387_
 .subckt nand3_x0 i0=$abc$109383$new_n19387_ i1=$abc$109383$new_n19384_ i2=$abc$109383$new_n17916_ nq=$abc$109383$new_n19388_
-.subckt mx2_x2 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[4][27] i1=soc.cpu.minerva.gprf.mem._mem[0][27] q=$abc$109383$new_n19389_
+.subckt mux2_x1 cmd=$abc$109383$new_n17588_ i0=soc.cpu.minerva.gprf.mem._mem[4][27] i1=soc.cpu.minerva.gprf.mem._mem[0][27] q=$abc$109383$new_n19389_
 .subckt nand2_x0 i0=$abc$109383$new_n19389_ i1=$abc$109383$new_n17948_ nq=$abc$109383$new_n19390_
-.subckt oa22_x2 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[5][27] q=$abc$109383$new_n19391_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][27] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n19392_
+.subckt or21nand_x1 i0=$abc$109383$new_n17610_ i1=$abc$109383$new_n17561_ i2=soc.cpu.minerva.gprf.mem._mem[5][27] nq=$abc$109383$new_n19391_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][27] i1=$abc$109383$new_n17935_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n19392_
 .subckt nand2_x0 i0=$abc$109383$new_n19392_ i1=$abc$109383$new_n19391_ nq=$abc$109383$new_n19393_
 .subckt nand3_x0 i0=$abc$109383$new_n19393_ i1=$abc$109383$new_n19390_ i2=$abc$109383$new_n17738_ nq=$abc$109383$new_n19394_
 .subckt nand3_x0 i0=$abc$109383$new_n19394_ i1=$abc$109383$new_n19388_ i2=$abc$109383$new_n17536_ nq=$abc$109383$new_n19395_
-.subckt oa22_x2 i0=$abc$109383$new_n19395_ i1=$abc$109383$new_n19382_ i2=$abc$109383$new_n17786_ q=$abc$109383$new_n19396_
+.subckt or21nand_x1 i0=$abc$109383$new_n19395_ i1=$abc$109383$new_n19382_ i2=$abc$109383$new_n17786_ nq=$abc$109383$new_n19396_
 .subckt nand2_x0 i0=$abc$109383$new_n19396_ i1=$abc$109383$new_n19367_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[27]
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[30][28] i1=soc.cpu.minerva.gprf.mem._mem[26][28] q=$abc$109383$new_n19398_
-.subckt a2_x2 i0=$abc$109383$new_n19398_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n19399_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[30][28] i1=soc.cpu.minerva.gprf.mem._mem[26][28] q=$abc$109383$new_n19398_
+.subckt and2_x1 i0=$abc$109383$new_n19398_ i1=$abc$109383$new_n17721_ q=$abc$109383$new_n19399_
 .subckt nand3_x0 i0=$abc$109383$new_n17609_ i1=$abc$109383$new_n17607_ i2=$abc$109383$new_n17332_ nq=$abc$109383$new_n19400_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][28] i1=$abc$109383$new_n17620_ i2=$abc$109383$new_n17655_ q=$abc$109383$new_n19401_
-.subckt a2_x2 i0=$abc$109383$new_n19401_ i1=$abc$109383$new_n19400_ q=$abc$109383$new_n19402_
-.subckt ao22_x2 i0=$abc$109383$new_n19402_ i1=$abc$109383$new_n19399_ i2=$abc$109383$new_n18743_ q=$abc$109383$new_n19403_
-.subckt mx2_x2 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[28][28] i1=soc.cpu.minerva.gprf.mem._mem[24][28] q=$abc$109383$new_n19404_
-.subckt a2_x2 i0=$abc$109383$new_n19404_ i1=$abc$109383$new_n17862_ q=$abc$109383$new_n19405_
-.subckt oa22_x2 i0=$abc$109383$new_n17562_ i1=$abc$109383$new_n17559_ i2=soc.cpu.minerva.gprf.mem._mem[29][28] q=$abc$109383$new_n19406_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[25][28] i1=$abc$109383$new_n17629_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n19407_
-.subckt a2_x2 i0=$abc$109383$new_n19407_ i1=$abc$109383$new_n19406_ q=$abc$109383$new_n19408_
-.subckt ao22_x2 i0=$abc$109383$new_n19408_ i1=$abc$109383$new_n19405_ i2=$abc$109383$new_n17544_ q=$abc$109383$new_n19409_
-.subckt ao22_x2 i0=$abc$109383$new_n19409_ i1=$abc$109383$new_n19403_ i2=$abc$109383$new_n17752_ q=$abc$109383$new_n19410_
-.subckt mx2_x2 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[12][28] i1=soc.cpu.minerva.gprf.mem._mem[8][28] q=$abc$109383$new_n19411_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][28] i1=$abc$109383$new_n17620_ i2=$abc$109383$new_n17655_ nq=$abc$109383$new_n19401_
+.subckt and2_x1 i0=$abc$109383$new_n19401_ i1=$abc$109383$new_n19400_ q=$abc$109383$new_n19402_
+.subckt and21nor_x1 i0=$abc$109383$new_n19402_ i1=$abc$109383$new_n19399_ i2=$abc$109383$new_n18743_ nq=$abc$109383$new_n19403_
+.subckt mux2_x1 cmd=$abc$109383$new_n17696_ i0=soc.cpu.minerva.gprf.mem._mem[28][28] i1=soc.cpu.minerva.gprf.mem._mem[24][28] q=$abc$109383$new_n19404_
+.subckt and2_x1 i0=$abc$109383$new_n19404_ i1=$abc$109383$new_n17862_ q=$abc$109383$new_n19405_
+.subckt or21nand_x1 i0=$abc$109383$new_n17562_ i1=$abc$109383$new_n17559_ i2=soc.cpu.minerva.gprf.mem._mem[29][28] nq=$abc$109383$new_n19406_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[25][28] i1=$abc$109383$new_n17629_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n19407_
+.subckt and2_x1 i0=$abc$109383$new_n19407_ i1=$abc$109383$new_n19406_ q=$abc$109383$new_n19408_
+.subckt and21nor_x1 i0=$abc$109383$new_n19408_ i1=$abc$109383$new_n19405_ i2=$abc$109383$new_n17544_ nq=$abc$109383$new_n19409_
+.subckt and21nor_x1 i0=$abc$109383$new_n19409_ i1=$abc$109383$new_n19403_ i2=$abc$109383$new_n17752_ nq=$abc$109383$new_n19410_
+.subckt mux2_x1 cmd=$abc$109383$new_n17867_ i0=soc.cpu.minerva.gprf.mem._mem[12][28] i1=soc.cpu.minerva.gprf.mem._mem[8][28] q=$abc$109383$new_n19411_
 .subckt nand2_x0 i0=$abc$109383$new_n19411_ i1=$abc$109383$new_n17722_ nq=$abc$109383$new_n19412_
-.subckt oa22_x2 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[13][28] q=$abc$109383$new_n19413_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[9][28] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n19414_
+.subckt or21nand_x1 i0=$abc$109383$new_n17564_ i1=$abc$109383$new_n17581_ i2=soc.cpu.minerva.gprf.mem._mem[13][28] nq=$abc$109383$new_n19413_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[9][28] i1=$abc$109383$new_n17641_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n19414_
 .subckt nand2_x0 i0=$abc$109383$new_n19414_ i1=$abc$109383$new_n19413_ nq=$abc$109383$new_n19415_
 .subckt nand3_x0 i0=$abc$109383$new_n19415_ i1=$abc$109383$new_n19412_ i2=$abc$109383$new_n17646_ nq=$abc$109383$new_n19416_
-.subckt mx2_x2 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[15][28] i1=soc.cpu.minerva.gprf.mem._mem[11][28] q=$abc$109383$new_n19417_
-.subckt mx2_x2 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[14][28] i1=soc.cpu.minerva.gprf.mem._mem[10][28] q=$abc$109383$new_n19418_
-.subckt mx2_x2 cmd=$abc$109383$new_n17806_ i0=$abc$109383$new_n19418_ i1=$abc$109383$new_n19417_ q=$abc$109383$new_n19419_
-.subckt ao22_x2 i0=$abc$109383$new_n19419_ i1=$abc$109383$new_n17544_ i2=$abc$109383$new_n18233_ q=$abc$109383$new_n19420_
-.subckt a2_x2 i0=$abc$109383$new_n19420_ i1=$abc$109383$new_n19416_ q=$abc$109383$new_n19421_
-.subckt o2_x2 i0=$abc$109383$new_n19421_ i1=$abc$109383$new_n19410_ q=$abc$109383$new_n19422_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[4][28] i1=soc.cpu.minerva.gprf.mem._mem[0][28] q=$abc$109383$new_n19423_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[5][28] i1=soc.cpu.minerva.gprf.mem._mem[1][28] q=$abc$109383$new_n19424_
-.subckt mx2_x2 cmd=$abc$109383$new_n17721_ i0=$abc$109383$new_n19424_ i1=$abc$109383$new_n19423_ q=$abc$109383$new_n19425_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][28] i1=soc.cpu.minerva.gprf.mem._mem[2][28] q=$abc$109383$new_n19426_
-.subckt mx2_x2 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[7][28] i1=soc.cpu.minerva.gprf.mem._mem[3][28] q=$abc$109383$new_n19427_
-.subckt mx2_x2 cmd=$abc$109383$new_n17721_ i0=$abc$109383$new_n19427_ i1=$abc$109383$new_n19426_ q=$abc$109383$new_n19428_
-.subckt mx2_x2 cmd=$abc$109383$new_n17737_ i0=$abc$109383$new_n19428_ i1=$abc$109383$new_n19425_ q=$abc$109383$new_n19429_
+.subckt mux2_x1 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[15][28] i1=soc.cpu.minerva.gprf.mem._mem[11][28] q=$abc$109383$new_n19417_
+.subckt mux2_x1 cmd=$abc$109383$new_n17553_ i0=soc.cpu.minerva.gprf.mem._mem[14][28] i1=soc.cpu.minerva.gprf.mem._mem[10][28] q=$abc$109383$new_n19418_
+.subckt mux2_x1 cmd=$abc$109383$new_n17806_ i0=$abc$109383$new_n19418_ i1=$abc$109383$new_n19417_ q=$abc$109383$new_n19419_
+.subckt and21nor_x1 i0=$abc$109383$new_n19419_ i1=$abc$109383$new_n17544_ i2=$abc$109383$new_n18233_ nq=$abc$109383$new_n19420_
+.subckt and2_x1 i0=$abc$109383$new_n19420_ i1=$abc$109383$new_n19416_ q=$abc$109383$new_n19421_
+.subckt or2_x1 i0=$abc$109383$new_n19421_ i1=$abc$109383$new_n19410_ q=$abc$109383$new_n19422_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[4][28] i1=soc.cpu.minerva.gprf.mem._mem[0][28] q=$abc$109383$new_n19423_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[5][28] i1=soc.cpu.minerva.gprf.mem._mem[1][28] q=$abc$109383$new_n19424_
+.subckt mux2_x1 cmd=$abc$109383$new_n17721_ i0=$abc$109383$new_n19424_ i1=$abc$109383$new_n19423_ q=$abc$109383$new_n19425_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[6][28] i1=soc.cpu.minerva.gprf.mem._mem[2][28] q=$abc$109383$new_n19426_
+.subckt mux2_x1 cmd=$abc$109383$new_n18138_ i0=soc.cpu.minerva.gprf.mem._mem[7][28] i1=soc.cpu.minerva.gprf.mem._mem[3][28] q=$abc$109383$new_n19427_
+.subckt mux2_x1 cmd=$abc$109383$new_n17721_ i0=$abc$109383$new_n19427_ i1=$abc$109383$new_n19426_ q=$abc$109383$new_n19428_
+.subckt mux2_x1 cmd=$abc$109383$new_n17737_ i0=$abc$109383$new_n19428_ i1=$abc$109383$new_n19425_ q=$abc$109383$new_n19429_
 .subckt nor2_x0 i0=$abc$109383$new_n19429_ i1=$abc$109383$new_n17640_ nq=$abc$109383$new_n19430_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[22][28] nq=$abc$109383$new_n19431_
-.subckt oa22_x2 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19431_ q=$abc$109383$new_n19432_
+.subckt or21nand_x1 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19431_ nq=$abc$109383$new_n19432_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[20][28] nq=$abc$109383$new_n19433_
-.subckt ao22_x2 i0=$abc$109383$new_n19433_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n19434_
-.subckt a2_x2 i0=$abc$109383$new_n19434_ i1=$abc$109383$new_n19432_ q=$abc$109383$new_n19435_
+.subckt and21nor_x1 i0=$abc$109383$new_n19433_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n19434_
+.subckt and2_x1 i0=$abc$109383$new_n19434_ i1=$abc$109383$new_n19432_ q=$abc$109383$new_n19435_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[23][28] nq=$abc$109383$new_n19436_
-.subckt oa22_x2 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19436_ q=$abc$109383$new_n19437_
+.subckt or21nand_x1 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19436_ nq=$abc$109383$new_n19437_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][28] nq=$abc$109383$new_n19438_
-.subckt ao22_x2 i0=$abc$109383$new_n19438_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17806_ q=$abc$109383$new_n19439_
-.subckt a2_x2 i0=$abc$109383$new_n19439_ i1=$abc$109383$new_n19437_ q=$abc$109383$new_n19440_
-.subckt ao22_x2 i0=$abc$109383$new_n19440_ i1=$abc$109383$new_n19435_ i2=$abc$109383$new_n17935_ q=$abc$109383$new_n19441_
+.subckt and21nor_x1 i0=$abc$109383$new_n19438_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17806_ nq=$abc$109383$new_n19439_
+.subckt and2_x1 i0=$abc$109383$new_n19439_ i1=$abc$109383$new_n19437_ q=$abc$109383$new_n19440_
+.subckt and21nor_x1 i0=$abc$109383$new_n19440_ i1=$abc$109383$new_n19435_ i2=$abc$109383$new_n17935_ nq=$abc$109383$new_n19441_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[18][28] nq=$abc$109383$new_n19442_
-.subckt oa22_x2 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19442_ q=$abc$109383$new_n19443_
+.subckt or21nand_x1 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19442_ nq=$abc$109383$new_n19443_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[16][28] nq=$abc$109383$new_n19444_
-.subckt ao22_x2 i0=$abc$109383$new_n19444_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17683_ q=$abc$109383$new_n19445_
-.subckt a2_x2 i0=$abc$109383$new_n19445_ i1=$abc$109383$new_n19443_ q=$abc$109383$new_n19446_
+.subckt and21nor_x1 i0=$abc$109383$new_n19444_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17683_ nq=$abc$109383$new_n19445_
+.subckt and2_x1 i0=$abc$109383$new_n19445_ i1=$abc$109383$new_n19443_ q=$abc$109383$new_n19446_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][28] nq=$abc$109383$new_n19447_
-.subckt oa22_x2 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19447_ q=$abc$109383$new_n19448_
+.subckt or21nand_x1 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19447_ nq=$abc$109383$new_n19448_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][28] nq=$abc$109383$new_n19449_
-.subckt ao22_x2 i0=$abc$109383$new_n19449_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17612_ q=$abc$109383$new_n19450_
-.subckt a2_x2 i0=$abc$109383$new_n19450_ i1=$abc$109383$new_n19448_ q=$abc$109383$new_n19451_
-.subckt ao22_x2 i0=$abc$109383$new_n19451_ i1=$abc$109383$new_n19446_ i2=$abc$109383$new_n17725_ q=$abc$109383$new_n19452_
-.subckt ao22_x2 i0=$abc$109383$new_n19452_ i1=$abc$109383$new_n19441_ i2=$abc$109383$new_n17960_ q=$abc$109383$new_n19453_
+.subckt and21nor_x1 i0=$abc$109383$new_n19449_ i1=$abc$109383$new_n17577_ i2=$abc$109383$new_n17612_ nq=$abc$109383$new_n19450_
+.subckt and2_x1 i0=$abc$109383$new_n19450_ i1=$abc$109383$new_n19448_ q=$abc$109383$new_n19451_
+.subckt and21nor_x1 i0=$abc$109383$new_n19451_ i1=$abc$109383$new_n19446_ i2=$abc$109383$new_n17725_ nq=$abc$109383$new_n19452_
+.subckt and21nor_x1 i0=$abc$109383$new_n19452_ i1=$abc$109383$new_n19441_ i2=$abc$109383$new_n17960_ nq=$abc$109383$new_n19453_
 .subckt nor2_x0 i0=$abc$109383$new_n19453_ i1=$abc$109383$new_n19430_ nq=$abc$109383$new_n19454_
-.subckt mx2_x2 cmd=$abc$109383$new_n17786_ i0=$abc$109383$new_n19454_ i1=$abc$109383$new_n19422_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[28]
+.subckt mux2_x1 cmd=$abc$109383$new_n17786_ i0=$abc$109383$new_n19454_ i1=$abc$109383$new_n19422_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[28]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[23][29] nq=$abc$109383$new_n19456_
-.subckt oa22_x2 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n19456_ q=$abc$109383$new_n19457_
+.subckt or21nand_x1 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n19456_ nq=$abc$109383$new_n19457_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][29] nq=$abc$109383$new_n19458_
-.subckt ao22_x2 i0=$abc$109383$new_n19458_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n19459_
+.subckt and21nor_x1 i0=$abc$109383$new_n19458_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n19459_
 .subckt nand2_x0 i0=$abc$109383$new_n19459_ i1=$abc$109383$new_n19457_ nq=$abc$109383$new_n19460_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][29] q=$abc$109383$new_n19461_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[20][29] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17662_ q=$abc$109383$new_n19462_
-.subckt ao22_x2 i0=$abc$109383$new_n19462_ i1=$abc$109383$new_n19461_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n19463_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][29] nq=$abc$109383$new_n19461_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[20][29] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17662_ nq=$abc$109383$new_n19462_
+.subckt and21nor_x1 i0=$abc$109383$new_n19462_ i1=$abc$109383$new_n19461_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n19463_
 .subckt nand2_x0 i0=$abc$109383$new_n19463_ i1=$abc$109383$new_n19460_ nq=$abc$109383$new_n19464_
 .subckt nand3_x0 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[6][29] nq=$abc$109383$new_n19465_
-.subckt ao22_x2 i0=$abc$109383$new_n17373_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n18743_ q=$abc$109383$new_n19466_
+.subckt and21nor_x1 i0=$abc$109383$new_n17373_ i1=$abc$109383$new_n17947_ i2=$abc$109383$new_n18743_ nq=$abc$109383$new_n19466_
 .subckt nand2_x0 i0=$abc$109383$new_n19466_ i1=$abc$109383$new_n19465_ nq=$abc$109383$new_n19467_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][29] q=$abc$109383$new_n19468_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][29] i1=$abc$109383$new_n17662_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n19469_
-.subckt ao22_x2 i0=$abc$109383$new_n19469_ i1=$abc$109383$new_n19468_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n19470_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][29] q=$abc$109383$new_n19468_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][29] i1=$abc$109383$new_n17662_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n19469_
+.subckt and21nor_x1 i0=$abc$109383$new_n19469_ i1=$abc$109383$new_n19468_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n19470_
 .subckt nand2_x0 i0=$abc$109383$new_n19470_ i1=$abc$109383$new_n19467_ nq=$abc$109383$new_n19471_
-.subckt oa22_x2 i0=$abc$109383$new_n19471_ i1=$abc$109383$new_n19464_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n19472_
+.subckt or21nand_x1 i0=$abc$109383$new_n19471_ i1=$abc$109383$new_n19464_ i2=$abc$109383$new_n17539_ nq=$abc$109383$new_n19472_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][29] nq=$abc$109383$new_n19473_
 .subckt nand3_x0 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n19473_ nq=$abc$109383$new_n19474_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][29] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n19475_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][29] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n19475_
 .subckt nand2_x0 i0=$abc$109383$new_n19475_ i1=$abc$109383$new_n19474_ nq=$abc$109383$new_n19476_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][29] nq=$abc$109383$new_n19477_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n19477_ nq=$abc$109383$new_n19478_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][29] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n19479_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][29] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n19479_
 .subckt nand2_x0 i0=$abc$109383$new_n19479_ i1=$abc$109383$new_n19478_ nq=$abc$109383$new_n19480_
-.subckt oa22_x2 i0=$abc$109383$new_n19480_ i1=$abc$109383$new_n19476_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n19481_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[15][29] i1=soc.cpu.minerva.gprf.mem._mem[13][29] q=$abc$109383$new_n19482_
-.subckt mx2_x2 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][29] i1=soc.cpu.minerva.gprf.mem._mem[12][29] q=$abc$109383$new_n19483_
-.subckt mx2_x2 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n19483_ i1=$abc$109383$new_n19482_ q=$abc$109383$new_n19484_
+.subckt or21nand_x1 i0=$abc$109383$new_n19480_ i1=$abc$109383$new_n19476_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n19481_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[15][29] i1=soc.cpu.minerva.gprf.mem._mem[13][29] q=$abc$109383$new_n19482_
+.subckt mux2_x1 cmd=$abc$109383$new_n18532_ i0=soc.cpu.minerva.gprf.mem._mem[14][29] i1=soc.cpu.minerva.gprf.mem._mem[12][29] q=$abc$109383$new_n19483_
+.subckt mux2_x1 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n19483_ i1=$abc$109383$new_n19482_ q=$abc$109383$new_n19484_
 .subckt nand2_x0 i0=$abc$109383$new_n19484_ i1=$abc$109383$new_n17691_ nq=$abc$109383$new_n19485_
-.subckt oa22_x2 i0=$abc$109383$new_n19485_ i1=$abc$109383$new_n19481_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n19486_
-.subckt oa22_x2 i0=$abc$109383$new_n19486_ i1=$abc$109383$new_n19472_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n19487_
+.subckt or21nand_x1 i0=$abc$109383$new_n19485_ i1=$abc$109383$new_n19481_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n19486_
+.subckt or21nand_x1 i0=$abc$109383$new_n19486_ i1=$abc$109383$new_n19472_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n19487_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][29] nq=$abc$109383$new_n19488_
 .subckt nand3_x0 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n19488_ nq=$abc$109383$new_n19489_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][29] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n19490_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][29] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n19490_
 .subckt nand2_x0 i0=$abc$109383$new_n19490_ i1=$abc$109383$new_n19489_ nq=$abc$109383$new_n19491_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][29] nq=$abc$109383$new_n19492_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n19492_ nq=$abc$109383$new_n19493_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][29] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n19494_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][29] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n19494_
 .subckt nand2_x0 i0=$abc$109383$new_n19494_ i1=$abc$109383$new_n19493_ nq=$abc$109383$new_n19495_
-.subckt oa22_x2 i0=$abc$109383$new_n19495_ i1=$abc$109383$new_n19491_ i2=$abc$109383$new_n17866_ q=$abc$109383$new_n19496_
-.subckt mx2_x2 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[11][29] i1=soc.cpu.minerva.gprf.mem._mem[9][29] q=$abc$109383$new_n19497_
-.subckt mx2_x2 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[10][29] i1=soc.cpu.minerva.gprf.mem._mem[8][29] q=$abc$109383$new_n19498_
-.subckt mx2_x2 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n19498_ i1=$abc$109383$new_n19497_ q=$abc$109383$new_n19499_
+.subckt or21nand_x1 i0=$abc$109383$new_n19495_ i1=$abc$109383$new_n19491_ i2=$abc$109383$new_n17866_ nq=$abc$109383$new_n19496_
+.subckt mux2_x1 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[11][29] i1=soc.cpu.minerva.gprf.mem._mem[9][29] q=$abc$109383$new_n19497_
+.subckt mux2_x1 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[10][29] i1=soc.cpu.minerva.gprf.mem._mem[8][29] q=$abc$109383$new_n19498_
+.subckt mux2_x1 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n19498_ i1=$abc$109383$new_n19497_ q=$abc$109383$new_n19499_
 .subckt nand2_x0 i0=$abc$109383$new_n19499_ i1=$abc$109383$new_n18234_ nq=$abc$109383$new_n19500_
-.subckt oa22_x2 i0=$abc$109383$new_n19500_ i1=$abc$109383$new_n19496_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n19501_
+.subckt or21nand_x1 i0=$abc$109383$new_n19500_ i1=$abc$109383$new_n19496_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n19501_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][29] nq=$abc$109383$new_n19502_
-.subckt oa22_x2 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n19502_ q=$abc$109383$new_n19503_
+.subckt or21nand_x1 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n19502_ nq=$abc$109383$new_n19503_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][29] nq=$abc$109383$new_n19504_
-.subckt ao22_x2 i0=$abc$109383$new_n19504_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n19505_
+.subckt and21nor_x1 i0=$abc$109383$new_n19504_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n19505_
 .subckt nand2_x0 i0=$abc$109383$new_n19505_ i1=$abc$109383$new_n19503_ nq=$abc$109383$new_n19506_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][29] q=$abc$109383$new_n19507_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[16][29] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17648_ q=$abc$109383$new_n19508_
-.subckt ao22_x2 i0=$abc$109383$new_n19508_ i1=$abc$109383$new_n19507_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n19509_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][29] nq=$abc$109383$new_n19507_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[16][29] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17648_ nq=$abc$109383$new_n19508_
+.subckt and21nor_x1 i0=$abc$109383$new_n19508_ i1=$abc$109383$new_n19507_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n19509_
 .subckt nand2_x0 i0=$abc$109383$new_n19509_ i1=$abc$109383$new_n19506_ nq=$abc$109383$new_n19510_
 .subckt nand3_x0 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=soc.cpu.minerva.gprf.mem._mem[2][29] nq=$abc$109383$new_n19511_
-.subckt ao22_x2 i0=$abc$109383$new_n17372_ i1=$abc$109383$new_n17549_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n19512_
+.subckt and21nor_x1 i0=$abc$109383$new_n17372_ i1=$abc$109383$new_n17549_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n19512_
 .subckt nand2_x0 i0=$abc$109383$new_n19512_ i1=$abc$109383$new_n19511_ nq=$abc$109383$new_n19513_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][29] q=$abc$109383$new_n19514_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][29] i1=$abc$109383$new_n17815_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n19515_
-.subckt ao22_x2 i0=$abc$109383$new_n19515_ i1=$abc$109383$new_n19514_ i2=$abc$109383$new_n18233_ q=$abc$109383$new_n19516_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][29] q=$abc$109383$new_n19514_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][29] i1=$abc$109383$new_n17815_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n19515_
+.subckt and21nor_x1 i0=$abc$109383$new_n19515_ i1=$abc$109383$new_n19514_ i2=$abc$109383$new_n18233_ nq=$abc$109383$new_n19516_
 .subckt nand2_x0 i0=$abc$109383$new_n19516_ i1=$abc$109383$new_n19513_ nq=$abc$109383$new_n19517_
-.subckt oa22_x2 i0=$abc$109383$new_n19517_ i1=$abc$109383$new_n19510_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n19518_
-.subckt oa22_x2 i0=$abc$109383$new_n19518_ i1=$abc$109383$new_n19501_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n19519_
+.subckt or21nand_x1 i0=$abc$109383$new_n19517_ i1=$abc$109383$new_n19510_ i2=$abc$109383$new_n17539_ nq=$abc$109383$new_n19518_
+.subckt or21nand_x1 i0=$abc$109383$new_n19518_ i1=$abc$109383$new_n19501_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n19519_
 .subckt nand2_x0 i0=$abc$109383$new_n19519_ i1=$abc$109383$new_n19487_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[29]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[23][30] nq=$abc$109383$new_n19521_
-.subckt oa22_x2 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n19521_ q=$abc$109383$new_n19522_
+.subckt or21nand_x1 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n19521_ nq=$abc$109383$new_n19522_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[21][30] nq=$abc$109383$new_n19523_
-.subckt ao22_x2 i0=$abc$109383$new_n19523_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ q=$abc$109383$new_n19524_
+.subckt and21nor_x1 i0=$abc$109383$new_n19523_ i1=$abc$109383$new_n18228_ i2=$abc$109383$new_n17953_ nq=$abc$109383$new_n19524_
 .subckt nand2_x0 i0=$abc$109383$new_n19524_ i1=$abc$109383$new_n19522_ nq=$abc$109383$new_n19525_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][30] q=$abc$109383$new_n19526_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[20][30] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17662_ q=$abc$109383$new_n19527_
-.subckt ao22_x2 i0=$abc$109383$new_n19527_ i1=$abc$109383$new_n19526_ i2=$abc$109383$new_n17639_ q=$abc$109383$new_n19528_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[22][30] nq=$abc$109383$new_n19526_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[20][30] i1=$abc$109383$new_n17645_ i2=$abc$109383$new_n17662_ nq=$abc$109383$new_n19527_
+.subckt and21nor_x1 i0=$abc$109383$new_n19527_ i1=$abc$109383$new_n19526_ i2=$abc$109383$new_n17639_ nq=$abc$109383$new_n19528_
 .subckt nand2_x0 i0=$abc$109383$new_n19528_ i1=$abc$109383$new_n19525_ nq=$abc$109383$new_n19529_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[7][30] nq=$abc$109383$new_n19530_
-.subckt oa22_x2 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=$abc$109383$new_n19530_ q=$abc$109383$new_n19531_
+.subckt or21nand_x1 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=$abc$109383$new_n19530_ nq=$abc$109383$new_n19531_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[6][30] nq=$abc$109383$new_n19532_
-.subckt ao22_x2 i0=$abc$109383$new_n19532_ i1=$abc$109383$new_n17585_ i2=$abc$109383$new_n18743_ q=$abc$109383$new_n19533_
+.subckt and21nor_x1 i0=$abc$109383$new_n19532_ i1=$abc$109383$new_n17585_ i2=$abc$109383$new_n18743_ nq=$abc$109383$new_n19533_
 .subckt nand2_x0 i0=$abc$109383$new_n19533_ i1=$abc$109383$new_n19531_ nq=$abc$109383$new_n19534_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][30] q=$abc$109383$new_n19535_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[5][30] i1=$abc$109383$new_n17648_ i2=$abc$109383$new_n17714_ q=$abc$109383$new_n19536_
-.subckt ao22_x2 i0=$abc$109383$new_n19536_ i1=$abc$109383$new_n19535_ i2=$abc$109383$new_n17811_ q=$abc$109383$new_n19537_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[4][30] q=$abc$109383$new_n19535_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[5][30] i1=$abc$109383$new_n17648_ i2=$abc$109383$new_n17714_ nq=$abc$109383$new_n19536_
+.subckt and21nor_x1 i0=$abc$109383$new_n19536_ i1=$abc$109383$new_n19535_ i2=$abc$109383$new_n17811_ nq=$abc$109383$new_n19537_
 .subckt nand2_x0 i0=$abc$109383$new_n19537_ i1=$abc$109383$new_n19534_ nq=$abc$109383$new_n19538_
-.subckt oa22_x2 i0=$abc$109383$new_n19538_ i1=$abc$109383$new_n19529_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n19539_
+.subckt or21nand_x1 i0=$abc$109383$new_n19538_ i1=$abc$109383$new_n19529_ i2=$abc$109383$new_n17539_ nq=$abc$109383$new_n19539_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][30] nq=$abc$109383$new_n19540_
 .subckt nand3_x0 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n19540_ nq=$abc$109383$new_n19541_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][30] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17600_ q=$abc$109383$new_n19542_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][30] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17600_ nq=$abc$109383$new_n19542_
 .subckt nand2_x0 i0=$abc$109383$new_n19542_ i1=$abc$109383$new_n19541_ nq=$abc$109383$new_n19543_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][30] nq=$abc$109383$new_n19544_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n19544_ nq=$abc$109383$new_n19545_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][30] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17874_ q=$abc$109383$new_n19546_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][30] i1=$abc$109383$new_n17860_ i2=$abc$109383$new_n17874_ nq=$abc$109383$new_n19546_
 .subckt nand2_x0 i0=$abc$109383$new_n19546_ i1=$abc$109383$new_n19545_ nq=$abc$109383$new_n19547_
-.subckt oa22_x2 i0=$abc$109383$new_n19547_ i1=$abc$109383$new_n19543_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n19548_
-.subckt mx2_x2 cmd=$abc$109383$new_n17807_ i0=soc.cpu.minerva.gprf.mem._mem[15][30] i1=soc.cpu.minerva.gprf.mem._mem[13][30] q=$abc$109383$new_n19549_
-.subckt mx2_x2 cmd=$abc$109383$new_n17807_ i0=soc.cpu.minerva.gprf.mem._mem[14][30] i1=soc.cpu.minerva.gprf.mem._mem[12][30] q=$abc$109383$new_n19550_
-.subckt mx2_x2 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n19550_ i1=$abc$109383$new_n19549_ q=$abc$109383$new_n19551_
+.subckt or21nand_x1 i0=$abc$109383$new_n19547_ i1=$abc$109383$new_n19543_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n19548_
+.subckt mux2_x1 cmd=$abc$109383$new_n17807_ i0=soc.cpu.minerva.gprf.mem._mem[15][30] i1=soc.cpu.minerva.gprf.mem._mem[13][30] q=$abc$109383$new_n19549_
+.subckt mux2_x1 cmd=$abc$109383$new_n17807_ i0=soc.cpu.minerva.gprf.mem._mem[14][30] i1=soc.cpu.minerva.gprf.mem._mem[12][30] q=$abc$109383$new_n19550_
+.subckt mux2_x1 cmd=$abc$109383$new_n17972_ i0=$abc$109383$new_n19550_ i1=$abc$109383$new_n19549_ q=$abc$109383$new_n19551_
 .subckt nand2_x0 i0=$abc$109383$new_n19551_ i1=$abc$109383$new_n17691_ nq=$abc$109383$new_n19552_
-.subckt oa22_x2 i0=$abc$109383$new_n19552_ i1=$abc$109383$new_n19548_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n19553_
-.subckt oa22_x2 i0=$abc$109383$new_n19553_ i1=$abc$109383$new_n19539_ i2=$abc$109383$new_n17660_ q=$abc$109383$new_n19554_
+.subckt or21nand_x1 i0=$abc$109383$new_n19552_ i1=$abc$109383$new_n19548_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n19553_
+.subckt or21nand_x1 i0=$abc$109383$new_n19553_ i1=$abc$109383$new_n19539_ i2=$abc$109383$new_n17660_ nq=$abc$109383$new_n19554_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][30] nq=$abc$109383$new_n19555_
 .subckt nand3_x0 i0=$abc$109383$new_n18507_ i1=$abc$109383$new_n18506_ i2=$abc$109383$new_n19555_ nq=$abc$109383$new_n19556_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][30] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ q=$abc$109383$new_n19557_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][30] i1=$abc$109383$new_n17671_ i2=$abc$109383$new_n17618_ nq=$abc$109383$new_n19557_
 .subckt nand2_x0 i0=$abc$109383$new_n19557_ i1=$abc$109383$new_n19556_ nq=$abc$109383$new_n19558_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][30] nq=$abc$109383$new_n19559_
 .subckt nand3_x0 i0=$abc$109383$new_n17796_ i1=$abc$109383$new_n17793_ i2=$abc$109383$new_n19559_ nq=$abc$109383$new_n19560_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][30] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17656_ q=$abc$109383$new_n19561_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][30] i1=$abc$109383$new_n17736_ i2=$abc$109383$new_n17656_ nq=$abc$109383$new_n19561_
 .subckt nand2_x0 i0=$abc$109383$new_n19561_ i1=$abc$109383$new_n19560_ nq=$abc$109383$new_n19562_
-.subckt oa22_x2 i0=$abc$109383$new_n19562_ i1=$abc$109383$new_n19558_ i2=$abc$109383$new_n17535_ q=$abc$109383$new_n19563_
-.subckt mx2_x2 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[11][30] i1=soc.cpu.minerva.gprf.mem._mem[9][30] q=$abc$109383$new_n19564_
-.subckt mx2_x2 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[10][30] i1=soc.cpu.minerva.gprf.mem._mem[8][30] q=$abc$109383$new_n19565_
-.subckt mx2_x2 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n19565_ i1=$abc$109383$new_n19564_ q=$abc$109383$new_n19566_
+.subckt or21nand_x1 i0=$abc$109383$new_n19562_ i1=$abc$109383$new_n19558_ i2=$abc$109383$new_n17535_ nq=$abc$109383$new_n19563_
+.subckt mux2_x1 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[11][30] i1=soc.cpu.minerva.gprf.mem._mem[9][30] q=$abc$109383$new_n19564_
+.subckt mux2_x1 cmd=$abc$109383$new_n17799_ i0=soc.cpu.minerva.gprf.mem._mem[10][30] i1=soc.cpu.minerva.gprf.mem._mem[8][30] q=$abc$109383$new_n19565_
+.subckt mux2_x1 cmd=$abc$109383$new_n17585_ i0=$abc$109383$new_n19565_ i1=$abc$109383$new_n19564_ q=$abc$109383$new_n19566_
 .subckt nand2_x0 i0=$abc$109383$new_n19566_ i1=$abc$109383$new_n18234_ nq=$abc$109383$new_n19567_
-.subckt oa22_x2 i0=$abc$109383$new_n19567_ i1=$abc$109383$new_n19563_ i2=$abc$109383$new_n17926_ q=$abc$109383$new_n19568_
+.subckt or21nand_x1 i0=$abc$109383$new_n19567_ i1=$abc$109383$new_n19563_ i2=$abc$109383$new_n17926_ nq=$abc$109383$new_n19568_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[19][30] nq=$abc$109383$new_n19569_
-.subckt oa22_x2 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n19569_ q=$abc$109383$new_n19570_
+.subckt or21nand_x1 i0=$abc$109383$new_n18523_ i1=$abc$109383$new_n18512_ i2=$abc$109383$new_n19569_ nq=$abc$109383$new_n19570_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][30] nq=$abc$109383$new_n19571_
-.subckt ao22_x2 i0=$abc$109383$new_n19571_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ q=$abc$109383$new_n19572_
+.subckt and21nor_x1 i0=$abc$109383$new_n19571_ i1=$abc$109383$new_n18743_ i2=$abc$109383$new_n18212_ nq=$abc$109383$new_n19572_
 .subckt nand2_x0 i0=$abc$109383$new_n19572_ i1=$abc$109383$new_n19570_ nq=$abc$109383$new_n19573_
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][30] q=$abc$109383$new_n19574_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[16][30] i1=$abc$109383$new_n17543_ i2=$abc$109383$new_n17815_ q=$abc$109383$new_n19575_
-.subckt ao22_x2 i0=$abc$109383$new_n19575_ i1=$abc$109383$new_n19574_ i2=$abc$109383$new_n17789_ q=$abc$109383$new_n19576_
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=soc.cpu.minerva.gprf.mem._mem[18][30] nq=$abc$109383$new_n19574_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[16][30] i1=$abc$109383$new_n17543_ i2=$abc$109383$new_n17815_ nq=$abc$109383$new_n19575_
+.subckt and21nor_x1 i0=$abc$109383$new_n19575_ i1=$abc$109383$new_n19574_ i2=$abc$109383$new_n17789_ nq=$abc$109383$new_n19576_
 .subckt nand2_x0 i0=$abc$109383$new_n19576_ i1=$abc$109383$new_n19573_ nq=$abc$109383$new_n19577_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[3][30] nq=$abc$109383$new_n19578_
-.subckt oa22_x2 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=$abc$109383$new_n19578_ q=$abc$109383$new_n19579_
+.subckt or21nand_x1 i0=$abc$109383$new_n18210_ i1=$abc$109383$new_n17665_ i2=$abc$109383$new_n19578_ nq=$abc$109383$new_n19579_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[2][30] nq=$abc$109383$new_n19580_
-.subckt ao22_x2 i0=$abc$109383$new_n19580_ i1=$abc$109383$new_n17972_ i2=$abc$109383$new_n17578_ q=$abc$109383$new_n19581_
+.subckt and21nor_x1 i0=$abc$109383$new_n19580_ i1=$abc$109383$new_n17972_ i2=$abc$109383$new_n17578_ nq=$abc$109383$new_n19581_
 .subckt nand2_x0 i0=$abc$109383$new_n19581_ i1=$abc$109383$new_n19579_ nq=$abc$109383$new_n19582_
-.subckt a3_x2 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][30] q=$abc$109383$new_n19583_
-.subckt oa22_x2 i0=soc.cpu.minerva.gprf.mem._mem[1][30] i1=$abc$109383$new_n17834_ i2=$abc$109383$new_n17577_ q=$abc$109383$new_n19584_
-.subckt ao22_x2 i0=$abc$109383$new_n19584_ i1=$abc$109383$new_n19583_ i2=$abc$109383$new_n18233_ q=$abc$109383$new_n19585_
+.subckt and3_x1 i0=$abc$109383$new_n17653_ i1=$abc$109383$new_n17651_ i2=soc.cpu.minerva.gprf.mem._mem[0][30] q=$abc$109383$new_n19583_
+.subckt or21nand_x1 i0=soc.cpu.minerva.gprf.mem._mem[1][30] i1=$abc$109383$new_n17834_ i2=$abc$109383$new_n17577_ nq=$abc$109383$new_n19584_
+.subckt and21nor_x1 i0=$abc$109383$new_n19584_ i1=$abc$109383$new_n19583_ i2=$abc$109383$new_n18233_ nq=$abc$109383$new_n19585_
 .subckt nand2_x0 i0=$abc$109383$new_n19585_ i1=$abc$109383$new_n19582_ nq=$abc$109383$new_n19586_
-.subckt oa22_x2 i0=$abc$109383$new_n19586_ i1=$abc$109383$new_n19577_ i2=$abc$109383$new_n17539_ q=$abc$109383$new_n19587_
-.subckt oa22_x2 i0=$abc$109383$new_n19587_ i1=$abc$109383$new_n19568_ i2=$abc$109383$new_n17788_ q=$abc$109383$new_n19588_
+.subckt or21nand_x1 i0=$abc$109383$new_n19586_ i1=$abc$109383$new_n19577_ i2=$abc$109383$new_n17539_ nq=$abc$109383$new_n19587_
+.subckt or21nand_x1 i0=$abc$109383$new_n19587_ i1=$abc$109383$new_n19568_ i2=$abc$109383$new_n17788_ nq=$abc$109383$new_n19588_
 .subckt nand2_x0 i0=$abc$109383$new_n19588_ i1=$abc$109383$new_n19554_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[30]
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[28][31] nq=$abc$109383$new_n19590_
 .subckt nand3_x0 i0=$abc$109383$new_n17826_ i1=$abc$109383$new_n17825_ i2=$abc$109383$new_n19590_ nq=$abc$109383$new_n19591_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[30][31] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17548_ q=$abc$109383$new_n19592_
-.subckt a2_x2 i0=$abc$109383$new_n19592_ i1=$abc$109383$new_n19591_ q=$abc$109383$new_n19593_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[30][31] i1=$abc$109383$new_n17644_ i2=$abc$109383$new_n17548_ nq=$abc$109383$new_n19592_
+.subckt and2_x1 i0=$abc$109383$new_n19592_ i1=$abc$109383$new_n19591_ q=$abc$109383$new_n19593_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[29][31] nq=$abc$109383$new_n19594_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n19594_ nq=$abc$109383$new_n19595_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[31][31] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17655_ q=$abc$109383$new_n19596_
-.subckt a2_x2 i0=$abc$109383$new_n19596_ i1=$abc$109383$new_n19595_ q=$abc$109383$new_n19597_
-.subckt ao22_x2 i0=$abc$109383$new_n19597_ i1=$abc$109383$new_n19593_ i2=$abc$109383$new_n17638_ q=$abc$109383$new_n19598_
-.subckt mx2_x2 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[15][31] i1=soc.cpu.minerva.gprf.mem._mem[13][31] q=$abc$109383$new_n19599_
-.subckt mx2_x2 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[14][31] i1=soc.cpu.minerva.gprf.mem._mem[12][31] q=$abc$109383$new_n19600_
-.subckt mx2_x2 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n19600_ i1=$abc$109383$new_n19599_ q=$abc$109383$new_n19601_
-.subckt a2_x2 i0=$abc$109383$new_n19601_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19602_
-.subckt ao22_x2 i0=$abc$109383$new_n19602_ i1=$abc$109383$new_n19598_ i2=$abc$109383$new_n17642_ q=$abc$109383$new_n19603_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[31][31] i1=$abc$109383$new_n17735_ i2=$abc$109383$new_n17655_ nq=$abc$109383$new_n19596_
+.subckt and2_x1 i0=$abc$109383$new_n19596_ i1=$abc$109383$new_n19595_ q=$abc$109383$new_n19597_
+.subckt and21nor_x1 i0=$abc$109383$new_n19597_ i1=$abc$109383$new_n19593_ i2=$abc$109383$new_n17638_ nq=$abc$109383$new_n19598_
+.subckt mux2_x1 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[15][31] i1=soc.cpu.minerva.gprf.mem._mem[13][31] q=$abc$109383$new_n19599_
+.subckt mux2_x1 cmd=$abc$109383$new_n17542_ i0=soc.cpu.minerva.gprf.mem._mem[14][31] i1=soc.cpu.minerva.gprf.mem._mem[12][31] q=$abc$109383$new_n19600_
+.subckt mux2_x1 cmd=$abc$109383$new_n17569_ i0=$abc$109383$new_n19600_ i1=$abc$109383$new_n19599_ q=$abc$109383$new_n19601_
+.subckt and2_x1 i0=$abc$109383$new_n19601_ i1=$abc$109383$new_n17690_ q=$abc$109383$new_n19602_
+.subckt and21nor_x1 i0=$abc$109383$new_n19602_ i1=$abc$109383$new_n19598_ i2=$abc$109383$new_n17642_ nq=$abc$109383$new_n19603_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[24][31] nq=$abc$109383$new_n19604_
 .subckt nand3_x0 i0=$abc$109383$new_n18589_ i1=$abc$109383$new_n18588_ i2=$abc$109383$new_n19604_ nq=$abc$109383$new_n19605_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[26][31] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17548_ q=$abc$109383$new_n19606_
-.subckt a2_x2 i0=$abc$109383$new_n19606_ i1=$abc$109383$new_n19605_ q=$abc$109383$new_n19607_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[26][31] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17548_ nq=$abc$109383$new_n19606_
+.subckt and2_x1 i0=$abc$109383$new_n19606_ i1=$abc$109383$new_n19605_ q=$abc$109383$new_n19607_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[25][31] nq=$abc$109383$new_n19608_
 .subckt nand3_x0 i0=$abc$109383$new_n17795_ i1=$abc$109383$new_n17792_ i2=$abc$109383$new_n19608_ nq=$abc$109383$new_n19609_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[27][31] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17661_ q=$abc$109383$new_n19610_
-.subckt a2_x2 i0=$abc$109383$new_n19610_ i1=$abc$109383$new_n19609_ q=$abc$109383$new_n19611_
-.subckt ao22_x2 i0=$abc$109383$new_n19611_ i1=$abc$109383$new_n19607_ i2=$abc$109383$new_n17638_ q=$abc$109383$new_n19612_
-.subckt mx2_x2 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[11][31] i1=soc.cpu.minerva.gprf.mem._mem[9][31] q=$abc$109383$new_n19613_
-.subckt mx2_x2 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[10][31] i1=soc.cpu.minerva.gprf.mem._mem[8][31] q=$abc$109383$new_n19614_
-.subckt mx2_x2 cmd=$abc$109383$new_n17806_ i0=$abc$109383$new_n19614_ i1=$abc$109383$new_n19613_ q=$abc$109383$new_n19615_
-.subckt a2_x2 i0=$abc$109383$new_n19615_ i1=$abc$109383$new_n17534_ q=$abc$109383$new_n19616_
-.subckt ao22_x2 i0=$abc$109383$new_n19616_ i1=$abc$109383$new_n19612_ i2=$abc$109383$new_n17894_ q=$abc$109383$new_n19617_
-.subckt ao22_x2 i0=$abc$109383$new_n19617_ i1=$abc$109383$new_n19603_ i2=$abc$109383$new_n18474_ q=$abc$109383$new_n19618_
-.subckt mx2_x2 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][31] i1=soc.cpu.minerva.gprf.mem._mem[16][31] q=$abc$109383$new_n19619_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[27][31] i1=$abc$109383$new_n17812_ i2=$abc$109383$new_n17661_ nq=$abc$109383$new_n19610_
+.subckt and2_x1 i0=$abc$109383$new_n19610_ i1=$abc$109383$new_n19609_ q=$abc$109383$new_n19611_
+.subckt and21nor_x1 i0=$abc$109383$new_n19611_ i1=$abc$109383$new_n19607_ i2=$abc$109383$new_n17638_ nq=$abc$109383$new_n19612_
+.subckt mux2_x1 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[11][31] i1=soc.cpu.minerva.gprf.mem._mem[9][31] q=$abc$109383$new_n19613_
+.subckt mux2_x1 cmd=$abc$109383$new_n17643_ i0=soc.cpu.minerva.gprf.mem._mem[10][31] i1=soc.cpu.minerva.gprf.mem._mem[8][31] q=$abc$109383$new_n19614_
+.subckt mux2_x1 cmd=$abc$109383$new_n17806_ i0=$abc$109383$new_n19614_ i1=$abc$109383$new_n19613_ q=$abc$109383$new_n19615_
+.subckt and2_x1 i0=$abc$109383$new_n19615_ i1=$abc$109383$new_n17534_ q=$abc$109383$new_n19616_
+.subckt and21nor_x1 i0=$abc$109383$new_n19616_ i1=$abc$109383$new_n19612_ i2=$abc$109383$new_n17894_ nq=$abc$109383$new_n19617_
+.subckt and21nor_x1 i0=$abc$109383$new_n19617_ i1=$abc$109383$new_n19603_ i2=$abc$109383$new_n18474_ nq=$abc$109383$new_n19618_
+.subckt mux2_x1 cmd=$abc$109383$new_n17889_ i0=soc.cpu.minerva.gprf.mem._mem[20][31] i1=soc.cpu.minerva.gprf.mem._mem[16][31] q=$abc$109383$new_n19619_
 .subckt nand2_x0 i0=$abc$109383$new_n19619_ i1=$abc$109383$new_n17695_ nq=$abc$109383$new_n19620_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._mem[17][31] nq=$abc$109383$new_n19621_
 .subckt nand3_x0 i0=$abc$109383$new_n17705_ i1=$abc$109383$new_n17703_ i2=$abc$109383$new_n19621_ nq=$abc$109383$new_n19622_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[21][31] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ q=$abc$109383$new_n19623_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[21][31] i1=$abc$109383$new_n17894_ i2=$abc$109383$new_n17707_ nq=$abc$109383$new_n19623_
 .subckt nand2_x0 i0=$abc$109383$new_n19623_ i1=$abc$109383$new_n19622_ nq=$abc$109383$new_n19624_
 .subckt nand3_x0 i0=$abc$109383$new_n19624_ i1=$abc$109383$new_n19620_ i2=$abc$109383$new_n17693_ nq=$abc$109383$new_n19625_
-.subckt mx2_x2 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][31] i1=soc.cpu.minerva.gprf.mem._mem[18][31] q=$abc$109383$new_n19626_
+.subckt mux2_x1 cmd=$abc$109383$new_n17900_ i0=soc.cpu.minerva.gprf.mem._mem[22][31] i1=soc.cpu.minerva.gprf.mem._mem[18][31] q=$abc$109383$new_n19626_
 .subckt nand2_x0 i0=$abc$109383$new_n19626_ i1=$abc$109383$new_n17899_ nq=$abc$109383$new_n19627_
-.subckt oa22_x2 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=soc.cpu.minerva.gprf.mem._mem[23][31] q=$abc$109383$new_n19628_
-.subckt ao22_x2 i0=soc.cpu.minerva.gprf.mem._mem[19][31] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17905_ q=$abc$109383$new_n19629_
+.subckt or21nand_x1 i0=$abc$109383$new_n17759_ i1=$abc$109383$new_n17757_ i2=soc.cpu.minerva.gprf.mem._mem[23][31] nq=$abc$109383$new_n19628_
+.subckt and21nor_x1 i0=soc.cpu.minerva.gprf.mem._mem[19][31] i1=$abc$109383$new_n17642_ i2=$abc$109383$new_n17905_ nq=$abc$109383$new_n19629_
 .subckt nand2_x0 i0=$abc$109383$new_n19629_ i1=$abc$109383$new_n19628_ nq=$abc$109383$new_n19630_
 .subckt nand3_x0 i0=$abc$109383$new_n19630_ i1=$abc$109383$new_n19627_ i2=$abc$109383$new_n17898_ nq=$abc$109383$new_n19631_
 .subckt nand3_x0 i0=$abc$109383$new_n19631_ i1=$abc$109383$new_n19625_ i2=$abc$109383$new_n17753_ nq=$abc$109383$new_n19632_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[7][31] i1=soc.cpu.minerva.gprf.mem._mem[3][31] q=$abc$109383$new_n19633_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[6][31] i1=soc.cpu.minerva.gprf.mem._mem[2][31] q=$abc$109383$new_n19634_
-.subckt mx2_x2 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19634_ i1=$abc$109383$new_n19633_ q=$abc$109383$new_n19635_
-.subckt mx2_x2 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[5][31] i1=soc.cpu.minerva.gprf.mem._mem[1][31] q=$abc$109383$new_n19636_
-.subckt mx2_x2 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[4][31] i1=soc.cpu.minerva.gprf.mem._mem[0][31] q=$abc$109383$new_n19637_
-.subckt mx2_x2 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19637_ i1=$abc$109383$new_n19636_ q=$abc$109383$new_n19638_
-.subckt mx2_x2 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n19638_ i1=$abc$109383$new_n19635_ q=$abc$109383$new_n19639_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[7][31] i1=soc.cpu.minerva.gprf.mem._mem[3][31] q=$abc$109383$new_n19633_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[6][31] i1=soc.cpu.minerva.gprf.mem._mem[2][31] q=$abc$109383$new_n19634_
+.subckt mux2_x1 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19634_ i1=$abc$109383$new_n19633_ q=$abc$109383$new_n19635_
+.subckt mux2_x1 cmd=$abc$109383$new_n18808_ i0=soc.cpu.minerva.gprf.mem._mem[5][31] i1=soc.cpu.minerva.gprf.mem._mem[1][31] q=$abc$109383$new_n19636_
+.subckt mux2_x1 cmd=$abc$109383$new_n17708_ i0=soc.cpu.minerva.gprf.mem._mem[4][31] i1=soc.cpu.minerva.gprf.mem._mem[0][31] q=$abc$109383$new_n19637_
+.subckt mux2_x1 cmd=$abc$109383$new_n17627_ i0=$abc$109383$new_n19637_ i1=$abc$109383$new_n19636_ q=$abc$109383$new_n19638_
+.subckt mux2_x1 cmd=$abc$109383$new_n17599_ i0=$abc$109383$new_n19638_ i1=$abc$109383$new_n19635_ q=$abc$109383$new_n19639_
 .subckt nand2_x0 i0=$abc$109383$new_n19639_ i1=$abc$109383$new_n17692_ nq=$abc$109383$new_n19640_
 .subckt nand2_x0 i0=$abc$109383$new_n19640_ i1=$abc$109383$new_n19632_ nq=$abc$109383$new_n19641_
-.subckt oa22_x2 i0=$abc$109383$new_n17927_ i1=$abc$109383$new_n19641_ i2=$abc$109383$new_n19618_ q=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[31]
+.subckt or21nand_x1 i0=$abc$109383$new_n17927_ i1=$abc$109383$new_n19641_ i2=$abc$109383$new_n19618_ nq=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[31]
 .subckt buf_x4 i=$abc$109383$new_n14850_ q=$abc$109383$new_n19643_
 .subckt buf_x4 i=$abc$109383$new_n19643_ q=$abc$109383$new_n19644_
 .subckt buf_x4 i=$abc$109383$new_n19644_ q=$abc$109383$new_n19645_
@@ -4923,17 +4923,17 @@
 .subckt buf_x4 i=$abc$109383$new_n19648_ q=$abc$109383$new_n19649_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[21] nq=$abc$109383$new_n19650_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[21] nq=$abc$109383$new_n19651_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19651_ i1=$abc$109383$new_n19650_ q=$abc$109383$new_n19652_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19651_ i1=$abc$109383$new_n19650_ q=$abc$109383$new_n19652_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[20] nq=$abc$109383$new_n19653_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[20] nq=$abc$109383$new_n19654_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19654_ i1=$abc$109383$new_n19653_ q=$abc$109383$new_n19655_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19654_ i1=$abc$109383$new_n19653_ q=$abc$109383$new_n19655_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[19] nq=$abc$109383$new_n19656_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[19] nq=$abc$109383$new_n19657_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19657_ i1=$abc$109383$new_n19656_ q=$abc$109383$new_n19658_
-.subckt mx2_x2 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[26] i1=soc.cpu.minerva.loadstore.dbus__adr[26] q=$abc$109383$new_n19659_
-.subckt a4_x2 i0=$abc$109383$new_n19659_ i1=$abc$109383$new_n19658_ i2=$abc$109383$new_n19655_ i3=$abc$109383$new_n19652_ q=$abc$109383$new_n19660_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19657_ i1=$abc$109383$new_n19656_ q=$abc$109383$new_n19658_
+.subckt mux2_x1 cmd=soc.arbiter.grant i0=soc.cpu.minerva.fetch.ibus__adr[26] i1=soc.cpu.minerva.loadstore.dbus__adr[26] q=$abc$109383$new_n19659_
+.subckt and4_x1 i0=$abc$109383$new_n19659_ i1=$abc$109383$new_n19658_ i2=$abc$109383$new_n19655_ i3=$abc$109383$new_n19652_ q=$abc$109383$new_n19660_
 .subckt nor4_x0 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n14786_ i2=$abc$109383$new_n14949_ i3=$abc$109383$new_n14756_ nq=$abc$109383$new_n19661_
-.subckt a4_x2 i0=$abc$109383$new_n19661_ i1=$abc$109383$new_n19660_ i2=$abc$109383$new_n14914_ i3=$abc$109383$new_n14905_ q=$abc$109383$new_n19662_
+.subckt and4_x1 i0=$abc$109383$new_n19661_ i1=$abc$109383$new_n19660_ i2=$abc$109383$new_n14914_ i3=$abc$109383$new_n14905_ q=$abc$109383$new_n19662_
 .subckt buf_x4 i=$abc$109383$new_n19662_ q=$abc$109383$new_n19663_
 .subckt buf_x4 i=$abc$109383$new_n19663_ q=$abc$109383$new_n19664_
 .subckt buf_x4 i=$abc$109383$new_n19664_ q=$abc$109383$new_n19665_
@@ -4941,53 +4941,53 @@
 .subckt buf_x4 i=$abc$109383$new_n19666_ q=$abc$109383$new_n19667_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[14] nq=$abc$109383$new_n19668_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[14] nq=$abc$109383$new_n19669_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19669_ i1=$abc$109383$new_n19668_ q=$abc$109383$new_n19670_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19669_ i1=$abc$109383$new_n19668_ q=$abc$109383$new_n19670_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[11] nq=$abc$109383$new_n19671_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[11] nq=$abc$109383$new_n19672_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19672_ i1=$abc$109383$new_n19671_ q=$abc$109383$new_n19673_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19672_ i1=$abc$109383$new_n19671_ q=$abc$109383$new_n19673_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[13] nq=$abc$109383$new_n19674_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[13] nq=$abc$109383$new_n19675_
-.subckt mx2_x2 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19675_ i1=$abc$109383$new_n19674_ q=$abc$109383$new_n19676_
-.subckt a4_x2 i0=$abc$109383$new_n14877_ i1=$abc$109383$new_n19676_ i2=$abc$109383$new_n19673_ i3=$abc$109383$new_n19670_ q=$abc$109383$new_n19677_
+.subckt mux2_x1 cmd=$abc$109383$new_n14773_ i0=$abc$109383$new_n19675_ i1=$abc$109383$new_n19674_ q=$abc$109383$new_n19676_
+.subckt and4_x1 i0=$abc$109383$new_n14877_ i1=$abc$109383$new_n19676_ i2=$abc$109383$new_n19673_ i3=$abc$109383$new_n19670_ q=$abc$109383$new_n19677_
 .subckt buf_x4 i=$abc$109383$new_n19677_ q=$abc$109383$new_n19678_
-.subckt a2_x2 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ q=$abc$109383$new_n19679_
+.subckt and2_x1 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ q=$abc$109383$new_n19679_
 .subckt buf_x4 i=$abc$109383$new_n19679_ q=$abc$109383$new_n19680_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19646_ q=soc.ram.ram_r_addr[0]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19646_ q=soc.ram.ram_r_addr[0]
 .subckt buf_x4 i=$abc$109383$new_n15136_ q=$abc$109383$new_n19682_
 .subckt buf_x4 i=$abc$109383$new_n19682_ q=$abc$109383$new_n19683_
 .subckt buf_x4 i=$abc$109383$new_n19683_ q=$abc$109383$new_n19684_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19684_ q=soc.ram.ram_r_addr[1]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19684_ q=soc.ram.ram_r_addr[1]
 .subckt buf_x4 i=$abc$109383$new_n14954_ q=$abc$109383$new_n19686_
 .subckt buf_x4 i=$abc$109383$new_n19686_ q=$abc$109383$new_n19687_
 .subckt buf_x4 i=$abc$109383$new_n19687_ q=$abc$109383$new_n19688_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19688_ q=soc.ram.ram_r_addr[2]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19688_ q=soc.ram.ram_r_addr[2]
 .subckt buf_x4 i=$abc$109383$new_n14929_ q=$abc$109383$new_n19690_
 .subckt buf_x4 i=$abc$109383$new_n19690_ q=$abc$109383$new_n19691_
 .subckt buf_x4 i=$abc$109383$new_n19691_ q=$abc$109383$new_n19692_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19692_ q=soc.ram.ram_r_addr[3]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19692_ q=soc.ram.ram_r_addr[3]
 .subckt buf_x4 i=$abc$109383$new_n14839_ q=$abc$109383$new_n19694_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19694_ q=soc.ram.ram_r_addr[4]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19694_ q=soc.ram.ram_r_addr[4]
 .subckt buf_x4 i=$abc$109383$new_n14863_ q=$abc$109383$new_n19696_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19696_ q=soc.ram.ram_r_addr[5]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19696_ q=soc.ram.ram_r_addr[5]
 .subckt buf_x4 i=$abc$109383$new_n14829_ q=$abc$109383$new_n19698_
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19698_ q=soc.ram.ram_r_addr[6]
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n19698_ q=soc.ram.ram_r_addr[6]
 .subckt inv_x0 i=soc.rom.spimemio.config_oe[0] nq=$abc$109383$new_n19700_
-.subckt o2_x2 i0=$abc$109383$new_n15189_ i1=$abc$109383$new_n15205_ q=$abc$109383$new_n19701_
+.subckt or2_x1 i0=$abc$109383$new_n15189_ i1=$abc$109383$new_n15205_ q=$abc$109383$new_n19701_
 .subckt nand2_x0 i0=$abc$109383$new_n19701_ i1=soc.rom.spimemio.xfer.xfer_rd nq=$abc$109383$new_n19702_
 .subckt nand3_x0 i0=$abc$109383$new_n19702_ i1=$abc$109383$new_n15218_ i2=$abc$109383$new_n15191_ nq=$abc$109383$new_n19703_
-.subckt mx2_x2 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n19703_ i1=$abc$109383$new_n19700_ q=soc.rom.$20
+.subckt mux2_x1 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n19703_ i1=$abc$109383$new_n19700_ q=soc.rom.$20
 .subckt inv_x0 i=soc.rom.spimemio.config_oe[1] nq=$abc$109383$new_n19705_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.xfer_rd nq=$abc$109383$new_n19706_
 .subckt buf_x4 i=$abc$109383$new_n14979_ q=$abc$109383$new_n19707_
-.subckt mx2_x2 cmd=$abc$109383$new_n15189_ i0=$abc$109383$new_n19707_ i1=$abc$109383$new_n19706_ q=$abc$109383$new_n19708_
+.subckt mux2_x1 cmd=$abc$109383$new_n15189_ i0=$abc$109383$new_n19707_ i1=$abc$109383$new_n19706_ q=$abc$109383$new_n19708_
 .subckt nand3_x0 i0=soc.rom.spimemio.xfer.xfer_rd i1=$abc$109383$new_n15207_ i2=$abc$109383$new_n15205_ nq=$abc$109383$new_n19709_
 .subckt nand4_x0 i0=$abc$109383$new_n19709_ i1=$abc$109383$new_n19708_ i2=$abc$109383$new_n15218_ i3=$abc$109383$new_n15191_ nq=$abc$109383$new_n19710_
-.subckt mx2_x2 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n19710_ i1=$abc$109383$new_n19705_ q=soc.rom.$22
-.subckt o2_x2 i0=soc.rom.spimemio.config_oe[2] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n19712_
-.subckt a3_x2 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n19706_ i2=$abc$109383$new_n15190_ q=$abc$109383$new_n19713_
-.subckt o2_x2 i0=$abc$109383$new_n19713_ i1=$abc$109383$new_n15197_ q=$abc$109383$new_n19714_
+.subckt mux2_x1 cmd=$abc$109383$new_n15197_ i0=$abc$109383$new_n19710_ i1=$abc$109383$new_n19705_ q=soc.rom.$22
+.subckt or2_x1 i0=soc.rom.spimemio.config_oe[2] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n19712_
+.subckt and3_x1 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n19706_ i2=$abc$109383$new_n15190_ q=$abc$109383$new_n19713_
+.subckt or2_x1 i0=$abc$109383$new_n19713_ i1=$abc$109383$new_n15197_ q=$abc$109383$new_n19714_
 .subckt nand2_x0 i0=$abc$109383$new_n19714_ i1=$abc$109383$new_n19712_ nq=soc.rom.$24
-.subckt o2_x2 i0=soc.rom.spimemio.config_oe[3] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n19716_
+.subckt or2_x1 i0=soc.rom.spimemio.config_oe[3] i1=$abc$109383$new_n15210_ q=$abc$109383$new_n19716_
 .subckt nand2_x0 i0=$abc$109383$new_n19716_ i1=$abc$109383$new_n19714_ nq=soc.rom.$26
 .subckt inv_x0 i=soc.hyperram.cs nq=soc.hyperram.$30
 .subckt inv_x0 i=soc.hyperram.rwds_oe nq=soc.hyperram.$33
@@ -5004,145 +5004,145 @@
 .subckt inv_x0 i=io_in[0] nq=$abc$109383$auto$rtlil.cc:2506:NotGate$101166
 .subckt buf_x4 i=$abc$109383$new_n14740_ q=$abc$109383$new_n19731_
 .subckt buf_x4 i=$abc$109383$new_n19731_ q=$abc$109383$new_n19732_
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[26] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n19733_
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[26] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n19733_
 .subckt buf_x4 i=$abc$109383$new_n19733_ q=$abc$109383$new_n19734_
 .subckt buf_x4 i=$abc$109383$new_n19734_ q=$abc$109383$new_n19735_
-.subckt a3_x2 i0=soc.cpu.minerva.loadstore.dbus__we i1=soc.cpu.minerva.loadstore.dbus__sel[3] i2=$abc$109383$new_n14740_ q=$abc$109383$new_n19736_
-.subckt a4_x2 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n19737_
-.subckt a2_x2 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n19736_ q=$abc$109383$new_n19738_
+.subckt and3_x1 i0=soc.cpu.minerva.loadstore.dbus__we i1=soc.cpu.minerva.loadstore.dbus__sel[3] i2=$abc$109383$new_n14740_ q=$abc$109383$new_n19736_
+.subckt and4_x1 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n19737_
+.subckt and2_x1 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n19736_ q=$abc$109383$new_n19738_
 .subckt buf_x4 i=$abc$109383$new_n19738_ q=$abc$109383$new_n19739_
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n19740_
 .subckt buf_x4 i=$abc$109383$new_n19740_ q=$abc$109383$new_n19741_
 .subckt nor2_x0 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n19694_ nq=$abc$109383$new_n19742_
 .subckt buf_x4 i=$abc$109383$new_n19737_ q=$abc$109383$new_n19743_
 .subckt buf_x4 i=$abc$109383$new_n19743_ q=$abc$109383$new_n19744_
-.subckt a4_x2 i0=$abc$109383$new_n19744_ i1=$abc$109383$new_n19742_ i2=$abc$109383$new_n19696_ i3=$abc$109383$new_n19698_ q=$abc$109383$new_n19745_
+.subckt and4_x1 i0=$abc$109383$new_n19744_ i1=$abc$109383$new_n19742_ i2=$abc$109383$new_n19696_ i3=$abc$109383$new_n19698_ q=$abc$109383$new_n19745_
 .subckt buf_x4 i=$abc$109383$new_n19745_ q=$abc$109383$new_n19746_
-.subckt a2_x2 i0=$abc$109383$new_n15136_ i1=$abc$109383$new_n14850_ q=$abc$109383$new_n19747_
-.subckt a3_x2 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ i2=$abc$109383$new_n14855_ q=$abc$109383$new_n19748_
+.subckt and2_x1 i0=$abc$109383$new_n15136_ i1=$abc$109383$new_n14850_ q=$abc$109383$new_n19747_
+.subckt and3_x1 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ i2=$abc$109383$new_n14855_ q=$abc$109383$new_n19748_
 .subckt buf_x4 i=$abc$109383$new_n19748_ q=$abc$109383$new_n19749_
-.subckt a4_x2 i0=$abc$109383$new_n19749_ i1=$abc$109383$new_n19678_ i2=$abc$109383$new_n19667_ i3=$abc$109383$new_n19662_ q=$abc$109383$new_n19750_
-.subckt a2_x2 i0=$abc$109383$new_n19750_ i1=$abc$109383$new_n19747_ q=$abc$109383$new_n19751_
+.subckt and4_x1 i0=$abc$109383$new_n19749_ i1=$abc$109383$new_n19678_ i2=$abc$109383$new_n19667_ i3=$abc$109383$new_n19662_ q=$abc$109383$new_n19750_
+.subckt and2_x1 i0=$abc$109383$new_n19750_ i1=$abc$109383$new_n19747_ q=$abc$109383$new_n19751_
 .subckt buf_x4 i=$abc$109383$new_n19751_ q=$abc$109383$new_n19752_
 .subckt nand3_x0 i0=$abc$109383$new_n19752_ i1=$abc$109383$new_n19746_ i2=$abc$109383$new_n19741_ nq=$abc$109383$new_n19753_
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[103][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100002
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[103][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100002
 .subckt buf_x4 i=$abc$109383$new_n19731_ q=$abc$109383$new_n19755_
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[27] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n19756_
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[27] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n19756_
 .subckt buf_x4 i=$abc$109383$new_n19756_ q=$abc$109383$new_n19757_
 .subckt buf_x4 i=$abc$109383$new_n19757_ q=$abc$109383$new_n19758_
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[103][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100004
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[103][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100004
 .subckt buf_x4 i=$abc$109383$new_n19731_ q=$abc$109383$new_n19760_
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[28] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n19761_
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[28] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n19761_
 .subckt buf_x4 i=$abc$109383$new_n19761_ q=$abc$109383$new_n19762_
 .subckt buf_x4 i=$abc$109383$new_n19762_ q=$abc$109383$new_n19763_
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[103][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100006
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[29] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n19765_
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[103][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100006
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[29] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n19765_
 .subckt buf_x4 i=$abc$109383$new_n19765_ q=$abc$109383$new_n19766_
 .subckt buf_x4 i=$abc$109383$new_n19766_ q=$abc$109383$new_n19767_
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[103][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100008
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[30] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n19769_
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[103][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100008
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[30] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n19769_
 .subckt buf_x4 i=$abc$109383$new_n19769_ q=$abc$109383$new_n19770_
 .subckt buf_x4 i=$abc$109383$new_n19770_ q=$abc$109383$new_n19771_
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[103][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100010
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[31] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n19773_
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[103][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100010
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[31] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n19773_
 .subckt buf_x4 i=$abc$109383$new_n19773_ q=$abc$109383$new_n19774_
 .subckt buf_x4 i=$abc$109383$new_n19774_ q=$abc$109383$new_n19775_
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[103][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100012
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[24] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n19777_
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[103][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100012
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[24] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n19777_
 .subckt buf_x4 i=$abc$109383$new_n19777_ q=$abc$109383$new_n19778_
 .subckt buf_x4 i=$abc$109383$new_n19778_ q=$abc$109383$new_n19779_
 .subckt nor4_x0 i0=$abc$109383$new_n14863_ i1=$abc$109383$new_n14843_ i2=$abc$109383$new_n14839_ i3=$abc$109383$new_n14829_ nq=$abc$109383$new_n19780_
 .subckt buf_x4 i=$abc$109383$new_n19780_ q=$abc$109383$new_n19781_
 .subckt buf_x4 i=$abc$109383$new_n15136_ q=$abc$109383$new_n19782_
 .subckt nor2_x0 i0=$abc$109383$new_n14954_ i1=$abc$109383$new_n19782_ nq=$abc$109383$new_n19783_
-.subckt a4_x2 i0=$abc$109383$new_n19783_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19744_ i3=$abc$109383$new_n19644_ q=$abc$109383$new_n19784_
+.subckt and4_x1 i0=$abc$109383$new_n19783_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19744_ i3=$abc$109383$new_n19644_ q=$abc$109383$new_n19784_
 .subckt nand2_x0 i0=$abc$109383$new_n19784_ i1=$abc$109383$new_n19741_ nq=$abc$109383$new_n19785_
 .subckt buf_x4 i=$abc$109383$new_n19785_ q=$abc$109383$new_n19786_
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[1][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100014
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[25] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n19788_
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[1][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100014
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[25] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n19788_
 .subckt buf_x4 i=$abc$109383$new_n19788_ q=$abc$109383$new_n19789_
 .subckt buf_x4 i=$abc$109383$new_n19789_ q=$abc$109383$new_n19790_
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[1][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100016
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[1][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100018
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[1][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100020
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[1][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100022
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[1][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100024
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[1][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100026
-.subckt mx2_x2 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[1][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100028
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[1][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100016
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[1][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100018
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[1][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100020
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[1][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100022
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[1][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100024
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[1][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100026
+.subckt mux2_x1 cmd=$abc$109383$new_n19786_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[1][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100028
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[3] nq=$abc$109383$new_n19798_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[3] nq=$abc$109383$new_n19799_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n19799_ i1=$abc$109383$new_n19798_ q=$abc$109383$new_n19800_
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n19799_ i1=$abc$109383$new_n19798_ q=$abc$109383$new_n19800_
 .subckt nor2_x0 i0=$abc$109383$new_n19696_ i1=$abc$109383$new_n19698_ nq=$abc$109383$new_n19801_
-.subckt a4_x2 i0=$abc$109383$new_n19801_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n19800_ i3=$abc$109383$new_n19694_ q=$abc$109383$new_n19802_
+.subckt and4_x1 i0=$abc$109383$new_n19801_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n19800_ i3=$abc$109383$new_n19694_ q=$abc$109383$new_n19802_
 .subckt buf_x4 i=$abc$109383$new_n19802_ q=$abc$109383$new_n19803_
-.subckt o3_x2 i0=$abc$109383$new_n14954_ i1=$abc$109383$new_n15136_ i2=$abc$109383$new_n19643_ q=$abc$109383$new_n19804_
+.subckt or3_x1 i0=$abc$109383$new_n14954_ i1=$abc$109383$new_n15136_ i2=$abc$109383$new_n19643_ q=$abc$109383$new_n19804_
 .subckt nand2_x0 i0=$abc$109383$new_n19804_ i1=$abc$109383$new_n19744_ nq=$abc$109383$new_n19805_
 .subckt buf_x4 i=$abc$109383$new_n19805_ q=$abc$109383$new_n19806_
 .subckt nand3_x0 i0=$abc$109383$new_n19806_ i1=$abc$109383$new_n19803_ i2=$abc$109383$new_n19741_ nq=$abc$109383$new_n19807_
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[16][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100030
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[16][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100032
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[16][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100034
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[16][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100036
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[16][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100038
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[16][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100040
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[16][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100042
-.subckt mx2_x2 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[16][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100044
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[16][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100030
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[16][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100032
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[16][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100034
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[16][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100036
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[16][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100038
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[16][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100040
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[16][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100042
+.subckt mux2_x1 cmd=$abc$109383$new_n19807_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[16][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100044
 .subckt buf_x4 i=soc.cpu.minerva.payload__rd$123[2] q=$abc$109383$new_n19816_
 .subckt buf_x4 i=soc.cpu.minerva.payload__rd$123[3] q=$abc$109383$new_n19817_
 .subckt buf_x4 i=soc.cpu.minerva.payload__rd$123[4] q=$abc$109383$new_n19818_
 .subckt nor2_x0 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ nq=$abc$109383$new_n19819_
-.subckt a2_x2 i0=$abc$109383$new_n19819_ i1=$abc$109383$new_n19816_ q=$abc$109383$new_n19820_
+.subckt and2_x1 i0=$abc$109383$new_n19819_ i1=$abc$109383$new_n19816_ q=$abc$109383$new_n19820_
 .subckt buf_x4 i=$abc$109383$new_n19820_ q=$abc$109383$new_n19821_
 .subckt buf_x4 i=soc.cpu.minerva.payload__rd$123[1] q=$abc$109383$new_n19822_
-.subckt o2_x2 i0=$abc$109383$new_n19822_ i1=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n19823_
-.subckt o3_x2 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n19824_
-.subckt ao22_x2 i0=$abc$109383$new_n19824_ i1=$abc$109383$new_n19823_ i2=soc.cpu.minerva.payload__rd_we$125 q=$abc$109383$new_n19825_
+.subckt or2_x1 i0=$abc$109383$new_n19822_ i1=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n19823_
+.subckt or3_x1 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n19824_
+.subckt and21nor_x1 i0=$abc$109383$new_n19824_ i1=$abc$109383$new_n19823_ i2=soc.cpu.minerva.payload__rd_we$125 nq=$abc$109383$new_n19825_
 .subckt buf_x4 i=$abc$109383$new_n19825_ q=$abc$109383$new_n19826_
 .subckt inv_x0 i=soc.cpu.minerva.m_payload__exception nq=$abc$109383$new_n19827_
-.subckt a2_x2 i0=$abc$109383$new_n19827_ i1=soc.cpu.minerva.m.valid$1 q=$abc$109383$new_n19828_
+.subckt and2_x1 i0=$abc$109383$new_n19827_ i1=soc.cpu.minerva.m.valid$1 q=$abc$109383$new_n19828_
 .subckt buf_x4 i=$abc$109383$new_n19828_ q=$abc$109383$new_n19829_
 .subckt inv_x0 i=$abc$109383$new_n19822_ nq=$abc$109383$new_n19830_
-.subckt a2_x2 i0=$abc$109383$new_n19830_ i1=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n19831_
+.subckt and2_x1 i0=$abc$109383$new_n19830_ i1=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n19831_
 .subckt buf_x4 i=$abc$109383$new_n19831_ q=$abc$109383$new_n19832_
 .subckt nand4_x0 i0=$abc$109383$new_n19832_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n19821_ nq=$abc$109383$new_n19833_
-.subckt a2_x2 i0=$abc$109383$new_n19833_ i1=soc.cpu.minerva.gprf.mem._mem[5][0] q=$abc$109383$new_n19834_
+.subckt and2_x1 i0=$abc$109383$new_n19833_ i1=soc.cpu.minerva.gprf.mem._mem[5][0] q=$abc$109383$new_n19834_
 .subckt buf_x4 i=$abc$109383$new_n19825_ q=$abc$109383$new_n19835_
 .subckt buf_x4 i=$abc$109383$new_n19835_ q=$abc$109383$new_n19836_
 .subckt buf_x4 i=$abc$109383$new_n19828_ q=$abc$109383$new_n19837_
 .subckt buf_x4 i=$abc$109383$new_n19837_ q=$abc$109383$new_n19838_
 .subckt buf_x4 i=$abc$109383$new_n19832_ q=$abc$109383$new_n19839_
-.subckt a4_x2 i0=$abc$109383$new_n19839_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n19840_
+.subckt and4_x1 i0=$abc$109383$new_n19839_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n19840_
 .subckt buf_x4 i=soc.cpu.minerva.payload__load$131 q=$abc$109383$new_n19841_
 .subckt buf_x4 i=$abc$109383$new_n19841_ q=$abc$109383$new_n19842_
 .subckt buf_x4 i=soc.cpu.minerva.payload__funct3$127[1] q=$abc$109383$new_n19843_
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__funct3$127[2] i1=soc.cpu.minerva.payload__funct3$127[0] nq=$abc$109383$new_n19844_
 .subckt buf_x4 i=$abc$109383$new_n19844_ q=$abc$109383$new_n19845_
 .subckt buf_x4 i=$abc$109383$new_n19845_ q=$abc$109383$new_n19846_
-.subckt a3_x2 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[0] i2=$abc$109383$new_n19843_ q=$abc$109383$new_n19847_
+.subckt and3_x1 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[0] i2=$abc$109383$new_n19843_ q=$abc$109383$new_n19847_
 .subckt inv_x0 i=soc.cpu.minerva.payload__funct3$127[1] nq=$abc$109383$new_n19848_
 .subckt buf_x4 i=$abc$109383$new_n19848_ q=$abc$109383$new_n19849_
 .subckt nand2_x0 i0=$abc$109383$new_n19849_ i1=soc.cpu.minerva.payload__funct3$127[0] nq=$abc$109383$new_n19850_
 .subckt inv_x0 i=$abc$109383$new_n19841_ nq=$abc$109383$new_n19851_
-.subckt ao22_x2 i0=$abc$109383$new_n19851_ i1=$abc$109383$new_n19850_ i2=soc.cpu.minerva.payload__result$129[0] q=$abc$109383$new_n19852_
-.subckt mx2_x2 cmd=$abc$109383$new_n19852_ i0=soc.cpu.minerva.payload__load_data$132[16] i1=soc.cpu.minerva.payload__load_data$132[24] q=$abc$109383$new_n19853_
+.subckt and21nor_x1 i0=$abc$109383$new_n19851_ i1=$abc$109383$new_n19850_ i2=soc.cpu.minerva.payload__result$129[0] nq=$abc$109383$new_n19852_
+.subckt mux2_x1 cmd=$abc$109383$new_n19852_ i0=soc.cpu.minerva.payload__load_data$132[16] i1=soc.cpu.minerva.payload__load_data$132[24] q=$abc$109383$new_n19853_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[0] nq=$abc$109383$new_n19854_
-.subckt a2_x2 i0=$abc$109383$new_n19848_ i1=soc.cpu.minerva.payload__funct3$127[0] q=$abc$109383$new_n19855_
+.subckt and2_x1 i0=$abc$109383$new_n19848_ i1=soc.cpu.minerva.payload__funct3$127[0] q=$abc$109383$new_n19855_
 .subckt buf_x4 i=$abc$109383$new_n19855_ q=$abc$109383$new_n19856_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__load$131 i1=$abc$109383$new_n19856_ i2=$abc$109383$new_n19854_ q=$abc$109383$new_n19857_
-.subckt mx2_x2 cmd=$abc$109383$new_n19857_ i0=soc.cpu.minerva.payload__load_data$132[8] i1=soc.cpu.minerva.payload__load_data$132[0] q=$abc$109383$new_n19858_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__load$131 i1=$abc$109383$new_n19856_ i2=$abc$109383$new_n19854_ nq=$abc$109383$new_n19857_
+.subckt mux2_x1 cmd=$abc$109383$new_n19857_ i0=soc.cpu.minerva.payload__load_data$132[8] i1=soc.cpu.minerva.payload__load_data$132[0] q=$abc$109383$new_n19858_
 .subckt buf_x4 i=soc.cpu.minerva.payload__result$129[1] q=$abc$109383$new_n19859_
-.subckt mx2_x2 cmd=$abc$109383$new_n19859_ i0=$abc$109383$new_n19858_ i1=$abc$109383$new_n19853_ q=$abc$109383$new_n19860_
-.subckt a2_x2 i0=$abc$109383$new_n19860_ i1=$abc$109383$new_n19849_ q=$abc$109383$new_n19861_
-.subckt ao22_x2 i0=$abc$109383$new_n19861_ i1=$abc$109383$new_n19847_ i2=$abc$109383$new_n19842_ q=$abc$109383$new_n19862_
+.subckt mux2_x1 cmd=$abc$109383$new_n19859_ i0=$abc$109383$new_n19858_ i1=$abc$109383$new_n19853_ q=$abc$109383$new_n19860_
+.subckt and2_x1 i0=$abc$109383$new_n19860_ i1=$abc$109383$new_n19849_ q=$abc$109383$new_n19861_
+.subckt and21nor_x1 i0=$abc$109383$new_n19861_ i1=$abc$109383$new_n19847_ i2=$abc$109383$new_n19842_ nq=$abc$109383$new_n19862_
 .subckt buf_x4 i=$abc$109383$new_n19862_ q=$abc$109383$new_n19863_
 .subckt buf_x4 i=$abc$109383$new_n19863_ q=$abc$109383$new_n19864_
 .subckt buf_x4 i=$abc$109383$new_n19851_ q=$abc$109383$new_n19865_
 .subckt buf_x4 i=soc.cpu.minerva.payload__result$129[0] q=$abc$109383$new_n19866_
 .subckt buf_x4 i=soc.cpu.minerva.payload__multiply$134 q=$abc$109383$new_n19867_
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=$abc$109383$new_n19866_ i1=soc.cpu.minerva.multiplier.w_result[0] q=$abc$109383$new_n19868_
-.subckt a2_x2 i0=$abc$109383$new_n19868_ i1=$abc$109383$new_n19865_ q=$abc$109383$new_n19869_
-.subckt ao22_x2 i0=$abc$109383$new_n19869_ i1=$abc$109383$new_n19864_ i2=$abc$109383$new_n19840_ q=$abc$109383$new_n19870_
-.subckt o2_x2 i0=$abc$109383$new_n19870_ i1=$abc$109383$new_n19834_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100046
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=$abc$109383$new_n19866_ i1=soc.cpu.minerva.multiplier.w_result[0] q=$abc$109383$new_n19868_
+.subckt and2_x1 i0=$abc$109383$new_n19868_ i1=$abc$109383$new_n19865_ q=$abc$109383$new_n19869_
+.subckt and21nor_x1 i0=$abc$109383$new_n19869_ i1=$abc$109383$new_n19864_ i2=$abc$109383$new_n19840_ nq=$abc$109383$new_n19870_
+.subckt or2_x1 i0=$abc$109383$new_n19870_ i1=$abc$109383$new_n19834_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100046
 .subckt buf_x4 i=soc.cpu.minerva.payload__funct3$127[1] q=$abc$109383$new_n19872_
 .subckt buf_x4 i=$abc$109383$new_n19872_ q=$abc$109383$new_n19873_
 .subckt buf_x4 i=$abc$109383$new_n19844_ q=$abc$109383$new_n19874_
@@ -5152,7 +5152,7 @@
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[17] nq=$abc$109383$new_n19878_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[25] nq=$abc$109383$new_n19879_
 .subckt buf_x4 i=$abc$109383$new_n19857_ q=$abc$109383$new_n19880_
-.subckt mx2_x2 cmd=$abc$109383$new_n19880_ i0=$abc$109383$new_n19879_ i1=$abc$109383$new_n19878_ q=$abc$109383$new_n19881_
+.subckt mux2_x1 cmd=$abc$109383$new_n19880_ i0=$abc$109383$new_n19879_ i1=$abc$109383$new_n19878_ q=$abc$109383$new_n19881_
 .subckt nand2_x0 i0=$abc$109383$new_n19881_ i1=$abc$109383$new_n19877_ nq=$abc$109383$new_n19882_
 .subckt inv_x1 i=soc.cpu.minerva.payload__result$129[1] nq=$abc$109383$new_n19883_
 .subckt buf_x4 i=$abc$109383$new_n19883_ q=$abc$109383$new_n19884_
@@ -5163,39 +5163,39 @@
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[1] nq=$abc$109383$new_n19889_
 .subckt buf_x4 i=$abc$109383$new_n19880_ q=$abc$109383$new_n19890_
 .subckt nand3_x0 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n19889_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n19891_
-.subckt a2_x2 i0=$abc$109383$new_n19891_ i1=$abc$109383$new_n19888_ q=$abc$109383$new_n19892_
+.subckt and2_x1 i0=$abc$109383$new_n19891_ i1=$abc$109383$new_n19888_ q=$abc$109383$new_n19892_
 .subckt nand3_x0 i0=$abc$109383$new_n19892_ i1=$abc$109383$new_n19882_ i2=$abc$109383$new_n19849_ nq=$abc$109383$new_n19893_
-.subckt oa22_x2 i0=$abc$109383$new_n19893_ i1=$abc$109383$new_n19876_ i2=$abc$109383$new_n19865_ q=$abc$109383$new_n19894_
+.subckt or21nand_x1 i0=$abc$109383$new_n19893_ i1=$abc$109383$new_n19876_ i2=$abc$109383$new_n19865_ nq=$abc$109383$new_n19894_
 .subckt buf_x4 i=$abc$109383$new_n19865_ q=$abc$109383$new_n19895_
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=$abc$109383$new_n19877_ i1=soc.cpu.minerva.multiplier.w_result[1] q=$abc$109383$new_n19896_
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=$abc$109383$new_n19877_ i1=soc.cpu.minerva.multiplier.w_result[1] q=$abc$109383$new_n19896_
 .subckt nand2_x0 i0=$abc$109383$new_n19896_ i1=$abc$109383$new_n19895_ nq=$abc$109383$new_n19897_
 .subckt nand2_x0 i0=$abc$109383$new_n19897_ i1=$abc$109383$new_n19894_ nq=$abc$109383$new_n19898_
 .subckt buf_x4 i=$abc$109383$new_n19898_ q=$abc$109383$new_n19899_
 .subckt buf_x4 i=$abc$109383$new_n19833_ q=$abc$109383$new_n19900_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[5][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100048
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[2] i1=soc.cpu.minerva.multiplier.w_result[2] q=$abc$109383$new_n19902_
-.subckt a2_x2 i0=$abc$109383$new_n19902_ i1=$abc$109383$new_n19865_ q=$abc$109383$new_n19903_
-.subckt a3_x2 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[2] i2=soc.cpu.minerva.payload__funct3$127[1] q=$abc$109383$new_n19904_
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[5][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100048
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[2] i1=soc.cpu.minerva.multiplier.w_result[2] q=$abc$109383$new_n19902_
+.subckt and2_x1 i0=$abc$109383$new_n19902_ i1=$abc$109383$new_n19865_ q=$abc$109383$new_n19903_
+.subckt and3_x1 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[2] i2=soc.cpu.minerva.payload__funct3$127[1] q=$abc$109383$new_n19904_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[18] nq=$abc$109383$new_n19905_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[26] nq=$abc$109383$new_n19906_
-.subckt mx2_x2 cmd=$abc$109383$new_n19880_ i0=$abc$109383$new_n19906_ i1=$abc$109383$new_n19905_ q=$abc$109383$new_n19907_
+.subckt mux2_x1 cmd=$abc$109383$new_n19880_ i0=$abc$109383$new_n19906_ i1=$abc$109383$new_n19905_ q=$abc$109383$new_n19907_
 .subckt nand2_x0 i0=$abc$109383$new_n19907_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n19908_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[10] nq=$abc$109383$new_n19909_
 .subckt nand4_x0 i0=$abc$109383$new_n19887_ i1=$abc$109383$new_n19909_ i2=$abc$109383$new_n19883_ i3=$abc$109383$new_n19866_ nq=$abc$109383$new_n19910_
-.subckt a2_x2 i0=$abc$109383$new_n19910_ i1=$abc$109383$new_n19849_ q=$abc$109383$new_n19911_
-.subckt oa22_x2 i0=$abc$109383$new_n19911_ i1=$abc$109383$new_n19908_ i2=$abc$109383$new_n19904_ q=$abc$109383$new_n19912_
+.subckt and2_x1 i0=$abc$109383$new_n19910_ i1=$abc$109383$new_n19849_ q=$abc$109383$new_n19911_
+.subckt or21nand_x1 i0=$abc$109383$new_n19911_ i1=$abc$109383$new_n19908_ i2=$abc$109383$new_n19904_ nq=$abc$109383$new_n19912_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[2] nq=$abc$109383$new_n19913_
 .subckt nand3_x0 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n19913_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n19914_
-.subckt a2_x2 i0=$abc$109383$new_n19914_ i1=$abc$109383$new_n19841_ q=$abc$109383$new_n19915_
-.subckt oa22_x2 i0=$abc$109383$new_n19915_ i1=$abc$109383$new_n19912_ i2=$abc$109383$new_n19903_ q=$abc$109383$new_n19916_
+.subckt and2_x1 i0=$abc$109383$new_n19914_ i1=$abc$109383$new_n19841_ q=$abc$109383$new_n19915_
+.subckt or21nand_x1 i0=$abc$109383$new_n19915_ i1=$abc$109383$new_n19912_ i2=$abc$109383$new_n19903_ nq=$abc$109383$new_n19916_
 .subckt buf_x4 i=$abc$109383$new_n19916_ q=$abc$109383$new_n19917_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[5][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100050
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[5][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100050
 .subckt buf_x4 i=$abc$109383$new_n19865_ q=$abc$109383$new_n19919_
 .subckt buf_x4 i=$abc$109383$new_n19919_ q=$abc$109383$new_n19920_
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[3] i2=$abc$109383$new_n19843_ nq=$abc$109383$new_n19921_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[19] nq=$abc$109383$new_n19922_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[27] nq=$abc$109383$new_n19923_
-.subckt mx2_x2 cmd=$abc$109383$new_n19880_ i0=$abc$109383$new_n19923_ i1=$abc$109383$new_n19922_ q=$abc$109383$new_n19924_
+.subckt mux2_x1 cmd=$abc$109383$new_n19880_ i0=$abc$109383$new_n19923_ i1=$abc$109383$new_n19922_ q=$abc$109383$new_n19924_
 .subckt nand2_x0 i0=$abc$109383$new_n19924_ i1=$abc$109383$new_n19877_ nq=$abc$109383$new_n19925_
 .subckt buf_x4 i=$abc$109383$new_n19884_ q=$abc$109383$new_n19926_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[11] nq=$abc$109383$new_n19927_
@@ -5203,2728 +5203,2728 @@
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[3] nq=$abc$109383$new_n19929_
 .subckt buf_x4 i=$abc$109383$new_n19880_ q=$abc$109383$new_n19930_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19929_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n19931_
-.subckt a2_x2 i0=$abc$109383$new_n19931_ i1=$abc$109383$new_n19928_ q=$abc$109383$new_n19932_
+.subckt and2_x1 i0=$abc$109383$new_n19931_ i1=$abc$109383$new_n19928_ q=$abc$109383$new_n19932_
 .subckt nand3_x0 i0=$abc$109383$new_n19932_ i1=$abc$109383$new_n19925_ i2=$abc$109383$new_n19849_ nq=$abc$109383$new_n19933_
-.subckt oa22_x2 i0=$abc$109383$new_n19933_ i1=$abc$109383$new_n19921_ i2=$abc$109383$new_n19920_ q=$abc$109383$new_n19934_
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[3] i1=soc.cpu.minerva.multiplier.w_result[3] q=$abc$109383$new_n19935_
+.subckt or21nand_x1 i0=$abc$109383$new_n19933_ i1=$abc$109383$new_n19921_ i2=$abc$109383$new_n19920_ nq=$abc$109383$new_n19934_
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[3] i1=soc.cpu.minerva.multiplier.w_result[3] q=$abc$109383$new_n19935_
 .subckt nand2_x0 i0=$abc$109383$new_n19935_ i1=$abc$109383$new_n19865_ nq=$abc$109383$new_n19936_
 .subckt nand2_x0 i0=$abc$109383$new_n19936_ i1=$abc$109383$new_n19934_ nq=$abc$109383$new_n19937_
 .subckt buf_x4 i=$abc$109383$new_n19937_ q=$abc$109383$new_n19938_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[5][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100052
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[4] i1=soc.cpu.minerva.multiplier.w_result[4] q=$abc$109383$new_n19940_
-.subckt a2_x2 i0=$abc$109383$new_n19940_ i1=$abc$109383$new_n19895_ q=$abc$109383$new_n19941_
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[5][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100052
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[4] i1=soc.cpu.minerva.multiplier.w_result[4] q=$abc$109383$new_n19940_
+.subckt and2_x1 i0=$abc$109383$new_n19940_ i1=$abc$109383$new_n19895_ q=$abc$109383$new_n19941_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[4] nq=$abc$109383$new_n19942_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19942_ i2=$abc$109383$new_n19926_ nq=$abc$109383$new_n19943_
-.subckt a2_x2 i0=$abc$109383$new_n19943_ i1=$abc$109383$new_n19842_ q=$abc$109383$new_n19944_
-.subckt a3_x2 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[4] i2=$abc$109383$new_n19843_ q=$abc$109383$new_n19945_
+.subckt and2_x1 i0=$abc$109383$new_n19943_ i1=$abc$109383$new_n19842_ q=$abc$109383$new_n19944_
+.subckt and3_x1 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[4] i2=$abc$109383$new_n19843_ q=$abc$109383$new_n19945_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[20] nq=$abc$109383$new_n19946_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[28] nq=$abc$109383$new_n19947_
-.subckt mx2_x2 cmd=$abc$109383$new_n19890_ i0=$abc$109383$new_n19947_ i1=$abc$109383$new_n19946_ q=$abc$109383$new_n19948_
+.subckt mux2_x1 cmd=$abc$109383$new_n19890_ i0=$abc$109383$new_n19947_ i1=$abc$109383$new_n19946_ q=$abc$109383$new_n19948_
 .subckt nand2_x0 i0=$abc$109383$new_n19948_ i1=$abc$109383$new_n19877_ nq=$abc$109383$new_n19949_
 .subckt buf_x4 i=$abc$109383$new_n19883_ q=$abc$109383$new_n19950_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[12] nq=$abc$109383$new_n19951_
-.subckt a4_x2 i0=$abc$109383$new_n19887_ i1=$abc$109383$new_n19951_ i2=$abc$109383$new_n19950_ i3=$abc$109383$new_n19866_ q=$abc$109383$new_n19952_
+.subckt and4_x1 i0=$abc$109383$new_n19887_ i1=$abc$109383$new_n19951_ i2=$abc$109383$new_n19950_ i3=$abc$109383$new_n19866_ q=$abc$109383$new_n19952_
 .subckt nor2_x0 i0=$abc$109383$new_n19952_ i1=$abc$109383$new_n19873_ nq=$abc$109383$new_n19953_
-.subckt oa22_x2 i0=$abc$109383$new_n19953_ i1=$abc$109383$new_n19949_ i2=$abc$109383$new_n19945_ q=$abc$109383$new_n19954_
-.subckt oa22_x2 i0=$abc$109383$new_n19954_ i1=$abc$109383$new_n19944_ i2=$abc$109383$new_n19941_ q=$abc$109383$new_n19955_
+.subckt or21nand_x1 i0=$abc$109383$new_n19953_ i1=$abc$109383$new_n19949_ i2=$abc$109383$new_n19945_ nq=$abc$109383$new_n19954_
+.subckt or21nand_x1 i0=$abc$109383$new_n19954_ i1=$abc$109383$new_n19944_ i2=$abc$109383$new_n19941_ nq=$abc$109383$new_n19955_
 .subckt buf_x4 i=$abc$109383$new_n19955_ q=$abc$109383$new_n19956_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[5][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100054
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[5][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100054
 .subckt buf_x4 i=$abc$109383$new_n19867_ q=$abc$109383$new_n19958_
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[5] i1=soc.cpu.minerva.multiplier.w_result[5] q=$abc$109383$new_n19959_
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[5] i1=soc.cpu.minerva.multiplier.w_result[5] q=$abc$109383$new_n19959_
 .subckt nand2_x0 i0=$abc$109383$new_n19959_ i1=$abc$109383$new_n19895_ nq=$abc$109383$new_n19960_
 .subckt nand3_x0 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[5] i2=$abc$109383$new_n19873_ nq=$abc$109383$new_n19961_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[21] nq=$abc$109383$new_n19962_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[29] nq=$abc$109383$new_n19963_
-.subckt mx2_x2 cmd=$abc$109383$new_n19890_ i0=$abc$109383$new_n19963_ i1=$abc$109383$new_n19962_ q=$abc$109383$new_n19964_
+.subckt mux2_x1 cmd=$abc$109383$new_n19890_ i0=$abc$109383$new_n19963_ i1=$abc$109383$new_n19962_ q=$abc$109383$new_n19964_
 .subckt nand2_x0 i0=$abc$109383$new_n19964_ i1=$abc$109383$new_n19877_ nq=$abc$109383$new_n19965_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[5] nq=$abc$109383$new_n19966_
-.subckt oa22_x2 i0=$abc$109383$new_n19866_ i1=$abc$109383$new_n19887_ i2=$abc$109383$new_n19966_ q=$abc$109383$new_n19967_
+.subckt or21nand_x1 i0=$abc$109383$new_n19866_ i1=$abc$109383$new_n19887_ i2=$abc$109383$new_n19966_ nq=$abc$109383$new_n19967_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[13] nq=$abc$109383$new_n19968_
-.subckt ao22_x2 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19968_ i2=$abc$109383$new_n19926_ q=$abc$109383$new_n19969_
+.subckt and21nor_x1 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19968_ i2=$abc$109383$new_n19926_ nq=$abc$109383$new_n19969_
 .subckt nand2_x0 i0=$abc$109383$new_n19969_ i1=$abc$109383$new_n19967_ nq=$abc$109383$new_n19970_
 .subckt nand3_x0 i0=$abc$109383$new_n19970_ i1=$abc$109383$new_n19965_ i2=$abc$109383$new_n19849_ nq=$abc$109383$new_n19971_
-.subckt oa22_x2 i0=$abc$109383$new_n19971_ i1=$abc$109383$new_n19961_ i2=$abc$109383$new_n19920_ q=$abc$109383$new_n19972_
+.subckt or21nand_x1 i0=$abc$109383$new_n19971_ i1=$abc$109383$new_n19961_ i2=$abc$109383$new_n19920_ nq=$abc$109383$new_n19972_
 .subckt nand2_x0 i0=$abc$109383$new_n19972_ i1=$abc$109383$new_n19960_ nq=$abc$109383$new_n19973_
 .subckt buf_x4 i=$abc$109383$new_n19973_ q=$abc$109383$new_n19974_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[5][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100056
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[5][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100056
 .subckt nand3_x0 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[6] i2=$abc$109383$new_n19873_ nq=$abc$109383$new_n19976_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[22] nq=$abc$109383$new_n19977_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[30] nq=$abc$109383$new_n19978_
-.subckt mx2_x2 cmd=$abc$109383$new_n19890_ i0=$abc$109383$new_n19978_ i1=$abc$109383$new_n19977_ q=$abc$109383$new_n19979_
+.subckt mux2_x1 cmd=$abc$109383$new_n19890_ i0=$abc$109383$new_n19978_ i1=$abc$109383$new_n19977_ q=$abc$109383$new_n19979_
 .subckt nand2_x0 i0=$abc$109383$new_n19979_ i1=$abc$109383$new_n19877_ nq=$abc$109383$new_n19980_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[14] nq=$abc$109383$new_n19981_
 .subckt nand4_x0 i0=$abc$109383$new_n19887_ i1=$abc$109383$new_n19981_ i2=$abc$109383$new_n19926_ i3=$abc$109383$new_n19866_ nq=$abc$109383$new_n19982_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[6] nq=$abc$109383$new_n19983_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19983_ i2=$abc$109383$new_n19926_ nq=$abc$109383$new_n19984_
-.subckt a2_x2 i0=$abc$109383$new_n19984_ i1=$abc$109383$new_n19982_ q=$abc$109383$new_n19985_
+.subckt and2_x1 i0=$abc$109383$new_n19984_ i1=$abc$109383$new_n19982_ q=$abc$109383$new_n19985_
 .subckt nand3_x0 i0=$abc$109383$new_n19985_ i1=$abc$109383$new_n19980_ i2=$abc$109383$new_n19849_ nq=$abc$109383$new_n19986_
-.subckt oa22_x2 i0=$abc$109383$new_n19986_ i1=$abc$109383$new_n19976_ i2=$abc$109383$new_n19920_ q=$abc$109383$new_n19987_
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[6] i1=soc.cpu.minerva.multiplier.w_result[6] q=$abc$109383$new_n19988_
+.subckt or21nand_x1 i0=$abc$109383$new_n19986_ i1=$abc$109383$new_n19976_ i2=$abc$109383$new_n19920_ nq=$abc$109383$new_n19987_
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[6] i1=soc.cpu.minerva.multiplier.w_result[6] q=$abc$109383$new_n19988_
 .subckt nand2_x0 i0=$abc$109383$new_n19988_ i1=$abc$109383$new_n19895_ nq=$abc$109383$new_n19989_
 .subckt nand2_x0 i0=$abc$109383$new_n19989_ i1=$abc$109383$new_n19987_ nq=$abc$109383$new_n19990_
 .subckt buf_x4 i=$abc$109383$new_n19990_ q=$abc$109383$new_n19991_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[5][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100058
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[7] i1=soc.cpu.minerva.multiplier.w_result[7] q=$abc$109383$new_n19993_
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[5][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100058
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[7] i1=soc.cpu.minerva.multiplier.w_result[7] q=$abc$109383$new_n19993_
 .subckt nor2_x0 i0=$abc$109383$new_n19993_ i1=$abc$109383$new_n19842_ nq=$abc$109383$new_n19994_
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[7] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n19995_
-.subckt a2_x2 i0=$abc$109383$new_n19995_ i1=$abc$109383$new_n19841_ q=$abc$109383$new_n19996_
+.subckt and2_x1 i0=$abc$109383$new_n19995_ i1=$abc$109383$new_n19841_ q=$abc$109383$new_n19996_
 .subckt buf_x4 i=soc.cpu.minerva.payload__funct3$127[1] q=$abc$109383$new_n19997_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[23] nq=$abc$109383$new_n19998_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[31] nq=$abc$109383$new_n19999_
-.subckt mx2_x2 cmd=$abc$109383$new_n19857_ i0=$abc$109383$new_n19999_ i1=$abc$109383$new_n19998_ q=$abc$109383$new_n20000_
-.subckt oa22_x2 i0=$abc$109383$new_n20000_ i1=$abc$109383$new_n19877_ i2=$abc$109383$new_n19997_ q=$abc$109383$new_n20001_
+.subckt mux2_x1 cmd=$abc$109383$new_n19857_ i0=$abc$109383$new_n19999_ i1=$abc$109383$new_n19998_ q=$abc$109383$new_n20000_
+.subckt or21nand_x1 i0=$abc$109383$new_n20000_ i1=$abc$109383$new_n19877_ i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20001_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[7] nq=$abc$109383$new_n20002_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__result$129[0] i1=$abc$109383$new_n19887_ i2=$abc$109383$new_n20002_ q=$abc$109383$new_n20003_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__result$129[0] i1=$abc$109383$new_n19887_ i2=$abc$109383$new_n20002_ nq=$abc$109383$new_n20003_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[15] nq=$abc$109383$new_n20004_
-.subckt ao22_x2 i0=$abc$109383$new_n19880_ i1=$abc$109383$new_n20004_ i2=$abc$109383$new_n19950_ q=$abc$109383$new_n20005_
-.subckt a2_x2 i0=$abc$109383$new_n20005_ i1=$abc$109383$new_n20003_ q=$abc$109383$new_n20006_
-.subckt ao22_x2 i0=$abc$109383$new_n20006_ i1=$abc$109383$new_n20001_ i2=$abc$109383$new_n19996_ q=$abc$109383$new_n20007_
+.subckt and21nor_x1 i0=$abc$109383$new_n19880_ i1=$abc$109383$new_n20004_ i2=$abc$109383$new_n19950_ nq=$abc$109383$new_n20005_
+.subckt and2_x1 i0=$abc$109383$new_n20005_ i1=$abc$109383$new_n20003_ q=$abc$109383$new_n20006_
+.subckt and21nor_x1 i0=$abc$109383$new_n20006_ i1=$abc$109383$new_n20001_ i2=$abc$109383$new_n19996_ nq=$abc$109383$new_n20007_
 .subckt nor2_x0 i0=$abc$109383$new_n20007_ i1=$abc$109383$new_n19994_ nq=$abc$109383$new_n20008_
 .subckt buf_x4 i=$abc$109383$new_n20008_ q=$abc$109383$new_n20009_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[5][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100060
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[8] i1=soc.cpu.minerva.multiplier.w_result[8] q=$abc$109383$new_n20011_
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[5][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100060
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[8] i1=soc.cpu.minerva.multiplier.w_result[8] q=$abc$109383$new_n20011_
 .subckt nand2_x0 i0=$abc$109383$new_n20011_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20012_
 .subckt nand2_x0 i0=$abc$109383$new_n20000_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n20013_
 .subckt nand3_x0 i0=$abc$109383$new_n19857_ i1=$abc$109383$new_n20002_ i2=$abc$109383$new_n19883_ nq=$abc$109383$new_n20014_
-.subckt a4_x2 i0=$abc$109383$new_n19886_ i1=$abc$109383$new_n20004_ i2=$abc$109383$new_n19883_ i3=soc.cpu.minerva.payload__result$129[0] q=$abc$109383$new_n20015_
+.subckt and4_x1 i0=$abc$109383$new_n19886_ i1=$abc$109383$new_n20004_ i2=$abc$109383$new_n19883_ i3=soc.cpu.minerva.payload__result$129[0] q=$abc$109383$new_n20015_
 .subckt nor2_x0 i0=$abc$109383$new_n20015_ i1=soc.cpu.minerva.payload__funct3$127[1] nq=$abc$109383$new_n20016_
 .subckt nand4_x0 i0=$abc$109383$new_n20016_ i1=$abc$109383$new_n20014_ i2=$abc$109383$new_n20013_ i3=$abc$109383$new_n19844_ nq=$abc$109383$new_n20017_
 .subckt buf_x4 i=$abc$109383$new_n20017_ q=$abc$109383$new_n20018_
 .subckt inv_x0 i=soc.cpu.minerva.payload__load_data$132[8] nq=$abc$109383$new_n20019_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19926_ i2=$abc$109383$new_n20019_ nq=$abc$109383$new_n20020_
-.subckt a3_x2 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[8] i2=$abc$109383$new_n19997_ q=$abc$109383$new_n20021_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__load_data$132[24] i1=$abc$109383$new_n19890_ i2=$abc$109383$new_n19950_ q=$abc$109383$new_n20022_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__load_data$132[16] i1=$abc$109383$new_n19880_ i2=$abc$109383$new_n19856_ q=$abc$109383$new_n20023_
-.subckt oa22_x2 i0=$abc$109383$new_n20023_ i1=$abc$109383$new_n20022_ i2=$abc$109383$new_n20021_ q=$abc$109383$new_n20024_
+.subckt and3_x1 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[8] i2=$abc$109383$new_n19997_ q=$abc$109383$new_n20021_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__load_data$132[24] i1=$abc$109383$new_n19890_ i2=$abc$109383$new_n19950_ nq=$abc$109383$new_n20022_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__load_data$132[16] i1=$abc$109383$new_n19880_ i2=$abc$109383$new_n19856_ nq=$abc$109383$new_n20023_
+.subckt or21nand_x1 i0=$abc$109383$new_n20023_ i1=$abc$109383$new_n20022_ i2=$abc$109383$new_n20021_ nq=$abc$109383$new_n20024_
 .subckt nand2_x0 i0=$abc$109383$new_n20024_ i1=$abc$109383$new_n20020_ nq=$abc$109383$new_n20025_
-.subckt oa22_x2 i0=$abc$109383$new_n20025_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ q=$abc$109383$new_n20026_
+.subckt or21nand_x1 i0=$abc$109383$new_n20025_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ nq=$abc$109383$new_n20026_
 .subckt nand2_x0 i0=$abc$109383$new_n20026_ i1=$abc$109383$new_n20012_ nq=$abc$109383$new_n20027_
 .subckt buf_x4 i=$abc$109383$new_n20027_ q=$abc$109383$new_n20028_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[5][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100062
-.subckt a3_x2 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19885_ i2=$abc$109383$new_n19926_ q=$abc$109383$new_n20030_
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[5][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100062
+.subckt and3_x1 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19885_ i2=$abc$109383$new_n19926_ q=$abc$109383$new_n20030_
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[9] i2=soc.cpu.minerva.payload__funct3$127[1] nq=$abc$109383$new_n20031_
 .subckt nand4_x0 i0=$abc$109383$new_n19887_ i1=$abc$109383$new_n19878_ i2=$abc$109383$new_n19950_ i3=$abc$109383$new_n19866_ nq=$abc$109383$new_n20032_
-.subckt oa22_x2 i0=$abc$109383$new_n19857_ i1=soc.cpu.minerva.payload__load_data$132[25] i2=$abc$109383$new_n19883_ q=$abc$109383$new_n20033_
+.subckt or21nand_x1 i0=$abc$109383$new_n19857_ i1=soc.cpu.minerva.payload__load_data$132[25] i2=$abc$109383$new_n19883_ nq=$abc$109383$new_n20033_
 .subckt nand3_x0 i0=$abc$109383$new_n20033_ i1=$abc$109383$new_n20032_ i2=$abc$109383$new_n19856_ nq=$abc$109383$new_n20034_
-.subckt oa22_x2 i0=$abc$109383$new_n20034_ i1=$abc$109383$new_n20031_ i2=$abc$109383$new_n20030_ q=$abc$109383$new_n20035_
-.subckt oa22_x2 i0=$abc$109383$new_n20035_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19919_ q=$abc$109383$new_n20036_
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[9] i1=soc.cpu.minerva.multiplier.w_result[9] q=$abc$109383$new_n20037_
+.subckt or21nand_x1 i0=$abc$109383$new_n20034_ i1=$abc$109383$new_n20031_ i2=$abc$109383$new_n20030_ nq=$abc$109383$new_n20035_
+.subckt or21nand_x1 i0=$abc$109383$new_n20035_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19919_ nq=$abc$109383$new_n20036_
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[9] i1=soc.cpu.minerva.multiplier.w_result[9] q=$abc$109383$new_n20037_
 .subckt nand2_x0 i0=$abc$109383$new_n20037_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20038_
 .subckt nand2_x0 i0=$abc$109383$new_n20038_ i1=$abc$109383$new_n20036_ nq=$abc$109383$new_n20039_
 .subckt buf_x4 i=$abc$109383$new_n20039_ q=$abc$109383$new_n20040_
-.subckt mx2_x2 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[5][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100064
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[10] i1=soc.cpu.minerva.multiplier.w_result[10] q=$abc$109383$new_n20042_
+.subckt mux2_x1 cmd=$abc$109383$new_n19900_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[5][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100064
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[10] i1=soc.cpu.minerva.multiplier.w_result[10] q=$abc$109383$new_n20042_
 .subckt nand2_x0 i0=$abc$109383$new_n20042_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20043_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__load_data$132[18] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20044_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__load_data$132[18] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20044_
 .subckt nand2_x0 i0=$abc$109383$new_n19906_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n20045_
-.subckt oa22_x2 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n20045_ i2=$abc$109383$new_n20044_ q=$abc$109383$new_n20046_
+.subckt or21nand_x1 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n20045_ i2=$abc$109383$new_n20044_ nq=$abc$109383$new_n20046_
 .subckt nand3_x0 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n19909_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n20047_
 .subckt nand3_x0 i0=$abc$109383$new_n20047_ i1=$abc$109383$new_n20046_ i2=$abc$109383$new_n19856_ nq=$abc$109383$new_n20048_
 .subckt nand3_x0 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[10] i2=$abc$109383$new_n19843_ nq=$abc$109383$new_n20049_
-.subckt a2_x2 i0=$abc$109383$new_n20049_ i1=$abc$109383$new_n20048_ q=$abc$109383$new_n20050_
-.subckt oa22_x2 i0=$abc$109383$new_n20050_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ q=$abc$109383$new_n20051_
+.subckt and2_x1 i0=$abc$109383$new_n20049_ i1=$abc$109383$new_n20048_ q=$abc$109383$new_n20050_
+.subckt or21nand_x1 i0=$abc$109383$new_n20050_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ nq=$abc$109383$new_n20051_
 .subckt nand2_x0 i0=$abc$109383$new_n20051_ i1=$abc$109383$new_n20043_ nq=$abc$109383$new_n20052_
 .subckt buf_x4 i=$abc$109383$new_n20052_ q=$abc$109383$new_n20053_
 .subckt buf_x4 i=$abc$109383$new_n19833_ q=$abc$109383$new_n20054_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[5][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100066
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[11] i1=soc.cpu.minerva.multiplier.w_result[11] q=$abc$109383$new_n20056_
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[5][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100066
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[11] i1=soc.cpu.minerva.multiplier.w_result[11] q=$abc$109383$new_n20056_
 .subckt nand2_x0 i0=$abc$109383$new_n20056_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20057_
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[11] i2=$abc$109383$new_n19843_ nq=$abc$109383$new_n20058_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19927_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n20059_
 .subckt nand2_x0 i0=$abc$109383$new_n19923_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n20060_
-.subckt a2_x2 i0=$abc$109383$new_n20060_ i1=$abc$109383$new_n19856_ q=$abc$109383$new_n20061_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__load_data$132[19] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20062_
-.subckt ao22_x2 i0=$abc$109383$new_n19880_ i1=$abc$109383$new_n20062_ i2=$abc$109383$new_n20061_ q=$abc$109383$new_n20063_
+.subckt and2_x1 i0=$abc$109383$new_n20060_ i1=$abc$109383$new_n19856_ q=$abc$109383$new_n20061_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__load_data$132[19] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20062_
+.subckt and21nor_x1 i0=$abc$109383$new_n19880_ i1=$abc$109383$new_n20062_ i2=$abc$109383$new_n20061_ nq=$abc$109383$new_n20063_
 .subckt nand2_x0 i0=$abc$109383$new_n20063_ i1=$abc$109383$new_n20059_ nq=$abc$109383$new_n20064_
-.subckt a2_x2 i0=$abc$109383$new_n20064_ i1=$abc$109383$new_n20058_ q=$abc$109383$new_n20065_
-.subckt oa22_x2 i0=$abc$109383$new_n20065_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19865_ q=$abc$109383$new_n20066_
+.subckt and2_x1 i0=$abc$109383$new_n20064_ i1=$abc$109383$new_n20058_ q=$abc$109383$new_n20065_
+.subckt or21nand_x1 i0=$abc$109383$new_n20065_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19865_ nq=$abc$109383$new_n20066_
 .subckt nand2_x0 i0=$abc$109383$new_n20066_ i1=$abc$109383$new_n20057_ nq=$abc$109383$new_n20067_
 .subckt buf_x4 i=$abc$109383$new_n20067_ q=$abc$109383$new_n20068_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[5][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100068
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[12] i1=soc.cpu.minerva.multiplier.w_result[12] q=$abc$109383$new_n20070_
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[5][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100068
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[12] i1=soc.cpu.minerva.multiplier.w_result[12] q=$abc$109383$new_n20070_
 .subckt nand2_x0 i0=$abc$109383$new_n20070_ i1=$abc$109383$new_n19865_ nq=$abc$109383$new_n20071_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__load_data$132[20] i1=$abc$109383$new_n19883_ q=$abc$109383$new_n20072_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__load_data$132[20] i1=$abc$109383$new_n19883_ q=$abc$109383$new_n20072_
 .subckt nand2_x0 i0=$abc$109383$new_n19947_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n20073_
-.subckt oa22_x2 i0=$abc$109383$new_n19857_ i1=$abc$109383$new_n20073_ i2=$abc$109383$new_n20072_ q=$abc$109383$new_n20074_
+.subckt or21nand_x1 i0=$abc$109383$new_n19857_ i1=$abc$109383$new_n20073_ i2=$abc$109383$new_n20072_ nq=$abc$109383$new_n20074_
 .subckt nand3_x0 i0=$abc$109383$new_n19880_ i1=$abc$109383$new_n19951_ i2=$abc$109383$new_n19950_ nq=$abc$109383$new_n20075_
 .subckt nand3_x0 i0=$abc$109383$new_n20075_ i1=$abc$109383$new_n20074_ i2=$abc$109383$new_n19856_ nq=$abc$109383$new_n20076_
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[12] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20077_
-.subckt a2_x2 i0=$abc$109383$new_n20077_ i1=$abc$109383$new_n20076_ q=$abc$109383$new_n20078_
-.subckt oa22_x2 i0=$abc$109383$new_n20078_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19865_ q=$abc$109383$new_n20079_
+.subckt and2_x1 i0=$abc$109383$new_n20077_ i1=$abc$109383$new_n20076_ q=$abc$109383$new_n20078_
+.subckt or21nand_x1 i0=$abc$109383$new_n20078_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19865_ nq=$abc$109383$new_n20079_
 .subckt nand2_x0 i0=$abc$109383$new_n20079_ i1=$abc$109383$new_n20071_ nq=$abc$109383$new_n20080_
 .subckt buf_x4 i=$abc$109383$new_n20080_ q=$abc$109383$new_n20081_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[5][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100070
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[13] i1=soc.cpu.minerva.multiplier.w_result[13] q=$abc$109383$new_n20083_
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[5][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100070
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[13] i1=soc.cpu.minerva.multiplier.w_result[13] q=$abc$109383$new_n20083_
 .subckt nand2_x0 i0=$abc$109383$new_n20083_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20084_
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[13] i2=$abc$109383$new_n19843_ nq=$abc$109383$new_n20085_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19968_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n20086_
 .subckt nand2_x0 i0=$abc$109383$new_n19963_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n20087_
-.subckt a2_x2 i0=$abc$109383$new_n20087_ i1=$abc$109383$new_n19856_ q=$abc$109383$new_n20088_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__load_data$132[21] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20089_
-.subckt ao22_x2 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n20089_ i2=$abc$109383$new_n20088_ q=$abc$109383$new_n20090_
+.subckt and2_x1 i0=$abc$109383$new_n20087_ i1=$abc$109383$new_n19856_ q=$abc$109383$new_n20088_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__load_data$132[21] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20089_
+.subckt and21nor_x1 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n20089_ i2=$abc$109383$new_n20088_ nq=$abc$109383$new_n20090_
 .subckt nand2_x0 i0=$abc$109383$new_n20090_ i1=$abc$109383$new_n20086_ nq=$abc$109383$new_n20091_
-.subckt a2_x2 i0=$abc$109383$new_n20091_ i1=$abc$109383$new_n20085_ q=$abc$109383$new_n20092_
-.subckt oa22_x2 i0=$abc$109383$new_n20092_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ q=$abc$109383$new_n20093_
+.subckt and2_x1 i0=$abc$109383$new_n20091_ i1=$abc$109383$new_n20085_ q=$abc$109383$new_n20092_
+.subckt or21nand_x1 i0=$abc$109383$new_n20092_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ nq=$abc$109383$new_n20093_
 .subckt nand2_x0 i0=$abc$109383$new_n20093_ i1=$abc$109383$new_n20084_ nq=$abc$109383$new_n20094_
 .subckt buf_x4 i=$abc$109383$new_n20094_ q=$abc$109383$new_n20095_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[5][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100072
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[14] i1=soc.cpu.minerva.multiplier.w_result[14] q=$abc$109383$new_n20097_
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[5][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100072
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[14] i1=soc.cpu.minerva.multiplier.w_result[14] q=$abc$109383$new_n20097_
 .subckt nand2_x0 i0=$abc$109383$new_n20097_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20098_
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[14] i2=$abc$109383$new_n19843_ nq=$abc$109383$new_n20099_
 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19981_ i2=$abc$109383$new_n19884_ nq=$abc$109383$new_n20100_
 .subckt nand2_x0 i0=$abc$109383$new_n19978_ i1=$abc$109383$new_n19859_ nq=$abc$109383$new_n20101_
-.subckt a2_x2 i0=$abc$109383$new_n20101_ i1=$abc$109383$new_n19856_ q=$abc$109383$new_n20102_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__load_data$132[22] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20103_
-.subckt ao22_x2 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n20103_ i2=$abc$109383$new_n20102_ q=$abc$109383$new_n20104_
+.subckt and2_x1 i0=$abc$109383$new_n20101_ i1=$abc$109383$new_n19856_ q=$abc$109383$new_n20102_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__load_data$132[22] i1=$abc$109383$new_n19950_ q=$abc$109383$new_n20103_
+.subckt and21nor_x1 i0=$abc$109383$new_n19890_ i1=$abc$109383$new_n20103_ i2=$abc$109383$new_n20102_ nq=$abc$109383$new_n20104_
 .subckt nand2_x0 i0=$abc$109383$new_n20104_ i1=$abc$109383$new_n20100_ nq=$abc$109383$new_n20105_
-.subckt a2_x2 i0=$abc$109383$new_n20105_ i1=$abc$109383$new_n20099_ q=$abc$109383$new_n20106_
-.subckt oa22_x2 i0=$abc$109383$new_n20106_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ q=$abc$109383$new_n20107_
+.subckt and2_x1 i0=$abc$109383$new_n20105_ i1=$abc$109383$new_n20099_ q=$abc$109383$new_n20106_
+.subckt or21nand_x1 i0=$abc$109383$new_n20106_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ nq=$abc$109383$new_n20107_
 .subckt nand2_x0 i0=$abc$109383$new_n20107_ i1=$abc$109383$new_n20098_ nq=$abc$109383$new_n20108_
 .subckt buf_x4 i=$abc$109383$new_n20108_ q=$abc$109383$new_n20109_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[5][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100074
-.subckt mx2_x2 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[15] i1=soc.cpu.minerva.multiplier.w_result[15] q=$abc$109383$new_n20111_
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[5][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100074
+.subckt mux2_x1 cmd=$abc$109383$new_n19958_ i0=soc.cpu.minerva.payload__result$129[15] i1=soc.cpu.minerva.multiplier.w_result[15] q=$abc$109383$new_n20111_
 .subckt nand2_x0 i0=$abc$109383$new_n20111_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n20112_
-.subckt a4_x2 i0=$abc$109383$new_n19886_ i1=soc.cpu.minerva.payload__load_data$132[23] i2=$abc$109383$new_n19883_ i3=soc.cpu.minerva.payload__result$129[0] q=$abc$109383$new_n20113_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__result$129[1] i0=soc.cpu.minerva.payload__load_data$132[15] i1=soc.cpu.minerva.payload__load_data$132[31] q=$abc$109383$new_n20114_
-.subckt a3_x2 i0=$abc$109383$new_n19848_ i1=soc.cpu.minerva.payload__funct3$127[0] i2=soc.cpu.minerva.payload__load$131 q=$abc$109383$new_n20115_
-.subckt ao22_x2 i0=$abc$109383$new_n19854_ i1=$abc$109383$new_n20115_ i2=$abc$109383$new_n20114_ q=$abc$109383$new_n20116_
-.subckt ao22_x2 i0=$abc$109383$new_n20116_ i1=$abc$109383$new_n20113_ i2=$abc$109383$new_n19856_ q=$abc$109383$new_n20117_
-.subckt a3_x2 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[15] i2=$abc$109383$new_n19843_ q=$abc$109383$new_n20118_
+.subckt and4_x1 i0=$abc$109383$new_n19886_ i1=soc.cpu.minerva.payload__load_data$132[23] i2=$abc$109383$new_n19883_ i3=soc.cpu.minerva.payload__result$129[0] q=$abc$109383$new_n20113_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__result$129[1] i0=soc.cpu.minerva.payload__load_data$132[15] i1=soc.cpu.minerva.payload__load_data$132[31] q=$abc$109383$new_n20114_
+.subckt and3_x1 i0=$abc$109383$new_n19848_ i1=soc.cpu.minerva.payload__funct3$127[0] i2=soc.cpu.minerva.payload__load$131 q=$abc$109383$new_n20115_
+.subckt and21nor_x1 i0=$abc$109383$new_n19854_ i1=$abc$109383$new_n20115_ i2=$abc$109383$new_n20114_ nq=$abc$109383$new_n20116_
+.subckt and21nor_x1 i0=$abc$109383$new_n20116_ i1=$abc$109383$new_n20113_ i2=$abc$109383$new_n19856_ nq=$abc$109383$new_n20117_
+.subckt and3_x1 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[15] i2=$abc$109383$new_n19843_ q=$abc$109383$new_n20118_
 .subckt nor2_x0 i0=$abc$109383$new_n20118_ i1=$abc$109383$new_n20117_ nq=$abc$109383$new_n20119_
-.subckt oa22_x2 i0=$abc$109383$new_n20119_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ q=$abc$109383$new_n20120_
+.subckt or21nand_x1 i0=$abc$109383$new_n20119_ i1=$abc$109383$new_n20018_ i2=$abc$109383$new_n19895_ nq=$abc$109383$new_n20120_
 .subckt nand2_x0 i0=$abc$109383$new_n20120_ i1=$abc$109383$new_n20112_ nq=$abc$109383$new_n20121_
 .subckt buf_x4 i=$abc$109383$new_n20121_ q=$abc$109383$new_n20122_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[5][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100076
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[5][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100076
 .subckt buf_x4 i=$abc$109383$new_n20017_ q=$abc$109383$new_n20124_
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[16] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20125_
 .subckt inv_x0 i=soc.cpu.minerva.payload__funct3$127[2] nq=$abc$109383$new_n20126_
 .subckt nand2_x0 i0=$abc$109383$new_n20117_ i1=$abc$109383$new_n20126_ nq=$abc$109383$new_n20127_
 .subckt nand3_x0 i0=$abc$109383$new_n20127_ i1=$abc$109383$new_n20125_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20128_
 .subckt buf_x4 i=soc.cpu.minerva.payload__multiply$134 q=$abc$109383$new_n20129_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[16] i1=soc.cpu.minerva.multiplier.w_result[16] q=$abc$109383$new_n20130_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[16] i1=soc.cpu.minerva.multiplier.w_result[16] q=$abc$109383$new_n20130_
 .subckt buf_x4 i=$abc$109383$new_n19841_ q=$abc$109383$new_n20131_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20130_ i1=$abc$109383$new_n20128_ q=$abc$109383$new_n20132_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20130_ i1=$abc$109383$new_n20128_ q=$abc$109383$new_n20132_
 .subckt buf_x4 i=$abc$109383$new_n20132_ q=$abc$109383$new_n20133_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[5][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100078
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[5][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100078
 .subckt buf_x4 i=$abc$109383$new_n20127_ q=$abc$109383$new_n20135_
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[17] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20136_
 .subckt nand3_x0 i0=$abc$109383$new_n20136_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20137_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[17] i1=soc.cpu.minerva.multiplier.w_result[17] q=$abc$109383$new_n20138_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20138_ i1=$abc$109383$new_n20137_ q=$abc$109383$new_n20139_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[17] i1=soc.cpu.minerva.multiplier.w_result[17] q=$abc$109383$new_n20138_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20138_ i1=$abc$109383$new_n20137_ q=$abc$109383$new_n20139_
 .subckt buf_x4 i=$abc$109383$new_n20139_ q=$abc$109383$new_n20140_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[5][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100080
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[5][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100080
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[18] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20142_
 .subckt nand3_x0 i0=$abc$109383$new_n20142_ i1=$abc$109383$new_n20127_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20143_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[18] i1=soc.cpu.minerva.multiplier.w_result[18] q=$abc$109383$new_n20144_
-.subckt mx2_x2 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20144_ i1=$abc$109383$new_n20143_ q=$abc$109383$new_n20145_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[18] i1=soc.cpu.minerva.multiplier.w_result[18] q=$abc$109383$new_n20144_
+.subckt mux2_x1 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20144_ i1=$abc$109383$new_n20143_ q=$abc$109383$new_n20145_
 .subckt buf_x4 i=$abc$109383$new_n20145_ q=$abc$109383$new_n20146_
-.subckt mx2_x2 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[5][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100082
+.subckt mux2_x1 cmd=$abc$109383$new_n20054_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[5][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100082
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[19] i2=soc.cpu.minerva.payload__funct3$127[1] nq=$abc$109383$new_n20148_
 .subckt nand3_x0 i0=$abc$109383$new_n20148_ i1=$abc$109383$new_n20127_ i2=$abc$109383$new_n20017_ nq=$abc$109383$new_n20149_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[19] i1=soc.cpu.minerva.multiplier.w_result[19] q=$abc$109383$new_n20150_
-.subckt mx2_x2 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20150_ i1=$abc$109383$new_n20149_ q=$abc$109383$new_n20151_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[19] i1=soc.cpu.minerva.multiplier.w_result[19] q=$abc$109383$new_n20150_
+.subckt mux2_x1 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20150_ i1=$abc$109383$new_n20149_ q=$abc$109383$new_n20151_
 .subckt buf_x4 i=$abc$109383$new_n20151_ q=$abc$109383$new_n20152_
 .subckt buf_x4 i=$abc$109383$new_n19833_ q=$abc$109383$new_n20153_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[5][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100084
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[5][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100084
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[20] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20155_
 .subckt nand3_x0 i0=$abc$109383$new_n20155_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20156_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[20] i1=soc.cpu.minerva.multiplier.w_result[20] q=$abc$109383$new_n20157_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20157_ i1=$abc$109383$new_n20156_ q=$abc$109383$new_n20158_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[20] i1=soc.cpu.minerva.multiplier.w_result[20] q=$abc$109383$new_n20157_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20157_ i1=$abc$109383$new_n20156_ q=$abc$109383$new_n20158_
 .subckt buf_x4 i=$abc$109383$new_n20158_ q=$abc$109383$new_n20159_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[5][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100086
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[5][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100086
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[21] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20161_
 .subckt nand3_x0 i0=$abc$109383$new_n20161_ i1=$abc$109383$new_n20127_ i2=$abc$109383$new_n20017_ nq=$abc$109383$new_n20162_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[21] i1=soc.cpu.minerva.multiplier.w_result[21] q=$abc$109383$new_n20163_
-.subckt mx2_x2 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20163_ i1=$abc$109383$new_n20162_ q=$abc$109383$new_n20164_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[21] i1=soc.cpu.minerva.multiplier.w_result[21] q=$abc$109383$new_n20163_
+.subckt mux2_x1 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20163_ i1=$abc$109383$new_n20162_ q=$abc$109383$new_n20164_
 .subckt buf_x4 i=$abc$109383$new_n20164_ q=$abc$109383$new_n20165_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[5][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100088
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[5][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100088
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[22] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20167_
 .subckt nand3_x0 i0=$abc$109383$new_n20167_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20168_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[22] i1=soc.cpu.minerva.multiplier.w_result[22] q=$abc$109383$new_n20169_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20169_ i1=$abc$109383$new_n20168_ q=$abc$109383$new_n20170_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[22] i1=soc.cpu.minerva.multiplier.w_result[22] q=$abc$109383$new_n20169_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20169_ i1=$abc$109383$new_n20168_ q=$abc$109383$new_n20170_
 .subckt buf_x4 i=$abc$109383$new_n20170_ q=$abc$109383$new_n20171_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[5][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100090
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[5][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100090
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[23] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20173_
 .subckt nand3_x0 i0=$abc$109383$new_n20173_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20174_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[23] i1=soc.cpu.minerva.multiplier.w_result[23] q=$abc$109383$new_n20175_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20175_ i1=$abc$109383$new_n20174_ q=$abc$109383$new_n20176_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[23] i1=soc.cpu.minerva.multiplier.w_result[23] q=$abc$109383$new_n20175_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20175_ i1=$abc$109383$new_n20174_ q=$abc$109383$new_n20176_
 .subckt buf_x4 i=$abc$109383$new_n20176_ q=$abc$109383$new_n20177_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[5][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100092
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[5][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100092
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[24] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20179_
 .subckt nand3_x0 i0=$abc$109383$new_n20179_ i1=$abc$109383$new_n20127_ i2=$abc$109383$new_n20017_ nq=$abc$109383$new_n20180_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[24] i1=soc.cpu.minerva.multiplier.w_result[24] q=$abc$109383$new_n20181_
-.subckt mx2_x2 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20181_ i1=$abc$109383$new_n20180_ q=$abc$109383$new_n20182_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[24] i1=soc.cpu.minerva.multiplier.w_result[24] q=$abc$109383$new_n20181_
+.subckt mux2_x1 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20181_ i1=$abc$109383$new_n20180_ q=$abc$109383$new_n20182_
 .subckt buf_x4 i=$abc$109383$new_n20182_ q=$abc$109383$new_n20183_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[5][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100094
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[5][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100094
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[25] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20185_
 .subckt nand3_x0 i0=$abc$109383$new_n20185_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20018_ nq=$abc$109383$new_n20186_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[25] i1=soc.cpu.minerva.multiplier.w_result[25] q=$abc$109383$new_n20187_
-.subckt mx2_x2 cmd=$abc$109383$new_n19842_ i0=$abc$109383$new_n20187_ i1=$abc$109383$new_n20186_ q=$abc$109383$new_n20188_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[25] i1=soc.cpu.minerva.multiplier.w_result[25] q=$abc$109383$new_n20187_
+.subckt mux2_x1 cmd=$abc$109383$new_n19842_ i0=$abc$109383$new_n20187_ i1=$abc$109383$new_n20186_ q=$abc$109383$new_n20188_
 .subckt buf_x4 i=$abc$109383$new_n20188_ q=$abc$109383$new_n20189_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[5][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100096
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[5][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100096
 .subckt nand3_x0 i0=$abc$109383$new_n19845_ i1=soc.cpu.minerva.payload__load_data$132[26] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20191_
 .subckt nand3_x0 i0=$abc$109383$new_n20191_ i1=$abc$109383$new_n20127_ i2=$abc$109383$new_n20017_ nq=$abc$109383$new_n20192_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[26] i1=soc.cpu.minerva.multiplier.w_result[26] q=$abc$109383$new_n20193_
-.subckt mx2_x2 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20193_ i1=$abc$109383$new_n20192_ q=$abc$109383$new_n20194_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__multiply$134 i0=soc.cpu.minerva.payload__result$129[26] i1=soc.cpu.minerva.multiplier.w_result[26] q=$abc$109383$new_n20193_
+.subckt mux2_x1 cmd=$abc$109383$new_n19841_ i0=$abc$109383$new_n20193_ i1=$abc$109383$new_n20192_ q=$abc$109383$new_n20194_
 .subckt buf_x4 i=$abc$109383$new_n20194_ q=$abc$109383$new_n20195_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[5][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100098
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[5][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100098
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[27] i2=$abc$109383$new_n19997_ nq=$abc$109383$new_n20197_
 .subckt nand3_x0 i0=$abc$109383$new_n20197_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20198_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[27] i1=soc.cpu.minerva.multiplier.w_result[27] q=$abc$109383$new_n20199_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20199_ i1=$abc$109383$new_n20198_ q=$abc$109383$new_n20200_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[27] i1=soc.cpu.minerva.multiplier.w_result[27] q=$abc$109383$new_n20199_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20199_ i1=$abc$109383$new_n20198_ q=$abc$109383$new_n20200_
 .subckt buf_x4 i=$abc$109383$new_n20200_ q=$abc$109383$new_n20201_
-.subckt mx2_x2 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[5][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100100
+.subckt mux2_x1 cmd=$abc$109383$new_n20153_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[5][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100100
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[28] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20203_
 .subckt nand3_x0 i0=$abc$109383$new_n20203_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20204_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[28] i1=soc.cpu.minerva.multiplier.w_result[28] q=$abc$109383$new_n20205_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20205_ i1=$abc$109383$new_n20204_ q=$abc$109383$new_n20206_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[28] i1=soc.cpu.minerva.multiplier.w_result[28] q=$abc$109383$new_n20205_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20205_ i1=$abc$109383$new_n20204_ q=$abc$109383$new_n20206_
 .subckt buf_x4 i=$abc$109383$new_n20206_ q=$abc$109383$new_n20207_
-.subckt mx2_x2 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[5][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100102
+.subckt mux2_x1 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[5][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100102
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[29] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20209_
 .subckt nand3_x0 i0=$abc$109383$new_n20209_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20210_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[29] i1=soc.cpu.minerva.multiplier.w_result[29] q=$abc$109383$new_n20211_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20211_ i1=$abc$109383$new_n20210_ q=$abc$109383$new_n20212_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[29] i1=soc.cpu.minerva.multiplier.w_result[29] q=$abc$109383$new_n20211_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20211_ i1=$abc$109383$new_n20210_ q=$abc$109383$new_n20212_
 .subckt buf_x4 i=$abc$109383$new_n20212_ q=$abc$109383$new_n20213_
-.subckt mx2_x2 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[5][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100104
+.subckt mux2_x1 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[5][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100104
 .subckt nand3_x0 i0=$abc$109383$new_n19874_ i1=soc.cpu.minerva.payload__load_data$132[30] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20215_
 .subckt nand3_x0 i0=$abc$109383$new_n20215_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20124_ nq=$abc$109383$new_n20216_
-.subckt mx2_x2 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[30] i1=soc.cpu.minerva.multiplier.w_result[30] q=$abc$109383$new_n20217_
-.subckt mx2_x2 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20217_ i1=$abc$109383$new_n20216_ q=$abc$109383$new_n20218_
+.subckt mux2_x1 cmd=$abc$109383$new_n20129_ i0=soc.cpu.minerva.payload__result$129[30] i1=soc.cpu.minerva.multiplier.w_result[30] q=$abc$109383$new_n20217_
+.subckt mux2_x1 cmd=$abc$109383$new_n20131_ i0=$abc$109383$new_n20217_ i1=$abc$109383$new_n20216_ q=$abc$109383$new_n20218_
 .subckt buf_x4 i=$abc$109383$new_n20218_ q=$abc$109383$new_n20219_
-.subckt mx2_x2 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[5][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100106
+.subckt mux2_x1 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[5][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100106
 .subckt nand3_x0 i0=$abc$109383$new_n19846_ i1=soc.cpu.minerva.payload__load_data$132[31] i2=$abc$109383$new_n19872_ nq=$abc$109383$new_n20221_
 .subckt nand3_x0 i0=$abc$109383$new_n20221_ i1=$abc$109383$new_n20135_ i2=$abc$109383$new_n20018_ nq=$abc$109383$new_n20222_
-.subckt mx2_x2 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[31] i1=soc.cpu.minerva.multiplier.w_result[31] q=$abc$109383$new_n20223_
-.subckt mx2_x2 cmd=$abc$109383$new_n19842_ i0=$abc$109383$new_n20223_ i1=$abc$109383$new_n20222_ q=$abc$109383$new_n20224_
+.subckt mux2_x1 cmd=$abc$109383$new_n19867_ i0=soc.cpu.minerva.payload__result$129[31] i1=soc.cpu.minerva.multiplier.w_result[31] q=$abc$109383$new_n20223_
+.subckt mux2_x1 cmd=$abc$109383$new_n19842_ i0=$abc$109383$new_n20223_ i1=$abc$109383$new_n20222_ q=$abc$109383$new_n20224_
 .subckt buf_x4 i=$abc$109383$new_n20224_ q=$abc$109383$new_n20225_
-.subckt mx2_x2 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[5][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100108
+.subckt mux2_x1 cmd=$abc$109383$new_n19833_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[5][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100108
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n20227_
-.subckt a3_x2 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n19696_ i2=$abc$109383$new_n19698_ q=$abc$109383$new_n20228_
+.subckt and3_x1 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n19696_ i2=$abc$109383$new_n19698_ q=$abc$109383$new_n20228_
 .subckt buf_x4 i=$abc$109383$new_n20228_ q=$abc$109383$new_n20229_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[4] nq=$abc$109383$new_n20230_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[4] nq=$abc$109383$new_n20231_
-.subckt mx2_x2 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n20231_ i1=$abc$109383$new_n20230_ q=$abc$109383$new_n20232_
-.subckt a3_x2 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n14929_ i2=$abc$109383$new_n20232_ q=$abc$109383$new_n20233_
+.subckt mux2_x1 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n20231_ i1=$abc$109383$new_n20230_ q=$abc$109383$new_n20232_
+.subckt and3_x1 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n14929_ i2=$abc$109383$new_n20232_ q=$abc$109383$new_n20233_
 .subckt buf_x4 i=$abc$109383$new_n20233_ q=$abc$109383$new_n20234_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[0] nq=$abc$109383$new_n20235_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[0] nq=$abc$109383$new_n20236_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n20236_ i1=$abc$109383$new_n20235_ q=$abc$109383$new_n20237_
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n20236_ i1=$abc$109383$new_n20235_ q=$abc$109383$new_n20237_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[2] nq=$abc$109383$new_n20238_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[2] nq=$abc$109383$new_n20239_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n20239_ i1=$abc$109383$new_n20238_ q=$abc$109383$new_n20240_
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n20239_ i1=$abc$109383$new_n20238_ q=$abc$109383$new_n20240_
 .subckt buf_x4 i=$abc$109383$new_n20240_ q=$abc$109383$new_n20241_
-.subckt a4_x2 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n20241_ i2=$abc$109383$new_n15136_ i3=$abc$109383$new_n20237_ q=$abc$109383$new_n20242_
+.subckt and4_x1 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n20241_ i2=$abc$109383$new_n15136_ i3=$abc$109383$new_n20237_ q=$abc$109383$new_n20242_
 .subckt buf_x4 i=$abc$109383$new_n20242_ q=$abc$109383$new_n20243_
 .subckt nand4_x0 i0=$abc$109383$new_n20243_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n20227_ nq=$abc$109383$new_n20244_
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[106][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100186
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[106][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100188
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[106][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100190
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[106][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100192
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[106][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100194
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[106][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100196
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[106][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100198
-.subckt mx2_x2 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[106][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100200
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[0] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20253_
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[106][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100186
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[106][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100188
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[106][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100190
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[106][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100192
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[106][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100194
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[106][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100196
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[106][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100198
+.subckt mux2_x1 cmd=$abc$109383$new_n20244_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[106][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100200
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[0] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20253_
 .subckt buf_x4 i=$abc$109383$new_n20253_ q=$abc$109383$new_n20254_
 .subckt buf_x4 i=$abc$109383$new_n20254_ q=$abc$109383$new_n20255_
 .subckt buf_x4 i=$abc$109383$new_n20255_ q=$abc$109383$new_n20256_
 .subckt buf_x4 i=$abc$109383$new_n20233_ q=$abc$109383$new_n20257_
 .subckt buf_x4 i=$abc$109383$new_n20257_ q=$abc$109383$new_n20258_
-.subckt a3_x2 i0=soc.cpu.minerva.loadstore.dbus__sel[0] i1=soc.cpu.minerva.loadstore.dbus__we i2=$abc$109383$new_n14740_ q=$abc$109383$new_n20259_
-.subckt a2_x2 i0=$abc$109383$new_n20259_ i1=$abc$109383$new_n19737_ q=$abc$109383$new_n20260_
+.subckt and3_x1 i0=soc.cpu.minerva.loadstore.dbus__sel[0] i1=soc.cpu.minerva.loadstore.dbus__we i2=$abc$109383$new_n14740_ q=$abc$109383$new_n20259_
+.subckt and2_x1 i0=$abc$109383$new_n20259_ i1=$abc$109383$new_n19737_ q=$abc$109383$new_n20260_
 .subckt buf_x4 i=$abc$109383$new_n20260_ q=$abc$109383$new_n20261_
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n20262_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[6] nq=$abc$109383$new_n20263_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[6] nq=$abc$109383$new_n20264_
-.subckt mx2_x2 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n20264_ i1=$abc$109383$new_n20263_ q=$abc$109383$new_n20265_
-.subckt a3_x2 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n19696_ i2=$abc$109383$new_n20265_ q=$abc$109383$new_n20266_
+.subckt mux2_x1 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n20264_ i1=$abc$109383$new_n20263_ q=$abc$109383$new_n20265_
+.subckt and3_x1 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n19696_ i2=$abc$109383$new_n20265_ q=$abc$109383$new_n20266_
 .subckt buf_x4 i=$abc$109383$new_n20266_ q=$abc$109383$new_n20267_
-.subckt a2_x2 i0=$abc$109383$new_n15136_ i1=$abc$109383$new_n20237_ q=$abc$109383$new_n20268_
-.subckt a2_x2 i0=$abc$109383$new_n20268_ i1=$abc$109383$new_n19750_ q=$abc$109383$new_n20269_
+.subckt and2_x1 i0=$abc$109383$new_n15136_ i1=$abc$109383$new_n20237_ q=$abc$109383$new_n20268_
+.subckt and2_x1 i0=$abc$109383$new_n20268_ i1=$abc$109383$new_n19750_ q=$abc$109383$new_n20269_
 .subckt buf_x4 i=$abc$109383$new_n20269_ q=$abc$109383$new_n20270_
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n20271_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[46][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100220
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[1] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20273_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[46][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100220
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[1] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20273_
 .subckt buf_x4 i=$abc$109383$new_n20273_ q=$abc$109383$new_n20274_
 .subckt buf_x4 i=$abc$109383$new_n20274_ q=$abc$109383$new_n20275_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[46][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100222
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[2] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20277_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[46][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100222
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[2] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20277_
 .subckt buf_x4 i=$abc$109383$new_n20277_ q=$abc$109383$new_n20278_
 .subckt buf_x4 i=$abc$109383$new_n20278_ q=$abc$109383$new_n20279_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[46][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100224
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[3] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20281_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[46][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100224
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[3] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20281_
 .subckt buf_x4 i=$abc$109383$new_n20281_ q=$abc$109383$new_n20282_
 .subckt buf_x4 i=$abc$109383$new_n20282_ q=$abc$109383$new_n20283_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[46][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100226
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[4] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20285_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[46][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100226
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[4] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20285_
 .subckt buf_x4 i=$abc$109383$new_n20285_ q=$abc$109383$new_n20286_
 .subckt buf_x4 i=$abc$109383$new_n20286_ q=$abc$109383$new_n20287_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[46][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100228
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[5] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20289_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[46][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100228
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[5] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20289_
 .subckt buf_x4 i=$abc$109383$new_n20289_ q=$abc$109383$new_n20290_
 .subckt buf_x4 i=$abc$109383$new_n20290_ q=$abc$109383$new_n20291_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[46][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100230
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[6] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20293_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[46][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100230
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[6] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20293_
 .subckt buf_x4 i=$abc$109383$new_n20293_ q=$abc$109383$new_n20294_
 .subckt buf_x4 i=$abc$109383$new_n20294_ q=$abc$109383$new_n20295_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[46][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100232
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[7] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20297_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[46][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100232
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[7] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20297_
 .subckt buf_x4 i=$abc$109383$new_n20297_ q=$abc$109383$new_n20298_
 .subckt buf_x4 i=$abc$109383$new_n20298_ q=$abc$109383$new_n20299_
-.subckt mx2_x2 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[46][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100234
-.subckt a3_x2 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n20301_
+.subckt mux2_x1 cmd=$abc$109383$new_n20271_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[46][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100234
+.subckt and3_x1 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n20301_
 .subckt inv_x0 i=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n20302_
-.subckt a2_x2 i0=$abc$109383$new_n19822_ i1=$abc$109383$new_n20302_ q=$abc$109383$new_n20303_
+.subckt and2_x1 i0=$abc$109383$new_n19822_ i1=$abc$109383$new_n20302_ q=$abc$109383$new_n20303_
 .subckt buf_x4 i=$abc$109383$new_n20303_ q=$abc$109383$new_n20304_
 .subckt nand4_x0 i0=$abc$109383$new_n20304_ i1=$abc$109383$new_n20301_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ nq=$abc$109383$new_n20305_
-.subckt a2_x2 i0=$abc$109383$new_n20305_ i1=soc.cpu.minerva.gprf.mem._mem[30][0] q=$abc$109383$new_n20306_
+.subckt and2_x1 i0=$abc$109383$new_n20305_ i1=soc.cpu.minerva.gprf.mem._mem[30][0] q=$abc$109383$new_n20306_
 .subckt buf_x4 i=$abc$109383$new_n19835_ q=$abc$109383$new_n20307_
 .subckt buf_x4 i=$abc$109383$new_n19837_ q=$abc$109383$new_n20308_
 .subckt buf_x4 i=$abc$109383$new_n20304_ q=$abc$109383$new_n20309_
-.subckt a4_x2 i0=$abc$109383$new_n20309_ i1=$abc$109383$new_n20301_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n20310_
+.subckt and4_x1 i0=$abc$109383$new_n20309_ i1=$abc$109383$new_n20301_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n20310_
 .subckt buf_x4 i=$abc$109383$new_n19869_ q=$abc$109383$new_n20311_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20310_ q=$abc$109383$new_n20312_
-.subckt o2_x2 i0=$abc$109383$new_n20312_ i1=$abc$109383$new_n20306_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100290
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20310_ nq=$abc$109383$new_n20312_
+.subckt or2_x1 i0=$abc$109383$new_n20312_ i1=$abc$109383$new_n20306_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100290
 .subckt buf_x4 i=$abc$109383$new_n20305_ q=$abc$109383$new_n20314_
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[30][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100292
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[30][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100294
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[30][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100296
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[30][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100298
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[30][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100300
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[30][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100302
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[30][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100304
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[30][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100306
-.subckt mx2_x2 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[30][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100308
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[30][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100292
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[30][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100294
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[30][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100296
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[30][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100298
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[30][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100300
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[30][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100302
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[30][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100304
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[30][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100306
+.subckt mux2_x1 cmd=$abc$109383$new_n20314_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[30][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100308
 .subckt buf_x4 i=$abc$109383$new_n20305_ q=$abc$109383$new_n20324_
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[30][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100310
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[30][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100312
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[30][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100314
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[30][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100316
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[30][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100318
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[30][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100320
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[30][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100322
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[30][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100324
-.subckt mx2_x2 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[30][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100326
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[30][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100310
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[30][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100312
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[30][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100314
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[30][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100316
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[30][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100318
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[30][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100320
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[30][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100322
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[30][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100324
+.subckt mux2_x1 cmd=$abc$109383$new_n20324_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[30][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100326
 .subckt buf_x4 i=$abc$109383$new_n20305_ q=$abc$109383$new_n20334_
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[30][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100328
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[30][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100330
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[30][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100332
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[30][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100334
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[30][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100336
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[30][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100338
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[30][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100340
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[30][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100342
-.subckt mx2_x2 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[30][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100344
-.subckt mx2_x2 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[30][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100346
-.subckt mx2_x2 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[30][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100348
-.subckt mx2_x2 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[30][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100350
-.subckt mx2_x2 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[30][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100352
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[8] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20348_
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[30][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100328
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[30][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100330
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[30][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100332
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[30][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100334
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[30][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100336
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[30][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100338
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[30][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100340
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[30][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100342
+.subckt mux2_x1 cmd=$abc$109383$new_n20334_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[30][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100344
+.subckt mux2_x1 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[30][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100346
+.subckt mux2_x1 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[30][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100348
+.subckt mux2_x1 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[30][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100350
+.subckt mux2_x1 cmd=$abc$109383$new_n20305_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[30][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100352
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[8] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20348_
 .subckt buf_x4 i=$abc$109383$new_n20348_ q=$abc$109383$new_n20349_
 .subckt buf_x4 i=$abc$109383$new_n20349_ q=$abc$109383$new_n20350_
 .subckt buf_x4 i=$abc$109383$new_n20350_ q=$abc$109383$new_n20351_
 .subckt buf_x4 i=$abc$109383$new_n20228_ q=$abc$109383$new_n20352_
 .subckt buf_x4 i=$abc$109383$new_n20352_ q=$abc$109383$new_n20353_
 .subckt buf_x4 i=$abc$109383$new_n20257_ q=$abc$109383$new_n20354_
-.subckt a3_x2 i0=soc.cpu.minerva.loadstore.dbus__sel[1] i1=soc.cpu.minerva.loadstore.dbus__we i2=$abc$109383$new_n14740_ q=$abc$109383$new_n20355_
-.subckt a2_x2 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n19737_ q=$abc$109383$new_n20356_
+.subckt and3_x1 i0=soc.cpu.minerva.loadstore.dbus__sel[1] i1=soc.cpu.minerva.loadstore.dbus__we i2=$abc$109383$new_n14740_ q=$abc$109383$new_n20355_
+.subckt and2_x1 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n19737_ q=$abc$109383$new_n20356_
 .subckt buf_x4 i=$abc$109383$new_n20356_ q=$abc$109383$new_n20357_
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n20358_
 .subckt nor2_x0 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ nq=$abc$109383$new_n20359_
-.subckt a2_x2 i0=$abc$109383$new_n20359_ i1=$abc$109383$new_n19750_ q=$abc$109383$new_n20360_
+.subckt and2_x1 i0=$abc$109383$new_n20359_ i1=$abc$109383$new_n19750_ q=$abc$109383$new_n20360_
 .subckt buf_x4 i=$abc$109383$new_n20360_ q=$abc$109383$new_n20361_
 .subckt nand4_x0 i0=$abc$109383$new_n20361_ i1=$abc$109383$new_n20358_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20362_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[108][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100354
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[9] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20364_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[108][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100354
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[9] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20364_
 .subckt buf_x4 i=$abc$109383$new_n20364_ q=$abc$109383$new_n20365_
 .subckt buf_x4 i=$abc$109383$new_n20365_ q=$abc$109383$new_n20366_
 .subckt buf_x4 i=$abc$109383$new_n20366_ q=$abc$109383$new_n20367_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[108][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100356
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[10] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20369_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[108][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100356
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[10] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20369_
 .subckt buf_x4 i=$abc$109383$new_n20369_ q=$abc$109383$new_n20370_
 .subckt buf_x4 i=$abc$109383$new_n20370_ q=$abc$109383$new_n20371_
 .subckt buf_x4 i=$abc$109383$new_n20371_ q=$abc$109383$new_n20372_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[108][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100358
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[11] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20374_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[108][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100358
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[11] i1=$abc$109383$new_n19760_ q=$abc$109383$new_n20374_
 .subckt buf_x4 i=$abc$109383$new_n20374_ q=$abc$109383$new_n20375_
 .subckt buf_x4 i=$abc$109383$new_n20375_ q=$abc$109383$new_n20376_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[108][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100360
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[12] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20378_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[108][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100360
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[12] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20378_
 .subckt buf_x4 i=$abc$109383$new_n20378_ q=$abc$109383$new_n20379_
 .subckt buf_x4 i=$abc$109383$new_n20379_ q=$abc$109383$new_n20380_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[108][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100362
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[13] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20382_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[108][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100362
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[13] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20382_
 .subckt buf_x4 i=$abc$109383$new_n20382_ q=$abc$109383$new_n20383_
 .subckt buf_x4 i=$abc$109383$new_n20383_ q=$abc$109383$new_n20384_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[108][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100364
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[14] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20386_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[108][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100364
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[14] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20386_
 .subckt buf_x4 i=$abc$109383$new_n20386_ q=$abc$109383$new_n20387_
 .subckt buf_x4 i=$abc$109383$new_n20387_ q=$abc$109383$new_n20388_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[108][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100366
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[15] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20390_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[108][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100366
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[15] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20390_
 .subckt buf_x4 i=$abc$109383$new_n20390_ q=$abc$109383$new_n20391_
 .subckt buf_x4 i=$abc$109383$new_n20391_ q=$abc$109383$new_n20392_
-.subckt mx2_x2 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[108][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100368
-.subckt a2_x2 i0=$abc$109383$new_n15010_ i1=soc.rom.spimemio.xfer.obuffer[0] q=$abc$109383$new_n20394_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20394_ i1=soc.rom.spimemio.din_data[1] q=$abc$109383$new_n20395_
-.subckt o4_x2 i0=soc.rom.spimemio.xfer.dummy_count[3] i1=soc.rom.spimemio.xfer.dummy_count[2] i2=soc.rom.spimemio.xfer.dummy_count[1] i3=soc.rom.spimemio.xfer.dummy_count[0] q=$abc$109383$new_n20396_
+.subckt mux2_x1 cmd=$abc$109383$new_n20362_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[108][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100368
+.subckt and2_x1 i0=$abc$109383$new_n15010_ i1=soc.rom.spimemio.xfer.obuffer[0] q=$abc$109383$new_n20394_
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20394_ i1=soc.rom.spimemio.din_data[1] q=$abc$109383$new_n20395_
+.subckt or4_x1 i0=soc.rom.spimemio.xfer.dummy_count[3] i1=soc.rom.spimemio.xfer.dummy_count[2] i2=soc.rom.spimemio.xfer.dummy_count[1] i3=soc.rom.spimemio.xfer.dummy_count[0] q=$abc$109383$new_n20396_
 .subckt nand3_x0 i0=$abc$109383$new_n20396_ i1=$abc$109383$new_n14977_ i2=$abc$109383$new_n15205_ nq=$abc$109383$new_n20397_
-.subckt oa22_x2 i0=soc.rom.spimemio.xfer.xfer_dspi i1=$abc$109383$new_n14977_ i2=$abc$109383$new_n15022_ q=$abc$109383$new_n20398_
-.subckt a2_x2 i0=$abc$109383$new_n20398_ i1=$abc$109383$new_n14993_ q=$abc$109383$new_n20399_
-.subckt oa22_x2 i0=$abc$109383$new_n20399_ i1=$abc$109383$new_n20397_ i2=$abc$109383$new_n14995_ q=$abc$109383$new_n20400_
+.subckt or21nand_x1 i0=soc.rom.spimemio.xfer.xfer_dspi i1=$abc$109383$new_n14977_ i2=$abc$109383$new_n15022_ nq=$abc$109383$new_n20398_
+.subckt and2_x1 i0=$abc$109383$new_n20398_ i1=$abc$109383$new_n14993_ q=$abc$109383$new_n20399_
+.subckt or21nand_x1 i0=$abc$109383$new_n20399_ i1=$abc$109383$new_n20397_ i2=$abc$109383$new_n14995_ nq=$abc$109383$new_n20400_
 .subckt nand3_x0 i0=$abc$109383$new_n20400_ i1=$abc$109383$new_n15036_ i2=$abc$109383$new_n15003_ nq=$abc$109383$new_n20401_
-.subckt a2_x2 i0=$abc$109383$new_n15003_ i1=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n20402_
+.subckt and2_x1 i0=$abc$109383$new_n15003_ i1=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n20402_
 .subckt nand2_x0 i0=$abc$109383$new_n15003_ i1=$abc$109383$new_n14986_ nq=$abc$109383$new_n20403_
-.subckt ao22_x2 i0=$abc$109383$new_n15218_ i1=$abc$109383$new_n20403_ i2=$abc$109383$new_n20402_ q=$abc$109383$new_n20404_
+.subckt and21nor_x1 i0=$abc$109383$new_n15218_ i1=$abc$109383$new_n20403_ i2=$abc$109383$new_n20402_ nq=$abc$109383$new_n20404_
 .subckt nand2_x0 i0=$abc$109383$new_n20404_ i1=$abc$109383$new_n20401_ nq=$abc$109383$new_n20405_
 .subckt buf_x4 i=$abc$109383$new_n20405_ q=$abc$109383$new_n20406_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20395_ i1=soc.rom.spimemio.xfer.obuffer[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100398
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20395_ i1=soc.rom.spimemio.xfer.obuffer[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100398
 .subckt nand2_x0 i0=$abc$109383$new_n15010_ i1=soc.rom.spimemio.xfer.obuffer[1] nq=$abc$109383$new_n20408_
 .subckt nand3_x0 i0=$abc$109383$new_n14979_ i1=soc.rom.spimemio.xfer.obuffer[0] i2=$abc$109383$new_n15206_ nq=$abc$109383$new_n20409_
 .subckt nand2_x0 i0=$abc$109383$new_n20409_ i1=$abc$109383$new_n20408_ nq=$abc$109383$new_n20410_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20410_ i1=soc.rom.spimemio.din_data[2] q=$abc$109383$new_n20411_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20411_ i1=soc.rom.spimemio.xfer.obuffer[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100400
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20410_ i1=soc.rom.spimemio.din_data[2] q=$abc$109383$new_n20411_
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20411_ i1=soc.rom.spimemio.xfer.obuffer[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100400
 .subckt nand2_x0 i0=$abc$109383$new_n15010_ i1=soc.rom.spimemio.xfer.obuffer[2] nq=$abc$109383$new_n20413_
 .subckt nand3_x0 i0=$abc$109383$new_n14979_ i1=soc.rom.spimemio.xfer.obuffer[1] i2=$abc$109383$new_n15206_ nq=$abc$109383$new_n20414_
 .subckt nand2_x0 i0=$abc$109383$new_n20414_ i1=$abc$109383$new_n20413_ nq=$abc$109383$new_n20415_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20415_ i1=soc.rom.spimemio.din_data[3] q=$abc$109383$new_n20416_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20416_ i1=soc.rom.spimemio.xfer.obuffer[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100402
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20415_ i1=soc.rom.spimemio.din_data[3] q=$abc$109383$new_n20416_
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20416_ i1=soc.rom.spimemio.xfer.obuffer[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100402
 .subckt nand3_x0 i0=$abc$109383$new_n19707_ i1=soc.rom.spimemio.xfer.obuffer[2] i2=$abc$109383$new_n15206_ nq=$abc$109383$new_n20418_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.obuffer[0] i1=$abc$109383$new_n15189_ nq=$abc$109383$new_n20419_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.obuffer[3] nq=$abc$109383$new_n20420_
-.subckt ao22_x2 i0=$abc$109383$new_n20420_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20419_ q=$abc$109383$new_n20421_
+.subckt and21nor_x1 i0=$abc$109383$new_n20420_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20419_ nq=$abc$109383$new_n20421_
 .subckt nand2_x0 i0=$abc$109383$new_n20421_ i1=$abc$109383$new_n20418_ nq=$abc$109383$new_n20422_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20422_ i1=soc.rom.spimemio.din_data[4] q=$abc$109383$new_n20423_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20423_ i1=soc.rom.spimemio.xfer.obuffer[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100404
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20422_ i1=soc.rom.spimemio.din_data[4] q=$abc$109383$new_n20423_
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20423_ i1=soc.rom.spimemio.xfer.obuffer[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100404
 .subckt nand3_x0 i0=$abc$109383$new_n19707_ i1=soc.rom.spimemio.xfer.obuffer[3] i2=$abc$109383$new_n15206_ nq=$abc$109383$new_n20425_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.obuffer[1] i1=$abc$109383$new_n15189_ nq=$abc$109383$new_n20426_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.obuffer[4] nq=$abc$109383$new_n20427_
-.subckt ao22_x2 i0=$abc$109383$new_n20427_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20426_ q=$abc$109383$new_n20428_
+.subckt and21nor_x1 i0=$abc$109383$new_n20427_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20426_ nq=$abc$109383$new_n20428_
 .subckt nand2_x0 i0=$abc$109383$new_n20428_ i1=$abc$109383$new_n20425_ nq=$abc$109383$new_n20429_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20429_ i1=soc.rom.spimemio.din_data[5] q=$abc$109383$new_n20430_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20430_ i1=soc.rom.spimemio.xfer.obuffer[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100406
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20429_ i1=soc.rom.spimemio.din_data[5] q=$abc$109383$new_n20430_
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20430_ i1=soc.rom.spimemio.xfer.obuffer[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100406
 .subckt nand3_x0 i0=$abc$109383$new_n19707_ i1=soc.rom.spimemio.xfer.obuffer[4] i2=$abc$109383$new_n15206_ nq=$abc$109383$new_n20432_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.obuffer[2] i1=$abc$109383$new_n15189_ nq=$abc$109383$new_n20433_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.obuffer[5] nq=$abc$109383$new_n20434_
-.subckt ao22_x2 i0=$abc$109383$new_n20434_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20433_ q=$abc$109383$new_n20435_
+.subckt and21nor_x1 i0=$abc$109383$new_n20434_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20433_ nq=$abc$109383$new_n20435_
 .subckt nand2_x0 i0=$abc$109383$new_n20435_ i1=$abc$109383$new_n20432_ nq=$abc$109383$new_n20436_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20436_ i1=soc.rom.spimemio.din_data[6] q=$abc$109383$new_n20437_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20437_ i1=soc.rom.spimemio.xfer.obuffer[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100408
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20436_ i1=soc.rom.spimemio.din_data[6] q=$abc$109383$new_n20437_
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20437_ i1=soc.rom.spimemio.xfer.obuffer[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100408
 .subckt nand3_x0 i0=$abc$109383$new_n14979_ i1=soc.rom.spimemio.xfer.obuffer[5] i2=$abc$109383$new_n15206_ nq=$abc$109383$new_n20439_
 .subckt nand2_x0 i0=soc.rom.spimemio.xfer.obuffer[3] i1=soc.rom.spimemio.xfer.xfer_qspi nq=$abc$109383$new_n20440_
-.subckt ao22_x2 i0=$abc$109383$new_n15219_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20440_ q=$abc$109383$new_n20441_
+.subckt and21nor_x1 i0=$abc$109383$new_n15219_ i1=$abc$109383$new_n14979_ i2=$abc$109383$new_n20440_ nq=$abc$109383$new_n20441_
 .subckt nand2_x0 i0=$abc$109383$new_n20441_ i1=$abc$109383$new_n20439_ nq=$abc$109383$new_n20442_
-.subckt mx2_x2 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20442_ i1=soc.rom.spimemio.din_data[7] q=$abc$109383$new_n20443_
-.subckt mx2_x2 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20443_ i1=soc.rom.spimemio.xfer.obuffer[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100410
+.subckt mux2_x1 cmd=$abc$109383$new_n15101_ i0=$abc$109383$new_n20442_ i1=soc.rom.spimemio.din_data[7] q=$abc$109383$new_n20443_
+.subckt mux2_x1 cmd=$abc$109383$new_n20406_ i0=$abc$109383$new_n20443_ i1=soc.rom.spimemio.xfer.obuffer[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100410
 .subckt nor3_x0 i0=soc.cpu.minerva.payload__rd$123[4] i1=soc.cpu.minerva.payload__rd$123[3] i2=soc.cpu.minerva.payload__rd$123[2] nq=$abc$109383$new_n20445_
 .subckt nand4_x0 i0=$abc$109383$new_n20304_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20445_ nq=$abc$109383$new_n20446_
-.subckt a2_x2 i0=$abc$109383$new_n20446_ i1=soc.cpu.minerva.gprf.mem._mem[2][0] q=$abc$109383$new_n20447_
-.subckt a4_x2 i0=$abc$109383$new_n20309_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20445_ q=$abc$109383$new_n20448_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20448_ q=$abc$109383$new_n20449_
-.subckt o2_x2 i0=$abc$109383$new_n20449_ i1=$abc$109383$new_n20447_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100412
+.subckt and2_x1 i0=$abc$109383$new_n20446_ i1=soc.cpu.minerva.gprf.mem._mem[2][0] q=$abc$109383$new_n20447_
+.subckt and4_x1 i0=$abc$109383$new_n20309_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20445_ q=$abc$109383$new_n20448_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20448_ nq=$abc$109383$new_n20449_
+.subckt or2_x1 i0=$abc$109383$new_n20449_ i1=$abc$109383$new_n20447_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100412
 .subckt buf_x4 i=$abc$109383$new_n20446_ q=$abc$109383$new_n20451_
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100414
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100416
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100418
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100420
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100422
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100424
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100426
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[2][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100428
-.subckt mx2_x2 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[2][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100430
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100414
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100416
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100418
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100420
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100422
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100424
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100426
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[2][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100428
+.subckt mux2_x1 cmd=$abc$109383$new_n20451_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[2][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100430
 .subckt buf_x4 i=$abc$109383$new_n20446_ q=$abc$109383$new_n20461_
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[2][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100432
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[2][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100434
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[2][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100436
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[2][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100438
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[2][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100440
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[2][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100442
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[2][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100444
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[2][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100446
-.subckt mx2_x2 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[2][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100448
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[2][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100432
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[2][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100434
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[2][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100436
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[2][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100438
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[2][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100440
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[2][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100442
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[2][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100444
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[2][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100446
+.subckt mux2_x1 cmd=$abc$109383$new_n20461_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[2][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100448
 .subckt buf_x4 i=$abc$109383$new_n20446_ q=$abc$109383$new_n20471_
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[2][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100450
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[2][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100452
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[2][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100454
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[2][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100456
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[2][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100458
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[2][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100460
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[2][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100462
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[2][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100464
-.subckt mx2_x2 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[2][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100466
-.subckt mx2_x2 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[2][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100468
-.subckt mx2_x2 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[2][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100470
-.subckt mx2_x2 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[2][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100472
-.subckt mx2_x2 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[2][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100474
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[2][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100450
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[2][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100452
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[2][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100454
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[2][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100456
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[2][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100458
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[2][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100460
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[2][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100462
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[2][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100464
+.subckt mux2_x1 cmd=$abc$109383$new_n20471_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[2][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100466
+.subckt mux2_x1 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[2][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100468
+.subckt mux2_x1 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[2][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100470
+.subckt mux2_x1 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[2][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100472
+.subckt mux2_x1 cmd=$abc$109383$new_n20446_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[2][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100474
 .subckt nand4_x0 i0=$abc$109383$new_n20361_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n20227_ nq=$abc$109383$new_n20485_
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[108][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100476
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[108][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100478
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[108][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100480
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[108][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100482
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[108][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100484
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[108][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100486
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[108][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100488
-.subckt mx2_x2 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[108][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100490
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[108][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100476
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[108][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100478
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[108][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100480
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[108][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100482
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[108][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100484
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[108][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100486
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[108][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100488
+.subckt mux2_x1 cmd=$abc$109383$new_n20485_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[108][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100490
 .subckt inv_x0 i=soc.cpu.minerva.payload__rd$123[2] nq=$abc$109383$new_n20494_
 .subckt inv_x0 i=soc.cpu.minerva.payload__rd$123[3] nq=$abc$109383$new_n20495_
-.subckt a3_x2 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n20495_ i2=$abc$109383$new_n20494_ q=$abc$109383$new_n20496_
+.subckt and3_x1 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n20495_ i2=$abc$109383$new_n20494_ q=$abc$109383$new_n20496_
 .subckt buf_x4 i=$abc$109383$new_n20496_ q=$abc$109383$new_n20497_
-.subckt a2_x2 i0=$abc$109383$new_n19822_ i1=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n20498_
+.subckt and2_x1 i0=$abc$109383$new_n19822_ i1=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n20498_
 .subckt buf_x4 i=$abc$109383$new_n20498_ q=$abc$109383$new_n20499_
 .subckt nand4_x0 i0=$abc$109383$new_n20499_ i1=$abc$109383$new_n20497_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ nq=$abc$109383$new_n20500_
-.subckt a2_x2 i0=$abc$109383$new_n20500_ i1=soc.cpu.minerva.gprf.mem._mem[19][0] q=$abc$109383$new_n20501_
+.subckt and2_x1 i0=$abc$109383$new_n20500_ i1=soc.cpu.minerva.gprf.mem._mem[19][0] q=$abc$109383$new_n20501_
 .subckt buf_x4 i=$abc$109383$new_n20499_ q=$abc$109383$new_n20502_
-.subckt a4_x2 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20497_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n20503_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20503_ q=$abc$109383$new_n20504_
-.subckt o2_x2 i0=$abc$109383$new_n20504_ i1=$abc$109383$new_n20501_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100650
+.subckt and4_x1 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20497_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n20503_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20503_ nq=$abc$109383$new_n20504_
+.subckt or2_x1 i0=$abc$109383$new_n20504_ i1=$abc$109383$new_n20501_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100650
 .subckt buf_x4 i=$abc$109383$new_n20500_ q=$abc$109383$new_n20506_
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[19][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100652
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[19][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100654
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[19][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100656
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[19][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100658
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[19][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100660
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[19][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100662
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[19][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100664
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[19][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100666
-.subckt mx2_x2 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[19][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100668
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[19][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100652
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[19][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100654
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[19][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100656
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[19][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100658
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[19][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100660
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[19][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100662
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[19][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100664
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[19][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100666
+.subckt mux2_x1 cmd=$abc$109383$new_n20506_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[19][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100668
 .subckt buf_x4 i=$abc$109383$new_n20500_ q=$abc$109383$new_n20516_
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[19][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100670
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[19][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100672
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[19][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100674
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[19][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100676
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[19][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100678
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[19][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100680
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[19][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100682
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[19][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100684
-.subckt mx2_x2 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[19][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100686
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[19][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100670
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[19][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100672
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[19][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100674
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[19][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100676
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[19][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100678
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[19][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100680
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[19][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100682
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[19][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100684
+.subckt mux2_x1 cmd=$abc$109383$new_n20516_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[19][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100686
 .subckt buf_x4 i=$abc$109383$new_n20500_ q=$abc$109383$new_n20526_
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[19][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100688
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[19][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100690
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[19][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100692
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[19][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100694
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[19][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100696
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[19][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100698
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[19][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100700
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[19][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100702
-.subckt mx2_x2 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[19][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100704
-.subckt mx2_x2 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[19][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100706
-.subckt mx2_x2 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[19][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100708
-.subckt mx2_x2 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[19][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100710
-.subckt mx2_x2 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[19][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100712
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[16] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20540_
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[19][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100688
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[19][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100690
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[19][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100692
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[19][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100694
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[19][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100696
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[19][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100698
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[19][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100700
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[19][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100702
+.subckt mux2_x1 cmd=$abc$109383$new_n20526_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[19][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100704
+.subckt mux2_x1 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[19][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100706
+.subckt mux2_x1 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[19][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100708
+.subckt mux2_x1 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[19][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100710
+.subckt mux2_x1 cmd=$abc$109383$new_n20500_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[19][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100712
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[16] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20540_
 .subckt buf_x4 i=$abc$109383$new_n20540_ q=$abc$109383$new_n20541_
 .subckt buf_x4 i=$abc$109383$new_n20541_ q=$abc$109383$new_n20542_
 .subckt buf_x4 i=$abc$109383$new_n19802_ q=$abc$109383$new_n20543_
-.subckt a3_x2 i0=soc.cpu.minerva.loadstore.dbus__sel[2] i1=soc.cpu.minerva.loadstore.dbus__we i2=$abc$109383$new_n14740_ q=$abc$109383$new_n20544_
-.subckt a2_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n19737_ q=$abc$109383$new_n20545_
+.subckt and3_x1 i0=soc.cpu.minerva.loadstore.dbus__sel[2] i1=soc.cpu.minerva.loadstore.dbus__we i2=$abc$109383$new_n14740_ q=$abc$109383$new_n20544_
+.subckt and2_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n19737_ q=$abc$109383$new_n20545_
 .subckt buf_x4 i=$abc$109383$new_n20545_ q=$abc$109383$new_n20546_
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n20547_
 .subckt buf_x4 i=$abc$109383$new_n20547_ q=$abc$109383$new_n20548_
-.subckt a4_x2 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n20241_ i2=$abc$109383$new_n15136_ i3=$abc$109383$new_n14850_ q=$abc$109383$new_n20549_
+.subckt and4_x1 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n20241_ i2=$abc$109383$new_n15136_ i3=$abc$109383$new_n14850_ q=$abc$109383$new_n20549_
 .subckt buf_x4 i=$abc$109383$new_n20549_ q=$abc$109383$new_n20550_
 .subckt buf_x4 i=$abc$109383$new_n20550_ q=$abc$109383$new_n20551_
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n20548_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n20552_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[19][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100720
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[17] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20554_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[19][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100720
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[17] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20554_
 .subckt buf_x4 i=$abc$109383$new_n20554_ q=$abc$109383$new_n20555_
 .subckt buf_x4 i=$abc$109383$new_n20555_ q=$abc$109383$new_n20556_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[19][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100722
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[18] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20558_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[19][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100722
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[18] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20558_
 .subckt buf_x4 i=$abc$109383$new_n20558_ q=$abc$109383$new_n20559_
 .subckt buf_x4 i=$abc$109383$new_n20559_ q=$abc$109383$new_n20560_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[19][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100724
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[19] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20562_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[19][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100724
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[19] i1=$abc$109383$new_n19755_ q=$abc$109383$new_n20562_
 .subckt buf_x4 i=$abc$109383$new_n20562_ q=$abc$109383$new_n20563_
 .subckt buf_x4 i=$abc$109383$new_n20563_ q=$abc$109383$new_n20564_
 .subckt buf_x4 i=$abc$109383$new_n20564_ q=$abc$109383$new_n20565_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[19][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100726
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[20] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20567_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[19][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100726
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[20] i1=$abc$109383$new_n19731_ q=$abc$109383$new_n20567_
 .subckt buf_x4 i=$abc$109383$new_n20567_ q=$abc$109383$new_n20568_
 .subckt buf_x4 i=$abc$109383$new_n20568_ q=$abc$109383$new_n20569_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[19][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100728
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[21] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20571_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[19][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100728
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[21] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20571_
 .subckt buf_x4 i=$abc$109383$new_n20571_ q=$abc$109383$new_n20572_
 .subckt buf_x4 i=$abc$109383$new_n20572_ q=$abc$109383$new_n20573_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[19][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100730
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[22] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20575_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[19][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100730
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[22] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20575_
 .subckt buf_x4 i=$abc$109383$new_n20575_ q=$abc$109383$new_n20576_
 .subckt buf_x4 i=$abc$109383$new_n20576_ q=$abc$109383$new_n20577_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[19][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100732
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__dat_w[23] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20579_
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[19][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100732
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__dat_w[23] i1=$abc$109383$new_n19732_ q=$abc$109383$new_n20579_
 .subckt buf_x4 i=$abc$109383$new_n20579_ q=$abc$109383$new_n20580_
 .subckt buf_x4 i=$abc$109383$new_n20580_ q=$abc$109383$new_n20581_
-.subckt mx2_x2 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[19][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100734
+.subckt mux2_x1 cmd=$abc$109383$new_n20552_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[19][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100734
 .subckt nand2_x0 i0=$abc$109383$new_n20548_ i1=$abc$109383$new_n19784_ nq=$abc$109383$new_n20583_
 .subckt buf_x4 i=$abc$109383$new_n20583_ q=$abc$109383$new_n20584_
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[1][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100744
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[1][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100746
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[1][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100748
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[1][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100750
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[1][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100752
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[1][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100754
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[1][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100756
-.subckt mx2_x2 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[1][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100758
-.subckt a4_x2 i0=$abc$109383$new_n19827_ i1=soc.cpu.minerva.m.valid$1 i2=soc.cpu.minerva.payload__rd_we$125 i3=$abc$109383$new_n19816_ q=$abc$109383$new_n20593_
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[1][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100744
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[1][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100746
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[1][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100748
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[1][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100750
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[1][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100752
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[1][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100754
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[1][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100756
+.subckt mux2_x1 cmd=$abc$109383$new_n20584_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[1][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100758
+.subckt and4_x1 i0=$abc$109383$new_n19827_ i1=soc.cpu.minerva.m.valid$1 i2=soc.cpu.minerva.payload__rd_we$125 i3=$abc$109383$new_n19816_ q=$abc$109383$new_n20593_
 .subckt buf_x4 i=$abc$109383$new_n20593_ q=$abc$109383$new_n20594_
-.subckt a2_x2 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n20495_ q=$abc$109383$new_n20595_
+.subckt and2_x1 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n20495_ q=$abc$109383$new_n20595_
 .subckt buf_x4 i=$abc$109383$new_n20595_ q=$abc$109383$new_n20596_
 .subckt nand3_x0 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n20309_ nq=$abc$109383$new_n20597_
-.subckt a2_x2 i0=$abc$109383$new_n20597_ i1=soc.cpu.minerva.gprf.mem._mem[22][0] q=$abc$109383$new_n20598_
-.subckt a3_x2 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n20309_ q=$abc$109383$new_n20599_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20599_ q=$abc$109383$new_n20600_
-.subckt o2_x2 i0=$abc$109383$new_n20600_ i1=$abc$109383$new_n20598_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100904
+.subckt and2_x1 i0=$abc$109383$new_n20597_ i1=soc.cpu.minerva.gprf.mem._mem[22][0] q=$abc$109383$new_n20598_
+.subckt and3_x1 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n20309_ q=$abc$109383$new_n20599_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20599_ nq=$abc$109383$new_n20600_
+.subckt or2_x1 i0=$abc$109383$new_n20600_ i1=$abc$109383$new_n20598_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100904
 .subckt buf_x4 i=$abc$109383$new_n20597_ q=$abc$109383$new_n20602_
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[22][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100906
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[22][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100908
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[22][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100910
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[22][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100912
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[22][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100914
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[22][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100916
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[22][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100918
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[22][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100920
-.subckt mx2_x2 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[22][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100922
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[22][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100906
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[22][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100908
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[22][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100910
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[22][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100912
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[22][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100914
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[22][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100916
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[22][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100918
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[22][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100920
+.subckt mux2_x1 cmd=$abc$109383$new_n20602_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[22][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100922
 .subckt buf_x4 i=$abc$109383$new_n20597_ q=$abc$109383$new_n20612_
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[22][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100924
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[22][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100926
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[22][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100928
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[22][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100930
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[22][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100932
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[22][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100934
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[22][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100936
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[22][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100938
-.subckt mx2_x2 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[22][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100940
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[22][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100924
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[22][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100926
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[22][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100928
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[22][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100930
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[22][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100932
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[22][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100934
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[22][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100936
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[22][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100938
+.subckt mux2_x1 cmd=$abc$109383$new_n20612_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[22][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100940
 .subckt buf_x4 i=$abc$109383$new_n20597_ q=$abc$109383$new_n20622_
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[22][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100942
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[22][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100944
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[22][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100946
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[22][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100948
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[22][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100950
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[22][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100952
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[22][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100954
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[22][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100956
-.subckt mx2_x2 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[22][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100958
-.subckt mx2_x2 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[22][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100960
-.subckt mx2_x2 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[22][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100962
-.subckt mx2_x2 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[22][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100964
-.subckt mx2_x2 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[22][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100966
-.subckt mx2_x2 cmd=$abc$109383$new_n19707_ i0=io_in[5] i1=io_in[4] q=$abc$109383$new_n20636_
-.subckt a2_x2 i0=$abc$109383$new_n15003_ i1=$abc$109383$new_n14986_ q=$abc$109383$new_n20637_
-.subckt a2_x2 i0=$abc$109383$new_n20637_ i1=$abc$109383$new_n15218_ q=$abc$109383$new_n20638_
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[22][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100942
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[22][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100944
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[22][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100946
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[22][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100948
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[22][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100950
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[22][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100952
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[22][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100954
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[22][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100956
+.subckt mux2_x1 cmd=$abc$109383$new_n20622_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[22][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100958
+.subckt mux2_x1 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[22][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100960
+.subckt mux2_x1 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[22][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100962
+.subckt mux2_x1 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[22][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100964
+.subckt mux2_x1 cmd=$abc$109383$new_n20597_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[22][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100966
+.subckt mux2_x1 cmd=$abc$109383$new_n19707_ i0=io_in[5] i1=io_in[4] q=$abc$109383$new_n20636_
+.subckt and2_x1 i0=$abc$109383$new_n15003_ i1=$abc$109383$new_n14986_ q=$abc$109383$new_n20637_
+.subckt and2_x1 i0=$abc$109383$new_n20637_ i1=$abc$109383$new_n15218_ q=$abc$109383$new_n20638_
 .subckt inv_x0 i=$abc$109383$new_n15205_ nq=$abc$109383$new_n20639_
-.subckt ao22_x2 i0=$abc$109383$new_n20639_ i1=soc.rom.spimemio.xfer.xfer_qspi i2=soc.rom.spimemio.xfer.xfer_ddr q=$abc$109383$new_n20640_
-.subckt ao22_x2 i0=$abc$109383$new_n20640_ i1=$abc$109383$new_n14993_ i2=soc.rom.spimemio.xfer.resetn q=$abc$109383$new_n20641_
+.subckt and21nor_x1 i0=$abc$109383$new_n20639_ i1=soc.rom.spimemio.xfer.xfer_qspi i2=soc.rom.spimemio.xfer.xfer_ddr nq=$abc$109383$new_n20640_
+.subckt and21nor_x1 i0=$abc$109383$new_n20640_ i1=$abc$109383$new_n14993_ i2=soc.rom.spimemio.xfer.resetn nq=$abc$109383$new_n20641_
 .subckt nand2_x0 i0=$abc$109383$new_n20641_ i1=$abc$109383$new_n20638_ nq=$abc$109383$new_n20642_
 .subckt buf_x4 i=$abc$109383$new_n20642_ q=$abc$109383$new_n20643_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20636_ i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101062
-.subckt mx2_x2 cmd=$abc$109383$new_n19707_ i0=soc.rom.spimemio.dout_data[0] i1=io_in[5] q=$abc$109383$new_n20645_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20645_ i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101064
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20636_ i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101062
+.subckt mux2_x1 cmd=$abc$109383$new_n19707_ i0=soc.rom.spimemio.dout_data[0] i1=io_in[5] q=$abc$109383$new_n20645_
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20645_ i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101064
 .subckt buf_x4 i=$abc$109383$new_n14979_ q=$abc$109383$new_n20647_
 .subckt nand3_x0 i0=$abc$109383$new_n20647_ i1=soc.rom.spimemio.dout_data[0] i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n20648_
 .subckt nand2_x0 i0=io_in[6] i1=$abc$109383$new_n15190_ nq=$abc$109383$new_n20649_
 .subckt inv_x0 i=soc.rom.spimemio.dout_data[1] nq=$abc$109383$new_n20650_
-.subckt ao22_x2 i0=$abc$109383$new_n20650_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20649_ q=$abc$109383$new_n20651_
+.subckt and21nor_x1 i0=$abc$109383$new_n20650_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20649_ nq=$abc$109383$new_n20651_
 .subckt nand2_x0 i0=$abc$109383$new_n20651_ i1=$abc$109383$new_n20648_ nq=$abc$109383$new_n20652_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20652_ i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101066
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20652_ i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101066
 .subckt nand3_x0 i0=$abc$109383$new_n20647_ i1=soc.rom.spimemio.dout_data[1] i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n20654_
 .subckt nand2_x0 i0=io_in[7] i1=$abc$109383$new_n15189_ nq=$abc$109383$new_n20655_
 .subckt inv_x0 i=soc.rom.spimemio.dout_data[2] nq=$abc$109383$new_n20656_
-.subckt ao22_x2 i0=$abc$109383$new_n20656_ i1=$abc$109383$new_n19707_ i2=$abc$109383$new_n20655_ q=$abc$109383$new_n20657_
-.subckt a2_x2 i0=$abc$109383$new_n20657_ i1=$abc$109383$new_n20654_ q=$abc$109383$new_n20658_
+.subckt and21nor_x1 i0=$abc$109383$new_n20656_ i1=$abc$109383$new_n19707_ i2=$abc$109383$new_n20655_ nq=$abc$109383$new_n20657_
+.subckt and2_x1 i0=$abc$109383$new_n20657_ i1=$abc$109383$new_n20654_ q=$abc$109383$new_n20658_
 .subckt nand3_x0 i0=$abc$109383$new_n20658_ i1=$abc$109383$new_n20641_ i2=$abc$109383$new_n20638_ nq=$abc$109383$new_n20659_
-.subckt oa22_x2 i0=$abc$109383$new_n20641_ i1=$abc$109383$new_n20638_ i2=soc.rom.spimemio.dout_data[3] q=$abc$109383$new_n20660_
-.subckt a2_x2 i0=$abc$109383$new_n20660_ i1=$abc$109383$new_n20659_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101068
+.subckt or21nand_x1 i0=$abc$109383$new_n20641_ i1=$abc$109383$new_n20638_ i2=soc.rom.spimemio.dout_data[3] nq=$abc$109383$new_n20660_
+.subckt and2_x1 i0=$abc$109383$new_n20660_ i1=$abc$109383$new_n20659_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101068
 .subckt nand3_x0 i0=$abc$109383$new_n20647_ i1=soc.rom.spimemio.dout_data[2] i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n20662_
 .subckt nand2_x0 i0=soc.rom.spimemio.dout_data[0] i1=$abc$109383$new_n15190_ nq=$abc$109383$new_n20663_
 .subckt inv_x0 i=soc.rom.spimemio.dout_data[3] nq=$abc$109383$new_n20664_
-.subckt ao22_x2 i0=$abc$109383$new_n20664_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20663_ q=$abc$109383$new_n20665_
+.subckt and21nor_x1 i0=$abc$109383$new_n20664_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20663_ nq=$abc$109383$new_n20665_
 .subckt nand2_x0 i0=$abc$109383$new_n20665_ i1=$abc$109383$new_n20662_ nq=$abc$109383$new_n20666_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20666_ i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101070
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20666_ i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101070
 .subckt nand3_x0 i0=$abc$109383$new_n20647_ i1=soc.rom.spimemio.dout_data[3] i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n20668_
 .subckt nand2_x0 i0=soc.rom.spimemio.dout_data[1] i1=$abc$109383$new_n15190_ nq=$abc$109383$new_n20669_
 .subckt inv_x0 i=soc.rom.spimemio.dout_data[4] nq=$abc$109383$new_n20670_
-.subckt ao22_x2 i0=$abc$109383$new_n20670_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20669_ q=$abc$109383$new_n20671_
+.subckt and21nor_x1 i0=$abc$109383$new_n20670_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20669_ nq=$abc$109383$new_n20671_
 .subckt nand2_x0 i0=$abc$109383$new_n20671_ i1=$abc$109383$new_n20668_ nq=$abc$109383$new_n20672_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20672_ i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101072
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20672_ i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101072
 .subckt nand3_x0 i0=$abc$109383$new_n20647_ i1=soc.rom.spimemio.dout_data[4] i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n20674_
 .subckt nand2_x0 i0=soc.rom.spimemio.dout_data[2] i1=$abc$109383$new_n15190_ nq=$abc$109383$new_n20675_
 .subckt inv_x0 i=soc.rom.spimemio.dout_data[5] nq=$abc$109383$new_n20676_
-.subckt ao22_x2 i0=$abc$109383$new_n20676_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20675_ q=$abc$109383$new_n20677_
+.subckt and21nor_x1 i0=$abc$109383$new_n20676_ i1=$abc$109383$new_n20647_ i2=$abc$109383$new_n20675_ nq=$abc$109383$new_n20677_
 .subckt nand2_x0 i0=$abc$109383$new_n20677_ i1=$abc$109383$new_n20674_ nq=$abc$109383$new_n20678_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20678_ i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101074
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20678_ i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101074
 .subckt nand3_x0 i0=$abc$109383$new_n20647_ i1=soc.rom.spimemio.dout_data[5] i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n20680_
 .subckt nand2_x0 i0=soc.rom.spimemio.dout_data[3] i1=$abc$109383$new_n15189_ nq=$abc$109383$new_n20681_
 .subckt inv_x0 i=soc.rom.spimemio.dout_data[6] nq=$abc$109383$new_n20682_
-.subckt ao22_x2 i0=$abc$109383$new_n20682_ i1=$abc$109383$new_n19707_ i2=$abc$109383$new_n20681_ q=$abc$109383$new_n20683_
+.subckt and21nor_x1 i0=$abc$109383$new_n20682_ i1=$abc$109383$new_n19707_ i2=$abc$109383$new_n20681_ nq=$abc$109383$new_n20683_
 .subckt nand2_x0 i0=$abc$109383$new_n20683_ i1=$abc$109383$new_n20680_ nq=$abc$109383$new_n20684_
-.subckt mx2_x2 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20684_ i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101076
+.subckt mux2_x1 cmd=$abc$109383$new_n20643_ i0=$abc$109383$new_n20684_ i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101076
 .subckt inv_x0 i=soc.rom.spimemio.dout_tag[2] nq=$abc$109383$new_n20686_
-.subckt a2_x2 i0=$abc$109383$new_n20686_ i1=soc.rom.spimemio.dout_tag[1] q=$abc$109383$new_n20687_
-.subckt a2_x2 i0=$abc$109383$new_n14736_ i1=soc.rom.spimemio.dout_tag[0] q=$abc$109383$new_n20688_
-.subckt a3_x2 i0=$abc$109383$new_n20688_ i1=$abc$109383$new_n20687_ i2=$abc$109383$new_n15033_ q=$abc$109383$new_n20689_
+.subckt and2_x1 i0=$abc$109383$new_n20686_ i1=soc.rom.spimemio.dout_tag[1] q=$abc$109383$new_n20687_
+.subckt and2_x1 i0=$abc$109383$new_n14736_ i1=soc.rom.spimemio.dout_tag[0] q=$abc$109383$new_n20688_
+.subckt and3_x1 i0=$abc$109383$new_n20688_ i1=$abc$109383$new_n20687_ i2=$abc$109383$new_n15033_ q=$abc$109383$new_n20689_
 .subckt buf_x4 i=$abc$109383$new_n20689_ q=$abc$109383$new_n20690_
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[16] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101150
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[17] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101152
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[18] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101154
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[19] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101156
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[20] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101158
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[21] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101160
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[22] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101162
-.subckt mx2_x2 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[23] i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101164
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[16] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101150
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[17] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101152
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[18] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101154
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[19] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101156
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[20] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101158
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[21] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101160
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[22] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101162
+.subckt mux2_x1 cmd=$abc$109383$new_n20690_ i0=soc.rom.spimemio.buffer[23] i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101164
 .subckt inv_x1 i=soc.rom.spimemio.rd_inc nq=$abc$109383$new_n20699_
 .subckt buf_x4 i=$abc$109383$new_n20699_ q=$abc$109383$new_n20700_
 .subckt inv_x0 i=soc.rom.spimemio.dout_tag[1] nq=$abc$109383$new_n20701_
 .subckt inv_x0 i=soc.rom.spimemio.dout_tag[0] nq=$abc$109383$new_n20702_
-.subckt a3_x2 i0=soc.rom.spimemio.dout_tag[2] i1=$abc$109383$new_n20702_ i2=$abc$109383$new_n20701_ q=$abc$109383$new_n20703_
+.subckt and3_x1 i0=soc.rom.spimemio.dout_tag[2] i1=$abc$109383$new_n20702_ i2=$abc$109383$new_n20701_ q=$abc$109383$new_n20703_
 .subckt nand3_x0 i0=$abc$109383$new_n20703_ i1=$abc$109383$new_n15033_ i2=$abc$109383$new_n14736_ nq=$abc$109383$new_n20704_
 .subckt buf_x4 i=$abc$109383$new_n20704_ q=$abc$109383$new_n20705_
 .subckt nand2_x0 i0=$abc$109383$new_n20705_ i1=$abc$109383$new_n20700_ nq=$abc$109383$new_n20706_
-.subckt oa22_x2 i0=$abc$109383$new_n15095_ i1=$abc$109383$new_n15064_ i2=$abc$109383$new_n15035_ q=$abc$109383$new_n20707_
+.subckt or21nand_x1 i0=$abc$109383$new_n15095_ i1=$abc$109383$new_n15064_ i2=$abc$109383$new_n15035_ nq=$abc$109383$new_n20707_
 .subckt nand2_x0 i0=$abc$109383$new_n20707_ i1=$abc$109383$new_n15041_ nq=$abc$109383$new_n20708_
-.subckt a2_x2 i0=$abc$109383$new_n20708_ i1=$abc$109383$new_n20706_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101176
+.subckt and2_x1 i0=$abc$109383$new_n20708_ i1=$abc$109383$new_n20706_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101176
 .subckt buf_x4 i=$abc$109383$new_n14897_ q=$abc$109383$new_n20710_
 .subckt buf_x4 i=$abc$109383$new_n14906_ q=$abc$109383$new_n20711_
 .subckt buf_x4 i=$abc$109383$new_n14915_ q=$abc$109383$new_n20712_
-.subckt a2_x2 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ q=$abc$109383$new_n20713_
+.subckt and2_x1 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ q=$abc$109383$new_n20713_
 .subckt nand4_x0 i0=$abc$109383$new_n19648_ i1=$abc$109383$new_n20713_ i2=$abc$109383$new_n20710_ i3=$abc$109383$new_n14736_ nq=$abc$109383$new_n20714_
-.subckt a2_x2 i0=$abc$109383$new_n20714_ i1=soc.rom.spimemio.rd_wait q=$abc$109383$new_n20715_
-.subckt a2_x2 i0=$abc$109383$new_n15161_ i1=soc.rom.spimemio.rd_inc q=$abc$109383$new_n20716_
-.subckt mx2_x2 cmd=$abc$109383$new_n20705_ i0=$abc$109383$new_n20716_ i1=$abc$109383$new_n20715_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101180
+.subckt and2_x1 i0=$abc$109383$new_n20714_ i1=soc.rom.spimemio.rd_wait q=$abc$109383$new_n20715_
+.subckt and2_x1 i0=$abc$109383$new_n15161_ i1=soc.rom.spimemio.rd_inc q=$abc$109383$new_n20716_
+.subckt mux2_x1 cmd=$abc$109383$new_n20705_ i0=$abc$109383$new_n20716_ i1=$abc$109383$new_n20715_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101180
 .subckt inv_x0 i=soc.rom.spimemio.xfer.obuffer[0] nq=$abc$109383$new_n20718_
-.subckt oa22_x2 i0=$abc$109383$new_n20404_ i1=$abc$109383$new_n20401_ i2=$abc$109383$new_n20718_ q=$abc$109383$new_n20719_
+.subckt or21nand_x1 i0=$abc$109383$new_n20404_ i1=$abc$109383$new_n20401_ i2=$abc$109383$new_n20718_ nq=$abc$109383$new_n20719_
 .subckt nand2_x0 i0=$abc$109383$new_n15103_ i1=soc.rom.spimemio.din_data[0] nq=$abc$109383$new_n20720_
 .subckt nand2_x0 i0=$abc$109383$new_n20720_ i1=$abc$109383$new_n20719_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101196
-.subckt mx2_x2 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[0] i1=soc.decoder.data_bus__dat_r[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101200
-.subckt mx2_x2 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[1] i1=soc.decoder.data_bus__dat_r[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101202
-.subckt mx2_x2 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[2] i1=soc.decoder.data_bus__dat_r[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101204
-.subckt mx2_x2 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[3] i1=soc.decoder.data_bus__dat_r[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101206
-.subckt mx2_x2 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[4] i1=soc.decoder.data_bus__dat_r[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101208
+.subckt mux2_x1 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[0] i1=soc.decoder.data_bus__dat_r[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101200
+.subckt mux2_x1 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[1] i1=soc.decoder.data_bus__dat_r[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101202
+.subckt mux2_x1 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[2] i1=soc.decoder.data_bus__dat_r[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101204
+.subckt mux2_x1 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[3] i1=soc.decoder.data_bus__dat_r[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101206
+.subckt mux2_x1 cmd=$abc$109383$new_n20705_ i0=soc.rom.spimemio.buffer[4] i1=soc.decoder.data_bus__dat_r[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101208
 .subckt buf_x4 i=$abc$109383$new_n20704_ q=$abc$109383$new_n20727_
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[5] i1=soc.decoder.data_bus__dat_r[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101210
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[6] i1=soc.decoder.data_bus__dat_r[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101212
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[7] i1=soc.decoder.data_bus__dat_r[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101214
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[8] i1=soc.decoder.data_bus__dat_r[8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101216
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[9] i1=soc.decoder.data_bus__dat_r[9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101218
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[10] i1=soc.decoder.data_bus__dat_r[10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101220
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[11] i1=soc.decoder.data_bus__dat_r[11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101222
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[12] i1=soc.decoder.data_bus__dat_r[12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101224
-.subckt mx2_x2 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[13] i1=soc.decoder.data_bus__dat_r[13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101226
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[5] i1=soc.decoder.data_bus__dat_r[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101210
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[6] i1=soc.decoder.data_bus__dat_r[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101212
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[7] i1=soc.decoder.data_bus__dat_r[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101214
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[8] i1=soc.decoder.data_bus__dat_r[8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101216
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[9] i1=soc.decoder.data_bus__dat_r[9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101218
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[10] i1=soc.decoder.data_bus__dat_r[10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101220
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[11] i1=soc.decoder.data_bus__dat_r[11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101222
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[12] i1=soc.decoder.data_bus__dat_r[12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101224
+.subckt mux2_x1 cmd=$abc$109383$new_n20727_ i0=soc.rom.spimemio.buffer[13] i1=soc.decoder.data_bus__dat_r[13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101226
 .subckt buf_x4 i=$abc$109383$new_n20704_ q=$abc$109383$new_n20737_
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[14] i1=soc.decoder.data_bus__dat_r[14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101228
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[15] i1=soc.decoder.data_bus__dat_r[15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101230
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[16] i1=soc.decoder.data_bus__dat_r[16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101232
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[17] i1=soc.decoder.data_bus__dat_r[17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101234
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[18] i1=soc.decoder.data_bus__dat_r[18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101236
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[19] i1=soc.decoder.data_bus__dat_r[19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101238
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[20] i1=soc.decoder.data_bus__dat_r[20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101240
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[21] i1=soc.decoder.data_bus__dat_r[21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101242
-.subckt mx2_x2 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[22] i1=soc.decoder.data_bus__dat_r[22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101244
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[14] i1=soc.decoder.data_bus__dat_r[14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101228
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[15] i1=soc.decoder.data_bus__dat_r[15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101230
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[16] i1=soc.decoder.data_bus__dat_r[16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101232
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[17] i1=soc.decoder.data_bus__dat_r[17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101234
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[18] i1=soc.decoder.data_bus__dat_r[18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101236
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[19] i1=soc.decoder.data_bus__dat_r[19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101238
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[20] i1=soc.decoder.data_bus__dat_r[20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101240
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[21] i1=soc.decoder.data_bus__dat_r[21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101242
+.subckt mux2_x1 cmd=$abc$109383$new_n20737_ i0=soc.rom.spimemio.buffer[22] i1=soc.decoder.data_bus__dat_r[22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101244
 .subckt buf_x4 i=$abc$109383$new_n20704_ q=$abc$109383$new_n20747_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=soc.rom.spimemio.buffer[23] i1=soc.decoder.data_bus__dat_r[23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101246
-.subckt a3_x2 i0=$abc$109383$new_n20703_ i1=$abc$109383$new_n15033_ i2=$abc$109383$new_n14736_ q=$abc$109383$new_n20749_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=soc.rom.spimemio.buffer[23] i1=soc.decoder.data_bus__dat_r[23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101246
+.subckt and3_x1 i0=$abc$109383$new_n20703_ i1=$abc$109383$new_n15033_ i2=$abc$109383$new_n14736_ q=$abc$109383$new_n20749_
 .subckt buf_x4 i=$abc$109383$new_n20749_ q=$abc$109383$new_n20750_
-.subckt mx2_x2 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[24] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101248
-.subckt mx2_x2 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[25] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101250
-.subckt mx2_x2 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[26] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101252
-.subckt mx2_x2 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[27] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101254
-.subckt mx2_x2 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[28] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101256
-.subckt mx2_x2 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[29] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101258
-.subckt mx2_x2 cmd=$abc$109383$new_n20749_ i0=soc.decoder.data_bus__dat_r[30] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101260
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=soc.rom.spimemio.dout_data[7] i1=soc.decoder.data_bus__dat_r[31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101262
+.subckt mux2_x1 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[24] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101248
+.subckt mux2_x1 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[25] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101250
+.subckt mux2_x1 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[26] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101252
+.subckt mux2_x1 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[27] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101254
+.subckt mux2_x1 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[28] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101256
+.subckt mux2_x1 cmd=$abc$109383$new_n20750_ i0=soc.decoder.data_bus__dat_r[29] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101258
+.subckt mux2_x1 cmd=$abc$109383$new_n20749_ i0=soc.decoder.data_bus__dat_r[30] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101260
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=soc.rom.spimemio.dout_data[7] i1=soc.decoder.data_bus__dat_r[31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101262
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__rd$123[1] i1=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n20759_
 .subckt buf_x4 i=$abc$109383$new_n20759_ q=$abc$109383$new_n20760_
 .subckt nand3_x0 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n20760_ nq=$abc$109383$new_n20761_
-.subckt a2_x2 i0=$abc$109383$new_n20761_ i1=soc.cpu.minerva.gprf.mem._mem[20][0] q=$abc$109383$new_n20762_
-.subckt a3_x2 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n20760_ q=$abc$109383$new_n20763_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20763_ q=$abc$109383$new_n20764_
-.subckt o2_x2 i0=$abc$109383$new_n20764_ i1=$abc$109383$new_n20762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101266
+.subckt and2_x1 i0=$abc$109383$new_n20761_ i1=soc.cpu.minerva.gprf.mem._mem[20][0] q=$abc$109383$new_n20762_
+.subckt and3_x1 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n20760_ q=$abc$109383$new_n20763_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n20763_ nq=$abc$109383$new_n20764_
+.subckt or2_x1 i0=$abc$109383$new_n20764_ i1=$abc$109383$new_n20762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101266
 .subckt buf_x4 i=$abc$109383$new_n20761_ q=$abc$109383$new_n20766_
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[20][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101268
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[20][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101270
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[20][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101272
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[20][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101274
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[20][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101276
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[20][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101278
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[20][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101280
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[20][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101282
-.subckt mx2_x2 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[20][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101284
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[20][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101268
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[20][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101270
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[20][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101272
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[20][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101274
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[20][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101276
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[20][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101278
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[20][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101280
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[20][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101282
+.subckt mux2_x1 cmd=$abc$109383$new_n20766_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[20][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101284
 .subckt buf_x4 i=$abc$109383$new_n20761_ q=$abc$109383$new_n20776_
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[20][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101286
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[20][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101288
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[20][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101290
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[20][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101292
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[20][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101294
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[20][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101296
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[20][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101298
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[20][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101300
-.subckt mx2_x2 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[20][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101302
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[20][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101286
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[20][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101288
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[20][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101290
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[20][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101292
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[20][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101294
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[20][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101296
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[20][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101298
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[20][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101300
+.subckt mux2_x1 cmd=$abc$109383$new_n20776_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[20][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101302
 .subckt buf_x4 i=$abc$109383$new_n20761_ q=$abc$109383$new_n20786_
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[20][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101304
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[20][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101306
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[20][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101308
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[20][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101310
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[20][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101312
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[20][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101314
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[20][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101316
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[20][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101318
-.subckt mx2_x2 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[20][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101320
-.subckt mx2_x2 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[20][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101322
-.subckt mx2_x2 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[20][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101324
-.subckt mx2_x2 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[20][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101326
-.subckt mx2_x2 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[20][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101328
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[20][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101304
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[20][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101306
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[20][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101308
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[20][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101310
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[20][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101312
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[20][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101314
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[20][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101316
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[20][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101318
+.subckt mux2_x1 cmd=$abc$109383$new_n20786_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[20][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101320
+.subckt mux2_x1 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[20][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101322
+.subckt mux2_x1 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[20][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101324
+.subckt mux2_x1 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[20][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101326
+.subckt mux2_x1 cmd=$abc$109383$new_n20761_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[20][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101328
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n20800_
 .subckt buf_x4 i=$abc$109383$new_n20800_ q=$abc$109383$new_n20801_
 .subckt buf_x4 i=$abc$109383$new_n20269_ q=$abc$109383$new_n20802_
 .subckt buf_x4 i=$abc$109383$new_n14929_ q=$abc$109383$new_n20803_
-.subckt a4_x2 i0=$abc$109383$new_n19801_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n20803_ i3=$abc$109383$new_n20232_ q=$abc$109383$new_n20804_
+.subckt and4_x1 i0=$abc$109383$new_n19801_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n20803_ i3=$abc$109383$new_n20232_ q=$abc$109383$new_n20804_
 .subckt buf_x4 i=$abc$109383$new_n20804_ q=$abc$109383$new_n20805_
 .subckt nand3_x0 i0=$abc$109383$new_n20805_ i1=$abc$109383$new_n20802_ i2=$abc$109383$new_n20801_ nq=$abc$109383$new_n20806_
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[14][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101330
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[14][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101332
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[14][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101334
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[14][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101336
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[14][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101338
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[14][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101340
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[14][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101342
-.subckt mx2_x2 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[14][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101344
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[14][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101330
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[14][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101332
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[14][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101334
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[14][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101336
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[14][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101338
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[14][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101340
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[14][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101342
+.subckt mux2_x1 cmd=$abc$109383$new_n20806_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[14][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101344
 .subckt buf_x4 i=$abc$109383$new_n19805_ q=$abc$109383$new_n20815_
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n20816_
 .subckt nand4_x0 i0=$abc$109383$new_n20816_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n20815_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20817_
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[104][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101346
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[104][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101348
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[104][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101350
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[104][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101352
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[104][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101354
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[104][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101356
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[104][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101358
-.subckt mx2_x2 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[104][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101360
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[104][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101346
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[104][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101348
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[104][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101350
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[104][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101352
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[104][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101354
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[104][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101356
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[104][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101358
+.subckt mux2_x1 cmd=$abc$109383$new_n20817_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[104][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101360
 .subckt buf_x4 i=$abc$109383$new_n20266_ q=$abc$109383$new_n20826_
 .subckt buf_x4 i=$abc$109383$new_n20826_ q=$abc$109383$new_n20827_
 .subckt buf_x4 i=$abc$109383$new_n20269_ q=$abc$109383$new_n20828_
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n20829_
 .subckt nand4_x0 i0=$abc$109383$new_n20829_ i1=$abc$109383$new_n20828_ i2=$abc$109383$new_n20827_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n20830_
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[46][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101362
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[46][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101364
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[46][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101366
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[46][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101368
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[46][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101370
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[46][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101372
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[46][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101374
-.subckt mx2_x2 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[46][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101376
-.subckt a3_x2 i0=$abc$109383$new_n19783_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n19643_ q=$abc$109383$new_n20839_
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[46][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101362
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[46][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101364
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[46][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101366
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[46][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101368
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[46][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101370
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[46][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101372
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[46][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101374
+.subckt mux2_x1 cmd=$abc$109383$new_n20830_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[46][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101376
+.subckt and3_x1 i0=$abc$109383$new_n19783_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n19643_ q=$abc$109383$new_n20839_
 .subckt buf_x4 i=$abc$109383$new_n20839_ q=$abc$109383$new_n20840_
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n20841_
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20842_
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[105][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101378
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[105][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101380
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[105][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101382
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[105][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101384
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[105][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101386
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[105][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101388
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[105][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101390
-.subckt mx2_x2 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[105][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101392
-.subckt a3_x2 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n19800_ i2=$abc$109383$new_n19694_ q=$abc$109383$new_n20851_
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[105][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101378
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[105][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101380
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[105][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101382
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[105][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101384
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[105][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101386
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[105][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101388
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[105][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101390
+.subckt mux2_x1 cmd=$abc$109383$new_n20842_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[105][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101392
+.subckt and3_x1 i0=$abc$109383$new_n19743_ i1=$abc$109383$new_n19800_ i2=$abc$109383$new_n19694_ q=$abc$109383$new_n20851_
 .subckt buf_x4 i=$abc$109383$new_n20851_ q=$abc$109383$new_n20852_
 .subckt buf_x4 i=$abc$109383$new_n20852_ q=$abc$109383$new_n20853_
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n20828_ i2=$abc$109383$new_n20853_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20854_
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[118][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101394
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[118][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101396
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[118][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101398
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[118][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101400
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[118][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101402
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[118][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101404
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[118][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101406
-.subckt mx2_x2 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[118][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101408
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[118][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101394
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[118][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101396
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[118][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101398
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[118][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101400
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[118][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101402
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[118][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101404
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[118][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101406
+.subckt mux2_x1 cmd=$abc$109383$new_n20854_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[118][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101408
 .subckt nand4_x0 i0=$abc$109383$new_n20829_ i1=$abc$109383$new_n20828_ i2=$abc$109383$new_n20853_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20863_
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[118][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101410
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[118][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101412
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[118][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101414
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[118][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101416
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[118][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101418
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[118][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101420
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[118][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101422
-.subckt mx2_x2 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[118][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101424
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[118][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101410
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[118][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101412
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[118][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101414
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[118][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101416
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[118][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101418
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[118][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101420
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[118][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101422
+.subckt mux2_x1 cmd=$abc$109383$new_n20863_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[118][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101424
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n20872_
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n20853_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20873_
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[118][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101426
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[118][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101428
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[118][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101430
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[118][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101432
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[118][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101434
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[118][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101436
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[118][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101438
-.subckt mx2_x2 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[118][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101440
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[118][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101426
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[118][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101428
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[118][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101430
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[118][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101432
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[118][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101434
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[118][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101436
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[118][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101438
+.subckt mux2_x1 cmd=$abc$109383$new_n20873_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[118][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101440
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[1] nq=$abc$109383$new_n20882_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[1] nq=$abc$109383$new_n20883_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n20883_ i1=$abc$109383$new_n20882_ q=$abc$109383$new_n20884_
-.subckt a2_x2 i0=$abc$109383$new_n20884_ i1=$abc$109383$new_n14850_ q=$abc$109383$new_n20885_
-.subckt a2_x2 i0=$abc$109383$new_n20885_ i1=$abc$109383$new_n19750_ q=$abc$109383$new_n20886_
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n20883_ i1=$abc$109383$new_n20882_ q=$abc$109383$new_n20884_
+.subckt and2_x1 i0=$abc$109383$new_n20884_ i1=$abc$109383$new_n14850_ q=$abc$109383$new_n20885_
+.subckt and2_x1 i0=$abc$109383$new_n20885_ i1=$abc$109383$new_n19750_ q=$abc$109383$new_n20886_
 .subckt buf_x4 i=$abc$109383$new_n20886_ q=$abc$109383$new_n20887_
 .subckt nand4_x0 i0=$abc$109383$new_n20887_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n20853_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20888_
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[117][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101442
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[117][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101444
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[117][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101446
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[117][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101448
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[117][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101450
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[117][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101452
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[117][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101454
-.subckt mx2_x2 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[117][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101456
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[117][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101442
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[117][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101444
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[117][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101446
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[117][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101448
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[117][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101450
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[117][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101452
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[117][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101454
+.subckt mux2_x1 cmd=$abc$109383$new_n20888_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[117][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101456
 .subckt buf_x4 i=$abc$109383$new_n20851_ q=$abc$109383$new_n20897_
 .subckt nand4_x0 i0=$abc$109383$new_n20887_ i1=$abc$109383$new_n20897_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n20227_ nq=$abc$109383$new_n20898_
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[117][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101458
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[117][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101460
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[117][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101462
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[117][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101464
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[117][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101466
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[117][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101468
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[117][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101470
-.subckt mx2_x2 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[117][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101472
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[117][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101458
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[117][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101460
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[117][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101462
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[117][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101464
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[117][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101466
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[117][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101468
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[117][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101470
+.subckt mux2_x1 cmd=$abc$109383$new_n20898_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[117][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101472
 .subckt buf_x4 i=$abc$109383$new_n20851_ q=$abc$109383$new_n20907_
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n20908_
 .subckt nand4_x0 i0=$abc$109383$new_n20887_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20909_
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[117][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101474
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[117][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101476
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[117][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101478
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[117][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101480
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[117][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101482
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[117][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101484
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[117][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101486
-.subckt mx2_x2 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[117][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101488
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[117][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101474
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[117][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101476
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[117][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101478
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[117][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101480
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[117][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101482
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[117][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101484
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[117][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101486
+.subckt mux2_x1 cmd=$abc$109383$new_n20909_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[117][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101488
 .subckt buf_x4 i=$abc$109383$new_n20360_ q=$abc$109383$new_n20918_
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20919_
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[116][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101490
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[116][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101492
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[116][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101494
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[116][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101496
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[116][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101498
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[116][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101500
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[116][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101502
-.subckt mx2_x2 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[116][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101504
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[116][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101490
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[116][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101492
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[116][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101494
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[116][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101496
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[116][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101498
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[116][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101500
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[116][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101502
+.subckt mux2_x1 cmd=$abc$109383$new_n20919_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[116][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101504
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n20897_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n20227_ nq=$abc$109383$new_n20928_
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[116][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101506
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[116][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101508
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[116][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101510
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[116][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101512
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[116][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101514
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[116][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101516
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[116][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101518
-.subckt mx2_x2 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[116][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101520
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[116][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101506
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[116][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101508
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[116][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101510
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[116][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101512
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[116][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101514
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[116][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101516
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[116][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101518
+.subckt mux2_x1 cmd=$abc$109383$new_n20928_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[116][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101520
 .subckt buf_x4 i=$abc$109383$new_n20360_ q=$abc$109383$new_n20937_
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20353_ nq=$abc$109383$new_n20938_
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[116][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101522
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[116][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101524
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[116][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101526
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[116][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101528
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[116][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101530
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[116][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101532
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[116][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101534
-.subckt mx2_x2 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[116][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101536
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[116][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101522
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[116][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101524
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[116][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101526
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[116][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101528
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[116][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101530
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[116][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101532
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[116][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101534
+.subckt mux2_x1 cmd=$abc$109383$new_n20938_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[116][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101536
 .subckt buf_x4 i=$abc$109383$new_n20352_ q=$abc$109383$new_n20947_
 .subckt buf_x4 i=$abc$109383$new_n20550_ q=$abc$109383$new_n20948_
 .subckt nand4_x0 i0=$abc$109383$new_n20948_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n20949_
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[115][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101538
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[115][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101540
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[115][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101542
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[115][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101544
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[115][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101546
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[115][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101548
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[115][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101550
-.subckt mx2_x2 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[115][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101552
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[115][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101538
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[115][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101540
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[115][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101542
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[115][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101544
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[115][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101546
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[115][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101548
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[115][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101550
+.subckt mux2_x1 cmd=$abc$109383$new_n20949_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[115][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101552
 .subckt nand4_x0 i0=$abc$109383$new_n20948_ i1=$abc$109383$new_n20358_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n20958_
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[115][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101554
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[115][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101556
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[115][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101558
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[115][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101560
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[115][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101562
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[115][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101564
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[115][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101566
-.subckt mx2_x2 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[115][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101568
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[115][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101554
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[115][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101556
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[115][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101558
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[115][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101560
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[115][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101562
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[115][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101564
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[115][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101566
+.subckt mux2_x1 cmd=$abc$109383$new_n20958_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[115][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101568
 .subckt buf_x4 i=$abc$109383$new_n20550_ q=$abc$109383$new_n20967_
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n20968_
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[115][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101570
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[115][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101572
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[115][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101574
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[115][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101576
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[115][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101578
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[115][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101580
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[115][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101582
-.subckt mx2_x2 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[115][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101584
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[115][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101570
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[115][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101572
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[115][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101574
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[115][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101576
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[115][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101578
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[115][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101580
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[115][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101582
+.subckt mux2_x1 cmd=$abc$109383$new_n20968_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[115][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101584
 .subckt buf_x4 i=$abc$109383$new_n20851_ q=$abc$109383$new_n20977_
 .subckt nand4_x0 i0=$abc$109383$new_n20243_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n20227_ nq=$abc$109383$new_n20978_
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[114][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101586
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[114][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101588
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[114][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101590
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[114][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101592
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[114][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101594
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[114][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101596
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[114][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101598
-.subckt mx2_x2 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[114][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101600
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[114][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101586
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[114][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101588
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[114][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101590
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[114][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101592
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[114][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101594
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[114][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101596
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[114][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101598
+.subckt mux2_x1 cmd=$abc$109383$new_n20978_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[114][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101600
 .subckt buf_x4 i=$abc$109383$new_n20243_ q=$abc$109383$new_n20987_
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n20988_
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[114][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101602
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[114][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101604
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[114][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101606
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[114][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101608
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[114][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101610
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[114][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101612
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[114][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101614
-.subckt mx2_x2 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[114][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101616
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[114][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101602
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[114][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101604
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[114][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101606
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[114][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101608
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[114][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101610
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[114][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101612
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[114][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101614
+.subckt mux2_x1 cmd=$abc$109383$new_n20988_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[114][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101616
 .subckt nand4_x0 i0=$abc$109383$new_n20829_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n20997_
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[114][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101618
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[114][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101620
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[114][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101622
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[114][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101624
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[114][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101626
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[114][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101628
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[114][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101630
-.subckt mx2_x2 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[114][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101632
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[114][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101618
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[114][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101620
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[114][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101622
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[114][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101624
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[114][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101626
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[114][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101628
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[114][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101630
+.subckt mux2_x1 cmd=$abc$109383$new_n20997_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[114][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101632
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n21006_
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[113][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101634
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[113][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101636
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[113][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101638
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[113][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101640
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[113][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101642
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[113][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101644
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[113][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101646
-.subckt mx2_x2 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[113][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101648
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20542_ i1=soc.ram.ram[113][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101634
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20556_ i1=soc.ram.ram[113][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101636
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20560_ i1=soc.ram.ram[113][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101638
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[113][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101640
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20569_ i1=soc.ram.ram[113][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101642
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20573_ i1=soc.ram.ram[113][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101644
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20577_ i1=soc.ram.ram[113][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101646
+.subckt mux2_x1 cmd=$abc$109383$new_n21006_ i0=$abc$109383$new_n20581_ i1=soc.ram.ram[113][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101648
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n21015_
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n21016_
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[113][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101650
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[113][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101652
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[113][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101654
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[113][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101656
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[113][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101658
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[113][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101660
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[113][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101662
-.subckt mx2_x2 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[113][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101664
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[113][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101650
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[113][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101652
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[113][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101654
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[113][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101656
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[113][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101658
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[113][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101660
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[113][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101662
+.subckt mux2_x1 cmd=$abc$109383$new_n21016_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[113][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101664
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n21025_
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[113][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101666
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[113][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101668
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[113][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101670
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[113][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101672
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[113][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101674
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[113][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101676
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[113][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101678
-.subckt mx2_x2 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[113][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101680
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[113][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101666
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[113][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101668
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[113][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101670
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[113][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101672
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[113][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101674
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[113][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101676
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[113][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101678
+.subckt mux2_x1 cmd=$abc$109383$new_n21025_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[113][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101680
 .subckt buf_x4 i=$abc$109383$new_n19805_ q=$abc$109383$new_n21034_
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n21035_
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[112][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101682
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[112][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101684
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[112][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101686
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[112][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101688
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[112][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101690
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[112][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101692
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[112][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101694
-.subckt mx2_x2 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[112][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101696
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[112][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101682
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[112][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101684
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[112][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101686
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[112][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101688
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[112][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101690
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[112][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101692
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[112][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101694
+.subckt mux2_x1 cmd=$abc$109383$new_n21035_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[112][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101696
 .subckt buf_x4 i=$abc$109383$new_n20541_ q=$abc$109383$new_n21044_
 .subckt buf_x4 i=$abc$109383$new_n21044_ q=$abc$109383$new_n21045_
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n20907_ i3=$abc$109383$new_n20947_ nq=$abc$109383$new_n21046_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[112][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101698
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[112][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101698
 .subckt buf_x4 i=$abc$109383$new_n20555_ q=$abc$109383$new_n21048_
 .subckt buf_x4 i=$abc$109383$new_n21048_ q=$abc$109383$new_n21049_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[112][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101700
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[112][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101700
 .subckt buf_x4 i=$abc$109383$new_n20559_ q=$abc$109383$new_n21051_
 .subckt buf_x4 i=$abc$109383$new_n21051_ q=$abc$109383$new_n21052_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[112][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101702
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[112][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101704
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[112][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101702
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n20565_ i1=soc.ram.ram[112][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101704
 .subckt buf_x4 i=$abc$109383$new_n20568_ q=$abc$109383$new_n21055_
 .subckt buf_x4 i=$abc$109383$new_n21055_ q=$abc$109383$new_n21056_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[112][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101706
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[112][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101706
 .subckt buf_x4 i=$abc$109383$new_n20572_ q=$abc$109383$new_n21058_
 .subckt buf_x4 i=$abc$109383$new_n21058_ q=$abc$109383$new_n21059_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[112][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101708
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[112][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101708
 .subckt buf_x4 i=$abc$109383$new_n20576_ q=$abc$109383$new_n21061_
 .subckt buf_x4 i=$abc$109383$new_n21061_ q=$abc$109383$new_n21062_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[112][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101710
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[112][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101710
 .subckt buf_x4 i=$abc$109383$new_n20580_ q=$abc$109383$new_n21064_
 .subckt buf_x4 i=$abc$109383$new_n21064_ q=$abc$109383$new_n21065_
-.subckt mx2_x2 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[112][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101712
+.subckt mux2_x1 cmd=$abc$109383$new_n21046_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[112][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101712
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n21067_
 .subckt nand4_x0 i0=$abc$109383$new_n21034_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21068_
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[112][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101714
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[112][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101716
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[112][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101718
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[112][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101720
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[112][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101722
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[112][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101724
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[112][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101726
-.subckt mx2_x2 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[112][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101728
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[112][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101714
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[112][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101716
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19735_ i1=soc.ram.ram[112][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101718
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19758_ i1=soc.ram.ram[112][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101720
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19763_ i1=soc.ram.ram[112][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101722
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[112][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101724
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19771_ i1=soc.ram.ram[112][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101726
+.subckt mux2_x1 cmd=$abc$109383$new_n21068_ i0=$abc$109383$new_n19775_ i1=soc.ram.ram[112][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101728
 .subckt buf_x4 i=$abc$109383$new_n20352_ q=$abc$109383$new_n21077_
 .subckt buf_x4 i=$abc$109383$new_n19751_ q=$abc$109383$new_n21078_
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21079_
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[111][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101730
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[111][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101732
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[111][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101734
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[111][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101736
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[111][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101738
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[111][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101740
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[111][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101742
-.subckt mx2_x2 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[111][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101744
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[111][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101730
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[111][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101732
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[111][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101734
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[111][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101736
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[111][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101738
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[111][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101740
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[111][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101742
+.subckt mux2_x1 cmd=$abc$109383$new_n21079_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[111][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101744
 .subckt nand4_x0 i0=$abc$109383$new_n20841_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21088_
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[111][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101746
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[111][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101748
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[111][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101750
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[111][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101746
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[111][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101748
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[111][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101750
 .subckt buf_x4 i=$abc$109383$new_n20563_ q=$abc$109383$new_n21092_
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n21093_
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[111][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101752
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[111][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101754
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[111][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101756
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[111][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101758
-.subckt mx2_x2 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[111][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101760
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[111][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101752
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[111][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101754
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[111][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101756
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[111][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101758
+.subckt mux2_x1 cmd=$abc$109383$new_n21088_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[111][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101760
 .subckt buf_x4 i=$abc$109383$new_n19751_ q=$abc$109383$new_n21099_
 .subckt nand4_x0 i0=$abc$109383$new_n20257_ i1=$abc$109383$new_n21099_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21100_
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[111][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101762
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[111][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101764
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n19779_ i1=soc.ram.ram[111][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101762
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n19790_ i1=soc.ram.ram[111][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101764
 .subckt buf_x4 i=$abc$109383$new_n19734_ q=$abc$109383$new_n21103_
 .subckt buf_x4 i=$abc$109383$new_n21103_ q=$abc$109383$new_n21104_
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[111][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101766
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[111][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101766
 .subckt buf_x4 i=$abc$109383$new_n19757_ q=$abc$109383$new_n21106_
 .subckt buf_x4 i=$abc$109383$new_n21106_ q=$abc$109383$new_n21107_
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[111][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101768
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[111][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101768
 .subckt buf_x4 i=$abc$109383$new_n19762_ q=$abc$109383$new_n21109_
 .subckt buf_x4 i=$abc$109383$new_n21109_ q=$abc$109383$new_n21110_
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[111][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101770
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[111][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101772
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[111][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101770
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n19767_ i1=soc.ram.ram[111][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101772
 .subckt buf_x4 i=$abc$109383$new_n19770_ q=$abc$109383$new_n21113_
 .subckt buf_x4 i=$abc$109383$new_n21113_ q=$abc$109383$new_n21114_
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[111][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101774
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[111][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101774
 .subckt buf_x4 i=$abc$109383$new_n19774_ q=$abc$109383$new_n21116_
 .subckt buf_x4 i=$abc$109383$new_n21116_ q=$abc$109383$new_n21117_
-.subckt mx2_x2 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[111][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101776
+.subckt mux2_x1 cmd=$abc$109383$new_n21100_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[111][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101776
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n21119_
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n20828_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21120_
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[110][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101778
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[110][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101780
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[110][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101782
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[110][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101784
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[110][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101786
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[110][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101788
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[110][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101790
-.subckt mx2_x2 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[110][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101792
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[110][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101778
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[110][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101780
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[110][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101782
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[110][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101784
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[110][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101786
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[110][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101788
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[110][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101790
+.subckt mux2_x1 cmd=$abc$109383$new_n21120_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[110][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101792
 .subckt buf_x4 i=$abc$109383$new_n20269_ q=$abc$109383$new_n21129_
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21130_
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[110][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101794
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[110][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101796
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[110][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101798
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[110][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101800
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[110][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101802
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[110][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101804
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[110][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101806
-.subckt mx2_x2 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[110][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101808
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[110][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101794
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[110][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101796
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[110][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101798
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[110][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101800
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20380_ i1=soc.ram.ram[110][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101802
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20384_ i1=soc.ram.ram[110][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101804
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20388_ i1=soc.ram.ram[110][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101806
+.subckt mux2_x1 cmd=$abc$109383$new_n21130_ i0=$abc$109383$new_n20392_ i1=soc.ram.ram[110][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101808
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21139_
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[110][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101810
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[110][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101812
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[110][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101814
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[110][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101816
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[110][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101818
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[110][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101820
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[110][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101822
-.subckt mx2_x2 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[110][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101824
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[110][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101810
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[110][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101812
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[110][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101814
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[110][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101816
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[110][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101818
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[110][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101820
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[110][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101822
+.subckt mux2_x1 cmd=$abc$109383$new_n21139_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[110][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101824
 .subckt buf_x4 i=$abc$109383$new_n20243_ q=$abc$109383$new_n21148_
 .subckt nand3_x0 i0=$abc$109383$new_n20805_ i1=$abc$109383$new_n20548_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n21149_
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[10][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101826
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[10][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101828
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[10][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101830
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[10][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101832
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[10][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101834
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[10][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101836
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[10][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101838
-.subckt mx2_x2 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[10][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101840
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[10][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101826
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[10][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101828
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[10][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101830
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[10][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101832
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[10][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101834
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[10][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101836
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[10][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101838
+.subckt mux2_x1 cmd=$abc$109383$new_n21149_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[10][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101840
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n21158_
 .subckt buf_x4 i=$abc$109383$new_n21158_ q=$abc$109383$new_n21159_
 .subckt nand3_x0 i0=$abc$109383$new_n20805_ i1=$abc$109383$new_n21159_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n21160_
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[10][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101842
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[10][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101844
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[10][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101846
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[10][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101848
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20351_ i1=soc.ram.ram[10][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101842
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20367_ i1=soc.ram.ram[10][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101844
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20372_ i1=soc.ram.ram[10][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101846
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n20376_ i1=soc.ram.ram[10][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101848
 .subckt buf_x4 i=$abc$109383$new_n20379_ q=$abc$109383$new_n21165_
 .subckt buf_x4 i=$abc$109383$new_n21165_ q=$abc$109383$new_n21166_
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[10][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101850
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[10][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101850
 .subckt buf_x4 i=$abc$109383$new_n20383_ q=$abc$109383$new_n21168_
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n21169_
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[10][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101852
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[10][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101852
 .subckt buf_x4 i=$abc$109383$new_n20387_ q=$abc$109383$new_n21171_
 .subckt buf_x4 i=$abc$109383$new_n21171_ q=$abc$109383$new_n21172_
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[10][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101854
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[10][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101854
 .subckt buf_x4 i=$abc$109383$new_n20391_ q=$abc$109383$new_n21174_
 .subckt buf_x4 i=$abc$109383$new_n21174_ q=$abc$109383$new_n21175_
-.subckt mx2_x2 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[10][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101856
+.subckt mux2_x1 cmd=$abc$109383$new_n21160_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[10][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101856
 .subckt buf_x4 i=$abc$109383$new_n20800_ q=$abc$109383$new_n21177_
 .subckt nand3_x0 i0=$abc$109383$new_n20805_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n21178_
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[10][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101858
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[10][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101860
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[10][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101862
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[10][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101864
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[10][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101866
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[10][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101868
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[10][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101870
-.subckt mx2_x2 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[10][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101872
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20256_ i1=soc.ram.ram[10][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101858
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20275_ i1=soc.ram.ram[10][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101860
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20279_ i1=soc.ram.ram[10][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101862
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20283_ i1=soc.ram.ram[10][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101864
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20287_ i1=soc.ram.ram[10][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101866
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20291_ i1=soc.ram.ram[10][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101868
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20295_ i1=soc.ram.ram[10][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101870
+.subckt mux2_x1 cmd=$abc$109383$new_n21178_ i0=$abc$109383$new_n20299_ i1=soc.ram.ram[10][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101872
 .subckt nand4_x0 i0=$abc$109383$new_n20887_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21187_
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[109][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101874
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[109][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101876
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[109][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101878
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[109][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101880
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[109][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101882
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[109][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101884
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[109][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101886
-.subckt mx2_x2 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[109][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101888
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[109][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101874
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[109][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101876
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[109][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101878
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[109][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101880
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[109][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101882
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[109][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101884
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[109][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101886
+.subckt mux2_x1 cmd=$abc$109383$new_n21187_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[109][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101888
 .subckt buf_x4 i=$abc$109383$new_n20350_ q=$abc$109383$new_n21196_
 .subckt nand4_x0 i0=$abc$109383$new_n20887_ i1=$abc$109383$new_n20358_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21197_
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[109][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101890
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[109][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101890
 .subckt buf_x4 i=$abc$109383$new_n20366_ q=$abc$109383$new_n21199_
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[109][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101892
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[109][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101892
 .subckt buf_x4 i=$abc$109383$new_n20371_ q=$abc$109383$new_n21201_
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[109][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101894
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[109][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101894
 .subckt buf_x4 i=$abc$109383$new_n20375_ q=$abc$109383$new_n21203_
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[109][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101896
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[109][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101898
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[109][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101900
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[109][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101902
-.subckt mx2_x2 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[109][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101904
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[109][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101896
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[109][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101898
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[109][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101900
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[109][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101902
+.subckt mux2_x1 cmd=$abc$109383$new_n21197_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[109][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101904
 .subckt buf_x4 i=$abc$109383$new_n20255_ q=$abc$109383$new_n21209_
 .subckt nand4_x0 i0=$abc$109383$new_n20887_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21210_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[109][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101906
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[109][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101906
 .subckt buf_x4 i=$abc$109383$new_n20274_ q=$abc$109383$new_n21212_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[109][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101908
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[109][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101908
 .subckt buf_x4 i=$abc$109383$new_n20278_ q=$abc$109383$new_n21214_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[109][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101910
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[109][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101910
 .subckt buf_x4 i=$abc$109383$new_n20282_ q=$abc$109383$new_n21216_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[109][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101912
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[109][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101912
 .subckt buf_x4 i=$abc$109383$new_n20286_ q=$abc$109383$new_n21218_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[109][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101914
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[109][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101914
 .subckt buf_x4 i=$abc$109383$new_n20289_ q=$abc$109383$new_n21220_
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n21221_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[109][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101916
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[109][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101916
 .subckt buf_x4 i=$abc$109383$new_n20294_ q=$abc$109383$new_n21223_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[109][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101918
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[109][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101918
 .subckt buf_x4 i=$abc$109383$new_n20298_ q=$abc$109383$new_n21225_
-.subckt mx2_x2 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[109][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101920
+.subckt mux2_x1 cmd=$abc$109383$new_n21210_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[109][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101920
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n20358_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21227_
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[107][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101922
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[107][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101924
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[107][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101926
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[107][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101928
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[107][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101930
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[107][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101932
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[107][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101934
-.subckt mx2_x2 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[107][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101936
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[107][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101922
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[107][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101924
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[107][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101926
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[107][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101928
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[107][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101930
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[107][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101932
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[107][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101934
+.subckt mux2_x1 cmd=$abc$109383$new_n21227_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[107][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101936
 .subckt buf_x4 i=$abc$109383$new_n20550_ q=$abc$109383$new_n21236_
-.subckt a3_x2 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n14929_ i2=$abc$109383$new_n14839_ q=$abc$109383$new_n21237_
+.subckt and3_x1 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n14929_ i2=$abc$109383$new_n14839_ q=$abc$109383$new_n21237_
 .subckt buf_x4 i=$abc$109383$new_n21237_ q=$abc$109383$new_n21238_
 .subckt buf_x4 i=$abc$109383$new_n21238_ q=$abc$109383$new_n21239_
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n21077_ nq=$abc$109383$new_n21240_
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[123][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101954
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[123][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101956
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[123][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101958
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[123][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101960
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[123][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101962
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[123][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101964
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[123][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101966
-.subckt mx2_x2 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[123][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101968
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[123][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101954
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[123][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101956
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[123][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101958
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[123][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101960
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[123][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101962
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[123][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101964
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[123][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101966
+.subckt mux2_x1 cmd=$abc$109383$new_n21240_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[123][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101968
 .subckt buf_x4 i=$abc$109383$new_n20352_ q=$abc$109383$new_n21249_
 .subckt buf_x4 i=$abc$109383$new_n20243_ q=$abc$109383$new_n21250_
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n20358_ i2=$abc$109383$new_n21250_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21251_
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[122][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101970
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[122][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101972
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[122][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101974
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[122][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101976
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[122][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101978
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[122][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101980
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[122][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101982
-.subckt mx2_x2 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[122][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101984
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[122][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101970
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[122][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101972
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[122][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101974
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[122][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101976
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[122][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101978
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[122][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101980
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[122][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101982
+.subckt mux2_x1 cmd=$abc$109383$new_n21251_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[122][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101984
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21260_
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[106][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102344
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[106][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102346
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[106][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102348
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[106][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102350
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[106][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102352
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[106][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102354
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[106][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102356
-.subckt mx2_x2 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[106][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102358
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[106][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102344
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[106][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102346
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[106][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102348
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[106][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102350
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[106][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102352
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[106][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102354
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[106][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102356
+.subckt mux2_x1 cmd=$abc$109383$new_n21260_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[106][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102358
 .subckt nand4_x0 i0=$abc$109383$new_n20499_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20445_ nq=$abc$109383$new_n21269_
-.subckt a2_x2 i0=$abc$109383$new_n21269_ i1=soc.cpu.minerva.gprf.mem._mem[3][0] q=$abc$109383$new_n21270_
-.subckt a4_x2 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20445_ q=$abc$109383$new_n21271_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21271_ q=$abc$109383$new_n21272_
-.subckt o2_x2 i0=$abc$109383$new_n21272_ i1=$abc$109383$new_n21270_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102676
+.subckt and2_x1 i0=$abc$109383$new_n21269_ i1=soc.cpu.minerva.gprf.mem._mem[3][0] q=$abc$109383$new_n21270_
+.subckt and4_x1 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20445_ q=$abc$109383$new_n21271_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21271_ nq=$abc$109383$new_n21272_
+.subckt or2_x1 i0=$abc$109383$new_n21272_ i1=$abc$109383$new_n21270_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102676
 .subckt buf_x4 i=$abc$109383$new_n21269_ q=$abc$109383$new_n21274_
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[3][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102678
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[3][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102680
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[3][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102682
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[3][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102684
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[3][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102686
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[3][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102688
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[3][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102690
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[3][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102692
-.subckt mx2_x2 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[3][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102694
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[3][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102678
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[3][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102680
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[3][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102682
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[3][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102684
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[3][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102686
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[3][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102688
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[3][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102690
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[3][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102692
+.subckt mux2_x1 cmd=$abc$109383$new_n21274_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[3][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102694
 .subckt buf_x4 i=$abc$109383$new_n21269_ q=$abc$109383$new_n21284_
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[3][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102696
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[3][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102698
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[3][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102700
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[3][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102702
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[3][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102704
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[3][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102706
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[3][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102708
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[3][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102710
-.subckt mx2_x2 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[3][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102712
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[3][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102696
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[3][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102698
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[3][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102700
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[3][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102702
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[3][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102704
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[3][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102706
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[3][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102708
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[3][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102710
+.subckt mux2_x1 cmd=$abc$109383$new_n21284_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[3][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102712
 .subckt buf_x4 i=$abc$109383$new_n21269_ q=$abc$109383$new_n21294_
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[3][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102714
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[3][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102716
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[3][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102718
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[3][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102720
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[3][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102722
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[3][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102724
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[3][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102726
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[3][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102728
-.subckt mx2_x2 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[3][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102730
-.subckt mx2_x2 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[3][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102732
-.subckt mx2_x2 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[3][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102734
-.subckt mx2_x2 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[3][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102736
-.subckt mx2_x2 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[3][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102738
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[3][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102714
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[3][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102716
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[3][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102718
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[3][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102720
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[3][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102722
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[3][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102724
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[3][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102726
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[3][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102728
+.subckt mux2_x1 cmd=$abc$109383$new_n21294_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[3][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102730
+.subckt mux2_x1 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[3][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102732
+.subckt mux2_x1 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[3][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102734
+.subckt mux2_x1 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[3][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102736
+.subckt mux2_x1 cmd=$abc$109383$new_n21269_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[3][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102738
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n20354_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21308_
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[106][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103140
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[106][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103142
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[106][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103144
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[106][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103146
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[106][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103148
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[106][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103150
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[106][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103152
-.subckt mx2_x2 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[106][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103154
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[106][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103140
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[106][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103142
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[106][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103144
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[106][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103146
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[106][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103148
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[106][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103150
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[106][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103152
+.subckt mux2_x1 cmd=$abc$109383$new_n21308_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[106][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103154
 .subckt buf_x4 i=$abc$109383$new_n19778_ q=$abc$109383$new_n21317_
 .subckt buf_x4 i=$abc$109383$new_n21317_ q=$abc$109383$new_n21318_
 .subckt buf_x4 i=$abc$109383$new_n20233_ q=$abc$109383$new_n21319_
 .subckt buf_x4 i=$abc$109383$new_n20886_ q=$abc$109383$new_n21320_
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21321_
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[45][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103156
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[45][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103156
 .subckt buf_x4 i=$abc$109383$new_n19789_ q=$abc$109383$new_n21323_
 .subckt buf_x4 i=$abc$109383$new_n21323_ q=$abc$109383$new_n21324_
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[45][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103158
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[45][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103160
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[45][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103162
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[45][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103164
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[45][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103158
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[45][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103160
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[45][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103162
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[45][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103164
 .subckt buf_x4 i=$abc$109383$new_n19765_ q=$abc$109383$new_n21329_
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n21330_
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[45][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103166
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[45][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103168
-.subckt mx2_x2 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[45][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103170
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[45][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103166
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[45][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103168
+.subckt mux2_x1 cmd=$abc$109383$new_n21321_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[45][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103170
 .subckt buf_x4 i=$abc$109383$new_n20266_ q=$abc$109383$new_n21334_
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n19752_ nq=$abc$109383$new_n21335_
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[47][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103172
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[47][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103174
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[47][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103176
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[47][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103178
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[47][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103180
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[47][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103182
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[47][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103184
-.subckt mx2_x2 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[47][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103186
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[47][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103172
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[47][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103174
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[47][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103176
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[47][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103178
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[47][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103180
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[47][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103182
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[47][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103184
+.subckt mux2_x1 cmd=$abc$109383$new_n21335_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[47][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103186
 .subckt nor3_x0 i0=$abc$109383$new_n14855_ i1=$abc$109383$new_n14852_ i2=$abc$109383$new_n14850_ nq=$abc$109383$new_n21344_
 .subckt nand4_x0 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n21344_ i2=$abc$109383$new_n19781_ i3=$abc$109383$new_n19744_ nq=$abc$109383$new_n21345_
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[0][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103660
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[0][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103662
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[0][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103664
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[0][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103666
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[0][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103668
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[0][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103670
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[0][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103672
-.subckt mx2_x2 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[0][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103674
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[0][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103660
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[0][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103662
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[0][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103664
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[0][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103666
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[0][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103668
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[0][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103670
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[0][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103672
+.subckt mux2_x1 cmd=$abc$109383$new_n21345_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[0][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103674
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21354_
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[119][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103676
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[119][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103678
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[119][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103680
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[119][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103682
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[119][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103684
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[119][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103686
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[119][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103688
-.subckt mx2_x2 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[119][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103690
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[119][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103676
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[119][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103678
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[119][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103680
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[119][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103682
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[119][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103684
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[119][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103686
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[119][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103688
+.subckt mux2_x1 cmd=$abc$109383$new_n21354_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[119][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103690
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21363_
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[119][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103692
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[119][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103694
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[119][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103696
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[119][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103698
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[119][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103700
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[119][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103702
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[119][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103704
-.subckt mx2_x2 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[119][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103706
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[119][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103692
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[119][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103694
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[119][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103696
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[119][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103698
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[119][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103700
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[119][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103702
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[119][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103704
+.subckt mux2_x1 cmd=$abc$109383$new_n21363_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[119][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103706
 .subckt nand4_x0 i0=$abc$109383$new_n20852_ i1=$abc$109383$new_n21099_ i2=$abc$109383$new_n20229_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21372_
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[119][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103708
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[119][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103710
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[119][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103712
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[119][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103714
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[119][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103716
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[119][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103718
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[119][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103720
-.subckt mx2_x2 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[119][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103722
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[119][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103708
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[119][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103710
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[119][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103712
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[119][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103714
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[119][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103716
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[119][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103718
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[119][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103720
+.subckt mux2_x1 cmd=$abc$109383$new_n21372_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[119][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103722
 .subckt buf_x4 i=$abc$109383$new_n21158_ q=$abc$109383$new_n21381_
 .subckt buf_x4 i=$abc$109383$new_n20550_ q=$abc$109383$new_n21382_
 .subckt nand3_x0 i0=$abc$109383$new_n20805_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n21381_ nq=$abc$109383$new_n21383_
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[11][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103724
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[11][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103726
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[11][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103728
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[11][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103730
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[11][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103732
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[11][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103734
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[11][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103736
-.subckt mx2_x2 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[11][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103738
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[11][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103724
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[11][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103726
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[11][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103728
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[11][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103730
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[11][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103732
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[11][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103734
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[11][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103736
+.subckt mux2_x1 cmd=$abc$109383$new_n21383_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[11][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103738
 .subckt nand3_x0 i0=$abc$109383$new_n20805_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n20801_ nq=$abc$109383$new_n21392_
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[11][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103740
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[11][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103742
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[11][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103744
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[11][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103746
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[11][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103748
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[11][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103750
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[11][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103752
-.subckt mx2_x2 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[11][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103754
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[11][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103740
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[11][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103742
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[11][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103744
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[11][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103746
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[11][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103748
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[11][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103750
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[11][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103752
+.subckt mux2_x1 cmd=$abc$109383$new_n21392_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[11][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103754
 .subckt buf_x4 i=$abc$109383$new_n20547_ q=$abc$109383$new_n21401_
 .subckt buf_x4 i=$abc$109383$new_n20804_ q=$abc$109383$new_n21402_
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n21401_ nq=$abc$109383$new_n21403_
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[11][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103756
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[11][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103758
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[11][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103760
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[11][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103762
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[11][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103764
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[11][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103766
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[11][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103768
-.subckt mx2_x2 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[11][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103770
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[11][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103756
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[11][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103758
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[11][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103760
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[11][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103762
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[11][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103764
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[11][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103766
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[11][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103768
+.subckt mux2_x1 cmd=$abc$109383$new_n21403_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[11][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103770
 .subckt buf_x4 i=$abc$109383$new_n20228_ q=$abc$109383$new_n21412_
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21413_
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[120][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103772
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[120][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103774
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[120][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103776
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[120][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103778
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[120][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103780
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[120][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103782
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[120][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103784
-.subckt mx2_x2 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[120][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103786
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[120][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103772
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[120][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103774
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[120][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103776
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[120][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103778
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[120][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103780
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[120][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103782
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[120][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103784
+.subckt mux2_x1 cmd=$abc$109383$new_n21413_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[120][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103786
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n20815_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21422_
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[120][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103788
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[120][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103790
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[120][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103792
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[120][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103794
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[120][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103796
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[120][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103798
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[120][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103800
-.subckt mx2_x2 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[120][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103802
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[120][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103788
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[120][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103790
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[120][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103792
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[120][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103794
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[120][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103796
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[120][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103798
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[120][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103800
+.subckt mux2_x1 cmd=$abc$109383$new_n21422_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[120][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103802
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n21431_
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n20815_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21432_
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[120][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103804
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[120][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103806
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[120][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103808
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[120][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103810
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[120][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103812
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[120][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103814
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[120][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103816
-.subckt mx2_x2 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[120][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103818
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[120][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103804
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[120][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103806
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[120][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103808
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[120][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103810
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[120][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103812
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[120][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103814
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[120][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103816
+.subckt mux2_x1 cmd=$abc$109383$new_n21432_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[120][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103818
 .subckt buf_x4 i=$abc$109383$new_n20839_ q=$abc$109383$new_n21441_
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n21441_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21442_
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[121][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103820
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[121][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103822
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[121][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103824
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[121][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103826
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[121][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103828
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[121][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103830
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[121][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103832
-.subckt mx2_x2 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[121][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103834
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[121][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103820
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[121][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103822
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[121][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103824
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[121][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103826
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[121][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103828
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[121][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103830
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[121][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103832
+.subckt mux2_x1 cmd=$abc$109383$new_n21442_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[121][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103834
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21451_
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[121][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103836
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[121][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103838
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[121][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103840
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[121][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103842
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[121][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103844
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[121][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103846
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[121][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103848
-.subckt mx2_x2 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[121][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103850
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[121][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103836
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[121][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103838
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[121][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103840
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[121][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103842
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[121][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103844
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[121][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103846
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[121][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103848
+.subckt mux2_x1 cmd=$abc$109383$new_n21451_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[121][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103850
 .subckt nand4_x0 i0=$abc$109383$new_n21239_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21460_
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[121][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103852
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[121][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103854
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[121][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103856
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[121][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103858
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[121][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103860
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[121][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103862
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[121][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103864
-.subckt mx2_x2 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[121][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103866
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21045_ i1=soc.ram.ram[121][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103852
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21049_ i1=soc.ram.ram[121][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103854
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21052_ i1=soc.ram.ram[121][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103856
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[121][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103858
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21056_ i1=soc.ram.ram[121][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103860
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21059_ i1=soc.ram.ram[121][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103862
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21062_ i1=soc.ram.ram[121][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103864
+.subckt mux2_x1 cmd=$abc$109383$new_n21460_ i0=$abc$109383$new_n21065_ i1=soc.ram.ram[121][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103866
 .subckt buf_x4 i=$abc$109383$new_n21237_ q=$abc$109383$new_n21469_
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21470_
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[122][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103868
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[122][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103870
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[122][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103872
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[122][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103874
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[122][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103876
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[122][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103878
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[122][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103880
-.subckt mx2_x2 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[122][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103882
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[122][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103868
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[122][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103870
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[122][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103872
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[122][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103874
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[122][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103876
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[122][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103878
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[122][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103880
+.subckt mux2_x1 cmd=$abc$109383$new_n21470_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[122][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103882
 .subckt buf_x4 i=$abc$109383$new_n20360_ q=$abc$109383$new_n21479_
-.subckt a4_x2 i0=$abc$109383$new_n19801_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n20803_ i3=$abc$109383$new_n19694_ q=$abc$109383$new_n21480_
+.subckt and4_x1 i0=$abc$109383$new_n19801_ i1=$abc$109383$new_n19743_ i2=$abc$109383$new_n20803_ i3=$abc$109383$new_n19694_ q=$abc$109383$new_n21480_
 .subckt buf_x4 i=$abc$109383$new_n21480_ q=$abc$109383$new_n21481_
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n21479_ i2=$abc$109383$new_n21381_ nq=$abc$109383$new_n21482_
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[28][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103884
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[28][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103886
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[28][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103888
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[28][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103890
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[28][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103892
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[28][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103894
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[28][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103896
-.subckt mx2_x2 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[28][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103898
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[28][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103884
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[28][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103886
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[28][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103888
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[28][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103890
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[28][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103892
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[28][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103894
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[28][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103896
+.subckt mux2_x1 cmd=$abc$109383$new_n21482_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[28][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103898
 .subckt buf_x4 i=$abc$109383$new_n20541_ q=$abc$109383$new_n21491_
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n21492_
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n20548_ i2=$abc$109383$new_n21479_ nq=$abc$109383$new_n21493_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[28][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103900
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[28][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103900
 .subckt buf_x4 i=$abc$109383$new_n20555_ q=$abc$109383$new_n21495_
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n21496_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[28][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103902
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[28][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103902
 .subckt buf_x4 i=$abc$109383$new_n20559_ q=$abc$109383$new_n21498_
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n21499_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[28][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103904
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[28][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103906
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[28][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103904
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21093_ i1=soc.ram.ram[28][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103906
 .subckt buf_x4 i=$abc$109383$new_n20568_ q=$abc$109383$new_n21502_
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n21503_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[28][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103908
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[28][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103908
 .subckt buf_x4 i=$abc$109383$new_n20572_ q=$abc$109383$new_n21505_
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n21506_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[28][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103910
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[28][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103910
 .subckt buf_x4 i=$abc$109383$new_n20576_ q=$abc$109383$new_n21508_
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n21509_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[28][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103912
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[28][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103912
 .subckt buf_x4 i=$abc$109383$new_n20580_ q=$abc$109383$new_n21511_
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n21512_
-.subckt mx2_x2 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[28][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103914
-.subckt a2_x2 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ q=$abc$109383$new_n21514_
-.subckt a2_x2 i0=$abc$109383$new_n21514_ i1=$abc$109383$new_n20494_ q=$abc$109383$new_n21515_
+.subckt mux2_x1 cmd=$abc$109383$new_n21493_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[28][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103914
+.subckt and2_x1 i0=$abc$109383$new_n19818_ i1=$abc$109383$new_n19817_ q=$abc$109383$new_n21514_
+.subckt and2_x1 i0=$abc$109383$new_n21514_ i1=$abc$109383$new_n20494_ q=$abc$109383$new_n21515_
 .subckt buf_x4 i=$abc$109383$new_n21515_ q=$abc$109383$new_n21516_
 .subckt nand4_x0 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ nq=$abc$109383$new_n21517_
-.subckt a2_x2 i0=$abc$109383$new_n21517_ i1=soc.cpu.minerva.gprf.mem._mem[26][0] q=$abc$109383$new_n21518_
-.subckt a4_x2 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n21519_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21519_ q=$abc$109383$new_n21520_
-.subckt o2_x2 i0=$abc$109383$new_n21520_ i1=$abc$109383$new_n21518_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104176
+.subckt and2_x1 i0=$abc$109383$new_n21517_ i1=soc.cpu.minerva.gprf.mem._mem[26][0] q=$abc$109383$new_n21518_
+.subckt and4_x1 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n21519_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21519_ nq=$abc$109383$new_n21520_
+.subckt or2_x1 i0=$abc$109383$new_n21520_ i1=$abc$109383$new_n21518_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104176
 .subckt buf_x4 i=$abc$109383$new_n21517_ q=$abc$109383$new_n21522_
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[26][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104178
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[26][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104180
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[26][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104182
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[26][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104184
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[26][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104186
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[26][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104188
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[26][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104190
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[26][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104192
-.subckt mx2_x2 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[26][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104194
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[26][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104178
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[26][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104180
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[26][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104182
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[26][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104184
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[26][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104186
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[26][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104188
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[26][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104190
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[26][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104192
+.subckt mux2_x1 cmd=$abc$109383$new_n21522_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[26][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104194
 .subckt buf_x4 i=$abc$109383$new_n21517_ q=$abc$109383$new_n21532_
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[26][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104196
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[26][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104198
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[26][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104200
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[26][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104202
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[26][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104204
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[26][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104206
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[26][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104208
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[26][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104210
-.subckt mx2_x2 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[26][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104212
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[26][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104196
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[26][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104198
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[26][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104200
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[26][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104202
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[26][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104204
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[26][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104206
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[26][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104208
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[26][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104210
+.subckt mux2_x1 cmd=$abc$109383$new_n21532_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[26][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104212
 .subckt buf_x4 i=$abc$109383$new_n21517_ q=$abc$109383$new_n21542_
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[26][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104214
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[26][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104216
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[26][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104218
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[26][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104220
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[26][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104222
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[26][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104224
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[26][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104226
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[26][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104228
-.subckt mx2_x2 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[26][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104230
-.subckt mx2_x2 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[26][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104232
-.subckt mx2_x2 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[26][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104234
-.subckt mx2_x2 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[26][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104236
-.subckt mx2_x2 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[26][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104238
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[26][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104214
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[26][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104216
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[26][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104218
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[26][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104220
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[26][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104222
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[26][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104224
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[26][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104226
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[26][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104228
+.subckt mux2_x1 cmd=$abc$109383$new_n21542_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[26][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104230
+.subckt mux2_x1 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[26][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104232
+.subckt mux2_x1 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[26][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104234
+.subckt mux2_x1 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[26][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104236
+.subckt mux2_x1 cmd=$abc$109383$new_n21517_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[26][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104238
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n20802_ i2=$abc$109383$new_n19741_ nq=$abc$109383$new_n21556_
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[14][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104240
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[14][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104242
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[14][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104244
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[14][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104246
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[14][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104248
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[14][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104250
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[14][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104252
-.subckt mx2_x2 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[14][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104254
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[14][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104240
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[14][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104242
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[14][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104244
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[14][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104246
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[14][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104248
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[14][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104250
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[14][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104252
+.subckt mux2_x1 cmd=$abc$109383$new_n21556_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[14][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104254
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n21565_
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[19][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104256
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[19][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104258
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[19][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104260
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[19][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104262
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[19][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104264
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[19][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104266
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[19][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104268
-.subckt mx2_x2 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[19][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104270
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[19][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104256
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[19][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104258
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[19][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104260
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[19][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104262
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[19][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104264
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[19][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104266
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[19][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104268
+.subckt mux2_x1 cmd=$abc$109383$new_n21565_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[19][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104270
 .subckt nand4_x0 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n21344_ i2=$abc$109383$new_n19781_ i3=$abc$109383$new_n19744_ nq=$abc$109383$new_n21574_
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[0][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104272
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[0][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104274
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[0][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104276
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[0][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104272
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[0][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104274
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[0][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104276
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n21578_
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[0][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104278
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[0][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104280
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[0][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104282
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[0][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104284
-.subckt mx2_x2 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[0][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104286
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[0][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104278
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[0][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104280
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[0][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104282
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[0][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104284
+.subckt mux2_x1 cmd=$abc$109383$new_n21574_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[0][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104286
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n21584_
 .subckt buf_x4 i=$abc$109383$new_n20886_ q=$abc$109383$new_n21585_
 .subckt buf_x4 i=$abc$109383$new_n21238_ q=$abc$109383$new_n21586_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[5] nq=$abc$109383$new_n21587_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[5] nq=$abc$109383$new_n21588_
-.subckt mx2_x2 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n21588_ i1=$abc$109383$new_n21587_ q=$abc$109383$new_n21589_
-.subckt a3_x2 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n21589_ i2=$abc$109383$new_n19698_ q=$abc$109383$new_n21590_
+.subckt mux2_x1 cmd=$abc$109383$new_n14774_ i0=$abc$109383$new_n21588_ i1=$abc$109383$new_n21587_ q=$abc$109383$new_n21589_
+.subckt and3_x1 i0=$abc$109383$new_n19737_ i1=$abc$109383$new_n21589_ i2=$abc$109383$new_n19698_ q=$abc$109383$new_n21590_
 .subckt buf_x4 i=$abc$109383$new_n21590_ q=$abc$109383$new_n21591_
 .subckt buf_x4 i=$abc$109383$new_n21591_ q=$abc$109383$new_n21592_
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n21585_ i3=$abc$109383$new_n21584_ nq=$abc$109383$new_n21593_
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[93][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104310
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[93][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104312
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[93][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104314
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[93][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104316
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[93][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104318
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[93][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104320
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[93][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104322
-.subckt mx2_x2 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[93][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104324
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[93][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104310
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[93][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104312
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[93][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104314
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[93][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104316
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[93][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104318
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[93][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104320
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[93][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104322
+.subckt mux2_x1 cmd=$abc$109383$new_n21593_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[93][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104324
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21602_
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[44][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105016
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[44][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105018
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[44][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105020
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[44][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105022
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[44][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105024
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[44][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105026
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[44][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105028
-.subckt mx2_x2 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[44][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105030
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[44][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105016
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[44][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105018
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[44][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105020
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[44][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105022
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[44][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105024
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[44][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105026
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[44][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105028
+.subckt mux2_x1 cmd=$abc$109383$new_n21602_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[44][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105030
 .subckt buf_x4 i=$abc$109383$new_n20243_ q=$abc$109383$new_n21611_
 .subckt nand3_x0 i0=$abc$109383$new_n21611_ i1=$abc$109383$new_n19803_ i2=$abc$109383$new_n19741_ nq=$abc$109383$new_n21612_
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[18][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105032
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[18][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105034
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[18][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105036
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[18][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105038
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[18][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105040
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[18][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105042
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[18][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105044
-.subckt mx2_x2 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[18][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105046
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[18][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105032
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[18][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105034
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[18][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105036
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[18][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105038
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[18][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105040
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[18][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105042
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[18][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105044
+.subckt mux2_x1 cmd=$abc$109383$new_n21612_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[18][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105046
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n20234_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n21249_ nq=$abc$109383$new_n21621_
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[105][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105048
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[105][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105050
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[105][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105052
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[105][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105054
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[105][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105056
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[105][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105058
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[105][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105060
-.subckt mx2_x2 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[105][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105062
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[105][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105048
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[105][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105050
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[105][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105052
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[105][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105054
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21166_ i1=soc.ram.ram[105][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105056
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21169_ i1=soc.ram.ram[105][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105058
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21172_ i1=soc.ram.ram[105][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105060
+.subckt mux2_x1 cmd=$abc$109383$new_n21621_ i0=$abc$109383$new_n21175_ i1=soc.ram.ram[105][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105062
 .subckt nand3_x0 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20596_ i2=$abc$109383$new_n20594_ nq=$abc$109383$new_n21630_
-.subckt a2_x2 i0=$abc$109383$new_n21630_ i1=soc.cpu.minerva.gprf.mem._mem[23][0] q=$abc$109383$new_n21631_
-.subckt a3_x2 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20596_ i2=$abc$109383$new_n20594_ q=$abc$109383$new_n21632_
-.subckt ao22_x2 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21632_ q=$abc$109383$new_n21633_
-.subckt o2_x2 i0=$abc$109383$new_n21633_ i1=$abc$109383$new_n21631_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105064
+.subckt and2_x1 i0=$abc$109383$new_n21630_ i1=soc.cpu.minerva.gprf.mem._mem[23][0] q=$abc$109383$new_n21631_
+.subckt and3_x1 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20596_ i2=$abc$109383$new_n20594_ q=$abc$109383$new_n21632_
+.subckt and21nor_x1 i0=$abc$109383$new_n19864_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21632_ nq=$abc$109383$new_n21633_
+.subckt or2_x1 i0=$abc$109383$new_n21633_ i1=$abc$109383$new_n21631_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105064
 .subckt buf_x4 i=$abc$109383$new_n21630_ q=$abc$109383$new_n21635_
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[23][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105066
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[23][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105068
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[23][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105070
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[23][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105072
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[23][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105074
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[23][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105076
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[23][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105078
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[23][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105080
-.subckt mx2_x2 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[23][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105082
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[23][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105066
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19917_ i1=soc.cpu.minerva.gprf.mem._mem[23][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105068
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[23][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105070
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19956_ i1=soc.cpu.minerva.gprf.mem._mem[23][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105072
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[23][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105074
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[23][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105076
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[23][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105078
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[23][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105080
+.subckt mux2_x1 cmd=$abc$109383$new_n21635_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[23][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105082
 .subckt buf_x4 i=$abc$109383$new_n21630_ q=$abc$109383$new_n21645_
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[23][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105084
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[23][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105086
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[23][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105088
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[23][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105090
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[23][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105092
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[23][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105094
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[23][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105096
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[23][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105098
-.subckt mx2_x2 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[23][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105100
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[23][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105084
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[23][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105086
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[23][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105088
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[23][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105090
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[23][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105092
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[23][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105094
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20133_ i1=soc.cpu.minerva.gprf.mem._mem[23][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105096
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20140_ i1=soc.cpu.minerva.gprf.mem._mem[23][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105098
+.subckt mux2_x1 cmd=$abc$109383$new_n21645_ i0=$abc$109383$new_n20146_ i1=soc.cpu.minerva.gprf.mem._mem[23][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105100
 .subckt buf_x4 i=$abc$109383$new_n21630_ q=$abc$109383$new_n21655_
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[23][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105102
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[23][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105104
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[23][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105106
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[23][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105108
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[23][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105110
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[23][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105112
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[23][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105114
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[23][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105116
-.subckt mx2_x2 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[23][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105118
-.subckt mx2_x2 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[23][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105120
-.subckt mx2_x2 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[23][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105122
-.subckt mx2_x2 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[23][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105124
-.subckt mx2_x2 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[23][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105126
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20152_ i1=soc.cpu.minerva.gprf.mem._mem[23][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105102
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20159_ i1=soc.cpu.minerva.gprf.mem._mem[23][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105104
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20165_ i1=soc.cpu.minerva.gprf.mem._mem[23][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105106
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20171_ i1=soc.cpu.minerva.gprf.mem._mem[23][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105108
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20177_ i1=soc.cpu.minerva.gprf.mem._mem[23][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105110
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20183_ i1=soc.cpu.minerva.gprf.mem._mem[23][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105112
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20189_ i1=soc.cpu.minerva.gprf.mem._mem[23][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105114
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20195_ i1=soc.cpu.minerva.gprf.mem._mem[23][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105116
+.subckt mux2_x1 cmd=$abc$109383$new_n21655_ i0=$abc$109383$new_n20201_ i1=soc.cpu.minerva.gprf.mem._mem[23][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105118
+.subckt mux2_x1 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20207_ i1=soc.cpu.minerva.gprf.mem._mem[23][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105120
+.subckt mux2_x1 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20213_ i1=soc.cpu.minerva.gprf.mem._mem[23][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105122
+.subckt mux2_x1 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20219_ i1=soc.cpu.minerva.gprf.mem._mem[23][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105124
+.subckt mux2_x1 cmd=$abc$109383$new_n21630_ i0=$abc$109383$new_n20225_ i1=soc.cpu.minerva.gprf.mem._mem[23][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105126
 .subckt nand3_x0 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20593_ i2=$abc$109383$new_n19839_ nq=$abc$109383$new_n21669_
-.subckt a2_x2 i0=$abc$109383$new_n21669_ i1=soc.cpu.minerva.gprf.mem._mem[21][0] q=$abc$109383$new_n21670_
-.subckt a3_x2 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n19839_ q=$abc$109383$new_n21671_
+.subckt and2_x1 i0=$abc$109383$new_n21669_ i1=soc.cpu.minerva.gprf.mem._mem[21][0] q=$abc$109383$new_n21670_
+.subckt and3_x1 i0=$abc$109383$new_n20596_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n19839_ q=$abc$109383$new_n21671_
 .subckt buf_x4 i=$abc$109383$new_n19863_ q=$abc$109383$new_n21672_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21671_ q=$abc$109383$new_n21673_
-.subckt o2_x2 i0=$abc$109383$new_n21673_ i1=$abc$109383$new_n21670_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105128
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n20311_ i2=$abc$109383$new_n21671_ nq=$abc$109383$new_n21673_
+.subckt or2_x1 i0=$abc$109383$new_n21673_ i1=$abc$109383$new_n21670_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105128
 .subckt buf_x4 i=$abc$109383$new_n21669_ q=$abc$109383$new_n21675_
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[21][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105130
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19899_ i1=soc.cpu.minerva.gprf.mem._mem[21][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105130
 .subckt buf_x4 i=$abc$109383$new_n19916_ q=$abc$109383$new_n21677_
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[21][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105132
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[21][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105134
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[21][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105132
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19938_ i1=soc.cpu.minerva.gprf.mem._mem[21][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105134
 .subckt buf_x4 i=$abc$109383$new_n19955_ q=$abc$109383$new_n21680_
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[21][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105136
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[21][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105138
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[21][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105140
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[21][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105142
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[21][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105144
-.subckt mx2_x2 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[21][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105146
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[21][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105136
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19974_ i1=soc.cpu.minerva.gprf.mem._mem[21][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105138
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n19991_ i1=soc.cpu.minerva.gprf.mem._mem[21][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105140
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n20009_ i1=soc.cpu.minerva.gprf.mem._mem[21][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105142
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n20028_ i1=soc.cpu.minerva.gprf.mem._mem[21][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105144
+.subckt mux2_x1 cmd=$abc$109383$new_n21675_ i0=$abc$109383$new_n20040_ i1=soc.cpu.minerva.gprf.mem._mem[21][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105146
 .subckt buf_x4 i=$abc$109383$new_n21669_ q=$abc$109383$new_n21687_
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[21][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105148
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[21][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105150
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[21][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105152
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[21][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105154
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[21][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105156
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[21][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105158
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20053_ i1=soc.cpu.minerva.gprf.mem._mem[21][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105148
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20068_ i1=soc.cpu.minerva.gprf.mem._mem[21][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105150
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20081_ i1=soc.cpu.minerva.gprf.mem._mem[21][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105152
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20095_ i1=soc.cpu.minerva.gprf.mem._mem[21][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105154
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20109_ i1=soc.cpu.minerva.gprf.mem._mem[21][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105156
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n20122_ i1=soc.cpu.minerva.gprf.mem._mem[21][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105158
 .subckt buf_x4 i=$abc$109383$new_n20132_ q=$abc$109383$new_n21694_
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[21][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105160
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[21][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105160
 .subckt buf_x4 i=$abc$109383$new_n20139_ q=$abc$109383$new_n21696_
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[21][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105162
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[21][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105162
 .subckt buf_x4 i=$abc$109383$new_n20145_ q=$abc$109383$new_n21698_
-.subckt mx2_x2 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[21][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105164
+.subckt mux2_x1 cmd=$abc$109383$new_n21687_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[21][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105164
 .subckt buf_x4 i=$abc$109383$new_n20151_ q=$abc$109383$new_n21700_
 .subckt buf_x4 i=$abc$109383$new_n21669_ q=$abc$109383$new_n21701_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[21][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105166
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[21][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105166
 .subckt buf_x4 i=$abc$109383$new_n20158_ q=$abc$109383$new_n21703_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[21][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105168
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[21][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105168
 .subckt buf_x4 i=$abc$109383$new_n20164_ q=$abc$109383$new_n21705_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[21][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105170
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[21][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105170
 .subckt buf_x4 i=$abc$109383$new_n20170_ q=$abc$109383$new_n21707_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[21][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105172
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[21][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105172
 .subckt buf_x4 i=$abc$109383$new_n20176_ q=$abc$109383$new_n21709_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[21][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105174
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[21][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105174
 .subckt buf_x4 i=$abc$109383$new_n20182_ q=$abc$109383$new_n21711_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[21][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105176
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[21][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105176
 .subckt buf_x4 i=$abc$109383$new_n20188_ q=$abc$109383$new_n21713_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[21][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105178
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[21][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105178
 .subckt buf_x4 i=$abc$109383$new_n20194_ q=$abc$109383$new_n21715_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[21][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105180
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[21][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105180
 .subckt buf_x4 i=$abc$109383$new_n20200_ q=$abc$109383$new_n21717_
-.subckt mx2_x2 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[21][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105182
+.subckt mux2_x1 cmd=$abc$109383$new_n21701_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[21][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105182
 .subckt buf_x4 i=$abc$109383$new_n20206_ q=$abc$109383$new_n21719_
-.subckt mx2_x2 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[21][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105184
+.subckt mux2_x1 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[21][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105184
 .subckt buf_x4 i=$abc$109383$new_n20212_ q=$abc$109383$new_n21721_
-.subckt mx2_x2 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[21][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105186
+.subckt mux2_x1 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[21][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105186
 .subckt buf_x4 i=$abc$109383$new_n20218_ q=$abc$109383$new_n21723_
-.subckt mx2_x2 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[21][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105188
+.subckt mux2_x1 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[21][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105188
 .subckt buf_x4 i=$abc$109383$new_n20224_ q=$abc$109383$new_n21725_
-.subckt mx2_x2 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[21][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105190
+.subckt mux2_x1 cmd=$abc$109383$new_n21669_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[21][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105190
 .subckt buf_x4 i=soc.tx_fifo.unbuffered.consume[0] q=$abc$109383$new_n21727_
 .subckt inv_x1 i=soc.tx_fifo.unbuffered.consume[1] nq=$abc$109383$new_n21728_
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][0] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21729_
 .subckt buf_x4 i=soc.tx_fifo.unbuffered.consume[1] q=$abc$109383$new_n21730_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][0] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21731_
-.subckt o2_x2 i0=soc.tx_fifo.unbuffered.consume[1] i1=soc.tx_fifo.unbuffered.consume[0] q=$abc$109383$new_n21732_
+.subckt or2_x1 i0=soc.tx_fifo.unbuffered.consume[1] i1=soc.tx_fifo.unbuffered.consume[0] q=$abc$109383$new_n21732_
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.storage[0][0] nq=$abc$109383$new_n21733_
-.subckt ao22_x2 i0=$abc$109383$new_n21733_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21731_ q=$abc$109383$new_n21734_
+.subckt and21nor_x1 i0=$abc$109383$new_n21733_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21731_ nq=$abc$109383$new_n21734_
 .subckt nand2_x0 i0=$abc$109383$new_n21734_ i1=$abc$109383$new_n21729_ nq=$abc$109383$new_n21735_
-.subckt o2_x2 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] q=$abc$109383$new_n21736_
+.subckt or2_x1 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] q=$abc$109383$new_n21736_
 .subckt nand2_x0 i0=soc.tx_fifo.r_rdy i1=soc.fsm_state nq=$abc$109383$new_n21737_
 .subckt nand2_x0 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ nq=$abc$109383$new_n21738_
 .subckt buf_x4 i=$abc$109383$new_n21738_ q=$abc$109383$new_n21739_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21735_ i1=soc.data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105720
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21735_ i1=soc.data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105720
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][1] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21741_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][1] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21742_
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.storage[0][1] nq=$abc$109383$new_n21743_
-.subckt ao22_x2 i0=$abc$109383$new_n21743_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21742_ q=$abc$109383$new_n21744_
+.subckt and21nor_x1 i0=$abc$109383$new_n21743_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21742_ nq=$abc$109383$new_n21744_
 .subckt nand2_x0 i0=$abc$109383$new_n21744_ i1=$abc$109383$new_n21741_ nq=$abc$109383$new_n21745_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21745_ i1=soc.data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105722
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21745_ i1=soc.data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105722
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][2] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21747_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][2] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21748_
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.storage[0][2] nq=$abc$109383$new_n21749_
-.subckt ao22_x2 i0=$abc$109383$new_n21749_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21748_ q=$abc$109383$new_n21750_
+.subckt and21nor_x1 i0=$abc$109383$new_n21749_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21748_ nq=$abc$109383$new_n21750_
 .subckt nand2_x0 i0=$abc$109383$new_n21750_ i1=$abc$109383$new_n21747_ nq=$abc$109383$new_n21751_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21751_ i1=soc.data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105724
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21751_ i1=soc.data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105724
 .subckt nor2_x0 i0=$abc$109383$new_n21730_ i1=$abc$109383$new_n21727_ nq=$abc$109383$new_n21753_
-.subckt a4_x2 i0=$abc$109383$new_n21753_ i1=$abc$109383$new_n21737_ i2=$abc$109383$new_n21736_ i3=soc.tx_fifo.unbuffered.storage[0][3] q=$abc$109383$new_n21754_
-.subckt a2_x2 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ q=$abc$109383$new_n21755_
+.subckt and4_x1 i0=$abc$109383$new_n21753_ i1=$abc$109383$new_n21737_ i2=$abc$109383$new_n21736_ i3=soc.tx_fifo.unbuffered.storage[0][3] q=$abc$109383$new_n21754_
+.subckt and2_x1 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ q=$abc$109383$new_n21755_
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][3] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21756_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][3] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21757_
 .subckt nand3_x0 i0=$abc$109383$new_n21757_ i1=$abc$109383$new_n21756_ i2=$abc$109383$new_n21755_ nq=$abc$109383$new_n21758_
-.subckt oa22_x2 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ i2=soc.data[3] q=$abc$109383$new_n21759_
-.subckt oa22_x2 i0=$abc$109383$new_n21759_ i1=$abc$109383$new_n21758_ i2=$abc$109383$new_n21754_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105726
-.subckt a4_x2 i0=$abc$109383$new_n21753_ i1=$abc$109383$new_n21737_ i2=$abc$109383$new_n21736_ i3=soc.tx_fifo.unbuffered.storage[0][4] q=$abc$109383$new_n21761_
+.subckt or21nand_x1 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ i2=soc.data[3] nq=$abc$109383$new_n21759_
+.subckt or21nand_x1 i0=$abc$109383$new_n21759_ i1=$abc$109383$new_n21758_ i2=$abc$109383$new_n21754_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105726
+.subckt and4_x1 i0=$abc$109383$new_n21753_ i1=$abc$109383$new_n21737_ i2=$abc$109383$new_n21736_ i3=soc.tx_fifo.unbuffered.storage[0][4] q=$abc$109383$new_n21761_
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][4] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21762_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][4] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21763_
 .subckt nand3_x0 i0=$abc$109383$new_n21763_ i1=$abc$109383$new_n21762_ i2=$abc$109383$new_n21755_ nq=$abc$109383$new_n21764_
-.subckt oa22_x2 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ i2=soc.data[4] q=$abc$109383$new_n21765_
-.subckt oa22_x2 i0=$abc$109383$new_n21765_ i1=$abc$109383$new_n21764_ i2=$abc$109383$new_n21761_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105728
+.subckt or21nand_x1 i0=$abc$109383$new_n21737_ i1=$abc$109383$new_n21736_ i2=soc.data[4] nq=$abc$109383$new_n21765_
+.subckt or21nand_x1 i0=$abc$109383$new_n21765_ i1=$abc$109383$new_n21764_ i2=$abc$109383$new_n21761_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105728
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][5] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21767_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][5] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21768_
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.storage[0][5] nq=$abc$109383$new_n21769_
-.subckt ao22_x2 i0=$abc$109383$new_n21769_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21768_ q=$abc$109383$new_n21770_
+.subckt and21nor_x1 i0=$abc$109383$new_n21769_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21768_ nq=$abc$109383$new_n21770_
 .subckt nand2_x0 i0=$abc$109383$new_n21770_ i1=$abc$109383$new_n21767_ nq=$abc$109383$new_n21771_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21771_ i1=soc.data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105730
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21771_ i1=soc.data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105730
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][6] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21773_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][6] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21774_
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.storage[0][6] nq=$abc$109383$new_n21775_
-.subckt ao22_x2 i0=$abc$109383$new_n21775_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21774_ q=$abc$109383$new_n21776_
+.subckt and21nor_x1 i0=$abc$109383$new_n21775_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21774_ nq=$abc$109383$new_n21776_
 .subckt nand2_x0 i0=$abc$109383$new_n21776_ i1=$abc$109383$new_n21773_ nq=$abc$109383$new_n21777_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21777_ i1=soc.data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105732
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21777_ i1=soc.data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105732
 .subckt nand3_x0 i0=soc.tx_fifo.unbuffered.storage[1][7] i1=$abc$109383$new_n21728_ i2=$abc$109383$new_n21727_ nq=$abc$109383$new_n21779_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.storage[2][7] i1=$abc$109383$new_n21730_ nq=$abc$109383$new_n21780_
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.storage[0][7] nq=$abc$109383$new_n21781_
-.subckt ao22_x2 i0=$abc$109383$new_n21781_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21780_ q=$abc$109383$new_n21782_
+.subckt and21nor_x1 i0=$abc$109383$new_n21781_ i1=$abc$109383$new_n21732_ i2=$abc$109383$new_n21780_ nq=$abc$109383$new_n21782_
 .subckt nand2_x0 i0=$abc$109383$new_n21782_ i1=$abc$109383$new_n21779_ nq=$abc$109383$new_n21783_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21783_ i1=soc.data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105734
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21783_ i1=soc.data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105734
 .subckt buf_x4 i=$abc$109383$new_n19745_ q=$abc$109383$new_n21785_
 .subckt buf_x4 i=$abc$109383$new_n20839_ q=$abc$109383$new_n21786_
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n21787_
 .subckt nand3_x0 i0=$abc$109383$new_n21787_ i1=$abc$109383$new_n21786_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n21788_
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[97][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105736
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[97][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105738
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[97][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105740
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[97][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105742
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21196_ i1=soc.ram.ram[97][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105736
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21199_ i1=soc.ram.ram[97][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105738
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21201_ i1=soc.ram.ram[97][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105740
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21203_ i1=soc.ram.ram[97][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105742
 .subckt buf_x4 i=$abc$109383$new_n20379_ q=$abc$109383$new_n21793_
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n21794_
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[97][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105744
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[97][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105744
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n21796_
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[97][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105746
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[97][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105746
 .subckt buf_x4 i=$abc$109383$new_n20387_ q=$abc$109383$new_n21798_
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n21799_
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[97][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105748
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[97][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105748
 .subckt buf_x4 i=$abc$109383$new_n20391_ q=$abc$109383$new_n21801_
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n21802_
-.subckt mx2_x2 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[97][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105750
+.subckt mux2_x1 cmd=$abc$109383$new_n21788_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[97][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105750
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.produce[1] nq=$abc$109383$new_n21804_
 .subckt nand2_x0 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] nq=$abc$109383$new_n21805_
 .subckt nand4_x0 i0=$abc$109383$new_n21805_ i1=soc.tx_fifo.unbuffered.produce[0] i2=$abc$109383$new_n21804_ i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb nq=$abc$109383$new_n21806_
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] i1=soc.tx_fifo.unbuffered.storage[1][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105752
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] i1=soc.tx_fifo.unbuffered.storage[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105754
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] i1=soc.tx_fifo.unbuffered.storage[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105756
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] i1=soc.tx_fifo.unbuffered.storage[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105758
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] i1=soc.tx_fifo.unbuffered.storage[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105760
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] i1=soc.tx_fifo.unbuffered.storage[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105762
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] i1=soc.tx_fifo.unbuffered.storage[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105764
-.subckt mx2_x2 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] i1=soc.tx_fifo.unbuffered.storage[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105766
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] i1=soc.tx_fifo.unbuffered.storage[1][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105752
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] i1=soc.tx_fifo.unbuffered.storage[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105754
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] i1=soc.tx_fifo.unbuffered.storage[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105756
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] i1=soc.tx_fifo.unbuffered.storage[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105758
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] i1=soc.tx_fifo.unbuffered.storage[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105760
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] i1=soc.tx_fifo.unbuffered.storage[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105762
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] i1=soc.tx_fifo.unbuffered.storage[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105764
+.subckt mux2_x1 cmd=$abc$109383$new_n21806_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] i1=soc.tx_fifo.unbuffered.storage[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105766
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n21815_
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n21786_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n21816_
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[97][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105768
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[97][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105770
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[97][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105772
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[97][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105774
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[97][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105776
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[97][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105778
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[97][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105780
-.subckt mx2_x2 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[97][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105782
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[97][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105768
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[97][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105770
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[97][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105772
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[97][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105774
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[97][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105776
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[97][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105778
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[97][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105780
+.subckt mux2_x1 cmd=$abc$109383$new_n21816_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[97][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105782
 .subckt inv_x0 i=soc.tx_fifo.unbuffered.produce[0] nq=$abc$109383$new_n21825_
 .subckt nand4_x0 i0=$abc$109383$new_n21805_ i1=$abc$109383$new_n21825_ i2=$abc$109383$new_n21804_ i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb nq=$abc$109383$new_n21826_
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] i1=soc.tx_fifo.unbuffered.storage[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105784
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] i1=soc.tx_fifo.unbuffered.storage[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105786
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] i1=soc.tx_fifo.unbuffered.storage[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105788
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] i1=soc.tx_fifo.unbuffered.storage[0][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105790
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] i1=soc.tx_fifo.unbuffered.storage[0][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105792
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] i1=soc.tx_fifo.unbuffered.storage[0][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105794
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] i1=soc.tx_fifo.unbuffered.storage[0][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105796
-.subckt mx2_x2 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] i1=soc.tx_fifo.unbuffered.storage[0][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105798
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] i1=soc.tx_fifo.unbuffered.storage[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105784
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] i1=soc.tx_fifo.unbuffered.storage[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105786
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] i1=soc.tx_fifo.unbuffered.storage[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105788
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] i1=soc.tx_fifo.unbuffered.storage[0][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105790
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] i1=soc.tx_fifo.unbuffered.storage[0][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105792
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] i1=soc.tx_fifo.unbuffered.storage[0][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105794
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] i1=soc.tx_fifo.unbuffered.storage[0][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105796
+.subckt mux2_x1 cmd=$abc$109383$new_n21826_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] i1=soc.tx_fifo.unbuffered.storage[0][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105798
 .subckt buf_x4 i=$abc$109383$new_n20839_ q=$abc$109383$new_n21835_
 .subckt nand3_x0 i0=$abc$109383$new_n21835_ i1=$abc$109383$new_n19746_ i2=$abc$109383$new_n19741_ nq=$abc$109383$new_n21836_
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[97][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105800
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[97][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105802
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[97][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105804
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[97][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105806
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[97][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105808
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[97][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105810
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[97][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105812
-.subckt mx2_x2 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[97][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105814
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[97][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105800
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[97][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105802
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21104_ i1=soc.ram.ram[97][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105804
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21107_ i1=soc.ram.ram[97][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105806
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21110_ i1=soc.ram.ram[97][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105808
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[97][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105810
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21114_ i1=soc.ram.ram[97][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105812
+.subckt mux2_x1 cmd=$abc$109383$new_n21836_ i0=$abc$109383$new_n21117_ i1=soc.ram.ram[97][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105814
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.produce[0] nq=$abc$109383$new_n21845_
 .subckt nand2_x0 i0=soc.rx_fifo.unbuffered.level[1] i1=soc.rx_fifo.unbuffered.level[0] nq=$abc$109383$new_n21846_
 .subckt buf_x4 i=$abc$109383$new_n21846_ q=$abc$109383$new_n21847_
 .subckt nand4_x0 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n21845_ i2=soc.rx_fifo.unbuffered.produce[1] i3=soc.rx.rdy nq=$abc$109383$new_n21848_
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[0] i1=soc.rx_fifo.unbuffered.storage[2][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105816
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[1] i1=soc.rx_fifo.unbuffered.storage[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105818
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[2] i1=soc.rx_fifo.unbuffered.storage[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105820
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[3] i1=soc.rx_fifo.unbuffered.storage[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105822
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[4] i1=soc.rx_fifo.unbuffered.storage[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105824
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[5] i1=soc.rx_fifo.unbuffered.storage[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105826
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[6] i1=soc.rx_fifo.unbuffered.storage[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105828
-.subckt mx2_x2 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[7] i1=soc.rx_fifo.unbuffered.storage[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105830
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[0] i1=soc.rx_fifo.unbuffered.storage[2][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105816
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[1] i1=soc.rx_fifo.unbuffered.storage[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105818
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[2] i1=soc.rx_fifo.unbuffered.storage[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105820
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[3] i1=soc.rx_fifo.unbuffered.storage[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105822
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[4] i1=soc.rx_fifo.unbuffered.storage[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105824
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[5] i1=soc.rx_fifo.unbuffered.storage[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105826
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[6] i1=soc.rx_fifo.unbuffered.storage[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105828
+.subckt mux2_x1 cmd=$abc$109383$new_n21848_ i0=soc.rx.data[7] i1=soc.rx_fifo.unbuffered.storage[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105830
 .subckt buf_x4 i=$abc$109383$new_n20349_ q=$abc$109383$new_n21857_
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n21858_
 .subckt buf_x4 i=$abc$109383$new_n19805_ q=$abc$109383$new_n21859_
 .subckt nand3_x0 i0=$abc$109383$new_n21787_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n21860_
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[96][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105832
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[96][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105832
 .subckt buf_x4 i=$abc$109383$new_n20365_ q=$abc$109383$new_n21862_
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n21863_
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[96][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105834
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[96][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105834
 .subckt buf_x4 i=$abc$109383$new_n20370_ q=$abc$109383$new_n21865_
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n21866_
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[96][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105836
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[96][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105836
 .subckt buf_x4 i=$abc$109383$new_n20374_ q=$abc$109383$new_n21868_
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n21869_
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[96][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105838
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[96][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105840
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[96][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105842
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[96][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105844
-.subckt mx2_x2 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[96][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105846
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[96][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105838
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[96][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105840
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[96][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105842
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[96][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105844
+.subckt mux2_x1 cmd=$abc$109383$new_n21860_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[96][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105846
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n21875_
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[96][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105848
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[96][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105850
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[96][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105852
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[96][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105854
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[96][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105856
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[96][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105858
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[96][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105860
-.subckt mx2_x2 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[96][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105862
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[96][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105848
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[96][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105850
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[96][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105852
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[96][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105854
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[96][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105856
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[96][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105858
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[96][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105860
+.subckt mux2_x1 cmd=$abc$109383$new_n21875_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[96][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105862
 .subckt buf_x4 i=$abc$109383$new_n19740_ q=$abc$109383$new_n21884_
 .subckt nand3_x0 i0=$abc$109383$new_n19806_ i1=$abc$109383$new_n19746_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n21885_
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[96][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105876
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[96][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105878
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21318_ i1=soc.ram.ram[96][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105876
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21324_ i1=soc.ram.ram[96][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105878
 .subckt buf_x4 i=$abc$109383$new_n19734_ q=$abc$109383$new_n21888_
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n21889_
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[96][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105880
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[96][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105880
 .subckt buf_x4 i=$abc$109383$new_n19757_ q=$abc$109383$new_n21891_
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n21892_
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[96][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105882
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[96][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105882
 .subckt buf_x4 i=$abc$109383$new_n19762_ q=$abc$109383$new_n21894_
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n21895_
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[96][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105884
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[96][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105886
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[96][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105884
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21330_ i1=soc.ram.ram[96][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105886
 .subckt buf_x4 i=$abc$109383$new_n19770_ q=$abc$109383$new_n21898_
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n21899_
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[96][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105888
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[96][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105888
 .subckt buf_x4 i=$abc$109383$new_n19774_ q=$abc$109383$new_n21901_
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n21902_
-.subckt mx2_x2 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[96][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105890
+.subckt mux2_x1 cmd=$abc$109383$new_n21885_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[96][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105890
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n19752_ nq=$abc$109383$new_n21904_
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[95][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105892
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[95][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105894
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[95][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105896
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[95][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105898
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[95][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105900
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[95][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105902
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[95][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105904
-.subckt mx2_x2 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[95][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105906
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[95][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105892
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[95][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105894
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[95][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105896
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[95][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105898
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[95][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105900
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[95][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105902
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[95][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105904
+.subckt mux2_x1 cmd=$abc$109383$new_n21904_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[95][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105906
 .subckt buf_x4 i=$abc$109383$new_n19778_ q=$abc$109383$new_n21913_
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n21914_
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n21915_
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[95][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105908
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[95][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105908
 .subckt buf_x4 i=$abc$109383$new_n19789_ q=$abc$109383$new_n21917_
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n21918_
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[95][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105910
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[95][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105912
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[95][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105914
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[95][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105916
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[95][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105910
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[95][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105912
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[95][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105914
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[95][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105916
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n21923_
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[95][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105918
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[95][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105920
-.subckt mx2_x2 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[95][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105922
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[95][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105918
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[95][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105920
+.subckt mux2_x1 cmd=$abc$109383$new_n21915_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[95][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105922
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n21584_ i3=$abc$109383$new_n19752_ nq=$abc$109383$new_n21927_
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[95][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105924
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[95][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105926
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[95][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105928
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[95][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105930
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[95][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105932
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[95][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105934
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[95][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105936
-.subckt mx2_x2 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[95][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105938
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[95][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105924
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[95][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105926
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[95][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105928
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[95][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105930
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[95][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105932
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[95][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105934
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[95][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105936
+.subckt mux2_x1 cmd=$abc$109383$new_n21927_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[95][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105938
 .subckt nor2_x0 i0=soc.rx_fifo.unbuffered.level[1] i1=soc.rx_fifo.unbuffered.level[0] nq=$abc$109383$new_n21936_
 .subckt buf_x4 i=$abc$109383$new_n20241_ q=$abc$109383$new_n21937_
 .subckt nor2_x0 i0=soc.bridge.csr_bridge_0.cycle[0] i1=soc.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n21938_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__we nq=$abc$109383$new_n21939_
-.subckt oa22_x2 i0=$abc$109383$new_n21939_ i1=soc.cpu.minerva.loadstore.dbus__sel[3] i2=$abc$109383$new_n14774_ q=$abc$109383$new_n21940_
+.subckt or21nand_x1 i0=$abc$109383$new_n21939_ i1=soc.cpu.minerva.loadstore.dbus__sel[3] i2=$abc$109383$new_n14774_ nq=$abc$109383$new_n21940_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n21941_
-.subckt a2_x2 i0=soc.bridge.csr_bridge_0.cycle[0] i1=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n21942_
-.subckt a2_x2 i0=$abc$109383$new_n21942_ i1=$abc$109383$new_n21941_ q=$abc$109383$new_n21943_
+.subckt and2_x1 i0=soc.bridge.csr_bridge_0.cycle[0] i1=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n21942_
+.subckt and2_x1 i0=$abc$109383$new_n21942_ i1=$abc$109383$new_n21941_ q=$abc$109383$new_n21943_
 .subckt nand2_x0 i0=$abc$109383$new_n21943_ i1=$abc$109383$new_n21940_ nq=$abc$109383$new_n21944_
-.subckt oa22_x2 i0=soc.cpu.minerva.loadstore.dbus__sel[1] i1=$abc$109383$new_n21939_ i2=$abc$109383$new_n14774_ q=$abc$109383$new_n21945_
+.subckt or21nand_x1 i0=soc.cpu.minerva.loadstore.dbus__sel[1] i1=$abc$109383$new_n21939_ i2=$abc$109383$new_n14774_ nq=$abc$109383$new_n21945_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n21946_
 .subckt buf_x4 i=$abc$109383$new_n21941_ q=$abc$109383$new_n21947_
-.subckt a3_x2 i0=$abc$109383$new_n21947_ i1=soc.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n21946_ q=$abc$109383$new_n21948_
+.subckt and3_x1 i0=$abc$109383$new_n21947_ i1=soc.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n21946_ q=$abc$109383$new_n21948_
 .subckt nand2_x0 i0=$abc$109383$new_n21948_ i1=$abc$109383$new_n21945_ nq=$abc$109383$new_n21949_
-.subckt oa22_x2 i0=soc.cpu.minerva.loadstore.dbus__sel[2] i1=$abc$109383$new_n21939_ i2=$abc$109383$new_n14774_ q=$abc$109383$new_n21950_
+.subckt or21nand_x1 i0=soc.cpu.minerva.loadstore.dbus__sel[2] i1=$abc$109383$new_n21939_ i2=$abc$109383$new_n14774_ nq=$abc$109383$new_n21950_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.cycle[0] nq=$abc$109383$new_n21951_
-.subckt a3_x2 i0=$abc$109383$new_n21947_ i1=$abc$109383$new_n21951_ i2=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n21952_
+.subckt and3_x1 i0=$abc$109383$new_n21947_ i1=$abc$109383$new_n21951_ i2=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n21952_
 .subckt nand2_x0 i0=$abc$109383$new_n21952_ i1=$abc$109383$new_n21950_ nq=$abc$109383$new_n21953_
-.subckt oa22_x2 i0=soc.cpu.minerva.loadstore.dbus__sel[0] i1=$abc$109383$new_n21939_ i2=$abc$109383$new_n14774_ q=$abc$109383$new_n21954_
+.subckt or21nand_x1 i0=soc.cpu.minerva.loadstore.dbus__sel[0] i1=$abc$109383$new_n21939_ i2=$abc$109383$new_n14774_ nq=$abc$109383$new_n21954_
 .subckt nor3_x0 i0=soc.bridge.csr_bridge_0.cycle[2] i1=soc.bridge.csr_bridge_0.cycle[0] i2=soc.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n21955_
 .subckt buf_x4 i=$abc$109383$new_n21955_ q=$abc$109383$new_n21956_
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n21954_ nq=$abc$109383$new_n21957_
 .subckt nand4_x0 i0=$abc$109383$new_n21957_ i1=$abc$109383$new_n21953_ i2=$abc$109383$new_n21949_ i3=$abc$109383$new_n21944_ nq=$abc$109383$new_n21958_
-.subckt a3_x2 i0=$abc$109383$new_n19660_ i1=$abc$109383$new_n14914_ i2=$abc$109383$new_n14906_ q=$abc$109383$new_n21959_
-.subckt a4_x2 i0=$abc$109383$new_n21589_ i1=$abc$109383$new_n20265_ i2=$abc$109383$new_n14807_ i3=$abc$109383$new_n14796_ q=$abc$109383$new_n21960_
-.subckt a2_x2 i0=$abc$109383$new_n21960_ i1=$abc$109383$new_n20232_ q=$abc$109383$new_n21961_
+.subckt and3_x1 i0=$abc$109383$new_n19660_ i1=$abc$109383$new_n14914_ i2=$abc$109383$new_n14906_ q=$abc$109383$new_n21959_
+.subckt and4_x1 i0=$abc$109383$new_n21589_ i1=$abc$109383$new_n20265_ i2=$abc$109383$new_n14807_ i3=$abc$109383$new_n14796_ q=$abc$109383$new_n21960_
+.subckt and2_x1 i0=$abc$109383$new_n21960_ i1=$abc$109383$new_n20232_ q=$abc$109383$new_n21961_
 .subckt nor2_x0 i0=$abc$109383$new_n14834_ i1=$abc$109383$new_n14824_ nq=$abc$109383$new_n21962_
-.subckt a3_x2 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n21962_ i2=$abc$109383$new_n19661_ q=$abc$109383$new_n21963_
-.subckt a4_x2 i0=$abc$109383$new_n21963_ i1=$abc$109383$new_n21961_ i2=$abc$109383$new_n21959_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n21964_
-.subckt a4_x2 i0=$abc$109383$new_n21964_ i1=$abc$109383$new_n21958_ i2=$abc$109383$new_n21938_ i3=$abc$109383$new_n19800_ q=$abc$109383$new_n21965_
+.subckt and3_x1 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n21962_ i2=$abc$109383$new_n19661_ q=$abc$109383$new_n21963_
+.subckt and4_x1 i0=$abc$109383$new_n21963_ i1=$abc$109383$new_n21961_ i2=$abc$109383$new_n21959_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n21964_
+.subckt and4_x1 i0=$abc$109383$new_n21964_ i1=$abc$109383$new_n21958_ i2=$abc$109383$new_n21938_ i3=$abc$109383$new_n19800_ q=$abc$109383$new_n21965_
 .subckt nand3_x0 i0=$abc$109383$new_n21965_ i1=$abc$109383$new_n20885_ i2=$abc$109383$new_n21937_ nq=$abc$109383$new_n21966_
-.subckt a2_x2 i0=$abc$109383$new_n21966_ i1=soc.rx_fifo.r_rdy q=$abc$109383$new_n21967_
-.subckt ao22_x2 i0=$abc$109383$new_n21967_ i1=$abc$109383$new_n21936_ i2=soc.bridge.csr_mux_0.uart_rx_data__r_data[0] q=$abc$109383$new_n21968_
-.subckt o2_x2 i0=soc.rx_fifo.unbuffered.level[1] i1=soc.rx_fifo.unbuffered.level[0] q=$abc$109383$new_n21969_
+.subckt and2_x1 i0=$abc$109383$new_n21966_ i1=soc.rx_fifo.r_rdy q=$abc$109383$new_n21967_
+.subckt and21nor_x1 i0=$abc$109383$new_n21967_ i1=$abc$109383$new_n21936_ i2=soc.bridge.csr_mux_0.uart_rx_data__r_data[0] nq=$abc$109383$new_n21968_
+.subckt or2_x1 i0=soc.rx_fifo.unbuffered.level[1] i1=soc.rx_fifo.unbuffered.level[0] q=$abc$109383$new_n21969_
 .subckt nand2_x0 i0=$abc$109383$new_n21966_ i1=soc.rx_fifo.r_rdy nq=$abc$109383$new_n21970_
 .subckt buf_x4 i=$abc$109383$new_n21970_ q=$abc$109383$new_n21971_
 .subckt buf_x4 i=soc.rx_fifo.unbuffered.consume[1] q=$abc$109383$new_n21972_
-.subckt a2_x2 i0=soc.rx_fifo.unbuffered.storage[2][0] i1=$abc$109383$new_n21972_ q=$abc$109383$new_n21973_
-.subckt a3_x2 i0=$abc$109383$new_n21973_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n21974_
+.subckt and2_x1 i0=soc.rx_fifo.unbuffered.storage[2][0] i1=$abc$109383$new_n21972_ q=$abc$109383$new_n21973_
+.subckt and3_x1 i0=$abc$109383$new_n21973_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n21974_
 .subckt buf_x4 i=$abc$109383$new_n21969_ q=$abc$109383$new_n21975_
 .subckt nor2_x0 i0=soc.rx_fifo.unbuffered.consume[0] i1=$abc$109383$new_n21972_ nq=$abc$109383$new_n21976_
-.subckt a4_x2 i0=$abc$109383$new_n21976_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[0][0] q=$abc$109383$new_n21977_
+.subckt and4_x1 i0=$abc$109383$new_n21976_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[0][0] q=$abc$109383$new_n21977_
 .subckt inv_x1 i=soc.rx_fifo.unbuffered.consume[1] nq=$abc$109383$new_n21978_
-.subckt a2_x2 i0=soc.rx_fifo.unbuffered.consume[0] i1=$abc$109383$new_n21978_ q=$abc$109383$new_n21979_
-.subckt a4_x2 i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[1][0] q=$abc$109383$new_n21980_
-.subckt o4_x2 i0=$abc$109383$new_n21980_ i1=$abc$109383$new_n21977_ i2=$abc$109383$new_n21974_ i3=$abc$109383$new_n21968_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105940
-.subckt ao22_x2 i0=$abc$109383$new_n21967_ i1=$abc$109383$new_n21936_ i2=soc.bridge.csr_mux_0.uart_rx_data__r_data[1] q=$abc$109383$new_n21982_
-.subckt a2_x2 i0=soc.rx_fifo.unbuffered.storage[2][1] i1=$abc$109383$new_n21972_ q=$abc$109383$new_n21983_
-.subckt a3_x2 i0=$abc$109383$new_n21983_ i1=$abc$109383$new_n21970_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n21984_
-.subckt a4_x2 i0=$abc$109383$new_n21976_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[0][1] q=$abc$109383$new_n21985_
-.subckt a4_x2 i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[1][1] q=$abc$109383$new_n21986_
-.subckt o4_x2 i0=$abc$109383$new_n21986_ i1=$abc$109383$new_n21985_ i2=$abc$109383$new_n21984_ i3=$abc$109383$new_n21982_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105942
+.subckt and2_x1 i0=soc.rx_fifo.unbuffered.consume[0] i1=$abc$109383$new_n21978_ q=$abc$109383$new_n21979_
+.subckt and4_x1 i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[1][0] q=$abc$109383$new_n21980_
+.subckt or4_x1 i0=$abc$109383$new_n21980_ i1=$abc$109383$new_n21977_ i2=$abc$109383$new_n21974_ i3=$abc$109383$new_n21968_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105940
+.subckt and21nor_x1 i0=$abc$109383$new_n21967_ i1=$abc$109383$new_n21936_ i2=soc.bridge.csr_mux_0.uart_rx_data__r_data[1] nq=$abc$109383$new_n21982_
+.subckt and2_x1 i0=soc.rx_fifo.unbuffered.storage[2][1] i1=$abc$109383$new_n21972_ q=$abc$109383$new_n21983_
+.subckt and3_x1 i0=$abc$109383$new_n21983_ i1=$abc$109383$new_n21970_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n21984_
+.subckt and4_x1 i0=$abc$109383$new_n21976_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[0][1] q=$abc$109383$new_n21985_
+.subckt and4_x1 i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[1][1] q=$abc$109383$new_n21986_
+.subckt or4_x1 i0=$abc$109383$new_n21986_ i1=$abc$109383$new_n21985_ i2=$abc$109383$new_n21984_ i3=$abc$109383$new_n21982_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105942
 .subckt nand3_x0 i0=soc.rx_fifo.unbuffered.storage[1][2] i1=soc.rx_fifo.unbuffered.consume[0] i2=$abc$109383$new_n21978_ nq=$abc$109383$new_n21988_
 .subckt nand2_x0 i0=soc.rx_fifo.unbuffered.storage[2][2] i1=$abc$109383$new_n21972_ nq=$abc$109383$new_n21989_
-.subckt o2_x2 i0=soc.rx_fifo.unbuffered.consume[0] i1=soc.rx_fifo.unbuffered.consume[1] q=$abc$109383$new_n21990_
+.subckt or2_x1 i0=soc.rx_fifo.unbuffered.consume[0] i1=soc.rx_fifo.unbuffered.consume[1] q=$abc$109383$new_n21990_
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.storage[0][2] nq=$abc$109383$new_n21991_
-.subckt ao22_x2 i0=$abc$109383$new_n21991_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n21989_ q=$abc$109383$new_n21992_
+.subckt and21nor_x1 i0=$abc$109383$new_n21991_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n21989_ nq=$abc$109383$new_n21992_
 .subckt nand2_x0 i0=$abc$109383$new_n21992_ i1=$abc$109383$new_n21988_ nq=$abc$109383$new_n21993_
-.subckt a3_x2 i0=$abc$109383$new_n19659_ i1=$abc$109383$new_n19658_ i2=$abc$109383$new_n19655_ q=$abc$109383$new_n21994_
+.subckt and3_x1 i0=$abc$109383$new_n19659_ i1=$abc$109383$new_n19658_ i2=$abc$109383$new_n19655_ q=$abc$109383$new_n21994_
 .subckt nand2_x0 i0=$abc$109383$new_n21994_ i1=$abc$109383$new_n14915_ nq=$abc$109383$new_n21995_
-.subckt oa22_x2 i0=$abc$109383$new_n14904_ i1=$abc$109383$new_n14901_ i2=$abc$109383$new_n14741_ q=$abc$109383$new_n21996_
+.subckt or21nand_x1 i0=$abc$109383$new_n14904_ i1=$abc$109383$new_n14901_ i2=$abc$109383$new_n14741_ nq=$abc$109383$new_n21996_
 .subckt buf_x4 i=$abc$109383$new_n21996_ q=$abc$109383$new_n21997_
 .subckt nor3_x0 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n14839_ i2=$abc$109383$new_n14756_ nq=$abc$109383$new_n21998_
 .subckt nor4_x0 i0=$abc$109383$new_n14834_ i1=$abc$109383$new_n14823_ i2=$abc$109383$new_n14786_ i3=$abc$109383$new_n14950_ nq=$abc$109383$new_n21999_
 .subckt nand4_x0 i0=$abc$109383$new_n21999_ i1=$abc$109383$new_n21998_ i2=$abc$109383$new_n21960_ i3=$abc$109383$new_n19678_ nq=$abc$109383$new_n22000_
 .subckt nor3_x0 i0=$abc$109383$new_n22000_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n21995_ nq=$abc$109383$new_n22001_
 .subckt buf_x4 i=$abc$109383$new_n22001_ q=$abc$109383$new_n22002_
-.subckt a4_x2 i0=$abc$109383$new_n22002_ i1=$abc$109383$new_n21958_ i2=$abc$109383$new_n14919_ i3=$abc$109383$new_n19800_ q=$abc$109383$new_n22003_
+.subckt and4_x1 i0=$abc$109383$new_n22002_ i1=$abc$109383$new_n21958_ i2=$abc$109383$new_n14919_ i3=$abc$109383$new_n19800_ q=$abc$109383$new_n22003_
 .subckt buf_x4 i=$abc$109383$new_n14954_ q=$abc$109383$new_n22004_
-.subckt o2_x2 i0=soc.bridge.csr_bridge_0.cycle[0] i1=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n22005_
+.subckt or2_x1 i0=soc.bridge.csr_bridge_0.cycle[0] i1=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n22005_
 .subckt nor2_x0 i0=$abc$109383$new_n22005_ i1=$abc$109383$new_n22004_ nq=$abc$109383$new_n22006_
 .subckt nand3_x0 i0=$abc$109383$new_n22006_ i1=$abc$109383$new_n22003_ i2=$abc$109383$new_n20885_ nq=$abc$109383$new_n22007_
-.subckt oa22_x2 i0=soc.rx_fifo.r_rdy i1=$abc$109383$new_n22007_ i2=$abc$109383$new_n21936_ q=$abc$109383$new_n22008_
+.subckt or21nand_x1 i0=soc.rx_fifo.r_rdy i1=$abc$109383$new_n22007_ i2=$abc$109383$new_n21936_ nq=$abc$109383$new_n22008_
 .subckt buf_x4 i=$abc$109383$new_n22008_ q=$abc$109383$new_n22009_
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n21993_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105944
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n21993_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105944
 .subckt nand3_x0 i0=soc.rx_fifo.unbuffered.storage[1][3] i1=soc.rx_fifo.unbuffered.consume[0] i2=$abc$109383$new_n21978_ nq=$abc$109383$new_n22011_
 .subckt nand2_x0 i0=soc.rx_fifo.unbuffered.storage[2][3] i1=$abc$109383$new_n21972_ nq=$abc$109383$new_n22012_
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.storage[0][3] nq=$abc$109383$new_n22013_
-.subckt ao22_x2 i0=$abc$109383$new_n22013_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22012_ q=$abc$109383$new_n22014_
+.subckt and21nor_x1 i0=$abc$109383$new_n22013_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22012_ nq=$abc$109383$new_n22014_
 .subckt nand2_x0 i0=$abc$109383$new_n22014_ i1=$abc$109383$new_n22011_ nq=$abc$109383$new_n22015_
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22015_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105946
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22015_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105946
 .subckt nand3_x0 i0=soc.rx_fifo.unbuffered.storage[1][4] i1=soc.rx_fifo.unbuffered.consume[0] i2=$abc$109383$new_n21978_ nq=$abc$109383$new_n22017_
 .subckt nand2_x0 i0=soc.rx_fifo.unbuffered.storage[2][4] i1=$abc$109383$new_n21972_ nq=$abc$109383$new_n22018_
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.storage[0][4] nq=$abc$109383$new_n22019_
-.subckt ao22_x2 i0=$abc$109383$new_n22019_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22018_ q=$abc$109383$new_n22020_
+.subckt and21nor_x1 i0=$abc$109383$new_n22019_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22018_ nq=$abc$109383$new_n22020_
 .subckt nand2_x0 i0=$abc$109383$new_n22020_ i1=$abc$109383$new_n22017_ nq=$abc$109383$new_n22021_
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22021_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105948
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22021_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105948
 .subckt nand3_x0 i0=soc.rx_fifo.unbuffered.storage[1][5] i1=soc.rx_fifo.unbuffered.consume[0] i2=$abc$109383$new_n21978_ nq=$abc$109383$new_n22023_
 .subckt nand2_x0 i0=soc.rx_fifo.unbuffered.storage[2][5] i1=$abc$109383$new_n21972_ nq=$abc$109383$new_n22024_
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.storage[0][5] nq=$abc$109383$new_n22025_
-.subckt ao22_x2 i0=$abc$109383$new_n22025_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22024_ q=$abc$109383$new_n22026_
+.subckt and21nor_x1 i0=$abc$109383$new_n22025_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22024_ nq=$abc$109383$new_n22026_
 .subckt nand2_x0 i0=$abc$109383$new_n22026_ i1=$abc$109383$new_n22023_ nq=$abc$109383$new_n22027_
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22027_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105950
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22027_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105950
 .subckt nand3_x0 i0=soc.rx_fifo.unbuffered.storage[1][6] i1=soc.rx_fifo.unbuffered.consume[0] i2=$abc$109383$new_n21978_ nq=$abc$109383$new_n22029_
 .subckt nand2_x0 i0=soc.rx_fifo.unbuffered.storage[2][6] i1=$abc$109383$new_n21972_ nq=$abc$109383$new_n22030_
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.storage[0][6] nq=$abc$109383$new_n22031_
-.subckt ao22_x2 i0=$abc$109383$new_n22031_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22030_ q=$abc$109383$new_n22032_
+.subckt and21nor_x1 i0=$abc$109383$new_n22031_ i1=$abc$109383$new_n21990_ i2=$abc$109383$new_n22030_ nq=$abc$109383$new_n22032_
 .subckt nand2_x0 i0=$abc$109383$new_n22032_ i1=$abc$109383$new_n22029_ nq=$abc$109383$new_n22033_
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22033_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105952
-.subckt ao22_x2 i0=$abc$109383$new_n21967_ i1=$abc$109383$new_n21936_ i2=soc.bridge.csr_mux_0.uart_rx_data__r_data[7] q=$abc$109383$new_n22035_
-.subckt a2_x2 i0=soc.rx_fifo.unbuffered.storage[2][7] i1=$abc$109383$new_n21972_ q=$abc$109383$new_n22036_
-.subckt a3_x2 i0=$abc$109383$new_n22036_ i1=$abc$109383$new_n21970_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n22037_
-.subckt a4_x2 i0=$abc$109383$new_n21976_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[0][7] q=$abc$109383$new_n22038_
-.subckt a4_x2 i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[1][7] q=$abc$109383$new_n22039_
-.subckt o4_x2 i0=$abc$109383$new_n22039_ i1=$abc$109383$new_n22038_ i2=$abc$109383$new_n22037_ i3=$abc$109383$new_n22035_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105954
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n22033_ i1=soc.bridge.csr_mux_0.uart_rx_data__r_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105952
+.subckt and21nor_x1 i0=$abc$109383$new_n21967_ i1=$abc$109383$new_n21936_ i2=soc.bridge.csr_mux_0.uart_rx_data__r_data[7] nq=$abc$109383$new_n22035_
+.subckt and2_x1 i0=soc.rx_fifo.unbuffered.storage[2][7] i1=$abc$109383$new_n21972_ q=$abc$109383$new_n22036_
+.subckt and3_x1 i0=$abc$109383$new_n22036_ i1=$abc$109383$new_n21970_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n22037_
+.subckt and4_x1 i0=$abc$109383$new_n21976_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[0][7] q=$abc$109383$new_n22038_
+.subckt and4_x1 i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21971_ i2=$abc$109383$new_n21975_ i3=soc.rx_fifo.unbuffered.storage[1][7] q=$abc$109383$new_n22039_
+.subckt or4_x1 i0=$abc$109383$new_n22039_ i1=$abc$109383$new_n22038_ i2=$abc$109383$new_n22037_ i3=$abc$109383$new_n22035_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105954
 .subckt buf_x4 i=$abc$109383$new_n20269_ q=$abc$109383$new_n22041_
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n21584_ i3=$abc$109383$new_n22041_ nq=$abc$109383$new_n22042_
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[94][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105956
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[94][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105958
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[94][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105960
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[94][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105962
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[94][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105964
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[94][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105966
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[94][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105968
-.subckt mx2_x2 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[94][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105970
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[94][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105956
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[94][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105958
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[94][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105960
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[94][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105962
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[94][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105964
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[94][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105966
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[94][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105968
+.subckt mux2_x1 cmd=$abc$109383$new_n22042_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[94][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105970
 .subckt inv_x0 i=soc.rx_fifo.unbuffered.produce[1] nq=$abc$109383$new_n22051_
 .subckt nand4_x0 i0=$abc$109383$new_n21847_ i1=soc.rx_fifo.unbuffered.produce[0] i2=$abc$109383$new_n22051_ i3=soc.rx.rdy nq=$abc$109383$new_n22052_
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[0] i1=soc.rx_fifo.unbuffered.storage[1][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105972
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[1] i1=soc.rx_fifo.unbuffered.storage[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105974
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[2] i1=soc.rx_fifo.unbuffered.storage[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105976
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[3] i1=soc.rx_fifo.unbuffered.storage[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105978
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[4] i1=soc.rx_fifo.unbuffered.storage[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105980
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[5] i1=soc.rx_fifo.unbuffered.storage[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105982
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[6] i1=soc.rx_fifo.unbuffered.storage[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105984
-.subckt mx2_x2 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[7] i1=soc.rx_fifo.unbuffered.storage[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105986
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[0] i1=soc.rx_fifo.unbuffered.storage[1][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105972
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[1] i1=soc.rx_fifo.unbuffered.storage[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105974
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[2] i1=soc.rx_fifo.unbuffered.storage[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105976
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[3] i1=soc.rx_fifo.unbuffered.storage[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105978
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[4] i1=soc.rx_fifo.unbuffered.storage[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105980
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[5] i1=soc.rx_fifo.unbuffered.storage[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105982
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[6] i1=soc.rx_fifo.unbuffered.storage[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105984
+.subckt mux2_x1 cmd=$abc$109383$new_n22052_ i0=soc.rx.data[7] i1=soc.rx_fifo.unbuffered.storage[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105986
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n22061_
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n22061_ i3=$abc$109383$new_n22041_ nq=$abc$109383$new_n22062_
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[94][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105988
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[94][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105990
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[94][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105992
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[94][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105994
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[94][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105996
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[94][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105998
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[94][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106000
-.subckt mx2_x2 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[94][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106002
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[94][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105988
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[94][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105990
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[94][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105992
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[94][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105994
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[94][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105996
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[94][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105998
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[94][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106000
+.subckt mux2_x1 cmd=$abc$109383$new_n22062_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[94][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106002
 .subckt nand4_x0 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n21845_ i2=$abc$109383$new_n22051_ i3=soc.rx.rdy nq=$abc$109383$new_n22071_
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[0] i1=soc.rx_fifo.unbuffered.storage[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106004
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[1] i1=soc.rx_fifo.unbuffered.storage[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106006
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[2] i1=soc.rx_fifo.unbuffered.storage[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106008
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[3] i1=soc.rx_fifo.unbuffered.storage[0][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106010
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[4] i1=soc.rx_fifo.unbuffered.storage[0][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106012
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[5] i1=soc.rx_fifo.unbuffered.storage[0][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106014
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[6] i1=soc.rx_fifo.unbuffered.storage[0][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106016
-.subckt mx2_x2 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[7] i1=soc.rx_fifo.unbuffered.storage[0][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106018
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[0] i1=soc.rx_fifo.unbuffered.storage[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106004
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[1] i1=soc.rx_fifo.unbuffered.storage[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106006
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[2] i1=soc.rx_fifo.unbuffered.storage[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106008
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[3] i1=soc.rx_fifo.unbuffered.storage[0][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106010
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[4] i1=soc.rx_fifo.unbuffered.storage[0][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106012
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[5] i1=soc.rx_fifo.unbuffered.storage[0][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106014
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[6] i1=soc.rx_fifo.unbuffered.storage[0][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106016
+.subckt mux2_x1 cmd=$abc$109383$new_n22071_ i0=soc.rx.data[7] i1=soc.rx_fifo.unbuffered.storage[0][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106018
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n22080_
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n22041_ i3=$abc$109383$new_n22080_ nq=$abc$109383$new_n22081_
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[94][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106020
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[94][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106022
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[94][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106024
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[94][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106026
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[94][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106028
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[94][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106030
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[94][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106032
-.subckt mx2_x2 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[94][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106034
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[94][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106020
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[94][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106022
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[94][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106024
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[94][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106026
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[94][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106028
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[94][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106030
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[94][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106032
+.subckt mux2_x1 cmd=$abc$109383$new_n22081_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[94][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106034
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n21786_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n22090_
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[9][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106036
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[9][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106038
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[9][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106040
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[9][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106042
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[9][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106044
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[9][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106046
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[9][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106048
-.subckt mx2_x2 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[9][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106050
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[9][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106036
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[9][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106038
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[9][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106040
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[9][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106042
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[9][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106044
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[9][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106046
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[9][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106048
+.subckt mux2_x1 cmd=$abc$109383$new_n22090_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[9][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106050
 .subckt nand4_x0 i0=$abc$109383$new_n20304_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n19821_ nq=$abc$109383$new_n22099_
-.subckt a2_x2 i0=$abc$109383$new_n22099_ i1=soc.cpu.minerva.gprf.mem._mem[6][0] q=$abc$109383$new_n22100_
-.subckt a4_x2 i0=$abc$109383$new_n20309_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n22101_
+.subckt and2_x1 i0=$abc$109383$new_n22099_ i1=soc.cpu.minerva.gprf.mem._mem[6][0] q=$abc$109383$new_n22100_
+.subckt and4_x1 i0=$abc$109383$new_n20309_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n22101_
 .subckt buf_x4 i=$abc$109383$new_n19869_ q=$abc$109383$new_n22102_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22101_ q=$abc$109383$new_n22103_
-.subckt o2_x2 i0=$abc$109383$new_n22103_ i1=$abc$109383$new_n22100_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106052
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22101_ nq=$abc$109383$new_n22103_
+.subckt or2_x1 i0=$abc$109383$new_n22103_ i1=$abc$109383$new_n22100_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106052
 .subckt buf_x4 i=$abc$109383$new_n19898_ q=$abc$109383$new_n22105_
 .subckt buf_x4 i=$abc$109383$new_n22099_ q=$abc$109383$new_n22106_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[6][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106054
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[6][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106056
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[6][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106054
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[6][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106056
 .subckt buf_x4 i=$abc$109383$new_n19937_ q=$abc$109383$new_n22109_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[6][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106058
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[6][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106060
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[6][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106058
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[6][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106060
 .subckt buf_x4 i=$abc$109383$new_n19973_ q=$abc$109383$new_n22112_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[6][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106062
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[6][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106062
 .subckt buf_x4 i=$abc$109383$new_n19990_ q=$abc$109383$new_n22114_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[6][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106064
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[6][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106064
 .subckt buf_x4 i=$abc$109383$new_n20008_ q=$abc$109383$new_n22116_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[6][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106066
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[6][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106066
 .subckt buf_x4 i=$abc$109383$new_n20027_ q=$abc$109383$new_n22118_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[6][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106068
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[6][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106068
 .subckt buf_x4 i=$abc$109383$new_n20039_ q=$abc$109383$new_n22120_
-.subckt mx2_x2 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[6][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106070
+.subckt mux2_x1 cmd=$abc$109383$new_n22106_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[6][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106070
 .subckt buf_x4 i=$abc$109383$new_n20052_ q=$abc$109383$new_n22122_
 .subckt buf_x4 i=$abc$109383$new_n22099_ q=$abc$109383$new_n22123_
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[6][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106072
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[6][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106072
 .subckt buf_x4 i=$abc$109383$new_n20067_ q=$abc$109383$new_n22125_
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[6][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106074
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[6][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106074
 .subckt buf_x4 i=$abc$109383$new_n20080_ q=$abc$109383$new_n22127_
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[6][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106076
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[6][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106076
 .subckt buf_x4 i=$abc$109383$new_n20094_ q=$abc$109383$new_n22129_
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[6][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106078
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[6][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106078
 .subckt buf_x4 i=$abc$109383$new_n20108_ q=$abc$109383$new_n22131_
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[6][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106080
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[6][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106080
 .subckt buf_x4 i=$abc$109383$new_n20121_ q=$abc$109383$new_n22133_
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[6][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106082
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[6][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106084
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[6][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106086
-.subckt mx2_x2 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[6][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106088
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[6][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106082
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[6][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106084
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[6][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106086
+.subckt mux2_x1 cmd=$abc$109383$new_n22123_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[6][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106088
 .subckt buf_x4 i=$abc$109383$new_n22099_ q=$abc$109383$new_n22138_
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[6][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106090
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[6][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106092
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[6][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106094
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[6][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106096
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[6][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106098
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[6][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106100
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[6][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106102
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[6][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106104
-.subckt mx2_x2 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[6][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106106
-.subckt mx2_x2 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[6][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106108
-.subckt mx2_x2 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[6][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106110
-.subckt mx2_x2 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[6][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106112
-.subckt mx2_x2 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[6][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106114
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[6][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106090
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[6][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106092
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[6][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106094
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[6][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106096
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[6][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106098
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[6][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106100
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[6][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106102
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[6][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106104
+.subckt mux2_x1 cmd=$abc$109383$new_n22138_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[6][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106106
+.subckt mux2_x1 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[6][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106108
+.subckt mux2_x1 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[6][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106110
+.subckt mux2_x1 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[6][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106112
+.subckt mux2_x1 cmd=$abc$109383$new_n22099_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[6][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106114
 .subckt nand4_x0 i0=$abc$109383$new_n19832_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20445_ nq=$abc$109383$new_n22152_
-.subckt a2_x2 i0=$abc$109383$new_n22152_ i1=soc.cpu.minerva.gprf.mem._mem[1][0] q=$abc$109383$new_n22153_
-.subckt a4_x2 i0=$abc$109383$new_n19839_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20445_ q=$abc$109383$new_n22154_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22154_ q=$abc$109383$new_n22155_
-.subckt o2_x2 i0=$abc$109383$new_n22155_ i1=$abc$109383$new_n22153_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106116
+.subckt and2_x1 i0=$abc$109383$new_n22152_ i1=soc.cpu.minerva.gprf.mem._mem[1][0] q=$abc$109383$new_n22153_
+.subckt and4_x1 i0=$abc$109383$new_n19839_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20445_ q=$abc$109383$new_n22154_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22154_ nq=$abc$109383$new_n22155_
+.subckt or2_x1 i0=$abc$109383$new_n22155_ i1=$abc$109383$new_n22153_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106116
 .subckt buf_x4 i=$abc$109383$new_n22152_ q=$abc$109383$new_n22157_
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106118
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106120
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106122
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106124
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106126
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106128
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106130
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[1][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106132
-.subckt mx2_x2 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[1][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106134
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106118
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106120
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106122
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106124
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106126
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106128
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106130
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[1][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106132
+.subckt mux2_x1 cmd=$abc$109383$new_n22157_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[1][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106134
 .subckt buf_x4 i=$abc$109383$new_n22152_ q=$abc$109383$new_n22167_
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[1][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106136
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[1][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106138
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[1][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106140
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[1][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106142
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[1][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106144
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[1][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106146
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[1][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106148
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[1][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106150
-.subckt mx2_x2 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[1][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106152
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[1][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106136
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[1][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106138
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[1][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106140
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[1][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106142
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[1][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106144
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[1][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106146
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[1][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106148
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[1][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106150
+.subckt mux2_x1 cmd=$abc$109383$new_n22167_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[1][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106152
 .subckt buf_x4 i=$abc$109383$new_n22152_ q=$abc$109383$new_n22177_
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[1][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106154
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[1][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106156
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[1][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106158
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[1][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106160
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[1][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106162
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[1][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106164
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[1][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106166
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[1][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106168
-.subckt mx2_x2 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[1][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106170
-.subckt mx2_x2 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[1][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106172
-.subckt mx2_x2 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[1][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106174
-.subckt mx2_x2 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[1][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106176
-.subckt mx2_x2 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[1][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106178
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[1][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106154
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[1][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106156
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[1][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106158
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[1][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106160
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[1][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106162
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[1][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106164
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[1][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106166
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[1][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106168
+.subckt mux2_x1 cmd=$abc$109383$new_n22177_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[1][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106170
+.subckt mux2_x1 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[1][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106172
+.subckt mux2_x1 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[1][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106174
+.subckt mux2_x1 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[1][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106176
+.subckt mux2_x1 cmd=$abc$109383$new_n22152_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[1][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106178
 .subckt nand3_x0 i0=$abc$109383$new_n21611_ i1=$abc$109383$new_n19746_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n22191_
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[98][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106180
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[98][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106182
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[98][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106184
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[98][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106186
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[98][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106188
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[98][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106190
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[98][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106192
-.subckt mx2_x2 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[98][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106194
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[98][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106180
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[98][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106182
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[98][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106184
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[98][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106186
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[98][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106188
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[98][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106190
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[98][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106192
+.subckt mux2_x1 cmd=$abc$109383$new_n22191_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[98][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106194
 .subckt buf_x4 i=$abc$109383$new_n20243_ q=$abc$109383$new_n22200_
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n22200_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n22201_
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[98][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106196
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[98][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106198
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[98][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106200
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[98][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106202
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[98][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106204
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[98][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106206
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[98][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106208
-.subckt mx2_x2 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[98][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106210
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[98][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106196
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[98][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106198
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[98][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106200
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[98][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106202
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[98][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106204
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[98][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106206
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[98][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106208
+.subckt mux2_x1 cmd=$abc$109383$new_n22201_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[98][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106210
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n20548_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n22210_
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[99][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106212
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[99][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106214
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[99][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106216
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[99][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106218
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[99][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106220
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[99][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106222
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[99][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106224
-.subckt mx2_x2 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[99][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106226
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[99][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106212
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[99][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106214
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[99][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106216
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[99][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106218
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[99][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106220
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[99][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106222
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[99][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106224
+.subckt mux2_x1 cmd=$abc$109383$new_n22210_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[99][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106226
 .subckt nand3_x0 i0=$abc$109383$new_n21787_ i1=$abc$109383$new_n22200_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n22219_
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[98][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106228
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[98][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106230
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[98][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106232
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[98][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106234
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[98][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106236
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[98][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106238
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[98][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106240
-.subckt mx2_x2 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[98][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106242
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[98][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106228
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[98][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106230
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[98][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106232
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[98][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106234
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[98][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106236
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[98][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106238
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[98][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106240
+.subckt mux2_x1 cmd=$abc$109383$new_n22219_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[98][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106242
 .subckt buf_x4 i=$abc$109383$new_n20839_ q=$abc$109383$new_n22228_
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n21159_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n22229_
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[9][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106248
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[9][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106250
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[9][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106252
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[9][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106254
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[9][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106256
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[9][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106258
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[9][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106260
-.subckt mx2_x2 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[9][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106262
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[9][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106248
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[9][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106250
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[9][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106252
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[9][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106254
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[9][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106256
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[9][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106258
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[9][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106260
+.subckt mux2_x1 cmd=$abc$109383$new_n22229_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[9][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106262
 .subckt buf_x4 i=$abc$109383$new_n21158_ q=$abc$109383$new_n22238_
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n22239_
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[99][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106264
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[99][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106266
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[99][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106268
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[99][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106270
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[99][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106272
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[99][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106274
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[99][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106276
-.subckt mx2_x2 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[99][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106278
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[99][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106264
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[99][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106266
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[99][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106268
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[99][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106270
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[99][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106272
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[99][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106274
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[99][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106276
+.subckt mux2_x1 cmd=$abc$109383$new_n22239_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[99][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106278
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n22248_
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[99][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106280
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[99][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106282
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[99][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106284
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[99][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106286
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[99][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106288
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[99][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106290
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[99][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106292
-.subckt mx2_x2 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[99][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106294
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21209_ i1=soc.ram.ram[99][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106280
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21212_ i1=soc.ram.ram[99][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106282
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21214_ i1=soc.ram.ram[99][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106284
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21216_ i1=soc.ram.ram[99][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106286
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21218_ i1=soc.ram.ram[99][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106288
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21221_ i1=soc.ram.ram[99][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106290
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21223_ i1=soc.ram.ram[99][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106292
+.subckt mux2_x1 cmd=$abc$109383$new_n22248_ i0=$abc$109383$new_n21225_ i1=soc.ram.ram[99][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106294
 .subckt nand2_x0 i0=$abc$109383$new_n21159_ i1=$abc$109383$new_n19784_ nq=$abc$109383$new_n22257_
 .subckt buf_x4 i=$abc$109383$new_n22257_ q=$abc$109383$new_n22258_
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[1][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106300
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[1][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106302
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[1][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106304
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[1][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106306
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[1][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106308
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[1][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106310
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[1][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106312
-.subckt mx2_x2 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[1][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106314
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[1][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106300
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[1][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106302
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[1][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106304
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[1][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106306
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[1][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106308
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[1][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106310
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[1][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106312
+.subckt mux2_x1 cmd=$abc$109383$new_n22258_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[1][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106314
 .subckt buf_x4 i=$abc$109383$new_n20228_ q=$abc$109383$new_n22267_
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22268_
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[106][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106316
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[106][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106318
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[106][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106320
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[106][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106322
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[106][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106324
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[106][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106326
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[106][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106328
-.subckt mx2_x2 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[106][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106330
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[106][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106316
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[106][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106318
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[106][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106320
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[106][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106322
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[106][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106324
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[106][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106326
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[106][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106328
+.subckt mux2_x1 cmd=$abc$109383$new_n22268_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[106][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106330
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n22277_
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[19][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108044
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[19][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108046
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[19][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108048
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[19][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108050
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[19][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108052
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[19][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108054
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[19][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108056
-.subckt mx2_x2 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[19][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108058
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[19][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108044
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[19][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108046
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[19][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108048
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[19][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108050
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[19][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108052
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[19][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108054
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[19][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108056
+.subckt mux2_x1 cmd=$abc$109383$new_n22277_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[19][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108058
 .subckt buf_x4 i=$abc$109383$new_n19751_ q=$abc$109383$new_n22286_
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n22286_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n22287_
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[15][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108144
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[15][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108146
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[15][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108148
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[15][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108150
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[15][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108152
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[15][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108154
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[15][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108156
-.subckt mx2_x2 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[15][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108158
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[15][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108144
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[15][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108146
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[15][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108148
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[15][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108150
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[15][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108152
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[15][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108154
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[15][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108156
+.subckt mux2_x1 cmd=$abc$109383$new_n22287_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[15][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108158
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n21250_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22296_
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[122][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108206
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[122][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108208
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[122][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108210
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[122][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108212
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[122][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108214
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[122][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108216
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[122][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108218
-.subckt mx2_x2 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[122][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108220
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21492_ i1=soc.ram.ram[122][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108206
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21496_ i1=soc.ram.ram[122][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108208
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21499_ i1=soc.ram.ram[122][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108210
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[122][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108212
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21503_ i1=soc.ram.ram[122][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108214
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21506_ i1=soc.ram.ram[122][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108216
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21509_ i1=soc.ram.ram[122][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108218
+.subckt mux2_x1 cmd=$abc$109383$new_n22296_ i0=$abc$109383$new_n21512_ i1=soc.ram.ram[122][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108220
 .subckt nand3_x0 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20593_ i2=$abc$109383$new_n21514_ nq=$abc$109383$new_n22305_
-.subckt a2_x2 i0=$abc$109383$new_n22305_ i1=soc.cpu.minerva.gprf.mem._mem[31][0] q=$abc$109383$new_n22306_
-.subckt a3_x2 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n21514_ q=$abc$109383$new_n22307_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22307_ q=$abc$109383$new_n22308_
-.subckt o2_x2 i0=$abc$109383$new_n22308_ i1=$abc$109383$new_n22306_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108222
+.subckt and2_x1 i0=$abc$109383$new_n22305_ i1=soc.cpu.minerva.gprf.mem._mem[31][0] q=$abc$109383$new_n22306_
+.subckt and3_x1 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20594_ i2=$abc$109383$new_n21514_ q=$abc$109383$new_n22307_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22307_ nq=$abc$109383$new_n22308_
+.subckt or2_x1 i0=$abc$109383$new_n22308_ i1=$abc$109383$new_n22306_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108222
 .subckt buf_x4 i=$abc$109383$new_n22305_ q=$abc$109383$new_n22310_
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[31][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108224
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[31][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108226
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[31][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108228
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[31][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108230
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[31][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108232
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[31][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108234
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[31][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108236
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[31][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108238
-.subckt mx2_x2 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[31][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108240
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[31][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108224
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[31][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108226
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[31][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108228
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[31][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108230
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[31][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108232
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[31][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108234
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[31][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108236
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[31][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108238
+.subckt mux2_x1 cmd=$abc$109383$new_n22310_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[31][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108240
 .subckt buf_x4 i=$abc$109383$new_n22305_ q=$abc$109383$new_n22320_
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[31][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108242
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[31][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108244
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[31][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108246
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[31][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108248
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[31][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108250
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[31][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108252
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[31][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108254
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[31][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108256
-.subckt mx2_x2 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[31][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108258
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[31][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108242
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[31][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108244
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[31][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108246
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[31][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108248
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[31][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108250
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[31][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108252
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[31][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108254
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[31][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108256
+.subckt mux2_x1 cmd=$abc$109383$new_n22320_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[31][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108258
 .subckt buf_x4 i=$abc$109383$new_n22305_ q=$abc$109383$new_n22330_
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[31][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108260
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[31][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108262
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[31][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108264
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[31][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108266
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[31][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108268
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[31][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108270
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[31][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108272
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[31][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108274
-.subckt mx2_x2 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[31][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108276
-.subckt mx2_x2 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[31][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108278
-.subckt mx2_x2 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[31][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108280
-.subckt mx2_x2 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[31][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108282
-.subckt mx2_x2 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[31][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108284
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[31][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108260
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[31][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108262
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[31][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108264
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[31][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108266
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[31][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108268
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[31][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108270
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[31][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108272
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[31][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108274
+.subckt mux2_x1 cmd=$abc$109383$new_n22330_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[31][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108276
+.subckt mux2_x1 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[31][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108278
+.subckt mux2_x1 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[31][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108280
+.subckt mux2_x1 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[31][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108282
+.subckt mux2_x1 cmd=$abc$109383$new_n22305_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[31][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108284
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n21585_ i3=$abc$109383$new_n22061_ nq=$abc$109383$new_n22344_
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[93][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108354
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[93][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108356
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[93][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108358
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[93][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108360
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[93][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108362
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[93][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108364
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[93][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108366
-.subckt mx2_x2 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[93][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108368
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[93][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108354
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[93][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108356
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[93][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108358
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[93][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108360
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21794_ i1=soc.ram.ram[93][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108362
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21796_ i1=soc.ram.ram[93][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108364
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21799_ i1=soc.ram.ram[93][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108366
+.subckt mux2_x1 cmd=$abc$109383$new_n22344_ i0=$abc$109383$new_n21802_ i1=soc.ram.ram[93][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108368
 .subckt nand4_x0 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20760_ nq=$abc$109383$new_n22353_
-.subckt a2_x2 i0=$abc$109383$new_n22353_ i1=soc.cpu.minerva.gprf.mem._mem[24][0] q=$abc$109383$new_n22354_
-.subckt a4_x2 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n22355_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22355_ q=$abc$109383$new_n22356_
-.subckt o2_x2 i0=$abc$109383$new_n22356_ i1=$abc$109383$new_n22354_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108370
+.subckt and2_x1 i0=$abc$109383$new_n22353_ i1=soc.cpu.minerva.gprf.mem._mem[24][0] q=$abc$109383$new_n22354_
+.subckt and4_x1 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n22355_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22355_ nq=$abc$109383$new_n22356_
+.subckt or2_x1 i0=$abc$109383$new_n22356_ i1=$abc$109383$new_n22354_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108370
 .subckt buf_x4 i=$abc$109383$new_n22353_ q=$abc$109383$new_n22358_
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[24][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108372
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[24][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108374
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[24][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108376
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[24][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108378
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[24][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108380
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[24][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108382
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[24][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108384
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[24][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108386
-.subckt mx2_x2 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[24][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108388
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[24][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108372
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[24][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108374
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[24][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108376
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[24][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108378
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[24][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108380
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[24][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108382
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[24][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108384
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[24][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108386
+.subckt mux2_x1 cmd=$abc$109383$new_n22358_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[24][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108388
 .subckt buf_x4 i=$abc$109383$new_n22353_ q=$abc$109383$new_n22368_
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[24][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108390
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[24][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108392
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[24][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108394
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[24][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108396
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[24][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108398
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[24][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108400
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[24][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108402
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[24][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108404
-.subckt mx2_x2 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[24][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108406
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[24][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108390
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[24][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108392
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[24][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108394
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[24][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108396
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[24][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108398
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[24][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108400
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[24][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108402
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[24][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108404
+.subckt mux2_x1 cmd=$abc$109383$new_n22368_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[24][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108406
 .subckt buf_x4 i=$abc$109383$new_n22353_ q=$abc$109383$new_n22378_
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[24][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108408
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[24][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108410
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[24][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108412
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[24][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108414
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[24][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108416
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[24][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108418
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[24][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108420
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[24][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108422
-.subckt mx2_x2 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[24][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108424
-.subckt mx2_x2 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[24][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108426
-.subckt mx2_x2 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[24][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108428
-.subckt mx2_x2 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[24][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108430
-.subckt mx2_x2 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[24][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108432
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[24][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108408
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[24][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108410
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[24][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108412
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[24][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108414
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[24][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108416
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[24][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108418
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[24][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108420
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[24][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108422
+.subckt mux2_x1 cmd=$abc$109383$new_n22378_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[24][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108424
+.subckt mux2_x1 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[24][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108426
+.subckt mux2_x1 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[24][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108428
+.subckt mux2_x1 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[24][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108430
+.subckt mux2_x1 cmd=$abc$109383$new_n22353_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[24][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108432
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n22392_
 .subckt buf_x4 i=$abc$109383$new_n20886_ q=$abc$109383$new_n22393_
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n20805_ i2=$abc$109383$new_n21401_ nq=$abc$109383$new_n22394_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[13][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108680
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[13][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108680
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n22396_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[13][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108682
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[13][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108682
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n22398_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[13][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108684
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[13][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108686
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[13][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108684
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n21578_ i1=soc.ram.ram[13][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108686
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n22401_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[13][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108688
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[13][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108688
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n22403_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[13][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108690
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[13][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108690
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n22405_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[13][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108692
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[13][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108692
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n22407_
-.subckt mx2_x2 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[13][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108694
+.subckt mux2_x1 cmd=$abc$109383$new_n22394_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[13][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108694
 .subckt buf_x4 i=$abc$109383$new_n20254_ q=$abc$109383$new_n22409_
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n22410_
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n21785_ nq=$abc$109383$new_n22411_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[101][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108696
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[101][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108696
 .subckt buf_x4 i=$abc$109383$new_n20273_ q=$abc$109383$new_n22413_
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n22414_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[101][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108698
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[101][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108698
 .subckt buf_x4 i=$abc$109383$new_n20277_ q=$abc$109383$new_n22416_
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n22417_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[101][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108700
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[101][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108700
 .subckt buf_x4 i=$abc$109383$new_n20281_ q=$abc$109383$new_n22419_
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n22420_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[101][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108702
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[101][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108702
 .subckt buf_x4 i=$abc$109383$new_n20285_ q=$abc$109383$new_n22422_
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n22423_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[101][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108704
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[101][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108704
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n22425_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[101][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108706
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[101][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108706
 .subckt buf_x4 i=$abc$109383$new_n20293_ q=$abc$109383$new_n22427_
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n22428_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[101][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108708
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[101][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108708
 .subckt buf_x4 i=$abc$109383$new_n20297_ q=$abc$109383$new_n22430_
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n22431_
-.subckt mx2_x2 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[101][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108710
+.subckt mux2_x1 cmd=$abc$109383$new_n22411_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[101][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108710
 .subckt nand3_x0 i0=$abc$109383$new_n20593_ i1=$abc$109383$new_n21514_ i2=$abc$109383$new_n19839_ nq=$abc$109383$new_n22433_
-.subckt a2_x2 i0=$abc$109383$new_n22433_ i1=soc.cpu.minerva.gprf.mem._mem[29][0] q=$abc$109383$new_n22434_
-.subckt a3_x2 i0=$abc$109383$new_n20594_ i1=$abc$109383$new_n21514_ i2=$abc$109383$new_n19839_ q=$abc$109383$new_n22435_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22435_ q=$abc$109383$new_n22436_
-.subckt o2_x2 i0=$abc$109383$new_n22436_ i1=$abc$109383$new_n22434_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108712
+.subckt and2_x1 i0=$abc$109383$new_n22433_ i1=soc.cpu.minerva.gprf.mem._mem[29][0] q=$abc$109383$new_n22434_
+.subckt and3_x1 i0=$abc$109383$new_n20594_ i1=$abc$109383$new_n21514_ i2=$abc$109383$new_n19839_ q=$abc$109383$new_n22435_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22435_ nq=$abc$109383$new_n22436_
+.subckt or2_x1 i0=$abc$109383$new_n22436_ i1=$abc$109383$new_n22434_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108712
 .subckt buf_x4 i=$abc$109383$new_n22433_ q=$abc$109383$new_n22438_
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[29][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108714
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[29][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108716
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[29][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108718
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[29][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108720
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[29][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108722
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[29][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108724
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[29][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108726
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[29][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108728
-.subckt mx2_x2 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[29][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108730
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[29][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108714
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[29][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108716
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[29][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108718
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[29][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108720
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[29][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108722
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[29][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108724
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[29][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108726
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[29][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108728
+.subckt mux2_x1 cmd=$abc$109383$new_n22438_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[29][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108730
 .subckt buf_x4 i=$abc$109383$new_n22433_ q=$abc$109383$new_n22448_
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[29][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108732
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[29][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108734
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[29][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108736
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[29][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108738
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[29][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108740
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[29][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108742
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[29][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108744
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[29][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108746
-.subckt mx2_x2 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[29][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108748
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[29][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108732
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[29][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108734
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[29][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108736
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[29][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108738
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[29][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108740
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[29][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108742
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[29][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108744
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[29][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108746
+.subckt mux2_x1 cmd=$abc$109383$new_n22448_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[29][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108748
 .subckt buf_x4 i=$abc$109383$new_n22433_ q=$abc$109383$new_n22458_
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[29][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108750
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[29][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108752
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[29][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108754
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[29][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108756
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[29][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108758
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[29][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108760
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[29][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108762
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[29][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108764
-.subckt mx2_x2 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[29][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108766
-.subckt mx2_x2 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[29][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108768
-.subckt mx2_x2 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[29][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108770
-.subckt mx2_x2 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[29][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108772
-.subckt mx2_x2 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[29][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108774
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[29][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108750
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[29][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108752
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[29][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108754
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[29][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108756
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[29][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108758
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[29][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108760
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[29][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108762
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[29][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108764
+.subckt mux2_x1 cmd=$abc$109383$new_n22458_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[29][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108766
+.subckt mux2_x1 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[29][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108768
+.subckt mux2_x1 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[29][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108770
+.subckt mux2_x1 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[29][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108772
+.subckt mux2_x1 cmd=$abc$109383$new_n22433_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[29][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108774
 .subckt buf_x4 i=$abc$109383$new_n19825_ q=$abc$109383$new_n22472_
 .subckt buf_x4 i=$abc$109383$new_n19828_ q=$abc$109383$new_n22473_
 .subckt nand4_x0 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n20499_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n22474_
-.subckt a2_x2 i0=$abc$109383$new_n22474_ i1=soc.cpu.minerva.gprf.mem._mem[27][0] q=$abc$109383$new_n22475_
-.subckt a4_x2 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n20502_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n22476_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22476_ q=$abc$109383$new_n22477_
-.subckt o2_x2 i0=$abc$109383$new_n22477_ i1=$abc$109383$new_n22475_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108776
+.subckt and2_x1 i0=$abc$109383$new_n22474_ i1=soc.cpu.minerva.gprf.mem._mem[27][0] q=$abc$109383$new_n22475_
+.subckt and4_x1 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n20502_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n22476_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22476_ nq=$abc$109383$new_n22477_
+.subckt or2_x1 i0=$abc$109383$new_n22477_ i1=$abc$109383$new_n22475_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108776
 .subckt buf_x4 i=$abc$109383$new_n22474_ q=$abc$109383$new_n22479_
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[27][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108778
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[27][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108780
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[27][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108782
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[27][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108784
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[27][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108786
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[27][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108788
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[27][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108790
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[27][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108792
-.subckt mx2_x2 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[27][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108794
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[27][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108778
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[27][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108780
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[27][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108782
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[27][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108784
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[27][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108786
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[27][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108788
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[27][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108790
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[27][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108792
+.subckt mux2_x1 cmd=$abc$109383$new_n22479_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[27][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108794
 .subckt buf_x4 i=$abc$109383$new_n22474_ q=$abc$109383$new_n22489_
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[27][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108796
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[27][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108798
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[27][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108800
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[27][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108802
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[27][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108804
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[27][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108806
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[27][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108808
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[27][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108810
-.subckt mx2_x2 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[27][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108812
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[27][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108796
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[27][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108798
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[27][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108800
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[27][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108802
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[27][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108804
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[27][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108806
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[27][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108808
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[27][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108810
+.subckt mux2_x1 cmd=$abc$109383$new_n22489_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[27][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108812
 .subckt buf_x4 i=$abc$109383$new_n22474_ q=$abc$109383$new_n22499_
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[27][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108814
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[27][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108816
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[27][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108818
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[27][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108820
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[27][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108822
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[27][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108824
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[27][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108826
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[27][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108828
-.subckt mx2_x2 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[27][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108830
-.subckt mx2_x2 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[27][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108832
-.subckt mx2_x2 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[27][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108834
-.subckt mx2_x2 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[27][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108836
-.subckt mx2_x2 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[27][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108838
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[27][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108814
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[27][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108816
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[27][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108818
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[27][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108820
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[27][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108822
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[27][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108824
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[27][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108826
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[27][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108828
+.subckt mux2_x1 cmd=$abc$109383$new_n22499_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[27][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108830
+.subckt mux2_x1 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[27][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108832
+.subckt mux2_x1 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[27][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108834
+.subckt mux2_x1 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[27][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108836
+.subckt mux2_x1 cmd=$abc$109383$new_n22474_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[27][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108838
 .subckt nand4_x0 i0=$abc$109383$new_n21344_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19744_ i3=$abc$109383$new_n19736_ nq=$abc$109383$new_n22513_
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[0][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108840
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[0][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108842
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[0][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108844
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[0][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108846
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[0][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108848
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[0][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108850
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[0][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108852
-.subckt mx2_x2 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[0][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108854
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[0][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108840
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[0][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108842
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[0][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108844
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[0][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108846
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[0][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108848
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[0][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108850
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[0][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108852
+.subckt mux2_x1 cmd=$abc$109383$new_n22513_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[0][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108854
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n22061_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22522_
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[123][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108902
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[123][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108904
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[123][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108906
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[123][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108908
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21858_ i1=soc.ram.ram[123][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108902
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21863_ i1=soc.ram.ram[123][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108904
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21866_ i1=soc.ram.ram[123][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108906
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n21869_ i1=soc.ram.ram[123][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108908
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n22527_
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[123][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108910
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[123][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108910
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n22529_
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[123][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108912
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[123][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108912
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n22531_
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[123][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108914
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[123][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108914
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n22533_
-.subckt mx2_x2 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[123][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108916
+.subckt mux2_x1 cmd=$abc$109383$new_n22522_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[123][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108916
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n21584_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22535_
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[123][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108918
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[123][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108920
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[123][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108922
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[123][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108918
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[123][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108920
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[123][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108922
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n22539_
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[123][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108924
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[123][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108926
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[123][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108928
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[123][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108930
-.subckt mx2_x2 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[123][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108932
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[123][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108924
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[123][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108926
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[123][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108928
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[123][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108930
+.subckt mux2_x1 cmd=$abc$109383$new_n22535_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[123][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108932
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n21067_ nq=$abc$109383$new_n22545_
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[124][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108934
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[124][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108936
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[124][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108938
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[124][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108940
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[124][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108942
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[124][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108944
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[124][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108946
-.subckt mx2_x2 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[124][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108948
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[124][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108934
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[124][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108936
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[124][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108938
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[124][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108940
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[124][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108942
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[124][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108944
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[124][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108946
+.subckt mux2_x1 cmd=$abc$109383$new_n22545_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[124][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108948
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n22554_
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n22555_
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22556_
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[124][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108950
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[124][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108950
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n22558_
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[124][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108952
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[124][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108952
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n22560_
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[124][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108954
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[124][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108954
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n22562_
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[124][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108956
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[124][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108958
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[124][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108960
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[124][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108962
-.subckt mx2_x2 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[124][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108964
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[124][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108956
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[124][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108958
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[124][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108960
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[124][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108962
+.subckt mux2_x1 cmd=$abc$109383$new_n22556_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[124][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108964
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22568_
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[124][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108966
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[124][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108968
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[124][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108970
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[124][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108972
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[124][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108974
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[124][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108976
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[124][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108978
-.subckt mx2_x2 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[124][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108980
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[124][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108966
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[124][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108968
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[124][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108970
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[124][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108972
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[124][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108974
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[124][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108976
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[124][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108978
+.subckt mux2_x1 cmd=$abc$109383$new_n22568_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[124][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108980
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n21585_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22577_
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[125][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108982
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[125][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108984
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[125][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108986
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[125][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108988
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[125][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108990
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[125][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108992
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[125][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108994
-.subckt mx2_x2 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[125][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108996
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[125][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108982
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[125][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108984
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[125][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108986
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[125][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108988
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[125][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108990
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[125][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108992
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[125][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108994
+.subckt mux2_x1 cmd=$abc$109383$new_n22577_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[125][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108996
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22586_
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[107][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108998
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[107][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109000
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[107][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109002
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[107][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109004
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[107][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109006
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[107][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109008
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[107][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109010
-.subckt mx2_x2 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[107][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109012
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[107][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108998
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[107][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109000
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[107][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109002
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[107][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109004
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[107][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109006
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[107][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109008
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[107][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109010
+.subckt mux2_x1 cmd=$abc$109383$new_n22586_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[107][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109012
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22595_
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[107][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109222
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[107][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109224
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[107][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109226
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[107][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109228
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[107][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109230
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[107][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109232
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[107][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109234
-.subckt mx2_x2 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[107][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109236
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[107][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109222
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[107][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109224
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[107][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109226
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[107][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109228
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[107][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109230
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[107][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109232
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[107][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109234
+.subckt mux2_x1 cmd=$abc$109383$new_n22595_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[107][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109236
 .subckt nand4_x0 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n19832_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n22604_
-.subckt a2_x2 i0=$abc$109383$new_n22604_ i1=soc.cpu.minerva.gprf.mem._mem[25][0] q=$abc$109383$new_n22605_
-.subckt a4_x2 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n22606_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22606_ q=$abc$109383$new_n22607_
-.subckt o2_x2 i0=$abc$109383$new_n22607_ i1=$abc$109383$new_n22605_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109238
+.subckt and2_x1 i0=$abc$109383$new_n22604_ i1=soc.cpu.minerva.gprf.mem._mem[25][0] q=$abc$109383$new_n22605_
+.subckt and4_x1 i0=$abc$109383$new_n21516_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n22606_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22606_ nq=$abc$109383$new_n22607_
+.subckt or2_x1 i0=$abc$109383$new_n22607_ i1=$abc$109383$new_n22605_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109238
 .subckt buf_x4 i=$abc$109383$new_n22604_ q=$abc$109383$new_n22609_
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[25][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109240
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[25][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109242
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[25][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109244
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[25][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109246
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[25][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109248
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[25][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109250
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[25][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109252
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[25][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109254
-.subckt mx2_x2 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[25][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109256
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[25][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109240
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[25][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109242
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[25][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109244
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[25][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109246
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[25][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109248
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[25][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109250
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[25][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109252
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[25][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109254
+.subckt mux2_x1 cmd=$abc$109383$new_n22609_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[25][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109256
 .subckt buf_x4 i=$abc$109383$new_n22604_ q=$abc$109383$new_n22619_
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[25][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109258
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[25][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109260
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[25][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109262
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[25][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109264
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[25][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109266
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[25][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109268
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[25][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109270
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[25][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109272
-.subckt mx2_x2 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[25][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109274
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[25][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109258
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[25][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109260
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[25][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109262
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[25][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109264
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[25][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109266
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[25][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109268
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[25][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109270
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[25][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109272
+.subckt mux2_x1 cmd=$abc$109383$new_n22619_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[25][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109274
 .subckt buf_x4 i=$abc$109383$new_n22604_ q=$abc$109383$new_n22629_
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[25][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109276
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[25][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109278
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[25][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109280
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[25][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109282
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[25][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109284
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[25][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109286
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[25][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109288
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[25][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109290
-.subckt mx2_x2 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[25][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109292
-.subckt mx2_x2 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[25][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109294
-.subckt mx2_x2 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[25][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109296
-.subckt mx2_x2 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[25][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109298
-.subckt mx2_x2 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[25][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109300
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[25][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109276
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[25][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109278
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[25][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109280
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[25][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109282
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[25][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109284
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[25][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109286
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[25][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109288
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[25][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109290
+.subckt mux2_x1 cmd=$abc$109383$new_n22629_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[25][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109292
+.subckt mux2_x1 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[25][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109294
+.subckt mux2_x1 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[25][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109296
+.subckt mux2_x1 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[25][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109298
+.subckt mux2_x1 cmd=$abc$109383$new_n22604_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[25][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109300
 .subckt buf_x4 i=$abc$109383$new_n19745_ q=$abc$109383$new_n22643_
 .subckt buf_x4 i=$abc$109383$new_n20360_ q=$abc$109383$new_n22644_
 .subckt nand3_x0 i0=$abc$109383$new_n22644_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n22645_
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[100][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109302
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[100][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109304
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[100][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109306
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[100][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109308
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[100][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109310
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[100][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109312
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[100][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109314
-.subckt mx2_x2 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[100][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109316
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[100][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109302
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[100][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109304
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[100][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109306
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[100][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109308
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[100][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109310
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[100][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109312
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[100][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109314
+.subckt mux2_x1 cmd=$abc$109383$new_n22645_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[100][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109316
 .subckt inv_x0 i=soc.rom.spimemio.din_data[7] nq=$abc$109383$new_n22654_
 .subckt nor4_x0 i0=soc.rom.spimemio.state[5] i1=soc.rom.spimemio.state[6] i2=soc.rom.spimemio.state[9] i3=soc.rom.spimemio.state[12] nq=$abc$109383$new_n22655_
 .subckt nor4_x0 i0=soc.rom.spimemio.state[4] i1=soc.rom.spimemio.state[0] i2=soc.rom.spimemio.state[1] i3=$abc$109383$new_n15035_ nq=$abc$109383$new_n22656_
@@ -7933,17 +7933,17 @@
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22654_ nq=$abc$109383$new_n22659_
 .subckt buf_x4 i=$abc$109383$new_n15036_ q=$abc$109383$new_n22660_
 .subckt nand2_x0 i0=$abc$109383$new_n22660_ i1=soc.rom.spimemio.state[1] nq=$abc$109383$new_n22661_
-.subckt a3_x2 i0=$abc$109383$new_n22657_ i1=$abc$109383$new_n15151_ i2=$abc$109383$new_n14736_ q=$abc$109383$new_n22662_
+.subckt and3_x1 i0=$abc$109383$new_n22657_ i1=$abc$109383$new_n15151_ i2=$abc$109383$new_n14736_ q=$abc$109383$new_n22662_
 .subckt buf_x4 i=$abc$109383$new_n22662_ q=$abc$109383$new_n22663_
 .subckt nand3_x0 i0=$abc$109383$new_n22660_ i1=$abc$109383$new_n19696_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n22664_
 .subckt nor3_x0 i0=soc.rom.spimemio.state[4] i1=soc.rom.spimemio.state[1] i2=soc.rom.spimemio.state[2] nq=$abc$109383$new_n22665_
-.subckt oa22_x2 i0=$abc$109383$new_n22665_ i1=$abc$109383$new_n22655_ i2=soc.rom.spimemio.state[4] q=$abc$109383$new_n22666_
-.subckt ao22_x2 i0=soc.rom.spimemio.config_ddr i1=soc.rom.spimemio.config_qspi i2=$abc$109383$new_n15035_ q=$abc$109383$new_n22667_
-.subckt a2_x2 i0=$abc$109383$new_n14872_ i1=$abc$109383$new_n15111_ q=$abc$109383$new_n22668_
-.subckt a2_x2 i0=$abc$109383$new_n14741_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n22669_
+.subckt or21nand_x1 i0=$abc$109383$new_n22665_ i1=$abc$109383$new_n22655_ i2=soc.rom.spimemio.state[4] nq=$abc$109383$new_n22666_
+.subckt and21nor_x1 i0=soc.rom.spimemio.config_ddr i1=soc.rom.spimemio.config_qspi i2=$abc$109383$new_n15035_ nq=$abc$109383$new_n22667_
+.subckt and2_x1 i0=$abc$109383$new_n14872_ i1=$abc$109383$new_n15111_ q=$abc$109383$new_n22668_
+.subckt and2_x1 i0=$abc$109383$new_n14741_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n22669_
 .subckt nor4_x0 i0=$abc$109383$new_n22669_ i1=$abc$109383$new_n22668_ i2=$abc$109383$new_n22667_ i3=$abc$109383$new_n22666_ nq=$abc$109383$new_n22670_
 .subckt nand4_x0 i0=$abc$109383$new_n22670_ i1=$abc$109383$new_n22664_ i2=$abc$109383$new_n22663_ i3=$abc$109383$new_n22661_ nq=$abc$109383$new_n22671_
-.subckt a2_x2 i0=$abc$109383$new_n22671_ i1=$abc$109383$new_n22659_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109334
+.subckt and2_x1 i0=$abc$109383$new_n22671_ i1=$abc$109383$new_n22659_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109334
 .subckt inv_x0 i=soc.rom.spimemio.din_data[6] nq=$abc$109383$new_n22673_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22673_ nq=$abc$109383$new_n22674_
 .subckt nand3_x0 i0=$abc$109383$new_n15036_ i1=soc.rom.spimemio.state[1] i2=$abc$109383$new_n15040_ nq=$abc$109383$new_n22675_
@@ -7952,39 +7952,39 @@
 .subckt nand2_x0 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n15155_ nq=$abc$109383$new_n22678_
 .subckt nand2_x0 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n15111_ nq=$abc$109383$new_n22679_
 .subckt nand2_x0 i0=soc.rom.spimemio.config_qspi i1=$abc$109383$new_n15035_ nq=$abc$109383$new_n22680_
-.subckt a4_x2 i0=$abc$109383$new_n22680_ i1=$abc$109383$new_n22679_ i2=$abc$109383$new_n22678_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22681_
+.subckt and4_x1 i0=$abc$109383$new_n22680_ i1=$abc$109383$new_n22679_ i2=$abc$109383$new_n22678_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22681_
 .subckt nand4_x0 i0=$abc$109383$new_n22681_ i1=$abc$109383$new_n22676_ i2=$abc$109383$new_n22675_ i3=$abc$109383$new_n22663_ nq=$abc$109383$new_n22682_
-.subckt a2_x2 i0=$abc$109383$new_n22682_ i1=$abc$109383$new_n22674_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109338
+.subckt and2_x1 i0=$abc$109383$new_n22682_ i1=$abc$109383$new_n22674_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109338
 .subckt inv_x0 i=soc.rom.spimemio.din_data[5] nq=$abc$109383$new_n22684_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22684_ nq=$abc$109383$new_n22685_
 .subckt nand3_x0 i0=$abc$109383$new_n22660_ i1=$abc$109383$new_n19692_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n22686_
-.subckt a2_x2 i0=$abc$109383$new_n14802_ i1=$abc$109383$new_n15111_ q=$abc$109383$new_n22687_
-.subckt a2_x2 i0=$abc$109383$new_n14768_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n22688_
+.subckt and2_x1 i0=$abc$109383$new_n14802_ i1=$abc$109383$new_n15111_ q=$abc$109383$new_n22687_
+.subckt and2_x1 i0=$abc$109383$new_n14768_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n22688_
 .subckt nor4_x0 i0=$abc$109383$new_n22688_ i1=$abc$109383$new_n22687_ i2=$abc$109383$new_n22667_ i3=$abc$109383$new_n22666_ nq=$abc$109383$new_n22689_
 .subckt nand4_x0 i0=$abc$109383$new_n22689_ i1=$abc$109383$new_n22686_ i2=$abc$109383$new_n22663_ i3=$abc$109383$new_n22661_ nq=$abc$109383$new_n22690_
-.subckt a2_x2 i0=$abc$109383$new_n22690_ i1=$abc$109383$new_n22685_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109342
+.subckt and2_x1 i0=$abc$109383$new_n22690_ i1=$abc$109383$new_n22685_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109342
 .subckt inv_x0 i=soc.rom.spimemio.din_data[4] nq=$abc$109383$new_n22692_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22692_ nq=$abc$109383$new_n22693_
 .subckt nand3_x0 i0=$abc$109383$new_n22660_ i1=$abc$109383$new_n19688_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n22694_
 .subckt nand2_x0 i0=$abc$109383$new_n14807_ i1=$abc$109383$new_n15111_ nq=$abc$109383$new_n22695_
 .subckt inv_x0 i=soc.rom.spimemio.config_qspi nq=$abc$109383$new_n22696_
-.subckt a2_x2 i0=$abc$109383$new_n15105_ i1=$abc$109383$new_n15035_ q=$abc$109383$new_n22697_
+.subckt and2_x1 i0=$abc$109383$new_n15105_ i1=$abc$109383$new_n15035_ q=$abc$109383$new_n22697_
 .subckt nand2_x0 i0=$abc$109383$new_n22697_ i1=$abc$109383$new_n22696_ nq=$abc$109383$new_n22698_
 .subckt nand2_x0 i0=$abc$109383$new_n14756_ i1=$abc$109383$new_n15155_ nq=$abc$109383$new_n22699_
-.subckt a4_x2 i0=$abc$109383$new_n22699_ i1=$abc$109383$new_n22698_ i2=$abc$109383$new_n22695_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22700_
+.subckt and4_x1 i0=$abc$109383$new_n22699_ i1=$abc$109383$new_n22698_ i2=$abc$109383$new_n22695_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22700_
 .subckt nand4_x0 i0=$abc$109383$new_n22700_ i1=$abc$109383$new_n22694_ i2=$abc$109383$new_n22675_ i3=$abc$109383$new_n22663_ nq=$abc$109383$new_n22701_
-.subckt a2_x2 i0=$abc$109383$new_n22701_ i1=$abc$109383$new_n22693_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109346
+.subckt and2_x1 i0=$abc$109383$new_n22701_ i1=$abc$109383$new_n22693_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109346
 .subckt inv_x0 i=soc.rom.spimemio.din_data[3] nq=$abc$109383$new_n22703_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22703_ nq=$abc$109383$new_n22704_
-.subckt a2_x2 i0=$abc$109383$new_n22675_ i1=$abc$109383$new_n22663_ q=$abc$109383$new_n22705_
+.subckt and2_x1 i0=$abc$109383$new_n22675_ i1=$abc$109383$new_n22663_ q=$abc$109383$new_n22705_
 .subckt nand3_x0 i0=$abc$109383$new_n15036_ i1=$abc$109383$new_n19684_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n22706_
-.subckt a2_x2 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n22707_
-.subckt a2_x2 i0=$abc$109383$new_n14790_ i1=soc.rom.spimemio.state[6] q=$abc$109383$new_n22708_
+.subckt and2_x1 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n15155_ q=$abc$109383$new_n22707_
+.subckt and2_x1 i0=$abc$109383$new_n14790_ i1=soc.rom.spimemio.state[6] q=$abc$109383$new_n22708_
 .subckt nor4_x0 i0=$abc$109383$new_n22708_ i1=$abc$109383$new_n22707_ i2=$abc$109383$new_n22667_ i3=$abc$109383$new_n22666_ nq=$abc$109383$new_n22709_
 .subckt nand3_x0 i0=$abc$109383$new_n15101_ i1=soc.rom.cfgreg_do[19] i2=soc.rom.spimemio.state[1] nq=$abc$109383$new_n22710_
-.subckt a3_x2 i0=$abc$109383$new_n22710_ i1=$abc$109383$new_n22709_ i2=$abc$109383$new_n22706_ q=$abc$109383$new_n22711_
+.subckt and3_x1 i0=$abc$109383$new_n22710_ i1=$abc$109383$new_n22709_ i2=$abc$109383$new_n22706_ q=$abc$109383$new_n22711_
 .subckt nand2_x0 i0=$abc$109383$new_n22711_ i1=$abc$109383$new_n22705_ nq=$abc$109383$new_n22712_
-.subckt a2_x2 i0=$abc$109383$new_n22712_ i1=$abc$109383$new_n22704_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109350
+.subckt and2_x1 i0=$abc$109383$new_n22712_ i1=$abc$109383$new_n22704_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109350
 .subckt inv_x0 i=soc.rom.spimemio.din_data[2] nq=$abc$109383$new_n22714_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22714_ nq=$abc$109383$new_n22715_
 .subckt nand3_x0 i0=$abc$109383$new_n22660_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n22716_
@@ -7992,3976 +7992,3976 @@
 .subckt nand2_x0 i0=$abc$109383$new_n14950_ i1=$abc$109383$new_n15155_ nq=$abc$109383$new_n22718_
 .subckt nand2_x0 i0=soc.rom.cfgreg_do[18] i1=soc.rom.spimemio.state[1] nq=$abc$109383$new_n22719_
 .subckt nand3_x0 i0=$abc$109383$new_n15105_ i1=soc.rom.spimemio.config_qspi i2=$abc$109383$new_n15035_ nq=$abc$109383$new_n22720_
-.subckt a2_x2 i0=$abc$109383$new_n22720_ i1=$abc$109383$new_n22719_ q=$abc$109383$new_n22721_
-.subckt a4_x2 i0=$abc$109383$new_n22721_ i1=$abc$109383$new_n22718_ i2=$abc$109383$new_n22717_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22722_
+.subckt and2_x1 i0=$abc$109383$new_n22720_ i1=$abc$109383$new_n22719_ q=$abc$109383$new_n22721_
+.subckt and4_x1 i0=$abc$109383$new_n22721_ i1=$abc$109383$new_n22718_ i2=$abc$109383$new_n22717_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22722_
 .subckt nand4_x0 i0=$abc$109383$new_n22722_ i1=$abc$109383$new_n22716_ i2=$abc$109383$new_n22663_ i3=$abc$109383$new_n22661_ nq=$abc$109383$new_n22723_
-.subckt a2_x2 i0=$abc$109383$new_n22723_ i1=$abc$109383$new_n22715_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109354
+.subckt and2_x1 i0=$abc$109383$new_n22723_ i1=$abc$109383$new_n22715_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109354
 .subckt inv_x0 i=soc.rom.spimemio.din_data[1] nq=$abc$109383$new_n22725_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22725_ nq=$abc$109383$new_n22726_
-.subckt a2_x2 i0=$abc$109383$new_n14834_ i1=$abc$109383$new_n15111_ q=$abc$109383$new_n22727_
-.subckt a2_x2 i0=$abc$109383$new_n14786_ i1=soc.rom.spimemio.state[9] q=$abc$109383$new_n22728_
+.subckt and2_x1 i0=$abc$109383$new_n14834_ i1=$abc$109383$new_n15111_ q=$abc$109383$new_n22727_
+.subckt and2_x1 i0=$abc$109383$new_n14786_ i1=soc.rom.spimemio.state[9] q=$abc$109383$new_n22728_
 .subckt nand2_x0 i0=soc.rom.spimemio.config_ddr i1=soc.rom.spimemio.config_qspi nq=$abc$109383$new_n22729_
-.subckt a2_x2 i0=$abc$109383$new_n22729_ i1=$abc$109383$new_n15035_ q=$abc$109383$new_n22730_
+.subckt and2_x1 i0=$abc$109383$new_n22729_ i1=$abc$109383$new_n15035_ q=$abc$109383$new_n22730_
 .subckt nor4_x0 i0=$abc$109383$new_n22730_ i1=$abc$109383$new_n22728_ i2=$abc$109383$new_n22727_ i3=$abc$109383$new_n22666_ nq=$abc$109383$new_n22731_
-.subckt a2_x2 i0=soc.rom.spimemio.din_valid i1=$abc$109383$new_n15117_ q=$abc$109383$new_n22732_
+.subckt and2_x1 i0=soc.rom.spimemio.din_valid i1=$abc$109383$new_n15117_ q=$abc$109383$new_n22732_
 .subckt nand4_x0 i0=$abc$109383$new_n22732_ i1=$abc$109383$new_n15030_ i2=$abc$109383$new_n15001_ i3=soc.rom.spimemio.state[1] nq=$abc$109383$new_n22733_
 .subckt inv_x0 i=soc.rom.cfgreg_do[17] nq=$abc$109383$new_n22734_
-.subckt ao22_x2 i0=$abc$109383$new_n22734_ i1=$abc$109383$new_n22733_ i2=$abc$109383$new_n22731_ q=$abc$109383$new_n22735_
+.subckt and21nor_x1 i0=$abc$109383$new_n22734_ i1=$abc$109383$new_n22733_ i2=$abc$109383$new_n22731_ nq=$abc$109383$new_n22735_
 .subckt nand3_x0 i0=$abc$109383$new_n22735_ i1=$abc$109383$new_n22675_ i2=$abc$109383$new_n22663_ nq=$abc$109383$new_n22736_
-.subckt a2_x2 i0=$abc$109383$new_n22736_ i1=$abc$109383$new_n22726_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109358
+.subckt and2_x1 i0=$abc$109383$new_n22736_ i1=$abc$109383$new_n22726_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109358
 .subckt inv_x0 i=soc.rom.spimemio.din_data[0] nq=$abc$109383$new_n22738_
 .subckt nand2_x0 i0=$abc$109383$new_n22658_ i1=$abc$109383$new_n22738_ nq=$abc$109383$new_n22739_
 .subckt nand2_x0 i0=$abc$109383$new_n19698_ i1=$abc$109383$new_n15111_ nq=$abc$109383$new_n22740_
 .subckt nand2_x0 i0=$abc$109383$new_n14780_ i1=$abc$109383$new_n15155_ nq=$abc$109383$new_n22741_
 .subckt nor2_x0 i0=soc.rom.spimemio.state[4] i1=$abc$109383$new_n15035_ nq=$abc$109383$new_n22742_
 .subckt nand2_x0 i0=soc.rom.cfgreg_do[16] i1=soc.rom.spimemio.state[1] nq=$abc$109383$new_n22743_
-.subckt a2_x2 i0=$abc$109383$new_n22743_ i1=$abc$109383$new_n22742_ q=$abc$109383$new_n22744_
-.subckt a4_x2 i0=$abc$109383$new_n22744_ i1=$abc$109383$new_n22741_ i2=$abc$109383$new_n22740_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22745_
+.subckt and2_x1 i0=$abc$109383$new_n22743_ i1=$abc$109383$new_n22742_ q=$abc$109383$new_n22744_
+.subckt and4_x1 i0=$abc$109383$new_n22744_ i1=$abc$109383$new_n22741_ i2=$abc$109383$new_n22740_ i3=$abc$109383$new_n22677_ q=$abc$109383$new_n22745_
 .subckt nand3_x0 i0=$abc$109383$new_n22745_ i1=$abc$109383$new_n22663_ i2=$abc$109383$new_n22661_ nq=$abc$109383$new_n22746_
-.subckt a2_x2 i0=$abc$109383$new_n22746_ i1=$abc$109383$new_n22739_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109362
+.subckt and2_x1 i0=$abc$109383$new_n22746_ i1=$abc$109383$new_n22739_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109362
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n20548_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n22748_
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[9][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91400
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[9][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91402
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[9][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91404
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[9][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91406
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[9][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91408
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[9][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91410
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[9][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91412
-.subckt mx2_x2 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[9][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91414
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[9][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91400
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[9][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91402
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[9][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91404
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[9][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91406
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[9][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91408
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[9][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91410
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[9][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91412
+.subckt mux2_x1 cmd=$abc$109383$new_n22748_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[9][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91414
 .subckt nand4_x0 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n19832_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n22757_
-.subckt a2_x2 i0=$abc$109383$new_n22757_ i1=soc.cpu.minerva.gprf.mem._mem[17][0] q=$abc$109383$new_n22758_
-.subckt a4_x2 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n22759_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22759_ q=$abc$109383$new_n22760_
-.subckt o2_x2 i0=$abc$109383$new_n22760_ i1=$abc$109383$new_n22758_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91420
+.subckt and2_x1 i0=$abc$109383$new_n22757_ i1=soc.cpu.minerva.gprf.mem._mem[17][0] q=$abc$109383$new_n22758_
+.subckt and4_x1 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n22759_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n22759_ nq=$abc$109383$new_n22760_
+.subckt or2_x1 i0=$abc$109383$new_n22760_ i1=$abc$109383$new_n22758_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91420
 .subckt buf_x4 i=$abc$109383$new_n22757_ q=$abc$109383$new_n22762_
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[17][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91422
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[17][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91424
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[17][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91426
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[17][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91428
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[17][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91430
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[17][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91432
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[17][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91434
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[17][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91436
-.subckt mx2_x2 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[17][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91438
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[17][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91422
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[17][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91424
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[17][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91426
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[17][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91428
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[17][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91430
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[17][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91432
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[17][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91434
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[17][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91436
+.subckt mux2_x1 cmd=$abc$109383$new_n22762_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[17][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91438
 .subckt buf_x4 i=$abc$109383$new_n22757_ q=$abc$109383$new_n22772_
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[17][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91440
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[17][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91442
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[17][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91444
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[17][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91446
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[17][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91448
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[17][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91450
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[17][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91452
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[17][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91454
-.subckt mx2_x2 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[17][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91456
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[17][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91440
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[17][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91442
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[17][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91444
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[17][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91446
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[17][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91448
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[17][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91450
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[17][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91452
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[17][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91454
+.subckt mux2_x1 cmd=$abc$109383$new_n22772_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[17][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91456
 .subckt buf_x4 i=$abc$109383$new_n22757_ q=$abc$109383$new_n22782_
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[17][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91458
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[17][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91460
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[17][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91462
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[17][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91464
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[17][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91466
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[17][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91468
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[17][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91470
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[17][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91472
-.subckt mx2_x2 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[17][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91474
-.subckt mx2_x2 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[17][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91476
-.subckt mx2_x2 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[17][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91478
-.subckt mx2_x2 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[17][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91480
-.subckt mx2_x2 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[17][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91482
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[17][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91458
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[17][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91460
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[17][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91462
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[17][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91464
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[17][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91466
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[17][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91468
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[17][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91470
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[17][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91472
+.subckt mux2_x1 cmd=$abc$109383$new_n22782_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[17][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91474
+.subckt mux2_x1 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[17][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91476
+.subckt mux2_x1 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[17][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91478
+.subckt mux2_x1 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[17][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91480
+.subckt mux2_x1 cmd=$abc$109383$new_n22757_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[17][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91482
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n22796_
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[76][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91484
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[76][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91486
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[76][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91488
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[76][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91490
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[76][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91492
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[76][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91494
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[76][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91496
-.subckt mx2_x2 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[76][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91498
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[76][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91484
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[76][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91486
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[76][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91488
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[76][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91490
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[76][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91492
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[76][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91494
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[76][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91496
+.subckt mux2_x1 cmd=$abc$109383$new_n22796_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[76][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91498
 .subckt nand4_x0 i0=$abc$109383$new_n21592_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n22805_
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[75][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91500
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[75][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91502
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[75][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91504
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[75][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91506
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[75][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91508
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[75][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91510
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[75][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91512
-.subckt mx2_x2 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[75][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91514
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[75][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91500
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[75][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91502
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[75][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91504
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[75][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91506
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[75][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91508
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[75][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91510
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[75][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91512
+.subckt mux2_x1 cmd=$abc$109383$new_n22805_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[75][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91514
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n22814_
 .subckt nand4_x0 i0=$abc$109383$new_n20257_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n22815_
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[104][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91516
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[104][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91518
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[104][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91520
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[104][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91522
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[104][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91524
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[104][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91526
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[104][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91528
-.subckt mx2_x2 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[104][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91530
-.subckt a4_x2 i0=$abc$109383$new_n19744_ i1=$abc$109383$new_n19742_ i2=$abc$109383$new_n21589_ i3=$abc$109383$new_n19698_ q=$abc$109383$new_n22824_
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[104][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91516
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[104][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91518
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[104][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91520
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[104][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91522
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[104][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91524
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[104][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91526
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[104][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91528
+.subckt mux2_x1 cmd=$abc$109383$new_n22815_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[104][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91530
+.subckt and4_x1 i0=$abc$109383$new_n19744_ i1=$abc$109383$new_n19742_ i2=$abc$109383$new_n21589_ i3=$abc$109383$new_n19698_ q=$abc$109383$new_n22824_
 .subckt buf_x4 i=$abc$109383$new_n22824_ q=$abc$109383$new_n22825_
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n20548_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n22826_
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[70][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91532
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[70][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91534
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[70][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91536
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[70][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91538
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[70][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91540
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[70][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91542
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[70][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91544
-.subckt mx2_x2 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[70][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91546
-.subckt a4_x2 i0=$abc$109383$new_n19744_ i1=$abc$109383$new_n19742_ i2=$abc$109383$new_n19696_ i3=$abc$109383$new_n20265_ q=$abc$109383$new_n22835_
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[70][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91532
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[70][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91534
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[70][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91536
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[70][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91538
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[70][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91540
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[70][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91542
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[70][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91544
+.subckt mux2_x1 cmd=$abc$109383$new_n22826_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[70][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91546
+.subckt and4_x1 i0=$abc$109383$new_n19744_ i1=$abc$109383$new_n19742_ i2=$abc$109383$new_n19696_ i3=$abc$109383$new_n20265_ q=$abc$109383$new_n22835_
 .subckt buf_x4 i=$abc$109383$new_n22835_ q=$abc$109383$new_n22836_
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n21786_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n22837_
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[33][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91548
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[33][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91550
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[33][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91552
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[33][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91554
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[33][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91556
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[33][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91558
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[33][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91560
-.subckt mx2_x2 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[33][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91562
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[33][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91548
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[33][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91550
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[33][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91552
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[33][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91554
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[33][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91556
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[33][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91558
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[33][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91560
+.subckt mux2_x1 cmd=$abc$109383$new_n22837_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[33][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91562
 .subckt buf_x4 i=$abc$109383$new_n21591_ q=$abc$109383$new_n22846_
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n21250_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n22847_
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[74][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91564
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[74][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91566
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[74][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91568
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[74][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91570
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[74][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91572
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[74][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91574
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[74][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91576
-.subckt mx2_x2 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[74][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91578
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[74][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91564
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[74][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91566
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[74][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91568
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[74][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91570
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[74][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91572
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[74][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91574
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[74][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91576
+.subckt mux2_x1 cmd=$abc$109383$new_n22847_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[74][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91578
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n21250_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n22856_
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[74][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91580
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[74][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91582
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[74][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91584
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[74][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91586
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[74][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91588
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[74][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91590
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[74][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91592
-.subckt mx2_x2 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[74][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91594
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[74][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91580
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[74][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91582
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[74][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91584
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[74][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91586
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[74][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91588
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[74][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91590
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[74][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91592
+.subckt mux2_x1 cmd=$abc$109383$new_n22856_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[74][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91594
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n22865_
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n22866_
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[75][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91596
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[75][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91598
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[75][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91600
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[75][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91602
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[75][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91604
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[75][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91606
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[75][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91608
-.subckt mx2_x2 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[75][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91610
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[75][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91596
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[75][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91598
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[75][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91600
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[75][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91602
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[75][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91604
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[75][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91606
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[75][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91608
+.subckt mux2_x1 cmd=$abc$109383$new_n22866_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[75][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91610
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n22875_
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[75][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91612
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[75][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91614
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[75][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91616
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[75][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91618
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[75][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91620
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[75][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91622
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[75][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91624
-.subckt mx2_x2 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[75][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91626
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[75][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91612
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[75][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91614
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21889_ i1=soc.ram.ram[75][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91616
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21892_ i1=soc.ram.ram[75][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91618
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21895_ i1=soc.ram.ram[75][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91620
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[75][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91622
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21899_ i1=soc.ram.ram[75][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91624
+.subckt mux2_x1 cmd=$abc$109383$new_n22875_ i0=$abc$109383$new_n21902_ i1=soc.ram.ram[75][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91626
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n20872_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n22267_ nq=$abc$109383$new_n22884_
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[127][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91628
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[127][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91630
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[127][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91632
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[127][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91634
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[127][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91636
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[127][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91638
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[127][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91640
-.subckt mx2_x2 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[127][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91642
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[127][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91628
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[127][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91630
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[127][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91632
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[127][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91634
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[127][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91636
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[127][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91638
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[127][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91640
+.subckt mux2_x1 cmd=$abc$109383$new_n22884_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[127][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91642
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n21585_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n22893_
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[93][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91644
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[93][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91646
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n21914_ i1=soc.ram.ram[93][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91644
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n21918_ i1=soc.ram.ram[93][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91646
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n22896_
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[93][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91648
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[93][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91648
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n22898_
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[93][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91650
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[93][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91650
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n22900_
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[93][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91652
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[93][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91654
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[93][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91652
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n21923_ i1=soc.ram.ram[93][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91654
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n22903_
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[93][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91656
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[93][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91656
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n22905_
-.subckt mx2_x2 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[93][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91658
+.subckt mux2_x1 cmd=$abc$109383$new_n22893_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[93][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91658
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n22907_
 .subckt nand4_x0 i0=$abc$109383$new_n21469_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n22908_
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[126][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91660
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[126][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91660
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n22910_
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[126][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91662
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[126][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91664
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[126][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91666
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[126][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91668
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[126][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91662
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[126][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91664
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[126][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91666
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[126][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91668
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n22915_
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[126][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91670
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[126][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91672
-.subckt mx2_x2 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[126][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91674
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[126][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91670
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[126][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91672
+.subckt mux2_x1 cmd=$abc$109383$new_n22908_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[126][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91674
 .subckt buf_x4 i=$abc$109383$new_n20228_ q=$abc$109383$new_n22919_
 .subckt buf_x4 i=$abc$109383$new_n21237_ q=$abc$109383$new_n22920_
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n20908_ i2=$abc$109383$new_n22041_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n22921_
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[126][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91676
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[126][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91678
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[126][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91680
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[126][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91682
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[126][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91684
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[126][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91686
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[126][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91688
-.subckt mx2_x2 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[126][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91690
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[126][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91676
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[126][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91678
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[126][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91680
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[126][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91682
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[126][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91684
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[126][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91686
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[126][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91688
+.subckt mux2_x1 cmd=$abc$109383$new_n22921_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[126][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91690
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n22041_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n22930_
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[126][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91692
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[126][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91694
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[126][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91696
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[126][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91698
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[126][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91700
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[126][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91702
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[126][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91704
-.subckt mx2_x2 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[126][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91706
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[126][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91692
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[126][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91694
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[126][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91696
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[126][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91698
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[126][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91700
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[126][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91702
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[126][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91704
+.subckt mux2_x1 cmd=$abc$109383$new_n22930_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[126][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91706
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n22200_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n22939_
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[18][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91708
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[18][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91710
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[18][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91712
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[18][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91714
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[18][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91716
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[18][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91718
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[18][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91720
-.subckt mx2_x2 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[18][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91722
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[18][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91708
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[18][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91710
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[18][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91712
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[18][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91714
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[18][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91716
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[18][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91718
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[18][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91720
+.subckt mux2_x1 cmd=$abc$109383$new_n22939_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[18][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91722
 .subckt nand3_x0 i0=$abc$109383$new_n21787_ i1=$abc$109383$new_n22200_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n22948_
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[18][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91724
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[18][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91726
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[18][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91728
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[18][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91730
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[18][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91732
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[18][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91734
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[18][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91736
-.subckt mx2_x2 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[18][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91738
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[18][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91724
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[18][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91726
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[18][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91728
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[18][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91730
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[18][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91732
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[18][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91734
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[18][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91736
+.subckt mux2_x1 cmd=$abc$109383$new_n22948_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[18][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91738
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n21479_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n22957_
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[12][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91740
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[12][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91742
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[12][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91744
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[12][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91746
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[12][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91748
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[12][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91750
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[12][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91752
-.subckt mx2_x2 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[12][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91754
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[12][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91740
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[12][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91742
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[12][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91744
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[12][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91746
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[12][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91748
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[12][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91750
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[12][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91752
+.subckt mux2_x1 cmd=$abc$109383$new_n22957_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[12][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91754
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n22966_
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[74][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91756
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[74][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91758
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[74][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91760
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[74][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91762
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[74][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91764
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[74][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91766
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[74][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91768
-.subckt mx2_x2 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[74][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91770
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[74][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91756
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[74][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91758
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[74][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91760
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[74][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91762
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[74][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91764
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[74][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91766
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[74][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91768
+.subckt mux2_x1 cmd=$abc$109383$new_n22966_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[74][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91770
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n21835_ nq=$abc$109383$new_n22975_
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[73][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91772
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[73][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91774
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[73][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91776
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[73][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91778
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[73][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91780
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[73][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91782
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[73][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91784
-.subckt mx2_x2 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[73][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91786
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[73][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91772
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[73][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91774
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[73][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91776
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[73][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91778
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[73][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91780
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[73][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91782
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[73][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91784
+.subckt mux2_x1 cmd=$abc$109383$new_n22975_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[73][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91786
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n22984_
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n22985_
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[127][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91788
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[127][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91790
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[127][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91792
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[127][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91794
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[127][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91796
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[127][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91798
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[127][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91800
-.subckt mx2_x2 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[127][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91802
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22392_ i1=soc.ram.ram[127][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91788
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22396_ i1=soc.ram.ram[127][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91790
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22398_ i1=soc.ram.ram[127][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91792
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[127][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91794
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22401_ i1=soc.ram.ram[127][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91796
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22403_ i1=soc.ram.ram[127][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91798
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22405_ i1=soc.ram.ram[127][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91800
+.subckt mux2_x1 cmd=$abc$109383$new_n22985_ i0=$abc$109383$new_n22407_ i1=soc.ram.ram[127][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91802
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n21078_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n22994_
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[127][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91804
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[127][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91806
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[127][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91808
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[127][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91810
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[127][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91812
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[127][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91814
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[127][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91816
-.subckt mx2_x2 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[127][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91818
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[127][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91804
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[127][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91806
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[127][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91808
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[127][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91810
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22527_ i1=soc.ram.ram[127][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91812
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22529_ i1=soc.ram.ram[127][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91814
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22531_ i1=soc.ram.ram[127][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91816
+.subckt mux2_x1 cmd=$abc$109383$new_n22994_ i0=$abc$109383$new_n22533_ i1=soc.ram.ram[127][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91818
 .subckt buf_x4 i=$abc$109383$new_n20233_ q=$abc$109383$new_n23003_
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n20840_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n23004_
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[73][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91820
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[73][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91822
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[73][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91824
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[73][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91826
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[73][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91828
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[73][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91830
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[73][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91832
-.subckt mx2_x2 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[73][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91834
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[73][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91820
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[73][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91822
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[73][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91824
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[73][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91826
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[73][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91828
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[73][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91830
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[73][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91832
+.subckt mux2_x1 cmd=$abc$109383$new_n23004_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[73][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91834
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n21319_ i3=$abc$109383$new_n19806_ nq=$abc$109383$new_n23013_
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[72][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91836
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[72][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91838
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[72][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91840
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[72][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91842
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22554_ i1=soc.ram.ram[72][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91836
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22558_ i1=soc.ram.ram[72][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91838
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22560_ i1=soc.ram.ram[72][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91840
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n22562_ i1=soc.ram.ram[72][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91842
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n23018_
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[72][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91844
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[72][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91844
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n23020_
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[72][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91846
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[72][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91846
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n23022_
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[72][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91848
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[72][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91848
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n23024_
-.subckt mx2_x2 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[72][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91850
+.subckt mux2_x1 cmd=$abc$109383$new_n23013_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[72][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91850
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n23026_
 .subckt buf_x4 i=$abc$109383$new_n20233_ q=$abc$109383$new_n23027_
 .subckt nand4_x0 i0=$abc$109383$new_n22846_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n19806_ nq=$abc$109383$new_n23028_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[72][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91852
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[72][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91852
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n23030_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[72][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91854
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[72][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91854
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n23032_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[72][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91856
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[72][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91858
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[72][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91856
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n22539_ i1=soc.ram.ram[72][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91858
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n23035_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[72][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91860
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[72][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91860
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n23037_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[72][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91862
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[72][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91862
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n23039_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[72][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91864
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[72][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91864
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n23041_
-.subckt mx2_x2 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[72][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91866
+.subckt mux2_x1 cmd=$abc$109383$new_n23028_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[72][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91866
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n20815_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n23043_
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[104][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91868
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[104][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91870
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[104][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91872
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[104][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91868
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[104][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91870
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[104][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91872
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n23047_
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[104][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91874
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[104][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91876
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[104][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91878
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[104][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91880
-.subckt mx2_x2 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[104][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91882
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[104][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91874
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[104][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91876
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[104][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91878
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[104][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91880
+.subckt mux2_x1 cmd=$abc$109383$new_n23043_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[104][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91882
 .subckt buf_x4 i=$abc$109383$new_n21591_ q=$abc$109383$new_n23053_
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n21835_ nq=$abc$109383$new_n23054_
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[73][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91884
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[73][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91886
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[73][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91888
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[73][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91890
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[73][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91892
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[73][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91894
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[73][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91896
-.subckt mx2_x2 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[73][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91898
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[73][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91884
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[73][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91886
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[73][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91888
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[73][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91890
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[73][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91892
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[73][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91894
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[73][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91896
+.subckt mux2_x1 cmd=$abc$109383$new_n23054_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[73][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91898
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n23063_
 .subckt buf_x4 i=$abc$109383$new_n19751_ q=$abc$109383$new_n23064_
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n23065_
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[71][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91900
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[71][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91900
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n23067_
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[71][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91902
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[71][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91902
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n23069_
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[71][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91904
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[71][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91904
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n23071_
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[71][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91906
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[71][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91908
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[71][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91910
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[71][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91912
-.subckt mx2_x2 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[71][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91914
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[71][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91906
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[71][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91908
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[71][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91910
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[71][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91912
+.subckt mux2_x1 cmd=$abc$109383$new_n23065_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[71][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91914
 .subckt buf_x4 i=$abc$109383$new_n20547_ q=$abc$109383$new_n23077_
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n23078_
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[71][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91916
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[71][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91918
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[71][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91920
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[71][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91922
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[71][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91924
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[71][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91926
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[71][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91928
-.subckt mx2_x2 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[71][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91930
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[71][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91916
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[71][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91918
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[71][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91920
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[71][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91922
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[71][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91924
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[71][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91926
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[71][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91928
+.subckt mux2_x1 cmd=$abc$109383$new_n23078_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[71][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91930
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n22286_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n23087_
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[71][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91932
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[71][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91934
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[71][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91936
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[71][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91938
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[71][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91940
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[71][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91942
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[71][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91944
-.subckt mx2_x2 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[71][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91946
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[71][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91932
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[71][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91934
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[71][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91936
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[71][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91938
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[71][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91940
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[71][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91942
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[71][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91944
+.subckt mux2_x1 cmd=$abc$109383$new_n23087_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[71][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91946
 .subckt nand4_x0 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20759_ nq=$abc$109383$new_n23096_
-.subckt a2_x2 i0=$abc$109383$new_n23096_ i1=soc.cpu.minerva.gprf.mem._mem[16][0] q=$abc$109383$new_n23097_
-.subckt a4_x2 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n23098_
-.subckt ao22_x2 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n23098_ q=$abc$109383$new_n23099_
-.subckt o2_x2 i0=$abc$109383$new_n23099_ i1=$abc$109383$new_n23097_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91948
+.subckt and2_x1 i0=$abc$109383$new_n23096_ i1=soc.cpu.minerva.gprf.mem._mem[16][0] q=$abc$109383$new_n23097_
+.subckt and4_x1 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n23098_
+.subckt and21nor_x1 i0=$abc$109383$new_n21672_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n23098_ nq=$abc$109383$new_n23099_
+.subckt or2_x1 i0=$abc$109383$new_n23099_ i1=$abc$109383$new_n23097_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91948
 .subckt buf_x4 i=$abc$109383$new_n23096_ q=$abc$109383$new_n23101_
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[16][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91950
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[16][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91952
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[16][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91954
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[16][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91956
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[16][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91958
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[16][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91960
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[16][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91962
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[16][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91964
-.subckt mx2_x2 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[16][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91966
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[16][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91950
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n21677_ i1=soc.cpu.minerva.gprf.mem._mem[16][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91952
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[16][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91954
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n21680_ i1=soc.cpu.minerva.gprf.mem._mem[16][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91956
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[16][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91958
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[16][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91960
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[16][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91962
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[16][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91964
+.subckt mux2_x1 cmd=$abc$109383$new_n23101_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[16][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91966
 .subckt buf_x4 i=$abc$109383$new_n23096_ q=$abc$109383$new_n23111_
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[16][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91968
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[16][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91970
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[16][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91972
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[16][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91974
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[16][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91976
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[16][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91978
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[16][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91980
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[16][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91982
-.subckt mx2_x2 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[16][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91984
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[16][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91968
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[16][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91970
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[16][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91972
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[16][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91974
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[16][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91976
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[16][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91978
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n21694_ i1=soc.cpu.minerva.gprf.mem._mem[16][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91980
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n21696_ i1=soc.cpu.minerva.gprf.mem._mem[16][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91982
+.subckt mux2_x1 cmd=$abc$109383$new_n23111_ i0=$abc$109383$new_n21698_ i1=soc.cpu.minerva.gprf.mem._mem[16][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91984
 .subckt buf_x4 i=$abc$109383$new_n23096_ q=$abc$109383$new_n23121_
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[16][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91986
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[16][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91988
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[16][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91990
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[16][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91992
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[16][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91994
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[16][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91996
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[16][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91998
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[16][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92000
-.subckt mx2_x2 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[16][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92002
-.subckt mx2_x2 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[16][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92004
-.subckt mx2_x2 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[16][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92006
-.subckt mx2_x2 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[16][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92008
-.subckt mx2_x2 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[16][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92010
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21700_ i1=soc.cpu.minerva.gprf.mem._mem[16][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91986
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21703_ i1=soc.cpu.minerva.gprf.mem._mem[16][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91988
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21705_ i1=soc.cpu.minerva.gprf.mem._mem[16][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91990
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21707_ i1=soc.cpu.minerva.gprf.mem._mem[16][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91992
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21709_ i1=soc.cpu.minerva.gprf.mem._mem[16][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91994
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21711_ i1=soc.cpu.minerva.gprf.mem._mem[16][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91996
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21713_ i1=soc.cpu.minerva.gprf.mem._mem[16][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91998
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21715_ i1=soc.cpu.minerva.gprf.mem._mem[16][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92000
+.subckt mux2_x1 cmd=$abc$109383$new_n23121_ i0=$abc$109383$new_n21717_ i1=soc.cpu.minerva.gprf.mem._mem[16][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92002
+.subckt mux2_x1 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21719_ i1=soc.cpu.minerva.gprf.mem._mem[16][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92004
+.subckt mux2_x1 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21721_ i1=soc.cpu.minerva.gprf.mem._mem[16][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92006
+.subckt mux2_x1 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21723_ i1=soc.cpu.minerva.gprf.mem._mem[16][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92008
+.subckt mux2_x1 cmd=$abc$109383$new_n23096_ i0=$abc$109383$new_n21725_ i1=soc.cpu.minerva.gprf.mem._mem[16][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92010
 .subckt buf_x4 i=$abc$109383$new_n19805_ q=$abc$109383$new_n23135_
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n23136_
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[72][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92012
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[72][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92014
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[72][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92016
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[72][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92018
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[72][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92020
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[72][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92022
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[72][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92024
-.subckt mx2_x2 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[72][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92026
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[72][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92012
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[72][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92014
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[72][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92016
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[72][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92018
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[72][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92020
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[72][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92022
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[72][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92024
+.subckt mux2_x1 cmd=$abc$109383$new_n23136_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[72][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92026
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n23145_
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[21][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92028
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[21][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92030
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[21][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92032
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[21][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92034
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[21][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92036
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[21][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92038
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[21][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92040
-.subckt mx2_x2 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[21][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92042
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[21][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92028
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[21][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92030
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[21][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92032
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[21][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92034
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[21][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92036
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[21][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92038
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[21][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92040
+.subckt mux2_x1 cmd=$abc$109383$new_n23145_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[21][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92042
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n21479_ i2=$abc$109383$new_n20801_ nq=$abc$109383$new_n23154_
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[28][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92044
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[28][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92046
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[28][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92048
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[28][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92050
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[28][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92052
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[28][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92054
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[28][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92056
-.subckt mx2_x2 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[28][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92058
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[28][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92044
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[28][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92046
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[28][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92048
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[28][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92050
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[28][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92052
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[28][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92054
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[28][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92056
+.subckt mux2_x1 cmd=$abc$109383$new_n23154_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[28][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92058
 .subckt buf_x4 i=$abc$109383$new_n19805_ q=$abc$109383$new_n23163_
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n23164_
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[24][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92060
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[24][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92062
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[24][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92064
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[24][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92066
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[24][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92068
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[24][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92070
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[24][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92072
-.subckt mx2_x2 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[24][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92074
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[24][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92060
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[24][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92062
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[24][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92064
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[24][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92066
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[24][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92068
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[24][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92070
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[24][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92072
+.subckt mux2_x1 cmd=$abc$109383$new_n23164_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[24][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92074
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n23173_
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n21835_ nq=$abc$109383$new_n23174_
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[73][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92076
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[73][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92078
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[73][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92080
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[73][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92082
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[73][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92084
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[73][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92086
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[73][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92088
-.subckt mx2_x2 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[73][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92090
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[73][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92076
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[73][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92078
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[73][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92080
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[73][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92082
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[73][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92084
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[73][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92086
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[73][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92088
+.subckt mux2_x1 cmd=$abc$109383$new_n23174_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[73][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92090
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n23183_
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[70][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92092
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[70][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92094
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[70][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92096
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[70][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92098
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[70][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92100
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[70][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92102
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[70][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92104
-.subckt mx2_x2 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[70][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92106
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[70][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92092
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[70][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92094
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[70][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92096
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[70][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92098
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[70][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92100
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[70][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92102
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[70][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92104
+.subckt mux2_x1 cmd=$abc$109383$new_n23183_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[70][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92106
 .subckt inv_x0 i=$abc$109383$new_n19818_ nq=$abc$109383$new_n23192_
-.subckt a3_x2 i0=$abc$109383$new_n23192_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n23193_
+.subckt and3_x1 i0=$abc$109383$new_n23192_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n23193_
 .subckt buf_x4 i=$abc$109383$new_n23193_ q=$abc$109383$new_n23194_
 .subckt nand4_x0 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n20499_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n23195_
-.subckt a2_x2 i0=$abc$109383$new_n23195_ i1=soc.cpu.minerva.gprf.mem._mem[15][0] q=$abc$109383$new_n23196_
-.subckt a4_x2 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n20502_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n23197_
+.subckt and2_x1 i0=$abc$109383$new_n23195_ i1=soc.cpu.minerva.gprf.mem._mem[15][0] q=$abc$109383$new_n23196_
+.subckt and4_x1 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n20502_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n23197_
 .subckt buf_x4 i=$abc$109383$new_n19863_ q=$abc$109383$new_n23198_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n23197_ q=$abc$109383$new_n23199_
-.subckt o2_x2 i0=$abc$109383$new_n23199_ i1=$abc$109383$new_n23196_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92108
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n22102_ i2=$abc$109383$new_n23197_ nq=$abc$109383$new_n23199_
+.subckt or2_x1 i0=$abc$109383$new_n23199_ i1=$abc$109383$new_n23196_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92108
 .subckt buf_x4 i=$abc$109383$new_n23195_ q=$abc$109383$new_n23201_
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[15][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92110
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22105_ i1=soc.cpu.minerva.gprf.mem._mem[15][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92110
 .subckt buf_x4 i=$abc$109383$new_n19916_ q=$abc$109383$new_n23203_
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[15][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92112
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[15][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92114
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[15][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92112
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22109_ i1=soc.cpu.minerva.gprf.mem._mem[15][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92114
 .subckt buf_x4 i=$abc$109383$new_n19955_ q=$abc$109383$new_n23206_
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[15][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92116
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[15][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92118
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[15][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92120
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[15][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92122
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[15][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92124
-.subckt mx2_x2 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[15][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92126
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[15][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92116
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22112_ i1=soc.cpu.minerva.gprf.mem._mem[15][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92118
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22114_ i1=soc.cpu.minerva.gprf.mem._mem[15][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92120
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22116_ i1=soc.cpu.minerva.gprf.mem._mem[15][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92122
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22118_ i1=soc.cpu.minerva.gprf.mem._mem[15][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92124
+.subckt mux2_x1 cmd=$abc$109383$new_n23201_ i0=$abc$109383$new_n22120_ i1=soc.cpu.minerva.gprf.mem._mem[15][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92126
 .subckt buf_x4 i=$abc$109383$new_n23195_ q=$abc$109383$new_n23213_
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[15][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92128
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[15][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92130
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[15][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92132
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[15][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92134
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[15][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92136
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[15][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92138
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22122_ i1=soc.cpu.minerva.gprf.mem._mem[15][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92128
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22125_ i1=soc.cpu.minerva.gprf.mem._mem[15][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92130
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22127_ i1=soc.cpu.minerva.gprf.mem._mem[15][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92132
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22129_ i1=soc.cpu.minerva.gprf.mem._mem[15][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92134
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22131_ i1=soc.cpu.minerva.gprf.mem._mem[15][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92136
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n22133_ i1=soc.cpu.minerva.gprf.mem._mem[15][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92138
 .subckt buf_x4 i=$abc$109383$new_n20132_ q=$abc$109383$new_n23220_
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[15][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92140
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[15][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92140
 .subckt buf_x4 i=$abc$109383$new_n20139_ q=$abc$109383$new_n23222_
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[15][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92142
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[15][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92142
 .subckt buf_x4 i=$abc$109383$new_n20145_ q=$abc$109383$new_n23224_
-.subckt mx2_x2 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[15][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92144
+.subckt mux2_x1 cmd=$abc$109383$new_n23213_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[15][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92144
 .subckt buf_x4 i=$abc$109383$new_n20151_ q=$abc$109383$new_n23226_
 .subckt buf_x4 i=$abc$109383$new_n23195_ q=$abc$109383$new_n23227_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[15][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92146
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[15][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92146
 .subckt buf_x4 i=$abc$109383$new_n20158_ q=$abc$109383$new_n23229_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[15][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92148
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[15][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92148
 .subckt buf_x4 i=$abc$109383$new_n20164_ q=$abc$109383$new_n23231_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[15][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92150
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[15][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92150
 .subckt buf_x4 i=$abc$109383$new_n20170_ q=$abc$109383$new_n23233_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[15][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92152
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[15][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92152
 .subckt buf_x4 i=$abc$109383$new_n20176_ q=$abc$109383$new_n23235_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[15][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92154
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[15][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92154
 .subckt buf_x4 i=$abc$109383$new_n20182_ q=$abc$109383$new_n23237_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[15][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92156
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[15][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92156
 .subckt buf_x4 i=$abc$109383$new_n20188_ q=$abc$109383$new_n23239_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[15][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92158
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[15][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92158
 .subckt buf_x4 i=$abc$109383$new_n20194_ q=$abc$109383$new_n23241_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[15][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92160
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[15][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92160
 .subckt buf_x4 i=$abc$109383$new_n20200_ q=$abc$109383$new_n23243_
-.subckt mx2_x2 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[15][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92162
+.subckt mux2_x1 cmd=$abc$109383$new_n23227_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[15][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92162
 .subckt buf_x4 i=$abc$109383$new_n20206_ q=$abc$109383$new_n23245_
-.subckt mx2_x2 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[15][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92164
+.subckt mux2_x1 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[15][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92164
 .subckt buf_x4 i=$abc$109383$new_n20212_ q=$abc$109383$new_n23247_
-.subckt mx2_x2 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[15][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92166
+.subckt mux2_x1 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[15][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92166
 .subckt buf_x4 i=$abc$109383$new_n20218_ q=$abc$109383$new_n23249_
-.subckt mx2_x2 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[15][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92168
+.subckt mux2_x1 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[15][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92168
 .subckt buf_x4 i=$abc$109383$new_n20224_ q=$abc$109383$new_n23251_
-.subckt mx2_x2 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[15][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92170
+.subckt mux2_x1 cmd=$abc$109383$new_n23195_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[15][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92170
 .subckt buf_x4 i=$abc$109383$new_n20269_ q=$abc$109383$new_n23253_
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n23254_
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[70][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92172
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[70][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92174
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[70][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92176
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[70][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92178
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[70][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92180
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[70][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92182
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[70][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92184
-.subckt mx2_x2 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[70][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92186
-.subckt a3_x2 i0=$abc$109383$new_n20268_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19750_ q=$abc$109383$new_n23263_
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[70][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92172
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[70][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92174
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[70][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92176
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[70][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92178
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[70][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92180
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[70][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92182
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[70][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92184
+.subckt mux2_x1 cmd=$abc$109383$new_n23254_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[70][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92186
+.subckt and3_x1 i0=$abc$109383$new_n20268_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19750_ q=$abc$109383$new_n23263_
 .subckt nand2_x0 i0=$abc$109383$new_n23263_ i1=$abc$109383$new_n21401_ nq=$abc$109383$new_n23264_
 .subckt buf_x4 i=$abc$109383$new_n23264_ q=$abc$109383$new_n23265_
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[6][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92188
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[6][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92190
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[6][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92192
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[6][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92194
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[6][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92196
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[6][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92198
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[6][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92200
-.subckt mx2_x2 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[6][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92202
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[6][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92188
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[6][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92190
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[6][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92192
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[6][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92194
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[6][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92196
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[6][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92198
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[6][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92200
+.subckt mux2_x1 cmd=$abc$109383$new_n23265_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[6][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92202
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n23274_
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[104][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92204
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[104][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92206
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[104][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92208
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[104][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92210
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[104][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92212
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[104][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92214
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[104][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92216
-.subckt mx2_x2 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[104][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92218
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[104][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92204
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[104][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92206
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[104][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92208
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[104][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92210
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[104][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92212
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[104][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92214
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[104][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92216
+.subckt mux2_x1 cmd=$abc$109383$new_n23274_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[104][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92218
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n21479_ nq=$abc$109383$new_n23283_
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[68][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92220
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[68][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92222
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[68][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92224
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[68][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92226
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[68][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92228
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[68][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92230
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[68][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92232
-.subckt mx2_x2 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[68][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92234
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[68][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92220
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[68][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92222
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[68][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92224
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[68][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92226
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[68][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92228
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[68][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92230
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[68][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92232
+.subckt mux2_x1 cmd=$abc$109383$new_n23283_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[68][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92234
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n21479_ i2=$abc$109383$new_n21381_ nq=$abc$109383$new_n23292_
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[68][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92236
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[68][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92238
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[68][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92240
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[68][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92242
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[68][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92244
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[68][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92246
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[68][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92248
-.subckt mx2_x2 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[68][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92250
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[68][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92236
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[68][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92238
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[68][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92240
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[68][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92242
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[68][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92244
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[68][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92246
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[68][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92248
+.subckt mux2_x1 cmd=$abc$109383$new_n23292_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[68][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92250
 .subckt buf_x4 i=$abc$109383$new_n20886_ q=$abc$109383$new_n23301_
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n23302_
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[69][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92252
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[69][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92254
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[69][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92256
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[69][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92258
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[69][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92260
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[69][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92262
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[69][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92264
-.subckt mx2_x2 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[69][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92266
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[69][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92252
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[69][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92254
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[69][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92256
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[69][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92258
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[69][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92260
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[69][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92262
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[69][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92264
+.subckt mux2_x1 cmd=$abc$109383$new_n23302_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[69][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92266
 .subckt nand2_x0 i0=$abc$109383$new_n23263_ i1=$abc$109383$new_n20801_ nq=$abc$109383$new_n23311_
 .subckt buf_x4 i=$abc$109383$new_n23311_ q=$abc$109383$new_n23312_
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[6][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92268
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[6][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92270
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[6][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92272
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[6][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92274
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[6][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92276
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[6][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92278
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[6][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92280
-.subckt mx2_x2 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[6][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92282
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[6][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92268
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[6][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92270
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[6][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92272
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[6][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92274
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[6][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92276
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[6][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92278
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[6][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92280
+.subckt mux2_x1 cmd=$abc$109383$new_n23312_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[6][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92282
 .subckt nand2_x0 i0=$abc$109383$new_n23263_ i1=$abc$109383$new_n21381_ nq=$abc$109383$new_n23321_
 .subckt buf_x4 i=$abc$109383$new_n23321_ q=$abc$109383$new_n23322_
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[6][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92284
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[6][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92286
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[6][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92288
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[6][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92290
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[6][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92292
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[6][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92294
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[6][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92296
-.subckt mx2_x2 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[6][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92298
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[6][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92284
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[6][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92286
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[6][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92288
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[6][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92290
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[6][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92292
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[6][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92294
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[6][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92296
+.subckt mux2_x1 cmd=$abc$109383$new_n23322_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[6][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92298
 .subckt nand3_x0 i0=$abc$109383$new_n22825_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n21884_ nq=$abc$109383$new_n23331_
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[67][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92300
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[67][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92302
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[67][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92304
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[67][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92306
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[67][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92308
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[67][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92310
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[67][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92312
-.subckt mx2_x2 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[67][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92314
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[67][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92300
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[67][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92302
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22896_ i1=soc.ram.ram[67][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92304
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22898_ i1=soc.ram.ram[67][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92306
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22900_ i1=soc.ram.ram[67][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92308
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[67][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92310
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22903_ i1=soc.ram.ram[67][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92312
+.subckt mux2_x1 cmd=$abc$109383$new_n23331_ i0=$abc$109383$new_n22905_ i1=soc.ram.ram[67][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92314
 .subckt buf_x4 i=$abc$109383$new_n22824_ q=$abc$109383$new_n23340_
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n21401_ nq=$abc$109383$new_n23341_
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[67][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92316
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[67][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92318
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[67][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92320
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[67][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92322
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[67][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92324
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[67][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92326
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[67][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92328
-.subckt mx2_x2 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[67][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92330
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[67][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92316
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[67][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92318
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[67][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92320
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[67][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92322
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[67][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92324
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[67][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92326
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[67][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92328
+.subckt mux2_x1 cmd=$abc$109383$new_n23341_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[67][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92330
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n21401_ nq=$abc$109383$new_n23350_
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[69][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92332
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[69][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92334
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[69][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92336
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[69][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92338
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[69][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92340
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[69][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92342
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[69][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92344
-.subckt mx2_x2 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[69][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92346
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[69][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92332
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[69][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92334
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[69][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92336
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[69][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92338
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[69][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92340
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[69][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92342
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[69][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92344
+.subckt mux2_x1 cmd=$abc$109383$new_n23350_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[69][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92346
 .subckt buf_x4 i=$abc$109383$new_n19740_ q=$abc$109383$new_n23359_
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n21479_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n23360_
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[68][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92348
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[68][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92350
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n22907_ i1=soc.ram.ram[68][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92348
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n22910_ i1=soc.ram.ram[68][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92350
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n23363_
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[68][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92352
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[68][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92352
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n23365_
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[68][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92354
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[68][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92354
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n23367_
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[68][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92356
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[68][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92358
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[68][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92356
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n22915_ i1=soc.ram.ram[68][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92358
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n23370_
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[68][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92360
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[68][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92360
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n23372_
-.subckt mx2_x2 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[68][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92362
+.subckt mux2_x1 cmd=$abc$109383$new_n23360_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[68][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92362
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n21381_ nq=$abc$109383$new_n23374_
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[69][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92364
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[69][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92366
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[69][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92368
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[69][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92370
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[69][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92372
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[69][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92374
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[69][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92376
-.subckt mx2_x2 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[69][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92378
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[69][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92364
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[69][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92366
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[69][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92368
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[69][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92370
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[69][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92372
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[69][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92374
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[69][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92376
+.subckt mux2_x1 cmd=$abc$109383$new_n23374_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[69][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92378
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n23383_
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[25][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92416
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[25][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92418
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[25][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92420
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[25][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92422
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[25][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92424
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[25][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92426
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[25][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92428
-.subckt mx2_x2 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[25][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92430
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[25][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92416
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[25][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92418
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[25][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92420
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[25][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92422
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[25][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92424
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[25][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92426
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[25][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92428
+.subckt mux2_x1 cmd=$abc$109383$new_n23383_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[25][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92430
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n23392_
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n22200_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n23393_
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[34][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92432
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[34][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92432
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n23395_
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[34][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92434
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[34][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92436
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[34][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92438
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[34][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92440
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[34][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92434
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[34][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92436
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[34][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92438
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[34][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92440
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n23400_
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[34][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92442
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[34][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92444
-.subckt mx2_x2 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[34][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92446
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[34][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92442
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[34][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92444
+.subckt mux2_x1 cmd=$abc$109383$new_n23393_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[34][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92446
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n23404_
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[24][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92448
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[24][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92450
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[24][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92452
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[24][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92454
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[24][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92456
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[24][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92458
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[24][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92460
-.subckt mx2_x2 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[24][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92462
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[24][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92448
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[24][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92450
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[24][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92452
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[24][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92454
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[24][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92456
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[24][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92458
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[24][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92460
+.subckt mux2_x1 cmd=$abc$109383$new_n23404_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[24][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92462
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n23413_
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[24][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92464
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[24][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92466
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[24][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92468
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[24][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92470
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[24][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92472
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[24][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92474
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[24][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92476
-.subckt mx2_x2 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[24][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92478
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[24][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92464
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[24][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92466
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[24][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92468
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[24][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92470
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[24][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92472
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[24][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92474
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[24][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92476
+.subckt mux2_x1 cmd=$abc$109383$new_n23413_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[24][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92478
 .subckt nand4_x0 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n20304_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n23422_
-.subckt a2_x2 i0=$abc$109383$new_n23422_ i1=soc.cpu.minerva.gprf.mem._mem[14][0] q=$abc$109383$new_n23423_
-.subckt a4_x2 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n23424_
+.subckt and2_x1 i0=$abc$109383$new_n23422_ i1=soc.cpu.minerva.gprf.mem._mem[14][0] q=$abc$109383$new_n23423_
+.subckt and4_x1 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n20308_ i3=$abc$109383$new_n20307_ q=$abc$109383$new_n23424_
 .subckt buf_x4 i=$abc$109383$new_n19869_ q=$abc$109383$new_n23425_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n23424_ q=$abc$109383$new_n23426_
-.subckt o2_x2 i0=$abc$109383$new_n23426_ i1=$abc$109383$new_n23423_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92480
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n23424_ nq=$abc$109383$new_n23426_
+.subckt or2_x1 i0=$abc$109383$new_n23426_ i1=$abc$109383$new_n23423_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92480
 .subckt buf_x4 i=$abc$109383$new_n19898_ q=$abc$109383$new_n23428_
 .subckt buf_x4 i=$abc$109383$new_n23422_ q=$abc$109383$new_n23429_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[14][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92482
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[14][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92484
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[14][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92482
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[14][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92484
 .subckt buf_x4 i=$abc$109383$new_n19937_ q=$abc$109383$new_n23432_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[14][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92486
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[14][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92488
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[14][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92486
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[14][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92488
 .subckt buf_x4 i=$abc$109383$new_n19973_ q=$abc$109383$new_n23435_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[14][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92490
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[14][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92490
 .subckt buf_x4 i=$abc$109383$new_n19990_ q=$abc$109383$new_n23437_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[14][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92492
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[14][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92492
 .subckt buf_x4 i=$abc$109383$new_n20008_ q=$abc$109383$new_n23439_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[14][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92494
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[14][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92494
 .subckt buf_x4 i=$abc$109383$new_n20027_ q=$abc$109383$new_n23441_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[14][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92496
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[14][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92496
 .subckt buf_x4 i=$abc$109383$new_n20039_ q=$abc$109383$new_n23443_
-.subckt mx2_x2 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[14][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92498
+.subckt mux2_x1 cmd=$abc$109383$new_n23429_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[14][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92498
 .subckt buf_x4 i=$abc$109383$new_n20052_ q=$abc$109383$new_n23445_
 .subckt buf_x4 i=$abc$109383$new_n23422_ q=$abc$109383$new_n23446_
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[14][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92500
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[14][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92500
 .subckt buf_x4 i=$abc$109383$new_n20067_ q=$abc$109383$new_n23448_
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[14][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92502
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[14][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92502
 .subckt buf_x4 i=$abc$109383$new_n20080_ q=$abc$109383$new_n23450_
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[14][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92504
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[14][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92504
 .subckt buf_x4 i=$abc$109383$new_n20094_ q=$abc$109383$new_n23452_
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[14][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92506
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[14][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92506
 .subckt buf_x4 i=$abc$109383$new_n20108_ q=$abc$109383$new_n23454_
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[14][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92508
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[14][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92508
 .subckt buf_x4 i=$abc$109383$new_n20121_ q=$abc$109383$new_n23456_
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[14][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92510
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[14][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92512
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[14][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92514
-.subckt mx2_x2 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[14][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92516
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[14][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92510
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[14][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92512
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[14][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92514
+.subckt mux2_x1 cmd=$abc$109383$new_n23446_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[14][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92516
 .subckt buf_x4 i=$abc$109383$new_n23422_ q=$abc$109383$new_n23461_
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[14][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92518
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[14][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92520
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[14][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92522
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[14][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92524
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[14][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92526
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[14][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92528
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[14][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92530
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[14][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92532
-.subckt mx2_x2 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[14][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92534
-.subckt mx2_x2 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[14][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92536
-.subckt mx2_x2 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[14][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92538
-.subckt mx2_x2 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[14][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92540
-.subckt mx2_x2 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[14][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92542
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[14][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92518
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[14][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92520
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[14][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92522
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[14][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92524
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[14][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92526
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[14][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92528
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[14][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92530
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[14][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92532
+.subckt mux2_x1 cmd=$abc$109383$new_n23461_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[14][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92534
+.subckt mux2_x1 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[14][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92536
+.subckt mux2_x1 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[14][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92538
+.subckt mux2_x1 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[14][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92540
+.subckt mux2_x1 cmd=$abc$109383$new_n23422_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[14][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92542
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n23475_
 .subckt nand3_x0 i0=$abc$109383$new_n23475_ i1=$abc$109383$new_n21611_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n23476_
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[18][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92544
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[18][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92546
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[18][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92548
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[18][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92550
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[18][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92552
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[18][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92554
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[18][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92556
-.subckt mx2_x2 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[18][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92558
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22410_ i1=soc.ram.ram[18][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92544
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22414_ i1=soc.ram.ram[18][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92546
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22417_ i1=soc.ram.ram[18][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92548
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22420_ i1=soc.ram.ram[18][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92550
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22423_ i1=soc.ram.ram[18][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92552
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22425_ i1=soc.ram.ram[18][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92554
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22428_ i1=soc.ram.ram[18][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92556
+.subckt mux2_x1 cmd=$abc$109383$new_n23476_ i0=$abc$109383$new_n22431_ i1=soc.ram.ram[18][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92558
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n21099_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n23485_
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[127][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92560
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[127][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92562
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[127][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92564
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[127][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92566
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[127][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92568
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[127][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92570
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[127][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92572
-.subckt mx2_x2 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[127][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92574
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[127][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92560
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[127][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92562
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[127][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92564
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[127][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92566
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[127][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92568
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[127][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92570
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[127][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92572
+.subckt mux2_x1 cmd=$abc$109383$new_n23485_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[127][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92574
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n23494_
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[119][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92576
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[119][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92578
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[119][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92580
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[119][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92582
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[119][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92584
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[119][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92586
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[119][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92588
-.subckt mx2_x2 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[119][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92590
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[119][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92576
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[119][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92578
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[119][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92580
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[119][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92582
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23018_ i1=soc.ram.ram[119][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92584
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23020_ i1=soc.ram.ram[119][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92586
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23022_ i1=soc.ram.ram[119][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92588
+.subckt mux2_x1 cmd=$abc$109383$new_n23494_ i0=$abc$109383$new_n23024_ i1=soc.ram.ram[119][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92590
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n23503_
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[39][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92592
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[39][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92594
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[39][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92596
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[39][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92598
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[39][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92600
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[39][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92602
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[39][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92604
-.subckt mx2_x2 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[39][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92606
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23026_ i1=soc.ram.ram[39][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92592
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23030_ i1=soc.ram.ram[39][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92594
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23032_ i1=soc.ram.ram[39][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92596
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[39][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92598
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23035_ i1=soc.ram.ram[39][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92600
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23037_ i1=soc.ram.ram[39][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92602
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23039_ i1=soc.ram.ram[39][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92604
+.subckt mux2_x1 cmd=$abc$109383$new_n23503_ i0=$abc$109383$new_n23041_ i1=soc.ram.ram[39][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92606
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n23512_
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[81][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92608
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[81][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92610
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[81][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92612
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[81][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92614
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[81][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92616
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[81][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92618
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[81][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92620
-.subckt mx2_x2 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[81][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92622
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[81][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92608
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[81][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92610
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[81][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92612
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[81][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92614
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[81][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92616
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[81][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92618
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[81][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92620
+.subckt mux2_x1 cmd=$abc$109383$new_n23512_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[81][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92622
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n23521_
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[39][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92624
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[39][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92626
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[39][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92628
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[39][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92630
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23063_ i1=soc.ram.ram[39][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92624
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23067_ i1=soc.ram.ram[39][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92626
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23069_ i1=soc.ram.ram[39][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92628
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23071_ i1=soc.ram.ram[39][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92630
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n23526_
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[39][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92632
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[39][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92632
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n23528_
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[39][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92634
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[39][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92634
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n23530_
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[39][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92636
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[39][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92636
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n23532_
-.subckt mx2_x2 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[39][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92638
+.subckt mux2_x1 cmd=$abc$109383$new_n23521_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[39][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92638
 .subckt buf_x4 i=$abc$109383$new_n20851_ q=$abc$109383$new_n23534_
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n22814_ nq=$abc$109383$new_n23535_
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[80][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92640
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[80][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92642
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[80][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92644
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[80][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92646
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[80][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92648
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[80][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92650
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[80][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92652
-.subckt mx2_x2 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[80][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92654
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[80][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92640
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[80][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92642
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[80][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92644
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[80][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92646
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[80][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92648
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[80][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92650
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[80][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92652
+.subckt mux2_x1 cmd=$abc$109383$new_n23535_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[80][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92654
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n23544_
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n23545_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[39][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92656
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[39][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92656
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n23547_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[39][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92658
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[39][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92658
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n23549_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[39][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92660
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[39][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92660
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n23551_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[39][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92662
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[39][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92662
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n23553_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[39][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92664
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[39][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92664
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n23555_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[39][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92666
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[39][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92666
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n23557_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[39][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92668
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[39][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92668
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n23559_
-.subckt mx2_x2 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[39][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92670
-.subckt a3_x2 i0=$abc$109383$new_n19781_ i1=$abc$109383$new_n19750_ i2=$abc$109383$new_n19747_ q=$abc$109383$new_n23561_
+.subckt mux2_x1 cmd=$abc$109383$new_n23545_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[39][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92670
+.subckt and3_x1 i0=$abc$109383$new_n19781_ i1=$abc$109383$new_n19750_ i2=$abc$109383$new_n19747_ q=$abc$109383$new_n23561_
 .subckt nand2_x0 i0=$abc$109383$new_n23561_ i1=$abc$109383$new_n19741_ nq=$abc$109383$new_n23562_
 .subckt buf_x4 i=$abc$109383$new_n23562_ q=$abc$109383$new_n23563_
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[7][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92672
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[7][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92674
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[7][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92676
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[7][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92678
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[7][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92680
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[7][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92682
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[7][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92684
-.subckt mx2_x2 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[7][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92686
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[7][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92672
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[7][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92674
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[7][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92676
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[7][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92678
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[7][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92680
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[7][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92682
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[7][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92684
+.subckt mux2_x1 cmd=$abc$109383$new_n23563_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[7][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92686
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n23572_
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n23573_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[38][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92688
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[38][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92688
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n23575_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[38][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92690
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[38][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92690
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n23577_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[38][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92692
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[38][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92694
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[38][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92692
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23047_ i1=soc.ram.ram[38][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92694
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n23580_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[38][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92696
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[38][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92696
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n23582_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[38][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92698
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[38][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92698
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n23584_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[38][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92700
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[38][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92700
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n23586_
-.subckt mx2_x2 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[38][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92702
+.subckt mux2_x1 cmd=$abc$109383$new_n23573_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[38][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92702
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n23588_
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[78][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92704
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[78][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92706
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[78][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92708
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[78][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92710
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[78][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92712
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[78][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92714
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[78][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92716
-.subckt mx2_x2 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[78][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92718
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[78][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92704
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[78][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92706
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[78][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92708
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[78][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92710
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[78][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92712
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[78][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92714
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[78][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92716
+.subckt mux2_x1 cmd=$abc$109383$new_n23588_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[78][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92718
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n23597_
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n23598_
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[38][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92720
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[38][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92720
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n23600_
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[38][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92722
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[38][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92722
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n23602_
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[38][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92724
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[38][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92724
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n23604_
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[38][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92726
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[38][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92728
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[38][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92730
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[38][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92732
-.subckt mx2_x2 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[38][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92734
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[38][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92726
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[38][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92728
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[38][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92730
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[38][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92732
+.subckt mux2_x1 cmd=$abc$109383$new_n23598_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[38][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92734
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n21585_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n23610_
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[77][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92736
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[77][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92738
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[77][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92740
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[77][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92736
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[77][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92738
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[77][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92740
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n23614_
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[77][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92742
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[77][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92744
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[77][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92746
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[77][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92748
-.subckt mx2_x2 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[77][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92750
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[77][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92742
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[77][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92744
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[77][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92746
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[77][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92748
+.subckt mux2_x1 cmd=$abc$109383$new_n23610_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[77][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92750
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n20801_ nq=$abc$109383$new_n23620_
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[38][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92752
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[38][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92754
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[38][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92756
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[38][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92758
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[38][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92760
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[38][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92762
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[38][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92764
-.subckt mx2_x2 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[38][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92766
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[38][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92752
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[38][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92754
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[38][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92756
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[38][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92758
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[38][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92760
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[38][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92762
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[38][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92764
+.subckt mux2_x1 cmd=$abc$109383$new_n23620_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[38][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92766
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n22286_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n23629_
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[103][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92768
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[103][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92770
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[103][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92772
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[103][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92774
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[103][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92776
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[103][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92778
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[103][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92780
-.subckt mx2_x2 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[103][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92782
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[103][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92768
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[103][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92770
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[103][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92772
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[103][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92774
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[103][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92776
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[103][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92778
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[103][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92780
+.subckt mux2_x1 cmd=$abc$109383$new_n23629_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[103][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92782
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n21586_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n19806_ nq=$abc$109383$new_n23638_
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[88][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92784
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[88][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92786
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[88][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92788
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[88][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92790
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[88][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92792
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[88][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92794
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[88][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92796
-.subckt mx2_x2 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[88][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92798
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[88][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92784
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[88][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92786
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[88][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92788
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[88][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92790
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[88][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92792
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[88][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92794
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[88][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92796
+.subckt mux2_x1 cmd=$abc$109383$new_n23638_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[88][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92798
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n21835_ nq=$abc$109383$new_n23647_
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[41][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92800
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[41][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92802
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[41][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92804
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[41][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92806
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[41][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92808
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[41][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92810
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[41][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92812
-.subckt mx2_x2 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[41][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92814
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[41][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92800
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[41][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92802
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[41][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92804
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[41][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92806
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[41][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92808
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[41][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92810
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[41][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92812
+.subckt mux2_x1 cmd=$abc$109383$new_n23647_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[41][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92814
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n19806_ nq=$abc$109383$new_n23656_
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[40][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92816
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[40][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92818
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[40][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92820
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[40][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92822
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[40][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92824
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[40][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92826
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[40][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92828
-.subckt mx2_x2 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[40][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92830
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[40][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92816
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[40][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92818
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[40][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92820
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[40][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92822
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[40][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92824
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[40][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92826
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[40][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92828
+.subckt mux2_x1 cmd=$abc$109383$new_n23656_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[40][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92830
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n19752_ nq=$abc$109383$new_n23665_
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[87][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92832
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[87][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92834
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[87][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92836
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[87][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92838
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[87][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92840
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[87][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92842
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[87][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92844
-.subckt mx2_x2 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[87][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92846
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[87][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92832
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[87][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92834
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[87][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92836
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[87][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92838
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[87][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92840
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[87][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92842
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[87][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92844
+.subckt mux2_x1 cmd=$abc$109383$new_n23665_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[87][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92846
 .subckt buf_x4 i=$abc$109383$new_n20852_ q=$abc$109383$new_n23674_
 .subckt nand4_x0 i0=$abc$109383$new_n23053_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n22041_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n23675_
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[86][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92848
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[86][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92850
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[86][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92852
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[86][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92854
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[86][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92856
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[86][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92858
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[86][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92860
-.subckt mx2_x2 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[86][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92862
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[86][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92848
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[86][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92850
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[86][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92852
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[86][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92854
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[86][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92856
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[86][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92858
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[86][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92860
+.subckt mux2_x1 cmd=$abc$109383$new_n23675_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[86][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92862
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n19806_ nq=$abc$109383$new_n23684_
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[40][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92864
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[40][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92866
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[40][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92868
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[40][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92870
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[40][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92872
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[40][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92874
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[40][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92876
-.subckt mx2_x2 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[40][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92878
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[40][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92864
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[40][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92866
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[40][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92868
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[40][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92870
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[40][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92872
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[40][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92874
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[40][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92876
+.subckt mux2_x1 cmd=$abc$109383$new_n23684_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[40][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92878
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n19806_ nq=$abc$109383$new_n23693_
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[40][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92880
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[40][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92882
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[40][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92884
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[40][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92886
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[40][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92888
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[40][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92890
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[40][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92892
-.subckt mx2_x2 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[40][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92894
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[40][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92880
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[40][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92882
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[40][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92884
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[40][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92886
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[40][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92888
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[40][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92890
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[40][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92892
+.subckt mux2_x1 cmd=$abc$109383$new_n23693_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[40][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92894
 .subckt buf_x4 i=$abc$109383$new_n20886_ q=$abc$109383$new_n23702_
 .subckt buf_x4 i=$abc$109383$new_n21591_ q=$abc$109383$new_n23703_
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n23704_
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[85][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92896
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[85][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92898
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[85][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92900
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[85][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92902
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[85][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92904
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[85][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92906
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[85][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92908
-.subckt mx2_x2 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[85][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92910
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[85][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92896
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[85][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92898
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[85][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92900
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[85][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92902
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[85][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92904
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[85][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92906
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[85][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92908
+.subckt mux2_x1 cmd=$abc$109383$new_n23704_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[85][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92910
 .subckt buf_x4 i=$abc$109383$new_n14929_ q=$abc$109383$new_n23713_
-.subckt o4_x2 i0=$abc$109383$new_n19696_ i1=$abc$109383$new_n23713_ i2=$abc$109383$new_n19694_ i3=$abc$109383$new_n19698_ q=$abc$109383$new_n23714_
+.subckt or4_x1 i0=$abc$109383$new_n19696_ i1=$abc$109383$new_n23713_ i2=$abc$109383$new_n19694_ i3=$abc$109383$new_n19698_ q=$abc$109383$new_n23714_
 .subckt nand2_x0 i0=$abc$109383$new_n23714_ i1=$abc$109383$new_n19744_ nq=$abc$109383$new_n23715_
 .subckt buf_x4 i=$abc$109383$new_n23715_ q=$abc$109383$new_n23716_
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n23717_
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[3][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92912
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[3][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92914
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[3][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92916
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[3][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92918
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[3][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92920
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[3][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92922
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[3][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92924
-.subckt mx2_x2 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[3][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92926
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[3][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92912
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[3][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92914
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[3][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92916
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[3][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92918
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[3][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92920
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[3][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92922
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[3][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92924
+.subckt mux2_x1 cmd=$abc$109383$new_n23717_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[3][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92926
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n23726_
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[84][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92928
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[84][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92930
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[84][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92932
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[84][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92934
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[84][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92936
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[84][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92938
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[84][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92940
-.subckt mx2_x2 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[84][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92942
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[84][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92928
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[84][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92930
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[84][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92932
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[84][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92934
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[84][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92936
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[84][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92938
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[84][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92940
+.subckt mux2_x1 cmd=$abc$109383$new_n23726_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[84][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92942
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n21401_ nq=$abc$109383$new_n23735_
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[3][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92944
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[3][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92946
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[3][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92948
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[3][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92950
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[3][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92952
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[3][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92954
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[3][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92956
-.subckt mx2_x2 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[3][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92958
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[3][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92944
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[3][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92946
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[3][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92948
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[3][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92950
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[3][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92952
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[3][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92954
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[3][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92956
+.subckt mux2_x1 cmd=$abc$109383$new_n23735_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[3][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92958
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n23744_
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[83][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92960
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[83][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92962
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[83][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92964
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[83][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92966
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[83][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92968
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[83][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92970
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[83][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92972
-.subckt mx2_x2 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[83][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92974
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[83][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92960
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[83][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92962
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[83][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92964
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[83][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92966
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[83][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92968
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[83][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92970
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[83][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92972
+.subckt mux2_x1 cmd=$abc$109383$new_n23744_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[83][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92974
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n21381_ nq=$abc$109383$new_n23753_
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[3][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92976
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[3][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92978
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[3][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92980
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[3][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92982
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[3][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92984
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[3][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92986
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[3][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92988
-.subckt mx2_x2 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[3][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92990
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[3][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92976
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[3][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92978
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[3][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92980
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[3][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92982
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[3][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92984
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[3][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92986
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[3][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92988
+.subckt mux2_x1 cmd=$abc$109383$new_n23753_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[3][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92990
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n21250_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n23762_
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[82][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92992
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[82][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92994
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[82][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92996
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[82][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92998
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[82][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93000
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[82][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93002
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[82][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93004
-.subckt mx2_x2 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[82][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93006
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[82][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92992
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[82][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92994
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[82][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92996
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[82][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92998
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[82][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93000
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[82][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93002
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[82][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93004
+.subckt mux2_x1 cmd=$abc$109383$new_n23762_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[82][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93006
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n20828_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n23771_
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[62][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93040
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[62][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93042
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[62][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93044
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[62][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93046
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[62][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93048
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[62][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93050
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[62][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93052
-.subckt mx2_x2 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[62][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93054
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[62][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93040
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[62][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93042
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[62][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93044
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[62][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93046
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[62][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93048
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[62][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93050
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[62][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93052
+.subckt mux2_x1 cmd=$abc$109383$new_n23771_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[62][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93054
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n23780_
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n23781_
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[63][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93056
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[63][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93058
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[63][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93060
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[63][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93062
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[63][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93064
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[63][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93066
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[63][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93068
-.subckt mx2_x2 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[63][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93070
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[63][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93056
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[63][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93058
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[63][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93060
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[63][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93062
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[63][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93064
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[63][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93066
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[63][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93068
+.subckt mux2_x1 cmd=$abc$109383$new_n23781_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[63][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93070
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n23790_
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[64][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93072
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[64][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93074
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[64][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93076
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[64][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93078
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[64][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93080
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[64][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93082
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[64][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93084
-.subckt mx2_x2 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[64][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93086
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[64][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93072
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[64][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93074
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23363_ i1=soc.ram.ram[64][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93076
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23365_ i1=soc.ram.ram[64][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93078
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23367_ i1=soc.ram.ram[64][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93080
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[64][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93082
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23370_ i1=soc.ram.ram[64][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93084
+.subckt mux2_x1 cmd=$abc$109383$new_n23790_ i0=$abc$109383$new_n23372_ i1=soc.ram.ram[64][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93086
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n23799_
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[64][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93088
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[64][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93090
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[64][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93092
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[64][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93094
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[64][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93096
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[64][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93098
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[64][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93100
-.subckt mx2_x2 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[64][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93102
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[64][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93088
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[64][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93090
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[64][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93092
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[64][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93094
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[64][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93096
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[64][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93098
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[64][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93100
+.subckt mux2_x1 cmd=$abc$109383$new_n23799_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[64][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93102
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n20827_ i3=$abc$109383$new_n19752_ nq=$abc$109383$new_n23808_
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[63][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93104
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[63][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93106
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[63][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93108
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[63][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93110
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[63][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93112
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[63][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93114
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[63][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93116
-.subckt mx2_x2 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[63][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93118
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[63][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93104
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[63][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93106
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[63][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93108
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[63][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93110
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[63][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93112
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[63][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93114
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[63][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93116
+.subckt mux2_x1 cmd=$abc$109383$new_n23808_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[63][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93118
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n20828_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n23817_
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[62][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93120
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[62][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93122
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[62][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93124
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[62][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93126
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[62][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93128
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[62][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93130
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[62][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93132
-.subckt mx2_x2 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[62][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93134
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[62][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93120
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[62][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93122
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[62][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93124
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[62][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93126
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[62][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93128
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[62][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93130
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[62][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93132
+.subckt mux2_x1 cmd=$abc$109383$new_n23817_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[62][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93134
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n23826_
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[64][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93136
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[64][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93138
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[64][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93140
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[64][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93142
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[64][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93144
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[64][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93146
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[64][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93148
-.subckt mx2_x2 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[64][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93150
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[64][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93136
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[64][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93138
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[64][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93140
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[64][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93142
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[64][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93144
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[64][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93146
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[64][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93148
+.subckt mux2_x1 cmd=$abc$109383$new_n23826_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[64][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93150
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n21177_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n23835_
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[65][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93152
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[65][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93154
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[65][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93156
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[65][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93158
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[65][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93160
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[65][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93162
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[65][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93164
-.subckt mx2_x2 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[65][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93166
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[65][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93152
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[65][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93154
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[65][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93156
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[65][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93158
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[65][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93160
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[65][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93162
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[65][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93164
+.subckt mux2_x1 cmd=$abc$109383$new_n23835_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[65][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93166
 .subckt buf_x4 i=$abc$109383$new_n20826_ q=$abc$109383$new_n23844_
 .subckt nand4_x0 i0=$abc$109383$new_n22920_ i1=$abc$109383$new_n21431_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n19752_ nq=$abc$109383$new_n23845_
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[63][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93168
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[63][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93170
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[63][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93172
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[63][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93174
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[63][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93176
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[63][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93178
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[63][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93180
-.subckt mx2_x2 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[63][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93182
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[63][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93168
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[63][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93170
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[63][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93172
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[63][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93174
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23526_ i1=soc.ram.ram[63][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93176
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23528_ i1=soc.ram.ram[63][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93178
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23530_ i1=soc.ram.ram[63][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93180
+.subckt mux2_x1 cmd=$abc$109383$new_n23845_ i0=$abc$109383$new_n23532_ i1=soc.ram.ram[63][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93182
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n22238_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n23854_
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[65][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93184
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[65][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93186
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[65][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93188
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[65][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93190
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23597_ i1=soc.ram.ram[65][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93184
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23600_ i1=soc.ram.ram[65][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93186
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23602_ i1=soc.ram.ram[65][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93188
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23604_ i1=soc.ram.ram[65][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93190
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n23859_
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[65][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93192
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[65][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93192
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n23861_
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[65][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93194
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[65][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93194
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n23863_
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[65][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93196
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[65][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93196
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n23865_
-.subckt mx2_x2 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[65][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93198
+.subckt mux2_x1 cmd=$abc$109383$new_n23854_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[65][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93198
 .subckt nand3_x0 i0=$abc$109383$new_n23340_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n23867_
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[65][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93200
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[65][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93202
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[65][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93204
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[65][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93206
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[65][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93208
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[65][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93210
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[65][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93212
-.subckt mx2_x2 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[65][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93214
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23572_ i1=soc.ram.ram[65][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93200
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23575_ i1=soc.ram.ram[65][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93202
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23577_ i1=soc.ram.ram[65][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93204
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[65][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93206
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23580_ i1=soc.ram.ram[65][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93208
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23582_ i1=soc.ram.ram[65][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93210
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23584_ i1=soc.ram.ram[65][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93212
+.subckt mux2_x1 cmd=$abc$109383$new_n23867_ i0=$abc$109383$new_n23586_ i1=soc.ram.ram[65][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93214
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n23876_
 .subckt buf_x4 i=$abc$109383$new_n22824_ q=$abc$109383$new_n23877_
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n23878_
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[66][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93216
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[66][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93218
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[66][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93220
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[66][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93222
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[66][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93224
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[66][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93226
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[66][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93228
-.subckt mx2_x2 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[66][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93230
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23544_ i1=soc.ram.ram[66][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93216
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23547_ i1=soc.ram.ram[66][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93218
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23549_ i1=soc.ram.ram[66][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93220
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23551_ i1=soc.ram.ram[66][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93222
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23553_ i1=soc.ram.ram[66][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93224
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23555_ i1=soc.ram.ram[66][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93226
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23557_ i1=soc.ram.ram[66][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93228
+.subckt mux2_x1 cmd=$abc$109383$new_n23878_ i0=$abc$109383$new_n23559_ i1=soc.ram.ram[66][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93230
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n23887_
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n23888_
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n23889_
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[66][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93232
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[66][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93232
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n23891_
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[66][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93234
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[66][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93234
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n23893_
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[66][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93236
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[66][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93236
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n23895_
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[66][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93238
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[66][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93240
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[66][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93242
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[66][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93244
-.subckt mx2_x2 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[66][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93246
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[66][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93238
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[66][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93240
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[66][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93242
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[66][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93244
+.subckt mux2_x1 cmd=$abc$109383$new_n23889_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[66][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93246
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n23901_
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n23902_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[66][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93248
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[66][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93248
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n23904_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[66][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93250
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[66][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93250
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n23906_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[66][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93252
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[66][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93254
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[66][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93252
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23614_ i1=soc.ram.ram[66][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93254
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n23909_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[66][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93256
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[66][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93256
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n23911_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[66][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93258
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[66][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93258
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n23913_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[66][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93260
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[66][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93260
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n23915_
-.subckt mx2_x2 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[66][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93262
+.subckt mux2_x1 cmd=$abc$109383$new_n23902_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[66][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93262
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n23917_
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n20801_ nq=$abc$109383$new_n23918_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[67][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93264
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[67][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93264
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n23920_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[67][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93266
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[67][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93266
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n23922_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[67][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93268
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[67][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93268
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n23924_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[67][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93270
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[67][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93270
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n23926_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[67][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93272
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[67][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93272
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n23928_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[67][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93274
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[67][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93274
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n23930_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[67][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93276
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[67][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93276
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n23932_
-.subckt mx2_x2 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[67][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93278
+.subckt mux2_x1 cmd=$abc$109383$new_n23918_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[67][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93278
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n21382_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n23934_
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[35][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93280
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[35][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93282
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23392_ i1=soc.ram.ram[35][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93280
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23395_ i1=soc.ram.ram[35][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93282
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n23937_
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[35][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93284
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[35][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93284
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n23939_
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[35][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93286
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[35][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93286
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n23941_
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[35][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93288
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[35][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93290
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[35][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93288
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23400_ i1=soc.ram.ram[35][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93290
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n23944_
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[35][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93292
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[35][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93292
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n23946_
-.subckt mx2_x2 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[35][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93294
+.subckt mux2_x1 cmd=$abc$109383$new_n23934_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[35][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93294
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n23948_
 .subckt buf_x4 i=$abc$109383$new_n21237_ q=$abc$109383$new_n23949_
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n23950_
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[62][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93396
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[62][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93396
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n23952_
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[62][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93398
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[62][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93400
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[62][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93402
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[62][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93404
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[62][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93398
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[62][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93400
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[62][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93402
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[62][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93404
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n23957_
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[62][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93406
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[62][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93408
-.subckt mx2_x2 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[62][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93410
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[62][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93406
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[62][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93408
+.subckt mux2_x1 cmd=$abc$109383$new_n23950_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[62][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93410
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n23961_
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[61][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93412
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[61][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93414
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[61][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93416
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[61][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93418
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[61][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93420
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[61][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93422
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[61][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93424
-.subckt mx2_x2 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[61][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93426
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[61][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93412
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[61][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93414
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[61][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93416
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[61][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93418
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[61][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93420
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[61][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93422
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[61][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93424
+.subckt mux2_x1 cmd=$abc$109383$new_n23961_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[61][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93426
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n22080_ nq=$abc$109383$new_n23970_
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[61][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93428
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[61][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93430
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[61][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93432
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[61][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93434
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[61][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93436
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[61][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93438
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[61][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93440
-.subckt mx2_x2 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[61][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93442
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[61][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93428
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[61][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93430
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[61][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93432
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[61][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93434
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[61][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93436
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[61][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93438
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[61][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93440
+.subckt mux2_x1 cmd=$abc$109383$new_n23970_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[61][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93442
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n23979_
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[61][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93444
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[61][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93446
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[61][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93448
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[61][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93450
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[61][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93452
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[61][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93454
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[61][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93456
-.subckt mx2_x2 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[61][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93458
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[61][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93444
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[61][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93446
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[61][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93448
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[61][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93450
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[61][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93452
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[61][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93454
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[61][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93456
+.subckt mux2_x1 cmd=$abc$109383$new_n23979_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[61][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93458
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n23988_
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[60][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93460
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[60][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93462
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[60][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93464
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[60][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93466
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[60][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93468
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[60][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93470
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[60][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93472
-.subckt mx2_x2 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[60][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93474
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[60][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93460
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[60][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93462
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[60][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93464
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[60][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93466
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[60][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93468
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[60][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93470
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[60][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93472
+.subckt mux2_x1 cmd=$abc$109383$new_n23988_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[60][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93474
 .subckt buf_x4 i=$abc$109383$new_n20360_ q=$abc$109383$new_n23997_
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n23997_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n23998_
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[60][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93476
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[60][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93478
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[60][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93480
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[60][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93476
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[60][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93478
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[60][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93480
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n24002_
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[60][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93482
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[60][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93484
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[60][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93486
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[60][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93488
-.subckt mx2_x2 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[60][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93490
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[60][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93482
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[60][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93484
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[60][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93486
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[60][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93488
+.subckt mux2_x1 cmd=$abc$109383$new_n23998_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[60][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93490
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n20937_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24008_
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[60][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93492
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[60][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93494
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[60][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93496
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[60][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93498
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[60][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93500
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[60][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93502
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[60][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93504
-.subckt mx2_x2 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[60][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93506
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[60][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93492
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[60][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93494
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[60][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93496
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[60][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93498
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[60][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93500
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[60][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93502
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[60][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93504
+.subckt mux2_x1 cmd=$abc$109383$new_n24008_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[60][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93506
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n24017_
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[21][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93508
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[21][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93510
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[21][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93512
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[21][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93514
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[21][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93516
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[21][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93518
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[21][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93520
-.subckt mx2_x2 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[21][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93522
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[21][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93508
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[21][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93510
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[21][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93512
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[21][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93514
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[21][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93516
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[21][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93518
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[21][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93520
+.subckt mux2_x1 cmd=$abc$109383$new_n24017_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[21][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93522
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n19746_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n24026_
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[99][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93524
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[99][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93526
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[99][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93528
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[99][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93530
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[99][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93532
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[99][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93534
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[99][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93536
-.subckt mx2_x2 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[99][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93538
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[99][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93524
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[99][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93526
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[99][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93528
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[99][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93530
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[99][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93532
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[99][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93534
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[99][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93536
+.subckt mux2_x1 cmd=$abc$109383$new_n24026_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[99][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93538
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n24035_
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[22][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93540
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[22][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93542
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[22][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93544
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[22][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93546
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[22][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93548
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[22][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93550
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[22][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93552
-.subckt mx2_x2 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[22][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93554
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[22][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93540
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[22][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93542
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[22][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93544
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[22][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93546
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[22][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93548
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[22][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93550
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[22][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93552
+.subckt mux2_x1 cmd=$abc$109383$new_n24035_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[22][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93554
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n24044_
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[25][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93556
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[25][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93558
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[25][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93560
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[25][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93562
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[25][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93564
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[25][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93566
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[25][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93568
-.subckt mx2_x2 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[25][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93570
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[25][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93556
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[25][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93558
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[25][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93560
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[25][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93562
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[25][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93564
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[25][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93566
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[25][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93568
+.subckt mux2_x1 cmd=$abc$109383$new_n24044_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[25][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93570
 .subckt nand3_x0 i0=$abc$109383$new_n22836_ i1=$abc$109383$new_n21479_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n24053_
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[36][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93572
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[36][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93574
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[36][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93576
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[36][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93578
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[36][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93580
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[36][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93582
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[36][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93584
-.subckt mx2_x2 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[36][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93586
-.subckt a3_x2 i0=$abc$109383$new_n20885_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19750_ q=$abc$109383$new_n24062_
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[36][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93572
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[36][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93574
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[36][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93576
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[36][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93578
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[36][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93580
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[36][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93582
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[36][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93584
+.subckt mux2_x1 cmd=$abc$109383$new_n24053_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[36][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93586
+.subckt and3_x1 i0=$abc$109383$new_n20885_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19750_ q=$abc$109383$new_n24062_
 .subckt nand2_x0 i0=$abc$109383$new_n24062_ i1=$abc$109383$new_n21401_ nq=$abc$109383$new_n24063_
 .subckt buf_x4 i=$abc$109383$new_n24063_ q=$abc$109383$new_n24064_
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[5][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93588
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[5][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93590
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[5][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93592
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[5][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93594
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[5][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93596
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[5][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93598
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[5][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93600
-.subckt mx2_x2 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[5][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93602
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[5][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93588
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[5][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93590
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[5][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93592
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[5][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93594
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[5][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93596
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[5][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93598
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[5][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93600
+.subckt mux2_x1 cmd=$abc$109383$new_n24064_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[5][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93602
 .subckt nand2_x0 i0=$abc$109383$new_n24062_ i1=$abc$109383$new_n21381_ nq=$abc$109383$new_n24073_
 .subckt buf_x4 i=$abc$109383$new_n24073_ q=$abc$109383$new_n24074_
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[5][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93604
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[5][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93606
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[5][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93608
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[5][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93610
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[5][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93612
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[5][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93614
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[5][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93616
-.subckt mx2_x2 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[5][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93618
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[5][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93604
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[5][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93606
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[5][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93608
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[5][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93610
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[5][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93612
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[5][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93614
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[5][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93616
+.subckt mux2_x1 cmd=$abc$109383$new_n24074_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[5][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93618
 .subckt buf_x4 i=$abc$109383$new_n22835_ q=$abc$109383$new_n24083_
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n20801_ nq=$abc$109383$new_n24084_
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[37][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93620
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[37][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93622
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[37][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93624
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[37][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93626
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[37][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93628
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[37][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93630
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[37][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93632
-.subckt mx2_x2 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[37][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93634
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[37][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93620
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[37][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93622
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[37][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93624
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[37][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93626
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[37][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93628
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[37][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93630
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[37][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93632
+.subckt mux2_x1 cmd=$abc$109383$new_n24084_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[37][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93634
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n21250_ i3=$abc$109383$new_n20258_ nq=$abc$109383$new_n24093_
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[74][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93636
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[74][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93638
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[74][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93640
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[74][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93642
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[74][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93644
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[74][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93646
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[74][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93648
-.subckt mx2_x2 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[74][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93650
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[74][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93636
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[74][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93638
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[74][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93640
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[74][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93642
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[74][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93644
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[74][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93646
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[74][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93648
+.subckt mux2_x1 cmd=$abc$109383$new_n24093_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[74][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93650
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n21381_ nq=$abc$109383$new_n24102_
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[37][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93652
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[37][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93654
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[37][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93656
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[37][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93658
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[37][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93660
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[37][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93662
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[37][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93664
-.subckt mx2_x2 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[37][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93666
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[37][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93652
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[37][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93654
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[37][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93656
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[37][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93658
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[37][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93660
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[37][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93662
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[37][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93664
+.subckt mux2_x1 cmd=$abc$109383$new_n24102_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[37][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93666
 .subckt nand2_x0 i0=$abc$109383$new_n24062_ i1=$abc$109383$new_n20801_ nq=$abc$109383$new_n24111_
 .subckt buf_x4 i=$abc$109383$new_n24111_ q=$abc$109383$new_n24112_
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[5][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93668
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[5][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93670
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[5][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93672
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[5][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93674
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[5][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93676
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[5][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93678
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[5][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93680
-.subckt mx2_x2 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[5][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93682
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[5][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93668
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[5][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93670
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[5][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93672
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[5][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93674
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[5][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93676
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[5][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93678
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[5][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93680
+.subckt mux2_x1 cmd=$abc$109383$new_n24112_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[5][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93682
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n21236_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n22080_ nq=$abc$109383$new_n24121_
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[59][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93684
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[59][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93686
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[59][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93688
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[59][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93690
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[59][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93692
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[59][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93694
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[59][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93696
-.subckt mx2_x2 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[59][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93698
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[59][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93684
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[59][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93686
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[59][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93688
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[59][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93690
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[59][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93692
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[59][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93694
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[59][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93696
+.subckt mux2_x1 cmd=$abc$109383$new_n24121_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[59][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93698
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n24130_
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[59][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93700
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[59][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93702
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[59][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93704
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[59][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93706
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[59][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93708
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[59][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93710
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[59][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93712
-.subckt mx2_x2 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[59][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93714
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[59][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93700
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[59][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93702
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[59][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93704
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[59][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93706
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[59][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93708
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[59][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93710
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[59][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93712
+.subckt mux2_x1 cmd=$abc$109383$new_n24130_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[59][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93714
 .subckt nand4_x0 i0=$abc$109383$new_n23949_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n24139_
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[59][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93716
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[59][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93718
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[59][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93720
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[59][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93722
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[59][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93724
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[59][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93726
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[59][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93728
-.subckt mx2_x2 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[59][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93730
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[59][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93716
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[59][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93718
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[59][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93720
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[59][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93722
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[59][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93724
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[59][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93726
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[59][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93728
+.subckt mux2_x1 cmd=$abc$109383$new_n24139_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[59][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93730
 .subckt buf_x4 i=$abc$109383$new_n20243_ q=$abc$109383$new_n24148_
 .subckt buf_x4 i=$abc$109383$new_n21237_ q=$abc$109383$new_n24149_
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24150_
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[58][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93732
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[58][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93734
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[58][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93736
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[58][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93738
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[58][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93740
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[58][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93742
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[58][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93744
-.subckt mx2_x2 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[58][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93746
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[58][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93732
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[58][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93734
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[58][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93736
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[58][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93738
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[58][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93740
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[58][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93742
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[58][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93744
+.subckt mux2_x1 cmd=$abc$109383$new_n24150_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[58][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93746
 .subckt buf_x4 i=$abc$109383$new_n20257_ q=$abc$109383$new_n24159_
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n20262_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24160_
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[75][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93748
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[75][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93750
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[75][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93752
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[75][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93754
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[75][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93756
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[75][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93758
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[75][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93760
-.subckt mx2_x2 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[75][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93762
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[75][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93748
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[75][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93750
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[75][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93752
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[75][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93754
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[75][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93756
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[75][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93758
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[75][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93760
+.subckt mux2_x1 cmd=$abc$109383$new_n24160_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[75][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93762
 .subckt buf_x4 i=$abc$109383$new_n20357_ q=$abc$109383$new_n24169_
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n21611_ nq=$abc$109383$new_n24170_
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[58][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93764
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[58][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93766
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[58][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93768
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[58][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93770
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[58][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93772
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[58][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93774
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[58][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93776
-.subckt mx2_x2 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[58][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93778
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[58][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93764
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[58][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93766
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[58][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93768
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[58][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93770
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[58][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93772
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[58][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93774
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[58][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93776
+.subckt mux2_x1 cmd=$abc$109383$new_n24170_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[58][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93778
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n24179_
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n21611_ nq=$abc$109383$new_n24180_
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[58][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93780
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[58][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93782
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[58][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93784
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[58][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93786
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[58][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93788
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[58][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93790
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[58][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93792
-.subckt mx2_x2 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[58][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93794
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[58][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93780
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[58][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93782
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[58][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93784
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[58][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93786
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[58][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93788
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[58][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93790
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[58][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93792
+.subckt mux2_x1 cmd=$abc$109383$new_n24180_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[58][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93794
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n21835_ nq=$abc$109383$new_n24189_
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[57][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93796
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[57][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93798
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[57][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93800
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[57][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93802
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[57][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93804
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[57][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93806
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[57][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93808
-.subckt mx2_x2 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[57][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93810
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[57][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93796
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[57][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93798
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[57][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93800
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[57][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93802
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[57][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93804
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[57][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93806
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[57][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93808
+.subckt mux2_x1 cmd=$abc$109383$new_n24189_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[57][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93810
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24198_
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[46][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93812
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[46][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93814
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[46][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93816
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[46][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93818
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[46][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93820
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[46][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93822
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[46][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93824
-.subckt mx2_x2 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[46][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93826
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[46][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93812
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[46][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93814
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[46][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93816
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[46][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93818
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[46][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93820
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[46][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93822
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[46][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93824
+.subckt mux2_x1 cmd=$abc$109383$new_n24198_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[46][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93826
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n23844_ i3=$abc$109383$new_n21835_ nq=$abc$109383$new_n24207_
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[57][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93828
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[57][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93830
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[57][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93832
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[57][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93834
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[57][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93836
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[57][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93838
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[57][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93840
-.subckt mx2_x2 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[57][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93842
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[57][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93828
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[57][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93830
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[57][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93832
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[57][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93834
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23859_ i1=soc.ram.ram[57][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93836
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23861_ i1=soc.ram.ram[57][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93838
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23863_ i1=soc.ram.ram[57][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93840
+.subckt mux2_x1 cmd=$abc$109383$new_n24207_ i0=$abc$109383$new_n23865_ i1=soc.ram.ram[57][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93842
 .subckt buf_x4 i=$abc$109383$new_n20839_ q=$abc$109383$new_n24216_
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n24217_
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[57][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93844
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[57][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93846
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[57][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93848
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[57][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93850
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[57][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93852
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[57][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93854
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[57][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93856
-.subckt mx2_x2 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[57][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93858
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[57][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93844
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[57][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93846
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[57][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93848
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[57][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93850
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[57][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93852
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[57][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93854
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[57][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93856
+.subckt mux2_x1 cmd=$abc$109383$new_n24217_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[57][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93858
 .subckt buf_x4 i=$abc$109383$new_n20826_ q=$abc$109383$new_n24226_
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n20815_ nq=$abc$109383$new_n24227_
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[56][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93860
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[56][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93862
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[56][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93864
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[56][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93866
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[56][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93868
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[56][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93870
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[56][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93872
-.subckt mx2_x2 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[56][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93874
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[56][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93860
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[56][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93862
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[56][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93864
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[56][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93866
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[56][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93868
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[56][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93870
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[56][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93872
+.subckt mux2_x1 cmd=$abc$109383$new_n24227_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[56][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93874
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n20815_ nq=$abc$109383$new_n24236_
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[56][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93876
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[56][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93878
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[56][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93880
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[56][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93882
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23887_ i1=soc.ram.ram[56][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93876
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23891_ i1=soc.ram.ram[56][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93878
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23893_ i1=soc.ram.ram[56][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93880
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n23895_ i1=soc.ram.ram[56][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93882
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n24241_
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[56][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93884
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[56][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93884
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n24243_
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[56][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93886
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[56][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93886
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n24245_
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[56][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93888
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[56][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93888
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n24247_
-.subckt mx2_x2 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[56][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93890
+.subckt mux2_x1 cmd=$abc$109383$new_n24236_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[56][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93890
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n21401_ nq=$abc$109383$new_n24249_
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[37][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93892
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[37][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93894
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[37][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93896
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[37][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93898
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[37][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93900
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[37][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93902
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[37][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93904
-.subckt mx2_x2 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[37][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93906
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23901_ i1=soc.ram.ram[37][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93892
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23904_ i1=soc.ram.ram[37][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93894
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23906_ i1=soc.ram.ram[37][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93896
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[37][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93898
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23909_ i1=soc.ram.ram[37][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93900
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23911_ i1=soc.ram.ram[37][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93902
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23913_ i1=soc.ram.ram[37][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93904
+.subckt mux2_x1 cmd=$abc$109383$new_n24249_ i0=$abc$109383$new_n23915_ i1=soc.ram.ram[37][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93906
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n20267_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n20815_ nq=$abc$109383$new_n24258_
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[56][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93908
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[56][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93910
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[56][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93912
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[56][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93914
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[56][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93916
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[56][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93918
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[56][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93920
-.subckt mx2_x2 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[56][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93922
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23917_ i1=soc.ram.ram[56][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93908
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23920_ i1=soc.ram.ram[56][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93910
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23922_ i1=soc.ram.ram[56][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93912
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23924_ i1=soc.ram.ram[56][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93914
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23926_ i1=soc.ram.ram[56][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93916
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23928_ i1=soc.ram.ram[56][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93918
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23930_ i1=soc.ram.ram[56][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93920
+.subckt mux2_x1 cmd=$abc$109383$new_n24258_ i0=$abc$109383$new_n23932_ i1=soc.ram.ram[56][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93922
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n24267_
 .subckt buf_x4 i=$abc$109383$new_n19751_ q=$abc$109383$new_n24268_
 .subckt buf_x4 i=$abc$109383$new_n20266_ q=$abc$109383$new_n24269_
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n24270_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[55][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93924
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[55][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93924
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n24272_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[55][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93926
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[55][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93926
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n24274_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[55][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93928
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[55][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93930
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[55][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93928
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24002_ i1=soc.ram.ram[55][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93930
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n24277_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[55][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93932
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[55][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93932
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n24279_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[55][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93934
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[55][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93934
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n24281_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[55][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93936
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[55][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93936
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n24283_
-.subckt mx2_x2 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[55][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93938
+.subckt mux2_x1 cmd=$abc$109383$new_n24270_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[55][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93938
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n24285_
 .subckt nand4_x0 i0=$abc$109383$new_n21015_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n24286_
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[55][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93940
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[55][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93940
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n24288_
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[55][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93942
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[55][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93942
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n24290_
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[55][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93944
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[55][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93944
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n24292_
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[55][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93946
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[55][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93948
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[55][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93950
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[55][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93952
-.subckt mx2_x2 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[55][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93954
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[55][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93946
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[55][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93948
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[55][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93950
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[55][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93952
+.subckt mux2_x1 cmd=$abc$109383$new_n24286_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[55][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93954
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n24298_
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n24299_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[55][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93956
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[55][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93956
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n24301_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[55][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93958
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[55][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93958
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n24303_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[55][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93960
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[55][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93960
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n24305_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[55][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93962
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[55][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93962
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n24307_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[55][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93964
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[55][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93964
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n24309_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[55][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93966
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[55][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93966
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n24311_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[55][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93968
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[55][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93968
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n24313_
-.subckt mx2_x2 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[55][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93970
+.subckt mux2_x1 cmd=$abc$109383$new_n24299_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[55][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93970
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n24315_
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[54][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93972
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[54][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93974
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[54][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93976
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[54][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93972
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[54][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93974
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[54][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93976
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n24319_
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[54][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93978
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[54][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93980
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[54][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93982
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[54][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93984
-.subckt mx2_x2 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[54][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93986
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[54][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93978
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[54][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93980
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[54][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93982
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[54][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93984
+.subckt mux2_x1 cmd=$abc$109383$new_n24315_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[54][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93986
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n24325_
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[54][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93988
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[54][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93990
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[54][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93992
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[54][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93994
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[54][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93996
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[54][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93998
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[54][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94000
-.subckt mx2_x2 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[54][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94002
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[54][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93988
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[54][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93990
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[54][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93992
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[54][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93994
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[54][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93996
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[54][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93998
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[54][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94000
+.subckt mux2_x1 cmd=$abc$109383$new_n24325_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[54][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94002
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n24334_
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[53][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94004
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[53][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94006
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[53][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94008
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[53][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94010
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[53][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94012
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[53][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94014
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[53][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94016
-.subckt mx2_x2 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[53][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94018
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[53][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94004
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[53][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94006
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[53][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94008
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[53][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94010
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[53][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94012
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[53][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94014
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[53][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94016
+.subckt mux2_x1 cmd=$abc$109383$new_n24334_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[53][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94018
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n24343_
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[53][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94020
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[53][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94022
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[53][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94024
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[53][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94026
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[53][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94028
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[53][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94030
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[53][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94032
-.subckt mx2_x2 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[53][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94034
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[53][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94020
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[53][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94022
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[53][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94024
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[53][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94026
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[53][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94028
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[53][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94030
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[53][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94032
+.subckt mux2_x1 cmd=$abc$109383$new_n24343_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[53][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94034
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n23674_ nq=$abc$109383$new_n24352_
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[53][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94036
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[53][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94038
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[53][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94040
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[53][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94042
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[53][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94044
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[53][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94046
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[53][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94048
-.subckt mx2_x2 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[53][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94050
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[53][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94036
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[53][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94038
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[53][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94040
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[53][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94042
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[53][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94044
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[53][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94046
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[53][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94048
+.subckt mux2_x1 cmd=$abc$109383$new_n24352_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[53][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94050
 .subckt buf_x4 i=$abc$109383$new_n20852_ q=$abc$109383$new_n24361_
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n24362_
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[54][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94052
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[54][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94054
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[54][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94056
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[54][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94058
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[54][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94060
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[54][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94062
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[54][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94064
-.subckt mx2_x2 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[54][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94066
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[54][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94052
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[54][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94054
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[54][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94056
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[54][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94058
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[54][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94060
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[54][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94062
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[54][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94064
+.subckt mux2_x1 cmd=$abc$109383$new_n24362_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[54][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94066
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n22984_ i2=$abc$109383$new_n23997_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24371_
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[76][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94068
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[76][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94070
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[76][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94072
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[76][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94074
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[76][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94076
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[76][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94078
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[76][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94080
-.subckt mx2_x2 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[76][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94082
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[76][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94068
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[76][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94070
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[76][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94072
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[76][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94074
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[76][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94076
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[76][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94078
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[76][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94080
+.subckt mux2_x1 cmd=$abc$109383$new_n24371_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[76][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94082
 .subckt nand4_x0 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n19832_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n24380_
-.subckt a2_x2 i0=$abc$109383$new_n24380_ i1=soc.cpu.minerva.gprf.mem._mem[13][0] q=$abc$109383$new_n24381_
-.subckt a4_x2 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n24382_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24382_ q=$abc$109383$new_n24383_
-.subckt o2_x2 i0=$abc$109383$new_n24383_ i1=$abc$109383$new_n24381_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94084
+.subckt and2_x1 i0=$abc$109383$new_n24380_ i1=soc.cpu.minerva.gprf.mem._mem[13][0] q=$abc$109383$new_n24381_
+.subckt and4_x1 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n24382_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24382_ nq=$abc$109383$new_n24383_
+.subckt or2_x1 i0=$abc$109383$new_n24383_ i1=$abc$109383$new_n24381_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94084
 .subckt buf_x4 i=$abc$109383$new_n24380_ q=$abc$109383$new_n24385_
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[13][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94086
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[13][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94088
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[13][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94090
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[13][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94092
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[13][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94094
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[13][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94096
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[13][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94098
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[13][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94100
-.subckt mx2_x2 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[13][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94102
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[13][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94086
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[13][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94088
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[13][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94090
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[13][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94092
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[13][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94094
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[13][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94096
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[13][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94098
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[13][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94100
+.subckt mux2_x1 cmd=$abc$109383$new_n24385_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[13][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94102
 .subckt buf_x4 i=$abc$109383$new_n24380_ q=$abc$109383$new_n24395_
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[13][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94104
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[13][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94106
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[13][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94108
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[13][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94110
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[13][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94112
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[13][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94114
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[13][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94116
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[13][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94118
-.subckt mx2_x2 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[13][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94120
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[13][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94104
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[13][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94106
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[13][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94108
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[13][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94110
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[13][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94112
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[13][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94114
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[13][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94116
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[13][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94118
+.subckt mux2_x1 cmd=$abc$109383$new_n24395_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[13][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94120
 .subckt buf_x4 i=$abc$109383$new_n24380_ q=$abc$109383$new_n24405_
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[13][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94122
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[13][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94124
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[13][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94126
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[13][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94128
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[13][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94130
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[13][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94132
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[13][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94134
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[13][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94136
-.subckt mx2_x2 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[13][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94138
-.subckt mx2_x2 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[13][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94140
-.subckt mx2_x2 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[13][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94142
-.subckt mx2_x2 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[13][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94144
-.subckt mx2_x2 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[13][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94146
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[13][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94122
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[13][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94124
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[13][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94126
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[13][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94128
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[13][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94130
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[13][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94132
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[13][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94134
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[13][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94136
+.subckt mux2_x1 cmd=$abc$109383$new_n24405_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[13][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94138
+.subckt mux2_x1 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[13][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94140
+.subckt mux2_x1 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[13][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94142
+.subckt mux2_x1 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[13][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94144
+.subckt mux2_x1 cmd=$abc$109383$new_n24380_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[13][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94146
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n24419_
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[8][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94148
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[8][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94150
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[8][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94152
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[8][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94154
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[8][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94156
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[8][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94158
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[8][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94160
-.subckt mx2_x2 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[8][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94162
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[8][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94148
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[8][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94150
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[8][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94152
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[8][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94154
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[8][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94156
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[8][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94158
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[8][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94160
+.subckt mux2_x1 cmd=$abc$109383$new_n24419_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[8][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94162
 .subckt nand3_x0 i0=$abc$109383$new_n21787_ i1=$abc$109383$new_n22286_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n24428_
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[103][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94164
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[103][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94166
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[103][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94168
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[103][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94170
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[103][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94172
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[103][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94174
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[103][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94176
-.subckt mx2_x2 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[103][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94178
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[103][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94164
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[103][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94166
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[103][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94168
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[103][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94170
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[103][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94172
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[103][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94174
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[103][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94176
+.subckt mux2_x1 cmd=$abc$109383$new_n24428_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[103][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94178
 .subckt buf_x4 i=$abc$109383$new_n21238_ q=$abc$109383$new_n24437_
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n23997_ i3=$abc$109383$new_n22061_ nq=$abc$109383$new_n24438_
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[92][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94180
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[92][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94182
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[92][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94184
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[92][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94186
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[92][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94188
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[92][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94190
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[92][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94192
-.subckt mx2_x2 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[92][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94194
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[92][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94180
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[92][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94182
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[92][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94184
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[92][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94186
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[92][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94188
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[92][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94190
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[92][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94192
+.subckt mux2_x1 cmd=$abc$109383$new_n24438_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[92][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94194
 .subckt buf_x4 i=$abc$109383$new_n20800_ q=$abc$109383$new_n24447_
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n24448_
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[12][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94196
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[12][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94198
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[12][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94200
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[12][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94202
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[12][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94204
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[12][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94206
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[12][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94208
-.subckt mx2_x2 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[12][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94210
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[12][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94196
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[12][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94198
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[12][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94200
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[12][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94202
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[12][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94204
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[12][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94206
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[12][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94208
+.subckt mux2_x1 cmd=$abc$109383$new_n24448_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[12][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94210
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24457_
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[42][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94212
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[42][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94214
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[42][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94216
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[42][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94218
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[42][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94220
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[42][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94222
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[42][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94224
-.subckt mx2_x2 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[42][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94226
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[42][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94212
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[42][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94214
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[42][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94216
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[42][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94218
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[42][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94220
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[42][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94222
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[42][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94224
+.subckt mux2_x1 cmd=$abc$109383$new_n24457_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[42][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94226
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n23997_ i3=$abc$109383$new_n22080_ nq=$abc$109383$new_n24466_
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[92][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94228
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[92][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94230
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[92][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94232
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[92][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94234
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[92][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94236
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[92][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94238
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[92][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94240
-.subckt mx2_x2 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[92][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94242
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[92][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94228
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[92][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94230
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[92][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94232
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[92][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94234
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[92][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94236
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[92][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94238
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[92][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94240
+.subckt mux2_x1 cmd=$abc$109383$new_n24466_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[92][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94242
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24475_
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[42][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94244
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[42][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94246
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[42][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94248
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[42][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94250
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[42][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94252
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[42][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94254
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[42][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94256
-.subckt mx2_x2 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[42][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94258
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[42][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94244
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[42][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94246
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[42][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94248
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[42][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94250
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[42][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94252
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[42][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94254
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[42][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94256
+.subckt mux2_x1 cmd=$abc$109383$new_n24475_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[42][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94258
 .subckt nand4_x0 i0=$abc$109383$new_n23703_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n20551_ i3=$abc$109383$new_n22061_ nq=$abc$109383$new_n24484_
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[91][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94260
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[91][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94262
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[91][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94264
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[91][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94266
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[91][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94268
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[91][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94270
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[91][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94272
-.subckt mx2_x2 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[91][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94274
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[91][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94260
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[91][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94262
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[91][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94264
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[91][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94266
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[91][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94268
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[91][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94270
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[91][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94272
+.subckt mux2_x1 cmd=$abc$109383$new_n24484_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[91][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94274
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n24493_
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[41][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94276
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[41][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94278
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[41][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94280
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[41][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94282
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[41][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94284
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[41][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94286
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[41][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94288
-.subckt mx2_x2 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[41][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94290
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[41][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94276
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[41][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94278
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[41][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94280
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[41][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94282
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[41][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94284
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[41][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94286
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[41][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94288
+.subckt mux2_x1 cmd=$abc$109383$new_n24493_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[41][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94290
 .subckt buf_x4 i=$abc$109383$new_n21590_ q=$abc$109383$new_n24502_
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n22555_ i3=$abc$109383$new_n21250_ nq=$abc$109383$new_n24503_
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[90][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94292
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[90][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94294
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[90][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94296
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[90][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94298
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[90][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94300
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[90][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94302
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[90][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94304
-.subckt mx2_x2 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[90][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94306
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[90][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94292
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[90][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94294
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[90][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94296
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[90][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94298
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24241_ i1=soc.ram.ram[90][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94300
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24243_ i1=soc.ram.ram[90][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94302
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24245_ i1=soc.ram.ram[90][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94304
+.subckt mux2_x1 cmd=$abc$109383$new_n24503_ i0=$abc$109383$new_n24247_ i1=soc.ram.ram[90][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94306
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n24512_
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[41][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94308
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[41][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94310
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[41][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94312
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[41][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94314
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24285_ i1=soc.ram.ram[41][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94308
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24288_ i1=soc.ram.ram[41][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94310
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24290_ i1=soc.ram.ram[41][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94312
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24292_ i1=soc.ram.ram[41][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94314
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n24517_
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[41][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94316
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[41][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94316
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n24519_
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[41][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94318
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[41][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94318
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n24521_
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[41][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94320
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[41][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94320
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n24523_
-.subckt mx2_x2 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[41][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94322
+.subckt mux2_x1 cmd=$abc$109383$new_n24512_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[41][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94322
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n24525_
 .subckt nand3_x0 i0=$abc$109383$new_n21402_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n24526_
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[12][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94324
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[12][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94324
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n24528_
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[12][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94326
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[12][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94326
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n24530_
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[12][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94328
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[12][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94328
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n24532_
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[12][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94330
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[12][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94332
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[12][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94334
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[12][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94336
-.subckt mx2_x2 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[12][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94338
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[12][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94330
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[12][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94332
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[12][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94334
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[12][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94336
+.subckt mux2_x1 cmd=$abc$109383$new_n24526_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[12][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94338
 .subckt nand3_x0 i0=$abc$109383$new_n23475_ i1=$abc$109383$new_n22286_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n24538_
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[103][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94340
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[103][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94342
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[103][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94344
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[103][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94346
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[103][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94348
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[103][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94350
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[103][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94352
-.subckt mx2_x2 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[103][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94354
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[103][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94340
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[103][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94342
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[103][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94344
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[103][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94346
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[103][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94348
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[103][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94350
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[103][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94352
+.subckt mux2_x1 cmd=$abc$109383$new_n24538_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[103][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94354
 .subckt nand4_x0 i0=$abc$109383$new_n21119_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24547_
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[44][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94356
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[44][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94358
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[44][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94360
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[44][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94362
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[44][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94364
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[44][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94366
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[44][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94368
-.subckt mx2_x2 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[44][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94370
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[44][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94356
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[44][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94358
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[44][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94360
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[44][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94362
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[44][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94364
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[44][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94366
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[44][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94368
+.subckt mux2_x1 cmd=$abc$109383$new_n24547_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[44][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94370
 .subckt nand4_x0 i0=$abc$109383$new_n20259_ i1=$abc$109383$new_n21344_ i2=$abc$109383$new_n19781_ i3=$abc$109383$new_n19744_ nq=$abc$109383$new_n24556_
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94372
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94374
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94376
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[0][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94378
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[0][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94380
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[0][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94382
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[0][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94384
-.subckt mx2_x2 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[0][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94386
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94372
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94374
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94376
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[0][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94378
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[0][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94380
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[0][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94382
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[0][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94384
+.subckt mux2_x1 cmd=$abc$109383$new_n24556_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[0][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94386
 .subckt nand3_x0 i0=$abc$109383$new_n23475_ i1=$abc$109383$new_n21611_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n24565_
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[98][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94388
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[98][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94390
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[98][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94392
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[98][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94394
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[98][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94396
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[98][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94398
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[98][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94400
-.subckt mx2_x2 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[98][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94402
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[98][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94388
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[98][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94390
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[98][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94392
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[98][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94394
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[98][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94396
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[98][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94398
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[98][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94400
+.subckt mux2_x1 cmd=$abc$109383$new_n24565_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[98][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94402
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24574_
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[44][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94404
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[44][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94406
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[44][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94408
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[44][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94410
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[44][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94412
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[44][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94414
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[44][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94416
-.subckt mx2_x2 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[44][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94418
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[44][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94404
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[44][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94406
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[44][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94408
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[44][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94410
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[44][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94412
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[44][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94414
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[44][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94416
+.subckt mux2_x1 cmd=$abc$109383$new_n24574_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[44][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94418
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24583_
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[44][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94420
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[44][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94422
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[44][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94424
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[44][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94426
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[44][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94428
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[44][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94430
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[44][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94432
-.subckt mx2_x2 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[44][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94434
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24298_ i1=soc.ram.ram[44][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94420
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24301_ i1=soc.ram.ram[44][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94422
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24303_ i1=soc.ram.ram[44][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94424
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24305_ i1=soc.ram.ram[44][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94426
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24307_ i1=soc.ram.ram[44][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94428
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24309_ i1=soc.ram.ram[44][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94430
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24311_ i1=soc.ram.ram[44][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94432
+.subckt mux2_x1 cmd=$abc$109383$new_n24583_ i0=$abc$109383$new_n24313_ i1=soc.ram.ram[44][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94434
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n24592_
 .subckt nand3_x0 i0=$abc$109383$new_n22080_ i1=$abc$109383$new_n21786_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n24593_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[97][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94436
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[97][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94436
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n24595_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[97][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94438
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[97][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94438
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n24597_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[97][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94440
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[97][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94440
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n24599_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[97][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94442
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[97][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94442
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n24601_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[97][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94444
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[97][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94444
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n24603_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[97][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94446
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[97][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94446
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n24605_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[97][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94448
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[97][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94448
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n24607_
-.subckt mx2_x2 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[97][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94450
+.subckt mux2_x1 cmd=$abc$109383$new_n24593_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[97][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94450
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n24609_
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24610_
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[43][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94452
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[43][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94454
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[43][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94456
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[43][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94458
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[43][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94460
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[43][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94462
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[43][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94464
-.subckt mx2_x2 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[43][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94466
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[43][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94452
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[43][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94454
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[43][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94456
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[43][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94458
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[43][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94460
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[43][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94462
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[43][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94464
+.subckt mux2_x1 cmd=$abc$109383$new_n24610_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[43][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94466
 .subckt nand3_x0 i0=$abc$109383$new_n22080_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n24619_
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[96][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94468
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[96][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94470
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[96][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94472
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[96][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94474
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[96][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94476
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[96][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94478
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[96][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94480
-.subckt mx2_x2 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[96][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94482
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[96][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94468
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[96][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94470
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[96][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94472
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[96][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94474
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[96][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94476
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[96][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94478
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[96][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94480
+.subckt mux2_x1 cmd=$abc$109383$new_n24619_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[96][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94482
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n24226_ i3=$abc$109383$new_n24159_ nq=$abc$109383$new_n24628_
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[43][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94484
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[43][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94486
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[43][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94488
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[43][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94490
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[43][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94492
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[43][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94494
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[43][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94496
-.subckt mx2_x2 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[43][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94498
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[43][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94484
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[43][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94486
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[43][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94488
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[43][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94490
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[43][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94492
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[43][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94494
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[43][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94496
+.subckt mux2_x1 cmd=$abc$109383$new_n24628_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[43][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94498
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n20358_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n24637_
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[95][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94500
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[95][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94502
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[95][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94504
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[95][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94506
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[95][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94508
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[95][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94510
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[95][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94512
-.subckt mx2_x2 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[95][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94514
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[95][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94500
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[95][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94502
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[95][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94504
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[95][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94506
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[95][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94508
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[95][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94510
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[95][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94512
+.subckt mux2_x1 cmd=$abc$109383$new_n24637_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[95][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94514
 .subckt buf_x4 i=$abc$109383$new_n20257_ q=$abc$109383$new_n24646_
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n24647_
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[43][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94516
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[43][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94518
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[43][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94520
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[43][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94522
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[43][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94524
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[43][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94526
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[43][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94528
-.subckt mx2_x2 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[43][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94530
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[43][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94516
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[43][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94518
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[43][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94520
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[43][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94522
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[43][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94524
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[43][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94526
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[43][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94528
+.subckt mux2_x1 cmd=$abc$109383$new_n24647_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[43][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94530
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n20828_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24656_
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[94][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94532
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[94][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94534
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[94][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94536
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[94][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94538
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[94][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94540
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[94][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94542
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[94][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94544
-.subckt mx2_x2 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[94][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94546
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[94][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94532
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[94][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94534
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[94][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94536
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[94][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94538
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[94][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94540
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[94][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94542
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[94][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94544
+.subckt mux2_x1 cmd=$abc$109383$new_n24656_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[94][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94546
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n24269_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n24665_
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[42][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94548
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[42][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94550
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[42][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94552
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[42][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94554
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[42][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94556
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[42][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94558
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[42][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94560
-.subckt mx2_x2 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[42][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94562
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[42][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94548
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[42][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94550
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[42][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94552
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[42][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94554
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[42][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94556
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[42][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94558
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[42][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94560
+.subckt mux2_x1 cmd=$abc$109383$new_n24665_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[42][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94562
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n21585_ i3=$abc$109383$new_n22080_ nq=$abc$109383$new_n24674_
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[93][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94564
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[93][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94566
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[93][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94568
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[93][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94570
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[93][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94572
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[93][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94574
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[93][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94576
-.subckt mx2_x2 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[93][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94578
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[93][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94564
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[93][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94566
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[93][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94568
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[93][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94570
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[93][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94572
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[93][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94574
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[93][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94576
+.subckt mux2_x1 cmd=$abc$109383$new_n24674_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[93][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94578
 .subckt nand4_x0 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20759_ nq=$abc$109383$new_n24683_
-.subckt a2_x2 i0=$abc$109383$new_n24683_ i1=soc.cpu.minerva.gprf.mem._mem[12][0] q=$abc$109383$new_n24684_
-.subckt a4_x2 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n24685_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24685_ q=$abc$109383$new_n24686_
-.subckt o2_x2 i0=$abc$109383$new_n24686_ i1=$abc$109383$new_n24684_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94700
+.subckt and2_x1 i0=$abc$109383$new_n24683_ i1=soc.cpu.minerva.gprf.mem._mem[12][0] q=$abc$109383$new_n24684_
+.subckt and4_x1 i0=$abc$109383$new_n23194_ i1=$abc$109383$new_n19838_ i2=$abc$109383$new_n19836_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n24685_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24685_ nq=$abc$109383$new_n24686_
+.subckt or2_x1 i0=$abc$109383$new_n24686_ i1=$abc$109383$new_n24684_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94700
 .subckt buf_x4 i=$abc$109383$new_n24683_ q=$abc$109383$new_n24688_
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[12][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94702
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[12][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94704
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[12][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94706
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[12][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94708
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[12][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94710
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[12][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94712
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[12][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94714
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[12][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94716
-.subckt mx2_x2 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[12][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94718
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[12][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94702
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[12][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94704
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[12][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94706
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[12][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94708
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[12][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94710
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[12][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94712
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[12][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94714
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[12][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94716
+.subckt mux2_x1 cmd=$abc$109383$new_n24688_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[12][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94718
 .subckt buf_x4 i=$abc$109383$new_n24683_ q=$abc$109383$new_n24698_
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[12][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94720
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[12][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94722
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[12][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94724
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[12][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94726
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[12][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94728
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[12][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94730
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[12][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94732
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[12][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94734
-.subckt mx2_x2 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[12][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94736
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[12][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94720
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[12][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94722
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[12][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94724
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[12][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94726
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[12][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94728
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[12][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94730
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[12][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94732
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[12][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94734
+.subckt mux2_x1 cmd=$abc$109383$new_n24698_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[12][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94736
 .subckt buf_x4 i=$abc$109383$new_n24683_ q=$abc$109383$new_n24708_
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[12][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94738
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[12][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94740
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[12][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94742
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[12][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94744
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[12][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94746
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[12][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94748
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[12][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94750
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[12][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94752
-.subckt mx2_x2 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[12][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94754
-.subckt mx2_x2 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[12][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94756
-.subckt mx2_x2 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[12][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94758
-.subckt mx2_x2 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[12][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94760
-.subckt mx2_x2 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[12][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94762
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[12][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94738
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[12][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94740
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[12][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94742
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[12][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94744
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[12][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94746
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[12][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94748
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[12][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94750
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[12][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94752
+.subckt mux2_x1 cmd=$abc$109383$new_n24708_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[12][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94754
+.subckt mux2_x1 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[12][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94756
+.subckt mux2_x1 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[12][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94758
+.subckt mux2_x1 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[12][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94760
+.subckt mux2_x1 cmd=$abc$109383$new_n24683_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[12][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94762
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n20805_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n24722_
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[13][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94764
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[13][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94766
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[13][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94768
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[13][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94770
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[13][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94772
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[13][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94774
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[13][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94776
-.subckt mx2_x2 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[13][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94778
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[13][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94764
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[13][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94766
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[13][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94768
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[13][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94770
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[13][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94772
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[13][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94774
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[13][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94776
+.subckt mux2_x1 cmd=$abc$109383$new_n24722_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[13][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94778
 .subckt nand3_x0 i0=$abc$109383$new_n22041_ i1=$abc$109383$new_n19746_ i2=$abc$109383$new_n23359_ nq=$abc$109383$new_n24731_
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[102][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94780
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[102][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94782
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[102][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94784
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[102][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94786
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[102][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94788
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[102][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94790
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[102][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94792
-.subckt mx2_x2 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[102][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94794
-.subckt a3_x2 i0=$abc$109383$new_n23192_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n20494_ q=$abc$109383$new_n24740_
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[102][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94780
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[102][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94782
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23937_ i1=soc.ram.ram[102][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94784
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23939_ i1=soc.ram.ram[102][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94786
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23941_ i1=soc.ram.ram[102][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94788
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[102][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94790
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23944_ i1=soc.ram.ram[102][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94792
+.subckt mux2_x1 cmd=$abc$109383$new_n24731_ i0=$abc$109383$new_n23946_ i1=soc.ram.ram[102][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94794
+.subckt and3_x1 i0=$abc$109383$new_n23192_ i1=$abc$109383$new_n19817_ i2=$abc$109383$new_n20494_ q=$abc$109383$new_n24740_
 .subckt buf_x4 i=$abc$109383$new_n24740_ q=$abc$109383$new_n24741_
 .subckt nand4_x0 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20499_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n24742_
-.subckt a2_x2 i0=$abc$109383$new_n24742_ i1=soc.cpu.minerva.gprf.mem._mem[11][0] q=$abc$109383$new_n24743_
-.subckt a4_x2 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20502_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n24744_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24744_ q=$abc$109383$new_n24745_
-.subckt o2_x2 i0=$abc$109383$new_n24745_ i1=$abc$109383$new_n24743_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94796
+.subckt and2_x1 i0=$abc$109383$new_n24742_ i1=soc.cpu.minerva.gprf.mem._mem[11][0] q=$abc$109383$new_n24743_
+.subckt and4_x1 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20502_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n24744_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24744_ nq=$abc$109383$new_n24745_
+.subckt or2_x1 i0=$abc$109383$new_n24745_ i1=$abc$109383$new_n24743_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94796
 .subckt buf_x4 i=$abc$109383$new_n24742_ q=$abc$109383$new_n24747_
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[11][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94798
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[11][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94800
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[11][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94802
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[11][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94804
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[11][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94806
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[11][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94808
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[11][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94810
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[11][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94812
-.subckt mx2_x2 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[11][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94814
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[11][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94798
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[11][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94800
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[11][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94802
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[11][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94804
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[11][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94806
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[11][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94808
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[11][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94810
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[11][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94812
+.subckt mux2_x1 cmd=$abc$109383$new_n24747_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[11][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94814
 .subckt buf_x4 i=$abc$109383$new_n24742_ q=$abc$109383$new_n24757_
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[11][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94816
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[11][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94818
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[11][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94820
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[11][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94822
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[11][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94824
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[11][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94826
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[11][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94828
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[11][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94830
-.subckt mx2_x2 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[11][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94832
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[11][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94816
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[11][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94818
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[11][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94820
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[11][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94822
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[11][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94824
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[11][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94826
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[11][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94828
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[11][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94830
+.subckt mux2_x1 cmd=$abc$109383$new_n24757_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[11][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94832
 .subckt buf_x4 i=$abc$109383$new_n24742_ q=$abc$109383$new_n24767_
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[11][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94834
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[11][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94836
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[11][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94838
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[11][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94840
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[11][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94842
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[11][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94844
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[11][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94846
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[11][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94848
-.subckt mx2_x2 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[11][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94850
-.subckt mx2_x2 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[11][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94852
-.subckt mx2_x2 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[11][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94854
-.subckt mx2_x2 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[11][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94856
-.subckt mx2_x2 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[11][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94858
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[11][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94834
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[11][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94836
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[11][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94838
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[11][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94840
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[11][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94842
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[11][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94844
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[11][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94846
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[11][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94848
+.subckt mux2_x1 cmd=$abc$109383$new_n24767_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[11][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94850
+.subckt mux2_x1 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[11][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94852
+.subckt mux2_x1 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[11][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94854
+.subckt mux2_x1 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[11][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94856
+.subckt mux2_x1 cmd=$abc$109383$new_n24742_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[11][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94858
 .subckt nand4_x0 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n20304_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n24781_
-.subckt a2_x2 i0=$abc$109383$new_n24781_ i1=soc.cpu.minerva.gprf.mem._mem[18][0] q=$abc$109383$new_n24782_
-.subckt a4_x2 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n24783_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24783_ q=$abc$109383$new_n24784_
-.subckt o2_x2 i0=$abc$109383$new_n24784_ i1=$abc$109383$new_n24782_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94860
+.subckt and2_x1 i0=$abc$109383$new_n24781_ i1=soc.cpu.minerva.gprf.mem._mem[18][0] q=$abc$109383$new_n24782_
+.subckt and4_x1 i0=$abc$109383$new_n20497_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n24783_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n24783_ nq=$abc$109383$new_n24784_
+.subckt or2_x1 i0=$abc$109383$new_n24784_ i1=$abc$109383$new_n24782_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94860
 .subckt buf_x4 i=$abc$109383$new_n24781_ q=$abc$109383$new_n24786_
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[18][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94862
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[18][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94864
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[18][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94866
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[18][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94868
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[18][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94870
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[18][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94872
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[18][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94874
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[18][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94876
-.subckt mx2_x2 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[18][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94878
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[18][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94862
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[18][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94864
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[18][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94866
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[18][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94868
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[18][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94870
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[18][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94872
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[18][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94874
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[18][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94876
+.subckt mux2_x1 cmd=$abc$109383$new_n24786_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[18][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94878
 .subckt buf_x4 i=$abc$109383$new_n24781_ q=$abc$109383$new_n24796_
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[18][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94880
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[18][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94882
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[18][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94884
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[18][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94886
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[18][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94888
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[18][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94890
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[18][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94892
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[18][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94894
-.subckt mx2_x2 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[18][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94896
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[18][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94880
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[18][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94882
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[18][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94884
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[18][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94886
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[18][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94888
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[18][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94890
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[18][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94892
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[18][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94894
+.subckt mux2_x1 cmd=$abc$109383$new_n24796_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[18][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94896
 .subckt buf_x4 i=$abc$109383$new_n24781_ q=$abc$109383$new_n24806_
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[18][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94898
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[18][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94900
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[18][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94902
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[18][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94904
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[18][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94906
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[18][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94908
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[18][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94910
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[18][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94912
-.subckt mx2_x2 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[18][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94914
-.subckt mx2_x2 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[18][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94916
-.subckt mx2_x2 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[18][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94918
-.subckt mx2_x2 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[18][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94920
-.subckt mx2_x2 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[18][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94922
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[18][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94898
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[18][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94900
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[18][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94902
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[18][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94904
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[18][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94906
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[18][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94908
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[18][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94910
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[18][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94912
+.subckt mux2_x1 cmd=$abc$109383$new_n24806_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[18][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94914
+.subckt mux2_x1 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[18][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94916
+.subckt mux2_x1 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[18][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94918
+.subckt mux2_x1 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[18][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94920
+.subckt mux2_x1 cmd=$abc$109383$new_n24781_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[18][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94922
 .subckt buf_x4 i=$abc$109383$new_n20266_ q=$abc$109383$new_n24820_
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n23027_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24821_
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[46][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94936
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[46][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94938
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n23948_ i1=soc.ram.ram[46][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94936
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n23952_ i1=soc.ram.ram[46][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94938
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n24824_
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[46][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94940
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[46][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94940
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n24826_
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[46][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94942
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[46][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94942
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n24828_
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[46][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94944
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[46][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94946
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[46][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94944
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n23957_ i1=soc.ram.ram[46][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94946
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n24831_
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[46][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94948
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[46][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94948
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n24833_
-.subckt mx2_x2 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[46][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94950
+.subckt mux2_x1 cmd=$abc$109383$new_n24821_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[46][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94950
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n24835_
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[29][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94952
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[29][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94954
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[29][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94956
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[29][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94958
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[29][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94960
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[29][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94962
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[29][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94964
-.subckt mx2_x2 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[29][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94966
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[29][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94952
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[29][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94954
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[29][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94956
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[29][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94958
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[29][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94960
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[29][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94962
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[29][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94964
+.subckt mux2_x1 cmd=$abc$109383$new_n24835_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[29][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94966
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n24844_
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24845_
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[47][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94968
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[47][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94968
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n24847_
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[47][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94970
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[47][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94972
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[47][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94974
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[47][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94976
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[47][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94970
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[47][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94972
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[47][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94974
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[47][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94976
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n24852_
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[47][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94978
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[47][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94980
-.subckt mx2_x2 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[47][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94982
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[47][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94978
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[47][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94980
+.subckt mux2_x1 cmd=$abc$109383$new_n24845_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[47][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94982
 .subckt nand3_x0 i0=$abc$109383$new_n21481_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n24856_
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[29][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94984
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[29][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94986
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[29][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94988
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[29][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94990
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[29][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94992
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[29][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94994
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[29][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94996
-.subckt mx2_x2 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[29][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94998
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[29][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94984
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[29][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94986
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[29][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94988
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[29][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94990
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[29][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94992
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[29][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94994
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[29][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94996
+.subckt mux2_x1 cmd=$abc$109383$new_n24856_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[29][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94998
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24865_
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[48][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95000
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[48][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95002
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[48][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95004
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[48][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95006
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[48][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95008
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[48][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95010
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[48][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95012
-.subckt mx2_x2 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[48][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95014
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[48][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95000
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[48][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95002
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[48][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95004
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[48][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95006
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[48][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95008
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[48][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95010
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[48][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95012
+.subckt mux2_x1 cmd=$abc$109383$new_n24865_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[48][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95014
 .subckt buf_x4 i=$abc$109383$new_n21480_ q=$abc$109383$new_n24874_
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n20548_ nq=$abc$109383$new_n24875_
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[29][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95016
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[29][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95018
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[29][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95020
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[29][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95022
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[29][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95024
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[29][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95026
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[29][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95028
-.subckt mx2_x2 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[29][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95030
-.subckt a3_x2 i0=$abc$109383$new_n20359_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19750_ q=$abc$109383$new_n24884_
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[29][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95016
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[29][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95018
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[29][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95020
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[29][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95022
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[29][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95024
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[29][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95026
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[29][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95028
+.subckt mux2_x1 cmd=$abc$109383$new_n24875_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[29][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95030
+.subckt and3_x1 i0=$abc$109383$new_n20359_ i1=$abc$109383$new_n19781_ i2=$abc$109383$new_n19750_ q=$abc$109383$new_n24884_
 .subckt nand2_x0 i0=$abc$109383$new_n24884_ i1=$abc$109383$new_n19741_ nq=$abc$109383$new_n24885_
 .subckt buf_x4 i=$abc$109383$new_n24885_ q=$abc$109383$new_n24886_
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[4][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95032
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[4][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95034
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[4][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95036
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[4][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95038
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[4][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95040
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[4][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95042
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[4][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95044
-.subckt mx2_x2 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[4][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95046
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[4][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95032
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[4][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95034
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[4][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95036
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[4][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95038
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[4][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95040
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[4][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95042
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[4][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95044
+.subckt mux2_x1 cmd=$abc$109383$new_n24886_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[4][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95046
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n24895_
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[2][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95048
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95050
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95052
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95054
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95056
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95058
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95060
-.subckt mx2_x2 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95062
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[2][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95048
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95050
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95052
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95054
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95056
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95058
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95060
+.subckt mux2_x1 cmd=$abc$109383$new_n24895_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95062
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n23780_ nq=$abc$109383$new_n24904_
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[50][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95064
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[50][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95066
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[50][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95068
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[50][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95070
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[50][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95072
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[50][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95074
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[50][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95076
-.subckt mx2_x2 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[50][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95078
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[50][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95064
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[50][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95066
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[50][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95068
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[50][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95070
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[50][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95072
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[50][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95074
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[50][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95076
+.subckt mux2_x1 cmd=$abc$109383$new_n24904_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[50][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95078
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n24913_
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n21611_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n24914_
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[2][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95080
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[2][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95082
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[2][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95084
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[2][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95086
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[2][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95088
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[2][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95090
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[2][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95092
-.subckt mx2_x2 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[2][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95094
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[2][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95080
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[2][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95082
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[2][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95084
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[2][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95086
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[2][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95088
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[2][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95090
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[2][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95092
+.subckt mux2_x1 cmd=$abc$109383$new_n24914_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[2][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95094
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n24923_
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n24924_
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[51][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95096
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[51][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95098
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[51][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95100
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[51][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95102
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[51][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95104
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[51][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95106
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[51][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95108
-.subckt mx2_x2 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[51][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95110
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[51][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95096
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[51][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95098
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[51][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95100
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[51][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95102
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[51][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95104
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[51][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95106
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[51][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95108
+.subckt mux2_x1 cmd=$abc$109383$new_n24924_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[51][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95110
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n23077_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n24933_
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[2][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95112
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[2][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95114
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[2][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95116
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[2][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95118
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[2][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95120
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[2][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95122
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[2][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95124
-.subckt mx2_x2 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[2][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95126
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24267_ i1=soc.ram.ram[2][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95112
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24272_ i1=soc.ram.ram[2][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95114
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24274_ i1=soc.ram.ram[2][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95116
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[2][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95118
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24277_ i1=soc.ram.ram[2][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95120
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24279_ i1=soc.ram.ram[2][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95122
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24281_ i1=soc.ram.ram[2][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95124
+.subckt mux2_x1 cmd=$abc$109383$new_n24933_ i0=$abc$109383$new_n24283_ i1=soc.ram.ram[2][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95126
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n24942_
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[52][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95128
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[52][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95130
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[52][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95132
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[52][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95134
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[52][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95136
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[52][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95138
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[52][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95140
-.subckt mx2_x2 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[52][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95142
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[52][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95128
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[52][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95130
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[52][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95132
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[52][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95134
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[52][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95136
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[52][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95138
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[52][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95140
+.subckt mux2_x1 cmd=$abc$109383$new_n24942_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[52][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95142
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n24951_
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[30][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95144
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[30][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95146
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[30][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95148
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[30][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95150
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[30][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95152
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[30][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95154
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[30][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95156
-.subckt mx2_x2 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[30][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95158
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[30][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95144
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[30][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95146
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[30][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95148
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[30][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95150
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[30][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95152
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[30][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95154
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[30][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95156
+.subckt mux2_x1 cmd=$abc$109383$new_n24951_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[30][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95158
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n23534_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n24960_
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[53][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95160
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[53][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95162
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[53][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95164
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[53][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95166
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[53][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95168
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[53][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95170
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[53][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95172
-.subckt mx2_x2 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[53][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95174
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[53][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95160
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[53][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95162
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[53][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95164
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[53][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95166
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[53][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95168
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[53][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95170
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[53][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95172
+.subckt mux2_x1 cmd=$abc$109383$new_n24960_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[53][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95174
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n20551_ i3=$abc$109383$new_n20262_ nq=$abc$109383$new_n24969_
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[91][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95176
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[91][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95178
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[91][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95180
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[91][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95182
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[91][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95184
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[91][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95186
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[91][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95188
-.subckt mx2_x2 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[91][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95190
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[91][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95176
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[91][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95178
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[91][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95180
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[91][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95182
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[91][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95184
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[91][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95186
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[91][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95188
+.subckt mux2_x1 cmd=$abc$109383$new_n24969_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[91][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95190
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n24978_
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[30][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95192
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[30][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95194
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[30][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95196
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[30][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95198
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[30][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95200
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[30][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95202
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[30][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95204
-.subckt mx2_x2 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[30][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95206
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[30][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95192
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[30][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95194
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[30][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95196
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[30][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95198
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[30][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95200
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[30][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95202
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[30][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95204
+.subckt mux2_x1 cmd=$abc$109383$new_n24978_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[30][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95206
 .subckt buf_x4 i=$abc$109383$new_n20851_ q=$abc$109383$new_n24987_
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n24988_
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[54][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95208
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[54][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95210
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[54][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95212
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[54][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95214
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[54][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95216
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[54][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95218
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[54][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95220
-.subckt mx2_x2 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[54][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95222
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[54][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95208
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[54][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95210
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24824_ i1=soc.ram.ram[54][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95212
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24826_ i1=soc.ram.ram[54][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95214
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24828_ i1=soc.ram.ram[54][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95216
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[54][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95218
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24831_ i1=soc.ram.ram[54][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95220
+.subckt mux2_x1 cmd=$abc$109383$new_n24988_ i0=$abc$109383$new_n24833_ i1=soc.ram.ram[54][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95222
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n24997_
 .subckt buf_x4 i=$abc$109383$new_n20546_ q=$abc$109383$new_n24998_
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n24999_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[30][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95224
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[30][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95224
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n25001_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[30][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95226
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[30][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95226
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n25003_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[30][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95228
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[30][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95230
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[30][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95228
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n24319_ i1=soc.ram.ram[30][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95230
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n25006_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[30][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95232
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[30][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95232
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n25008_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[30][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95234
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[30][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95234
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n25010_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[30][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95236
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[30][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95236
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n25012_
-.subckt mx2_x2 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[30][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95238
+.subckt mux2_x1 cmd=$abc$109383$new_n24999_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[30][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95238
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n20977_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n25014_
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[55][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95240
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[55][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95242
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n24844_ i1=soc.ram.ram[55][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95240
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n24847_ i1=soc.ram.ram[55][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95242
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n25017_
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[55][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95244
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[55][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95244
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n25019_
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[55][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95246
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[55][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95246
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n25021_
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[55][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95248
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[55][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95250
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[55][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95248
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n24852_ i1=soc.ram.ram[55][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95250
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n25024_
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[55][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95252
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[55][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95252
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n25026_
-.subckt mx2_x2 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[55][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95254
+.subckt mux2_x1 cmd=$abc$109383$new_n25014_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[55][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95254
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n25028_
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[31][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95256
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[31][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95258
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[31][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95260
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[31][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95262
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[31][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95264
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[31][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95266
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[31][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95268
-.subckt mx2_x2 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[31][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95270
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[31][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95256
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[31][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95258
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[31][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95260
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[31][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95262
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[31][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95264
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[31][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95266
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[31][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95268
+.subckt mux2_x1 cmd=$abc$109383$new_n25028_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[31][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95270
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n25037_
 .subckt nand4_x0 i0=$abc$109383$new_n24149_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n25038_
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[56][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95272
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[56][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95272
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n25040_
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[56][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95274
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[56][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95276
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[56][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95278
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[56][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95280
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[56][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95274
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[56][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95276
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[56][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95278
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[56][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95280
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n25045_
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[56][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95282
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[56][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95284
-.subckt mx2_x2 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[56][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95286
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[56][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95282
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[56][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95284
+.subckt mux2_x1 cmd=$abc$109383$new_n25038_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[56][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95286
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n25049_
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[31][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95288
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[31][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95290
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[31][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95292
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[31][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95294
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[31][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95296
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[31][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95298
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[31][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95300
-.subckt mx2_x2 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[31][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95302
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[31][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95288
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[31][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95290
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[31][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95292
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[31][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95294
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[31][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95296
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[31][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95298
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[31][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95300
+.subckt mux2_x1 cmd=$abc$109383$new_n25049_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[31][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95302
 .subckt buf_x4 i=$abc$109383$new_n21237_ q=$abc$109383$new_n25058_
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n25059_
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[57][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95304
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[57][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95306
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[57][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95308
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[57][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95310
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[57][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95312
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[57][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95314
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[57][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95316
-.subckt mx2_x2 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[57][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95318
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[57][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95304
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[57][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95306
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[57][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95308
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[57][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95310
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[57][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95312
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[57][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95314
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[57][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95316
+.subckt mux2_x1 cmd=$abc$109383$new_n25059_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[57][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95318
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n25068_
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[31][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95320
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[31][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95322
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[31][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95324
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[31][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95320
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[31][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95322
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[31][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95324
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n25072_
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[31][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95326
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[31][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95328
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[31][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95330
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[31][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95332
-.subckt mx2_x2 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[31][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95334
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[31][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95326
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[31][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95328
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[31][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95330
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[31][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95332
+.subckt mux2_x1 cmd=$abc$109383$new_n25068_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[31][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95334
 .subckt buf_x4 i=$abc$109383$new_n20826_ q=$abc$109383$new_n25078_
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n21250_ nq=$abc$109383$new_n25079_
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[58][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95336
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[58][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95338
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[58][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95340
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[58][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95342
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[58][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95344
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[58][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95346
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[58][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95348
-.subckt mx2_x2 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[58][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95350
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[58][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95336
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[58][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95338
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[58][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95340
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[58][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95342
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[58][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95344
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[58][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95346
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[58][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95348
+.subckt mux2_x1 cmd=$abc$109383$new_n25079_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[58][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95350
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n25088_
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[32][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95352
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[32][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95354
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[32][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95356
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[32][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95358
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[32][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95360
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[32][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95362
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[32][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95364
-.subckt mx2_x2 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[32][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95366
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24592_ i1=soc.ram.ram[32][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95352
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24595_ i1=soc.ram.ram[32][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95354
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24597_ i1=soc.ram.ram[32][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95356
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24599_ i1=soc.ram.ram[32][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95358
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24601_ i1=soc.ram.ram[32][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95360
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24603_ i1=soc.ram.ram[32][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95362
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24605_ i1=soc.ram.ram[32][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95364
+.subckt mux2_x1 cmd=$abc$109383$new_n25088_ i0=$abc$109383$new_n24607_ i1=soc.ram.ram[32][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95366
 .subckt nand2_x0 i0=$abc$109383$new_n24062_ i1=$abc$109383$new_n19741_ nq=$abc$109383$new_n25097_
 .subckt buf_x4 i=$abc$109383$new_n25097_ q=$abc$109383$new_n25098_
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[5][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95368
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[5][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95370
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[5][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95372
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[5][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95374
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[5][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95376
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[5][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95378
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[5][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95380
-.subckt mx2_x2 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[5][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95382
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[5][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95368
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[5][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95370
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[5][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95372
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[5][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95374
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[5][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95376
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[5][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95378
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[5][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95380
+.subckt mux2_x1 cmd=$abc$109383$new_n25098_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[5][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95382
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n23997_ nq=$abc$109383$new_n25107_
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[92][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95384
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[92][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95386
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[92][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95388
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[92][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95390
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[92][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95392
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[92][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95394
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[92][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95396
-.subckt mx2_x2 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[92][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95398
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[92][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95384
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[92][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95386
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[92][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95388
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[92][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95390
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[92][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95392
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[92][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95394
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[92][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95396
+.subckt mux2_x1 cmd=$abc$109383$new_n25107_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[92][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95398
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n25116_
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[109][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95400
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[109][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95402
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[109][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95404
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[109][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95406
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[109][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95408
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[109][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95410
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[109][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95412
-.subckt mx2_x2 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[109][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95414
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[109][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95400
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[109][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95402
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[109][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95404
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[109][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95406
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[109][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95408
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[109][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95410
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[109][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95412
+.subckt mux2_x1 cmd=$abc$109383$new_n25116_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[109][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95414
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n25125_
 .subckt nand3_x0 i0=$abc$109383$new_n22041_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n20543_ nq=$abc$109383$new_n25126_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[22][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95416
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[22][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95416
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n25128_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[22][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95418
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[22][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95418
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n25130_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[22][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95420
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[22][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95420
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n25132_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[22][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95422
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[22][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95422
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n25134_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[22][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95424
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[22][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95424
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n25136_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[22][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95426
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[22][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95426
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n25138_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[22][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95428
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[22][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95428
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n25140_
-.subckt mx2_x2 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[22][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95430
+.subckt mux2_x1 cmd=$abc$109383$new_n25126_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[22][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95430
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25142_
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[28][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95432
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[28][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95434
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[28][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95436
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[28][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95438
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[28][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95440
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[28][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95442
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[28][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95444
-.subckt mx2_x2 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[28][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95446
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[28][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95432
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[28][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95434
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[28][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95436
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[28][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95438
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[28][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95440
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[28][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95442
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[28][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95444
+.subckt mux2_x1 cmd=$abc$109383$new_n25142_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[28][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95446
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n24437_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n25151_
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[89][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95448
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[89][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95450
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[89][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95452
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[89][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95454
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[89][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95456
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[89][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95458
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[89][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95460
-.subckt mx2_x2 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[89][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95462
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[89][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95448
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[89][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95450
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[89][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95452
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[89][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95454
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[89][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95456
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[89][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95458
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[89][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95460
+.subckt mux2_x1 cmd=$abc$109383$new_n25151_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[89][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95462
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n21835_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25160_
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[25][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95464
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[25][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95466
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[25][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95468
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[25][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95470
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[25][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95472
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[25][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95474
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[25][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95476
-.subckt mx2_x2 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[25][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95478
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[25][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95464
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[25][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95466
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[25][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95468
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[25][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95470
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[25][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95472
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[25][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95474
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[25][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95476
+.subckt mux2_x1 cmd=$abc$109383$new_n25160_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[25][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95478
 .subckt buf_x4 i=$abc$109383$new_n19802_ q=$abc$109383$new_n25169_
 .subckt nand3_x0 i0=$abc$109383$new_n22080_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n25170_
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[17][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95480
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[17][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95482
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[17][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95484
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[17][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95486
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[17][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95488
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[17][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95490
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[17][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95492
-.subckt mx2_x2 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[17][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95494
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[17][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95480
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[17][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95482
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[17][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95484
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[17][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95486
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[17][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95488
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[17][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95490
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[17][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95492
+.subckt mux2_x1 cmd=$abc$109383$new_n25170_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[17][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95494
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n25179_
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[105][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95496
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[105][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95498
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[105][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95500
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[105][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95502
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[105][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95504
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[105][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95506
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[105][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95508
-.subckt mx2_x2 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[105][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95510
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[105][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95496
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[105][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95498
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[105][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95500
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[105][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95502
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[105][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95504
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[105][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95506
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[105][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95508
+.subckt mux2_x1 cmd=$abc$109383$new_n25179_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[105][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95510
 .subckt nand3_x0 i0=$abc$109383$new_n21815_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n25188_
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[17][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95512
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[17][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95514
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[17][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95516
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[17][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95518
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[17][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95520
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[17][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95522
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[17][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95524
-.subckt mx2_x2 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[17][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95526
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[17][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95512
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[17][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95514
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[17][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95516
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[17][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95518
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[17][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95520
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[17][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95522
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[17][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95524
+.subckt mux2_x1 cmd=$abc$109383$new_n25188_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[17][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95526
 .subckt nand4_x0 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20304_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n25197_
-.subckt a2_x2 i0=$abc$109383$new_n25197_ i1=soc.cpu.minerva.gprf.mem._mem[10][0] q=$abc$109383$new_n25198_
-.subckt a4_x2 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n25199_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n25199_ q=$abc$109383$new_n25200_
-.subckt o2_x2 i0=$abc$109383$new_n25200_ i1=$abc$109383$new_n25198_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95528
+.subckt and2_x1 i0=$abc$109383$new_n25197_ i1=soc.cpu.minerva.gprf.mem._mem[10][0] q=$abc$109383$new_n25198_
+.subckt and4_x1 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20309_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n25199_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n25199_ nq=$abc$109383$new_n25200_
+.subckt or2_x1 i0=$abc$109383$new_n25200_ i1=$abc$109383$new_n25198_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95528
 .subckt buf_x4 i=$abc$109383$new_n25197_ q=$abc$109383$new_n25202_
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[10][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95530
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[10][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95532
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[10][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95534
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[10][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95536
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[10][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95538
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[10][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95540
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[10][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95542
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[10][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95544
-.subckt mx2_x2 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[10][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95546
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[10][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95530
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[10][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95532
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[10][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95534
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[10][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95536
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[10][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95538
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[10][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95540
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[10][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95542
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[10][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95544
+.subckt mux2_x1 cmd=$abc$109383$new_n25202_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[10][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95546
 .subckt buf_x4 i=$abc$109383$new_n25197_ q=$abc$109383$new_n25212_
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[10][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95548
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[10][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95550
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[10][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95552
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[10][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95554
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[10][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95556
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[10][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95558
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[10][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95560
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[10][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95562
-.subckt mx2_x2 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[10][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95564
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[10][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95548
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[10][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95550
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[10][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95552
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[10][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95554
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[10][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95556
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[10][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95558
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[10][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95560
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[10][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95562
+.subckt mux2_x1 cmd=$abc$109383$new_n25212_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[10][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95564
 .subckt buf_x4 i=$abc$109383$new_n25197_ q=$abc$109383$new_n25222_
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[10][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95566
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[10][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95568
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[10][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95570
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[10][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95572
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[10][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95574
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[10][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95576
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[10][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95578
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[10][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95580
-.subckt mx2_x2 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[10][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95582
-.subckt mx2_x2 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[10][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95584
-.subckt mx2_x2 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[10][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95586
-.subckt mx2_x2 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[10][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95588
-.subckt mx2_x2 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[10][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95590
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[10][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95566
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[10][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95568
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[10][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95570
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[10][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95572
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[10][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95574
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[10][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95576
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[10][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95578
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[10][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95580
+.subckt mux2_x1 cmd=$abc$109383$new_n25222_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[10][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95582
+.subckt mux2_x1 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[10][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95584
+.subckt mux2_x1 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[10][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95586
+.subckt mux2_x1 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[10][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95588
+.subckt mux2_x1 cmd=$abc$109383$new_n25197_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[10][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95590
 .subckt nand3_x0 i0=$abc$109383$new_n24874_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n22228_ nq=$abc$109383$new_n25236_
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[25][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95592
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[25][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95594
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[25][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95596
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[25][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95598
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[25][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95600
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[25][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95602
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[25][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95604
-.subckt mx2_x2 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[25][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95606
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[25][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95592
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[25][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95594
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[25][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95596
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[25][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95598
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[25][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95600
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[25][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95602
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[25][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95604
+.subckt mux2_x1 cmd=$abc$109383$new_n25236_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[25][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95606
 .subckt nand3_x0 i0=$abc$109383$new_n22061_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n21786_ nq=$abc$109383$new_n25245_
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[17][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95608
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[17][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95610
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[17][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95612
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[17][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95614
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[17][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95616
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[17][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95618
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[17][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95620
-.subckt mx2_x2 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[17][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95622
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[17][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95608
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[17][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95610
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[17][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95612
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[17][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95614
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[17][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95616
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[17][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95618
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[17][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95620
+.subckt mux2_x1 cmd=$abc$109383$new_n25245_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[17][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95622
 .subckt nand3_x0 i0=$abc$109383$new_n21584_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n25254_
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[102][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95688
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[102][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95690
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[102][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95692
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[102][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95694
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[102][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95696
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[102][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95698
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[102][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95700
-.subckt mx2_x2 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[102][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95702
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[102][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95688
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[102][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95690
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[102][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95692
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[102][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95694
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[102][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95696
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[102][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95698
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[102][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95700
+.subckt mux2_x1 cmd=$abc$109383$new_n25254_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[102][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95702
 .subckt nand3_x0 i0=$abc$109383$new_n21584_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n25263_
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[16][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95736
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[16][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95738
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[16][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95740
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[16][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95742
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[16][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95744
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[16][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95746
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[16][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95748
-.subckt mx2_x2 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[16][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95750
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[16][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95736
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[16][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95738
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[16][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95740
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[16][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95742
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[16][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95744
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[16][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95746
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[16][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95748
+.subckt mux2_x1 cmd=$abc$109383$new_n25263_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[16][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95750
 .subckt nand3_x0 i0=$abc$109383$new_n22080_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n25272_
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[23][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95752
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[23][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95754
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[23][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95756
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[23][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95758
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[23][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95760
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[23][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95762
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[23][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95764
-.subckt mx2_x2 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[23][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95766
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[23][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95752
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[23][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95754
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[23][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95756
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[23][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95758
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[23][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95760
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[23][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95762
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[23][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95764
+.subckt mux2_x1 cmd=$abc$109383$new_n25272_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[23][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95766
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n25281_
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[125][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95768
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[125][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95770
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[125][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95772
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[125][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95774
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[125][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95776
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[125][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95778
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[125][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95780
-.subckt mx2_x2 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[125][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95782
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[125][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95768
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[125][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95770
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[125][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95772
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[125][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95774
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[125][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95776
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[125][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95778
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[125][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95780
+.subckt mux2_x1 cmd=$abc$109383$new_n25281_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[125][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95782
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n20358_ i3=$abc$109383$new_n22919_ nq=$abc$109383$new_n25290_
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[125][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95784
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[125][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95786
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[125][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95788
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[125][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95790
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[125][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95792
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[125][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95794
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[125][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95796
-.subckt mx2_x2 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[125][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95798
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[125][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95784
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[125][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95786
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[125][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95788
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[125][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95790
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24517_ i1=soc.ram.ram[125][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95792
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24519_ i1=soc.ram.ram[125][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95794
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24521_ i1=soc.ram.ram[125][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95796
+.subckt mux2_x1 cmd=$abc$109383$new_n25290_ i0=$abc$109383$new_n24523_ i1=soc.ram.ram[125][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95798
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n24923_ nq=$abc$109383$new_n25299_
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[83][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95800
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[83][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95802
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[83][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95804
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[83][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95806
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[83][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95808
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[83][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95810
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[83][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95812
-.subckt mx2_x2 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[83][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95814
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[83][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95800
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[83][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95802
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[83][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95804
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[83][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95806
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[83][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95808
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[83][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95810
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[83][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95812
+.subckt mux2_x1 cmd=$abc$109383$new_n25299_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[83][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95814
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25308_
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[83][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95816
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[83][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95818
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[83][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95820
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[83][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95822
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[83][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95824
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[83][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95826
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[83][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95828
-.subckt mx2_x2 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[83][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95830
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n24997_ i1=soc.ram.ram[83][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95816
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25001_ i1=soc.ram.ram[83][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95818
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25003_ i1=soc.ram.ram[83][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95820
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[83][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95822
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25006_ i1=soc.ram.ram[83][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95824
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25008_ i1=soc.ram.ram[83][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95826
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25010_ i1=soc.ram.ram[83][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95828
+.subckt mux2_x1 cmd=$abc$109383$new_n25308_ i0=$abc$109383$new_n25012_ i1=soc.ram.ram[83][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95830
 .subckt nand4_x0 i0=$abc$109383$new_n24502_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25317_
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[84][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95832
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[84][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95834
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[84][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95836
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[84][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95838
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[84][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95840
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[84][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95842
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[84][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95844
-.subckt mx2_x2 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[84][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95846
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[84][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95832
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[84][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95834
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[84][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95836
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[84][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95838
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[84][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95840
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[84][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95842
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[84][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95844
+.subckt mux2_x1 cmd=$abc$109383$new_n25317_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[84][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95846
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n25326_
 .subckt buf_x4 i=$abc$109383$new_n21590_ q=$abc$109383$new_n25327_
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25328_
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[84][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95848
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[84][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95850
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[84][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95852
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[84][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95854
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[84][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95856
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[84][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95858
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[84][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95860
-.subckt mx2_x2 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[84][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95862
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[84][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95848
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[84][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95850
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25017_ i1=soc.ram.ram[84][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95852
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25019_ i1=soc.ram.ram[84][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95854
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25021_ i1=soc.ram.ram[84][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95856
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[84][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95858
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25024_ i1=soc.ram.ram[84][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95860
+.subckt mux2_x1 cmd=$abc$109383$new_n25328_ i0=$abc$109383$new_n25026_ i1=soc.ram.ram[84][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95862
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n25337_
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n23997_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25338_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[84][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95864
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[84][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95864
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n25340_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[84][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95866
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[84][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95866
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n25342_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[84][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95868
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[84][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95870
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[84][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95868
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25072_ i1=soc.ram.ram[84][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95870
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n25345_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[84][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95872
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[84][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95872
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n25347_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[84][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95874
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[84][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95874
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n25349_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[84][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95876
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[84][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95876
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n25351_
-.subckt mx2_x2 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[84][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95878
+.subckt mux2_x1 cmd=$abc$109383$new_n25338_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[84][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95878
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25353_
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[85][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95880
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[85][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95882
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25037_ i1=soc.ram.ram[85][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95880
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25040_ i1=soc.ram.ram[85][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95882
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n25356_
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[85][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95884
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[85][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95884
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n25358_
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[85][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95886
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[85][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95886
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n25360_
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[85][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95888
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[85][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95890
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[85][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95888
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25045_ i1=soc.ram.ram[85][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95890
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n25363_
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[85][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95892
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[85][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95892
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n25365_
-.subckt mx2_x2 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[85][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95894
+.subckt mux2_x1 cmd=$abc$109383$new_n25353_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[85][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95894
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25367_
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[85][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95896
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[85][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95898
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[85][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95900
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[85][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95902
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[85][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95904
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[85][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95906
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[85][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95908
-.subckt mx2_x2 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[85][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95910
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[85][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95896
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[85][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95898
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[85][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95900
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[85][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95902
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[85][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95904
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[85][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95906
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[85][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95908
+.subckt mux2_x1 cmd=$abc$109383$new_n25367_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[85][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95910
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n20358_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25376_
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[85][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95912
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[85][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95914
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[85][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95916
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[85][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95918
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24525_ i1=soc.ram.ram[85][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95912
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24528_ i1=soc.ram.ram[85][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95914
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24530_ i1=soc.ram.ram[85][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95916
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n24532_ i1=soc.ram.ram[85][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95918
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n25381_
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[85][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95920
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[85][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95920
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n25383_
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[85][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95922
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[85][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95922
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n25385_
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[85][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95924
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[85][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95924
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n25387_
-.subckt mx2_x2 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[85][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95926
+.subckt mux2_x1 cmd=$abc$109383$new_n25376_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[85][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95926
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n24179_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25389_
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[86][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95928
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[86][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95930
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[86][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95932
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[86][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95934
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[86][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95936
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[86][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95938
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[86][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95940
-.subckt mx2_x2 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[86][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95942
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[86][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95928
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[86][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95930
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[86][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95932
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[86][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95934
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[86][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95936
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[86][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95938
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[86][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95940
+.subckt mux2_x1 cmd=$abc$109383$new_n25389_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[86][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95942
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n25398_
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25399_
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[86][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95944
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[86][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95944
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n25401_
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[86][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95946
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[86][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95948
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[86][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95950
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[86][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95952
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[86][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95946
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[86][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95948
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[86][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95950
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[86][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95952
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n25406_
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[86][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95954
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[86][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95956
-.subckt mx2_x2 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[86][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95958
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[86][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95954
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[86][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95956
+.subckt mux2_x1 cmd=$abc$109383$new_n25399_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[86][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95958
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n20828_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n25410_
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[86][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95960
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[86][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95962
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[86][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95964
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[86][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95960
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[86][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95962
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[86][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95964
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n25414_
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[86][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95966
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[86][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95968
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[86][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95970
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[86][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95972
-.subckt mx2_x2 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[86][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95974
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[86][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95966
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[86][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95968
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[86][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95970
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[86][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95972
+.subckt mux2_x1 cmd=$abc$109383$new_n25410_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[86][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95974
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n25420_
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n25421_
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[87][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95976
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[87][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95976
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n25423_
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[87][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95978
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[87][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95978
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n25425_
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[87][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95980
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[87][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95980
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n25427_
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[87][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95982
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[87][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95984
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[87][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95986
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[87][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95988
-.subckt mx2_x2 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[87][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95990
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[87][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95982
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[87][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95984
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[87][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95986
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[87][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95988
+.subckt mux2_x1 cmd=$abc$109383$new_n25421_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[87][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95990
 .subckt nand4_x0 i0=$abc$109383$new_n25327_ i1=$abc$109383$new_n20852_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25433_
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[87][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95992
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[87][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95994
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[87][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95996
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[87][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95998
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[87][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96000
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[87][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96002
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[87][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96004
-.subckt mx2_x2 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[87][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96006
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[87][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95992
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[87][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95994
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[87][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95996
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[87][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95998
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[87][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96000
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[87][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96002
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[87][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96004
+.subckt mux2_x1 cmd=$abc$109383$new_n25433_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[87][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96006
 .subckt buf_x4 i=$abc$109383$new_n21590_ q=$abc$109383$new_n25442_
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n25443_
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[87][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96008
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[87][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96010
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[87][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96012
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[87][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96014
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[87][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96016
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[87][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96018
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[87][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96020
-.subckt mx2_x2 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[87][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96022
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[87][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96008
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[87][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96010
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[87][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96012
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[87][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96014
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[87][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96016
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[87][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96018
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[87][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96020
+.subckt mux2_x1 cmd=$abc$109383$new_n25443_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[87][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96022
 .subckt buf_x4 i=$abc$109383$new_n21238_ q=$abc$109383$new_n25452_
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25453_
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[88][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96024
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[88][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96026
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[88][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96028
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[88][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96030
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[88][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96032
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[88][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96034
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[88][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96036
-.subckt mx2_x2 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[88][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96038
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[88][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96024
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[88][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96026
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[88][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96028
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[88][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96030
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[88][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96032
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[88][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96034
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[88][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96036
+.subckt mux2_x1 cmd=$abc$109383$new_n25453_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[88][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96038
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n20815_ nq=$abc$109383$new_n25462_
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[88][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96040
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[88][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96042
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[88][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96044
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[88][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96046
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[88][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96048
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[88][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96050
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[88][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96052
-.subckt mx2_x2 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[88][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96054
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[88][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96040
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[88][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96042
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[88][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96044
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[88][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96046
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[88][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96048
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[88][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96050
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[88][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96052
+.subckt mux2_x1 cmd=$abc$109383$new_n25462_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[88][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96054
 .subckt buf_x4 i=$abc$109383$new_n20261_ q=$abc$109383$new_n25471_
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n20815_ nq=$abc$109383$new_n25472_
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[88][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96056
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[88][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96058
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[88][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96060
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[88][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96062
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[88][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96064
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[88][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96066
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[88][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96068
-.subckt mx2_x2 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[88][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96070
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[88][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96056
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[88][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96058
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[88][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96060
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[88][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96062
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[88][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96064
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[88][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96066
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[88][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96068
+.subckt mux2_x1 cmd=$abc$109383$new_n25472_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[88][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96070
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n25481_
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[89][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96072
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[89][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96074
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[89][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96076
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[89][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96078
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[89][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96080
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[89][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96082
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[89][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96084
-.subckt mx2_x2 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[89][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96086
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[89][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96072
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[89][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96074
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[89][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96076
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[89][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96078
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[89][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96080
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[89][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96082
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[89][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96084
+.subckt mux2_x1 cmd=$abc$109383$new_n25481_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[89][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96086
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n20358_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n25490_
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[89][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96088
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[89][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96090
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[89][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96092
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[89][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96094
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[89][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96096
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[89][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96098
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[89][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96100
-.subckt mx2_x2 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[89][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96102
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[89][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96088
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[89][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96090
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[89][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96092
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[89][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96094
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[89][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96096
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[89][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96098
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[89][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96100
+.subckt mux2_x1 cmd=$abc$109383$new_n25490_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[89][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96102
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n25499_
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[89][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96104
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[89][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96106
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[89][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96108
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[89][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96110
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[89][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96112
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[89][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96114
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[89][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96116
-.subckt mx2_x2 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[89][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96118
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[89][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96104
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[89][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96106
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[89][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96108
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[89][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96110
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[89][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96112
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[89][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96114
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[89][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96116
+.subckt mux2_x1 cmd=$abc$109383$new_n25499_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[89][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96118
 .subckt buf_x4 i=$abc$109383$new_n20804_ q=$abc$109383$new_n25508_
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n25509_
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[8][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96120
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[8][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96122
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[8][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96124
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[8][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96126
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[8][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96128
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[8][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96130
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[8][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96132
-.subckt mx2_x2 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[8][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96134
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25125_ i1=soc.ram.ram[8][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96120
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25128_ i1=soc.ram.ram[8][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96122
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25130_ i1=soc.ram.ram[8][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96124
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25132_ i1=soc.ram.ram[8][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96126
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25134_ i1=soc.ram.ram[8][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96128
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25136_ i1=soc.ram.ram[8][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96130
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25138_ i1=soc.ram.ram[8][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96132
+.subckt mux2_x1 cmd=$abc$109383$new_n25509_ i0=$abc$109383$new_n25140_ i1=soc.ram.ram[8][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96134
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25518_
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[8][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96136
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[8][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96138
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[8][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96140
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[8][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96142
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[8][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96144
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[8][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96146
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[8][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96148
-.subckt mx2_x2 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[8][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96150
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[8][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96136
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[8][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96138
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[8][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96140
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[8][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96142
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[8][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96144
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[8][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96146
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[8][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96148
+.subckt mux2_x1 cmd=$abc$109383$new_n25518_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[8][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96150
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n25527_
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[8][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96152
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[8][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96154
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[8][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96156
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[8][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96158
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[8][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96160
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[8][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96162
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[8][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96164
-.subckt mx2_x2 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[8][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96166
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[8][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96152
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[8][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96154
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[8][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96156
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[8][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96158
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[8][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96160
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[8][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96162
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[8][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96164
+.subckt mux2_x1 cmd=$abc$109383$new_n25527_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[8][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96166
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n22865_ i3=$abc$109383$new_n21250_ nq=$abc$109383$new_n25536_
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[90][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96168
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[90][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96170
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[90][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96172
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[90][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96174
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[90][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96176
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[90][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96178
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[90][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96180
-.subckt mx2_x2 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[90][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96182
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[90][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96168
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[90][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96170
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[90][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96172
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[90][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96174
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[90][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96176
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[90][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96178
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[90][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96180
+.subckt mux2_x1 cmd=$abc$109383$new_n25536_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[90][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96182
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25545_
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[90][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96184
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[90][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96186
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[90][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96188
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[90][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96190
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[90][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96192
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[90][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96194
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[90][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96196
-.subckt mx2_x2 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[90][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96198
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[90][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96184
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[90][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96186
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[90][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96188
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[90][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96190
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[90][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96192
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[90][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96194
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[90][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96196
+.subckt mux2_x1 cmd=$abc$109383$new_n25545_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[90][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96198
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n25554_
 .subckt nand4_x0 i0=$abc$109383$new_n25442_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n21250_ nq=$abc$109383$new_n25555_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[90][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96200
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[90][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96200
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n25557_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[90][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96202
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[90][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96202
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n25559_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[90][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96204
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[90][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96204
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n25561_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[90][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96206
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[90][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96206
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n25563_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[90][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96208
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[90][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96208
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n25565_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[90][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96210
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[90][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96210
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n25567_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[90][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96212
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[90][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96212
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n25569_
-.subckt mx2_x2 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[90][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96214
+.subckt mux2_x1 cmd=$abc$109383$new_n25555_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[90][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96214
 .subckt buf_x4 i=$abc$109383$new_n21590_ q=$abc$109383$new_n25571_
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n25452_ i2=$abc$109383$new_n21236_ i3=$abc$109383$new_n21584_ nq=$abc$109383$new_n25572_
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[91][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96216
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[91][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96218
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[91][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96220
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[91][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96222
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[91][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96224
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[91][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96226
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[91][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96228
-.subckt mx2_x2 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[91][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96230
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[91][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96216
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[91][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96218
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[91][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96220
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[91][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96222
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[91][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96224
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[91][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96226
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[91][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96228
+.subckt mux2_x1 cmd=$abc$109383$new_n25572_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[91][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96230
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n21239_ i2=$abc$109383$new_n21236_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25581_
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[91][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96232
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[91][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96234
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[91][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96236
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[91][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96238
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[91][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96240
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[91][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96242
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[91][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96244
-.subckt mx2_x2 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[91][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96246
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[91][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96232
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[91][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96234
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[91][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96236
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[91][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96238
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[91][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96240
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[91][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96242
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[91][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96244
+.subckt mux2_x1 cmd=$abc$109383$new_n25581_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[91][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96246
 .subckt nand3_x0 i0=$abc$109383$new_n21584_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n25590_
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[100][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96356
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[100][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96358
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[100][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96360
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[100][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96362
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[100][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96364
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[100][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96366
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[100][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96368
-.subckt mx2_x2 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[100][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96370
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[100][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96356
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[100][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96358
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[100][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96360
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[100][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96362
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[100][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96364
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[100][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96366
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[100][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96368
+.subckt mux2_x1 cmd=$abc$109383$new_n25590_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[100][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96370
 .subckt buf_x4 i=$abc$109383$new_n20550_ q=$abc$109383$new_n25599_
 .subckt buf_x4 i=$abc$109383$new_n21480_ q=$abc$109383$new_n25600_
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25601_
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[27][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96372
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[27][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96374
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[27][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96376
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[27][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96378
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[27][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96380
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[27][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96382
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[27][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96384
-.subckt mx2_x2 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[27][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96386
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[27][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96372
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[27][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96374
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[27][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96376
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[27][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96378
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[27][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96380
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[27][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96382
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[27][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96384
+.subckt mux2_x1 cmd=$abc$109383$new_n25601_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[27][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96386
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n21859_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25610_
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[32][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96388
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[32][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96390
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[32][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96392
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[32][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96394
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[32][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96396
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[32][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96398
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[32][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96400
-.subckt mx2_x2 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[32][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96402
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[32][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96388
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[32][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96390
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[32][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96392
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[32][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96394
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[32][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96396
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[32][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96398
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[32][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96400
+.subckt mux2_x1 cmd=$abc$109383$new_n25610_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[32][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96402
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n23064_ nq=$abc$109383$new_n25619_
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[15][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96404
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[15][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96406
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[15][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96408
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[15][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96410
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[15][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96412
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[15][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96414
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[15][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96416
-.subckt mx2_x2 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[15][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96418
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[15][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96404
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[15][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96406
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[15][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96408
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[15][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96410
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[15][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96412
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[15][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96414
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[15][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96416
+.subckt mux2_x1 cmd=$abc$109383$new_n25619_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[15][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96418
 .subckt nand3_x0 i0=$abc$109383$new_n22061_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n25628_
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[22][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96420
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[22][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96422
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[22][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96424
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[22][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96426
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[22][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96428
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[22][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96430
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[22][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96432
-.subckt mx2_x2 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[22][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96434
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[22][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96420
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[22][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96422
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[22][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96424
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[22][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96426
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[22][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96428
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[22][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96430
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[22][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96432
+.subckt mux2_x1 cmd=$abc$109383$new_n25628_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[22][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96434
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n25637_
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[27][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96436
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[27][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96438
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[27][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96440
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[27][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96442
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[27][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96444
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[27][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96446
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[27][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96448
-.subckt mx2_x2 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[27][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96450
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[27][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96436
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[27][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96438
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[27][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96440
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[27][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96442
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[27][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96444
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[27][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96446
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[27][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96448
+.subckt mux2_x1 cmd=$abc$109383$new_n25637_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[27][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96450
 .subckt nand4_x0 i0=$abc$109383$new_n21334_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25646_
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[40][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96452
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[40][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96454
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[40][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96456
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[40][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96458
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[40][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96460
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[40][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96462
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[40][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96464
-.subckt mx2_x2 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[40][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96466
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[40][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96452
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[40][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96454
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25356_ i1=soc.ram.ram[40][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96456
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25358_ i1=soc.ram.ram[40][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96458
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25360_ i1=soc.ram.ram[40][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96460
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[40][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96462
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25363_ i1=soc.ram.ram[40][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96464
+.subckt mux2_x1 cmd=$abc$109383$new_n25646_ i0=$abc$109383$new_n25365_ i1=soc.ram.ram[40][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96466
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n25655_
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[26][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96476
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[26][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96478
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[26][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96480
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[26][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96482
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[26][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96484
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[26][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96486
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[26][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96488
-.subckt mx2_x2 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[26][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96490
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25337_ i1=soc.ram.ram[26][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96476
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25340_ i1=soc.ram.ram[26][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96478
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25342_ i1=soc.ram.ram[26][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96480
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[26][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96482
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25345_ i1=soc.ram.ram[26][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96484
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25347_ i1=soc.ram.ram[26][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96486
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25349_ i1=soc.ram.ram[26][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96488
+.subckt mux2_x1 cmd=$abc$109383$new_n25655_ i0=$abc$109383$new_n25351_ i1=soc.ram.ram[26][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96490
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n25664_
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[24][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96492
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[24][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96494
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[24][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96496
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[24][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96498
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[24][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96500
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[24][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96502
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[24][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96504
-.subckt mx2_x2 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[24][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96506
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[24][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96492
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[24][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96494
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[24][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96496
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[24][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96498
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[24][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96500
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[24][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96502
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[24][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96504
+.subckt mux2_x1 cmd=$abc$109383$new_n25664_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[24][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96506
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n19752_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25673_
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[39][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96508
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[39][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96510
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25398_ i1=soc.ram.ram[39][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96508
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25401_ i1=soc.ram.ram[39][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96510
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n25676_
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[39][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96512
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[39][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96512
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n25678_
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[39][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96514
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[39][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96514
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n25680_
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[39][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96516
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[39][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96518
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[39][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96516
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25406_ i1=soc.ram.ram[39][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96518
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n25683_
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[39][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96520
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[39][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96520
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n25685_
-.subckt mx2_x2 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[39][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96522
+.subckt mux2_x1 cmd=$abc$109383$new_n25673_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[39][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96522
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n25687_
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[3][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96524
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[3][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96526
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[3][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96528
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[3][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96530
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[3][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96532
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[3][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96534
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[3][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96536
-.subckt mx2_x2 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[3][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96538
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[3][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96524
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[3][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96526
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[3][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96528
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[3][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96530
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[3][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96532
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[3][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96534
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[3][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96536
+.subckt mux2_x1 cmd=$abc$109383$new_n25687_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[3][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96538
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n21148_ nq=$abc$109383$new_n25696_
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[26][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96540
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[26][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96542
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[26][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96544
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[26][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96546
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[26][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96548
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[26][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96550
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[26][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96552
-.subckt mx2_x2 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[26][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96554
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[26][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96540
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[26][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96542
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[26][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96544
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[26][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96546
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[26][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96548
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[26][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96550
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[26][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96552
+.subckt mux2_x1 cmd=$abc$109383$new_n25696_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[26][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96554
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n25705_
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25706_
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[38][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96556
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[38][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96556
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n25708_
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[38][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96558
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[38][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96560
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[38][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96562
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[38][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96564
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[38][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96558
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[38][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96560
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[38][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96562
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[38][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96564
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n25713_
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[38][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96566
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[38][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96568
-.subckt mx2_x2 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[38][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96570
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[38][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96566
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[38][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96568
+.subckt mux2_x1 cmd=$abc$109383$new_n25706_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[38][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96570
 .subckt nand3_x0 i0=$abc$109383$new_n19802_ i1=$abc$109383$new_n19752_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25717_
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[23][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96572
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[23][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96574
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[23][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96576
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[23][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96578
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[23][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96580
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[23][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96582
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[23][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96584
-.subckt mx2_x2 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[23][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96586
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[23][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96572
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[23][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96574
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[23][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96576
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[23][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96578
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[23][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96580
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[23][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96582
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[23][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96584
+.subckt mux2_x1 cmd=$abc$109383$new_n25717_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[23][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96586
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n22286_ nq=$abc$109383$new_n25726_
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[15][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96588
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[15][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96590
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[15][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96592
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[15][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96594
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[15][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96596
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[15][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96598
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[15][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96600
-.subckt mx2_x2 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[15][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96602
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[15][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96588
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[15][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96590
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[15][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96592
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[15][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96594
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[15][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96596
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[15][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96598
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[15][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96600
+.subckt mux2_x1 cmd=$abc$109383$new_n25726_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[15][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96602
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n25735_
 .subckt nand3_x0 i0=$abc$109383$new_n21584_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n25736_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[20][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96604
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[20][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96604
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n25738_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[20][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96606
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[20][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96606
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n25740_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[20][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96608
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[20][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96610
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[20][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96608
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25414_ i1=soc.ram.ram[20][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96610
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n25743_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[20][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96612
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[20][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96612
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n25745_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[20][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96614
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[20][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96614
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n25747_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[20][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96616
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[20][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96616
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n25749_
-.subckt mx2_x2 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[20][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96618
+.subckt mux2_x1 cmd=$abc$109383$new_n25736_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[20][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96618
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n19752_ i2=$abc$109383$new_n24913_ nq=$abc$109383$new_n25751_
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[31][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96620
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[31][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96622
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[31][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96624
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[31][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96626
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[31][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96628
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[31][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96630
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[31][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96632
-.subckt mx2_x2 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[31][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96634
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[31][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96620
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[31][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96622
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[31][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96624
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[31][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96626
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[31][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96628
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[31][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96630
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[31][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96632
+.subckt mux2_x1 cmd=$abc$109383$new_n25751_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[31][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96634
 .subckt nand4_x0 i0=$abc$109383$new_n20826_ i1=$abc$109383$new_n20852_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25760_
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[49][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96636
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[49][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96638
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[49][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96640
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[49][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96642
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[49][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96644
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[49][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96646
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[49][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96648
-.subckt mx2_x2 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[49][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96650
-.subckt mx2_x2 cmd=soc.rom.spimemio.rd_inc i0=$abc$109383$new_n19645_ i1=$abc$109383$new_n14848_ q=$abc$109383$new_n25769_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25769_ i1=soc.rom.spimemio.rd_addr[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96652
-.subckt mx2_x2 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14853_ i1=$abc$109383$new_n19684_ q=$abc$109383$new_n25771_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25771_ i1=soc.rom.spimemio.rd_addr[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96654
-.subckt mx2_x2 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14858_ i1=$abc$109383$new_n19687_ q=$abc$109383$new_n25773_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25773_ i1=soc.rom.spimemio.rd_addr[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96656
-.subckt mx2_x2 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14846_ i1=$abc$109383$new_n19692_ q=$abc$109383$new_n25775_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25775_ i1=soc.rom.spimemio.rd_addr[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96658
-.subckt mx2_x2 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14841_ i1=$abc$109383$new_n19694_ q=$abc$109383$new_n25777_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25777_ i1=soc.rom.spimemio.rd_addr[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96660
-.subckt mx2_x2 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14866_ i1=$abc$109383$new_n19696_ q=$abc$109383$new_n25779_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25779_ i1=soc.rom.spimemio.rd_addr[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96662
-.subckt nxr2_x1 i0=$abc$109383$new_n14827_ i1=$abc$109383$new_n14828_ nq=$abc$109383$new_n25781_
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[49][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96636
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[49][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96638
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[49][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96640
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[49][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96642
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[49][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96644
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[49][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96646
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[49][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96648
+.subckt mux2_x1 cmd=$abc$109383$new_n25760_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[49][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96650
+.subckt mux2_x1 cmd=soc.rom.spimemio.rd_inc i0=$abc$109383$new_n19645_ i1=$abc$109383$new_n14848_ q=$abc$109383$new_n25769_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25769_ i1=soc.rom.spimemio.rd_addr[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96652
+.subckt mux2_x1 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14853_ i1=$abc$109383$new_n19684_ q=$abc$109383$new_n25771_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25771_ i1=soc.rom.spimemio.rd_addr[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96654
+.subckt mux2_x1 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14858_ i1=$abc$109383$new_n19687_ q=$abc$109383$new_n25773_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25773_ i1=soc.rom.spimemio.rd_addr[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96656
+.subckt mux2_x1 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14846_ i1=$abc$109383$new_n19692_ q=$abc$109383$new_n25775_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25775_ i1=soc.rom.spimemio.rd_addr[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96658
+.subckt mux2_x1 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14841_ i1=$abc$109383$new_n19694_ q=$abc$109383$new_n25777_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25777_ i1=soc.rom.spimemio.rd_addr[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96660
+.subckt mux2_x1 cmd=$abc$109383$new_n20700_ i0=$abc$109383$new_n14866_ i1=$abc$109383$new_n19696_ q=$abc$109383$new_n25779_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25779_ i1=soc.rom.spimemio.rd_addr[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96662
+.subckt nexor2_x0 i0=$abc$109383$new_n14827_ i1=$abc$109383$new_n14828_ nq=$abc$109383$new_n25781_
 .subckt buf_x4 i=$abc$109383$new_n20699_ q=$abc$109383$new_n25782_
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25781_ i1=$abc$109383$new_n19698_ q=$abc$109383$new_n25783_
-.subckt mx2_x2 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25783_ i1=soc.rom.spimemio.rd_addr[8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96664
-.subckt nxr2_x1 i0=$abc$109383$new_n14743_ i1=$abc$109383$new_n14832_ nq=$abc$109383$new_n25785_
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25785_ i1=$abc$109383$new_n14834_ q=$abc$109383$new_n25786_
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25781_ i1=$abc$109383$new_n19698_ q=$abc$109383$new_n25783_
+.subckt mux2_x1 cmd=$abc$109383$new_n20747_ i0=$abc$109383$new_n25783_ i1=soc.rom.spimemio.rd_addr[8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96664
+.subckt nexor2_x0 i0=$abc$109383$new_n14743_ i1=$abc$109383$new_n14832_ nq=$abc$109383$new_n25785_
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25785_ i1=$abc$109383$new_n14834_ q=$abc$109383$new_n25786_
 .subckt buf_x4 i=$abc$109383$new_n20704_ q=$abc$109383$new_n25787_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25786_ i1=soc.rom.spimemio.rd_addr[9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96666
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n14816_ i1=$abc$109383$new_n14824_ q=$abc$109383$new_n25789_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25789_ i1=soc.rom.spimemio.rd_addr[10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96668
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n14798_ i1=$abc$109383$new_n14790_ q=$abc$109383$new_n25791_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25791_ i1=soc.rom.spimemio.rd_addr[11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96670
-.subckt nxr2_x1 i0=$abc$109383$new_n14744_ i1=$abc$109383$new_n14811_ nq=$abc$109383$new_n25793_
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25793_ i1=$abc$109383$new_n14807_ q=$abc$109383$new_n25794_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25794_ i1=soc.rom.spimemio.rd_addr[12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96672
-.subckt nxr2_x1 i0=$abc$109383$new_n15069_ i1=$abc$109383$new_n15070_ nq=$abc$109383$new_n25796_
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25796_ i1=$abc$109383$new_n14802_ q=$abc$109383$new_n25797_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25797_ i1=soc.rom.spimemio.rd_addr[13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96674
-.subckt nxr2_x1 i0=$abc$109383$new_n14875_ i1=$abc$109383$new_n14876_ nq=$abc$109383$new_n25799_
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25799_ i1=$abc$109383$new_n14878_ q=$abc$109383$new_n25800_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25800_ i1=soc.rom.spimemio.rd_addr[14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96676
-.subckt nxr2_x1 i0=$abc$109383$new_n14745_ i1=$abc$109383$new_n14870_ nq=$abc$109383$new_n25802_
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25802_ i1=$abc$109383$new_n14872_ q=$abc$109383$new_n25803_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25803_ i1=soc.rom.spimemio.rd_addr[15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96678
-.subckt mx2_x2 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n14783_ i1=$abc$109383$new_n14780_ q=$abc$109383$new_n25805_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25805_ i1=soc.rom.spimemio.rd_addr[16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96680
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25786_ i1=soc.rom.spimemio.rd_addr[9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96666
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n14816_ i1=$abc$109383$new_n14824_ q=$abc$109383$new_n25789_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25789_ i1=soc.rom.spimemio.rd_addr[10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96668
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n14798_ i1=$abc$109383$new_n14790_ q=$abc$109383$new_n25791_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25791_ i1=soc.rom.spimemio.rd_addr[11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96670
+.subckt nexor2_x0 i0=$abc$109383$new_n14744_ i1=$abc$109383$new_n14811_ nq=$abc$109383$new_n25793_
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25793_ i1=$abc$109383$new_n14807_ q=$abc$109383$new_n25794_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25794_ i1=soc.rom.spimemio.rd_addr[12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96672
+.subckt nexor2_x0 i0=$abc$109383$new_n15069_ i1=$abc$109383$new_n15070_ nq=$abc$109383$new_n25796_
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25796_ i1=$abc$109383$new_n14802_ q=$abc$109383$new_n25797_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25797_ i1=soc.rom.spimemio.rd_addr[13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96674
+.subckt nexor2_x0 i0=$abc$109383$new_n14875_ i1=$abc$109383$new_n14876_ nq=$abc$109383$new_n25799_
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25799_ i1=$abc$109383$new_n14878_ q=$abc$109383$new_n25800_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25800_ i1=soc.rom.spimemio.rd_addr[14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96676
+.subckt nexor2_x0 i0=$abc$109383$new_n14745_ i1=$abc$109383$new_n14870_ nq=$abc$109383$new_n25802_
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n25802_ i1=$abc$109383$new_n14872_ q=$abc$109383$new_n25803_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25803_ i1=soc.rom.spimemio.rd_addr[15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96678
+.subckt mux2_x1 cmd=$abc$109383$new_n25782_ i0=$abc$109383$new_n14783_ i1=$abc$109383$new_n14780_ q=$abc$109383$new_n25805_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25805_ i1=soc.rom.spimemio.rd_addr[16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96680
 .subckt inv_x0 i=soc.rom.spimemio.rd_addr[17] nq=$abc$109383$new_n25807_
-.subckt a3_x2 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[16] i2=soc.rom.spimemio.rd_addr[15] q=$abc$109383$new_n25808_
-.subckt nxr2_x1 i0=$abc$109383$new_n25808_ i1=$abc$109383$new_n25807_ nq=$abc$109383$new_n25809_
-.subckt mx2_x2 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n25809_ i1=$abc$109383$new_n14786_ q=$abc$109383$new_n25810_
-.subckt mx2_x2 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25810_ i1=soc.rom.spimemio.rd_addr[17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96682
-.subckt mx2_x2 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n14778_ i1=$abc$109383$new_n14950_ q=$abc$109383$new_n25812_
-.subckt mx2_x2 cmd=$abc$109383$new_n20704_ i0=$abc$109383$new_n25812_ i1=soc.rom.spimemio.rd_addr[18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96684
-.subckt nxr2_x1 i0=$abc$109383$new_n14884_ i1=$abc$109383$new_n14885_ nq=$abc$109383$new_n25814_
-.subckt mx2_x2 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n25814_ i1=$abc$109383$new_n14887_ q=$abc$109383$new_n25815_
-.subckt mx2_x2 cmd=$abc$109383$new_n20704_ i0=$abc$109383$new_n25815_ i1=soc.rom.spimemio.rd_addr[19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96686
-.subckt mx2_x2 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n14759_ i1=$abc$109383$new_n14756_ q=$abc$109383$new_n25817_
-.subckt mx2_x2 cmd=$abc$109383$new_n20704_ i0=$abc$109383$new_n25817_ i1=soc.rom.spimemio.rd_addr[20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96688
+.subckt and3_x1 i0=$abc$109383$new_n14745_ i1=soc.rom.spimemio.rd_addr[16] i2=soc.rom.spimemio.rd_addr[15] q=$abc$109383$new_n25808_
+.subckt nexor2_x0 i0=$abc$109383$new_n25808_ i1=$abc$109383$new_n25807_ nq=$abc$109383$new_n25809_
+.subckt mux2_x1 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n25809_ i1=$abc$109383$new_n14786_ q=$abc$109383$new_n25810_
+.subckt mux2_x1 cmd=$abc$109383$new_n25787_ i0=$abc$109383$new_n25810_ i1=soc.rom.spimemio.rd_addr[17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96682
+.subckt mux2_x1 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n14778_ i1=$abc$109383$new_n14950_ q=$abc$109383$new_n25812_
+.subckt mux2_x1 cmd=$abc$109383$new_n20704_ i0=$abc$109383$new_n25812_ i1=soc.rom.spimemio.rd_addr[18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96684
+.subckt nexor2_x0 i0=$abc$109383$new_n14884_ i1=$abc$109383$new_n14885_ nq=$abc$109383$new_n25814_
+.subckt mux2_x1 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n25814_ i1=$abc$109383$new_n14887_ q=$abc$109383$new_n25815_
+.subckt mux2_x1 cmd=$abc$109383$new_n20704_ i0=$abc$109383$new_n25815_ i1=soc.rom.spimemio.rd_addr[19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96686
+.subckt mux2_x1 cmd=$abc$109383$new_n20699_ i0=$abc$109383$new_n14759_ i1=$abc$109383$new_n14756_ q=$abc$109383$new_n25817_
+.subckt mux2_x1 cmd=$abc$109383$new_n20704_ i0=$abc$109383$new_n25817_ i1=soc.rom.spimemio.rd_addr[20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96688
 .subckt nand2_x0 i0=$abc$109383$new_n20705_ i1=$abc$109383$new_n14767_ nq=$abc$109383$new_n25819_
 .subckt nand2_x0 i0=$abc$109383$new_n14768_ i1=$abc$109383$new_n20700_ nq=$abc$109383$new_n25820_
-.subckt nxr2_x1 i0=$abc$109383$new_n14748_ i1=$abc$109383$new_n14767_ nq=$abc$109383$new_n25821_
+.subckt nexor2_x0 i0=$abc$109383$new_n14748_ i1=$abc$109383$new_n14767_ nq=$abc$109383$new_n25821_
 .subckt nand2_x0 i0=$abc$109383$new_n25821_ i1=soc.rom.spimemio.rd_inc nq=$abc$109383$new_n25822_
 .subckt nand3_x0 i0=$abc$109383$new_n25822_ i1=$abc$109383$new_n25820_ i2=$abc$109383$new_n20750_ nq=$abc$109383$new_n25823_
-.subckt a2_x2 i0=$abc$109383$new_n25823_ i1=$abc$109383$new_n25819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96690
+.subckt and2_x1 i0=$abc$109383$new_n25823_ i1=$abc$109383$new_n25819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96690
 .subckt nand2_x0 i0=$abc$109383$new_n20705_ i1=$abc$109383$new_n14762_ nq=$abc$109383$new_n25825_
 .subckt nand2_x0 i0=$abc$109383$new_n14764_ i1=$abc$109383$new_n20700_ nq=$abc$109383$new_n25826_
-.subckt nxr2_x1 i0=$abc$109383$new_n14761_ i1=$abc$109383$new_n14762_ nq=$abc$109383$new_n25827_
+.subckt nexor2_x0 i0=$abc$109383$new_n14761_ i1=$abc$109383$new_n14762_ nq=$abc$109383$new_n25827_
 .subckt nand2_x0 i0=$abc$109383$new_n25827_ i1=soc.rom.spimemio.rd_inc nq=$abc$109383$new_n25828_
 .subckt nand3_x0 i0=$abc$109383$new_n25828_ i1=$abc$109383$new_n25826_ i2=$abc$109383$new_n20750_ nq=$abc$109383$new_n25829_
-.subckt a2_x2 i0=$abc$109383$new_n25829_ i1=$abc$109383$new_n25825_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96692
+.subckt and2_x1 i0=$abc$109383$new_n25829_ i1=$abc$109383$new_n25825_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96692
 .subckt nand2_x0 i0=$abc$109383$new_n20705_ i1=$abc$109383$new_n14753_ nq=$abc$109383$new_n25831_
 .subckt nand2_x0 i0=$abc$109383$new_n14741_ i1=$abc$109383$new_n20700_ nq=$abc$109383$new_n25832_
-.subckt o2_x2 i0=$abc$109383$new_n14750_ i1=$abc$109383$new_n20700_ q=$abc$109383$new_n25833_
+.subckt or2_x1 i0=$abc$109383$new_n14750_ i1=$abc$109383$new_n20700_ q=$abc$109383$new_n25833_
 .subckt nand3_x0 i0=$abc$109383$new_n25833_ i1=$abc$109383$new_n25832_ i2=$abc$109383$new_n20750_ nq=$abc$109383$new_n25834_
-.subckt a2_x2 i0=$abc$109383$new_n25834_ i1=$abc$109383$new_n25831_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96694
+.subckt and2_x1 i0=$abc$109383$new_n25834_ i1=$abc$109383$new_n25831_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96694
 .subckt nand3_x0 i0=$abc$109383$new_n21584_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n22286_ nq=$abc$109383$new_n25836_
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[23][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96696
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[23][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96698
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[23][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96700
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[23][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96696
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[23][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96698
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[23][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96700
 .subckt buf_x4 i=$abc$109383$new_n21092_ q=$abc$109383$new_n25840_
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[23][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96702
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[23][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96704
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[23][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96706
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[23][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96708
-.subckt mx2_x2 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[23][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96710
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[23][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96702
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[23][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96704
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[23][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96706
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[23][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96708
+.subckt mux2_x1 cmd=$abc$109383$new_n25836_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[23][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96710
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n22286_ nq=$abc$109383$new_n25846_
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[15][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96712
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[15][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96714
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[15][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96716
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[15][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96718
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[15][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96720
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[15][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96722
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[15][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96724
-.subckt mx2_x2 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[15][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96726
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[15][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96712
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[15][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96714
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[15][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96716
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[15][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96718
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[15][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96720
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[15][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96722
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[15][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96724
+.subckt mux2_x1 cmd=$abc$109383$new_n25846_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[15][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96726
 .subckt nor3_x0 i0=soc.rom.spimemio.dout_tag[0] i1=soc.rom.spimemio.softreset i2=soc.rst_sync1 nq=$abc$109383$new_n25855_
-.subckt a3_x2 i0=$abc$109383$new_n25855_ i1=$abc$109383$new_n20686_ i2=soc.rom.spimemio.dout_tag[1] q=$abc$109383$new_n25856_
-.subckt a2_x2 i0=$abc$109383$new_n25856_ i1=$abc$109383$new_n15033_ q=$abc$109383$new_n25857_
+.subckt and3_x1 i0=$abc$109383$new_n25855_ i1=$abc$109383$new_n20686_ i2=soc.rom.spimemio.dout_tag[1] q=$abc$109383$new_n25856_
+.subckt and2_x1 i0=$abc$109383$new_n25856_ i1=$abc$109383$new_n15033_ q=$abc$109383$new_n25857_
 .subckt buf_x4 i=$abc$109383$new_n25857_ q=$abc$109383$new_n25858_
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[8] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96728
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[9] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96730
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[10] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96732
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[11] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96734
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[12] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96736
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[13] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96738
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[14] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96740
-.subckt mx2_x2 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[15] i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96742
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[8] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96728
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[9] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96730
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[10] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96732
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[11] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96734
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[12] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96736
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[13] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96738
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[14] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96740
+.subckt mux2_x1 cmd=$abc$109383$new_n25858_ i0=soc.rom.spimemio.buffer[15] i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96742
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n25867_
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n25868_
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[30][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96744
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[30][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96746
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[30][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96748
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[30][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96750
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[30][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96752
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[30][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96754
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[30][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96756
-.subckt mx2_x2 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[30][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96758
-.subckt a4_x2 i0=$abc$109383$new_n20688_ i1=$abc$109383$new_n15033_ i2=$abc$109383$new_n20686_ i3=$abc$109383$new_n20701_ q=$abc$109383$new_n25877_
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[30][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96744
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[30][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96746
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[30][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96748
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[30][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96750
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[30][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96752
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[30][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96754
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[30][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96756
+.subckt mux2_x1 cmd=$abc$109383$new_n25868_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[30][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96758
+.subckt and4_x1 i0=$abc$109383$new_n20688_ i1=$abc$109383$new_n15033_ i2=$abc$109383$new_n20686_ i3=$abc$109383$new_n20701_ q=$abc$109383$new_n25877_
 .subckt buf_x4 i=$abc$109383$new_n25877_ q=$abc$109383$new_n25878_
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[0] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96760
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[1] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96762
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[2] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96764
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[3] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96766
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[4] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96768
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[5] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96770
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[6] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96772
-.subckt mx2_x2 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[7] i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96774
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[0] i1=soc.rom.spimemio.dout_data[0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96760
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[1] i1=soc.rom.spimemio.dout_data[1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96762
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[2] i1=soc.rom.spimemio.dout_data[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96764
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[3] i1=soc.rom.spimemio.dout_data[3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96766
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[4] i1=soc.rom.spimemio.dout_data[4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96768
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[5] i1=soc.rom.spimemio.dout_data[5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96770
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[6] i1=soc.rom.spimemio.dout_data[6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96772
+.subckt mux2_x1 cmd=$abc$109383$new_n25878_ i0=soc.rom.spimemio.buffer[7] i1=soc.rom.spimemio.dout_data[7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96774
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n25326_ nq=$abc$109383$new_n25887_
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[59][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96776
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[59][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96778
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[59][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96780
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[59][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96782
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[59][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96784
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[59][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96786
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[59][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96788
-.subckt mx2_x2 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[59][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96790
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[59][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96776
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[59][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96778
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[59][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96780
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[59][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96782
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[59][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96784
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[59][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96786
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[59][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96788
+.subckt mux2_x1 cmd=$abc$109383$new_n25887_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[59][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96790
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n25896_
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[21][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96792
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[21][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96794
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[21][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96796
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[21][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96798
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[21][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96800
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[21][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96802
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[21][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96804
-.subckt mx2_x2 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[21][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96806
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[21][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96792
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[21][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96794
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[21][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96796
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[21][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96798
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[21][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96800
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[21][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96802
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[21][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96804
+.subckt mux2_x1 cmd=$abc$109383$new_n25896_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[21][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96806
 .subckt nand3_x0 i0=$abc$109383$new_n22061_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n22286_ nq=$abc$109383$new_n25905_
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[23][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96808
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[23][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96810
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[23][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96812
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[23][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96814
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[23][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96816
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[23][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96818
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[23][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96820
-.subckt mx2_x2 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[23][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96822
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[23][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96808
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[23][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96810
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[23][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96812
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[23][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96814
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[23][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96816
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[23][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96818
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[23][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96820
+.subckt mux2_x1 cmd=$abc$109383$new_n25905_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[23][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96822
 .subckt nand3_x0 i0=$abc$109383$new_n22080_ i1=$abc$109383$new_n19806_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n25914_
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[16][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96824
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[16][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96826
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[16][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96828
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[16][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96830
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[16][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96832
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[16][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96834
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[16][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96836
-.subckt mx2_x2 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[16][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96838
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[16][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96824
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[16][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96826
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[16][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96828
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[16][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96830
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[16][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96832
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[16][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96834
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[16][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96836
+.subckt mux2_x1 cmd=$abc$109383$new_n25914_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[16][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96838
 .subckt nand4_x0 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n19832_ i2=$abc$109383$new_n22473_ i3=$abc$109383$new_n22472_ nq=$abc$109383$new_n25923_
-.subckt a2_x2 i0=$abc$109383$new_n25923_ i1=soc.cpu.minerva.gprf.mem._mem[9][0] q=$abc$109383$new_n25924_
-.subckt a4_x2 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n25925_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n25925_ q=$abc$109383$new_n25926_
-.subckt o2_x2 i0=$abc$109383$new_n25926_ i1=$abc$109383$new_n25924_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96840
+.subckt and2_x1 i0=$abc$109383$new_n25923_ i1=soc.cpu.minerva.gprf.mem._mem[9][0] q=$abc$109383$new_n25924_
+.subckt and4_x1 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n19839_ i2=$abc$109383$new_n19837_ i3=$abc$109383$new_n19835_ q=$abc$109383$new_n25925_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n25925_ nq=$abc$109383$new_n25926_
+.subckt or2_x1 i0=$abc$109383$new_n25926_ i1=$abc$109383$new_n25924_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96840
 .subckt buf_x4 i=$abc$109383$new_n25923_ q=$abc$109383$new_n25928_
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[9][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96842
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[9][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96844
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[9][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96846
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[9][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96848
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[9][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96850
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[9][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96852
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[9][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96854
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[9][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96856
-.subckt mx2_x2 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[9][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96858
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[9][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96842
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[9][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96844
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[9][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96846
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[9][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96848
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[9][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96850
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[9][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96852
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[9][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96854
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[9][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96856
+.subckt mux2_x1 cmd=$abc$109383$new_n25928_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[9][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96858
 .subckt buf_x4 i=$abc$109383$new_n25923_ q=$abc$109383$new_n25938_
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[9][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96860
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[9][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96862
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[9][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96864
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[9][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96866
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[9][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96868
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[9][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96870
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[9][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96872
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[9][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96874
-.subckt mx2_x2 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[9][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96876
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[9][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96860
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[9][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96862
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[9][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96864
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[9][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96866
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[9][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96868
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[9][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96870
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[9][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96872
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[9][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96874
+.subckt mux2_x1 cmd=$abc$109383$new_n25938_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[9][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96876
 .subckt buf_x4 i=$abc$109383$new_n25923_ q=$abc$109383$new_n25948_
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[9][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96878
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[9][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96880
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[9][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96882
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[9][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96884
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[9][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96886
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[9][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96888
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[9][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96890
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[9][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96892
-.subckt mx2_x2 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[9][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96894
-.subckt mx2_x2 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[9][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96896
-.subckt mx2_x2 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[9][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96898
-.subckt mx2_x2 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[9][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96900
-.subckt mx2_x2 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[9][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96902
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[9][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96878
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[9][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96880
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[9][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96882
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[9][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96884
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[9][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96886
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[9][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96888
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[9][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96890
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[9][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96892
+.subckt mux2_x1 cmd=$abc$109383$new_n25948_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[9][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96894
+.subckt mux2_x1 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[9][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96896
+.subckt mux2_x1 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[9][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96898
+.subckt mux2_x1 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[9][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96900
+.subckt mux2_x1 cmd=$abc$109383$new_n25923_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[9][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96902
 .subckt nand3_x0 i0=$abc$109383$new_n23716_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n22200_ nq=$abc$109383$new_n25962_
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[2][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96904
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[2][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96906
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[2][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96908
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[2][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96910
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[2][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96912
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[2][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96914
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[2][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96916
-.subckt mx2_x2 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[2][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96918
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[2][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96904
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[2][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96906
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[2][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96908
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[2][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96910
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[2][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96912
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[2][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96914
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[2][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96916
+.subckt mux2_x1 cmd=$abc$109383$new_n25962_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[2][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96918
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n21611_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n25971_
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[26][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96920
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[26][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96922
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[26][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96924
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[26][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96926
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[26][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96928
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[26][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96930
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[26][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96932
-.subckt mx2_x2 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[26][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96934
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[26][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96920
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[26][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96922
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[26][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96924
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[26][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96926
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[26][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96928
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[26][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96930
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[26][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96932
+.subckt mux2_x1 cmd=$abc$109383$new_n25971_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[26][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96934
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n23301_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n25980_
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[69][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96936
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[69][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96938
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[69][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96940
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[69][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96942
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[69][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96944
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[69][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96946
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[69][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96948
-.subckt mx2_x2 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[69][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96950
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[69][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96936
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[69][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96938
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[69][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96940
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[69][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96942
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[69][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96944
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[69][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96946
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[69][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96948
+.subckt mux2_x1 cmd=$abc$109383$new_n25980_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[69][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96950
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n25989_
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[14][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96952
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[14][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96954
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[14][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96956
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[14][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96958
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[14][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96960
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[14][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96962
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[14][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96964
-.subckt mx2_x2 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[14][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96966
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[14][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96952
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[14][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96954
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[14][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96956
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[14][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96958
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[14][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96960
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[14][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96962
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[14][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96964
+.subckt mux2_x1 cmd=$abc$109383$new_n25989_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[14][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96966
 .subckt nand3_x0 i0=$abc$109383$new_n22644_ i1=$abc$109383$new_n23888_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n25998_
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[20][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96968
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[20][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96970
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[20][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96972
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[20][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96974
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[20][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96976
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[20][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96978
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[20][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96980
-.subckt mx2_x2 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[20][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96982
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[20][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96968
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[20][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96970
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[20][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96972
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[20][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96974
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25381_ i1=soc.ram.ram[20][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96976
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25383_ i1=soc.ram.ram[20][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96978
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25385_ i1=soc.ram.ram[20][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96980
+.subckt mux2_x1 cmd=$abc$109383$new_n25998_ i0=$abc$109383$new_n25387_ i1=soc.ram.ram[20][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96982
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n22200_ nq=$abc$109383$new_n26007_
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[26][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96984
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[26][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96986
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[26][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96988
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[26][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96990
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[26][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96992
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[26][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96994
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[26][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96996
-.subckt mx2_x2 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[26][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96998
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[26][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96984
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[26][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96986
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[26][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96988
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[26][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96990
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[26][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96992
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[26][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96994
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[26][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96996
+.subckt mux2_x1 cmd=$abc$109383$new_n26007_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[26][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96998
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n23876_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n26016_
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[21][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97000
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[21][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97002
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[21][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97004
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[21][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97006
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[21][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97008
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[21][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97010
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[21][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97012
-.subckt mx2_x2 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[21][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97014
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[21][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97000
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[21][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97002
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[21][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97004
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[21][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97006
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[21][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97008
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[21][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97010
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[21][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97012
+.subckt mux2_x1 cmd=$abc$109383$new_n26016_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[21][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97014
 .subckt nand3_x0 i0=$abc$109383$new_n22061_ i1=$abc$109383$new_n19806_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n26025_
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[16][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97016
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[16][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97018
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[16][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97020
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[16][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97022
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25420_ i1=soc.ram.ram[16][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97016
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25423_ i1=soc.ram.ram[16][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97018
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25425_ i1=soc.ram.ram[16][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97020
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n25427_ i1=soc.ram.ram[16][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97022
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n26030_
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[16][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97024
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[16][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97024
 .subckt buf_x4 i=$abc$109383$new_n21168_ q=$abc$109383$new_n26032_
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[16][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97026
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[16][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97026
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n26034_
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[16][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97028
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[16][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97028
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n26036_
-.subckt mx2_x2 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[16][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97030
+.subckt mux2_x1 cmd=$abc$109383$new_n26025_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[16][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97030
 .subckt nand3_x0 i0=$abc$109383$new_n23997_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26038_
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[20][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97032
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[20][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97034
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[20][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97036
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[20][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97038
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[20][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97040
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[20][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97042
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[20][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97044
-.subckt mx2_x2 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[20][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97046
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[20][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97032
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[20][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97034
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25676_ i1=soc.ram.ram[20][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97036
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25678_ i1=soc.ram.ram[20][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97038
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25680_ i1=soc.ram.ram[20][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97040
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[20][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97042
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25683_ i1=soc.ram.ram[20][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97044
+.subckt mux2_x1 cmd=$abc$109383$new_n26038_ i0=$abc$109383$new_n25685_ i1=soc.ram.ram[20][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97046
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n22393_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26047_
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[37][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97048
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[37][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97050
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n25705_ i1=soc.ram.ram[37][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97048
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n25708_ i1=soc.ram.ram[37][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97050
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n26050_
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[37][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97052
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[37][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97052
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n26052_
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[37][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97054
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[37][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97054
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n26054_
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[37][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97056
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[37][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97058
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[37][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97056
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n25713_ i1=soc.ram.ram[37][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97058
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n26057_
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[37][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97060
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[37][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97060
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n26059_
-.subckt mx2_x2 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[37][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97062
+.subckt mux2_x1 cmd=$abc$109383$new_n26047_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[37][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97062
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n26061_
 .subckt nand3_x0 i0=$abc$109383$new_n22041_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26062_
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[22][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97064
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[22][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97064
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n26064_
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[22][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97066
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[22][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97068
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[22][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97070
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[22][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97072
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[22][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97066
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[22][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97068
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[22][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97070
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[22][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97072
 .subckt buf_x4 i=$abc$109383$new_n21329_ q=$abc$109383$new_n26069_
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[22][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97074
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[22][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97076
-.subckt mx2_x2 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[22][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97078
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[22][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97074
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[22][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97076
+.subckt mux2_x1 cmd=$abc$109383$new_n26062_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[22][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97078
 .subckt nand3_x0 i0=$abc$109383$new_n20551_ i1=$abc$109383$new_n25169_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26073_
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[19][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97080
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[19][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97082
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[19][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97084
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[19][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97086
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[19][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97088
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[19][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97090
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[19][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97092
-.subckt mx2_x2 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[19][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97094
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[19][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97080
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[19][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97082
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[19][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97084
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[19][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97086
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[19][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97088
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[19][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97090
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[19][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97092
+.subckt mux2_x1 cmd=$abc$109383$new_n26073_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[19][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97094
 .subckt buf_x4 i=$abc$109383$new_n20233_ q=$abc$109383$new_n26082_
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n26083_
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[79][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97096
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[79][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97098
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[79][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97100
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[79][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97102
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[79][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97104
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[79][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97106
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[79][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97108
-.subckt mx2_x2 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[79][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97110
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[79][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97096
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[79][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97098
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[79][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97100
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[79][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97102
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[79][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97104
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[79][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97106
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[79][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97108
+.subckt mux2_x1 cmd=$abc$109383$new_n26083_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[79][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97110
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n20802_ nq=$abc$109383$new_n26092_
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[14][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97112
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[14][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97114
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[14][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97116
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[14][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97118
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[14][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97120
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[14][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97122
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[14][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97124
-.subckt mx2_x2 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[14][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97126
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[14][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97112
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[14][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97114
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[14][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97116
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[14][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97118
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[14][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97120
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[14][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97122
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[14][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97124
+.subckt mux2_x1 cmd=$abc$109383$new_n26092_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[14][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97126
 .subckt nand3_x0 i0=$abc$109383$new_n23997_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n19803_ nq=$abc$109383$new_n26101_
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[20][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97128
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[20][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97130
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[20][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97132
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[20][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97134
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[20][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97136
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[20][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97138
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[20][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97140
-.subckt mx2_x2 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[20][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97142
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25554_ i1=soc.ram.ram[20][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97128
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25557_ i1=soc.ram.ram[20][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97130
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25559_ i1=soc.ram.ram[20][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97132
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25561_ i1=soc.ram.ram[20][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97134
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25563_ i1=soc.ram.ram[20][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97136
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25565_ i1=soc.ram.ram[20][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97138
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25567_ i1=soc.ram.ram[20][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97140
+.subckt mux2_x1 cmd=$abc$109383$new_n26101_ i0=$abc$109383$new_n25569_ i1=soc.ram.ram[20][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97142
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n26110_
 .subckt nand2_x0 i0=$abc$109383$new_n21177_ i1=$abc$109383$new_n19784_ nq=$abc$109383$new_n26111_
 .subckt buf_x4 i=$abc$109383$new_n26111_ q=$abc$109383$new_n26112_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[1][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97240
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[1][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97240
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n26114_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97242
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[1][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97242
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n26116_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97244
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[1][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97244
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n26118_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97246
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[1][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97246
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n26120_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97248
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[1][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97248
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n26122_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97250
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[1][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97250
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n26124_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97252
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[1][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97252
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n26126_
-.subckt mx2_x2 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97254
+.subckt mux2_x1 cmd=$abc$109383$new_n26112_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[1][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97254
 .subckt nand3_x0 i0=$abc$109383$new_n25600_ i1=$abc$109383$new_n22393_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26128_
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[29][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97256
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[29][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97258
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[29][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97260
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[29][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97262
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[29][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97264
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[29][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97266
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[29][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97268
-.subckt mx2_x2 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[29][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97270
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[29][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97256
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[29][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97258
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[29][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97260
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[29][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97262
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[29][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97264
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[29][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97266
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[29][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97268
+.subckt mux2_x1 cmd=$abc$109383$new_n26128_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[29][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97270
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n26137_
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[83][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97336
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[83][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97338
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[83][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97340
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[83][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97342
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[83][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97344
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[83][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97346
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[83][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97348
-.subckt mx2_x2 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[83][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97350
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[83][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97336
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[83][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97338
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[83][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97340
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[83][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97342
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[83][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97344
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[83][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97346
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[83][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97348
+.subckt mux2_x1 cmd=$abc$109383$new_n26137_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[83][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97350
 .subckt buf_x4 i=$abc$109383$new_n19739_ q=$abc$109383$new_n26146_
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n20852_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26147_
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[118][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97352
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[118][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97354
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[118][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97356
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[118][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97358
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[118][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97360
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[118][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97362
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[118][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97364
-.subckt mx2_x2 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[118][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97366
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[118][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97352
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[118][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97354
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[118][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97356
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[118][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97358
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[118][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97360
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[118][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97362
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[118][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97364
+.subckt mux2_x1 cmd=$abc$109383$new_n26147_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[118][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97366
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n23702_ i2=$abc$109383$new_n21412_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26156_
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[125][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97368
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[125][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97370
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[125][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97372
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[125][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97374
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[125][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97376
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[125][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97378
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[125][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97380
-.subckt mx2_x2 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[125][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97382
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[125][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97368
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[125][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97370
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[125][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97372
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[125][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97374
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[125][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97376
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[125][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97378
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[125][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97380
+.subckt mux2_x1 cmd=$abc$109383$new_n26156_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[125][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97382
 .subckt buf_x4 i=$abc$109383$new_n20228_ q=$abc$109383$new_n26165_
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n20937_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26166_
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[124][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97384
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[124][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97386
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[124][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97388
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[124][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97390
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[124][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97392
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[124][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97394
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[124][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97396
-.subckt mx2_x2 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[124][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97398
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[124][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97384
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[124][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97386
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[124][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97388
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[124][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97390
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[124][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97392
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[124][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97394
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[124][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97396
+.subckt mux2_x1 cmd=$abc$109383$new_n26166_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[124][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97398
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n20948_ i2=$abc$109383$new_n20352_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26175_
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[123][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97400
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[123][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97402
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[123][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97404
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[123][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97406
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[123][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97408
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[123][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97410
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[123][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97412
-.subckt mx2_x2 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[123][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97414
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[123][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97400
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[123][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97402
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[123][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97404
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[123][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97406
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[123][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97408
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[123][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97410
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[123][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97412
+.subckt mux2_x1 cmd=$abc$109383$new_n26175_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[123][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97414
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n26184_
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n24361_ nq=$abc$109383$new_n26185_
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[51][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97416
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[51][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97416
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n26187_
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[51][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97418
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[51][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97418
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n26189_
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[51][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97420
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[51][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97420
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n26191_
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[51][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97422
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[51][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97424
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[51][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97426
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[51][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97428
-.subckt mx2_x2 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[51][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97430
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[51][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97422
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[51][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97424
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[51][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97426
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[51][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97428
+.subckt mux2_x1 cmd=$abc$109383$new_n26185_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[51][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97430
 .subckt buf_x4 i=$abc$109383$new_n20852_ q=$abc$109383$new_n26197_
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26198_
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[50][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97432
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[50][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97434
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[50][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97436
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[50][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97438
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[50][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97440
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[50][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97442
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[50][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97444
-.subckt mx2_x2 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[50][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97446
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[50][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97432
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[50][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97434
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[50][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97436
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[50][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97438
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[50][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97440
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[50][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97442
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[50][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97444
+.subckt mux2_x1 cmd=$abc$109383$new_n26198_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[50][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97446
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26207_
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[122][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97448
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[122][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97450
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[122][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97452
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[122][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97454
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[122][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97456
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[122][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97458
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[122][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97460
-.subckt mx2_x2 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[122][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97462
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[122][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97448
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[122][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97450
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[122][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97452
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[122][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97454
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[122][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97456
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[122][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97458
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[122][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97460
+.subckt mux2_x1 cmd=$abc$109383$new_n26207_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[122][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97462
 .subckt nand4_x0 i0=$abc$109383$new_n20967_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26216_
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[51][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97464
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[51][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97466
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[51][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97468
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[51][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97470
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[51][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97472
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[51][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97474
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[51][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97476
-.subckt mx2_x2 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[51][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97478
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[51][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97464
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[51][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97466
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[51][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97468
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[51][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97470
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[51][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97472
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[51][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97474
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[51][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97476
+.subckt mux2_x1 cmd=$abc$109383$new_n26216_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[51][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97478
 .subckt nand4_x0 i0=$abc$109383$new_n25058_ i1=$abc$109383$new_n21129_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26225_
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[126][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97480
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[126][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97482
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[126][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97484
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[126][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97486
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[126][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97488
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[126][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97490
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[126][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97492
-.subckt mx2_x2 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[126][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97494
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[126][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97480
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[126][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97482
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[126][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97484
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[126][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97486
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[126][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97488
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[126][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97490
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[126][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97492
+.subckt mux2_x1 cmd=$abc$109383$new_n26225_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[126][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97494
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26234_
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[52][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97496
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[52][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97498
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[52][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97500
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[52][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97502
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[52][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97504
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[52][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97506
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[52][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97508
-.subckt mx2_x2 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[52][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97510
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[52][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97496
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[52][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97498
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[52][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97500
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[52][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97502
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[52][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97504
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[52][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97506
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[52][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97508
+.subckt mux2_x1 cmd=$abc$109383$new_n26234_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[52][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97510
 .subckt nand4_x0 i0=$abc$109383$new_n21238_ i1=$abc$109383$new_n23173_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26243_
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[120][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97512
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[120][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97514
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[120][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97516
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[120][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97518
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[120][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97520
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[120][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97522
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[120][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97524
-.subckt mx2_x2 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[120][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97526
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[120][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97512
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[120][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97514
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[120][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97516
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[120][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97518
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[120][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97520
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[120][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97522
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[120][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97524
+.subckt mux2_x1 cmd=$abc$109383$new_n26243_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[120][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97526
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26252_
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[11][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97528
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[11][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97530
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[11][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97532
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[11][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97534
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[11][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97536
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[11][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97538
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[11][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97540
-.subckt mx2_x2 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[11][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97542
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[11][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97528
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[11][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97530
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[11][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97532
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[11][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97534
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[11][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97536
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[11][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97538
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[11][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97540
+.subckt mux2_x1 cmd=$abc$109383$new_n26252_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[11][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97542
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26261_
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[52][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97544
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[52][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97546
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[52][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97548
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[52][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97550
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[52][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97552
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[52][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97554
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[52][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97556
-.subckt mx2_x2 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[52][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97558
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[52][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97544
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[52][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97546
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[52][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97548
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[52][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97550
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[52][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97552
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[52][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97554
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[52][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97556
+.subckt mux2_x1 cmd=$abc$109383$new_n26261_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[52][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97558
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n24820_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26270_
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[52][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97560
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[52][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97562
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[52][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97564
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[52][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97566
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[52][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97568
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[52][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97570
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[52][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97572
-.subckt mx2_x2 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[52][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97574
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[52][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97560
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[52][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97562
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[52][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97564
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[52][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97566
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[52][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97568
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[52][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97570
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[52][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97572
+.subckt mux2_x1 cmd=$abc$109383$new_n26270_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[52][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97574
 .subckt nand4_x0 i0=$abc$109383$new_n20550_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26279_
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[51][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97576
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[51][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97578
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[51][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97580
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[51][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97582
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[51][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97584
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[51][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97586
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[51][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97588
-.subckt mx2_x2 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[51][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97590
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[51][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97576
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[51][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97578
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[51][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97580
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[51][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97582
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[51][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97584
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[51][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97586
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[51][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97588
+.subckt mux2_x1 cmd=$abc$109383$new_n26279_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[51][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97590
 .subckt nand4_x0 i0=$abc$109383$new_n20826_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26288_
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[50][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97592
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[50][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97594
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[50][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97596
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[50][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97598
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[50][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97600
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[50][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97602
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[50][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97604
-.subckt mx2_x2 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[50][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97606
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[50][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97592
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[50][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97594
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[50][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97596
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[50][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97598
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[50][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97600
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[50][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97602
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[50][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97604
+.subckt mux2_x1 cmd=$abc$109383$new_n26288_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[50][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97606
 .subckt buf_x4 i=$abc$109383$new_n20266_ q=$abc$109383$new_n26297_
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26298_
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[50][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97608
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[50][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97610
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[50][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97612
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[50][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97614
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[50][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97616
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[50][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97618
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[50][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97620
-.subckt mx2_x2 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[50][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97622
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[50][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97608
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[50][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97610
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[50][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97612
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[50][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97614
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[50][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97616
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[50][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97618
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[50][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97620
+.subckt mux2_x1 cmd=$abc$109383$new_n26298_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[50][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97622
 .subckt nand4_x0 i0=$abc$109383$new_n21238_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26307_
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[121][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97624
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[121][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97626
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[121][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97628
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[121][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97630
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[121][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97632
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[121][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97634
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[121][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97636
-.subckt mx2_x2 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[121][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97638
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[121][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97624
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[121][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97626
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[121][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97628
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[121][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97630
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[121][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97632
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[121][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97634
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[121][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97636
+.subckt mux2_x1 cmd=$abc$109383$new_n26307_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[121][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97638
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n21239_ i2=$abc$109383$new_n20937_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26316_
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[92][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97640
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[92][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97642
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[92][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97644
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[92][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97646
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[92][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97648
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[92][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97650
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[92][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97652
-.subckt mx2_x2 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[92][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97654
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[92][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97640
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[92][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97642
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[92][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97644
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[92][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97646
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[92][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97648
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[92][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97650
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[92][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97652
+.subckt mux2_x1 cmd=$abc$109383$new_n26316_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[92][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97654
 .subckt nand3_x0 i0=$abc$109383$new_n25508_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n21786_ nq=$abc$109383$new_n26325_
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[9][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97656
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[9][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97658
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[9][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97660
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[9][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97662
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[9][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97664
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[9][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97666
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[9][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97668
-.subckt mx2_x2 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[9][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97670
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26110_ i1=soc.ram.ram[9][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97656
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26114_ i1=soc.ram.ram[9][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97658
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26116_ i1=soc.ram.ram[9][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97660
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26118_ i1=soc.ram.ram[9][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97662
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26120_ i1=soc.ram.ram[9][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97664
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26122_ i1=soc.ram.ram[9][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97666
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26124_ i1=soc.ram.ram[9][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97668
+.subckt mux2_x1 cmd=$abc$109383$new_n26325_ i0=$abc$109383$new_n26126_ i1=soc.ram.ram[9][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97670
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n21479_ nq=$abc$109383$new_n26334_
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[36][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97672
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[36][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97674
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[36][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97676
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[36][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97678
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[36][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97680
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[36][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97682
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[36][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97684
-.subckt mx2_x2 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[36][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97686
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25735_ i1=soc.ram.ram[36][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97672
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25738_ i1=soc.ram.ram[36][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97674
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25740_ i1=soc.ram.ram[36][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97676
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[36][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97678
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25743_ i1=soc.ram.ram[36][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97680
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25745_ i1=soc.ram.ram[36][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97682
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25747_ i1=soc.ram.ram[36][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97684
+.subckt mux2_x1 cmd=$abc$109383$new_n26334_ i0=$abc$109383$new_n25749_ i1=soc.ram.ram[36][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97686
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n26343_
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n20815_ nq=$abc$109383$new_n26344_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[72][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97688
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[72][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97688
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n26346_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[72][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97690
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[72][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97690
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n26348_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[72][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97692
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[72][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97692
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n26350_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[72][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97694
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[72][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97694
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n26352_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[72][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97696
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[72][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97696
 .subckt buf_x4 i=$abc$109383$new_n21220_ q=$abc$109383$new_n26354_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[72][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97698
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[72][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97698
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n26356_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[72][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97700
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[72][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97700
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n26358_
-.subckt mx2_x2 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[72][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97702
+.subckt mux2_x1 cmd=$abc$109383$new_n26344_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[72][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97702
 .subckt nand3_x0 i0=$abc$109383$new_n24083_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n26360_
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[36][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97704
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[36][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97706
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[36][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97708
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[36][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97710
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[36][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97712
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[36][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97714
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[36][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97716
-.subckt mx2_x2 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[36][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97718
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[36][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97704
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[36][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97706
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[36][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97708
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[36][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97710
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[36][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97712
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[36][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97714
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[36][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97716
+.subckt mux2_x1 cmd=$abc$109383$new_n26360_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[36][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97718
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n22286_ nq=$abc$109383$new_n26369_
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[71][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97720
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[71][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97722
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[71][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97724
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[71][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97726
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[71][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97728
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[71][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97730
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[71][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97732
-.subckt mx2_x2 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[71][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97734
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[71][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97720
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[71][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97722
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[71][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97724
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[71][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97726
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[71][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97728
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[71][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97730
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[71][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97732
+.subckt mux2_x1 cmd=$abc$109383$new_n26369_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[71][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97734
 .subckt buf_x4 i=$abc$109383$new_n22835_ q=$abc$109383$new_n26378_
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n26379_
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[36][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97736
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[36][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97738
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[36][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97740
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[36][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97742
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[36][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97744
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[36][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97746
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[36][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97748
-.subckt mx2_x2 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[36][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97750
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[36][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97736
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[36][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97738
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[36][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97740
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[36][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97742
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[36][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97744
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[36][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97746
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[36][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97748
+.subckt mux2_x1 cmd=$abc$109383$new_n26379_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[36][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97750
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n26388_
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[70][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97752
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[70][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97754
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[70][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97756
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[70][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97758
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[70][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97760
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[70][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97762
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[70][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97764
-.subckt mx2_x2 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[70][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97766
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[70][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97752
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[70][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97754
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[70][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97756
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[70][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97758
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[70][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97760
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[70][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97762
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[70][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97764
+.subckt mux2_x1 cmd=$abc$109383$new_n26388_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[70][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97766
 .subckt buf_x4 i=$abc$109383$new_n21491_ q=$abc$109383$new_n26397_
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n20548_ nq=$abc$109383$new_n26398_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[35][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97768
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[35][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97768
 .subckt buf_x4 i=$abc$109383$new_n21495_ q=$abc$109383$new_n26400_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[35][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97770
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[35][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97770
 .subckt buf_x4 i=$abc$109383$new_n21498_ q=$abc$109383$new_n26402_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[35][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97772
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[35][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97774
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[35][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97772
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n25840_ i1=soc.ram.ram[35][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97774
 .subckt buf_x4 i=$abc$109383$new_n21502_ q=$abc$109383$new_n26405_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[35][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97776
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[35][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97776
 .subckt buf_x4 i=$abc$109383$new_n21505_ q=$abc$109383$new_n26407_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[35][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97778
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[35][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97778
 .subckt buf_x4 i=$abc$109383$new_n21508_ q=$abc$109383$new_n26409_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[35][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97780
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[35][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97780
 .subckt buf_x4 i=$abc$109383$new_n21511_ q=$abc$109383$new_n26411_
-.subckt mx2_x2 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[35][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97782
+.subckt mux2_x1 cmd=$abc$109383$new_n26398_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[35][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97782
 .subckt nand2_x0 i0=$abc$109383$new_n23263_ i1=$abc$109383$new_n19741_ nq=$abc$109383$new_n26413_
 .subckt buf_x4 i=$abc$109383$new_n26413_ q=$abc$109383$new_n26414_
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[6][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97784
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[6][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97786
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[6][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97788
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[6][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97790
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[6][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97792
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[6][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97794
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[6][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97796
-.subckt mx2_x2 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[6][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97798
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[6][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97784
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[6][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97786
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26050_ i1=soc.ram.ram[6][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97788
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26052_ i1=soc.ram.ram[6][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97790
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26054_ i1=soc.ram.ram[6][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97792
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[6][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97794
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26057_ i1=soc.ram.ram[6][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97796
+.subckt mux2_x1 cmd=$abc$109383$new_n26414_ i0=$abc$109383$new_n26059_ i1=soc.ram.ram[6][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97798
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n26423_
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[35][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97800
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[35][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97802
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[35][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97804
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[35][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97806
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[35][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97808
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[35][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97810
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[35][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97812
-.subckt mx2_x2 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[35][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97814
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[35][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97800
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[35][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97802
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[35][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97804
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[35][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97806
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[35][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97808
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[35][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97810
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[35][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97812
+.subckt mux2_x1 cmd=$abc$109383$new_n26423_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[35][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97814
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n22644_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n26432_
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[68][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97816
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[68][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97818
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[68][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97820
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[68][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97822
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[68][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97824
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[68][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97826
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[68][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97828
-.subckt mx2_x2 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[68][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97830
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[68][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97816
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[68][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97818
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[68][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97820
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[68][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97822
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[68][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97824
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[68][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97826
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[68][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97828
+.subckt mux2_x1 cmd=$abc$109383$new_n26432_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[68][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97830
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n24447_ nq=$abc$109383$new_n26441_
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[35][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97832
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[35][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97834
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[35][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97836
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[35][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97838
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[35][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97840
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[35][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97842
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[35][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97844
-.subckt mx2_x2 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[35][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97846
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[35][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97832
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[35][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97834
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[35][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97836
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[35][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97838
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[35][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97840
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[35][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97842
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[35][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97844
+.subckt mux2_x1 cmd=$abc$109383$new_n26441_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[35][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97846
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n26450_
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[67][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97848
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[67][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97850
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[67][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97852
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[67][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97854
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[67][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97856
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[67][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97858
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[67][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97860
-.subckt mx2_x2 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[67][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97862
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[67][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97848
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[67][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97850
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[67][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97852
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[67][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97854
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[67][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97856
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[67][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97858
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[67][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97860
+.subckt mux2_x1 cmd=$abc$109383$new_n26450_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[67][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97862
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n22200_ nq=$abc$109383$new_n26459_
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[34][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97864
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[34][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97866
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[34][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97868
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[34][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97864
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[34][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97866
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[34][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97868
 .subckt buf_x4 i=$abc$109383$new_n20563_ q=$abc$109383$new_n26463_
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[34][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97870
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[34][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97872
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[34][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97874
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[34][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97876
-.subckt mx2_x2 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[34][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97878
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[34][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97870
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[34][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97872
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[34][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97874
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[34][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97876
+.subckt mux2_x1 cmd=$abc$109383$new_n26459_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[34][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97878
 .subckt nand3_x0 i0=$abc$109383$new_n23877_ i1=$abc$109383$new_n21611_ i2=$abc$109383$new_n25867_ nq=$abc$109383$new_n26469_
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[66][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97880
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[66][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97882
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26061_ i1=soc.ram.ram[66][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97880
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26064_ i1=soc.ram.ram[66][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97882
 .subckt buf_x4 i=$abc$109383$new_n21888_ q=$abc$109383$new_n26472_
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[66][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97884
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[66][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97884
 .subckt buf_x4 i=$abc$109383$new_n21891_ q=$abc$109383$new_n26474_
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[66][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97886
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[66][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97886
 .subckt buf_x4 i=$abc$109383$new_n21894_ q=$abc$109383$new_n26476_
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[66][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97888
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[66][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97890
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[66][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97888
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26069_ i1=soc.ram.ram[66][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97890
 .subckt buf_x4 i=$abc$109383$new_n21898_ q=$abc$109383$new_n26479_
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[66][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97892
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[66][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97892
 .subckt buf_x4 i=$abc$109383$new_n21901_ q=$abc$109383$new_n26481_
-.subckt mx2_x2 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[66][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97894
+.subckt mux2_x1 cmd=$abc$109383$new_n26469_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[66][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97894
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n21787_ i2=$abc$109383$new_n22200_ nq=$abc$109383$new_n26483_
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[34][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97896
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[34][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97898
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[34][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97900
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[34][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97902
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[34][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97904
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[34][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97906
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[34][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97908
-.subckt mx2_x2 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[34][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97910
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[34][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97896
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[34][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97898
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[34][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97900
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[34][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97902
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[34][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97904
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[34][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97906
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[34][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97908
+.subckt mux2_x1 cmd=$abc$109383$new_n26483_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[34][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97910
 .subckt buf_x4 i=$abc$109383$new_n21913_ q=$abc$109383$new_n26492_
 .subckt nand3_x0 i0=$abc$109383$new_n22824_ i1=$abc$109383$new_n21835_ i2=$abc$109383$new_n20227_ nq=$abc$109383$new_n26493_
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[65][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97912
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[65][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97912
 .subckt buf_x4 i=$abc$109383$new_n21917_ q=$abc$109383$new_n26495_
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[65][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97914
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[65][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97916
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[65][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97918
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[65][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97920
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[65][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97914
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[65][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97916
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[65][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97918
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[65][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97920
 .subckt buf_x4 i=$abc$109383$new_n19765_ q=$abc$109383$new_n26500_
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[65][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97922
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[65][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97924
-.subckt mx2_x2 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[65][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97926
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[65][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97922
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[65][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97924
+.subckt mux2_x1 cmd=$abc$109383$new_n26493_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[65][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97926
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n22200_ nq=$abc$109383$new_n26504_
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[34][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97928
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[34][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97930
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[34][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97932
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[34][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97934
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[34][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97936
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[34][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97938
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[34][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97940
-.subckt mx2_x2 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[34][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97942
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[34][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97928
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[34][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97930
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[34][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97932
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[34][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97934
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[34][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97936
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[34][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97938
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[34][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97940
+.subckt mux2_x1 cmd=$abc$109383$new_n26504_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[34][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97942
 .subckt nand3_x0 i0=$abc$109383$new_n22824_ i1=$abc$109383$new_n21787_ i2=$abc$109383$new_n23163_ nq=$abc$109383$new_n26513_
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[64][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97944
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[64][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97946
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[64][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97948
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[64][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97950
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[64][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97952
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[64][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97954
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[64][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97956
-.subckt mx2_x2 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[64][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97958
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[64][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97944
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[64][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97946
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[64][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97948
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[64][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97950
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[64][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97952
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[64][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97954
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[64][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97956
+.subckt mux2_x1 cmd=$abc$109383$new_n26513_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[64][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97958
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n24998_ i2=$abc$109383$new_n21786_ nq=$abc$109383$new_n26522_
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[33][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97960
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[33][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97962
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[33][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97964
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[33][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97966
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[33][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97968
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[33][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97970
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[33][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97972
-.subckt mx2_x2 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[33][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97974
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[33][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97960
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[33][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97962
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[33][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97964
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[33][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97966
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[33][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97968
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[33][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97970
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[33][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97972
+.subckt mux2_x1 cmd=$abc$109383$new_n26522_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[33][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97974
 .subckt nand4_x0 i0=$abc$109383$new_n21238_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n26531_
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[63][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97976
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[63][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97978
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[63][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97980
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[63][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97982
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[63][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97984
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[63][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97986
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[63][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97988
-.subckt mx2_x2 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[63][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97990
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[63][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97976
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[63][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97978
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[63][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97980
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[63][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97982
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[63][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97984
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[63][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97986
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[63][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97988
+.subckt mux2_x1 cmd=$abc$109383$new_n26531_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[63][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97990
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n21787_ i2=$abc$109383$new_n21786_ nq=$abc$109383$new_n26540_
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[33][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97992
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[33][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97994
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[33][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97996
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[33][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97998
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[33][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98000
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[33][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98002
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[33][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98004
-.subckt mx2_x2 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[33][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98006
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[33][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97992
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[33][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97994
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[33][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97996
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[33][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97998
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26030_ i1=soc.ram.ram[33][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98000
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26032_ i1=soc.ram.ram[33][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98002
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26034_ i1=soc.ram.ram[33][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98004
+.subckt mux2_x1 cmd=$abc$109383$new_n26540_ i0=$abc$109383$new_n26036_ i1=soc.ram.ram[33][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98006
 .subckt nand4_x0 i0=$abc$109383$new_n21238_ i1=$abc$109383$new_n20270_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n20262_ nq=$abc$109383$new_n26549_
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[62][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98008
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[62][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98010
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[62][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98012
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[62][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98014
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[62][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98016
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[62][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98018
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[62][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98020
-.subckt mx2_x2 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[62][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98022
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[62][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98008
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[62][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98010
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[62][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98012
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[62][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98014
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[62][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98016
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[62][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98018
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[62][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98020
+.subckt mux2_x1 cmd=$abc$109383$new_n26549_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[62][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98022
 .subckt nand3_x0 i0=$abc$109383$new_n26378_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n21786_ nq=$abc$109383$new_n26558_
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[33][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98024
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[33][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98026
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[33][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98028
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[33][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98030
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[33][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98032
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[33][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98034
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[33][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98036
-.subckt mx2_x2 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[33][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98038
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26343_ i1=soc.ram.ram[33][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98024
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26346_ i1=soc.ram.ram[33][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98026
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26348_ i1=soc.ram.ram[33][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98028
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26350_ i1=soc.ram.ram[33][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98030
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26352_ i1=soc.ram.ram[33][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98032
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26354_ i1=soc.ram.ram[33][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98034
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26356_ i1=soc.ram.ram[33][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98036
+.subckt mux2_x1 cmd=$abc$109383$new_n26558_ i0=$abc$109383$new_n26358_ i1=soc.ram.ram[33][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98038
 .subckt nand4_x0 i0=$abc$109383$new_n21238_ i1=$abc$109383$new_n20887_ i2=$abc$109383$new_n20908_ i3=$abc$109383$new_n20827_ nq=$abc$109383$new_n26567_
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[61][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98040
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[61][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98042
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[61][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98044
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[61][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98046
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[61][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98048
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[61][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98050
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[61][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98052
-.subckt mx2_x2 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[61][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98054
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[61][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98040
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[61][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98042
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[61][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98044
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[61][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98046
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[61][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98048
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[61][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98050
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[61][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98052
+.subckt mux2_x1 cmd=$abc$109383$new_n26567_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[61][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98054
 .subckt nand3_x0 i0=$abc$109383$new_n22835_ i1=$abc$109383$new_n21815_ i2=$abc$109383$new_n21859_ nq=$abc$109383$new_n26576_
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[32][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98056
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[32][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98058
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[32][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98060
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[32][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98062
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[32][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98064
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[32][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98066
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[32][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98068
-.subckt mx2_x2 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[32][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98070
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[32][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98056
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[32][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98058
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[32][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98060
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[32][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98062
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[32][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98064
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[32][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98066
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[32][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98068
+.subckt mux2_x1 cmd=$abc$109383$new_n26576_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[32][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98070
 .subckt buf_x4 i=$abc$109383$new_n22409_ q=$abc$109383$new_n26585_
 .subckt nand4_x0 i0=$abc$109383$new_n21238_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n20262_ nq=$abc$109383$new_n26586_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[60][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98072
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[60][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98072
 .subckt buf_x4 i=$abc$109383$new_n22413_ q=$abc$109383$new_n26588_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[60][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98074
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[60][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98074
 .subckt buf_x4 i=$abc$109383$new_n22416_ q=$abc$109383$new_n26590_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[60][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98076
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[60][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98076
 .subckt buf_x4 i=$abc$109383$new_n22419_ q=$abc$109383$new_n26592_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[60][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98078
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[60][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98078
 .subckt buf_x4 i=$abc$109383$new_n22422_ q=$abc$109383$new_n26594_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[60][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98080
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[60][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98080
 .subckt buf_x4 i=$abc$109383$new_n20289_ q=$abc$109383$new_n26596_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[60][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98082
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[60][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98082
 .subckt buf_x4 i=$abc$109383$new_n22427_ q=$abc$109383$new_n26598_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[60][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98084
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[60][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98084
 .subckt buf_x4 i=$abc$109383$new_n22430_ q=$abc$109383$new_n26600_
-.subckt mx2_x2 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[60][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98086
+.subckt mux2_x1 cmd=$abc$109383$new_n26586_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[60][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98086
 .subckt nand3_x0 i0=$abc$109383$new_n22835_ i1=$abc$109383$new_n21787_ i2=$abc$109383$new_n21859_ nq=$abc$109383$new_n26602_
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[32][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98088
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[32][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98090
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[32][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98092
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[32][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98094
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26184_ i1=soc.ram.ram[32][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98088
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26187_ i1=soc.ram.ram[32][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98090
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26189_ i1=soc.ram.ram[32][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98092
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26191_ i1=soc.ram.ram[32][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98094
 .subckt buf_x4 i=$abc$109383$new_n21793_ q=$abc$109383$new_n26607_
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[32][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98096
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[32][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98096
 .subckt buf_x4 i=$abc$109383$new_n20383_ q=$abc$109383$new_n26609_
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[32][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98098
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[32][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98098
 .subckt buf_x4 i=$abc$109383$new_n21798_ q=$abc$109383$new_n26611_
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[32][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98100
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[32][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98100
 .subckt buf_x4 i=$abc$109383$new_n21801_ q=$abc$109383$new_n26613_
-.subckt mx2_x2 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[32][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98102
+.subckt mux2_x1 cmd=$abc$109383$new_n26602_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[32][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98102
 .subckt buf_x4 i=$abc$109383$new_n21857_ q=$abc$109383$new_n26615_
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n26616_
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[47][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98104
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[47][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98104
 .subckt buf_x4 i=$abc$109383$new_n21862_ q=$abc$109383$new_n26618_
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[47][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98106
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[47][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98106
 .subckt buf_x4 i=$abc$109383$new_n21865_ q=$abc$109383$new_n26620_
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[47][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98108
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[47][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98108
 .subckt buf_x4 i=$abc$109383$new_n21868_ q=$abc$109383$new_n26622_
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[47][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98110
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[47][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98112
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[47][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98114
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[47][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98116
-.subckt mx2_x2 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[47][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98118
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[47][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98110
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[47][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98112
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[47][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98114
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[47][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98116
+.subckt mux2_x1 cmd=$abc$109383$new_n26616_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[47][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98118
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n20887_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26628_
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[77][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98120
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[77][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98122
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[77][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98124
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[77][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98126
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[77][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98128
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[77][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98130
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[77][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98132
-.subckt mx2_x2 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[77][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98134
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[77][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98120
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[77][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98122
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[77][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98124
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[77][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98126
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[77][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98128
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[77][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98130
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[77][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98132
+.subckt mux2_x1 cmd=$abc$109383$new_n26628_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[77][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98134
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n20887_ i2=$abc$109383$new_n20358_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n26637_
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[77][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98136
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[77][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98138
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[77][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98140
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[77][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98142
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[77][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98144
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[77][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98146
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[77][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98148
-.subckt mx2_x2 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[77][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98150
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[77][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98136
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[77][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98138
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[77][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98140
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[77][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98142
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[77][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98144
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[77][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98146
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[77][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98148
+.subckt mux2_x1 cmd=$abc$109383$new_n26637_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[77][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98150
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n20887_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n26646_
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[77][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98152
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[77][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98154
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[77][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98156
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[77][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98158
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[77][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98160
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[77][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98162
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[77][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98164
-.subckt mx2_x2 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[77][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98166
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[77][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98152
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[77][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98154
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[77][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98156
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[77][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98158
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[77][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98160
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[77][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98162
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[77][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98164
+.subckt mux2_x1 cmd=$abc$109383$new_n26646_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[77][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98166
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n25471_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n26655_
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[45][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98168
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[45][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98170
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[45][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98172
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[45][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98174
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[45][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98176
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[45][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98178
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[45][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98180
-.subckt mx2_x2 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[45][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98182
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[45][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98168
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[45][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98170
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[45][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98172
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[45][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98174
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[45][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98176
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[45][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98178
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[45][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98180
+.subckt mux2_x1 cmd=$abc$109383$new_n26655_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[45][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98182
 .subckt nand3_x0 i0=$abc$109383$new_n22393_ i1=$abc$109383$new_n19745_ i2=$abc$109383$new_n20227_ nq=$abc$109383$new_n26664_
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[101][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98184
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[101][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98186
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[101][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98188
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[101][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98190
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[101][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98192
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[101][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98194
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[101][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98196
-.subckt mx2_x2 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[101][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98198
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[101][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98184
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[101][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98186
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[101][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98188
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[101][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98190
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[101][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98192
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[101][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98194
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[101][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98196
+.subckt mux2_x1 cmd=$abc$109383$new_n26664_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[101][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98198
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n24169_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n26673_
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[45][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98200
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[45][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98202
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[45][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98204
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[45][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98206
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[45][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98208
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[45][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98210
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[45][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98212
-.subckt mx2_x2 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[45][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98214
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[45][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98200
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[45][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98202
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[45][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98204
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[45][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98206
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[45][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98208
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[45][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98210
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[45][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98212
+.subckt mux2_x1 cmd=$abc$109383$new_n26673_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[45][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98214
 .subckt nand4_x0 i0=$abc$109383$new_n20826_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26682_
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[48][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98216
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[48][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98218
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[48][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98220
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[48][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98222
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[48][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98224
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[48][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98226
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[48][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98228
-.subckt mx2_x2 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[48][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98230
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[48][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98216
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[48][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98218
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[48][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98220
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[48][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98222
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[48][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98224
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[48][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98226
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[48][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98228
+.subckt mux2_x1 cmd=$abc$109383$new_n26682_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[48][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98230
 .subckt buf_x1 i=soc.cpu.minerva.gprf.mem._mem[0][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98232
 .subckt buf_x1 i=soc.cpu.minerva.gprf.mem._mem[0][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98234
 .subckt buf_x1 i=soc.cpu.minerva.gprf.mem._mem[0][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98236
@@ -11995,711 +11995,711 @@
 .subckt buf_x1 i=soc.cpu.minerva.gprf.mem._mem[0][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98292
 .subckt buf_x1 i=soc.cpu.minerva.gprf.mem._mem[0][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98294
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26723_
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[108][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98296
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[108][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98298
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[108][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98300
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[108][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98302
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[108][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98304
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[108][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98306
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[108][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98308
-.subckt mx2_x2 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[108][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98310
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[108][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98296
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[108][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98298
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[108][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98300
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[108][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98302
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[108][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98304
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[108][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98306
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[108][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98308
+.subckt mux2_x1 cmd=$abc$109383$new_n26723_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[108][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98310
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n24268_ nq=$abc$109383$new_n26732_
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[47][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98312
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[47][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98314
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[47][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98316
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[47][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98318
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[47][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98320
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[47][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98322
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[47][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98324
-.subckt mx2_x2 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[47][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98326
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[47][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98312
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[47][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98314
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[47][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98316
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[47][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98318
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[47][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98320
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[47][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98322
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[47][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98324
+.subckt mux2_x1 cmd=$abc$109383$new_n26732_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[47][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98326
 .subckt nand3_x0 i0=$abc$109383$new_n20804_ i1=$abc$109383$new_n21611_ i2=$abc$109383$new_n20227_ nq=$abc$109383$new_n26741_
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[10][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98328
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[10][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98330
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[10][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98332
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[10][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98334
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[10][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98336
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[10][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98338
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[10][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98340
-.subckt mx2_x2 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[10][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98342
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[10][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98328
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[10][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98330
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[10][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98332
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[10][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98334
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[10][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98336
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[10][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98338
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[10][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98340
+.subckt mux2_x1 cmd=$abc$109383$new_n26741_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[10][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98342
 .subckt nand4_x0 i0=$abc$109383$new_n25571_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n20828_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n26750_
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[78][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98344
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[78][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98346
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[78][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98348
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[78][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98350
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[78][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98352
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[78][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98354
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[78][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98356
-.subckt mx2_x2 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[78][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98358
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[78][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98344
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[78][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98346
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[78][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98348
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[78][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98350
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[78][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98352
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[78][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98354
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[78][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98356
+.subckt mux2_x1 cmd=$abc$109383$new_n26750_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[78][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98358
 .subckt buf_x4 i=$abc$109383$new_n21590_ q=$abc$109383$new_n26759_
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20270_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26760_
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[78][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98360
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[78][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98362
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[78][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98364
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[78][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98366
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[78][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98368
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[78][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98370
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[78][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98372
-.subckt mx2_x2 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[78][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98374
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[78][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98360
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[78][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98362
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[78][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98364
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[78][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98366
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[78][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98368
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[78][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98370
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[78][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98372
+.subckt mux2_x1 cmd=$abc$109383$new_n26760_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[78][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98374
 .subckt nand3_x0 i0=$abc$109383$new_n21480_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n20548_ nq=$abc$109383$new_n26769_
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[27][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98376
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[27][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98378
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[27][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98380
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[27][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98382
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[27][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98384
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[27][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98386
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[27][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98388
-.subckt mx2_x2 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[27][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98390
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[27][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98376
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[27][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98378
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[27][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98380
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[27][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98382
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[27][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98384
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[27][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98386
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[27][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98388
+.subckt mux2_x1 cmd=$abc$109383$new_n26769_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[27][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98390
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n26197_ nq=$abc$109383$new_n26778_
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[48][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98488
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[48][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98490
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[48][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98492
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[48][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98494
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[48][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98496
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[48][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98498
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[48][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98500
-.subckt mx2_x2 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[48][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98502
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[48][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98488
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[48][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98490
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[48][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98492
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[48][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98494
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[48][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98496
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[48][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98498
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[48][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98500
+.subckt mux2_x1 cmd=$abc$109383$new_n26778_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[48][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98502
 .subckt nand3_x0 i0=$abc$109383$new_n22061_ i1=$abc$109383$new_n23253_ i2=$abc$109383$new_n22643_ nq=$abc$109383$new_n26787_
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[102][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98504
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[102][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98506
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[102][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98508
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[102][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98510
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[102][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98512
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[102][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98514
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[102][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98516
-.subckt mx2_x2 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[102][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98518
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[102][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98504
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[102][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98506
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[102][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98508
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[102][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98510
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[102][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98512
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[102][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98514
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[102][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98516
+.subckt mux2_x1 cmd=$abc$109383$new_n26787_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[102][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98518
 .subckt nand4_x0 i0=$abc$109383$new_n20270_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n20352_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26796_
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[110][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98520
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[110][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98522
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[110][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98524
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[110][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98526
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[110][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98528
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[110][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98530
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[110][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98532
-.subckt mx2_x2 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[110][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98534
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[110][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98520
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[110][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98522
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[110][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98524
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[110][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98526
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[110][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98528
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[110][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98530
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[110][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98532
+.subckt mux2_x1 cmd=$abc$109383$new_n26796_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[110][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98534
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n20853_ nq=$abc$109383$new_n26805_
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[48][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98536
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[48][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98538
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[48][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98540
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[48][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98542
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[48][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98544
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[48][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98546
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[48][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98548
-.subckt mx2_x2 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[48][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98550
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[48][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98536
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[48][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98538
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[48][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98540
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[48][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98542
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[48][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98544
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[48][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98546
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[48][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98548
+.subckt mux2_x1 cmd=$abc$109383$new_n26805_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[48][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98550
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n23003_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26814_
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[111][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98552
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[111][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98554
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[111][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98556
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[111][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98558
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[111][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98560
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[111][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98562
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[111][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98564
-.subckt mx2_x2 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[111][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98566
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[111][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98552
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[111][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98554
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[111][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98556
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[111][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98558
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[111][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98560
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[111][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98562
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[111][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98564
+.subckt mux2_x1 cmd=$abc$109383$new_n26814_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[111][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98566
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n21078_ nq=$abc$109383$new_n26823_
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[79][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98568
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[79][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98570
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[79][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98572
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[79][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98574
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[79][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98576
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[79][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98578
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[79][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98580
-.subckt mx2_x2 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[79][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98582
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[79][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98568
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[79][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98570
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[79][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98572
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[79][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98574
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[79][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98576
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[79][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98578
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[79][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98580
+.subckt mux2_x1 cmd=$abc$109383$new_n26823_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[79][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98582
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n20828_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n26832_
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[78][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98584
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[78][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98586
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[78][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98588
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[78][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98590
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[78][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98592
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[78][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98594
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[78][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98596
-.subckt mx2_x2 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[78][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98598
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[78][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98584
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[78][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98586
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[78][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98588
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[78][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98590
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[78][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98592
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[78][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98594
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[78][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98596
+.subckt mux2_x1 cmd=$abc$109383$new_n26832_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[78][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98598
 .subckt nand3_x0 i0=$abc$109383$new_n21480_ i1=$abc$109383$new_n25599_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n26841_
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[27][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98600
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[27][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98602
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[27][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98604
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[27][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98606
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[27][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98608
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[27][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98610
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[27][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98612
-.subckt mx2_x2 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[27][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98614
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[27][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98600
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[27][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98602
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[27][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98604
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[27][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98606
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[27][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98608
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[27][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98610
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[27][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98612
+.subckt mux2_x1 cmd=$abc$109383$new_n26841_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[27][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98614
 .subckt nand3_x0 i0=$abc$109383$new_n21585_ i1=$abc$109383$new_n20805_ i2=$abc$109383$new_n21177_ nq=$abc$109383$new_n26850_
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[13][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98680
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[13][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98682
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[13][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98684
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[13][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98686
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[13][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98688
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[13][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98690
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[13][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98692
-.subckt mx2_x2 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[13][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98694
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[13][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98680
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[13][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98682
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[13][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98684
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[13][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98686
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[13][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98688
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[13][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98690
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[13][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98692
+.subckt mux2_x1 cmd=$abc$109383$new_n26850_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[13][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98694
 .subckt nand4_x0 i0=$abc$109383$new_n20826_ i1=$abc$109383$new_n20987_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26859_
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[42][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98696
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[42][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98698
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[42][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98700
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[42][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98702
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[42][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98704
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[42][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98706
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[42][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98708
-.subckt mx2_x2 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[42][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98710
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[42][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98696
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[42][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98698
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[42][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98700
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[42][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98702
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[42][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98704
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[42][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98706
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[42][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98708
+.subckt mux2_x1 cmd=$abc$109383$new_n26859_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[42][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98710
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n20243_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26868_
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[114][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98712
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[114][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98714
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[114][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98716
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[114][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98718
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[114][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98720
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[114][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98722
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[114][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98724
-.subckt mx2_x2 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[114][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98726
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[114][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98712
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[114][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98714
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[114][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98716
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[114][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98718
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[114][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98720
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[114][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98722
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[114][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98724
+.subckt mux2_x1 cmd=$abc$109383$new_n26868_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[114][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98726
 .subckt nand4_x0 i0=$abc$109383$new_n20800_ i1=$abc$109383$new_n21034_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n26877_
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[112][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98728
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[112][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98730
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[112][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98732
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[112][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98734
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[112][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98736
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[112][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98738
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[112][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98740
-.subckt mx2_x2 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[112][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98742
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26585_ i1=soc.ram.ram[112][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98728
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26588_ i1=soc.ram.ram[112][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98730
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26590_ i1=soc.ram.ram[112][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98732
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26592_ i1=soc.ram.ram[112][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98734
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26594_ i1=soc.ram.ram[112][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98736
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26596_ i1=soc.ram.ram[112][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98738
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26598_ i1=soc.ram.ram[112][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98740
+.subckt mux2_x1 cmd=$abc$109383$new_n26877_ i0=$abc$109383$new_n26600_ i1=soc.ram.ram[112][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98742
 .subckt nand2_x0 i0=$abc$109383$new_n24884_ i1=$abc$109383$new_n20801_ nq=$abc$109383$new_n26886_
 .subckt buf_x4 i=$abc$109383$new_n26886_ q=$abc$109383$new_n26887_
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[4][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98744
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[4][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98746
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[4][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98748
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[4][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98750
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[4][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98752
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[4][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98754
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[4][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98756
-.subckt mx2_x2 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[4][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98758
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[4][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98744
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[4][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98746
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[4][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98748
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[4][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98750
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[4][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98752
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[4][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98754
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[4][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98756
+.subckt mux2_x1 cmd=$abc$109383$new_n26887_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[4][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98758
 .subckt nand4_x0 i0=$abc$109383$new_n20550_ i1=$abc$109383$new_n20852_ i2=$abc$109383$new_n20352_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26896_
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[115][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98760
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[115][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98762
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[115][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98764
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[115][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98766
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[115][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98768
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[115][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98770
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[115][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98772
-.subckt mx2_x2 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[115][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98774
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[115][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98760
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[115][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98762
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[115][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98764
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[115][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98766
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[115][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98768
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[115][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98770
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[115][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98772
+.subckt mux2_x1 cmd=$abc$109383$new_n26896_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[115][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98774
 .subckt nand4_x0 i0=$abc$109383$new_n20852_ i1=$abc$109383$new_n21441_ i2=$abc$109383$new_n20352_ i3=$abc$109383$new_n26146_ nq=$abc$109383$new_n26905_
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[113][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98776
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[113][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98778
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[113][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98780
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[113][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98782
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[113][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98784
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[113][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98786
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[113][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98788
-.subckt mx2_x2 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[113][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98790
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[113][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98776
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[113][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98778
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26472_ i1=soc.ram.ram[113][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98780
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26474_ i1=soc.ram.ram[113][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98782
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26476_ i1=soc.ram.ram[113][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98784
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[113][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98786
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26479_ i1=soc.ram.ram[113][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98788
+.subckt mux2_x1 cmd=$abc$109383$new_n26905_ i0=$abc$109383$new_n26481_ i1=soc.ram.ram[113][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98790
 .subckt nand4_x0 i0=$abc$109383$new_n21158_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n24987_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n26914_
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[49][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98792
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[49][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98794
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[49][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98796
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[49][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98798
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[49][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98800
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[49][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98802
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[49][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98804
-.subckt mx2_x2 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[49][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98806
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[49][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98792
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[49][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98794
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[49][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98796
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[49][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98798
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[49][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98800
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[49][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98802
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[49][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98804
+.subckt mux2_x1 cmd=$abc$109383$new_n26914_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[49][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98806
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n26923_
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[49][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98808
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[49][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98810
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[49][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98812
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[49][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98814
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[49][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98816
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[49][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98818
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[49][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98820
-.subckt mx2_x2 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[49][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98822
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26397_ i1=soc.ram.ram[49][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98808
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26400_ i1=soc.ram.ram[49][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98810
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26402_ i1=soc.ram.ram[49][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98812
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[49][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98814
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26405_ i1=soc.ram.ram[49][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98816
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26407_ i1=soc.ram.ram[49][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98818
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26409_ i1=soc.ram.ram[49][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98820
+.subckt mux2_x1 cmd=$abc$109383$new_n26923_ i0=$abc$109383$new_n26411_ i1=soc.ram.ram[49][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98822
 .subckt nand4_x0 i0=$abc$109383$new_n20826_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n26932_
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[49][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98824
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[49][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98826
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[49][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98828
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[49][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98830
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[49][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98832
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[49][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98834
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[49][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98836
-.subckt mx2_x2 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[49][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98838
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[49][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98824
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[49][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98826
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[49][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98828
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[49][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98830
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[49][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98832
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[49][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98834
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[49][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98836
+.subckt mux2_x1 cmd=$abc$109383$new_n26932_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[49][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98838
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n24216_ nq=$abc$109383$new_n26941_
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[81][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98840
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[81][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98842
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[81][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98844
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[81][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98846
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[81][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98848
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[81][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98850
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[81][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98852
-.subckt mx2_x2 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[81][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98854
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[81][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98840
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[81][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98842
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[81][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98844
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[81][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98846
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26607_ i1=soc.ram.ram[81][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98848
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26609_ i1=soc.ram.ram[81][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98850
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26611_ i1=soc.ram.ram[81][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98852
+.subckt mux2_x1 cmd=$abc$109383$new_n26941_ i0=$abc$109383$new_n26613_ i1=soc.ram.ram[81][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98854
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n23135_ i3=$abc$109383$new_n20853_ nq=$abc$109383$new_n26950_
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[80][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98856
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[80][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98858
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[80][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98860
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[80][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98862
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[80][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98864
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[80][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98866
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[80][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98868
-.subckt mx2_x2 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[80][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98870
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[80][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98856
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[80][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98858
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[80][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98860
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[80][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98862
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[80][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98864
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[80][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98866
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[80][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98868
+.subckt mux2_x1 cmd=$abc$109383$new_n26950_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[80][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98870
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n21034_ i3=$abc$109383$new_n20853_ nq=$abc$109383$new_n26959_
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[80][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98872
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[80][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98874
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[80][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98876
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[80][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98878
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[80][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98880
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26615_ i1=soc.ram.ram[80][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98872
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26618_ i1=soc.ram.ram[80][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98874
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26620_ i1=soc.ram.ram[80][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98876
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26622_ i1=soc.ram.ram[80][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98878
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[80][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98880
 .subckt buf_x4 i=$abc$109383$new_n20383_ q=$abc$109383$new_n26965_
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[80][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98882
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[80][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98884
-.subckt mx2_x2 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[80][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98886
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[80][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98882
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[80][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98884
+.subckt mux2_x1 cmd=$abc$109383$new_n26959_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[80][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98886
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n24609_ i2=$abc$109383$new_n21034_ i3=$abc$109383$new_n20853_ nq=$abc$109383$new_n26969_
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[80][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98888
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[80][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98890
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[80][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98892
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[80][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98894
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[80][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98896
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[80][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98898
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[80][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98900
-.subckt mx2_x2 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[80][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98902
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[80][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98888
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[80][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98890
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[80][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98892
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n26463_ i1=soc.ram.ram[80][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98894
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[80][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98896
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[80][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98898
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[80][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98900
+.subckt mux2_x1 cmd=$abc$109383$new_n26969_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[80][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98902
 .subckt nand2_x0 i0=$abc$109383$new_n23561_ i1=$abc$109383$new_n21401_ nq=$abc$109383$new_n26978_
 .subckt buf_x4 i=$abc$109383$new_n26978_ q=$abc$109383$new_n26979_
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[7][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98904
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[7][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98906
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[7][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98908
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[7][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98910
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[7][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98912
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[7][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98914
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[7][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98916
-.subckt mx2_x2 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[7][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98918
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[7][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98904
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[7][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98906
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[7][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98908
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[7][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98910
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[7][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98912
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[7][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98914
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[7][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98916
+.subckt mux2_x1 cmd=$abc$109383$new_n26979_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[7][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98918
 .subckt nand2_x0 i0=$abc$109383$new_n23561_ i1=$abc$109383$new_n20801_ nq=$abc$109383$new_n26988_
 .subckt buf_x4 i=$abc$109383$new_n26988_ q=$abc$109383$new_n26989_
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[7][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98920
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[7][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98922
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[7][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98924
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[7][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98926
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[7][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98928
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[7][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98930
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[7][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98932
-.subckt mx2_x2 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[7][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98934
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[7][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98920
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[7][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98922
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[7][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98924
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[7][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98926
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[7][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98928
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[7][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98930
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[7][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98932
+.subckt mux2_x1 cmd=$abc$109383$new_n26989_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[7][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98934
 .subckt nand2_x0 i0=$abc$109383$new_n23561_ i1=$abc$109383$new_n21381_ nq=$abc$109383$new_n26998_
 .subckt buf_x4 i=$abc$109383$new_n26998_ q=$abc$109383$new_n26999_
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[7][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98936
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[7][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98938
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[7][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98940
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[7][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98942
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[7][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98944
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[7][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98946
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[7][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98948
-.subckt mx2_x2 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[7][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98950
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[7][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98936
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[7][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98938
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[7][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98940
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[7][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98942
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[7][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98944
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[7][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98946
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[7][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98948
+.subckt mux2_x1 cmd=$abc$109383$new_n26999_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[7][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98950
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20257_ i2=$abc$109383$new_n21099_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27008_
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[79][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98952
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[79][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98954
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[79][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98956
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[79][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98958
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[79][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98960
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[79][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98962
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[79][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98964
-.subckt mx2_x2 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[79][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98966
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n26492_ i1=soc.ram.ram[79][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98952
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n26495_ i1=soc.ram.ram[79][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98954
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[79][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98956
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[79][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98958
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[79][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98960
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n26500_ i1=soc.ram.ram[79][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98962
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[79][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98964
+.subckt mux2_x1 cmd=$abc$109383$new_n27008_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[79][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98966
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n26082_ i3=$abc$109383$new_n21078_ nq=$abc$109383$new_n27017_
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[79][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98968
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[79][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98970
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[79][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98972
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[79][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98974
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[79][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98976
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[79][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98978
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[79][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98980
-.subckt mx2_x2 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[79][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98982
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[79][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98968
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[79][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98970
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[79][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98972
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[79][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98974
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[79][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98976
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[79][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98978
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[79][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98980
+.subckt mux2_x1 cmd=$abc$109383$new_n27017_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[79][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98982
 .subckt nand4_x0 i0=$abc$109383$new_n20826_ i1=$abc$109383$new_n20257_ i2=$abc$109383$new_n21441_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27026_
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[41][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98984
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[41][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98986
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[41][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98988
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[41][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98990
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[41][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98992
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[41][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98994
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[41][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98996
-.subckt mx2_x2 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[41][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98998
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[41][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98984
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[41][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98986
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[41][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98988
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[41][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98990
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[41][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98992
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[41][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98994
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[41][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98996
+.subckt mux2_x1 cmd=$abc$109383$new_n27026_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[41][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98998
 .subckt nand3_x0 i0=$abc$109383$new_n20804_ i1=$abc$109383$new_n21815_ i2=$abc$109383$new_n21479_ nq=$abc$109383$new_n27035_
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[12][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99032
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[12][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99034
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[12][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99036
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[12][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99038
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[12][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99040
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[12][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99042
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[12][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99044
-.subckt mx2_x2 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[12][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99046
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[12][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99032
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[12][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99034
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[12][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99036
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[12][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99038
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[12][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99040
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[12][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99042
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[12][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99044
+.subckt mux2_x1 cmd=$abc$109383$new_n27035_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[12][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99046
 .subckt nand2_x0 i0=$abc$109383$new_n24884_ i1=$abc$109383$new_n21381_ nq=$abc$109383$new_n27044_
 .subckt buf_x4 i=$abc$109383$new_n27044_ q=$abc$109383$new_n27045_
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[4][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99048
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[4][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99050
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[4][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99052
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[4][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99054
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[4][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99056
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[4][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99058
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[4][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99060
-.subckt mx2_x2 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[4][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99062
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[4][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99048
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[4][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99050
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[4][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99052
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[4][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99054
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[4][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99056
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[4][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99058
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[4][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99060
+.subckt mux2_x1 cmd=$abc$109383$new_n27045_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[4][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99062
 .subckt nand2_x0 i0=$abc$109383$new_n24884_ i1=$abc$109383$new_n21401_ nq=$abc$109383$new_n27054_
 .subckt buf_x4 i=$abc$109383$new_n27054_ q=$abc$109383$new_n27055_
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[4][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99064
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[4][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99066
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[4][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99068
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[4][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99070
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[4][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99072
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[4][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99074
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[4][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99076
-.subckt mx2_x2 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[4][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99078
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[4][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99064
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[4][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99066
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[4][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99068
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[4][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99070
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[4][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99072
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[4][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99074
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[4][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99076
+.subckt mux2_x1 cmd=$abc$109383$new_n27055_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[4][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99078
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n26165_ nq=$abc$109383$new_n27064_
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[117][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99080
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[117][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99082
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[117][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99084
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[117][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99086
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[117][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99088
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[117][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99090
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[117][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99092
-.subckt mx2_x2 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[117][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99094
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[117][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99080
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[117][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99082
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[117][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99084
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[117][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99086
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[117][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99088
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[117][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99090
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[117][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99092
+.subckt mux2_x1 cmd=$abc$109383$new_n27064_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[117][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99094
 .subckt nand4_x0 i0=$abc$109383$new_n20918_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n20229_ nq=$abc$109383$new_n27073_
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[116][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99096
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[116][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99098
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[116][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99100
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[116][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99102
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[116][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99104
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[116][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99106
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[116][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99108
-.subckt mx2_x2 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[116][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99110
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[116][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99096
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[116][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99098
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[116][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99100
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[116][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99102
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[116][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99104
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[116][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99106
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[116][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99108
+.subckt mux2_x1 cmd=$abc$109383$new_n27073_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[116][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99110
 .subckt nand4_x0 i0=$abc$109383$new_n26759_ i1=$abc$109383$new_n20829_ i2=$abc$109383$new_n24148_ i3=$abc$109383$new_n20853_ nq=$abc$109383$new_n27082_
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[82][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99112
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[82][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99114
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[82][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99116
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[82][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99118
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[82][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99120
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[82][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99122
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[82][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99124
-.subckt mx2_x2 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[82][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99126
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[82][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99112
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[82][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99114
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[82][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99116
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[82][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99118
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[82][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99120
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[82][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99122
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[82][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99124
+.subckt mux2_x1 cmd=$abc$109383$new_n27082_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[82][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99126
 .subckt nand4_x0 i0=$abc$109383$new_n21591_ i1=$abc$109383$new_n20841_ i2=$abc$109383$new_n20987_ i3=$abc$109383$new_n20853_ nq=$abc$109383$new_n27091_
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[82][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99128
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[82][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99130
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[82][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99132
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[82][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99134
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[82][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99136
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[82][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99138
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[82][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99140
-.subckt mx2_x2 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[82][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99142
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[82][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99128
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[82][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99130
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[82][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99132
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[82][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99134
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[82][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99136
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[82][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99138
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[82][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99140
+.subckt mux2_x1 cmd=$abc$109383$new_n27091_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[82][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99142
 .subckt nand4_x0 i0=$abc$109383$new_n21591_ i1=$abc$109383$new_n20243_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27100_
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[82][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99144
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[82][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99146
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[82][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99148
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[82][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99150
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[82][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99152
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[82][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99154
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[82][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99156
-.subckt mx2_x2 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[82][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99158
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[82][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99144
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[82][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99146
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[82][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99148
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[82][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99150
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[82][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99152
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[82][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99154
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[82][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99156
+.subckt mux2_x1 cmd=$abc$109383$new_n27100_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[82][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99158
 .subckt nand4_x0 i0=$abc$109383$new_n21591_ i1=$abc$109383$new_n20841_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n20840_ nq=$abc$109383$new_n27109_
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[81][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99160
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[81][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99162
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[81][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99164
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[81][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99166
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[81][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99168
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[81][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99170
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[81][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99172
-.subckt mx2_x2 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[81][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99174
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[81][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99160
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[81][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99162
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[81][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99164
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[81][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99166
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[81][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99168
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[81][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99170
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[81][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99172
+.subckt mux2_x1 cmd=$abc$109383$new_n27109_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[81][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99174
 .subckt nand4_x0 i0=$abc$109383$new_n21591_ i1=$abc$109383$new_n20816_ i2=$abc$109383$new_n20897_ i3=$abc$109383$new_n20840_ nq=$abc$109383$new_n27118_
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[81][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99176
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[81][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99178
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[81][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99180
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[81][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99182
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[81][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99184
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[81][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99186
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[81][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99188
-.subckt mx2_x2 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[81][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99190
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[81][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99176
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[81][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99178
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[81][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99180
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[81][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99182
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[81][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99184
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[81][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99186
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[81][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99188
+.subckt mux2_x1 cmd=$abc$109383$new_n27118_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[81][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99190
 .subckt nand4_x0 i0=$abc$109383$new_n21591_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n20872_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n27127_
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[76][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99192
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[76][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99194
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[76][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99196
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[76][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99198
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[76][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99200
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[76][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99202
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[76][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99204
-.subckt mx2_x2 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[76][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99206
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[76][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99192
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[76][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99194
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[76][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99196
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[76][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99198
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[76][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99200
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[76][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99202
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[76][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99204
+.subckt mux2_x1 cmd=$abc$109383$new_n27127_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[76][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99206
 .subckt nand4_x0 i0=$abc$109383$new_n20550_ i1=$abc$109383$new_n20257_ i2=$abc$109383$new_n20352_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27136_
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[107][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99208
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[107][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99210
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[107][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99212
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[107][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99214
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[107][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99216
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[107][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99218
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[107][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99220
-.subckt mx2_x2 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[107][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99222
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[107][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99208
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[107][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99210
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[107][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99212
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[107][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99214
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[107][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99216
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[107][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99218
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[107][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99220
+.subckt mux2_x1 cmd=$abc$109383$new_n27136_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[107][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99222
 .subckt nand4_x0 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n20759_ nq=$abc$109383$new_n27145_
-.subckt a2_x2 i0=$abc$109383$new_n27145_ i1=soc.cpu.minerva.gprf.mem._mem[8][0] q=$abc$109383$new_n27146_
-.subckt a4_x2 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20308_ i2=$abc$109383$new_n20307_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n27147_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n27147_ q=$abc$109383$new_n27148_
-.subckt o2_x2 i0=$abc$109383$new_n27148_ i1=$abc$109383$new_n27146_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99224
+.subckt and2_x1 i0=$abc$109383$new_n27145_ i1=soc.cpu.minerva.gprf.mem._mem[8][0] q=$abc$109383$new_n27146_
+.subckt and4_x1 i0=$abc$109383$new_n24741_ i1=$abc$109383$new_n20308_ i2=$abc$109383$new_n20307_ i3=$abc$109383$new_n20760_ q=$abc$109383$new_n27147_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n27147_ nq=$abc$109383$new_n27148_
+.subckt or2_x1 i0=$abc$109383$new_n27148_ i1=$abc$109383$new_n27146_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99224
 .subckt buf_x4 i=$abc$109383$new_n27145_ q=$abc$109383$new_n27150_
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[8][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99226
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[8][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99228
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[8][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99230
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[8][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99232
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[8][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99234
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[8][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99236
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[8][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99238
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[8][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99240
-.subckt mx2_x2 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[8][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99242
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[8][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99226
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[8][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99228
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[8][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99230
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[8][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99232
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[8][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99234
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[8][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99236
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[8][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99238
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[8][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99240
+.subckt mux2_x1 cmd=$abc$109383$new_n27150_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[8][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99242
 .subckt buf_x4 i=$abc$109383$new_n27145_ q=$abc$109383$new_n27160_
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[8][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99244
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[8][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99246
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[8][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99248
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[8][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99250
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[8][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99252
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[8][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99254
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[8][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99256
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[8][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99258
-.subckt mx2_x2 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[8][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99260
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[8][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99244
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[8][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99246
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[8][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99248
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[8][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99250
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[8][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99252
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[8][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99254
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[8][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99256
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[8][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99258
+.subckt mux2_x1 cmd=$abc$109383$new_n27160_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[8][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99260
 .subckt buf_x4 i=$abc$109383$new_n27145_ q=$abc$109383$new_n27170_
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[8][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99262
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[8][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99264
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[8][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99266
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[8][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99268
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[8][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99270
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[8][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99272
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[8][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99274
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[8][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99276
-.subckt mx2_x2 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[8][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99278
-.subckt mx2_x2 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[8][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99280
-.subckt mx2_x2 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[8][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99282
-.subckt mx2_x2 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[8][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99284
-.subckt mx2_x2 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[8][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99286
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[8][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99262
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[8][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99264
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[8][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99266
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[8][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99268
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[8][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99270
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[8][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99272
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[8][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99274
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[8][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99276
+.subckt mux2_x1 cmd=$abc$109383$new_n27170_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[8][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99278
+.subckt mux2_x1 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[8][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99280
+.subckt mux2_x1 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[8][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99282
+.subckt mux2_x1 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[8][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99284
+.subckt mux2_x1 cmd=$abc$109383$new_n27145_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[8][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99286
 .subckt nand3_x0 i0=$abc$109383$new_n21585_ i1=$abc$109383$new_n21815_ i2=$abc$109383$new_n19746_ nq=$abc$109383$new_n27184_
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[101][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99288
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[101][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99290
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[101][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99292
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[101][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99294
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[101][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99296
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[101][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99298
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[101][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99300
-.subckt mx2_x2 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[101][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99302
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[101][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99288
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[101][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99290
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[101][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99292
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[101][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99294
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[101][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99296
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[101][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99298
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[101][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99300
+.subckt mux2_x1 cmd=$abc$109383$new_n27184_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[101][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99302
 .subckt nand3_x0 i0=$abc$109383$new_n22041_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n19746_ nq=$abc$109383$new_n27193_
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[102][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99304
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[102][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99306
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[102][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99308
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[102][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99310
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[102][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99312
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[102][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99314
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[102][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99316
-.subckt mx2_x2 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[102][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99318
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[102][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99304
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[102][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99306
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[102][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99308
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[102][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99310
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[102][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99312
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[102][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99314
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[102][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99316
+.subckt mux2_x1 cmd=$abc$109383$new_n27193_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[102][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99318
 .subckt nand4_x0 i0=$abc$109383$new_n20550_ i1=$abc$109383$new_n26297_ i2=$abc$109383$new_n20234_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27202_
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[43][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99320
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[43][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99322
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[43][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99324
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[43][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99326
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[43][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99328
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[43][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99330
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[43][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99332
-.subckt mx2_x2 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[43][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99334
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[43][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99320
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[43][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99322
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[43][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99324
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[43][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99326
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[43][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99328
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[43][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99330
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[43][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99332
+.subckt mux2_x1 cmd=$abc$109383$new_n27202_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[43][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99334
 .subckt nand4_x0 i0=$abc$109383$new_n21320_ i1=$abc$109383$new_n20841_ i2=$abc$109383$new_n25078_ i3=$abc$109383$new_n24646_ nq=$abc$109383$new_n27211_
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[45][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99336
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[45][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99338
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[45][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99340
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[45][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99342
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[45][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99344
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[45][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99346
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[45][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99348
-.subckt mx2_x2 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[45][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99350
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[45][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99336
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[45][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99338
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[45][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99340
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[45][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99342
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[45][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99344
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[45][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99346
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[45][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99348
+.subckt mux2_x1 cmd=$abc$109383$new_n27211_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[45][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99350
 .subckt nand3_x0 i0=$abc$109383$new_n21585_ i1=$abc$109383$new_n20805_ i2=$abc$109383$new_n21159_ nq=$abc$109383$new_n27220_
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[13][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99352
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[13][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99354
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[13][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99356
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[13][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99358
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[13][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99360
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[13][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99362
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[13][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99364
-.subckt mx2_x2 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[13][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99366
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[13][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99352
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[13][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99354
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[13][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99356
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[13][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99358
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[13][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99360
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[13][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99362
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[13][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99364
+.subckt mux2_x1 cmd=$abc$109383$new_n27220_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[13][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99366
 .subckt nand4_x0 i0=$abc$109383$new_n20499_ i1=$abc$109383$new_n19829_ i2=$abc$109383$new_n19826_ i3=$abc$109383$new_n19821_ nq=$abc$109383$new_n27229_
-.subckt a2_x2 i0=$abc$109383$new_n27229_ i1=soc.cpu.minerva.gprf.mem._mem[7][0] q=$abc$109383$new_n27230_
-.subckt a4_x2 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20308_ i2=$abc$109383$new_n20307_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n27231_
-.subckt ao22_x2 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n27231_ q=$abc$109383$new_n27232_
-.subckt o2_x2 i0=$abc$109383$new_n27232_ i1=$abc$109383$new_n27230_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99368
+.subckt and2_x1 i0=$abc$109383$new_n27229_ i1=soc.cpu.minerva.gprf.mem._mem[7][0] q=$abc$109383$new_n27230_
+.subckt and4_x1 i0=$abc$109383$new_n20502_ i1=$abc$109383$new_n20308_ i2=$abc$109383$new_n20307_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n27231_
+.subckt and21nor_x1 i0=$abc$109383$new_n23198_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n27231_ nq=$abc$109383$new_n27232_
+.subckt or2_x1 i0=$abc$109383$new_n27232_ i1=$abc$109383$new_n27230_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99368
 .subckt buf_x4 i=$abc$109383$new_n27229_ q=$abc$109383$new_n27234_
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[7][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99370
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[7][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99372
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[7][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99374
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[7][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99376
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[7][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99378
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[7][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99380
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[7][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99382
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[7][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99384
-.subckt mx2_x2 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[7][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99386
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[7][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99370
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23203_ i1=soc.cpu.minerva.gprf.mem._mem[7][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99372
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[7][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99374
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23206_ i1=soc.cpu.minerva.gprf.mem._mem[7][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99376
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[7][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99378
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[7][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99380
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[7][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99382
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[7][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99384
+.subckt mux2_x1 cmd=$abc$109383$new_n27234_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[7][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99386
 .subckt buf_x4 i=$abc$109383$new_n27229_ q=$abc$109383$new_n27244_
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[7][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99388
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[7][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99390
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[7][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99392
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[7][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99394
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[7][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99396
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[7][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99398
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[7][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99400
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[7][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99402
-.subckt mx2_x2 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[7][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99404
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[7][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99388
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[7][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99390
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[7][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99392
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[7][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99394
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[7][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99396
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[7][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99398
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23220_ i1=soc.cpu.minerva.gprf.mem._mem[7][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99400
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23222_ i1=soc.cpu.minerva.gprf.mem._mem[7][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99402
+.subckt mux2_x1 cmd=$abc$109383$new_n27244_ i0=$abc$109383$new_n23224_ i1=soc.cpu.minerva.gprf.mem._mem[7][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99404
 .subckt buf_x4 i=$abc$109383$new_n27229_ q=$abc$109383$new_n27254_
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[7][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99406
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[7][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99408
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[7][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99410
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[7][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99412
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[7][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99414
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[7][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99416
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[7][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99418
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[7][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99420
-.subckt mx2_x2 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[7][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99422
-.subckt mx2_x2 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[7][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99424
-.subckt mx2_x2 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[7][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99426
-.subckt mx2_x2 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[7][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99428
-.subckt mx2_x2 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[7][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99430
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23226_ i1=soc.cpu.minerva.gprf.mem._mem[7][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99406
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23229_ i1=soc.cpu.minerva.gprf.mem._mem[7][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99408
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23231_ i1=soc.cpu.minerva.gprf.mem._mem[7][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99410
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23233_ i1=soc.cpu.minerva.gprf.mem._mem[7][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99412
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23235_ i1=soc.cpu.minerva.gprf.mem._mem[7][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99414
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23237_ i1=soc.cpu.minerva.gprf.mem._mem[7][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99416
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23239_ i1=soc.cpu.minerva.gprf.mem._mem[7][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99418
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23241_ i1=soc.cpu.minerva.gprf.mem._mem[7][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99420
+.subckt mux2_x1 cmd=$abc$109383$new_n27254_ i0=$abc$109383$new_n23243_ i1=soc.cpu.minerva.gprf.mem._mem[7][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99422
+.subckt mux2_x1 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23245_ i1=soc.cpu.minerva.gprf.mem._mem[7][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99424
+.subckt mux2_x1 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23247_ i1=soc.cpu.minerva.gprf.mem._mem[7][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99426
+.subckt mux2_x1 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23249_ i1=soc.cpu.minerva.gprf.mem._mem[7][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99428
+.subckt mux2_x1 cmd=$abc$109383$new_n27229_ i0=$abc$109383$new_n23251_ i1=soc.cpu.minerva.gprf.mem._mem[7][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99430
 .subckt nand3_x0 i0=$abc$109383$new_n21585_ i1=$abc$109383$new_n21787_ i2=$abc$109383$new_n19746_ nq=$abc$109383$new_n27268_
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[101][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99432
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[101][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99434
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[101][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99436
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[101][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99438
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[101][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99440
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[101][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99442
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[101][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99444
-.subckt mx2_x2 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[101][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99446
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20350_ i1=soc.ram.ram[101][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99432
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20366_ i1=soc.ram.ram[101][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99434
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20371_ i1=soc.ram.ram[101][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99436
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n20375_ i1=soc.ram.ram[101][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99438
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n21165_ i1=soc.ram.ram[101][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99440
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n26965_ i1=soc.ram.ram[101][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99442
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n21171_ i1=soc.ram.ram[101][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99444
+.subckt mux2_x1 cmd=$abc$109383$new_n27268_ i0=$abc$109383$new_n21174_ i1=soc.ram.ram[101][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99446
 .subckt nand4_x0 i0=$abc$109383$new_n21591_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n20234_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27277_
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[76][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99448
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[76][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99450
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[76][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99452
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[76][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99454
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[76][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99456
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[76][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99458
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[76][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99460
-.subckt mx2_x2 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[76][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99462
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[76][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99448
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[76][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99450
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[76][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99452
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[76][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99454
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[76][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99456
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[76][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99458
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[76][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99460
+.subckt mux2_x1 cmd=$abc$109383$new_n27277_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[76][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99462
 .subckt nand4_x0 i0=$abc$109383$new_n20547_ i1=$abc$109383$new_n20361_ i2=$abc$109383$new_n20234_ i3=$abc$109383$new_n20229_ nq=$abc$109383$new_n27286_
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[108][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99464
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[108][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99466
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[108][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99468
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[108][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99470
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[108][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99472
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[108][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99474
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[108][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99476
-.subckt mx2_x2 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[108][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99478
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21044_ i1=soc.ram.ram[108][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99464
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21048_ i1=soc.ram.ram[108][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99466
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21051_ i1=soc.ram.ram[108][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99468
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n20564_ i1=soc.ram.ram[108][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99470
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21055_ i1=soc.ram.ram[108][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99472
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21058_ i1=soc.ram.ram[108][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99474
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21061_ i1=soc.ram.ram[108][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99476
+.subckt mux2_x1 cmd=$abc$109383$new_n27286_ i0=$abc$109383$new_n21064_ i1=soc.ram.ram[108][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99478
 .subckt nand3_x0 i0=$abc$109383$new_n20593_ i1=$abc$109383$new_n21514_ i2=$abc$109383$new_n20760_ nq=$abc$109383$new_n27295_
-.subckt a2_x2 i0=$abc$109383$new_n27295_ i1=soc.cpu.minerva.gprf.mem._mem[28][0] q=$abc$109383$new_n27296_
-.subckt a3_x2 i0=$abc$109383$new_n20594_ i1=$abc$109383$new_n21514_ i2=$abc$109383$new_n20760_ q=$abc$109383$new_n27297_
-.subckt ao22_x2 i0=$abc$109383$new_n19863_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n27297_ q=$abc$109383$new_n27298_
-.subckt o2_x2 i0=$abc$109383$new_n27298_ i1=$abc$109383$new_n27296_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99484
+.subckt and2_x1 i0=$abc$109383$new_n27295_ i1=soc.cpu.minerva.gprf.mem._mem[28][0] q=$abc$109383$new_n27296_
+.subckt and3_x1 i0=$abc$109383$new_n20594_ i1=$abc$109383$new_n21514_ i2=$abc$109383$new_n20760_ q=$abc$109383$new_n27297_
+.subckt and21nor_x1 i0=$abc$109383$new_n19863_ i1=$abc$109383$new_n23425_ i2=$abc$109383$new_n27297_ nq=$abc$109383$new_n27298_
+.subckt or2_x1 i0=$abc$109383$new_n27298_ i1=$abc$109383$new_n27296_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99484
 .subckt buf_x4 i=$abc$109383$new_n27295_ q=$abc$109383$new_n27300_
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[28][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99486
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n19916_ i1=soc.cpu.minerva.gprf.mem._mem[28][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99488
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[28][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99490
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n19955_ i1=soc.cpu.minerva.gprf.mem._mem[28][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99492
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[28][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99494
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[28][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99496
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[28][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99498
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[28][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99500
-.subckt mx2_x2 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[28][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99502
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23428_ i1=soc.cpu.minerva.gprf.mem._mem[28][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99486
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n19916_ i1=soc.cpu.minerva.gprf.mem._mem[28][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99488
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23432_ i1=soc.cpu.minerva.gprf.mem._mem[28][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99490
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n19955_ i1=soc.cpu.minerva.gprf.mem._mem[28][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99492
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23435_ i1=soc.cpu.minerva.gprf.mem._mem[28][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99494
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23437_ i1=soc.cpu.minerva.gprf.mem._mem[28][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99496
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23439_ i1=soc.cpu.minerva.gprf.mem._mem[28][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99498
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23441_ i1=soc.cpu.minerva.gprf.mem._mem[28][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99500
+.subckt mux2_x1 cmd=$abc$109383$new_n27300_ i0=$abc$109383$new_n23443_ i1=soc.cpu.minerva.gprf.mem._mem[28][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99502
 .subckt buf_x4 i=$abc$109383$new_n27295_ q=$abc$109383$new_n27310_
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[28][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99504
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[28][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99506
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[28][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99508
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[28][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99510
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[28][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99512
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[28][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99514
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n20132_ i1=soc.cpu.minerva.gprf.mem._mem[28][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99516
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n20139_ i1=soc.cpu.minerva.gprf.mem._mem[28][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99518
-.subckt mx2_x2 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n20145_ i1=soc.cpu.minerva.gprf.mem._mem[28][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99520
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23445_ i1=soc.cpu.minerva.gprf.mem._mem[28][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99504
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23448_ i1=soc.cpu.minerva.gprf.mem._mem[28][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99506
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23450_ i1=soc.cpu.minerva.gprf.mem._mem[28][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99508
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23452_ i1=soc.cpu.minerva.gprf.mem._mem[28][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99510
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23454_ i1=soc.cpu.minerva.gprf.mem._mem[28][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99512
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n23456_ i1=soc.cpu.minerva.gprf.mem._mem[28][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99514
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n20132_ i1=soc.cpu.minerva.gprf.mem._mem[28][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99516
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n20139_ i1=soc.cpu.minerva.gprf.mem._mem[28][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99518
+.subckt mux2_x1 cmd=$abc$109383$new_n27310_ i0=$abc$109383$new_n20145_ i1=soc.cpu.minerva.gprf.mem._mem[28][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99520
 .subckt buf_x4 i=$abc$109383$new_n27295_ q=$abc$109383$new_n27320_
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20151_ i1=soc.cpu.minerva.gprf.mem._mem[28][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99522
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20158_ i1=soc.cpu.minerva.gprf.mem._mem[28][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99524
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20164_ i1=soc.cpu.minerva.gprf.mem._mem[28][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99526
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20170_ i1=soc.cpu.minerva.gprf.mem._mem[28][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99528
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20176_ i1=soc.cpu.minerva.gprf.mem._mem[28][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99530
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20182_ i1=soc.cpu.minerva.gprf.mem._mem[28][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99532
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20188_ i1=soc.cpu.minerva.gprf.mem._mem[28][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99534
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20194_ i1=soc.cpu.minerva.gprf.mem._mem[28][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99536
-.subckt mx2_x2 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20200_ i1=soc.cpu.minerva.gprf.mem._mem[28][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99538
-.subckt mx2_x2 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20206_ i1=soc.cpu.minerva.gprf.mem._mem[28][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99540
-.subckt mx2_x2 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20212_ i1=soc.cpu.minerva.gprf.mem._mem[28][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99542
-.subckt mx2_x2 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20218_ i1=soc.cpu.minerva.gprf.mem._mem[28][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99544
-.subckt mx2_x2 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20224_ i1=soc.cpu.minerva.gprf.mem._mem[28][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99546
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20151_ i1=soc.cpu.minerva.gprf.mem._mem[28][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99522
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20158_ i1=soc.cpu.minerva.gprf.mem._mem[28][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99524
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20164_ i1=soc.cpu.minerva.gprf.mem._mem[28][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99526
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20170_ i1=soc.cpu.minerva.gprf.mem._mem[28][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99528
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20176_ i1=soc.cpu.minerva.gprf.mem._mem[28][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99530
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20182_ i1=soc.cpu.minerva.gprf.mem._mem[28][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99532
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20188_ i1=soc.cpu.minerva.gprf.mem._mem[28][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99534
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20194_ i1=soc.cpu.minerva.gprf.mem._mem[28][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99536
+.subckt mux2_x1 cmd=$abc$109383$new_n27320_ i0=$abc$109383$new_n20200_ i1=soc.cpu.minerva.gprf.mem._mem[28][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99538
+.subckt mux2_x1 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20206_ i1=soc.cpu.minerva.gprf.mem._mem[28][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99540
+.subckt mux2_x1 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20212_ i1=soc.cpu.minerva.gprf.mem._mem[28][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99542
+.subckt mux2_x1 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20218_ i1=soc.cpu.minerva.gprf.mem._mem[28][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99544
+.subckt mux2_x1 cmd=$abc$109383$new_n27295_ i0=$abc$109383$new_n20224_ i1=soc.cpu.minerva.gprf.mem._mem[28][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99546
 .subckt nand4_x0 i0=$abc$109383$new_n21805_ i1=$abc$109383$new_n21825_ i2=soc.tx_fifo.unbuffered.produce[1] i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb nq=$abc$109383$new_n27334_
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] i1=soc.tx_fifo.unbuffered.storage[2][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99574
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] i1=soc.tx_fifo.unbuffered.storage[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99576
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] i1=soc.tx_fifo.unbuffered.storage[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99578
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] i1=soc.tx_fifo.unbuffered.storage[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99580
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] i1=soc.tx_fifo.unbuffered.storage[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99582
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] i1=soc.tx_fifo.unbuffered.storage[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99584
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] i1=soc.tx_fifo.unbuffered.storage[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99586
-.subckt mx2_x2 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] i1=soc.tx_fifo.unbuffered.storage[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99588
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] i1=soc.tx_fifo.unbuffered.storage[2][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99574
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] i1=soc.tx_fifo.unbuffered.storage[2][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99576
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] i1=soc.tx_fifo.unbuffered.storage[2][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99578
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] i1=soc.tx_fifo.unbuffered.storage[2][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99580
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] i1=soc.tx_fifo.unbuffered.storage[2][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99582
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] i1=soc.tx_fifo.unbuffered.storage[2][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99584
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] i1=soc.tx_fifo.unbuffered.storage[2][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99586
+.subckt mux2_x1 cmd=$abc$109383$new_n27334_ i0=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] i1=soc.tx_fifo.unbuffered.storage[2][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99588
 .subckt nand3_x0 i0=$abc$109383$new_n23997_ i1=$abc$109383$new_n23475_ i2=$abc$109383$new_n19746_ nq=$abc$109383$new_n27343_
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[100][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99590
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[100][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99592
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[100][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99594
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[100][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99596
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[100][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99598
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[100][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99600
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[100][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99602
-.subckt mx2_x2 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[100][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99604
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20255_ i1=soc.ram.ram[100][0] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99590
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20274_ i1=soc.ram.ram[100][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99592
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20278_ i1=soc.ram.ram[100][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99594
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20282_ i1=soc.ram.ram[100][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99596
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20286_ i1=soc.ram.ram[100][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99598
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20290_ i1=soc.ram.ram[100][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99600
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20294_ i1=soc.ram.ram[100][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99602
+.subckt mux2_x1 cmd=$abc$109383$new_n27343_ i0=$abc$109383$new_n20298_ i1=soc.ram.ram[100][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99604
 .subckt nand4_x0 i0=$abc$109383$new_n19828_ i1=$abc$109383$new_n19825_ i2=$abc$109383$new_n20759_ i3=$abc$109383$new_n19821_ nq=$abc$109383$new_n27352_
-.subckt a2_x2 i0=$abc$109383$new_n27352_ i1=soc.cpu.minerva.gprf.mem._mem[4][0] q=$abc$109383$new_n27353_
-.subckt a4_x2 i0=$abc$109383$new_n19838_ i1=$abc$109383$new_n19836_ i2=$abc$109383$new_n20760_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n27354_
-.subckt ao22_x2 i0=$abc$109383$new_n19863_ i1=$abc$109383$new_n19869_ i2=$abc$109383$new_n27354_ q=$abc$109383$new_n27355_
-.subckt o2_x2 i0=$abc$109383$new_n27355_ i1=$abc$109383$new_n27353_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99606
+.subckt and2_x1 i0=$abc$109383$new_n27352_ i1=soc.cpu.minerva.gprf.mem._mem[4][0] q=$abc$109383$new_n27353_
+.subckt and4_x1 i0=$abc$109383$new_n19838_ i1=$abc$109383$new_n19836_ i2=$abc$109383$new_n20760_ i3=$abc$109383$new_n19821_ q=$abc$109383$new_n27354_
+.subckt and21nor_x1 i0=$abc$109383$new_n19863_ i1=$abc$109383$new_n19869_ i2=$abc$109383$new_n27354_ nq=$abc$109383$new_n27355_
+.subckt or2_x1 i0=$abc$109383$new_n27355_ i1=$abc$109383$new_n27353_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99606
 .subckt buf_x4 i=$abc$109383$new_n27352_ q=$abc$109383$new_n27357_
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19898_ i1=soc.cpu.minerva.gprf.mem._mem[4][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99608
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19916_ i1=soc.cpu.minerva.gprf.mem._mem[4][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99610
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19937_ i1=soc.cpu.minerva.gprf.mem._mem[4][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99612
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19955_ i1=soc.cpu.minerva.gprf.mem._mem[4][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99614
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19973_ i1=soc.cpu.minerva.gprf.mem._mem[4][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99616
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19990_ i1=soc.cpu.minerva.gprf.mem._mem[4][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99618
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n20008_ i1=soc.cpu.minerva.gprf.mem._mem[4][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99620
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n20027_ i1=soc.cpu.minerva.gprf.mem._mem[4][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99622
-.subckt mx2_x2 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n20039_ i1=soc.cpu.minerva.gprf.mem._mem[4][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99624
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19898_ i1=soc.cpu.minerva.gprf.mem._mem[4][1] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99608
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19916_ i1=soc.cpu.minerva.gprf.mem._mem[4][2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99610
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19937_ i1=soc.cpu.minerva.gprf.mem._mem[4][3] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99612
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19955_ i1=soc.cpu.minerva.gprf.mem._mem[4][4] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99614
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19973_ i1=soc.cpu.minerva.gprf.mem._mem[4][5] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99616
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n19990_ i1=soc.cpu.minerva.gprf.mem._mem[4][6] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99618
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n20008_ i1=soc.cpu.minerva.gprf.mem._mem[4][7] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99620
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n20027_ i1=soc.cpu.minerva.gprf.mem._mem[4][8] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99622
+.subckt mux2_x1 cmd=$abc$109383$new_n27357_ i0=$abc$109383$new_n20039_ i1=soc.cpu.minerva.gprf.mem._mem[4][9] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99624
 .subckt buf_x4 i=$abc$109383$new_n27352_ q=$abc$109383$new_n27367_
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20052_ i1=soc.cpu.minerva.gprf.mem._mem[4][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99626
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20067_ i1=soc.cpu.minerva.gprf.mem._mem[4][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99628
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20080_ i1=soc.cpu.minerva.gprf.mem._mem[4][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99630
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20094_ i1=soc.cpu.minerva.gprf.mem._mem[4][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99632
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20108_ i1=soc.cpu.minerva.gprf.mem._mem[4][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99634
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20121_ i1=soc.cpu.minerva.gprf.mem._mem[4][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99636
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20132_ i1=soc.cpu.minerva.gprf.mem._mem[4][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99638
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20139_ i1=soc.cpu.minerva.gprf.mem._mem[4][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99640
-.subckt mx2_x2 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20145_ i1=soc.cpu.minerva.gprf.mem._mem[4][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99642
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20052_ i1=soc.cpu.minerva.gprf.mem._mem[4][10] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99626
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20067_ i1=soc.cpu.minerva.gprf.mem._mem[4][11] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99628
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20080_ i1=soc.cpu.minerva.gprf.mem._mem[4][12] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99630
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20094_ i1=soc.cpu.minerva.gprf.mem._mem[4][13] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99632
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20108_ i1=soc.cpu.minerva.gprf.mem._mem[4][14] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99634
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20121_ i1=soc.cpu.minerva.gprf.mem._mem[4][15] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99636
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20132_ i1=soc.cpu.minerva.gprf.mem._mem[4][16] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99638
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20139_ i1=soc.cpu.minerva.gprf.mem._mem[4][17] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99640
+.subckt mux2_x1 cmd=$abc$109383$new_n27367_ i0=$abc$109383$new_n20145_ i1=soc.cpu.minerva.gprf.mem._mem[4][18] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99642
 .subckt buf_x4 i=$abc$109383$new_n27352_ q=$abc$109383$new_n27377_
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20151_ i1=soc.cpu.minerva.gprf.mem._mem[4][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99644
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20158_ i1=soc.cpu.minerva.gprf.mem._mem[4][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99646
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20164_ i1=soc.cpu.minerva.gprf.mem._mem[4][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99648
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20170_ i1=soc.cpu.minerva.gprf.mem._mem[4][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99650
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20176_ i1=soc.cpu.minerva.gprf.mem._mem[4][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99652
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20182_ i1=soc.cpu.minerva.gprf.mem._mem[4][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99654
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20188_ i1=soc.cpu.minerva.gprf.mem._mem[4][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99656
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20194_ i1=soc.cpu.minerva.gprf.mem._mem[4][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99658
-.subckt mx2_x2 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20200_ i1=soc.cpu.minerva.gprf.mem._mem[4][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99660
-.subckt mx2_x2 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20206_ i1=soc.cpu.minerva.gprf.mem._mem[4][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99662
-.subckt mx2_x2 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20212_ i1=soc.cpu.minerva.gprf.mem._mem[4][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99664
-.subckt mx2_x2 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20218_ i1=soc.cpu.minerva.gprf.mem._mem[4][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99666
-.subckt mx2_x2 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20224_ i1=soc.cpu.minerva.gprf.mem._mem[4][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99668
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20151_ i1=soc.cpu.minerva.gprf.mem._mem[4][19] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99644
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20158_ i1=soc.cpu.minerva.gprf.mem._mem[4][20] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99646
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20164_ i1=soc.cpu.minerva.gprf.mem._mem[4][21] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99648
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20170_ i1=soc.cpu.minerva.gprf.mem._mem[4][22] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99650
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20176_ i1=soc.cpu.minerva.gprf.mem._mem[4][23] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99652
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20182_ i1=soc.cpu.minerva.gprf.mem._mem[4][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99654
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20188_ i1=soc.cpu.minerva.gprf.mem._mem[4][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99656
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20194_ i1=soc.cpu.minerva.gprf.mem._mem[4][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99658
+.subckt mux2_x1 cmd=$abc$109383$new_n27377_ i0=$abc$109383$new_n20200_ i1=soc.cpu.minerva.gprf.mem._mem[4][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99660
+.subckt mux2_x1 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20206_ i1=soc.cpu.minerva.gprf.mem._mem[4][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99662
+.subckt mux2_x1 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20212_ i1=soc.cpu.minerva.gprf.mem._mem[4][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99664
+.subckt mux2_x1 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20218_ i1=soc.cpu.minerva.gprf.mem._mem[4][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99666
+.subckt mux2_x1 cmd=$abc$109383$new_n27352_ i0=$abc$109383$new_n20224_ i1=soc.cpu.minerva.gprf.mem._mem[4][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99668
 .subckt nand3_x0 i0=$abc$109383$new_n23997_ i1=$abc$109383$new_n19745_ i2=$abc$109383$new_n20227_ nq=$abc$109383$new_n27391_
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[100][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99670
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[100][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99672
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[100][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99674
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[100][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99676
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[100][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99678
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[100][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99680
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[100][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99682
-.subckt mx2_x2 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[100][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99684
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[100][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99670
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[100][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99672
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[100][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99674
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[100][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99676
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[100][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99678
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[100][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99680
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[100][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99682
+.subckt mux2_x1 cmd=$abc$109383$new_n27391_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[100][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99684
 .subckt nand4_x0 i0=$abc$109383$new_n20257_ i1=$abc$109383$new_n21441_ i2=$abc$109383$new_n20352_ i3=$abc$109383$new_n19740_ nq=$abc$109383$new_n27400_
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[105][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99946
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[105][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99948
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[105][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99950
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[105][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99952
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[105][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99954
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[105][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99956
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[105][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99958
-.subckt mx2_x2 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[105][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99960
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[105][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99946
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[105][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99948
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[105][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99950
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[105][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99952
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[105][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99954
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[105][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99956
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[105][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99958
+.subckt mux2_x1 cmd=$abc$109383$new_n27400_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[105][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99960
 .subckt nand3_x0 i0=$abc$109383$new_n19802_ i1=$abc$109383$new_n21835_ i2=$abc$109383$new_n20227_ nq=$abc$109383$new_n27409_
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[17][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99982
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[17][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99984
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[17][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99986
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[17][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99988
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[17][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99990
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[17][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99992
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[17][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99994
-.subckt mx2_x2 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[17][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99996
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[103][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99998
-.subckt mx2_x2 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[103][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100000
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[17][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99982
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[17][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99984
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21103_ i1=soc.ram.ram[17][26] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99986
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21106_ i1=soc.ram.ram[17][27] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99988
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21109_ i1=soc.ram.ram[17][28] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99990
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n19766_ i1=soc.ram.ram[17][29] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99992
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21113_ i1=soc.ram.ram[17][30] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99994
+.subckt mux2_x1 cmd=$abc$109383$new_n27409_ i0=$abc$109383$new_n21116_ i1=soc.ram.ram[17][31] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99996
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n21317_ i1=soc.ram.ram[103][24] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99998
+.subckt mux2_x1 cmd=$abc$109383$new_n19753_ i0=$abc$109383$new_n21323_ i1=soc.ram.ram[103][25] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100000
 .subckt buf_x4 i=soc.rst_sync1 q=$abc$109383$new_n27420_
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n27421_
 .subckt nor2_x0 i0=soc.timer.bridge.csr_bridge_1.wb__ack i1=$abc$109383$new_n27421_ nq=$abc$109383$new_n27422_
-.subckt a2_x2 i0=$abc$109383$new_n19780_ i1=$abc$109383$new_n19667_ q=$abc$109383$new_n27423_
-.subckt a4_x2 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n19676_ i2=$abc$109383$new_n14802_ i3=$abc$109383$new_n19670_ q=$abc$109383$new_n27424_
-.subckt a4_x2 i0=$abc$109383$new_n27424_ i1=$abc$109383$new_n27423_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n27425_
+.subckt and2_x1 i0=$abc$109383$new_n19780_ i1=$abc$109383$new_n19667_ q=$abc$109383$new_n27423_
+.subckt and4_x1 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n19676_ i2=$abc$109383$new_n14802_ i3=$abc$109383$new_n19670_ q=$abc$109383$new_n27424_
+.subckt and4_x1 i0=$abc$109383$new_n27424_ i1=$abc$109383$new_n27423_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n27425_
 .subckt buf_x4 i=$abc$109383$new_n27425_ q=$abc$109383$new_n27426_
 .subckt buf_x4 i=$abc$109383$new_n27426_ q=$abc$109383$new_n27427_
-.subckt a4_x2 i0=$abc$109383$new_n27427_ i1=$abc$109383$new_n27422_ i2=$abc$109383$new_n19688_ i3=soc.timer.bridge.csr_bridge_1.cycle[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100110
+.subckt and4_x1 i0=$abc$109383$new_n27427_ i1=$abc$109383$new_n27422_ i2=$abc$109383$new_n19688_ i3=soc.timer.bridge.csr_bridge_1.cycle[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100110
 .subckt inv_x1 i=soc.rst_sync1 nq=$abc$109383$new_n27429_
 .subckt buf_x4 i=$abc$109383$new_n27429_ q=$abc$109383$new_n27430_
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n27431_
@@ -12718,49 +12718,49 @@
 .subckt buf_x4 i=$abc$109383$new_n27443_ q=$abc$109383$new_n27444_
 .subckt nand4_x0 i0=$abc$109383$new_n20541_ i1=$abc$109383$new_n27439_ i2=$abc$109383$new_n27444_ i3=$abc$109383$new_n27442_ nq=$abc$109383$new_n27445_
 .subckt buf_x4 i=$abc$109383$new_n27439_ q=$abc$109383$new_n27446_
-.subckt a2_x2 i0=soc.timer.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n27433_ q=$abc$109383$new_n27447_
+.subckt and2_x1 i0=soc.timer.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n27433_ q=$abc$109383$new_n27447_
 .subckt buf_x4 i=$abc$109383$new_n27447_ q=$abc$109383$new_n27448_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19778_ i2=$abc$109383$new_n27446_ nq=$abc$109383$new_n27449_
 .subckt nor3_x0 i0=soc.timer.bridge.csr_bridge_0.cycle[2] i1=soc.timer.bridge.csr_bridge_0.cycle[0] i2=soc.timer.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n27450_
 .subckt buf_x4 i=$abc$109383$new_n27450_ q=$abc$109383$new_n27451_
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20254_ nq=$abc$109383$new_n27452_
 .subckt nand4_x0 i0=$abc$109383$new_n27452_ i1=$abc$109383$new_n27449_ i2=$abc$109383$new_n27445_ i3=$abc$109383$new_n27441_ nq=$abc$109383$new_n27453_
-.subckt a3_x2 i0=$abc$109383$new_n27447_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n27438_ q=$abc$109383$new_n27454_
-.subckt a2_x2 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n27455_
-.subckt a4_x2 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n27438_ i2=soc.timer.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n27434_ q=$abc$109383$new_n27456_
-.subckt a4_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n27438_ i2=$abc$109383$new_n27443_ i3=$abc$109383$new_n27433_ q=$abc$109383$new_n27457_
-.subckt o4_x2 i0=$abc$109383$new_n27457_ i1=$abc$109383$new_n27456_ i2=$abc$109383$new_n27455_ i3=$abc$109383$new_n27454_ q=$abc$109383$new_n27458_
-.subckt a2_x2 i0=$abc$109383$new_n14919_ i1=$abc$109383$new_n20240_ q=$abc$109383$new_n27459_
-.subckt a2_x2 i0=$abc$109383$new_n21994_ i1=$abc$109383$new_n14915_ q=$abc$109383$new_n27460_
-.subckt a2_x2 i0=$abc$109383$new_n14906_ i1=$abc$109383$new_n19652_ q=$abc$109383$new_n27461_
-.subckt a4_x2 i0=$abc$109383$new_n27424_ i1=$abc$109383$new_n27461_ i2=$abc$109383$new_n27460_ i3=$abc$109383$new_n19661_ q=$abc$109383$new_n27462_
+.subckt and3_x1 i0=$abc$109383$new_n27447_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n27438_ q=$abc$109383$new_n27454_
+.subckt and2_x1 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n27455_
+.subckt and4_x1 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n27438_ i2=soc.timer.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n27434_ q=$abc$109383$new_n27456_
+.subckt and4_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n27438_ i2=$abc$109383$new_n27443_ i3=$abc$109383$new_n27433_ q=$abc$109383$new_n27457_
+.subckt or4_x1 i0=$abc$109383$new_n27457_ i1=$abc$109383$new_n27456_ i2=$abc$109383$new_n27455_ i3=$abc$109383$new_n27454_ q=$abc$109383$new_n27458_
+.subckt and2_x1 i0=$abc$109383$new_n14919_ i1=$abc$109383$new_n20240_ q=$abc$109383$new_n27459_
+.subckt and2_x1 i0=$abc$109383$new_n21994_ i1=$abc$109383$new_n14915_ q=$abc$109383$new_n27460_
+.subckt and2_x1 i0=$abc$109383$new_n14906_ i1=$abc$109383$new_n19652_ q=$abc$109383$new_n27461_
+.subckt and4_x1 i0=$abc$109383$new_n27424_ i1=$abc$109383$new_n27461_ i2=$abc$109383$new_n27460_ i3=$abc$109383$new_n19661_ q=$abc$109383$new_n27462_
 .subckt nand4_x0 i0=$abc$109383$new_n27462_ i1=$abc$109383$new_n27459_ i2=$abc$109383$new_n27458_ i3=$abc$109383$new_n27423_ nq=$abc$109383$new_n27463_
-.subckt mx2_x2 cmd=$abc$109383$new_n27463_ i0=$abc$109383$new_n27453_ i1=soc.timer.bridge_timer_reload__r_data[0] q=$abc$109383$new_n27464_
-.subckt o4_x2 i0=$abc$109383$new_n19682_ i1=$abc$109383$new_n19644_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27442_ q=$abc$109383$new_n27465_
+.subckt mux2_x1 cmd=$abc$109383$new_n27463_ i0=$abc$109383$new_n27453_ i1=soc.timer.bridge_timer_reload__r_data[0] q=$abc$109383$new_n27464_
+.subckt or4_x1 i0=$abc$109383$new_n19682_ i1=$abc$109383$new_n19644_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27442_ q=$abc$109383$new_n27465_
 .subckt buf_x4 i=$abc$109383$new_n20241_ q=$abc$109383$new_n27466_
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n21954_ nq=$abc$109383$new_n27467_
-.subckt a2_x2 i0=$abc$109383$new_n27447_ i1=$abc$109383$new_n27439_ q=$abc$109383$new_n27468_
+.subckt and2_x1 i0=$abc$109383$new_n27447_ i1=$abc$109383$new_n27439_ q=$abc$109383$new_n27468_
 .subckt nand2_x0 i0=$abc$109383$new_n27468_ i1=$abc$109383$new_n21940_ nq=$abc$109383$new_n27469_
-.subckt a3_x2 i0=$abc$109383$new_n27439_ i1=$abc$109383$new_n27436_ i2=$abc$109383$new_n27434_ q=$abc$109383$new_n27470_
+.subckt and3_x1 i0=$abc$109383$new_n27439_ i1=$abc$109383$new_n27436_ i2=$abc$109383$new_n27434_ q=$abc$109383$new_n27470_
 .subckt nand2_x0 i0=$abc$109383$new_n27470_ i1=$abc$109383$new_n21945_ nq=$abc$109383$new_n27471_
-.subckt a3_x2 i0=$abc$109383$new_n27438_ i1=$abc$109383$new_n27443_ i2=$abc$109383$new_n27433_ q=$abc$109383$new_n27472_
+.subckt and3_x1 i0=$abc$109383$new_n27438_ i1=$abc$109383$new_n27443_ i2=$abc$109383$new_n27433_ q=$abc$109383$new_n27472_
 .subckt nand2_x0 i0=$abc$109383$new_n27472_ i1=$abc$109383$new_n21950_ nq=$abc$109383$new_n27473_
 .subckt nand4_x0 i0=$abc$109383$new_n27473_ i1=$abc$109383$new_n27471_ i2=$abc$109383$new_n27469_ i3=$abc$109383$new_n27467_ nq=$abc$109383$new_n27474_
 .subckt nand3_x0 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27425_ i2=$abc$109383$new_n27466_ nq=$abc$109383$new_n27475_
 .subckt nand3_x0 i0=$abc$109383$new_n27458_ i1=$abc$109383$new_n27425_ i2=$abc$109383$new_n27466_ nq=$abc$109383$new_n27476_
 .subckt buf_x4 i=$abc$109383$new_n27476_ q=$abc$109383$new_n27477_
-.subckt oa22_x2 i0=$abc$109383$new_n27477_ i1=$abc$109383$new_n27475_ i2=$abc$109383$new_n27465_ q=$abc$109383$new_n27478_
+.subckt or21nand_x1 i0=$abc$109383$new_n27477_ i1=$abc$109383$new_n27475_ i2=$abc$109383$new_n27465_ nq=$abc$109383$new_n27478_
 .subckt buf_x4 i=$abc$109383$new_n27478_ q=$abc$109383$new_n27479_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27464_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[0] q=$abc$109383$new_n27480_
-.subckt a2_x2 i0=$abc$109383$new_n27480_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100114
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27464_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[0] q=$abc$109383$new_n27480_
+.subckt and2_x1 i0=$abc$109383$new_n27480_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100114
 .subckt nand4_x0 i0=$abc$109383$new_n20365_ i1=$abc$109383$new_n27440_ i2=$abc$109383$new_n27437_ i3=$abc$109383$new_n27435_ nq=$abc$109383$new_n27482_
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20273_ nq=$abc$109383$new_n27483_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19789_ i2=$abc$109383$new_n27440_ nq=$abc$109383$new_n27484_
 .subckt nand4_x0 i0=$abc$109383$new_n20555_ i1=$abc$109383$new_n27439_ i2=$abc$109383$new_n27444_ i3=$abc$109383$new_n27442_ nq=$abc$109383$new_n27485_
 .subckt nand4_x0 i0=$abc$109383$new_n27485_ i1=$abc$109383$new_n27484_ i2=$abc$109383$new_n27483_ i3=$abc$109383$new_n27482_ nq=$abc$109383$new_n27486_
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27486_ i1=soc.timer.bridge_timer_reload__r_data[1] q=$abc$109383$new_n27487_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27487_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[1] q=$abc$109383$new_n27488_
-.subckt a2_x2 i0=$abc$109383$new_n27488_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100118
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27486_ i1=soc.timer.bridge_timer_reload__r_data[1] q=$abc$109383$new_n27487_
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27487_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[1] q=$abc$109383$new_n27488_
+.subckt and2_x1 i0=$abc$109383$new_n27488_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100118
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=soc.timer.bridge_timer_reload__r_data[2] nq=$abc$109383$new_n27490_
 .subckt buf_x4 i=$abc$109383$new_n27458_ q=$abc$109383$new_n27491_
 .subckt buf_x4 i=$abc$109383$new_n27423_ q=$abc$109383$new_n27492_
@@ -12771,30 +12771,30 @@
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20277_ nq=$abc$109383$new_n27497_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19734_ i2=$abc$109383$new_n27440_ nq=$abc$109383$new_n27498_
 .subckt nand4_x0 i0=$abc$109383$new_n27498_ i1=$abc$109383$new_n27497_ i2=$abc$109383$new_n27496_ i3=$abc$109383$new_n27495_ nq=$abc$109383$new_n27499_
-.subckt a4_x2 i0=$abc$109383$new_n27499_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27500_
+.subckt and4_x1 i0=$abc$109383$new_n27499_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27500_
 .subckt nand2_x0 i0=$abc$109383$new_n27500_ i1=$abc$109383$new_n27491_ nq=$abc$109383$new_n27501_
 .subckt nand2_x0 i0=$abc$109383$new_n27501_ i1=$abc$109383$new_n27490_ nq=$abc$109383$new_n27502_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27502_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2] q=$abc$109383$new_n27503_
-.subckt a2_x2 i0=$abc$109383$new_n27503_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100122
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27502_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2] q=$abc$109383$new_n27503_
+.subckt and2_x1 i0=$abc$109383$new_n27503_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100122
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20281_ nq=$abc$109383$new_n27505_
 .subckt nand4_x0 i0=$abc$109383$new_n20374_ i1=$abc$109383$new_n27446_ i2=$abc$109383$new_n27437_ i3=$abc$109383$new_n27435_ nq=$abc$109383$new_n27506_
 .subckt nand4_x0 i0=$abc$109383$new_n20563_ i1=$abc$109383$new_n27440_ i2=$abc$109383$new_n27444_ i3=$abc$109383$new_n27442_ nq=$abc$109383$new_n27507_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19757_ i2=$abc$109383$new_n27446_ nq=$abc$109383$new_n27508_
 .subckt nand4_x0 i0=$abc$109383$new_n27508_ i1=$abc$109383$new_n27507_ i2=$abc$109383$new_n27506_ i3=$abc$109383$new_n27505_ nq=$abc$109383$new_n27509_
-.subckt mx2_x2 cmd=$abc$109383$new_n27463_ i0=$abc$109383$new_n27509_ i1=soc.timer.bridge_timer_reload__r_data[3] q=$abc$109383$new_n27510_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27510_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[3] q=$abc$109383$new_n27511_
-.subckt a2_x2 i0=$abc$109383$new_n27511_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100126
+.subckt mux2_x1 cmd=$abc$109383$new_n27463_ i0=$abc$109383$new_n27509_ i1=soc.timer.bridge_timer_reload__r_data[3] q=$abc$109383$new_n27510_
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27510_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[3] q=$abc$109383$new_n27511_
+.subckt and2_x1 i0=$abc$109383$new_n27511_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100126
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=soc.timer.bridge_timer_reload__r_data[4] nq=$abc$109383$new_n27513_
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20285_ nq=$abc$109383$new_n27514_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19762_ i2=$abc$109383$new_n27446_ nq=$abc$109383$new_n27515_
 .subckt nand4_x0 i0=$abc$109383$new_n20379_ i1=$abc$109383$new_n27440_ i2=$abc$109383$new_n27437_ i3=$abc$109383$new_n27435_ nq=$abc$109383$new_n27516_
 .subckt nand4_x0 i0=$abc$109383$new_n20568_ i1=$abc$109383$new_n27439_ i2=$abc$109383$new_n27444_ i3=$abc$109383$new_n27442_ nq=$abc$109383$new_n27517_
 .subckt nand4_x0 i0=$abc$109383$new_n27517_ i1=$abc$109383$new_n27516_ i2=$abc$109383$new_n27515_ i3=$abc$109383$new_n27514_ nq=$abc$109383$new_n27518_
-.subckt a4_x2 i0=$abc$109383$new_n27518_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27519_
+.subckt and4_x1 i0=$abc$109383$new_n27518_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27519_
 .subckt nand2_x0 i0=$abc$109383$new_n27519_ i1=$abc$109383$new_n27491_ nq=$abc$109383$new_n27520_
 .subckt nand2_x0 i0=$abc$109383$new_n27520_ i1=$abc$109383$new_n27513_ nq=$abc$109383$new_n27521_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27521_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4] q=$abc$109383$new_n27522_
-.subckt a2_x2 i0=$abc$109383$new_n27522_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100130
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27521_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4] q=$abc$109383$new_n27522_
+.subckt and2_x1 i0=$abc$109383$new_n27522_ i1=$abc$109383$new_n27432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100130
 .subckt buf_x4 i=$abc$109383$new_n27429_ q=$abc$109383$new_n27524_
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n27525_
 .subckt buf_x4 i=$abc$109383$new_n27525_ q=$abc$109383$new_n27526_
@@ -12803,258 +12803,258 @@
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20289_ nq=$abc$109383$new_n27529_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19765_ i2=$abc$109383$new_n27440_ nq=$abc$109383$new_n27530_
 .subckt nand4_x0 i0=$abc$109383$new_n27530_ i1=$abc$109383$new_n27529_ i2=$abc$109383$new_n27528_ i3=$abc$109383$new_n27527_ nq=$abc$109383$new_n27531_
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27531_ i1=soc.timer.bridge_timer_reload__r_data[5] q=$abc$109383$new_n27532_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27532_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5] q=$abc$109383$new_n27533_
-.subckt a2_x2 i0=$abc$109383$new_n27533_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100134
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27531_ i1=soc.timer.bridge_timer_reload__r_data[5] q=$abc$109383$new_n27532_
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27532_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5] q=$abc$109383$new_n27533_
+.subckt and2_x1 i0=$abc$109383$new_n27533_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100134
 .subckt buf_x4 i=$abc$109383$new_n27429_ q=$abc$109383$new_n27535_
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n27536_
 .subckt nor4_x0 i0=$abc$109383$new_n15136_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27433_ nq=$abc$109383$new_n27537_
-.subckt a4_x2 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27538_
-.subckt a4_x2 i0=$abc$109383$new_n27462_ i1=$abc$109383$new_n27459_ i2=$abc$109383$new_n27458_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27539_
-.subckt ao22_x2 i0=$abc$109383$new_n27539_ i1=$abc$109383$new_n27538_ i2=$abc$109383$new_n27537_ q=$abc$109383$new_n27540_
-.subckt ao22_x2 i0=$abc$109383$new_n27540_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6] i2=$abc$109383$new_n27536_ q=$abc$109383$new_n27541_
+.subckt and4_x1 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27538_
+.subckt and4_x1 i0=$abc$109383$new_n27462_ i1=$abc$109383$new_n27459_ i2=$abc$109383$new_n27458_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27539_
+.subckt and21nor_x1 i0=$abc$109383$new_n27539_ i1=$abc$109383$new_n27538_ i2=$abc$109383$new_n27537_ nq=$abc$109383$new_n27540_
+.subckt and21nor_x1 i0=$abc$109383$new_n27540_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6] i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n27541_
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=soc.timer.bridge_timer_reload__r_data[6] nq=$abc$109383$new_n27542_
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20293_ nq=$abc$109383$new_n27543_
 .subckt nand4_x0 i0=$abc$109383$new_n20576_ i1=$abc$109383$new_n27440_ i2=$abc$109383$new_n27444_ i3=$abc$109383$new_n27442_ nq=$abc$109383$new_n27544_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19770_ i2=$abc$109383$new_n27446_ nq=$abc$109383$new_n27545_
 .subckt nand4_x0 i0=$abc$109383$new_n20387_ i1=$abc$109383$new_n27439_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27435_ nq=$abc$109383$new_n27546_
 .subckt nand4_x0 i0=$abc$109383$new_n27546_ i1=$abc$109383$new_n27545_ i2=$abc$109383$new_n27544_ i3=$abc$109383$new_n27543_ nq=$abc$109383$new_n27547_
-.subckt a4_x2 i0=$abc$109383$new_n27547_ i1=$abc$109383$new_n27462_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27548_
+.subckt and4_x1 i0=$abc$109383$new_n27547_ i1=$abc$109383$new_n27462_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27492_ q=$abc$109383$new_n27548_
 .subckt nand2_x0 i0=$abc$109383$new_n27548_ i1=$abc$109383$new_n27491_ nq=$abc$109383$new_n27549_
 .subckt nand3_x0 i0=$abc$109383$new_n27549_ i1=$abc$109383$new_n27542_ i2=$abc$109383$new_n27540_ nq=$abc$109383$new_n27550_
-.subckt a2_x2 i0=$abc$109383$new_n27550_ i1=$abc$109383$new_n27541_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100138
+.subckt and2_x1 i0=$abc$109383$new_n27550_ i1=$abc$109383$new_n27541_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100138
 .subckt nand4_x0 i0=$abc$109383$new_n20391_ i1=$abc$109383$new_n27446_ i2=$abc$109383$new_n27437_ i3=$abc$109383$new_n27435_ nq=$abc$109383$new_n27552_
 .subckt nand4_x0 i0=$abc$109383$new_n20580_ i1=$abc$109383$new_n27439_ i2=$abc$109383$new_n27444_ i3=$abc$109383$new_n27442_ nq=$abc$109383$new_n27553_
 .subckt nand2_x0 i0=$abc$109383$new_n27451_ i1=$abc$109383$new_n20297_ nq=$abc$109383$new_n27554_
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19774_ i2=$abc$109383$new_n27440_ nq=$abc$109383$new_n27555_
 .subckt nand4_x0 i0=$abc$109383$new_n27555_ i1=$abc$109383$new_n27554_ i2=$abc$109383$new_n27553_ i3=$abc$109383$new_n27552_ nq=$abc$109383$new_n27556_
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27556_ i1=soc.timer.bridge_timer_reload__r_data[7] q=$abc$109383$new_n27557_
-.subckt mx2_x2 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27557_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7] q=$abc$109383$new_n27558_
-.subckt a2_x2 i0=$abc$109383$new_n27558_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100142
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27556_ i1=soc.timer.bridge_timer_reload__r_data[7] q=$abc$109383$new_n27557_
+.subckt mux2_x1 cmd=$abc$109383$new_n27479_ i0=$abc$109383$new_n27557_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7] q=$abc$109383$new_n27558_
+.subckt and2_x1 i0=$abc$109383$new_n27558_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100142
 .subckt buf_x4 i=$abc$109383$new_n27466_ q=$abc$109383$new_n27560_
 .subckt buf_x4 i=$abc$109383$new_n27560_ q=$abc$109383$new_n27561_
-.subckt a4_x2 i0=$abc$109383$new_n27491_ i1=$abc$109383$new_n27448_ i2=$abc$109383$new_n27427_ i3=$abc$109383$new_n27561_ q=$abc$109383$new_n27562_
+.subckt and4_x1 i0=$abc$109383$new_n27491_ i1=$abc$109383$new_n27448_ i2=$abc$109383$new_n27427_ i3=$abc$109383$new_n27561_ q=$abc$109383$new_n27562_
 .subckt nor3_x0 i0=$abc$109383$new_n19684_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n27421_ nq=$abc$109383$new_n27563_
-.subckt a2_x2 i0=$abc$109383$new_n27563_ i1=$abc$109383$new_n27562_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100144
+.subckt and2_x1 i0=$abc$109383$new_n27563_ i1=$abc$109383$new_n27562_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100144
 .subckt buf_x4 i=$abc$109383$new_n19686_ q=$abc$109383$new_n27565_
 .subckt buf_x4 i=$abc$109383$new_n27425_ q=$abc$109383$new_n27566_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_1.cycle[0] nq=$abc$109383$new_n27567_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_1.cycle[2] nq=$abc$109383$new_n27568_
 .subckt buf_x4 i=$abc$109383$new_n27568_ q=$abc$109383$new_n27569_
-.subckt a3_x2 i0=$abc$109383$new_n27569_ i1=$abc$109383$new_n27567_ i2=soc.timer.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n27570_
+.subckt and3_x1 i0=$abc$109383$new_n27569_ i1=$abc$109383$new_n27567_ i2=soc.timer.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n27570_
 .subckt nand2_x0 i0=$abc$109383$new_n27570_ i1=$abc$109383$new_n21950_ nq=$abc$109383$new_n27571_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_1.cycle[1] nq=$abc$109383$new_n27572_
-.subckt a3_x2 i0=$abc$109383$new_n27569_ i1=soc.timer.bridge.csr_bridge_1.cycle[0] i2=$abc$109383$new_n27572_ q=$abc$109383$new_n27573_
+.subckt and3_x1 i0=$abc$109383$new_n27569_ i1=soc.timer.bridge.csr_bridge_1.cycle[0] i2=$abc$109383$new_n27572_ q=$abc$109383$new_n27573_
 .subckt nand2_x0 i0=$abc$109383$new_n27573_ i1=$abc$109383$new_n21945_ nq=$abc$109383$new_n27574_
-.subckt a2_x2 i0=soc.timer.bridge.csr_bridge_1.cycle[0] i1=soc.timer.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n27575_
-.subckt a2_x2 i0=$abc$109383$new_n27575_ i1=$abc$109383$new_n27569_ q=$abc$109383$new_n27576_
+.subckt and2_x1 i0=soc.timer.bridge.csr_bridge_1.cycle[0] i1=soc.timer.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n27575_
+.subckt and2_x1 i0=$abc$109383$new_n27575_ i1=$abc$109383$new_n27569_ q=$abc$109383$new_n27576_
 .subckt nand2_x0 i0=$abc$109383$new_n27576_ i1=$abc$109383$new_n21940_ nq=$abc$109383$new_n27577_
 .subckt nor3_x0 i0=soc.timer.bridge.csr_bridge_1.cycle[2] i1=soc.timer.bridge.csr_bridge_1.cycle[0] i2=soc.timer.bridge.csr_bridge_1.cycle[1] nq=$abc$109383$new_n27578_
 .subckt nand2_x0 i0=$abc$109383$new_n27578_ i1=$abc$109383$new_n21954_ nq=$abc$109383$new_n27579_
 .subckt nand4_x0 i0=$abc$109383$new_n27579_ i1=$abc$109383$new_n27577_ i2=$abc$109383$new_n27574_ i3=$abc$109383$new_n27571_ nq=$abc$109383$new_n27580_
 .subckt nor4_x0 i0=$abc$109383$new_n19683_ i1=$abc$109383$new_n19645_ i2=soc.timer.bridge.csr_bridge_1.cycle[0] i3=soc.timer.bridge.csr_bridge_1.cycle[1] nq=$abc$109383$new_n27581_
-.subckt a4_x2 i0=$abc$109383$new_n27581_ i1=$abc$109383$new_n27580_ i2=$abc$109383$new_n27566_ i3=$abc$109383$new_n27565_ q=$abc$109383$new_n27582_
-.subckt a2_x2 i0=$abc$109383$new_n27582_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100146
+.subckt and4_x1 i0=$abc$109383$new_n27581_ i1=$abc$109383$new_n27580_ i2=$abc$109383$new_n27566_ i3=$abc$109383$new_n27565_ q=$abc$109383$new_n27582_
+.subckt and2_x1 i0=$abc$109383$new_n27582_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100146
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n27584_
 .subckt buf_x4 i=$abc$109383$new_n27584_ q=$abc$109383$new_n27585_
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_en__shadow nq=$abc$109383$new_n27586_
 .subckt buf_x4 i=$abc$109383$new_n20884_ q=$abc$109383$new_n27587_
 .subckt nor2_x0 i0=$abc$109383$new_n27436_ i1=$abc$109383$new_n27433_ nq=$abc$109383$new_n27588_
 .subckt nand3_x0 i0=$abc$109383$new_n27588_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19646_ nq=$abc$109383$new_n27589_
-.subckt oa22_x2 i0=$abc$109383$new_n27477_ i1=$abc$109383$new_n27475_ i2=$abc$109383$new_n27589_ q=$abc$109383$new_n27590_
+.subckt or21nand_x1 i0=$abc$109383$new_n27477_ i1=$abc$109383$new_n27475_ i2=$abc$109383$new_n27589_ nq=$abc$109383$new_n27590_
 .subckt nand2_x0 i0=$abc$109383$new_n27590_ i1=$abc$109383$new_n27586_ nq=$abc$109383$new_n27591_
-.subckt a3_x2 i0=$abc$109383$new_n27588_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19645_ q=$abc$109383$new_n27592_
-.subckt a3_x2 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27425_ i2=$abc$109383$new_n27466_ q=$abc$109383$new_n27593_
+.subckt and3_x1 i0=$abc$109383$new_n27588_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19645_ q=$abc$109383$new_n27592_
+.subckt and3_x1 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27425_ i2=$abc$109383$new_n27466_ q=$abc$109383$new_n27593_
 .subckt buf_x4 i=$abc$109383$new_n21937_ q=$abc$109383$new_n27594_
-.subckt a3_x2 i0=$abc$109383$new_n27491_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n27594_ q=$abc$109383$new_n27595_
-.subckt ao22_x2 i0=$abc$109383$new_n27595_ i1=$abc$109383$new_n27593_ i2=$abc$109383$new_n27592_ q=$abc$109383$new_n27596_
+.subckt and3_x1 i0=$abc$109383$new_n27491_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n27594_ q=$abc$109383$new_n27595_
+.subckt and21nor_x1 i0=$abc$109383$new_n27595_ i1=$abc$109383$new_n27593_ i2=$abc$109383$new_n27592_ nq=$abc$109383$new_n27596_
 .subckt nand4_x0 i0=$abc$109383$new_n27453_ i1=$abc$109383$new_n27491_ i2=$abc$109383$new_n27427_ i3=$abc$109383$new_n27561_ nq=$abc$109383$new_n27597_
 .subckt buf_x4 i=soc.timer.bridge_timer_en__r_data q=$abc$109383$new_n27598_
 .subckt inv_x0 i=$abc$109383$new_n27598_ nq=$abc$109383$new_n27599_
-.subckt ao22_x2 i0=$abc$109383$new_n27599_ i1=$abc$109383$new_n27539_ i2=$abc$109383$new_n27597_ q=$abc$109383$new_n27600_
+.subckt and21nor_x1 i0=$abc$109383$new_n27599_ i1=$abc$109383$new_n27539_ i2=$abc$109383$new_n27597_ nq=$abc$109383$new_n27600_
 .subckt nand2_x0 i0=$abc$109383$new_n27600_ i1=$abc$109383$new_n27596_ nq=$abc$109383$new_n27601_
-.subckt a3_x2 i0=$abc$109383$new_n27601_ i1=$abc$109383$new_n27591_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100150
+.subckt and3_x1 i0=$abc$109383$new_n27601_ i1=$abc$109383$new_n27591_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100150
 .subckt buf_x4 i=$abc$109383$new_n27429_ q=$abc$109383$new_n27603_
-.subckt a3_x2 i0=$abc$109383$new_n27587_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n27603_ q=$abc$109383$new_n27604_
-.subckt a2_x2 i0=$abc$109383$new_n27604_ i1=$abc$109383$new_n27562_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100152
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27453_ i1=soc.timer.bridge_timer_ctr__r_data[0] q=$abc$109383$new_n27606_
+.subckt and3_x1 i0=$abc$109383$new_n27587_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n27603_ q=$abc$109383$new_n27604_
+.subckt and2_x1 i0=$abc$109383$new_n27604_ i1=$abc$109383$new_n27562_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100152
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27453_ i1=soc.timer.bridge_timer_ctr__r_data[0] q=$abc$109383$new_n27606_
 .subckt buf_x4 i=$abc$109383$new_n20237_ q=$abc$109383$new_n27607_
 .subckt nand3_x0 i0=$abc$109383$new_n27588_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n27607_ nq=$abc$109383$new_n27608_
-.subckt oa22_x2 i0=$abc$109383$new_n27477_ i1=$abc$109383$new_n27475_ i2=$abc$109383$new_n27608_ q=$abc$109383$new_n27609_
-.subckt mx2_x2 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27606_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[0] q=$abc$109383$new_n27610_
-.subckt a2_x2 i0=$abc$109383$new_n27610_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100156
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27486_ i1=soc.timer.bridge_timer_ctr__r_data[1] q=$abc$109383$new_n27612_
-.subckt mx2_x2 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27612_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[1] q=$abc$109383$new_n27613_
-.subckt a2_x2 i0=$abc$109383$new_n27613_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100160
+.subckt or21nand_x1 i0=$abc$109383$new_n27477_ i1=$abc$109383$new_n27475_ i2=$abc$109383$new_n27608_ nq=$abc$109383$new_n27609_
+.subckt mux2_x1 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27606_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[0] q=$abc$109383$new_n27610_
+.subckt and2_x1 i0=$abc$109383$new_n27610_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100156
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27486_ i1=soc.timer.bridge_timer_ctr__r_data[1] q=$abc$109383$new_n27612_
+.subckt mux2_x1 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27612_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[1] q=$abc$109383$new_n27613_
+.subckt and2_x1 i0=$abc$109383$new_n27613_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100160
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=soc.timer.bridge_timer_ctr__r_data[2] nq=$abc$109383$new_n27615_
 .subckt nand2_x0 i0=$abc$109383$new_n27615_ i1=$abc$109383$new_n27501_ nq=$abc$109383$new_n27616_
-.subckt mx2_x2 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27616_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[2] q=$abc$109383$new_n27617_
-.subckt a2_x2 i0=$abc$109383$new_n27617_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100164
-.subckt mx2_x2 cmd=$abc$109383$new_n27463_ i0=$abc$109383$new_n27509_ i1=soc.timer.bridge_timer_ctr__r_data[3] q=$abc$109383$new_n27619_
-.subckt mx2_x2 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27619_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[3] q=$abc$109383$new_n27620_
-.subckt a2_x2 i0=$abc$109383$new_n27620_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100168
-.subckt a3_x2 i0=$abc$109383$new_n27588_ i1=$abc$109383$new_n19782_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n27622_
-.subckt ao22_x2 i0=$abc$109383$new_n27539_ i1=$abc$109383$new_n27538_ i2=$abc$109383$new_n27622_ q=$abc$109383$new_n27623_
-.subckt ao22_x2 i0=$abc$109383$new_n27623_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[4] i2=$abc$109383$new_n27536_ q=$abc$109383$new_n27624_
+.subckt mux2_x1 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27616_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[2] q=$abc$109383$new_n27617_
+.subckt and2_x1 i0=$abc$109383$new_n27617_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100164
+.subckt mux2_x1 cmd=$abc$109383$new_n27463_ i0=$abc$109383$new_n27509_ i1=soc.timer.bridge_timer_ctr__r_data[3] q=$abc$109383$new_n27619_
+.subckt mux2_x1 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27619_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[3] q=$abc$109383$new_n27620_
+.subckt and2_x1 i0=$abc$109383$new_n27620_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100168
+.subckt and3_x1 i0=$abc$109383$new_n27588_ i1=$abc$109383$new_n19782_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n27622_
+.subckt and21nor_x1 i0=$abc$109383$new_n27539_ i1=$abc$109383$new_n27538_ i2=$abc$109383$new_n27622_ nq=$abc$109383$new_n27623_
+.subckt and21nor_x1 i0=$abc$109383$new_n27623_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[4] i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n27624_
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=soc.timer.bridge_timer_ctr__r_data[4] nq=$abc$109383$new_n27625_
 .subckt nand3_x0 i0=$abc$109383$new_n27625_ i1=$abc$109383$new_n27623_ i2=$abc$109383$new_n27520_ nq=$abc$109383$new_n27626_
-.subckt a2_x2 i0=$abc$109383$new_n27626_ i1=$abc$109383$new_n27624_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100172
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27531_ i1=soc.timer.bridge_timer_ctr__r_data[5] q=$abc$109383$new_n27628_
-.subckt mx2_x2 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27628_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[5] q=$abc$109383$new_n27629_
-.subckt a2_x2 i0=$abc$109383$new_n27629_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100176
-.subckt ao22_x2 i0=$abc$109383$new_n27623_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[6] i2=$abc$109383$new_n27536_ q=$abc$109383$new_n27631_
+.subckt and2_x1 i0=$abc$109383$new_n27626_ i1=$abc$109383$new_n27624_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100172
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27531_ i1=soc.timer.bridge_timer_ctr__r_data[5] q=$abc$109383$new_n27628_
+.subckt mux2_x1 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27628_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[5] q=$abc$109383$new_n27629_
+.subckt and2_x1 i0=$abc$109383$new_n27629_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100176
+.subckt and21nor_x1 i0=$abc$109383$new_n27623_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[6] i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n27631_
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=soc.timer.bridge_timer_ctr__r_data[6] nq=$abc$109383$new_n27632_
 .subckt nand3_x0 i0=$abc$109383$new_n27632_ i1=$abc$109383$new_n27623_ i2=$abc$109383$new_n27549_ nq=$abc$109383$new_n27633_
-.subckt a2_x2 i0=$abc$109383$new_n27633_ i1=$abc$109383$new_n27631_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100180
-.subckt mx2_x2 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27556_ i1=soc.timer.bridge_timer_ctr__r_data[7] q=$abc$109383$new_n27635_
-.subckt mx2_x2 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27635_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7] q=$abc$109383$new_n27636_
-.subckt a2_x2 i0=$abc$109383$new_n27636_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100184
+.subckt and2_x1 i0=$abc$109383$new_n27633_ i1=$abc$109383$new_n27631_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100180
+.subckt mux2_x1 cmd=$abc$109383$new_n27477_ i0=$abc$109383$new_n27556_ i1=soc.timer.bridge_timer_ctr__r_data[7] q=$abc$109383$new_n27635_
+.subckt mux2_x1 cmd=$abc$109383$new_n27609_ i0=$abc$109383$new_n27635_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7] q=$abc$109383$new_n27636_
+.subckt and2_x1 i0=$abc$109383$new_n27636_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100184
 .subckt buf_x4 i=$abc$109383$new_n27423_ q=$abc$109383$new_n27638_
 .subckt buf_x4 i=$abc$109383$new_n27638_ q=$abc$109383$new_n27639_
 .subckt buf_x4 i=$abc$109383$new_n27494_ q=$abc$109383$new_n27640_
 .subckt nand4_x0 i0=$abc$109383$new_n27640_ i1=$abc$109383$new_n27639_ i2=$abc$109383$new_n19749_ i3=$abc$109383$new_n27569_ nq=$abc$109383$new_n27641_
 .subckt nand2_x0 i0=$abc$109383$new_n27641_ i1=$abc$109383$new_n27567_ nq=$abc$109383$new_n27642_
-.subckt a3_x2 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n19676_ i2=$abc$109383$new_n19670_ q=$abc$109383$new_n27643_
-.subckt a4_x2 i0=$abc$109383$new_n27423_ i1=$abc$109383$new_n27643_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14802_ q=$abc$109383$new_n27644_
+.subckt and3_x1 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n19676_ i2=$abc$109383$new_n19670_ q=$abc$109383$new_n27643_
+.subckt and4_x1 i0=$abc$109383$new_n27423_ i1=$abc$109383$new_n27643_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14802_ q=$abc$109383$new_n27644_
 .subckt buf_x4 i=$abc$109383$new_n27644_ q=$abc$109383$new_n27645_
 .subckt buf_x4 i=$abc$109383$new_n27645_ q=$abc$109383$new_n27646_
-.subckt a2_x2 i0=$abc$109383$new_n27569_ i1=soc.timer.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n27647_
+.subckt and2_x1 i0=$abc$109383$new_n27569_ i1=soc.timer.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n27647_
 .subckt nand3_x0 i0=$abc$109383$new_n27647_ i1=$abc$109383$new_n27646_ i2=$abc$109383$new_n19749_ nq=$abc$109383$new_n27648_
-.subckt a3_x2 i0=$abc$109383$new_n27648_ i1=$abc$109383$new_n27642_ i2=$abc$109383$new_n27422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100204
-.subckt a3_x2 i0=$abc$109383$new_n27647_ i1=$abc$109383$new_n27646_ i2=$abc$109383$new_n19749_ q=$abc$109383$new_n27650_
-.subckt nxr2_x1 i0=$abc$109383$new_n27650_ i1=$abc$109383$new_n27572_ nq=$abc$109383$new_n27651_
-.subckt a2_x2 i0=$abc$109383$new_n27651_ i1=$abc$109383$new_n27422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100208
+.subckt and3_x1 i0=$abc$109383$new_n27648_ i1=$abc$109383$new_n27642_ i2=$abc$109383$new_n27422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100204
+.subckt and3_x1 i0=$abc$109383$new_n27647_ i1=$abc$109383$new_n27646_ i2=$abc$109383$new_n19749_ q=$abc$109383$new_n27650_
+.subckt nexor2_x0 i0=$abc$109383$new_n27650_ i1=$abc$109383$new_n27572_ nq=$abc$109383$new_n27651_
+.subckt and2_x1 i0=$abc$109383$new_n27651_ i1=$abc$109383$new_n27422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100208
 .subckt nand3_x0 i0=$abc$109383$new_n27576_ i1=$abc$109383$new_n27646_ i2=$abc$109383$new_n19749_ nq=$abc$109383$new_n27653_
 .subckt nand2_x0 i0=$abc$109383$new_n27653_ i1=$abc$109383$new_n27569_ nq=$abc$109383$new_n27654_
-.subckt a2_x2 i0=$abc$109383$new_n27654_ i1=$abc$109383$new_n27422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100212
+.subckt and2_x1 i0=$abc$109383$new_n27654_ i1=$abc$109383$new_n27422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100212
 .subckt nor2_x0 i0=soc.timer.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n15124_ nq=$abc$109383$new_n27656_
-.subckt a4_x2 i0=$abc$109383$new_n27656_ i1=$abc$109383$new_n27427_ i2=$abc$109383$new_n27561_ i3=soc.timer.bridge.csr_bridge_0.cycle[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100214
+.subckt and4_x1 i0=$abc$109383$new_n27656_ i1=$abc$109383$new_n27427_ i2=$abc$109383$new_n27561_ i3=soc.timer.bridge.csr_bridge_0.cycle[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100214
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow i1=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow_en[0] nq=$abc$109383$new_n27658_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow_en[0] i1=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow nq=$abc$109383$new_n27659_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow_en[0] i1=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow nq=$abc$109383$new_n27660_
 .subckt nand3_x0 i0=$abc$109383$new_n27660_ i1=$abc$109383$new_n27659_ i2=$abc$109383$new_n27658_ nq=$abc$109383$new_n27661_
 .subckt nand3_x0 i0=$abc$109383$new_n27427_ i1=$abc$109383$new_n19687_ i2=soc.timer.bridge.csr_bridge_1.cycle[2] nq=$abc$109383$new_n27662_
-.subckt mx2_x2 cmd=$abc$109383$new_n27662_ i0=$abc$109383$new_n27661_ i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[24] q=$abc$109383$new_n27663_
-.subckt a2_x2 i0=$abc$109383$new_n27663_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100218
+.subckt mux2_x1 cmd=$abc$109383$new_n27662_ i0=$abc$109383$new_n27661_ i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[24] q=$abc$109383$new_n27663_
+.subckt and2_x1 i0=$abc$109383$new_n27663_ i1=$abc$109383$new_n27526_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100218
 .subckt buf_x4 i=$abc$109383$new_n27493_ q=$abc$109383$new_n27665_
-.subckt a3_x2 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n27446_ q=$abc$109383$new_n27666_
-.subckt nxr2_x1 i0=$abc$109383$new_n27666_ i1=$abc$109383$new_n27444_ nq=$abc$109383$new_n27667_
-.subckt a2_x2 i0=$abc$109383$new_n27667_ i1=$abc$109383$new_n27656_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100238
+.subckt and3_x1 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n27446_ q=$abc$109383$new_n27666_
+.subckt nexor2_x0 i0=$abc$109383$new_n27666_ i1=$abc$109383$new_n27444_ nq=$abc$109383$new_n27667_
+.subckt and2_x1 i0=$abc$109383$new_n27667_ i1=$abc$109383$new_n27656_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100238
 .subckt nand4_x0 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n27446_ i3=$abc$109383$new_n27437_ nq=$abc$109383$new_n27669_
 .subckt nand2_x0 i0=$abc$109383$new_n27669_ i1=$abc$109383$new_n27435_ nq=$abc$109383$new_n27670_
 .subckt nand3_x0 i0=$abc$109383$new_n27468_ i1=$abc$109383$new_n27426_ i2=$abc$109383$new_n27560_ nq=$abc$109383$new_n27671_
 .subckt buf_x4 i=$abc$109383$new_n27671_ q=$abc$109383$new_n27672_
-.subckt a2_x2 i0=$abc$109383$new_n27656_ i1=$abc$109383$new_n27672_ q=$abc$109383$new_n27673_
-.subckt a2_x2 i0=$abc$109383$new_n27673_ i1=$abc$109383$new_n27670_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100242
-.subckt a4_x2 i0=$abc$109383$new_n27640_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n27468_ i3=$abc$109383$new_n27639_ q=$abc$109383$new_n27675_
-.subckt ao22_x2 i0=soc.timer.bridge.csr_bridge_0.cycle[2] i1=$abc$109383$new_n27675_ i2=$abc$109383$new_n27656_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100246
+.subckt and2_x1 i0=$abc$109383$new_n27656_ i1=$abc$109383$new_n27672_ q=$abc$109383$new_n27673_
+.subckt and2_x1 i0=$abc$109383$new_n27673_ i1=$abc$109383$new_n27670_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100242
+.subckt and4_x1 i0=$abc$109383$new_n27640_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n27468_ i3=$abc$109383$new_n27639_ q=$abc$109383$new_n27675_
+.subckt and21nor_x1 i0=soc.timer.bridge.csr_bridge_0.cycle[2] i1=$abc$109383$new_n27675_ i2=$abc$109383$new_n27656_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100246
 .subckt buf_x4 i=$abc$109383$new_n27525_ q=$abc$109383$new_n27677_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_en__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_en__shadow nq=$abc$109383$new_n27678_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24] nq=$abc$109383$new_n27679_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8] nq=$abc$109383$new_n27680_
-.subckt a3_x2 i0=$abc$109383$new_n27680_ i1=$abc$109383$new_n27679_ i2=$abc$109383$new_n27678_ q=$abc$109383$new_n27681_
+.subckt and3_x1 i0=$abc$109383$new_n27680_ i1=$abc$109383$new_n27679_ i2=$abc$109383$new_n27678_ q=$abc$109383$new_n27681_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[16] nq=$abc$109383$new_n27682_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[0] nq=$abc$109383$new_n27683_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[16] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27684_
-.subckt a3_x2 i0=$abc$109383$new_n27684_ i1=$abc$109383$new_n27683_ i2=$abc$109383$new_n27682_ q=$abc$109383$new_n27685_
+.subckt and3_x1 i0=$abc$109383$new_n27684_ i1=$abc$109383$new_n27683_ i2=$abc$109383$new_n27682_ q=$abc$109383$new_n27685_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[0] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27686_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[8] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27687_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[24] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27688_
-.subckt a3_x2 i0=$abc$109383$new_n27688_ i1=$abc$109383$new_n27687_ i2=$abc$109383$new_n27686_ q=$abc$109383$new_n27689_
+.subckt and3_x1 i0=$abc$109383$new_n27688_ i1=$abc$109383$new_n27687_ i2=$abc$109383$new_n27686_ q=$abc$109383$new_n27689_
 .subckt nand3_x0 i0=$abc$109383$new_n27689_ i1=$abc$109383$new_n27685_ i2=$abc$109383$new_n27681_ nq=$abc$109383$new_n27690_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[16] q=$abc$109383$new_n27691_
-.subckt a2_x2 i0=$abc$109383$new_n27691_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100250
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[16] q=$abc$109383$new_n27691_
+.subckt and2_x1 i0=$abc$109383$new_n27691_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100250
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[17] nq=$abc$109383$new_n27693_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[1] nq=$abc$109383$new_n27694_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9] nq=$abc$109383$new_n27695_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[17] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27696_
-.subckt a4_x2 i0=$abc$109383$new_n27696_ i1=$abc$109383$new_n27695_ i2=$abc$109383$new_n27694_ i3=$abc$109383$new_n27693_ q=$abc$109383$new_n27697_
+.subckt and4_x1 i0=$abc$109383$new_n27696_ i1=$abc$109383$new_n27695_ i2=$abc$109383$new_n27694_ i3=$abc$109383$new_n27693_ q=$abc$109383$new_n27697_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27698_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25] nq=$abc$109383$new_n27699_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[9] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27700_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[1] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27701_
-.subckt a4_x2 i0=$abc$109383$new_n27701_ i1=$abc$109383$new_n27700_ i2=$abc$109383$new_n27699_ i3=$abc$109383$new_n27698_ q=$abc$109383$new_n27702_
+.subckt and4_x1 i0=$abc$109383$new_n27701_ i1=$abc$109383$new_n27700_ i2=$abc$109383$new_n27699_ i3=$abc$109383$new_n27698_ q=$abc$109383$new_n27702_
 .subckt nand2_x0 i0=$abc$109383$new_n27702_ i1=$abc$109383$new_n27697_ nq=$abc$109383$new_n27703_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[17] q=$abc$109383$new_n27704_
-.subckt a2_x2 i0=$abc$109383$new_n27704_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100254
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[17] q=$abc$109383$new_n27704_
+.subckt and2_x1 i0=$abc$109383$new_n27704_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100254
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[18] nq=$abc$109383$new_n27706_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[2] nq=$abc$109383$new_n27707_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[10] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27708_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[18] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27709_
-.subckt a4_x2 i0=$abc$109383$new_n27709_ i1=$abc$109383$new_n27708_ i2=$abc$109383$new_n27707_ i3=$abc$109383$new_n27706_ q=$abc$109383$new_n27710_
+.subckt and4_x1 i0=$abc$109383$new_n27709_ i1=$abc$109383$new_n27708_ i2=$abc$109383$new_n27707_ i3=$abc$109383$new_n27706_ q=$abc$109383$new_n27710_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27711_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26] nq=$abc$109383$new_n27712_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10] nq=$abc$109383$new_n27713_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27714_
-.subckt a4_x2 i0=$abc$109383$new_n27714_ i1=$abc$109383$new_n27713_ i2=$abc$109383$new_n27712_ i3=$abc$109383$new_n27711_ q=$abc$109383$new_n27715_
+.subckt and4_x1 i0=$abc$109383$new_n27714_ i1=$abc$109383$new_n27713_ i2=$abc$109383$new_n27712_ i3=$abc$109383$new_n27711_ q=$abc$109383$new_n27715_
 .subckt nand2_x0 i0=$abc$109383$new_n27715_ i1=$abc$109383$new_n27710_ nq=$abc$109383$new_n27716_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n27717_
-.subckt a2_x2 i0=$abc$109383$new_n27717_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100258
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n27717_
+.subckt and2_x1 i0=$abc$109383$new_n27717_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100258
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[3] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27719_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[3] nq=$abc$109383$new_n27720_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[11] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27721_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[19] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27722_
-.subckt a4_x2 i0=$abc$109383$new_n27722_ i1=$abc$109383$new_n27721_ i2=$abc$109383$new_n27720_ i3=$abc$109383$new_n27719_ q=$abc$109383$new_n27723_
+.subckt and4_x1 i0=$abc$109383$new_n27722_ i1=$abc$109383$new_n27721_ i2=$abc$109383$new_n27720_ i3=$abc$109383$new_n27719_ q=$abc$109383$new_n27723_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[27] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27724_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[19] nq=$abc$109383$new_n27725_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27] nq=$abc$109383$new_n27726_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11] nq=$abc$109383$new_n27727_
-.subckt a4_x2 i0=$abc$109383$new_n27727_ i1=$abc$109383$new_n27726_ i2=$abc$109383$new_n27725_ i3=$abc$109383$new_n27724_ q=$abc$109383$new_n27728_
+.subckt and4_x1 i0=$abc$109383$new_n27727_ i1=$abc$109383$new_n27726_ i2=$abc$109383$new_n27725_ i3=$abc$109383$new_n27724_ q=$abc$109383$new_n27728_
 .subckt nand2_x0 i0=$abc$109383$new_n27728_ i1=$abc$109383$new_n27723_ nq=$abc$109383$new_n27729_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[19] q=$abc$109383$new_n27730_
-.subckt a2_x2 i0=$abc$109383$new_n27730_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100262
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[19] q=$abc$109383$new_n27730_
+.subckt and2_x1 i0=$abc$109383$new_n27730_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100262
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12] nq=$abc$109383$new_n27732_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28] nq=$abc$109383$new_n27733_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[20] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27734_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27735_
-.subckt a4_x2 i0=$abc$109383$new_n27735_ i1=$abc$109383$new_n27734_ i2=$abc$109383$new_n27733_ i3=$abc$109383$new_n27732_ q=$abc$109383$new_n27736_
+.subckt and4_x1 i0=$abc$109383$new_n27735_ i1=$abc$109383$new_n27734_ i2=$abc$109383$new_n27733_ i3=$abc$109383$new_n27732_ q=$abc$109383$new_n27736_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[4] nq=$abc$109383$new_n27737_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[20] nq=$abc$109383$new_n27738_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27739_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[12] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27740_
-.subckt a4_x2 i0=$abc$109383$new_n27740_ i1=$abc$109383$new_n27739_ i2=$abc$109383$new_n27738_ i3=$abc$109383$new_n27737_ q=$abc$109383$new_n27741_
+.subckt and4_x1 i0=$abc$109383$new_n27740_ i1=$abc$109383$new_n27739_ i2=$abc$109383$new_n27738_ i3=$abc$109383$new_n27737_ q=$abc$109383$new_n27741_
 .subckt nand2_x0 i0=$abc$109383$new_n27741_ i1=$abc$109383$new_n27736_ nq=$abc$109383$new_n27742_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[20] q=$abc$109383$new_n27743_
-.subckt a2_x2 i0=$abc$109383$new_n27743_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100266
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[20] q=$abc$109383$new_n27743_
+.subckt and2_x1 i0=$abc$109383$new_n27743_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100266
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13] nq=$abc$109383$new_n27745_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27746_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27747_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[5] nq=$abc$109383$new_n27748_
-.subckt a4_x2 i0=$abc$109383$new_n27748_ i1=$abc$109383$new_n27747_ i2=$abc$109383$new_n27746_ i3=$abc$109383$new_n27745_ q=$abc$109383$new_n27749_
+.subckt and4_x1 i0=$abc$109383$new_n27748_ i1=$abc$109383$new_n27747_ i2=$abc$109383$new_n27746_ i3=$abc$109383$new_n27745_ q=$abc$109383$new_n27749_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21] nq=$abc$109383$new_n27750_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27751_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27752_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29] nq=$abc$109383$new_n27753_
-.subckt a4_x2 i0=$abc$109383$new_n27753_ i1=$abc$109383$new_n27752_ i2=$abc$109383$new_n27751_ i3=$abc$109383$new_n27750_ q=$abc$109383$new_n27754_
+.subckt and4_x1 i0=$abc$109383$new_n27753_ i1=$abc$109383$new_n27752_ i2=$abc$109383$new_n27751_ i3=$abc$109383$new_n27750_ q=$abc$109383$new_n27754_
 .subckt nand2_x0 i0=$abc$109383$new_n27754_ i1=$abc$109383$new_n27749_ nq=$abc$109383$new_n27755_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[21] q=$abc$109383$new_n27756_
-.subckt a2_x2 i0=$abc$109383$new_n27756_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100270
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[21] q=$abc$109383$new_n27756_
+.subckt and2_x1 i0=$abc$109383$new_n27756_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100270
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[14] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27758_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[14] nq=$abc$109383$new_n27759_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[22] nq=$abc$109383$new_n27760_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27761_
-.subckt a4_x2 i0=$abc$109383$new_n27761_ i1=$abc$109383$new_n27760_ i2=$abc$109383$new_n27759_ i3=$abc$109383$new_n27758_ q=$abc$109383$new_n27762_
+.subckt and4_x1 i0=$abc$109383$new_n27761_ i1=$abc$109383$new_n27760_ i2=$abc$109383$new_n27759_ i3=$abc$109383$new_n27758_ q=$abc$109383$new_n27762_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[6] nq=$abc$109383$new_n27763_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[22] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27764_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27765_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30] nq=$abc$109383$new_n27766_
-.subckt a4_x2 i0=$abc$109383$new_n27766_ i1=$abc$109383$new_n27765_ i2=$abc$109383$new_n27764_ i3=$abc$109383$new_n27763_ q=$abc$109383$new_n27767_
+.subckt and4_x1 i0=$abc$109383$new_n27766_ i1=$abc$109383$new_n27765_ i2=$abc$109383$new_n27764_ i3=$abc$109383$new_n27763_ q=$abc$109383$new_n27767_
 .subckt nand2_x0 i0=$abc$109383$new_n27767_ i1=$abc$109383$new_n27762_ nq=$abc$109383$new_n27768_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[22] q=$abc$109383$new_n27769_
-.subckt a2_x2 i0=$abc$109383$new_n27769_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100274
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[22] q=$abc$109383$new_n27769_
+.subckt and2_x1 i0=$abc$109383$new_n27769_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100274
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1] nq=$abc$109383$new_n27771_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7] nq=$abc$109383$new_n27772_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0] nq=$abc$109383$new_n27773_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3] nq=$abc$109383$new_n27774_
-.subckt a4_x2 i0=$abc$109383$new_n27774_ i1=$abc$109383$new_n27773_ i2=$abc$109383$new_n27772_ i3=$abc$109383$new_n27771_ q=$abc$109383$new_n27775_
+.subckt and4_x1 i0=$abc$109383$new_n27774_ i1=$abc$109383$new_n27773_ i2=$abc$109383$new_n27772_ i3=$abc$109383$new_n27771_ q=$abc$109383$new_n27775_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[23] nq=$abc$109383$new_n27776_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2] nq=$abc$109383$new_n27777_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15] nq=$abc$109383$new_n27778_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3] i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31] nq=$abc$109383$new_n27779_
-.subckt a4_x2 i0=$abc$109383$new_n27779_ i1=$abc$109383$new_n27778_ i2=$abc$109383$new_n27777_ i3=$abc$109383$new_n27776_ q=$abc$109383$new_n27780_
+.subckt and4_x1 i0=$abc$109383$new_n27779_ i1=$abc$109383$new_n27778_ i2=$abc$109383$new_n27777_ i3=$abc$109383$new_n27776_ q=$abc$109383$new_n27780_
 .subckt nand2_x0 i0=$abc$109383$new_n27780_ i1=$abc$109383$new_n27775_ nq=$abc$109383$new_n27781_
-.subckt mx2_x2 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[23] q=$abc$109383$new_n27782_
-.subckt a2_x2 i0=$abc$109383$new_n27782_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100278
+.subckt mux2_x1 cmd=$abc$109383$new_n27672_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[23] q=$abc$109383$new_n27782_
+.subckt and2_x1 i0=$abc$109383$new_n27782_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100278
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[10] nq=$abc$109383$new_n27784_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[11] nq=$abc$109383$new_n27785_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[12] nq=$abc$109383$new_n27786_
@@ -13065,70 +13065,70 @@
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[5] nq=$abc$109383$new_n27791_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[6] nq=$abc$109383$new_n27792_
 .subckt nor4_x0 i0=soc.timer.bridge_timer_ctr__r_data[3] i1=soc.timer.bridge_timer_ctr__r_data[2] i2=soc.timer.bridge_timer_ctr__r_data[1] i3=soc.timer.bridge_timer_ctr__r_data[0] nq=$abc$109383$new_n27793_
-.subckt a4_x2 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27792_ i2=$abc$109383$new_n27791_ i3=$abc$109383$new_n27790_ q=$abc$109383$new_n27794_
-.subckt a4_x2 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27789_ i2=$abc$109383$new_n27788_ i3=$abc$109383$new_n27787_ q=$abc$109383$new_n27795_
+.subckt and4_x1 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27792_ i2=$abc$109383$new_n27791_ i3=$abc$109383$new_n27790_ q=$abc$109383$new_n27794_
+.subckt and4_x1 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27789_ i2=$abc$109383$new_n27788_ i3=$abc$109383$new_n27787_ q=$abc$109383$new_n27795_
 .subckt nand4_x0 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27786_ i2=$abc$109383$new_n27785_ i3=$abc$109383$new_n27784_ nq=$abc$109383$new_n27796_
 .subckt buf_x4 i=$abc$109383$new_n27796_ q=$abc$109383$new_n27797_
 .subckt buf_x4 i=$abc$109383$new_n27797_ q=$abc$109383$new_n27798_
-.subckt o3_x2 i0=soc.timer.bridge_timer_ctr__r_data[15] i1=soc.timer.bridge_timer_ctr__r_data[14] i2=soc.timer.bridge_timer_ctr__r_data[13] q=$abc$109383$new_n27799_
+.subckt or3_x1 i0=soc.timer.bridge_timer_ctr__r_data[15] i1=soc.timer.bridge_timer_ctr__r_data[14] i2=soc.timer.bridge_timer_ctr__r_data[13] q=$abc$109383$new_n27799_
 .subckt buf_x4 i=$abc$109383$new_n27799_ q=$abc$109383$new_n27800_
 .subckt buf_x4 i=$abc$109383$new_n27800_ q=$abc$109383$new_n27801_
 .subckt nor4_x0 i0=soc.timer.bridge_timer_ctr__r_data[31] i1=soc.timer.bridge_timer_ctr__r_data[28] i2=soc.timer.bridge_timer_ctr__r_data[27] i3=soc.timer.bridge_timer_ctr__r_data[24] nq=$abc$109383$new_n27802_
 .subckt nor3_x0 i0=soc.timer.bridge_timer_ctr__r_data[20] i1=soc.timer.bridge_timer_ctr__r_data[19] i2=soc.timer.bridge_timer_ctr__r_data[18] nq=$abc$109383$new_n27803_
-.subckt a2_x2 i0=$abc$109383$new_n27803_ i1=$abc$109383$new_n27802_ q=$abc$109383$new_n27804_
+.subckt and2_x1 i0=$abc$109383$new_n27803_ i1=$abc$109383$new_n27802_ q=$abc$109383$new_n27804_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[23] nq=$abc$109383$new_n27805_
 .subckt nor4_x0 i0=soc.timer.bridge_timer_ctr__r_data[30] i1=soc.timer.bridge_timer_ctr__r_data[29] i2=soc.timer.bridge_timer_ctr__r_data[22] i3=soc.timer.bridge_timer_ctr__r_data[21] nq=$abc$109383$new_n27806_
 .subckt nor4_x0 i0=soc.timer.bridge_timer_ctr__r_data[26] i1=soc.timer.bridge_timer_ctr__r_data[25] i2=soc.timer.bridge_timer_ctr__r_data[17] i3=soc.timer.bridge_timer_ctr__r_data[16] nq=$abc$109383$new_n27807_
-.subckt a3_x2 i0=$abc$109383$new_n27807_ i1=$abc$109383$new_n27806_ i2=$abc$109383$new_n27805_ q=$abc$109383$new_n27808_
+.subckt and3_x1 i0=$abc$109383$new_n27807_ i1=$abc$109383$new_n27806_ i2=$abc$109383$new_n27805_ q=$abc$109383$new_n27808_
 .subckt nand2_x0 i0=$abc$109383$new_n27808_ i1=$abc$109383$new_n27804_ nq=$abc$109383$new_n27809_
 .subckt buf_x4 i=$abc$109383$new_n27809_ q=$abc$109383$new_n27810_
 .subckt buf_x4 i=$abc$109383$new_n27810_ q=$abc$109383$new_n27811_
 .subckt nand2_x0 i0=$abc$109383$new_n27598_ i1=$abc$109383$new_n27535_ nq=$abc$109383$new_n27812_
 .subckt nor4_x0 i0=$abc$109383$new_n27812_ i1=$abc$109383$new_n27811_ i2=$abc$109383$new_n27801_ i3=$abc$109383$new_n27798_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100280
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow i1=soc.timer.bridge.csr_mux_1.timer_ev_pending__w_stb nq=$abc$109383$new_n27814_
-.subckt a3_x2 i0=$abc$109383$new_n27814_ i1=soc.timer.bridge._int_src.timer_ev_pending__r_data i2=$abc$109383$new_n27584_ q=$abc$109383$new_n27815_
+.subckt and3_x1 i0=$abc$109383$new_n27814_ i1=soc.timer.bridge._int_src.timer_ev_pending__r_data i2=$abc$109383$new_n27584_ q=$abc$109383$new_n27815_
 .subckt inv_x0 i=soc.timer.bridge._int_src.timer_ev_status__r_data nq=$abc$109383$new_n27816_
-.subckt oa22_x2 i0=$abc$109383$new_n27816_ i1=$abc$109383$auto$rtlil.cc:2515:MuxGate$100280 i2=$abc$109383$new_n27815_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100284
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_1.timer_ev_enable__w_stb i0=soc.timer.bridge._int_src.timer_ev_enable__r_data i1=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow q=$abc$109383$new_n27818_
-.subckt a2_x2 i0=$abc$109383$new_n27818_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100288
-.subckt oa22_x2 i0=soc.rx_fifo.r_rdy i1=$abc$109383$new_n21966_ i2=$abc$109383$new_n21975_ q=$abc$109383$new_n27820_
-.subckt a2_x2 i0=$abc$109383$new_n27820_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100372
+.subckt or21nand_x1 i0=$abc$109383$new_n27816_ i1=$abc$109383$auto$rtlil.cc:2515:MuxGate$100280 i2=$abc$109383$new_n27815_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100284
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_1.timer_ev_enable__w_stb i0=soc.timer.bridge._int_src.timer_ev_enable__r_data i1=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow q=$abc$109383$new_n27818_
+.subckt and2_x1 i0=$abc$109383$new_n27818_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100288
+.subckt or21nand_x1 i0=soc.rx_fifo.r_rdy i1=$abc$109383$new_n21966_ i2=$abc$109383$new_n21975_ nq=$abc$109383$new_n27820_
+.subckt and2_x1 i0=$abc$109383$new_n27820_ i1=$abc$109383$new_n27677_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100372
 .subckt buf_x4 i=$abc$109383$new_n27525_ q=$abc$109383$new_n27822_
-.subckt a2_x2 i0=$abc$109383$new_n21847_ i1=soc.rx.rdy q=$abc$109383$new_n27823_
-.subckt a3_x2 i0=$abc$109383$new_n22006_ i1=$abc$109383$new_n22003_ i2=$abc$109383$new_n20885_ q=$abc$109383$new_n27824_
+.subckt and2_x1 i0=$abc$109383$new_n21847_ i1=soc.rx.rdy q=$abc$109383$new_n27823_
+.subckt and3_x1 i0=$abc$109383$new_n22006_ i1=$abc$109383$new_n22003_ i2=$abc$109383$new_n20885_ q=$abc$109383$new_n27824_
 .subckt inv_x0 i=soc.rx_fifo.r_rdy nq=$abc$109383$new_n27825_
-.subckt ao22_x2 i0=$abc$109383$new_n27825_ i1=$abc$109383$new_n27824_ i2=$abc$109383$new_n21969_ q=$abc$109383$new_n27826_
-.subckt nxr2_x1 i0=$abc$109383$new_n27826_ i1=$abc$109383$new_n27823_ nq=$abc$109383$new_n27827_
-.subckt nxr2_x1 i0=$abc$109383$new_n27827_ i1=soc.rx_fifo.unbuffered.level[0] nq=$abc$109383$new_n27828_
-.subckt a2_x2 i0=$abc$109383$new_n27828_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100376
+.subckt and21nor_x1 i0=$abc$109383$new_n27825_ i1=$abc$109383$new_n27824_ i2=$abc$109383$new_n21969_ nq=$abc$109383$new_n27826_
+.subckt nexor2_x0 i0=$abc$109383$new_n27826_ i1=$abc$109383$new_n27823_ nq=$abc$109383$new_n27827_
+.subckt nexor2_x0 i0=$abc$109383$new_n27827_ i1=soc.rx_fifo.unbuffered.level[0] nq=$abc$109383$new_n27828_
+.subckt and2_x1 i0=$abc$109383$new_n27828_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100376
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n27830_
 .subckt nand2_x0 i0=$abc$109383$new_n21847_ i1=soc.rx.rdy nq=$abc$109383$new_n27831_
 .subckt nand3_x0 i0=$abc$109383$new_n21971_ i1=$abc$109383$new_n21975_ i2=$abc$109383$new_n27831_ nq=$abc$109383$new_n27832_
-.subckt oa22_x2 i0=$abc$109383$new_n21971_ i1=$abc$109383$new_n21975_ i2=$abc$109383$new_n27831_ q=$abc$109383$new_n27833_
-.subckt a3_x2 i0=$abc$109383$new_n27833_ i1=$abc$109383$new_n27832_ i2=soc.rx_fifo.unbuffered.level[1] q=$abc$109383$new_n27834_
+.subckt or21nand_x1 i0=$abc$109383$new_n21971_ i1=$abc$109383$new_n21975_ i2=$abc$109383$new_n27831_ nq=$abc$109383$new_n27833_
+.subckt and3_x1 i0=$abc$109383$new_n27833_ i1=$abc$109383$new_n27832_ i2=soc.rx_fifo.unbuffered.level[1] q=$abc$109383$new_n27834_
 .subckt nand3_x0 i0=$abc$109383$new_n21971_ i1=soc.rx_fifo.unbuffered.level[1] i2=soc.rx_fifo.unbuffered.level[0] nq=$abc$109383$new_n27835_
 .subckt nand4_x0 i0=$abc$109383$new_n21966_ i1=$abc$109383$new_n21975_ i2=$abc$109383$new_n27823_ i3=soc.rx_fifo.r_rdy nq=$abc$109383$new_n27836_
 .subckt nand2_x0 i0=$abc$109383$new_n27836_ i1=$abc$109383$new_n27835_ nq=$abc$109383$new_n27837_
-.subckt ao22_x2 i0=$abc$109383$new_n27837_ i1=$abc$109383$new_n27834_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100380
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n21976_ i1=soc.rx_fifo.unbuffered.consume[0] q=$abc$109383$new_n27839_
-.subckt a2_x2 i0=$abc$109383$new_n27839_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100384
-.subckt mx2_x2 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21972_ q=$abc$109383$new_n27841_
-.subckt a2_x2 i0=$abc$109383$new_n27841_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100388
-.subckt a4_x2 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n21845_ i2=$abc$109383$new_n22051_ i3=soc.rx.rdy q=$abc$109383$new_n27843_
-.subckt a2_x2 i0=soc.rx_fifo.unbuffered.level[1] i1=soc.rx_fifo.unbuffered.level[0] q=$abc$109383$new_n27844_
+.subckt and21nor_x1 i0=$abc$109383$new_n27837_ i1=$abc$109383$new_n27834_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100380
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n21976_ i1=soc.rx_fifo.unbuffered.consume[0] q=$abc$109383$new_n27839_
+.subckt and2_x1 i0=$abc$109383$new_n27839_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100384
+.subckt mux2_x1 cmd=$abc$109383$new_n22009_ i0=$abc$109383$new_n21979_ i1=$abc$109383$new_n21972_ q=$abc$109383$new_n27841_
+.subckt and2_x1 i0=$abc$109383$new_n27841_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100388
+.subckt and4_x1 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n21845_ i2=$abc$109383$new_n22051_ i3=soc.rx.rdy q=$abc$109383$new_n27843_
+.subckt and2_x1 i0=soc.rx_fifo.unbuffered.level[1] i1=soc.rx_fifo.unbuffered.level[0] q=$abc$109383$new_n27844_
 .subckt inv_x0 i=soc.rx.rdy nq=$abc$109383$new_n27845_
-.subckt ao22_x2 i0=$abc$109383$new_n27845_ i1=$abc$109383$new_n27844_ i2=soc.rx_fifo.unbuffered.produce[0] q=$abc$109383$new_n27846_
-.subckt ao22_x2 i0=$abc$109383$new_n27846_ i1=$abc$109383$new_n27843_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100392
+.subckt and21nor_x1 i0=$abc$109383$new_n27845_ i1=$abc$109383$new_n27844_ i2=soc.rx_fifo.unbuffered.produce[0] nq=$abc$109383$new_n27846_
+.subckt and21nor_x1 i0=$abc$109383$new_n27846_ i1=$abc$109383$new_n27843_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100392
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n27848_
 .subckt nand3_x0 i0=$abc$109383$new_n21847_ i1=soc.rx_fifo.unbuffered.produce[1] i2=soc.rx.rdy nq=$abc$109383$new_n27849_
-.subckt a2_x2 i0=$abc$109383$new_n27849_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n27850_
+.subckt and2_x1 i0=$abc$109383$new_n27849_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n27850_
 .subckt nand3_x0 i0=$abc$109383$new_n21847_ i1=soc.rx_fifo.unbuffered.produce[0] i2=soc.rx.rdy nq=$abc$109383$new_n27851_
 .subckt nand2_x0 i0=$abc$109383$new_n27851_ i1=$abc$109383$new_n22051_ nq=$abc$109383$new_n27852_
-.subckt a2_x2 i0=$abc$109383$new_n27852_ i1=$abc$109383$new_n27850_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100396
+.subckt and2_x1 i0=$abc$109383$new_n27852_ i1=$abc$109383$new_n27850_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100396
 .subckt buf_x4 i=soc.rx.fsm_state[0] q=$abc$109383$new_n27854_
-.subckt o3_x2 i0=soc.rx.U$$0.stage1 i1=$abc$109383$new_n27854_ i2=soc.rx.fsm_state[1] q=$abc$109383$new_n27855_
+.subckt or3_x1 i0=soc.rx.U$$0.stage1 i1=$abc$109383$new_n27854_ i2=soc.rx.fsm_state[1] q=$abc$109383$new_n27855_
 .subckt inv_x1 i=soc.rx.fsm_state[1] nq=$abc$109383$new_n27856_
-.subckt a2_x2 i0=soc.rx.fsm_state[0] i1=$abc$109383$new_n27856_ q=$abc$109383$new_n27857_
+.subckt and2_x1 i0=soc.rx.fsm_state[0] i1=$abc$109383$new_n27856_ q=$abc$109383$new_n27857_
 .subckt inv_x0 i=soc.rx.timer[7] nq=$abc$109383$new_n27858_
 .subckt inv_x0 i=soc.rx.timer[8] nq=$abc$109383$new_n27859_
 .subckt inv_x0 i=soc.rx.timer[9] nq=$abc$109383$new_n27860_
@@ -13136,298 +13136,298 @@
 .subckt inv_x0 i=soc.rx.timer[5] nq=$abc$109383$new_n27862_
 .subckt inv_x0 i=soc.rx.timer[6] nq=$abc$109383$new_n27863_
 .subckt nor4_x0 i0=soc.rx.timer[3] i1=soc.rx.timer[2] i2=soc.rx.timer[1] i3=soc.rx.timer[0] nq=$abc$109383$new_n27864_
-.subckt a4_x2 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27863_ i2=$abc$109383$new_n27862_ i3=$abc$109383$new_n27861_ q=$abc$109383$new_n27865_
-.subckt a4_x2 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27860_ i2=$abc$109383$new_n27859_ i3=$abc$109383$new_n27858_ q=$abc$109383$new_n27866_
+.subckt and4_x1 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27863_ i2=$abc$109383$new_n27862_ i3=$abc$109383$new_n27861_ q=$abc$109383$new_n27865_
+.subckt and4_x1 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27860_ i2=$abc$109383$new_n27859_ i3=$abc$109383$new_n27858_ q=$abc$109383$new_n27866_
 .subckt buf_x4 i=$abc$109383$new_n27866_ q=$abc$109383$new_n27867_
 .subckt nor2_x0 i0=soc.rx.timer[11] i1=soc.rx.timer[10] nq=$abc$109383$new_n27868_
 .subckt nand3_x0 i0=$abc$109383$new_n27868_ i1=$abc$109383$new_n27867_ i2=$abc$109383$new_n27857_ nq=$abc$109383$new_n27869_
 .subckt buf_x4 i=$abc$109383$new_n27869_ q=$abc$109383$new_n27870_
-.subckt a3_x2 i0=$abc$109383$new_n27870_ i1=$abc$109383$new_n27855_ i2=soc.rx.bitno[0] q=$abc$109383$new_n27871_
+.subckt and3_x1 i0=$abc$109383$new_n27870_ i1=$abc$109383$new_n27855_ i2=soc.rx.bitno[0] q=$abc$109383$new_n27871_
 .subckt buf_x4 i=$abc$109383$new_n27856_ q=$abc$109383$new_n27872_
 .subckt buf_x4 i=$abc$109383$new_n27854_ q=$abc$109383$new_n27873_
 .subckt nand3_x0 i0=soc.rx.bitno[0] i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27872_ nq=$abc$109383$new_n27874_
-.subckt a3_x2 i0=$abc$109383$new_n27868_ i1=$abc$109383$new_n27867_ i2=$abc$109383$new_n27857_ q=$abc$109383$new_n27875_
+.subckt and3_x1 i0=$abc$109383$new_n27868_ i1=$abc$109383$new_n27867_ i2=$abc$109383$new_n27857_ q=$abc$109383$new_n27875_
 .subckt nor3_x0 i0=soc.rx.U$$0.stage1 i1=$abc$109383$new_n27854_ i2=soc.rx.fsm_state[1] nq=$abc$109383$new_n27876_
-.subckt ao22_x2 i0=$abc$109383$new_n27876_ i1=$abc$109383$new_n27875_ i2=$abc$109383$new_n27874_ q=$abc$109383$new_n27877_
-.subckt ao22_x2 i0=$abc$109383$new_n27877_ i1=$abc$109383$new_n27871_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100494
+.subckt and21nor_x1 i0=$abc$109383$new_n27876_ i1=$abc$109383$new_n27875_ i2=$abc$109383$new_n27874_ nq=$abc$109383$new_n27877_
+.subckt and21nor_x1 i0=$abc$109383$new_n27877_ i1=$abc$109383$new_n27871_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100494
 .subckt nor2_x0 i0=soc.rx.bitno[1] i1=soc.rx.bitno[0] nq=$abc$109383$new_n27879_
-.subckt a4_x2 i0=$abc$109383$new_n27879_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n27867_ i3=$abc$109383$new_n27857_ q=$abc$109383$new_n27880_
-.subckt a3_x2 i0=soc.rx.bitno[0] i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n27856_ q=$abc$109383$new_n27881_
-.subckt oa22_x2 i0=$abc$109383$new_n27855_ i1=$abc$109383$new_n27869_ i2=$abc$109383$new_n27881_ q=$abc$109383$new_n27882_
-.subckt oa22_x2 i0=soc.rx.bitno[1] i1=$abc$109383$new_n27882_ i2=$abc$109383$new_n27880_ q=$abc$109383$new_n27883_
-.subckt a2_x2 i0=$abc$109383$new_n27883_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100498
+.subckt and4_x1 i0=$abc$109383$new_n27879_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n27867_ i3=$abc$109383$new_n27857_ q=$abc$109383$new_n27880_
+.subckt and3_x1 i0=soc.rx.bitno[0] i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n27856_ q=$abc$109383$new_n27881_
+.subckt or21nand_x1 i0=$abc$109383$new_n27855_ i1=$abc$109383$new_n27869_ i2=$abc$109383$new_n27881_ nq=$abc$109383$new_n27882_
+.subckt or21nand_x1 i0=soc.rx.bitno[1] i1=$abc$109383$new_n27882_ i2=$abc$109383$new_n27880_ nq=$abc$109383$new_n27883_
+.subckt and2_x1 i0=$abc$109383$new_n27883_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100498
 .subckt inv_x0 i=soc.rx.bitno[2] nq=$abc$109383$new_n27885_
-.subckt a2_x2 i0=$abc$109383$new_n27855_ i1=soc.rx.bitno[2] q=$abc$109383$new_n27886_
-.subckt mx2_x2 cmd=$abc$109383$new_n27880_ i0=$abc$109383$new_n27886_ i1=$abc$109383$new_n27885_ q=$abc$109383$new_n27887_
-.subckt a2_x2 i0=$abc$109383$new_n27887_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100502
+.subckt and2_x1 i0=$abc$109383$new_n27855_ i1=soc.rx.bitno[2] q=$abc$109383$new_n27886_
+.subckt mux2_x1 cmd=$abc$109383$new_n27880_ i0=$abc$109383$new_n27886_ i1=$abc$109383$new_n27885_ q=$abc$109383$new_n27887_
+.subckt and2_x1 i0=$abc$109383$new_n27887_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100502
 .subckt inv_x0 i=soc.rx.bitno[3] nq=$abc$109383$new_n27889_
 .subckt nand3_x0 i0=$abc$109383$new_n27870_ i1=$abc$109383$new_n27855_ i2=$abc$109383$new_n27889_ nq=$abc$109383$new_n27890_
 .subckt buf_x4 i=$abc$109383$new_n27429_ q=$abc$109383$new_n27891_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n27892_
-.subckt o3_x2 i0=soc.rx.bitno[2] i1=soc.rx.bitno[1] i2=soc.rx.bitno[0] q=$abc$109383$new_n27893_
-.subckt a2_x2 i0=$abc$109383$new_n27893_ i1=soc.rx.bitno[3] q=$abc$109383$new_n27894_
+.subckt or3_x1 i0=soc.rx.bitno[2] i1=soc.rx.bitno[1] i2=soc.rx.bitno[0] q=$abc$109383$new_n27893_
+.subckt and2_x1 i0=$abc$109383$new_n27893_ i1=soc.rx.bitno[3] q=$abc$109383$new_n27894_
 .subckt buf_x4 i=$abc$109383$new_n27857_ q=$abc$109383$new_n27895_
 .subckt buf_x4 i=$abc$109383$new_n27867_ q=$abc$109383$new_n27896_
-.subckt o4_x2 i0=soc.rx.bitno[2] i1=soc.rx.bitno[3] i2=soc.rx.bitno[1] i3=soc.rx.bitno[0] q=$abc$109383$new_n27897_
+.subckt or4_x1 i0=soc.rx.bitno[2] i1=soc.rx.bitno[3] i2=soc.rx.bitno[1] i3=soc.rx.bitno[0] q=$abc$109383$new_n27897_
 .subckt nand4_x0 i0=$abc$109383$new_n27897_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n27896_ i3=$abc$109383$new_n27895_ nq=$abc$109383$new_n27898_
-.subckt ao22_x2 i0=$abc$109383$new_n27898_ i1=$abc$109383$new_n27894_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n27899_
-.subckt a2_x2 i0=$abc$109383$new_n27899_ i1=$abc$109383$new_n27890_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100506
+.subckt and21nor_x1 i0=$abc$109383$new_n27898_ i1=$abc$109383$new_n27894_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n27899_
+.subckt and2_x1 i0=$abc$109383$new_n27899_ i1=$abc$109383$new_n27890_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100506
 .subckt buf_x4 i=$abc$109383$new_n27429_ q=$abc$109383$new_n27901_
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n27902_
 .subckt inv_x0 i=soc.rx.U$$0.stage1 nq=$abc$109383$new_n27903_
-.subckt ao22_x2 i0=$abc$109383$new_n27903_ i1=soc.rx.fsm_state[0] i2=$abc$109383$new_n27856_ q=$abc$109383$new_n27904_
+.subckt and21nor_x1 i0=$abc$109383$new_n27903_ i1=soc.rx.fsm_state[0] i2=$abc$109383$new_n27856_ nq=$abc$109383$new_n27904_
 .subckt buf_x4 i=$abc$109383$new_n27904_ q=$abc$109383$new_n27905_
-.subckt ao22_x2 i0=$abc$109383$new_n27905_ i1=soc.rx.timer[0] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n27906_
+.subckt and21nor_x1 i0=$abc$109383$new_n27905_ i1=soc.rx.timer[0] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n27906_
 .subckt inv_x0 i=soc.divisor[1] nq=$abc$109383$new_n27907_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n27907_ q=$abc$109383$new_n27908_
-.subckt a2_x2 i0=$abc$109383$new_n27908_ i1=$abc$109383$new_n27905_ q=$abc$109383$new_n27909_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n27907_ nq=$abc$109383$new_n27908_
+.subckt and2_x1 i0=$abc$109383$new_n27908_ i1=$abc$109383$new_n27905_ q=$abc$109383$new_n27909_
 .subckt inv_x0 i=soc.rx.timer[0] nq=$abc$109383$new_n27910_
 .subckt nand3_x0 i0=$abc$109383$new_n27910_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n27872_ nq=$abc$109383$new_n27911_
 .subckt buf_x4 i=$abc$109383$new_n27868_ q=$abc$109383$new_n27912_
-.subckt oa22_x2 i0=$abc$109383$new_n27896_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27911_ q=$abc$109383$new_n27913_
+.subckt or21nand_x1 i0=$abc$109383$new_n27896_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27911_ nq=$abc$109383$new_n27913_
 .subckt nand2_x0 i0=$abc$109383$new_n27913_ i1=$abc$109383$new_n27909_ nq=$abc$109383$new_n27914_
 .subckt inv_x0 i=soc.divisor[0] nq=$abc$109383$new_n27915_
-.subckt a4_x2 i0=$abc$109383$new_n27912_ i1=$abc$109383$new_n27896_ i2=$abc$109383$new_n27895_ i3=$abc$109383$new_n27915_ q=$abc$109383$new_n27916_
-.subckt ao22_x2 i0=$abc$109383$new_n27916_ i1=$abc$109383$new_n27914_ i2=$abc$109383$new_n27906_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100510
-.subckt nxr2_x1 i0=soc.rx.timer[1] i1=soc.rx.timer[0] nq=$abc$109383$new_n27918_
-.subckt xr2_x1 i0=soc.divisor[1] i1=soc.divisor[0] q=$abc$109383$new_n27919_
+.subckt and4_x1 i0=$abc$109383$new_n27912_ i1=$abc$109383$new_n27896_ i2=$abc$109383$new_n27895_ i3=$abc$109383$new_n27915_ q=$abc$109383$new_n27916_
+.subckt and21nor_x1 i0=$abc$109383$new_n27916_ i1=$abc$109383$new_n27914_ i2=$abc$109383$new_n27906_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100510
+.subckt nexor2_x0 i0=soc.rx.timer[1] i1=soc.rx.timer[0] nq=$abc$109383$new_n27918_
+.subckt xor2_x0 i0=soc.divisor[1] i1=soc.divisor[0] q=$abc$109383$new_n27919_
 .subckt nand3_x0 i0=$abc$109383$new_n27919_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27920_
 .subckt nand3_x0 i0=$abc$109383$new_n27920_ i1=$abc$109383$new_n27918_ i2=$abc$109383$new_n27895_ nq=$abc$109383$new_n27921_
 .subckt buf_x4 i=$abc$109383$new_n27905_ q=$abc$109383$new_n27922_
 .subckt inv_x0 i=soc.divisor[2] nq=$abc$109383$new_n27923_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27923_ q=$abc$109383$new_n27924_
-.subckt a2_x2 i0=$abc$109383$new_n27924_ i1=$abc$109383$new_n27922_ q=$abc$109383$new_n27925_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27923_ nq=$abc$109383$new_n27924_
+.subckt and2_x1 i0=$abc$109383$new_n27924_ i1=$abc$109383$new_n27922_ q=$abc$109383$new_n27925_
 .subckt nand2_x0 i0=$abc$109383$new_n27925_ i1=$abc$109383$new_n27921_ nq=$abc$109383$new_n27926_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=soc.rx.timer[1] i2=$abc$109383$new_n27892_ q=$abc$109383$new_n27927_
-.subckt a2_x2 i0=$abc$109383$new_n27927_ i1=$abc$109383$new_n27926_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100514
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=soc.rx.timer[1] i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n27927_
+.subckt and2_x1 i0=$abc$109383$new_n27927_ i1=$abc$109383$new_n27926_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100514
 .subckt inv_x0 i=$abc$109383$new_n27854_ nq=$abc$109383$new_n27929_
-.subckt oa22_x2 i0=soc.rx.U$$0.stage1 i1=$abc$109383$new_n27929_ i2=soc.rx.fsm_state[1] q=$abc$109383$new_n27930_
+.subckt or21nand_x1 i0=soc.rx.U$$0.stage1 i1=$abc$109383$new_n27929_ i2=soc.rx.fsm_state[1] nq=$abc$109383$new_n27930_
 .subckt inv_x0 i=soc.divisor[3] nq=$abc$109383$new_n27931_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27931_ q=$abc$109383$new_n27932_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27931_ nq=$abc$109383$new_n27932_
 .subckt nor2_x0 i0=soc.divisor[1] i1=soc.divisor[0] nq=$abc$109383$new_n27933_
-.subckt nxr2_x1 i0=$abc$109383$new_n27933_ i1=soc.divisor[2] nq=$abc$109383$new_n27934_
+.subckt nexor2_x0 i0=$abc$109383$new_n27933_ i1=soc.divisor[2] nq=$abc$109383$new_n27934_
 .subckt nand3_x0 i0=$abc$109383$new_n27934_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27935_
 .subckt inv_x0 i=soc.rx.timer[2] nq=$abc$109383$new_n27936_
 .subckt nor2_x0 i0=soc.rx.timer[1] i1=soc.rx.timer[0] nq=$abc$109383$new_n27937_
-.subckt nxr2_x1 i0=$abc$109383$new_n27937_ i1=$abc$109383$new_n27936_ nq=$abc$109383$new_n27938_
-.subckt a2_x2 i0=$abc$109383$new_n27938_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27939_
+.subckt nexor2_x0 i0=$abc$109383$new_n27937_ i1=$abc$109383$new_n27936_ nq=$abc$109383$new_n27938_
+.subckt and2_x1 i0=$abc$109383$new_n27938_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27939_
 .subckt nand2_x0 i0=$abc$109383$new_n27939_ i1=$abc$109383$new_n27935_ nq=$abc$109383$new_n27940_
-.subckt oa22_x2 i0=$abc$109383$new_n27940_ i1=$abc$109383$new_n27932_ i2=$abc$109383$new_n27930_ q=$abc$109383$new_n27941_
+.subckt or21nand_x1 i0=$abc$109383$new_n27940_ i1=$abc$109383$new_n27932_ i2=$abc$109383$new_n27930_ nq=$abc$109383$new_n27941_
 .subckt buf_x4 i=$abc$109383$new_n27603_ q=$abc$109383$new_n27942_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27936_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n27943_
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27936_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n27943_
 .subckt nand2_x0 i0=$abc$109383$new_n27943_ i1=$abc$109383$new_n27941_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100518
 .subckt inv_x1 i=soc.divisor[4] nq=$abc$109383$new_n27945_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27945_ q=$abc$109383$new_n27946_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27945_ nq=$abc$109383$new_n27946_
 .subckt nor3_x0 i0=soc.divisor[2] i1=soc.divisor[1] i2=soc.divisor[0] nq=$abc$109383$new_n27947_
-.subckt nxr2_x1 i0=$abc$109383$new_n27947_ i1=soc.divisor[3] nq=$abc$109383$new_n27948_
+.subckt nexor2_x0 i0=$abc$109383$new_n27947_ i1=soc.divisor[3] nq=$abc$109383$new_n27948_
 .subckt nand3_x0 i0=$abc$109383$new_n27948_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27949_
 .subckt inv_x0 i=soc.rx.timer[3] nq=$abc$109383$new_n27950_
 .subckt nor3_x0 i0=soc.rx.timer[2] i1=soc.rx.timer[1] i2=soc.rx.timer[0] nq=$abc$109383$new_n27951_
-.subckt nxr2_x1 i0=$abc$109383$new_n27951_ i1=$abc$109383$new_n27950_ nq=$abc$109383$new_n27952_
-.subckt a2_x2 i0=$abc$109383$new_n27952_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27953_
+.subckt nexor2_x0 i0=$abc$109383$new_n27951_ i1=$abc$109383$new_n27950_ nq=$abc$109383$new_n27952_
+.subckt and2_x1 i0=$abc$109383$new_n27952_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27953_
 .subckt nand2_x0 i0=$abc$109383$new_n27953_ i1=$abc$109383$new_n27949_ nq=$abc$109383$new_n27954_
-.subckt oa22_x2 i0=$abc$109383$new_n27954_ i1=$abc$109383$new_n27946_ i2=$abc$109383$new_n27930_ q=$abc$109383$new_n27955_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27950_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n27956_
+.subckt or21nand_x1 i0=$abc$109383$new_n27954_ i1=$abc$109383$new_n27946_ i2=$abc$109383$new_n27930_ nq=$abc$109383$new_n27955_
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27950_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n27956_
 .subckt nand2_x0 i0=$abc$109383$new_n27956_ i1=$abc$109383$new_n27955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100522
 .subckt inv_x0 i=soc.divisor[5] nq=$abc$109383$new_n27958_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27958_ q=$abc$109383$new_n27959_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27958_ nq=$abc$109383$new_n27959_
 .subckt nor4_x0 i0=soc.divisor[3] i1=soc.divisor[2] i2=soc.divisor[1] i3=soc.divisor[0] nq=$abc$109383$new_n27960_
-.subckt nxr2_x1 i0=$abc$109383$new_n27960_ i1=soc.divisor[4] nq=$abc$109383$new_n27961_
+.subckt nexor2_x0 i0=$abc$109383$new_n27960_ i1=soc.divisor[4] nq=$abc$109383$new_n27961_
 .subckt nand3_x0 i0=$abc$109383$new_n27961_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27962_
-.subckt nxr2_x1 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27861_ nq=$abc$109383$new_n27963_
-.subckt a2_x2 i0=$abc$109383$new_n27963_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27964_
+.subckt nexor2_x0 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27861_ nq=$abc$109383$new_n27963_
+.subckt and2_x1 i0=$abc$109383$new_n27963_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27964_
 .subckt nand2_x0 i0=$abc$109383$new_n27964_ i1=$abc$109383$new_n27962_ nq=$abc$109383$new_n27965_
-.subckt oa22_x2 i0=$abc$109383$new_n27965_ i1=$abc$109383$new_n27959_ i2=$abc$109383$new_n27930_ q=$abc$109383$new_n27966_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27861_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n27967_
+.subckt or21nand_x1 i0=$abc$109383$new_n27965_ i1=$abc$109383$new_n27959_ i2=$abc$109383$new_n27930_ nq=$abc$109383$new_n27966_
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27861_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n27967_
 .subckt nand2_x0 i0=$abc$109383$new_n27967_ i1=$abc$109383$new_n27966_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100526
 .subckt inv_x0 i=soc.divisor[6] nq=$abc$109383$new_n27969_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27969_ q=$abc$109383$new_n27970_
-.subckt a2_x2 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27945_ q=$abc$109383$new_n27971_
-.subckt nxr2_x1 i0=$abc$109383$new_n27971_ i1=soc.divisor[5] nq=$abc$109383$new_n27972_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27969_ nq=$abc$109383$new_n27970_
+.subckt and2_x1 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27945_ q=$abc$109383$new_n27971_
+.subckt nexor2_x0 i0=$abc$109383$new_n27971_ i1=soc.divisor[5] nq=$abc$109383$new_n27972_
 .subckt nand3_x0 i0=$abc$109383$new_n27972_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27973_
-.subckt a2_x2 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27861_ q=$abc$109383$new_n27974_
-.subckt nxr2_x1 i0=$abc$109383$new_n27974_ i1=$abc$109383$new_n27862_ nq=$abc$109383$new_n27975_
-.subckt a2_x2 i0=$abc$109383$new_n27975_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27976_
+.subckt and2_x1 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27861_ q=$abc$109383$new_n27974_
+.subckt nexor2_x0 i0=$abc$109383$new_n27974_ i1=$abc$109383$new_n27862_ nq=$abc$109383$new_n27975_
+.subckt and2_x1 i0=$abc$109383$new_n27975_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27976_
 .subckt nand2_x0 i0=$abc$109383$new_n27976_ i1=$abc$109383$new_n27973_ nq=$abc$109383$new_n27977_
-.subckt oa22_x2 i0=$abc$109383$new_n27977_ i1=$abc$109383$new_n27970_ i2=$abc$109383$new_n27930_ q=$abc$109383$new_n27978_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27862_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n27979_
+.subckt or21nand_x1 i0=$abc$109383$new_n27977_ i1=$abc$109383$new_n27970_ i2=$abc$109383$new_n27930_ nq=$abc$109383$new_n27978_
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27862_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n27979_
 .subckt nand2_x0 i0=$abc$109383$new_n27979_ i1=$abc$109383$new_n27978_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100530
 .subckt inv_x0 i=soc.divisor[7] nq=$abc$109383$new_n27981_
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27981_ q=$abc$109383$new_n27982_
-.subckt a3_x2 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27958_ i2=$abc$109383$new_n27945_ q=$abc$109383$new_n27983_
-.subckt nxr2_x1 i0=$abc$109383$new_n27983_ i1=soc.divisor[6] nq=$abc$109383$new_n27984_
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=$abc$109383$new_n27981_ nq=$abc$109383$new_n27982_
+.subckt and3_x1 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27958_ i2=$abc$109383$new_n27945_ q=$abc$109383$new_n27983_
+.subckt nexor2_x0 i0=$abc$109383$new_n27983_ i1=soc.divisor[6] nq=$abc$109383$new_n27984_
 .subckt nand3_x0 i0=$abc$109383$new_n27984_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27985_
-.subckt a3_x2 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27862_ i2=$abc$109383$new_n27861_ q=$abc$109383$new_n27986_
-.subckt nxr2_x1 i0=$abc$109383$new_n27986_ i1=$abc$109383$new_n27863_ nq=$abc$109383$new_n27987_
-.subckt a2_x2 i0=$abc$109383$new_n27987_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27988_
+.subckt and3_x1 i0=$abc$109383$new_n27864_ i1=$abc$109383$new_n27862_ i2=$abc$109383$new_n27861_ q=$abc$109383$new_n27986_
+.subckt nexor2_x0 i0=$abc$109383$new_n27986_ i1=$abc$109383$new_n27863_ nq=$abc$109383$new_n27987_
+.subckt and2_x1 i0=$abc$109383$new_n27987_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n27988_
 .subckt nand2_x0 i0=$abc$109383$new_n27988_ i1=$abc$109383$new_n27985_ nq=$abc$109383$new_n27989_
-.subckt oa22_x2 i0=$abc$109383$new_n27989_ i1=$abc$109383$new_n27982_ i2=$abc$109383$new_n27930_ q=$abc$109383$new_n27990_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27863_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n27991_
+.subckt or21nand_x1 i0=$abc$109383$new_n27989_ i1=$abc$109383$new_n27982_ i2=$abc$109383$new_n27930_ nq=$abc$109383$new_n27990_
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27863_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n27991_
 .subckt nand2_x0 i0=$abc$109383$new_n27991_ i1=$abc$109383$new_n27990_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100534
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n27993_
-.subckt oa22_x2 i0=$abc$109383$new_n27930_ i1=soc.rx.timer[7] i2=$abc$109383$new_n27993_ q=$abc$109383$new_n27994_
-.subckt ao22_x2 i0=soc.rx.fsm_state[1] i1=$abc$109383$new_n27929_ i2=soc.divisor[8] q=$abc$109383$new_n27995_
-.subckt a4_x2 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27969_ i2=$abc$109383$new_n27958_ i3=$abc$109383$new_n27945_ q=$abc$109383$new_n27996_
-.subckt nxr2_x1 i0=$abc$109383$new_n27996_ i1=soc.divisor[7] nq=$abc$109383$new_n27997_
+.subckt or21nand_x1 i0=$abc$109383$new_n27930_ i1=soc.rx.timer[7] i2=$abc$109383$new_n27993_ nq=$abc$109383$new_n27994_
+.subckt and21nor_x1 i0=soc.rx.fsm_state[1] i1=$abc$109383$new_n27929_ i2=soc.divisor[8] nq=$abc$109383$new_n27995_
+.subckt and4_x1 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27969_ i2=$abc$109383$new_n27958_ i3=$abc$109383$new_n27945_ q=$abc$109383$new_n27996_
+.subckt nexor2_x0 i0=$abc$109383$new_n27996_ i1=soc.divisor[7] nq=$abc$109383$new_n27997_
 .subckt nand3_x0 i0=$abc$109383$new_n27997_ i1=$abc$109383$new_n27912_ i2=$abc$109383$new_n27896_ nq=$abc$109383$new_n27998_
-.subckt nxr2_x1 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27858_ nq=$abc$109383$new_n27999_
-.subckt a2_x2 i0=$abc$109383$new_n27999_ i1=$abc$109383$new_n27857_ q=$abc$109383$new_n28000_
-.subckt oa22_x2 i0=$abc$109383$new_n28000_ i1=$abc$109383$new_n27998_ i2=$abc$109383$new_n27995_ q=$abc$109383$new_n28001_
-.subckt oa22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n28001_ i2=$abc$109383$new_n27994_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100538
+.subckt nexor2_x0 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27858_ nq=$abc$109383$new_n27999_
+.subckt and2_x1 i0=$abc$109383$new_n27999_ i1=$abc$109383$new_n27857_ q=$abc$109383$new_n28000_
+.subckt or21nand_x1 i0=$abc$109383$new_n28000_ i1=$abc$109383$new_n27998_ i2=$abc$109383$new_n27995_ nq=$abc$109383$new_n28001_
+.subckt or21nand_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n28001_ i2=$abc$109383$new_n27994_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100538
 .subckt inv_x0 i=soc.divisor[9] nq=$abc$109383$new_n28003_
-.subckt oa22_x2 i0=$abc$109383$new_n27856_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n28003_ q=$abc$109383$new_n28004_
+.subckt or21nand_x1 i0=$abc$109383$new_n27856_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n28003_ nq=$abc$109383$new_n28004_
 .subckt nand2_x0 i0=$abc$109383$new_n28004_ i1=$abc$109383$new_n27905_ nq=$abc$109383$new_n28005_
-.subckt a2_x2 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27858_ q=$abc$109383$new_n28006_
-.subckt nxr2_x1 i0=$abc$109383$new_n28006_ i1=$abc$109383$new_n27859_ nq=$abc$109383$new_n28007_
-.subckt a2_x2 i0=$abc$109383$new_n28007_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n28008_
-.subckt a2_x2 i0=$abc$109383$new_n27868_ i1=$abc$109383$new_n27867_ q=$abc$109383$new_n28009_
-.subckt a2_x2 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n27981_ q=$abc$109383$new_n28010_
-.subckt nxr2_x1 i0=$abc$109383$new_n28010_ i1=soc.divisor[8] nq=$abc$109383$new_n28011_
+.subckt and2_x1 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27858_ q=$abc$109383$new_n28006_
+.subckt nexor2_x0 i0=$abc$109383$new_n28006_ i1=$abc$109383$new_n27859_ nq=$abc$109383$new_n28007_
+.subckt and2_x1 i0=$abc$109383$new_n28007_ i1=$abc$109383$new_n27895_ q=$abc$109383$new_n28008_
+.subckt and2_x1 i0=$abc$109383$new_n27868_ i1=$abc$109383$new_n27867_ q=$abc$109383$new_n28009_
+.subckt and2_x1 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n27981_ q=$abc$109383$new_n28010_
+.subckt nexor2_x0 i0=$abc$109383$new_n28010_ i1=soc.divisor[8] nq=$abc$109383$new_n28011_
 .subckt nand2_x0 i0=$abc$109383$new_n28011_ i1=$abc$109383$new_n28009_ nq=$abc$109383$new_n28012_
-.subckt oa22_x2 i0=$abc$109383$new_n28012_ i1=$abc$109383$new_n28008_ i2=$abc$109383$new_n28005_ q=$abc$109383$new_n28013_
-.subckt ao22_x2 i0=$abc$109383$new_n27905_ i1=soc.rx.timer[8] i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28014_
-.subckt a2_x2 i0=$abc$109383$new_n28014_ i1=$abc$109383$new_n28013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100542
-.subckt oa22_x2 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=soc.divisor[10] q=$abc$109383$new_n28016_
+.subckt or21nand_x1 i0=$abc$109383$new_n28012_ i1=$abc$109383$new_n28008_ i2=$abc$109383$new_n28005_ nq=$abc$109383$new_n28013_
+.subckt and21nor_x1 i0=$abc$109383$new_n27905_ i1=soc.rx.timer[8] i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28014_
+.subckt and2_x1 i0=$abc$109383$new_n28014_ i1=$abc$109383$new_n28013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100542
+.subckt or21nand_x1 i0=$abc$109383$new_n27872_ i1=$abc$109383$new_n27873_ i2=soc.divisor[10] nq=$abc$109383$new_n28016_
 .subckt nand2_x0 i0=$abc$109383$new_n28016_ i1=$abc$109383$new_n27922_ nq=$abc$109383$new_n28017_
-.subckt a3_x2 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27859_ i2=$abc$109383$new_n27858_ q=$abc$109383$new_n28018_
-.subckt ao22_x2 i0=$abc$109383$new_n27860_ i1=$abc$109383$new_n28018_ i2=$abc$109383$new_n27895_ q=$abc$109383$new_n28019_
+.subckt and3_x1 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27859_ i2=$abc$109383$new_n27858_ q=$abc$109383$new_n28018_
+.subckt and21nor_x1 i0=$abc$109383$new_n27860_ i1=$abc$109383$new_n28018_ i2=$abc$109383$new_n27895_ nq=$abc$109383$new_n28019_
 .subckt nand4_x0 i0=$abc$109383$new_n27865_ i1=$abc$109383$new_n27860_ i2=$abc$109383$new_n27859_ i3=$abc$109383$new_n27858_ nq=$abc$109383$new_n28020_
 .subckt inv_x0 i=soc.divisor[8] nq=$abc$109383$new_n28021_
-.subckt a3_x2 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n28021_ i2=$abc$109383$new_n27981_ q=$abc$109383$new_n28022_
-.subckt nxr2_x1 i0=$abc$109383$new_n28022_ i1=soc.divisor[9] nq=$abc$109383$new_n28023_
-.subckt oa22_x2 i0=$abc$109383$new_n28023_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n28020_ q=$abc$109383$new_n28024_
-.subckt oa22_x2 i0=$abc$109383$new_n28024_ i1=$abc$109383$new_n28019_ i2=$abc$109383$new_n28017_ q=$abc$109383$new_n28025_
-.subckt ao22_x2 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27860_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n28026_
+.subckt and3_x1 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n28021_ i2=$abc$109383$new_n27981_ q=$abc$109383$new_n28022_
+.subckt nexor2_x0 i0=$abc$109383$new_n28022_ i1=soc.divisor[9] nq=$abc$109383$new_n28023_
+.subckt or21nand_x1 i0=$abc$109383$new_n28023_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n28020_ nq=$abc$109383$new_n28024_
+.subckt or21nand_x1 i0=$abc$109383$new_n28024_ i1=$abc$109383$new_n28019_ i2=$abc$109383$new_n28017_ nq=$abc$109383$new_n28025_
+.subckt and21nor_x1 i0=$abc$109383$new_n27922_ i1=$abc$109383$new_n27860_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n28026_
 .subckt nand2_x0 i0=$abc$109383$new_n28026_ i1=$abc$109383$new_n28025_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100546
 .subckt inv_x0 i=soc.divisor[11] nq=$abc$109383$new_n28028_
-.subckt oa22_x2 i0=$abc$109383$new_n27856_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n28028_ q=$abc$109383$new_n28029_
+.subckt or21nand_x1 i0=$abc$109383$new_n27856_ i1=$abc$109383$new_n27854_ i2=$abc$109383$new_n28028_ nq=$abc$109383$new_n28029_
 .subckt nand2_x0 i0=$abc$109383$new_n28029_ i1=$abc$109383$new_n27905_ nq=$abc$109383$new_n28030_
 .subckt inv_x0 i=soc.rx.timer[10] nq=$abc$109383$new_n28031_
-.subckt nxr2_x1 i0=$abc$109383$new_n27867_ i1=$abc$109383$new_n28031_ nq=$abc$109383$new_n28032_
-.subckt a2_x2 i0=$abc$109383$new_n28032_ i1=$abc$109383$new_n27857_ q=$abc$109383$new_n28033_
-.subckt a4_x2 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n28003_ i2=$abc$109383$new_n28021_ i3=$abc$109383$new_n27981_ q=$abc$109383$new_n28034_
-.subckt nxr2_x1 i0=$abc$109383$new_n28034_ i1=soc.divisor[10] nq=$abc$109383$new_n28035_
+.subckt nexor2_x0 i0=$abc$109383$new_n27867_ i1=$abc$109383$new_n28031_ nq=$abc$109383$new_n28032_
+.subckt and2_x1 i0=$abc$109383$new_n28032_ i1=$abc$109383$new_n27857_ q=$abc$109383$new_n28033_
+.subckt and4_x1 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n28003_ i2=$abc$109383$new_n28021_ i3=$abc$109383$new_n27981_ q=$abc$109383$new_n28034_
+.subckt nexor2_x0 i0=$abc$109383$new_n28034_ i1=soc.divisor[10] nq=$abc$109383$new_n28035_
 .subckt nand2_x0 i0=$abc$109383$new_n28035_ i1=$abc$109383$new_n27912_ nq=$abc$109383$new_n28036_
-.subckt oa22_x2 i0=$abc$109383$new_n28036_ i1=$abc$109383$new_n28033_ i2=$abc$109383$new_n28030_ q=$abc$109383$new_n28037_
-.subckt ao22_x2 i0=$abc$109383$new_n27905_ i1=soc.rx.timer[10] i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28038_
-.subckt a2_x2 i0=$abc$109383$new_n28038_ i1=$abc$109383$new_n28037_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100550
+.subckt or21nand_x1 i0=$abc$109383$new_n28036_ i1=$abc$109383$new_n28033_ i2=$abc$109383$new_n28030_ nq=$abc$109383$new_n28037_
+.subckt and21nor_x1 i0=$abc$109383$new_n27905_ i1=soc.rx.timer[10] i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28038_
+.subckt and2_x1 i0=$abc$109383$new_n28038_ i1=$abc$109383$new_n28037_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100550
 .subckt inv_x0 i=soc.divisor[10] nq=$abc$109383$new_n28040_
-.subckt a2_x2 i0=$abc$109383$new_n28034_ i1=$abc$109383$new_n28040_ q=$abc$109383$new_n28041_
-.subckt nxr2_x1 i0=$abc$109383$new_n28041_ i1=$abc$109383$new_n28028_ nq=$abc$109383$new_n28042_
+.subckt and2_x1 i0=$abc$109383$new_n28034_ i1=$abc$109383$new_n28040_ q=$abc$109383$new_n28041_
+.subckt nexor2_x0 i0=$abc$109383$new_n28041_ i1=$abc$109383$new_n28028_ nq=$abc$109383$new_n28042_
 .subckt nand2_x0 i0=$abc$109383$new_n28042_ i1=$abc$109383$new_n27875_ nq=$abc$109383$new_n28043_
 .subckt buf_x4 i=$abc$109383$new_n27603_ q=$abc$109383$new_n28044_
 .subckt inv_x0 i=soc.rx.timer[11] nq=$abc$109383$new_n28045_
 .subckt nand2_x0 i0=$abc$109383$new_n27854_ i1=$abc$109383$new_n27856_ nq=$abc$109383$new_n28046_
-.subckt oa22_x2 i0=$abc$109383$new_n28031_ i1=$abc$109383$new_n27867_ i2=$abc$109383$new_n28046_ q=$abc$109383$new_n28047_
-.subckt oa22_x2 i0=$abc$109383$new_n28047_ i1=$abc$109383$new_n27905_ i2=$abc$109383$new_n28045_ q=$abc$109383$new_n28048_
-.subckt a2_x2 i0=$abc$109383$new_n28048_ i1=$abc$109383$new_n28044_ q=$abc$109383$new_n28049_
+.subckt or21nand_x1 i0=$abc$109383$new_n28031_ i1=$abc$109383$new_n27867_ i2=$abc$109383$new_n28046_ nq=$abc$109383$new_n28047_
+.subckt or21nand_x1 i0=$abc$109383$new_n28047_ i1=$abc$109383$new_n27905_ i2=$abc$109383$new_n28045_ nq=$abc$109383$new_n28048_
+.subckt and2_x1 i0=$abc$109383$new_n28048_ i1=$abc$109383$new_n28044_ q=$abc$109383$new_n28049_
 .subckt nand2_x0 i0=$abc$109383$new_n28049_ i1=$abc$109383$new_n28043_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100554
-.subckt a4_x2 i0=$abc$109383$new_n27897_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n27867_ i3=$abc$109383$new_n27857_ q=$abc$109383$new_n28051_
-.subckt ao22_x2 i0=$abc$109383$new_n28051_ i1=$abc$109383$new_n27869_ i2=$abc$109383$new_n27873_ q=$abc$109383$new_n28052_
-.subckt ao22_x2 i0=$abc$109383$new_n28052_ i1=$abc$109383$new_n27876_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100558
+.subckt and4_x1 i0=$abc$109383$new_n27897_ i1=$abc$109383$new_n27868_ i2=$abc$109383$new_n27867_ i3=$abc$109383$new_n27857_ q=$abc$109383$new_n28051_
+.subckt and21nor_x1 i0=$abc$109383$new_n28051_ i1=$abc$109383$new_n27869_ i2=$abc$109383$new_n27873_ nq=$abc$109383$new_n28052_
+.subckt and21nor_x1 i0=$abc$109383$new_n28052_ i1=$abc$109383$new_n27876_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100558
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n28054_
-.subckt a2_x2 i0=$abc$109383$new_n27873_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n28055_
-.subckt ao22_x2 i0=soc.rx.fsm_state[1] i1=$abc$109383$new_n27903_ i2=$abc$109383$new_n27929_ q=$abc$109383$new_n28056_
-.subckt ao22_x2 i0=$abc$109383$new_n27875_ i1=$abc$109383$new_n28056_ i2=$abc$109383$new_n27898_ q=$abc$109383$new_n28057_
-.subckt ao22_x2 i0=soc.rx.fsm_state[1] i1=$abc$109383$new_n28057_ i2=$abc$109383$new_n28055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100562
-.subckt mx2_x2 cmd=$abc$109383$new_n27875_ i0=soc.rx.shreg__stop i1=soc.rx.U$$0.stage1 q=$abc$109383$new_n28059_
-.subckt a2_x2 i0=$abc$109383$new_n28059_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100566
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[1] i1=soc.rx.shreg__data[0] q=$abc$109383$new_n28061_
-.subckt a2_x2 i0=$abc$109383$new_n28061_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100570
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[2] i1=soc.rx.shreg__data[1] q=$abc$109383$new_n28063_
-.subckt a2_x2 i0=$abc$109383$new_n28063_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100574
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[3] i1=soc.rx.shreg__data[2] q=$abc$109383$new_n28065_
-.subckt a2_x2 i0=$abc$109383$new_n28065_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100578
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[4] i1=soc.rx.shreg__data[3] q=$abc$109383$new_n28067_
-.subckt a2_x2 i0=$abc$109383$new_n28067_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100582
+.subckt and2_x1 i0=$abc$109383$new_n27873_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n28055_
+.subckt and21nor_x1 i0=soc.rx.fsm_state[1] i1=$abc$109383$new_n27903_ i2=$abc$109383$new_n27929_ nq=$abc$109383$new_n28056_
+.subckt and21nor_x1 i0=$abc$109383$new_n27875_ i1=$abc$109383$new_n28056_ i2=$abc$109383$new_n27898_ nq=$abc$109383$new_n28057_
+.subckt and21nor_x1 i0=soc.rx.fsm_state[1] i1=$abc$109383$new_n28057_ i2=$abc$109383$new_n28055_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100562
+.subckt mux2_x1 cmd=$abc$109383$new_n27875_ i0=soc.rx.shreg__stop i1=soc.rx.U$$0.stage1 q=$abc$109383$new_n28059_
+.subckt and2_x1 i0=$abc$109383$new_n28059_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100566
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[1] i1=soc.rx.shreg__data[0] q=$abc$109383$new_n28061_
+.subckt and2_x1 i0=$abc$109383$new_n28061_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100570
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[2] i1=soc.rx.shreg__data[1] q=$abc$109383$new_n28063_
+.subckt and2_x1 i0=$abc$109383$new_n28063_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100574
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[3] i1=soc.rx.shreg__data[2] q=$abc$109383$new_n28065_
+.subckt and2_x1 i0=$abc$109383$new_n28065_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100578
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[4] i1=soc.rx.shreg__data[3] q=$abc$109383$new_n28067_
+.subckt and2_x1 i0=$abc$109383$new_n28067_ i1=$abc$109383$new_n27822_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100582
 .subckt buf_x4 i=$abc$109383$new_n27525_ q=$abc$109383$new_n28069_
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[5] i1=soc.rx.shreg__data[4] q=$abc$109383$new_n28070_
-.subckt a2_x2 i0=$abc$109383$new_n28070_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100586
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[6] i1=soc.rx.shreg__data[5] q=$abc$109383$new_n28072_
-.subckt a2_x2 i0=$abc$109383$new_n28072_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100590
-.subckt mx2_x2 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[7] i1=soc.rx.shreg__data[6] q=$abc$109383$new_n28074_
-.subckt a2_x2 i0=$abc$109383$new_n28074_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100594
-.subckt mx2_x2 cmd=$abc$109383$new_n27875_ i0=soc.rx.shreg__data[7] i1=soc.rx.shreg__stop q=$abc$109383$new_n28076_
-.subckt a2_x2 i0=$abc$109383$new_n28076_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100598
-.subckt mx2_x2 cmd=$abc$109383$new_n27869_ i0=soc.rx.shreg__data[0] i1=soc.rx.shreg__start q=$abc$109383$new_n28078_
-.subckt a2_x2 i0=$abc$109383$new_n28078_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100602
-.subckt a3_x2 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n27929_ i2=soc.rx.fsm_state[1] q=$abc$109383$new_n28080_
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[5] i1=soc.rx.shreg__data[4] q=$abc$109383$new_n28070_
+.subckt and2_x1 i0=$abc$109383$new_n28070_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100586
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[6] i1=soc.rx.shreg__data[5] q=$abc$109383$new_n28072_
+.subckt and2_x1 i0=$abc$109383$new_n28072_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100590
+.subckt mux2_x1 cmd=$abc$109383$new_n27870_ i0=soc.rx.shreg__data[7] i1=soc.rx.shreg__data[6] q=$abc$109383$new_n28074_
+.subckt and2_x1 i0=$abc$109383$new_n28074_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100594
+.subckt mux2_x1 cmd=$abc$109383$new_n27875_ i0=soc.rx.shreg__data[7] i1=soc.rx.shreg__stop q=$abc$109383$new_n28076_
+.subckt and2_x1 i0=$abc$109383$new_n28076_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100598
+.subckt mux2_x1 cmd=$abc$109383$new_n27869_ i0=soc.rx.shreg__data[0] i1=soc.rx.shreg__start q=$abc$109383$new_n28078_
+.subckt and2_x1 i0=$abc$109383$new_n28078_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100602
+.subckt and3_x1 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n27929_ i2=soc.rx.fsm_state[1] q=$abc$109383$new_n28080_
 .subckt buf_x4 i=$abc$109383$new_n28080_ q=$abc$109383$new_n28081_
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[0] i1=soc.rx.shreg__data[0] q=$abc$109383$new_n28082_
-.subckt a2_x2 i0=$abc$109383$new_n28082_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100606
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[1] i1=soc.rx.shreg__data[1] q=$abc$109383$new_n28084_
-.subckt a2_x2 i0=$abc$109383$new_n28084_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100610
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[2] i1=soc.rx.shreg__data[2] q=$abc$109383$new_n28086_
-.subckt a2_x2 i0=$abc$109383$new_n28086_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100614
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[3] i1=soc.rx.shreg__data[3] q=$abc$109383$new_n28088_
-.subckt a2_x2 i0=$abc$109383$new_n28088_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100618
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[4] i1=soc.rx.shreg__data[4] q=$abc$109383$new_n28090_
-.subckt a2_x2 i0=$abc$109383$new_n28090_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100622
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[0] i1=soc.rx.shreg__data[0] q=$abc$109383$new_n28082_
+.subckt and2_x1 i0=$abc$109383$new_n28082_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100606
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[1] i1=soc.rx.shreg__data[1] q=$abc$109383$new_n28084_
+.subckt and2_x1 i0=$abc$109383$new_n28084_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100610
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[2] i1=soc.rx.shreg__data[2] q=$abc$109383$new_n28086_
+.subckt and2_x1 i0=$abc$109383$new_n28086_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100614
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[3] i1=soc.rx.shreg__data[3] q=$abc$109383$new_n28088_
+.subckt and2_x1 i0=$abc$109383$new_n28088_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100618
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[4] i1=soc.rx.shreg__data[4] q=$abc$109383$new_n28090_
+.subckt and2_x1 i0=$abc$109383$new_n28090_ i1=$abc$109383$new_n28069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100622
 .subckt buf_x4 i=$abc$109383$new_n27525_ q=$abc$109383$new_n28092_
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[5] i1=soc.rx.shreg__data[5] q=$abc$109383$new_n28093_
-.subckt a2_x2 i0=$abc$109383$new_n28093_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100626
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[6] i1=soc.rx.shreg__data[6] q=$abc$109383$new_n28095_
-.subckt a2_x2 i0=$abc$109383$new_n28095_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100630
-.subckt mx2_x2 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[7] i1=soc.rx.shreg__data[7] q=$abc$109383$new_n28097_
-.subckt a2_x2 i0=$abc$109383$new_n28097_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100634
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[5] i1=soc.rx.shreg__data[5] q=$abc$109383$new_n28093_
+.subckt and2_x1 i0=$abc$109383$new_n28093_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100626
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[6] i1=soc.rx.shreg__data[6] q=$abc$109383$new_n28095_
+.subckt and2_x1 i0=$abc$109383$new_n28095_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100630
+.subckt mux2_x1 cmd=$abc$109383$new_n28081_ i0=soc.rx.data[7] i1=soc.rx.shreg__data[7] q=$abc$109383$new_n28097_
+.subckt and2_x1 i0=$abc$109383$new_n28097_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100634
 .subckt inv_x0 i=soc.rx.shreg__start nq=$abc$109383$new_n28099_
 .subckt nand2_x0 i0=soc.rx.shreg__stop i1=$abc$109383$new_n28099_ nq=$abc$109383$new_n28100_
 .subckt nand3_x0 i0=$abc$109383$new_n21847_ i1=$abc$109383$new_n27929_ i2=soc.rx.fsm_state[1] nq=$abc$109383$new_n28101_
-.subckt mx2_x2 cmd=$abc$109383$new_n28101_ i0=$abc$109383$new_n28100_ i1=soc.rx.err__frame q=$abc$109383$new_n28102_
-.subckt a2_x2 i0=$abc$109383$new_n28102_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100638
-.subckt oa22_x2 i0=$abc$109383$new_n27929_ i1=soc.rx.fsm_state[1] i2=soc.rx.err__overflow q=$abc$109383$new_n28104_
-.subckt a3_x2 i0=$abc$109383$new_n28104_ i1=$abc$109383$new_n28101_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100644
-.subckt a3_x2 i0=soc.rx.rdy i1=soc.rx_fifo.unbuffered.level[1] i2=soc.rx_fifo.unbuffered.level[0] q=$abc$109383$new_n28106_
-.subckt ao22_x2 i0=$abc$109383$new_n28106_ i1=$abc$109383$new_n28081_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100648
-.subckt ao22_x2 i0=$abc$109383$new_n14921_ i1=soc.rom.read_active i2=$abc$109383$new_n27902_ q=$abc$109383$new_n28108_
+.subckt mux2_x1 cmd=$abc$109383$new_n28101_ i0=$abc$109383$new_n28100_ i1=soc.rx.err__frame q=$abc$109383$new_n28102_
+.subckt and2_x1 i0=$abc$109383$new_n28102_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100638
+.subckt or21nand_x1 i0=$abc$109383$new_n27929_ i1=soc.rx.fsm_state[1] i2=soc.rx.err__overflow nq=$abc$109383$new_n28104_
+.subckt and3_x1 i0=$abc$109383$new_n28104_ i1=$abc$109383$new_n28101_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100644
+.subckt and3_x1 i0=soc.rx.rdy i1=soc.rx_fifo.unbuffered.level[1] i2=soc.rx_fifo.unbuffered.level[0] q=$abc$109383$new_n28106_
+.subckt and21nor_x1 i0=$abc$109383$new_n28106_ i1=$abc$109383$new_n28081_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100648
+.subckt and21nor_x1 i0=$abc$109383$new_n14921_ i1=soc.rom.read_active i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n28108_
 .subckt inv_x0 i=soc.rom.read_active nq=$abc$109383$new_n28109_
-.subckt ao22_x2 i0=$abc$109383$new_n28109_ i1=$abc$109383$new_n15150_ i2=$abc$109383$new_n28108_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100716
-.subckt a4_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100718
+.subckt and21nor_x1 i0=$abc$109383$new_n28109_ i1=$abc$109383$new_n15150_ i2=$abc$109383$new_n28108_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100716
+.subckt and4_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100718
 .subckt nand2_x0 i0=$abc$109383$new_n19683_ i1=$abc$109383$new_n19645_ nq=$abc$109383$new_n28112_
-.subckt a4_x2 i0=$abc$109383$new_n21957_ i1=$abc$109383$new_n21953_ i2=$abc$109383$new_n21949_ i3=$abc$109383$new_n21944_ q=$abc$109383$new_n28113_
+.subckt and4_x1 i0=$abc$109383$new_n21957_ i1=$abc$109383$new_n21953_ i2=$abc$109383$new_n21949_ i3=$abc$109383$new_n21944_ q=$abc$109383$new_n28113_
 .subckt nand2_x0 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ nq=$abc$109383$new_n28114_
 .subckt nand3_x0 i0=$abc$109383$new_n19660_ i1=$abc$109383$new_n14914_ i2=$abc$109383$new_n14905_ nq=$abc$109383$new_n28115_
 .subckt nor3_x0 i0=$abc$109383$new_n14839_ i1=$abc$109383$new_n14834_ i2=$abc$109383$new_n14823_ nq=$abc$109383$new_n28116_
 .subckt nand4_x0 i0=$abc$109383$new_n28116_ i1=$abc$109383$new_n21960_ i2=$abc$109383$new_n19678_ i3=$abc$109383$new_n19661_ nq=$abc$109383$new_n28117_
-.subckt o4_x2 i0=$abc$109383$new_n28117_ i1=$abc$109383$new_n28115_ i2=$abc$109383$new_n28114_ i3=$abc$109383$new_n14929_ q=$abc$109383$new_n28118_
-.subckt o3_x2 i0=$abc$109383$new_n28118_ i1=$abc$109383$new_n28113_ i2=$abc$109383$new_n22005_ q=$abc$109383$new_n28119_
+.subckt or4_x1 i0=$abc$109383$new_n28117_ i1=$abc$109383$new_n28115_ i2=$abc$109383$new_n28114_ i3=$abc$109383$new_n14929_ q=$abc$109383$new_n28118_
+.subckt or3_x1 i0=$abc$109383$new_n28118_ i1=$abc$109383$new_n28113_ i2=$abc$109383$new_n22005_ q=$abc$109383$new_n28119_
 .subckt nor3_x0 i0=$abc$109383$new_n28119_ i1=$abc$109383$new_n28112_ i2=$abc$109383$new_n19687_ nq=$abc$109383$new_n28120_
-.subckt mx2_x2 cmd=$abc$109383$new_n28120_ i0=soc.bridge.csr_mux_0.uart_rx_err__shadow[0] i1=soc.rx.err__overflow q=$abc$109383$new_n28121_
-.subckt a2_x2 i0=$abc$109383$new_n28121_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100738
-.subckt mx2_x2 cmd=$abc$109383$new_n28120_ i0=soc.bridge.csr_mux_0.uart_rx_err__shadow[1] i1=soc.rx.err__frame q=$abc$109383$new_n28123_
-.subckt a2_x2 i0=$abc$109383$new_n28123_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100742
+.subckt mux2_x1 cmd=$abc$109383$new_n28120_ i0=soc.bridge.csr_mux_0.uart_rx_err__shadow[0] i1=soc.rx.err__overflow q=$abc$109383$new_n28121_
+.subckt and2_x1 i0=$abc$109383$new_n28121_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100738
+.subckt mux2_x1 cmd=$abc$109383$new_n28120_ i0=soc.bridge.csr_mux_0.uart_rx_err__shadow[1] i1=soc.rx.err__frame q=$abc$109383$new_n28123_
+.subckt and2_x1 i0=$abc$109383$new_n28123_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100742
 .subckt nor2_x0 i0=soc.rom.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n27421_ nq=$abc$109383$new_n28125_
 .subckt nor4_x0 i0=$abc$109383$new_n14929_ i1=$abc$109383$new_n14839_ i2=$abc$109383$new_n14834_ i3=$abc$109383$new_n14824_ nq=$abc$109383$new_n28126_
-.subckt a3_x2 i0=$abc$109383$new_n28126_ i1=$abc$109383$new_n21960_ i2=$abc$109383$new_n21344_ q=$abc$109383$new_n28127_
-.subckt a4_x2 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n27424_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n28128_
+.subckt and3_x1 i0=$abc$109383$new_n28126_ i1=$abc$109383$new_n21960_ i2=$abc$109383$new_n21344_ q=$abc$109383$new_n28127_
+.subckt and4_x1 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n27424_ i2=$abc$109383$new_n19662_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n28128_
 .subckt buf_x4 i=$abc$109383$new_n28128_ q=$abc$109383$new_n28129_
 .subckt buf_x4 i=$abc$109383$new_n28129_ q=$abc$109383$new_n28130_
 .subckt buf_x4 i=$abc$109383$new_n28130_ q=$abc$109383$new_n28131_
-.subckt a3_x2 i0=$abc$109383$new_n28131_ i1=$abc$109383$new_n28125_ i2=soc.rom.bridge.csr_bridge_0.cycle[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100760
+.subckt and3_x1 i0=$abc$109383$new_n28131_ i1=$abc$109383$new_n28125_ i2=soc.rom.bridge.csr_bridge_0.cycle[2] q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100760
 .subckt nor3_x0 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=soc.rom.bridge.csr_bridge_0.cycle[1] i2=soc.rst_sync1 nq=$abc$109383$new_n28133_
 .subckt nor3_x0 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=soc.rom.bridge.csr_bridge_0.cycle[1] i2=soc.rom.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n28134_
 .subckt buf_x4 i=$abc$109383$new_n28134_ q=$abc$109383$new_n28135_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n21954_ nq=$abc$109383$new_n28136_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n28137_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n28138_
-.subckt a3_x2 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n28138_ i2=$abc$109383$new_n28137_ q=$abc$109383$new_n28139_
+.subckt and3_x1 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n28138_ i2=$abc$109383$new_n28137_ q=$abc$109383$new_n28139_
 .subckt nand2_x0 i0=$abc$109383$new_n28139_ i1=$abc$109383$new_n21945_ nq=$abc$109383$new_n28140_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.cycle[0] nq=$abc$109383$new_n28141_
-.subckt a3_x2 i0=$abc$109383$new_n28141_ i1=soc.rom.bridge.csr_bridge_0.cycle[1] i2=$abc$109383$new_n28137_ q=$abc$109383$new_n28142_
+.subckt and3_x1 i0=$abc$109383$new_n28141_ i1=soc.rom.bridge.csr_bridge_0.cycle[1] i2=$abc$109383$new_n28137_ q=$abc$109383$new_n28142_
 .subckt nand2_x0 i0=$abc$109383$new_n28142_ i1=$abc$109383$new_n21950_ nq=$abc$109383$new_n28143_
 .subckt nand3_x0 i0=$abc$109383$new_n28143_ i1=$abc$109383$new_n28140_ i2=$abc$109383$new_n28136_ nq=$abc$109383$new_n28144_
-.subckt a2_x2 i0=$abc$109383$new_n28144_ i1=$abc$109383$new_n28130_ q=$abc$109383$new_n28145_
+.subckt and2_x1 i0=$abc$109383$new_n28144_ i1=$abc$109383$new_n28130_ q=$abc$109383$new_n28145_
 .subckt buf_x4 i=$abc$109383$new_n28137_ q=$abc$109383$new_n28146_
 .subckt buf_x4 i=$abc$109383$new_n28146_ q=$abc$109383$new_n28147_
-.subckt a2_x2 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=soc.rom.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28148_
+.subckt and2_x1 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=soc.rom.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28148_
 .subckt buf_x4 i=$abc$109383$new_n28148_ q=$abc$109383$new_n28149_
-.subckt a4_x2 i0=$abc$109383$new_n28149_ i1=$abc$109383$new_n28129_ i2=$abc$109383$new_n21940_ i3=$abc$109383$new_n28147_ q=$abc$109383$new_n28150_
-.subckt ao22_x2 i0=$abc$109383$new_n28150_ i1=$abc$109383$new_n28145_ i2=$abc$109383$new_n28133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100762
-.subckt a4_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n28141_ i2=soc.rom.bridge.csr_bridge_0.cycle[1] i3=$abc$109383$new_n28137_ q=$abc$109383$new_n28152_
-.subckt a2_x2 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n28153_
-.subckt a3_x2 i0=$abc$109383$new_n28148_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n28137_ q=$abc$109383$new_n28154_
-.subckt a4_x2 i0=$abc$109383$new_n20355_ i1=soc.rom.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n28138_ i3=$abc$109383$new_n28137_ q=$abc$109383$new_n28155_
-.subckt o4_x2 i0=$abc$109383$new_n28155_ i1=$abc$109383$new_n28154_ i2=$abc$109383$new_n28153_ i3=$abc$109383$new_n28152_ q=$abc$109383$new_n28156_
+.subckt and4_x1 i0=$abc$109383$new_n28149_ i1=$abc$109383$new_n28129_ i2=$abc$109383$new_n21940_ i3=$abc$109383$new_n28147_ q=$abc$109383$new_n28150_
+.subckt and21nor_x1 i0=$abc$109383$new_n28150_ i1=$abc$109383$new_n28145_ i2=$abc$109383$new_n28133_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100762
+.subckt and4_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n28141_ i2=soc.rom.bridge.csr_bridge_0.cycle[1] i3=$abc$109383$new_n28137_ q=$abc$109383$new_n28152_
+.subckt and2_x1 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n28153_
+.subckt and3_x1 i0=$abc$109383$new_n28148_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n28137_ q=$abc$109383$new_n28154_
+.subckt and4_x1 i0=$abc$109383$new_n20355_ i1=soc.rom.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n28138_ i3=$abc$109383$new_n28137_ q=$abc$109383$new_n28155_
+.subckt or4_x1 i0=$abc$109383$new_n28155_ i1=$abc$109383$new_n28154_ i2=$abc$109383$new_n28153_ i3=$abc$109383$new_n28152_ q=$abc$109383$new_n28156_
 .subckt buf_x4 i=$abc$109383$new_n28156_ q=$abc$109383$new_n28157_
 .subckt buf_x4 i=$abc$109383$new_n28146_ q=$abc$109383$new_n28158_
 .subckt buf_x4 i=$abc$109383$new_n28138_ q=$abc$109383$new_n28159_
@@ -13439,9 +13439,9 @@
 .subckt buf_x4 i=$abc$109383$new_n28141_ q=$abc$109383$new_n28165_
 .subckt nand4_x0 i0=$abc$109383$new_n20541_ i1=$abc$109383$new_n28165_ i2=$abc$109383$new_n28164_ i3=$abc$109383$new_n28158_ nq=$abc$109383$new_n28166_
 .subckt nand4_x0 i0=$abc$109383$new_n28166_ i1=$abc$109383$new_n28163_ i2=$abc$109383$new_n28162_ i3=$abc$109383$new_n28161_ nq=$abc$109383$new_n28167_
-.subckt a4_x2 i0=$abc$109383$new_n28167_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n28133_ i3=$abc$109383$new_n28130_ q=$abc$109383$new_n28168_
+.subckt and4_x1 i0=$abc$109383$new_n28167_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n28133_ i3=$abc$109383$new_n28130_ q=$abc$109383$new_n28168_
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n28169_
-.subckt a2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0] i1=$abc$109383$new_n28169_ q=$abc$109383$new_n28170_
+.subckt and2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0] i1=$abc$109383$new_n28169_ q=$abc$109383$new_n28170_
 .subckt nor2_x0 i0=soc.rom.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n28164_ nq=$abc$109383$new_n28171_
 .subckt buf_x4 i=$abc$109383$new_n28171_ q=$abc$109383$new_n28172_
 .subckt nand2_x0 i0=$abc$109383$new_n28144_ i1=$abc$109383$new_n28129_ nq=$abc$109383$new_n28173_
@@ -13450,13 +13450,13 @@
 .subckt nand3_x0 i0=$abc$109383$new_n28175_ i1=$abc$109383$new_n28174_ i2=$abc$109383$new_n28173_ nq=$abc$109383$new_n28176_
 .subckt buf_x4 i=$abc$109383$new_n28176_ q=$abc$109383$new_n28177_
 .subckt nand2_x0 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28172_ nq=$abc$109383$new_n28178_
-.subckt oa22_x2 i0=$abc$109383$new_n28178_ i1=$abc$109383$new_n28170_ i2=$abc$109383$new_n28168_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100766
+.subckt or21nand_x1 i0=$abc$109383$new_n28178_ i1=$abc$109383$new_n28170_ i2=$abc$109383$new_n28168_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100766
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[1] nq=$abc$109383$new_n28180_
-.subckt oa22_x2 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28172_ i2=$abc$109383$new_n28180_ q=$abc$109383$new_n28181_
+.subckt or21nand_x1 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28172_ i2=$abc$109383$new_n28180_ nq=$abc$109383$new_n28181_
 .subckt nor3_x0 i0=$abc$109383$new_n14850_ i1=$abc$109383$new_n19690_ i2=$abc$109383$new_n19694_ nq=$abc$109383$new_n28182_
 .subckt nor4_x0 i0=$abc$109383$new_n14954_ i1=$abc$109383$new_n15136_ i2=$abc$109383$new_n14834_ i3=$abc$109383$new_n14824_ nq=$abc$109383$new_n28183_
-.subckt a3_x2 i0=$abc$109383$new_n28183_ i1=$abc$109383$new_n28182_ i2=$abc$109383$new_n21960_ q=$abc$109383$new_n28184_
-.subckt a4_x2 i0=$abc$109383$new_n28184_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n27494_ i3=$abc$109383$new_n19647_ q=$abc$109383$new_n28185_
+.subckt and3_x1 i0=$abc$109383$new_n28183_ i1=$abc$109383$new_n28182_ i2=$abc$109383$new_n21960_ q=$abc$109383$new_n28184_
+.subckt and4_x1 i0=$abc$109383$new_n28184_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n27494_ i3=$abc$109383$new_n19647_ q=$abc$109383$new_n28185_
 .subckt nand4_x0 i0=$abc$109383$new_n20365_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28159_ i3=$abc$109383$new_n28147_ nq=$abc$109383$new_n28186_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20273_ nq=$abc$109383$new_n28187_
 .subckt nand3_x0 i0=$abc$109383$new_n28149_ i1=$abc$109383$new_n19789_ i2=$abc$109383$new_n28147_ nq=$abc$109383$new_n28188_
@@ -13464,10 +13464,10 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28189_ i1=$abc$109383$new_n28188_ i2=$abc$109383$new_n28187_ i3=$abc$109383$new_n28186_ nq=$abc$109383$new_n28190_
 .subckt nand3_x0 i0=$abc$109383$new_n28190_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28172_ nq=$abc$109383$new_n28191_
 .subckt nand2_x0 i0=$abc$109383$new_n28191_ i1=$abc$109383$new_n28181_ nq=$abc$109383$new_n28192_
-.subckt a2_x2 i0=$abc$109383$new_n28192_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100770
+.subckt and2_x1 i0=$abc$109383$new_n28192_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100770
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[2] i1=$abc$109383$new_n27848_ nq=$abc$109383$new_n28194_
 .subckt buf_x4 i=$abc$109383$new_n28176_ q=$abc$109383$new_n28195_
-.subckt oa22_x2 i0=$abc$109383$new_n28172_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28194_ q=$abc$109383$new_n28196_
+.subckt or21nand_x1 i0=$abc$109383$new_n28172_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28194_ nq=$abc$109383$new_n28196_
 .subckt buf_x4 i=$abc$109383$new_n28157_ q=$abc$109383$new_n28197_
 .subckt nand4_x0 i0=$abc$109383$new_n20370_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28159_ i3=$abc$109383$new_n28158_ nq=$abc$109383$new_n28198_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20277_ nq=$abc$109383$new_n28199_
@@ -13477,7 +13477,7 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28202_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28133_ i3=$abc$109383$new_n28131_ nq=$abc$109383$new_n28203_
 .subckt nand2_x0 i0=$abc$109383$new_n28203_ i1=$abc$109383$new_n28196_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100774
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[3] nq=$abc$109383$new_n28205_
-.subckt oa22_x2 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28172_ i2=$abc$109383$new_n28205_ q=$abc$109383$new_n28206_
+.subckt or21nand_x1 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28172_ i2=$abc$109383$new_n28205_ nq=$abc$109383$new_n28206_
 .subckt nand4_x0 i0=$abc$109383$new_n20563_ i1=$abc$109383$new_n28165_ i2=$abc$109383$new_n28164_ i3=$abc$109383$new_n28158_ nq=$abc$109383$new_n28207_
 .subckt nand4_x0 i0=$abc$109383$new_n20374_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28159_ i3=$abc$109383$new_n28158_ nq=$abc$109383$new_n28208_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20281_ nq=$abc$109383$new_n28209_
@@ -13485,9 +13485,9 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28210_ i1=$abc$109383$new_n28209_ i2=$abc$109383$new_n28208_ i3=$abc$109383$new_n28207_ nq=$abc$109383$new_n28211_
 .subckt nand4_x0 i0=$abc$109383$new_n28211_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28172_ i3=$abc$109383$new_n28131_ nq=$abc$109383$new_n28212_
 .subckt nand2_x0 i0=$abc$109383$new_n28212_ i1=$abc$109383$new_n28206_ nq=$abc$109383$new_n28213_
-.subckt a2_x2 i0=$abc$109383$new_n28213_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100778
+.subckt and2_x1 i0=$abc$109383$new_n28213_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100778
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[4] nq=$abc$109383$new_n28215_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28171_ i2=$abc$109383$new_n28215_ q=$abc$109383$new_n28216_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28171_ i2=$abc$109383$new_n28215_ nq=$abc$109383$new_n28216_
 .subckt nand4_x0 i0=$abc$109383$new_n20568_ i1=$abc$109383$new_n28165_ i2=$abc$109383$new_n28164_ i3=$abc$109383$new_n28158_ nq=$abc$109383$new_n28217_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20285_ nq=$abc$109383$new_n28218_
 .subckt nand4_x0 i0=$abc$109383$new_n20379_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28159_ i3=$abc$109383$new_n28158_ nq=$abc$109383$new_n28219_
@@ -13495,9 +13495,9 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28220_ i1=$abc$109383$new_n28219_ i2=$abc$109383$new_n28218_ i3=$abc$109383$new_n28217_ nq=$abc$109383$new_n28221_
 .subckt nand3_x0 i0=$abc$109383$new_n28221_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28172_ nq=$abc$109383$new_n28222_
 .subckt nand2_x0 i0=$abc$109383$new_n28222_ i1=$abc$109383$new_n28216_ nq=$abc$109383$new_n28223_
-.subckt a2_x2 i0=$abc$109383$new_n28223_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100782
+.subckt and2_x1 i0=$abc$109383$new_n28223_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100782
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[5] i1=$abc$109383$new_n27848_ nq=$abc$109383$new_n28225_
-.subckt oa22_x2 i0=$abc$109383$new_n28172_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28225_ q=$abc$109383$new_n28226_
+.subckt or21nand_x1 i0=$abc$109383$new_n28172_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28225_ nq=$abc$109383$new_n28226_
 .subckt buf_x4 i=$abc$109383$new_n28149_ q=$abc$109383$new_n28227_
 .subckt nand3_x0 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n19766_ i2=$abc$109383$new_n28147_ nq=$abc$109383$new_n28228_
 .subckt nand4_x0 i0=$abc$109383$new_n26965_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28159_ i3=$abc$109383$new_n28147_ nq=$abc$109383$new_n28229_
@@ -13507,12 +13507,12 @@
 .subckt nand3_x0 i0=$abc$109383$new_n28232_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28133_ nq=$abc$109383$new_n28233_
 .subckt nand2_x0 i0=$abc$109383$new_n28233_ i1=$abc$109383$new_n28226_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100786
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[6] i1=$abc$109383$new_n27848_ nq=$abc$109383$new_n28235_
-.subckt oa22_x2 i0=$abc$109383$new_n28172_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28235_ q=$abc$109383$new_n28236_
-.subckt a2_x2 i0=$abc$109383$new_n28126_ i1=$abc$109383$new_n21344_ q=$abc$109383$new_n28237_
+.subckt or21nand_x1 i0=$abc$109383$new_n28172_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28235_ nq=$abc$109383$new_n28236_
+.subckt and2_x1 i0=$abc$109383$new_n28126_ i1=$abc$109383$new_n21344_ q=$abc$109383$new_n28237_
 .subckt buf_x4 i=$abc$109383$new_n28237_ q=$abc$109383$new_n28238_
-.subckt a4_x2 i0=$abc$109383$new_n21960_ i1=$abc$109383$new_n27643_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n14802_ q=$abc$109383$new_n28239_
+.subckt and4_x1 i0=$abc$109383$new_n21960_ i1=$abc$109383$new_n27643_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n14802_ q=$abc$109383$new_n28239_
 .subckt buf_x4 i=$abc$109383$new_n28239_ q=$abc$109383$new_n28240_
-.subckt a4_x2 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n28238_ i3=$abc$109383$new_n19647_ q=$abc$109383$new_n28241_
+.subckt and4_x1 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n28238_ i3=$abc$109383$new_n19647_ q=$abc$109383$new_n28241_
 .subckt nand4_x0 i0=$abc$109383$new_n20576_ i1=$abc$109383$new_n28165_ i2=$abc$109383$new_n28164_ i3=$abc$109383$new_n28147_ nq=$abc$109383$new_n28242_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20293_ nq=$abc$109383$new_n28243_
 .subckt nand4_x0 i0=$abc$109383$new_n20387_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28159_ i3=$abc$109383$new_n28147_ nq=$abc$109383$new_n28244_
@@ -13521,7 +13521,7 @@
 .subckt nand3_x0 i0=$abc$109383$new_n28246_ i1=$abc$109383$new_n28241_ i2=$abc$109383$new_n28133_ nq=$abc$109383$new_n28247_
 .subckt nand2_x0 i0=$abc$109383$new_n28247_ i1=$abc$109383$new_n28236_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100790
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[7] nq=$abc$109383$new_n28249_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28171_ i2=$abc$109383$new_n28249_ q=$abc$109383$new_n28250_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28171_ i2=$abc$109383$new_n28249_ nq=$abc$109383$new_n28250_
 .subckt nand4_x0 i0=$abc$109383$new_n20580_ i1=$abc$109383$new_n28141_ i2=$abc$109383$new_n28164_ i3=$abc$109383$new_n28146_ nq=$abc$109383$new_n28251_
 .subckt nand2_x0 i0=$abc$109383$new_n28135_ i1=$abc$109383$new_n20297_ nq=$abc$109383$new_n28252_
 .subckt nand4_x0 i0=$abc$109383$new_n20391_ i1=soc.rom.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n28138_ i3=$abc$109383$new_n28146_ nq=$abc$109383$new_n28253_
@@ -13529,202 +13529,202 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28254_ i1=$abc$109383$new_n28253_ i2=$abc$109383$new_n28252_ i3=$abc$109383$new_n28251_ nq=$abc$109383$new_n28255_
 .subckt nand4_x0 i0=$abc$109383$new_n28255_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28172_ i3=$abc$109383$new_n28131_ nq=$abc$109383$new_n28256_
 .subckt nand2_x0 i0=$abc$109383$new_n28256_ i1=$abc$109383$new_n28250_ nq=$abc$109383$new_n28257_
-.subckt a2_x2 i0=$abc$109383$new_n28257_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100794
-.subckt a3_x2 i0=$abc$109383$new_n28197_ i1=$abc$109383$new_n28133_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100796
-.subckt a3_x2 i0=$abc$109383$new_n28160_ i1=$abc$109383$new_n28159_ i2=$abc$109383$new_n27429_ q=$abc$109383$new_n28260_
+.subckt and2_x1 i0=$abc$109383$new_n28257_ i1=$abc$109383$new_n28092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100794
+.subckt and3_x1 i0=$abc$109383$new_n28197_ i1=$abc$109383$new_n28133_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100796
+.subckt and3_x1 i0=$abc$109383$new_n28160_ i1=$abc$109383$new_n28159_ i2=$abc$109383$new_n27429_ q=$abc$109383$new_n28260_
 .subckt buf_x4 i=$abc$109383$new_n28260_ q=$abc$109383$new_n28261_
-.subckt ao22_x2 i0=$abc$109383$new_n28145_ i1=$abc$109383$new_n28150_ i2=$abc$109383$new_n28261_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100798
+.subckt and21nor_x1 i0=$abc$109383$new_n28145_ i1=$abc$109383$new_n28150_ i2=$abc$109383$new_n28261_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100798
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[0] i1=$abc$109383$new_n27848_ nq=$abc$109383$new_n28263_
-.subckt a2_x2 i0=$abc$109383$new_n28160_ i1=$abc$109383$new_n28159_ q=$abc$109383$new_n28264_
+.subckt and2_x1 i0=$abc$109383$new_n28160_ i1=$abc$109383$new_n28159_ q=$abc$109383$new_n28264_
 .subckt buf_x4 i=$abc$109383$new_n28264_ q=$abc$109383$new_n28265_
-.subckt oa22_x2 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28263_ q=$abc$109383$new_n28266_
+.subckt or21nand_x1 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28263_ nq=$abc$109383$new_n28266_
 .subckt buf_x4 i=$abc$109383$new_n28185_ q=$abc$109383$new_n28267_
 .subckt nand3_x0 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28167_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28268_
 .subckt nand2_x0 i0=$abc$109383$new_n28268_ i1=$abc$109383$new_n28266_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100802
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[1] i1=$abc$109383$new_n27848_ nq=$abc$109383$new_n28270_
-.subckt oa22_x2 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28270_ q=$abc$109383$new_n28271_
+.subckt or21nand_x1 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28270_ nq=$abc$109383$new_n28271_
 .subckt nand3_x0 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28190_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28272_
 .subckt nand2_x0 i0=$abc$109383$new_n28272_ i1=$abc$109383$new_n28271_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100806
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n28274_
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28275_
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[2] nq=$abc$109383$new_n28276_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28265_ i2=$abc$109383$new_n28276_ q=$abc$109383$new_n28277_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28265_ i2=$abc$109383$new_n28276_ nq=$abc$109383$new_n28277_
 .subckt nand4_x0 i0=$abc$109383$new_n28202_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28265_ i3=$abc$109383$new_n28131_ nq=$abc$109383$new_n28278_
 .subckt nand2_x0 i0=$abc$109383$new_n28278_ i1=$abc$109383$new_n28277_ nq=$abc$109383$new_n28279_
-.subckt a2_x2 i0=$abc$109383$new_n28279_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100810
+.subckt and2_x1 i0=$abc$109383$new_n28279_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100810
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[3] nq=$abc$109383$new_n28281_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28265_ i2=$abc$109383$new_n28281_ q=$abc$109383$new_n28282_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28265_ i2=$abc$109383$new_n28281_ nq=$abc$109383$new_n28282_
 .subckt nand4_x0 i0=$abc$109383$new_n28211_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28265_ i3=$abc$109383$new_n28131_ nq=$abc$109383$new_n28283_
 .subckt nand2_x0 i0=$abc$109383$new_n28283_ i1=$abc$109383$new_n28282_ nq=$abc$109383$new_n28284_
-.subckt a2_x2 i0=$abc$109383$new_n28284_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100814
+.subckt and2_x1 i0=$abc$109383$new_n28284_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100814
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n28286_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[4] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28287_
-.subckt oa22_x2 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28287_ q=$abc$109383$new_n28288_
+.subckt or21nand_x1 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28287_ nq=$abc$109383$new_n28288_
 .subckt nand3_x0 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28221_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28289_
 .subckt nand2_x0 i0=$abc$109383$new_n28289_ i1=$abc$109383$new_n28288_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100818
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[5] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28291_
-.subckt oa22_x2 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28291_ q=$abc$109383$new_n28292_
+.subckt or21nand_x1 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28291_ nq=$abc$109383$new_n28292_
 .subckt nand3_x0 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28232_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28293_
 .subckt nand2_x0 i0=$abc$109383$new_n28293_ i1=$abc$109383$new_n28292_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100822
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[6] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28295_
-.subckt oa22_x2 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28295_ q=$abc$109383$new_n28296_
+.subckt or21nand_x1 i0=$abc$109383$new_n28265_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28295_ nq=$abc$109383$new_n28296_
 .subckt nand3_x0 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28246_ i2=$abc$109383$new_n28241_ nq=$abc$109383$new_n28297_
 .subckt nand2_x0 i0=$abc$109383$new_n28297_ i1=$abc$109383$new_n28296_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100826
-.subckt a4_x2 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28255_ i2=$abc$109383$new_n28157_ i3=$abc$109383$new_n28130_ q=$abc$109383$new_n28299_
-.subckt a2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[7] i1=$abc$109383$new_n28169_ q=$abc$109383$new_n28300_
+.subckt and4_x1 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28255_ i2=$abc$109383$new_n28157_ i3=$abc$109383$new_n28130_ q=$abc$109383$new_n28299_
+.subckt and2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[7] i1=$abc$109383$new_n28169_ q=$abc$109383$new_n28300_
 .subckt nand2_x0 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28265_ nq=$abc$109383$new_n28301_
-.subckt oa22_x2 i0=$abc$109383$new_n28301_ i1=$abc$109383$new_n28300_ i2=$abc$109383$new_n28299_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100830
-.subckt a3_x2 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100832
-.subckt a3_x2 i0=$abc$109383$new_n28165_ i1=$abc$109383$new_n28164_ i2=$abc$109383$new_n27429_ q=$abc$109383$new_n28304_
-.subckt ao22_x2 i0=$abc$109383$new_n28145_ i1=$abc$109383$new_n28150_ i2=$abc$109383$new_n28304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100834
+.subckt or21nand_x1 i0=$abc$109383$new_n28301_ i1=$abc$109383$new_n28300_ i2=$abc$109383$new_n28299_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100830
+.subckt and3_x1 i0=$abc$109383$new_n28261_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100832
+.subckt and3_x1 i0=$abc$109383$new_n28165_ i1=$abc$109383$new_n28164_ i2=$abc$109383$new_n27429_ q=$abc$109383$new_n28304_
+.subckt and21nor_x1 i0=$abc$109383$new_n28145_ i1=$abc$109383$new_n28150_ i2=$abc$109383$new_n28304_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100834
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[0] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28306_
-.subckt a2_x2 i0=$abc$109383$new_n28165_ i1=soc.rom.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28307_
+.subckt and2_x1 i0=$abc$109383$new_n28165_ i1=soc.rom.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28307_
 .subckt buf_x4 i=$abc$109383$new_n28307_ q=$abc$109383$new_n28308_
-.subckt oa22_x2 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28306_ q=$abc$109383$new_n28309_
+.subckt or21nand_x1 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28306_ nq=$abc$109383$new_n28309_
 .subckt nand3_x0 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28167_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28310_
 .subckt nand2_x0 i0=$abc$109383$new_n28310_ i1=$abc$109383$new_n28309_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100838
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[1] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28312_
-.subckt oa22_x2 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28312_ q=$abc$109383$new_n28313_
+.subckt or21nand_x1 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28195_ i2=$abc$109383$new_n28312_ nq=$abc$109383$new_n28313_
 .subckt nand3_x0 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28190_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28314_
 .subckt nand2_x0 i0=$abc$109383$new_n28314_ i1=$abc$109383$new_n28313_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100842
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[2] nq=$abc$109383$new_n28316_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28308_ i2=$abc$109383$new_n28316_ q=$abc$109383$new_n28317_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28308_ i2=$abc$109383$new_n28316_ nq=$abc$109383$new_n28317_
 .subckt nand4_x0 i0=$abc$109383$new_n28202_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28308_ i3=$abc$109383$new_n28130_ nq=$abc$109383$new_n28318_
 .subckt nand2_x0 i0=$abc$109383$new_n28318_ i1=$abc$109383$new_n28317_ nq=$abc$109383$new_n28319_
-.subckt a2_x2 i0=$abc$109383$new_n28319_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100846
+.subckt and2_x1 i0=$abc$109383$new_n28319_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100846
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[3] nq=$abc$109383$new_n28321_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28308_ i2=$abc$109383$new_n28321_ q=$abc$109383$new_n28322_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28308_ i2=$abc$109383$new_n28321_ nq=$abc$109383$new_n28322_
 .subckt nand4_x0 i0=$abc$109383$new_n28211_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n28308_ i3=$abc$109383$new_n28130_ nq=$abc$109383$new_n28323_
 .subckt nand2_x0 i0=$abc$109383$new_n28323_ i1=$abc$109383$new_n28322_ nq=$abc$109383$new_n28324_
-.subckt a2_x2 i0=$abc$109383$new_n28324_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100850
+.subckt and2_x1 i0=$abc$109383$new_n28324_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100850
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[4] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28326_
-.subckt oa22_x2 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28326_ q=$abc$109383$new_n28327_
+.subckt or21nand_x1 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28326_ nq=$abc$109383$new_n28327_
 .subckt nand3_x0 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28221_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28328_
 .subckt nand2_x0 i0=$abc$109383$new_n28328_ i1=$abc$109383$new_n28327_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100854
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[5] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28330_
-.subckt oa22_x2 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28330_ q=$abc$109383$new_n28331_
+.subckt or21nand_x1 i0=$abc$109383$new_n28308_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28330_ nq=$abc$109383$new_n28331_
 .subckt nand3_x0 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28232_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28332_
 .subckt nand2_x0 i0=$abc$109383$new_n28332_ i1=$abc$109383$new_n28331_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100858
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[6] nq=$abc$109383$new_n28334_
-.subckt oa22_x2 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28307_ i2=$abc$109383$new_n28334_ q=$abc$109383$new_n28335_
+.subckt or21nand_x1 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28307_ i2=$abc$109383$new_n28334_ nq=$abc$109383$new_n28335_
 .subckt nand3_x0 i0=$abc$109383$new_n28246_ i1=$abc$109383$new_n28241_ i2=$abc$109383$new_n28308_ nq=$abc$109383$new_n28336_
 .subckt nand2_x0 i0=$abc$109383$new_n28336_ i1=$abc$109383$new_n28335_ nq=$abc$109383$new_n28337_
-.subckt a2_x2 i0=$abc$109383$new_n28337_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100862
-.subckt a4_x2 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28255_ i2=$abc$109383$new_n28157_ i3=$abc$109383$new_n28130_ q=$abc$109383$new_n28339_
-.subckt a2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[7] i1=$abc$109383$new_n28169_ q=$abc$109383$new_n28340_
+.subckt and2_x1 i0=$abc$109383$new_n28337_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100862
+.subckt and4_x1 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28255_ i2=$abc$109383$new_n28157_ i3=$abc$109383$new_n28130_ q=$abc$109383$new_n28339_
+.subckt and2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[7] i1=$abc$109383$new_n28169_ q=$abc$109383$new_n28340_
 .subckt nand2_x0 i0=$abc$109383$new_n28177_ i1=$abc$109383$new_n28308_ nq=$abc$109383$new_n28341_
-.subckt oa22_x2 i0=$abc$109383$new_n28341_ i1=$abc$109383$new_n28340_ i2=$abc$109383$new_n28339_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100866
-.subckt a3_x2 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100868
-.subckt a2_x2 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n27603_ q=$abc$109383$new_n28344_
-.subckt ao22_x2 i0=$abc$109383$new_n28145_ i1=$abc$109383$new_n28150_ i2=$abc$109383$new_n28344_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100870
+.subckt or21nand_x1 i0=$abc$109383$new_n28341_ i1=$abc$109383$new_n28340_ i2=$abc$109383$new_n28339_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100866
+.subckt and3_x1 i0=$abc$109383$new_n28304_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100868
+.subckt and2_x1 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n27603_ q=$abc$109383$new_n28344_
+.subckt and21nor_x1 i0=$abc$109383$new_n28145_ i1=$abc$109383$new_n28150_ i2=$abc$109383$new_n28344_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100870
 .subckt nand2_x0 i0=$abc$109383$new_n28176_ i1=$abc$109383$new_n28149_ nq=$abc$109383$new_n28346_
-.subckt a2_x2 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[0] q=$abc$109383$new_n28347_
-.subckt a3_x2 i0=$abc$109383$new_n28167_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28348_
-.subckt ao22_x2 i0=$abc$109383$new_n28348_ i1=$abc$109383$new_n28347_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100874
+.subckt and2_x1 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[0] q=$abc$109383$new_n28347_
+.subckt and3_x1 i0=$abc$109383$new_n28167_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28348_
+.subckt and21nor_x1 i0=$abc$109383$new_n28348_ i1=$abc$109383$new_n28347_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100874
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[1] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28350_
-.subckt oa22_x2 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28350_ q=$abc$109383$new_n28351_
+.subckt or21nand_x1 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28350_ nq=$abc$109383$new_n28351_
 .subckt nand3_x0 i0=$abc$109383$new_n28344_ i1=$abc$109383$new_n28190_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28352_
 .subckt nand2_x0 i0=$abc$109383$new_n28352_ i1=$abc$109383$new_n28351_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100878
-.subckt a2_x2 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[2] q=$abc$109383$new_n28354_
-.subckt a3_x2 i0=$abc$109383$new_n28202_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28355_
-.subckt ao22_x2 i0=$abc$109383$new_n28355_ i1=$abc$109383$new_n28354_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100882
-.subckt a2_x2 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[3] q=$abc$109383$new_n28357_
-.subckt a3_x2 i0=$abc$109383$new_n28211_ i1=$abc$109383$new_n28241_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28358_
-.subckt ao22_x2 i0=$abc$109383$new_n28358_ i1=$abc$109383$new_n28357_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100886
-.subckt a2_x2 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[4] q=$abc$109383$new_n28360_
-.subckt a3_x2 i0=$abc$109383$new_n28221_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28361_
-.subckt ao22_x2 i0=$abc$109383$new_n28361_ i1=$abc$109383$new_n28360_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100890
+.subckt and2_x1 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[2] q=$abc$109383$new_n28354_
+.subckt and3_x1 i0=$abc$109383$new_n28202_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28355_
+.subckt and21nor_x1 i0=$abc$109383$new_n28355_ i1=$abc$109383$new_n28354_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100882
+.subckt and2_x1 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[3] q=$abc$109383$new_n28357_
+.subckt and3_x1 i0=$abc$109383$new_n28211_ i1=$abc$109383$new_n28241_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28358_
+.subckt and21nor_x1 i0=$abc$109383$new_n28358_ i1=$abc$109383$new_n28357_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100886
+.subckt and2_x1 i0=$abc$109383$new_n28346_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[4] q=$abc$109383$new_n28360_
+.subckt and3_x1 i0=$abc$109383$new_n28221_ i1=$abc$109383$new_n28185_ i2=$abc$109383$new_n28227_ q=$abc$109383$new_n28361_
+.subckt and21nor_x1 i0=$abc$109383$new_n28361_ i1=$abc$109383$new_n28360_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100890
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[5] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28363_
-.subckt oa22_x2 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28363_ q=$abc$109383$new_n28364_
+.subckt or21nand_x1 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28363_ nq=$abc$109383$new_n28364_
 .subckt nand3_x0 i0=$abc$109383$new_n28344_ i1=$abc$109383$new_n28232_ i2=$abc$109383$new_n28267_ nq=$abc$109383$new_n28365_
 .subckt nand2_x0 i0=$abc$109383$new_n28365_ i1=$abc$109383$new_n28364_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100894
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[6] i1=$abc$109383$new_n28286_ nq=$abc$109383$new_n28367_
-.subckt oa22_x2 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28367_ q=$abc$109383$new_n28368_
+.subckt or21nand_x1 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28177_ i2=$abc$109383$new_n28367_ nq=$abc$109383$new_n28368_
 .subckt nand3_x0 i0=$abc$109383$new_n28344_ i1=$abc$109383$new_n28246_ i2=$abc$109383$new_n28241_ nq=$abc$109383$new_n28369_
 .subckt nand2_x0 i0=$abc$109383$new_n28369_ i1=$abc$109383$new_n28368_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100898
 .subckt nand3_x0 i0=$abc$109383$new_n28255_ i1=$abc$109383$new_n28157_ i2=$abc$109383$new_n28130_ nq=$abc$109383$new_n28371_
-.subckt oa22_x2 i0=$abc$109383$new_n28157_ i1=$abc$109383$new_n28129_ i2=$abc$109383$new_n15197_ q=$abc$109383$new_n28372_
+.subckt or21nand_x1 i0=$abc$109383$new_n28157_ i1=$abc$109383$new_n28129_ i2=$abc$109383$new_n15197_ nq=$abc$109383$new_n28372_
 .subckt nand2_x0 i0=$abc$109383$new_n28372_ i1=$abc$109383$new_n28371_ nq=$abc$109383$new_n28373_
-.subckt mx2_x2 cmd=$abc$109383$new_n28346_ i0=$abc$109383$new_n28373_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7] q=$abc$109383$new_n28374_
-.subckt a2_x2 i0=$abc$109383$new_n28374_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100902
+.subckt mux2_x1 cmd=$abc$109383$new_n28346_ i0=$abc$109383$new_n28373_ i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7] q=$abc$109383$new_n28374_
+.subckt and2_x1 i0=$abc$109383$new_n28374_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100902
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n28376_
-.subckt o2_x2 i0=soc.rom.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n28376_ q=$abc$109383$new_n28377_
+.subckt or2_x1 i0=soc.rom.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n28376_ q=$abc$109383$new_n28377_
 .subckt buf_x4 i=$abc$109383$new_n19662_ q=$abc$109383$new_n28378_
 .subckt buf_x4 i=$abc$109383$new_n28378_ q=$abc$109383$new_n28379_
 .subckt buf_x4 i=$abc$109383$new_n27424_ q=$abc$109383$new_n28380_
 .subckt buf_x4 i=$abc$109383$new_n28380_ q=$abc$109383$new_n28381_
 .subckt buf_x4 i=$abc$109383$new_n28127_ q=$abc$109383$new_n28382_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n28379_ i3=$abc$109383$new_n19648_ nq=$abc$109383$new_n28383_
-.subckt ao22_x2 i0=soc.rom.bridge.csr_bridge_0.cycle[2] i1=$abc$109383$new_n28383_ i2=$abc$109383$new_n28165_ q=$abc$109383$new_n28384_
-.subckt a3_x2 i0=$abc$109383$new_n28130_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28147_ q=$abc$109383$new_n28385_
+.subckt and21nor_x1 i0=soc.rom.bridge.csr_bridge_0.cycle[2] i1=$abc$109383$new_n28383_ i2=$abc$109383$new_n28165_ nq=$abc$109383$new_n28384_
+.subckt and3_x1 i0=$abc$109383$new_n28130_ i1=$abc$109383$new_n28160_ i2=$abc$109383$new_n28147_ q=$abc$109383$new_n28385_
 .subckt nor3_x0 i0=$abc$109383$new_n28385_ i1=$abc$109383$new_n28384_ i2=$abc$109383$new_n28377_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100970
 .subckt nor2_x0 i0=$abc$109383$new_n28385_ i1=$abc$109383$new_n28159_ nq=$abc$109383$new_n28387_
 .subckt buf_x4 i=$abc$109383$new_n28184_ q=$abc$109383$new_n28388_
-.subckt a4_x2 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n28139_ i2=$abc$109383$new_n27640_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n28389_
-.subckt ao22_x2 i0=$abc$109383$new_n28389_ i1=$abc$109383$new_n28387_ i2=$abc$109383$new_n28125_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100974
-.subckt oa22_x2 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28130_ i2=soc.rom.bridge.csr_bridge_0.cycle[2] q=$abc$109383$new_n28391_
-.subckt a2_x2 i0=$abc$109383$new_n28391_ i1=$abc$109383$new_n28125_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100978
+.subckt and4_x1 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n28139_ i2=$abc$109383$new_n27640_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n28389_
+.subckt and21nor_x1 i0=$abc$109383$new_n28389_ i1=$abc$109383$new_n28387_ i2=$abc$109383$new_n28125_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100974
+.subckt or21nand_x1 i0=$abc$109383$new_n28227_ i1=$abc$109383$new_n28130_ i2=soc.rom.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n28391_
+.subckt and2_x1 i0=$abc$109383$new_n28391_ i1=$abc$109383$new_n28125_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100978
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28393_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28394_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28395_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28396_
 .subckt nand4_x0 i0=$abc$109383$new_n28396_ i1=$abc$109383$new_n28395_ i2=$abc$109383$new_n28394_ i3=$abc$109383$new_n28393_ nq=$abc$109383$new_n28397_
 .subckt nand3_x0 i0=$abc$109383$new_n28149_ i1=$abc$109383$new_n28129_ i2=$abc$109383$new_n28146_ nq=$abc$109383$new_n28398_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[16] q=$abc$109383$new_n28399_
-.subckt a2_x2 i0=$abc$109383$new_n28399_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100982
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[16] q=$abc$109383$new_n28399_
+.subckt and2_x1 i0=$abc$109383$new_n28399_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100982
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28401_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28402_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28403_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28404_
 .subckt nand4_x0 i0=$abc$109383$new_n28404_ i1=$abc$109383$new_n28403_ i2=$abc$109383$new_n28402_ i3=$abc$109383$new_n28401_ nq=$abc$109383$new_n28405_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[17] q=$abc$109383$new_n28406_
-.subckt a2_x2 i0=$abc$109383$new_n28406_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100986
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[17] q=$abc$109383$new_n28406_
+.subckt and2_x1 i0=$abc$109383$new_n28406_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100986
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28408_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28409_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28410_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28411_
 .subckt nand4_x0 i0=$abc$109383$new_n28411_ i1=$abc$109383$new_n28410_ i2=$abc$109383$new_n28409_ i3=$abc$109383$new_n28408_ nq=$abc$109383$new_n28412_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n28413_
-.subckt a2_x2 i0=$abc$109383$new_n28413_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100990
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n28413_
+.subckt and2_x1 i0=$abc$109383$new_n28413_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100990
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28415_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28416_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28417_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28418_
 .subckt nand4_x0 i0=$abc$109383$new_n28418_ i1=$abc$109383$new_n28417_ i2=$abc$109383$new_n28416_ i3=$abc$109383$new_n28415_ nq=$abc$109383$new_n28419_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[19] q=$abc$109383$new_n28420_
-.subckt a2_x2 i0=$abc$109383$new_n28420_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100994
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[19] q=$abc$109383$new_n28420_
+.subckt and2_x1 i0=$abc$109383$new_n28420_ i1=$abc$109383$new_n28275_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100994
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28422_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[4] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28423_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[4] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28424_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[4] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28425_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[4] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28426_
 .subckt nand4_x0 i0=$abc$109383$new_n28426_ i1=$abc$109383$new_n28425_ i2=$abc$109383$new_n28424_ i3=$abc$109383$new_n28423_ nq=$abc$109383$new_n28427_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[20] q=$abc$109383$new_n28428_
-.subckt a2_x2 i0=$abc$109383$new_n28428_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100998
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[20] q=$abc$109383$new_n28428_
+.subckt and2_x1 i0=$abc$109383$new_n28428_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$100998
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[5] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28430_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[5] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28431_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[5] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28432_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[5] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28433_
 .subckt nand4_x0 i0=$abc$109383$new_n28433_ i1=$abc$109383$new_n28432_ i2=$abc$109383$new_n28431_ i3=$abc$109383$new_n28430_ nq=$abc$109383$new_n28434_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[21] q=$abc$109383$new_n28435_
-.subckt a2_x2 i0=$abc$109383$new_n28435_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101002
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[21] q=$abc$109383$new_n28435_
+.subckt and2_x1 i0=$abc$109383$new_n28435_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101002
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[6] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28437_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[6] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28438_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[6] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28439_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[6] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28440_
 .subckt nand4_x0 i0=$abc$109383$new_n28440_ i1=$abc$109383$new_n28439_ i2=$abc$109383$new_n28438_ i3=$abc$109383$new_n28437_ nq=$abc$109383$new_n28441_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[22] q=$abc$109383$new_n28442_
-.subckt a2_x2 i0=$abc$109383$new_n28442_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101006
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[22] q=$abc$109383$new_n28442_
+.subckt and2_x1 i0=$abc$109383$new_n28442_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101006
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en nq=$abc$109383$new_n28444_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[7] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en nq=$abc$109383$new_n28445_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[7] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en nq=$abc$109383$new_n28446_
 .subckt nand2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[7] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en nq=$abc$109383$new_n28447_
 .subckt nand4_x0 i0=$abc$109383$new_n28447_ i1=$abc$109383$new_n28446_ i2=$abc$109383$new_n28445_ i3=$abc$109383$new_n28444_ nq=$abc$109383$new_n28448_
-.subckt mx2_x2 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[23] q=$abc$109383$new_n28449_
-.subckt a2_x2 i0=$abc$109383$new_n28449_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101010
-.subckt a2_x2 i0=$abc$109383$new_n14945_ i1=$abc$109383$new_n14938_ q=$abc$109383$new_n28451_
-.subckt a2_x2 i0=$abc$109383$new_n14965_ i1=$abc$109383$new_n14921_ q=$abc$109383$new_n28452_
-.subckt a4_x2 i0=$abc$109383$new_n28452_ i1=$abc$109383$new_n28451_ i2=soc.rom.read_active i3=$abc$109383$new_n27942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101012
+.subckt mux2_x1 cmd=$abc$109383$new_n28398_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[23] q=$abc$109383$new_n28449_
+.subckt and2_x1 i0=$abc$109383$new_n28449_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101010
+.subckt and2_x1 i0=$abc$109383$new_n14945_ i1=$abc$109383$new_n14938_ q=$abc$109383$new_n28451_
+.subckt and2_x1 i0=$abc$109383$new_n14965_ i1=$abc$109383$new_n14921_ q=$abc$109383$new_n28452_
+.subckt and4_x1 i0=$abc$109383$new_n28452_ i1=$abc$109383$new_n28451_ i2=soc.rom.read_active i3=$abc$109383$new_n27942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101012
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg3__w_stb nq=$abc$109383$new_n28454_
 .subckt buf_x4 i=$abc$109383$new_n27993_ q=$abc$109383$new_n28455_
 .subckt nor2_x0 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n28456_
@@ -13732,77 +13732,77 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28457_ i1=$abc$109383$new_n28456_ i2=$abc$109383$new_n28454_ i3=$abc$109383$new_n15210_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101014
 .subckt buf_x4 i=$abc$109383$new_n15036_ q=$abc$109383$new_n28459_
 .subckt nor2_x0 i0=soc.rom.spimemio.xfer.flash_csb i1=$abc$109383$new_n15230_ nq=$abc$109383$new_n28460_
-.subckt a2_x2 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n14995_ q=$abc$109383$new_n28461_
-.subckt mx2_x2 cmd=$abc$109383$new_n28461_ i0=$abc$109383$new_n28460_ i1=$abc$109383$new_n15230_ q=$abc$109383$new_n28462_
-.subckt a3_x2 i0=$abc$109383$new_n28462_ i1=$abc$109383$new_n28459_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101018
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0] q=$abc$109383$new_n28464_
-.subckt a2_x2 i0=$abc$109383$new_n28464_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101080
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[1] q=$abc$109383$new_n28466_
-.subckt a2_x2 i0=$abc$109383$new_n28466_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101084
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[2] q=$abc$109383$new_n28468_
-.subckt a2_x2 i0=$abc$109383$new_n28468_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101088
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[3] q=$abc$109383$new_n28470_
-.subckt a2_x2 i0=$abc$109383$new_n28470_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101092
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_clk i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[4] q=$abc$109383$new_n28472_
-.subckt a2_x2 i0=$abc$109383$new_n28472_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101096
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_csb i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[5] q=$abc$109383$new_n28474_
-.subckt a2_x2 i0=$abc$109383$new_n28474_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101100
+.subckt and2_x1 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n14995_ q=$abc$109383$new_n28461_
+.subckt mux2_x1 cmd=$abc$109383$new_n28461_ i0=$abc$109383$new_n28460_ i1=$abc$109383$new_n15230_ q=$abc$109383$new_n28462_
+.subckt and3_x1 i0=$abc$109383$new_n28462_ i1=$abc$109383$new_n28459_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101018
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0] q=$abc$109383$new_n28464_
+.subckt and2_x1 i0=$abc$109383$new_n28464_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101080
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[1] q=$abc$109383$new_n28466_
+.subckt and2_x1 i0=$abc$109383$new_n28466_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101084
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[2] q=$abc$109383$new_n28468_
+.subckt and2_x1 i0=$abc$109383$new_n28468_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101088
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_do[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[3] q=$abc$109383$new_n28470_
+.subckt and2_x1 i0=$abc$109383$new_n28470_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101092
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_clk i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[4] q=$abc$109383$new_n28472_
+.subckt and2_x1 i0=$abc$109383$new_n28472_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101096
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb i0=soc.rom.spimemio.config_csb i1=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[5] q=$abc$109383$new_n28474_
+.subckt and2_x1 i0=$abc$109383$new_n28474_ i1=$abc$109383$new_n28422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101100
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28476_
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[0] q=$abc$109383$new_n28477_
-.subckt a2_x2 i0=$abc$109383$new_n28477_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101104
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[1] q=$abc$109383$new_n28479_
-.subckt a2_x2 i0=$abc$109383$new_n28479_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101108
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[2] q=$abc$109383$new_n28481_
-.subckt a2_x2 i0=$abc$109383$new_n28481_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101112
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[3] q=$abc$109383$new_n28483_
-.subckt a2_x2 i0=$abc$109383$new_n28483_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101116
-.subckt o2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.cfgreg_do[16] q=$abc$109383$new_n28485_
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[0] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[0] q=$abc$109383$new_n28477_
+.subckt and2_x1 i0=$abc$109383$new_n28477_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101104
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[1] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[1] q=$abc$109383$new_n28479_
+.subckt and2_x1 i0=$abc$109383$new_n28479_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101108
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[2] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[2] q=$abc$109383$new_n28481_
+.subckt and2_x1 i0=$abc$109383$new_n28481_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101112
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb i0=soc.rom.spimemio.config_oe[3] i1=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[3] q=$abc$109383$new_n28483_
+.subckt and2_x1 i0=$abc$109383$new_n28483_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101116
+.subckt or2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.cfgreg_do[16] q=$abc$109383$new_n28485_
 .subckt inv_x0 i=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb nq=$abc$109383$new_n28486_
-.subckt ao22_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[0] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28487_
-.subckt a2_x2 i0=$abc$109383$new_n28487_ i1=$abc$109383$new_n28485_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101120
-.subckt o2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.cfgreg_do[17] q=$abc$109383$new_n28489_
-.subckt ao22_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[1] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28490_
-.subckt a2_x2 i0=$abc$109383$new_n28490_ i1=$abc$109383$new_n28489_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101124
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i0=soc.rom.cfgreg_do[18] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[2] q=$abc$109383$new_n28492_
-.subckt a2_x2 i0=$abc$109383$new_n28492_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101128
+.subckt and21nor_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[0] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28487_
+.subckt and2_x1 i0=$abc$109383$new_n28487_ i1=$abc$109383$new_n28485_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101120
+.subckt or2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.cfgreg_do[17] q=$abc$109383$new_n28489_
+.subckt and21nor_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[1] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28490_
+.subckt and2_x1 i0=$abc$109383$new_n28490_ i1=$abc$109383$new_n28489_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101124
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i0=soc.rom.cfgreg_do[18] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[2] q=$abc$109383$new_n28492_
+.subckt and2_x1 i0=$abc$109383$new_n28492_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101128
 .subckt buf_x4 i=$abc$109383$new_n27993_ q=$abc$109383$new_n28494_
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i0=soc.rom.cfgreg_do[19] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[3] q=$abc$109383$new_n28495_
-.subckt o2_x2 i0=$abc$109383$new_n28495_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101132
-.subckt o2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.spimemio.config_cont q=$abc$109383$new_n28497_
-.subckt ao22_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[4] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28498_
-.subckt a2_x2 i0=$abc$109383$new_n28498_ i1=$abc$109383$new_n28497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101136
-.subckt o2_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.spimemio.config_qspi q=$abc$109383$new_n28500_
-.subckt ao22_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[5] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28501_
-.subckt a2_x2 i0=$abc$109383$new_n28501_ i1=$abc$109383$new_n28500_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101140
-.subckt mx2_x2 cmd=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i0=$abc$109383$new_n15105_ i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[6] q=$abc$109383$new_n28503_
-.subckt a2_x2 i0=$abc$109383$new_n28503_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101144
-.subckt oa22_x2 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__w_stb i2=$abc$109383$new_n27993_ q=$abc$109383$new_n28505_
-.subckt oa22_x2 i0=$abc$109383$new_n15210_ i1=$abc$109383$new_n28454_ i2=$abc$109383$new_n28505_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101148
-.subckt oa22_x2 i0=$abc$109383$new_n20703_ i1=$abc$109383$new_n15033_ i2=soc.rom.spimemio.rd_valid q=$abc$109383$new_n28507_
-.subckt a3_x2 i0=$abc$109383$new_n28507_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101184
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i0=soc.rom.cfgreg_do[19] i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[3] q=$abc$109383$new_n28495_
+.subckt or2_x1 i0=$abc$109383$new_n28495_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101132
+.subckt or2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.spimemio.config_cont q=$abc$109383$new_n28497_
+.subckt and21nor_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[4] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28498_
+.subckt and2_x1 i0=$abc$109383$new_n28498_ i1=$abc$109383$new_n28497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101136
+.subckt or2_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i1=soc.rom.spimemio.config_qspi q=$abc$109383$new_n28500_
+.subckt and21nor_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[5] i1=$abc$109383$new_n28486_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28501_
+.subckt and2_x1 i0=$abc$109383$new_n28501_ i1=$abc$109383$new_n28500_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101140
+.subckt mux2_x1 cmd=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb i0=$abc$109383$new_n15105_ i1=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[6] q=$abc$109383$new_n28503_
+.subckt and2_x1 i0=$abc$109383$new_n28503_ i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101144
+.subckt or21nand_x1 i0=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7] i1=soc.rom.bridge.csr_mux_0.rom_cfg3__w_stb i2=$abc$109383$new_n27993_ nq=$abc$109383$new_n28505_
+.subckt or21nand_x1 i0=$abc$109383$new_n15210_ i1=$abc$109383$new_n28454_ i2=$abc$109383$new_n28505_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101148
+.subckt or21nand_x1 i0=$abc$109383$new_n20703_ i1=$abc$109383$new_n15033_ i2=soc.rom.spimemio.rd_valid nq=$abc$109383$new_n28507_
+.subckt and3_x1 i0=$abc$109383$new_n28507_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101184
 .subckt nand3_x0 i0=$abc$109383$new_n14968_ i1=$abc$109383$new_n14893_ i2=$abc$109383$new_n15040_ nq=$abc$109383$new_n28509_
-.subckt mx2_x2 cmd=$abc$109383$new_n15174_ i0=soc.rom.spimemio.din_ddr i1=$abc$109383$new_n15105_ q=$abc$109383$new_n28510_
-.subckt a3_x2 i0=$abc$109383$new_n28510_ i1=$abc$109383$new_n28509_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101186
+.subckt mux2_x1 cmd=$abc$109383$new_n15174_ i0=soc.rom.spimemio.din_ddr i1=$abc$109383$new_n15105_ q=$abc$109383$new_n28510_
+.subckt and3_x1 i0=$abc$109383$new_n28510_ i1=$abc$109383$new_n28509_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101186
 .subckt inv_x0 i=soc.rom.spimemio.din_rd nq=$abc$109383$new_n28512_
 .subckt nand2_x0 i0=$abc$109383$new_n22733_ i1=$abc$109383$new_n28512_ nq=$abc$109383$new_n28513_
-.subckt a3_x2 i0=$abc$109383$new_n28513_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101190
-.subckt mx2_x2 cmd=$abc$109383$new_n15174_ i0=soc.rom.spimemio.din_qspi i1=soc.rom.spimemio.config_qspi q=$abc$109383$new_n28515_
-.subckt a3_x2 i0=$abc$109383$new_n28515_ i1=$abc$109383$new_n28509_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101192
-.subckt o2_x2 i0=soc.rom.spimemio.state[7] i1=soc.rom.spimemio.state[10] q=$abc$109383$new_n28517_
+.subckt and3_x1 i0=$abc$109383$new_n28513_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101190
+.subckt mux2_x1 cmd=$abc$109383$new_n15174_ i0=soc.rom.spimemio.din_qspi i1=soc.rom.spimemio.config_qspi q=$abc$109383$new_n28515_
+.subckt and3_x1 i0=$abc$109383$new_n28515_ i1=$abc$109383$new_n28509_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101192
+.subckt or2_x1 i0=soc.rom.spimemio.state[7] i1=soc.rom.spimemio.state[10] q=$abc$109383$new_n28517_
 .subckt nand2_x0 i0=$abc$109383$new_n28517_ i1=$abc$109383$new_n15033_ nq=$abc$109383$new_n28518_
-.subckt a3_x2 i0=$abc$109383$new_n28518_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101198
-.subckt a3_x2 i0=$abc$109383$new_n28344_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101264
-.subckt a2_x2 i0=io_in[11] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101938
-.subckt a2_x2 i0=io_in[12] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101940
-.subckt a2_x2 i0=io_in[13] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101942
-.subckt a2_x2 i0=io_in[14] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101944
+.subckt and3_x1 i0=$abc$109383$new_n28518_ i1=$abc$109383$new_n14970_ i2=$abc$109383$new_n14737_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101198
+.subckt and3_x1 i0=$abc$109383$new_n28344_ i1=$abc$109383$new_n28197_ i2=$abc$109383$new_n28131_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101264
+.subckt and2_x1 i0=io_in[11] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101938
+.subckt and2_x1 i0=io_in[12] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101940
+.subckt and2_x1 i0=io_in[13] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101942
+.subckt and2_x1 i0=io_in[14] i1=$abc$109383$new_n28476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101944
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28525_
-.subckt a2_x2 i0=io_in[15] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101946
-.subckt a2_x2 i0=io_in[16] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101948
-.subckt a2_x2 i0=io_in[17] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101950
-.subckt a2_x2 i0=io_in[18] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101952
-.subckt a4_x2 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n27594_ i3=$abc$109383$new_n27430_ q=$abc$109383$new_n28530_
-.subckt a2_x2 i0=$abc$109383$new_n28530_ i1=$abc$109383$new_n27592_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101986
+.subckt and2_x1 i0=io_in[15] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101946
+.subckt and2_x1 i0=io_in[16] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101948
+.subckt and2_x1 i0=io_in[17] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101950
+.subckt and2_x1 i0=io_in[18] i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101952
+.subckt and4_x1 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n27594_ i3=$abc$109383$new_n27430_ q=$abc$109383$new_n28530_
+.subckt and2_x1 i0=$abc$109383$new_n28530_ i1=$abc$109383$new_n27592_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101986
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n28532_
 .subckt buf_x4 i=soc.hyperram.clk_phase[0] q=$abc$109383$new_n28533_
 .subckt nor2_x0 i0=$abc$109383$new_n28533_ i1=$abc$109383$new_n28532_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101992
@@ -13811,15 +13811,15 @@
 .subckt inv_x0 i=soc.hyperram.clk_phase[1] nq=$abc$109383$new_n28537_
 .subckt nand4_x0 i0=soc.hyperram.cs i1=$abc$109383$new_n28537_ i2=$abc$109383$new_n28533_ i3=$abc$109383$new_n28536_ nq=$abc$109383$new_n28538_
 .subckt nand2_x0 i0=$abc$109383$new_n28538_ i1=$abc$109383$new_n28535_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101990
-.subckt xr2_x1 i0=soc.hyperram.clk_phase[1] i1=$abc$109383$new_n28533_ q=$abc$109383$new_n28540_
-.subckt a2_x2 i0=$abc$109383$new_n28540_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101994
+.subckt xor2_x0 i0=soc.hyperram.clk_phase[1] i1=$abc$109383$new_n28533_ q=$abc$109383$new_n28540_
+.subckt and2_x1 i0=$abc$109383$new_n28540_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101994
 .subckt inv_x0 i=soc.hyperram.sr[16] nq=$abc$109383$new_n28542_
 .subckt inv_x0 i=soc.hyperram.counter[6] nq=$abc$109383$new_n28543_
-.subckt a3_x2 i0=$abc$109383$new_n28543_ i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] q=$abc$109383$new_n28544_
+.subckt and3_x1 i0=$abc$109383$new_n28543_ i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] q=$abc$109383$new_n28544_
 .subckt inv_x0 i=soc.hyperram.counter[2] nq=$abc$109383$new_n28545_
-.subckt a2_x2 i0=soc.hyperram.counter[0] i1=soc.hyperram.counter[1] q=$abc$109383$new_n28546_
+.subckt and2_x1 i0=soc.hyperram.counter[0] i1=soc.hyperram.counter[1] q=$abc$109383$new_n28546_
 .subckt buf_x4 i=$abc$109383$new_n28546_ q=$abc$109383$new_n28547_
-.subckt a3_x2 i0=$abc$109383$new_n28547_ i1=$abc$109383$new_n28545_ i2=soc.hyperram.counter[3] q=$abc$109383$new_n28548_
+.subckt and3_x1 i0=$abc$109383$new_n28547_ i1=$abc$109383$new_n28545_ i2=soc.hyperram.counter[3] q=$abc$109383$new_n28548_
 .subckt nand2_x0 i0=$abc$109383$new_n28548_ i1=$abc$109383$new_n28544_ nq=$abc$109383$new_n28549_
 .subckt buf_x4 i=$abc$109383$new_n28549_ q=$abc$109383$new_n28550_
 .subckt buf_x4 i=$abc$109383$new_n28550_ q=$abc$109383$new_n28551_
@@ -13827,105 +13827,105 @@
 .subckt nor3_x0 i0=soc.hyperram.counter[6] i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] nq=$abc$109383$new_n28553_
 .subckt nor2_x0 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] nq=$abc$109383$new_n28554_
 .subckt nand3_x0 i0=$abc$109383$new_n28554_ i1=$abc$109383$new_n28553_ i2=$abc$109383$new_n28547_ nq=$abc$109383$new_n28555_
-.subckt a2_x2 i0=$abc$109383$new_n28555_ i1=soc.hyperram.clk_phase[0] q=$abc$109383$new_n28556_
+.subckt and2_x1 i0=$abc$109383$new_n28555_ i1=soc.hyperram.clk_phase[0] q=$abc$109383$new_n28556_
 .subckt buf_x4 i=$abc$109383$new_n28556_ q=$abc$109383$new_n28557_
 .subckt buf_x4 i=$abc$109383$new_n28557_ q=$abc$109383$new_n28558_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28542_ nq=$abc$109383$new_n28559_
-.subckt a2_x2 i0=$abc$109383$new_n28548_ i1=$abc$109383$new_n28544_ q=$abc$109383$new_n28560_
+.subckt and2_x1 i0=$abc$109383$new_n28548_ i1=$abc$109383$new_n28544_ q=$abc$109383$new_n28560_
 .subckt buf_x4 i=$abc$109383$new_n28560_ q=$abc$109383$new_n28561_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20254_ q=$abc$109383$new_n28562_
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20254_ q=$abc$109383$new_n28562_
 .subckt buf_x4 i=$abc$109383$new_n22004_ q=$abc$109383$new_n28563_
 .subckt buf_x4 i=$abc$109383$new_n28555_ q=$abc$109383$new_n28564_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n28563_ i1=soc.hyperram.sr[8] q=$abc$109383$new_n28565_
-.subckt a2_x2 i0=$abc$109383$new_n28565_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28566_
-.subckt ao22_x2 i0=$abc$109383$new_n28566_ i1=$abc$109383$new_n28562_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28567_
-.subckt a2_x2 i0=$abc$109383$new_n28567_ i1=$abc$109383$new_n28559_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101998
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n28563_ i1=soc.hyperram.sr[8] q=$abc$109383$new_n28565_
+.subckt and2_x1 i0=$abc$109383$new_n28565_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28566_
+.subckt and21nor_x1 i0=$abc$109383$new_n28566_ i1=$abc$109383$new_n28562_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28567_
+.subckt and2_x1 i0=$abc$109383$new_n28567_ i1=$abc$109383$new_n28559_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101998
 .subckt inv_x0 i=soc.hyperram.sr[17] nq=$abc$109383$new_n28569_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28569_ nq=$abc$109383$new_n28570_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20273_ q=$abc$109383$new_n28571_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19692_ i1=soc.hyperram.sr[9] q=$abc$109383$new_n28572_
-.subckt a2_x2 i0=$abc$109383$new_n28572_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28573_
-.subckt ao22_x2 i0=$abc$109383$new_n28573_ i1=$abc$109383$new_n28571_ i2=$abc$109383$new_n27892_ q=$abc$109383$new_n28574_
-.subckt a2_x2 i0=$abc$109383$new_n28574_ i1=$abc$109383$new_n28570_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102002
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20273_ q=$abc$109383$new_n28571_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19692_ i1=soc.hyperram.sr[9] q=$abc$109383$new_n28572_
+.subckt and2_x1 i0=$abc$109383$new_n28572_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28573_
+.subckt and21nor_x1 i0=$abc$109383$new_n28573_ i1=$abc$109383$new_n28571_ i2=$abc$109383$new_n27892_ nq=$abc$109383$new_n28574_
+.subckt and2_x1 i0=$abc$109383$new_n28574_ i1=$abc$109383$new_n28570_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102002
 .subckt inv_x0 i=soc.hyperram.sr[18] nq=$abc$109383$new_n28576_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28576_ nq=$abc$109383$new_n28577_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n28578_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20277_ q=$abc$109383$new_n28579_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19694_ i1=soc.hyperram.sr[10] q=$abc$109383$new_n28580_
-.subckt a2_x2 i0=$abc$109383$new_n28580_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28581_
-.subckt ao22_x2 i0=$abc$109383$new_n28581_ i1=$abc$109383$new_n28579_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28582_
-.subckt a2_x2 i0=$abc$109383$new_n28582_ i1=$abc$109383$new_n28577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102006
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20277_ q=$abc$109383$new_n28579_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19694_ i1=soc.hyperram.sr[10] q=$abc$109383$new_n28580_
+.subckt and2_x1 i0=$abc$109383$new_n28580_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28581_
+.subckt and21nor_x1 i0=$abc$109383$new_n28581_ i1=$abc$109383$new_n28579_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28582_
+.subckt and2_x1 i0=$abc$109383$new_n28582_ i1=$abc$109383$new_n28577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102006
 .subckt inv_x0 i=soc.hyperram.sr[19] nq=$abc$109383$new_n28584_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28584_ nq=$abc$109383$new_n28585_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20281_ q=$abc$109383$new_n28586_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19696_ i1=soc.hyperram.sr[11] q=$abc$109383$new_n28587_
-.subckt a2_x2 i0=$abc$109383$new_n28587_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28588_
-.subckt ao22_x2 i0=$abc$109383$new_n28588_ i1=$abc$109383$new_n28586_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28589_
-.subckt a2_x2 i0=$abc$109383$new_n28589_ i1=$abc$109383$new_n28585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102010
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20281_ q=$abc$109383$new_n28586_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19696_ i1=soc.hyperram.sr[11] q=$abc$109383$new_n28587_
+.subckt and2_x1 i0=$abc$109383$new_n28587_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28588_
+.subckt and21nor_x1 i0=$abc$109383$new_n28588_ i1=$abc$109383$new_n28586_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28589_
+.subckt and2_x1 i0=$abc$109383$new_n28589_ i1=$abc$109383$new_n28585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102010
 .subckt inv_x0 i=soc.hyperram.sr[20] nq=$abc$109383$new_n28591_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28591_ nq=$abc$109383$new_n28592_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20285_ q=$abc$109383$new_n28593_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19698_ i1=soc.hyperram.sr[12] q=$abc$109383$new_n28594_
-.subckt a2_x2 i0=$abc$109383$new_n28594_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28595_
-.subckt ao22_x2 i0=$abc$109383$new_n28595_ i1=$abc$109383$new_n28593_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28596_
-.subckt a2_x2 i0=$abc$109383$new_n28596_ i1=$abc$109383$new_n28592_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102014
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n20285_ q=$abc$109383$new_n28593_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n19698_ i1=soc.hyperram.sr[12] q=$abc$109383$new_n28594_
+.subckt and2_x1 i0=$abc$109383$new_n28594_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28595_
+.subckt and21nor_x1 i0=$abc$109383$new_n28595_ i1=$abc$109383$new_n28593_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28596_
+.subckt and2_x1 i0=$abc$109383$new_n28596_ i1=$abc$109383$new_n28592_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102014
 .subckt inv_x0 i=soc.hyperram.sr[21] nq=$abc$109383$new_n28598_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28598_ nq=$abc$109383$new_n28599_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20289_ q=$abc$109383$new_n28600_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14834_ i1=soc.hyperram.sr[13] q=$abc$109383$new_n28601_
-.subckt a2_x2 i0=$abc$109383$new_n28601_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28602_
-.subckt ao22_x2 i0=$abc$109383$new_n28602_ i1=$abc$109383$new_n28600_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28603_
-.subckt a2_x2 i0=$abc$109383$new_n28603_ i1=$abc$109383$new_n28599_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102018
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20289_ q=$abc$109383$new_n28600_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14834_ i1=soc.hyperram.sr[13] q=$abc$109383$new_n28601_
+.subckt and2_x1 i0=$abc$109383$new_n28601_ i1=$abc$109383$new_n28551_ q=$abc$109383$new_n28602_
+.subckt and21nor_x1 i0=$abc$109383$new_n28602_ i1=$abc$109383$new_n28600_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28603_
+.subckt and2_x1 i0=$abc$109383$new_n28603_ i1=$abc$109383$new_n28599_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102018
 .subckt inv_x0 i=soc.hyperram.sr[22] nq=$abc$109383$new_n28605_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28605_ nq=$abc$109383$new_n28606_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20293_ q=$abc$109383$new_n28607_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14824_ i1=soc.hyperram.sr[14] q=$abc$109383$new_n28608_
-.subckt a2_x2 i0=$abc$109383$new_n28608_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28609_
-.subckt ao22_x2 i0=$abc$109383$new_n28609_ i1=$abc$109383$new_n28607_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28610_
-.subckt a2_x2 i0=$abc$109383$new_n28610_ i1=$abc$109383$new_n28606_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102022
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20293_ q=$abc$109383$new_n28607_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14824_ i1=soc.hyperram.sr[14] q=$abc$109383$new_n28608_
+.subckt and2_x1 i0=$abc$109383$new_n28608_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28609_
+.subckt and21nor_x1 i0=$abc$109383$new_n28609_ i1=$abc$109383$new_n28607_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28610_
+.subckt and2_x1 i0=$abc$109383$new_n28610_ i1=$abc$109383$new_n28606_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102022
 .subckt inv_x0 i=soc.hyperram.sr[23] nq=$abc$109383$new_n28612_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28612_ nq=$abc$109383$new_n28613_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20297_ q=$abc$109383$new_n28614_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14790_ i1=soc.hyperram.sr[15] q=$abc$109383$new_n28615_
-.subckt a2_x2 i0=$abc$109383$new_n28615_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28616_
-.subckt ao22_x2 i0=$abc$109383$new_n28616_ i1=$abc$109383$new_n28614_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28617_
-.subckt a2_x2 i0=$abc$109383$new_n28617_ i1=$abc$109383$new_n28613_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102026
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20297_ q=$abc$109383$new_n28614_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14790_ i1=soc.hyperram.sr[15] q=$abc$109383$new_n28615_
+.subckt and2_x1 i0=$abc$109383$new_n28615_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28616_
+.subckt and21nor_x1 i0=$abc$109383$new_n28616_ i1=$abc$109383$new_n28614_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28617_
+.subckt and2_x1 i0=$abc$109383$new_n28617_ i1=$abc$109383$new_n28613_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102026
 .subckt inv_x0 i=soc.hyperram.sr[24] nq=$abc$109383$new_n28619_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28619_ nq=$abc$109383$new_n28620_
-.subckt mx2_x2 cmd=$abc$109383$new_n28560_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20349_ q=$abc$109383$new_n28621_
-.subckt mx2_x2 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14807_ i1=soc.hyperram.sr[16] q=$abc$109383$new_n28622_
-.subckt a2_x2 i0=$abc$109383$new_n28622_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28623_
-.subckt ao22_x2 i0=$abc$109383$new_n28623_ i1=$abc$109383$new_n28621_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28624_
-.subckt a2_x2 i0=$abc$109383$new_n28624_ i1=$abc$109383$new_n28620_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102030
+.subckt mux2_x1 cmd=$abc$109383$new_n28560_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20349_ q=$abc$109383$new_n28621_
+.subckt mux2_x1 cmd=$abc$109383$new_n28564_ i0=$abc$109383$new_n14807_ i1=soc.hyperram.sr[16] q=$abc$109383$new_n28622_
+.subckt and2_x1 i0=$abc$109383$new_n28622_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28623_
+.subckt and21nor_x1 i0=$abc$109383$new_n28623_ i1=$abc$109383$new_n28621_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28624_
+.subckt and2_x1 i0=$abc$109383$new_n28624_ i1=$abc$109383$new_n28620_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102030
 .subckt inv_x0 i=soc.hyperram.sr[25] nq=$abc$109383$new_n28626_
 .subckt nand3_x0 i0=$abc$109383$new_n28558_ i1=$abc$109383$new_n28552_ i2=$abc$109383$new_n28626_ nq=$abc$109383$new_n28627_
-.subckt mx2_x2 cmd=$abc$109383$new_n28560_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20365_ q=$abc$109383$new_n28628_
-.subckt mx2_x2 cmd=$abc$109383$new_n28555_ i0=$abc$109383$new_n14802_ i1=soc.hyperram.sr[17] q=$abc$109383$new_n28629_
-.subckt a2_x2 i0=$abc$109383$new_n28629_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28630_
-.subckt ao22_x2 i0=$abc$109383$new_n28630_ i1=$abc$109383$new_n28628_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28631_
-.subckt a2_x2 i0=$abc$109383$new_n28631_ i1=$abc$109383$new_n28627_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102034
+.subckt mux2_x1 cmd=$abc$109383$new_n28560_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20365_ q=$abc$109383$new_n28628_
+.subckt mux2_x1 cmd=$abc$109383$new_n28555_ i0=$abc$109383$new_n14802_ i1=soc.hyperram.sr[17] q=$abc$109383$new_n28629_
+.subckt and2_x1 i0=$abc$109383$new_n28629_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28630_
+.subckt and21nor_x1 i0=$abc$109383$new_n28630_ i1=$abc$109383$new_n28628_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28631_
+.subckt and2_x1 i0=$abc$109383$new_n28631_ i1=$abc$109383$new_n28627_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102034
 .subckt inv_x0 i=soc.hyperram.sr[26] nq=$abc$109383$new_n28633_
 .subckt buf_x4 i=$abc$109383$new_n28551_ q=$abc$109383$new_n28634_
 .subckt buf_x4 i=$abc$109383$new_n28557_ q=$abc$109383$new_n28635_
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=$abc$109383$new_n28633_ nq=$abc$109383$new_n28636_
-.subckt mx2_x2 cmd=$abc$109383$new_n28560_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20370_ q=$abc$109383$new_n28637_
-.subckt mx2_x2 cmd=$abc$109383$new_n28555_ i0=$abc$109383$new_n14878_ i1=soc.hyperram.sr[18] q=$abc$109383$new_n28638_
-.subckt a2_x2 i0=$abc$109383$new_n28638_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28639_
-.subckt ao22_x2 i0=$abc$109383$new_n28639_ i1=$abc$109383$new_n28637_ i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28640_
-.subckt a2_x2 i0=$abc$109383$new_n28640_ i1=$abc$109383$new_n28636_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102038
+.subckt mux2_x1 cmd=$abc$109383$new_n28560_ i0=$abc$109383$new_n28556_ i1=$abc$109383$new_n20370_ q=$abc$109383$new_n28637_
+.subckt mux2_x1 cmd=$abc$109383$new_n28555_ i0=$abc$109383$new_n14878_ i1=soc.hyperram.sr[18] q=$abc$109383$new_n28638_
+.subckt and2_x1 i0=$abc$109383$new_n28638_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28639_
+.subckt and21nor_x1 i0=$abc$109383$new_n28639_ i1=$abc$109383$new_n28637_ i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28640_
+.subckt and2_x1 i0=$abc$109383$new_n28640_ i1=$abc$109383$new_n28636_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102038
 .subckt nand2_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ nq=$abc$109383$new_n28642_
 .subckt buf_x4 i=$abc$109383$new_n19755_ q=$abc$109383$new_n28643_
 .subckt nand2_x0 i0=soc.cpu.minerva.loadstore.dbus__dat_w[11] i1=$abc$109383$new_n28643_ nq=$abc$109383$new_n28644_
 .subckt buf_x4 i=$abc$109383$new_n28555_ q=$abc$109383$new_n28645_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n19676_ i1=$abc$109383$new_n28584_ q=$abc$109383$new_n28646_
-.subckt mx2_x2 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28646_ i1=$abc$109383$new_n28644_ q=$abc$109383$new_n28647_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n19676_ i1=$abc$109383$new_n28584_ q=$abc$109383$new_n28646_
+.subckt mux2_x1 cmd=$abc$109383$new_n28561_ i0=$abc$109383$new_n28646_ i1=$abc$109383$new_n28644_ q=$abc$109383$new_n28647_
 .subckt nand2_x0 i0=$abc$109383$new_n28647_ i1=$abc$109383$new_n28642_ nq=$abc$109383$new_n28648_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n28649_
 .subckt inv_x0 i=soc.hyperram.sr[27] nq=$abc$109383$new_n28650_
 .subckt buf_x4 i=$abc$109383$new_n28550_ q=$abc$109383$new_n28651_
 .subckt nand3_x0 i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n28651_ i2=$abc$109383$new_n28650_ nq=$abc$109383$new_n28652_
-.subckt a2_x2 i0=$abc$109383$new_n28652_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n28653_
-.subckt a2_x2 i0=$abc$109383$new_n28653_ i1=$abc$109383$new_n28648_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102042
+.subckt and2_x1 i0=$abc$109383$new_n28652_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n28653_
+.subckt and2_x1 i0=$abc$109383$new_n28653_ i1=$abc$109383$new_n28648_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102042
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[28] nq=$abc$109383$new_n28655_
 .subckt buf_x4 i=$abc$109383$new_n28544_ q=$abc$109383$new_n28656_
 .subckt buf_x4 i=$abc$109383$new_n28548_ q=$abc$109383$new_n28657_
@@ -13935,137 +13935,137 @@
 .subckt buf_x4 i=$abc$109383$new_n28555_ q=$abc$109383$new_n28661_
 .subckt nand2_x0 i0=$abc$109383$new_n28661_ i1=$abc$109383$new_n28660_ nq=$abc$109383$new_n28662_
 .subckt buf_x4 i=$abc$109383$new_n28662_ q=$abc$109383$new_n28663_
-.subckt mx2_x2 cmd=$abc$109383$new_n28661_ i0=$abc$109383$new_n14780_ i1=soc.hyperram.sr[20] q=$abc$109383$new_n28664_
+.subckt mux2_x1 cmd=$abc$109383$new_n28661_ i0=$abc$109383$new_n14780_ i1=soc.hyperram.sr[20] q=$abc$109383$new_n28664_
 .subckt nand3_x0 i0=$abc$109383$new_n28664_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28665_
 .subckt nand3_x0 i0=$abc$109383$new_n28665_ i1=$abc$109383$new_n28658_ i2=$abc$109383$new_n28655_ nq=$abc$109383$new_n28666_
-.subckt a2_x2 i0=$abc$109383$new_n28666_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102046
+.subckt and2_x1 i0=$abc$109383$new_n28666_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102046
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[29] nq=$abc$109383$new_n28668_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n20384_ nq=$abc$109383$new_n28669_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14786_ i1=soc.hyperram.sr[21] q=$abc$109383$new_n28670_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14786_ i1=soc.hyperram.sr[21] q=$abc$109383$new_n28670_
 .subckt nand3_x0 i0=$abc$109383$new_n28670_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28671_
 .subckt nand3_x0 i0=$abc$109383$new_n28671_ i1=$abc$109383$new_n28669_ i2=$abc$109383$new_n28668_ nq=$abc$109383$new_n28672_
-.subckt a2_x2 i0=$abc$109383$new_n28672_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102050
+.subckt and2_x1 i0=$abc$109383$new_n28672_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102050
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[30] nq=$abc$109383$new_n28674_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n20388_ nq=$abc$109383$new_n28675_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14950_ i1=soc.hyperram.sr[22] q=$abc$109383$new_n28676_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14950_ i1=soc.hyperram.sr[22] q=$abc$109383$new_n28676_
 .subckt nand3_x0 i0=$abc$109383$new_n28676_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28677_
 .subckt nand3_x0 i0=$abc$109383$new_n28677_ i1=$abc$109383$new_n28675_ i2=$abc$109383$new_n28674_ nq=$abc$109383$new_n28678_
-.subckt a2_x2 i0=$abc$109383$new_n28678_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102054
+.subckt and2_x1 i0=$abc$109383$new_n28678_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102054
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[31] nq=$abc$109383$new_n28680_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n20392_ nq=$abc$109383$new_n28681_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14887_ i1=soc.hyperram.sr[23] q=$abc$109383$new_n28682_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14887_ i1=soc.hyperram.sr[23] q=$abc$109383$new_n28682_
 .subckt nand3_x0 i0=$abc$109383$new_n28682_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28683_
 .subckt nand3_x0 i0=$abc$109383$new_n28683_ i1=$abc$109383$new_n28681_ i2=$abc$109383$new_n28680_ nq=$abc$109383$new_n28684_
-.subckt a2_x2 i0=$abc$109383$new_n28684_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102058
+.subckt and2_x1 i0=$abc$109383$new_n28684_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102058
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[32] nq=$abc$109383$new_n28686_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n20542_ nq=$abc$109383$new_n28687_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14756_ i1=soc.hyperram.sr[24] q=$abc$109383$new_n28688_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14756_ i1=soc.hyperram.sr[24] q=$abc$109383$new_n28688_
 .subckt nand3_x0 i0=$abc$109383$new_n28688_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28689_
 .subckt nand3_x0 i0=$abc$109383$new_n28689_ i1=$abc$109383$new_n28687_ i2=$abc$109383$new_n28686_ nq=$abc$109383$new_n28690_
-.subckt a2_x2 i0=$abc$109383$new_n28690_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102062
+.subckt and2_x1 i0=$abc$109383$new_n28690_ i1=$abc$109383$new_n28525_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102062
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28692_
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[33] nq=$abc$109383$new_n28693_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n20556_ nq=$abc$109383$new_n28694_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14768_ i1=soc.hyperram.sr[25] q=$abc$109383$new_n28695_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14768_ i1=soc.hyperram.sr[25] q=$abc$109383$new_n28695_
 .subckt nand3_x0 i0=$abc$109383$new_n28695_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28696_
 .subckt nand3_x0 i0=$abc$109383$new_n28696_ i1=$abc$109383$new_n28694_ i2=$abc$109383$new_n28693_ nq=$abc$109383$new_n28697_
-.subckt a2_x2 i0=$abc$109383$new_n28697_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102066
+.subckt and2_x1 i0=$abc$109383$new_n28697_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102066
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[34] nq=$abc$109383$new_n28699_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n20560_ nq=$abc$109383$new_n28700_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14764_ i1=soc.hyperram.sr[26] q=$abc$109383$new_n28701_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n14764_ i1=soc.hyperram.sr[26] q=$abc$109383$new_n28701_
 .subckt nand3_x0 i0=$abc$109383$new_n28701_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28702_
 .subckt nand3_x0 i0=$abc$109383$new_n28702_ i1=$abc$109383$new_n28700_ i2=$abc$109383$new_n28699_ nq=$abc$109383$new_n28703_
-.subckt a2_x2 i0=$abc$109383$new_n28703_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102070
+.subckt and2_x1 i0=$abc$109383$new_n28703_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102070
 .subckt buf_x4 i=$abc$109383$new_n28544_ q=$abc$109383$new_n28705_
 .subckt buf_x4 i=$abc$109383$new_n28548_ q=$abc$109383$new_n28706_
-.subckt a3_x2 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n20564_ q=$abc$109383$new_n28707_
-.subckt mx2_x2 cmd=soc.hyperram.clk_phase[0] i0=soc.hyperram.sr[27] i1=soc.hyperram.sr[35] q=$abc$109383$new_n28708_
-.subckt a3_x2 i0=$abc$109383$new_n28708_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28551_ q=$abc$109383$new_n28709_
-.subckt ao22_x2 i0=$abc$109383$new_n28709_ i1=$abc$109383$new_n28707_ i2=$abc$109383$new_n27830_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102074
+.subckt and3_x1 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n20564_ q=$abc$109383$new_n28707_
+.subckt mux2_x1 cmd=soc.hyperram.clk_phase[0] i0=soc.hyperram.sr[27] i1=soc.hyperram.sr[35] q=$abc$109383$new_n28708_
+.subckt and3_x1 i0=$abc$109383$new_n28708_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28551_ q=$abc$109383$new_n28709_
+.subckt and21nor_x1 i0=$abc$109383$new_n28709_ i1=$abc$109383$new_n28707_ i2=$abc$109383$new_n27830_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102074
 .subckt nand3_x0 i0=$abc$109383$new_n28635_ i1=$abc$109383$new_n28634_ i2=soc.hyperram.sr[36] nq=$abc$109383$new_n28711_
 .subckt buf_x4 i=$abc$109383$new_n28661_ q=$abc$109383$new_n28712_
 .subckt inv_x1 i=soc.hyperram.clk_phase[0] nq=$abc$109383$new_n28713_
-.subckt a2_x2 i0=soc.hyperram.sr[28] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28714_
+.subckt and2_x1 i0=soc.hyperram.sr[28] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28714_
 .subckt nand3_x0 i0=$abc$109383$new_n28714_ i1=$abc$109383$new_n28712_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28715_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n20569_ nq=$abc$109383$new_n28716_
 .subckt nand3_x0 i0=$abc$109383$new_n28716_ i1=$abc$109383$new_n28715_ i2=$abc$109383$new_n28711_ nq=$abc$109383$new_n28717_
-.subckt a2_x2 i0=$abc$109383$new_n28717_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102078
+.subckt and2_x1 i0=$abc$109383$new_n28717_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102078
 .subckt buf_x4 i=$abc$109383$new_n28551_ q=$abc$109383$new_n28719_
 .subckt buf_x4 i=$abc$109383$new_n28557_ q=$abc$109383$new_n28720_
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram.sr[37] nq=$abc$109383$new_n28721_
-.subckt a2_x2 i0=soc.hyperram.sr[29] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28722_
+.subckt and2_x1 i0=soc.hyperram.sr[29] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28722_
 .subckt nand3_x0 i0=$abc$109383$new_n28722_ i1=$abc$109383$new_n28712_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28723_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n20573_ nq=$abc$109383$new_n28724_
 .subckt nand3_x0 i0=$abc$109383$new_n28724_ i1=$abc$109383$new_n28723_ i2=$abc$109383$new_n28721_ nq=$abc$109383$new_n28725_
-.subckt a2_x2 i0=$abc$109383$new_n28725_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102082
+.subckt and2_x1 i0=$abc$109383$new_n28725_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102082
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram.sr[38] nq=$abc$109383$new_n28727_
-.subckt a2_x2 i0=soc.hyperram.sr[30] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28728_
+.subckt and2_x1 i0=soc.hyperram.sr[30] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28728_
 .subckt nand3_x0 i0=$abc$109383$new_n28728_ i1=$abc$109383$new_n28712_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28729_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n20577_ nq=$abc$109383$new_n28730_
 .subckt nand3_x0 i0=$abc$109383$new_n28730_ i1=$abc$109383$new_n28729_ i2=$abc$109383$new_n28727_ nq=$abc$109383$new_n28731_
-.subckt a2_x2 i0=$abc$109383$new_n28731_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102086
+.subckt and2_x1 i0=$abc$109383$new_n28731_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102086
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram.sr[39] nq=$abc$109383$new_n28733_
-.subckt a2_x2 i0=soc.hyperram.sr[31] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28734_
+.subckt and2_x1 i0=soc.hyperram.sr[31] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28734_
 .subckt nand3_x0 i0=$abc$109383$new_n28734_ i1=$abc$109383$new_n28712_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28735_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n20581_ nq=$abc$109383$new_n28736_
 .subckt nand3_x0 i0=$abc$109383$new_n28736_ i1=$abc$109383$new_n28735_ i2=$abc$109383$new_n28733_ nq=$abc$109383$new_n28737_
-.subckt a2_x2 i0=$abc$109383$new_n28737_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102090
+.subckt and2_x1 i0=$abc$109383$new_n28737_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102090
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$61 nq=$abc$109383$new_n28739_
-.subckt a2_x2 i0=soc.hyperram.sr[32] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28740_
+.subckt and2_x1 i0=soc.hyperram.sr[32] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28740_
 .subckt nand3_x0 i0=$abc$109383$new_n28740_ i1=$abc$109383$new_n28712_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28741_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n19779_ nq=$abc$109383$new_n28742_
 .subckt nand3_x0 i0=$abc$109383$new_n28742_ i1=$abc$109383$new_n28741_ i2=$abc$109383$new_n28739_ nq=$abc$109383$new_n28743_
-.subckt a2_x2 i0=$abc$109383$new_n28743_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102094
+.subckt and2_x1 i0=$abc$109383$new_n28743_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102094
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$64 nq=$abc$109383$new_n28745_
-.subckt a2_x2 i0=soc.hyperram.sr[33] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28746_
+.subckt and2_x1 i0=soc.hyperram.sr[33] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28746_
 .subckt nand3_x0 i0=$abc$109383$new_n28746_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28747_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n19790_ nq=$abc$109383$new_n28748_
 .subckt nand3_x0 i0=$abc$109383$new_n28748_ i1=$abc$109383$new_n28747_ i2=$abc$109383$new_n28745_ nq=$abc$109383$new_n28749_
-.subckt a2_x2 i0=$abc$109383$new_n28749_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102098
+.subckt and2_x1 i0=$abc$109383$new_n28749_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102098
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$67 nq=$abc$109383$new_n28751_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n19735_ nq=$abc$109383$new_n28752_
-.subckt a2_x2 i0=soc.hyperram.sr[34] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28753_
+.subckt and2_x1 i0=soc.hyperram.sr[34] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28753_
 .subckt nand3_x0 i0=$abc$109383$new_n28753_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28754_
 .subckt nand3_x0 i0=$abc$109383$new_n28754_ i1=$abc$109383$new_n28752_ i2=$abc$109383$new_n28751_ nq=$abc$109383$new_n28755_
-.subckt a2_x2 i0=$abc$109383$new_n28755_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102102
+.subckt and2_x1 i0=$abc$109383$new_n28755_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102102
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$70 nq=$abc$109383$new_n28757_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n19758_ nq=$abc$109383$new_n28758_
-.subckt a2_x2 i0=soc.hyperram.sr[35] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28759_
+.subckt and2_x1 i0=soc.hyperram.sr[35] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28759_
 .subckt nand3_x0 i0=$abc$109383$new_n28759_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28760_
 .subckt nand3_x0 i0=$abc$109383$new_n28760_ i1=$abc$109383$new_n28758_ i2=$abc$109383$new_n28757_ nq=$abc$109383$new_n28761_
-.subckt a2_x2 i0=$abc$109383$new_n28761_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102106
+.subckt and2_x1 i0=$abc$109383$new_n28761_ i1=$abc$109383$new_n28692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102106
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28763_
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$73 nq=$abc$109383$new_n28764_
-.subckt a2_x2 i0=soc.hyperram.sr[36] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28765_
+.subckt and2_x1 i0=soc.hyperram.sr[36] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28765_
 .subckt nand3_x0 i0=$abc$109383$new_n28765_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28766_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n19763_ nq=$abc$109383$new_n28767_
 .subckt nand3_x0 i0=$abc$109383$new_n28767_ i1=$abc$109383$new_n28766_ i2=$abc$109383$new_n28764_ nq=$abc$109383$new_n28768_
-.subckt a2_x2 i0=$abc$109383$new_n28768_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102110
+.subckt and2_x1 i0=$abc$109383$new_n28768_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102110
 .subckt inv_x0 i=soc.hyperram.sr[37] nq=$abc$109383$new_n28770_
 .subckt nand3_x0 i0=$abc$109383$new_n28645_ i1=$abc$109383$new_n28550_ i2=$abc$109383$new_n28770_ nq=$abc$109383$new_n28771_
 .subckt nand2_x0 i0=soc.cpu.minerva.loadstore.dbus__dat_w[29] i1=$abc$109383$new_n28643_ nq=$abc$109383$new_n28772_
 .subckt nand3_x0 i0=$abc$109383$new_n28548_ i1=$abc$109383$new_n28544_ i2=$abc$109383$new_n28772_ nq=$abc$109383$new_n28773_
-.subckt a2_x2 i0=$abc$109383$new_n28773_ i1=$abc$109383$new_n28771_ q=$abc$109383$new_n28774_
-.subckt a2_x2 i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28775_
-.subckt mx2_x2 cmd=$abc$109383$new_n28775_ i0=$abc$109383$new_n28774_ i1=soc.hyperram_$signal$76 q=$abc$109383$new_n28776_
-.subckt a2_x2 i0=$abc$109383$new_n28776_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102114
+.subckt and2_x1 i0=$abc$109383$new_n28773_ i1=$abc$109383$new_n28771_ q=$abc$109383$new_n28774_
+.subckt and2_x1 i0=$abc$109383$new_n28557_ i1=$abc$109383$new_n28550_ q=$abc$109383$new_n28775_
+.subckt mux2_x1 cmd=$abc$109383$new_n28775_ i0=$abc$109383$new_n28774_ i1=soc.hyperram_$signal$76 q=$abc$109383$new_n28776_
+.subckt and2_x1 i0=$abc$109383$new_n28776_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102114
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$79 nq=$abc$109383$new_n28778_
-.subckt a2_x2 i0=soc.hyperram.sr[38] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28779_
+.subckt and2_x1 i0=soc.hyperram.sr[38] i1=$abc$109383$new_n28713_ q=$abc$109383$new_n28779_
 .subckt nand3_x0 i0=$abc$109383$new_n28779_ i1=$abc$109383$new_n28661_ i2=$abc$109383$new_n28659_ nq=$abc$109383$new_n28780_
 .subckt nand3_x0 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n19771_ nq=$abc$109383$new_n28781_
 .subckt nand3_x0 i0=$abc$109383$new_n28781_ i1=$abc$109383$new_n28780_ i2=$abc$109383$new_n28778_ nq=$abc$109383$new_n28782_
-.subckt a2_x2 i0=$abc$109383$new_n28782_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102118
+.subckt and2_x1 i0=$abc$109383$new_n28782_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102118
 .subckt nand3_x0 i0=$abc$109383$new_n28720_ i1=$abc$109383$new_n28719_ i2=soc.hyperram_$signal$82 nq=$abc$109383$new_n28784_
 .subckt nand3_x0 i0=$abc$109383$new_n28657_ i1=$abc$109383$new_n28656_ i2=$abc$109383$new_n19775_ nq=$abc$109383$new_n28785_
 .subckt nand2_x0 i0=soc.cpu.minerva.loadstore.dbus__we i1=$abc$109383$new_n28643_ nq=$abc$109383$new_n28786_
-.subckt mx2_x2 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n28786_ i1=soc.hyperram.sr[39] q=$abc$109383$new_n28787_
+.subckt mux2_x1 cmd=$abc$109383$new_n28645_ i0=$abc$109383$new_n28786_ i1=soc.hyperram.sr[39] q=$abc$109383$new_n28787_
 .subckt nand3_x0 i0=$abc$109383$new_n28787_ i1=$abc$109383$new_n28663_ i2=$abc$109383$new_n28651_ nq=$abc$109383$new_n28788_
 .subckt nand3_x0 i0=$abc$109383$new_n28788_ i1=$abc$109383$new_n28785_ i2=$abc$109383$new_n28784_ nq=$abc$109383$new_n28789_
-.subckt a2_x2 i0=$abc$109383$new_n28789_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102122
-.subckt o3_x2 i0=soc.hyperram.counter[6] i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] q=$abc$109383$new_n28791_
-.subckt o4_x2 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] i2=soc.hyperram.counter[0] i3=soc.hyperram.counter[1] q=$abc$109383$new_n28792_
-.subckt o2_x2 i0=$abc$109383$new_n28792_ i1=$abc$109383$new_n28791_ q=$abc$109383$new_n28793_
-.subckt a4_x2 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ i2=$abc$109383$new_n28537_ i3=soc.hyperram.clk_phase[0] q=$abc$109383$new_n28794_
+.subckt and2_x1 i0=$abc$109383$new_n28789_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102122
+.subckt or3_x1 i0=soc.hyperram.counter[6] i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] q=$abc$109383$new_n28791_
+.subckt or4_x1 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] i2=soc.hyperram.counter[0] i3=soc.hyperram.counter[1] q=$abc$109383$new_n28792_
+.subckt or2_x1 i0=$abc$109383$new_n28792_ i1=$abc$109383$new_n28791_ q=$abc$109383$new_n28793_
+.subckt and4_x1 i0=$abc$109383$new_n14917_ i1=$abc$109383$new_n14916_ i2=$abc$109383$new_n28537_ i3=soc.hyperram.clk_phase[0] q=$abc$109383$new_n28794_
 .subckt nor4_x0 i0=soc.cpu.minerva.fetch.ibus__adr[24] i1=soc.cpu.minerva.fetch.ibus__adr[23] i2=soc.cpu.minerva.fetch.ibus__adr[22] i3=$abc$109383$new_n19760_ nq=$abc$109383$new_n28795_
 .subckt nor3_x0 i0=soc.cpu.minerva.fetch.ibus__adr[29] i1=soc.cpu.minerva.fetch.ibus__adr[28] i2=soc.cpu.minerva.fetch.ibus__adr[25] nq=$abc$109383$new_n28796_
 .subckt nand2_x0 i0=$abc$109383$new_n28796_ i1=$abc$109383$new_n28795_ nq=$abc$109383$new_n28797_
@@ -14074,145 +14074,145 @@
 .subckt nand4_x0 i0=$abc$109383$new_n28799_ i1=$abc$109383$new_n28798_ i2=$abc$109383$new_n14898_ i3=$abc$109383$new_n28643_ nq=$abc$109383$new_n28800_
 .subckt nand2_x0 i0=$abc$109383$new_n28800_ i1=$abc$109383$new_n28797_ nq=$abc$109383$new_n28801_
 .subckt buf_x4 i=$abc$109383$new_n28801_ q=$abc$109383$new_n28802_
-.subckt mx2_x2 cmd=$abc$109383$new_n19731_ i0=soc.cpu.minerva.fetch.ibus__adr[27] i1=soc.cpu.minerva.loadstore.dbus__adr[27] q=$abc$109383$new_n28803_
-.subckt a3_x2 i0=$abc$109383$new_n28803_ i1=$abc$109383$new_n14897_ i2=$abc$109383$new_n19652_ q=$abc$109383$new_n28804_
+.subckt mux2_x1 cmd=$abc$109383$new_n19731_ i0=soc.cpu.minerva.fetch.ibus__adr[27] i1=soc.cpu.minerva.loadstore.dbus__adr[27] q=$abc$109383$new_n28803_
+.subckt and3_x1 i0=$abc$109383$new_n28803_ i1=$abc$109383$new_n14897_ i2=$abc$109383$new_n19652_ q=$abc$109383$new_n28804_
 .subckt buf_x4 i=$abc$109383$new_n28804_ q=$abc$109383$new_n28805_
-.subckt a2_x2 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ q=$abc$109383$new_n28806_
-.subckt oa22_x2 i0=$abc$109383$new_n28806_ i1=$abc$109383$new_n28794_ i2=$abc$109383$new_n28793_ q=$abc$109383$new_n28807_
+.subckt and2_x1 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ q=$abc$109383$new_n28806_
+.subckt or21nand_x1 i0=$abc$109383$new_n28806_ i1=$abc$109383$new_n28794_ i2=$abc$109383$new_n28793_ nq=$abc$109383$new_n28807_
 .subckt nor2_x0 i0=soc.hyperram.counter[0] i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n28808_
-.subckt a2_x2 i0=$abc$109383$new_n28808_ i1=$abc$109383$new_n28807_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102126
+.subckt and2_x1 i0=$abc$109383$new_n28808_ i1=$abc$109383$new_n28807_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102126
 .subckt nand2_x0 i0=soc.hyperram.counter[0] i1=soc.hyperram.counter[1] nq=$abc$109383$new_n28810_
-.subckt o2_x2 i0=soc.hyperram.counter[0] i1=soc.hyperram.counter[1] q=$abc$109383$new_n28811_
-.subckt a3_x2 i0=$abc$109383$new_n28811_ i1=$abc$109383$new_n28810_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102130
+.subckt or2_x1 i0=soc.hyperram.counter[0] i1=soc.hyperram.counter[1] q=$abc$109383$new_n28811_
+.subckt and3_x1 i0=$abc$109383$new_n28811_ i1=$abc$109383$new_n28810_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102130
 .subckt inv_x0 i=soc.hyperram.counter[3] nq=$abc$109383$new_n28813_
 .subckt nor2_x0 i0=soc.hyperram.counter[4] i1=soc.hyperram.counter[5] nq=$abc$109383$new_n28814_
-.subckt a3_x2 i0=$abc$109383$new_n28814_ i1=soc.hyperram.counter[6] i2=soc.hyperram.counter[2] q=$abc$109383$new_n28815_
+.subckt and3_x1 i0=$abc$109383$new_n28814_ i1=soc.hyperram.counter[6] i2=soc.hyperram.counter[2] q=$abc$109383$new_n28815_
 .subckt nand3_x0 i0=$abc$109383$new_n28815_ i1=$abc$109383$new_n28547_ i2=$abc$109383$new_n28813_ nq=$abc$109383$new_n28816_
-.subckt nxr2_x1 i0=$abc$109383$new_n28547_ i1=$abc$109383$new_n28545_ nq=$abc$109383$new_n28817_
-.subckt a3_x2 i0=$abc$109383$new_n28817_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102134
-.subckt a3_x2 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[0] i2=soc.hyperram.counter[1] q=$abc$109383$new_n28819_
-.subckt nxr2_x1 i0=$abc$109383$new_n28819_ i1=$abc$109383$new_n28813_ nq=$abc$109383$new_n28820_
-.subckt a3_x2 i0=$abc$109383$new_n28820_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102138
+.subckt nexor2_x0 i0=$abc$109383$new_n28547_ i1=$abc$109383$new_n28545_ nq=$abc$109383$new_n28817_
+.subckt and3_x1 i0=$abc$109383$new_n28817_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102134
+.subckt and3_x1 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[0] i2=soc.hyperram.counter[1] q=$abc$109383$new_n28819_
+.subckt nexor2_x0 i0=$abc$109383$new_n28819_ i1=$abc$109383$new_n28813_ nq=$abc$109383$new_n28820_
+.subckt and3_x1 i0=$abc$109383$new_n28820_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102138
 .subckt inv_x0 i=soc.hyperram.counter[4] nq=$abc$109383$new_n28822_
-.subckt a4_x2 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] i2=soc.hyperram.counter[0] i3=soc.hyperram.counter[1] q=$abc$109383$new_n28823_
-.subckt nxr2_x1 i0=$abc$109383$new_n28823_ i1=$abc$109383$new_n28822_ nq=$abc$109383$new_n28824_
-.subckt a3_x2 i0=$abc$109383$new_n28824_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102142
+.subckt and4_x1 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] i2=soc.hyperram.counter[0] i3=soc.hyperram.counter[1] q=$abc$109383$new_n28823_
+.subckt nexor2_x0 i0=$abc$109383$new_n28823_ i1=$abc$109383$new_n28822_ nq=$abc$109383$new_n28824_
+.subckt and3_x1 i0=$abc$109383$new_n28824_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102142
 .subckt inv_x0 i=soc.hyperram.counter[5] nq=$abc$109383$new_n28826_
-.subckt a2_x2 i0=$abc$109383$new_n28823_ i1=soc.hyperram.counter[4] q=$abc$109383$new_n28827_
-.subckt nxr2_x1 i0=$abc$109383$new_n28827_ i1=$abc$109383$new_n28826_ nq=$abc$109383$new_n28828_
-.subckt a3_x2 i0=$abc$109383$new_n28828_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102146
-.subckt a3_x2 i0=$abc$109383$new_n28823_ i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] q=$abc$109383$new_n28830_
-.subckt nxr2_x1 i0=$abc$109383$new_n28830_ i1=$abc$109383$new_n28543_ nq=$abc$109383$new_n28831_
-.subckt a3_x2 i0=$abc$109383$new_n28831_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102150
+.subckt and2_x1 i0=$abc$109383$new_n28823_ i1=soc.hyperram.counter[4] q=$abc$109383$new_n28827_
+.subckt nexor2_x0 i0=$abc$109383$new_n28827_ i1=$abc$109383$new_n28826_ nq=$abc$109383$new_n28828_
+.subckt and3_x1 i0=$abc$109383$new_n28828_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102146
+.subckt and3_x1 i0=$abc$109383$new_n28823_ i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] q=$abc$109383$new_n28830_
+.subckt nexor2_x0 i0=$abc$109383$new_n28830_ i1=$abc$109383$new_n28543_ nq=$abc$109383$new_n28831_
+.subckt and3_x1 i0=$abc$109383$new_n28831_ i1=$abc$109383$new_n28816_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102150
 .subckt nand2_x0 i0=$abc$109383$new_n28712_ i1=soc.hyperram.$30 nq=$abc$109383$new_n28833_
 .subckt nand4_x0 i0=$abc$109383$new_n28554_ i1=$abc$109383$new_n28814_ i2=$abc$109383$new_n28547_ i3=soc.hyperram.counter[6] nq=$abc$109383$new_n28834_
-.subckt a2_x2 i0=$abc$109383$new_n28834_ i1=$abc$109383$new_n27525_ q=$abc$109383$new_n28835_
-.subckt a2_x2 i0=$abc$109383$new_n28835_ i1=$abc$109383$new_n28833_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102154
-.subckt a2_x2 i0=soc.cpu.minerva.loadstore.dbus__we i1=$abc$109383$new_n28643_ q=$abc$109383$new_n28837_
-.subckt a3_x2 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n28837_ q=$abc$109383$new_n28838_
+.subckt and2_x1 i0=$abc$109383$new_n28834_ i1=$abc$109383$new_n27525_ q=$abc$109383$new_n28835_
+.subckt and2_x1 i0=$abc$109383$new_n28835_ i1=$abc$109383$new_n28833_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102154
+.subckt and2_x1 i0=soc.cpu.minerva.loadstore.dbus__we i1=$abc$109383$new_n28643_ q=$abc$109383$new_n28837_
+.subckt and3_x1 i0=$abc$109383$new_n28706_ i1=$abc$109383$new_n28705_ i2=$abc$109383$new_n28837_ q=$abc$109383$new_n28838_
 .subckt nand2_x0 i0=$abc$109383$new_n28823_ i1=$abc$109383$new_n28553_ nq=$abc$109383$new_n28839_
-.subckt a3_x2 i0=$abc$109383$new_n28554_ i1=$abc$109383$new_n28553_ i2=$abc$109383$new_n28547_ q=$abc$109383$new_n28840_
-.subckt ao22_x2 i0=soc.hyperram.dq_oe i1=$abc$109383$new_n28840_ i2=$abc$109383$new_n28839_ q=$abc$109383$new_n28841_
-.subckt a2_x2 i0=$abc$109383$new_n28841_ i1=$abc$109383$new_n28651_ q=$abc$109383$new_n28842_
-.subckt ao22_x2 i0=$abc$109383$new_n28842_ i1=$abc$109383$new_n28838_ i2=$abc$109383$new_n28835_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102158
+.subckt and3_x1 i0=$abc$109383$new_n28554_ i1=$abc$109383$new_n28553_ i2=$abc$109383$new_n28547_ q=$abc$109383$new_n28840_
+.subckt and21nor_x1 i0=soc.hyperram.dq_oe i1=$abc$109383$new_n28840_ i2=$abc$109383$new_n28839_ nq=$abc$109383$new_n28841_
+.subckt and2_x1 i0=$abc$109383$new_n28841_ i1=$abc$109383$new_n28651_ q=$abc$109383$new_n28842_
+.subckt and21nor_x1 i0=$abc$109383$new_n28842_ i1=$abc$109383$new_n28838_ i2=$abc$109383$new_n28835_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102158
 .subckt nand3_x0 i0=$abc$109383$new_n28543_ i1=soc.hyperram.counter[4] i2=soc.hyperram.counter[5] nq=$abc$109383$new_n28844_
 .subckt nand3_x0 i0=$abc$109383$new_n28547_ i1=$abc$109383$new_n28545_ i2=soc.hyperram.counter[3] nq=$abc$109383$new_n28845_
-.subckt ao22_x2 i0=$abc$109383$new_n28845_ i1=$abc$109383$new_n28844_ i2=soc.hyperram.rwds_oe q=$abc$109383$new_n28846_
-.subckt ao22_x2 i0=$abc$109383$new_n28846_ i1=$abc$109383$new_n28838_ i2=$abc$109383$new_n28835_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102162
+.subckt and21nor_x1 i0=$abc$109383$new_n28845_ i1=$abc$109383$new_n28844_ i2=soc.hyperram.rwds_oe nq=$abc$109383$new_n28846_
+.subckt and21nor_x1 i0=$abc$109383$new_n28846_ i1=$abc$109383$new_n28838_ i2=$abc$109383$new_n28835_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102162
 .subckt inv_x0 i=soc.hyperram.counter[1] nq=$abc$109383$new_n28848_
-.subckt a2_x2 i0=soc.hyperram.counter[0] i1=$abc$109383$new_n28848_ q=$abc$109383$new_n28849_
-.subckt a3_x2 i0=$abc$109383$new_n28554_ i1=$abc$109383$new_n28814_ i2=soc.hyperram.counter[6] q=$abc$109383$new_n28850_
+.subckt and2_x1 i0=soc.hyperram.counter[0] i1=$abc$109383$new_n28848_ q=$abc$109383$new_n28849_
+.subckt and3_x1 i0=$abc$109383$new_n28554_ i1=$abc$109383$new_n28814_ i2=soc.hyperram.counter[6] q=$abc$109383$new_n28850_
 .subckt nand2_x0 i0=$abc$109383$new_n28850_ i1=$abc$109383$new_n28849_ nq=$abc$109383$new_n28851_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__sel[3] nq=$abc$109383$new_n28852_
-.subckt a2_x2 i0=$abc$109383$new_n28852_ i1=$abc$109383$new_n28643_ q=$abc$109383$new_n28853_
-.subckt a3_x2 i0=$abc$109383$new_n28548_ i1=$abc$109383$new_n28544_ i2=$abc$109383$new_n28853_ q=$abc$109383$new_n28854_
-.subckt ao22_x2 i0=$abc$109383$new_n28845_ i1=$abc$109383$new_n28844_ i2=soc.hyperram.$signal$4 q=$abc$109383$new_n28855_
-.subckt a2_x2 i0=soc.hyperram.counter[4] i1=soc.hyperram.counter[5] q=$abc$109383$new_n28856_
-.subckt a3_x2 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] i2=soc.hyperram.counter[0] q=$abc$109383$new_n28857_
-.subckt a3_x2 i0=$abc$109383$new_n28857_ i1=$abc$109383$new_n28856_ i2=$abc$109383$new_n28543_ q=$abc$109383$new_n28858_
+.subckt and2_x1 i0=$abc$109383$new_n28852_ i1=$abc$109383$new_n28643_ q=$abc$109383$new_n28853_
+.subckt and3_x1 i0=$abc$109383$new_n28548_ i1=$abc$109383$new_n28544_ i2=$abc$109383$new_n28853_ q=$abc$109383$new_n28854_
+.subckt and21nor_x1 i0=$abc$109383$new_n28845_ i1=$abc$109383$new_n28844_ i2=soc.hyperram.$signal$4 nq=$abc$109383$new_n28855_
+.subckt and2_x1 i0=soc.hyperram.counter[4] i1=soc.hyperram.counter[5] q=$abc$109383$new_n28856_
+.subckt and3_x1 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] i2=soc.hyperram.counter[0] q=$abc$109383$new_n28857_
+.subckt and3_x1 i0=$abc$109383$new_n28857_ i1=$abc$109383$new_n28856_ i2=$abc$109383$new_n28543_ q=$abc$109383$new_n28858_
 .subckt nor3_x0 i0=$abc$109383$new_n28858_ i1=$abc$109383$new_n28855_ i2=$abc$109383$new_n28854_ nq=$abc$109383$new_n28859_
-.subckt ao22_x2 i0=$abc$109383$new_n14775_ i1=soc.cpu.minerva.loadstore.dbus__sel[1] i2=$abc$109383$new_n28823_ q=$abc$109383$new_n28860_
-.subckt a2_x2 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] q=$abc$109383$new_n28861_
-.subckt ao22_x2 i0=$abc$109383$new_n14775_ i1=soc.cpu.minerva.loadstore.dbus__sel[2] i2=$abc$109383$new_n28861_ q=$abc$109383$new_n28862_
-.subckt a2_x2 i0=$abc$109383$new_n28862_ i1=$abc$109383$new_n28849_ q=$abc$109383$new_n28863_
-.subckt ao22_x2 i0=$abc$109383$new_n28863_ i1=$abc$109383$new_n28860_ i2=$abc$109383$new_n28544_ q=$abc$109383$new_n28864_
-.subckt ao22_x2 i0=$abc$109383$new_n28864_ i1=$abc$109383$new_n28859_ i2=$abc$109383$new_n28851_ q=$abc$109383$new_n28865_
+.subckt and21nor_x1 i0=$abc$109383$new_n14775_ i1=soc.cpu.minerva.loadstore.dbus__sel[1] i2=$abc$109383$new_n28823_ nq=$abc$109383$new_n28860_
+.subckt and2_x1 i0=soc.hyperram.counter[2] i1=soc.hyperram.counter[3] q=$abc$109383$new_n28861_
+.subckt and21nor_x1 i0=$abc$109383$new_n14775_ i1=soc.cpu.minerva.loadstore.dbus__sel[2] i2=$abc$109383$new_n28861_ nq=$abc$109383$new_n28862_
+.subckt and2_x1 i0=$abc$109383$new_n28862_ i1=$abc$109383$new_n28849_ q=$abc$109383$new_n28863_
+.subckt and21nor_x1 i0=$abc$109383$new_n28863_ i1=$abc$109383$new_n28860_ i2=$abc$109383$new_n28544_ nq=$abc$109383$new_n28864_
+.subckt and21nor_x1 i0=$abc$109383$new_n28864_ i1=$abc$109383$new_n28859_ i2=$abc$109383$new_n28851_ nq=$abc$109383$new_n28865_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__sel[0] nq=$abc$109383$new_n28866_
 .subckt nand2_x0 i0=$abc$109383$new_n28866_ i1=$abc$109383$new_n28643_ nq=$abc$109383$new_n28867_
 .subckt nand3_x0 i0=$abc$109383$new_n28850_ i1=$abc$109383$new_n28849_ i2=$abc$109383$new_n28867_ nq=$abc$109383$new_n28868_
 .subckt nand2_x0 i0=$abc$109383$new_n28868_ i1=$abc$109383$new_n28536_ nq=$abc$109383$new_n28869_
 .subckt nor2_x0 i0=$abc$109383$new_n28869_ i1=$abc$109383$new_n28865_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102166
 .subckt inv_x0 i=soc.hyperram.counter[0] nq=$abc$109383$new_n28871_
-.subckt a2_x2 i0=$abc$109383$new_n28871_ i1=soc.hyperram.counter[1] q=$abc$109383$new_n28872_
+.subckt and2_x1 i0=$abc$109383$new_n28871_ i1=soc.hyperram.counter[1] q=$abc$109383$new_n28872_
 .subckt nand3_x0 i0=$abc$109383$new_n28872_ i1=$abc$109383$new_n28815_ i2=$abc$109383$new_n28813_ nq=$abc$109383$new_n28873_
-.subckt a3_x2 i0=$abc$109383$new_n28849_ i1=$abc$109383$new_n28815_ i2=$abc$109383$new_n28813_ q=$abc$109383$new_n28874_
-.subckt ao22_x2 i0=$abc$109383$new_n28874_ i1=soc.hyperram.bus__ack i2=$abc$109383$new_n28578_ q=$abc$109383$new_n28875_
-.subckt a2_x2 i0=$abc$109383$new_n28875_ i1=$abc$109383$new_n28873_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102170
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0] q=$abc$109383$new_n28877_
-.subckt a2_x2 i0=$abc$109383$new_n28877_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102174
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$87 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1] q=$abc$109383$new_n28879_
-.subckt a2_x2 i0=$abc$109383$new_n28879_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102178
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$90 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2] q=$abc$109383$new_n28881_
-.subckt a2_x2 i0=$abc$109383$new_n28881_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102182
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$93 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3] q=$abc$109383$new_n28883_
-.subckt a2_x2 i0=$abc$109383$new_n28883_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102186
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$96 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4] q=$abc$109383$new_n28885_
-.subckt a2_x2 i0=$abc$109383$new_n28885_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102190
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$99 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5] q=$abc$109383$new_n28887_
-.subckt a2_x2 i0=$abc$109383$new_n28887_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102194
+.subckt and3_x1 i0=$abc$109383$new_n28849_ i1=$abc$109383$new_n28815_ i2=$abc$109383$new_n28813_ q=$abc$109383$new_n28874_
+.subckt and21nor_x1 i0=$abc$109383$new_n28874_ i1=soc.hyperram.bus__ack i2=$abc$109383$new_n28578_ nq=$abc$109383$new_n28875_
+.subckt and2_x1 i0=$abc$109383$new_n28875_ i1=$abc$109383$new_n28873_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102170
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0] q=$abc$109383$new_n28877_
+.subckt and2_x1 i0=$abc$109383$new_n28877_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102174
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$87 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1] q=$abc$109383$new_n28879_
+.subckt and2_x1 i0=$abc$109383$new_n28879_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102178
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$90 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2] q=$abc$109383$new_n28881_
+.subckt and2_x1 i0=$abc$109383$new_n28881_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102182
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$93 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3] q=$abc$109383$new_n28883_
+.subckt and2_x1 i0=$abc$109383$new_n28883_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102186
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$96 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4] q=$abc$109383$new_n28885_
+.subckt and2_x1 i0=$abc$109383$new_n28885_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102190
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$99 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5] q=$abc$109383$new_n28887_
+.subckt and2_x1 i0=$abc$109383$new_n28887_ i1=$abc$109383$new_n28763_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102194
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28889_
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$102 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6] q=$abc$109383$new_n28890_
-.subckt a2_x2 i0=$abc$109383$new_n28890_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102198
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$105 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7] q=$abc$109383$new_n28892_
-.subckt a2_x2 i0=$abc$109383$new_n28892_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102202
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[0] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0] q=$abc$109383$new_n28894_
-.subckt a2_x2 i0=$abc$109383$new_n28894_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102206
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[1] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1] q=$abc$109383$new_n28896_
-.subckt a2_x2 i0=$abc$109383$new_n28896_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102210
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[2] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2] q=$abc$109383$new_n28898_
-.subckt a2_x2 i0=$abc$109383$new_n28898_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102214
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[3] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3] q=$abc$109383$new_n28900_
-.subckt a2_x2 i0=$abc$109383$new_n28900_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102218
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[4] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4] q=$abc$109383$new_n28902_
-.subckt a2_x2 i0=$abc$109383$new_n28902_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102222
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[5] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5] q=$abc$109383$new_n28904_
-.subckt a2_x2 i0=$abc$109383$new_n28904_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102226
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[6] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6] q=$abc$109383$new_n28906_
-.subckt a2_x2 i0=$abc$109383$new_n28906_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102230
-.subckt mx2_x2 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[7] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7] q=$abc$109383$new_n28908_
-.subckt a2_x2 i0=$abc$109383$new_n28908_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102234
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$102 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6] q=$abc$109383$new_n28890_
+.subckt and2_x1 i0=$abc$109383$new_n28890_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102198
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb i0=soc.gpio_$signal$105 i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7] q=$abc$109383$new_n28892_
+.subckt and2_x1 i0=$abc$109383$new_n28892_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102202
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[0] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0] q=$abc$109383$new_n28894_
+.subckt and2_x1 i0=$abc$109383$new_n28894_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102206
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[1] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1] q=$abc$109383$new_n28896_
+.subckt and2_x1 i0=$abc$109383$new_n28896_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102210
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[2] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2] q=$abc$109383$new_n28898_
+.subckt and2_x1 i0=$abc$109383$new_n28898_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102214
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[3] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3] q=$abc$109383$new_n28900_
+.subckt and2_x1 i0=$abc$109383$new_n28900_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102218
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[4] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4] q=$abc$109383$new_n28902_
+.subckt and2_x1 i0=$abc$109383$new_n28902_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102222
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[5] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5] q=$abc$109383$new_n28904_
+.subckt and2_x1 i0=$abc$109383$new_n28904_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102226
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[6] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6] q=$abc$109383$new_n28906_
+.subckt and2_x1 i0=$abc$109383$new_n28906_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102230
+.subckt mux2_x1 cmd=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb i0=soc.gpio.oe_buf[7] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7] q=$abc$109383$new_n28908_
+.subckt and2_x1 i0=$abc$109383$new_n28908_ i1=$abc$109383$new_n28889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102234
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__cyc nq=$abc$109383$new_n28910_
 .subckt buf_x4 i=soc.cpu.minerva.x.valid$1 q=$abc$109383$new_n28911_
 .subckt nor2_x0 i0=soc.cpu.minerva.divider.fsm_state i1=soc.cpu.minerva.fetch.ibus__cyc nq=$abc$109383$new_n28912_
-.subckt a4_x2 i0=$abc$109383$new_n28912_ i1=$abc$109383$new_n28169_ i2=$abc$109383$new_n28911_ i3=$abc$109383$new_n28910_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102236
+.subckt and4_x1 i0=$abc$109383$new_n28912_ i1=$abc$109383$new_n28169_ i2=$abc$109383$new_n28911_ i3=$abc$109383$new_n28910_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102236
 .subckt nor2_x0 i0=soc.gpio.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n27420_ nq=$abc$109383$new_n28914_
 .subckt nor2_x0 i0=$abc$109383$new_n14954_ i1=$abc$109383$new_n14780_ nq=$abc$109383$new_n28915_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[12] nq=$abc$109383$new_n28916_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.dbus__adr[12] nq=$abc$109383$new_n28917_
-.subckt mx2_x2 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n28917_ i1=$abc$109383$new_n28916_ q=$abc$109383$new_n28918_
-.subckt a3_x2 i0=$abc$109383$new_n28918_ i1=$abc$109383$new_n14872_ i2=$abc$109383$new_n19673_ q=$abc$109383$new_n28919_
-.subckt a4_x2 i0=$abc$109383$new_n28919_ i1=$abc$109383$new_n28915_ i2=$abc$109383$new_n19781_ i3=$abc$109383$new_n19667_ q=$abc$109383$new_n28920_
-.subckt a4_x2 i0=$abc$109383$new_n28920_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=soc.gpio.bridge.csr_bridge_0.cycle[2] q=$abc$109383$new_n28921_
-.subckt a2_x2 i0=$abc$109383$new_n28921_ i1=$abc$109383$new_n28914_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102238
+.subckt mux2_x1 cmd=$abc$109383$new_n14775_ i0=$abc$109383$new_n28917_ i1=$abc$109383$new_n28916_ q=$abc$109383$new_n28918_
+.subckt and3_x1 i0=$abc$109383$new_n28918_ i1=$abc$109383$new_n14872_ i2=$abc$109383$new_n19673_ q=$abc$109383$new_n28919_
+.subckt and4_x1 i0=$abc$109383$new_n28919_ i1=$abc$109383$new_n28915_ i2=$abc$109383$new_n19781_ i3=$abc$109383$new_n19667_ q=$abc$109383$new_n28920_
+.subckt and4_x1 i0=$abc$109383$new_n28920_ i1=$abc$109383$new_n19665_ i2=$abc$109383$new_n19649_ i3=soc.gpio.bridge.csr_bridge_0.cycle[2] q=$abc$109383$new_n28921_
+.subckt and2_x1 i0=$abc$109383$new_n28921_ i1=$abc$109383$new_n28914_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102238
 .subckt nor2_x0 i0=soc.gpio.bridge.csr_bridge_0.cycle[0] i1=soc.gpio.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n28923_
-.subckt a3_x2 i0=$abc$109383$new_n28923_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19646_ q=$abc$109383$new_n28924_
+.subckt and3_x1 i0=$abc$109383$new_n28923_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19646_ q=$abc$109383$new_n28924_
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n28925_
 .subckt buf_x4 i=$abc$109383$new_n28925_ q=$abc$109383$new_n28926_
 .subckt inv_x1 i=soc.gpio.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n28927_
-.subckt a3_x2 i0=$abc$109383$new_n28927_ i1=soc.gpio.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n28926_ q=$abc$109383$new_n28928_
+.subckt and3_x1 i0=$abc$109383$new_n28927_ i1=soc.gpio.bridge.csr_bridge_0.cycle[0] i2=$abc$109383$new_n28926_ q=$abc$109383$new_n28928_
 .subckt nand2_x0 i0=$abc$109383$new_n28928_ i1=$abc$109383$new_n21945_ nq=$abc$109383$new_n28929_
 .subckt nor3_x0 i0=soc.gpio.bridge.csr_bridge_0.cycle[2] i1=soc.gpio.bridge.csr_bridge_0.cycle[0] i2=soc.gpio.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n28930_
 .subckt buf_x4 i=$abc$109383$new_n28930_ q=$abc$109383$new_n28931_
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n21954_ nq=$abc$109383$new_n28932_
 .subckt inv_x2 i=soc.gpio.bridge.csr_bridge_0.cycle[0] nq=$abc$109383$new_n28933_
-.subckt a3_x2 i0=$abc$109383$new_n28927_ i1=$abc$109383$new_n28933_ i2=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28934_
+.subckt and3_x1 i0=$abc$109383$new_n28927_ i1=$abc$109383$new_n28933_ i2=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28934_
 .subckt nand2_x0 i0=$abc$109383$new_n28934_ i1=$abc$109383$new_n21950_ nq=$abc$109383$new_n28935_
-.subckt a2_x2 i0=soc.gpio.bridge.csr_bridge_0.cycle[0] i1=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28936_
-.subckt a2_x2 i0=$abc$109383$new_n28936_ i1=$abc$109383$new_n28927_ q=$abc$109383$new_n28937_
+.subckt and2_x1 i0=soc.gpio.bridge.csr_bridge_0.cycle[0] i1=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28936_
+.subckt and2_x1 i0=$abc$109383$new_n28936_ i1=$abc$109383$new_n28927_ q=$abc$109383$new_n28937_
 .subckt nand2_x0 i0=$abc$109383$new_n28937_ i1=$abc$109383$new_n21940_ nq=$abc$109383$new_n28938_
 .subckt nand4_x0 i0=$abc$109383$new_n28938_ i1=$abc$109383$new_n28935_ i2=$abc$109383$new_n28932_ i3=$abc$109383$new_n28929_ nq=$abc$109383$new_n28939_
-.subckt a4_x2 i0=$abc$109383$new_n28939_ i1=$abc$109383$new_n28920_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n28940_
-.subckt a3_x2 i0=$abc$109383$new_n28940_ i1=$abc$109383$new_n28924_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102240
+.subckt and4_x1 i0=$abc$109383$new_n28939_ i1=$abc$109383$new_n28920_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n14919_ q=$abc$109383$new_n28940_
+.subckt and3_x1 i0=$abc$109383$new_n28940_ i1=$abc$109383$new_n28924_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102240
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n28942_
 .subckt buf_x4 i=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28943_
 .subckt buf_x4 i=$abc$109383$new_n28927_ q=$abc$109383$new_n28944_
@@ -14224,244 +14224,244 @@
 .subckt buf_x4 i=soc.gpio.bridge.csr_bridge_0.cycle[0] q=$abc$109383$new_n28950_
 .subckt nand4_x0 i0=$abc$109383$new_n20349_ i1=$abc$109383$new_n28944_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n28951_
 .subckt nand4_x0 i0=$abc$109383$new_n28951_ i1=$abc$109383$new_n28949_ i2=$abc$109383$new_n28947_ i3=$abc$109383$new_n28946_ nq=$abc$109383$new_n28952_
-.subckt o3_x2 i0=soc.cpu.minerva.fetch.ibus__adr[29] i1=soc.cpu.minerva.fetch.ibus__adr[28] i2=$abc$109383$new_n19731_ q=$abc$109383$new_n28953_
+.subckt or3_x1 i0=soc.cpu.minerva.fetch.ibus__adr[29] i1=soc.cpu.minerva.fetch.ibus__adr[28] i2=$abc$109383$new_n19731_ q=$abc$109383$new_n28953_
 .subckt nand3_x0 i0=$abc$109383$new_n14912_ i1=$abc$109383$new_n14911_ i2=$abc$109383$new_n19731_ nq=$abc$109383$new_n28954_
-.subckt oa22_x2 i0=$abc$109383$new_n28954_ i1=$abc$109383$new_n28953_ i2=$abc$109383$new_n28803_ q=$abc$109383$new_n28955_
+.subckt or21nand_x1 i0=$abc$109383$new_n28954_ i1=$abc$109383$new_n28953_ i2=$abc$109383$new_n28803_ nq=$abc$109383$new_n28955_
 .subckt nand3_x0 i0=$abc$109383$new_n19659_ i1=$abc$109383$new_n19658_ i2=$abc$109383$new_n19655_ nq=$abc$109383$new_n28956_
-.subckt o4_x2 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n14786_ i2=$abc$109383$new_n14950_ i3=$abc$109383$new_n14756_ q=$abc$109383$new_n28957_
+.subckt or4_x1 i0=$abc$109383$new_n14887_ i1=$abc$109383$new_n14786_ i2=$abc$109383$new_n14950_ i3=$abc$109383$new_n14756_ q=$abc$109383$new_n28957_
 .subckt nor4_x0 i0=$abc$109383$new_n21997_ i1=$abc$109383$new_n28957_ i2=$abc$109383$new_n28956_ i3=$abc$109383$new_n28955_ nq=$abc$109383$new_n28958_
-.subckt a4_x2 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n28927_ i2=soc.gpio.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n28925_ q=$abc$109383$new_n28959_
-.subckt a2_x2 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n28960_
-.subckt a3_x2 i0=$abc$109383$new_n28936_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n28927_ q=$abc$109383$new_n28961_
-.subckt a4_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n28927_ i2=$abc$109383$new_n28933_ i3=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28962_
-.subckt o4_x2 i0=$abc$109383$new_n28962_ i1=$abc$109383$new_n28961_ i2=$abc$109383$new_n28960_ i3=$abc$109383$new_n28959_ q=$abc$109383$new_n28963_
+.subckt and4_x1 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n28927_ i2=soc.gpio.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n28925_ q=$abc$109383$new_n28959_
+.subckt and2_x1 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n28960_
+.subckt and3_x1 i0=$abc$109383$new_n28936_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n28927_ q=$abc$109383$new_n28961_
+.subckt and4_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n28927_ i2=$abc$109383$new_n28933_ i3=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28962_
+.subckt or4_x1 i0=$abc$109383$new_n28962_ i1=$abc$109383$new_n28961_ i2=$abc$109383$new_n28960_ i3=$abc$109383$new_n28959_ q=$abc$109383$new_n28963_
 .subckt nor2_x0 i0=$abc$109383$new_n14878_ i1=$abc$109383$new_n14802_ nq=$abc$109383$new_n28964_
-.subckt a2_x2 i0=$abc$109383$new_n14872_ i1=$abc$109383$new_n19670_ q=$abc$109383$new_n28965_
-.subckt a4_x2 i0=$abc$109383$new_n28965_ i1=$abc$109383$new_n28964_ i2=$abc$109383$new_n19780_ i3=$abc$109383$new_n19667_ q=$abc$109383$new_n28966_
+.subckt and2_x1 i0=$abc$109383$new_n14872_ i1=$abc$109383$new_n19670_ q=$abc$109383$new_n28965_
+.subckt and4_x1 i0=$abc$109383$new_n28965_ i1=$abc$109383$new_n28964_ i2=$abc$109383$new_n19780_ i3=$abc$109383$new_n19667_ q=$abc$109383$new_n28966_
 .subckt nand4_x0 i0=$abc$109383$new_n28966_ i1=$abc$109383$new_n28963_ i2=$abc$109383$new_n27459_ i3=$abc$109383$new_n28958_ nq=$abc$109383$new_n28967_
 .subckt buf_x4 i=$abc$109383$new_n28967_ q=$abc$109383$new_n28968_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28952_ i1=soc.gpio_$signal q=$abc$109383$new_n28969_
-.subckt o4_x2 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=soc.gpio.bridge.csr_bridge_0.cycle[0] i3=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28970_
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28952_ i1=soc.gpio_$signal q=$abc$109383$new_n28969_
+.subckt or4_x1 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=soc.gpio.bridge.csr_bridge_0.cycle[0] i3=soc.gpio.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n28970_
 .subckt nand4_x0 i0=$abc$109383$new_n28963_ i1=$abc$109383$new_n28920_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n19647_ nq=$abc$109383$new_n28971_
 .subckt nand4_x0 i0=$abc$109383$new_n28939_ i1=$abc$109383$new_n28920_ i2=$abc$109383$new_n28378_ i3=$abc$109383$new_n19647_ nq=$abc$109383$new_n28972_
-.subckt oa22_x2 i0=$abc$109383$new_n28972_ i1=$abc$109383$new_n28971_ i2=$abc$109383$new_n28970_ q=$abc$109383$new_n28973_
+.subckt or21nand_x1 i0=$abc$109383$new_n28972_ i1=$abc$109383$new_n28971_ i2=$abc$109383$new_n28970_ nq=$abc$109383$new_n28973_
 .subckt buf_x4 i=$abc$109383$new_n28973_ q=$abc$109383$new_n28974_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28969_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0] q=$abc$109383$new_n28975_
-.subckt a2_x2 i0=$abc$109383$new_n28975_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102244
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28969_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0] q=$abc$109383$new_n28975_
+.subckt and2_x1 i0=$abc$109383$new_n28975_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102244
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20273_ nq=$abc$109383$new_n28977_
 .subckt buf_x4 i=$abc$109383$new_n28944_ q=$abc$109383$new_n28978_
 .subckt nand4_x0 i0=$abc$109383$new_n20555_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n28979_
 .subckt nand3_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n19789_ i2=$abc$109383$new_n28945_ nq=$abc$109383$new_n28980_
 .subckt nand4_x0 i0=$abc$109383$new_n20365_ i1=$abc$109383$new_n28944_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n28981_
 .subckt nand4_x0 i0=$abc$109383$new_n28981_ i1=$abc$109383$new_n28980_ i2=$abc$109383$new_n28979_ i3=$abc$109383$new_n28977_ nq=$abc$109383$new_n28982_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28982_ i1=soc.gpio_$signal$87 q=$abc$109383$new_n28983_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28983_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1] q=$abc$109383$new_n28984_
-.subckt a2_x2 i0=$abc$109383$new_n28984_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102248
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28982_ i1=soc.gpio_$signal$87 q=$abc$109383$new_n28983_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28983_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1] q=$abc$109383$new_n28984_
+.subckt and2_x1 i0=$abc$109383$new_n28984_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102248
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20277_ nq=$abc$109383$new_n28986_
 .subckt nand4_x0 i0=$abc$109383$new_n20370_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n28987_
 .subckt nand3_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n19734_ i2=$abc$109383$new_n28945_ nq=$abc$109383$new_n28988_
 .subckt nand4_x0 i0=$abc$109383$new_n20559_ i1=$abc$109383$new_n28944_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n28989_
 .subckt nand4_x0 i0=$abc$109383$new_n28989_ i1=$abc$109383$new_n28988_ i2=$abc$109383$new_n28987_ i3=$abc$109383$new_n28986_ nq=$abc$109383$new_n28990_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28990_ i1=soc.gpio_$signal$90 q=$abc$109383$new_n28991_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28991_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2] q=$abc$109383$new_n28992_
-.subckt a2_x2 i0=$abc$109383$new_n28992_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102252
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28990_ i1=soc.gpio_$signal$90 q=$abc$109383$new_n28991_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28991_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2] q=$abc$109383$new_n28992_
+.subckt and2_x1 i0=$abc$109383$new_n28992_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102252
 .subckt nand4_x0 i0=$abc$109383$new_n20563_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n28994_
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20281_ nq=$abc$109383$new_n28995_
 .subckt nand3_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n19757_ i2=$abc$109383$new_n28945_ nq=$abc$109383$new_n28996_
 .subckt nand4_x0 i0=$abc$109383$new_n20374_ i1=$abc$109383$new_n28944_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n28997_
 .subckt nand4_x0 i0=$abc$109383$new_n28997_ i1=$abc$109383$new_n28996_ i2=$abc$109383$new_n28995_ i3=$abc$109383$new_n28994_ nq=$abc$109383$new_n28998_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28998_ i1=soc.gpio_$signal$93 q=$abc$109383$new_n28999_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28999_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3] q=$abc$109383$new_n29000_
-.subckt a2_x2 i0=$abc$109383$new_n29000_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102256
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28998_ i1=soc.gpio_$signal$93 q=$abc$109383$new_n28999_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n28999_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3] q=$abc$109383$new_n29000_
+.subckt and2_x1 i0=$abc$109383$new_n29000_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102256
 .subckt nand4_x0 i0=$abc$109383$new_n20568_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n29002_
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20285_ nq=$abc$109383$new_n29003_
 .subckt nand4_x0 i0=$abc$109383$new_n20379_ i1=$abc$109383$new_n28944_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n29004_
 .subckt nand3_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n19762_ i2=$abc$109383$new_n28978_ nq=$abc$109383$new_n29005_
 .subckt nand4_x0 i0=$abc$109383$new_n29005_ i1=$abc$109383$new_n29004_ i2=$abc$109383$new_n29003_ i3=$abc$109383$new_n29002_ nq=$abc$109383$new_n29006_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29006_ i1=soc.gpio_$signal$96 q=$abc$109383$new_n29007_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29007_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4] q=$abc$109383$new_n29008_
-.subckt a2_x2 i0=$abc$109383$new_n29008_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102260
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29006_ i1=soc.gpio_$signal$96 q=$abc$109383$new_n29007_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29007_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4] q=$abc$109383$new_n29008_
+.subckt and2_x1 i0=$abc$109383$new_n29008_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102260
 .subckt nand4_x0 i0=$abc$109383$new_n20572_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n29010_
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20289_ nq=$abc$109383$new_n29011_
 .subckt nand3_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n19765_ i2=$abc$109383$new_n28945_ nq=$abc$109383$new_n29012_
 .subckt nand4_x0 i0=$abc$109383$new_n20383_ i1=$abc$109383$new_n28944_ i2=soc.gpio.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n29013_
 .subckt nand4_x0 i0=$abc$109383$new_n29013_ i1=$abc$109383$new_n29012_ i2=$abc$109383$new_n29011_ i3=$abc$109383$new_n29010_ nq=$abc$109383$new_n29014_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29014_ i1=soc.gpio_$signal$99 q=$abc$109383$new_n29015_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29015_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5] q=$abc$109383$new_n29016_
-.subckt a2_x2 i0=$abc$109383$new_n29016_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102264
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29014_ i1=soc.gpio_$signal$99 q=$abc$109383$new_n29015_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29015_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5] q=$abc$109383$new_n29016_
+.subckt and2_x1 i0=$abc$109383$new_n29016_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102264
 .subckt nand3_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n19770_ i2=$abc$109383$new_n28945_ nq=$abc$109383$new_n29018_
 .subckt nand4_x0 i0=$abc$109383$new_n20387_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n29019_
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20293_ nq=$abc$109383$new_n29020_
 .subckt nand4_x0 i0=$abc$109383$new_n20576_ i1=$abc$109383$new_n28944_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n29021_
 .subckt nand4_x0 i0=$abc$109383$new_n29021_ i1=$abc$109383$new_n29020_ i2=$abc$109383$new_n29019_ i3=$abc$109383$new_n29018_ nq=$abc$109383$new_n29022_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29022_ i1=soc.gpio_$signal$102 q=$abc$109383$new_n29023_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29023_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6] q=$abc$109383$new_n29024_
-.subckt a2_x2 i0=$abc$109383$new_n29024_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102268
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29022_ i1=soc.gpio_$signal$102 q=$abc$109383$new_n29023_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29023_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6] q=$abc$109383$new_n29024_
+.subckt and2_x1 i0=$abc$109383$new_n29024_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102268
 .subckt nand4_x0 i0=$abc$109383$new_n20580_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28933_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n29026_
 .subckt nand4_x0 i0=$abc$109383$new_n20391_ i1=$abc$109383$new_n28978_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28926_ nq=$abc$109383$new_n29027_
 .subckt nand2_x0 i0=$abc$109383$new_n28931_ i1=$abc$109383$new_n20297_ nq=$abc$109383$new_n29028_
 .subckt nand3_x0 i0=$abc$109383$new_n28936_ i1=$abc$109383$new_n19774_ i2=$abc$109383$new_n28978_ nq=$abc$109383$new_n29029_
 .subckt nand4_x0 i0=$abc$109383$new_n29029_ i1=$abc$109383$new_n29028_ i2=$abc$109383$new_n29027_ i3=$abc$109383$new_n29026_ nq=$abc$109383$new_n29030_
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29030_ i1=soc.gpio_$signal$105 q=$abc$109383$new_n29031_
-.subckt mx2_x2 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29031_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7] q=$abc$109383$new_n29032_
-.subckt a2_x2 i0=$abc$109383$new_n29032_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102272
-.subckt a4_x2 i0=$abc$109383$new_n28963_ i1=$abc$109383$new_n28920_ i2=$abc$109383$new_n19665_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n29034_
-.subckt a3_x2 i0=$abc$109383$new_n29034_ i1=$abc$109383$new_n28948_ i2=$abc$109383$new_n27563_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102274
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n29030_ i1=soc.gpio_$signal$105 q=$abc$109383$new_n29031_
+.subckt mux2_x1 cmd=$abc$109383$new_n28974_ i0=$abc$109383$new_n29031_ i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7] q=$abc$109383$new_n29032_
+.subckt and2_x1 i0=$abc$109383$new_n29032_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102272
+.subckt and4_x1 i0=$abc$109383$new_n28963_ i1=$abc$109383$new_n28920_ i2=$abc$109383$new_n19665_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n29034_
+.subckt and3_x1 i0=$abc$109383$new_n29034_ i1=$abc$109383$new_n28948_ i2=$abc$109383$new_n27563_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102274
 .subckt buf_x4 i=$abc$109383$new_n27607_ q=$abc$109383$new_n29036_
-.subckt a3_x2 i0=$abc$109383$new_n28923_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n29036_ q=$abc$109383$new_n29037_
-.subckt a3_x2 i0=$abc$109383$new_n29037_ i1=$abc$109383$new_n28940_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102276
-.subckt mx2_x2 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28952_ i1=soc.gpio.oe_buf[0] q=$abc$109383$new_n29039_
+.subckt and3_x1 i0=$abc$109383$new_n28923_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n29036_ q=$abc$109383$new_n29037_
+.subckt and3_x1 i0=$abc$109383$new_n29037_ i1=$abc$109383$new_n28940_ i2=$abc$109383$new_n27585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102276
+.subckt mux2_x1 cmd=$abc$109383$new_n28968_ i0=$abc$109383$new_n28952_ i1=soc.gpio.oe_buf[0] q=$abc$109383$new_n29039_
 .subckt nand3_x0 i0=$abc$109383$new_n28923_ i1=$abc$109383$new_n20884_ i2=$abc$109383$new_n19644_ nq=$abc$109383$new_n29040_
-.subckt oa22_x2 i0=$abc$109383$new_n28971_ i1=$abc$109383$new_n28972_ i2=$abc$109383$new_n29040_ q=$abc$109383$new_n29041_
+.subckt or21nand_x1 i0=$abc$109383$new_n28971_ i1=$abc$109383$new_n28972_ i2=$abc$109383$new_n29040_ nq=$abc$109383$new_n29041_
 .subckt buf_x4 i=$abc$109383$new_n29041_ q=$abc$109383$new_n29042_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29039_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0] q=$abc$109383$new_n29043_
-.subckt a2_x2 i0=$abc$109383$new_n29043_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102280
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n28982_ i1=soc.gpio.oe_buf[1] q=$abc$109383$new_n29045_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29045_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1] q=$abc$109383$new_n29046_
-.subckt a2_x2 i0=$abc$109383$new_n29046_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102284
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29039_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0] q=$abc$109383$new_n29043_
+.subckt and2_x1 i0=$abc$109383$new_n29043_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102280
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n28982_ i1=soc.gpio.oe_buf[1] q=$abc$109383$new_n29045_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29045_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1] q=$abc$109383$new_n29046_
+.subckt and2_x1 i0=$abc$109383$new_n29046_ i1=$abc$109383$new_n28942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102284
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n29048_
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n28990_ i1=soc.gpio.oe_buf[2] q=$abc$109383$new_n29049_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29049_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2] q=$abc$109383$new_n29050_
-.subckt a2_x2 i0=$abc$109383$new_n29050_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102288
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n28998_ i1=soc.gpio.oe_buf[3] q=$abc$109383$new_n29052_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29052_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3] q=$abc$109383$new_n29053_
-.subckt a2_x2 i0=$abc$109383$new_n29053_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102292
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29006_ i1=soc.gpio.oe_buf[4] q=$abc$109383$new_n29055_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29055_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4] q=$abc$109383$new_n29056_
-.subckt a2_x2 i0=$abc$109383$new_n29056_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102296
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29014_ i1=soc.gpio.oe_buf[5] q=$abc$109383$new_n29058_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29058_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5] q=$abc$109383$new_n29059_
-.subckt a2_x2 i0=$abc$109383$new_n29059_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102300
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29022_ i1=soc.gpio.oe_buf[6] q=$abc$109383$new_n29061_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29061_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6] q=$abc$109383$new_n29062_
-.subckt a2_x2 i0=$abc$109383$new_n29062_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102304
-.subckt mx2_x2 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29030_ i1=soc.gpio.oe_buf[7] q=$abc$109383$new_n29064_
-.subckt mx2_x2 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29064_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7] q=$abc$109383$new_n29065_
-.subckt a2_x2 i0=$abc$109383$new_n29065_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102308
-.subckt a3_x2 i0=$abc$109383$new_n29034_ i1=$abc$109383$new_n28948_ i2=$abc$109383$new_n27604_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102310
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n28990_ i1=soc.gpio.oe_buf[2] q=$abc$109383$new_n29049_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29049_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2] q=$abc$109383$new_n29050_
+.subckt and2_x1 i0=$abc$109383$new_n29050_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102288
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n28998_ i1=soc.gpio.oe_buf[3] q=$abc$109383$new_n29052_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29052_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3] q=$abc$109383$new_n29053_
+.subckt and2_x1 i0=$abc$109383$new_n29053_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102292
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29006_ i1=soc.gpio.oe_buf[4] q=$abc$109383$new_n29055_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29055_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4] q=$abc$109383$new_n29056_
+.subckt and2_x1 i0=$abc$109383$new_n29056_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102296
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29014_ i1=soc.gpio.oe_buf[5] q=$abc$109383$new_n29058_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29058_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5] q=$abc$109383$new_n29059_
+.subckt and2_x1 i0=$abc$109383$new_n29059_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102300
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29022_ i1=soc.gpio.oe_buf[6] q=$abc$109383$new_n29061_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29061_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6] q=$abc$109383$new_n29062_
+.subckt and2_x1 i0=$abc$109383$new_n29062_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102304
+.subckt mux2_x1 cmd=$abc$109383$new_n28967_ i0=$abc$109383$new_n29030_ i1=soc.gpio.oe_buf[7] q=$abc$109383$new_n29064_
+.subckt mux2_x1 cmd=$abc$109383$new_n29042_ i0=$abc$109383$new_n29064_ i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7] q=$abc$109383$new_n29065_
+.subckt and2_x1 i0=$abc$109383$new_n29065_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102308
+.subckt and3_x1 i0=$abc$109383$new_n29034_ i1=$abc$109383$new_n28948_ i2=$abc$109383$new_n27604_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102310
 .subckt nand2_x0 i0=$abc$109383$new_n29037_ i1=$abc$109383$new_n28940_ nq=$abc$109383$new_n29068_
 .subckt buf_x4 i=$abc$109383$new_n29068_ q=$abc$109383$new_n29069_
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[0] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[0] q=$abc$109383$new_n29070_
-.subckt a2_x2 i0=$abc$109383$new_n29070_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102314
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[1] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[1] q=$abc$109383$new_n29072_
-.subckt a2_x2 i0=$abc$109383$new_n29072_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102318
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[2] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[2] q=$abc$109383$new_n29074_
-.subckt a2_x2 i0=$abc$109383$new_n29074_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102322
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[3] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[3] q=$abc$109383$new_n29076_
-.subckt a2_x2 i0=$abc$109383$new_n29076_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102326
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[0] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[0] q=$abc$109383$new_n29070_
+.subckt and2_x1 i0=$abc$109383$new_n29070_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102314
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[1] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[1] q=$abc$109383$new_n29072_
+.subckt and2_x1 i0=$abc$109383$new_n29072_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102318
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[2] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[2] q=$abc$109383$new_n29074_
+.subckt and2_x1 i0=$abc$109383$new_n29074_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102322
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[3] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[3] q=$abc$109383$new_n29076_
+.subckt and2_x1 i0=$abc$109383$new_n29076_ i1=$abc$109383$new_n29048_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102326
 .subckt buf_x4 i=$abc$109383$new_n28274_ q=$abc$109383$new_n29078_
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[4] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[4] q=$abc$109383$new_n29079_
-.subckt a2_x2 i0=$abc$109383$new_n29079_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102330
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[5] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[5] q=$abc$109383$new_n29081_
-.subckt a2_x2 i0=$abc$109383$new_n29081_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102334
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[6] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[6] q=$abc$109383$new_n29083_
-.subckt a2_x2 i0=$abc$109383$new_n29083_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102338
-.subckt mx2_x2 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[7] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[7] q=$abc$109383$new_n29085_
-.subckt a2_x2 i0=$abc$109383$new_n29085_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102342
-.subckt a4_x2 i0=$abc$109383$new_n28920_ i1=$abc$109383$new_n28379_ i2=$abc$109383$new_n19648_ i3=$abc$109383$new_n28945_ q=$abc$109383$new_n29087_
-.subckt ao22_x2 i0=$abc$109383$new_n28950_ i1=$abc$109383$new_n29087_ i2=$abc$109383$new_n28914_ q=$abc$109383$new_n29088_
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[4] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[4] q=$abc$109383$new_n29079_
+.subckt and2_x1 i0=$abc$109383$new_n29079_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102330
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[5] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[5] q=$abc$109383$new_n29081_
+.subckt and2_x1 i0=$abc$109383$new_n29081_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102334
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[6] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[6] q=$abc$109383$new_n29083_
+.subckt and2_x1 i0=$abc$109383$new_n29083_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102338
+.subckt mux2_x1 cmd=$abc$109383$new_n29069_ i0=soc.gpio.bridge_gpio_din__r_data[7] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[7] q=$abc$109383$new_n29085_
+.subckt and2_x1 i0=$abc$109383$new_n29085_ i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102342
+.subckt and4_x1 i0=$abc$109383$new_n28920_ i1=$abc$109383$new_n28379_ i2=$abc$109383$new_n19648_ i3=$abc$109383$new_n28945_ q=$abc$109383$new_n29087_
+.subckt and21nor_x1 i0=$abc$109383$new_n28950_ i1=$abc$109383$new_n29087_ i2=$abc$109383$new_n28914_ nq=$abc$109383$new_n29088_
 .subckt buf_x4 i=$abc$109383$new_n28958_ q=$abc$109383$new_n29089_
 .subckt buf_x4 i=$abc$109383$new_n28966_ q=$abc$109383$new_n29090_
-.subckt a4_x2 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n29089_ i3=$abc$109383$new_n28945_ q=$abc$109383$new_n29091_
+.subckt and4_x1 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n29089_ i3=$abc$109383$new_n28945_ q=$abc$109383$new_n29091_
 .subckt nand2_x0 i0=$abc$109383$new_n29091_ i1=$abc$109383$new_n28950_ nq=$abc$109383$new_n29092_
-.subckt a2_x2 i0=$abc$109383$new_n29092_ i1=$abc$109383$new_n29088_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102362
+.subckt and2_x1 i0=$abc$109383$new_n29092_ i1=$abc$109383$new_n29088_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102362
 .subckt buf_x4 i=$abc$109383$new_n28937_ q=$abc$109383$new_n29094_
-.subckt a4_x2 i0=$abc$109383$new_n28918_ i1=$abc$109383$new_n14872_ i2=$abc$109383$new_n19673_ i3=$abc$109383$new_n19670_ q=$abc$109383$new_n29095_
-.subckt a4_x2 i0=$abc$109383$new_n29095_ i1=$abc$109383$new_n27459_ i2=$abc$109383$new_n27492_ i3=$abc$109383$new_n19663_ q=$abc$109383$new_n29096_
+.subckt and4_x1 i0=$abc$109383$new_n28918_ i1=$abc$109383$new_n14872_ i2=$abc$109383$new_n19673_ i3=$abc$109383$new_n19670_ q=$abc$109383$new_n29095_
+.subckt and4_x1 i0=$abc$109383$new_n29095_ i1=$abc$109383$new_n27459_ i2=$abc$109383$new_n27492_ i3=$abc$109383$new_n19663_ q=$abc$109383$new_n29096_
 .subckt buf_x4 i=$abc$109383$new_n29096_ q=$abc$109383$new_n29097_
 .subckt nand2_x0 i0=$abc$109383$new_n29097_ i1=$abc$109383$new_n29094_ nq=$abc$109383$new_n29098_
-.subckt a2_x2 i0=$abc$109383$new_n28944_ i1=soc.gpio.bridge.csr_bridge_0.cycle[0] q=$abc$109383$new_n29099_
-.subckt a2_x2 i0=$abc$109383$new_n29096_ i1=$abc$109383$new_n29099_ q=$abc$109383$new_n29100_
-.subckt ao22_x2 i0=$abc$109383$new_n28943_ i1=$abc$109383$new_n29100_ i2=$abc$109383$new_n29098_ q=$abc$109383$new_n29101_
-.subckt a2_x2 i0=$abc$109383$new_n29101_ i1=$abc$109383$new_n28914_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102366
-.subckt a2_x2 i0=$abc$109383$new_n29097_ i1=$abc$109383$new_n29094_ q=$abc$109383$new_n29103_
-.subckt ao22_x2 i0=soc.gpio.bridge.csr_bridge_0.cycle[2] i1=$abc$109383$new_n29103_ i2=$abc$109383$new_n28914_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102370
+.subckt and2_x1 i0=$abc$109383$new_n28944_ i1=soc.gpio.bridge.csr_bridge_0.cycle[0] q=$abc$109383$new_n29099_
+.subckt and2_x1 i0=$abc$109383$new_n29096_ i1=$abc$109383$new_n29099_ q=$abc$109383$new_n29100_
+.subckt and21nor_x1 i0=$abc$109383$new_n28943_ i1=$abc$109383$new_n29100_ i2=$abc$109383$new_n29098_ nq=$abc$109383$new_n29101_
+.subckt and2_x1 i0=$abc$109383$new_n29101_ i1=$abc$109383$new_n28914_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102366
+.subckt and2_x1 i0=$abc$109383$new_n29097_ i1=$abc$109383$new_n29094_ q=$abc$109383$new_n29103_
+.subckt and21nor_x1 i0=soc.gpio.bridge.csr_bridge_0.cycle[2] i1=$abc$109383$new_n29103_ i2=$abc$109383$new_n28914_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102370
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[16] nq=$abc$109383$new_n29105_
 .subckt nand2_x0 i0=$abc$109383$new_n28948_ i1=$abc$109383$new_n28945_ nq=$abc$109383$new_n29106_
 .subckt buf_x4 i=$abc$109383$new_n27638_ q=$abc$109383$new_n29107_
 .subckt nand4_x0 i0=$abc$109383$new_n29095_ i1=$abc$109383$new_n27665_ i2=$abc$109383$new_n29107_ i3=$abc$109383$new_n19664_ nq=$abc$109383$new_n29108_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29105_ q=$abc$109383$new_n29109_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29105_ nq=$abc$109383$new_n29109_
 .subckt nor2_x0 i0=$abc$109383$new_n29109_ i1=$abc$109383$new_n28532_ nq=$abc$109383$new_n29110_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29111_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[0] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29112_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29113_
-.subckt a3_x2 i0=$abc$109383$new_n29113_ i1=$abc$109383$new_n29112_ i2=$abc$109383$new_n29111_ q=$abc$109383$new_n29114_
+.subckt and3_x1 i0=$abc$109383$new_n29113_ i1=$abc$109383$new_n29112_ i2=$abc$109383$new_n29111_ q=$abc$109383$new_n29114_
 .subckt nand3_x0 i0=$abc$109383$new_n29114_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29115_
-.subckt a2_x2 i0=$abc$109383$new_n29115_ i1=$abc$109383$new_n29110_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102374
+.subckt and2_x1 i0=$abc$109383$new_n29115_ i1=$abc$109383$new_n29110_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102374
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n29117_
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n29118_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29118_ q=$abc$109383$new_n29119_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29118_ nq=$abc$109383$new_n29119_
 .subckt nor2_x0 i0=$abc$109383$new_n29119_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29120_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29121_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[1] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29122_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29123_
-.subckt a3_x2 i0=$abc$109383$new_n29123_ i1=$abc$109383$new_n29122_ i2=$abc$109383$new_n29121_ q=$abc$109383$new_n29124_
+.subckt and3_x1 i0=$abc$109383$new_n29123_ i1=$abc$109383$new_n29122_ i2=$abc$109383$new_n29121_ q=$abc$109383$new_n29124_
 .subckt nand3_x0 i0=$abc$109383$new_n29124_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29125_
-.subckt a2_x2 i0=$abc$109383$new_n29125_ i1=$abc$109383$new_n29120_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102378
+.subckt and2_x1 i0=$abc$109383$new_n29125_ i1=$abc$109383$new_n29120_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102378
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[18] nq=$abc$109383$new_n29127_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29127_ q=$abc$109383$new_n29128_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29127_ nq=$abc$109383$new_n29128_
 .subckt nor2_x0 i0=$abc$109383$new_n29128_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29129_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29130_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[2] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29131_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29132_
-.subckt a3_x2 i0=$abc$109383$new_n29132_ i1=$abc$109383$new_n29131_ i2=$abc$109383$new_n29130_ q=$abc$109383$new_n29133_
+.subckt and3_x1 i0=$abc$109383$new_n29132_ i1=$abc$109383$new_n29131_ i2=$abc$109383$new_n29130_ q=$abc$109383$new_n29133_
 .subckt nand3_x0 i0=$abc$109383$new_n29133_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29134_
-.subckt a2_x2 i0=$abc$109383$new_n29134_ i1=$abc$109383$new_n29129_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102382
+.subckt and2_x1 i0=$abc$109383$new_n29134_ i1=$abc$109383$new_n29129_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102382
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n29136_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29136_ q=$abc$109383$new_n29137_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29136_ nq=$abc$109383$new_n29137_
 .subckt nor2_x0 i0=$abc$109383$new_n29137_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29138_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29139_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[3] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29140_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29141_
-.subckt a3_x2 i0=$abc$109383$new_n29141_ i1=$abc$109383$new_n29140_ i2=$abc$109383$new_n29139_ q=$abc$109383$new_n29142_
+.subckt and3_x1 i0=$abc$109383$new_n29141_ i1=$abc$109383$new_n29140_ i2=$abc$109383$new_n29139_ q=$abc$109383$new_n29142_
 .subckt nand3_x0 i0=$abc$109383$new_n29142_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29143_
-.subckt a2_x2 i0=$abc$109383$new_n29143_ i1=$abc$109383$new_n29138_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102386
+.subckt and2_x1 i0=$abc$109383$new_n29143_ i1=$abc$109383$new_n29138_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102386
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[20] nq=$abc$109383$new_n29145_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29145_ q=$abc$109383$new_n29146_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29145_ nq=$abc$109383$new_n29146_
 .subckt nor2_x0 i0=$abc$109383$new_n29146_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29147_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29148_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[4] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29149_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29150_
-.subckt a3_x2 i0=$abc$109383$new_n29150_ i1=$abc$109383$new_n29149_ i2=$abc$109383$new_n29148_ q=$abc$109383$new_n29151_
+.subckt and3_x1 i0=$abc$109383$new_n29150_ i1=$abc$109383$new_n29149_ i2=$abc$109383$new_n29148_ q=$abc$109383$new_n29151_
 .subckt nand3_x0 i0=$abc$109383$new_n29151_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29152_
-.subckt a2_x2 i0=$abc$109383$new_n29152_ i1=$abc$109383$new_n29147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102390
+.subckt and2_x1 i0=$abc$109383$new_n29152_ i1=$abc$109383$new_n29147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102390
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[21] nq=$abc$109383$new_n29154_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29154_ q=$abc$109383$new_n29155_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29154_ nq=$abc$109383$new_n29155_
 .subckt nor2_x0 i0=$abc$109383$new_n29155_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29156_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29157_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[5] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29158_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29159_
-.subckt a3_x2 i0=$abc$109383$new_n29159_ i1=$abc$109383$new_n29158_ i2=$abc$109383$new_n29157_ q=$abc$109383$new_n29160_
+.subckt and3_x1 i0=$abc$109383$new_n29159_ i1=$abc$109383$new_n29158_ i2=$abc$109383$new_n29157_ q=$abc$109383$new_n29160_
 .subckt nand3_x0 i0=$abc$109383$new_n29160_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29161_
-.subckt a2_x2 i0=$abc$109383$new_n29161_ i1=$abc$109383$new_n29156_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102394
+.subckt and2_x1 i0=$abc$109383$new_n29161_ i1=$abc$109383$new_n29156_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102394
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n29163_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29163_ q=$abc$109383$new_n29164_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29163_ nq=$abc$109383$new_n29164_
 .subckt nor2_x0 i0=$abc$109383$new_n29164_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29165_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29166_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[6] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29167_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29168_
-.subckt a3_x2 i0=$abc$109383$new_n29168_ i1=$abc$109383$new_n29167_ i2=$abc$109383$new_n29166_ q=$abc$109383$new_n29169_
+.subckt and3_x1 i0=$abc$109383$new_n29168_ i1=$abc$109383$new_n29167_ i2=$abc$109383$new_n29166_ q=$abc$109383$new_n29169_
 .subckt nand3_x0 i0=$abc$109383$new_n29169_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29170_
-.subckt a2_x2 i0=$abc$109383$new_n29170_ i1=$abc$109383$new_n29165_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102398
+.subckt and2_x1 i0=$abc$109383$new_n29170_ i1=$abc$109383$new_n29165_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102398
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[23] nq=$abc$109383$new_n29172_
-.subckt ao22_x2 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29172_ q=$abc$109383$new_n29173_
+.subckt and21nor_x1 i0=$abc$109383$new_n29108_ i1=$abc$109383$new_n29106_ i2=$abc$109383$new_n29172_ nq=$abc$109383$new_n29173_
 .subckt nor2_x0 i0=$abc$109383$new_n29173_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29174_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7] i1=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0] nq=$abc$109383$new_n29175_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[7] i1=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0] nq=$abc$109383$new_n29176_
 .subckt nand2_x0 i0=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7] i1=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0] nq=$abc$109383$new_n29177_
-.subckt a3_x2 i0=$abc$109383$new_n29177_ i1=$abc$109383$new_n29176_ i2=$abc$109383$new_n29175_ q=$abc$109383$new_n29178_
+.subckt and3_x1 i0=$abc$109383$new_n29177_ i1=$abc$109383$new_n29176_ i2=$abc$109383$new_n29175_ q=$abc$109383$new_n29178_
 .subckt nand3_x0 i0=$abc$109383$new_n29178_ i1=$abc$109383$new_n29097_ i2=$abc$109383$new_n29094_ nq=$abc$109383$new_n29179_
-.subckt a2_x2 i0=$abc$109383$new_n29179_ i1=$abc$109383$new_n29174_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102402
-.subckt a2_x2 i0=io_in[19] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102404
-.subckt a2_x2 i0=io_in[20] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102406
-.subckt a2_x2 i0=io_in[21] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102408
-.subckt a2_x2 i0=io_in[22] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102410
-.subckt a2_x2 i0=io_in[23] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102412
-.subckt a2_x2 i0=io_in[24] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102414
+.subckt and2_x1 i0=$abc$109383$new_n29179_ i1=$abc$109383$new_n29174_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102402
+.subckt and2_x1 i0=io_in[19] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102404
+.subckt and2_x1 i0=io_in[20] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102406
+.subckt and2_x1 i0=io_in[21] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102408
+.subckt and2_x1 i0=io_in[22] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102410
+.subckt and2_x1 i0=io_in[23] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102412
+.subckt and2_x1 i0=io_in[24] i1=$abc$109383$new_n29078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102414
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n29187_
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n29188_
-.subckt a2_x2 i0=io_in[25] i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102416
-.subckt a2_x2 i0=io_in[26] i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102418
+.subckt and2_x1 i0=io_in[25] i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102416
+.subckt and2_x1 i0=io_in[26] i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102418
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n29191_
 .subckt buf_x4 i=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n29192_
 .subckt buf_x4 i=$abc$109383$new_n29192_ q=$abc$109383$new_n29193_
@@ -14469,14 +14469,14 @@
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n29195_
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n29196_
 .subckt buf_x4 i=$abc$109383$new_n15258_ q=$abc$109383$new_n29197_
-.subckt a3_x2 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n29196_ i2=$abc$109383$new_n29193_ q=$abc$109383$new_n29198_
+.subckt and3_x1 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n29196_ i2=$abc$109383$new_n29193_ q=$abc$109383$new_n29198_
 .subckt buf_x4 i=$abc$109383$new_n15236_ q=$abc$109383$new_n29199_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n29200_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n29201_
 .subckt buf_x4 i=soc.cpu.minerva.loadstore.dbus__cyc q=$abc$109383$new_n29202_
 .subckt buf_x4 i=$abc$109383$new_n29202_ q=$abc$109383$new_n29203_
-.subckt ao22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n29201_ i2=$abc$109383$new_n28911_ q=$abc$109383$new_n29204_
-.subckt ao22_x2 i0=$abc$109383$new_n29204_ i1=$abc$109383$new_n29198_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102422
+.subckt and21nor_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n29201_ i2=$abc$109383$new_n28911_ nq=$abc$109383$new_n29204_
+.subckt and21nor_x1 i0=$abc$109383$new_n29204_ i1=$abc$109383$new_n29198_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102422
 .subckt inv_x1 i=soc.cpu.minerva.payload__direction$57 nq=$abc$109383$new_n29206_
 .subckt buf_x4 i=$abc$109383$new_n29206_ q=$abc$109383$new_n29207_
 .subckt buf_x4 i=$abc$109383$new_n15235_ q=$abc$109383$new_n29208_
@@ -14489,8 +14489,8 @@
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n29215_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n29216_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n29217_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n29214_ q=$abc$109383$new_n29218_
-.subckt ao22_x2 i0=$abc$109383$new_n29218_ i1=$abc$109383$new_n29213_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102426
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n29214_ nq=$abc$109383$new_n29218_
+.subckt and21nor_x1 i0=$abc$109383$new_n29218_ i1=$abc$109383$new_n29213_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102426
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n29220_
 .subckt buf_x4 i=$abc$109383$new_n29220_ q=$abc$109383$new_n29221_
 .subckt buf_x4 i=$abc$109383$new_n17846_ q=$abc$109383$new_n29222_
@@ -14558,7 +14558,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29283_ q=$abc$109383$new_n29284_
 .subckt buf_x4 i=$abc$109383$new_n29284_ q=$abc$109383$new_n29285_
 .subckt buf_x4 i=soc.cpu.minerva.payload__direction$57 q=$abc$109383$new_n29286_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29285_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n29287_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29285_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n29287_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n29288_
 .subckt buf_x4 i=$abc$109383$new_n29288_ q=$abc$109383$new_n29289_
 .subckt buf_x4 i=$abc$109383$new_n29289_ q=$abc$109383$new_n29290_
@@ -14581,7 +14581,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29306_ q=$abc$109383$new_n29307_
 .subckt buf_x4 i=$abc$109383$new_n29307_ q=$abc$109383$new_n29308_
 .subckt buf_x4 i=$abc$109383$new_n29308_ q=$abc$109383$new_n29309_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29309_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n29310_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29309_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n29310_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[0] q=$abc$109383$new_n29311_
 .subckt buf_x4 i=$abc$109383$new_n29311_ q=$abc$109383$new_n29312_
 .subckt buf_x4 i=$abc$109383$new_n29312_ q=$abc$109383$new_n29313_
@@ -14591,7 +14591,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29316_ q=$abc$109383$new_n29317_
 .subckt inv_x1 i=$abc$109383$new_n29317_ nq=$abc$109383$new_n29318_
 .subckt buf_x4 i=$abc$109383$new_n29318_ q=$abc$109383$new_n29319_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29310_ i1=$abc$109383$new_n29287_ q=$abc$109383$new_n29320_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29310_ i1=$abc$109383$new_n29287_ q=$abc$109383$new_n29320_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[6] q=$abc$109383$new_n29321_
 .subckt buf_x4 i=$abc$109383$new_n29321_ q=$abc$109383$new_n29322_
 .subckt buf_x4 i=$abc$109383$new_n29322_ q=$abc$109383$new_n29323_
@@ -14614,7 +14614,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29339_ q=$abc$109383$new_n29340_
 .subckt buf_x4 i=$abc$109383$new_n29340_ q=$abc$109383$new_n29341_
 .subckt buf_x4 i=$abc$109383$new_n29341_ q=$abc$109383$new_n29342_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29342_ i1=$abc$109383$new_n29332_ q=$abc$109383$new_n29343_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29342_ i1=$abc$109383$new_n29332_ q=$abc$109383$new_n29343_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n29344_
 .subckt buf_x4 i=$abc$109383$new_n29344_ q=$abc$109383$new_n29345_
 .subckt buf_x4 i=$abc$109383$new_n29345_ q=$abc$109383$new_n29346_
@@ -14637,9 +14637,9 @@
 .subckt buf_x4 i=$abc$109383$new_n29362_ q=$abc$109383$new_n29363_
 .subckt buf_x4 i=$abc$109383$new_n29363_ q=$abc$109383$new_n29364_
 .subckt buf_x4 i=$abc$109383$new_n29364_ q=$abc$109383$new_n29365_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29365_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n29366_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29365_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n29366_
 .subckt buf_x4 i=$abc$109383$new_n29318_ q=$abc$109383$new_n29367_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29366_ i1=$abc$109383$new_n29343_ q=$abc$109383$new_n29368_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29366_ i1=$abc$109383$new_n29343_ q=$abc$109383$new_n29368_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[1] q=$abc$109383$new_n29369_
 .subckt buf_x4 i=$abc$109383$new_n29369_ q=$abc$109383$new_n29370_
 .subckt buf_x4 i=$abc$109383$new_n29370_ q=$abc$109383$new_n29371_
@@ -14654,8 +14654,8 @@
 .subckt buf_x4 i=$abc$109383$new_n29379_ q=$abc$109383$new_n29380_
 .subckt inv_x2 i=$abc$109383$new_n29380_ nq=$abc$109383$new_n29381_
 .subckt buf_x4 i=$abc$109383$new_n29381_ q=$abc$109383$new_n29382_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29368_ i1=$abc$109383$new_n29320_ q=$abc$109383$new_n29383_
-.subckt o2_x2 i0=$abc$109383$new_n29383_ i1=$abc$109383$new_n29264_ q=$abc$109383$new_n29384_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29368_ i1=$abc$109383$new_n29320_ q=$abc$109383$new_n29383_
+.subckt or2_x1 i0=$abc$109383$new_n29383_ i1=$abc$109383$new_n29264_ q=$abc$109383$new_n29384_
 .subckt buf_x4 i=$abc$109383$new_n29380_ q=$abc$109383$new_n29385_
 .subckt buf_x4 i=$abc$109383$new_n29385_ q=$abc$109383$new_n29386_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[2] q=$abc$109383$new_n29387_
@@ -14680,7 +14680,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29405_ q=$abc$109383$new_n29406_
 .subckt buf_x4 i=$abc$109383$new_n29286_ q=$abc$109383$new_n29407_
 .subckt buf_x4 i=$abc$109383$new_n29407_ q=$abc$109383$new_n29408_
-.subckt mx2_x2 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29406_ i1=$abc$109383$new_n29396_ q=$abc$109383$new_n29409_
+.subckt mux2_x1 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29406_ i1=$abc$109383$new_n29396_ q=$abc$109383$new_n29409_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[3] q=$abc$109383$new_n29410_
 .subckt buf_x4 i=$abc$109383$new_n29410_ q=$abc$109383$new_n29411_
 .subckt buf_x4 i=$abc$109383$new_n29411_ q=$abc$109383$new_n29412_
@@ -14705,9 +14705,9 @@
 .subckt buf_x4 i=$abc$109383$new_n29430_ q=$abc$109383$new_n29431_
 .subckt buf_x4 i=$abc$109383$new_n29431_ q=$abc$109383$new_n29432_
 .subckt buf_x4 i=$abc$109383$new_n29432_ q=$abc$109383$new_n29433_
-.subckt mx2_x2 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29433_ i1=$abc$109383$new_n29421_ q=$abc$109383$new_n29434_
+.subckt mux2_x1 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29433_ i1=$abc$109383$new_n29421_ q=$abc$109383$new_n29434_
 .subckt buf_x4 i=$abc$109383$new_n29367_ q=$abc$109383$new_n29435_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29434_ i1=$abc$109383$new_n29409_ q=$abc$109383$new_n29436_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29434_ i1=$abc$109383$new_n29409_ q=$abc$109383$new_n29436_
 .subckt nand2_x0 i0=$abc$109383$new_n29436_ i1=$abc$109383$new_n29386_ nq=$abc$109383$new_n29437_
 .subckt buf_x4 i=$abc$109383$new_n29382_ q=$abc$109383$new_n29438_
 .subckt buf_x4 i=$abc$109383$new_n29317_ q=$abc$109383$new_n29439_
@@ -14735,7 +14735,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29460_ q=$abc$109383$new_n29461_
 .subckt buf_x4 i=$abc$109383$new_n29461_ q=$abc$109383$new_n29462_
 .subckt buf_x4 i=$abc$109383$new_n29462_ q=$abc$109383$new_n29463_
-.subckt mx2_x2 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29463_ i1=$abc$109383$new_n29452_ q=$abc$109383$new_n29464_
+.subckt mux2_x1 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29463_ i1=$abc$109383$new_n29452_ q=$abc$109383$new_n29464_
 .subckt nand3_x0 i0=$abc$109383$new_n29464_ i1=$abc$109383$new_n29440_ i2=$abc$109383$new_n29438_ nq=$abc$109383$new_n29465_
 .subckt nor2_x0 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n29386_ nq=$abc$109383$new_n29466_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[0] q=$abc$109383$new_n29467_
@@ -14764,9 +14764,9 @@
 .subckt buf_x4 i=$abc$109383$new_n29489_ q=$abc$109383$new_n29490_
 .subckt buf_x4 i=$abc$109383$new_n29490_ q=$abc$109383$new_n29491_
 .subckt buf_x4 i=$abc$109383$new_n29491_ q=$abc$109383$new_n29492_
-.subckt mx2_x2 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29492_ i1=$abc$109383$new_n29475_ q=$abc$109383$new_n29493_
+.subckt mux2_x1 cmd=$abc$109383$new_n29408_ i0=$abc$109383$new_n29492_ i1=$abc$109383$new_n29475_ q=$abc$109383$new_n29493_
 .subckt nand2_x0 i0=$abc$109383$new_n29493_ i1=$abc$109383$new_n29466_ nq=$abc$109383$new_n29494_
-.subckt a2_x2 i0=$abc$109383$new_n29494_ i1=$abc$109383$new_n29465_ q=$abc$109383$new_n29495_
+.subckt and2_x1 i0=$abc$109383$new_n29494_ i1=$abc$109383$new_n29465_ q=$abc$109383$new_n29495_
 .subckt nand3_x0 i0=$abc$109383$new_n29495_ i1=$abc$109383$new_n29437_ i2=$abc$109383$new_n29264_ nq=$abc$109383$new_n29496_
 .subckt nand3_x0 i0=$abc$109383$new_n29496_ i1=$abc$109383$new_n29384_ i2=$abc$109383$new_n29250_ nq=$abc$109383$new_n29497_
 .subckt buf_x4 i=$abc$109383$new_n29247_ q=$abc$109383$new_n29498_
@@ -14793,7 +14793,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29518_ q=$abc$109383$new_n29519_
 .subckt buf_x4 i=$abc$109383$new_n29519_ q=$abc$109383$new_n29520_
 .subckt buf_x4 i=$abc$109383$new_n29520_ q=$abc$109383$new_n29521_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29521_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n29522_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29521_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n29522_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n29523_
 .subckt buf_x4 i=$abc$109383$new_n29523_ q=$abc$109383$new_n29524_
 .subckt buf_x4 i=$abc$109383$new_n29524_ q=$abc$109383$new_n29525_
@@ -14816,8 +14816,8 @@
 .subckt buf_x4 i=$abc$109383$new_n29541_ q=$abc$109383$new_n29542_
 .subckt buf_x4 i=$abc$109383$new_n29542_ q=$abc$109383$new_n29543_
 .subckt buf_x4 i=$abc$109383$new_n29543_ q=$abc$109383$new_n29544_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29544_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n29545_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29545_ i1=$abc$109383$new_n29522_ q=$abc$109383$new_n29546_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29544_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n29545_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29545_ i1=$abc$109383$new_n29522_ q=$abc$109383$new_n29546_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[10] q=$abc$109383$new_n29547_
 .subckt buf_x4 i=$abc$109383$new_n29547_ q=$abc$109383$new_n29548_
 .subckt buf_x4 i=$abc$109383$new_n29548_ q=$abc$109383$new_n29549_
@@ -14842,7 +14842,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29567_ q=$abc$109383$new_n29568_
 .subckt buf_x4 i=$abc$109383$new_n29568_ q=$abc$109383$new_n29569_
 .subckt buf_x4 i=$abc$109383$new_n29569_ q=$abc$109383$new_n29570_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29570_ i1=$abc$109383$new_n29558_ q=$abc$109383$new_n29571_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29570_ i1=$abc$109383$new_n29558_ q=$abc$109383$new_n29571_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n29572_
 .subckt buf_x4 i=$abc$109383$new_n29572_ q=$abc$109383$new_n29573_
 .subckt buf_x4 i=$abc$109383$new_n29573_ q=$abc$109383$new_n29574_
@@ -14866,9 +14866,9 @@
 .subckt buf_x4 i=$abc$109383$new_n29591_ q=$abc$109383$new_n29592_
 .subckt buf_x4 i=$abc$109383$new_n29592_ q=$abc$109383$new_n29593_
 .subckt buf_x4 i=$abc$109383$new_n29593_ q=$abc$109383$new_n29594_
-.subckt mx2_x2 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29594_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n29595_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29595_ i1=$abc$109383$new_n29571_ q=$abc$109383$new_n29596_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29596_ i1=$abc$109383$new_n29546_ q=$abc$109383$new_n29597_
+.subckt mux2_x1 cmd=$abc$109383$new_n29286_ i0=$abc$109383$new_n29594_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n29595_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29595_ i1=$abc$109383$new_n29571_ q=$abc$109383$new_n29596_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29596_ i1=$abc$109383$new_n29546_ q=$abc$109383$new_n29597_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n29598_
 .subckt buf_x4 i=$abc$109383$new_n29598_ q=$abc$109383$new_n29599_
 .subckt buf_x4 i=$abc$109383$new_n29599_ q=$abc$109383$new_n29600_
@@ -14893,7 +14893,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29618_ q=$abc$109383$new_n29619_
 .subckt buf_x4 i=$abc$109383$new_n29619_ q=$abc$109383$new_n29620_
 .subckt buf_x4 i=soc.cpu.minerva.payload__direction$57 q=$abc$109383$new_n29621_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29620_ i1=$abc$109383$new_n29608_ q=$abc$109383$new_n29622_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29620_ i1=$abc$109383$new_n29608_ q=$abc$109383$new_n29622_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n29623_
 .subckt buf_x4 i=$abc$109383$new_n29623_ q=$abc$109383$new_n29624_
 .subckt buf_x4 i=$abc$109383$new_n29624_ q=$abc$109383$new_n29625_
@@ -14915,8 +14915,8 @@
 .subckt buf_x4 i=$abc$109383$new_n29640_ q=$abc$109383$new_n29641_
 .subckt buf_x4 i=$abc$109383$new_n29641_ q=$abc$109383$new_n29642_
 .subckt buf_x4 i=$abc$109383$new_n29642_ q=$abc$109383$new_n29643_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29643_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n29644_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29644_ i1=$abc$109383$new_n29622_ q=$abc$109383$new_n29645_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29643_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n29644_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29644_ i1=$abc$109383$new_n29622_ q=$abc$109383$new_n29645_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n29646_
 .subckt buf_x4 i=$abc$109383$new_n29646_ q=$abc$109383$new_n29647_
 .subckt buf_x4 i=$abc$109383$new_n29647_ q=$abc$109383$new_n29648_
@@ -14936,7 +14936,7 @@
 .subckt buf_x4 i=$abc$109383$new_n29661_ q=$abc$109383$new_n29662_
 .subckt buf_x4 i=$abc$109383$new_n29662_ q=$abc$109383$new_n29663_
 .subckt buf_x4 i=$abc$109383$new_n29663_ q=$abc$109383$new_n29664_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29664_ i1=$abc$109383$new_n29655_ q=$abc$109383$new_n29665_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29664_ i1=$abc$109383$new_n29655_ q=$abc$109383$new_n29665_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n29666_
 .subckt buf_x4 i=$abc$109383$new_n29666_ q=$abc$109383$new_n29667_
 .subckt buf_x4 i=$abc$109383$new_n29667_ q=$abc$109383$new_n29668_
@@ -14960,450 +14960,450 @@
 .subckt buf_x4 i=$abc$109383$new_n29685_ q=$abc$109383$new_n29686_
 .subckt buf_x4 i=$abc$109383$new_n29686_ q=$abc$109383$new_n29687_
 .subckt buf_x4 i=$abc$109383$new_n29687_ q=$abc$109383$new_n29688_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29688_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n29689_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29689_ i1=$abc$109383$new_n29665_ q=$abc$109383$new_n29690_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29690_ i1=$abc$109383$new_n29645_ q=$abc$109383$new_n29691_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29688_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n29689_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29689_ i1=$abc$109383$new_n29665_ q=$abc$109383$new_n29690_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29690_ i1=$abc$109383$new_n29645_ q=$abc$109383$new_n29691_
 .subckt buf_x4 i=$abc$109383$new_n29263_ q=$abc$109383$new_n29692_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29691_ i1=$abc$109383$new_n29597_ q=$abc$109383$new_n29693_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29691_ i1=$abc$109383$new_n29597_ q=$abc$109383$new_n29693_
 .subckt nand2_x0 i0=$abc$109383$new_n29693_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n29694_
-.subckt a3_x2 i0=$abc$109383$new_n29694_ i1=$abc$109383$new_n29497_ i2=$abc$109383$new_n29239_ q=$abc$109383$new_n29695_
+.subckt and3_x1 i0=$abc$109383$new_n29694_ i1=$abc$109383$new_n29497_ i2=$abc$109383$new_n29239_ q=$abc$109383$new_n29695_
 .subckt inv_x1 i=$abc$109383$new_n29674_ nq=$abc$109383$new_n29696_
 .subckt inv_x1 i=$abc$109383$new_n29686_ nq=$abc$109383$new_n29697_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29697_ i1=$abc$109383$new_n29696_ q=$abc$109383$new_n29698_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29697_ i1=$abc$109383$new_n29696_ q=$abc$109383$new_n29698_
 .subckt inv_x1 i=$abc$109383$new_n29653_ nq=$abc$109383$new_n29699_
 .subckt inv_x1 i=$abc$109383$new_n29662_ nq=$abc$109383$new_n29700_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29700_ i1=$abc$109383$new_n29699_ q=$abc$109383$new_n29701_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29700_ i1=$abc$109383$new_n29699_ q=$abc$109383$new_n29701_
 .subckt buf_x4 i=$abc$109383$new_n29319_ q=$abc$109383$new_n29702_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29701_ i1=$abc$109383$new_n29698_ q=$abc$109383$new_n29703_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29701_ i1=$abc$109383$new_n29698_ q=$abc$109383$new_n29703_
 .subckt inv_x1 i=$abc$109383$new_n29630_ nq=$abc$109383$new_n29704_
 .subckt inv_x1 i=$abc$109383$new_n29641_ nq=$abc$109383$new_n29705_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29705_ i1=$abc$109383$new_n29704_ q=$abc$109383$new_n29706_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29705_ i1=$abc$109383$new_n29704_ q=$abc$109383$new_n29706_
 .subckt inv_x1 i=$abc$109383$new_n29606_ nq=$abc$109383$new_n29707_
 .subckt inv_x1 i=$abc$109383$new_n29618_ nq=$abc$109383$new_n29708_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29708_ i1=$abc$109383$new_n29707_ q=$abc$109383$new_n29709_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29709_ i1=$abc$109383$new_n29706_ q=$abc$109383$new_n29710_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29708_ i1=$abc$109383$new_n29707_ q=$abc$109383$new_n29709_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29709_ i1=$abc$109383$new_n29706_ q=$abc$109383$new_n29710_
 .subckt buf_x4 i=$abc$109383$new_n29381_ q=$abc$109383$new_n29711_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29710_ i1=$abc$109383$new_n29703_ q=$abc$109383$new_n29712_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29710_ i1=$abc$109383$new_n29703_ q=$abc$109383$new_n29712_
 .subckt inv_x1 i=$abc$109383$new_n29580_ nq=$abc$109383$new_n29713_
 .subckt inv_x1 i=$abc$109383$new_n29592_ nq=$abc$109383$new_n29714_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29714_ i1=$abc$109383$new_n29713_ q=$abc$109383$new_n29715_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29714_ i1=$abc$109383$new_n29713_ q=$abc$109383$new_n29715_
 .subckt inv_x1 i=$abc$109383$new_n29556_ nq=$abc$109383$new_n29716_
 .subckt inv_x1 i=$abc$109383$new_n29568_ nq=$abc$109383$new_n29717_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29717_ i1=$abc$109383$new_n29716_ q=$abc$109383$new_n29718_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29718_ i1=$abc$109383$new_n29715_ q=$abc$109383$new_n29719_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29717_ i1=$abc$109383$new_n29716_ q=$abc$109383$new_n29718_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29718_ i1=$abc$109383$new_n29715_ q=$abc$109383$new_n29719_
 .subckt inv_x1 i=$abc$109383$new_n29529_ nq=$abc$109383$new_n29720_
 .subckt inv_x1 i=$abc$109383$new_n29542_ nq=$abc$109383$new_n29721_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29721_ i1=$abc$109383$new_n29720_ q=$abc$109383$new_n29722_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29721_ i1=$abc$109383$new_n29720_ q=$abc$109383$new_n29722_
 .subckt inv_x1 i=$abc$109383$new_n29508_ nq=$abc$109383$new_n29723_
 .subckt inv_x1 i=$abc$109383$new_n29519_ nq=$abc$109383$new_n29724_
-.subckt mx2_x2 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29724_ i1=$abc$109383$new_n29723_ q=$abc$109383$new_n29725_
+.subckt mux2_x1 cmd=$abc$109383$new_n29207_ i0=$abc$109383$new_n29724_ i1=$abc$109383$new_n29723_ q=$abc$109383$new_n29725_
 .subckt buf_x4 i=$abc$109383$new_n29318_ q=$abc$109383$new_n29726_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29725_ i1=$abc$109383$new_n29722_ q=$abc$109383$new_n29727_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29727_ i1=$abc$109383$new_n29719_ q=$abc$109383$new_n29728_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29725_ i1=$abc$109383$new_n29722_ q=$abc$109383$new_n29727_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29727_ i1=$abc$109383$new_n29719_ q=$abc$109383$new_n29728_
 .subckt buf_x4 i=$abc$109383$new_n29263_ q=$abc$109383$new_n29729_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29728_ i1=$abc$109383$new_n29712_ q=$abc$109383$new_n29730_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29728_ i1=$abc$109383$new_n29712_ q=$abc$109383$new_n29730_
 .subckt inv_x1 i=$abc$109383$new_n29350_ nq=$abc$109383$new_n29731_
 .subckt inv_x1 i=$abc$109383$new_n29363_ nq=$abc$109383$new_n29732_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29732_ i1=$abc$109383$new_n29731_ q=$abc$109383$new_n29733_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29732_ i1=$abc$109383$new_n29731_ q=$abc$109383$new_n29733_
 .subckt inv_x0 i=$abc$109383$new_n29328_ nq=$abc$109383$new_n29734_
 .subckt inv_x1 i=$abc$109383$new_n29340_ nq=$abc$109383$new_n29735_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29735_ i1=$abc$109383$new_n29734_ q=$abc$109383$new_n29736_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29736_ i1=$abc$109383$new_n29733_ q=$abc$109383$new_n29737_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29735_ i1=$abc$109383$new_n29734_ q=$abc$109383$new_n29736_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29736_ i1=$abc$109383$new_n29733_ q=$abc$109383$new_n29737_
 .subckt inv_x1 i=$abc$109383$new_n29294_ nq=$abc$109383$new_n29738_
 .subckt inv_x1 i=$abc$109383$new_n29307_ nq=$abc$109383$new_n29739_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29739_ i1=$abc$109383$new_n29738_ q=$abc$109383$new_n29740_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29739_ i1=$abc$109383$new_n29738_ q=$abc$109383$new_n29740_
 .subckt inv_x1 i=$abc$109383$new_n29271_ nq=$abc$109383$new_n29741_
 .subckt inv_x1 i=$abc$109383$new_n29284_ nq=$abc$109383$new_n29742_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29742_ i1=$abc$109383$new_n29741_ q=$abc$109383$new_n29743_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29743_ i1=$abc$109383$new_n29740_ q=$abc$109383$new_n29744_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29744_ i1=$abc$109383$new_n29737_ q=$abc$109383$new_n29745_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29742_ i1=$abc$109383$new_n29741_ q=$abc$109383$new_n29743_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29743_ i1=$abc$109383$new_n29740_ q=$abc$109383$new_n29744_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29744_ i1=$abc$109383$new_n29737_ q=$abc$109383$new_n29745_
 .subckt inv_x0 i=$abc$109383$new_n29417_ nq=$abc$109383$new_n29746_
 .subckt inv_x1 i=$abc$109383$new_n29431_ nq=$abc$109383$new_n29747_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29747_ i1=$abc$109383$new_n29746_ q=$abc$109383$new_n29748_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29747_ i1=$abc$109383$new_n29746_ q=$abc$109383$new_n29748_
 .subckt inv_x1 i=$abc$109383$new_n29392_ nq=$abc$109383$new_n29749_
 .subckt inv_x1 i=$abc$109383$new_n29405_ nq=$abc$109383$new_n29750_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29750_ i1=$abc$109383$new_n29749_ q=$abc$109383$new_n29751_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29751_ i1=$abc$109383$new_n29748_ q=$abc$109383$new_n29752_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29750_ i1=$abc$109383$new_n29749_ q=$abc$109383$new_n29751_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29751_ i1=$abc$109383$new_n29748_ q=$abc$109383$new_n29752_
 .subckt inv_x0 i=$abc$109383$new_n29447_ nq=$abc$109383$new_n29753_
 .subckt inv_x1 i=$abc$109383$new_n29462_ nq=$abc$109383$new_n29754_
-.subckt mx2_x2 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29754_ i1=$abc$109383$new_n29753_ q=$abc$109383$new_n29755_
+.subckt mux2_x1 cmd=$abc$109383$new_n29206_ i0=$abc$109383$new_n29754_ i1=$abc$109383$new_n29753_ q=$abc$109383$new_n29755_
 .subckt inv_x0 i=$abc$109383$new_n29489_ nq=$abc$109383$new_n29756_
 .subckt inv_x0 i=$abc$109383$new_n29472_ nq=$abc$109383$new_n29757_
-.subckt mx2_x2 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29757_ i1=$abc$109383$new_n29756_ q=$abc$109383$new_n29758_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29758_ i1=$abc$109383$new_n29755_ q=$abc$109383$new_n29759_
+.subckt mux2_x1 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29757_ i1=$abc$109383$new_n29756_ q=$abc$109383$new_n29758_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29758_ i1=$abc$109383$new_n29755_ q=$abc$109383$new_n29759_
 .subckt buf_x4 i=$abc$109383$new_n29381_ q=$abc$109383$new_n29760_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29759_ i1=$abc$109383$new_n29752_ q=$abc$109383$new_n29761_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29761_ i1=$abc$109383$new_n29745_ q=$abc$109383$new_n29762_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29762_ i1=$abc$109383$new_n29730_ q=$abc$109383$new_n29763_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29759_ i1=$abc$109383$new_n29752_ q=$abc$109383$new_n29761_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29761_ i1=$abc$109383$new_n29745_ q=$abc$109383$new_n29762_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29762_ i1=$abc$109383$new_n29730_ q=$abc$109383$new_n29763_
 .subckt buf_x4 i=$abc$109383$new_n29237_ q=$abc$109383$new_n29764_
-.subckt oa22_x2 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29763_ i2=$abc$109383$new_n29222_ q=$abc$109383$new_n29765_
-.subckt ao22_x2 i0=$abc$109383$new_n29765_ i1=$abc$109383$new_n29695_ i2=$abc$109383$new_n29224_ q=$abc$109383$new_n29766_
+.subckt or21nand_x1 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29763_ i2=$abc$109383$new_n29222_ nq=$abc$109383$new_n29765_
+.subckt and21nor_x1 i0=$abc$109383$new_n29765_ i1=$abc$109383$new_n29695_ i2=$abc$109383$new_n29224_ nq=$abc$109383$new_n29766_
 .subckt nor2_x0 i0=$abc$109383$new_n29766_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102430
 .subckt nand2_x0 i0=$abc$109383$new_n29223_ i1=soc.cpu.minerva.shifter.m_result$9[1] nq=$abc$109383$new_n29768_
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n29769_
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n29770_
 .subckt buf_x4 i=$abc$109383$new_n29249_ q=$abc$109383$new_n29771_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29343_ i1=$abc$109383$new_n29310_ q=$abc$109383$new_n29772_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29522_ i1=$abc$109383$new_n29366_ q=$abc$109383$new_n29773_
-.subckt mx2_x2 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29773_ i1=$abc$109383$new_n29772_ q=$abc$109383$new_n29774_
-.subckt o2_x2 i0=$abc$109383$new_n29774_ i1=$abc$109383$new_n29692_ q=$abc$109383$new_n29775_
-.subckt mx2_x2 cmd=$abc$109383$new_n29440_ i0=$abc$109383$new_n29434_ i1=$abc$109383$new_n29287_ q=$abc$109383$new_n29776_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29343_ i1=$abc$109383$new_n29310_ q=$abc$109383$new_n29772_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29522_ i1=$abc$109383$new_n29366_ q=$abc$109383$new_n29773_
+.subckt mux2_x1 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29773_ i1=$abc$109383$new_n29772_ q=$abc$109383$new_n29774_
+.subckt or2_x1 i0=$abc$109383$new_n29774_ i1=$abc$109383$new_n29692_ q=$abc$109383$new_n29775_
+.subckt mux2_x1 cmd=$abc$109383$new_n29440_ i0=$abc$109383$new_n29434_ i1=$abc$109383$new_n29287_ q=$abc$109383$new_n29776_
 .subckt nand2_x0 i0=$abc$109383$new_n29776_ i1=$abc$109383$new_n29386_ nq=$abc$109383$new_n29777_
 .subckt nand2_x0 i0=$abc$109383$new_n29466_ i1=$abc$109383$new_n29464_ nq=$abc$109383$new_n29778_
 .subckt nand3_x0 i0=$abc$109383$new_n29409_ i1=$abc$109383$new_n29440_ i2=$abc$109383$new_n29438_ nq=$abc$109383$new_n29779_
-.subckt a2_x2 i0=$abc$109383$new_n29779_ i1=$abc$109383$new_n29778_ q=$abc$109383$new_n29780_
+.subckt and2_x1 i0=$abc$109383$new_n29779_ i1=$abc$109383$new_n29778_ q=$abc$109383$new_n29780_
 .subckt nand3_x0 i0=$abc$109383$new_n29780_ i1=$abc$109383$new_n29777_ i2=$abc$109383$new_n29264_ nq=$abc$109383$new_n29781_
-.subckt a3_x2 i0=$abc$109383$new_n29781_ i1=$abc$109383$new_n29775_ i2=$abc$109383$new_n29771_ q=$abc$109383$new_n29782_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29571_ i1=$abc$109383$new_n29545_ q=$abc$109383$new_n29783_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29622_ i1=$abc$109383$new_n29595_ q=$abc$109383$new_n29784_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29784_ i1=$abc$109383$new_n29783_ q=$abc$109383$new_n29785_
-.subckt mx2_x2 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29665_ i1=$abc$109383$new_n29644_ q=$abc$109383$new_n29786_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29676_ i1=$abc$109383$new_n29688_ q=$abc$109383$new_n29787_
-.subckt mx2_x2 cmd=$abc$109383$new_n29439_ i0=$abc$109383$new_n29689_ i1=$abc$109383$new_n29787_ q=$abc$109383$new_n29788_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29788_ i1=$abc$109383$new_n29786_ q=$abc$109383$new_n29789_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29789_ i1=$abc$109383$new_n29785_ q=$abc$109383$new_n29790_
-.subckt oa22_x2 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n29790_ i2=$abc$109383$new_n29764_ q=$abc$109383$new_n29791_
-.subckt o2_x2 i0=$abc$109383$new_n29791_ i1=$abc$109383$new_n29782_ q=$abc$109383$new_n29792_
+.subckt and3_x1 i0=$abc$109383$new_n29781_ i1=$abc$109383$new_n29775_ i2=$abc$109383$new_n29771_ q=$abc$109383$new_n29782_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29571_ i1=$abc$109383$new_n29545_ q=$abc$109383$new_n29783_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29622_ i1=$abc$109383$new_n29595_ q=$abc$109383$new_n29784_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29784_ i1=$abc$109383$new_n29783_ q=$abc$109383$new_n29785_
+.subckt mux2_x1 cmd=$abc$109383$new_n29726_ i0=$abc$109383$new_n29665_ i1=$abc$109383$new_n29644_ q=$abc$109383$new_n29786_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29676_ i1=$abc$109383$new_n29688_ q=$abc$109383$new_n29787_
+.subckt mux2_x1 cmd=$abc$109383$new_n29439_ i0=$abc$109383$new_n29689_ i1=$abc$109383$new_n29787_ q=$abc$109383$new_n29788_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29788_ i1=$abc$109383$new_n29786_ q=$abc$109383$new_n29789_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29789_ i1=$abc$109383$new_n29785_ q=$abc$109383$new_n29790_
+.subckt or21nand_x1 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n29790_ i2=$abc$109383$new_n29764_ nq=$abc$109383$new_n29791_
+.subckt or2_x1 i0=$abc$109383$new_n29791_ i1=$abc$109383$new_n29782_ q=$abc$109383$new_n29792_
 .subckt nand2_x0 i0=$abc$109383$new_n29792_ i1=$abc$109383$new_n29770_ nq=$abc$109383$new_n29793_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29706_ i1=$abc$109383$new_n29701_ q=$abc$109383$new_n29794_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29715_ i1=$abc$109383$new_n29709_ q=$abc$109383$new_n29795_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29795_ i1=$abc$109383$new_n29794_ q=$abc$109383$new_n29796_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29722_ i1=$abc$109383$new_n29718_ q=$abc$109383$new_n29797_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29733_ i1=$abc$109383$new_n29725_ q=$abc$109383$new_n29798_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29798_ i1=$abc$109383$new_n29797_ q=$abc$109383$new_n29799_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29799_ i1=$abc$109383$new_n29796_ q=$abc$109383$new_n29800_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29740_ i1=$abc$109383$new_n29736_ q=$abc$109383$new_n29801_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29748_ i1=$abc$109383$new_n29743_ q=$abc$109383$new_n29802_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29802_ i1=$abc$109383$new_n29801_ q=$abc$109383$new_n29803_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29755_ i1=$abc$109383$new_n29751_ q=$abc$109383$new_n29804_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__direction$57 i0=$abc$109383$new_n29475_ i1=$abc$109383$new_n29490_ q=$abc$109383$new_n29805_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29706_ i1=$abc$109383$new_n29701_ q=$abc$109383$new_n29794_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29715_ i1=$abc$109383$new_n29709_ q=$abc$109383$new_n29795_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29795_ i1=$abc$109383$new_n29794_ q=$abc$109383$new_n29796_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29722_ i1=$abc$109383$new_n29718_ q=$abc$109383$new_n29797_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29733_ i1=$abc$109383$new_n29725_ q=$abc$109383$new_n29798_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29798_ i1=$abc$109383$new_n29797_ q=$abc$109383$new_n29799_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29799_ i1=$abc$109383$new_n29796_ q=$abc$109383$new_n29800_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29740_ i1=$abc$109383$new_n29736_ q=$abc$109383$new_n29801_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29748_ i1=$abc$109383$new_n29743_ q=$abc$109383$new_n29802_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29802_ i1=$abc$109383$new_n29801_ q=$abc$109383$new_n29803_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29755_ i1=$abc$109383$new_n29751_ q=$abc$109383$new_n29804_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__direction$57 i0=$abc$109383$new_n29475_ i1=$abc$109383$new_n29490_ q=$abc$109383$new_n29805_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29407_ i2=$abc$109383$new_n29491_ nq=$abc$109383$new_n29806_
 .subckt nand2_x0 i0=$abc$109383$new_n29806_ i1=$abc$109383$new_n29439_ nq=$abc$109383$new_n29807_
 .subckt nand2_x0 i0=$abc$109383$new_n29807_ i1=$abc$109383$new_n29805_ nq=$abc$109383$new_n29808_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29808_ i1=$abc$109383$new_n29804_ q=$abc$109383$new_n29809_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29809_ i1=$abc$109383$new_n29803_ q=$abc$109383$new_n29810_
-.subckt mx2_x2 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29810_ i1=$abc$109383$new_n29800_ q=$abc$109383$new_n29811_
-.subckt a2_x2 i0=$abc$109383$new_n29811_ i1=$abc$109383$new_n29764_ q=$abc$109383$new_n29812_
-.subckt ao22_x2 i0=$abc$109383$new_n29812_ i1=$abc$109383$new_n29793_ i2=$abc$109383$new_n29768_ q=$abc$109383$new_n29813_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29808_ i1=$abc$109383$new_n29804_ q=$abc$109383$new_n29809_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29809_ i1=$abc$109383$new_n29803_ q=$abc$109383$new_n29810_
+.subckt mux2_x1 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29810_ i1=$abc$109383$new_n29800_ q=$abc$109383$new_n29811_
+.subckt and2_x1 i0=$abc$109383$new_n29811_ i1=$abc$109383$new_n29764_ q=$abc$109383$new_n29812_
+.subckt and21nor_x1 i0=$abc$109383$new_n29812_ i1=$abc$109383$new_n29793_ i2=$abc$109383$new_n29768_ nq=$abc$109383$new_n29813_
 .subckt nor2_x0 i0=$abc$109383$new_n29813_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102434
 .subckt buf_x4 i=$abc$109383$new_n17843_ q=$abc$109383$new_n29815_
 .subckt buf_x4 i=$abc$109383$new_n29815_ q=$abc$109383$new_n29816_
-.subckt ao22_x2 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[2] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29817_
-.subckt a2_x2 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n29499_ q=$abc$109383$new_n29818_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29645_ i1=$abc$109383$new_n29596_ q=$abc$109383$new_n29819_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29655_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n29820_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29820_ i1=$abc$109383$new_n29787_ q=$abc$109383$new_n29821_
-.subckt mx2_x2 cmd=$abc$109383$new_n29385_ i0=$abc$109383$new_n29690_ i1=$abc$109383$new_n29821_ q=$abc$109383$new_n29822_
-.subckt mx2_x2 cmd=$abc$109383$new_n29264_ i0=$abc$109383$new_n29822_ i1=$abc$109383$new_n29819_ q=$abc$109383$new_n29823_
+.subckt and21nor_x1 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[2] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29817_
+.subckt and2_x1 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n29499_ q=$abc$109383$new_n29818_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29645_ i1=$abc$109383$new_n29596_ q=$abc$109383$new_n29819_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29655_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n29820_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29820_ i1=$abc$109383$new_n29787_ q=$abc$109383$new_n29821_
+.subckt mux2_x1 cmd=$abc$109383$new_n29385_ i0=$abc$109383$new_n29690_ i1=$abc$109383$new_n29821_ q=$abc$109383$new_n29822_
+.subckt mux2_x1 cmd=$abc$109383$new_n29264_ i0=$abc$109383$new_n29822_ i1=$abc$109383$new_n29819_ q=$abc$109383$new_n29823_
 .subckt nand2_x0 i0=$abc$109383$new_n29823_ i1=$abc$109383$new_n29818_ nq=$abc$109383$new_n29824_
 .subckt buf_x4 i=$abc$109383$new_n17843_ q=$abc$109383$new_n29825_
 .subckt buf_x4 i=$abc$109383$new_n29825_ q=$abc$109383$new_n29826_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29546_ i1=$abc$109383$new_n29368_ q=$abc$109383$new_n29827_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29546_ i1=$abc$109383$new_n29368_ q=$abc$109383$new_n29827_
 .subckt nor2_x0 i0=$abc$109383$new_n29827_ i1=$abc$109383$new_n29264_ nq=$abc$109383$new_n29828_
 .subckt nor2_x0 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n29829_
-.subckt o2_x2 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29378_ q=$abc$109383$new_n29830_
-.subckt o2_x2 i0=$abc$109383$new_n29830_ i1=$abc$109383$new_n29436_ q=$abc$109383$new_n29831_
+.subckt or2_x1 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29378_ q=$abc$109383$new_n29830_
+.subckt or2_x1 i0=$abc$109383$new_n29830_ i1=$abc$109383$new_n29436_ q=$abc$109383$new_n29831_
 .subckt nand2_x0 i0=$abc$109383$new_n29692_ i1=$abc$109383$new_n29386_ nq=$abc$109383$new_n29832_
-.subckt o2_x2 i0=$abc$109383$new_n29832_ i1=$abc$109383$new_n29320_ q=$abc$109383$new_n29833_
+.subckt or2_x1 i0=$abc$109383$new_n29832_ i1=$abc$109383$new_n29320_ q=$abc$109383$new_n29833_
 .subckt nand3_x0 i0=$abc$109383$new_n29833_ i1=$abc$109383$new_n29831_ i2=$abc$109383$new_n29829_ nq=$abc$109383$new_n29834_
-.subckt ao22_x2 i0=$abc$109383$new_n29834_ i1=$abc$109383$new_n29828_ i2=$abc$109383$new_n29826_ q=$abc$109383$new_n29835_
+.subckt and21nor_x1 i0=$abc$109383$new_n29834_ i1=$abc$109383$new_n29828_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n29835_
 .subckt nand2_x0 i0=$abc$109383$new_n29835_ i1=$abc$109383$new_n29824_ nq=$abc$109383$new_n29836_
 .subckt buf_x4 i=$abc$109383$new_n29764_ q=$abc$109383$new_n29837_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29632_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n29838_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29608_ i1=$abc$109383$new_n29620_ q=$abc$109383$new_n29839_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29839_ i1=$abc$109383$new_n29838_ q=$abc$109383$new_n29840_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29632_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n29838_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29608_ i1=$abc$109383$new_n29620_ q=$abc$109383$new_n29839_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29839_ i1=$abc$109383$new_n29838_ q=$abc$109383$new_n29840_
 .subckt buf_x4 i=soc.cpu.minerva.payload__direction$57 q=$abc$109383$new_n29841_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29582_ i1=$abc$109383$new_n29594_ q=$abc$109383$new_n29842_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29558_ i1=$abc$109383$new_n29570_ q=$abc$109383$new_n29843_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29843_ i1=$abc$109383$new_n29842_ q=$abc$109383$new_n29844_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29844_ i1=$abc$109383$new_n29840_ q=$abc$109383$new_n29845_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29532_ i1=$abc$109383$new_n29544_ q=$abc$109383$new_n29846_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29510_ i1=$abc$109383$new_n29521_ q=$abc$109383$new_n29847_
-.subckt mx2_x2 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29847_ i1=$abc$109383$new_n29846_ q=$abc$109383$new_n29848_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29354_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n29849_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29332_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n29850_
-.subckt mx2_x2 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29850_ i1=$abc$109383$new_n29849_ q=$abc$109383$new_n29851_
-.subckt mx2_x2 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29851_ i1=$abc$109383$new_n29848_ q=$abc$109383$new_n29852_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29852_ i1=$abc$109383$new_n29845_ q=$abc$109383$new_n29853_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29298_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n29854_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29275_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n29855_
-.subckt mx2_x2 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29855_ i1=$abc$109383$new_n29854_ q=$abc$109383$new_n29856_
-.subckt mx2_x2 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29421_ i1=$abc$109383$new_n29433_ q=$abc$109383$new_n29857_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__direction$57 i0=$abc$109383$new_n29396_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n29858_
-.subckt mx2_x2 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29858_ i1=$abc$109383$new_n29857_ q=$abc$109383$new_n29859_
-.subckt mx2_x2 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29859_ i1=$abc$109383$new_n29856_ q=$abc$109383$new_n29860_
-.subckt mx2_x2 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29451_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n29861_
-.subckt mx2_x2 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29805_ i1=$abc$109383$new_n29861_ q=$abc$109383$new_n29862_
-.subckt a3_x2 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29407_ i2=$abc$109383$new_n29491_ q=$abc$109383$new_n29863_
-.subckt mx2_x2 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29863_ i1=$abc$109383$new_n29862_ q=$abc$109383$new_n29864_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29864_ i1=$abc$109383$new_n29860_ q=$abc$109383$new_n29865_
-.subckt mx2_x2 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29865_ i1=$abc$109383$new_n29853_ q=$abc$109383$new_n29866_
-.subckt a2_x2 i0=$abc$109383$new_n29866_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n29867_
-.subckt ao22_x2 i0=$abc$109383$new_n29867_ i1=$abc$109383$new_n29836_ i2=$abc$109383$new_n29817_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102438
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29582_ i1=$abc$109383$new_n29594_ q=$abc$109383$new_n29842_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29558_ i1=$abc$109383$new_n29570_ q=$abc$109383$new_n29843_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29843_ i1=$abc$109383$new_n29842_ q=$abc$109383$new_n29844_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29844_ i1=$abc$109383$new_n29840_ q=$abc$109383$new_n29845_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29532_ i1=$abc$109383$new_n29544_ q=$abc$109383$new_n29846_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29510_ i1=$abc$109383$new_n29521_ q=$abc$109383$new_n29847_
+.subckt mux2_x1 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29847_ i1=$abc$109383$new_n29846_ q=$abc$109383$new_n29848_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29354_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n29849_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29332_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n29850_
+.subckt mux2_x1 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29850_ i1=$abc$109383$new_n29849_ q=$abc$109383$new_n29851_
+.subckt mux2_x1 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29851_ i1=$abc$109383$new_n29848_ q=$abc$109383$new_n29852_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29852_ i1=$abc$109383$new_n29845_ q=$abc$109383$new_n29853_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29298_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n29854_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29275_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n29855_
+.subckt mux2_x1 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29855_ i1=$abc$109383$new_n29854_ q=$abc$109383$new_n29856_
+.subckt mux2_x1 cmd=$abc$109383$new_n29841_ i0=$abc$109383$new_n29421_ i1=$abc$109383$new_n29433_ q=$abc$109383$new_n29857_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__direction$57 i0=$abc$109383$new_n29396_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n29858_
+.subckt mux2_x1 cmd=$abc$109383$new_n29318_ i0=$abc$109383$new_n29858_ i1=$abc$109383$new_n29857_ q=$abc$109383$new_n29859_
+.subckt mux2_x1 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29859_ i1=$abc$109383$new_n29856_ q=$abc$109383$new_n29860_
+.subckt mux2_x1 cmd=$abc$109383$new_n29621_ i0=$abc$109383$new_n29451_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n29861_
+.subckt mux2_x1 cmd=$abc$109383$new_n29319_ i0=$abc$109383$new_n29805_ i1=$abc$109383$new_n29861_ q=$abc$109383$new_n29862_
+.subckt and3_x1 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29407_ i2=$abc$109383$new_n29491_ q=$abc$109383$new_n29863_
+.subckt mux2_x1 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29863_ i1=$abc$109383$new_n29862_ q=$abc$109383$new_n29864_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29864_ i1=$abc$109383$new_n29860_ q=$abc$109383$new_n29865_
+.subckt mux2_x1 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29865_ i1=$abc$109383$new_n29853_ q=$abc$109383$new_n29866_
+.subckt and2_x1 i0=$abc$109383$new_n29866_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n29867_
+.subckt and21nor_x1 i0=$abc$109383$new_n29867_ i1=$abc$109383$new_n29836_ i2=$abc$109383$new_n29817_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102438
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[3] nq=$abc$109383$new_n29869_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n29870_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n29871_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n29869_ q=$abc$109383$new_n29872_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n29869_ nq=$abc$109383$new_n29872_
 .subckt nor2_x0 i0=$abc$109383$new_n29872_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n29873_
 .subckt buf_x4 i=$abc$109383$new_n17846_ q=$abc$109383$new_n29874_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n29875_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29842_ i1=$abc$109383$new_n29839_ q=$abc$109383$new_n29876_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29846_ i1=$abc$109383$new_n29843_ q=$abc$109383$new_n29877_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29877_ i1=$abc$109383$new_n29876_ q=$abc$109383$new_n29878_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29849_ i1=$abc$109383$new_n29847_ q=$abc$109383$new_n29879_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29854_ i1=$abc$109383$new_n29850_ q=$abc$109383$new_n29880_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29880_ i1=$abc$109383$new_n29879_ q=$abc$109383$new_n29881_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29881_ i1=$abc$109383$new_n29878_ q=$abc$109383$new_n29882_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29857_ i1=$abc$109383$new_n29855_ q=$abc$109383$new_n29883_
-.subckt mx2_x2 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29861_ i1=$abc$109383$new_n29858_ q=$abc$109383$new_n29884_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29884_ i1=$abc$109383$new_n29883_ q=$abc$109383$new_n29885_
-.subckt ao22_x2 i0=$abc$109383$new_n29726_ i1=$abc$109383$new_n29863_ i2=$abc$109383$new_n29805_ q=$abc$109383$new_n29886_
-.subckt mx2_x2 cmd=$abc$109383$new_n29385_ i0=$abc$109383$new_n29886_ i1=$abc$109383$new_n29863_ q=$abc$109383$new_n29887_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29887_ i1=$abc$109383$new_n29885_ q=$abc$109383$new_n29888_
-.subckt mx2_x2 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29888_ i1=$abc$109383$new_n29882_ q=$abc$109383$new_n29889_
-.subckt oa22_x2 i0=$abc$109383$new_n29837_ i1=$abc$109383$new_n29889_ i2=$abc$109383$new_n29875_ q=$abc$109383$new_n29890_
-.subckt mx2_x2 cmd=$abc$109383$new_n29385_ i0=$abc$109383$new_n29773_ i1=$abc$109383$new_n29783_ q=$abc$109383$new_n29891_
-.subckt mx2_x2 cmd=$abc$109383$new_n29386_ i0=$abc$109383$new_n29776_ i1=$abc$109383$new_n29772_ q=$abc$109383$new_n29892_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29842_ i1=$abc$109383$new_n29839_ q=$abc$109383$new_n29876_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29846_ i1=$abc$109383$new_n29843_ q=$abc$109383$new_n29877_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29877_ i1=$abc$109383$new_n29876_ q=$abc$109383$new_n29878_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29849_ i1=$abc$109383$new_n29847_ q=$abc$109383$new_n29879_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29854_ i1=$abc$109383$new_n29850_ q=$abc$109383$new_n29880_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29880_ i1=$abc$109383$new_n29879_ q=$abc$109383$new_n29881_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29881_ i1=$abc$109383$new_n29878_ q=$abc$109383$new_n29882_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29857_ i1=$abc$109383$new_n29855_ q=$abc$109383$new_n29883_
+.subckt mux2_x1 cmd=$abc$109383$new_n29367_ i0=$abc$109383$new_n29861_ i1=$abc$109383$new_n29858_ q=$abc$109383$new_n29884_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29884_ i1=$abc$109383$new_n29883_ q=$abc$109383$new_n29885_
+.subckt and21nor_x1 i0=$abc$109383$new_n29726_ i1=$abc$109383$new_n29863_ i2=$abc$109383$new_n29805_ nq=$abc$109383$new_n29886_
+.subckt mux2_x1 cmd=$abc$109383$new_n29385_ i0=$abc$109383$new_n29886_ i1=$abc$109383$new_n29863_ q=$abc$109383$new_n29887_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29887_ i1=$abc$109383$new_n29885_ q=$abc$109383$new_n29888_
+.subckt mux2_x1 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29888_ i1=$abc$109383$new_n29882_ q=$abc$109383$new_n29889_
+.subckt or21nand_x1 i0=$abc$109383$new_n29837_ i1=$abc$109383$new_n29889_ i2=$abc$109383$new_n29875_ nq=$abc$109383$new_n29890_
+.subckt mux2_x1 cmd=$abc$109383$new_n29385_ i0=$abc$109383$new_n29773_ i1=$abc$109383$new_n29783_ q=$abc$109383$new_n29891_
+.subckt mux2_x1 cmd=$abc$109383$new_n29386_ i0=$abc$109383$new_n29776_ i1=$abc$109383$new_n29772_ q=$abc$109383$new_n29892_
 .subckt buf_x4 i=$abc$109383$new_n29261_ q=$abc$109383$new_n29893_
 .subckt buf_x4 i=$abc$109383$new_n29893_ q=$abc$109383$new_n29894_
-.subckt mx2_x2 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29892_ i1=$abc$109383$new_n29891_ q=$abc$109383$new_n29895_
+.subckt mux2_x1 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29892_ i1=$abc$109383$new_n29891_ q=$abc$109383$new_n29895_
 .subckt nor2_x0 i0=$abc$109383$new_n29895_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n29896_
-.subckt mx2_x2 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29714_ i1=$abc$109383$new_n29713_ q=$abc$109383$new_n29897_
-.subckt mx2_x2 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29708_ i1=$abc$109383$new_n29707_ q=$abc$109383$new_n29898_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29898_ i1=$abc$109383$new_n29897_ q=$abc$109383$new_n29899_
-.subckt mx2_x2 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29705_ i1=$abc$109383$new_n29704_ q=$abc$109383$new_n29900_
-.subckt mx2_x2 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29700_ i1=$abc$109383$new_n29699_ q=$abc$109383$new_n29901_
-.subckt mx2_x2 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29901_ i1=$abc$109383$new_n29900_ q=$abc$109383$new_n29902_
-.subckt mx2_x2 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29902_ i1=$abc$109383$new_n29899_ q=$abc$109383$new_n29903_
-.subckt mx2_x2 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29697_ i1=$abc$109383$new_n29696_ q=$abc$109383$new_n29904_
-.subckt mx2_x2 cmd=$abc$109383$new_n29439_ i0=$abc$109383$new_n29904_ i1=$abc$109383$new_n29698_ q=$abc$109383$new_n29905_
-.subckt mx2_x2 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29794_ i1=$abc$109383$new_n29905_ q=$abc$109383$new_n29906_
-.subckt mx2_x2 cmd=$abc$109383$new_n29264_ i0=$abc$109383$new_n29906_ i1=$abc$109383$new_n29903_ q=$abc$109383$new_n29907_
-.subckt oa22_x2 i0=$abc$109383$new_n29499_ i1=$abc$109383$new_n29907_ i2=$abc$109383$new_n29764_ q=$abc$109383$new_n29908_
+.subckt mux2_x1 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29714_ i1=$abc$109383$new_n29713_ q=$abc$109383$new_n29897_
+.subckt mux2_x1 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29708_ i1=$abc$109383$new_n29707_ q=$abc$109383$new_n29898_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29898_ i1=$abc$109383$new_n29897_ q=$abc$109383$new_n29899_
+.subckt mux2_x1 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29705_ i1=$abc$109383$new_n29704_ q=$abc$109383$new_n29900_
+.subckt mux2_x1 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29700_ i1=$abc$109383$new_n29699_ q=$abc$109383$new_n29901_
+.subckt mux2_x1 cmd=$abc$109383$new_n29435_ i0=$abc$109383$new_n29901_ i1=$abc$109383$new_n29900_ q=$abc$109383$new_n29902_
+.subckt mux2_x1 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29902_ i1=$abc$109383$new_n29899_ q=$abc$109383$new_n29903_
+.subckt mux2_x1 cmd=$abc$109383$new_n29407_ i0=$abc$109383$new_n29697_ i1=$abc$109383$new_n29696_ q=$abc$109383$new_n29904_
+.subckt mux2_x1 cmd=$abc$109383$new_n29439_ i0=$abc$109383$new_n29904_ i1=$abc$109383$new_n29698_ q=$abc$109383$new_n29905_
+.subckt mux2_x1 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29794_ i1=$abc$109383$new_n29905_ q=$abc$109383$new_n29906_
+.subckt mux2_x1 cmd=$abc$109383$new_n29264_ i0=$abc$109383$new_n29906_ i1=$abc$109383$new_n29903_ q=$abc$109383$new_n29907_
+.subckt or21nand_x1 i0=$abc$109383$new_n29499_ i1=$abc$109383$new_n29907_ i2=$abc$109383$new_n29764_ nq=$abc$109383$new_n29908_
 .subckt nor2_x0 i0=$abc$109383$new_n29908_ i1=$abc$109383$new_n29896_ nq=$abc$109383$new_n29909_
-.subckt ao22_x2 i0=$abc$109383$new_n29909_ i1=$abc$109383$new_n29890_ i2=$abc$109383$new_n29873_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102442
-.subckt mx2_x2 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29597_ i1=$abc$109383$new_n29383_ q=$abc$109383$new_n29911_
-.subckt mx2_x2 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29840_ i1=$abc$109383$new_n29821_ q=$abc$109383$new_n29912_
-.subckt mx2_x2 cmd=$abc$109383$new_n29893_ i0=$abc$109383$new_n29691_ i1=$abc$109383$new_n29912_ q=$abc$109383$new_n29913_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29913_ i1=$abc$109383$new_n29911_ q=$abc$109383$new_n29914_
-.subckt mx2_x2 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29848_ i1=$abc$109383$new_n29844_ q=$abc$109383$new_n29915_
-.subckt mx2_x2 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29856_ i1=$abc$109383$new_n29851_ q=$abc$109383$new_n29916_
-.subckt mx2_x2 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29916_ i1=$abc$109383$new_n29915_ q=$abc$109383$new_n29917_
-.subckt mx2_x2 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29862_ i1=$abc$109383$new_n29859_ q=$abc$109383$new_n29918_
-.subckt mx2_x2 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29863_ i1=$abc$109383$new_n29918_ q=$abc$109383$new_n29919_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29919_ i1=$abc$109383$new_n29917_ q=$abc$109383$new_n29920_
-.subckt mx2_x2 cmd=$abc$109383$new_n29239_ i0=$abc$109383$new_n29920_ i1=$abc$109383$new_n29914_ q=$abc$109383$new_n29921_
+.subckt and21nor_x1 i0=$abc$109383$new_n29909_ i1=$abc$109383$new_n29890_ i2=$abc$109383$new_n29873_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102442
+.subckt mux2_x1 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29597_ i1=$abc$109383$new_n29383_ q=$abc$109383$new_n29911_
+.subckt mux2_x1 cmd=$abc$109383$new_n29382_ i0=$abc$109383$new_n29840_ i1=$abc$109383$new_n29821_ q=$abc$109383$new_n29912_
+.subckt mux2_x1 cmd=$abc$109383$new_n29893_ i0=$abc$109383$new_n29691_ i1=$abc$109383$new_n29912_ q=$abc$109383$new_n29913_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29913_ i1=$abc$109383$new_n29911_ q=$abc$109383$new_n29914_
+.subckt mux2_x1 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29848_ i1=$abc$109383$new_n29844_ q=$abc$109383$new_n29915_
+.subckt mux2_x1 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29856_ i1=$abc$109383$new_n29851_ q=$abc$109383$new_n29916_
+.subckt mux2_x1 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29916_ i1=$abc$109383$new_n29915_ q=$abc$109383$new_n29917_
+.subckt mux2_x1 cmd=$abc$109383$new_n29381_ i0=$abc$109383$new_n29862_ i1=$abc$109383$new_n29859_ q=$abc$109383$new_n29918_
+.subckt mux2_x1 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29863_ i1=$abc$109383$new_n29918_ q=$abc$109383$new_n29919_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29919_ i1=$abc$109383$new_n29917_ q=$abc$109383$new_n29920_
+.subckt mux2_x1 cmd=$abc$109383$new_n29239_ i0=$abc$109383$new_n29920_ i1=$abc$109383$new_n29914_ q=$abc$109383$new_n29921_
 .subckt buf_x4 i=$abc$109383$new_n17846_ q=$abc$109383$new_n29922_
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n29923_
-.subckt mx2_x2 cmd=$abc$109383$new_n29923_ i0=$abc$109383$new_n29921_ i1=soc.cpu.minerva.shifter.m_result$9[4] q=$abc$109383$new_n29924_
-.subckt a2_x2 i0=$abc$109383$new_n29924_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102446
-.subckt ao22_x2 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[5] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29926_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29879_ i1=$abc$109383$new_n29877_ q=$abc$109383$new_n29927_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29883_ i1=$abc$109383$new_n29880_ q=$abc$109383$new_n29928_
-.subckt mx2_x2 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29928_ i1=$abc$109383$new_n29927_ q=$abc$109383$new_n29929_
-.subckt mx2_x2 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29886_ i1=$abc$109383$new_n29884_ q=$abc$109383$new_n29930_
-.subckt mx2_x2 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29930_ i1=$abc$109383$new_n29863_ q=$abc$109383$new_n29931_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29931_ i1=$abc$109383$new_n29929_ q=$abc$109383$new_n29932_
-.subckt o2_x2 i0=$abc$109383$new_n29785_ i1=$abc$109383$new_n29264_ q=$abc$109383$new_n29933_
-.subckt ao22_x2 i0=$abc$109383$new_n29894_ i1=$abc$109383$new_n29774_ i2=$abc$109383$new_n29771_ q=$abc$109383$new_n29934_
+.subckt mux2_x1 cmd=$abc$109383$new_n29923_ i0=$abc$109383$new_n29921_ i1=soc.cpu.minerva.shifter.m_result$9[4] q=$abc$109383$new_n29924_
+.subckt and2_x1 i0=$abc$109383$new_n29924_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102446
+.subckt and21nor_x1 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[5] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29926_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29879_ i1=$abc$109383$new_n29877_ q=$abc$109383$new_n29927_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29883_ i1=$abc$109383$new_n29880_ q=$abc$109383$new_n29928_
+.subckt mux2_x1 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29928_ i1=$abc$109383$new_n29927_ q=$abc$109383$new_n29929_
+.subckt mux2_x1 cmd=$abc$109383$new_n29760_ i0=$abc$109383$new_n29886_ i1=$abc$109383$new_n29884_ q=$abc$109383$new_n29930_
+.subckt mux2_x1 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29930_ i1=$abc$109383$new_n29863_ q=$abc$109383$new_n29931_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29931_ i1=$abc$109383$new_n29929_ q=$abc$109383$new_n29932_
+.subckt or2_x1 i0=$abc$109383$new_n29785_ i1=$abc$109383$new_n29264_ q=$abc$109383$new_n29933_
+.subckt and21nor_x1 i0=$abc$109383$new_n29894_ i1=$abc$109383$new_n29774_ i2=$abc$109383$new_n29771_ nq=$abc$109383$new_n29934_
 .subckt nand2_x0 i0=$abc$109383$new_n29934_ i1=$abc$109383$new_n29933_ nq=$abc$109383$new_n29935_
-.subckt mx2_x2 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29838_ i1=$abc$109383$new_n29820_ q=$abc$109383$new_n29936_
-.subckt mx2_x2 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29876_ i1=$abc$109383$new_n29936_ q=$abc$109383$new_n29937_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29937_ i1=$abc$109383$new_n29789_ q=$abc$109383$new_n29938_
+.subckt mux2_x1 cmd=$abc$109383$new_n29702_ i0=$abc$109383$new_n29838_ i1=$abc$109383$new_n29820_ q=$abc$109383$new_n29936_
+.subckt mux2_x1 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29876_ i1=$abc$109383$new_n29936_ q=$abc$109383$new_n29937_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29937_ i1=$abc$109383$new_n29789_ q=$abc$109383$new_n29938_
 .subckt nand2_x0 i0=$abc$109383$new_n29938_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n29939_
 .subckt nand2_x0 i0=$abc$109383$new_n29939_ i1=$abc$109383$new_n29935_ nq=$abc$109383$new_n29940_
-.subckt mx2_x2 cmd=$abc$109383$new_n29837_ i0=$abc$109383$new_n29940_ i1=$abc$109383$new_n29932_ q=$abc$109383$new_n29941_
+.subckt mux2_x1 cmd=$abc$109383$new_n29837_ i0=$abc$109383$new_n29940_ i1=$abc$109383$new_n29932_ q=$abc$109383$new_n29941_
 .subckt buf_x4 i=$abc$109383$new_n29222_ q=$abc$109383$new_n29942_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n29941_ i2=$abc$109383$new_n29926_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102450
-.subckt mx2_x2 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29827_ i1=$abc$109383$new_n29819_ q=$abc$109383$new_n29944_
-.subckt mx2_x2 cmd=$abc$109383$new_n29893_ i0=$abc$109383$new_n29822_ i1=$abc$109383$new_n29845_ q=$abc$109383$new_n29945_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29945_ i1=$abc$109383$new_n29944_ q=$abc$109383$new_n29946_
-.subckt mx2_x2 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29860_ i1=$abc$109383$new_n29852_ q=$abc$109383$new_n29947_
-.subckt mx2_x2 cmd=$abc$109383$new_n29893_ i0=$abc$109383$new_n29864_ i1=$abc$109383$new_n29863_ q=$abc$109383$new_n29948_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29948_ i1=$abc$109383$new_n29947_ q=$abc$109383$new_n29949_
-.subckt mx2_x2 cmd=$abc$109383$new_n29238_ i0=$abc$109383$new_n29949_ i1=$abc$109383$new_n29946_ q=$abc$109383$new_n29950_
-.subckt mx2_x2 cmd=$abc$109383$new_n29923_ i0=$abc$109383$new_n29950_ i1=soc.cpu.minerva.shifter.m_result$9[6] q=$abc$109383$new_n29951_
-.subckt a2_x2 i0=$abc$109383$new_n29951_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102454
-.subckt ao22_x2 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[7] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29953_
-.subckt mx2_x2 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29885_ i1=$abc$109383$new_n29881_ q=$abc$109383$new_n29954_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29894_ i3=$abc$109383$new_n29492_ q=$abc$109383$new_n29955_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29385_ i3=$abc$109383$new_n29491_ q=$abc$109383$new_n29956_
-.subckt a3_x2 i0=$abc$109383$new_n29807_ i1=$abc$109383$new_n29805_ i2=$abc$109383$new_n29382_ q=$abc$109383$new_n29957_
-.subckt ao22_x2 i0=$abc$109383$new_n29957_ i1=$abc$109383$new_n29956_ i2=$abc$109383$new_n29263_ q=$abc$109383$new_n29958_
-.subckt o2_x2 i0=$abc$109383$new_n29958_ i1=$abc$109383$new_n29955_ q=$abc$109383$new_n29959_
-.subckt mx2_x2 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29959_ i1=$abc$109383$new_n29954_ q=$abc$109383$new_n29960_
-.subckt mx2_x2 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29786_ i1=$abc$109383$new_n29784_ q=$abc$109383$new_n29961_
-.subckt o2_x2 i0=$abc$109383$new_n29961_ i1=$abc$109383$new_n29264_ q=$abc$109383$new_n29962_
-.subckt ao22_x2 i0=$abc$109383$new_n29894_ i1=$abc$109383$new_n29891_ i2=$abc$109383$new_n29249_ q=$abc$109383$new_n29963_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n29941_ i2=$abc$109383$new_n29926_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102450
+.subckt mux2_x1 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29827_ i1=$abc$109383$new_n29819_ q=$abc$109383$new_n29944_
+.subckt mux2_x1 cmd=$abc$109383$new_n29893_ i0=$abc$109383$new_n29822_ i1=$abc$109383$new_n29845_ q=$abc$109383$new_n29945_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29945_ i1=$abc$109383$new_n29944_ q=$abc$109383$new_n29946_
+.subckt mux2_x1 cmd=$abc$109383$new_n29263_ i0=$abc$109383$new_n29860_ i1=$abc$109383$new_n29852_ q=$abc$109383$new_n29947_
+.subckt mux2_x1 cmd=$abc$109383$new_n29893_ i0=$abc$109383$new_n29864_ i1=$abc$109383$new_n29863_ q=$abc$109383$new_n29948_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29948_ i1=$abc$109383$new_n29947_ q=$abc$109383$new_n29949_
+.subckt mux2_x1 cmd=$abc$109383$new_n29238_ i0=$abc$109383$new_n29949_ i1=$abc$109383$new_n29946_ q=$abc$109383$new_n29950_
+.subckt mux2_x1 cmd=$abc$109383$new_n29923_ i0=$abc$109383$new_n29950_ i1=soc.cpu.minerva.shifter.m_result$9[6] q=$abc$109383$new_n29951_
+.subckt and2_x1 i0=$abc$109383$new_n29951_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102454
+.subckt and21nor_x1 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[7] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29953_
+.subckt mux2_x1 cmd=$abc$109383$new_n29729_ i0=$abc$109383$new_n29885_ i1=$abc$109383$new_n29881_ q=$abc$109383$new_n29954_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29894_ i3=$abc$109383$new_n29492_ q=$abc$109383$new_n29955_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29385_ i3=$abc$109383$new_n29491_ q=$abc$109383$new_n29956_
+.subckt and3_x1 i0=$abc$109383$new_n29807_ i1=$abc$109383$new_n29805_ i2=$abc$109383$new_n29382_ q=$abc$109383$new_n29957_
+.subckt and21nor_x1 i0=$abc$109383$new_n29957_ i1=$abc$109383$new_n29956_ i2=$abc$109383$new_n29263_ nq=$abc$109383$new_n29958_
+.subckt or2_x1 i0=$abc$109383$new_n29958_ i1=$abc$109383$new_n29955_ q=$abc$109383$new_n29959_
+.subckt mux2_x1 cmd=$abc$109383$new_n29249_ i0=$abc$109383$new_n29959_ i1=$abc$109383$new_n29954_ q=$abc$109383$new_n29960_
+.subckt mux2_x1 cmd=$abc$109383$new_n29438_ i0=$abc$109383$new_n29786_ i1=$abc$109383$new_n29784_ q=$abc$109383$new_n29961_
+.subckt or2_x1 i0=$abc$109383$new_n29961_ i1=$abc$109383$new_n29264_ q=$abc$109383$new_n29962_
+.subckt and21nor_x1 i0=$abc$109383$new_n29894_ i1=$abc$109383$new_n29891_ i2=$abc$109383$new_n29249_ nq=$abc$109383$new_n29963_
 .subckt nand2_x0 i0=$abc$109383$new_n29963_ i1=$abc$109383$new_n29962_ nq=$abc$109383$new_n29964_
-.subckt mx2_x2 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29936_ i1=$abc$109383$new_n29788_ q=$abc$109383$new_n29965_
-.subckt mx2_x2 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29965_ i1=$abc$109383$new_n29878_ q=$abc$109383$new_n29966_
+.subckt mux2_x1 cmd=$abc$109383$new_n29711_ i0=$abc$109383$new_n29936_ i1=$abc$109383$new_n29788_ q=$abc$109383$new_n29965_
+.subckt mux2_x1 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29965_ i1=$abc$109383$new_n29878_ q=$abc$109383$new_n29966_
 .subckt nand2_x0 i0=$abc$109383$new_n29966_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n29967_
 .subckt nand2_x0 i0=$abc$109383$new_n29967_ i1=$abc$109383$new_n29964_ nq=$abc$109383$new_n29968_
-.subckt mx2_x2 cmd=$abc$109383$new_n29837_ i0=$abc$109383$new_n29968_ i1=$abc$109383$new_n29960_ q=$abc$109383$new_n29969_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n29969_ i2=$abc$109383$new_n29953_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102458
-.subckt ao22_x2 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[8] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29971_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29915_ i1=$abc$109383$new_n29912_ q=$abc$109383$new_n29972_
-.subckt mx2_x2 cmd=$abc$109383$new_n29499_ i0=$abc$109383$new_n29693_ i1=$abc$109383$new_n29972_ q=$abc$109383$new_n29973_
+.subckt mux2_x1 cmd=$abc$109383$new_n29837_ i0=$abc$109383$new_n29968_ i1=$abc$109383$new_n29960_ q=$abc$109383$new_n29969_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n29969_ i2=$abc$109383$new_n29953_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102458
+.subckt and21nor_x1 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[8] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29971_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29915_ i1=$abc$109383$new_n29912_ q=$abc$109383$new_n29972_
+.subckt mux2_x1 cmd=$abc$109383$new_n29499_ i0=$abc$109383$new_n29693_ i1=$abc$109383$new_n29972_ q=$abc$109383$new_n29973_
 .subckt buf_x4 i=$abc$109383$new_n29239_ q=$abc$109383$new_n29974_
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n29973_ i2=$abc$109383$new_n29875_ q=$abc$109383$new_n29975_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29498_ i3=$abc$109383$new_n29492_ q=$abc$109383$new_n29976_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29918_ i1=$abc$109383$new_n29916_ q=$abc$109383$new_n29977_
-.subckt oa22_x2 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29977_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n29978_
-.subckt a2_x2 i0=$abc$109383$new_n29978_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n29979_
-.subckt ao22_x2 i0=$abc$109383$new_n29979_ i1=$abc$109383$new_n29975_ i2=$abc$109383$new_n29971_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102462
-.subckt ao22_x2 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[9] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29981_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29927_ i1=$abc$109383$new_n29937_ q=$abc$109383$new_n29982_
-.subckt mx2_x2 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29982_ i1=$abc$109383$new_n29790_ q=$abc$109383$new_n29983_
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n29983_ i2=$abc$109383$new_n29875_ q=$abc$109383$new_n29984_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29930_ i1=$abc$109383$new_n29928_ q=$abc$109383$new_n29985_
-.subckt oa22_x2 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29985_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n29986_
-.subckt a2_x2 i0=$abc$109383$new_n29986_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n29987_
-.subckt ao22_x2 i0=$abc$109383$new_n29987_ i1=$abc$109383$new_n29984_ i2=$abc$109383$new_n29981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102466
-.subckt ao22_x2 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[10] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29989_
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n29973_ i2=$abc$109383$new_n29875_ nq=$abc$109383$new_n29975_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29498_ i3=$abc$109383$new_n29492_ q=$abc$109383$new_n29976_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29918_ i1=$abc$109383$new_n29916_ q=$abc$109383$new_n29977_
+.subckt or21nand_x1 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29977_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n29978_
+.subckt and2_x1 i0=$abc$109383$new_n29978_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n29979_
+.subckt and21nor_x1 i0=$abc$109383$new_n29979_ i1=$abc$109383$new_n29975_ i2=$abc$109383$new_n29971_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102462
+.subckt and21nor_x1 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[9] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29981_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29927_ i1=$abc$109383$new_n29937_ q=$abc$109383$new_n29982_
+.subckt mux2_x1 cmd=$abc$109383$new_n29771_ i0=$abc$109383$new_n29982_ i1=$abc$109383$new_n29790_ q=$abc$109383$new_n29983_
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n29983_ i2=$abc$109383$new_n29875_ nq=$abc$109383$new_n29984_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29930_ i1=$abc$109383$new_n29928_ q=$abc$109383$new_n29985_
+.subckt or21nand_x1 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29985_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n29986_
+.subckt and2_x1 i0=$abc$109383$new_n29986_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n29987_
+.subckt and21nor_x1 i0=$abc$109383$new_n29987_ i1=$abc$109383$new_n29984_ i2=$abc$109383$new_n29981_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102466
+.subckt and21nor_x1 i0=$abc$109383$new_n29816_ i1=soc.cpu.minerva.shifter.m_result$9[10] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29989_
 .subckt nand2_x0 i0=$abc$109383$new_n29823_ i1=$abc$109383$new_n29250_ nq=$abc$109383$new_n29990_
 .subckt nand2_x0 i0=$abc$109383$new_n29853_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n29991_
 .subckt nand3_x0 i0=$abc$109383$new_n29991_ i1=$abc$109383$new_n29990_ i2=$abc$109383$new_n29974_ nq=$abc$109383$new_n29992_
-.subckt oa22_x2 i0=$abc$109383$new_n29771_ i1=$abc$109383$new_n29865_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n29993_
-.subckt ao22_x2 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n29993_ i2=$abc$109383$new_n29992_ q=$abc$109383$new_n29994_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n29994_ i2=$abc$109383$new_n29989_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102470
+.subckt or21nand_x1 i0=$abc$109383$new_n29771_ i1=$abc$109383$new_n29865_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n29993_
+.subckt and21nor_x1 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n29993_ i2=$abc$109383$new_n29992_ nq=$abc$109383$new_n29994_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n29994_ i2=$abc$109383$new_n29989_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102470
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n29996_
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n29997_
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.shifter.m_result$9[11] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n29998_
-.subckt mx2_x2 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29965_ i1=$abc$109383$new_n29961_ q=$abc$109383$new_n29999_
-.subckt mx2_x2 cmd=$abc$109383$new_n29498_ i0=$abc$109383$new_n29999_ i1=$abc$109383$new_n29882_ q=$abc$109383$new_n30000_
-.subckt oa22_x2 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n30000_ i2=$abc$109383$new_n29875_ q=$abc$109383$new_n30001_
-.subckt oa22_x2 i0=$abc$109383$new_n29771_ i1=$abc$109383$new_n29888_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n30002_
-.subckt a2_x2 i0=$abc$109383$new_n30002_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n30003_
-.subckt ao22_x2 i0=$abc$109383$new_n30003_ i1=$abc$109383$new_n30001_ i2=$abc$109383$new_n29998_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102474
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.shifter.m_result$9[11] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n29998_
+.subckt mux2_x1 cmd=$abc$109383$new_n29692_ i0=$abc$109383$new_n29965_ i1=$abc$109383$new_n29961_ q=$abc$109383$new_n29999_
+.subckt mux2_x1 cmd=$abc$109383$new_n29498_ i0=$abc$109383$new_n29999_ i1=$abc$109383$new_n29882_ q=$abc$109383$new_n30000_
+.subckt or21nand_x1 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n30000_ i2=$abc$109383$new_n29875_ nq=$abc$109383$new_n30001_
+.subckt or21nand_x1 i0=$abc$109383$new_n29771_ i1=$abc$109383$new_n29888_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n30002_
+.subckt and2_x1 i0=$abc$109383$new_n30002_ i1=$abc$109383$new_n29837_ q=$abc$109383$new_n30003_
+.subckt and21nor_x1 i0=$abc$109383$new_n30003_ i1=$abc$109383$new_n30001_ i2=$abc$109383$new_n29998_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102474
 .subckt nand2_x0 i0=$abc$109383$new_n29223_ i1=soc.cpu.minerva.shifter.m_result$9[12] nq=$abc$109383$new_n30005_
 .subckt nand2_x0 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n29499_ nq=$abc$109383$new_n30006_
-.subckt o2_x2 i0=$abc$109383$new_n29917_ i1=$abc$109383$new_n30006_ q=$abc$109383$new_n30007_
-.subckt o2_x2 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29498_ q=$abc$109383$new_n30008_
-.subckt o2_x2 i0=$abc$109383$new_n29913_ i1=$abc$109383$new_n30008_ q=$abc$109383$new_n30009_
+.subckt or2_x1 i0=$abc$109383$new_n29917_ i1=$abc$109383$new_n30006_ q=$abc$109383$new_n30007_
+.subckt or2_x1 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29498_ q=$abc$109383$new_n30008_
+.subckt or2_x1 i0=$abc$109383$new_n29913_ i1=$abc$109383$new_n30008_ q=$abc$109383$new_n30009_
 .subckt nand3_x0 i0=$abc$109383$new_n30009_ i1=$abc$109383$new_n30007_ i2=$abc$109383$new_n29770_ nq=$abc$109383$new_n30010_
-.subckt oa22_x2 i0=$abc$109383$new_n29771_ i1=$abc$109383$new_n29919_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n30011_
+.subckt or21nand_x1 i0=$abc$109383$new_n29771_ i1=$abc$109383$new_n29919_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n30011_
 .subckt nor2_x0 i0=$abc$109383$new_n30011_ i1=$abc$109383$new_n29974_ nq=$abc$109383$new_n30012_
-.subckt ao22_x2 i0=$abc$109383$new_n30012_ i1=$abc$109383$new_n30010_ i2=$abc$109383$new_n30005_ q=$abc$109383$new_n30013_
+.subckt and21nor_x1 i0=$abc$109383$new_n30012_ i1=$abc$109383$new_n30010_ i2=$abc$109383$new_n30005_ nq=$abc$109383$new_n30013_
 .subckt nor2_x0 i0=$abc$109383$new_n30013_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102478
 .subckt nand2_x0 i0=$abc$109383$new_n29223_ i1=soc.cpu.minerva.shifter.m_result$9[13] nq=$abc$109383$new_n30015_
-.subckt o2_x2 i0=$abc$109383$new_n29929_ i1=$abc$109383$new_n30006_ q=$abc$109383$new_n30016_
-.subckt o2_x2 i0=$abc$109383$new_n29938_ i1=$abc$109383$new_n30008_ q=$abc$109383$new_n30017_
+.subckt or2_x1 i0=$abc$109383$new_n29929_ i1=$abc$109383$new_n30006_ q=$abc$109383$new_n30016_
+.subckt or2_x1 i0=$abc$109383$new_n29938_ i1=$abc$109383$new_n30008_ q=$abc$109383$new_n30017_
 .subckt nand3_x0 i0=$abc$109383$new_n30017_ i1=$abc$109383$new_n30016_ i2=$abc$109383$new_n29770_ nq=$abc$109383$new_n30018_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29498_ i3=$abc$109383$new_n29492_ nq=$abc$109383$new_n30019_
-.subckt mx2_x2 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29809_ i1=$abc$109383$new_n29806_ q=$abc$109383$new_n30020_
-.subckt ao22_x2 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n30020_ i2=$abc$109383$new_n30019_ q=$abc$109383$new_n30021_
-.subckt a2_x2 i0=$abc$109383$new_n30021_ i1=$abc$109383$new_n29764_ q=$abc$109383$new_n30022_
-.subckt ao22_x2 i0=$abc$109383$new_n30022_ i1=$abc$109383$new_n30018_ i2=$abc$109383$new_n30015_ q=$abc$109383$new_n30023_
+.subckt mux2_x1 cmd=$abc$109383$new_n29894_ i0=$abc$109383$new_n29809_ i1=$abc$109383$new_n29806_ q=$abc$109383$new_n30020_
+.subckt and21nor_x1 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n30020_ i2=$abc$109383$new_n30019_ nq=$abc$109383$new_n30021_
+.subckt and2_x1 i0=$abc$109383$new_n30021_ i1=$abc$109383$new_n29764_ q=$abc$109383$new_n30022_
+.subckt and21nor_x1 i0=$abc$109383$new_n30022_ i1=$abc$109383$new_n30018_ i2=$abc$109383$new_n30015_ nq=$abc$109383$new_n30023_
 .subckt nor2_x0 i0=$abc$109383$new_n30023_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102482
-.subckt oa22_x2 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29948_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n30025_
+.subckt or21nand_x1 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29948_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n30025_
 .subckt nand2_x0 i0=$abc$109383$new_n30025_ i1=$abc$109383$new_n29837_ nq=$abc$109383$new_n30026_
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n30027_
 .subckt nand2_x0 i0=$abc$109383$new_n29947_ i1=$abc$109383$new_n29818_ nq=$abc$109383$new_n30028_
 .subckt nand2_x0 i0=$abc$109383$new_n29945_ i1=$abc$109383$new_n29829_ nq=$abc$109383$new_n30029_
-.subckt a3_x2 i0=$abc$109383$new_n30029_ i1=$abc$109383$new_n30028_ i2=$abc$109383$new_n30027_ q=$abc$109383$new_n30030_
-.subckt a2_x2 i0=$abc$109383$new_n30030_ i1=$abc$109383$new_n30026_ q=$abc$109383$new_n30031_
+.subckt and3_x1 i0=$abc$109383$new_n30029_ i1=$abc$109383$new_n30028_ i2=$abc$109383$new_n30027_ q=$abc$109383$new_n30030_
+.subckt and2_x1 i0=$abc$109383$new_n30030_ i1=$abc$109383$new_n30026_ q=$abc$109383$new_n30031_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[14] nq=$abc$109383$new_n30032_
-.subckt oa22_x2 i0=$abc$109383$new_n29223_ i1=$abc$109383$new_n30032_ i2=$abc$109383$new_n29220_ q=$abc$109383$new_n30033_
+.subckt or21nand_x1 i0=$abc$109383$new_n29223_ i1=$abc$109383$new_n30032_ i2=$abc$109383$new_n29220_ nq=$abc$109383$new_n30033_
 .subckt nor2_x0 i0=$abc$109383$new_n30033_ i1=$abc$109383$new_n30031_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102486
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.shifter.m_result$9[15] i2=$abc$109383$new_n27902_ q=$abc$109383$new_n30035_
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.shifter.m_result$9[15] i2=$abc$109383$new_n27902_ nq=$abc$109383$new_n30035_
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n30036_
-.subckt mx2_x2 cmd=$abc$109383$new_n29498_ i0=$abc$109383$new_n29966_ i1=$abc$109383$new_n29954_ q=$abc$109383$new_n30037_
-.subckt oa22_x2 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n30037_ i2=$abc$109383$new_n30036_ q=$abc$109383$new_n30038_
-.subckt ao22_x2 i0=$abc$109383$new_n29958_ i1=$abc$109383$new_n29955_ i2=$abc$109383$new_n29771_ q=$abc$109383$new_n30039_
-.subckt ao22_x2 i0=$abc$109383$new_n30039_ i1=$abc$109383$new_n29976_ i2=$abc$109383$new_n29837_ q=$abc$109383$new_n30040_
-.subckt ao22_x2 i0=$abc$109383$new_n30040_ i1=$abc$109383$new_n30038_ i2=$abc$109383$new_n30035_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102490
-.subckt a4_x2 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29237_ i3=$abc$109383$new_n29491_ q=$abc$109383$new_n30042_
-.subckt o3_x2 i0=$abc$109383$new_n30042_ i1=$abc$109383$new_n15236_ i2=$abc$109383$new_n15235_ q=$abc$109383$new_n30043_
+.subckt mux2_x1 cmd=$abc$109383$new_n29498_ i0=$abc$109383$new_n29966_ i1=$abc$109383$new_n29954_ q=$abc$109383$new_n30037_
+.subckt or21nand_x1 i0=$abc$109383$new_n29239_ i1=$abc$109383$new_n30037_ i2=$abc$109383$new_n30036_ nq=$abc$109383$new_n30038_
+.subckt and21nor_x1 i0=$abc$109383$new_n29958_ i1=$abc$109383$new_n29955_ i2=$abc$109383$new_n29771_ nq=$abc$109383$new_n30039_
+.subckt and21nor_x1 i0=$abc$109383$new_n30039_ i1=$abc$109383$new_n29976_ i2=$abc$109383$new_n29837_ nq=$abc$109383$new_n30040_
+.subckt and21nor_x1 i0=$abc$109383$new_n30040_ i1=$abc$109383$new_n30038_ i2=$abc$109383$new_n30035_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102490
+.subckt and4_x1 i0=soc.cpu.minerva.payload__sext$58 i1=$abc$109383$new_n29408_ i2=$abc$109383$new_n29237_ i3=$abc$109383$new_n29491_ q=$abc$109383$new_n30042_
+.subckt or3_x1 i0=$abc$109383$new_n30042_ i1=$abc$109383$new_n15236_ i2=$abc$109383$new_n15235_ q=$abc$109383$new_n30043_
 .subckt buf_x4 i=$abc$109383$new_n30043_ q=$abc$109383$new_n30044_
-.subckt mx2_x2 cmd=$abc$109383$new_n29250_ i0=$abc$109383$new_n29977_ i1=$abc$109383$new_n29972_ q=$abc$109383$new_n30045_
+.subckt mux2_x1 cmd=$abc$109383$new_n29250_ i0=$abc$109383$new_n29977_ i1=$abc$109383$new_n29972_ q=$abc$109383$new_n30045_
 .subckt buf_x4 i=$abc$109383$new_n29239_ q=$abc$109383$new_n30046_
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n30045_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30047_
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n30045_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30047_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[16] nq=$abc$109383$new_n30048_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n30049_
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30048_ q=$abc$109383$new_n30050_
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30048_ nq=$abc$109383$new_n30050_
 .subckt nor2_x0 i0=$abc$109383$new_n30050_ i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n30051_
-.subckt a2_x2 i0=$abc$109383$new_n30051_ i1=$abc$109383$new_n30047_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102494
-.subckt mx2_x2 cmd=$abc$109383$new_n29250_ i0=$abc$109383$new_n29985_ i1=$abc$109383$new_n29982_ q=$abc$109383$new_n30053_
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n30053_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30054_
+.subckt and2_x1 i0=$abc$109383$new_n30051_ i1=$abc$109383$new_n30047_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102494
+.subckt mux2_x1 cmd=$abc$109383$new_n29250_ i0=$abc$109383$new_n29985_ i1=$abc$109383$new_n29982_ q=$abc$109383$new_n30053_
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n30053_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30054_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[17] nq=$abc$109383$new_n30055_
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30055_ q=$abc$109383$new_n30056_
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30055_ nq=$abc$109383$new_n30056_
 .subckt nor2_x0 i0=$abc$109383$new_n30056_ i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n30057_
-.subckt a2_x2 i0=$abc$109383$new_n30057_ i1=$abc$109383$new_n30054_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102498
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29866_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30059_
+.subckt and2_x1 i0=$abc$109383$new_n30057_ i1=$abc$109383$new_n30054_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102498
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29866_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30059_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[18] nq=$abc$109383$new_n30060_
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30060_ q=$abc$109383$new_n30061_
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30060_ nq=$abc$109383$new_n30061_
 .subckt nor2_x0 i0=$abc$109383$new_n30061_ i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n30062_
-.subckt a2_x2 i0=$abc$109383$new_n30062_ i1=$abc$109383$new_n30059_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102502
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29889_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30064_
+.subckt and2_x1 i0=$abc$109383$new_n30062_ i1=$abc$109383$new_n30059_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102502
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29889_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30064_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[19] nq=$abc$109383$new_n30065_
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30065_ q=$abc$109383$new_n30066_
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30065_ nq=$abc$109383$new_n30066_
 .subckt nor2_x0 i0=$abc$109383$new_n30066_ i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n30067_
-.subckt a2_x2 i0=$abc$109383$new_n30067_ i1=$abc$109383$new_n30064_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102506
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29920_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30069_
+.subckt and2_x1 i0=$abc$109383$new_n30067_ i1=$abc$109383$new_n30064_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102506
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29920_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30069_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[20] nq=$abc$109383$new_n30070_
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30070_ q=$abc$109383$new_n30071_
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30070_ nq=$abc$109383$new_n30071_
 .subckt nor2_x0 i0=$abc$109383$new_n30071_ i1=$abc$109383$new_n28455_ nq=$abc$109383$new_n30072_
-.subckt a2_x2 i0=$abc$109383$new_n30072_ i1=$abc$109383$new_n30069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102510
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29932_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30074_
+.subckt and2_x1 i0=$abc$109383$new_n30072_ i1=$abc$109383$new_n30069_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102510
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29932_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30074_
 .subckt buf_x4 i=$abc$109383$new_n27993_ q=$abc$109383$new_n30075_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[21] nq=$abc$109383$new_n30076_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n30077_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30076_ q=$abc$109383$new_n30078_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30049_ i2=$abc$109383$new_n30076_ nq=$abc$109383$new_n30078_
 .subckt nor2_x0 i0=$abc$109383$new_n30078_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30079_
-.subckt a2_x2 i0=$abc$109383$new_n30079_ i1=$abc$109383$new_n30074_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102514
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29949_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30081_
+.subckt and2_x1 i0=$abc$109383$new_n30079_ i1=$abc$109383$new_n30074_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102514
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29949_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30081_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[22] nq=$abc$109383$new_n30082_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n30083_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30082_ q=$abc$109383$new_n30084_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30082_ nq=$abc$109383$new_n30084_
 .subckt nor2_x0 i0=$abc$109383$new_n30084_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30085_
-.subckt a2_x2 i0=$abc$109383$new_n30085_ i1=$abc$109383$new_n30081_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102518
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29960_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30087_
+.subckt and2_x1 i0=$abc$109383$new_n30085_ i1=$abc$109383$new_n30081_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102518
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29960_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30087_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[23] nq=$abc$109383$new_n30088_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30088_ q=$abc$109383$new_n30089_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30088_ nq=$abc$109383$new_n30089_
 .subckt nor2_x0 i0=$abc$109383$new_n30089_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30090_
-.subckt a2_x2 i0=$abc$109383$new_n30090_ i1=$abc$109383$new_n30087_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102522
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29978_ i2=$abc$109383$new_n30044_ q=$abc$109383$new_n30092_
+.subckt and2_x1 i0=$abc$109383$new_n30090_ i1=$abc$109383$new_n30087_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102522
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29978_ i2=$abc$109383$new_n30044_ nq=$abc$109383$new_n30092_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[24] nq=$abc$109383$new_n30093_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30093_ q=$abc$109383$new_n30094_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30093_ nq=$abc$109383$new_n30094_
 .subckt nor2_x0 i0=$abc$109383$new_n30094_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30095_
-.subckt a2_x2 i0=$abc$109383$new_n30095_ i1=$abc$109383$new_n30092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102526
-.subckt oa22_x2 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29986_ i2=$abc$109383$new_n30043_ q=$abc$109383$new_n30097_
+.subckt and2_x1 i0=$abc$109383$new_n30095_ i1=$abc$109383$new_n30092_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102526
+.subckt or21nand_x1 i0=$abc$109383$new_n30046_ i1=$abc$109383$new_n29986_ i2=$abc$109383$new_n30043_ nq=$abc$109383$new_n30097_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[25] nq=$abc$109383$new_n30098_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30098_ q=$abc$109383$new_n30099_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30098_ nq=$abc$109383$new_n30099_
 .subckt nor2_x0 i0=$abc$109383$new_n30099_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30100_
-.subckt a2_x2 i0=$abc$109383$new_n30100_ i1=$abc$109383$new_n30097_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102530
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n29993_ i2=$abc$109383$new_n30043_ q=$abc$109383$new_n30102_
+.subckt and2_x1 i0=$abc$109383$new_n30100_ i1=$abc$109383$new_n30097_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102530
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n29993_ i2=$abc$109383$new_n30043_ nq=$abc$109383$new_n30102_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[26] nq=$abc$109383$new_n30103_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30103_ q=$abc$109383$new_n30104_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30103_ nq=$abc$109383$new_n30104_
 .subckt nor2_x0 i0=$abc$109383$new_n30104_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30105_
-.subckt a2_x2 i0=$abc$109383$new_n30105_ i1=$abc$109383$new_n30102_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102534
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30002_ i2=$abc$109383$new_n30043_ q=$abc$109383$new_n30107_
+.subckt and2_x1 i0=$abc$109383$new_n30105_ i1=$abc$109383$new_n30102_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102534
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30002_ i2=$abc$109383$new_n30043_ nq=$abc$109383$new_n30107_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[27] nq=$abc$109383$new_n30108_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30108_ q=$abc$109383$new_n30109_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30108_ nq=$abc$109383$new_n30109_
 .subckt nor2_x0 i0=$abc$109383$new_n30109_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30110_
-.subckt a2_x2 i0=$abc$109383$new_n30110_ i1=$abc$109383$new_n30107_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102538
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30011_ i2=$abc$109383$new_n30043_ q=$abc$109383$new_n30112_
+.subckt and2_x1 i0=$abc$109383$new_n30110_ i1=$abc$109383$new_n30107_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102538
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30011_ i2=$abc$109383$new_n30043_ nq=$abc$109383$new_n30112_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[28] nq=$abc$109383$new_n30113_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30113_ q=$abc$109383$new_n30114_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30113_ nq=$abc$109383$new_n30114_
 .subckt nor2_x0 i0=$abc$109383$new_n30114_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30115_
-.subckt a2_x2 i0=$abc$109383$new_n30115_ i1=$abc$109383$new_n30112_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102542
-.subckt oa22_x2 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29931_ i2=$abc$109383$new_n29976_ q=$abc$109383$new_n30117_
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30117_ i2=$abc$109383$new_n30043_ q=$abc$109383$new_n30118_
+.subckt and2_x1 i0=$abc$109383$new_n30115_ i1=$abc$109383$new_n30112_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102542
+.subckt or21nand_x1 i0=$abc$109383$new_n29250_ i1=$abc$109383$new_n29931_ i2=$abc$109383$new_n29976_ nq=$abc$109383$new_n30117_
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30117_ i2=$abc$109383$new_n30043_ nq=$abc$109383$new_n30118_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[29] nq=$abc$109383$new_n30119_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30119_ q=$abc$109383$new_n30120_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30119_ nq=$abc$109383$new_n30120_
 .subckt nor2_x0 i0=$abc$109383$new_n30120_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30121_
-.subckt a2_x2 i0=$abc$109383$new_n30121_ i1=$abc$109383$new_n30118_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102546
-.subckt oa22_x2 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30025_ i2=$abc$109383$new_n30043_ q=$abc$109383$new_n30123_
+.subckt and2_x1 i0=$abc$109383$new_n30121_ i1=$abc$109383$new_n30118_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102546
+.subckt or21nand_x1 i0=$abc$109383$new_n29974_ i1=$abc$109383$new_n30025_ i2=$abc$109383$new_n30043_ nq=$abc$109383$new_n30123_
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[30] nq=$abc$109383$new_n30124_
-.subckt ao22_x2 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30124_ q=$abc$109383$new_n30125_
+.subckt and21nor_x1 i0=$abc$109383$new_n30077_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n30124_ nq=$abc$109383$new_n30125_
 .subckt nor2_x0 i0=$abc$109383$new_n30125_ i1=$abc$109383$new_n30075_ nq=$abc$109383$new_n30126_
-.subckt a2_x2 i0=$abc$109383$new_n30126_ i1=$abc$109383$new_n30123_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102550
+.subckt and2_x1 i0=$abc$109383$new_n30126_ i1=$abc$109383$new_n30123_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102550
 .subckt inv_x0 i=soc.cpu.minerva.shifter.m_result$9[31] nq=$abc$109383$new_n30128_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30128_ q=$abc$109383$new_n30129_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30128_ nq=$abc$109383$new_n30129_
 .subckt nor2_x0 i0=$abc$109383$new_n30129_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n30130_
-.subckt ao22_x2 i0=$abc$109383$new_n30039_ i1=$abc$109383$new_n29976_ i2=$abc$109383$new_n29974_ q=$abc$109383$new_n30131_
-.subckt ao22_x2 i0=$abc$109383$new_n30044_ i1=$abc$109383$new_n30131_ i2=$abc$109383$new_n30130_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102554
+.subckt and21nor_x1 i0=$abc$109383$new_n30039_ i1=$abc$109383$new_n29976_ i2=$abc$109383$new_n29974_ nq=$abc$109383$new_n30131_
+.subckt and21nor_x1 i0=$abc$109383$new_n30044_ i1=$abc$109383$new_n30131_ i2=$abc$109383$new_n30130_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102554
 .subckt buf_x4 i=$abc$109383$new_n27584_ q=$abc$109383$new_n30133_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[2] nq=$abc$109383$new_n30134_
 .subckt buf_x4 i=$abc$109383$new_n29825_ q=$abc$109383$new_n30135_
@@ -15414,8090 +15414,8090 @@
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n30140_
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n30141_
 .subckt buf_x4 i=$abc$109383$new_n30141_ q=$abc$109383$new_n30142_
-.subckt oa22_x2 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n30143_
-.subckt a3_x2 i0=$abc$109383$new_n30143_ i1=$abc$109383$new_n30139_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102558
+.subckt or21nand_x1 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[2] nq=$abc$109383$new_n30143_
+.subckt and3_x1 i0=$abc$109383$new_n30143_ i1=$abc$109383$new_n30139_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102558
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[3] nq=$abc$109383$new_n30145_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30145_ nq=$abc$109383$new_n30146_
-.subckt oa22_x2 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[3] q=$abc$109383$new_n30147_
-.subckt a3_x2 i0=$abc$109383$new_n30147_ i1=$abc$109383$new_n30146_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102562
+.subckt or21nand_x1 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[3] nq=$abc$109383$new_n30147_
+.subckt and3_x1 i0=$abc$109383$new_n30147_ i1=$abc$109383$new_n30146_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102562
 .subckt buf_x4 i=$abc$109383$new_n27421_ q=$abc$109383$new_n30149_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[4] nq=$abc$109383$new_n30150_
 .subckt buf_x4 i=$abc$109383$new_n17849_ q=$abc$109383$new_n30151_
 .subckt buf_x4 i=$abc$109383$new_n30151_ q=$abc$109383$new_n30152_
-.subckt ao22_x2 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29223_ i2=$abc$109383$new_n30150_ q=$abc$109383$new_n30153_
+.subckt and21nor_x1 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29223_ i2=$abc$109383$new_n30150_ nq=$abc$109383$new_n30153_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[4] nq=$abc$109383$new_n30154_
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n30155_
 .subckt buf_x4 i=$abc$109383$new_n30155_ q=$abc$109383$new_n30156_
-.subckt a3_x2 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n30140_ i2=$abc$109383$new_n30154_ q=$abc$109383$new_n30157_
+.subckt and3_x1 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n30140_ i2=$abc$109383$new_n30154_ q=$abc$109383$new_n30157_
 .subckt nor3_x0 i0=$abc$109383$new_n30157_ i1=$abc$109383$new_n30153_ i2=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102566
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[5] nq=$abc$109383$new_n30159_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30159_ nq=$abc$109383$new_n30160_
-.subckt oa22_x2 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[5] q=$abc$109383$new_n30161_
-.subckt a3_x2 i0=$abc$109383$new_n30161_ i1=$abc$109383$new_n30160_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102570
+.subckt or21nand_x1 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[5] nq=$abc$109383$new_n30161_
+.subckt and3_x1 i0=$abc$109383$new_n30161_ i1=$abc$109383$new_n30160_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102570
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[6] nq=$abc$109383$new_n30163_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30163_ nq=$abc$109383$new_n30164_
-.subckt oa22_x2 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[6] q=$abc$109383$new_n30165_
-.subckt a3_x2 i0=$abc$109383$new_n30165_ i1=$abc$109383$new_n30164_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102574
+.subckt or21nand_x1 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[6] nq=$abc$109383$new_n30165_
+.subckt and3_x1 i0=$abc$109383$new_n30165_ i1=$abc$109383$new_n30164_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102574
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[7] nq=$abc$109383$new_n30167_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30167_ nq=$abc$109383$new_n30168_
-.subckt oa22_x2 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[7] q=$abc$109383$new_n30169_
-.subckt a3_x2 i0=$abc$109383$new_n30169_ i1=$abc$109383$new_n30168_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102578
+.subckt or21nand_x1 i0=$abc$109383$new_n30142_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[7] nq=$abc$109383$new_n30169_
+.subckt and3_x1 i0=$abc$109383$new_n30169_ i1=$abc$109383$new_n30168_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102578
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[8] nq=$abc$109383$new_n30171_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30171_ nq=$abc$109383$new_n30172_
 .subckt buf_x4 i=$abc$109383$new_n30141_ q=$abc$109383$new_n30173_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[8] q=$abc$109383$new_n30174_
-.subckt a3_x2 i0=$abc$109383$new_n30174_ i1=$abc$109383$new_n30172_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102582
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[8] nq=$abc$109383$new_n30174_
+.subckt and3_x1 i0=$abc$109383$new_n30174_ i1=$abc$109383$new_n30172_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102582
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[9] nq=$abc$109383$new_n30176_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30176_ nq=$abc$109383$new_n30177_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[9] q=$abc$109383$new_n30178_
-.subckt a3_x2 i0=$abc$109383$new_n30178_ i1=$abc$109383$new_n30177_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102586
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[9] nq=$abc$109383$new_n30178_
+.subckt and3_x1 i0=$abc$109383$new_n30178_ i1=$abc$109383$new_n30177_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102586
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[10] nq=$abc$109383$new_n30180_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30180_ nq=$abc$109383$new_n30181_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[10] q=$abc$109383$new_n30182_
-.subckt a3_x2 i0=$abc$109383$new_n30182_ i1=$abc$109383$new_n30181_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102590
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[10] nq=$abc$109383$new_n30182_
+.subckt and3_x1 i0=$abc$109383$new_n30182_ i1=$abc$109383$new_n30181_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102590
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[11] nq=$abc$109383$new_n30184_
 .subckt nand3_x0 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n30136_ i2=$abc$109383$new_n30184_ nq=$abc$109383$new_n30185_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[11] q=$abc$109383$new_n30186_
-.subckt a3_x2 i0=$abc$109383$new_n30186_ i1=$abc$109383$new_n30185_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102594
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n30140_ i2=soc.cpu.minerva.payload__pc$32[11] nq=$abc$109383$new_n30186_
+.subckt and3_x1 i0=$abc$109383$new_n30186_ i1=$abc$109383$new_n30185_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102594
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n30188_
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n30189_
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.payload__pc$27[12] q=$abc$109383$new_n30190_
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.payload__pc$27[12] q=$abc$109383$new_n30190_
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n30191_
 .subckt buf_x4 i=$abc$109383$new_n17849_ q=$abc$109383$new_n30192_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n30193_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__pc$32[12] q=$abc$109383$new_n30194_
-.subckt ao22_x2 i0=$abc$109383$new_n30194_ i1=$abc$109383$new_n30190_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102598
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.payload__pc$27[13] q=$abc$109383$new_n30196_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__pc$32[13] q=$abc$109383$new_n30197_
-.subckt ao22_x2 i0=$abc$109383$new_n30197_ i1=$abc$109383$new_n30196_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102602
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.payload__pc$27[14] q=$abc$109383$new_n30199_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__pc$32[12] nq=$abc$109383$new_n30194_
+.subckt and21nor_x1 i0=$abc$109383$new_n30194_ i1=$abc$109383$new_n30190_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102598
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.payload__pc$27[13] q=$abc$109383$new_n30196_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__pc$32[13] nq=$abc$109383$new_n30197_
+.subckt and21nor_x1 i0=$abc$109383$new_n30197_ i1=$abc$109383$new_n30196_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102602
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.payload__pc$27[14] q=$abc$109383$new_n30199_
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n30200_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[14] q=$abc$109383$new_n30201_
-.subckt ao22_x2 i0=$abc$109383$new_n30201_ i1=$abc$109383$new_n30199_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102606
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[14] nq=$abc$109383$new_n30201_
+.subckt and21nor_x1 i0=$abc$109383$new_n30201_ i1=$abc$109383$new_n30199_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102606
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n30203_
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[15] q=$abc$109383$new_n30204_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[15] q=$abc$109383$new_n30205_
-.subckt ao22_x2 i0=$abc$109383$new_n30205_ i1=$abc$109383$new_n30204_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102610
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[16] q=$abc$109383$new_n30207_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[16] q=$abc$109383$new_n30208_
-.subckt ao22_x2 i0=$abc$109383$new_n30208_ i1=$abc$109383$new_n30207_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102614
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[17] q=$abc$109383$new_n30210_
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[15] q=$abc$109383$new_n30204_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[15] nq=$abc$109383$new_n30205_
+.subckt and21nor_x1 i0=$abc$109383$new_n30205_ i1=$abc$109383$new_n30204_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102610
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[16] q=$abc$109383$new_n30207_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[16] nq=$abc$109383$new_n30208_
+.subckt and21nor_x1 i0=$abc$109383$new_n30208_ i1=$abc$109383$new_n30207_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102614
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[17] q=$abc$109383$new_n30210_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n30211_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[17] q=$abc$109383$new_n30212_
-.subckt ao22_x2 i0=$abc$109383$new_n30212_ i1=$abc$109383$new_n30210_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102618
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[17] nq=$abc$109383$new_n30212_
+.subckt and21nor_x1 i0=$abc$109383$new_n30212_ i1=$abc$109383$new_n30210_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102618
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n30214_
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[18] q=$abc$109383$new_n30215_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[18] q=$abc$109383$new_n30216_
-.subckt ao22_x2 i0=$abc$109383$new_n30216_ i1=$abc$109383$new_n30215_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102622
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[19] q=$abc$109383$new_n30218_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[19] q=$abc$109383$new_n30219_
-.subckt ao22_x2 i0=$abc$109383$new_n30219_ i1=$abc$109383$new_n30218_ i2=$abc$109383$new_n29191_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102626
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[18] q=$abc$109383$new_n30215_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[18] nq=$abc$109383$new_n30216_
+.subckt and21nor_x1 i0=$abc$109383$new_n30216_ i1=$abc$109383$new_n30215_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102622
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[19] q=$abc$109383$new_n30218_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[19] nq=$abc$109383$new_n30219_
+.subckt and21nor_x1 i0=$abc$109383$new_n30219_ i1=$abc$109383$new_n30218_ i2=$abc$109383$new_n29191_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102626
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n30221_
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[20] q=$abc$109383$new_n30222_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[20] q=$abc$109383$new_n30223_
-.subckt ao22_x2 i0=$abc$109383$new_n30223_ i1=$abc$109383$new_n30222_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102630
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[21] q=$abc$109383$new_n30225_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[21] q=$abc$109383$new_n30226_
-.subckt ao22_x2 i0=$abc$109383$new_n30226_ i1=$abc$109383$new_n30225_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102634
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[22] q=$abc$109383$new_n30228_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[22] q=$abc$109383$new_n30229_
-.subckt ao22_x2 i0=$abc$109383$new_n30229_ i1=$abc$109383$new_n30228_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102638
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[23] q=$abc$109383$new_n30231_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[23] q=$abc$109383$new_n30232_
-.subckt ao22_x2 i0=$abc$109383$new_n30232_ i1=$abc$109383$new_n30231_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102642
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[24] q=$abc$109383$new_n30234_
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[20] q=$abc$109383$new_n30222_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[20] nq=$abc$109383$new_n30223_
+.subckt and21nor_x1 i0=$abc$109383$new_n30223_ i1=$abc$109383$new_n30222_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102630
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[21] q=$abc$109383$new_n30225_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[21] nq=$abc$109383$new_n30226_
+.subckt and21nor_x1 i0=$abc$109383$new_n30226_ i1=$abc$109383$new_n30225_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102634
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[22] q=$abc$109383$new_n30228_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[22] nq=$abc$109383$new_n30229_
+.subckt and21nor_x1 i0=$abc$109383$new_n30229_ i1=$abc$109383$new_n30228_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102638
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[23] q=$abc$109383$new_n30231_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30200_ i2=soc.cpu.minerva.payload__pc$32[23] nq=$abc$109383$new_n30232_
+.subckt and21nor_x1 i0=$abc$109383$new_n30232_ i1=$abc$109383$new_n30231_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102642
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30203_ i2=soc.cpu.minerva.payload__pc$27[24] q=$abc$109383$new_n30234_
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n30235_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[24] q=$abc$109383$new_n30236_
-.subckt ao22_x2 i0=$abc$109383$new_n30236_ i1=$abc$109383$new_n30234_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102646
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[24] nq=$abc$109383$new_n30236_
+.subckt and21nor_x1 i0=$abc$109383$new_n30236_ i1=$abc$109383$new_n30234_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102646
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n30238_
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[25] q=$abc$109383$new_n30239_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[25] q=$abc$109383$new_n30240_
-.subckt ao22_x2 i0=$abc$109383$new_n30240_ i1=$abc$109383$new_n30239_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102650
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[26] q=$abc$109383$new_n30242_
-.subckt ao22_x2 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[26] q=$abc$109383$new_n30243_
-.subckt ao22_x2 i0=$abc$109383$new_n30243_ i1=$abc$109383$new_n30242_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102654
-.subckt a3_x2 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[27] q=$abc$109383$new_n30245_
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[25] q=$abc$109383$new_n30239_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[25] nq=$abc$109383$new_n30240_
+.subckt and21nor_x1 i0=$abc$109383$new_n30240_ i1=$abc$109383$new_n30239_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102650
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[26] q=$abc$109383$new_n30242_
+.subckt and21nor_x1 i0=$abc$109383$new_n30211_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[26] nq=$abc$109383$new_n30243_
+.subckt and21nor_x1 i0=$abc$109383$new_n30243_ i1=$abc$109383$new_n30242_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102654
+.subckt and3_x1 i0=$abc$109383$new_n30214_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[27] q=$abc$109383$new_n30245_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n30246_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[27] q=$abc$109383$new_n30247_
-.subckt ao22_x2 i0=$abc$109383$new_n30247_ i1=$abc$109383$new_n30245_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102658
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[27] nq=$abc$109383$new_n30247_
+.subckt and21nor_x1 i0=$abc$109383$new_n30247_ i1=$abc$109383$new_n30245_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102658
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n30249_
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[28] q=$abc$109383$new_n30250_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[28] q=$abc$109383$new_n30251_
-.subckt ao22_x2 i0=$abc$109383$new_n30251_ i1=$abc$109383$new_n30250_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102662
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[29] q=$abc$109383$new_n30253_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[29] q=$abc$109383$new_n30254_
-.subckt ao22_x2 i0=$abc$109383$new_n30254_ i1=$abc$109383$new_n30253_ i2=$abc$109383$new_n30221_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102666
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[28] q=$abc$109383$new_n30250_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[28] nq=$abc$109383$new_n30251_
+.subckt and21nor_x1 i0=$abc$109383$new_n30251_ i1=$abc$109383$new_n30250_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102662
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[29] q=$abc$109383$new_n30253_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[29] nq=$abc$109383$new_n30254_
+.subckt and21nor_x1 i0=$abc$109383$new_n30254_ i1=$abc$109383$new_n30253_ i2=$abc$109383$new_n30221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102666
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n30256_
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[30] q=$abc$109383$new_n30257_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[30] q=$abc$109383$new_n30258_
-.subckt ao22_x2 i0=$abc$109383$new_n30258_ i1=$abc$109383$new_n30257_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102670
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[31] q=$abc$109383$new_n30260_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[31] q=$abc$109383$new_n30261_
-.subckt ao22_x2 i0=$abc$109383$new_n30261_ i1=$abc$109383$new_n30260_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102674
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[30] q=$abc$109383$new_n30257_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[30] nq=$abc$109383$new_n30258_
+.subckt and21nor_x1 i0=$abc$109383$new_n30258_ i1=$abc$109383$new_n30257_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102670
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__pc$27[31] q=$abc$109383$new_n30260_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$32[31] nq=$abc$109383$new_n30261_
+.subckt and21nor_x1 i0=$abc$109383$new_n30261_ i1=$abc$109383$new_n30260_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102674
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n30263_
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.multiplier.x_low q=$abc$109383$new_n30264_
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.multiplier.x_low nq=$abc$109383$new_n30264_
 .subckt buf_x4 i=$abc$109383$new_n17843_ q=$abc$109383$new_n30265_
 .subckt buf_x4 i=$abc$109383$new_n30265_ q=$abc$109383$new_n30266_
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n30267_
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n30268_
-.subckt a3_x2 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n15350_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n30269_
-.subckt ao22_x2 i0=$abc$109383$new_n30269_ i1=$abc$109383$new_n30264_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102742
+.subckt and3_x1 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n15350_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n30269_
+.subckt and21nor_x1 i0=$abc$109383$new_n30269_ i1=$abc$109383$new_n30264_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102742
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n30271_
 .subckt buf_x4 i=$abc$109383$new_n30141_ q=$abc$109383$new_n30272_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[13] q=$abc$109383$new_n30273_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$28[12] q=$abc$109383$new_n30274_
 .subckt nor2_x0 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30273_ nq=$abc$109383$new_n30275_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__instruction$28[12] i1=soc.cpu.minerva.payload__instruction$28[13] i2=$abc$109383$new_n15349_ q=$abc$109383$new_n30276_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__instruction$28[12] i1=soc.cpu.minerva.payload__instruction$28[13] i2=$abc$109383$new_n15349_ nq=$abc$109383$new_n30276_
 .subckt nor2_x0 i0=$abc$109383$new_n30276_ i1=$abc$109383$new_n30275_ nq=$abc$109383$new_n30277_
-.subckt a3_x2 i0=$abc$109383$new_n30277_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n30271_ q=$abc$109383$new_n30278_
+.subckt and3_x1 i0=$abc$109383$new_n30277_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n30271_ q=$abc$109383$new_n30278_
 .subckt buf_x4 i=soc.cpu.minerva.multiplier.x_src1_signed q=$abc$109383$new_n30279_
 .subckt buf_x4 i=$abc$109383$new_n30279_ q=$abc$109383$new_n30280_
 .subckt buf_x4 i=$abc$109383$new_n30280_ q=$abc$109383$new_n30281_
 .subckt buf_x4 i=$abc$109383$new_n30281_ q=$abc$109383$new_n30282_
 .subckt buf_x4 i=$abc$109383$new_n30282_ q=$abc$109383$new_n30283_
 .subckt buf_x4 i=$abc$109383$new_n30283_ q=$abc$109383$new_n30284_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=$abc$109383$new_n30284_ q=$abc$109383$new_n30285_
-.subckt ao22_x2 i0=$abc$109383$new_n30285_ i1=$abc$109383$new_n30278_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102746
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.multiplier.x_src2_signed q=$abc$109383$new_n30287_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=$abc$109383$new_n30284_ nq=$abc$109383$new_n30285_
+.subckt and21nor_x1 i0=$abc$109383$new_n30285_ i1=$abc$109383$new_n30278_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102746
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.multiplier.x_src2_signed nq=$abc$109383$new_n30287_
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n30288_
 .subckt inv_x1 i=soc.cpu.minerva.payload__instruction$28[14] nq=$abc$109383$new_n30289_
 .subckt inv_x1 i=soc.cpu.minerva.payload__instruction$28[13] nq=$abc$109383$new_n30290_
-.subckt a3_x2 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ i2=$abc$109383$new_n30289_ q=$abc$109383$new_n30291_
-.subckt a3_x2 i0=$abc$109383$new_n30291_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n30292_
-.subckt ao22_x2 i0=$abc$109383$new_n30292_ i1=$abc$109383$new_n30287_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102750
+.subckt and3_x1 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ i2=$abc$109383$new_n30289_ q=$abc$109383$new_n30291_
+.subckt and3_x1 i0=$abc$109383$new_n30291_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n30292_
+.subckt and21nor_x1 i0=$abc$109383$new_n30292_ i1=$abc$109383$new_n30287_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102750
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.x_low nq=$abc$109383$new_n30294_
 .subckt nor3_x0 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n30294_ nq=$abc$109383$new_n30295_
 .subckt buf_x4 i=soc.cpu.minerva.multiplier.m_low q=$abc$109383$new_n30296_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n30296_ q=$abc$109383$new_n30297_
-.subckt ao22_x2 i0=$abc$109383$new_n30297_ i1=$abc$109383$new_n30295_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102754
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n30296_ nq=$abc$109383$new_n30297_
+.subckt and21nor_x1 i0=$abc$109383$new_n30297_ i1=$abc$109383$new_n30295_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102754
 .subckt nand2_x0 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29475_ nq=$abc$109383$new_n30299_
 .subckt nor3_x0 i0=$abc$109383$new_n30299_ i1=$abc$109383$new_n29212_ i2=$abc$109383$new_n29210_ nq=$abc$109383$new_n30300_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=soc.cpu.minerva.multiplier.m_prod[0] q=$abc$109383$new_n30301_
-.subckt ao22_x2 i0=$abc$109383$new_n30301_ i1=$abc$109383$new_n30300_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102758
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=soc.cpu.minerva.multiplier.m_prod[0] nq=$abc$109383$new_n30301_
+.subckt and21nor_x1 i0=$abc$109383$new_n30301_ i1=$abc$109383$new_n30300_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102758
 .subckt nand2_x0 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n29452_ nq=$abc$109383$new_n30303_
 .subckt buf_x4 i=$abc$109383$new_n29475_ q=$abc$109383$new_n30304_
-.subckt a2_x2 i0=$abc$109383$new_n29386_ i1=$abc$109383$new_n30304_ q=$abc$109383$new_n30305_
-.subckt nxr2_x1 i0=$abc$109383$new_n30305_ i1=$abc$109383$new_n30303_ nq=$abc$109383$new_n30306_
-.subckt mx2_x2 cmd=$abc$109383$new_n29923_ i0=$abc$109383$new_n30306_ i1=soc.cpu.minerva.multiplier.m_prod[1] q=$abc$109383$new_n30307_
-.subckt a2_x2 i0=$abc$109383$new_n30307_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102762
+.subckt and2_x1 i0=$abc$109383$new_n29386_ i1=$abc$109383$new_n30304_ q=$abc$109383$new_n30305_
+.subckt nexor2_x0 i0=$abc$109383$new_n30305_ i1=$abc$109383$new_n30303_ nq=$abc$109383$new_n30306_
+.subckt mux2_x1 cmd=$abc$109383$new_n29923_ i0=$abc$109383$new_n30306_ i1=soc.cpu.minerva.multiplier.m_prod[1] q=$abc$109383$new_n30307_
+.subckt and2_x1 i0=$abc$109383$new_n30307_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102762
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[2] nq=$abc$109383$new_n30309_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30309_ q=$abc$109383$new_n30310_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30309_ nq=$abc$109383$new_n30310_
 .subckt nor2_x0 i0=$abc$109383$new_n30310_ i1=$abc$109383$new_n29117_ nq=$abc$109383$new_n30311_
 .subckt nand4_x0 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n29386_ i2=$abc$109383$new_n30304_ i3=$abc$109383$new_n29452_ nq=$abc$109383$new_n30312_
 .subckt buf_x4 i=$abc$109383$new_n29370_ q=$abc$109383$new_n30313_
-.subckt a2_x2 i0=$abc$109383$new_n30313_ i1=$abc$109383$new_n29443_ q=$abc$109383$new_n30314_
-.subckt a2_x2 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29469_ q=$abc$109383$new_n30315_
-.subckt nxr2_x1 i0=$abc$109383$new_n30315_ i1=$abc$109383$new_n30314_ nq=$abc$109383$new_n30316_
+.subckt and2_x1 i0=$abc$109383$new_n30313_ i1=$abc$109383$new_n29443_ q=$abc$109383$new_n30314_
+.subckt and2_x1 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29469_ q=$abc$109383$new_n30315_
+.subckt nexor2_x0 i0=$abc$109383$new_n30315_ i1=$abc$109383$new_n30314_ nq=$abc$109383$new_n30316_
 .subckt buf_x4 i=$abc$109383$new_n29388_ q=$abc$109383$new_n30317_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n30317_ q=$abc$109383$new_n30318_
-.subckt nxr2_x1 i0=$abc$109383$new_n30318_ i1=$abc$109383$new_n30316_ nq=$abc$109383$new_n30319_
-.subckt nxr2_x1 i0=$abc$109383$new_n30319_ i1=$abc$109383$new_n30312_ nq=$abc$109383$new_n30320_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30320_ i2=$abc$109383$new_n30311_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102766
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n30317_ q=$abc$109383$new_n30318_
+.subckt nexor2_x0 i0=$abc$109383$new_n30318_ i1=$abc$109383$new_n30316_ nq=$abc$109383$new_n30319_
+.subckt nexor2_x0 i0=$abc$109383$new_n30319_ i1=$abc$109383$new_n30312_ nq=$abc$109383$new_n30320_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30320_ i2=$abc$109383$new_n30311_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102766
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n30322_
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[3] nq=$abc$109383$new_n30323_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30323_ q=$abc$109383$new_n30324_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30323_ nq=$abc$109383$new_n30324_
 .subckt nor2_x0 i0=$abc$109383$new_n30324_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30325_
-.subckt a4_x2 i0=$abc$109383$new_n29313_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29470_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n30326_
+.subckt and4_x1 i0=$abc$109383$new_n29313_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29470_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n30326_
 .subckt nand2_x0 i0=$abc$109383$new_n30319_ i1=$abc$109383$new_n30326_ nq=$abc$109383$new_n30327_
 .subckt nand2_x0 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29469_ nq=$abc$109383$new_n30328_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29411_ nq=$abc$109383$new_n30329_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29442_ nq=$abc$109383$new_n30330_
-.subckt a2_x2 i0=$abc$109383$new_n29369_ i1=$abc$109383$new_n29387_ q=$abc$109383$new_n30331_
-.subckt nxr2_x1 i0=$abc$109383$new_n30331_ i1=$abc$109383$new_n30330_ nq=$abc$109383$new_n30332_
-.subckt nxr2_x1 i0=$abc$109383$new_n30332_ i1=$abc$109383$new_n30329_ nq=$abc$109383$new_n30333_
-.subckt nxr2_x1 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30328_ nq=$abc$109383$new_n30334_
+.subckt and2_x1 i0=$abc$109383$new_n29369_ i1=$abc$109383$new_n29387_ q=$abc$109383$new_n30331_
+.subckt nexor2_x0 i0=$abc$109383$new_n30331_ i1=$abc$109383$new_n30330_ nq=$abc$109383$new_n30332_
+.subckt nexor2_x0 i0=$abc$109383$new_n30332_ i1=$abc$109383$new_n30329_ nq=$abc$109383$new_n30333_
+.subckt nexor2_x0 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30328_ nq=$abc$109383$new_n30334_
 .subckt nand4_x0 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29470_ i3=$abc$109383$new_n29444_ nq=$abc$109383$new_n30335_
 .subckt nand2_x0 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29389_ nq=$abc$109383$new_n30336_
 .subckt nand2_x0 i0=$abc$109383$new_n30313_ i1=$abc$109383$new_n29443_ nq=$abc$109383$new_n30337_
 .subckt nand2_x0 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29469_ nq=$abc$109383$new_n30338_
-.subckt a2_x2 i0=$abc$109383$new_n30338_ i1=$abc$109383$new_n30337_ q=$abc$109383$new_n30339_
-.subckt ao22_x2 i0=$abc$109383$new_n30339_ i1=$abc$109383$new_n30336_ i2=$abc$109383$new_n30335_ q=$abc$109383$new_n30340_
-.subckt nxr2_x1 i0=$abc$109383$new_n30340_ i1=$abc$109383$new_n30334_ nq=$abc$109383$new_n30341_
-.subckt nxr2_x1 i0=$abc$109383$new_n30341_ i1=$abc$109383$new_n30327_ nq=$abc$109383$new_n30342_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30342_ i2=$abc$109383$new_n30325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102770
+.subckt and2_x1 i0=$abc$109383$new_n30338_ i1=$abc$109383$new_n30337_ q=$abc$109383$new_n30339_
+.subckt and21nor_x1 i0=$abc$109383$new_n30339_ i1=$abc$109383$new_n30336_ i2=$abc$109383$new_n30335_ nq=$abc$109383$new_n30340_
+.subckt nexor2_x0 i0=$abc$109383$new_n30340_ i1=$abc$109383$new_n30334_ nq=$abc$109383$new_n30341_
+.subckt nexor2_x0 i0=$abc$109383$new_n30341_ i1=$abc$109383$new_n30327_ nq=$abc$109383$new_n30342_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30342_ i2=$abc$109383$new_n30325_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102770
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[4] nq=$abc$109383$new_n30344_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30344_ q=$abc$109383$new_n30345_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30344_ nq=$abc$109383$new_n30345_
 .subckt nor2_x0 i0=$abc$109383$new_n30345_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30346_
-.subckt a2_x2 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29468_ q=$abc$109383$new_n30347_
+.subckt and2_x1 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29468_ q=$abc$109383$new_n30347_
 .subckt nand2_x0 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30347_ nq=$abc$109383$new_n30348_
-.subckt a2_x2 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29467_ q=$abc$109383$new_n30349_
-.subckt a2_x2 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29442_ q=$abc$109383$new_n30350_
-.subckt nxr2_x1 i0=$abc$109383$new_n30350_ i1=$abc$109383$new_n30349_ nq=$abc$109383$new_n30351_
+.subckt and2_x1 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29467_ q=$abc$109383$new_n30349_
+.subckt and2_x1 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29442_ q=$abc$109383$new_n30350_
+.subckt nexor2_x0 i0=$abc$109383$new_n30350_ i1=$abc$109383$new_n30349_ nq=$abc$109383$new_n30351_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n30352_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29387_ nq=$abc$109383$new_n30353_
-.subckt a2_x2 i0=$abc$109383$new_n29369_ i1=$abc$109383$new_n29411_ q=$abc$109383$new_n30354_
-.subckt nxr2_x1 i0=$abc$109383$new_n30354_ i1=$abc$109383$new_n30353_ nq=$abc$109383$new_n30355_
-.subckt nxr2_x1 i0=$abc$109383$new_n30355_ i1=$abc$109383$new_n30352_ nq=$abc$109383$new_n30356_
-.subckt nxr2_x1 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30351_ nq=$abc$109383$new_n30357_
-.subckt nxr2_x1 i0=$abc$109383$new_n30357_ i1=$abc$109383$new_n30348_ nq=$abc$109383$new_n30358_
+.subckt and2_x1 i0=$abc$109383$new_n29369_ i1=$abc$109383$new_n29411_ q=$abc$109383$new_n30354_
+.subckt nexor2_x0 i0=$abc$109383$new_n30354_ i1=$abc$109383$new_n30353_ nq=$abc$109383$new_n30355_
+.subckt nexor2_x0 i0=$abc$109383$new_n30355_ i1=$abc$109383$new_n30352_ nq=$abc$109383$new_n30356_
+.subckt nexor2_x0 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30351_ nq=$abc$109383$new_n30357_
+.subckt nexor2_x0 i0=$abc$109383$new_n30357_ i1=$abc$109383$new_n30348_ nq=$abc$109383$new_n30358_
 .subckt nand4_x0 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n30317_ i3=$abc$109383$new_n29444_ nq=$abc$109383$new_n30359_
 .subckt nand2_x0 i0=$abc$109383$new_n29370_ i1=$abc$109383$new_n30317_ nq=$abc$109383$new_n30360_
-.subckt a2_x2 i0=$abc$109383$new_n30360_ i1=$abc$109383$new_n30330_ q=$abc$109383$new_n30361_
-.subckt ao22_x2 i0=$abc$109383$new_n30329_ i1=$abc$109383$new_n30361_ i2=$abc$109383$new_n30359_ q=$abc$109383$new_n30362_
-.subckt nxr2_x1 i0=$abc$109383$new_n30362_ i1=$abc$109383$new_n30358_ nq=$abc$109383$new_n30363_
-.subckt a4_x2 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n30364_
+.subckt and2_x1 i0=$abc$109383$new_n30360_ i1=$abc$109383$new_n30330_ q=$abc$109383$new_n30361_
+.subckt and21nor_x1 i0=$abc$109383$new_n30329_ i1=$abc$109383$new_n30361_ i2=$abc$109383$new_n30359_ nq=$abc$109383$new_n30362_
+.subckt nexor2_x0 i0=$abc$109383$new_n30362_ i1=$abc$109383$new_n30358_ nq=$abc$109383$new_n30363_
+.subckt and4_x1 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n30364_
 .subckt nand2_x0 i0=$abc$109383$new_n30338_ i1=$abc$109383$new_n30337_ nq=$abc$109383$new_n30365_
-.subckt oa22_x2 i0=$abc$109383$new_n30365_ i1=$abc$109383$new_n30318_ i2=$abc$109383$new_n30364_ q=$abc$109383$new_n30366_
+.subckt or21nand_x1 i0=$abc$109383$new_n30365_ i1=$abc$109383$new_n30318_ i2=$abc$109383$new_n30364_ nq=$abc$109383$new_n30366_
 .subckt nand2_x0 i0=$abc$109383$new_n30366_ i1=$abc$109383$new_n30334_ nq=$abc$109383$new_n30367_
-.subckt nxr2_x1 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30347_ nq=$abc$109383$new_n30368_
-.subckt nxr2_x1 i0=$abc$109383$new_n30340_ i1=$abc$109383$new_n30368_ nq=$abc$109383$new_n30369_
-.subckt ao22_x2 i0=$abc$109383$new_n30327_ i1=$abc$109383$new_n30369_ i2=$abc$109383$new_n30367_ q=$abc$109383$new_n30370_
-.subckt nxr2_x1 i0=$abc$109383$new_n30370_ i1=$abc$109383$new_n30363_ nq=$abc$109383$new_n30371_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30371_ i2=$abc$109383$new_n30346_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102774
+.subckt nexor2_x0 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30347_ nq=$abc$109383$new_n30368_
+.subckt nexor2_x0 i0=$abc$109383$new_n30340_ i1=$abc$109383$new_n30368_ nq=$abc$109383$new_n30369_
+.subckt and21nor_x1 i0=$abc$109383$new_n30327_ i1=$abc$109383$new_n30369_ i2=$abc$109383$new_n30367_ nq=$abc$109383$new_n30370_
+.subckt nexor2_x0 i0=$abc$109383$new_n30370_ i1=$abc$109383$new_n30363_ nq=$abc$109383$new_n30371_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30371_ i2=$abc$109383$new_n30346_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102774
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[5] nq=$abc$109383$new_n30373_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30373_ q=$abc$109383$new_n30374_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30373_ nq=$abc$109383$new_n30374_
 .subckt nor2_x0 i0=$abc$109383$new_n30374_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30375_
-.subckt a2_x2 i0=$abc$109383$new_n30319_ i1=$abc$109383$new_n30326_ q=$abc$109383$new_n30376_
-.subckt a2_x2 i0=$abc$109383$new_n30341_ i1=$abc$109383$new_n30376_ q=$abc$109383$new_n30377_
+.subckt and2_x1 i0=$abc$109383$new_n30319_ i1=$abc$109383$new_n30326_ q=$abc$109383$new_n30376_
+.subckt and2_x1 i0=$abc$109383$new_n30341_ i1=$abc$109383$new_n30376_ q=$abc$109383$new_n30377_
 .subckt nand2_x0 i0=$abc$109383$new_n30363_ i1=$abc$109383$new_n30377_ nq=$abc$109383$new_n30378_
-.subckt a2_x2 i0=$abc$109383$new_n30366_ i1=$abc$109383$new_n30334_ q=$abc$109383$new_n30379_
+.subckt and2_x1 i0=$abc$109383$new_n30366_ i1=$abc$109383$new_n30334_ q=$abc$109383$new_n30379_
 .subckt nand2_x0 i0=$abc$109383$new_n30363_ i1=$abc$109383$new_n30379_ nq=$abc$109383$new_n30380_
-.subckt a2_x2 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30347_ q=$abc$109383$new_n30381_
+.subckt and2_x1 i0=$abc$109383$new_n30333_ i1=$abc$109383$new_n30347_ q=$abc$109383$new_n30381_
 .subckt nand2_x0 i0=$abc$109383$new_n30357_ i1=$abc$109383$new_n30381_ nq=$abc$109383$new_n30382_
 .subckt nand2_x0 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29468_ nq=$abc$109383$new_n30383_
-.subckt nxr2_x1 i0=$abc$109383$new_n30350_ i1=$abc$109383$new_n30383_ nq=$abc$109383$new_n30384_
-.subckt nxr2_x1 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30384_ nq=$abc$109383$new_n30385_
-.subckt a2_x2 i0=$abc$109383$new_n30385_ i1=$abc$109383$new_n30348_ q=$abc$109383$new_n30386_
-.subckt ao22_x2 i0=$abc$109383$new_n30386_ i1=$abc$109383$new_n30362_ i2=$abc$109383$new_n30382_ q=$abc$109383$new_n30387_
+.subckt nexor2_x0 i0=$abc$109383$new_n30350_ i1=$abc$109383$new_n30383_ nq=$abc$109383$new_n30384_
+.subckt nexor2_x0 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30384_ nq=$abc$109383$new_n30385_
+.subckt and2_x1 i0=$abc$109383$new_n30385_ i1=$abc$109383$new_n30348_ q=$abc$109383$new_n30386_
+.subckt and21nor_x1 i0=$abc$109383$new_n30386_ i1=$abc$109383$new_n30362_ i2=$abc$109383$new_n30382_ nq=$abc$109383$new_n30387_
 .subckt nand4_x0 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n29413_ i3=$abc$109383$new_n30317_ nq=$abc$109383$new_n30388_
 .subckt nand2_x0 i0=$abc$109383$new_n29370_ i1=$abc$109383$new_n29412_ nq=$abc$109383$new_n30389_
-.subckt a2_x2 i0=$abc$109383$new_n30389_ i1=$abc$109383$new_n30353_ q=$abc$109383$new_n30390_
-.subckt ao22_x2 i0=$abc$109383$new_n30352_ i1=$abc$109383$new_n30390_ i2=$abc$109383$new_n30388_ q=$abc$109383$new_n30391_
+.subckt and2_x1 i0=$abc$109383$new_n30389_ i1=$abc$109383$new_n30353_ q=$abc$109383$new_n30390_
+.subckt and21nor_x1 i0=$abc$109383$new_n30352_ i1=$abc$109383$new_n30390_ i2=$abc$109383$new_n30388_ nq=$abc$109383$new_n30391_
 .subckt nand2_x0 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30384_ nq=$abc$109383$new_n30392_
-.subckt a2_x2 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29288_ q=$abc$109383$new_n30393_
+.subckt and2_x1 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29288_ q=$abc$109383$new_n30393_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29410_ nq=$abc$109383$new_n30394_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[4] q=$abc$109383$new_n30395_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=$abc$109383$new_n30395_ q=$abc$109383$new_n30396_
-.subckt nxr2_x1 i0=$abc$109383$new_n30396_ i1=$abc$109383$new_n30394_ nq=$abc$109383$new_n30397_
-.subckt nxr2_x1 i0=$abc$109383$new_n30397_ i1=$abc$109383$new_n30393_ nq=$abc$109383$new_n30398_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=$abc$109383$new_n30395_ q=$abc$109383$new_n30396_
+.subckt nexor2_x0 i0=$abc$109383$new_n30396_ i1=$abc$109383$new_n30394_ nq=$abc$109383$new_n30397_
+.subckt nexor2_x0 i0=$abc$109383$new_n30397_ i1=$abc$109383$new_n30393_ nq=$abc$109383$new_n30398_
 .subckt nand4_x0 i0=$abc$109383$new_n29226_ i1=$abc$109383$new_n29241_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ nq=$abc$109383$new_n30399_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[2] q=$abc$109383$new_n30400_
 .subckt nand2_x0 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n30400_ nq=$abc$109383$new_n30401_
 .subckt buf_x4 i=$abc$109383$new_n29225_ q=$abc$109383$new_n30402_
 .subckt nand2_x0 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[1] nq=$abc$109383$new_n30403_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[5] q=$abc$109383$new_n30404_
-.subckt a2_x2 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[0] q=$abc$109383$new_n30405_
-.subckt nxr2_x1 i0=$abc$109383$new_n30405_ i1=$abc$109383$new_n30403_ nq=$abc$109383$new_n30406_
-.subckt nxr2_x1 i0=$abc$109383$new_n30406_ i1=$abc$109383$new_n30401_ nq=$abc$109383$new_n30407_
-.subckt nxr2_x1 i0=$abc$109383$new_n30407_ i1=$abc$109383$new_n30399_ nq=$abc$109383$new_n30408_
-.subckt nxr2_x1 i0=$abc$109383$new_n30408_ i1=$abc$109383$new_n30398_ nq=$abc$109383$new_n30409_
-.subckt nxr2_x1 i0=$abc$109383$new_n30409_ i1=$abc$109383$new_n30392_ nq=$abc$109383$new_n30410_
-.subckt nxr2_x1 i0=$abc$109383$new_n30410_ i1=$abc$109383$new_n30391_ nq=$abc$109383$new_n30411_
-.subckt nxr2_x1 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30387_ nq=$abc$109383$new_n30412_
-.subckt nxr2_x1 i0=$abc$109383$new_n30412_ i1=$abc$109383$new_n30380_ nq=$abc$109383$new_n30413_
-.subckt nxr2_x1 i0=$abc$109383$new_n30413_ i1=$abc$109383$new_n30378_ nq=$abc$109383$new_n30414_
-.subckt ao22_x2 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30414_ i2=$abc$109383$new_n30375_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102778
+.subckt and2_x1 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[0] q=$abc$109383$new_n30405_
+.subckt nexor2_x0 i0=$abc$109383$new_n30405_ i1=$abc$109383$new_n30403_ nq=$abc$109383$new_n30406_
+.subckt nexor2_x0 i0=$abc$109383$new_n30406_ i1=$abc$109383$new_n30401_ nq=$abc$109383$new_n30407_
+.subckt nexor2_x0 i0=$abc$109383$new_n30407_ i1=$abc$109383$new_n30399_ nq=$abc$109383$new_n30408_
+.subckt nexor2_x0 i0=$abc$109383$new_n30408_ i1=$abc$109383$new_n30398_ nq=$abc$109383$new_n30409_
+.subckt nexor2_x0 i0=$abc$109383$new_n30409_ i1=$abc$109383$new_n30392_ nq=$abc$109383$new_n30410_
+.subckt nexor2_x0 i0=$abc$109383$new_n30410_ i1=$abc$109383$new_n30391_ nq=$abc$109383$new_n30411_
+.subckt nexor2_x0 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30387_ nq=$abc$109383$new_n30412_
+.subckt nexor2_x0 i0=$abc$109383$new_n30412_ i1=$abc$109383$new_n30380_ nq=$abc$109383$new_n30413_
+.subckt nexor2_x0 i0=$abc$109383$new_n30413_ i1=$abc$109383$new_n30378_ nq=$abc$109383$new_n30414_
+.subckt and21nor_x1 i0=$abc$109383$new_n29942_ i1=$abc$109383$new_n30414_ i2=$abc$109383$new_n30375_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102778
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[6] nq=$abc$109383$new_n30416_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30416_ q=$abc$109383$new_n30417_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30416_ nq=$abc$109383$new_n30417_
 .subckt nor2_x0 i0=$abc$109383$new_n30417_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30418_
-.subckt a2_x2 i0=$abc$109383$new_n30363_ i1=$abc$109383$new_n30377_ q=$abc$109383$new_n30419_
+.subckt and2_x1 i0=$abc$109383$new_n30363_ i1=$abc$109383$new_n30377_ q=$abc$109383$new_n30419_
 .subckt nand2_x0 i0=$abc$109383$new_n30413_ i1=$abc$109383$new_n30419_ nq=$abc$109383$new_n30420_
-.subckt a2_x2 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30384_ q=$abc$109383$new_n30421_
+.subckt and2_x1 i0=$abc$109383$new_n30356_ i1=$abc$109383$new_n30384_ q=$abc$109383$new_n30421_
 .subckt nand2_x0 i0=$abc$109383$new_n30409_ i1=$abc$109383$new_n30421_ nq=$abc$109383$new_n30422_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29289_ nq=$abc$109383$new_n30423_
-.subckt nxr2_x1 i0=$abc$109383$new_n30397_ i1=$abc$109383$new_n30423_ nq=$abc$109383$new_n30424_
-.subckt nxr2_x1 i0=$abc$109383$new_n30408_ i1=$abc$109383$new_n30424_ nq=$abc$109383$new_n30425_
-.subckt a2_x2 i0=$abc$109383$new_n30425_ i1=$abc$109383$new_n30392_ q=$abc$109383$new_n30426_
-.subckt ao22_x2 i0=$abc$109383$new_n30391_ i1=$abc$109383$new_n30426_ i2=$abc$109383$new_n30422_ q=$abc$109383$new_n30427_
-.subckt a4_x2 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29266_ i3=$abc$109383$new_n29412_ q=$abc$109383$new_n30428_
+.subckt nexor2_x0 i0=$abc$109383$new_n30397_ i1=$abc$109383$new_n30423_ nq=$abc$109383$new_n30424_
+.subckt nexor2_x0 i0=$abc$109383$new_n30408_ i1=$abc$109383$new_n30424_ nq=$abc$109383$new_n30425_
+.subckt and2_x1 i0=$abc$109383$new_n30425_ i1=$abc$109383$new_n30392_ q=$abc$109383$new_n30426_
+.subckt and21nor_x1 i0=$abc$109383$new_n30391_ i1=$abc$109383$new_n30426_ i2=$abc$109383$new_n30422_ nq=$abc$109383$new_n30427_
+.subckt and4_x1 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29266_ i3=$abc$109383$new_n29412_ q=$abc$109383$new_n30428_
 .subckt buf_x4 i=$abc$109383$new_n29369_ q=$abc$109383$new_n30429_
 .subckt nand2_x0 i0=$abc$109383$new_n30429_ i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n30430_
 .subckt nand2_x0 i0=$abc$109383$new_n30430_ i1=$abc$109383$new_n30394_ nq=$abc$109383$new_n30431_
-.subckt oa22_x2 i0=$abc$109383$new_n30393_ i1=$abc$109383$new_n30431_ i2=$abc$109383$new_n30428_ q=$abc$109383$new_n30432_
-.subckt a4_x2 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29241_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29442_ q=$abc$109383$new_n30433_
+.subckt or21nand_x1 i0=$abc$109383$new_n30393_ i1=$abc$109383$new_n30431_ i2=$abc$109383$new_n30428_ nq=$abc$109383$new_n30432_
+.subckt and4_x1 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29241_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29442_ q=$abc$109383$new_n30433_
 .subckt nand2_x0 i0=$abc$109383$new_n30407_ i1=$abc$109383$new_n30433_ nq=$abc$109383$new_n30434_
-.subckt a2_x2 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n30400_ q=$abc$109383$new_n30435_
-.subckt nxr2_x1 i0=$abc$109383$new_n30406_ i1=$abc$109383$new_n30435_ nq=$abc$109383$new_n30436_
-.subckt a2_x2 i0=$abc$109383$new_n30436_ i1=$abc$109383$new_n30399_ q=$abc$109383$new_n30437_
-.subckt ao22_x2 i0=$abc$109383$new_n30398_ i1=$abc$109383$new_n30437_ i2=$abc$109383$new_n30434_ q=$abc$109383$new_n30438_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[0] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n30439_
+.subckt and2_x1 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n30400_ q=$abc$109383$new_n30435_
+.subckt nexor2_x0 i0=$abc$109383$new_n30406_ i1=$abc$109383$new_n30435_ nq=$abc$109383$new_n30436_
+.subckt and2_x1 i0=$abc$109383$new_n30436_ i1=$abc$109383$new_n30399_ q=$abc$109383$new_n30437_
+.subckt and21nor_x1 i0=$abc$109383$new_n30398_ i1=$abc$109383$new_n30437_ i2=$abc$109383$new_n30434_ nq=$abc$109383$new_n30438_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[0] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n30439_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n30395_ nq=$abc$109383$new_n30440_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n30441_
-.subckt nxr2_x1 i0=$abc$109383$new_n30441_ i1=$abc$109383$new_n30440_ nq=$abc$109383$new_n30442_
-.subckt nxr2_x1 i0=$abc$109383$new_n30442_ i1=$abc$109383$new_n30439_ nq=$abc$109383$new_n30443_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n30441_
+.subckt nexor2_x0 i0=$abc$109383$new_n30441_ i1=$abc$109383$new_n30440_ nq=$abc$109383$new_n30442_
+.subckt nexor2_x0 i0=$abc$109383$new_n30442_ i1=$abc$109383$new_n30439_ nq=$abc$109383$new_n30443_
 .subckt buf_x4 i=$abc$109383$new_n30404_ q=$abc$109383$new_n30444_
 .subckt nand4_x0 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=soc.cpu.minerva.payload__src1$44[0] i3=$abc$109383$new_n29441_ nq=$abc$109383$new_n30445_
 .subckt nand2_x0 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[0] nq=$abc$109383$new_n30446_
-.subckt a2_x2 i0=$abc$109383$new_n30446_ i1=$abc$109383$new_n30403_ q=$abc$109383$new_n30447_
-.subckt ao22_x2 i0=$abc$109383$new_n30401_ i1=$abc$109383$new_n30447_ i2=$abc$109383$new_n30445_ q=$abc$109383$new_n30448_
-.subckt a2_x2 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[1] q=$abc$109383$new_n30449_
-.subckt a2_x2 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[2] q=$abc$109383$new_n30450_
-.subckt nxr2_x1 i0=$abc$109383$new_n30450_ i1=$abc$109383$new_n30449_ nq=$abc$109383$new_n30451_
-.subckt a2_x2 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n29410_ q=$abc$109383$new_n30452_
-.subckt nxr2_x1 i0=$abc$109383$new_n30452_ i1=$abc$109383$new_n30451_ nq=$abc$109383$new_n30453_
-.subckt nxr2_x1 i0=$abc$109383$new_n30453_ i1=$abc$109383$new_n30448_ nq=$abc$109383$new_n30454_
-.subckt nxr2_x1 i0=$abc$109383$new_n30454_ i1=$abc$109383$new_n30443_ nq=$abc$109383$new_n30455_
-.subckt nxr2_x1 i0=$abc$109383$new_n30455_ i1=$abc$109383$new_n30438_ nq=$abc$109383$new_n30456_
-.subckt nxr2_x1 i0=$abc$109383$new_n30456_ i1=$abc$109383$new_n30432_ nq=$abc$109383$new_n30457_
+.subckt and2_x1 i0=$abc$109383$new_n30446_ i1=$abc$109383$new_n30403_ q=$abc$109383$new_n30447_
+.subckt and21nor_x1 i0=$abc$109383$new_n30401_ i1=$abc$109383$new_n30447_ i2=$abc$109383$new_n30445_ nq=$abc$109383$new_n30448_
+.subckt and2_x1 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[1] q=$abc$109383$new_n30449_
+.subckt and2_x1 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[2] q=$abc$109383$new_n30450_
+.subckt nexor2_x0 i0=$abc$109383$new_n30450_ i1=$abc$109383$new_n30449_ nq=$abc$109383$new_n30451_
+.subckt and2_x1 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n29410_ q=$abc$109383$new_n30452_
+.subckt nexor2_x0 i0=$abc$109383$new_n30452_ i1=$abc$109383$new_n30451_ nq=$abc$109383$new_n30453_
+.subckt nexor2_x0 i0=$abc$109383$new_n30453_ i1=$abc$109383$new_n30448_ nq=$abc$109383$new_n30454_
+.subckt nexor2_x0 i0=$abc$109383$new_n30454_ i1=$abc$109383$new_n30443_ nq=$abc$109383$new_n30455_
+.subckt nexor2_x0 i0=$abc$109383$new_n30455_ i1=$abc$109383$new_n30438_ nq=$abc$109383$new_n30456_
+.subckt nexor2_x0 i0=$abc$109383$new_n30456_ i1=$abc$109383$new_n30432_ nq=$abc$109383$new_n30457_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[6] q=$abc$109383$new_n30458_
 .subckt buf_x4 i=$abc$109383$new_n30458_ q=$abc$109383$new_n30459_
-.subckt a2_x2 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29469_ q=$abc$109383$new_n30460_
-.subckt nxr2_x1 i0=$abc$109383$new_n30460_ i1=$abc$109383$new_n30457_ nq=$abc$109383$new_n30461_
-.subckt nxr2_x1 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30427_ nq=$abc$109383$new_n30462_
-.subckt a2_x2 i0=$abc$109383$new_n30357_ i1=$abc$109383$new_n30381_ q=$abc$109383$new_n30463_
-.subckt a4_x2 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n30317_ i3=$abc$109383$new_n29443_ q=$abc$109383$new_n30464_
+.subckt and2_x1 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29469_ q=$abc$109383$new_n30460_
+.subckt nexor2_x0 i0=$abc$109383$new_n30460_ i1=$abc$109383$new_n30457_ nq=$abc$109383$new_n30461_
+.subckt nexor2_x0 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30427_ nq=$abc$109383$new_n30462_
+.subckt and2_x1 i0=$abc$109383$new_n30357_ i1=$abc$109383$new_n30381_ q=$abc$109383$new_n30463_
+.subckt and4_x1 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n30317_ i3=$abc$109383$new_n29443_ q=$abc$109383$new_n30464_
 .subckt nand2_x0 i0=$abc$109383$new_n30360_ i1=$abc$109383$new_n30330_ nq=$abc$109383$new_n30465_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29413_ q=$abc$109383$new_n30466_
-.subckt oa22_x2 i0=$abc$109383$new_n30466_ i1=$abc$109383$new_n30465_ i2=$abc$109383$new_n30464_ q=$abc$109383$new_n30467_
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29413_ q=$abc$109383$new_n30466_
+.subckt or21nand_x1 i0=$abc$109383$new_n30466_ i1=$abc$109383$new_n30465_ i2=$abc$109383$new_n30464_ nq=$abc$109383$new_n30467_
 .subckt nand2_x0 i0=$abc$109383$new_n30385_ i1=$abc$109383$new_n30348_ nq=$abc$109383$new_n30468_
-.subckt oa22_x2 i0=$abc$109383$new_n30468_ i1=$abc$109383$new_n30467_ i2=$abc$109383$new_n30463_ q=$abc$109383$new_n30469_
+.subckt or21nand_x1 i0=$abc$109383$new_n30468_ i1=$abc$109383$new_n30467_ i2=$abc$109383$new_n30463_ nq=$abc$109383$new_n30469_
 .subckt nand2_x0 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30469_ nq=$abc$109383$new_n30470_
-.subckt nxr2_x1 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30469_ nq=$abc$109383$new_n30471_
-.subckt ao22_x2 i0=$abc$109383$new_n30380_ i1=$abc$109383$new_n30471_ i2=$abc$109383$new_n30470_ q=$abc$109383$new_n30472_
-.subckt nxr2_x1 i0=$abc$109383$new_n30472_ i1=$abc$109383$new_n30462_ nq=$abc$109383$new_n30473_
-.subckt nxr2_x1 i0=$abc$109383$new_n30473_ i1=$abc$109383$new_n30420_ nq=$abc$109383$new_n30474_
+.subckt nexor2_x0 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30469_ nq=$abc$109383$new_n30471_
+.subckt and21nor_x1 i0=$abc$109383$new_n30380_ i1=$abc$109383$new_n30471_ i2=$abc$109383$new_n30470_ nq=$abc$109383$new_n30472_
+.subckt nexor2_x0 i0=$abc$109383$new_n30472_ i1=$abc$109383$new_n30462_ nq=$abc$109383$new_n30473_
+.subckt nexor2_x0 i0=$abc$109383$new_n30473_ i1=$abc$109383$new_n30420_ nq=$abc$109383$new_n30474_
 .subckt buf_x4 i=$abc$109383$new_n29222_ q=$abc$109383$new_n30475_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30474_ i2=$abc$109383$new_n30418_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102782
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30474_ i2=$abc$109383$new_n30418_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102782
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n30477_
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[7] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n30478_
-.subckt a2_x2 i0=$abc$109383$new_n30363_ i1=$abc$109383$new_n30379_ q=$abc$109383$new_n30479_
-.subckt a2_x2 i0=$abc$109383$new_n30412_ i1=$abc$109383$new_n30479_ q=$abc$109383$new_n30480_
-.subckt a2_x2 i0=$abc$109383$new_n30462_ i1=$abc$109383$new_n30480_ q=$abc$109383$new_n30481_
-.subckt a2_x2 i0=$abc$109383$new_n30413_ i1=$abc$109383$new_n30419_ q=$abc$109383$new_n30482_
-.subckt oa22_x2 i0=$abc$109383$new_n30482_ i1=$abc$109383$new_n30473_ i2=$abc$109383$new_n30481_ q=$abc$109383$new_n30483_
-.subckt a2_x2 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30469_ q=$abc$109383$new_n30484_
-.subckt a2_x2 i0=$abc$109383$new_n30462_ i1=$abc$109383$new_n30484_ q=$abc$109383$new_n30485_
-.subckt a2_x2 i0=$abc$109383$new_n30407_ i1=$abc$109383$new_n30433_ q=$abc$109383$new_n30486_
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[7] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n30478_
+.subckt and2_x1 i0=$abc$109383$new_n30363_ i1=$abc$109383$new_n30379_ q=$abc$109383$new_n30479_
+.subckt and2_x1 i0=$abc$109383$new_n30412_ i1=$abc$109383$new_n30479_ q=$abc$109383$new_n30480_
+.subckt and2_x1 i0=$abc$109383$new_n30462_ i1=$abc$109383$new_n30480_ q=$abc$109383$new_n30481_
+.subckt and2_x1 i0=$abc$109383$new_n30413_ i1=$abc$109383$new_n30419_ q=$abc$109383$new_n30482_
+.subckt or21nand_x1 i0=$abc$109383$new_n30482_ i1=$abc$109383$new_n30473_ i2=$abc$109383$new_n30481_ nq=$abc$109383$new_n30483_
+.subckt and2_x1 i0=$abc$109383$new_n30411_ i1=$abc$109383$new_n30469_ q=$abc$109383$new_n30484_
+.subckt and2_x1 i0=$abc$109383$new_n30462_ i1=$abc$109383$new_n30484_ q=$abc$109383$new_n30485_
+.subckt and2_x1 i0=$abc$109383$new_n30407_ i1=$abc$109383$new_n30433_ q=$abc$109383$new_n30486_
 .subckt nand2_x0 i0=$abc$109383$new_n30436_ i1=$abc$109383$new_n30399_ nq=$abc$109383$new_n30487_
-.subckt oa22_x2 i0=$abc$109383$new_n30424_ i1=$abc$109383$new_n30487_ i2=$abc$109383$new_n30486_ q=$abc$109383$new_n30488_
+.subckt or21nand_x1 i0=$abc$109383$new_n30424_ i1=$abc$109383$new_n30487_ i2=$abc$109383$new_n30486_ nq=$abc$109383$new_n30488_
 .subckt nand2_x0 i0=$abc$109383$new_n30455_ i1=$abc$109383$new_n30488_ nq=$abc$109383$new_n30489_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29322_ nq=$abc$109383$new_n30490_
-.subckt nxr2_x1 i0=$abc$109383$new_n30442_ i1=$abc$109383$new_n30490_ nq=$abc$109383$new_n30491_
-.subckt nxr2_x1 i0=$abc$109383$new_n30454_ i1=$abc$109383$new_n30491_ nq=$abc$109383$new_n30492_
-.subckt a2_x2 i0=$abc$109383$new_n30492_ i1=$abc$109383$new_n30438_ q=$abc$109383$new_n30493_
+.subckt nexor2_x0 i0=$abc$109383$new_n30442_ i1=$abc$109383$new_n30490_ nq=$abc$109383$new_n30491_
+.subckt nexor2_x0 i0=$abc$109383$new_n30454_ i1=$abc$109383$new_n30491_ nq=$abc$109383$new_n30492_
+.subckt and2_x1 i0=$abc$109383$new_n30492_ i1=$abc$109383$new_n30438_ q=$abc$109383$new_n30493_
 .subckt nand4_x0 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29266_ i3=$abc$109383$new_n29412_ nq=$abc$109383$new_n30494_
-.subckt a2_x2 i0=$abc$109383$new_n30430_ i1=$abc$109383$new_n30394_ q=$abc$109383$new_n30495_
-.subckt ao22_x2 i0=$abc$109383$new_n30423_ i1=$abc$109383$new_n30495_ i2=$abc$109383$new_n30494_ q=$abc$109383$new_n30496_
-.subckt ao22_x2 i0=$abc$109383$new_n30496_ i1=$abc$109383$new_n30493_ i2=$abc$109383$new_n30489_ q=$abc$109383$new_n30497_
-.subckt nxr2_x1 i0=$abc$109383$new_n30456_ i1=$abc$109383$new_n30496_ nq=$abc$109383$new_n30498_
+.subckt and2_x1 i0=$abc$109383$new_n30430_ i1=$abc$109383$new_n30394_ q=$abc$109383$new_n30495_
+.subckt and21nor_x1 i0=$abc$109383$new_n30423_ i1=$abc$109383$new_n30495_ i2=$abc$109383$new_n30494_ nq=$abc$109383$new_n30496_
+.subckt and21nor_x1 i0=$abc$109383$new_n30496_ i1=$abc$109383$new_n30493_ i2=$abc$109383$new_n30489_ nq=$abc$109383$new_n30497_
+.subckt nexor2_x0 i0=$abc$109383$new_n30456_ i1=$abc$109383$new_n30496_ nq=$abc$109383$new_n30498_
 .subckt nand2_x0 i0=$abc$109383$new_n30460_ i1=$abc$109383$new_n30498_ nq=$abc$109383$new_n30499_
-.subckt a4_x2 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n30429_ i2=$abc$109383$new_n29289_ i3=$abc$109383$new_n29265_ q=$abc$109383$new_n30500_
+.subckt and4_x1 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n30429_ i2=$abc$109383$new_n29289_ i3=$abc$109383$new_n29265_ q=$abc$109383$new_n30500_
 .subckt nand2_x0 i0=$abc$109383$new_n30429_ i1=$abc$109383$new_n29289_ nq=$abc$109383$new_n30501_
 .subckt nand2_x0 i0=$abc$109383$new_n30501_ i1=$abc$109383$new_n30440_ nq=$abc$109383$new_n30502_
-.subckt oa22_x2 i0=$abc$109383$new_n30439_ i1=$abc$109383$new_n30502_ i2=$abc$109383$new_n30500_ q=$abc$109383$new_n30503_
-.subckt a4_x2 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=soc.cpu.minerva.payload__src1$44[0] i3=$abc$109383$new_n29441_ q=$abc$109383$new_n30504_
+.subckt or21nand_x1 i0=$abc$109383$new_n30439_ i1=$abc$109383$new_n30502_ i2=$abc$109383$new_n30500_ nq=$abc$109383$new_n30503_
+.subckt and4_x1 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=soc.cpu.minerva.payload__src1$44[0] i3=$abc$109383$new_n29441_ q=$abc$109383$new_n30504_
 .subckt nand2_x0 i0=$abc$109383$new_n30446_ i1=$abc$109383$new_n30403_ nq=$abc$109383$new_n30505_
-.subckt oa22_x2 i0=$abc$109383$new_n30435_ i1=$abc$109383$new_n30505_ i2=$abc$109383$new_n30504_ q=$abc$109383$new_n30506_
+.subckt or21nand_x1 i0=$abc$109383$new_n30435_ i1=$abc$109383$new_n30505_ i2=$abc$109383$new_n30504_ nq=$abc$109383$new_n30506_
 .subckt nand2_x0 i0=$abc$109383$new_n30453_ i1=$abc$109383$new_n30506_ nq=$abc$109383$new_n30507_
 .subckt nand2_x0 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[1] nq=$abc$109383$new_n30508_
-.subckt nxr2_x1 i0=$abc$109383$new_n30450_ i1=$abc$109383$new_n30508_ nq=$abc$109383$new_n30509_
-.subckt nxr2_x1 i0=$abc$109383$new_n30452_ i1=$abc$109383$new_n30509_ nq=$abc$109383$new_n30510_
-.subckt a2_x2 i0=$abc$109383$new_n30510_ i1=$abc$109383$new_n30448_ q=$abc$109383$new_n30511_
-.subckt ao22_x2 i0=$abc$109383$new_n30443_ i1=$abc$109383$new_n30511_ i2=$abc$109383$new_n30507_ q=$abc$109383$new_n30512_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30513_
+.subckt nexor2_x0 i0=$abc$109383$new_n30450_ i1=$abc$109383$new_n30508_ nq=$abc$109383$new_n30509_
+.subckt nexor2_x0 i0=$abc$109383$new_n30452_ i1=$abc$109383$new_n30509_ nq=$abc$109383$new_n30510_
+.subckt and2_x1 i0=$abc$109383$new_n30510_ i1=$abc$109383$new_n30448_ q=$abc$109383$new_n30511_
+.subckt and21nor_x1 i0=$abc$109383$new_n30443_ i1=$abc$109383$new_n30511_ i2=$abc$109383$new_n30507_ nq=$abc$109383$new_n30512_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30513_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=soc.cpu.minerva.payload__src1$44[5] nq=$abc$109383$new_n30514_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n30515_
-.subckt nxr2_x1 i0=$abc$109383$new_n30515_ i1=$abc$109383$new_n30514_ nq=$abc$109383$new_n30516_
-.subckt nxr2_x1 i0=$abc$109383$new_n30516_ i1=$abc$109383$new_n30513_ nq=$abc$109383$new_n30517_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n30515_
+.subckt nexor2_x0 i0=$abc$109383$new_n30515_ i1=$abc$109383$new_n30514_ nq=$abc$109383$new_n30516_
+.subckt nexor2_x0 i0=$abc$109383$new_n30516_ i1=$abc$109383$new_n30513_ nq=$abc$109383$new_n30517_
 .subckt nand4_x0 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n30400_ i3=soc.cpu.minerva.payload__src1$44[1] nq=$abc$109383$new_n30518_
 .subckt nand2_x0 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n29411_ nq=$abc$109383$new_n30519_
 .subckt nand2_x0 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[2] nq=$abc$109383$new_n30520_
-.subckt a2_x2 i0=$abc$109383$new_n30520_ i1=$abc$109383$new_n30508_ q=$abc$109383$new_n30521_
-.subckt ao22_x2 i0=$abc$109383$new_n30521_ i1=$abc$109383$new_n30519_ i2=$abc$109383$new_n30518_ q=$abc$109383$new_n30522_
+.subckt and2_x1 i0=$abc$109383$new_n30520_ i1=$abc$109383$new_n30508_ q=$abc$109383$new_n30521_
+.subckt and21nor_x1 i0=$abc$109383$new_n30521_ i1=$abc$109383$new_n30519_ i2=$abc$109383$new_n30518_ nq=$abc$109383$new_n30522_
 .subckt nand2_x0 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n30395_ nq=$abc$109383$new_n30523_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[5] i1=soc.cpu.minerva.payload__src1$44[2] nq=$abc$109383$new_n30524_
-.subckt a2_x2 i0=$abc$109383$new_n30402_ i1=$abc$109383$new_n29410_ q=$abc$109383$new_n30525_
-.subckt nxr2_x1 i0=$abc$109383$new_n30525_ i1=$abc$109383$new_n30524_ nq=$abc$109383$new_n30526_
-.subckt nxr2_x1 i0=$abc$109383$new_n30526_ i1=$abc$109383$new_n30523_ nq=$abc$109383$new_n30527_
-.subckt nxr2_x1 i0=$abc$109383$new_n30527_ i1=$abc$109383$new_n30522_ nq=$abc$109383$new_n30528_
-.subckt nxr2_x1 i0=$abc$109383$new_n30528_ i1=$abc$109383$new_n30517_ nq=$abc$109383$new_n30529_
-.subckt nxr2_x1 i0=$abc$109383$new_n30529_ i1=$abc$109383$new_n30512_ nq=$abc$109383$new_n30530_
-.subckt nxr2_x1 i0=$abc$109383$new_n30530_ i1=$abc$109383$new_n30503_ nq=$abc$109383$new_n30531_
+.subckt and2_x1 i0=$abc$109383$new_n30402_ i1=$abc$109383$new_n29410_ q=$abc$109383$new_n30525_
+.subckt nexor2_x0 i0=$abc$109383$new_n30525_ i1=$abc$109383$new_n30524_ nq=$abc$109383$new_n30526_
+.subckt nexor2_x0 i0=$abc$109383$new_n30526_ i1=$abc$109383$new_n30523_ nq=$abc$109383$new_n30527_
+.subckt nexor2_x0 i0=$abc$109383$new_n30527_ i1=$abc$109383$new_n30522_ nq=$abc$109383$new_n30528_
+.subckt nexor2_x0 i0=$abc$109383$new_n30528_ i1=$abc$109383$new_n30517_ nq=$abc$109383$new_n30529_
+.subckt nexor2_x0 i0=$abc$109383$new_n30529_ i1=$abc$109383$new_n30512_ nq=$abc$109383$new_n30530_
+.subckt nexor2_x0 i0=$abc$109383$new_n30530_ i1=$abc$109383$new_n30503_ nq=$abc$109383$new_n30531_
 .subckt nand2_x0 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29443_ nq=$abc$109383$new_n30532_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[7] q=$abc$109383$new_n30533_
 .subckt buf_x4 i=$abc$109383$new_n30533_ q=$abc$109383$new_n30534_
 .subckt buf_x4 i=$abc$109383$new_n30534_ q=$abc$109383$new_n30535_
-.subckt a2_x2 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29468_ q=$abc$109383$new_n30536_
-.subckt nxr2_x1 i0=$abc$109383$new_n30536_ i1=$abc$109383$new_n30532_ nq=$abc$109383$new_n30537_
-.subckt nxr2_x1 i0=$abc$109383$new_n30537_ i1=$abc$109383$new_n30531_ nq=$abc$109383$new_n30538_
-.subckt nxr2_x1 i0=$abc$109383$new_n30538_ i1=$abc$109383$new_n30499_ nq=$abc$109383$new_n30539_
-.subckt nxr2_x1 i0=$abc$109383$new_n30539_ i1=$abc$109383$new_n30497_ nq=$abc$109383$new_n30540_
-.subckt a2_x2 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30485_ q=$abc$109383$new_n30541_
-.subckt a2_x2 i0=$abc$109383$new_n30409_ i1=$abc$109383$new_n30421_ q=$abc$109383$new_n30542_
+.subckt and2_x1 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29468_ q=$abc$109383$new_n30536_
+.subckt nexor2_x0 i0=$abc$109383$new_n30536_ i1=$abc$109383$new_n30532_ nq=$abc$109383$new_n30537_
+.subckt nexor2_x0 i0=$abc$109383$new_n30537_ i1=$abc$109383$new_n30531_ nq=$abc$109383$new_n30538_
+.subckt nexor2_x0 i0=$abc$109383$new_n30538_ i1=$abc$109383$new_n30499_ nq=$abc$109383$new_n30539_
+.subckt nexor2_x0 i0=$abc$109383$new_n30539_ i1=$abc$109383$new_n30497_ nq=$abc$109383$new_n30540_
+.subckt and2_x1 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30485_ q=$abc$109383$new_n30541_
+.subckt and2_x1 i0=$abc$109383$new_n30409_ i1=$abc$109383$new_n30421_ q=$abc$109383$new_n30542_
 .subckt nand2_x0 i0=$abc$109383$new_n30425_ i1=$abc$109383$new_n30392_ nq=$abc$109383$new_n30543_
-.subckt a4_x2 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n29414_ i3=$abc$109383$new_n30317_ q=$abc$109383$new_n30544_
+.subckt and4_x1 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n29414_ i3=$abc$109383$new_n30317_ q=$abc$109383$new_n30544_
 .subckt nand2_x0 i0=$abc$109383$new_n30389_ i1=$abc$109383$new_n30353_ nq=$abc$109383$new_n30545_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29267_ q=$abc$109383$new_n30546_
-.subckt oa22_x2 i0=$abc$109383$new_n30546_ i1=$abc$109383$new_n30545_ i2=$abc$109383$new_n30544_ q=$abc$109383$new_n30547_
-.subckt oa22_x2 i0=$abc$109383$new_n30547_ i1=$abc$109383$new_n30543_ i2=$abc$109383$new_n30542_ q=$abc$109383$new_n30548_
-.subckt a2_x2 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30548_ q=$abc$109383$new_n30549_
-.subckt nxr2_x1 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30549_ nq=$abc$109383$new_n30550_
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29267_ q=$abc$109383$new_n30546_
+.subckt or21nand_x1 i0=$abc$109383$new_n30546_ i1=$abc$109383$new_n30545_ i2=$abc$109383$new_n30544_ nq=$abc$109383$new_n30547_
+.subckt or21nand_x1 i0=$abc$109383$new_n30547_ i1=$abc$109383$new_n30543_ i2=$abc$109383$new_n30542_ nq=$abc$109383$new_n30548_
+.subckt and2_x1 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30548_ q=$abc$109383$new_n30549_
+.subckt nexor2_x0 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30549_ nq=$abc$109383$new_n30550_
 .subckt nand2_x0 i0=$abc$109383$new_n30462_ i1=$abc$109383$new_n30484_ nq=$abc$109383$new_n30551_
-.subckt oa22_x2 i0=$abc$109383$new_n30551_ i1=$abc$109383$new_n30550_ i2=$abc$109383$new_n30541_ q=$abc$109383$new_n30552_
-.subckt oa22_x2 i0=$abc$109383$new_n30552_ i1=$abc$109383$new_n30483_ i2=$abc$109383$new_n30036_ q=$abc$109383$new_n30553_
+.subckt or21nand_x1 i0=$abc$109383$new_n30551_ i1=$abc$109383$new_n30550_ i2=$abc$109383$new_n30541_ nq=$abc$109383$new_n30552_
+.subckt or21nand_x1 i0=$abc$109383$new_n30552_ i1=$abc$109383$new_n30483_ i2=$abc$109383$new_n30036_ nq=$abc$109383$new_n30553_
 .subckt nand2_x0 i0=$abc$109383$new_n30462_ i1=$abc$109383$new_n30480_ nq=$abc$109383$new_n30554_
-.subckt nxr2_x1 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30548_ nq=$abc$109383$new_n30555_
-.subckt nxr2_x1 i0=$abc$109383$new_n30472_ i1=$abc$109383$new_n30555_ nq=$abc$109383$new_n30556_
-.subckt ao22_x2 i0=$abc$109383$new_n30420_ i1=$abc$109383$new_n30556_ i2=$abc$109383$new_n30554_ q=$abc$109383$new_n30557_
+.subckt nexor2_x0 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30548_ nq=$abc$109383$new_n30555_
+.subckt nexor2_x0 i0=$abc$109383$new_n30472_ i1=$abc$109383$new_n30555_ nq=$abc$109383$new_n30556_
+.subckt and21nor_x1 i0=$abc$109383$new_n30420_ i1=$abc$109383$new_n30556_ i2=$abc$109383$new_n30554_ nq=$abc$109383$new_n30557_
 .subckt nand2_x0 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30485_ nq=$abc$109383$new_n30558_
 .subckt nand2_x0 i0=$abc$109383$new_n30461_ i1=$abc$109383$new_n30548_ nq=$abc$109383$new_n30559_
-.subckt nxr2_x1 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30559_ nq=$abc$109383$new_n30560_
-.subckt ao22_x2 i0=$abc$109383$new_n30485_ i1=$abc$109383$new_n30560_ i2=$abc$109383$new_n30558_ q=$abc$109383$new_n30561_
-.subckt a2_x2 i0=$abc$109383$new_n30561_ i1=$abc$109383$new_n30557_ q=$abc$109383$new_n30562_
-.subckt ao22_x2 i0=$abc$109383$new_n30562_ i1=$abc$109383$new_n30553_ i2=$abc$109383$new_n30478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102786
+.subckt nexor2_x0 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30559_ nq=$abc$109383$new_n30560_
+.subckt and21nor_x1 i0=$abc$109383$new_n30485_ i1=$abc$109383$new_n30560_ i2=$abc$109383$new_n30558_ nq=$abc$109383$new_n30561_
+.subckt and2_x1 i0=$abc$109383$new_n30561_ i1=$abc$109383$new_n30557_ q=$abc$109383$new_n30562_
+.subckt and21nor_x1 i0=$abc$109383$new_n30562_ i1=$abc$109383$new_n30553_ i2=$abc$109383$new_n30478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102786
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[8] nq=$abc$109383$new_n30564_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30564_ q=$abc$109383$new_n30565_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30564_ nq=$abc$109383$new_n30565_
 .subckt nor2_x0 i0=$abc$109383$new_n30565_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30566_
-.subckt a2_x2 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30549_ q=$abc$109383$new_n30567_
-.subckt a2_x2 i0=$abc$109383$new_n30455_ i1=$abc$109383$new_n30488_ q=$abc$109383$new_n30568_
-.subckt oa22_x2 i0=$abc$109383$new_n30432_ i1=$abc$109383$new_n30456_ i2=$abc$109383$new_n30568_ q=$abc$109383$new_n30569_
-.subckt a2_x2 i0=$abc$109383$new_n30539_ i1=$abc$109383$new_n30569_ q=$abc$109383$new_n30570_
-.subckt a2_x2 i0=$abc$109383$new_n30460_ i1=$abc$109383$new_n30498_ q=$abc$109383$new_n30571_
-.subckt a2_x2 i0=$abc$109383$new_n30453_ i1=$abc$109383$new_n30506_ q=$abc$109383$new_n30572_
+.subckt and2_x1 i0=$abc$109383$new_n30540_ i1=$abc$109383$new_n30549_ q=$abc$109383$new_n30567_
+.subckt and2_x1 i0=$abc$109383$new_n30455_ i1=$abc$109383$new_n30488_ q=$abc$109383$new_n30568_
+.subckt or21nand_x1 i0=$abc$109383$new_n30432_ i1=$abc$109383$new_n30456_ i2=$abc$109383$new_n30568_ nq=$abc$109383$new_n30569_
+.subckt and2_x1 i0=$abc$109383$new_n30539_ i1=$abc$109383$new_n30569_ q=$abc$109383$new_n30570_
+.subckt and2_x1 i0=$abc$109383$new_n30460_ i1=$abc$109383$new_n30498_ q=$abc$109383$new_n30571_
+.subckt and2_x1 i0=$abc$109383$new_n30453_ i1=$abc$109383$new_n30506_ q=$abc$109383$new_n30572_
 .subckt nand2_x0 i0=$abc$109383$new_n30510_ i1=$abc$109383$new_n30448_ nq=$abc$109383$new_n30573_
-.subckt oa22_x2 i0=$abc$109383$new_n30491_ i1=$abc$109383$new_n30573_ i2=$abc$109383$new_n30572_ q=$abc$109383$new_n30574_
-.subckt a2_x2 i0=$abc$109383$new_n30529_ i1=$abc$109383$new_n30574_ q=$abc$109383$new_n30575_
-.subckt oa22_x2 i0=$abc$109383$new_n30503_ i1=$abc$109383$new_n30530_ i2=$abc$109383$new_n30575_ q=$abc$109383$new_n30576_
+.subckt or21nand_x1 i0=$abc$109383$new_n30491_ i1=$abc$109383$new_n30573_ i2=$abc$109383$new_n30572_ nq=$abc$109383$new_n30574_
+.subckt and2_x1 i0=$abc$109383$new_n30529_ i1=$abc$109383$new_n30574_ q=$abc$109383$new_n30575_
+.subckt or21nand_x1 i0=$abc$109383$new_n30503_ i1=$abc$109383$new_n30530_ i2=$abc$109383$new_n30575_ nq=$abc$109383$new_n30576_
 .subckt nand3_x0 i0=$abc$109383$new_n30576_ i1=$abc$109383$new_n30538_ i2=$abc$109383$new_n30571_ nq=$abc$109383$new_n30577_
-.subckt oa22_x2 i0=$abc$109383$new_n30571_ i1=$abc$109383$new_n30538_ i2=$abc$109383$new_n30576_ q=$abc$109383$new_n30578_
+.subckt or21nand_x1 i0=$abc$109383$new_n30571_ i1=$abc$109383$new_n30538_ i2=$abc$109383$new_n30576_ nq=$abc$109383$new_n30578_
 .subckt nand4_x0 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n30313_ i2=$abc$109383$new_n29290_ i3=$abc$109383$new_n29267_ nq=$abc$109383$new_n30579_
-.subckt a2_x2 i0=$abc$109383$new_n30501_ i1=$abc$109383$new_n30440_ q=$abc$109383$new_n30580_
-.subckt ao22_x2 i0=$abc$109383$new_n30490_ i1=$abc$109383$new_n30580_ i2=$abc$109383$new_n30579_ q=$abc$109383$new_n30581_
-.subckt nxr2_x1 i0=$abc$109383$new_n30530_ i1=$abc$109383$new_n30581_ nq=$abc$109383$new_n30582_
+.subckt and2_x1 i0=$abc$109383$new_n30501_ i1=$abc$109383$new_n30440_ q=$abc$109383$new_n30580_
+.subckt and21nor_x1 i0=$abc$109383$new_n30490_ i1=$abc$109383$new_n30580_ i2=$abc$109383$new_n30579_ nq=$abc$109383$new_n30581_
+.subckt nexor2_x0 i0=$abc$109383$new_n30530_ i1=$abc$109383$new_n30581_ nq=$abc$109383$new_n30582_
 .subckt nand2_x0 i0=$abc$109383$new_n30537_ i1=$abc$109383$new_n30582_ nq=$abc$109383$new_n30583_
-.subckt a4_x2 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n30429_ i2=$abc$109383$new_n29322_ i3=$abc$109383$new_n29288_ q=$abc$109383$new_n30584_
+.subckt and4_x1 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n30429_ i2=$abc$109383$new_n29322_ i3=$abc$109383$new_n29288_ q=$abc$109383$new_n30584_
 .subckt nand2_x0 i0=$abc$109383$new_n30429_ i1=$abc$109383$new_n29322_ nq=$abc$109383$new_n30585_
 .subckt nand2_x0 i0=$abc$109383$new_n30585_ i1=$abc$109383$new_n30514_ nq=$abc$109383$new_n30586_
-.subckt oa22_x2 i0=$abc$109383$new_n30513_ i1=$abc$109383$new_n30586_ i2=$abc$109383$new_n30584_ q=$abc$109383$new_n30587_
-.subckt a4_x2 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n30400_ i3=soc.cpu.minerva.payload__src1$44[1] q=$abc$109383$new_n30588_
+.subckt or21nand_x1 i0=$abc$109383$new_n30513_ i1=$abc$109383$new_n30586_ i2=$abc$109383$new_n30584_ nq=$abc$109383$new_n30587_
+.subckt and4_x1 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n30400_ i3=soc.cpu.minerva.payload__src1$44[1] q=$abc$109383$new_n30588_
 .subckt nand2_x0 i0=$abc$109383$new_n30520_ i1=$abc$109383$new_n30508_ nq=$abc$109383$new_n30589_
-.subckt oa22_x2 i0=$abc$109383$new_n30589_ i1=$abc$109383$new_n30452_ i2=$abc$109383$new_n30588_ q=$abc$109383$new_n30590_
+.subckt or21nand_x1 i0=$abc$109383$new_n30589_ i1=$abc$109383$new_n30452_ i2=$abc$109383$new_n30588_ nq=$abc$109383$new_n30590_
 .subckt nand2_x0 i0=$abc$109383$new_n30527_ i1=$abc$109383$new_n30590_ nq=$abc$109383$new_n30591_
-.subckt a2_x2 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n30395_ q=$abc$109383$new_n30592_
-.subckt nxr2_x1 i0=$abc$109383$new_n30526_ i1=$abc$109383$new_n30592_ nq=$abc$109383$new_n30593_
-.subckt a2_x2 i0=$abc$109383$new_n30593_ i1=$abc$109383$new_n30522_ q=$abc$109383$new_n30594_
-.subckt ao22_x2 i0=$abc$109383$new_n30517_ i1=$abc$109383$new_n30594_ i2=$abc$109383$new_n30591_ q=$abc$109383$new_n30595_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30596_
+.subckt and2_x1 i0=$abc$109383$new_n29240_ i1=$abc$109383$new_n30395_ q=$abc$109383$new_n30592_
+.subckt nexor2_x0 i0=$abc$109383$new_n30526_ i1=$abc$109383$new_n30592_ nq=$abc$109383$new_n30593_
+.subckt and2_x1 i0=$abc$109383$new_n30593_ i1=$abc$109383$new_n30522_ q=$abc$109383$new_n30594_
+.subckt and21nor_x1 i0=$abc$109383$new_n30517_ i1=$abc$109383$new_n30594_ i2=$abc$109383$new_n30591_ nq=$abc$109383$new_n30595_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30596_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29321_ nq=$abc$109383$new_n30597_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30598_
-.subckt nxr2_x1 i0=$abc$109383$new_n30598_ i1=$abc$109383$new_n30597_ nq=$abc$109383$new_n30599_
-.subckt nxr2_x1 i0=$abc$109383$new_n30599_ i1=$abc$109383$new_n30596_ nq=$abc$109383$new_n30600_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30598_
+.subckt nexor2_x0 i0=$abc$109383$new_n30598_ i1=$abc$109383$new_n30597_ nq=$abc$109383$new_n30599_
+.subckt nexor2_x0 i0=$abc$109383$new_n30599_ i1=$abc$109383$new_n30596_ nq=$abc$109383$new_n30600_
 .subckt nand4_x0 i0=$abc$109383$new_n30404_ i1=$abc$109383$new_n30402_ i2=$abc$109383$new_n29410_ i3=$abc$109383$new_n30400_ nq=$abc$109383$new_n30601_
 .subckt nand2_x0 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[3] nq=$abc$109383$new_n30602_
-.subckt a2_x2 i0=$abc$109383$new_n30602_ i1=$abc$109383$new_n30524_ q=$abc$109383$new_n30603_
-.subckt ao22_x2 i0=$abc$109383$new_n30523_ i1=$abc$109383$new_n30603_ i2=$abc$109383$new_n30601_ q=$abc$109383$new_n30604_
+.subckt and2_x1 i0=$abc$109383$new_n30602_ i1=$abc$109383$new_n30524_ q=$abc$109383$new_n30603_
+.subckt and21nor_x1 i0=$abc$109383$new_n30523_ i1=$abc$109383$new_n30603_ i2=$abc$109383$new_n30601_ nq=$abc$109383$new_n30604_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[3] i1=soc.cpu.minerva.payload__src1$44[5] nq=$abc$109383$new_n30605_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[5] i1=soc.cpu.minerva.payload__src1$44[3] nq=$abc$109383$new_n30606_
-.subckt a2_x2 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[4] q=$abc$109383$new_n30607_
-.subckt nxr2_x1 i0=$abc$109383$new_n30607_ i1=$abc$109383$new_n30606_ nq=$abc$109383$new_n30608_
-.subckt nxr2_x1 i0=$abc$109383$new_n30608_ i1=$abc$109383$new_n30605_ nq=$abc$109383$new_n30609_
-.subckt nxr2_x1 i0=$abc$109383$new_n30609_ i1=$abc$109383$new_n30604_ nq=$abc$109383$new_n30610_
-.subckt nxr2_x1 i0=$abc$109383$new_n30610_ i1=$abc$109383$new_n30600_ nq=$abc$109383$new_n30611_
-.subckt nxr2_x1 i0=$abc$109383$new_n30611_ i1=$abc$109383$new_n30595_ nq=$abc$109383$new_n30612_
-.subckt nxr2_x1 i0=$abc$109383$new_n30612_ i1=$abc$109383$new_n30587_ nq=$abc$109383$new_n30613_
+.subckt and2_x1 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[4] q=$abc$109383$new_n30607_
+.subckt nexor2_x0 i0=$abc$109383$new_n30607_ i1=$abc$109383$new_n30606_ nq=$abc$109383$new_n30608_
+.subckt nexor2_x0 i0=$abc$109383$new_n30608_ i1=$abc$109383$new_n30605_ nq=$abc$109383$new_n30609_
+.subckt nexor2_x0 i0=$abc$109383$new_n30609_ i1=$abc$109383$new_n30604_ nq=$abc$109383$new_n30610_
+.subckt nexor2_x0 i0=$abc$109383$new_n30610_ i1=$abc$109383$new_n30600_ nq=$abc$109383$new_n30611_
+.subckt nexor2_x0 i0=$abc$109383$new_n30611_ i1=$abc$109383$new_n30595_ nq=$abc$109383$new_n30612_
+.subckt nexor2_x0 i0=$abc$109383$new_n30612_ i1=$abc$109383$new_n30587_ nq=$abc$109383$new_n30613_
 .subckt nand4_x0 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n30458_ i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29443_ nq=$abc$109383$new_n30614_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n30400_ nq=$abc$109383$new_n30615_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[7] i1=soc.cpu.minerva.payload__src1$44[1] nq=$abc$109383$new_n30616_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[8] q=$abc$109383$new_n30617_
-.subckt a2_x2 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src1$44[0] q=$abc$109383$new_n30618_
-.subckt nxr2_x1 i0=$abc$109383$new_n30618_ i1=$abc$109383$new_n30616_ nq=$abc$109383$new_n30619_
-.subckt nxr2_x1 i0=$abc$109383$new_n30619_ i1=$abc$109383$new_n30615_ nq=$abc$109383$new_n30620_
-.subckt nxr2_x1 i0=$abc$109383$new_n30620_ i1=$abc$109383$new_n30614_ nq=$abc$109383$new_n30621_
-.subckt nxr2_x1 i0=$abc$109383$new_n30621_ i1=$abc$109383$new_n30613_ nq=$abc$109383$new_n30622_
-.subckt nxr2_x1 i0=$abc$109383$new_n30622_ i1=$abc$109383$new_n30583_ nq=$abc$109383$new_n30623_
+.subckt and2_x1 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src1$44[0] q=$abc$109383$new_n30618_
+.subckt nexor2_x0 i0=$abc$109383$new_n30618_ i1=$abc$109383$new_n30616_ nq=$abc$109383$new_n30619_
+.subckt nexor2_x0 i0=$abc$109383$new_n30619_ i1=$abc$109383$new_n30615_ nq=$abc$109383$new_n30620_
+.subckt nexor2_x0 i0=$abc$109383$new_n30620_ i1=$abc$109383$new_n30614_ nq=$abc$109383$new_n30621_
+.subckt nexor2_x0 i0=$abc$109383$new_n30621_ i1=$abc$109383$new_n30613_ nq=$abc$109383$new_n30622_
+.subckt nexor2_x0 i0=$abc$109383$new_n30622_ i1=$abc$109383$new_n30583_ nq=$abc$109383$new_n30623_
 .subckt nand3_x0 i0=$abc$109383$new_n30623_ i1=$abc$109383$new_n30578_ i2=$abc$109383$new_n30577_ nq=$abc$109383$new_n30624_
-.subckt oa22_x2 i0=$abc$109383$new_n30577_ i1=$abc$109383$new_n30578_ i2=$abc$109383$new_n30623_ q=$abc$109383$new_n30625_
-.subckt oa22_x2 i0=$abc$109383$new_n30625_ i1=$abc$109383$new_n30624_ i2=$abc$109383$new_n30570_ q=$abc$109383$new_n30626_
+.subckt or21nand_x1 i0=$abc$109383$new_n30577_ i1=$abc$109383$new_n30578_ i2=$abc$109383$new_n30623_ nq=$abc$109383$new_n30625_
+.subckt or21nand_x1 i0=$abc$109383$new_n30625_ i1=$abc$109383$new_n30624_ i2=$abc$109383$new_n30570_ nq=$abc$109383$new_n30626_
 .subckt nand3_x0 i0=$abc$109383$new_n30625_ i1=$abc$109383$new_n30624_ i2=$abc$109383$new_n30570_ nq=$abc$109383$new_n30627_
-.subckt oa22_x2 i0=$abc$109383$new_n30627_ i1=$abc$109383$new_n30626_ i2=$abc$109383$new_n30567_ q=$abc$109383$new_n30628_
+.subckt or21nand_x1 i0=$abc$109383$new_n30627_ i1=$abc$109383$new_n30626_ i2=$abc$109383$new_n30567_ nq=$abc$109383$new_n30628_
 .subckt nand3_x0 i0=$abc$109383$new_n30627_ i1=$abc$109383$new_n30626_ i2=$abc$109383$new_n30567_ nq=$abc$109383$new_n30629_
 .subckt nand2_x0 i0=$abc$109383$new_n30629_ i1=$abc$109383$new_n30628_ nq=$abc$109383$new_n30630_
 .subckt nand2_x0 i0=$abc$109383$new_n30550_ i1=$abc$109383$new_n30551_ nq=$abc$109383$new_n30631_
 .subckt nand2_x0 i0=$abc$109383$new_n30558_ i1=$abc$109383$new_n30557_ nq=$abc$109383$new_n30632_
-.subckt a2_x2 i0=$abc$109383$new_n30632_ i1=$abc$109383$new_n30631_ q=$abc$109383$new_n30633_
-.subckt nxr2_x1 i0=$abc$109383$new_n30633_ i1=$abc$109383$new_n30630_ nq=$abc$109383$new_n30634_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30634_ i2=$abc$109383$new_n30566_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102790
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[9] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n30636_
+.subckt and2_x1 i0=$abc$109383$new_n30632_ i1=$abc$109383$new_n30631_ q=$abc$109383$new_n30633_
+.subckt nexor2_x0 i0=$abc$109383$new_n30633_ i1=$abc$109383$new_n30630_ nq=$abc$109383$new_n30634_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30634_ i2=$abc$109383$new_n30566_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102790
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[9] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n30636_
 .subckt nand4_x0 i0=$abc$109383$new_n30629_ i1=$abc$109383$new_n30628_ i2=$abc$109383$new_n30632_ i3=$abc$109383$new_n30631_ nq=$abc$109383$new_n30637_
-.subckt a2_x2 i0=$abc$109383$new_n30637_ i1=$abc$109383$new_n30629_ q=$abc$109383$new_n30638_
-.subckt a2_x2 i0=$abc$109383$new_n30537_ i1=$abc$109383$new_n30582_ q=$abc$109383$new_n30639_
+.subckt and2_x1 i0=$abc$109383$new_n30637_ i1=$abc$109383$new_n30629_ q=$abc$109383$new_n30638_
+.subckt and2_x1 i0=$abc$109383$new_n30537_ i1=$abc$109383$new_n30582_ q=$abc$109383$new_n30639_
 .subckt nand2_x0 i0=$abc$109383$new_n30622_ i1=$abc$109383$new_n30639_ nq=$abc$109383$new_n30640_
-.subckt a2_x2 i0=$abc$109383$new_n30527_ i1=$abc$109383$new_n30590_ q=$abc$109383$new_n30641_
+.subckt and2_x1 i0=$abc$109383$new_n30527_ i1=$abc$109383$new_n30590_ q=$abc$109383$new_n30641_
 .subckt nand2_x0 i0=$abc$109383$new_n30593_ i1=$abc$109383$new_n30522_ nq=$abc$109383$new_n30642_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29345_ nq=$abc$109383$new_n30643_
-.subckt nxr2_x1 i0=$abc$109383$new_n30516_ i1=$abc$109383$new_n30643_ nq=$abc$109383$new_n30644_
-.subckt oa22_x2 i0=$abc$109383$new_n30644_ i1=$abc$109383$new_n30642_ i2=$abc$109383$new_n30641_ q=$abc$109383$new_n30645_
+.subckt nexor2_x0 i0=$abc$109383$new_n30516_ i1=$abc$109383$new_n30643_ nq=$abc$109383$new_n30644_
+.subckt or21nand_x1 i0=$abc$109383$new_n30644_ i1=$abc$109383$new_n30642_ i2=$abc$109383$new_n30641_ nq=$abc$109383$new_n30645_
 .subckt nand2_x0 i0=$abc$109383$new_n30611_ i1=$abc$109383$new_n30645_ nq=$abc$109383$new_n30646_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=$abc$109383$new_n29500_ nq=$abc$109383$new_n30647_
-.subckt nxr2_x1 i0=$abc$109383$new_n30599_ i1=$abc$109383$new_n30647_ nq=$abc$109383$new_n30648_
-.subckt nxr2_x1 i0=$abc$109383$new_n30610_ i1=$abc$109383$new_n30648_ nq=$abc$109383$new_n30649_
-.subckt a2_x2 i0=$abc$109383$new_n30649_ i1=$abc$109383$new_n30595_ q=$abc$109383$new_n30650_
+.subckt nexor2_x0 i0=$abc$109383$new_n30599_ i1=$abc$109383$new_n30647_ nq=$abc$109383$new_n30648_
+.subckt nexor2_x0 i0=$abc$109383$new_n30610_ i1=$abc$109383$new_n30648_ nq=$abc$109383$new_n30649_
+.subckt and2_x1 i0=$abc$109383$new_n30649_ i1=$abc$109383$new_n30595_ q=$abc$109383$new_n30650_
 .subckt nand4_x0 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29323_ i3=$abc$109383$new_n29290_ nq=$abc$109383$new_n30651_
-.subckt a2_x2 i0=$abc$109383$new_n30585_ i1=$abc$109383$new_n30514_ q=$abc$109383$new_n30652_
-.subckt ao22_x2 i0=$abc$109383$new_n30643_ i1=$abc$109383$new_n30652_ i2=$abc$109383$new_n30651_ q=$abc$109383$new_n30653_
-.subckt ao22_x2 i0=$abc$109383$new_n30653_ i1=$abc$109383$new_n30650_ i2=$abc$109383$new_n30646_ q=$abc$109383$new_n30654_
-.subckt nxr2_x1 i0=$abc$109383$new_n30654_ i1=$abc$109383$new_n30640_ nq=$abc$109383$new_n30655_
-.subckt nxr2_x1 i0=$abc$109383$new_n30612_ i1=$abc$109383$new_n30653_ nq=$abc$109383$new_n30656_
-.subckt a2_x2 i0=$abc$109383$new_n30621_ i1=$abc$109383$new_n30656_ q=$abc$109383$new_n30657_
-.subckt a4_x2 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n29369_ i2=$abc$109383$new_n29344_ i3=$abc$109383$new_n29322_ q=$abc$109383$new_n30658_
+.subckt and2_x1 i0=$abc$109383$new_n30585_ i1=$abc$109383$new_n30514_ q=$abc$109383$new_n30652_
+.subckt and21nor_x1 i0=$abc$109383$new_n30643_ i1=$abc$109383$new_n30652_ i2=$abc$109383$new_n30651_ nq=$abc$109383$new_n30653_
+.subckt and21nor_x1 i0=$abc$109383$new_n30653_ i1=$abc$109383$new_n30650_ i2=$abc$109383$new_n30646_ nq=$abc$109383$new_n30654_
+.subckt nexor2_x0 i0=$abc$109383$new_n30654_ i1=$abc$109383$new_n30640_ nq=$abc$109383$new_n30655_
+.subckt nexor2_x0 i0=$abc$109383$new_n30612_ i1=$abc$109383$new_n30653_ nq=$abc$109383$new_n30656_
+.subckt and2_x1 i0=$abc$109383$new_n30621_ i1=$abc$109383$new_n30656_ q=$abc$109383$new_n30657_
+.subckt and4_x1 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n29369_ i2=$abc$109383$new_n29344_ i3=$abc$109383$new_n29322_ q=$abc$109383$new_n30658_
 .subckt nand2_x0 i0=$abc$109383$new_n29369_ i1=$abc$109383$new_n29344_ nq=$abc$109383$new_n30659_
 .subckt nand2_x0 i0=$abc$109383$new_n30659_ i1=$abc$109383$new_n30597_ nq=$abc$109383$new_n30660_
-.subckt oa22_x2 i0=$abc$109383$new_n30596_ i1=$abc$109383$new_n30660_ i2=$abc$109383$new_n30658_ q=$abc$109383$new_n30661_
-.subckt a4_x2 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n29410_ i3=$abc$109383$new_n30400_ q=$abc$109383$new_n30662_
+.subckt or21nand_x1 i0=$abc$109383$new_n30596_ i1=$abc$109383$new_n30660_ i2=$abc$109383$new_n30658_ nq=$abc$109383$new_n30661_
+.subckt and4_x1 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n29410_ i3=$abc$109383$new_n30400_ q=$abc$109383$new_n30662_
 .subckt nand2_x0 i0=$abc$109383$new_n30602_ i1=$abc$109383$new_n30524_ nq=$abc$109383$new_n30663_
-.subckt oa22_x2 i0=$abc$109383$new_n30592_ i1=$abc$109383$new_n30663_ i2=$abc$109383$new_n30662_ q=$abc$109383$new_n30664_
+.subckt or21nand_x1 i0=$abc$109383$new_n30592_ i1=$abc$109383$new_n30663_ i2=$abc$109383$new_n30662_ nq=$abc$109383$new_n30664_
 .subckt nand2_x0 i0=$abc$109383$new_n30609_ i1=$abc$109383$new_n30664_ nq=$abc$109383$new_n30665_
-.subckt a2_x2 i0=$abc$109383$new_n29240_ i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n30666_
-.subckt nxr2_x1 i0=$abc$109383$new_n30608_ i1=$abc$109383$new_n30666_ nq=$abc$109383$new_n30667_
-.subckt a2_x2 i0=$abc$109383$new_n30667_ i1=$abc$109383$new_n30604_ q=$abc$109383$new_n30668_
-.subckt ao22_x2 i0=$abc$109383$new_n30600_ i1=$abc$109383$new_n30668_ i2=$abc$109383$new_n30665_ q=$abc$109383$new_n30669_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n30670_
+.subckt and2_x1 i0=$abc$109383$new_n29240_ i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n30666_
+.subckt nexor2_x0 i0=$abc$109383$new_n30608_ i1=$abc$109383$new_n30666_ nq=$abc$109383$new_n30667_
+.subckt and2_x1 i0=$abc$109383$new_n30667_ i1=$abc$109383$new_n30604_ q=$abc$109383$new_n30668_
+.subckt and21nor_x1 i0=$abc$109383$new_n30600_ i1=$abc$109383$new_n30668_ i2=$abc$109383$new_n30665_ nq=$abc$109383$new_n30669_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n30670_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[2] i1=soc.cpu.minerva.payload__src1$44[7] nq=$abc$109383$new_n30671_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30672_
-.subckt nxr2_x1 i0=$abc$109383$new_n30672_ i1=$abc$109383$new_n30671_ nq=$abc$109383$new_n30673_
-.subckt nxr2_x1 i0=$abc$109383$new_n30673_ i1=$abc$109383$new_n30670_ nq=$abc$109383$new_n30674_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30672_
+.subckt nexor2_x0 i0=$abc$109383$new_n30672_ i1=$abc$109383$new_n30671_ nq=$abc$109383$new_n30673_
+.subckt nexor2_x0 i0=$abc$109383$new_n30673_ i1=$abc$109383$new_n30670_ nq=$abc$109383$new_n30674_
 .subckt nand4_x0 i0=$abc$109383$new_n30404_ i1=$abc$109383$new_n30402_ i2=$abc$109383$new_n30395_ i3=$abc$109383$new_n29410_ nq=$abc$109383$new_n30675_
 .subckt nand2_x0 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[4] nq=$abc$109383$new_n30676_
-.subckt a2_x2 i0=$abc$109383$new_n30676_ i1=$abc$109383$new_n30606_ q=$abc$109383$new_n30677_
-.subckt ao22_x2 i0=$abc$109383$new_n30605_ i1=$abc$109383$new_n30677_ i2=$abc$109383$new_n30675_ q=$abc$109383$new_n30678_
+.subckt and2_x1 i0=$abc$109383$new_n30676_ i1=$abc$109383$new_n30606_ q=$abc$109383$new_n30677_
+.subckt and21nor_x1 i0=$abc$109383$new_n30605_ i1=$abc$109383$new_n30677_ i2=$abc$109383$new_n30675_ nq=$abc$109383$new_n30678_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[3] i1=$abc$109383$new_n29321_ nq=$abc$109383$new_n30679_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[5] i1=soc.cpu.minerva.payload__src1$44[4] nq=$abc$109383$new_n30680_
-.subckt a2_x2 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n30681_
-.subckt nxr2_x1 i0=$abc$109383$new_n30681_ i1=$abc$109383$new_n30680_ nq=$abc$109383$new_n30682_
-.subckt nxr2_x1 i0=$abc$109383$new_n30682_ i1=$abc$109383$new_n30679_ nq=$abc$109383$new_n30683_
-.subckt nxr2_x1 i0=$abc$109383$new_n30683_ i1=$abc$109383$new_n30678_ nq=$abc$109383$new_n30684_
-.subckt nxr2_x1 i0=$abc$109383$new_n30684_ i1=$abc$109383$new_n30674_ nq=$abc$109383$new_n30685_
-.subckt nxr2_x1 i0=$abc$109383$new_n30685_ i1=$abc$109383$new_n30669_ nq=$abc$109383$new_n30686_
-.subckt nxr2_x1 i0=$abc$109383$new_n30686_ i1=$abc$109383$new_n30661_ nq=$abc$109383$new_n30687_
-.subckt a4_x2 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n30458_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ q=$abc$109383$new_n30688_
+.subckt and2_x1 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n30681_
+.subckt nexor2_x0 i0=$abc$109383$new_n30681_ i1=$abc$109383$new_n30680_ nq=$abc$109383$new_n30682_
+.subckt nexor2_x0 i0=$abc$109383$new_n30682_ i1=$abc$109383$new_n30679_ nq=$abc$109383$new_n30683_
+.subckt nexor2_x0 i0=$abc$109383$new_n30683_ i1=$abc$109383$new_n30678_ nq=$abc$109383$new_n30684_
+.subckt nexor2_x0 i0=$abc$109383$new_n30684_ i1=$abc$109383$new_n30674_ nq=$abc$109383$new_n30685_
+.subckt nexor2_x0 i0=$abc$109383$new_n30685_ i1=$abc$109383$new_n30669_ nq=$abc$109383$new_n30686_
+.subckt nexor2_x0 i0=$abc$109383$new_n30686_ i1=$abc$109383$new_n30661_ nq=$abc$109383$new_n30687_
+.subckt and4_x1 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n30458_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ q=$abc$109383$new_n30688_
 .subckt nand2_x0 i0=$abc$109383$new_n30620_ i1=$abc$109383$new_n30688_ nq=$abc$109383$new_n30689_
 .subckt nand4_x0 i0=$abc$109383$new_n30617_ i1=$abc$109383$new_n30533_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ nq=$abc$109383$new_n30690_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[8] i1=soc.cpu.minerva.payload__src1$44[0] nq=$abc$109383$new_n30691_
-.subckt a2_x2 i0=$abc$109383$new_n30691_ i1=$abc$109383$new_n30616_ q=$abc$109383$new_n30692_
-.subckt ao22_x2 i0=$abc$109383$new_n30615_ i1=$abc$109383$new_n30692_ i2=$abc$109383$new_n30690_ q=$abc$109383$new_n30693_
+.subckt and2_x1 i0=$abc$109383$new_n30691_ i1=$abc$109383$new_n30616_ q=$abc$109383$new_n30692_
+.subckt and21nor_x1 i0=$abc$109383$new_n30615_ i1=$abc$109383$new_n30692_ i2=$abc$109383$new_n30690_ nq=$abc$109383$new_n30693_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29410_ nq=$abc$109383$new_n30694_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[8] i1=soc.cpu.minerva.payload__src1$44[1] nq=$abc$109383$new_n30695_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[7] i1=$abc$109383$new_n30400_ q=$abc$109383$new_n30696_
-.subckt nxr2_x1 i0=$abc$109383$new_n30696_ i1=$abc$109383$new_n30695_ nq=$abc$109383$new_n30697_
-.subckt nxr2_x1 i0=$abc$109383$new_n30697_ i1=$abc$109383$new_n30694_ nq=$abc$109383$new_n30698_
-.subckt nxr2_x1 i0=$abc$109383$new_n30698_ i1=$abc$109383$new_n30693_ nq=$abc$109383$new_n30699_
-.subckt nxr2_x1 i0=$abc$109383$new_n30699_ i1=$abc$109383$new_n30689_ nq=$abc$109383$new_n30700_
-.subckt nxr2_x1 i0=$abc$109383$new_n30700_ i1=$abc$109383$new_n30687_ nq=$abc$109383$new_n30701_
-.subckt nxr2_x1 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30657_ nq=$abc$109383$new_n30702_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[7] i1=$abc$109383$new_n30400_ q=$abc$109383$new_n30696_
+.subckt nexor2_x0 i0=$abc$109383$new_n30696_ i1=$abc$109383$new_n30695_ nq=$abc$109383$new_n30697_
+.subckt nexor2_x0 i0=$abc$109383$new_n30697_ i1=$abc$109383$new_n30694_ nq=$abc$109383$new_n30698_
+.subckt nexor2_x0 i0=$abc$109383$new_n30698_ i1=$abc$109383$new_n30693_ nq=$abc$109383$new_n30699_
+.subckt nexor2_x0 i0=$abc$109383$new_n30699_ i1=$abc$109383$new_n30689_ nq=$abc$109383$new_n30700_
+.subckt nexor2_x0 i0=$abc$109383$new_n30700_ i1=$abc$109383$new_n30687_ nq=$abc$109383$new_n30701_
+.subckt nexor2_x0 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30657_ nq=$abc$109383$new_n30702_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[9] q=$abc$109383$new_n30703_
 .subckt buf_x4 i=$abc$109383$new_n30703_ q=$abc$109383$new_n30704_
 .subckt buf_x4 i=$abc$109383$new_n30704_ q=$abc$109383$new_n30705_
-.subckt a2_x2 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29470_ q=$abc$109383$new_n30706_
-.subckt nxr2_x1 i0=$abc$109383$new_n30706_ i1=$abc$109383$new_n30702_ nq=$abc$109383$new_n30707_
-.subckt nxr2_x1 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30655_ nq=$abc$109383$new_n30708_
-.subckt nxr2_x1 i0=$abc$109383$new_n30708_ i1=$abc$109383$new_n30624_ nq=$abc$109383$new_n30709_
-.subckt nxr2_x1 i0=$abc$109383$new_n30709_ i1=$abc$109383$new_n30577_ nq=$abc$109383$new_n30710_
-.subckt nxr2_x1 i0=$abc$109383$new_n30710_ i1=$abc$109383$new_n30627_ nq=$abc$109383$new_n30711_
-.subckt nxr2_x1 i0=$abc$109383$new_n30711_ i1=$abc$109383$new_n30638_ nq=$abc$109383$new_n30712_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30712_ i2=$abc$109383$new_n30636_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102794
+.subckt and2_x1 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29470_ q=$abc$109383$new_n30706_
+.subckt nexor2_x0 i0=$abc$109383$new_n30706_ i1=$abc$109383$new_n30702_ nq=$abc$109383$new_n30707_
+.subckt nexor2_x0 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30655_ nq=$abc$109383$new_n30708_
+.subckt nexor2_x0 i0=$abc$109383$new_n30708_ i1=$abc$109383$new_n30624_ nq=$abc$109383$new_n30709_
+.subckt nexor2_x0 i0=$abc$109383$new_n30709_ i1=$abc$109383$new_n30577_ nq=$abc$109383$new_n30710_
+.subckt nexor2_x0 i0=$abc$109383$new_n30710_ i1=$abc$109383$new_n30627_ nq=$abc$109383$new_n30711_
+.subckt nexor2_x0 i0=$abc$109383$new_n30711_ i1=$abc$109383$new_n30638_ nq=$abc$109383$new_n30712_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30712_ i2=$abc$109383$new_n30636_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102794
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[10] nq=$abc$109383$new_n30714_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30714_ q=$abc$109383$new_n30715_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30714_ nq=$abc$109383$new_n30715_
 .subckt nor2_x0 i0=$abc$109383$new_n30715_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30716_
-.subckt a2_x2 i0=$abc$109383$new_n30622_ i1=$abc$109383$new_n30639_ q=$abc$109383$new_n30717_
-.subckt nxr2_x1 i0=$abc$109383$new_n30654_ i1=$abc$109383$new_n30717_ nq=$abc$109383$new_n30718_
-.subckt nxr2_x1 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30718_ nq=$abc$109383$new_n30719_
-.subckt oa22_x2 i0=$abc$109383$new_n30577_ i1=$abc$109383$new_n30624_ i2=$abc$109383$new_n30719_ q=$abc$109383$new_n30720_
-.subckt a2_x2 i0=$abc$109383$new_n30611_ i1=$abc$109383$new_n30645_ q=$abc$109383$new_n30721_
-.subckt oa22_x2 i0=$abc$109383$new_n30587_ i1=$abc$109383$new_n30612_ i2=$abc$109383$new_n30721_ q=$abc$109383$new_n30722_
+.subckt and2_x1 i0=$abc$109383$new_n30622_ i1=$abc$109383$new_n30639_ q=$abc$109383$new_n30717_
+.subckt nexor2_x0 i0=$abc$109383$new_n30654_ i1=$abc$109383$new_n30717_ nq=$abc$109383$new_n30718_
+.subckt nexor2_x0 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30718_ nq=$abc$109383$new_n30719_
+.subckt or21nand_x1 i0=$abc$109383$new_n30577_ i1=$abc$109383$new_n30624_ i2=$abc$109383$new_n30719_ nq=$abc$109383$new_n30720_
+.subckt and2_x1 i0=$abc$109383$new_n30611_ i1=$abc$109383$new_n30645_ q=$abc$109383$new_n30721_
+.subckt or21nand_x1 i0=$abc$109383$new_n30587_ i1=$abc$109383$new_n30612_ i2=$abc$109383$new_n30721_ nq=$abc$109383$new_n30722_
 .subckt nand3_x0 i0=$abc$109383$new_n30722_ i1=$abc$109383$new_n30622_ i2=$abc$109383$new_n30639_ nq=$abc$109383$new_n30723_
 .subckt nand2_x0 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30718_ nq=$abc$109383$new_n30724_
 .subckt nand2_x0 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30657_ nq=$abc$109383$new_n30725_
-.subckt a2_x2 i0=$abc$109383$new_n30609_ i1=$abc$109383$new_n30664_ q=$abc$109383$new_n30726_
+.subckt and2_x1 i0=$abc$109383$new_n30609_ i1=$abc$109383$new_n30664_ q=$abc$109383$new_n30726_
 .subckt nand2_x0 i0=$abc$109383$new_n30667_ i1=$abc$109383$new_n30604_ nq=$abc$109383$new_n30727_
-.subckt oa22_x2 i0=$abc$109383$new_n30648_ i1=$abc$109383$new_n30727_ i2=$abc$109383$new_n30726_ q=$abc$109383$new_n30728_
+.subckt or21nand_x1 i0=$abc$109383$new_n30648_ i1=$abc$109383$new_n30727_ i2=$abc$109383$new_n30726_ nq=$abc$109383$new_n30728_
 .subckt nand2_x0 i0=$abc$109383$new_n30685_ i1=$abc$109383$new_n30728_ nq=$abc$109383$new_n30729_
 .subckt nand2_x0 i0=$abc$109383$new_n29311_ i1=soc.cpu.minerva.payload__src1$44[9] nq=$abc$109383$new_n30730_
-.subckt nxr2_x1 i0=$abc$109383$new_n30673_ i1=$abc$109383$new_n30730_ nq=$abc$109383$new_n30731_
-.subckt nxr2_x1 i0=$abc$109383$new_n30684_ i1=$abc$109383$new_n30731_ nq=$abc$109383$new_n30732_
-.subckt a2_x2 i0=$abc$109383$new_n30732_ i1=$abc$109383$new_n30669_ q=$abc$109383$new_n30733_
+.subckt nexor2_x0 i0=$abc$109383$new_n30673_ i1=$abc$109383$new_n30730_ nq=$abc$109383$new_n30731_
+.subckt nexor2_x0 i0=$abc$109383$new_n30684_ i1=$abc$109383$new_n30731_ nq=$abc$109383$new_n30732_
+.subckt and2_x1 i0=$abc$109383$new_n30732_ i1=$abc$109383$new_n30669_ q=$abc$109383$new_n30733_
 .subckt nand4_x0 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n30429_ i2=$abc$109383$new_n29344_ i3=$abc$109383$new_n29322_ nq=$abc$109383$new_n30734_
-.subckt a2_x2 i0=$abc$109383$new_n30659_ i1=$abc$109383$new_n30597_ q=$abc$109383$new_n30735_
-.subckt ao22_x2 i0=$abc$109383$new_n30647_ i1=$abc$109383$new_n30735_ i2=$abc$109383$new_n30734_ q=$abc$109383$new_n30736_
-.subckt ao22_x2 i0=$abc$109383$new_n30736_ i1=$abc$109383$new_n30733_ i2=$abc$109383$new_n30729_ q=$abc$109383$new_n30737_
-.subckt nxr2_x1 i0=$abc$109383$new_n30737_ i1=$abc$109383$new_n30725_ nq=$abc$109383$new_n30738_
+.subckt and2_x1 i0=$abc$109383$new_n30659_ i1=$abc$109383$new_n30597_ q=$abc$109383$new_n30735_
+.subckt and21nor_x1 i0=$abc$109383$new_n30647_ i1=$abc$109383$new_n30735_ i2=$abc$109383$new_n30734_ nq=$abc$109383$new_n30736_
+.subckt and21nor_x1 i0=$abc$109383$new_n30736_ i1=$abc$109383$new_n30733_ i2=$abc$109383$new_n30729_ nq=$abc$109383$new_n30737_
+.subckt nexor2_x0 i0=$abc$109383$new_n30737_ i1=$abc$109383$new_n30725_ nq=$abc$109383$new_n30738_
 .subckt nand2_x0 i0=$abc$109383$new_n30621_ i1=$abc$109383$new_n30656_ nq=$abc$109383$new_n30739_
-.subckt nxr2_x1 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30739_ nq=$abc$109383$new_n30740_
+.subckt nexor2_x0 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30739_ nq=$abc$109383$new_n30740_
 .subckt nand2_x0 i0=$abc$109383$new_n30706_ i1=$abc$109383$new_n30740_ nq=$abc$109383$new_n30741_
-.subckt nxr2_x1 i0=$abc$109383$new_n30686_ i1=$abc$109383$new_n30736_ nq=$abc$109383$new_n30742_
-.subckt a2_x2 i0=$abc$109383$new_n30700_ i1=$abc$109383$new_n30742_ q=$abc$109383$new_n30743_
-.subckt a4_x2 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29369_ i2=$abc$109383$new_n29500_ i3=$abc$109383$new_n29344_ q=$abc$109383$new_n30744_
+.subckt nexor2_x0 i0=$abc$109383$new_n30686_ i1=$abc$109383$new_n30736_ nq=$abc$109383$new_n30742_
+.subckt and2_x1 i0=$abc$109383$new_n30700_ i1=$abc$109383$new_n30742_ q=$abc$109383$new_n30743_
+.subckt and4_x1 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29369_ i2=$abc$109383$new_n29500_ i3=$abc$109383$new_n29344_ q=$abc$109383$new_n30744_
 .subckt nand2_x0 i0=$abc$109383$new_n29369_ i1=$abc$109383$new_n29500_ nq=$abc$109383$new_n30745_
 .subckt nand2_x0 i0=$abc$109383$new_n30745_ i1=$abc$109383$new_n30671_ nq=$abc$109383$new_n30746_
-.subckt oa22_x2 i0=$abc$109383$new_n30670_ i1=$abc$109383$new_n30746_ i2=$abc$109383$new_n30744_ q=$abc$109383$new_n30747_
-.subckt a4_x2 i0=$abc$109383$new_n30404_ i1=$abc$109383$new_n30402_ i2=$abc$109383$new_n30395_ i3=$abc$109383$new_n29410_ q=$abc$109383$new_n30748_
+.subckt or21nand_x1 i0=$abc$109383$new_n30670_ i1=$abc$109383$new_n30746_ i2=$abc$109383$new_n30744_ nq=$abc$109383$new_n30747_
+.subckt and4_x1 i0=$abc$109383$new_n30404_ i1=$abc$109383$new_n30402_ i2=$abc$109383$new_n30395_ i3=$abc$109383$new_n29410_ q=$abc$109383$new_n30748_
 .subckt nand2_x0 i0=$abc$109383$new_n30676_ i1=$abc$109383$new_n30606_ nq=$abc$109383$new_n30749_
-.subckt oa22_x2 i0=$abc$109383$new_n30666_ i1=$abc$109383$new_n30749_ i2=$abc$109383$new_n30748_ q=$abc$109383$new_n30750_
+.subckt or21nand_x1 i0=$abc$109383$new_n30666_ i1=$abc$109383$new_n30749_ i2=$abc$109383$new_n30748_ nq=$abc$109383$new_n30750_
 .subckt nand2_x0 i0=$abc$109383$new_n30683_ i1=$abc$109383$new_n30750_ nq=$abc$109383$new_n30751_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[3] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n30752_
-.subckt nxr2_x1 i0=$abc$109383$new_n30682_ i1=$abc$109383$new_n30752_ nq=$abc$109383$new_n30753_
-.subckt a2_x2 i0=$abc$109383$new_n30753_ i1=$abc$109383$new_n30678_ q=$abc$109383$new_n30754_
-.subckt ao22_x2 i0=$abc$109383$new_n30674_ i1=$abc$109383$new_n30754_ i2=$abc$109383$new_n30751_ q=$abc$109383$new_n30755_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[0] i1=$abc$109383$new_n29547_ q=$abc$109383$new_n30756_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[3] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n30752_
+.subckt nexor2_x0 i0=$abc$109383$new_n30682_ i1=$abc$109383$new_n30752_ nq=$abc$109383$new_n30753_
+.subckt and2_x1 i0=$abc$109383$new_n30753_ i1=$abc$109383$new_n30678_ q=$abc$109383$new_n30754_
+.subckt and21nor_x1 i0=$abc$109383$new_n30674_ i1=$abc$109383$new_n30754_ i2=$abc$109383$new_n30751_ nq=$abc$109383$new_n30755_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[0] i1=$abc$109383$new_n29547_ q=$abc$109383$new_n30756_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[2] i1=soc.cpu.minerva.payload__src1$44[8] nq=$abc$109383$new_n30757_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n30758_
-.subckt nxr2_x1 i0=$abc$109383$new_n30758_ i1=$abc$109383$new_n30757_ nq=$abc$109383$new_n30759_
-.subckt nxr2_x1 i0=$abc$109383$new_n30759_ i1=$abc$109383$new_n30756_ nq=$abc$109383$new_n30760_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n30758_
+.subckt nexor2_x0 i0=$abc$109383$new_n30758_ i1=$abc$109383$new_n30757_ nq=$abc$109383$new_n30759_
+.subckt nexor2_x0 i0=$abc$109383$new_n30759_ i1=$abc$109383$new_n30756_ nq=$abc$109383$new_n30760_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[5] i1=$abc$109383$new_n29225_ i2=soc.cpu.minerva.payload__src1$44[5] i3=$abc$109383$new_n30395_ nq=$abc$109383$new_n30761_
 .subckt nand2_x0 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[5] nq=$abc$109383$new_n30762_
-.subckt a2_x2 i0=$abc$109383$new_n30762_ i1=$abc$109383$new_n30680_ q=$abc$109383$new_n30763_
-.subckt ao22_x2 i0=$abc$109383$new_n30679_ i1=$abc$109383$new_n30763_ i2=$abc$109383$new_n30761_ q=$abc$109383$new_n30764_
+.subckt and2_x1 i0=$abc$109383$new_n30762_ i1=$abc$109383$new_n30680_ q=$abc$109383$new_n30763_
+.subckt and21nor_x1 i0=$abc$109383$new_n30679_ i1=$abc$109383$new_n30763_ i2=$abc$109383$new_n30761_ nq=$abc$109383$new_n30764_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[3] i1=soc.cpu.minerva.payload__src1$44[7] nq=$abc$109383$new_n30765_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[5] i1=soc.cpu.minerva.payload__src1$44[5] nq=$abc$109383$new_n30766_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[4] i1=soc.cpu.minerva.payload__src1$44[6] q=$abc$109383$new_n30767_
-.subckt nxr2_x1 i0=$abc$109383$new_n30767_ i1=$abc$109383$new_n30766_ nq=$abc$109383$new_n30768_
-.subckt nxr2_x1 i0=$abc$109383$new_n30768_ i1=$abc$109383$new_n30765_ nq=$abc$109383$new_n30769_
-.subckt nxr2_x1 i0=$abc$109383$new_n30769_ i1=$abc$109383$new_n30764_ nq=$abc$109383$new_n30770_
-.subckt nxr2_x1 i0=$abc$109383$new_n30770_ i1=$abc$109383$new_n30760_ nq=$abc$109383$new_n30771_
-.subckt nxr2_x1 i0=$abc$109383$new_n30771_ i1=$abc$109383$new_n30755_ nq=$abc$109383$new_n30772_
-.subckt nxr2_x1 i0=$abc$109383$new_n30772_ i1=$abc$109383$new_n30747_ nq=$abc$109383$new_n30773_
-.subckt a2_x2 i0=$abc$109383$new_n30620_ i1=$abc$109383$new_n30688_ q=$abc$109383$new_n30774_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[4] i1=soc.cpu.minerva.payload__src1$44[6] q=$abc$109383$new_n30767_
+.subckt nexor2_x0 i0=$abc$109383$new_n30767_ i1=$abc$109383$new_n30766_ nq=$abc$109383$new_n30768_
+.subckt nexor2_x0 i0=$abc$109383$new_n30768_ i1=$abc$109383$new_n30765_ nq=$abc$109383$new_n30769_
+.subckt nexor2_x0 i0=$abc$109383$new_n30769_ i1=$abc$109383$new_n30764_ nq=$abc$109383$new_n30770_
+.subckt nexor2_x0 i0=$abc$109383$new_n30770_ i1=$abc$109383$new_n30760_ nq=$abc$109383$new_n30771_
+.subckt nexor2_x0 i0=$abc$109383$new_n30771_ i1=$abc$109383$new_n30755_ nq=$abc$109383$new_n30772_
+.subckt nexor2_x0 i0=$abc$109383$new_n30772_ i1=$abc$109383$new_n30747_ nq=$abc$109383$new_n30773_
+.subckt and2_x1 i0=$abc$109383$new_n30620_ i1=$abc$109383$new_n30688_ q=$abc$109383$new_n30774_
 .subckt nand2_x0 i0=$abc$109383$new_n30699_ i1=$abc$109383$new_n30774_ nq=$abc$109383$new_n30775_
-.subckt a4_x2 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src2$45[7] i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ q=$abc$109383$new_n30776_
+.subckt and4_x1 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src2$45[7] i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ q=$abc$109383$new_n30776_
 .subckt nand2_x0 i0=$abc$109383$new_n30691_ i1=$abc$109383$new_n30616_ nq=$abc$109383$new_n30777_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29387_ q=$abc$109383$new_n30778_
-.subckt oa22_x2 i0=$abc$109383$new_n30778_ i1=$abc$109383$new_n30777_ i2=$abc$109383$new_n30776_ q=$abc$109383$new_n30779_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29387_ q=$abc$109383$new_n30778_
+.subckt or21nand_x1 i0=$abc$109383$new_n30778_ i1=$abc$109383$new_n30777_ i2=$abc$109383$new_n30776_ nq=$abc$109383$new_n30779_
 .subckt nand2_x0 i0=$abc$109383$new_n30698_ i1=$abc$109383$new_n30779_ nq=$abc$109383$new_n30780_
 .subckt nand4_x0 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src2$45[7] i2=$abc$109383$new_n29387_ i3=$abc$109383$new_n29441_ nq=$abc$109383$new_n30781_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[7] i1=$abc$109383$new_n30400_ nq=$abc$109383$new_n30782_
-.subckt a2_x2 i0=$abc$109383$new_n30782_ i1=$abc$109383$new_n30695_ q=$abc$109383$new_n30783_
-.subckt ao22_x2 i0=$abc$109383$new_n30694_ i1=$abc$109383$new_n30783_ i2=$abc$109383$new_n30781_ q=$abc$109383$new_n30784_
+.subckt and2_x1 i0=$abc$109383$new_n30782_ i1=$abc$109383$new_n30695_ q=$abc$109383$new_n30783_
+.subckt and21nor_x1 i0=$abc$109383$new_n30694_ i1=$abc$109383$new_n30783_ i2=$abc$109383$new_n30781_ nq=$abc$109383$new_n30784_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n30785_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[8] i1=soc.cpu.minerva.payload__src1$44[2] nq=$abc$109383$new_n30786_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[7] i1=soc.cpu.minerva.payload__src1$44[3] q=$abc$109383$new_n30787_
-.subckt nxr2_x1 i0=$abc$109383$new_n30787_ i1=$abc$109383$new_n30786_ nq=$abc$109383$new_n30788_
-.subckt nxr2_x1 i0=$abc$109383$new_n30788_ i1=$abc$109383$new_n30785_ nq=$abc$109383$new_n30789_
-.subckt nxr2_x1 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30784_ nq=$abc$109383$new_n30790_
-.subckt nxr2_x1 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30780_ nq=$abc$109383$new_n30791_
-.subckt nxr2_x1 i0=$abc$109383$new_n30791_ i1=$abc$109383$new_n30775_ nq=$abc$109383$new_n30792_
-.subckt nxr2_x1 i0=$abc$109383$new_n30792_ i1=$abc$109383$new_n30773_ nq=$abc$109383$new_n30793_
-.subckt nxr2_x1 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30743_ nq=$abc$109383$new_n30794_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[7] i1=soc.cpu.minerva.payload__src1$44[3] q=$abc$109383$new_n30787_
+.subckt nexor2_x0 i0=$abc$109383$new_n30787_ i1=$abc$109383$new_n30786_ nq=$abc$109383$new_n30788_
+.subckt nexor2_x0 i0=$abc$109383$new_n30788_ i1=$abc$109383$new_n30785_ nq=$abc$109383$new_n30789_
+.subckt nexor2_x0 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30784_ nq=$abc$109383$new_n30790_
+.subckt nexor2_x0 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30780_ nq=$abc$109383$new_n30791_
+.subckt nexor2_x0 i0=$abc$109383$new_n30791_ i1=$abc$109383$new_n30775_ nq=$abc$109383$new_n30792_
+.subckt nexor2_x0 i0=$abc$109383$new_n30792_ i1=$abc$109383$new_n30773_ nq=$abc$109383$new_n30793_
+.subckt nexor2_x0 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30743_ nq=$abc$109383$new_n30794_
 .subckt nand2_x0 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29444_ nq=$abc$109383$new_n30795_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[10] q=$abc$109383$new_n30796_
 .subckt buf_x4 i=$abc$109383$new_n30796_ q=$abc$109383$new_n30797_
-.subckt a2_x2 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29470_ q=$abc$109383$new_n30798_
-.subckt nxr2_x1 i0=$abc$109383$new_n30798_ i1=$abc$109383$new_n30795_ nq=$abc$109383$new_n30799_
-.subckt nxr2_x1 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30794_ nq=$abc$109383$new_n30800_
-.subckt nxr2_x1 i0=$abc$109383$new_n30800_ i1=$abc$109383$new_n30741_ nq=$abc$109383$new_n30801_
-.subckt nxr2_x1 i0=$abc$109383$new_n30801_ i1=$abc$109383$new_n30738_ nq=$abc$109383$new_n30802_
-.subckt nxr2_x1 i0=$abc$109383$new_n30802_ i1=$abc$109383$new_n30724_ nq=$abc$109383$new_n30803_
-.subckt nxr2_x1 i0=$abc$109383$new_n30803_ i1=$abc$109383$new_n30723_ nq=$abc$109383$new_n30804_
-.subckt nxr2_x1 i0=$abc$109383$new_n30804_ i1=$abc$109383$new_n30720_ nq=$abc$109383$new_n30805_
+.subckt and2_x1 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29470_ q=$abc$109383$new_n30798_
+.subckt nexor2_x0 i0=$abc$109383$new_n30798_ i1=$abc$109383$new_n30795_ nq=$abc$109383$new_n30799_
+.subckt nexor2_x0 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30794_ nq=$abc$109383$new_n30800_
+.subckt nexor2_x0 i0=$abc$109383$new_n30800_ i1=$abc$109383$new_n30741_ nq=$abc$109383$new_n30801_
+.subckt nexor2_x0 i0=$abc$109383$new_n30801_ i1=$abc$109383$new_n30738_ nq=$abc$109383$new_n30802_
+.subckt nexor2_x0 i0=$abc$109383$new_n30802_ i1=$abc$109383$new_n30724_ nq=$abc$109383$new_n30803_
+.subckt nexor2_x0 i0=$abc$109383$new_n30803_ i1=$abc$109383$new_n30723_ nq=$abc$109383$new_n30804_
+.subckt nexor2_x0 i0=$abc$109383$new_n30804_ i1=$abc$109383$new_n30720_ nq=$abc$109383$new_n30805_
 .subckt nand3_x0 i0=$abc$109383$new_n30637_ i1=$abc$109383$new_n30629_ i2=$abc$109383$new_n30627_ nq=$abc$109383$new_n30806_
 .subckt nand2_x0 i0=$abc$109383$new_n30806_ i1=$abc$109383$new_n30710_ nq=$abc$109383$new_n30807_
-.subckt nxr2_x1 i0=$abc$109383$new_n30807_ i1=$abc$109383$new_n30805_ nq=$abc$109383$new_n30808_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30808_ i2=$abc$109383$new_n30716_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102798
+.subckt nexor2_x0 i0=$abc$109383$new_n30807_ i1=$abc$109383$new_n30805_ nq=$abc$109383$new_n30808_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30808_ i2=$abc$109383$new_n30716_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102798
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[11] nq=$abc$109383$new_n30810_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n30811_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30810_ q=$abc$109383$new_n30812_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n29870_ i2=$abc$109383$new_n30810_ nq=$abc$109383$new_n30812_
 .subckt nor2_x0 i0=$abc$109383$new_n30812_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30813_
-.subckt a3_x2 i0=$abc$109383$new_n30623_ i1=$abc$109383$new_n30578_ i2=$abc$109383$new_n30577_ q=$abc$109383$new_n30814_
-.subckt a3_x2 i0=$abc$109383$new_n30576_ i1=$abc$109383$new_n30538_ i2=$abc$109383$new_n30571_ q=$abc$109383$new_n30815_
-.subckt ao22_x2 i0=$abc$109383$new_n30815_ i1=$abc$109383$new_n30814_ i2=$abc$109383$new_n30708_ q=$abc$109383$new_n30816_
-.subckt a2_x2 i0=$abc$109383$new_n30804_ i1=$abc$109383$new_n30816_ q=$abc$109383$new_n30817_
-.subckt a2_x2 i0=$abc$109383$new_n30806_ i1=$abc$109383$new_n30710_ q=$abc$109383$new_n30818_
-.subckt oa22_x2 i0=$abc$109383$new_n30818_ i1=$abc$109383$new_n30805_ i2=$abc$109383$new_n30817_ q=$abc$109383$new_n30819_
-.subckt a2_x2 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30718_ q=$abc$109383$new_n30820_
-.subckt a3_x2 i0=$abc$109383$new_n30722_ i1=$abc$109383$new_n30622_ i2=$abc$109383$new_n30639_ q=$abc$109383$new_n30821_
-.subckt ao22_x2 i0=$abc$109383$new_n30821_ i1=$abc$109383$new_n30820_ i2=$abc$109383$new_n30802_ q=$abc$109383$new_n30822_
-.subckt a2_x2 i0=$abc$109383$new_n30685_ i1=$abc$109383$new_n30728_ q=$abc$109383$new_n30823_
-.subckt oa22_x2 i0=$abc$109383$new_n30661_ i1=$abc$109383$new_n30686_ i2=$abc$109383$new_n30823_ q=$abc$109383$new_n30824_
+.subckt and3_x1 i0=$abc$109383$new_n30623_ i1=$abc$109383$new_n30578_ i2=$abc$109383$new_n30577_ q=$abc$109383$new_n30814_
+.subckt and3_x1 i0=$abc$109383$new_n30576_ i1=$abc$109383$new_n30538_ i2=$abc$109383$new_n30571_ q=$abc$109383$new_n30815_
+.subckt and21nor_x1 i0=$abc$109383$new_n30815_ i1=$abc$109383$new_n30814_ i2=$abc$109383$new_n30708_ nq=$abc$109383$new_n30816_
+.subckt and2_x1 i0=$abc$109383$new_n30804_ i1=$abc$109383$new_n30816_ q=$abc$109383$new_n30817_
+.subckt and2_x1 i0=$abc$109383$new_n30806_ i1=$abc$109383$new_n30710_ q=$abc$109383$new_n30818_
+.subckt or21nand_x1 i0=$abc$109383$new_n30818_ i1=$abc$109383$new_n30805_ i2=$abc$109383$new_n30817_ nq=$abc$109383$new_n30819_
+.subckt and2_x1 i0=$abc$109383$new_n30707_ i1=$abc$109383$new_n30718_ q=$abc$109383$new_n30820_
+.subckt and3_x1 i0=$abc$109383$new_n30722_ i1=$abc$109383$new_n30622_ i2=$abc$109383$new_n30639_ q=$abc$109383$new_n30821_
+.subckt and21nor_x1 i0=$abc$109383$new_n30821_ i1=$abc$109383$new_n30820_ i2=$abc$109383$new_n30802_ nq=$abc$109383$new_n30822_
+.subckt and2_x1 i0=$abc$109383$new_n30685_ i1=$abc$109383$new_n30728_ q=$abc$109383$new_n30823_
+.subckt or21nand_x1 i0=$abc$109383$new_n30661_ i1=$abc$109383$new_n30686_ i2=$abc$109383$new_n30823_ nq=$abc$109383$new_n30824_
 .subckt nand3_x0 i0=$abc$109383$new_n30824_ i1=$abc$109383$new_n30701_ i2=$abc$109383$new_n30657_ nq=$abc$109383$new_n30825_
-.subckt a2_x2 i0=$abc$109383$new_n30706_ i1=$abc$109383$new_n30740_ q=$abc$109383$new_n30826_
+.subckt and2_x1 i0=$abc$109383$new_n30706_ i1=$abc$109383$new_n30740_ q=$abc$109383$new_n30826_
 .subckt nand2_x0 i0=$abc$109383$new_n30800_ i1=$abc$109383$new_n30826_ nq=$abc$109383$new_n30827_
 .subckt nand2_x0 i0=$abc$109383$new_n30700_ i1=$abc$109383$new_n30742_ nq=$abc$109383$new_n30828_
-.subckt nxr2_x1 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30828_ nq=$abc$109383$new_n30829_
-.subckt nxr2_x1 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30829_ nq=$abc$109383$new_n30830_
-.subckt a2_x2 i0=$abc$109383$new_n30830_ i1=$abc$109383$new_n30741_ q=$abc$109383$new_n30831_
-.subckt ao22_x2 i0=$abc$109383$new_n30738_ i1=$abc$109383$new_n30831_ i2=$abc$109383$new_n30827_ q=$abc$109383$new_n30832_
+.subckt nexor2_x0 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30828_ nq=$abc$109383$new_n30829_
+.subckt nexor2_x0 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30829_ nq=$abc$109383$new_n30830_
+.subckt and2_x1 i0=$abc$109383$new_n30830_ i1=$abc$109383$new_n30741_ q=$abc$109383$new_n30831_
+.subckt and21nor_x1 i0=$abc$109383$new_n30738_ i1=$abc$109383$new_n30831_ i2=$abc$109383$new_n30827_ nq=$abc$109383$new_n30832_
 .subckt nand2_x0 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30743_ nq=$abc$109383$new_n30833_
-.subckt a2_x2 i0=$abc$109383$new_n30683_ i1=$abc$109383$new_n30750_ q=$abc$109383$new_n30834_
+.subckt and2_x1 i0=$abc$109383$new_n30683_ i1=$abc$109383$new_n30750_ q=$abc$109383$new_n30834_
 .subckt nand2_x0 i0=$abc$109383$new_n30753_ i1=$abc$109383$new_n30678_ nq=$abc$109383$new_n30835_
-.subckt oa22_x2 i0=$abc$109383$new_n30731_ i1=$abc$109383$new_n30835_ i2=$abc$109383$new_n30834_ q=$abc$109383$new_n30836_
+.subckt or21nand_x1 i0=$abc$109383$new_n30731_ i1=$abc$109383$new_n30835_ i2=$abc$109383$new_n30834_ nq=$abc$109383$new_n30836_
 .subckt nand2_x0 i0=$abc$109383$new_n30771_ i1=$abc$109383$new_n30836_ nq=$abc$109383$new_n30837_
 .subckt nand2_x0 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29547_ nq=$abc$109383$new_n30838_
-.subckt nxr2_x1 i0=$abc$109383$new_n30759_ i1=$abc$109383$new_n30838_ nq=$abc$109383$new_n30839_
-.subckt nxr2_x1 i0=$abc$109383$new_n30770_ i1=$abc$109383$new_n30839_ nq=$abc$109383$new_n30840_
-.subckt a2_x2 i0=$abc$109383$new_n30840_ i1=$abc$109383$new_n30755_ q=$abc$109383$new_n30841_
+.subckt nexor2_x0 i0=$abc$109383$new_n30759_ i1=$abc$109383$new_n30838_ nq=$abc$109383$new_n30839_
+.subckt nexor2_x0 i0=$abc$109383$new_n30770_ i1=$abc$109383$new_n30839_ nq=$abc$109383$new_n30840_
+.subckt and2_x1 i0=$abc$109383$new_n30840_ i1=$abc$109383$new_n30755_ q=$abc$109383$new_n30841_
 .subckt nand4_x0 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n30429_ i2=$abc$109383$new_n29501_ i3=$abc$109383$new_n29344_ nq=$abc$109383$new_n30842_
-.subckt a2_x2 i0=$abc$109383$new_n30745_ i1=$abc$109383$new_n30671_ q=$abc$109383$new_n30843_
-.subckt ao22_x2 i0=$abc$109383$new_n30730_ i1=$abc$109383$new_n30843_ i2=$abc$109383$new_n30842_ q=$abc$109383$new_n30844_
-.subckt ao22_x2 i0=$abc$109383$new_n30844_ i1=$abc$109383$new_n30841_ i2=$abc$109383$new_n30837_ q=$abc$109383$new_n30845_
-.subckt nxr2_x1 i0=$abc$109383$new_n30845_ i1=$abc$109383$new_n30833_ nq=$abc$109383$new_n30846_
+.subckt and2_x1 i0=$abc$109383$new_n30745_ i1=$abc$109383$new_n30671_ q=$abc$109383$new_n30843_
+.subckt and21nor_x1 i0=$abc$109383$new_n30730_ i1=$abc$109383$new_n30843_ i2=$abc$109383$new_n30842_ nq=$abc$109383$new_n30844_
+.subckt and21nor_x1 i0=$abc$109383$new_n30844_ i1=$abc$109383$new_n30841_ i2=$abc$109383$new_n30837_ nq=$abc$109383$new_n30845_
+.subckt nexor2_x0 i0=$abc$109383$new_n30845_ i1=$abc$109383$new_n30833_ nq=$abc$109383$new_n30846_
 .subckt nand2_x0 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30829_ nq=$abc$109383$new_n30847_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29411_ q=$abc$109383$new_n30848_
-.subckt nxr2_x1 i0=$abc$109383$new_n30697_ i1=$abc$109383$new_n30848_ nq=$abc$109383$new_n30849_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29411_ q=$abc$109383$new_n30848_
+.subckt nexor2_x0 i0=$abc$109383$new_n30697_ i1=$abc$109383$new_n30848_ nq=$abc$109383$new_n30849_
 .subckt nand2_x0 i0=$abc$109383$new_n30849_ i1=$abc$109383$new_n30693_ nq=$abc$109383$new_n30850_
-.subckt a4_x2 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30850_ i2=$abc$109383$new_n30780_ i3=$abc$109383$new_n30774_ q=$abc$109383$new_n30851_
-.subckt a2_x2 i0=$abc$109383$new_n30698_ i1=$abc$109383$new_n30779_ q=$abc$109383$new_n30852_
-.subckt nxr2_x1 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30852_ nq=$abc$109383$new_n30853_
+.subckt and4_x1 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30850_ i2=$abc$109383$new_n30780_ i3=$abc$109383$new_n30774_ q=$abc$109383$new_n30851_
+.subckt and2_x1 i0=$abc$109383$new_n30698_ i1=$abc$109383$new_n30779_ q=$abc$109383$new_n30852_
+.subckt nexor2_x0 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30852_ nq=$abc$109383$new_n30853_
 .subckt nand2_x0 i0=$abc$109383$new_n30853_ i1=$abc$109383$new_n30775_ nq=$abc$109383$new_n30854_
-.subckt nxr2_x1 i0=$abc$109383$new_n30772_ i1=$abc$109383$new_n30844_ nq=$abc$109383$new_n30855_
-.subckt oa22_x2 i0=$abc$109383$new_n30855_ i1=$abc$109383$new_n30854_ i2=$abc$109383$new_n30851_ q=$abc$109383$new_n30856_
-.subckt a4_x2 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n29369_ i2=soc.cpu.minerva.payload__src1$44[9] i3=$abc$109383$new_n29500_ q=$abc$109383$new_n30857_
+.subckt nexor2_x0 i0=$abc$109383$new_n30772_ i1=$abc$109383$new_n30844_ nq=$abc$109383$new_n30855_
+.subckt or21nand_x1 i0=$abc$109383$new_n30855_ i1=$abc$109383$new_n30854_ i2=$abc$109383$new_n30851_ nq=$abc$109383$new_n30856_
+.subckt and4_x1 i0=$abc$109383$new_n29252_ i1=$abc$109383$new_n29369_ i2=soc.cpu.minerva.payload__src1$44[9] i3=$abc$109383$new_n29500_ q=$abc$109383$new_n30857_
 .subckt nand2_x0 i0=$abc$109383$new_n30429_ i1=$abc$109383$new_n29523_ nq=$abc$109383$new_n30858_
 .subckt nand2_x0 i0=$abc$109383$new_n30858_ i1=$abc$109383$new_n30757_ nq=$abc$109383$new_n30859_
-.subckt oa22_x2 i0=$abc$109383$new_n30756_ i1=$abc$109383$new_n30859_ i2=$abc$109383$new_n30857_ q=$abc$109383$new_n30860_
-.subckt a4_x2 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n29288_ i3=$abc$109383$new_n30395_ q=$abc$109383$new_n30861_
+.subckt or21nand_x1 i0=$abc$109383$new_n30756_ i1=$abc$109383$new_n30859_ i2=$abc$109383$new_n30857_ nq=$abc$109383$new_n30860_
+.subckt and4_x1 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n29288_ i3=$abc$109383$new_n30395_ q=$abc$109383$new_n30861_
 .subckt nand2_x0 i0=$abc$109383$new_n30762_ i1=$abc$109383$new_n30680_ nq=$abc$109383$new_n30862_
-.subckt oa22_x2 i0=$abc$109383$new_n30752_ i1=$abc$109383$new_n30862_ i2=$abc$109383$new_n30861_ q=$abc$109383$new_n30863_
+.subckt or21nand_x1 i0=$abc$109383$new_n30752_ i1=$abc$109383$new_n30862_ i2=$abc$109383$new_n30861_ nq=$abc$109383$new_n30863_
 .subckt nand2_x0 i0=$abc$109383$new_n30769_ i1=$abc$109383$new_n30863_ nq=$abc$109383$new_n30864_
-.subckt a2_x2 i0=$abc$109383$new_n29240_ i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30865_
-.subckt nxr2_x1 i0=$abc$109383$new_n30768_ i1=$abc$109383$new_n30865_ nq=$abc$109383$new_n30866_
-.subckt a2_x2 i0=$abc$109383$new_n30866_ i1=$abc$109383$new_n30764_ q=$abc$109383$new_n30867_
-.subckt ao22_x2 i0=$abc$109383$new_n30760_ i1=$abc$109383$new_n30867_ i2=$abc$109383$new_n30864_ q=$abc$109383$new_n30868_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n30869_
+.subckt and2_x1 i0=$abc$109383$new_n29240_ i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30865_
+.subckt nexor2_x0 i0=$abc$109383$new_n30768_ i1=$abc$109383$new_n30865_ nq=$abc$109383$new_n30866_
+.subckt and2_x1 i0=$abc$109383$new_n30866_ i1=$abc$109383$new_n30764_ q=$abc$109383$new_n30867_
+.subckt and21nor_x1 i0=$abc$109383$new_n30760_ i1=$abc$109383$new_n30867_ i2=$abc$109383$new_n30864_ nq=$abc$109383$new_n30868_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[0] i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n30869_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=soc.cpu.minerva.payload__src1$44[9] nq=$abc$109383$new_n30870_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[10] q=$abc$109383$new_n30871_
-.subckt nxr2_x1 i0=$abc$109383$new_n30871_ i1=$abc$109383$new_n30870_ nq=$abc$109383$new_n30872_
-.subckt nxr2_x1 i0=$abc$109383$new_n30872_ i1=$abc$109383$new_n30869_ nq=$abc$109383$new_n30873_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[1] i1=soc.cpu.minerva.payload__src1$44[10] q=$abc$109383$new_n30871_
+.subckt nexor2_x0 i0=$abc$109383$new_n30871_ i1=$abc$109383$new_n30870_ nq=$abc$109383$new_n30872_
+.subckt nexor2_x0 i0=$abc$109383$new_n30872_ i1=$abc$109383$new_n30869_ nq=$abc$109383$new_n30873_
 .subckt nand4_x0 i0=$abc$109383$new_n30404_ i1=$abc$109383$new_n30402_ i2=$abc$109383$new_n29321_ i3=$abc$109383$new_n29288_ nq=$abc$109383$new_n30874_
 .subckt nand2_x0 i0=$abc$109383$new_n29225_ i1=$abc$109383$new_n29321_ nq=$abc$109383$new_n30875_
-.subckt a2_x2 i0=$abc$109383$new_n30875_ i1=$abc$109383$new_n30766_ q=$abc$109383$new_n30876_
-.subckt ao22_x2 i0=$abc$109383$new_n30765_ i1=$abc$109383$new_n30876_ i2=$abc$109383$new_n30874_ q=$abc$109383$new_n30877_
+.subckt and2_x1 i0=$abc$109383$new_n30875_ i1=$abc$109383$new_n30766_ q=$abc$109383$new_n30876_
+.subckt and21nor_x1 i0=$abc$109383$new_n30765_ i1=$abc$109383$new_n30876_ i2=$abc$109383$new_n30874_ nq=$abc$109383$new_n30877_
 .subckt nand2_x0 i0=$abc$109383$new_n29240_ i1=soc.cpu.minerva.payload__src1$44[8] nq=$abc$109383$new_n30878_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[5] i1=soc.cpu.minerva.payload__src1$44[6] nq=$abc$109383$new_n30879_
-.subckt a2_x2 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30880_
-.subckt nxr2_x1 i0=$abc$109383$new_n30880_ i1=$abc$109383$new_n30879_ nq=$abc$109383$new_n30881_
-.subckt nxr2_x1 i0=$abc$109383$new_n30881_ i1=$abc$109383$new_n30878_ nq=$abc$109383$new_n30882_
-.subckt nxr2_x1 i0=$abc$109383$new_n30882_ i1=$abc$109383$new_n30877_ nq=$abc$109383$new_n30883_
-.subckt nxr2_x1 i0=$abc$109383$new_n30883_ i1=$abc$109383$new_n30873_ nq=$abc$109383$new_n30884_
-.subckt nxr2_x1 i0=$abc$109383$new_n30884_ i1=$abc$109383$new_n30868_ nq=$abc$109383$new_n30885_
-.subckt nxr2_x1 i0=$abc$109383$new_n30885_ i1=$abc$109383$new_n30860_ nq=$abc$109383$new_n30886_
+.subckt and2_x1 i0=$abc$109383$new_n29225_ i1=soc.cpu.minerva.payload__src1$44[7] q=$abc$109383$new_n30880_
+.subckt nexor2_x0 i0=$abc$109383$new_n30880_ i1=$abc$109383$new_n30879_ nq=$abc$109383$new_n30881_
+.subckt nexor2_x0 i0=$abc$109383$new_n30881_ i1=$abc$109383$new_n30878_ nq=$abc$109383$new_n30882_
+.subckt nexor2_x0 i0=$abc$109383$new_n30882_ i1=$abc$109383$new_n30877_ nq=$abc$109383$new_n30883_
+.subckt nexor2_x0 i0=$abc$109383$new_n30883_ i1=$abc$109383$new_n30873_ nq=$abc$109383$new_n30884_
+.subckt nexor2_x0 i0=$abc$109383$new_n30884_ i1=$abc$109383$new_n30868_ nq=$abc$109383$new_n30885_
+.subckt nexor2_x0 i0=$abc$109383$new_n30885_ i1=$abc$109383$new_n30860_ nq=$abc$109383$new_n30886_
 .subckt nand4_x0 i0=$abc$109383$new_n30617_ i1=$abc$109383$new_n30533_ i2=$abc$109383$new_n29411_ i3=$abc$109383$new_n29387_ nq=$abc$109383$new_n30887_
 .subckt nand2_x0 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29411_ nq=$abc$109383$new_n30888_
-.subckt a2_x2 i0=$abc$109383$new_n30888_ i1=$abc$109383$new_n30786_ q=$abc$109383$new_n30889_
-.subckt ao22_x2 i0=$abc$109383$new_n30785_ i1=$abc$109383$new_n30889_ i2=$abc$109383$new_n30887_ q=$abc$109383$new_n30890_
+.subckt and2_x1 i0=$abc$109383$new_n30888_ i1=$abc$109383$new_n30786_ q=$abc$109383$new_n30889_
+.subckt and21nor_x1 i0=$abc$109383$new_n30785_ i1=$abc$109383$new_n30889_ i2=$abc$109383$new_n30887_ nq=$abc$109383$new_n30890_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n30703_ i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29442_ nq=$abc$109383$new_n30891_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29288_ nq=$abc$109383$new_n30892_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[8] i1=$abc$109383$new_n29410_ nq=$abc$109383$new_n30893_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[7] i1=$abc$109383$new_n30395_ q=$abc$109383$new_n30894_
-.subckt nxr2_x1 i0=$abc$109383$new_n30894_ i1=$abc$109383$new_n30893_ nq=$abc$109383$new_n30895_
-.subckt nxr2_x1 i0=$abc$109383$new_n30895_ i1=$abc$109383$new_n30892_ nq=$abc$109383$new_n30896_
-.subckt nxr2_x1 i0=$abc$109383$new_n30896_ i1=$abc$109383$new_n30891_ nq=$abc$109383$new_n30897_
-.subckt nxr2_x1 i0=$abc$109383$new_n30897_ i1=$abc$109383$new_n30890_ nq=$abc$109383$new_n30898_
-.subckt a4_x2 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src2$45[7] i2=$abc$109383$new_n30400_ i3=soc.cpu.minerva.payload__src1$44[1] q=$abc$109383$new_n30899_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[7] i1=$abc$109383$new_n30395_ q=$abc$109383$new_n30894_
+.subckt nexor2_x0 i0=$abc$109383$new_n30894_ i1=$abc$109383$new_n30893_ nq=$abc$109383$new_n30895_
+.subckt nexor2_x0 i0=$abc$109383$new_n30895_ i1=$abc$109383$new_n30892_ nq=$abc$109383$new_n30896_
+.subckt nexor2_x0 i0=$abc$109383$new_n30896_ i1=$abc$109383$new_n30891_ nq=$abc$109383$new_n30897_
+.subckt nexor2_x0 i0=$abc$109383$new_n30897_ i1=$abc$109383$new_n30890_ nq=$abc$109383$new_n30898_
+.subckt and4_x1 i0=$abc$109383$new_n30617_ i1=soc.cpu.minerva.payload__src2$45[7] i2=$abc$109383$new_n30400_ i3=soc.cpu.minerva.payload__src1$44[1] q=$abc$109383$new_n30899_
 .subckt nand2_x0 i0=$abc$109383$new_n30782_ i1=$abc$109383$new_n30695_ nq=$abc$109383$new_n30900_
-.subckt oa22_x2 i0=$abc$109383$new_n30848_ i1=$abc$109383$new_n30900_ i2=$abc$109383$new_n30899_ q=$abc$109383$new_n30901_
+.subckt or21nand_x1 i0=$abc$109383$new_n30848_ i1=$abc$109383$new_n30900_ i2=$abc$109383$new_n30899_ nq=$abc$109383$new_n30901_
 .subckt nand2_x0 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30901_ nq=$abc$109383$new_n30902_
-.subckt nxr2_x1 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30901_ nq=$abc$109383$new_n30903_
-.subckt ao22_x2 i0=$abc$109383$new_n30780_ i1=$abc$109383$new_n30903_ i2=$abc$109383$new_n30902_ q=$abc$109383$new_n30904_
-.subckt nxr2_x1 i0=$abc$109383$new_n30904_ i1=$abc$109383$new_n30898_ nq=$abc$109383$new_n30905_
-.subckt nxr2_x1 i0=$abc$109383$new_n30905_ i1=$abc$109383$new_n30886_ nq=$abc$109383$new_n30906_
-.subckt nxr2_x1 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30856_ nq=$abc$109383$new_n30907_
+.subckt nexor2_x0 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30901_ nq=$abc$109383$new_n30903_
+.subckt and21nor_x1 i0=$abc$109383$new_n30780_ i1=$abc$109383$new_n30903_ i2=$abc$109383$new_n30902_ nq=$abc$109383$new_n30904_
+.subckt nexor2_x0 i0=$abc$109383$new_n30904_ i1=$abc$109383$new_n30898_ nq=$abc$109383$new_n30905_
+.subckt nexor2_x0 i0=$abc$109383$new_n30905_ i1=$abc$109383$new_n30886_ nq=$abc$109383$new_n30906_
+.subckt nexor2_x0 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30856_ nq=$abc$109383$new_n30907_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[9] i1=$abc$109383$new_n29387_ nq=$abc$109383$new_n30908_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[10] i1=soc.cpu.minerva.payload__src1$44[1] nq=$abc$109383$new_n30909_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[11] q=$abc$109383$new_n30910_
 .subckt buf_x4 i=$abc$109383$new_n30910_ q=$abc$109383$new_n30911_
-.subckt a2_x2 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n29470_ q=$abc$109383$new_n30912_
-.subckt nxr2_x1 i0=$abc$109383$new_n30912_ i1=$abc$109383$new_n30909_ nq=$abc$109383$new_n30913_
-.subckt nxr2_x1 i0=$abc$109383$new_n30913_ i1=$abc$109383$new_n30908_ nq=$abc$109383$new_n30914_
-.subckt nxr2_x1 i0=$abc$109383$new_n30914_ i1=$abc$109383$new_n30907_ nq=$abc$109383$new_n30915_
-.subckt nxr2_x1 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30847_ nq=$abc$109383$new_n30916_
-.subckt nxr2_x1 i0=$abc$109383$new_n30916_ i1=$abc$109383$new_n30846_ nq=$abc$109383$new_n30917_
-.subckt nxr2_x1 i0=$abc$109383$new_n30917_ i1=$abc$109383$new_n30832_ nq=$abc$109383$new_n30918_
-.subckt nxr2_x1 i0=$abc$109383$new_n30918_ i1=$abc$109383$new_n30825_ nq=$abc$109383$new_n30919_
-.subckt nxr2_x1 i0=$abc$109383$new_n30919_ i1=$abc$109383$new_n30822_ nq=$abc$109383$new_n30920_
-.subckt nxr2_x1 i0=$abc$109383$new_n30920_ i1=$abc$109383$new_n30819_ nq=$abc$109383$new_n30921_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30921_ i2=$abc$109383$new_n30813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102802
+.subckt and2_x1 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n29470_ q=$abc$109383$new_n30912_
+.subckt nexor2_x0 i0=$abc$109383$new_n30912_ i1=$abc$109383$new_n30909_ nq=$abc$109383$new_n30913_
+.subckt nexor2_x0 i0=$abc$109383$new_n30913_ i1=$abc$109383$new_n30908_ nq=$abc$109383$new_n30914_
+.subckt nexor2_x0 i0=$abc$109383$new_n30914_ i1=$abc$109383$new_n30907_ nq=$abc$109383$new_n30915_
+.subckt nexor2_x0 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30847_ nq=$abc$109383$new_n30916_
+.subckt nexor2_x0 i0=$abc$109383$new_n30916_ i1=$abc$109383$new_n30846_ nq=$abc$109383$new_n30917_
+.subckt nexor2_x0 i0=$abc$109383$new_n30917_ i1=$abc$109383$new_n30832_ nq=$abc$109383$new_n30918_
+.subckt nexor2_x0 i0=$abc$109383$new_n30918_ i1=$abc$109383$new_n30825_ nq=$abc$109383$new_n30919_
+.subckt nexor2_x0 i0=$abc$109383$new_n30919_ i1=$abc$109383$new_n30822_ nq=$abc$109383$new_n30920_
+.subckt nexor2_x0 i0=$abc$109383$new_n30920_ i1=$abc$109383$new_n30819_ nq=$abc$109383$new_n30921_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n30921_ i2=$abc$109383$new_n30813_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102802
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[12] nq=$abc$109383$new_n30923_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n30924_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n30923_ q=$abc$109383$new_n30925_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n30923_ nq=$abc$109383$new_n30925_
 .subckt nor2_x0 i0=$abc$109383$new_n30925_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n30926_
-.subckt a2_x2 i0=$abc$109383$new_n30919_ i1=$abc$109383$new_n30822_ q=$abc$109383$new_n30927_
-.subckt a2_x2 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30657_ q=$abc$109383$new_n30928_
-.subckt nxr2_x1 i0=$abc$109383$new_n30737_ i1=$abc$109383$new_n30928_ nq=$abc$109383$new_n30929_
-.subckt nxr2_x1 i0=$abc$109383$new_n30801_ i1=$abc$109383$new_n30929_ nq=$abc$109383$new_n30930_
-.subckt oa22_x2 i0=$abc$109383$new_n30723_ i1=$abc$109383$new_n30724_ i2=$abc$109383$new_n30930_ q=$abc$109383$new_n30931_
-.subckt nxr2_x1 i0=$abc$109383$new_n30919_ i1=$abc$109383$new_n30931_ nq=$abc$109383$new_n30932_
-.subckt oa22_x2 i0=$abc$109383$new_n30819_ i1=$abc$109383$new_n30932_ i2=$abc$109383$new_n30927_ q=$abc$109383$new_n30933_
-.subckt a2_x2 i0=$abc$109383$new_n30800_ i1=$abc$109383$new_n30826_ q=$abc$109383$new_n30934_
+.subckt and2_x1 i0=$abc$109383$new_n30919_ i1=$abc$109383$new_n30822_ q=$abc$109383$new_n30927_
+.subckt and2_x1 i0=$abc$109383$new_n30701_ i1=$abc$109383$new_n30657_ q=$abc$109383$new_n30928_
+.subckt nexor2_x0 i0=$abc$109383$new_n30737_ i1=$abc$109383$new_n30928_ nq=$abc$109383$new_n30929_
+.subckt nexor2_x0 i0=$abc$109383$new_n30801_ i1=$abc$109383$new_n30929_ nq=$abc$109383$new_n30930_
+.subckt or21nand_x1 i0=$abc$109383$new_n30723_ i1=$abc$109383$new_n30724_ i2=$abc$109383$new_n30930_ nq=$abc$109383$new_n30931_
+.subckt nexor2_x0 i0=$abc$109383$new_n30919_ i1=$abc$109383$new_n30931_ nq=$abc$109383$new_n30932_
+.subckt or21nand_x1 i0=$abc$109383$new_n30819_ i1=$abc$109383$new_n30932_ i2=$abc$109383$new_n30927_ nq=$abc$109383$new_n30933_
+.subckt and2_x1 i0=$abc$109383$new_n30800_ i1=$abc$109383$new_n30826_ q=$abc$109383$new_n30934_
 .subckt nand2_x0 i0=$abc$109383$new_n30830_ i1=$abc$109383$new_n30741_ nq=$abc$109383$new_n30935_
-.subckt oa22_x2 i0=$abc$109383$new_n30929_ i1=$abc$109383$new_n30935_ i2=$abc$109383$new_n30934_ q=$abc$109383$new_n30936_
-.subckt a2_x2 i0=$abc$109383$new_n30917_ i1=$abc$109383$new_n30936_ q=$abc$109383$new_n30937_
-.subckt a3_x2 i0=$abc$109383$new_n30824_ i1=$abc$109383$new_n30701_ i2=$abc$109383$new_n30657_ q=$abc$109383$new_n30938_
-.subckt oa22_x2 i0=$abc$109383$new_n30938_ i1=$abc$109383$new_n30918_ i2=$abc$109383$new_n30937_ q=$abc$109383$new_n30939_
-.subckt a2_x2 i0=$abc$109383$new_n30771_ i1=$abc$109383$new_n30836_ q=$abc$109383$new_n30940_
-.subckt oa22_x2 i0=$abc$109383$new_n30747_ i1=$abc$109383$new_n30772_ i2=$abc$109383$new_n30940_ q=$abc$109383$new_n30941_
+.subckt or21nand_x1 i0=$abc$109383$new_n30929_ i1=$abc$109383$new_n30935_ i2=$abc$109383$new_n30934_ nq=$abc$109383$new_n30936_
+.subckt and2_x1 i0=$abc$109383$new_n30917_ i1=$abc$109383$new_n30936_ q=$abc$109383$new_n30937_
+.subckt and3_x1 i0=$abc$109383$new_n30824_ i1=$abc$109383$new_n30701_ i2=$abc$109383$new_n30657_ q=$abc$109383$new_n30938_
+.subckt or21nand_x1 i0=$abc$109383$new_n30938_ i1=$abc$109383$new_n30918_ i2=$abc$109383$new_n30937_ nq=$abc$109383$new_n30939_
+.subckt and2_x1 i0=$abc$109383$new_n30771_ i1=$abc$109383$new_n30836_ q=$abc$109383$new_n30940_
+.subckt or21nand_x1 i0=$abc$109383$new_n30747_ i1=$abc$109383$new_n30772_ i2=$abc$109383$new_n30940_ nq=$abc$109383$new_n30941_
 .subckt nand3_x0 i0=$abc$109383$new_n30941_ i1=$abc$109383$new_n30793_ i2=$abc$109383$new_n30743_ nq=$abc$109383$new_n30942_
-.subckt a2_x2 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30829_ q=$abc$109383$new_n30943_
+.subckt and2_x1 i0=$abc$109383$new_n30799_ i1=$abc$109383$new_n30829_ q=$abc$109383$new_n30943_
 .subckt nand2_x0 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30943_ nq=$abc$109383$new_n30944_
-.subckt nxr2_x1 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30943_ nq=$abc$109383$new_n30945_
-.subckt ao22_x2 i0=$abc$109383$new_n30846_ i1=$abc$109383$new_n30945_ i2=$abc$109383$new_n30944_ q=$abc$109383$new_n30946_
+.subckt nexor2_x0 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30943_ nq=$abc$109383$new_n30945_
+.subckt and21nor_x1 i0=$abc$109383$new_n30846_ i1=$abc$109383$new_n30945_ i2=$abc$109383$new_n30944_ nq=$abc$109383$new_n30946_
 .subckt nand2_x0 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30856_ nq=$abc$109383$new_n30947_
-.subckt a2_x2 i0=$abc$109383$new_n30769_ i1=$abc$109383$new_n30863_ q=$abc$109383$new_n30948_
+.subckt and2_x1 i0=$abc$109383$new_n30769_ i1=$abc$109383$new_n30863_ q=$abc$109383$new_n30948_
 .subckt nand2_x0 i0=$abc$109383$new_n30866_ i1=$abc$109383$new_n30764_ nq=$abc$109383$new_n30949_
-.subckt oa22_x2 i0=$abc$109383$new_n30839_ i1=$abc$109383$new_n30949_ i2=$abc$109383$new_n30948_ q=$abc$109383$new_n30950_
+.subckt or21nand_x1 i0=$abc$109383$new_n30839_ i1=$abc$109383$new_n30949_ i2=$abc$109383$new_n30948_ nq=$abc$109383$new_n30950_
 .subckt nand2_x0 i0=$abc$109383$new_n30884_ i1=$abc$109383$new_n30950_ nq=$abc$109383$new_n30951_
 .subckt nand2_x0 i0=$abc$109383$new_n29313_ i1=$abc$109383$new_n29572_ nq=$abc$109383$new_n30952_
-.subckt nxr2_x1 i0=$abc$109383$new_n30872_ i1=$abc$109383$new_n30952_ nq=$abc$109383$new_n30953_
-.subckt nxr2_x1 i0=$abc$109383$new_n30883_ i1=$abc$109383$new_n30953_ nq=$abc$109383$new_n30954_
-.subckt a2_x2 i0=$abc$109383$new_n30954_ i1=$abc$109383$new_n30868_ q=$abc$109383$new_n30955_
+.subckt nexor2_x0 i0=$abc$109383$new_n30872_ i1=$abc$109383$new_n30952_ nq=$abc$109383$new_n30953_
+.subckt nexor2_x0 i0=$abc$109383$new_n30883_ i1=$abc$109383$new_n30953_ nq=$abc$109383$new_n30954_
+.subckt and2_x1 i0=$abc$109383$new_n30954_ i1=$abc$109383$new_n30868_ q=$abc$109383$new_n30955_
 .subckt nand4_x0 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29523_ i3=$abc$109383$new_n29501_ nq=$abc$109383$new_n30956_
-.subckt a2_x2 i0=$abc$109383$new_n30858_ i1=$abc$109383$new_n30757_ q=$abc$109383$new_n30957_
-.subckt ao22_x2 i0=$abc$109383$new_n30838_ i1=$abc$109383$new_n30957_ i2=$abc$109383$new_n30956_ q=$abc$109383$new_n30958_
-.subckt ao22_x2 i0=$abc$109383$new_n30958_ i1=$abc$109383$new_n30955_ i2=$abc$109383$new_n30951_ q=$abc$109383$new_n30959_
-.subckt nxr2_x1 i0=$abc$109383$new_n30959_ i1=$abc$109383$new_n30947_ nq=$abc$109383$new_n30960_
+.subckt and2_x1 i0=$abc$109383$new_n30858_ i1=$abc$109383$new_n30757_ q=$abc$109383$new_n30957_
+.subckt and21nor_x1 i0=$abc$109383$new_n30838_ i1=$abc$109383$new_n30957_ i2=$abc$109383$new_n30956_ nq=$abc$109383$new_n30958_
+.subckt and21nor_x1 i0=$abc$109383$new_n30958_ i1=$abc$109383$new_n30955_ i2=$abc$109383$new_n30951_ nq=$abc$109383$new_n30959_
+.subckt nexor2_x0 i0=$abc$109383$new_n30959_ i1=$abc$109383$new_n30947_ nq=$abc$109383$new_n30960_
 .subckt nand4_x0 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30850_ i2=$abc$109383$new_n30780_ i3=$abc$109383$new_n30774_ nq=$abc$109383$new_n30961_
-.subckt a2_x2 i0=$abc$109383$new_n30853_ i1=$abc$109383$new_n30775_ q=$abc$109383$new_n30962_
-.subckt ao22_x2 i0=$abc$109383$new_n30773_ i1=$abc$109383$new_n30962_ i2=$abc$109383$new_n30961_ q=$abc$109383$new_n30963_
-.subckt nxr2_x1 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30963_ nq=$abc$109383$new_n30964_
+.subckt and2_x1 i0=$abc$109383$new_n30853_ i1=$abc$109383$new_n30775_ q=$abc$109383$new_n30962_
+.subckt and21nor_x1 i0=$abc$109383$new_n30773_ i1=$abc$109383$new_n30962_ i2=$abc$109383$new_n30961_ nq=$abc$109383$new_n30963_
+.subckt nexor2_x0 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30963_ nq=$abc$109383$new_n30964_
 .subckt nand2_x0 i0=$abc$109383$new_n30914_ i1=$abc$109383$new_n30964_ nq=$abc$109383$new_n30965_
-.subckt a2_x2 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30852_ q=$abc$109383$new_n30966_
-.subckt a2_x2 i0=$abc$109383$new_n30898_ i1=$abc$109383$new_n30966_ q=$abc$109383$new_n30967_
-.subckt nxr2_x1 i0=$abc$109383$new_n30885_ i1=$abc$109383$new_n30958_ nq=$abc$109383$new_n30968_
-.subckt oa22_x2 i0=$abc$109383$new_n30968_ i1=$abc$109383$new_n30905_ i2=$abc$109383$new_n30967_ q=$abc$109383$new_n30969_
-.subckt a4_x2 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29547_ i3=$abc$109383$new_n29523_ q=$abc$109383$new_n30970_
+.subckt and2_x1 i0=$abc$109383$new_n30790_ i1=$abc$109383$new_n30852_ q=$abc$109383$new_n30966_
+.subckt and2_x1 i0=$abc$109383$new_n30898_ i1=$abc$109383$new_n30966_ q=$abc$109383$new_n30967_
+.subckt nexor2_x0 i0=$abc$109383$new_n30885_ i1=$abc$109383$new_n30958_ nq=$abc$109383$new_n30968_
+.subckt or21nand_x1 i0=$abc$109383$new_n30968_ i1=$abc$109383$new_n30905_ i2=$abc$109383$new_n30967_ nq=$abc$109383$new_n30969_
+.subckt and4_x1 i0=$abc$109383$new_n29253_ i1=$abc$109383$new_n29370_ i2=$abc$109383$new_n29547_ i3=$abc$109383$new_n29523_ q=$abc$109383$new_n30970_
 .subckt nand2_x0 i0=$abc$109383$new_n29370_ i1=$abc$109383$new_n29548_ nq=$abc$109383$new_n30971_
 .subckt nand2_x0 i0=$abc$109383$new_n30971_ i1=$abc$109383$new_n30870_ nq=$abc$109383$new_n30972_
-.subckt oa22_x2 i0=$abc$109383$new_n30869_ i1=$abc$109383$new_n30972_ i2=$abc$109383$new_n30970_ q=$abc$109383$new_n30973_
-.subckt a4_x2 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n29322_ i3=$abc$109383$new_n29288_ q=$abc$109383$new_n30974_
+.subckt or21nand_x1 i0=$abc$109383$new_n30869_ i1=$abc$109383$new_n30972_ i2=$abc$109383$new_n30970_ nq=$abc$109383$new_n30973_
+.subckt and4_x1 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=$abc$109383$new_n29322_ i3=$abc$109383$new_n29288_ q=$abc$109383$new_n30974_
 .subckt nand2_x0 i0=$abc$109383$new_n30875_ i1=$abc$109383$new_n30766_ nq=$abc$109383$new_n30975_
-.subckt oa22_x2 i0=$abc$109383$new_n30865_ i1=$abc$109383$new_n30975_ i2=$abc$109383$new_n30974_ q=$abc$109383$new_n30976_
+.subckt or21nand_x1 i0=$abc$109383$new_n30865_ i1=$abc$109383$new_n30975_ i2=$abc$109383$new_n30974_ nq=$abc$109383$new_n30976_
 .subckt nand2_x0 i0=$abc$109383$new_n30882_ i1=$abc$109383$new_n30976_ nq=$abc$109383$new_n30977_
-.subckt a2_x2 i0=$abc$109383$new_n29241_ i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30978_
-.subckt nxr2_x1 i0=$abc$109383$new_n30881_ i1=$abc$109383$new_n30978_ nq=$abc$109383$new_n30979_
-.subckt a2_x2 i0=$abc$109383$new_n30979_ i1=$abc$109383$new_n30877_ q=$abc$109383$new_n30980_
-.subckt ao22_x2 i0=$abc$109383$new_n30873_ i1=$abc$109383$new_n30980_ i2=$abc$109383$new_n30977_ q=$abc$109383$new_n30981_
-.subckt a2_x2 i0=$abc$109383$new_n29311_ i1=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n30982_
+.subckt and2_x1 i0=$abc$109383$new_n29241_ i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30978_
+.subckt nexor2_x0 i0=$abc$109383$new_n30881_ i1=$abc$109383$new_n30978_ nq=$abc$109383$new_n30979_
+.subckt and2_x1 i0=$abc$109383$new_n30979_ i1=$abc$109383$new_n30877_ q=$abc$109383$new_n30980_
+.subckt and21nor_x1 i0=$abc$109383$new_n30873_ i1=$abc$109383$new_n30980_ i2=$abc$109383$new_n30977_ nq=$abc$109383$new_n30981_
+.subckt and2_x1 i0=$abc$109383$new_n29311_ i1=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n30982_
 .subckt nand2_x0 i0=$abc$109383$new_n29251_ i1=$abc$109383$new_n29547_ nq=$abc$109383$new_n30983_
-.subckt a2_x2 i0=$abc$109383$new_n29369_ i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n30984_
-.subckt nxr2_x1 i0=$abc$109383$new_n30984_ i1=$abc$109383$new_n30983_ nq=$abc$109383$new_n30985_
-.subckt nxr2_x1 i0=$abc$109383$new_n30985_ i1=$abc$109383$new_n30982_ nq=$abc$109383$new_n30986_
+.subckt and2_x1 i0=$abc$109383$new_n29369_ i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n30984_
+.subckt nexor2_x0 i0=$abc$109383$new_n30984_ i1=$abc$109383$new_n30983_ nq=$abc$109383$new_n30985_
+.subckt nexor2_x0 i0=$abc$109383$new_n30985_ i1=$abc$109383$new_n30982_ nq=$abc$109383$new_n30986_
 .subckt nand4_x0 i0=$abc$109383$new_n30444_ i1=$abc$109383$new_n29226_ i2=soc.cpu.minerva.payload__src1$44[7] i3=$abc$109383$new_n29322_ nq=$abc$109383$new_n30987_
 .subckt nand2_x0 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[7] nq=$abc$109383$new_n30988_
-.subckt a2_x2 i0=$abc$109383$new_n30988_ i1=$abc$109383$new_n30879_ q=$abc$109383$new_n30989_
-.subckt ao22_x2 i0=$abc$109383$new_n30878_ i1=$abc$109383$new_n30989_ i2=$abc$109383$new_n30987_ q=$abc$109383$new_n30990_
+.subckt and2_x1 i0=$abc$109383$new_n30988_ i1=$abc$109383$new_n30879_ q=$abc$109383$new_n30989_
+.subckt and21nor_x1 i0=$abc$109383$new_n30878_ i1=$abc$109383$new_n30989_ i2=$abc$109383$new_n30987_ nq=$abc$109383$new_n30990_
 .subckt nand2_x0 i0=$abc$109383$new_n29241_ i1=soc.cpu.minerva.payload__src1$44[9] nq=$abc$109383$new_n30991_
 .subckt nand2_x0 i0=$abc$109383$new_n30404_ i1=soc.cpu.minerva.payload__src1$44[7] nq=$abc$109383$new_n30992_
-.subckt a2_x2 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30993_
-.subckt nxr2_x1 i0=$abc$109383$new_n30993_ i1=$abc$109383$new_n30992_ nq=$abc$109383$new_n30994_
-.subckt nxr2_x1 i0=$abc$109383$new_n30994_ i1=$abc$109383$new_n30991_ nq=$abc$109383$new_n30995_
-.subckt nxr2_x1 i0=$abc$109383$new_n30995_ i1=$abc$109383$new_n30990_ nq=$abc$109383$new_n30996_
-.subckt nxr2_x1 i0=$abc$109383$new_n30996_ i1=$abc$109383$new_n30986_ nq=$abc$109383$new_n30997_
-.subckt nxr2_x1 i0=$abc$109383$new_n30997_ i1=$abc$109383$new_n30981_ nq=$abc$109383$new_n30998_
-.subckt nxr2_x1 i0=$abc$109383$new_n30998_ i1=$abc$109383$new_n30973_ nq=$abc$109383$new_n30999_
-.subckt a2_x2 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30901_ q=$abc$109383$new_n31000_
+.subckt and2_x1 i0=$abc$109383$new_n30402_ i1=soc.cpu.minerva.payload__src1$44[8] q=$abc$109383$new_n30993_
+.subckt nexor2_x0 i0=$abc$109383$new_n30993_ i1=$abc$109383$new_n30992_ nq=$abc$109383$new_n30994_
+.subckt nexor2_x0 i0=$abc$109383$new_n30994_ i1=$abc$109383$new_n30991_ nq=$abc$109383$new_n30995_
+.subckt nexor2_x0 i0=$abc$109383$new_n30995_ i1=$abc$109383$new_n30990_ nq=$abc$109383$new_n30996_
+.subckt nexor2_x0 i0=$abc$109383$new_n30996_ i1=$abc$109383$new_n30986_ nq=$abc$109383$new_n30997_
+.subckt nexor2_x0 i0=$abc$109383$new_n30997_ i1=$abc$109383$new_n30981_ nq=$abc$109383$new_n30998_
+.subckt nexor2_x0 i0=$abc$109383$new_n30998_ i1=$abc$109383$new_n30973_ nq=$abc$109383$new_n30999_
+.subckt and2_x1 i0=$abc$109383$new_n30789_ i1=$abc$109383$new_n30901_ q=$abc$109383$new_n31000_
 .subckt nand2_x0 i0=$abc$109383$new_n30898_ i1=$abc$109383$new_n31000_ nq=$abc$109383$new_n31001_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n30703_ i2=$abc$109383$new_n29468_ i3=$abc$109383$new_n29442_ q=$abc$109383$new_n31002_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n30703_ i2=$abc$109383$new_n29468_ i3=$abc$109383$new_n29442_ q=$abc$109383$new_n31002_
 .subckt nand2_x0 i0=$abc$109383$new_n30896_ i1=$abc$109383$new_n31002_ nq=$abc$109383$new_n31003_
-.subckt a2_x2 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29288_ q=$abc$109383$new_n31004_
-.subckt nxr2_x1 i0=$abc$109383$new_n30895_ i1=$abc$109383$new_n31004_ nq=$abc$109383$new_n31005_
-.subckt a2_x2 i0=$abc$109383$new_n31005_ i1=$abc$109383$new_n30891_ q=$abc$109383$new_n31006_
-.subckt ao22_x2 i0=$abc$109383$new_n30890_ i1=$abc$109383$new_n31006_ i2=$abc$109383$new_n31003_ q=$abc$109383$new_n31007_
+.subckt and2_x1 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29288_ q=$abc$109383$new_n31004_
+.subckt nexor2_x0 i0=$abc$109383$new_n30895_ i1=$abc$109383$new_n31004_ nq=$abc$109383$new_n31005_
+.subckt and2_x1 i0=$abc$109383$new_n31005_ i1=$abc$109383$new_n30891_ q=$abc$109383$new_n31006_
+.subckt and21nor_x1 i0=$abc$109383$new_n30890_ i1=$abc$109383$new_n31006_ i2=$abc$109383$new_n31003_ nq=$abc$109383$new_n31007_
 .subckt nand4_x0 i0=$abc$109383$new_n30617_ i1=$abc$109383$new_n30533_ i2=$abc$109383$new_n29265_ i3=$abc$109383$new_n29411_ nq=$abc$109383$new_n31008_
 .subckt nand2_x0 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n31009_
-.subckt a2_x2 i0=$abc$109383$new_n31009_ i1=$abc$109383$new_n30893_ q=$abc$109383$new_n31010_
-.subckt ao22_x2 i0=$abc$109383$new_n30892_ i1=$abc$109383$new_n31010_ i2=$abc$109383$new_n31008_ q=$abc$109383$new_n31011_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[8] i1=$abc$109383$new_n30395_ q=$abc$109383$new_n31012_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[7] i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n31013_
-.subckt nxr2_x1 i0=$abc$109383$new_n31013_ i1=$abc$109383$new_n31012_ nq=$abc$109383$new_n31014_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n31015_
-.subckt nxr2_x1 i0=$abc$109383$new_n31015_ i1=$abc$109383$new_n31014_ nq=$abc$109383$new_n31016_
+.subckt and2_x1 i0=$abc$109383$new_n31009_ i1=$abc$109383$new_n30893_ q=$abc$109383$new_n31010_
+.subckt and21nor_x1 i0=$abc$109383$new_n30892_ i1=$abc$109383$new_n31010_ i2=$abc$109383$new_n31008_ nq=$abc$109383$new_n31011_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[8] i1=$abc$109383$new_n30395_ q=$abc$109383$new_n31012_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[7] i1=soc.cpu.minerva.payload__src1$44[5] q=$abc$109383$new_n31013_
+.subckt nexor2_x0 i0=$abc$109383$new_n31013_ i1=$abc$109383$new_n31012_ nq=$abc$109383$new_n31014_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[6] i1=$abc$109383$new_n29321_ q=$abc$109383$new_n31015_
+.subckt nexor2_x0 i0=$abc$109383$new_n31015_ i1=$abc$109383$new_n31014_ nq=$abc$109383$new_n31016_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[11] i1=soc.cpu.minerva.payload__src2$45[10] i2=$abc$109383$new_n29467_ i3=$abc$109383$new_n29441_ nq=$abc$109383$new_n31017_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[11] i1=$abc$109383$new_n29467_ nq=$abc$109383$new_n31018_
-.subckt a2_x2 i0=$abc$109383$new_n31018_ i1=$abc$109383$new_n30909_ q=$abc$109383$new_n31019_
-.subckt ao22_x2 i0=$abc$109383$new_n30908_ i1=$abc$109383$new_n31019_ i2=$abc$109383$new_n31017_ q=$abc$109383$new_n31020_
-.subckt nxr2_x1 i0=$abc$109383$new_n31020_ i1=$abc$109383$new_n31016_ nq=$abc$109383$new_n31021_
-.subckt nxr2_x1 i0=$abc$109383$new_n31021_ i1=$abc$109383$new_n31011_ nq=$abc$109383$new_n31022_
-.subckt nxr2_x1 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31007_ nq=$abc$109383$new_n31023_
-.subckt nxr2_x1 i0=$abc$109383$new_n31023_ i1=$abc$109383$new_n31001_ nq=$abc$109383$new_n31024_
-.subckt nxr2_x1 i0=$abc$109383$new_n31024_ i1=$abc$109383$new_n30999_ nq=$abc$109383$new_n31025_
-.subckt nxr2_x1 i0=$abc$109383$new_n31025_ i1=$abc$109383$new_n30969_ nq=$abc$109383$new_n31026_
-.subckt a2_x2 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29412_ q=$abc$109383$new_n31027_
+.subckt and2_x1 i0=$abc$109383$new_n31018_ i1=$abc$109383$new_n30909_ q=$abc$109383$new_n31019_
+.subckt and21nor_x1 i0=$abc$109383$new_n30908_ i1=$abc$109383$new_n31019_ i2=$abc$109383$new_n31017_ nq=$abc$109383$new_n31020_
+.subckt nexor2_x0 i0=$abc$109383$new_n31020_ i1=$abc$109383$new_n31016_ nq=$abc$109383$new_n31021_
+.subckt nexor2_x0 i0=$abc$109383$new_n31021_ i1=$abc$109383$new_n31011_ nq=$abc$109383$new_n31022_
+.subckt nexor2_x0 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31007_ nq=$abc$109383$new_n31023_
+.subckt nexor2_x0 i0=$abc$109383$new_n31023_ i1=$abc$109383$new_n31001_ nq=$abc$109383$new_n31024_
+.subckt nexor2_x0 i0=$abc$109383$new_n31024_ i1=$abc$109383$new_n30999_ nq=$abc$109383$new_n31025_
+.subckt nexor2_x0 i0=$abc$109383$new_n31025_ i1=$abc$109383$new_n30969_ nq=$abc$109383$new_n31026_
+.subckt and2_x1 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29412_ q=$abc$109383$new_n31027_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[11] i1=$abc$109383$new_n29441_ nq=$abc$109383$new_n31028_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n29387_ q=$abc$109383$new_n31029_
-.subckt nxr2_x1 i0=$abc$109383$new_n31029_ i1=$abc$109383$new_n31028_ nq=$abc$109383$new_n31030_
-.subckt nxr2_x1 i0=$abc$109383$new_n31030_ i1=$abc$109383$new_n31027_ nq=$abc$109383$new_n31031_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29468_ q=$abc$109383$new_n31032_
-.subckt nxr2_x1 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31031_ nq=$abc$109383$new_n31033_
-.subckt nxr2_x1 i0=$abc$109383$new_n31033_ i1=$abc$109383$new_n31026_ nq=$abc$109383$new_n31034_
-.subckt nxr2_x1 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n30965_ nq=$abc$109383$new_n31035_
-.subckt nxr2_x1 i0=$abc$109383$new_n31035_ i1=$abc$109383$new_n30960_ nq=$abc$109383$new_n31036_
-.subckt nxr2_x1 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n30946_ nq=$abc$109383$new_n31037_
-.subckt nxr2_x1 i0=$abc$109383$new_n31037_ i1=$abc$109383$new_n30942_ nq=$abc$109383$new_n31038_
-.subckt nxr2_x1 i0=$abc$109383$new_n31038_ i1=$abc$109383$new_n30939_ nq=$abc$109383$new_n31039_
-.subckt nxr2_x1 i0=$abc$109383$new_n31039_ i1=$abc$109383$new_n30933_ nq=$abc$109383$new_n31040_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31040_ i2=$abc$109383$new_n30926_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102806
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n29387_ q=$abc$109383$new_n31029_
+.subckt nexor2_x0 i0=$abc$109383$new_n31029_ i1=$abc$109383$new_n31028_ nq=$abc$109383$new_n31030_
+.subckt nexor2_x0 i0=$abc$109383$new_n31030_ i1=$abc$109383$new_n31027_ nq=$abc$109383$new_n31031_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29468_ q=$abc$109383$new_n31032_
+.subckt nexor2_x0 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31031_ nq=$abc$109383$new_n31033_
+.subckt nexor2_x0 i0=$abc$109383$new_n31033_ i1=$abc$109383$new_n31026_ nq=$abc$109383$new_n31034_
+.subckt nexor2_x0 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n30965_ nq=$abc$109383$new_n31035_
+.subckt nexor2_x0 i0=$abc$109383$new_n31035_ i1=$abc$109383$new_n30960_ nq=$abc$109383$new_n31036_
+.subckt nexor2_x0 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n30946_ nq=$abc$109383$new_n31037_
+.subckt nexor2_x0 i0=$abc$109383$new_n31037_ i1=$abc$109383$new_n30942_ nq=$abc$109383$new_n31038_
+.subckt nexor2_x0 i0=$abc$109383$new_n31038_ i1=$abc$109383$new_n30939_ nq=$abc$109383$new_n31039_
+.subckt nexor2_x0 i0=$abc$109383$new_n31039_ i1=$abc$109383$new_n30933_ nq=$abc$109383$new_n31040_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31040_ i2=$abc$109383$new_n30926_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102806
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[13] nq=$abc$109383$new_n31042_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31042_ q=$abc$109383$new_n31043_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31042_ nq=$abc$109383$new_n31043_
 .subckt nor2_x0 i0=$abc$109383$new_n31043_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n31044_
-.subckt a2_x2 i0=$abc$109383$new_n30918_ i1=$abc$109383$new_n30938_ q=$abc$109383$new_n31045_
-.subckt ao22_x2 i0=$abc$109383$new_n30937_ i1=$abc$109383$new_n31045_ i2=$abc$109383$new_n31038_ q=$abc$109383$new_n31046_
+.subckt and2_x1 i0=$abc$109383$new_n30918_ i1=$abc$109383$new_n30938_ q=$abc$109383$new_n31045_
+.subckt and21nor_x1 i0=$abc$109383$new_n30937_ i1=$abc$109383$new_n31045_ i2=$abc$109383$new_n31038_ nq=$abc$109383$new_n31046_
 .subckt nand2_x0 i0=$abc$109383$new_n30917_ i1=$abc$109383$new_n30936_ nq=$abc$109383$new_n31047_
-.subckt a2_x2 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30743_ q=$abc$109383$new_n31048_
-.subckt nxr2_x1 i0=$abc$109383$new_n30845_ i1=$abc$109383$new_n31048_ nq=$abc$109383$new_n31049_
-.subckt nxr2_x1 i0=$abc$109383$new_n30916_ i1=$abc$109383$new_n31049_ nq=$abc$109383$new_n31050_
-.subckt a2_x2 i0=$abc$109383$new_n31050_ i1=$abc$109383$new_n30832_ q=$abc$109383$new_n31051_
-.subckt ao22_x2 i0=$abc$109383$new_n30825_ i1=$abc$109383$new_n31051_ i2=$abc$109383$new_n31047_ q=$abc$109383$new_n31052_
-.subckt nxr2_x1 i0=$abc$109383$new_n31038_ i1=$abc$109383$new_n31052_ nq=$abc$109383$new_n31053_
-.subckt oa22_x2 i0=$abc$109383$new_n30933_ i1=$abc$109383$new_n31053_ i2=$abc$109383$new_n31046_ q=$abc$109383$new_n31054_
-.subckt a2_x2 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30943_ q=$abc$109383$new_n31055_
-.subckt oa22_x2 i0=$abc$109383$new_n31049_ i1=$abc$109383$new_n30916_ i2=$abc$109383$new_n31055_ q=$abc$109383$new_n31056_
-.subckt a2_x2 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n31056_ q=$abc$109383$new_n31057_
-.subckt a3_x2 i0=$abc$109383$new_n30941_ i1=$abc$109383$new_n30793_ i2=$abc$109383$new_n30743_ q=$abc$109383$new_n31058_
-.subckt oa22_x2 i0=$abc$109383$new_n31058_ i1=$abc$109383$new_n31037_ i2=$abc$109383$new_n31057_ q=$abc$109383$new_n31059_
-.subckt a2_x2 i0=$abc$109383$new_n30884_ i1=$abc$109383$new_n30950_ q=$abc$109383$new_n31060_
-.subckt oa22_x2 i0=$abc$109383$new_n30860_ i1=$abc$109383$new_n30885_ i2=$abc$109383$new_n31060_ q=$abc$109383$new_n31061_
+.subckt and2_x1 i0=$abc$109383$new_n30793_ i1=$abc$109383$new_n30743_ q=$abc$109383$new_n31048_
+.subckt nexor2_x0 i0=$abc$109383$new_n30845_ i1=$abc$109383$new_n31048_ nq=$abc$109383$new_n31049_
+.subckt nexor2_x0 i0=$abc$109383$new_n30916_ i1=$abc$109383$new_n31049_ nq=$abc$109383$new_n31050_
+.subckt and2_x1 i0=$abc$109383$new_n31050_ i1=$abc$109383$new_n30832_ q=$abc$109383$new_n31051_
+.subckt and21nor_x1 i0=$abc$109383$new_n30825_ i1=$abc$109383$new_n31051_ i2=$abc$109383$new_n31047_ nq=$abc$109383$new_n31052_
+.subckt nexor2_x0 i0=$abc$109383$new_n31038_ i1=$abc$109383$new_n31052_ nq=$abc$109383$new_n31053_
+.subckt or21nand_x1 i0=$abc$109383$new_n30933_ i1=$abc$109383$new_n31053_ i2=$abc$109383$new_n31046_ nq=$abc$109383$new_n31054_
+.subckt and2_x1 i0=$abc$109383$new_n30915_ i1=$abc$109383$new_n30943_ q=$abc$109383$new_n31055_
+.subckt or21nand_x1 i0=$abc$109383$new_n31049_ i1=$abc$109383$new_n30916_ i2=$abc$109383$new_n31055_ nq=$abc$109383$new_n31056_
+.subckt and2_x1 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n31056_ q=$abc$109383$new_n31057_
+.subckt and3_x1 i0=$abc$109383$new_n30941_ i1=$abc$109383$new_n30793_ i2=$abc$109383$new_n30743_ q=$abc$109383$new_n31058_
+.subckt or21nand_x1 i0=$abc$109383$new_n31058_ i1=$abc$109383$new_n31037_ i2=$abc$109383$new_n31057_ nq=$abc$109383$new_n31059_
+.subckt and2_x1 i0=$abc$109383$new_n30884_ i1=$abc$109383$new_n30950_ q=$abc$109383$new_n31060_
+.subckt or21nand_x1 i0=$abc$109383$new_n30860_ i1=$abc$109383$new_n30885_ i2=$abc$109383$new_n31060_ nq=$abc$109383$new_n31061_
 .subckt nand3_x0 i0=$abc$109383$new_n31061_ i1=$abc$109383$new_n30906_ i2=$abc$109383$new_n30856_ nq=$abc$109383$new_n31062_
-.subckt a2_x2 i0=$abc$109383$new_n30914_ i1=$abc$109383$new_n30964_ q=$abc$109383$new_n31063_
+.subckt and2_x1 i0=$abc$109383$new_n30914_ i1=$abc$109383$new_n30964_ q=$abc$109383$new_n31063_
 .subckt nand2_x0 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n31063_ nq=$abc$109383$new_n31064_
-.subckt nxr2_x1 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n31063_ nq=$abc$109383$new_n31065_
-.subckt ao22_x2 i0=$abc$109383$new_n30960_ i1=$abc$109383$new_n31065_ i2=$abc$109383$new_n31064_ q=$abc$109383$new_n31066_
+.subckt nexor2_x0 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n31063_ nq=$abc$109383$new_n31065_
+.subckt and21nor_x1 i0=$abc$109383$new_n30960_ i1=$abc$109383$new_n31065_ i2=$abc$109383$new_n31064_ nq=$abc$109383$new_n31066_
 .subckt nand2_x0 i0=$abc$109383$new_n31025_ i1=$abc$109383$new_n30969_ nq=$abc$109383$new_n31067_
-.subckt a2_x2 i0=$abc$109383$new_n30882_ i1=$abc$109383$new_n30976_ q=$abc$109383$new_n31068_
+.subckt and2_x1 i0=$abc$109383$new_n30882_ i1=$abc$109383$new_n30976_ q=$abc$109383$new_n31068_
 .subckt nand2_x0 i0=$abc$109383$new_n30979_ i1=$abc$109383$new_n30877_ nq=$abc$109383$new_n31069_
-.subckt oa22_x2 i0=$abc$109383$new_n30953_ i1=$abc$109383$new_n31069_ i2=$abc$109383$new_n31068_ q=$abc$109383$new_n31070_
+.subckt or21nand_x1 i0=$abc$109383$new_n30953_ i1=$abc$109383$new_n31069_ i2=$abc$109383$new_n31068_ nq=$abc$109383$new_n31070_
 .subckt nand2_x0 i0=$abc$109383$new_n30997_ i1=$abc$109383$new_n31070_ nq=$abc$109383$new_n31071_
 .subckt nand2_x0 i0=$abc$109383$new_n29313_ i1=$abc$109383$new_n29598_ nq=$abc$109383$new_n31072_
-.subckt nxr2_x1 i0=$abc$109383$new_n30985_ i1=$abc$109383$new_n31072_ nq=$abc$109383$new_n31073_
-.subckt nxr2_x1 i0=$abc$109383$new_n30996_ i1=$abc$109383$new_n31073_ nq=$abc$109383$new_n31074_
-.subckt a2_x2 i0=$abc$109383$new_n31074_ i1=$abc$109383$new_n30981_ q=$abc$109383$new_n31075_
+.subckt nexor2_x0 i0=$abc$109383$new_n30985_ i1=$abc$109383$new_n31072_ nq=$abc$109383$new_n31073_
+.subckt nexor2_x0 i0=$abc$109383$new_n30996_ i1=$abc$109383$new_n31073_ nq=$abc$109383$new_n31074_
+.subckt and2_x1 i0=$abc$109383$new_n31074_ i1=$abc$109383$new_n30981_ q=$abc$109383$new_n31075_
 .subckt nand4_x0 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29549_ i3=$abc$109383$new_n29525_ nq=$abc$109383$new_n31076_
-.subckt a2_x2 i0=$abc$109383$new_n30971_ i1=$abc$109383$new_n30870_ q=$abc$109383$new_n31077_
-.subckt ao22_x2 i0=$abc$109383$new_n30952_ i1=$abc$109383$new_n31077_ i2=$abc$109383$new_n31076_ q=$abc$109383$new_n31078_
-.subckt ao22_x2 i0=$abc$109383$new_n31078_ i1=$abc$109383$new_n31075_ i2=$abc$109383$new_n31071_ q=$abc$109383$new_n31079_
-.subckt nxr2_x1 i0=$abc$109383$new_n31079_ i1=$abc$109383$new_n31067_ nq=$abc$109383$new_n31080_
+.subckt and2_x1 i0=$abc$109383$new_n30971_ i1=$abc$109383$new_n30870_ q=$abc$109383$new_n31077_
+.subckt and21nor_x1 i0=$abc$109383$new_n30952_ i1=$abc$109383$new_n31077_ i2=$abc$109383$new_n31076_ nq=$abc$109383$new_n31078_
+.subckt and21nor_x1 i0=$abc$109383$new_n31078_ i1=$abc$109383$new_n31075_ i2=$abc$109383$new_n31071_ nq=$abc$109383$new_n31079_
+.subckt nexor2_x0 i0=$abc$109383$new_n31079_ i1=$abc$109383$new_n31067_ nq=$abc$109383$new_n31080_
 .subckt nand2_x0 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29411_ nq=$abc$109383$new_n31081_
-.subckt nxr2_x1 i0=$abc$109383$new_n31030_ i1=$abc$109383$new_n31081_ nq=$abc$109383$new_n31082_
-.subckt nxr2_x1 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31082_ nq=$abc$109383$new_n31083_
-.subckt o2_x2 i0=$abc$109383$new_n31083_ i1=$abc$109383$new_n31026_ q=$abc$109383$new_n31084_
-.subckt a2_x2 i0=$abc$109383$new_n30898_ i1=$abc$109383$new_n31000_ q=$abc$109383$new_n31085_
-.subckt a2_x2 i0=$abc$109383$new_n31023_ i1=$abc$109383$new_n31085_ q=$abc$109383$new_n31086_
-.subckt a2_x2 i0=$abc$109383$new_n30896_ i1=$abc$109383$new_n31002_ q=$abc$109383$new_n31087_
+.subckt nexor2_x0 i0=$abc$109383$new_n31030_ i1=$abc$109383$new_n31081_ nq=$abc$109383$new_n31082_
+.subckt nexor2_x0 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31082_ nq=$abc$109383$new_n31083_
+.subckt or2_x1 i0=$abc$109383$new_n31083_ i1=$abc$109383$new_n31026_ q=$abc$109383$new_n31084_
+.subckt and2_x1 i0=$abc$109383$new_n30898_ i1=$abc$109383$new_n31000_ q=$abc$109383$new_n31085_
+.subckt and2_x1 i0=$abc$109383$new_n31023_ i1=$abc$109383$new_n31085_ q=$abc$109383$new_n31086_
+.subckt and2_x1 i0=$abc$109383$new_n30896_ i1=$abc$109383$new_n31002_ q=$abc$109383$new_n31087_
 .subckt nand2_x0 i0=$abc$109383$new_n31005_ i1=$abc$109383$new_n30891_ nq=$abc$109383$new_n31088_
 .subckt buf_x4 i=$abc$109383$new_n30617_ q=$abc$109383$new_n31089_
-.subckt a4_x2 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n30535_ i2=$abc$109383$new_n29412_ i3=$abc$109383$new_n29388_ q=$abc$109383$new_n31090_
+.subckt and4_x1 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n30535_ i2=$abc$109383$new_n29412_ i3=$abc$109383$new_n29388_ q=$abc$109383$new_n31090_
 .subckt nand2_x0 i0=$abc$109383$new_n30888_ i1=$abc$109383$new_n30786_ nq=$abc$109383$new_n31091_
-.subckt a2_x2 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29266_ q=$abc$109383$new_n31092_
-.subckt oa22_x2 i0=$abc$109383$new_n31092_ i1=$abc$109383$new_n31091_ i2=$abc$109383$new_n31090_ q=$abc$109383$new_n31093_
-.subckt oa22_x2 i0=$abc$109383$new_n31093_ i1=$abc$109383$new_n31088_ i2=$abc$109383$new_n31087_ q=$abc$109383$new_n31094_
-.subckt nxr2_x1 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31094_ nq=$abc$109383$new_n31095_
+.subckt and2_x1 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29266_ q=$abc$109383$new_n31092_
+.subckt or21nand_x1 i0=$abc$109383$new_n31092_ i1=$abc$109383$new_n31091_ i2=$abc$109383$new_n31090_ nq=$abc$109383$new_n31093_
+.subckt or21nand_x1 i0=$abc$109383$new_n31093_ i1=$abc$109383$new_n31088_ i2=$abc$109383$new_n31087_ nq=$abc$109383$new_n31094_
+.subckt nexor2_x0 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31094_ nq=$abc$109383$new_n31095_
 .subckt nand2_x0 i0=$abc$109383$new_n31095_ i1=$abc$109383$new_n31001_ nq=$abc$109383$new_n31096_
-.subckt nxr2_x1 i0=$abc$109383$new_n30998_ i1=$abc$109383$new_n31078_ nq=$abc$109383$new_n31097_
-.subckt oa22_x2 i0=$abc$109383$new_n31097_ i1=$abc$109383$new_n31096_ i2=$abc$109383$new_n31086_ q=$abc$109383$new_n31098_
-.subckt a4_x2 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29572_ i3=$abc$109383$new_n29548_ q=$abc$109383$new_n31099_
+.subckt nexor2_x0 i0=$abc$109383$new_n30998_ i1=$abc$109383$new_n31078_ nq=$abc$109383$new_n31097_
+.subckt or21nand_x1 i0=$abc$109383$new_n31097_ i1=$abc$109383$new_n31096_ i2=$abc$109383$new_n31086_ nq=$abc$109383$new_n31098_
+.subckt and4_x1 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29572_ i3=$abc$109383$new_n29548_ q=$abc$109383$new_n31099_
 .subckt nand2_x0 i0=$abc$109383$new_n29371_ i1=$abc$109383$new_n29572_ nq=$abc$109383$new_n31100_
 .subckt nand2_x0 i0=$abc$109383$new_n31100_ i1=$abc$109383$new_n30983_ nq=$abc$109383$new_n31101_
-.subckt oa22_x2 i0=$abc$109383$new_n30982_ i1=$abc$109383$new_n31101_ i2=$abc$109383$new_n31099_ q=$abc$109383$new_n31102_
+.subckt or21nand_x1 i0=$abc$109383$new_n30982_ i1=$abc$109383$new_n31101_ i2=$abc$109383$new_n31099_ nq=$abc$109383$new_n31102_
 .subckt buf_x4 i=$abc$109383$new_n30444_ q=$abc$109383$new_n31103_
-.subckt a4_x2 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29228_ i2=$abc$109383$new_n29345_ i3=$abc$109383$new_n29323_ q=$abc$109383$new_n31104_
+.subckt and4_x1 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29228_ i2=$abc$109383$new_n29345_ i3=$abc$109383$new_n29323_ q=$abc$109383$new_n31104_
 .subckt nand2_x0 i0=$abc$109383$new_n30988_ i1=$abc$109383$new_n30879_ nq=$abc$109383$new_n31105_
-.subckt oa22_x2 i0=$abc$109383$new_n30978_ i1=$abc$109383$new_n31105_ i2=$abc$109383$new_n31104_ q=$abc$109383$new_n31106_
+.subckt or21nand_x1 i0=$abc$109383$new_n30978_ i1=$abc$109383$new_n31105_ i2=$abc$109383$new_n31104_ nq=$abc$109383$new_n31106_
 .subckt nand2_x0 i0=$abc$109383$new_n30995_ i1=$abc$109383$new_n31106_ nq=$abc$109383$new_n31107_
-.subckt a2_x2 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29523_ q=$abc$109383$new_n31108_
-.subckt nxr2_x1 i0=$abc$109383$new_n30994_ i1=$abc$109383$new_n31108_ nq=$abc$109383$new_n31109_
-.subckt a2_x2 i0=$abc$109383$new_n31109_ i1=$abc$109383$new_n30990_ q=$abc$109383$new_n31110_
-.subckt ao22_x2 i0=$abc$109383$new_n30986_ i1=$abc$109383$new_n31110_ i2=$abc$109383$new_n31107_ q=$abc$109383$new_n31111_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31112_
+.subckt and2_x1 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29523_ q=$abc$109383$new_n31108_
+.subckt nexor2_x0 i0=$abc$109383$new_n30994_ i1=$abc$109383$new_n31108_ nq=$abc$109383$new_n31109_
+.subckt and2_x1 i0=$abc$109383$new_n31109_ i1=$abc$109383$new_n30990_ q=$abc$109383$new_n31110_
+.subckt and21nor_x1 i0=$abc$109383$new_n30986_ i1=$abc$109383$new_n31110_ i2=$abc$109383$new_n31107_ nq=$abc$109383$new_n31111_
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31112_
 .subckt nand2_x0 i0=$abc$109383$new_n29252_ i1=soc.cpu.minerva.payload__src1$44[11] nq=$abc$109383$new_n31113_
-.subckt a2_x2 i0=$abc$109383$new_n30429_ i1=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n31114_
-.subckt nxr2_x1 i0=$abc$109383$new_n31114_ i1=$abc$109383$new_n31113_ nq=$abc$109383$new_n31115_
-.subckt nxr2_x1 i0=$abc$109383$new_n31115_ i1=$abc$109383$new_n31112_ nq=$abc$109383$new_n31116_
+.subckt and2_x1 i0=$abc$109383$new_n30429_ i1=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n31114_
+.subckt nexor2_x0 i0=$abc$109383$new_n31114_ i1=$abc$109383$new_n31113_ nq=$abc$109383$new_n31115_
+.subckt nexor2_x0 i0=$abc$109383$new_n31115_ i1=$abc$109383$new_n31112_ nq=$abc$109383$new_n31116_
 .subckt nand4_x0 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29227_ i2=$abc$109383$new_n29500_ i3=$abc$109383$new_n29344_ nq=$abc$109383$new_n31117_
 .subckt nand2_x0 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29500_ nq=$abc$109383$new_n31118_
-.subckt a2_x2 i0=$abc$109383$new_n31118_ i1=$abc$109383$new_n30992_ q=$abc$109383$new_n31119_
-.subckt ao22_x2 i0=$abc$109383$new_n30991_ i1=$abc$109383$new_n31119_ i2=$abc$109383$new_n31117_ q=$abc$109383$new_n31120_
+.subckt and2_x1 i0=$abc$109383$new_n31118_ i1=$abc$109383$new_n30992_ q=$abc$109383$new_n31119_
+.subckt and21nor_x1 i0=$abc$109383$new_n30991_ i1=$abc$109383$new_n31119_ i2=$abc$109383$new_n31117_ nq=$abc$109383$new_n31120_
 .subckt nand2_x0 i0=$abc$109383$new_n29241_ i1=$abc$109383$new_n29547_ nq=$abc$109383$new_n31121_
 .subckt nand2_x0 i0=$abc$109383$new_n30444_ i1=soc.cpu.minerva.payload__src1$44[8] nq=$abc$109383$new_n31122_
-.subckt a2_x2 i0=$abc$109383$new_n29227_ i1=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n31123_
-.subckt nxr2_x1 i0=$abc$109383$new_n31123_ i1=$abc$109383$new_n31122_ nq=$abc$109383$new_n31124_
-.subckt nxr2_x1 i0=$abc$109383$new_n31124_ i1=$abc$109383$new_n31121_ nq=$abc$109383$new_n31125_
-.subckt nxr2_x1 i0=$abc$109383$new_n31125_ i1=$abc$109383$new_n31120_ nq=$abc$109383$new_n31126_
-.subckt nxr2_x1 i0=$abc$109383$new_n31126_ i1=$abc$109383$new_n31116_ nq=$abc$109383$new_n31127_
-.subckt nxr2_x1 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31111_ nq=$abc$109383$new_n31128_
-.subckt nxr2_x1 i0=$abc$109383$new_n31128_ i1=$abc$109383$new_n31102_ nq=$abc$109383$new_n31129_
+.subckt and2_x1 i0=$abc$109383$new_n29227_ i1=soc.cpu.minerva.payload__src1$44[9] q=$abc$109383$new_n31123_
+.subckt nexor2_x0 i0=$abc$109383$new_n31123_ i1=$abc$109383$new_n31122_ nq=$abc$109383$new_n31124_
+.subckt nexor2_x0 i0=$abc$109383$new_n31124_ i1=$abc$109383$new_n31121_ nq=$abc$109383$new_n31125_
+.subckt nexor2_x0 i0=$abc$109383$new_n31125_ i1=$abc$109383$new_n31120_ nq=$abc$109383$new_n31126_
+.subckt nexor2_x0 i0=$abc$109383$new_n31126_ i1=$abc$109383$new_n31116_ nq=$abc$109383$new_n31127_
+.subckt nexor2_x0 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31111_ nq=$abc$109383$new_n31128_
+.subckt nexor2_x0 i0=$abc$109383$new_n31128_ i1=$abc$109383$new_n31102_ nq=$abc$109383$new_n31129_
 .subckt nand2_x0 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31094_ nq=$abc$109383$new_n31130_
-.subckt a4_x2 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30796_ i2=$abc$109383$new_n29468_ i3=$abc$109383$new_n29442_ q=$abc$109383$new_n31131_
+.subckt and4_x1 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30796_ i2=$abc$109383$new_n29468_ i3=$abc$109383$new_n29442_ q=$abc$109383$new_n31131_
 .subckt nand2_x0 i0=$abc$109383$new_n31018_ i1=$abc$109383$new_n30909_ nq=$abc$109383$new_n31132_
-.subckt a2_x2 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29388_ q=$abc$109383$new_n31133_
-.subckt oa22_x2 i0=$abc$109383$new_n31133_ i1=$abc$109383$new_n31132_ i2=$abc$109383$new_n31131_ q=$abc$109383$new_n31134_
+.subckt and2_x1 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29388_ q=$abc$109383$new_n31133_
+.subckt or21nand_x1 i0=$abc$109383$new_n31133_ i1=$abc$109383$new_n31132_ i2=$abc$109383$new_n31131_ nq=$abc$109383$new_n31134_
 .subckt nand2_x0 i0=$abc$109383$new_n31134_ i1=$abc$109383$new_n31016_ nq=$abc$109383$new_n31135_
 .subckt nand2_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n31136_
-.subckt nxr2_x1 i0=$abc$109383$new_n31013_ i1=$abc$109383$new_n31136_ nq=$abc$109383$new_n31137_
-.subckt nxr2_x1 i0=$abc$109383$new_n31015_ i1=$abc$109383$new_n31137_ nq=$abc$109383$new_n31138_
-.subckt a2_x2 i0=$abc$109383$new_n31020_ i1=$abc$109383$new_n31138_ q=$abc$109383$new_n31139_
-.subckt ao22_x2 i0=$abc$109383$new_n31011_ i1=$abc$109383$new_n31139_ i2=$abc$109383$new_n31135_ q=$abc$109383$new_n31140_
+.subckt nexor2_x0 i0=$abc$109383$new_n31013_ i1=$abc$109383$new_n31136_ nq=$abc$109383$new_n31137_
+.subckt nexor2_x0 i0=$abc$109383$new_n31015_ i1=$abc$109383$new_n31137_ nq=$abc$109383$new_n31138_
+.subckt and2_x1 i0=$abc$109383$new_n31020_ i1=$abc$109383$new_n31138_ q=$abc$109383$new_n31139_
+.subckt and21nor_x1 i0=$abc$109383$new_n31011_ i1=$abc$109383$new_n31139_ i2=$abc$109383$new_n31135_ nq=$abc$109383$new_n31140_
 .subckt nand2_x0 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31082_ nq=$abc$109383$new_n31141_
 .subckt nand4_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n30534_ i2=$abc$109383$new_n29289_ i3=$abc$109383$new_n29266_ nq=$abc$109383$new_n31142_
 .subckt nand2_x0 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29323_ nq=$abc$109383$new_n31143_
 .subckt nand2_x0 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29288_ nq=$abc$109383$new_n31144_
-.subckt a2_x2 i0=$abc$109383$new_n31144_ i1=$abc$109383$new_n31136_ q=$abc$109383$new_n31145_
-.subckt ao22_x2 i0=$abc$109383$new_n31145_ i1=$abc$109383$new_n31143_ i2=$abc$109383$new_n31142_ q=$abc$109383$new_n31146_
+.subckt and2_x1 i0=$abc$109383$new_n31144_ i1=$abc$109383$new_n31136_ q=$abc$109383$new_n31145_
+.subckt and21nor_x1 i0=$abc$109383$new_n31145_ i1=$abc$109383$new_n31143_ i2=$abc$109383$new_n31142_ nq=$abc$109383$new_n31146_
 .subckt nand2_x0 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29344_ nq=$abc$109383$new_n31147_
 .subckt nand2_x0 i0=$abc$109383$new_n30617_ i1=$abc$109383$new_n29288_ nq=$abc$109383$new_n31148_
-.subckt a2_x2 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29321_ q=$abc$109383$new_n31149_
-.subckt nxr2_x1 i0=$abc$109383$new_n31149_ i1=$abc$109383$new_n31148_ nq=$abc$109383$new_n31150_
-.subckt nxr2_x1 i0=$abc$109383$new_n31150_ i1=$abc$109383$new_n31147_ nq=$abc$109383$new_n31151_
+.subckt and2_x1 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29321_ q=$abc$109383$new_n31149_
+.subckt nexor2_x0 i0=$abc$109383$new_n31149_ i1=$abc$109383$new_n31148_ nq=$abc$109383$new_n31150_
+.subckt nexor2_x0 i0=$abc$109383$new_n31150_ i1=$abc$109383$new_n31147_ nq=$abc$109383$new_n31151_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[11] i1=soc.cpu.minerva.payload__src2$45[10] i2=$abc$109383$new_n29388_ i3=$abc$109383$new_n29442_ nq=$abc$109383$new_n31152_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n29387_ nq=$abc$109383$new_n31153_
-.subckt a2_x2 i0=$abc$109383$new_n31153_ i1=$abc$109383$new_n31028_ q=$abc$109383$new_n31154_
-.subckt ao22_x2 i0=$abc$109383$new_n31081_ i1=$abc$109383$new_n31154_ i2=$abc$109383$new_n31152_ q=$abc$109383$new_n31155_
-.subckt nxr2_x1 i0=$abc$109383$new_n31155_ i1=$abc$109383$new_n31151_ nq=$abc$109383$new_n31156_
-.subckt nxr2_x1 i0=$abc$109383$new_n31156_ i1=$abc$109383$new_n31146_ nq=$abc$109383$new_n31157_
-.subckt nxr2_x1 i0=$abc$109383$new_n31157_ i1=$abc$109383$new_n31141_ nq=$abc$109383$new_n31158_
-.subckt nxr2_x1 i0=$abc$109383$new_n31158_ i1=$abc$109383$new_n31140_ nq=$abc$109383$new_n31159_
-.subckt nxr2_x1 i0=$abc$109383$new_n31159_ i1=$abc$109383$new_n31130_ nq=$abc$109383$new_n31160_
-.subckt nxr2_x1 i0=$abc$109383$new_n31160_ i1=$abc$109383$new_n31129_ nq=$abc$109383$new_n31161_
-.subckt nxr2_x1 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31098_ nq=$abc$109383$new_n31162_
-.subckt a2_x2 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29267_ q=$abc$109383$new_n31163_
+.subckt and2_x1 i0=$abc$109383$new_n31153_ i1=$abc$109383$new_n31028_ q=$abc$109383$new_n31154_
+.subckt and21nor_x1 i0=$abc$109383$new_n31081_ i1=$abc$109383$new_n31154_ i2=$abc$109383$new_n31152_ nq=$abc$109383$new_n31155_
+.subckt nexor2_x0 i0=$abc$109383$new_n31155_ i1=$abc$109383$new_n31151_ nq=$abc$109383$new_n31156_
+.subckt nexor2_x0 i0=$abc$109383$new_n31156_ i1=$abc$109383$new_n31146_ nq=$abc$109383$new_n31157_
+.subckt nexor2_x0 i0=$abc$109383$new_n31157_ i1=$abc$109383$new_n31141_ nq=$abc$109383$new_n31158_
+.subckt nexor2_x0 i0=$abc$109383$new_n31158_ i1=$abc$109383$new_n31140_ nq=$abc$109383$new_n31159_
+.subckt nexor2_x0 i0=$abc$109383$new_n31159_ i1=$abc$109383$new_n31130_ nq=$abc$109383$new_n31160_
+.subckt nexor2_x0 i0=$abc$109383$new_n31160_ i1=$abc$109383$new_n31129_ nq=$abc$109383$new_n31161_
+.subckt nexor2_x0 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31098_ nq=$abc$109383$new_n31162_
+.subckt and2_x1 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29267_ q=$abc$109383$new_n31163_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[11] i1=$abc$109383$new_n29387_ nq=$abc$109383$new_n31164_
-.subckt a2_x2 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29412_ q=$abc$109383$new_n31165_
-.subckt nxr2_x1 i0=$abc$109383$new_n31165_ i1=$abc$109383$new_n31164_ nq=$abc$109383$new_n31166_
-.subckt nxr2_x1 i0=$abc$109383$new_n31166_ i1=$abc$109383$new_n31163_ nq=$abc$109383$new_n31167_
+.subckt and2_x1 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29412_ q=$abc$109383$new_n31165_
+.subckt nexor2_x0 i0=$abc$109383$new_n31165_ i1=$abc$109383$new_n31164_ nq=$abc$109383$new_n31166_
+.subckt nexor2_x0 i0=$abc$109383$new_n31166_ i1=$abc$109383$new_n31163_ nq=$abc$109383$new_n31167_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29443_ nq=$abc$109383$new_n31168_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29468_ q=$abc$109383$new_n31169_
-.subckt nxr2_x1 i0=$abc$109383$new_n31169_ i1=$abc$109383$new_n31168_ nq=$abc$109383$new_n31170_
-.subckt nxr2_x1 i0=$abc$109383$new_n31170_ i1=$abc$109383$new_n31167_ nq=$abc$109383$new_n31171_
-.subckt nxr2_x1 i0=$abc$109383$new_n31171_ i1=$abc$109383$new_n31162_ nq=$abc$109383$new_n31172_
-.subckt nxr2_x1 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31084_ nq=$abc$109383$new_n31173_
-.subckt nxr2_x1 i0=$abc$109383$new_n31173_ i1=$abc$109383$new_n31080_ nq=$abc$109383$new_n31174_
-.subckt nxr2_x1 i0=$abc$109383$new_n31174_ i1=$abc$109383$new_n31066_ nq=$abc$109383$new_n31175_
-.subckt nxr2_x1 i0=$abc$109383$new_n31175_ i1=$abc$109383$new_n31062_ nq=$abc$109383$new_n31176_
-.subckt nxr2_x1 i0=$abc$109383$new_n31176_ i1=$abc$109383$new_n31059_ nq=$abc$109383$new_n31177_
-.subckt nxr2_x1 i0=$abc$109383$new_n31177_ i1=$abc$109383$new_n31054_ nq=$abc$109383$new_n31178_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31178_ i2=$abc$109383$new_n31044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102810
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29468_ q=$abc$109383$new_n31169_
+.subckt nexor2_x0 i0=$abc$109383$new_n31169_ i1=$abc$109383$new_n31168_ nq=$abc$109383$new_n31170_
+.subckt nexor2_x0 i0=$abc$109383$new_n31170_ i1=$abc$109383$new_n31167_ nq=$abc$109383$new_n31171_
+.subckt nexor2_x0 i0=$abc$109383$new_n31171_ i1=$abc$109383$new_n31162_ nq=$abc$109383$new_n31172_
+.subckt nexor2_x0 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31084_ nq=$abc$109383$new_n31173_
+.subckt nexor2_x0 i0=$abc$109383$new_n31173_ i1=$abc$109383$new_n31080_ nq=$abc$109383$new_n31174_
+.subckt nexor2_x0 i0=$abc$109383$new_n31174_ i1=$abc$109383$new_n31066_ nq=$abc$109383$new_n31175_
+.subckt nexor2_x0 i0=$abc$109383$new_n31175_ i1=$abc$109383$new_n31062_ nq=$abc$109383$new_n31176_
+.subckt nexor2_x0 i0=$abc$109383$new_n31176_ i1=$abc$109383$new_n31059_ nq=$abc$109383$new_n31177_
+.subckt nexor2_x0 i0=$abc$109383$new_n31177_ i1=$abc$109383$new_n31054_ nq=$abc$109383$new_n31178_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31178_ i2=$abc$109383$new_n31044_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102810
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[14] nq=$abc$109383$new_n31180_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31180_ q=$abc$109383$new_n31181_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31180_ nq=$abc$109383$new_n31181_
 .subckt nor2_x0 i0=$abc$109383$new_n31181_ i1=$abc$109383$new_n30322_ nq=$abc$109383$new_n31182_
-.subckt a2_x2 i0=$abc$109383$new_n31176_ i1=$abc$109383$new_n31059_ q=$abc$109383$new_n31183_
+.subckt and2_x1 i0=$abc$109383$new_n31176_ i1=$abc$109383$new_n31059_ q=$abc$109383$new_n31183_
 .subckt nand2_x0 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n31056_ nq=$abc$109383$new_n31184_
-.subckt nxr2_x1 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n31056_ nq=$abc$109383$new_n31185_
-.subckt ao22_x2 i0=$abc$109383$new_n30942_ i1=$abc$109383$new_n31185_ i2=$abc$109383$new_n31184_ q=$abc$109383$new_n31186_
-.subckt nxr2_x1 i0=$abc$109383$new_n31176_ i1=$abc$109383$new_n31186_ nq=$abc$109383$new_n31187_
-.subckt oa22_x2 i0=$abc$109383$new_n31054_ i1=$abc$109383$new_n31187_ i2=$abc$109383$new_n31183_ q=$abc$109383$new_n31188_
-.subckt a2_x2 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n31063_ q=$abc$109383$new_n31189_
-.subckt a2_x2 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30856_ q=$abc$109383$new_n31190_
-.subckt nxr2_x1 i0=$abc$109383$new_n30959_ i1=$abc$109383$new_n31190_ nq=$abc$109383$new_n31191_
-.subckt oa22_x2 i0=$abc$109383$new_n31191_ i1=$abc$109383$new_n31035_ i2=$abc$109383$new_n31189_ q=$abc$109383$new_n31192_
-.subckt a2_x2 i0=$abc$109383$new_n31174_ i1=$abc$109383$new_n31192_ q=$abc$109383$new_n31193_
-.subckt a3_x2 i0=$abc$109383$new_n31061_ i1=$abc$109383$new_n30906_ i2=$abc$109383$new_n30856_ q=$abc$109383$new_n31194_
-.subckt oa22_x2 i0=$abc$109383$new_n31194_ i1=$abc$109383$new_n31175_ i2=$abc$109383$new_n31193_ q=$abc$109383$new_n31195_
-.subckt a2_x2 i0=$abc$109383$new_n30997_ i1=$abc$109383$new_n31070_ q=$abc$109383$new_n31196_
-.subckt oa22_x2 i0=$abc$109383$new_n30973_ i1=$abc$109383$new_n30998_ i2=$abc$109383$new_n31196_ q=$abc$109383$new_n31197_
-.subckt a3_x2 i0=$abc$109383$new_n31197_ i1=$abc$109383$new_n31025_ i2=$abc$109383$new_n30969_ q=$abc$109383$new_n31198_
+.subckt nexor2_x0 i0=$abc$109383$new_n31036_ i1=$abc$109383$new_n31056_ nq=$abc$109383$new_n31185_
+.subckt and21nor_x1 i0=$abc$109383$new_n30942_ i1=$abc$109383$new_n31185_ i2=$abc$109383$new_n31184_ nq=$abc$109383$new_n31186_
+.subckt nexor2_x0 i0=$abc$109383$new_n31176_ i1=$abc$109383$new_n31186_ nq=$abc$109383$new_n31187_
+.subckt or21nand_x1 i0=$abc$109383$new_n31054_ i1=$abc$109383$new_n31187_ i2=$abc$109383$new_n31183_ nq=$abc$109383$new_n31188_
+.subckt and2_x1 i0=$abc$109383$new_n31034_ i1=$abc$109383$new_n31063_ q=$abc$109383$new_n31189_
+.subckt and2_x1 i0=$abc$109383$new_n30906_ i1=$abc$109383$new_n30856_ q=$abc$109383$new_n31190_
+.subckt nexor2_x0 i0=$abc$109383$new_n30959_ i1=$abc$109383$new_n31190_ nq=$abc$109383$new_n31191_
+.subckt or21nand_x1 i0=$abc$109383$new_n31191_ i1=$abc$109383$new_n31035_ i2=$abc$109383$new_n31189_ nq=$abc$109383$new_n31192_
+.subckt and2_x1 i0=$abc$109383$new_n31174_ i1=$abc$109383$new_n31192_ q=$abc$109383$new_n31193_
+.subckt and3_x1 i0=$abc$109383$new_n31061_ i1=$abc$109383$new_n30906_ i2=$abc$109383$new_n30856_ q=$abc$109383$new_n31194_
+.subckt or21nand_x1 i0=$abc$109383$new_n31194_ i1=$abc$109383$new_n31175_ i2=$abc$109383$new_n31193_ nq=$abc$109383$new_n31195_
+.subckt and2_x1 i0=$abc$109383$new_n30997_ i1=$abc$109383$new_n31070_ q=$abc$109383$new_n31196_
+.subckt or21nand_x1 i0=$abc$109383$new_n30973_ i1=$abc$109383$new_n30998_ i2=$abc$109383$new_n31196_ nq=$abc$109383$new_n31197_
+.subckt and3_x1 i0=$abc$109383$new_n31197_ i1=$abc$109383$new_n31025_ i2=$abc$109383$new_n30969_ q=$abc$109383$new_n31198_
 .subckt nor2_x0 i0=$abc$109383$new_n31083_ i1=$abc$109383$new_n31026_ nq=$abc$109383$new_n31199_
-.subckt a2_x2 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31199_ q=$abc$109383$new_n31200_
-.subckt a2_x2 i0=$abc$109383$new_n31025_ i1=$abc$109383$new_n30969_ q=$abc$109383$new_n31201_
-.subckt nxr2_x1 i0=$abc$109383$new_n31079_ i1=$abc$109383$new_n31201_ nq=$abc$109383$new_n31202_
-.subckt oa22_x2 i0=$abc$109383$new_n31202_ i1=$abc$109383$new_n31173_ i2=$abc$109383$new_n31200_ q=$abc$109383$new_n31203_
+.subckt and2_x1 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31199_ q=$abc$109383$new_n31200_
+.subckt and2_x1 i0=$abc$109383$new_n31025_ i1=$abc$109383$new_n30969_ q=$abc$109383$new_n31201_
+.subckt nexor2_x0 i0=$abc$109383$new_n31079_ i1=$abc$109383$new_n31201_ nq=$abc$109383$new_n31202_
+.subckt or21nand_x1 i0=$abc$109383$new_n31202_ i1=$abc$109383$new_n31173_ i2=$abc$109383$new_n31200_ nq=$abc$109383$new_n31203_
 .subckt nand2_x0 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31098_ nq=$abc$109383$new_n31204_
-.subckt a2_x2 i0=$abc$109383$new_n30995_ i1=$abc$109383$new_n31106_ q=$abc$109383$new_n31205_
+.subckt and2_x1 i0=$abc$109383$new_n30995_ i1=$abc$109383$new_n31106_ q=$abc$109383$new_n31205_
 .subckt nand2_x0 i0=$abc$109383$new_n31109_ i1=$abc$109383$new_n30990_ nq=$abc$109383$new_n31206_
-.subckt oa22_x2 i0=$abc$109383$new_n31073_ i1=$abc$109383$new_n31206_ i2=$abc$109383$new_n31205_ q=$abc$109383$new_n31207_
+.subckt or21nand_x1 i0=$abc$109383$new_n31073_ i1=$abc$109383$new_n31206_ i2=$abc$109383$new_n31205_ nq=$abc$109383$new_n31207_
 .subckt nand2_x0 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31207_ nq=$abc$109383$new_n31208_
-.subckt nxr2_x1 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31207_ nq=$abc$109383$new_n31209_
+.subckt nexor2_x0 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31207_ nq=$abc$109383$new_n31209_
 .subckt nand4_x0 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29573_ i3=$abc$109383$new_n29549_ nq=$abc$109383$new_n31210_
-.subckt a2_x2 i0=$abc$109383$new_n31100_ i1=$abc$109383$new_n30983_ q=$abc$109383$new_n31211_
-.subckt ao22_x2 i0=$abc$109383$new_n31072_ i1=$abc$109383$new_n31211_ i2=$abc$109383$new_n31210_ q=$abc$109383$new_n31212_
-.subckt ao22_x2 i0=$abc$109383$new_n31212_ i1=$abc$109383$new_n31209_ i2=$abc$109383$new_n31208_ q=$abc$109383$new_n31213_
-.subckt nxr2_x1 i0=$abc$109383$new_n31213_ i1=$abc$109383$new_n31204_ nq=$abc$109383$new_n31214_
+.subckt and2_x1 i0=$abc$109383$new_n31100_ i1=$abc$109383$new_n30983_ q=$abc$109383$new_n31211_
+.subckt and21nor_x1 i0=$abc$109383$new_n31072_ i1=$abc$109383$new_n31211_ i2=$abc$109383$new_n31210_ nq=$abc$109383$new_n31212_
+.subckt and21nor_x1 i0=$abc$109383$new_n31212_ i1=$abc$109383$new_n31209_ i2=$abc$109383$new_n31208_ nq=$abc$109383$new_n31213_
+.subckt nexor2_x0 i0=$abc$109383$new_n31213_ i1=$abc$109383$new_n31204_ nq=$abc$109383$new_n31214_
 .subckt nand2_x0 i0=$abc$109383$new_n31023_ i1=$abc$109383$new_n31085_ nq=$abc$109383$new_n31215_
-.subckt a2_x2 i0=$abc$109383$new_n31095_ i1=$abc$109383$new_n31001_ q=$abc$109383$new_n31216_
-.subckt ao22_x2 i0=$abc$109383$new_n30999_ i1=$abc$109383$new_n31216_ i2=$abc$109383$new_n31215_ q=$abc$109383$new_n31217_
-.subckt nxr2_x1 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31217_ nq=$abc$109383$new_n31218_
+.subckt and2_x1 i0=$abc$109383$new_n31095_ i1=$abc$109383$new_n31001_ q=$abc$109383$new_n31216_
+.subckt and21nor_x1 i0=$abc$109383$new_n30999_ i1=$abc$109383$new_n31216_ i2=$abc$109383$new_n31215_ nq=$abc$109383$new_n31217_
+.subckt nexor2_x0 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31217_ nq=$abc$109383$new_n31218_
 .subckt nand2_x0 i0=$abc$109383$new_n31171_ i1=$abc$109383$new_n31218_ nq=$abc$109383$new_n31219_
-.subckt a2_x2 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31094_ q=$abc$109383$new_n31220_
-.subckt a2_x2 i0=$abc$109383$new_n31159_ i1=$abc$109383$new_n31220_ q=$abc$109383$new_n31221_
-.subckt a2_x2 i0=$abc$109383$new_n31134_ i1=$abc$109383$new_n31016_ q=$abc$109383$new_n31222_
+.subckt and2_x1 i0=$abc$109383$new_n31022_ i1=$abc$109383$new_n31094_ q=$abc$109383$new_n31220_
+.subckt and2_x1 i0=$abc$109383$new_n31159_ i1=$abc$109383$new_n31220_ q=$abc$109383$new_n31221_
+.subckt and2_x1 i0=$abc$109383$new_n31134_ i1=$abc$109383$new_n31016_ q=$abc$109383$new_n31222_
 .subckt nand2_x0 i0=$abc$109383$new_n31020_ i1=$abc$109383$new_n31138_ nq=$abc$109383$new_n31223_
 .subckt buf_x4 i=$abc$109383$new_n31089_ q=$abc$109383$new_n31224_
-.subckt a4_x2 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n30535_ i2=$abc$109383$new_n29267_ i3=$abc$109383$new_n29413_ q=$abc$109383$new_n31225_
+.subckt and4_x1 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n30535_ i2=$abc$109383$new_n29267_ i3=$abc$109383$new_n29413_ q=$abc$109383$new_n31225_
 .subckt nand2_x0 i0=$abc$109383$new_n31009_ i1=$abc$109383$new_n30893_ nq=$abc$109383$new_n31226_
-.subckt oa22_x2 i0=$abc$109383$new_n31004_ i1=$abc$109383$new_n31226_ i2=$abc$109383$new_n31225_ q=$abc$109383$new_n31227_
-.subckt oa22_x2 i0=$abc$109383$new_n31227_ i1=$abc$109383$new_n31223_ i2=$abc$109383$new_n31222_ q=$abc$109383$new_n31228_
-.subckt nxr2_x1 i0=$abc$109383$new_n31158_ i1=$abc$109383$new_n31228_ nq=$abc$109383$new_n31229_
+.subckt or21nand_x1 i0=$abc$109383$new_n31004_ i1=$abc$109383$new_n31226_ i2=$abc$109383$new_n31225_ nq=$abc$109383$new_n31227_
+.subckt or21nand_x1 i0=$abc$109383$new_n31227_ i1=$abc$109383$new_n31223_ i2=$abc$109383$new_n31222_ nq=$abc$109383$new_n31228_
+.subckt nexor2_x0 i0=$abc$109383$new_n31158_ i1=$abc$109383$new_n31228_ nq=$abc$109383$new_n31229_
 .subckt nand2_x0 i0=$abc$109383$new_n31229_ i1=$abc$109383$new_n31130_ nq=$abc$109383$new_n31230_
-.subckt nxr2_x1 i0=$abc$109383$new_n31128_ i1=$abc$109383$new_n31212_ nq=$abc$109383$new_n31231_
-.subckt oa22_x2 i0=$abc$109383$new_n31231_ i1=$abc$109383$new_n31230_ i2=$abc$109383$new_n31221_ q=$abc$109383$new_n31232_
-.subckt a4_x2 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29598_ i3=$abc$109383$new_n29573_ q=$abc$109383$new_n31233_
+.subckt nexor2_x0 i0=$abc$109383$new_n31128_ i1=$abc$109383$new_n31212_ nq=$abc$109383$new_n31231_
+.subckt or21nand_x1 i0=$abc$109383$new_n31231_ i1=$abc$109383$new_n31230_ i2=$abc$109383$new_n31221_ nq=$abc$109383$new_n31232_
+.subckt and4_x1 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29371_ i2=$abc$109383$new_n29598_ i3=$abc$109383$new_n29573_ q=$abc$109383$new_n31233_
 .subckt nand2_x0 i0=$abc$109383$new_n29371_ i1=$abc$109383$new_n29598_ nq=$abc$109383$new_n31234_
 .subckt nand2_x0 i0=$abc$109383$new_n31234_ i1=$abc$109383$new_n31113_ nq=$abc$109383$new_n31235_
-.subckt oa22_x2 i0=$abc$109383$new_n31112_ i1=$abc$109383$new_n31235_ i2=$abc$109383$new_n31233_ q=$abc$109383$new_n31236_
-.subckt a4_x2 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29228_ i2=$abc$109383$new_n29501_ i3=$abc$109383$new_n29345_ q=$abc$109383$new_n31237_
+.subckt or21nand_x1 i0=$abc$109383$new_n31112_ i1=$abc$109383$new_n31235_ i2=$abc$109383$new_n31233_ nq=$abc$109383$new_n31236_
+.subckt and4_x1 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29228_ i2=$abc$109383$new_n29501_ i3=$abc$109383$new_n29345_ q=$abc$109383$new_n31237_
 .subckt nand2_x0 i0=$abc$109383$new_n31118_ i1=$abc$109383$new_n30992_ nq=$abc$109383$new_n31238_
-.subckt oa22_x2 i0=$abc$109383$new_n31108_ i1=$abc$109383$new_n31238_ i2=$abc$109383$new_n31237_ q=$abc$109383$new_n31239_
+.subckt or21nand_x1 i0=$abc$109383$new_n31108_ i1=$abc$109383$new_n31238_ i2=$abc$109383$new_n31237_ nq=$abc$109383$new_n31239_
 .subckt nand2_x0 i0=$abc$109383$new_n31125_ i1=$abc$109383$new_n31239_ nq=$abc$109383$new_n31240_
-.subckt a2_x2 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29547_ q=$abc$109383$new_n31241_
-.subckt nxr2_x1 i0=$abc$109383$new_n31124_ i1=$abc$109383$new_n31241_ nq=$abc$109383$new_n31242_
-.subckt a2_x2 i0=$abc$109383$new_n31242_ i1=$abc$109383$new_n31120_ q=$abc$109383$new_n31243_
-.subckt ao22_x2 i0=$abc$109383$new_n31116_ i1=$abc$109383$new_n31243_ i2=$abc$109383$new_n31240_ q=$abc$109383$new_n31244_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31245_
+.subckt and2_x1 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29547_ q=$abc$109383$new_n31241_
+.subckt nexor2_x0 i0=$abc$109383$new_n31124_ i1=$abc$109383$new_n31241_ nq=$abc$109383$new_n31242_
+.subckt and2_x1 i0=$abc$109383$new_n31242_ i1=$abc$109383$new_n31120_ q=$abc$109383$new_n31243_
+.subckt and21nor_x1 i0=$abc$109383$new_n31116_ i1=$abc$109383$new_n31243_ i2=$abc$109383$new_n31240_ nq=$abc$109383$new_n31244_
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31245_
 .subckt nand2_x0 i0=$abc$109383$new_n29252_ i1=soc.cpu.minerva.payload__src1$44[12] nq=$abc$109383$new_n31246_
-.subckt a2_x2 i0=$abc$109383$new_n30429_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31247_
-.subckt nxr2_x1 i0=$abc$109383$new_n31247_ i1=$abc$109383$new_n31246_ nq=$abc$109383$new_n31248_
-.subckt nxr2_x1 i0=$abc$109383$new_n31248_ i1=$abc$109383$new_n31245_ nq=$abc$109383$new_n31249_
+.subckt and2_x1 i0=$abc$109383$new_n30429_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31247_
+.subckt nexor2_x0 i0=$abc$109383$new_n31247_ i1=$abc$109383$new_n31246_ nq=$abc$109383$new_n31248_
+.subckt nexor2_x0 i0=$abc$109383$new_n31248_ i1=$abc$109383$new_n31245_ nq=$abc$109383$new_n31249_
 .subckt nand4_x0 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29227_ i2=$abc$109383$new_n29523_ i3=$abc$109383$new_n29501_ nq=$abc$109383$new_n31250_
 .subckt nand2_x0 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29523_ nq=$abc$109383$new_n31251_
-.subckt a2_x2 i0=$abc$109383$new_n31251_ i1=$abc$109383$new_n31122_ q=$abc$109383$new_n31252_
-.subckt ao22_x2 i0=$abc$109383$new_n31121_ i1=$abc$109383$new_n31252_ i2=$abc$109383$new_n31250_ q=$abc$109383$new_n31253_
+.subckt and2_x1 i0=$abc$109383$new_n31251_ i1=$abc$109383$new_n31122_ q=$abc$109383$new_n31252_
+.subckt and21nor_x1 i0=$abc$109383$new_n31121_ i1=$abc$109383$new_n31252_ i2=$abc$109383$new_n31250_ nq=$abc$109383$new_n31253_
 .subckt nand2_x0 i0=$abc$109383$new_n29241_ i1=soc.cpu.minerva.payload__src1$44[11] nq=$abc$109383$new_n31254_
 .subckt nand2_x0 i0=$abc$109383$new_n31103_ i1=soc.cpu.minerva.payload__src1$44[9] nq=$abc$109383$new_n31255_
-.subckt a2_x2 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29547_ q=$abc$109383$new_n31256_
-.subckt nxr2_x1 i0=$abc$109383$new_n31256_ i1=$abc$109383$new_n31255_ nq=$abc$109383$new_n31257_
-.subckt nxr2_x1 i0=$abc$109383$new_n31257_ i1=$abc$109383$new_n31254_ nq=$abc$109383$new_n31258_
-.subckt nxr2_x1 i0=$abc$109383$new_n31258_ i1=$abc$109383$new_n31253_ nq=$abc$109383$new_n31259_
-.subckt nxr2_x1 i0=$abc$109383$new_n31259_ i1=$abc$109383$new_n31249_ nq=$abc$109383$new_n31260_
-.subckt nxr2_x1 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31244_ nq=$abc$109383$new_n31261_
-.subckt nxr2_x1 i0=$abc$109383$new_n31261_ i1=$abc$109383$new_n31236_ nq=$abc$109383$new_n31262_
-.subckt a2_x2 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31082_ q=$abc$109383$new_n31263_
+.subckt and2_x1 i0=$abc$109383$new_n29227_ i1=$abc$109383$new_n29547_ q=$abc$109383$new_n31256_
+.subckt nexor2_x0 i0=$abc$109383$new_n31256_ i1=$abc$109383$new_n31255_ nq=$abc$109383$new_n31257_
+.subckt nexor2_x0 i0=$abc$109383$new_n31257_ i1=$abc$109383$new_n31254_ nq=$abc$109383$new_n31258_
+.subckt nexor2_x0 i0=$abc$109383$new_n31258_ i1=$abc$109383$new_n31253_ nq=$abc$109383$new_n31259_
+.subckt nexor2_x0 i0=$abc$109383$new_n31259_ i1=$abc$109383$new_n31249_ nq=$abc$109383$new_n31260_
+.subckt nexor2_x0 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31244_ nq=$abc$109383$new_n31261_
+.subckt nexor2_x0 i0=$abc$109383$new_n31261_ i1=$abc$109383$new_n31236_ nq=$abc$109383$new_n31262_
+.subckt and2_x1 i0=$abc$109383$new_n31032_ i1=$abc$109383$new_n31082_ q=$abc$109383$new_n31263_
 .subckt nand2_x0 i0=$abc$109383$new_n31157_ i1=$abc$109383$new_n31263_ nq=$abc$109383$new_n31264_
-.subckt a4_x2 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n30534_ i2=$abc$109383$new_n29289_ i3=$abc$109383$new_n29266_ q=$abc$109383$new_n31265_
+.subckt and4_x1 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n30534_ i2=$abc$109383$new_n29289_ i3=$abc$109383$new_n29266_ q=$abc$109383$new_n31265_
 .subckt nand2_x0 i0=$abc$109383$new_n31144_ i1=$abc$109383$new_n31136_ nq=$abc$109383$new_n31266_
-.subckt oa22_x2 i0=$abc$109383$new_n31266_ i1=$abc$109383$new_n31015_ i2=$abc$109383$new_n31265_ q=$abc$109383$new_n31267_
-.subckt nxr2_x1 i0=$abc$109383$new_n31156_ i1=$abc$109383$new_n31267_ nq=$abc$109383$new_n31268_
-.subckt a2_x2 i0=$abc$109383$new_n31268_ i1=$abc$109383$new_n31141_ q=$abc$109383$new_n31269_
-.subckt ao22_x2 i0=$abc$109383$new_n31140_ i1=$abc$109383$new_n31269_ i2=$abc$109383$new_n31264_ q=$abc$109383$new_n31270_
-.subckt a4_x2 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29388_ i3=$abc$109383$new_n29443_ q=$abc$109383$new_n31271_
+.subckt or21nand_x1 i0=$abc$109383$new_n31266_ i1=$abc$109383$new_n31015_ i2=$abc$109383$new_n31265_ nq=$abc$109383$new_n31267_
+.subckt nexor2_x0 i0=$abc$109383$new_n31156_ i1=$abc$109383$new_n31267_ nq=$abc$109383$new_n31268_
+.subckt and2_x1 i0=$abc$109383$new_n31268_ i1=$abc$109383$new_n31141_ q=$abc$109383$new_n31269_
+.subckt and21nor_x1 i0=$abc$109383$new_n31140_ i1=$abc$109383$new_n31269_ i2=$abc$109383$new_n31264_ nq=$abc$109383$new_n31270_
+.subckt and4_x1 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29388_ i3=$abc$109383$new_n29443_ q=$abc$109383$new_n31271_
 .subckt nand2_x0 i0=$abc$109383$new_n31153_ i1=$abc$109383$new_n31028_ nq=$abc$109383$new_n31272_
-.subckt oa22_x2 i0=$abc$109383$new_n31027_ i1=$abc$109383$new_n31272_ i2=$abc$109383$new_n31271_ q=$abc$109383$new_n31273_
+.subckt or21nand_x1 i0=$abc$109383$new_n31027_ i1=$abc$109383$new_n31272_ i2=$abc$109383$new_n31271_ nq=$abc$109383$new_n31273_
 .subckt nand2_x0 i0=$abc$109383$new_n31273_ i1=$abc$109383$new_n31151_ nq=$abc$109383$new_n31274_
-.subckt a2_x2 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29345_ q=$abc$109383$new_n31275_
-.subckt nxr2_x1 i0=$abc$109383$new_n31150_ i1=$abc$109383$new_n31275_ nq=$abc$109383$new_n31276_
-.subckt a2_x2 i0=$abc$109383$new_n31155_ i1=$abc$109383$new_n31276_ q=$abc$109383$new_n31277_
-.subckt ao22_x2 i0=$abc$109383$new_n31146_ i1=$abc$109383$new_n31277_ i2=$abc$109383$new_n31274_ q=$abc$109383$new_n31278_
+.subckt and2_x1 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29345_ q=$abc$109383$new_n31275_
+.subckt nexor2_x0 i0=$abc$109383$new_n31150_ i1=$abc$109383$new_n31275_ nq=$abc$109383$new_n31276_
+.subckt and2_x1 i0=$abc$109383$new_n31155_ i1=$abc$109383$new_n31276_ q=$abc$109383$new_n31277_
+.subckt and21nor_x1 i0=$abc$109383$new_n31146_ i1=$abc$109383$new_n31277_ i2=$abc$109383$new_n31274_ nq=$abc$109383$new_n31278_
 .subckt nand2_x0 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n31279_
-.subckt nxr2_x1 i0=$abc$109383$new_n31166_ i1=$abc$109383$new_n31279_ nq=$abc$109383$new_n31280_
+.subckt nexor2_x0 i0=$abc$109383$new_n31166_ i1=$abc$109383$new_n31279_ nq=$abc$109383$new_n31280_
 .subckt nand2_x0 i0=$abc$109383$new_n31170_ i1=$abc$109383$new_n31280_ nq=$abc$109383$new_n31281_
 .subckt nand4_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n30534_ i2=$abc$109383$new_n29323_ i3=$abc$109383$new_n29290_ nq=$abc$109383$new_n31282_
 .subckt nand2_x0 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29322_ nq=$abc$109383$new_n31283_
-.subckt a2_x2 i0=$abc$109383$new_n31283_ i1=$abc$109383$new_n31148_ q=$abc$109383$new_n31284_
-.subckt ao22_x2 i0=$abc$109383$new_n31147_ i1=$abc$109383$new_n31284_ i2=$abc$109383$new_n31282_ q=$abc$109383$new_n31285_
+.subckt and2_x1 i0=$abc$109383$new_n31283_ i1=$abc$109383$new_n31148_ q=$abc$109383$new_n31284_
+.subckt and21nor_x1 i0=$abc$109383$new_n31147_ i1=$abc$109383$new_n31284_ i2=$abc$109383$new_n31282_ nq=$abc$109383$new_n31285_
 .subckt nand2_x0 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29500_ nq=$abc$109383$new_n31286_
 .subckt nand2_x0 i0=$abc$109383$new_n30617_ i1=$abc$109383$new_n29322_ nq=$abc$109383$new_n31287_
-.subckt a2_x2 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29344_ q=$abc$109383$new_n31288_
-.subckt nxr2_x1 i0=$abc$109383$new_n31288_ i1=$abc$109383$new_n31287_ nq=$abc$109383$new_n31289_
-.subckt nxr2_x1 i0=$abc$109383$new_n31289_ i1=$abc$109383$new_n31286_ nq=$abc$109383$new_n31290_
+.subckt and2_x1 i0=$abc$109383$new_n30533_ i1=$abc$109383$new_n29344_ q=$abc$109383$new_n31288_
+.subckt nexor2_x0 i0=$abc$109383$new_n31288_ i1=$abc$109383$new_n31287_ nq=$abc$109383$new_n31289_
+.subckt nexor2_x0 i0=$abc$109383$new_n31289_ i1=$abc$109383$new_n31286_ nq=$abc$109383$new_n31290_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[11] i1=soc.cpu.minerva.payload__src2$45[10] i2=$abc$109383$new_n29412_ i3=$abc$109383$new_n29388_ nq=$abc$109383$new_n31291_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[10] i1=$abc$109383$new_n29411_ nq=$abc$109383$new_n31292_
-.subckt a2_x2 i0=$abc$109383$new_n31292_ i1=$abc$109383$new_n31164_ q=$abc$109383$new_n31293_
-.subckt ao22_x2 i0=$abc$109383$new_n31279_ i1=$abc$109383$new_n31293_ i2=$abc$109383$new_n31291_ q=$abc$109383$new_n31294_
-.subckt nxr2_x1 i0=$abc$109383$new_n31294_ i1=$abc$109383$new_n31290_ nq=$abc$109383$new_n31295_
-.subckt nxr2_x1 i0=$abc$109383$new_n31295_ i1=$abc$109383$new_n31285_ nq=$abc$109383$new_n31296_
-.subckt nxr2_x1 i0=$abc$109383$new_n31296_ i1=$abc$109383$new_n31281_ nq=$abc$109383$new_n31297_
-.subckt nxr2_x1 i0=$abc$109383$new_n31297_ i1=$abc$109383$new_n31278_ nq=$abc$109383$new_n31298_
-.subckt nxr2_x1 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31270_ nq=$abc$109383$new_n31299_
-.subckt nxr2_x1 i0=$abc$109383$new_n31299_ i1=$abc$109383$new_n31262_ nq=$abc$109383$new_n31300_
-.subckt nxr2_x1 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31232_ nq=$abc$109383$new_n31301_
-.subckt a2_x2 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29290_ q=$abc$109383$new_n31302_
+.subckt and2_x1 i0=$abc$109383$new_n31292_ i1=$abc$109383$new_n31164_ q=$abc$109383$new_n31293_
+.subckt and21nor_x1 i0=$abc$109383$new_n31279_ i1=$abc$109383$new_n31293_ i2=$abc$109383$new_n31291_ nq=$abc$109383$new_n31294_
+.subckt nexor2_x0 i0=$abc$109383$new_n31294_ i1=$abc$109383$new_n31290_ nq=$abc$109383$new_n31295_
+.subckt nexor2_x0 i0=$abc$109383$new_n31295_ i1=$abc$109383$new_n31285_ nq=$abc$109383$new_n31296_
+.subckt nexor2_x0 i0=$abc$109383$new_n31296_ i1=$abc$109383$new_n31281_ nq=$abc$109383$new_n31297_
+.subckt nexor2_x0 i0=$abc$109383$new_n31297_ i1=$abc$109383$new_n31278_ nq=$abc$109383$new_n31298_
+.subckt nexor2_x0 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31270_ nq=$abc$109383$new_n31299_
+.subckt nexor2_x0 i0=$abc$109383$new_n31299_ i1=$abc$109383$new_n31262_ nq=$abc$109383$new_n31300_
+.subckt nexor2_x0 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31232_ nq=$abc$109383$new_n31301_
+.subckt and2_x1 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29290_ q=$abc$109383$new_n31302_
 .subckt nand2_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n29412_ nq=$abc$109383$new_n31303_
-.subckt a2_x2 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29266_ q=$abc$109383$new_n31304_
-.subckt nxr2_x1 i0=$abc$109383$new_n31304_ i1=$abc$109383$new_n31303_ nq=$abc$109383$new_n31305_
-.subckt nxr2_x1 i0=$abc$109383$new_n31305_ i1=$abc$109383$new_n31302_ nq=$abc$109383$new_n31306_
+.subckt and2_x1 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29266_ q=$abc$109383$new_n31304_
+.subckt nexor2_x0 i0=$abc$109383$new_n31304_ i1=$abc$109383$new_n31303_ nq=$abc$109383$new_n31305_
+.subckt nexor2_x0 i0=$abc$109383$new_n31305_ i1=$abc$109383$new_n31302_ nq=$abc$109383$new_n31306_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[12] q=$abc$109383$new_n31307_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[13] q=$abc$109383$new_n31308_
 .subckt nand4_x0 i0=$abc$109383$new_n31308_ i1=$abc$109383$new_n31307_ i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29444_ nq=$abc$109383$new_n31309_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29388_ nq=$abc$109383$new_n31310_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29442_ nq=$abc$109383$new_n31311_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[14] i1=$abc$109383$new_n29468_ q=$abc$109383$new_n31312_
-.subckt nxr2_x1 i0=$abc$109383$new_n31312_ i1=$abc$109383$new_n31311_ nq=$abc$109383$new_n31313_
-.subckt nxr2_x1 i0=$abc$109383$new_n31313_ i1=$abc$109383$new_n31310_ nq=$abc$109383$new_n31314_
-.subckt nxr2_x1 i0=$abc$109383$new_n31314_ i1=$abc$109383$new_n31309_ nq=$abc$109383$new_n31315_
-.subckt nxr2_x1 i0=$abc$109383$new_n31315_ i1=$abc$109383$new_n31306_ nq=$abc$109383$new_n31316_
-.subckt nxr2_x1 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31301_ nq=$abc$109383$new_n31317_
-.subckt nxr2_x1 i0=$abc$109383$new_n31317_ i1=$abc$109383$new_n31219_ nq=$abc$109383$new_n31318_
-.subckt nxr2_x1 i0=$abc$109383$new_n31318_ i1=$abc$109383$new_n31214_ nq=$abc$109383$new_n31319_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[14] i1=$abc$109383$new_n29468_ q=$abc$109383$new_n31312_
+.subckt nexor2_x0 i0=$abc$109383$new_n31312_ i1=$abc$109383$new_n31311_ nq=$abc$109383$new_n31313_
+.subckt nexor2_x0 i0=$abc$109383$new_n31313_ i1=$abc$109383$new_n31310_ nq=$abc$109383$new_n31314_
+.subckt nexor2_x0 i0=$abc$109383$new_n31314_ i1=$abc$109383$new_n31309_ nq=$abc$109383$new_n31315_
+.subckt nexor2_x0 i0=$abc$109383$new_n31315_ i1=$abc$109383$new_n31306_ nq=$abc$109383$new_n31316_
+.subckt nexor2_x0 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31301_ nq=$abc$109383$new_n31317_
+.subckt nexor2_x0 i0=$abc$109383$new_n31317_ i1=$abc$109383$new_n31219_ nq=$abc$109383$new_n31318_
+.subckt nexor2_x0 i0=$abc$109383$new_n31318_ i1=$abc$109383$new_n31214_ nq=$abc$109383$new_n31319_
 .subckt nand2_x0 i0=$abc$109383$new_n31319_ i1=$abc$109383$new_n31203_ nq=$abc$109383$new_n31320_
 .subckt nand2_x0 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31199_ nq=$abc$109383$new_n31321_
-.subckt nxr2_x1 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31199_ nq=$abc$109383$new_n31322_
-.subckt ao22_x2 i0=$abc$109383$new_n31080_ i1=$abc$109383$new_n31322_ i2=$abc$109383$new_n31321_ q=$abc$109383$new_n31323_
-.subckt a2_x2 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31098_ q=$abc$109383$new_n31324_
-.subckt nxr2_x1 i0=$abc$109383$new_n31213_ i1=$abc$109383$new_n31324_ nq=$abc$109383$new_n31325_
-.subckt nxr2_x1 i0=$abc$109383$new_n31318_ i1=$abc$109383$new_n31325_ nq=$abc$109383$new_n31326_
+.subckt nexor2_x0 i0=$abc$109383$new_n31172_ i1=$abc$109383$new_n31199_ nq=$abc$109383$new_n31322_
+.subckt and21nor_x1 i0=$abc$109383$new_n31080_ i1=$abc$109383$new_n31322_ i2=$abc$109383$new_n31321_ nq=$abc$109383$new_n31323_
+.subckt and2_x1 i0=$abc$109383$new_n31161_ i1=$abc$109383$new_n31098_ q=$abc$109383$new_n31324_
+.subckt nexor2_x0 i0=$abc$109383$new_n31213_ i1=$abc$109383$new_n31324_ nq=$abc$109383$new_n31325_
+.subckt nexor2_x0 i0=$abc$109383$new_n31318_ i1=$abc$109383$new_n31325_ nq=$abc$109383$new_n31326_
 .subckt nand2_x0 i0=$abc$109383$new_n31326_ i1=$abc$109383$new_n31323_ nq=$abc$109383$new_n31327_
-.subckt oa22_x2 i0=$abc$109383$new_n31327_ i1=$abc$109383$new_n31320_ i2=$abc$109383$new_n31198_ q=$abc$109383$new_n31328_
+.subckt or21nand_x1 i0=$abc$109383$new_n31327_ i1=$abc$109383$new_n31320_ i2=$abc$109383$new_n31198_ nq=$abc$109383$new_n31328_
 .subckt nand3_x0 i0=$abc$109383$new_n31327_ i1=$abc$109383$new_n31320_ i2=$abc$109383$new_n31198_ nq=$abc$109383$new_n31329_
 .subckt nand3_x0 i0=$abc$109383$new_n31329_ i1=$abc$109383$new_n31328_ i2=$abc$109383$new_n31195_ nq=$abc$109383$new_n31330_
-.subckt oa22_x2 i0=$abc$109383$new_n31329_ i1=$abc$109383$new_n31328_ i2=$abc$109383$new_n31195_ q=$abc$109383$new_n31331_
+.subckt or21nand_x1 i0=$abc$109383$new_n31329_ i1=$abc$109383$new_n31328_ i2=$abc$109383$new_n31195_ nq=$abc$109383$new_n31331_
 .subckt nand2_x0 i0=$abc$109383$new_n31331_ i1=$abc$109383$new_n31330_ nq=$abc$109383$new_n31332_
-.subckt nxr2_x1 i0=$abc$109383$new_n31332_ i1=$abc$109383$new_n31188_ nq=$abc$109383$new_n31333_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31333_ i2=$abc$109383$new_n31182_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102814
+.subckt nexor2_x0 i0=$abc$109383$new_n31332_ i1=$abc$109383$new_n31188_ nq=$abc$109383$new_n31333_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31333_ i2=$abc$109383$new_n31182_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102814
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n31335_
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[15] nq=$abc$109383$new_n31336_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31336_ q=$abc$109383$new_n31337_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31336_ nq=$abc$109383$new_n31337_
 .subckt nor2_x0 i0=$abc$109383$new_n31337_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n31338_
-.subckt a3_x2 i0=$abc$109383$new_n31329_ i1=$abc$109383$new_n31328_ i2=$abc$109383$new_n31195_ q=$abc$109383$new_n31339_
-.subckt a2_x2 i0=$abc$109383$new_n31331_ i1=$abc$109383$new_n31330_ q=$abc$109383$new_n31340_
-.subckt oa22_x2 i0=$abc$109383$new_n31188_ i1=$abc$109383$new_n31340_ i2=$abc$109383$new_n31339_ q=$abc$109383$new_n31341_
-.subckt a2_x2 i0=$abc$109383$new_n31326_ i1=$abc$109383$new_n31323_ q=$abc$109383$new_n31342_
+.subckt and3_x1 i0=$abc$109383$new_n31329_ i1=$abc$109383$new_n31328_ i2=$abc$109383$new_n31195_ q=$abc$109383$new_n31339_
+.subckt and2_x1 i0=$abc$109383$new_n31331_ i1=$abc$109383$new_n31330_ q=$abc$109383$new_n31340_
+.subckt or21nand_x1 i0=$abc$109383$new_n31188_ i1=$abc$109383$new_n31340_ i2=$abc$109383$new_n31339_ nq=$abc$109383$new_n31341_
+.subckt and2_x1 i0=$abc$109383$new_n31326_ i1=$abc$109383$new_n31323_ q=$abc$109383$new_n31342_
 .subckt nand3_x0 i0=$abc$109383$new_n31197_ i1=$abc$109383$new_n31025_ i2=$abc$109383$new_n30969_ nq=$abc$109383$new_n31343_
-.subckt ao22_x2 i0=$abc$109383$new_n31343_ i1=$abc$109383$new_n31342_ i2=$abc$109383$new_n31320_ q=$abc$109383$new_n31344_
-.subckt a2_x2 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31207_ q=$abc$109383$new_n31345_
-.subckt oa22_x2 i0=$abc$109383$new_n31102_ i1=$abc$109383$new_n31128_ i2=$abc$109383$new_n31345_ q=$abc$109383$new_n31346_
-.subckt a3_x2 i0=$abc$109383$new_n31346_ i1=$abc$109383$new_n31161_ i2=$abc$109383$new_n31098_ q=$abc$109383$new_n31347_
-.subckt a2_x2 i0=$abc$109383$new_n31171_ i1=$abc$109383$new_n31218_ q=$abc$109383$new_n31348_
+.subckt and21nor_x1 i0=$abc$109383$new_n31343_ i1=$abc$109383$new_n31342_ i2=$abc$109383$new_n31320_ nq=$abc$109383$new_n31344_
+.subckt and2_x1 i0=$abc$109383$new_n31127_ i1=$abc$109383$new_n31207_ q=$abc$109383$new_n31345_
+.subckt or21nand_x1 i0=$abc$109383$new_n31102_ i1=$abc$109383$new_n31128_ i2=$abc$109383$new_n31345_ nq=$abc$109383$new_n31346_
+.subckt and3_x1 i0=$abc$109383$new_n31346_ i1=$abc$109383$new_n31161_ i2=$abc$109383$new_n31098_ q=$abc$109383$new_n31347_
+.subckt and2_x1 i0=$abc$109383$new_n31171_ i1=$abc$109383$new_n31218_ q=$abc$109383$new_n31348_
 .subckt nand2_x0 i0=$abc$109383$new_n31317_ i1=$abc$109383$new_n31348_ nq=$abc$109383$new_n31349_
 .subckt nand2_x0 i0=$abc$109383$new_n31159_ i1=$abc$109383$new_n31220_ nq=$abc$109383$new_n31350_
-.subckt a2_x2 i0=$abc$109383$new_n31229_ i1=$abc$109383$new_n31130_ q=$abc$109383$new_n31351_
-.subckt ao22_x2 i0=$abc$109383$new_n31129_ i1=$abc$109383$new_n31351_ i2=$abc$109383$new_n31350_ q=$abc$109383$new_n31352_
-.subckt nxr2_x1 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31352_ nq=$abc$109383$new_n31353_
-.subckt nxr2_x1 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31353_ nq=$abc$109383$new_n31354_
-.subckt a2_x2 i0=$abc$109383$new_n31354_ i1=$abc$109383$new_n31219_ q=$abc$109383$new_n31355_
-.subckt ao22_x2 i0=$abc$109383$new_n31214_ i1=$abc$109383$new_n31355_ i2=$abc$109383$new_n31349_ q=$abc$109383$new_n31356_
+.subckt and2_x1 i0=$abc$109383$new_n31229_ i1=$abc$109383$new_n31130_ q=$abc$109383$new_n31351_
+.subckt and21nor_x1 i0=$abc$109383$new_n31129_ i1=$abc$109383$new_n31351_ i2=$abc$109383$new_n31350_ nq=$abc$109383$new_n31352_
+.subckt nexor2_x0 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31352_ nq=$abc$109383$new_n31353_
+.subckt nexor2_x0 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31353_ nq=$abc$109383$new_n31354_
+.subckt and2_x1 i0=$abc$109383$new_n31354_ i1=$abc$109383$new_n31219_ q=$abc$109383$new_n31355_
+.subckt and21nor_x1 i0=$abc$109383$new_n31214_ i1=$abc$109383$new_n31355_ i2=$abc$109383$new_n31349_ nq=$abc$109383$new_n31356_
 .subckt nand2_x0 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31232_ nq=$abc$109383$new_n31357_
-.subckt a2_x2 i0=$abc$109383$new_n31125_ i1=$abc$109383$new_n31239_ q=$abc$109383$new_n31358_
+.subckt and2_x1 i0=$abc$109383$new_n31125_ i1=$abc$109383$new_n31239_ q=$abc$109383$new_n31358_
 .subckt nand2_x0 i0=$abc$109383$new_n31242_ i1=$abc$109383$new_n31120_ nq=$abc$109383$new_n31359_
 .subckt nand2_x0 i0=$abc$109383$new_n29313_ i1=$abc$109383$new_n29623_ nq=$abc$109383$new_n31360_
-.subckt nxr2_x1 i0=$abc$109383$new_n31115_ i1=$abc$109383$new_n31360_ nq=$abc$109383$new_n31361_
-.subckt oa22_x2 i0=$abc$109383$new_n31361_ i1=$abc$109383$new_n31359_ i2=$abc$109383$new_n31358_ q=$abc$109383$new_n31362_
+.subckt nexor2_x0 i0=$abc$109383$new_n31115_ i1=$abc$109383$new_n31360_ nq=$abc$109383$new_n31361_
+.subckt or21nand_x1 i0=$abc$109383$new_n31361_ i1=$abc$109383$new_n31359_ i2=$abc$109383$new_n31358_ nq=$abc$109383$new_n31362_
 .subckt nand2_x0 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31362_ nq=$abc$109383$new_n31363_
-.subckt nxr2_x1 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31362_ nq=$abc$109383$new_n31364_
+.subckt nexor2_x0 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31362_ nq=$abc$109383$new_n31364_
 .subckt nand4_x0 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29599_ i3=$abc$109383$new_n29573_ nq=$abc$109383$new_n31365_
-.subckt a2_x2 i0=$abc$109383$new_n31234_ i1=$abc$109383$new_n31113_ q=$abc$109383$new_n31366_
-.subckt ao22_x2 i0=$abc$109383$new_n31360_ i1=$abc$109383$new_n31366_ i2=$abc$109383$new_n31365_ q=$abc$109383$new_n31367_
-.subckt ao22_x2 i0=$abc$109383$new_n31367_ i1=$abc$109383$new_n31364_ i2=$abc$109383$new_n31363_ q=$abc$109383$new_n31368_
-.subckt nxr2_x1 i0=$abc$109383$new_n31368_ i1=$abc$109383$new_n31357_ nq=$abc$109383$new_n31369_
+.subckt and2_x1 i0=$abc$109383$new_n31234_ i1=$abc$109383$new_n31113_ q=$abc$109383$new_n31366_
+.subckt and21nor_x1 i0=$abc$109383$new_n31360_ i1=$abc$109383$new_n31366_ i2=$abc$109383$new_n31365_ nq=$abc$109383$new_n31367_
+.subckt and21nor_x1 i0=$abc$109383$new_n31367_ i1=$abc$109383$new_n31364_ i2=$abc$109383$new_n31363_ nq=$abc$109383$new_n31368_
+.subckt nexor2_x0 i0=$abc$109383$new_n31368_ i1=$abc$109383$new_n31357_ nq=$abc$109383$new_n31369_
 .subckt nand2_x0 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31353_ nq=$abc$109383$new_n31370_
-.subckt a2_x2 i0=$abc$109383$new_n31157_ i1=$abc$109383$new_n31263_ q=$abc$109383$new_n31371_
+.subckt and2_x1 i0=$abc$109383$new_n31157_ i1=$abc$109383$new_n31263_ q=$abc$109383$new_n31371_
 .subckt nand2_x0 i0=$abc$109383$new_n31268_ i1=$abc$109383$new_n31141_ nq=$abc$109383$new_n31372_
-.subckt oa22_x2 i0=$abc$109383$new_n31228_ i1=$abc$109383$new_n31372_ i2=$abc$109383$new_n31371_ q=$abc$109383$new_n31373_
-.subckt a2_x2 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31373_ q=$abc$109383$new_n31374_
-.subckt nxr2_x1 i0=$abc$109383$new_n31261_ i1=$abc$109383$new_n31367_ nq=$abc$109383$new_n31375_
-.subckt oa22_x2 i0=$abc$109383$new_n31375_ i1=$abc$109383$new_n31299_ i2=$abc$109383$new_n31374_ q=$abc$109383$new_n31376_
-.subckt a4_x2 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29623_ i3=$abc$109383$new_n29599_ q=$abc$109383$new_n31377_
+.subckt or21nand_x1 i0=$abc$109383$new_n31228_ i1=$abc$109383$new_n31372_ i2=$abc$109383$new_n31371_ nq=$abc$109383$new_n31373_
+.subckt and2_x1 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31373_ q=$abc$109383$new_n31374_
+.subckt nexor2_x0 i0=$abc$109383$new_n31261_ i1=$abc$109383$new_n31367_ nq=$abc$109383$new_n31375_
+.subckt or21nand_x1 i0=$abc$109383$new_n31375_ i1=$abc$109383$new_n31299_ i2=$abc$109383$new_n31374_ nq=$abc$109383$new_n31376_
+.subckt and4_x1 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29623_ i3=$abc$109383$new_n29599_ q=$abc$109383$new_n31377_
 .subckt nand2_x0 i0=$abc$109383$new_n29372_ i1=$abc$109383$new_n29623_ nq=$abc$109383$new_n31378_
 .subckt nand2_x0 i0=$abc$109383$new_n31378_ i1=$abc$109383$new_n31246_ nq=$abc$109383$new_n31379_
-.subckt oa22_x2 i0=$abc$109383$new_n31245_ i1=$abc$109383$new_n31379_ i2=$abc$109383$new_n31377_ q=$abc$109383$new_n31380_
+.subckt or21nand_x1 i0=$abc$109383$new_n31245_ i1=$abc$109383$new_n31379_ i2=$abc$109383$new_n31377_ nq=$abc$109383$new_n31380_
 .subckt buf_x4 i=$abc$109383$new_n31103_ q=$abc$109383$new_n31381_
-.subckt a4_x2 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29524_ i3=$abc$109383$new_n29502_ q=$abc$109383$new_n31382_
+.subckt and4_x1 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29524_ i3=$abc$109383$new_n29502_ q=$abc$109383$new_n31382_
 .subckt nand2_x0 i0=$abc$109383$new_n31251_ i1=$abc$109383$new_n31122_ nq=$abc$109383$new_n31383_
-.subckt oa22_x2 i0=$abc$109383$new_n31241_ i1=$abc$109383$new_n31383_ i2=$abc$109383$new_n31382_ q=$abc$109383$new_n31384_
+.subckt or21nand_x1 i0=$abc$109383$new_n31241_ i1=$abc$109383$new_n31383_ i2=$abc$109383$new_n31382_ nq=$abc$109383$new_n31384_
 .subckt nand2_x0 i0=$abc$109383$new_n31258_ i1=$abc$109383$new_n31384_ nq=$abc$109383$new_n31385_
-.subckt a2_x2 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29572_ q=$abc$109383$new_n31386_
-.subckt nxr2_x1 i0=$abc$109383$new_n31257_ i1=$abc$109383$new_n31386_ nq=$abc$109383$new_n31387_
-.subckt a2_x2 i0=$abc$109383$new_n31387_ i1=$abc$109383$new_n31253_ q=$abc$109383$new_n31388_
-.subckt ao22_x2 i0=$abc$109383$new_n31249_ i1=$abc$109383$new_n31388_ i2=$abc$109383$new_n31385_ q=$abc$109383$new_n31389_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n31390_
+.subckt and2_x1 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29572_ q=$abc$109383$new_n31386_
+.subckt nexor2_x0 i0=$abc$109383$new_n31257_ i1=$abc$109383$new_n31386_ nq=$abc$109383$new_n31387_
+.subckt and2_x1 i0=$abc$109383$new_n31387_ i1=$abc$109383$new_n31253_ q=$abc$109383$new_n31388_
+.subckt and21nor_x1 i0=$abc$109383$new_n31249_ i1=$abc$109383$new_n31388_ i2=$abc$109383$new_n31385_ nq=$abc$109383$new_n31389_
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n31390_
 .subckt nand2_x0 i0=$abc$109383$new_n29253_ i1=soc.cpu.minerva.payload__src1$44[13] nq=$abc$109383$new_n31391_
-.subckt a2_x2 i0=$abc$109383$new_n30313_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31392_
-.subckt nxr2_x1 i0=$abc$109383$new_n31392_ i1=$abc$109383$new_n31391_ nq=$abc$109383$new_n31393_
-.subckt nxr2_x1 i0=$abc$109383$new_n31393_ i1=$abc$109383$new_n31390_ nq=$abc$109383$new_n31394_
+.subckt and2_x1 i0=$abc$109383$new_n30313_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31392_
+.subckt nexor2_x0 i0=$abc$109383$new_n31392_ i1=$abc$109383$new_n31391_ nq=$abc$109383$new_n31393_
+.subckt nexor2_x0 i0=$abc$109383$new_n31393_ i1=$abc$109383$new_n31390_ nq=$abc$109383$new_n31394_
 .subckt nand4_x0 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29228_ i2=$abc$109383$new_n29548_ i3=$abc$109383$new_n29524_ nq=$abc$109383$new_n31395_
 .subckt nand2_x0 i0=$abc$109383$new_n29228_ i1=$abc$109383$new_n29548_ nq=$abc$109383$new_n31396_
-.subckt a2_x2 i0=$abc$109383$new_n31396_ i1=$abc$109383$new_n31255_ q=$abc$109383$new_n31397_
-.subckt ao22_x2 i0=$abc$109383$new_n31254_ i1=$abc$109383$new_n31397_ i2=$abc$109383$new_n31395_ q=$abc$109383$new_n31398_
+.subckt and2_x1 i0=$abc$109383$new_n31396_ i1=$abc$109383$new_n31255_ q=$abc$109383$new_n31397_
+.subckt and21nor_x1 i0=$abc$109383$new_n31254_ i1=$abc$109383$new_n31397_ i2=$abc$109383$new_n31395_ nq=$abc$109383$new_n31398_
 .subckt nand2_x0 i0=$abc$109383$new_n29242_ i1=soc.cpu.minerva.payload__src1$44[12] nq=$abc$109383$new_n31399_
 .subckt nand2_x0 i0=$abc$109383$new_n31103_ i1=$abc$109383$new_n29548_ nq=$abc$109383$new_n31400_
-.subckt a2_x2 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n31401_
-.subckt nxr2_x1 i0=$abc$109383$new_n31401_ i1=$abc$109383$new_n31400_ nq=$abc$109383$new_n31402_
-.subckt nxr2_x1 i0=$abc$109383$new_n31402_ i1=$abc$109383$new_n31399_ nq=$abc$109383$new_n31403_
-.subckt nxr2_x1 i0=$abc$109383$new_n31403_ i1=$abc$109383$new_n31398_ nq=$abc$109383$new_n31404_
-.subckt nxr2_x1 i0=$abc$109383$new_n31404_ i1=$abc$109383$new_n31394_ nq=$abc$109383$new_n31405_
-.subckt nxr2_x1 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31389_ nq=$abc$109383$new_n31406_
-.subckt nxr2_x1 i0=$abc$109383$new_n31406_ i1=$abc$109383$new_n31380_ nq=$abc$109383$new_n31407_
-.subckt a2_x2 i0=$abc$109383$new_n31170_ i1=$abc$109383$new_n31280_ q=$abc$109383$new_n31408_
+.subckt and2_x1 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n31401_
+.subckt nexor2_x0 i0=$abc$109383$new_n31401_ i1=$abc$109383$new_n31400_ nq=$abc$109383$new_n31402_
+.subckt nexor2_x0 i0=$abc$109383$new_n31402_ i1=$abc$109383$new_n31399_ nq=$abc$109383$new_n31403_
+.subckt nexor2_x0 i0=$abc$109383$new_n31403_ i1=$abc$109383$new_n31398_ nq=$abc$109383$new_n31404_
+.subckt nexor2_x0 i0=$abc$109383$new_n31404_ i1=$abc$109383$new_n31394_ nq=$abc$109383$new_n31405_
+.subckt nexor2_x0 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31389_ nq=$abc$109383$new_n31406_
+.subckt nexor2_x0 i0=$abc$109383$new_n31406_ i1=$abc$109383$new_n31380_ nq=$abc$109383$new_n31407_
+.subckt and2_x1 i0=$abc$109383$new_n31170_ i1=$abc$109383$new_n31280_ q=$abc$109383$new_n31408_
 .subckt nand2_x0 i0=$abc$109383$new_n31296_ i1=$abc$109383$new_n31408_ nq=$abc$109383$new_n31409_
 .subckt buf_x4 i=$abc$109383$new_n30535_ q=$abc$109383$new_n31410_
-.subckt a4_x2 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29324_ i3=$abc$109383$new_n29290_ q=$abc$109383$new_n31411_
+.subckt and4_x1 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29324_ i3=$abc$109383$new_n29290_ q=$abc$109383$new_n31411_
 .subckt nand2_x0 i0=$abc$109383$new_n31283_ i1=$abc$109383$new_n31148_ nq=$abc$109383$new_n31412_
-.subckt oa22_x2 i0=$abc$109383$new_n31275_ i1=$abc$109383$new_n31412_ i2=$abc$109383$new_n31411_ q=$abc$109383$new_n31413_
-.subckt nxr2_x1 i0=$abc$109383$new_n31295_ i1=$abc$109383$new_n31413_ nq=$abc$109383$new_n31414_
-.subckt a2_x2 i0=$abc$109383$new_n31414_ i1=$abc$109383$new_n31281_ q=$abc$109383$new_n31415_
-.subckt ao22_x2 i0=$abc$109383$new_n31278_ i1=$abc$109383$new_n31415_ i2=$abc$109383$new_n31409_ q=$abc$109383$new_n31416_
-.subckt a4_x2 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29414_ i3=$abc$109383$new_n29389_ q=$abc$109383$new_n31417_
+.subckt or21nand_x1 i0=$abc$109383$new_n31275_ i1=$abc$109383$new_n31412_ i2=$abc$109383$new_n31411_ nq=$abc$109383$new_n31413_
+.subckt nexor2_x0 i0=$abc$109383$new_n31295_ i1=$abc$109383$new_n31413_ nq=$abc$109383$new_n31414_
+.subckt and2_x1 i0=$abc$109383$new_n31414_ i1=$abc$109383$new_n31281_ q=$abc$109383$new_n31415_
+.subckt and21nor_x1 i0=$abc$109383$new_n31278_ i1=$abc$109383$new_n31415_ i2=$abc$109383$new_n31409_ nq=$abc$109383$new_n31416_
+.subckt and4_x1 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29414_ i3=$abc$109383$new_n29389_ q=$abc$109383$new_n31417_
 .subckt nand2_x0 i0=$abc$109383$new_n31292_ i1=$abc$109383$new_n31164_ nq=$abc$109383$new_n31418_
-.subckt oa22_x2 i0=$abc$109383$new_n31163_ i1=$abc$109383$new_n31418_ i2=$abc$109383$new_n31417_ q=$abc$109383$new_n31419_
+.subckt or21nand_x1 i0=$abc$109383$new_n31163_ i1=$abc$109383$new_n31418_ i2=$abc$109383$new_n31417_ nq=$abc$109383$new_n31419_
 .subckt nand2_x0 i0=$abc$109383$new_n31419_ i1=$abc$109383$new_n31290_ nq=$abc$109383$new_n31420_
-.subckt a2_x2 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29501_ q=$abc$109383$new_n31421_
-.subckt nxr2_x1 i0=$abc$109383$new_n31289_ i1=$abc$109383$new_n31421_ nq=$abc$109383$new_n31422_
-.subckt a2_x2 i0=$abc$109383$new_n31294_ i1=$abc$109383$new_n31422_ q=$abc$109383$new_n31423_
-.subckt ao22_x2 i0=$abc$109383$new_n31285_ i1=$abc$109383$new_n31423_ i2=$abc$109383$new_n31420_ q=$abc$109383$new_n31424_
+.subckt and2_x1 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29501_ q=$abc$109383$new_n31421_
+.subckt nexor2_x0 i0=$abc$109383$new_n31289_ i1=$abc$109383$new_n31421_ nq=$abc$109383$new_n31422_
+.subckt and2_x1 i0=$abc$109383$new_n31294_ i1=$abc$109383$new_n31422_ q=$abc$109383$new_n31423_
+.subckt and21nor_x1 i0=$abc$109383$new_n31285_ i1=$abc$109383$new_n31423_ i2=$abc$109383$new_n31420_ nq=$abc$109383$new_n31424_
 .subckt nand4_x0 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n30535_ i2=$abc$109383$new_n29346_ i3=$abc$109383$new_n29324_ nq=$abc$109383$new_n31425_
 .subckt nand2_x0 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29345_ nq=$abc$109383$new_n31426_
-.subckt a2_x2 i0=$abc$109383$new_n31426_ i1=$abc$109383$new_n31287_ q=$abc$109383$new_n31427_
-.subckt ao22_x2 i0=$abc$109383$new_n31286_ i1=$abc$109383$new_n31427_ i2=$abc$109383$new_n31425_ q=$abc$109383$new_n31428_
+.subckt and2_x1 i0=$abc$109383$new_n31426_ i1=$abc$109383$new_n31287_ q=$abc$109383$new_n31427_
+.subckt and21nor_x1 i0=$abc$109383$new_n31286_ i1=$abc$109383$new_n31427_ i2=$abc$109383$new_n31425_ nq=$abc$109383$new_n31428_
 .subckt nand2_x0 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29523_ nq=$abc$109383$new_n31429_
 .subckt nand2_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n29344_ nq=$abc$109383$new_n31430_
-.subckt a2_x2 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29500_ q=$abc$109383$new_n31431_
-.subckt nxr2_x1 i0=$abc$109383$new_n31431_ i1=$abc$109383$new_n31430_ nq=$abc$109383$new_n31432_
-.subckt nxr2_x1 i0=$abc$109383$new_n31432_ i1=$abc$109383$new_n31429_ nq=$abc$109383$new_n31433_
+.subckt and2_x1 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29500_ q=$abc$109383$new_n31431_
+.subckt nexor2_x0 i0=$abc$109383$new_n31431_ i1=$abc$109383$new_n31430_ nq=$abc$109383$new_n31432_
+.subckt nexor2_x0 i0=$abc$109383$new_n31432_ i1=$abc$109383$new_n31429_ nq=$abc$109383$new_n31433_
 .subckt nand4_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30796_ i2=$abc$109383$new_n29266_ i3=$abc$109383$new_n29413_ nq=$abc$109383$new_n31434_
 .subckt nand2_x0 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29266_ nq=$abc$109383$new_n31435_
-.subckt a2_x2 i0=$abc$109383$new_n31435_ i1=$abc$109383$new_n31303_ q=$abc$109383$new_n31436_
+.subckt and2_x1 i0=$abc$109383$new_n31435_ i1=$abc$109383$new_n31303_ q=$abc$109383$new_n31436_
 .subckt nand2_x0 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29289_ nq=$abc$109383$new_n31437_
-.subckt ao22_x2 i0=$abc$109383$new_n31437_ i1=$abc$109383$new_n31436_ i2=$abc$109383$new_n31434_ q=$abc$109383$new_n31438_
-.subckt nxr2_x1 i0=$abc$109383$new_n31438_ i1=$abc$109383$new_n31433_ nq=$abc$109383$new_n31439_
-.subckt nxr2_x1 i0=$abc$109383$new_n31439_ i1=$abc$109383$new_n31428_ nq=$abc$109383$new_n31440_
-.subckt a4_x2 i0=$abc$109383$new_n31308_ i1=$abc$109383$new_n31307_ i2=$abc$109383$new_n29470_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n31441_
+.subckt and21nor_x1 i0=$abc$109383$new_n31437_ i1=$abc$109383$new_n31436_ i2=$abc$109383$new_n31434_ nq=$abc$109383$new_n31438_
+.subckt nexor2_x0 i0=$abc$109383$new_n31438_ i1=$abc$109383$new_n31433_ nq=$abc$109383$new_n31439_
+.subckt nexor2_x0 i0=$abc$109383$new_n31439_ i1=$abc$109383$new_n31428_ nq=$abc$109383$new_n31440_
+.subckt and4_x1 i0=$abc$109383$new_n31308_ i1=$abc$109383$new_n31307_ i2=$abc$109383$new_n29470_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n31441_
 .subckt nand2_x0 i0=$abc$109383$new_n31314_ i1=$abc$109383$new_n31441_ nq=$abc$109383$new_n31442_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n30317_ q=$abc$109383$new_n31443_
-.subckt nxr2_x1 i0=$abc$109383$new_n31313_ i1=$abc$109383$new_n31443_ nq=$abc$109383$new_n31444_
-.subckt a2_x2 i0=$abc$109383$new_n31444_ i1=$abc$109383$new_n31309_ q=$abc$109383$new_n31445_
-.subckt ao22_x2 i0=$abc$109383$new_n31306_ i1=$abc$109383$new_n31445_ i2=$abc$109383$new_n31442_ q=$abc$109383$new_n31446_
-.subckt nxr2_x1 i0=$abc$109383$new_n31446_ i1=$abc$109383$new_n31440_ nq=$abc$109383$new_n31447_
-.subckt nxr2_x1 i0=$abc$109383$new_n31447_ i1=$abc$109383$new_n31424_ nq=$abc$109383$new_n31448_
-.subckt nxr2_x1 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31416_ nq=$abc$109383$new_n31449_
-.subckt nxr2_x1 i0=$abc$109383$new_n31449_ i1=$abc$109383$new_n31407_ nq=$abc$109383$new_n31450_
-.subckt nxr2_x1 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31376_ nq=$abc$109383$new_n31451_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n30317_ q=$abc$109383$new_n31443_
+.subckt nexor2_x0 i0=$abc$109383$new_n31313_ i1=$abc$109383$new_n31443_ nq=$abc$109383$new_n31444_
+.subckt and2_x1 i0=$abc$109383$new_n31444_ i1=$abc$109383$new_n31309_ q=$abc$109383$new_n31445_
+.subckt and21nor_x1 i0=$abc$109383$new_n31306_ i1=$abc$109383$new_n31445_ i2=$abc$109383$new_n31442_ nq=$abc$109383$new_n31446_
+.subckt nexor2_x0 i0=$abc$109383$new_n31446_ i1=$abc$109383$new_n31440_ nq=$abc$109383$new_n31447_
+.subckt nexor2_x0 i0=$abc$109383$new_n31447_ i1=$abc$109383$new_n31424_ nq=$abc$109383$new_n31448_
+.subckt nexor2_x0 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31416_ nq=$abc$109383$new_n31449_
+.subckt nexor2_x0 i0=$abc$109383$new_n31449_ i1=$abc$109383$new_n31407_ nq=$abc$109383$new_n31450_
+.subckt nexor2_x0 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31376_ nq=$abc$109383$new_n31451_
 .subckt nand2_x0 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29323_ nq=$abc$109383$new_n31452_
 .subckt nand2_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n29265_ nq=$abc$109383$new_n31453_
-.subckt a2_x2 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29289_ q=$abc$109383$new_n31454_
-.subckt nxr2_x1 i0=$abc$109383$new_n31454_ i1=$abc$109383$new_n31453_ nq=$abc$109383$new_n31455_
-.subckt nxr2_x1 i0=$abc$109383$new_n31455_ i1=$abc$109383$new_n31452_ nq=$abc$109383$new_n31456_
+.subckt and2_x1 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29289_ q=$abc$109383$new_n31454_
+.subckt nexor2_x0 i0=$abc$109383$new_n31454_ i1=$abc$109383$new_n31453_ nq=$abc$109383$new_n31455_
+.subckt nexor2_x0 i0=$abc$109383$new_n31455_ i1=$abc$109383$new_n31452_ nq=$abc$109383$new_n31456_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[14] q=$abc$109383$new_n31457_
 .subckt nand4_x0 i0=$abc$109383$new_n31457_ i1=soc.cpu.minerva.payload__src2$45[13] i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29443_ nq=$abc$109383$new_n31458_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[14] i1=$abc$109383$new_n29468_ nq=$abc$109383$new_n31459_
-.subckt a2_x2 i0=$abc$109383$new_n31459_ i1=$abc$109383$new_n31311_ q=$abc$109383$new_n31460_
-.subckt ao22_x2 i0=$abc$109383$new_n31310_ i1=$abc$109383$new_n31460_ i2=$abc$109383$new_n31458_ q=$abc$109383$new_n31461_
+.subckt and2_x1 i0=$abc$109383$new_n31459_ i1=$abc$109383$new_n31311_ q=$abc$109383$new_n31460_
+.subckt and21nor_x1 i0=$abc$109383$new_n31310_ i1=$abc$109383$new_n31460_ i2=$abc$109383$new_n31458_ nq=$abc$109383$new_n31461_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29413_ nq=$abc$109383$new_n31462_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[14] i1=$abc$109383$new_n29442_ nq=$abc$109383$new_n31463_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29388_ q=$abc$109383$new_n31464_
-.subckt nxr2_x1 i0=$abc$109383$new_n31464_ i1=$abc$109383$new_n31463_ nq=$abc$109383$new_n31465_
-.subckt nxr2_x1 i0=$abc$109383$new_n31465_ i1=$abc$109383$new_n31462_ nq=$abc$109383$new_n31466_
-.subckt nxr2_x1 i0=$abc$109383$new_n31466_ i1=$abc$109383$new_n31461_ nq=$abc$109383$new_n31467_
-.subckt nxr2_x1 i0=$abc$109383$new_n31467_ i1=$abc$109383$new_n31456_ nq=$abc$109383$new_n31468_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29388_ q=$abc$109383$new_n31464_
+.subckt nexor2_x0 i0=$abc$109383$new_n31464_ i1=$abc$109383$new_n31463_ nq=$abc$109383$new_n31465_
+.subckt nexor2_x0 i0=$abc$109383$new_n31465_ i1=$abc$109383$new_n31462_ nq=$abc$109383$new_n31466_
+.subckt nexor2_x0 i0=$abc$109383$new_n31466_ i1=$abc$109383$new_n31461_ nq=$abc$109383$new_n31467_
+.subckt nexor2_x0 i0=$abc$109383$new_n31467_ i1=$abc$109383$new_n31456_ nq=$abc$109383$new_n31468_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[15] q=$abc$109383$new_n31469_
 .subckt buf_x4 i=$abc$109383$new_n31469_ q=$abc$109383$new_n31470_
-.subckt a2_x2 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29471_ q=$abc$109383$new_n31471_
-.subckt nxr2_x1 i0=$abc$109383$new_n31471_ i1=$abc$109383$new_n31468_ nq=$abc$109383$new_n31472_
-.subckt nxr2_x1 i0=$abc$109383$new_n31472_ i1=$abc$109383$new_n31451_ nq=$abc$109383$new_n31473_
-.subckt nxr2_x1 i0=$abc$109383$new_n31473_ i1=$abc$109383$new_n31370_ nq=$abc$109383$new_n31474_
-.subckt nxr2_x1 i0=$abc$109383$new_n31474_ i1=$abc$109383$new_n31369_ nq=$abc$109383$new_n31475_
-.subckt nxr2_x1 i0=$abc$109383$new_n31475_ i1=$abc$109383$new_n31356_ nq=$abc$109383$new_n31476_
-.subckt nxr2_x1 i0=$abc$109383$new_n31476_ i1=$abc$109383$new_n31347_ nq=$abc$109383$new_n31477_
-.subckt nxr2_x1 i0=$abc$109383$new_n31477_ i1=$abc$109383$new_n31344_ nq=$abc$109383$new_n31478_
-.subckt nxr2_x1 i0=$abc$109383$new_n31478_ i1=$abc$109383$new_n31341_ nq=$abc$109383$new_n31479_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31479_ i2=$abc$109383$new_n31338_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102818
+.subckt and2_x1 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29471_ q=$abc$109383$new_n31471_
+.subckt nexor2_x0 i0=$abc$109383$new_n31471_ i1=$abc$109383$new_n31468_ nq=$abc$109383$new_n31472_
+.subckt nexor2_x0 i0=$abc$109383$new_n31472_ i1=$abc$109383$new_n31451_ nq=$abc$109383$new_n31473_
+.subckt nexor2_x0 i0=$abc$109383$new_n31473_ i1=$abc$109383$new_n31370_ nq=$abc$109383$new_n31474_
+.subckt nexor2_x0 i0=$abc$109383$new_n31474_ i1=$abc$109383$new_n31369_ nq=$abc$109383$new_n31475_
+.subckt nexor2_x0 i0=$abc$109383$new_n31475_ i1=$abc$109383$new_n31356_ nq=$abc$109383$new_n31476_
+.subckt nexor2_x0 i0=$abc$109383$new_n31476_ i1=$abc$109383$new_n31347_ nq=$abc$109383$new_n31477_
+.subckt nexor2_x0 i0=$abc$109383$new_n31477_ i1=$abc$109383$new_n31344_ nq=$abc$109383$new_n31478_
+.subckt nexor2_x0 i0=$abc$109383$new_n31478_ i1=$abc$109383$new_n31341_ nq=$abc$109383$new_n31479_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31479_ i2=$abc$109383$new_n31338_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102818
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[16] nq=$abc$109383$new_n31481_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31481_ q=$abc$109383$new_n31482_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n31481_ nq=$abc$109383$new_n31482_
 .subckt nor2_x0 i0=$abc$109383$new_n31482_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n31483_
 .subckt nor2_x0 i0=$abc$109383$new_n31477_ i1=$abc$109383$new_n31344_ nq=$abc$109383$new_n31484_
-.subckt a2_x2 i0=$abc$109383$new_n31319_ i1=$abc$109383$new_n31203_ q=$abc$109383$new_n31485_
-.subckt oa22_x2 i0=$abc$109383$new_n31198_ i1=$abc$109383$new_n31327_ i2=$abc$109383$new_n31485_ q=$abc$109383$new_n31486_
-.subckt nxr2_x1 i0=$abc$109383$new_n31477_ i1=$abc$109383$new_n31486_ nq=$abc$109383$new_n31487_
-.subckt oa22_x2 i0=$abc$109383$new_n31341_ i1=$abc$109383$new_n31487_ i2=$abc$109383$new_n31484_ q=$abc$109383$new_n31488_
-.subckt a2_x2 i0=$abc$109383$new_n31317_ i1=$abc$109383$new_n31348_ q=$abc$109383$new_n31489_
-.subckt oa22_x2 i0=$abc$109383$new_n31325_ i1=$abc$109383$new_n31318_ i2=$abc$109383$new_n31489_ q=$abc$109383$new_n31490_
-.subckt a2_x2 i0=$abc$109383$new_n31475_ i1=$abc$109383$new_n31490_ q=$abc$109383$new_n31491_
-.subckt oa22_x2 i0=$abc$109383$new_n31347_ i1=$abc$109383$new_n31476_ i2=$abc$109383$new_n31491_ q=$abc$109383$new_n31492_
-.subckt a2_x2 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31362_ q=$abc$109383$new_n31493_
-.subckt oa22_x2 i0=$abc$109383$new_n31236_ i1=$abc$109383$new_n31261_ i2=$abc$109383$new_n31493_ q=$abc$109383$new_n31494_
-.subckt a3_x2 i0=$abc$109383$new_n31494_ i1=$abc$109383$new_n31300_ i2=$abc$109383$new_n31232_ q=$abc$109383$new_n31495_
-.subckt a2_x2 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31353_ q=$abc$109383$new_n31496_
-.subckt a2_x2 i0=$abc$109383$new_n31473_ i1=$abc$109383$new_n31496_ q=$abc$109383$new_n31497_
-.subckt a2_x2 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31232_ q=$abc$109383$new_n31498_
-.subckt nxr2_x1 i0=$abc$109383$new_n31368_ i1=$abc$109383$new_n31498_ nq=$abc$109383$new_n31499_
-.subckt oa22_x2 i0=$abc$109383$new_n31499_ i1=$abc$109383$new_n31474_ i2=$abc$109383$new_n31497_ q=$abc$109383$new_n31500_
-.subckt a2_x2 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31376_ q=$abc$109383$new_n31501_
-.subckt a2_x2 i0=$abc$109383$new_n31258_ i1=$abc$109383$new_n31384_ q=$abc$109383$new_n31502_
+.subckt and2_x1 i0=$abc$109383$new_n31319_ i1=$abc$109383$new_n31203_ q=$abc$109383$new_n31485_
+.subckt or21nand_x1 i0=$abc$109383$new_n31198_ i1=$abc$109383$new_n31327_ i2=$abc$109383$new_n31485_ nq=$abc$109383$new_n31486_
+.subckt nexor2_x0 i0=$abc$109383$new_n31477_ i1=$abc$109383$new_n31486_ nq=$abc$109383$new_n31487_
+.subckt or21nand_x1 i0=$abc$109383$new_n31341_ i1=$abc$109383$new_n31487_ i2=$abc$109383$new_n31484_ nq=$abc$109383$new_n31488_
+.subckt and2_x1 i0=$abc$109383$new_n31317_ i1=$abc$109383$new_n31348_ q=$abc$109383$new_n31489_
+.subckt or21nand_x1 i0=$abc$109383$new_n31325_ i1=$abc$109383$new_n31318_ i2=$abc$109383$new_n31489_ nq=$abc$109383$new_n31490_
+.subckt and2_x1 i0=$abc$109383$new_n31475_ i1=$abc$109383$new_n31490_ q=$abc$109383$new_n31491_
+.subckt or21nand_x1 i0=$abc$109383$new_n31347_ i1=$abc$109383$new_n31476_ i2=$abc$109383$new_n31491_ nq=$abc$109383$new_n31492_
+.subckt and2_x1 i0=$abc$109383$new_n31260_ i1=$abc$109383$new_n31362_ q=$abc$109383$new_n31493_
+.subckt or21nand_x1 i0=$abc$109383$new_n31236_ i1=$abc$109383$new_n31261_ i2=$abc$109383$new_n31493_ nq=$abc$109383$new_n31494_
+.subckt and3_x1 i0=$abc$109383$new_n31494_ i1=$abc$109383$new_n31300_ i2=$abc$109383$new_n31232_ q=$abc$109383$new_n31495_
+.subckt and2_x1 i0=$abc$109383$new_n31316_ i1=$abc$109383$new_n31353_ q=$abc$109383$new_n31496_
+.subckt and2_x1 i0=$abc$109383$new_n31473_ i1=$abc$109383$new_n31496_ q=$abc$109383$new_n31497_
+.subckt and2_x1 i0=$abc$109383$new_n31300_ i1=$abc$109383$new_n31232_ q=$abc$109383$new_n31498_
+.subckt nexor2_x0 i0=$abc$109383$new_n31368_ i1=$abc$109383$new_n31498_ nq=$abc$109383$new_n31499_
+.subckt or21nand_x1 i0=$abc$109383$new_n31499_ i1=$abc$109383$new_n31474_ i2=$abc$109383$new_n31497_ nq=$abc$109383$new_n31500_
+.subckt and2_x1 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31376_ q=$abc$109383$new_n31501_
+.subckt and2_x1 i0=$abc$109383$new_n31258_ i1=$abc$109383$new_n31384_ q=$abc$109383$new_n31502_
 .subckt nand2_x0 i0=$abc$109383$new_n31387_ i1=$abc$109383$new_n31253_ nq=$abc$109383$new_n31503_
 .subckt nand2_x0 i0=$abc$109383$new_n29313_ i1=$abc$109383$new_n29646_ nq=$abc$109383$new_n31504_
-.subckt nxr2_x1 i0=$abc$109383$new_n31248_ i1=$abc$109383$new_n31504_ nq=$abc$109383$new_n31505_
-.subckt oa22_x2 i0=$abc$109383$new_n31505_ i1=$abc$109383$new_n31503_ i2=$abc$109383$new_n31502_ q=$abc$109383$new_n31506_
+.subckt nexor2_x0 i0=$abc$109383$new_n31248_ i1=$abc$109383$new_n31504_ nq=$abc$109383$new_n31505_
+.subckt or21nand_x1 i0=$abc$109383$new_n31505_ i1=$abc$109383$new_n31503_ i2=$abc$109383$new_n31502_ nq=$abc$109383$new_n31506_
 .subckt nand2_x0 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31506_ nq=$abc$109383$new_n31507_
-.subckt nxr2_x1 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31506_ nq=$abc$109383$new_n31508_
+.subckt nexor2_x0 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31506_ nq=$abc$109383$new_n31508_
 .subckt nand4_x0 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29373_ i2=$abc$109383$new_n29624_ i3=$abc$109383$new_n29599_ nq=$abc$109383$new_n31509_
-.subckt a2_x2 i0=$abc$109383$new_n31378_ i1=$abc$109383$new_n31246_ q=$abc$109383$new_n31510_
-.subckt ao22_x2 i0=$abc$109383$new_n31504_ i1=$abc$109383$new_n31510_ i2=$abc$109383$new_n31509_ q=$abc$109383$new_n31511_
-.subckt ao22_x2 i0=$abc$109383$new_n31511_ i1=$abc$109383$new_n31508_ i2=$abc$109383$new_n31507_ q=$abc$109383$new_n31512_
-.subckt nxr2_x1 i0=$abc$109383$new_n31512_ i1=$abc$109383$new_n31501_ nq=$abc$109383$new_n31513_
+.subckt and2_x1 i0=$abc$109383$new_n31378_ i1=$abc$109383$new_n31246_ q=$abc$109383$new_n31510_
+.subckt and21nor_x1 i0=$abc$109383$new_n31504_ i1=$abc$109383$new_n31510_ i2=$abc$109383$new_n31509_ nq=$abc$109383$new_n31511_
+.subckt and21nor_x1 i0=$abc$109383$new_n31511_ i1=$abc$109383$new_n31508_ i2=$abc$109383$new_n31507_ nq=$abc$109383$new_n31512_
+.subckt nexor2_x0 i0=$abc$109383$new_n31512_ i1=$abc$109383$new_n31501_ nq=$abc$109383$new_n31513_
 .subckt nand2_x0 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31373_ nq=$abc$109383$new_n31514_
-.subckt nxr2_x1 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31373_ nq=$abc$109383$new_n31515_
-.subckt ao22_x2 i0=$abc$109383$new_n31262_ i1=$abc$109383$new_n31515_ i2=$abc$109383$new_n31514_ q=$abc$109383$new_n31516_
-.subckt nxr2_x1 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31516_ nq=$abc$109383$new_n31517_
-.subckt a2_x2 i0=$abc$109383$new_n31472_ i1=$abc$109383$new_n31517_ q=$abc$109383$new_n31518_
-.subckt a2_x2 i0=$abc$109383$new_n31296_ i1=$abc$109383$new_n31408_ q=$abc$109383$new_n31519_
+.subckt nexor2_x0 i0=$abc$109383$new_n31298_ i1=$abc$109383$new_n31373_ nq=$abc$109383$new_n31515_
+.subckt and21nor_x1 i0=$abc$109383$new_n31262_ i1=$abc$109383$new_n31515_ i2=$abc$109383$new_n31514_ nq=$abc$109383$new_n31516_
+.subckt nexor2_x0 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31516_ nq=$abc$109383$new_n31517_
+.subckt and2_x1 i0=$abc$109383$new_n31472_ i1=$abc$109383$new_n31517_ q=$abc$109383$new_n31518_
+.subckt and2_x1 i0=$abc$109383$new_n31296_ i1=$abc$109383$new_n31408_ q=$abc$109383$new_n31519_
 .subckt nand2_x0 i0=$abc$109383$new_n31414_ i1=$abc$109383$new_n31281_ nq=$abc$109383$new_n31520_
-.subckt a2_x2 i0=$abc$109383$new_n31273_ i1=$abc$109383$new_n31151_ q=$abc$109383$new_n31521_
+.subckt and2_x1 i0=$abc$109383$new_n31273_ i1=$abc$109383$new_n31151_ q=$abc$109383$new_n31521_
 .subckt nand2_x0 i0=$abc$109383$new_n31155_ i1=$abc$109383$new_n31276_ nq=$abc$109383$new_n31522_
-.subckt oa22_x2 i0=$abc$109383$new_n31267_ i1=$abc$109383$new_n31522_ i2=$abc$109383$new_n31521_ q=$abc$109383$new_n31523_
-.subckt oa22_x2 i0=$abc$109383$new_n31523_ i1=$abc$109383$new_n31520_ i2=$abc$109383$new_n31519_ q=$abc$109383$new_n31524_
-.subckt a2_x2 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31524_ q=$abc$109383$new_n31525_
-.subckt nxr2_x1 i0=$abc$109383$new_n31406_ i1=$abc$109383$new_n31511_ nq=$abc$109383$new_n31526_
-.subckt oa22_x2 i0=$abc$109383$new_n31526_ i1=$abc$109383$new_n31449_ i2=$abc$109383$new_n31525_ q=$abc$109383$new_n31527_
-.subckt a4_x2 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29646_ i3=$abc$109383$new_n29623_ q=$abc$109383$new_n31528_
+.subckt or21nand_x1 i0=$abc$109383$new_n31267_ i1=$abc$109383$new_n31522_ i2=$abc$109383$new_n31521_ nq=$abc$109383$new_n31523_
+.subckt or21nand_x1 i0=$abc$109383$new_n31523_ i1=$abc$109383$new_n31520_ i2=$abc$109383$new_n31519_ nq=$abc$109383$new_n31524_
+.subckt and2_x1 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31524_ q=$abc$109383$new_n31525_
+.subckt nexor2_x0 i0=$abc$109383$new_n31406_ i1=$abc$109383$new_n31511_ nq=$abc$109383$new_n31526_
+.subckt or21nand_x1 i0=$abc$109383$new_n31526_ i1=$abc$109383$new_n31449_ i2=$abc$109383$new_n31525_ nq=$abc$109383$new_n31527_
+.subckt and4_x1 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29646_ i3=$abc$109383$new_n29623_ q=$abc$109383$new_n31528_
 .subckt nand2_x0 i0=$abc$109383$new_n29372_ i1=$abc$109383$new_n29646_ nq=$abc$109383$new_n31529_
 .subckt nand2_x0 i0=$abc$109383$new_n31529_ i1=$abc$109383$new_n31391_ nq=$abc$109383$new_n31530_
-.subckt oa22_x2 i0=$abc$109383$new_n31390_ i1=$abc$109383$new_n31530_ i2=$abc$109383$new_n31528_ q=$abc$109383$new_n31531_
-.subckt a4_x2 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29549_ i3=$abc$109383$new_n29524_ q=$abc$109383$new_n31532_
+.subckt or21nand_x1 i0=$abc$109383$new_n31390_ i1=$abc$109383$new_n31530_ i2=$abc$109383$new_n31528_ nq=$abc$109383$new_n31531_
+.subckt and4_x1 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29549_ i3=$abc$109383$new_n29524_ q=$abc$109383$new_n31532_
 .subckt nand2_x0 i0=$abc$109383$new_n31396_ i1=$abc$109383$new_n31255_ nq=$abc$109383$new_n31533_
-.subckt oa22_x2 i0=$abc$109383$new_n31386_ i1=$abc$109383$new_n31533_ i2=$abc$109383$new_n31532_ q=$abc$109383$new_n31534_
+.subckt or21nand_x1 i0=$abc$109383$new_n31386_ i1=$abc$109383$new_n31533_ i2=$abc$109383$new_n31532_ nq=$abc$109383$new_n31534_
 .subckt nand2_x0 i0=$abc$109383$new_n31403_ i1=$abc$109383$new_n31534_ nq=$abc$109383$new_n31535_
-.subckt a2_x2 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29598_ q=$abc$109383$new_n31536_
-.subckt nxr2_x1 i0=$abc$109383$new_n31402_ i1=$abc$109383$new_n31536_ nq=$abc$109383$new_n31537_
-.subckt a2_x2 i0=$abc$109383$new_n31537_ i1=$abc$109383$new_n31398_ q=$abc$109383$new_n31538_
-.subckt ao22_x2 i0=$abc$109383$new_n31394_ i1=$abc$109383$new_n31538_ i2=$abc$109383$new_n31535_ q=$abc$109383$new_n31539_
-.subckt a2_x2 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29677_ q=$abc$109383$new_n31540_
+.subckt and2_x1 i0=$abc$109383$new_n29242_ i1=$abc$109383$new_n29598_ q=$abc$109383$new_n31536_
+.subckt nexor2_x0 i0=$abc$109383$new_n31402_ i1=$abc$109383$new_n31536_ nq=$abc$109383$new_n31537_
+.subckt and2_x1 i0=$abc$109383$new_n31537_ i1=$abc$109383$new_n31398_ q=$abc$109383$new_n31538_
+.subckt and21nor_x1 i0=$abc$109383$new_n31394_ i1=$abc$109383$new_n31538_ i2=$abc$109383$new_n31535_ nq=$abc$109383$new_n31539_
+.subckt and2_x1 i0=$abc$109383$new_n29312_ i1=$abc$109383$new_n29677_ q=$abc$109383$new_n31540_
 .subckt nand2_x0 i0=$abc$109383$new_n29254_ i1=soc.cpu.minerva.payload__src1$44[14] nq=$abc$109383$new_n31541_
-.subckt a2_x2 i0=$abc$109383$new_n30313_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n31542_
-.subckt nxr2_x1 i0=$abc$109383$new_n31542_ i1=$abc$109383$new_n31541_ nq=$abc$109383$new_n31543_
-.subckt nxr2_x1 i0=$abc$109383$new_n31543_ i1=$abc$109383$new_n31540_ nq=$abc$109383$new_n31544_
+.subckt and2_x1 i0=$abc$109383$new_n30313_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n31542_
+.subckt nexor2_x0 i0=$abc$109383$new_n31542_ i1=$abc$109383$new_n31541_ nq=$abc$109383$new_n31543_
+.subckt nexor2_x0 i0=$abc$109383$new_n31543_ i1=$abc$109383$new_n31540_ nq=$abc$109383$new_n31544_
 .subckt nand4_x0 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29572_ i3=$abc$109383$new_n29548_ nq=$abc$109383$new_n31545_
 .subckt nand2_x0 i0=$abc$109383$new_n29228_ i1=$abc$109383$new_n29572_ nq=$abc$109383$new_n31546_
-.subckt a2_x2 i0=$abc$109383$new_n31546_ i1=$abc$109383$new_n31400_ q=$abc$109383$new_n31547_
-.subckt ao22_x2 i0=$abc$109383$new_n31399_ i1=$abc$109383$new_n31547_ i2=$abc$109383$new_n31545_ q=$abc$109383$new_n31548_
+.subckt and2_x1 i0=$abc$109383$new_n31546_ i1=$abc$109383$new_n31400_ q=$abc$109383$new_n31547_
+.subckt and21nor_x1 i0=$abc$109383$new_n31399_ i1=$abc$109383$new_n31547_ i2=$abc$109383$new_n31545_ nq=$abc$109383$new_n31548_
 .subckt nand2_x0 i0=$abc$109383$new_n29242_ i1=soc.cpu.minerva.payload__src1$44[13] nq=$abc$109383$new_n31549_
 .subckt nand2_x0 i0=$abc$109383$new_n31103_ i1=soc.cpu.minerva.payload__src1$44[11] nq=$abc$109383$new_n31550_
-.subckt a2_x2 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n31551_
-.subckt nxr2_x1 i0=$abc$109383$new_n31551_ i1=$abc$109383$new_n31550_ nq=$abc$109383$new_n31552_
-.subckt nxr2_x1 i0=$abc$109383$new_n31552_ i1=$abc$109383$new_n31549_ nq=$abc$109383$new_n31553_
-.subckt nxr2_x1 i0=$abc$109383$new_n31553_ i1=$abc$109383$new_n31548_ nq=$abc$109383$new_n31554_
-.subckt nxr2_x1 i0=$abc$109383$new_n31554_ i1=$abc$109383$new_n31544_ nq=$abc$109383$new_n31555_
-.subckt nxr2_x1 i0=$abc$109383$new_n31555_ i1=$abc$109383$new_n31539_ nq=$abc$109383$new_n31556_
-.subckt nxr2_x1 i0=$abc$109383$new_n31556_ i1=$abc$109383$new_n31531_ nq=$abc$109383$new_n31557_
-.subckt a2_x2 i0=$abc$109383$new_n31314_ i1=$abc$109383$new_n31441_ q=$abc$109383$new_n31558_
+.subckt and2_x1 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[12] q=$abc$109383$new_n31551_
+.subckt nexor2_x0 i0=$abc$109383$new_n31551_ i1=$abc$109383$new_n31550_ nq=$abc$109383$new_n31552_
+.subckt nexor2_x0 i0=$abc$109383$new_n31552_ i1=$abc$109383$new_n31549_ nq=$abc$109383$new_n31553_
+.subckt nexor2_x0 i0=$abc$109383$new_n31553_ i1=$abc$109383$new_n31548_ nq=$abc$109383$new_n31554_
+.subckt nexor2_x0 i0=$abc$109383$new_n31554_ i1=$abc$109383$new_n31544_ nq=$abc$109383$new_n31555_
+.subckt nexor2_x0 i0=$abc$109383$new_n31555_ i1=$abc$109383$new_n31539_ nq=$abc$109383$new_n31556_
+.subckt nexor2_x0 i0=$abc$109383$new_n31556_ i1=$abc$109383$new_n31531_ nq=$abc$109383$new_n31557_
+.subckt and2_x1 i0=$abc$109383$new_n31314_ i1=$abc$109383$new_n31441_ q=$abc$109383$new_n31558_
 .subckt nand2_x0 i0=$abc$109383$new_n31444_ i1=$abc$109383$new_n31309_ nq=$abc$109383$new_n31559_
-.subckt nxr2_x1 i0=$abc$109383$new_n31305_ i1=$abc$109383$new_n31437_ nq=$abc$109383$new_n31560_
-.subckt oa22_x2 i0=$abc$109383$new_n31560_ i1=$abc$109383$new_n31559_ i2=$abc$109383$new_n31558_ q=$abc$109383$new_n31561_
+.subckt nexor2_x0 i0=$abc$109383$new_n31305_ i1=$abc$109383$new_n31437_ nq=$abc$109383$new_n31560_
+.subckt or21nand_x1 i0=$abc$109383$new_n31560_ i1=$abc$109383$new_n31559_ i2=$abc$109383$new_n31558_ nq=$abc$109383$new_n31561_
 .subckt nand2_x0 i0=$abc$109383$new_n31561_ i1=$abc$109383$new_n31440_ nq=$abc$109383$new_n31562_
-.subckt a4_x2 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29346_ i3=$abc$109383$new_n29324_ q=$abc$109383$new_n31563_
+.subckt and4_x1 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29346_ i3=$abc$109383$new_n29324_ q=$abc$109383$new_n31563_
 .subckt nand2_x0 i0=$abc$109383$new_n31426_ i1=$abc$109383$new_n31287_ nq=$abc$109383$new_n31564_
-.subckt oa22_x2 i0=$abc$109383$new_n31421_ i1=$abc$109383$new_n31564_ i2=$abc$109383$new_n31563_ q=$abc$109383$new_n31565_
-.subckt nxr2_x1 i0=$abc$109383$new_n31439_ i1=$abc$109383$new_n31565_ nq=$abc$109383$new_n31566_
-.subckt a2_x2 i0=$abc$109383$new_n31446_ i1=$abc$109383$new_n31566_ q=$abc$109383$new_n31567_
-.subckt ao22_x2 i0=$abc$109383$new_n31424_ i1=$abc$109383$new_n31567_ i2=$abc$109383$new_n31562_ q=$abc$109383$new_n31568_
+.subckt or21nand_x1 i0=$abc$109383$new_n31421_ i1=$abc$109383$new_n31564_ i2=$abc$109383$new_n31563_ nq=$abc$109383$new_n31565_
+.subckt nexor2_x0 i0=$abc$109383$new_n31439_ i1=$abc$109383$new_n31565_ nq=$abc$109383$new_n31566_
+.subckt and2_x1 i0=$abc$109383$new_n31446_ i1=$abc$109383$new_n31566_ q=$abc$109383$new_n31567_
+.subckt and21nor_x1 i0=$abc$109383$new_n31424_ i1=$abc$109383$new_n31567_ i2=$abc$109383$new_n31562_ nq=$abc$109383$new_n31568_
 .subckt buf_x4 i=$abc$109383$new_n30797_ q=$abc$109383$new_n31569_
-.subckt a4_x2 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29267_ i3=$abc$109383$new_n29414_ q=$abc$109383$new_n31570_
+.subckt and4_x1 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29267_ i3=$abc$109383$new_n29414_ q=$abc$109383$new_n31570_
 .subckt nand2_x0 i0=$abc$109383$new_n31435_ i1=$abc$109383$new_n31303_ nq=$abc$109383$new_n31571_
-.subckt oa22_x2 i0=$abc$109383$new_n31302_ i1=$abc$109383$new_n31571_ i2=$abc$109383$new_n31570_ q=$abc$109383$new_n31572_
+.subckt or21nand_x1 i0=$abc$109383$new_n31302_ i1=$abc$109383$new_n31571_ i2=$abc$109383$new_n31570_ nq=$abc$109383$new_n31572_
 .subckt nand2_x0 i0=$abc$109383$new_n31572_ i1=$abc$109383$new_n31433_ nq=$abc$109383$new_n31573_
-.subckt a2_x2 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29524_ q=$abc$109383$new_n31574_
-.subckt nxr2_x1 i0=$abc$109383$new_n31432_ i1=$abc$109383$new_n31574_ nq=$abc$109383$new_n31575_
-.subckt a2_x2 i0=$abc$109383$new_n31438_ i1=$abc$109383$new_n31575_ q=$abc$109383$new_n31576_
-.subckt ao22_x2 i0=$abc$109383$new_n31428_ i1=$abc$109383$new_n31576_ i2=$abc$109383$new_n31573_ q=$abc$109383$new_n31577_
+.subckt and2_x1 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29524_ q=$abc$109383$new_n31574_
+.subckt nexor2_x0 i0=$abc$109383$new_n31432_ i1=$abc$109383$new_n31574_ nq=$abc$109383$new_n31575_
+.subckt and2_x1 i0=$abc$109383$new_n31438_ i1=$abc$109383$new_n31575_ q=$abc$109383$new_n31576_
+.subckt and21nor_x1 i0=$abc$109383$new_n31428_ i1=$abc$109383$new_n31576_ i2=$abc$109383$new_n31573_ nq=$abc$109383$new_n31577_
 .subckt nand4_x0 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29501_ i3=$abc$109383$new_n29346_ nq=$abc$109383$new_n31578_
 .subckt nand2_x0 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29501_ nq=$abc$109383$new_n31579_
-.subckt a2_x2 i0=$abc$109383$new_n31579_ i1=$abc$109383$new_n31430_ q=$abc$109383$new_n31580_
-.subckt ao22_x2 i0=$abc$109383$new_n31429_ i1=$abc$109383$new_n31580_ i2=$abc$109383$new_n31578_ q=$abc$109383$new_n31581_
+.subckt and2_x1 i0=$abc$109383$new_n31579_ i1=$abc$109383$new_n31430_ q=$abc$109383$new_n31580_
+.subckt and21nor_x1 i0=$abc$109383$new_n31429_ i1=$abc$109383$new_n31580_ i2=$abc$109383$new_n31578_ nq=$abc$109383$new_n31581_
 .subckt nand2_x0 i0=$abc$109383$new_n30458_ i1=$abc$109383$new_n29548_ nq=$abc$109383$new_n31582_
 .subckt nand2_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n29500_ nq=$abc$109383$new_n31583_
-.subckt a2_x2 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29523_ q=$abc$109383$new_n31584_
-.subckt nxr2_x1 i0=$abc$109383$new_n31584_ i1=$abc$109383$new_n31583_ nq=$abc$109383$new_n31585_
-.subckt nxr2_x1 i0=$abc$109383$new_n31585_ i1=$abc$109383$new_n31582_ nq=$abc$109383$new_n31586_
+.subckt and2_x1 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29523_ q=$abc$109383$new_n31584_
+.subckt nexor2_x0 i0=$abc$109383$new_n31584_ i1=$abc$109383$new_n31583_ nq=$abc$109383$new_n31585_
+.subckt nexor2_x0 i0=$abc$109383$new_n31585_ i1=$abc$109383$new_n31582_ nq=$abc$109383$new_n31586_
 .subckt nand4_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29290_ i3=$abc$109383$new_n29267_ nq=$abc$109383$new_n31587_
 .subckt nand2_x0 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29289_ nq=$abc$109383$new_n31588_
-.subckt a2_x2 i0=$abc$109383$new_n31588_ i1=$abc$109383$new_n31453_ q=$abc$109383$new_n31589_
-.subckt ao22_x2 i0=$abc$109383$new_n31452_ i1=$abc$109383$new_n31589_ i2=$abc$109383$new_n31587_ q=$abc$109383$new_n31590_
-.subckt nxr2_x1 i0=$abc$109383$new_n31590_ i1=$abc$109383$new_n31586_ nq=$abc$109383$new_n31591_
-.subckt nxr2_x1 i0=$abc$109383$new_n31591_ i1=$abc$109383$new_n31581_ nq=$abc$109383$new_n31592_
-.subckt a4_x2 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29443_ q=$abc$109383$new_n31593_
+.subckt and2_x1 i0=$abc$109383$new_n31588_ i1=$abc$109383$new_n31453_ q=$abc$109383$new_n31589_
+.subckt and21nor_x1 i0=$abc$109383$new_n31452_ i1=$abc$109383$new_n31589_ i2=$abc$109383$new_n31587_ nq=$abc$109383$new_n31590_
+.subckt nexor2_x0 i0=$abc$109383$new_n31590_ i1=$abc$109383$new_n31586_ nq=$abc$109383$new_n31591_
+.subckt nexor2_x0 i0=$abc$109383$new_n31591_ i1=$abc$109383$new_n31581_ nq=$abc$109383$new_n31592_
+.subckt and4_x1 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29469_ i3=$abc$109383$new_n29443_ q=$abc$109383$new_n31593_
 .subckt nand2_x0 i0=$abc$109383$new_n31459_ i1=$abc$109383$new_n31311_ nq=$abc$109383$new_n31594_
-.subckt oa22_x2 i0=$abc$109383$new_n31443_ i1=$abc$109383$new_n31594_ i2=$abc$109383$new_n31593_ q=$abc$109383$new_n31595_
+.subckt or21nand_x1 i0=$abc$109383$new_n31443_ i1=$abc$109383$new_n31594_ i2=$abc$109383$new_n31593_ nq=$abc$109383$new_n31595_
 .subckt nand2_x0 i0=$abc$109383$new_n31466_ i1=$abc$109383$new_n31595_ nq=$abc$109383$new_n31596_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29413_ q=$abc$109383$new_n31597_
-.subckt nxr2_x1 i0=$abc$109383$new_n31465_ i1=$abc$109383$new_n31597_ nq=$abc$109383$new_n31598_
-.subckt a2_x2 i0=$abc$109383$new_n31598_ i1=$abc$109383$new_n31461_ q=$abc$109383$new_n31599_
-.subckt a2_x2 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29323_ q=$abc$109383$new_n31600_
-.subckt nxr2_x1 i0=$abc$109383$new_n31455_ i1=$abc$109383$new_n31600_ nq=$abc$109383$new_n31601_
-.subckt ao22_x2 i0=$abc$109383$new_n31601_ i1=$abc$109383$new_n31599_ i2=$abc$109383$new_n31596_ q=$abc$109383$new_n31602_
-.subckt nxr2_x1 i0=$abc$109383$new_n31602_ i1=$abc$109383$new_n31592_ nq=$abc$109383$new_n31603_
-.subckt nxr2_x1 i0=$abc$109383$new_n31603_ i1=$abc$109383$new_n31577_ nq=$abc$109383$new_n31604_
-.subckt nxr2_x1 i0=$abc$109383$new_n31604_ i1=$abc$109383$new_n31568_ nq=$abc$109383$new_n31605_
-.subckt nxr2_x1 i0=$abc$109383$new_n31605_ i1=$abc$109383$new_n31557_ nq=$abc$109383$new_n31606_
-.subckt nxr2_x1 i0=$abc$109383$new_n31606_ i1=$abc$109383$new_n31527_ nq=$abc$109383$new_n31607_
-.subckt nxr2_x1 i0=$abc$109383$new_n31467_ i1=$abc$109383$new_n31601_ nq=$abc$109383$new_n31608_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29413_ q=$abc$109383$new_n31597_
+.subckt nexor2_x0 i0=$abc$109383$new_n31465_ i1=$abc$109383$new_n31597_ nq=$abc$109383$new_n31598_
+.subckt and2_x1 i0=$abc$109383$new_n31598_ i1=$abc$109383$new_n31461_ q=$abc$109383$new_n31599_
+.subckt and2_x1 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29323_ q=$abc$109383$new_n31600_
+.subckt nexor2_x0 i0=$abc$109383$new_n31455_ i1=$abc$109383$new_n31600_ nq=$abc$109383$new_n31601_
+.subckt and21nor_x1 i0=$abc$109383$new_n31601_ i1=$abc$109383$new_n31599_ i2=$abc$109383$new_n31596_ nq=$abc$109383$new_n31602_
+.subckt nexor2_x0 i0=$abc$109383$new_n31602_ i1=$abc$109383$new_n31592_ nq=$abc$109383$new_n31603_
+.subckt nexor2_x0 i0=$abc$109383$new_n31603_ i1=$abc$109383$new_n31577_ nq=$abc$109383$new_n31604_
+.subckt nexor2_x0 i0=$abc$109383$new_n31604_ i1=$abc$109383$new_n31568_ nq=$abc$109383$new_n31605_
+.subckt nexor2_x0 i0=$abc$109383$new_n31605_ i1=$abc$109383$new_n31557_ nq=$abc$109383$new_n31606_
+.subckt nexor2_x0 i0=$abc$109383$new_n31606_ i1=$abc$109383$new_n31527_ nq=$abc$109383$new_n31607_
+.subckt nexor2_x0 i0=$abc$109383$new_n31467_ i1=$abc$109383$new_n31601_ nq=$abc$109383$new_n31608_
 .subckt nand2_x0 i0=$abc$109383$new_n31471_ i1=$abc$109383$new_n31608_ nq=$abc$109383$new_n31609_
 .subckt nand2_x0 i0=$abc$109383$new_n30703_ i1=$abc$109383$new_n29345_ nq=$abc$109383$new_n31610_
 .subckt nand2_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n29289_ nq=$abc$109383$new_n31611_
-.subckt a2_x2 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29323_ q=$abc$109383$new_n31612_
-.subckt nxr2_x1 i0=$abc$109383$new_n31612_ i1=$abc$109383$new_n31611_ nq=$abc$109383$new_n31613_
-.subckt nxr2_x1 i0=$abc$109383$new_n31613_ i1=$abc$109383$new_n31610_ nq=$abc$109383$new_n31614_
+.subckt and2_x1 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29323_ q=$abc$109383$new_n31612_
+.subckt nexor2_x0 i0=$abc$109383$new_n31612_ i1=$abc$109383$new_n31611_ nq=$abc$109383$new_n31613_
+.subckt nexor2_x0 i0=$abc$109383$new_n31613_ i1=$abc$109383$new_n31610_ nq=$abc$109383$new_n31614_
 .subckt nand4_x0 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n30317_ i3=$abc$109383$new_n29444_ nq=$abc$109383$new_n31615_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n30317_ nq=$abc$109383$new_n31616_
-.subckt a2_x2 i0=$abc$109383$new_n31616_ i1=$abc$109383$new_n31463_ q=$abc$109383$new_n31617_
-.subckt ao22_x2 i0=$abc$109383$new_n31462_ i1=$abc$109383$new_n31617_ i2=$abc$109383$new_n31615_ q=$abc$109383$new_n31618_
+.subckt and2_x1 i0=$abc$109383$new_n31616_ i1=$abc$109383$new_n31463_ q=$abc$109383$new_n31617_
+.subckt and21nor_x1 i0=$abc$109383$new_n31462_ i1=$abc$109383$new_n31617_ i2=$abc$109383$new_n31615_ nq=$abc$109383$new_n31618_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29267_ nq=$abc$109383$new_n31619_
 .subckt nand2_x0 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n29388_ nq=$abc$109383$new_n31620_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29412_ q=$abc$109383$new_n31621_
-.subckt nxr2_x1 i0=$abc$109383$new_n31621_ i1=$abc$109383$new_n31620_ nq=$abc$109383$new_n31622_
-.subckt nxr2_x1 i0=$abc$109383$new_n31622_ i1=$abc$109383$new_n31619_ nq=$abc$109383$new_n31623_
-.subckt nxr2_x1 i0=$abc$109383$new_n31623_ i1=$abc$109383$new_n31618_ nq=$abc$109383$new_n31624_
-.subckt nxr2_x1 i0=$abc$109383$new_n31624_ i1=$abc$109383$new_n31614_ nq=$abc$109383$new_n31625_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29412_ q=$abc$109383$new_n31621_
+.subckt nexor2_x0 i0=$abc$109383$new_n31621_ i1=$abc$109383$new_n31620_ nq=$abc$109383$new_n31622_
+.subckt nexor2_x0 i0=$abc$109383$new_n31622_ i1=$abc$109383$new_n31619_ nq=$abc$109383$new_n31623_
+.subckt nexor2_x0 i0=$abc$109383$new_n31623_ i1=$abc$109383$new_n31618_ nq=$abc$109383$new_n31624_
+.subckt nexor2_x0 i0=$abc$109383$new_n31624_ i1=$abc$109383$new_n31614_ nq=$abc$109383$new_n31625_
 .subckt nand2_x0 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29445_ nq=$abc$109383$new_n31626_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[16] q=$abc$109383$new_n31627_
 .subckt buf_x4 i=$abc$109383$new_n31627_ q=$abc$109383$new_n31628_
-.subckt a2_x2 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29471_ q=$abc$109383$new_n31629_
-.subckt nxr2_x1 i0=$abc$109383$new_n31629_ i1=$abc$109383$new_n31626_ nq=$abc$109383$new_n31630_
-.subckt nxr2_x1 i0=$abc$109383$new_n31630_ i1=$abc$109383$new_n31625_ nq=$abc$109383$new_n31631_
-.subckt nxr2_x1 i0=$abc$109383$new_n31631_ i1=$abc$109383$new_n31609_ nq=$abc$109383$new_n31632_
-.subckt nxr2_x1 i0=$abc$109383$new_n31632_ i1=$abc$109383$new_n31607_ nq=$abc$109383$new_n31633_
+.subckt and2_x1 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29471_ q=$abc$109383$new_n31629_
+.subckt nexor2_x0 i0=$abc$109383$new_n31629_ i1=$abc$109383$new_n31626_ nq=$abc$109383$new_n31630_
+.subckt nexor2_x0 i0=$abc$109383$new_n31630_ i1=$abc$109383$new_n31625_ nq=$abc$109383$new_n31631_
+.subckt nexor2_x0 i0=$abc$109383$new_n31631_ i1=$abc$109383$new_n31609_ nq=$abc$109383$new_n31632_
+.subckt nexor2_x0 i0=$abc$109383$new_n31632_ i1=$abc$109383$new_n31607_ nq=$abc$109383$new_n31633_
 .subckt nand2_x0 i0=$abc$109383$new_n31633_ i1=$abc$109383$new_n31518_ nq=$abc$109383$new_n31634_
 .subckt nand2_x0 i0=$abc$109383$new_n31472_ i1=$abc$109383$new_n31517_ nq=$abc$109383$new_n31635_
 .subckt nand2_x0 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31524_ nq=$abc$109383$new_n31636_
-.subckt nxr2_x1 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31524_ nq=$abc$109383$new_n31637_
-.subckt ao22_x2 i0=$abc$109383$new_n31407_ i1=$abc$109383$new_n31637_ i2=$abc$109383$new_n31636_ q=$abc$109383$new_n31638_
-.subckt nxr2_x1 i0=$abc$109383$new_n31606_ i1=$abc$109383$new_n31638_ nq=$abc$109383$new_n31639_
-.subckt nxr2_x1 i0=$abc$109383$new_n31632_ i1=$abc$109383$new_n31639_ nq=$abc$109383$new_n31640_
+.subckt nexor2_x0 i0=$abc$109383$new_n31448_ i1=$abc$109383$new_n31524_ nq=$abc$109383$new_n31637_
+.subckt and21nor_x1 i0=$abc$109383$new_n31407_ i1=$abc$109383$new_n31637_ i2=$abc$109383$new_n31636_ nq=$abc$109383$new_n31638_
+.subckt nexor2_x0 i0=$abc$109383$new_n31606_ i1=$abc$109383$new_n31638_ nq=$abc$109383$new_n31639_
+.subckt nexor2_x0 i0=$abc$109383$new_n31632_ i1=$abc$109383$new_n31639_ nq=$abc$109383$new_n31640_
 .subckt nand2_x0 i0=$abc$109383$new_n31640_ i1=$abc$109383$new_n31635_ nq=$abc$109383$new_n31641_
 .subckt nand3_x0 i0=$abc$109383$new_n31641_ i1=$abc$109383$new_n31634_ i2=$abc$109383$new_n31513_ nq=$abc$109383$new_n31642_
-.subckt oa22_x2 i0=$abc$109383$new_n31641_ i1=$abc$109383$new_n31634_ i2=$abc$109383$new_n31513_ q=$abc$109383$new_n31643_
+.subckt or21nand_x1 i0=$abc$109383$new_n31641_ i1=$abc$109383$new_n31634_ i2=$abc$109383$new_n31513_ nq=$abc$109383$new_n31643_
 .subckt nand3_x0 i0=$abc$109383$new_n31643_ i1=$abc$109383$new_n31642_ i2=$abc$109383$new_n31500_ nq=$abc$109383$new_n31644_
-.subckt oa22_x2 i0=$abc$109383$new_n31643_ i1=$abc$109383$new_n31642_ i2=$abc$109383$new_n31500_ q=$abc$109383$new_n31645_
+.subckt or21nand_x1 i0=$abc$109383$new_n31643_ i1=$abc$109383$new_n31642_ i2=$abc$109383$new_n31500_ nq=$abc$109383$new_n31645_
 .subckt nand3_x0 i0=$abc$109383$new_n31645_ i1=$abc$109383$new_n31644_ i2=$abc$109383$new_n31495_ nq=$abc$109383$new_n31646_
-.subckt oa22_x2 i0=$abc$109383$new_n31645_ i1=$abc$109383$new_n31644_ i2=$abc$109383$new_n31495_ q=$abc$109383$new_n31647_
+.subckt or21nand_x1 i0=$abc$109383$new_n31645_ i1=$abc$109383$new_n31644_ i2=$abc$109383$new_n31495_ nq=$abc$109383$new_n31647_
 .subckt nand3_x0 i0=$abc$109383$new_n31647_ i1=$abc$109383$new_n31646_ i2=$abc$109383$new_n31492_ nq=$abc$109383$new_n31648_
-.subckt oa22_x2 i0=$abc$109383$new_n31647_ i1=$abc$109383$new_n31646_ i2=$abc$109383$new_n31492_ q=$abc$109383$new_n31649_
+.subckt or21nand_x1 i0=$abc$109383$new_n31647_ i1=$abc$109383$new_n31646_ i2=$abc$109383$new_n31492_ nq=$abc$109383$new_n31649_
 .subckt nand2_x0 i0=$abc$109383$new_n31649_ i1=$abc$109383$new_n31648_ nq=$abc$109383$new_n31650_
-.subckt nxr2_x1 i0=$abc$109383$new_n31650_ i1=$abc$109383$new_n31488_ nq=$abc$109383$new_n31651_
-.subckt ao22_x2 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31651_ i2=$abc$109383$new_n31483_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102822
-.subckt a3_x2 i0=$abc$109383$new_n31647_ i1=$abc$109383$new_n31646_ i2=$abc$109383$new_n31492_ q=$abc$109383$new_n31653_
-.subckt a2_x2 i0=$abc$109383$new_n31649_ i1=$abc$109383$new_n31648_ q=$abc$109383$new_n31654_
-.subckt oa22_x2 i0=$abc$109383$new_n31488_ i1=$abc$109383$new_n31654_ i2=$abc$109383$new_n31653_ q=$abc$109383$new_n31655_
-.subckt a3_x2 i0=$abc$109383$new_n31643_ i1=$abc$109383$new_n31642_ i2=$abc$109383$new_n31500_ q=$abc$109383$new_n31656_
-.subckt oa22_x2 i0=$abc$109383$new_n31495_ i1=$abc$109383$new_n31645_ i2=$abc$109383$new_n31656_ q=$abc$109383$new_n31657_
-.subckt a2_x2 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31506_ q=$abc$109383$new_n31658_
-.subckt oa22_x2 i0=$abc$109383$new_n31380_ i1=$abc$109383$new_n31406_ i2=$abc$109383$new_n31658_ q=$abc$109383$new_n31659_
+.subckt nexor2_x0 i0=$abc$109383$new_n31650_ i1=$abc$109383$new_n31488_ nq=$abc$109383$new_n31651_
+.subckt and21nor_x1 i0=$abc$109383$new_n30475_ i1=$abc$109383$new_n31651_ i2=$abc$109383$new_n31483_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102822
+.subckt and3_x1 i0=$abc$109383$new_n31647_ i1=$abc$109383$new_n31646_ i2=$abc$109383$new_n31492_ q=$abc$109383$new_n31653_
+.subckt and2_x1 i0=$abc$109383$new_n31649_ i1=$abc$109383$new_n31648_ q=$abc$109383$new_n31654_
+.subckt or21nand_x1 i0=$abc$109383$new_n31488_ i1=$abc$109383$new_n31654_ i2=$abc$109383$new_n31653_ nq=$abc$109383$new_n31655_
+.subckt and3_x1 i0=$abc$109383$new_n31643_ i1=$abc$109383$new_n31642_ i2=$abc$109383$new_n31500_ q=$abc$109383$new_n31656_
+.subckt or21nand_x1 i0=$abc$109383$new_n31495_ i1=$abc$109383$new_n31645_ i2=$abc$109383$new_n31656_ nq=$abc$109383$new_n31657_
+.subckt and2_x1 i0=$abc$109383$new_n31405_ i1=$abc$109383$new_n31506_ q=$abc$109383$new_n31658_
+.subckt or21nand_x1 i0=$abc$109383$new_n31380_ i1=$abc$109383$new_n31406_ i2=$abc$109383$new_n31658_ nq=$abc$109383$new_n31659_
 .subckt nand3_x0 i0=$abc$109383$new_n31659_ i1=$abc$109383$new_n31450_ i2=$abc$109383$new_n31376_ nq=$abc$109383$new_n31660_
-.subckt a2_x2 i0=$abc$109383$new_n31640_ i1=$abc$109383$new_n31635_ q=$abc$109383$new_n31661_
+.subckt and2_x1 i0=$abc$109383$new_n31640_ i1=$abc$109383$new_n31635_ q=$abc$109383$new_n31661_
 .subckt nand2_x0 i0=$abc$109383$new_n31450_ i1=$abc$109383$new_n31376_ nq=$abc$109383$new_n31662_
-.subckt nxr2_x1 i0=$abc$109383$new_n31512_ i1=$abc$109383$new_n31662_ nq=$abc$109383$new_n31663_
-.subckt ao22_x2 i0=$abc$109383$new_n31663_ i1=$abc$109383$new_n31661_ i2=$abc$109383$new_n31634_ q=$abc$109383$new_n31664_
+.subckt nexor2_x0 i0=$abc$109383$new_n31512_ i1=$abc$109383$new_n31662_ nq=$abc$109383$new_n31663_
+.subckt and21nor_x1 i0=$abc$109383$new_n31663_ i1=$abc$109383$new_n31661_ i2=$abc$109383$new_n31634_ nq=$abc$109383$new_n31664_
 .subckt nand2_x0 i0=$abc$109383$new_n31606_ i1=$abc$109383$new_n31527_ nq=$abc$109383$new_n31665_
-.subckt a2_x2 i0=$abc$109383$new_n31403_ i1=$abc$109383$new_n31534_ q=$abc$109383$new_n31666_
+.subckt and2_x1 i0=$abc$109383$new_n31403_ i1=$abc$109383$new_n31534_ q=$abc$109383$new_n31666_
 .subckt nand2_x0 i0=$abc$109383$new_n31537_ i1=$abc$109383$new_n31398_ nq=$abc$109383$new_n31667_
 .subckt nand2_x0 i0=$abc$109383$new_n29314_ i1=$abc$109383$new_n29666_ nq=$abc$109383$new_n31668_
-.subckt nxr2_x1 i0=$abc$109383$new_n31393_ i1=$abc$109383$new_n31668_ nq=$abc$109383$new_n31669_
-.subckt oa22_x2 i0=$abc$109383$new_n31669_ i1=$abc$109383$new_n31667_ i2=$abc$109383$new_n31666_ q=$abc$109383$new_n31670_
+.subckt nexor2_x0 i0=$abc$109383$new_n31393_ i1=$abc$109383$new_n31668_ nq=$abc$109383$new_n31669_
+.subckt or21nand_x1 i0=$abc$109383$new_n31669_ i1=$abc$109383$new_n31667_ i2=$abc$109383$new_n31666_ nq=$abc$109383$new_n31670_
 .subckt nand2_x0 i0=$abc$109383$new_n31555_ i1=$abc$109383$new_n31670_ nq=$abc$109383$new_n31671_
-.subckt nxr2_x1 i0=$abc$109383$new_n31555_ i1=$abc$109383$new_n31670_ nq=$abc$109383$new_n31672_
+.subckt nexor2_x0 i0=$abc$109383$new_n31555_ i1=$abc$109383$new_n31670_ nq=$abc$109383$new_n31672_
 .subckt nand4_x0 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29373_ i2=$abc$109383$new_n29647_ i3=$abc$109383$new_n29624_ nq=$abc$109383$new_n31673_
-.subckt a2_x2 i0=$abc$109383$new_n31529_ i1=$abc$109383$new_n31391_ q=$abc$109383$new_n31674_
-.subckt ao22_x2 i0=$abc$109383$new_n31668_ i1=$abc$109383$new_n31674_ i2=$abc$109383$new_n31673_ q=$abc$109383$new_n31675_
-.subckt ao22_x2 i0=$abc$109383$new_n31675_ i1=$abc$109383$new_n31672_ i2=$abc$109383$new_n31671_ q=$abc$109383$new_n31676_
-.subckt nxr2_x1 i0=$abc$109383$new_n31676_ i1=$abc$109383$new_n31665_ nq=$abc$109383$new_n31677_
+.subckt and2_x1 i0=$abc$109383$new_n31529_ i1=$abc$109383$new_n31391_ q=$abc$109383$new_n31674_
+.subckt and21nor_x1 i0=$abc$109383$new_n31668_ i1=$abc$109383$new_n31674_ i2=$abc$109383$new_n31673_ nq=$abc$109383$new_n31675_
+.subckt and21nor_x1 i0=$abc$109383$new_n31675_ i1=$abc$109383$new_n31672_ i2=$abc$109383$new_n31671_ nq=$abc$109383$new_n31676_
+.subckt nexor2_x0 i0=$abc$109383$new_n31676_ i1=$abc$109383$new_n31665_ nq=$abc$109383$new_n31677_
 .subckt nand2_x0 i0=$abc$109383$new_n31632_ i1=$abc$109383$new_n31639_ nq=$abc$109383$new_n31678_
-.subckt a2_x2 i0=$abc$109383$new_n31561_ i1=$abc$109383$new_n31440_ q=$abc$109383$new_n31679_
+.subckt and2_x1 i0=$abc$109383$new_n31561_ i1=$abc$109383$new_n31440_ q=$abc$109383$new_n31679_
 .subckt nand2_x0 i0=$abc$109383$new_n31446_ i1=$abc$109383$new_n31566_ nq=$abc$109383$new_n31680_
-.subckt a2_x2 i0=$abc$109383$new_n31419_ i1=$abc$109383$new_n31290_ q=$abc$109383$new_n31681_
+.subckt and2_x1 i0=$abc$109383$new_n31419_ i1=$abc$109383$new_n31290_ q=$abc$109383$new_n31681_
 .subckt nand2_x0 i0=$abc$109383$new_n31294_ i1=$abc$109383$new_n31422_ nq=$abc$109383$new_n31682_
-.subckt oa22_x2 i0=$abc$109383$new_n31413_ i1=$abc$109383$new_n31682_ i2=$abc$109383$new_n31681_ q=$abc$109383$new_n31683_
-.subckt oa22_x2 i0=$abc$109383$new_n31683_ i1=$abc$109383$new_n31680_ i2=$abc$109383$new_n31679_ q=$abc$109383$new_n31684_
-.subckt a2_x2 i0=$abc$109383$new_n31604_ i1=$abc$109383$new_n31684_ q=$abc$109383$new_n31685_
-.subckt nxr2_x1 i0=$abc$109383$new_n31556_ i1=$abc$109383$new_n31675_ nq=$abc$109383$new_n31686_
-.subckt oa22_x2 i0=$abc$109383$new_n31686_ i1=$abc$109383$new_n31605_ i2=$abc$109383$new_n31685_ q=$abc$109383$new_n31687_
-.subckt a2_x2 i0=$abc$109383$new_n31471_ i1=$abc$109383$new_n31608_ q=$abc$109383$new_n31688_
+.subckt or21nand_x1 i0=$abc$109383$new_n31413_ i1=$abc$109383$new_n31682_ i2=$abc$109383$new_n31681_ nq=$abc$109383$new_n31683_
+.subckt or21nand_x1 i0=$abc$109383$new_n31683_ i1=$abc$109383$new_n31680_ i2=$abc$109383$new_n31679_ nq=$abc$109383$new_n31684_
+.subckt and2_x1 i0=$abc$109383$new_n31604_ i1=$abc$109383$new_n31684_ q=$abc$109383$new_n31685_
+.subckt nexor2_x0 i0=$abc$109383$new_n31556_ i1=$abc$109383$new_n31675_ nq=$abc$109383$new_n31686_
+.subckt or21nand_x1 i0=$abc$109383$new_n31686_ i1=$abc$109383$new_n31605_ i2=$abc$109383$new_n31685_ nq=$abc$109383$new_n31687_
+.subckt and2_x1 i0=$abc$109383$new_n31471_ i1=$abc$109383$new_n31608_ q=$abc$109383$new_n31688_
 .subckt nand2_x0 i0=$abc$109383$new_n31631_ i1=$abc$109383$new_n31688_ nq=$abc$109383$new_n31689_
-.subckt a4_x2 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29666_ i3=$abc$109383$new_n29646_ q=$abc$109383$new_n31690_
+.subckt and4_x1 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29666_ i3=$abc$109383$new_n29646_ q=$abc$109383$new_n31690_
 .subckt nand2_x0 i0=$abc$109383$new_n29373_ i1=$abc$109383$new_n29666_ nq=$abc$109383$new_n31691_
 .subckt nand2_x0 i0=$abc$109383$new_n31691_ i1=$abc$109383$new_n31541_ nq=$abc$109383$new_n31692_
-.subckt oa22_x2 i0=$abc$109383$new_n31540_ i1=$abc$109383$new_n31692_ i2=$abc$109383$new_n31690_ q=$abc$109383$new_n31693_
-.subckt a4_x2 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29573_ i3=$abc$109383$new_n29549_ q=$abc$109383$new_n31694_
+.subckt or21nand_x1 i0=$abc$109383$new_n31540_ i1=$abc$109383$new_n31692_ i2=$abc$109383$new_n31690_ nq=$abc$109383$new_n31693_
+.subckt and4_x1 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29573_ i3=$abc$109383$new_n29549_ q=$abc$109383$new_n31694_
 .subckt nand2_x0 i0=$abc$109383$new_n31546_ i1=$abc$109383$new_n31400_ nq=$abc$109383$new_n31695_
-.subckt oa22_x2 i0=$abc$109383$new_n31536_ i1=$abc$109383$new_n31695_ i2=$abc$109383$new_n31694_ q=$abc$109383$new_n31696_
+.subckt or21nand_x1 i0=$abc$109383$new_n31536_ i1=$abc$109383$new_n31695_ i2=$abc$109383$new_n31694_ nq=$abc$109383$new_n31696_
 .subckt nand2_x0 i0=$abc$109383$new_n31553_ i1=$abc$109383$new_n31696_ nq=$abc$109383$new_n31697_
-.subckt a2_x2 i0=$abc$109383$new_n29242_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31698_
-.subckt nxr2_x1 i0=$abc$109383$new_n31552_ i1=$abc$109383$new_n31698_ nq=$abc$109383$new_n31699_
-.subckt a2_x2 i0=$abc$109383$new_n31699_ i1=$abc$109383$new_n31548_ q=$abc$109383$new_n31700_
-.subckt ao22_x2 i0=$abc$109383$new_n31544_ i1=$abc$109383$new_n31700_ i2=$abc$109383$new_n31697_ q=$abc$109383$new_n31701_
-.subckt a2_x2 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[17] q=$abc$109383$new_n31702_
+.subckt and2_x1 i0=$abc$109383$new_n29242_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31698_
+.subckt nexor2_x0 i0=$abc$109383$new_n31552_ i1=$abc$109383$new_n31698_ nq=$abc$109383$new_n31699_
+.subckt and2_x1 i0=$abc$109383$new_n31699_ i1=$abc$109383$new_n31548_ q=$abc$109383$new_n31700_
+.subckt and21nor_x1 i0=$abc$109383$new_n31544_ i1=$abc$109383$new_n31700_ i2=$abc$109383$new_n31697_ nq=$abc$109383$new_n31701_
+.subckt and2_x1 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[17] q=$abc$109383$new_n31702_
 .subckt nand2_x0 i0=$abc$109383$new_n29254_ i1=soc.cpu.minerva.payload__src1$44[15] nq=$abc$109383$new_n31703_
-.subckt a2_x2 i0=$abc$109383$new_n29371_ i1=soc.cpu.minerva.payload__src1$44[16] q=$abc$109383$new_n31704_
-.subckt nxr2_x1 i0=$abc$109383$new_n31704_ i1=$abc$109383$new_n31703_ nq=$abc$109383$new_n31705_
-.subckt nxr2_x1 i0=$abc$109383$new_n31705_ i1=$abc$109383$new_n31702_ nq=$abc$109383$new_n31706_
+.subckt and2_x1 i0=$abc$109383$new_n29371_ i1=soc.cpu.minerva.payload__src1$44[16] q=$abc$109383$new_n31704_
+.subckt nexor2_x0 i0=$abc$109383$new_n31704_ i1=$abc$109383$new_n31703_ nq=$abc$109383$new_n31705_
+.subckt nexor2_x0 i0=$abc$109383$new_n31705_ i1=$abc$109383$new_n31702_ nq=$abc$109383$new_n31706_
 .subckt nand4_x0 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=$abc$109383$new_n29598_ i3=$abc$109383$new_n29572_ nq=$abc$109383$new_n31707_
 .subckt nand2_x0 i0=$abc$109383$new_n29229_ i1=$abc$109383$new_n29598_ nq=$abc$109383$new_n31708_
-.subckt a2_x2 i0=$abc$109383$new_n31708_ i1=$abc$109383$new_n31550_ q=$abc$109383$new_n31709_
-.subckt ao22_x2 i0=$abc$109383$new_n31549_ i1=$abc$109383$new_n31709_ i2=$abc$109383$new_n31707_ q=$abc$109383$new_n31710_
+.subckt and2_x1 i0=$abc$109383$new_n31708_ i1=$abc$109383$new_n31550_ q=$abc$109383$new_n31709_
+.subckt and21nor_x1 i0=$abc$109383$new_n31549_ i1=$abc$109383$new_n31709_ i2=$abc$109383$new_n31707_ nq=$abc$109383$new_n31710_
 .subckt nand2_x0 i0=$abc$109383$new_n29242_ i1=soc.cpu.minerva.payload__src1$44[14] nq=$abc$109383$new_n31711_
 .subckt nand2_x0 i0=$abc$109383$new_n31103_ i1=soc.cpu.minerva.payload__src1$44[12] nq=$abc$109383$new_n31712_
-.subckt a2_x2 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31713_
-.subckt nxr2_x1 i0=$abc$109383$new_n31713_ i1=$abc$109383$new_n31712_ nq=$abc$109383$new_n31714_
-.subckt nxr2_x1 i0=$abc$109383$new_n31714_ i1=$abc$109383$new_n31711_ nq=$abc$109383$new_n31715_
-.subckt nxr2_x1 i0=$abc$109383$new_n31715_ i1=$abc$109383$new_n31710_ nq=$abc$109383$new_n31716_
-.subckt nxr2_x1 i0=$abc$109383$new_n31716_ i1=$abc$109383$new_n31706_ nq=$abc$109383$new_n31717_
-.subckt nxr2_x1 i0=$abc$109383$new_n31717_ i1=$abc$109383$new_n31701_ nq=$abc$109383$new_n31718_
-.subckt nxr2_x1 i0=$abc$109383$new_n31718_ i1=$abc$109383$new_n31693_ nq=$abc$109383$new_n31719_
-.subckt a2_x2 i0=$abc$109383$new_n31466_ i1=$abc$109383$new_n31595_ q=$abc$109383$new_n31720_
+.subckt and2_x1 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[13] q=$abc$109383$new_n31713_
+.subckt nexor2_x0 i0=$abc$109383$new_n31713_ i1=$abc$109383$new_n31712_ nq=$abc$109383$new_n31714_
+.subckt nexor2_x0 i0=$abc$109383$new_n31714_ i1=$abc$109383$new_n31711_ nq=$abc$109383$new_n31715_
+.subckt nexor2_x0 i0=$abc$109383$new_n31715_ i1=$abc$109383$new_n31710_ nq=$abc$109383$new_n31716_
+.subckt nexor2_x0 i0=$abc$109383$new_n31716_ i1=$abc$109383$new_n31706_ nq=$abc$109383$new_n31717_
+.subckt nexor2_x0 i0=$abc$109383$new_n31717_ i1=$abc$109383$new_n31701_ nq=$abc$109383$new_n31718_
+.subckt nexor2_x0 i0=$abc$109383$new_n31718_ i1=$abc$109383$new_n31693_ nq=$abc$109383$new_n31719_
+.subckt and2_x1 i0=$abc$109383$new_n31466_ i1=$abc$109383$new_n31595_ q=$abc$109383$new_n31720_
 .subckt nand2_x0 i0=$abc$109383$new_n31598_ i1=$abc$109383$new_n31461_ nq=$abc$109383$new_n31721_
-.subckt oa22_x2 i0=$abc$109383$new_n31456_ i1=$abc$109383$new_n31721_ i2=$abc$109383$new_n31720_ q=$abc$109383$new_n31722_
+.subckt or21nand_x1 i0=$abc$109383$new_n31456_ i1=$abc$109383$new_n31721_ i2=$abc$109383$new_n31720_ nq=$abc$109383$new_n31722_
 .subckt nand2_x0 i0=$abc$109383$new_n31722_ i1=$abc$109383$new_n31592_ nq=$abc$109383$new_n31723_
-.subckt a4_x2 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29502_ i3=$abc$109383$new_n29346_ q=$abc$109383$new_n31724_
+.subckt and4_x1 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29502_ i3=$abc$109383$new_n29346_ q=$abc$109383$new_n31724_
 .subckt nand2_x0 i0=$abc$109383$new_n31579_ i1=$abc$109383$new_n31430_ nq=$abc$109383$new_n31725_
-.subckt oa22_x2 i0=$abc$109383$new_n31574_ i1=$abc$109383$new_n31725_ i2=$abc$109383$new_n31724_ q=$abc$109383$new_n31726_
-.subckt nxr2_x1 i0=$abc$109383$new_n31591_ i1=$abc$109383$new_n31726_ nq=$abc$109383$new_n31727_
-.subckt nxr2_x1 i0=$abc$109383$new_n31602_ i1=$abc$109383$new_n31727_ nq=$abc$109383$new_n31728_
-.subckt ao22_x2 i0=$abc$109383$new_n31577_ i1=$abc$109383$new_n31728_ i2=$abc$109383$new_n31723_ q=$abc$109383$new_n31729_
-.subckt a4_x2 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29291_ i3=$abc$109383$new_n29268_ q=$abc$109383$new_n31730_
+.subckt or21nand_x1 i0=$abc$109383$new_n31574_ i1=$abc$109383$new_n31725_ i2=$abc$109383$new_n31724_ nq=$abc$109383$new_n31726_
+.subckt nexor2_x0 i0=$abc$109383$new_n31591_ i1=$abc$109383$new_n31726_ nq=$abc$109383$new_n31727_
+.subckt nexor2_x0 i0=$abc$109383$new_n31602_ i1=$abc$109383$new_n31727_ nq=$abc$109383$new_n31728_
+.subckt and21nor_x1 i0=$abc$109383$new_n31577_ i1=$abc$109383$new_n31728_ i2=$abc$109383$new_n31723_ nq=$abc$109383$new_n31729_
+.subckt and4_x1 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29291_ i3=$abc$109383$new_n29268_ q=$abc$109383$new_n31730_
 .subckt nand2_x0 i0=$abc$109383$new_n31588_ i1=$abc$109383$new_n31453_ nq=$abc$109383$new_n31731_
-.subckt oa22_x2 i0=$abc$109383$new_n31600_ i1=$abc$109383$new_n31731_ i2=$abc$109383$new_n31730_ q=$abc$109383$new_n31732_
+.subckt or21nand_x1 i0=$abc$109383$new_n31600_ i1=$abc$109383$new_n31731_ i2=$abc$109383$new_n31730_ nq=$abc$109383$new_n31732_
 .subckt nand2_x0 i0=$abc$109383$new_n31732_ i1=$abc$109383$new_n31586_ nq=$abc$109383$new_n31733_
-.subckt a2_x2 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29548_ q=$abc$109383$new_n31734_
-.subckt nxr2_x1 i0=$abc$109383$new_n31585_ i1=$abc$109383$new_n31734_ nq=$abc$109383$new_n31735_
-.subckt a2_x2 i0=$abc$109383$new_n31590_ i1=$abc$109383$new_n31735_ q=$abc$109383$new_n31736_
-.subckt ao22_x2 i0=$abc$109383$new_n31581_ i1=$abc$109383$new_n31736_ i2=$abc$109383$new_n31733_ q=$abc$109383$new_n31737_
+.subckt and2_x1 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29548_ q=$abc$109383$new_n31734_
+.subckt nexor2_x0 i0=$abc$109383$new_n31585_ i1=$abc$109383$new_n31734_ nq=$abc$109383$new_n31735_
+.subckt and2_x1 i0=$abc$109383$new_n31590_ i1=$abc$109383$new_n31735_ q=$abc$109383$new_n31736_
+.subckt and21nor_x1 i0=$abc$109383$new_n31581_ i1=$abc$109383$new_n31736_ i2=$abc$109383$new_n31733_ nq=$abc$109383$new_n31737_
 .subckt nand4_x0 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29524_ i3=$abc$109383$new_n29502_ nq=$abc$109383$new_n31738_
 .subckt nand2_x0 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29524_ nq=$abc$109383$new_n31739_
-.subckt a2_x2 i0=$abc$109383$new_n31739_ i1=$abc$109383$new_n31583_ q=$abc$109383$new_n31740_
-.subckt ao22_x2 i0=$abc$109383$new_n31582_ i1=$abc$109383$new_n31740_ i2=$abc$109383$new_n31738_ q=$abc$109383$new_n31741_
+.subckt and2_x1 i0=$abc$109383$new_n31739_ i1=$abc$109383$new_n31583_ q=$abc$109383$new_n31740_
+.subckt and21nor_x1 i0=$abc$109383$new_n31582_ i1=$abc$109383$new_n31740_ i2=$abc$109383$new_n31738_ nq=$abc$109383$new_n31741_
 .subckt nand2_x0 i0=$abc$109383$new_n30459_ i1=soc.cpu.minerva.payload__src1$44[11] nq=$abc$109383$new_n31742_
 .subckt nand2_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n29523_ nq=$abc$109383$new_n31743_
-.subckt a2_x2 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29547_ q=$abc$109383$new_n31744_
-.subckt nxr2_x1 i0=$abc$109383$new_n31744_ i1=$abc$109383$new_n31743_ nq=$abc$109383$new_n31745_
-.subckt nxr2_x1 i0=$abc$109383$new_n31745_ i1=$abc$109383$new_n31742_ nq=$abc$109383$new_n31746_
+.subckt and2_x1 i0=$abc$109383$new_n30534_ i1=$abc$109383$new_n29547_ q=$abc$109383$new_n31744_
+.subckt nexor2_x0 i0=$abc$109383$new_n31744_ i1=$abc$109383$new_n31743_ nq=$abc$109383$new_n31745_
+.subckt nexor2_x0 i0=$abc$109383$new_n31745_ i1=$abc$109383$new_n31742_ nq=$abc$109383$new_n31746_
 .subckt nand4_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29324_ i3=$abc$109383$new_n29290_ nq=$abc$109383$new_n31747_
 .subckt nand2_x0 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29323_ nq=$abc$109383$new_n31748_
-.subckt a2_x2 i0=$abc$109383$new_n31748_ i1=$abc$109383$new_n31611_ q=$abc$109383$new_n31749_
-.subckt ao22_x2 i0=$abc$109383$new_n31610_ i1=$abc$109383$new_n31749_ i2=$abc$109383$new_n31747_ q=$abc$109383$new_n31750_
-.subckt nxr2_x1 i0=$abc$109383$new_n31750_ i1=$abc$109383$new_n31746_ nq=$abc$109383$new_n31751_
-.subckt nxr2_x1 i0=$abc$109383$new_n31751_ i1=$abc$109383$new_n31741_ nq=$abc$109383$new_n31752_
-.subckt a4_x2 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29389_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n31753_
+.subckt and2_x1 i0=$abc$109383$new_n31748_ i1=$abc$109383$new_n31611_ q=$abc$109383$new_n31749_
+.subckt and21nor_x1 i0=$abc$109383$new_n31610_ i1=$abc$109383$new_n31749_ i2=$abc$109383$new_n31747_ nq=$abc$109383$new_n31750_
+.subckt nexor2_x0 i0=$abc$109383$new_n31750_ i1=$abc$109383$new_n31746_ nq=$abc$109383$new_n31751_
+.subckt nexor2_x0 i0=$abc$109383$new_n31751_ i1=$abc$109383$new_n31741_ nq=$abc$109383$new_n31752_
+.subckt and4_x1 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29389_ i3=$abc$109383$new_n29444_ q=$abc$109383$new_n31753_
 .subckt nand2_x0 i0=$abc$109383$new_n31616_ i1=$abc$109383$new_n31463_ nq=$abc$109383$new_n31754_
-.subckt oa22_x2 i0=$abc$109383$new_n31597_ i1=$abc$109383$new_n31754_ i2=$abc$109383$new_n31753_ q=$abc$109383$new_n31755_
+.subckt or21nand_x1 i0=$abc$109383$new_n31597_ i1=$abc$109383$new_n31754_ i2=$abc$109383$new_n31753_ nq=$abc$109383$new_n31755_
 .subckt nand2_x0 i0=$abc$109383$new_n31623_ i1=$abc$109383$new_n31755_ nq=$abc$109383$new_n31756_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29267_ q=$abc$109383$new_n31757_
-.subckt nxr2_x1 i0=$abc$109383$new_n31622_ i1=$abc$109383$new_n31757_ nq=$abc$109383$new_n31758_
-.subckt a2_x2 i0=$abc$109383$new_n31758_ i1=$abc$109383$new_n31618_ q=$abc$109383$new_n31759_
-.subckt a2_x2 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29346_ q=$abc$109383$new_n31760_
-.subckt nxr2_x1 i0=$abc$109383$new_n31613_ i1=$abc$109383$new_n31760_ nq=$abc$109383$new_n31761_
-.subckt ao22_x2 i0=$abc$109383$new_n31761_ i1=$abc$109383$new_n31759_ i2=$abc$109383$new_n31756_ q=$abc$109383$new_n31762_
-.subckt nxr2_x1 i0=$abc$109383$new_n31762_ i1=$abc$109383$new_n31752_ nq=$abc$109383$new_n31763_
-.subckt nxr2_x1 i0=$abc$109383$new_n31763_ i1=$abc$109383$new_n31737_ nq=$abc$109383$new_n31764_
-.subckt nxr2_x1 i0=$abc$109383$new_n31764_ i1=$abc$109383$new_n31729_ nq=$abc$109383$new_n31765_
-.subckt nxr2_x1 i0=$abc$109383$new_n31765_ i1=$abc$109383$new_n31719_ nq=$abc$109383$new_n31766_
-.subckt nxr2_x1 i0=$abc$109383$new_n31766_ i1=$abc$109383$new_n31689_ nq=$abc$109383$new_n31767_
-.subckt nxr2_x1 i0=$abc$109383$new_n31767_ i1=$abc$109383$new_n31687_ nq=$abc$109383$new_n31768_
-.subckt nxr2_x1 i0=$abc$109383$new_n31624_ i1=$abc$109383$new_n31761_ nq=$abc$109383$new_n31769_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29267_ q=$abc$109383$new_n31757_
+.subckt nexor2_x0 i0=$abc$109383$new_n31622_ i1=$abc$109383$new_n31757_ nq=$abc$109383$new_n31758_
+.subckt and2_x1 i0=$abc$109383$new_n31758_ i1=$abc$109383$new_n31618_ q=$abc$109383$new_n31759_
+.subckt and2_x1 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29346_ q=$abc$109383$new_n31760_
+.subckt nexor2_x0 i0=$abc$109383$new_n31613_ i1=$abc$109383$new_n31760_ nq=$abc$109383$new_n31761_
+.subckt and21nor_x1 i0=$abc$109383$new_n31761_ i1=$abc$109383$new_n31759_ i2=$abc$109383$new_n31756_ nq=$abc$109383$new_n31762_
+.subckt nexor2_x0 i0=$abc$109383$new_n31762_ i1=$abc$109383$new_n31752_ nq=$abc$109383$new_n31763_
+.subckt nexor2_x0 i0=$abc$109383$new_n31763_ i1=$abc$109383$new_n31737_ nq=$abc$109383$new_n31764_
+.subckt nexor2_x0 i0=$abc$109383$new_n31764_ i1=$abc$109383$new_n31729_ nq=$abc$109383$new_n31765_
+.subckt nexor2_x0 i0=$abc$109383$new_n31765_ i1=$abc$109383$new_n31719_ nq=$abc$109383$new_n31766_
+.subckt nexor2_x0 i0=$abc$109383$new_n31766_ i1=$abc$109383$new_n31689_ nq=$abc$109383$new_n31767_
+.subckt nexor2_x0 i0=$abc$109383$new_n31767_ i1=$abc$109383$new_n31687_ nq=$abc$109383$new_n31768_
+.subckt nexor2_x0 i0=$abc$109383$new_n31624_ i1=$abc$109383$new_n31761_ nq=$abc$109383$new_n31769_
 .subckt nand2_x0 i0=$abc$109383$new_n31630_ i1=$abc$109383$new_n31769_ nq=$abc$109383$new_n31770_
 .subckt nand2_x0 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29501_ nq=$abc$109383$new_n31771_
 .subckt nand2_x0 i0=$abc$109383$new_n30910_ i1=$abc$109383$new_n29323_ nq=$abc$109383$new_n31772_
-.subckt a2_x2 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29345_ q=$abc$109383$new_n31773_
-.subckt nxr2_x1 i0=$abc$109383$new_n31773_ i1=$abc$109383$new_n31772_ nq=$abc$109383$new_n31774_
-.subckt nxr2_x1 i0=$abc$109383$new_n31774_ i1=$abc$109383$new_n31771_ nq=$abc$109383$new_n31775_
+.subckt and2_x1 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29345_ q=$abc$109383$new_n31773_
+.subckt nexor2_x0 i0=$abc$109383$new_n31773_ i1=$abc$109383$new_n31772_ nq=$abc$109383$new_n31774_
+.subckt nexor2_x0 i0=$abc$109383$new_n31774_ i1=$abc$109383$new_n31771_ nq=$abc$109383$new_n31775_
 .subckt nand4_x0 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29413_ i3=$abc$109383$new_n29389_ nq=$abc$109383$new_n31776_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29413_ nq=$abc$109383$new_n31777_
-.subckt a2_x2 i0=$abc$109383$new_n31777_ i1=$abc$109383$new_n31620_ q=$abc$109383$new_n31778_
-.subckt ao22_x2 i0=$abc$109383$new_n31619_ i1=$abc$109383$new_n31778_ i2=$abc$109383$new_n31776_ q=$abc$109383$new_n31779_
+.subckt and2_x1 i0=$abc$109383$new_n31777_ i1=$abc$109383$new_n31620_ q=$abc$109383$new_n31778_
+.subckt and21nor_x1 i0=$abc$109383$new_n31619_ i1=$abc$109383$new_n31778_ i2=$abc$109383$new_n31776_ nq=$abc$109383$new_n31779_
 .subckt nand2_x0 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29290_ nq=$abc$109383$new_n31780_
 .subckt nand2_x0 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n29413_ nq=$abc$109383$new_n31781_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29266_ q=$abc$109383$new_n31782_
-.subckt nxr2_x1 i0=$abc$109383$new_n31782_ i1=$abc$109383$new_n31781_ nq=$abc$109383$new_n31783_
-.subckt nxr2_x1 i0=$abc$109383$new_n31783_ i1=$abc$109383$new_n31780_ nq=$abc$109383$new_n31784_
-.subckt nxr2_x1 i0=$abc$109383$new_n31784_ i1=$abc$109383$new_n31779_ nq=$abc$109383$new_n31785_
-.subckt nxr2_x1 i0=$abc$109383$new_n31785_ i1=$abc$109383$new_n31775_ nq=$abc$109383$new_n31786_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[13] i1=$abc$109383$new_n29266_ q=$abc$109383$new_n31782_
+.subckt nexor2_x0 i0=$abc$109383$new_n31782_ i1=$abc$109383$new_n31781_ nq=$abc$109383$new_n31783_
+.subckt nexor2_x0 i0=$abc$109383$new_n31783_ i1=$abc$109383$new_n31780_ nq=$abc$109383$new_n31784_
+.subckt nexor2_x0 i0=$abc$109383$new_n31784_ i1=$abc$109383$new_n31779_ nq=$abc$109383$new_n31785_
+.subckt nexor2_x0 i0=$abc$109383$new_n31785_ i1=$abc$109383$new_n31775_ nq=$abc$109383$new_n31786_
 .subckt nand4_x0 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n31469_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29445_ nq=$abc$109383$new_n31787_
 .subckt nand2_x0 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29389_ nq=$abc$109383$new_n31788_
 .subckt nand2_x0 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29445_ nq=$abc$109383$new_n31789_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n29470_ q=$abc$109383$new_n31790_
-.subckt nxr2_x1 i0=$abc$109383$new_n31790_ i1=$abc$109383$new_n31789_ nq=$abc$109383$new_n31791_
-.subckt nxr2_x1 i0=$abc$109383$new_n31791_ i1=$abc$109383$new_n31788_ nq=$abc$109383$new_n31792_
-.subckt nxr2_x1 i0=$abc$109383$new_n31792_ i1=$abc$109383$new_n31787_ nq=$abc$109383$new_n31793_
-.subckt nxr2_x1 i0=$abc$109383$new_n31793_ i1=$abc$109383$new_n31786_ nq=$abc$109383$new_n31794_
-.subckt nxr2_x1 i0=$abc$109383$new_n31794_ i1=$abc$109383$new_n31770_ nq=$abc$109383$new_n31795_
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 .subckt nand2_x0 i0=$abc$109383$new_n31801_ i1=$abc$109383$new_n31655_ nq=$abc$109383$new_n31802_
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n31803_
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 .subckt nand2_x0 i0=$abc$109383$new_n31804_ i1=$abc$109383$new_n31802_ nq=$abc$109383$new_n31805_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n31806_
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n31807_
-.subckt ao22_x2 i0=$abc$109383$new_n31807_ i1=soc.cpu.minerva.multiplier.m_prod[17] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n31808_
-.subckt a2_x2 i0=$abc$109383$new_n31808_ i1=$abc$109383$new_n31805_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102826
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[18] nq=$abc$109383$new_n31810_
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 .subckt nor2_x0 i0=$abc$109383$new_n31811_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n31812_
 .subckt nand2_x0 i0=$abc$109383$new_n31473_ i1=$abc$109383$new_n31496_ nq=$abc$109383$new_n31813_
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 .subckt nand3_x0 i0=$abc$109383$new_n31494_ i1=$abc$109383$new_n31300_ i2=$abc$109383$new_n31232_ nq=$abc$109383$new_n31820_
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 .subckt nand2_x0 i0=$abc$109383$new_n31799_ i1=$abc$109383$new_n31824_ nq=$abc$109383$new_n31825_
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 .subckt nand2_x0 i0=$abc$109383$new_n31827_ i1=$abc$109383$new_n31660_ nq=$abc$109383$new_n31828_
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+.subckt and2_x1 i0=$abc$109383$new_n31722_ i1=$abc$109383$new_n31592_ q=$abc$109383$new_n31867_
+.subckt or21nand_x1 i0=$abc$109383$new_n31859_ i1=$abc$109383$new_n31603_ i2=$abc$109383$new_n31867_ nq=$abc$109383$new_n31868_
+.subckt and2_x1 i0=$abc$109383$new_n31764_ i1=$abc$109383$new_n31868_ q=$abc$109383$new_n31869_
+.subckt nexor2_x0 i0=$abc$109383$new_n31718_ i1=$abc$109383$new_n31851_ nq=$abc$109383$new_n31870_
+.subckt or21nand_x1 i0=$abc$109383$new_n31870_ i1=$abc$109383$new_n31765_ i2=$abc$109383$new_n31869_ nq=$abc$109383$new_n31871_
+.subckt and2_x1 i0=$abc$109383$new_n31630_ i1=$abc$109383$new_n31769_ q=$abc$109383$new_n31872_
 .subckt nand2_x0 i0=$abc$109383$new_n31794_ i1=$abc$109383$new_n31872_ nq=$abc$109383$new_n31873_
-.subckt a4_x2 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29677_ i3=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n31874_
+.subckt and4_x1 i0=$abc$109383$new_n29255_ i1=$abc$109383$new_n29372_ i2=$abc$109383$new_n29677_ i3=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n31874_
 .subckt nand2_x0 i0=$abc$109383$new_n29373_ i1=$abc$109383$new_n29677_ nq=$abc$109383$new_n31875_
 .subckt nand2_x0 i0=$abc$109383$new_n31875_ i1=$abc$109383$new_n31703_ nq=$abc$109383$new_n31876_
-.subckt oa22_x2 i0=$abc$109383$new_n31702_ i1=$abc$109383$new_n31876_ i2=$abc$109383$new_n31874_ q=$abc$109383$new_n31877_
-.subckt a4_x2 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29230_ i2=$abc$109383$new_n29598_ i3=$abc$109383$new_n29573_ q=$abc$109383$new_n31878_
+.subckt or21nand_x1 i0=$abc$109383$new_n31702_ i1=$abc$109383$new_n31876_ i2=$abc$109383$new_n31874_ nq=$abc$109383$new_n31877_
+.subckt and4_x1 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29230_ i2=$abc$109383$new_n29598_ i3=$abc$109383$new_n29573_ q=$abc$109383$new_n31878_
 .subckt nand2_x0 i0=$abc$109383$new_n31708_ i1=$abc$109383$new_n31550_ nq=$abc$109383$new_n31879_
-.subckt oa22_x2 i0=$abc$109383$new_n31698_ i1=$abc$109383$new_n31879_ i2=$abc$109383$new_n31878_ q=$abc$109383$new_n31880_
+.subckt or21nand_x1 i0=$abc$109383$new_n31698_ i1=$abc$109383$new_n31879_ i2=$abc$109383$new_n31878_ nq=$abc$109383$new_n31880_
 .subckt nand2_x0 i0=$abc$109383$new_n31715_ i1=$abc$109383$new_n31880_ nq=$abc$109383$new_n31881_
-.subckt a2_x2 i0=$abc$109383$new_n29243_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31882_
-.subckt nxr2_x1 i0=$abc$109383$new_n31714_ i1=$abc$109383$new_n31882_ nq=$abc$109383$new_n31883_
-.subckt a2_x2 i0=$abc$109383$new_n31883_ i1=$abc$109383$new_n31710_ q=$abc$109383$new_n31884_
-.subckt ao22_x2 i0=$abc$109383$new_n31706_ i1=$abc$109383$new_n31884_ i2=$abc$109383$new_n31881_ q=$abc$109383$new_n31885_
-.subckt a2_x2 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[18] q=$abc$109383$new_n31886_
+.subckt and2_x1 i0=$abc$109383$new_n29243_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31882_
+.subckt nexor2_x0 i0=$abc$109383$new_n31714_ i1=$abc$109383$new_n31882_ nq=$abc$109383$new_n31883_
+.subckt and2_x1 i0=$abc$109383$new_n31883_ i1=$abc$109383$new_n31710_ q=$abc$109383$new_n31884_
+.subckt and21nor_x1 i0=$abc$109383$new_n31706_ i1=$abc$109383$new_n31884_ i2=$abc$109383$new_n31881_ nq=$abc$109383$new_n31885_
+.subckt and2_x1 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[18] q=$abc$109383$new_n31886_
 .subckt nand2_x0 i0=$abc$109383$new_n29254_ i1=$abc$109383$new_n29677_ nq=$abc$109383$new_n31887_
-.subckt a2_x2 i0=$abc$109383$new_n29371_ i1=soc.cpu.minerva.payload__src1$44[17] q=$abc$109383$new_n31888_
-.subckt nxr2_x1 i0=$abc$109383$new_n31888_ i1=$abc$109383$new_n31887_ nq=$abc$109383$new_n31889_
-.subckt nxr2_x1 i0=$abc$109383$new_n31889_ i1=$abc$109383$new_n31886_ nq=$abc$109383$new_n31890_
+.subckt and2_x1 i0=$abc$109383$new_n29371_ i1=soc.cpu.minerva.payload__src1$44[17] q=$abc$109383$new_n31888_
+.subckt nexor2_x0 i0=$abc$109383$new_n31888_ i1=$abc$109383$new_n31887_ nq=$abc$109383$new_n31889_
+.subckt nexor2_x0 i0=$abc$109383$new_n31889_ i1=$abc$109383$new_n31886_ nq=$abc$109383$new_n31890_
 .subckt nand4_x0 i0=$abc$109383$new_n31381_ i1=$abc$109383$new_n29229_ i2=soc.cpu.minerva.payload__src1$44[13] i3=$abc$109383$new_n29598_ nq=$abc$109383$new_n31891_
 .subckt nand2_x0 i0=$abc$109383$new_n29229_ i1=soc.cpu.minerva.payload__src1$44[13] nq=$abc$109383$new_n31892_
-.subckt a2_x2 i0=$abc$109383$new_n31892_ i1=$abc$109383$new_n31712_ q=$abc$109383$new_n31893_
-.subckt ao22_x2 i0=$abc$109383$new_n31711_ i1=$abc$109383$new_n31893_ i2=$abc$109383$new_n31891_ q=$abc$109383$new_n31894_
+.subckt and2_x1 i0=$abc$109383$new_n31892_ i1=$abc$109383$new_n31712_ q=$abc$109383$new_n31893_
+.subckt and21nor_x1 i0=$abc$109383$new_n31711_ i1=$abc$109383$new_n31893_ i2=$abc$109383$new_n31891_ nq=$abc$109383$new_n31894_
 .subckt nand2_x0 i0=$abc$109383$new_n29242_ i1=soc.cpu.minerva.payload__src1$44[15] nq=$abc$109383$new_n31895_
 .subckt nand2_x0 i0=$abc$109383$new_n31103_ i1=soc.cpu.minerva.payload__src1$44[13] nq=$abc$109383$new_n31896_
-.subckt a2_x2 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31897_
-.subckt nxr2_x1 i0=$abc$109383$new_n31897_ i1=$abc$109383$new_n31896_ nq=$abc$109383$new_n31898_
-.subckt nxr2_x1 i0=$abc$109383$new_n31898_ i1=$abc$109383$new_n31895_ nq=$abc$109383$new_n31899_
-.subckt nxr2_x1 i0=$abc$109383$new_n31899_ i1=$abc$109383$new_n31894_ nq=$abc$109383$new_n31900_
-.subckt nxr2_x1 i0=$abc$109383$new_n31900_ i1=$abc$109383$new_n31890_ nq=$abc$109383$new_n31901_
-.subckt nxr2_x1 i0=$abc$109383$new_n31901_ i1=$abc$109383$new_n31885_ nq=$abc$109383$new_n31902_
-.subckt nxr2_x1 i0=$abc$109383$new_n31902_ i1=$abc$109383$new_n31877_ nq=$abc$109383$new_n31903_
-.subckt a2_x2 i0=$abc$109383$new_n31623_ i1=$abc$109383$new_n31755_ q=$abc$109383$new_n31904_
+.subckt and2_x1 i0=$abc$109383$new_n29228_ i1=soc.cpu.minerva.payload__src1$44[14] q=$abc$109383$new_n31897_
+.subckt nexor2_x0 i0=$abc$109383$new_n31897_ i1=$abc$109383$new_n31896_ nq=$abc$109383$new_n31898_
+.subckt nexor2_x0 i0=$abc$109383$new_n31898_ i1=$abc$109383$new_n31895_ nq=$abc$109383$new_n31899_
+.subckt nexor2_x0 i0=$abc$109383$new_n31899_ i1=$abc$109383$new_n31894_ nq=$abc$109383$new_n31900_
+.subckt nexor2_x0 i0=$abc$109383$new_n31900_ i1=$abc$109383$new_n31890_ nq=$abc$109383$new_n31901_
+.subckt nexor2_x0 i0=$abc$109383$new_n31901_ i1=$abc$109383$new_n31885_ nq=$abc$109383$new_n31902_
+.subckt nexor2_x0 i0=$abc$109383$new_n31902_ i1=$abc$109383$new_n31877_ nq=$abc$109383$new_n31903_
+.subckt and2_x1 i0=$abc$109383$new_n31623_ i1=$abc$109383$new_n31755_ q=$abc$109383$new_n31904_
 .subckt nand2_x0 i0=$abc$109383$new_n31758_ i1=$abc$109383$new_n31618_ nq=$abc$109383$new_n31905_
-.subckt oa22_x2 i0=$abc$109383$new_n31614_ i1=$abc$109383$new_n31905_ i2=$abc$109383$new_n31904_ q=$abc$109383$new_n31906_
+.subckt or21nand_x1 i0=$abc$109383$new_n31614_ i1=$abc$109383$new_n31905_ i2=$abc$109383$new_n31904_ nq=$abc$109383$new_n31906_
 .subckt nand2_x0 i0=$abc$109383$new_n31906_ i1=$abc$109383$new_n31752_ nq=$abc$109383$new_n31907_
 .subckt buf_x4 i=$abc$109383$new_n31224_ q=$abc$109383$new_n31908_
-.subckt a4_x2 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29524_ i3=$abc$109383$new_n29502_ q=$abc$109383$new_n31909_
+.subckt and4_x1 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29524_ i3=$abc$109383$new_n29502_ q=$abc$109383$new_n31909_
 .subckt nand2_x0 i0=$abc$109383$new_n31739_ i1=$abc$109383$new_n31583_ nq=$abc$109383$new_n31910_
-.subckt oa22_x2 i0=$abc$109383$new_n31734_ i1=$abc$109383$new_n31910_ i2=$abc$109383$new_n31909_ q=$abc$109383$new_n31911_
-.subckt nxr2_x1 i0=$abc$109383$new_n31751_ i1=$abc$109383$new_n31911_ nq=$abc$109383$new_n31912_
-.subckt nxr2_x1 i0=$abc$109383$new_n31762_ i1=$abc$109383$new_n31912_ nq=$abc$109383$new_n31913_
-.subckt ao22_x2 i0=$abc$109383$new_n31737_ i1=$abc$109383$new_n31913_ i2=$abc$109383$new_n31907_ q=$abc$109383$new_n31914_
-.subckt a4_x2 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29324_ i3=$abc$109383$new_n29291_ q=$abc$109383$new_n31915_
+.subckt or21nand_x1 i0=$abc$109383$new_n31734_ i1=$abc$109383$new_n31910_ i2=$abc$109383$new_n31909_ nq=$abc$109383$new_n31911_
+.subckt nexor2_x0 i0=$abc$109383$new_n31751_ i1=$abc$109383$new_n31911_ nq=$abc$109383$new_n31912_
+.subckt nexor2_x0 i0=$abc$109383$new_n31762_ i1=$abc$109383$new_n31912_ nq=$abc$109383$new_n31913_
+.subckt and21nor_x1 i0=$abc$109383$new_n31737_ i1=$abc$109383$new_n31913_ i2=$abc$109383$new_n31907_ nq=$abc$109383$new_n31914_
+.subckt and4_x1 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29324_ i3=$abc$109383$new_n29291_ q=$abc$109383$new_n31915_
 .subckt nand2_x0 i0=$abc$109383$new_n31748_ i1=$abc$109383$new_n31611_ nq=$abc$109383$new_n31916_
-.subckt oa22_x2 i0=$abc$109383$new_n31760_ i1=$abc$109383$new_n31916_ i2=$abc$109383$new_n31915_ q=$abc$109383$new_n31917_
+.subckt or21nand_x1 i0=$abc$109383$new_n31760_ i1=$abc$109383$new_n31916_ i2=$abc$109383$new_n31915_ nq=$abc$109383$new_n31917_
 .subckt nand2_x0 i0=$abc$109383$new_n31917_ i1=$abc$109383$new_n31746_ nq=$abc$109383$new_n31918_
 .subckt buf_x4 i=$abc$109383$new_n30459_ q=$abc$109383$new_n31919_
-.subckt a2_x2 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29572_ q=$abc$109383$new_n31920_
-.subckt nxr2_x1 i0=$abc$109383$new_n31745_ i1=$abc$109383$new_n31920_ nq=$abc$109383$new_n31921_
-.subckt a2_x2 i0=$abc$109383$new_n31750_ i1=$abc$109383$new_n31921_ q=$abc$109383$new_n31922_
-.subckt ao22_x2 i0=$abc$109383$new_n31741_ i1=$abc$109383$new_n31922_ i2=$abc$109383$new_n31918_ q=$abc$109383$new_n31923_
+.subckt and2_x1 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29572_ q=$abc$109383$new_n31920_
+.subckt nexor2_x0 i0=$abc$109383$new_n31745_ i1=$abc$109383$new_n31920_ nq=$abc$109383$new_n31921_
+.subckt and2_x1 i0=$abc$109383$new_n31750_ i1=$abc$109383$new_n31921_ q=$abc$109383$new_n31922_
+.subckt and21nor_x1 i0=$abc$109383$new_n31741_ i1=$abc$109383$new_n31922_ i2=$abc$109383$new_n31918_ nq=$abc$109383$new_n31923_
 .subckt nand4_x0 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n31410_ i2=$abc$109383$new_n29549_ i3=$abc$109383$new_n29524_ nq=$abc$109383$new_n31924_
 .subckt nand2_x0 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29548_ nq=$abc$109383$new_n31925_
-.subckt a2_x2 i0=$abc$109383$new_n31925_ i1=$abc$109383$new_n31743_ q=$abc$109383$new_n31926_
-.subckt ao22_x2 i0=$abc$109383$new_n31742_ i1=$abc$109383$new_n31926_ i2=$abc$109383$new_n31924_ q=$abc$109383$new_n31927_
+.subckt and2_x1 i0=$abc$109383$new_n31925_ i1=$abc$109383$new_n31743_ q=$abc$109383$new_n31926_
+.subckt and21nor_x1 i0=$abc$109383$new_n31742_ i1=$abc$109383$new_n31926_ i2=$abc$109383$new_n31924_ nq=$abc$109383$new_n31927_
 .subckt nand2_x0 i0=$abc$109383$new_n30459_ i1=soc.cpu.minerva.payload__src1$44[12] nq=$abc$109383$new_n31928_
 .subckt nand2_x0 i0=$abc$109383$new_n31089_ i1=$abc$109383$new_n29547_ nq=$abc$109383$new_n31929_
-.subckt a2_x2 i0=$abc$109383$new_n30534_ i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n31930_
-.subckt nxr2_x1 i0=$abc$109383$new_n31930_ i1=$abc$109383$new_n31929_ nq=$abc$109383$new_n31931_
-.subckt nxr2_x1 i0=$abc$109383$new_n31931_ i1=$abc$109383$new_n31928_ nq=$abc$109383$new_n31932_
+.subckt and2_x1 i0=$abc$109383$new_n30534_ i1=soc.cpu.minerva.payload__src1$44[11] q=$abc$109383$new_n31930_
+.subckt nexor2_x0 i0=$abc$109383$new_n31930_ i1=$abc$109383$new_n31929_ nq=$abc$109383$new_n31931_
+.subckt nexor2_x0 i0=$abc$109383$new_n31931_ i1=$abc$109383$new_n31928_ nq=$abc$109383$new_n31932_
 .subckt nand4_x0 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n30797_ i2=$abc$109383$new_n29345_ i3=$abc$109383$new_n29324_ nq=$abc$109383$new_n31933_
 .subckt nand2_x0 i0=$abc$109383$new_n30796_ i1=$abc$109383$new_n29345_ nq=$abc$109383$new_n31934_
-.subckt a2_x2 i0=$abc$109383$new_n31934_ i1=$abc$109383$new_n31772_ q=$abc$109383$new_n31935_
-.subckt ao22_x2 i0=$abc$109383$new_n31771_ i1=$abc$109383$new_n31935_ i2=$abc$109383$new_n31933_ q=$abc$109383$new_n31936_
-.subckt nxr2_x1 i0=$abc$109383$new_n31936_ i1=$abc$109383$new_n31932_ nq=$abc$109383$new_n31937_
-.subckt nxr2_x1 i0=$abc$109383$new_n31937_ i1=$abc$109383$new_n31927_ nq=$abc$109383$new_n31938_
-.subckt a4_x2 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29414_ i3=$abc$109383$new_n30317_ q=$abc$109383$new_n31939_
+.subckt and2_x1 i0=$abc$109383$new_n31934_ i1=$abc$109383$new_n31772_ q=$abc$109383$new_n31935_
+.subckt and21nor_x1 i0=$abc$109383$new_n31771_ i1=$abc$109383$new_n31935_ i2=$abc$109383$new_n31933_ nq=$abc$109383$new_n31936_
+.subckt nexor2_x0 i0=$abc$109383$new_n31936_ i1=$abc$109383$new_n31932_ nq=$abc$109383$new_n31937_
+.subckt nexor2_x0 i0=$abc$109383$new_n31937_ i1=$abc$109383$new_n31927_ nq=$abc$109383$new_n31938_
+.subckt and4_x1 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n31308_ i2=$abc$109383$new_n29414_ i3=$abc$109383$new_n30317_ q=$abc$109383$new_n31939_
 .subckt nand2_x0 i0=$abc$109383$new_n31777_ i1=$abc$109383$new_n31620_ nq=$abc$109383$new_n31940_
-.subckt oa22_x2 i0=$abc$109383$new_n31757_ i1=$abc$109383$new_n31940_ i2=$abc$109383$new_n31939_ q=$abc$109383$new_n31941_
+.subckt or21nand_x1 i0=$abc$109383$new_n31757_ i1=$abc$109383$new_n31940_ i2=$abc$109383$new_n31939_ nq=$abc$109383$new_n31941_
 .subckt nand2_x0 i0=$abc$109383$new_n31784_ i1=$abc$109383$new_n31941_ nq=$abc$109383$new_n31942_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29290_ q=$abc$109383$new_n31943_
-.subckt nxr2_x1 i0=$abc$109383$new_n31783_ i1=$abc$109383$new_n31943_ nq=$abc$109383$new_n31944_
-.subckt a2_x2 i0=$abc$109383$new_n31944_ i1=$abc$109383$new_n31779_ q=$abc$109383$new_n31945_
-.subckt a2_x2 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29501_ q=$abc$109383$new_n31946_
-.subckt nxr2_x1 i0=$abc$109383$new_n31774_ i1=$abc$109383$new_n31946_ nq=$abc$109383$new_n31947_
-.subckt ao22_x2 i0=$abc$109383$new_n31947_ i1=$abc$109383$new_n31945_ i2=$abc$109383$new_n31942_ q=$abc$109383$new_n31948_
-.subckt nxr2_x1 i0=$abc$109383$new_n31948_ i1=$abc$109383$new_n31938_ nq=$abc$109383$new_n31949_
-.subckt nxr2_x1 i0=$abc$109383$new_n31949_ i1=$abc$109383$new_n31923_ nq=$abc$109383$new_n31950_
-.subckt nxr2_x1 i0=$abc$109383$new_n31950_ i1=$abc$109383$new_n31914_ nq=$abc$109383$new_n31951_
-.subckt nxr2_x1 i0=$abc$109383$new_n31951_ i1=$abc$109383$new_n31903_ nq=$abc$109383$new_n31952_
-.subckt nxr2_x1 i0=$abc$109383$new_n31952_ i1=$abc$109383$new_n31873_ nq=$abc$109383$new_n31953_
-.subckt nxr2_x1 i0=$abc$109383$new_n31953_ i1=$abc$109383$new_n31871_ nq=$abc$109383$new_n31954_
-.subckt nxr2_x1 i0=$abc$109383$new_n31785_ i1=$abc$109383$new_n31947_ nq=$abc$109383$new_n31955_
-.subckt a2_x2 i0=$abc$109383$new_n31793_ i1=$abc$109383$new_n31955_ q=$abc$109383$new_n31956_
-.subckt a2_x2 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n29346_ q=$abc$109383$new_n31957_
-.subckt a2_x2 i0=$abc$109383$new_n31569_ i1=$abc$109383$new_n29502_ q=$abc$109383$new_n31958_
-.subckt nxr2_x1 i0=$abc$109383$new_n31958_ i1=$abc$109383$new_n31957_ nq=$abc$109383$new_n31959_
-.subckt a2_x2 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29525_ q=$abc$109383$new_n31960_
-.subckt nxr2_x1 i0=$abc$109383$new_n31960_ i1=$abc$109383$new_n31959_ nq=$abc$109383$new_n31961_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[12] i1=$abc$109383$new_n29290_ q=$abc$109383$new_n31943_
+.subckt nexor2_x0 i0=$abc$109383$new_n31783_ i1=$abc$109383$new_n31943_ nq=$abc$109383$new_n31944_
+.subckt and2_x1 i0=$abc$109383$new_n31944_ i1=$abc$109383$new_n31779_ q=$abc$109383$new_n31945_
+.subckt and2_x1 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29501_ q=$abc$109383$new_n31946_
+.subckt nexor2_x0 i0=$abc$109383$new_n31774_ i1=$abc$109383$new_n31946_ nq=$abc$109383$new_n31947_
+.subckt and21nor_x1 i0=$abc$109383$new_n31947_ i1=$abc$109383$new_n31945_ i2=$abc$109383$new_n31942_ nq=$abc$109383$new_n31948_
+.subckt nexor2_x0 i0=$abc$109383$new_n31948_ i1=$abc$109383$new_n31938_ nq=$abc$109383$new_n31949_
+.subckt nexor2_x0 i0=$abc$109383$new_n31949_ i1=$abc$109383$new_n31923_ nq=$abc$109383$new_n31950_
+.subckt nexor2_x0 i0=$abc$109383$new_n31950_ i1=$abc$109383$new_n31914_ nq=$abc$109383$new_n31951_
+.subckt nexor2_x0 i0=$abc$109383$new_n31951_ i1=$abc$109383$new_n31903_ nq=$abc$109383$new_n31952_
+.subckt nexor2_x0 i0=$abc$109383$new_n31952_ i1=$abc$109383$new_n31873_ nq=$abc$109383$new_n31953_
+.subckt nexor2_x0 i0=$abc$109383$new_n31953_ i1=$abc$109383$new_n31871_ nq=$abc$109383$new_n31954_
+.subckt nexor2_x0 i0=$abc$109383$new_n31785_ i1=$abc$109383$new_n31947_ nq=$abc$109383$new_n31955_
+.subckt and2_x1 i0=$abc$109383$new_n31793_ i1=$abc$109383$new_n31955_ q=$abc$109383$new_n31956_
+.subckt and2_x1 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n29346_ q=$abc$109383$new_n31957_
+.subckt and2_x1 i0=$abc$109383$new_n31569_ i1=$abc$109383$new_n29502_ q=$abc$109383$new_n31958_
+.subckt nexor2_x0 i0=$abc$109383$new_n31958_ i1=$abc$109383$new_n31957_ nq=$abc$109383$new_n31959_
+.subckt and2_x1 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29525_ q=$abc$109383$new_n31960_
+.subckt nexor2_x0 i0=$abc$109383$new_n31960_ i1=$abc$109383$new_n31959_ nq=$abc$109383$new_n31961_
 .subckt buf_x4 i=$abc$109383$new_n31308_ q=$abc$109383$new_n31962_
 .subckt buf_x4 i=$abc$109383$new_n31457_ q=$abc$109383$new_n31963_
 .subckt nand4_x0 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n31962_ i2=$abc$109383$new_n29268_ i3=$abc$109383$new_n29414_ nq=$abc$109383$new_n31964_
 .subckt nand2_x0 i0=$abc$109383$new_n31308_ i1=$abc$109383$new_n29268_ nq=$abc$109383$new_n31965_
-.subckt a2_x2 i0=$abc$109383$new_n31965_ i1=$abc$109383$new_n31781_ q=$abc$109383$new_n31966_
-.subckt ao22_x2 i0=$abc$109383$new_n31780_ i1=$abc$109383$new_n31966_ i2=$abc$109383$new_n31964_ q=$abc$109383$new_n31967_
+.subckt and2_x1 i0=$abc$109383$new_n31965_ i1=$abc$109383$new_n31781_ q=$abc$109383$new_n31966_
+.subckt and21nor_x1 i0=$abc$109383$new_n31780_ i1=$abc$109383$new_n31966_ i2=$abc$109383$new_n31964_ nq=$abc$109383$new_n31967_
 .subckt nand2_x0 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29324_ nq=$abc$109383$new_n31968_
 .subckt nand2_x0 i0=$abc$109383$new_n31457_ i1=$abc$109383$new_n29267_ nq=$abc$109383$new_n31969_
-.subckt a2_x2 i0=$abc$109383$new_n31308_ i1=$abc$109383$new_n29291_ q=$abc$109383$new_n31970_
-.subckt nxr2_x1 i0=$abc$109383$new_n31970_ i1=$abc$109383$new_n31969_ nq=$abc$109383$new_n31971_
-.subckt nxr2_x1 i0=$abc$109383$new_n31971_ i1=$abc$109383$new_n31968_ nq=$abc$109383$new_n31972_
-.subckt nxr2_x1 i0=$abc$109383$new_n31972_ i1=$abc$109383$new_n31967_ nq=$abc$109383$new_n31973_
-.subckt nxr2_x1 i0=$abc$109383$new_n31973_ i1=$abc$109383$new_n31961_ nq=$abc$109383$new_n31974_
-.subckt a4_x2 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n31469_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29445_ q=$abc$109383$new_n31975_
+.subckt and2_x1 i0=$abc$109383$new_n31308_ i1=$abc$109383$new_n29291_ q=$abc$109383$new_n31970_
+.subckt nexor2_x0 i0=$abc$109383$new_n31970_ i1=$abc$109383$new_n31969_ nq=$abc$109383$new_n31971_
+.subckt nexor2_x0 i0=$abc$109383$new_n31971_ i1=$abc$109383$new_n31968_ nq=$abc$109383$new_n31972_
+.subckt nexor2_x0 i0=$abc$109383$new_n31972_ i1=$abc$109383$new_n31967_ nq=$abc$109383$new_n31973_
+.subckt nexor2_x0 i0=$abc$109383$new_n31973_ i1=$abc$109383$new_n31961_ nq=$abc$109383$new_n31974_
+.subckt and4_x1 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n31469_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29445_ q=$abc$109383$new_n31975_
 .subckt nand2_x0 i0=$abc$109383$new_n31792_ i1=$abc$109383$new_n31975_ nq=$abc$109383$new_n31976_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n31627_ i2=$abc$109383$new_n29470_ i3=$abc$109383$new_n29445_ nq=$abc$109383$new_n31977_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n29470_ nq=$abc$109383$new_n31978_
-.subckt a2_x2 i0=$abc$109383$new_n31978_ i1=$abc$109383$new_n31789_ q=$abc$109383$new_n31979_
-.subckt ao22_x2 i0=$abc$109383$new_n31788_ i1=$abc$109383$new_n31979_ i2=$abc$109383$new_n31977_ q=$abc$109383$new_n31980_
+.subckt and2_x1 i0=$abc$109383$new_n31978_ i1=$abc$109383$new_n31789_ q=$abc$109383$new_n31979_
+.subckt and21nor_x1 i0=$abc$109383$new_n31788_ i1=$abc$109383$new_n31979_ i2=$abc$109383$new_n31977_ nq=$abc$109383$new_n31980_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[15] i1=$abc$109383$new_n29414_ nq=$abc$109383$new_n31981_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n29445_ nq=$abc$109383$new_n31982_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[16] i1=$abc$109383$new_n29389_ q=$abc$109383$new_n31983_
-.subckt nxr2_x1 i0=$abc$109383$new_n31983_ i1=$abc$109383$new_n31982_ nq=$abc$109383$new_n31984_
-.subckt nxr2_x1 i0=$abc$109383$new_n31984_ i1=$abc$109383$new_n31981_ nq=$abc$109383$new_n31985_
-.subckt nxr2_x1 i0=$abc$109383$new_n31985_ i1=$abc$109383$new_n31980_ nq=$abc$109383$new_n31986_
-.subckt nxr2_x1 i0=$abc$109383$new_n31986_ i1=$abc$109383$new_n31976_ nq=$abc$109383$new_n31987_
-.subckt nxr2_x1 i0=$abc$109383$new_n31987_ i1=$abc$109383$new_n31974_ nq=$abc$109383$new_n31988_
-.subckt nxr2_x1 i0=$abc$109383$new_n31988_ i1=$abc$109383$new_n31956_ nq=$abc$109383$new_n31989_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[16] i1=$abc$109383$new_n29389_ q=$abc$109383$new_n31983_
+.subckt nexor2_x0 i0=$abc$109383$new_n31983_ i1=$abc$109383$new_n31982_ nq=$abc$109383$new_n31984_
+.subckt nexor2_x0 i0=$abc$109383$new_n31984_ i1=$abc$109383$new_n31981_ nq=$abc$109383$new_n31985_
+.subckt nexor2_x0 i0=$abc$109383$new_n31985_ i1=$abc$109383$new_n31980_ nq=$abc$109383$new_n31986_
+.subckt nexor2_x0 i0=$abc$109383$new_n31986_ i1=$abc$109383$new_n31976_ nq=$abc$109383$new_n31987_
+.subckt nexor2_x0 i0=$abc$109383$new_n31987_ i1=$abc$109383$new_n31974_ nq=$abc$109383$new_n31988_
+.subckt nexor2_x0 i0=$abc$109383$new_n31988_ i1=$abc$109383$new_n31956_ nq=$abc$109383$new_n31989_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[18] q=$abc$109383$new_n31990_
 .subckt buf_x4 i=$abc$109383$new_n31990_ q=$abc$109383$new_n31991_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29472_ q=$abc$109383$new_n31992_
-.subckt nxr2_x1 i0=$abc$109383$new_n31992_ i1=$abc$109383$new_n31989_ nq=$abc$109383$new_n31993_
-.subckt nxr2_x1 i0=$abc$109383$new_n31993_ i1=$abc$109383$new_n31954_ nq=$abc$109383$new_n31994_
-.subckt nxr2_x1 i0=$abc$109383$new_n31994_ i1=$abc$109383$new_n31866_ nq=$abc$109383$new_n31995_
-.subckt o2_x2 i0=$abc$109383$new_n31995_ i1=$abc$109383$new_n31864_ q=$abc$109383$new_n31996_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29472_ q=$abc$109383$new_n31992_
+.subckt nexor2_x0 i0=$abc$109383$new_n31992_ i1=$abc$109383$new_n31989_ nq=$abc$109383$new_n31993_
+.subckt nexor2_x0 i0=$abc$109383$new_n31993_ i1=$abc$109383$new_n31954_ nq=$abc$109383$new_n31994_
+.subckt nexor2_x0 i0=$abc$109383$new_n31994_ i1=$abc$109383$new_n31866_ nq=$abc$109383$new_n31995_
+.subckt or2_x1 i0=$abc$109383$new_n31995_ i1=$abc$109383$new_n31864_ q=$abc$109383$new_n31996_
 .subckt nand2_x0 i0=$abc$109383$new_n31995_ i1=$abc$109383$new_n31864_ nq=$abc$109383$new_n31997_
 .subckt nand3_x0 i0=$abc$109383$new_n31997_ i1=$abc$109383$new_n31996_ i2=$abc$109383$new_n31841_ nq=$abc$109383$new_n31998_
-.subckt oa22_x2 i0=$abc$109383$new_n31997_ i1=$abc$109383$new_n31996_ i2=$abc$109383$new_n31841_ q=$abc$109383$new_n31999_
+.subckt or21nand_x1 i0=$abc$109383$new_n31997_ i1=$abc$109383$new_n31996_ i2=$abc$109383$new_n31841_ nq=$abc$109383$new_n31999_
 .subckt nand3_x0 i0=$abc$109383$new_n31999_ i1=$abc$109383$new_n31998_ i2=$abc$109383$new_n31836_ nq=$abc$109383$new_n32000_
-.subckt oa22_x2 i0=$abc$109383$new_n31999_ i1=$abc$109383$new_n31998_ i2=$abc$109383$new_n31836_ q=$abc$109383$new_n32001_
+.subckt or21nand_x1 i0=$abc$109383$new_n31999_ i1=$abc$109383$new_n31998_ i2=$abc$109383$new_n31836_ nq=$abc$109383$new_n32001_
 .subckt nand3_x0 i0=$abc$109383$new_n32001_ i1=$abc$109383$new_n32000_ i2=$abc$109383$new_n31833_ nq=$abc$109383$new_n32002_
-.subckt oa22_x2 i0=$abc$109383$new_n32001_ i1=$abc$109383$new_n32000_ i2=$abc$109383$new_n31833_ q=$abc$109383$new_n32003_
-.subckt a2_x2 i0=$abc$109383$new_n32003_ i1=$abc$109383$new_n32002_ q=$abc$109383$new_n32004_
+.subckt or21nand_x1 i0=$abc$109383$new_n32001_ i1=$abc$109383$new_n32000_ i2=$abc$109383$new_n31833_ nq=$abc$109383$new_n32003_
+.subckt and2_x1 i0=$abc$109383$new_n32003_ i1=$abc$109383$new_n32002_ q=$abc$109383$new_n32004_
 .subckt nor3_x0 i0=$abc$109383$new_n32004_ i1=$abc$109383$new_n31831_ i2=$abc$109383$new_n31823_ nq=$abc$109383$new_n32005_
-.subckt ao22_x2 i0=$abc$109383$new_n31823_ i1=$abc$109383$new_n31831_ i2=$abc$109383$new_n32004_ q=$abc$109383$new_n32006_
+.subckt and21nor_x1 i0=$abc$109383$new_n31823_ i1=$abc$109383$new_n31831_ i2=$abc$109383$new_n32004_ nq=$abc$109383$new_n32006_
 .subckt nor2_x0 i0=$abc$109383$new_n32006_ i1=$abc$109383$new_n32005_ nq=$abc$109383$new_n32007_
 .subckt buf_x4 i=$abc$109383$new_n29222_ q=$abc$109383$new_n32008_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n32007_ i2=$abc$109383$new_n31812_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102830
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[19] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n32010_
-.subckt a3_x2 i0=$abc$109383$new_n31997_ i1=$abc$109383$new_n31996_ i2=$abc$109383$new_n31841_ q=$abc$109383$new_n32011_
-.subckt oa22_x2 i0=$abc$109383$new_n31836_ i1=$abc$109383$new_n31999_ i2=$abc$109383$new_n32011_ q=$abc$109383$new_n32012_
-.subckt o2_x2 i0=$abc$109383$new_n31863_ i1=$abc$109383$new_n31852_ q=$abc$109383$new_n32013_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n32007_ i2=$abc$109383$new_n31812_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102830
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[19] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n32010_
+.subckt and3_x1 i0=$abc$109383$new_n31997_ i1=$abc$109383$new_n31996_ i2=$abc$109383$new_n31841_ q=$abc$109383$new_n32011_
+.subckt or21nand_x1 i0=$abc$109383$new_n31836_ i1=$abc$109383$new_n31999_ i2=$abc$109383$new_n32011_ nq=$abc$109383$new_n32012_
+.subckt or2_x1 i0=$abc$109383$new_n31863_ i1=$abc$109383$new_n31852_ q=$abc$109383$new_n32013_
 .subckt nand2_x0 i0=$abc$109383$new_n31994_ i1=$abc$109383$new_n31866_ nq=$abc$109383$new_n32014_
-.subckt ao22_x2 i0=$abc$109383$new_n31864_ i1=$abc$109383$new_n31995_ i2=$abc$109383$new_n32014_ q=$abc$109383$new_n32015_
-.subckt a2_x2 i0=$abc$109383$new_n31715_ i1=$abc$109383$new_n31880_ q=$abc$109383$new_n32016_
+.subckt and21nor_x1 i0=$abc$109383$new_n31864_ i1=$abc$109383$new_n31995_ i2=$abc$109383$new_n32014_ nq=$abc$109383$new_n32015_
+.subckt and2_x1 i0=$abc$109383$new_n31715_ i1=$abc$109383$new_n31880_ q=$abc$109383$new_n32016_
 .subckt nand2_x0 i0=$abc$109383$new_n31883_ i1=$abc$109383$new_n31710_ nq=$abc$109383$new_n32017_
 .subckt nand2_x0 i0=$abc$109383$new_n29314_ i1=$abc$109383$new_n29656_ nq=$abc$109383$new_n32018_
-.subckt nxr2_x1 i0=$abc$109383$new_n31705_ i1=$abc$109383$new_n32018_ nq=$abc$109383$new_n32019_
-.subckt oa22_x2 i0=$abc$109383$new_n32019_ i1=$abc$109383$new_n32017_ i2=$abc$109383$new_n32016_ q=$abc$109383$new_n32020_
+.subckt nexor2_x0 i0=$abc$109383$new_n31705_ i1=$abc$109383$new_n32018_ nq=$abc$109383$new_n32019_
+.subckt or21nand_x1 i0=$abc$109383$new_n32019_ i1=$abc$109383$new_n32017_ i2=$abc$109383$new_n32016_ nq=$abc$109383$new_n32020_
 .subckt nand2_x0 i0=$abc$109383$new_n31901_ i1=$abc$109383$new_n32020_ nq=$abc$109383$new_n32021_
-.subckt nxr2_x1 i0=$abc$109383$new_n31901_ i1=$abc$109383$new_n32020_ nq=$abc$109383$new_n32022_
+.subckt nexor2_x0 i0=$abc$109383$new_n31901_ i1=$abc$109383$new_n32020_ nq=$abc$109383$new_n32022_
 .subckt nand4_x0 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29374_ i2=$abc$109383$new_n29678_ i3=$abc$109383$new_n29667_ nq=$abc$109383$new_n32023_
-.subckt a2_x2 i0=$abc$109383$new_n31875_ i1=$abc$109383$new_n31703_ q=$abc$109383$new_n32024_
-.subckt ao22_x2 i0=$abc$109383$new_n32018_ i1=$abc$109383$new_n32024_ i2=$abc$109383$new_n32023_ q=$abc$109383$new_n32025_
-.subckt ao22_x2 i0=$abc$109383$new_n32025_ i1=$abc$109383$new_n32022_ i2=$abc$109383$new_n32021_ q=$abc$109383$new_n32026_
-.subckt a2_x2 i0=$abc$109383$new_n31794_ i1=$abc$109383$new_n31872_ q=$abc$109383$new_n32027_
+.subckt and2_x1 i0=$abc$109383$new_n31875_ i1=$abc$109383$new_n31703_ q=$abc$109383$new_n32024_
+.subckt and21nor_x1 i0=$abc$109383$new_n32018_ i1=$abc$109383$new_n32024_ i2=$abc$109383$new_n32023_ nq=$abc$109383$new_n32025_
+.subckt and21nor_x1 i0=$abc$109383$new_n32025_ i1=$abc$109383$new_n32022_ i2=$abc$109383$new_n32021_ nq=$abc$109383$new_n32026_
+.subckt and2_x1 i0=$abc$109383$new_n31794_ i1=$abc$109383$new_n31872_ q=$abc$109383$new_n32027_
 .subckt nand2_x0 i0=$abc$109383$new_n31952_ i1=$abc$109383$new_n32027_ nq=$abc$109383$new_n32028_
-.subckt nxr2_x1 i0=$abc$109383$new_n31952_ i1=$abc$109383$new_n32027_ nq=$abc$109383$new_n32029_
+.subckt nexor2_x0 i0=$abc$109383$new_n31952_ i1=$abc$109383$new_n32027_ nq=$abc$109383$new_n32029_
 .subckt nand2_x0 i0=$abc$109383$new_n31764_ i1=$abc$109383$new_n31868_ nq=$abc$109383$new_n32030_
-.subckt a2_x2 i0=$abc$109383$new_n31732_ i1=$abc$109383$new_n31586_ q=$abc$109383$new_n32031_
+.subckt and2_x1 i0=$abc$109383$new_n31732_ i1=$abc$109383$new_n31586_ q=$abc$109383$new_n32031_
 .subckt nand2_x0 i0=$abc$109383$new_n31590_ i1=$abc$109383$new_n31735_ nq=$abc$109383$new_n32032_
-.subckt oa22_x2 i0=$abc$109383$new_n31726_ i1=$abc$109383$new_n32032_ i2=$abc$109383$new_n32031_ q=$abc$109383$new_n32033_
-.subckt nxr2_x1 i0=$abc$109383$new_n31763_ i1=$abc$109383$new_n32033_ nq=$abc$109383$new_n32034_
-.subckt a2_x2 i0=$abc$109383$new_n32034_ i1=$abc$109383$new_n31729_ q=$abc$109383$new_n32035_
-.subckt ao22_x2 i0=$abc$109383$new_n31719_ i1=$abc$109383$new_n32035_ i2=$abc$109383$new_n32030_ q=$abc$109383$new_n32036_
-.subckt ao22_x2 i0=$abc$109383$new_n32036_ i1=$abc$109383$new_n32029_ i2=$abc$109383$new_n32028_ q=$abc$109383$new_n32037_
-.subckt nxr2_x1 i0=$abc$109383$new_n32037_ i1=$abc$109383$new_n32026_ nq=$abc$109383$new_n32038_
-.subckt nxr2_x1 i0=$abc$109383$new_n31953_ i1=$abc$109383$new_n32036_ nq=$abc$109383$new_n32039_
+.subckt or21nand_x1 i0=$abc$109383$new_n31726_ i1=$abc$109383$new_n32032_ i2=$abc$109383$new_n32031_ nq=$abc$109383$new_n32033_
+.subckt nexor2_x0 i0=$abc$109383$new_n31763_ i1=$abc$109383$new_n32033_ nq=$abc$109383$new_n32034_
+.subckt and2_x1 i0=$abc$109383$new_n32034_ i1=$abc$109383$new_n31729_ q=$abc$109383$new_n32035_
+.subckt and21nor_x1 i0=$abc$109383$new_n31719_ i1=$abc$109383$new_n32035_ i2=$abc$109383$new_n32030_ nq=$abc$109383$new_n32036_
+.subckt and21nor_x1 i0=$abc$109383$new_n32036_ i1=$abc$109383$new_n32029_ i2=$abc$109383$new_n32028_ nq=$abc$109383$new_n32037_
+.subckt nexor2_x0 i0=$abc$109383$new_n32037_ i1=$abc$109383$new_n32026_ nq=$abc$109383$new_n32038_
+.subckt nexor2_x0 i0=$abc$109383$new_n31953_ i1=$abc$109383$new_n32036_ nq=$abc$109383$new_n32039_
 .subckt nand2_x0 i0=$abc$109383$new_n31993_ i1=$abc$109383$new_n32039_ nq=$abc$109383$new_n32040_
-.subckt a2_x2 i0=$abc$109383$new_n31906_ i1=$abc$109383$new_n31752_ q=$abc$109383$new_n32041_
-.subckt oa22_x2 i0=$abc$109383$new_n32033_ i1=$abc$109383$new_n31763_ i2=$abc$109383$new_n32041_ q=$abc$109383$new_n32042_
-.subckt a2_x2 i0=$abc$109383$new_n31950_ i1=$abc$109383$new_n32042_ q=$abc$109383$new_n32043_
-.subckt nxr2_x1 i0=$abc$109383$new_n31902_ i1=$abc$109383$new_n32025_ nq=$abc$109383$new_n32044_
-.subckt oa22_x2 i0=$abc$109383$new_n32044_ i1=$abc$109383$new_n31951_ i2=$abc$109383$new_n32043_ q=$abc$109383$new_n32045_
+.subckt and2_x1 i0=$abc$109383$new_n31906_ i1=$abc$109383$new_n31752_ q=$abc$109383$new_n32041_
+.subckt or21nand_x1 i0=$abc$109383$new_n32033_ i1=$abc$109383$new_n31763_ i2=$abc$109383$new_n32041_ nq=$abc$109383$new_n32042_
+.subckt and2_x1 i0=$abc$109383$new_n31950_ i1=$abc$109383$new_n32042_ q=$abc$109383$new_n32043_
+.subckt nexor2_x0 i0=$abc$109383$new_n31902_ i1=$abc$109383$new_n32025_ nq=$abc$109383$new_n32044_
+.subckt or21nand_x1 i0=$abc$109383$new_n32044_ i1=$abc$109383$new_n31951_ i2=$abc$109383$new_n32043_ nq=$abc$109383$new_n32045_
 .subckt nand2_x0 i0=$abc$109383$new_n31988_ i1=$abc$109383$new_n31956_ nq=$abc$109383$new_n32046_
-.subckt a4_x2 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29373_ i2=soc.cpu.minerva.payload__src1$44[17] i3=$abc$109383$new_n29677_ q=$abc$109383$new_n32047_
+.subckt and4_x1 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29373_ i2=soc.cpu.minerva.payload__src1$44[17] i3=$abc$109383$new_n29677_ q=$abc$109383$new_n32047_
 .subckt nand2_x0 i0=$abc$109383$new_n29373_ i1=soc.cpu.minerva.payload__src1$44[17] nq=$abc$109383$new_n32048_
 .subckt nand2_x0 i0=$abc$109383$new_n32048_ i1=$abc$109383$new_n31887_ nq=$abc$109383$new_n32049_
-.subckt oa22_x2 i0=$abc$109383$new_n31886_ i1=$abc$109383$new_n32049_ i2=$abc$109383$new_n32047_ q=$abc$109383$new_n32050_
+.subckt or21nand_x1 i0=$abc$109383$new_n31886_ i1=$abc$109383$new_n32049_ i2=$abc$109383$new_n32047_ nq=$abc$109383$new_n32050_
 .subckt buf_x4 i=$abc$109383$new_n31381_ q=$abc$109383$new_n32051_
-.subckt a4_x2 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29230_ i2=$abc$109383$new_n29623_ i3=$abc$109383$new_n29599_ q=$abc$109383$new_n32052_
+.subckt and4_x1 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29230_ i2=$abc$109383$new_n29623_ i3=$abc$109383$new_n29599_ q=$abc$109383$new_n32052_
 .subckt nand2_x0 i0=$abc$109383$new_n31892_ i1=$abc$109383$new_n31712_ nq=$abc$109383$new_n32053_
-.subckt oa22_x2 i0=$abc$109383$new_n31882_ i1=$abc$109383$new_n32053_ i2=$abc$109383$new_n32052_ q=$abc$109383$new_n32054_
+.subckt or21nand_x1 i0=$abc$109383$new_n31882_ i1=$abc$109383$new_n32053_ i2=$abc$109383$new_n32052_ nq=$abc$109383$new_n32054_
 .subckt nand2_x0 i0=$abc$109383$new_n31899_ i1=$abc$109383$new_n32054_ nq=$abc$109383$new_n32055_
-.subckt a2_x2 i0=$abc$109383$new_n29243_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n32056_
-.subckt nxr2_x1 i0=$abc$109383$new_n31898_ i1=$abc$109383$new_n32056_ nq=$abc$109383$new_n32057_
-.subckt a2_x2 i0=$abc$109383$new_n32057_ i1=$abc$109383$new_n31894_ q=$abc$109383$new_n32058_
-.subckt ao22_x2 i0=$abc$109383$new_n31890_ i1=$abc$109383$new_n32058_ i2=$abc$109383$new_n32055_ q=$abc$109383$new_n32059_
-.subckt a2_x2 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[19] q=$abc$109383$new_n32060_
+.subckt and2_x1 i0=$abc$109383$new_n29243_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n32056_
+.subckt nexor2_x0 i0=$abc$109383$new_n31898_ i1=$abc$109383$new_n32056_ nq=$abc$109383$new_n32057_
+.subckt and2_x1 i0=$abc$109383$new_n32057_ i1=$abc$109383$new_n31894_ q=$abc$109383$new_n32058_
+.subckt and21nor_x1 i0=$abc$109383$new_n31890_ i1=$abc$109383$new_n32058_ i2=$abc$109383$new_n32055_ nq=$abc$109383$new_n32059_
+.subckt and2_x1 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[19] q=$abc$109383$new_n32060_
 .subckt nand2_x0 i0=$abc$109383$new_n29255_ i1=soc.cpu.minerva.payload__src1$44[17] nq=$abc$109383$new_n32061_
-.subckt a2_x2 i0=$abc$109383$new_n29372_ i1=$abc$109383$new_n29633_ q=$abc$109383$new_n32062_
-.subckt nxr2_x1 i0=$abc$109383$new_n32062_ i1=$abc$109383$new_n32061_ nq=$abc$109383$new_n32063_
-.subckt nxr2_x1 i0=$abc$109383$new_n32063_ i1=$abc$109383$new_n32060_ nq=$abc$109383$new_n32064_
+.subckt and2_x1 i0=$abc$109383$new_n29372_ i1=$abc$109383$new_n29633_ q=$abc$109383$new_n32062_
+.subckt nexor2_x0 i0=$abc$109383$new_n32062_ i1=$abc$109383$new_n32061_ nq=$abc$109383$new_n32063_
+.subckt nexor2_x0 i0=$abc$109383$new_n32063_ i1=$abc$109383$new_n32060_ nq=$abc$109383$new_n32064_
 .subckt nand4_x0 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29230_ i2=$abc$109383$new_n29646_ i3=$abc$109383$new_n29623_ nq=$abc$109383$new_n32065_
 .subckt nand2_x0 i0=$abc$109383$new_n29230_ i1=$abc$109383$new_n29646_ nq=$abc$109383$new_n32066_
-.subckt a2_x2 i0=$abc$109383$new_n32066_ i1=$abc$109383$new_n31896_ q=$abc$109383$new_n32067_
-.subckt ao22_x2 i0=$abc$109383$new_n31895_ i1=$abc$109383$new_n32067_ i2=$abc$109383$new_n32065_ q=$abc$109383$new_n32068_
+.subckt and2_x1 i0=$abc$109383$new_n32066_ i1=$abc$109383$new_n31896_ q=$abc$109383$new_n32067_
+.subckt and21nor_x1 i0=$abc$109383$new_n31895_ i1=$abc$109383$new_n32067_ i2=$abc$109383$new_n32065_ nq=$abc$109383$new_n32068_
 .subckt nand2_x0 i0=$abc$109383$new_n29243_ i1=$abc$109383$new_n29677_ nq=$abc$109383$new_n32069_
 .subckt nand2_x0 i0=$abc$109383$new_n31381_ i1=soc.cpu.minerva.payload__src1$44[14] nq=$abc$109383$new_n32070_
-.subckt a2_x2 i0=$abc$109383$new_n29229_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n32071_
-.subckt nxr2_x1 i0=$abc$109383$new_n32071_ i1=$abc$109383$new_n32070_ nq=$abc$109383$new_n32072_
-.subckt nxr2_x1 i0=$abc$109383$new_n32072_ i1=$abc$109383$new_n32069_ nq=$abc$109383$new_n32073_
-.subckt nxr2_x1 i0=$abc$109383$new_n32073_ i1=$abc$109383$new_n32068_ nq=$abc$109383$new_n32074_
-.subckt nxr2_x1 i0=$abc$109383$new_n32074_ i1=$abc$109383$new_n32064_ nq=$abc$109383$new_n32075_
-.subckt nxr2_x1 i0=$abc$109383$new_n32075_ i1=$abc$109383$new_n32059_ nq=$abc$109383$new_n32076_
-.subckt nxr2_x1 i0=$abc$109383$new_n32076_ i1=$abc$109383$new_n32050_ nq=$abc$109383$new_n32077_
-.subckt a2_x2 i0=$abc$109383$new_n31784_ i1=$abc$109383$new_n31941_ q=$abc$109383$new_n32078_
+.subckt and2_x1 i0=$abc$109383$new_n29229_ i1=soc.cpu.minerva.payload__src1$44[15] q=$abc$109383$new_n32071_
+.subckt nexor2_x0 i0=$abc$109383$new_n32071_ i1=$abc$109383$new_n32070_ nq=$abc$109383$new_n32072_
+.subckt nexor2_x0 i0=$abc$109383$new_n32072_ i1=$abc$109383$new_n32069_ nq=$abc$109383$new_n32073_
+.subckt nexor2_x0 i0=$abc$109383$new_n32073_ i1=$abc$109383$new_n32068_ nq=$abc$109383$new_n32074_
+.subckt nexor2_x0 i0=$abc$109383$new_n32074_ i1=$abc$109383$new_n32064_ nq=$abc$109383$new_n32075_
+.subckt nexor2_x0 i0=$abc$109383$new_n32075_ i1=$abc$109383$new_n32059_ nq=$abc$109383$new_n32076_
+.subckt nexor2_x0 i0=$abc$109383$new_n32076_ i1=$abc$109383$new_n32050_ nq=$abc$109383$new_n32077_
+.subckt and2_x1 i0=$abc$109383$new_n31784_ i1=$abc$109383$new_n31941_ q=$abc$109383$new_n32078_
 .subckt nand2_x0 i0=$abc$109383$new_n31944_ i1=$abc$109383$new_n31779_ nq=$abc$109383$new_n32079_
-.subckt oa22_x2 i0=$abc$109383$new_n31775_ i1=$abc$109383$new_n32079_ i2=$abc$109383$new_n32078_ q=$abc$109383$new_n32080_
+.subckt or21nand_x1 i0=$abc$109383$new_n31775_ i1=$abc$109383$new_n32079_ i2=$abc$109383$new_n32078_ nq=$abc$109383$new_n32080_
 .subckt nand2_x0 i0=$abc$109383$new_n32080_ i1=$abc$109383$new_n31938_ nq=$abc$109383$new_n32081_
 .subckt buf_x4 i=$abc$109383$new_n31410_ q=$abc$109383$new_n32082_
-.subckt a4_x2 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n32082_ i2=$abc$109383$new_n29549_ i3=$abc$109383$new_n29525_ q=$abc$109383$new_n32083_
+.subckt and4_x1 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n32082_ i2=$abc$109383$new_n29549_ i3=$abc$109383$new_n29525_ q=$abc$109383$new_n32083_
 .subckt nand2_x0 i0=$abc$109383$new_n31925_ i1=$abc$109383$new_n31743_ nq=$abc$109383$new_n32084_
-.subckt oa22_x2 i0=$abc$109383$new_n31920_ i1=$abc$109383$new_n32084_ i2=$abc$109383$new_n32083_ q=$abc$109383$new_n32085_
-.subckt nxr2_x1 i0=$abc$109383$new_n31937_ i1=$abc$109383$new_n32085_ nq=$abc$109383$new_n32086_
-.subckt nxr2_x1 i0=$abc$109383$new_n31948_ i1=$abc$109383$new_n32086_ nq=$abc$109383$new_n32087_
-.subckt ao22_x2 i0=$abc$109383$new_n31923_ i1=$abc$109383$new_n32087_ i2=$abc$109383$new_n32081_ q=$abc$109383$new_n32088_
+.subckt or21nand_x1 i0=$abc$109383$new_n31920_ i1=$abc$109383$new_n32084_ i2=$abc$109383$new_n32083_ nq=$abc$109383$new_n32085_
+.subckt nexor2_x0 i0=$abc$109383$new_n31937_ i1=$abc$109383$new_n32085_ nq=$abc$109383$new_n32086_
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+.subckt and21nor_x1 i0=$abc$109383$new_n31923_ i1=$abc$109383$new_n32087_ i2=$abc$109383$new_n32081_ nq=$abc$109383$new_n32088_
 .subckt buf_x4 i=$abc$109383$new_n30911_ q=$abc$109383$new_n32089_
-.subckt a4_x2 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29346_ i3=$abc$109383$new_n29325_ q=$abc$109383$new_n32090_
+.subckt and4_x1 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29346_ i3=$abc$109383$new_n29325_ q=$abc$109383$new_n32090_
 .subckt nand2_x0 i0=$abc$109383$new_n31934_ i1=$abc$109383$new_n31772_ nq=$abc$109383$new_n32091_
-.subckt oa22_x2 i0=$abc$109383$new_n31946_ i1=$abc$109383$new_n32091_ i2=$abc$109383$new_n32090_ q=$abc$109383$new_n32092_
+.subckt or21nand_x1 i0=$abc$109383$new_n31946_ i1=$abc$109383$new_n32091_ i2=$abc$109383$new_n32090_ nq=$abc$109383$new_n32092_
 .subckt nand2_x0 i0=$abc$109383$new_n32092_ i1=$abc$109383$new_n31932_ nq=$abc$109383$new_n32093_
-.subckt a2_x2 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29599_ q=$abc$109383$new_n32094_
-.subckt nxr2_x1 i0=$abc$109383$new_n31931_ i1=$abc$109383$new_n32094_ nq=$abc$109383$new_n32095_
-.subckt a2_x2 i0=$abc$109383$new_n31936_ i1=$abc$109383$new_n32095_ q=$abc$109383$new_n32096_
-.subckt ao22_x2 i0=$abc$109383$new_n31927_ i1=$abc$109383$new_n32096_ i2=$abc$109383$new_n32093_ q=$abc$109383$new_n32097_
+.subckt and2_x1 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29599_ q=$abc$109383$new_n32094_
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+.subckt and21nor_x1 i0=$abc$109383$new_n31927_ i1=$abc$109383$new_n32096_ i2=$abc$109383$new_n32093_ nq=$abc$109383$new_n32097_
 .subckt nand4_x0 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n32082_ i2=$abc$109383$new_n29573_ i3=$abc$109383$new_n29549_ nq=$abc$109383$new_n32098_
 .subckt nand2_x0 i0=$abc$109383$new_n31410_ i1=$abc$109383$new_n29573_ nq=$abc$109383$new_n32099_
-.subckt a2_x2 i0=$abc$109383$new_n32099_ i1=$abc$109383$new_n31929_ q=$abc$109383$new_n32100_
-.subckt ao22_x2 i0=$abc$109383$new_n31928_ i1=$abc$109383$new_n32100_ i2=$abc$109383$new_n32098_ q=$abc$109383$new_n32101_
+.subckt and2_x1 i0=$abc$109383$new_n32099_ i1=$abc$109383$new_n31929_ q=$abc$109383$new_n32100_
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 .subckt nand2_x0 i0=$abc$109383$new_n30459_ i1=$abc$109383$new_n29623_ nq=$abc$109383$new_n32102_
 .subckt nand2_x0 i0=$abc$109383$new_n31224_ i1=$abc$109383$new_n29572_ nq=$abc$109383$new_n32103_
-.subckt a2_x2 i0=$abc$109383$new_n30535_ i1=$abc$109383$new_n29598_ q=$abc$109383$new_n32104_
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 .subckt nand4_x0 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29502_ i3=$abc$109383$new_n29346_ nq=$abc$109383$new_n32107_
 .subckt nand2_x0 i0=$abc$109383$new_n30911_ i1=$abc$109383$new_n29346_ nq=$abc$109383$new_n32108_
 .subckt nand2_x0 i0=$abc$109383$new_n30797_ i1=$abc$109383$new_n29502_ nq=$abc$109383$new_n32109_
-.subckt a2_x2 i0=$abc$109383$new_n32109_ i1=$abc$109383$new_n32108_ q=$abc$109383$new_n32110_
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 .subckt nand2_x0 i0=$abc$109383$new_n30704_ i1=$abc$109383$new_n29524_ nq=$abc$109383$new_n32111_
-.subckt ao22_x2 i0=$abc$109383$new_n32111_ i1=$abc$109383$new_n32110_ i2=$abc$109383$new_n32107_ q=$abc$109383$new_n32112_
-.subckt nxr2_x1 i0=$abc$109383$new_n32112_ i1=$abc$109383$new_n32106_ nq=$abc$109383$new_n32113_
-.subckt nxr2_x1 i0=$abc$109383$new_n32113_ i1=$abc$109383$new_n32101_ nq=$abc$109383$new_n32114_
-.subckt a4_x2 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n31962_ i2=$abc$109383$new_n29268_ i3=$abc$109383$new_n29414_ q=$abc$109383$new_n32115_
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+.subckt nexor2_x0 i0=$abc$109383$new_n32112_ i1=$abc$109383$new_n32106_ nq=$abc$109383$new_n32113_
+.subckt nexor2_x0 i0=$abc$109383$new_n32113_ i1=$abc$109383$new_n32101_ nq=$abc$109383$new_n32114_
+.subckt and4_x1 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n31962_ i2=$abc$109383$new_n29268_ i3=$abc$109383$new_n29414_ q=$abc$109383$new_n32115_
 .subckt nand2_x0 i0=$abc$109383$new_n31965_ i1=$abc$109383$new_n31781_ nq=$abc$109383$new_n32116_
-.subckt oa22_x2 i0=$abc$109383$new_n31943_ i1=$abc$109383$new_n32116_ i2=$abc$109383$new_n32115_ q=$abc$109383$new_n32117_
+.subckt or21nand_x1 i0=$abc$109383$new_n31943_ i1=$abc$109383$new_n32116_ i2=$abc$109383$new_n32115_ nq=$abc$109383$new_n32117_
 .subckt nand2_x0 i0=$abc$109383$new_n31972_ i1=$abc$109383$new_n32117_ nq=$abc$109383$new_n32118_
-.subckt a2_x2 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29324_ q=$abc$109383$new_n32119_
-.subckt nxr2_x1 i0=$abc$109383$new_n31971_ i1=$abc$109383$new_n32119_ nq=$abc$109383$new_n32120_
-.subckt a2_x2 i0=$abc$109383$new_n32120_ i1=$abc$109383$new_n31967_ q=$abc$109383$new_n32121_
-.subckt nxr2_x1 i0=$abc$109383$new_n31958_ i1=$abc$109383$new_n32108_ nq=$abc$109383$new_n32122_
-.subckt nxr2_x1 i0=$abc$109383$new_n31960_ i1=$abc$109383$new_n32122_ nq=$abc$109383$new_n32123_
-.subckt ao22_x2 i0=$abc$109383$new_n32123_ i1=$abc$109383$new_n32121_ i2=$abc$109383$new_n32118_ q=$abc$109383$new_n32124_
-.subckt nxr2_x1 i0=$abc$109383$new_n32124_ i1=$abc$109383$new_n32114_ nq=$abc$109383$new_n32125_
-.subckt nxr2_x1 i0=$abc$109383$new_n32125_ i1=$abc$109383$new_n32097_ nq=$abc$109383$new_n32126_
-.subckt nxr2_x1 i0=$abc$109383$new_n32126_ i1=$abc$109383$new_n32088_ nq=$abc$109383$new_n32127_
-.subckt nxr2_x1 i0=$abc$109383$new_n32127_ i1=$abc$109383$new_n32077_ nq=$abc$109383$new_n32128_
-.subckt nxr2_x1 i0=$abc$109383$new_n32128_ i1=$abc$109383$new_n32046_ nq=$abc$109383$new_n32129_
-.subckt nxr2_x1 i0=$abc$109383$new_n32129_ i1=$abc$109383$new_n32045_ nq=$abc$109383$new_n32130_
+.subckt and2_x1 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29324_ q=$abc$109383$new_n32119_
+.subckt nexor2_x0 i0=$abc$109383$new_n31971_ i1=$abc$109383$new_n32119_ nq=$abc$109383$new_n32120_
+.subckt and2_x1 i0=$abc$109383$new_n32120_ i1=$abc$109383$new_n31967_ q=$abc$109383$new_n32121_
+.subckt nexor2_x0 i0=$abc$109383$new_n31958_ i1=$abc$109383$new_n32108_ nq=$abc$109383$new_n32122_
+.subckt nexor2_x0 i0=$abc$109383$new_n31960_ i1=$abc$109383$new_n32122_ nq=$abc$109383$new_n32123_
+.subckt and21nor_x1 i0=$abc$109383$new_n32123_ i1=$abc$109383$new_n32121_ i2=$abc$109383$new_n32118_ nq=$abc$109383$new_n32124_
+.subckt nexor2_x0 i0=$abc$109383$new_n32124_ i1=$abc$109383$new_n32114_ nq=$abc$109383$new_n32125_
+.subckt nexor2_x0 i0=$abc$109383$new_n32125_ i1=$abc$109383$new_n32097_ nq=$abc$109383$new_n32126_
+.subckt nexor2_x0 i0=$abc$109383$new_n32126_ i1=$abc$109383$new_n32088_ nq=$abc$109383$new_n32127_
+.subckt nexor2_x0 i0=$abc$109383$new_n32127_ i1=$abc$109383$new_n32077_ nq=$abc$109383$new_n32128_
+.subckt nexor2_x0 i0=$abc$109383$new_n32128_ i1=$abc$109383$new_n32046_ nq=$abc$109383$new_n32129_
+.subckt nexor2_x0 i0=$abc$109383$new_n32129_ i1=$abc$109383$new_n32045_ nq=$abc$109383$new_n32130_
 .subckt nand2_x0 i0=$abc$109383$new_n31793_ i1=$abc$109383$new_n31955_ nq=$abc$109383$new_n32131_
-.subckt nxr2_x1 i0=$abc$109383$new_n31988_ i1=$abc$109383$new_n32131_ nq=$abc$109383$new_n32132_
+.subckt nexor2_x0 i0=$abc$109383$new_n31988_ i1=$abc$109383$new_n32131_ nq=$abc$109383$new_n32132_
 .subckt nand2_x0 i0=$abc$109383$new_n31992_ i1=$abc$109383$new_n32132_ nq=$abc$109383$new_n32133_
-.subckt a2_x2 i0=$abc$109383$new_n31792_ i1=$abc$109383$new_n31975_ q=$abc$109383$new_n32134_
-.subckt a2_x2 i0=$abc$109383$new_n31986_ i1=$abc$109383$new_n32134_ q=$abc$109383$new_n32135_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n31627_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29445_ q=$abc$109383$new_n32136_
+.subckt and2_x1 i0=$abc$109383$new_n31792_ i1=$abc$109383$new_n31975_ q=$abc$109383$new_n32134_
+.subckt and2_x1 i0=$abc$109383$new_n31986_ i1=$abc$109383$new_n32134_ q=$abc$109383$new_n32135_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n31627_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29445_ q=$abc$109383$new_n32136_
 .subckt nand2_x0 i0=$abc$109383$new_n31978_ i1=$abc$109383$new_n31789_ nq=$abc$109383$new_n32137_
-.subckt a2_x2 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29389_ q=$abc$109383$new_n32138_
-.subckt oa22_x2 i0=$abc$109383$new_n32138_ i1=$abc$109383$new_n32137_ i2=$abc$109383$new_n32136_ q=$abc$109383$new_n32139_
-.subckt nxr2_x1 i0=$abc$109383$new_n31985_ i1=$abc$109383$new_n32139_ nq=$abc$109383$new_n32140_
+.subckt and2_x1 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29389_ q=$abc$109383$new_n32138_
+.subckt or21nand_x1 i0=$abc$109383$new_n32138_ i1=$abc$109383$new_n32137_ i2=$abc$109383$new_n32136_ nq=$abc$109383$new_n32139_
+.subckt nexor2_x0 i0=$abc$109383$new_n31985_ i1=$abc$109383$new_n32139_ nq=$abc$109383$new_n32140_
 .subckt nand2_x0 i0=$abc$109383$new_n32140_ i1=$abc$109383$new_n31976_ nq=$abc$109383$new_n32141_
-.subckt nxr2_x1 i0=$abc$109383$new_n31973_ i1=$abc$109383$new_n32123_ nq=$abc$109383$new_n32142_
-.subckt oa22_x2 i0=$abc$109383$new_n32142_ i1=$abc$109383$new_n32141_ i2=$abc$109383$new_n32135_ q=$abc$109383$new_n32143_
+.subckt nexor2_x0 i0=$abc$109383$new_n31973_ i1=$abc$109383$new_n32123_ nq=$abc$109383$new_n32142_
+.subckt or21nand_x1 i0=$abc$109383$new_n32142_ i1=$abc$109383$new_n32141_ i2=$abc$109383$new_n32135_ nq=$abc$109383$new_n32143_
 .subckt nand2_x0 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29549_ nq=$abc$109383$new_n32144_
 .subckt nand2_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n29502_ nq=$abc$109383$new_n32145_
-.subckt a2_x2 i0=$abc$109383$new_n31569_ i1=$abc$109383$new_n29525_ q=$abc$109383$new_n32146_
-.subckt nxr2_x1 i0=$abc$109383$new_n32146_ i1=$abc$109383$new_n32145_ nq=$abc$109383$new_n32147_
-.subckt nxr2_x1 i0=$abc$109383$new_n32147_ i1=$abc$109383$new_n32144_ nq=$abc$109383$new_n32148_
+.subckt and2_x1 i0=$abc$109383$new_n31569_ i1=$abc$109383$new_n29525_ q=$abc$109383$new_n32146_
+.subckt nexor2_x0 i0=$abc$109383$new_n32146_ i1=$abc$109383$new_n32145_ nq=$abc$109383$new_n32147_
+.subckt nexor2_x0 i0=$abc$109383$new_n32147_ i1=$abc$109383$new_n32144_ nq=$abc$109383$new_n32148_
 .subckt nand4_x0 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n31962_ i2=$abc$109383$new_n29291_ i3=$abc$109383$new_n29268_ nq=$abc$109383$new_n32149_
 .subckt nand2_x0 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29291_ nq=$abc$109383$new_n32150_
-.subckt a2_x2 i0=$abc$109383$new_n32150_ i1=$abc$109383$new_n31969_ q=$abc$109383$new_n32151_
-.subckt ao22_x2 i0=$abc$109383$new_n31968_ i1=$abc$109383$new_n32151_ i2=$abc$109383$new_n32149_ q=$abc$109383$new_n32152_
+.subckt and2_x1 i0=$abc$109383$new_n32150_ i1=$abc$109383$new_n31969_ q=$abc$109383$new_n32151_
+.subckt and21nor_x1 i0=$abc$109383$new_n31968_ i1=$abc$109383$new_n32151_ i2=$abc$109383$new_n32149_ nq=$abc$109383$new_n32152_
 .subckt nand2_x0 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29347_ nq=$abc$109383$new_n32153_
 .subckt nand2_x0 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n29291_ nq=$abc$109383$new_n32154_
-.subckt a2_x2 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29324_ q=$abc$109383$new_n32155_
-.subckt nxr2_x1 i0=$abc$109383$new_n32155_ i1=$abc$109383$new_n32154_ nq=$abc$109383$new_n32156_
-.subckt nxr2_x1 i0=$abc$109383$new_n32156_ i1=$abc$109383$new_n32153_ nq=$abc$109383$new_n32157_
-.subckt nxr2_x1 i0=$abc$109383$new_n32157_ i1=$abc$109383$new_n32152_ nq=$abc$109383$new_n32158_
-.subckt nxr2_x1 i0=$abc$109383$new_n32158_ i1=$abc$109383$new_n32148_ nq=$abc$109383$new_n32159_
+.subckt and2_x1 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29324_ q=$abc$109383$new_n32155_
+.subckt nexor2_x0 i0=$abc$109383$new_n32155_ i1=$abc$109383$new_n32154_ nq=$abc$109383$new_n32156_
+.subckt nexor2_x0 i0=$abc$109383$new_n32156_ i1=$abc$109383$new_n32153_ nq=$abc$109383$new_n32157_
+.subckt nexor2_x0 i0=$abc$109383$new_n32157_ i1=$abc$109383$new_n32152_ nq=$abc$109383$new_n32158_
+.subckt nexor2_x0 i0=$abc$109383$new_n32158_ i1=$abc$109383$new_n32148_ nq=$abc$109383$new_n32159_
 .subckt nand2_x0 i0=$abc$109383$new_n31985_ i1=$abc$109383$new_n32139_ nq=$abc$109383$new_n32160_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[17] q=$abc$109383$new_n32161_
 .subckt nand4_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n31627_ i2=$abc$109383$new_n29390_ i3=$abc$109383$new_n29445_ nq=$abc$109383$new_n32162_
 .subckt nand2_x0 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29389_ nq=$abc$109383$new_n32163_
-.subckt a2_x2 i0=$abc$109383$new_n32163_ i1=$abc$109383$new_n31982_ q=$abc$109383$new_n32164_
-.subckt ao22_x2 i0=$abc$109383$new_n31981_ i1=$abc$109383$new_n32164_ i2=$abc$109383$new_n32162_ q=$abc$109383$new_n32165_
+.subckt and2_x1 i0=$abc$109383$new_n32163_ i1=$abc$109383$new_n31982_ q=$abc$109383$new_n32164_
+.subckt and21nor_x1 i0=$abc$109383$new_n31981_ i1=$abc$109383$new_n32164_ i2=$abc$109383$new_n32162_ nq=$abc$109383$new_n32165_
 .subckt nand2_x0 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29268_ nq=$abc$109383$new_n32166_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n29389_ nq=$abc$109383$new_n32167_
-.subckt a2_x2 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29414_ q=$abc$109383$new_n32168_
-.subckt nxr2_x1 i0=$abc$109383$new_n32168_ i1=$abc$109383$new_n32167_ nq=$abc$109383$new_n32169_
-.subckt nxr2_x1 i0=$abc$109383$new_n32169_ i1=$abc$109383$new_n32166_ nq=$abc$109383$new_n32170_
-.subckt nxr2_x1 i0=$abc$109383$new_n32170_ i1=$abc$109383$new_n32165_ nq=$abc$109383$new_n32171_
-.subckt nxr2_x1 i0=$abc$109383$new_n32171_ i1=$abc$109383$new_n32160_ nq=$abc$109383$new_n32172_
-.subckt nxr2_x1 i0=$abc$109383$new_n32172_ i1=$abc$109383$new_n32159_ nq=$abc$109383$new_n32173_
-.subckt nxr2_x1 i0=$abc$109383$new_n32173_ i1=$abc$109383$new_n32143_ nq=$abc$109383$new_n32174_
+.subckt and2_x1 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29414_ q=$abc$109383$new_n32168_
+.subckt nexor2_x0 i0=$abc$109383$new_n32168_ i1=$abc$109383$new_n32167_ nq=$abc$109383$new_n32169_
+.subckt nexor2_x0 i0=$abc$109383$new_n32169_ i1=$abc$109383$new_n32166_ nq=$abc$109383$new_n32170_
+.subckt nexor2_x0 i0=$abc$109383$new_n32170_ i1=$abc$109383$new_n32165_ nq=$abc$109383$new_n32171_
+.subckt nexor2_x0 i0=$abc$109383$new_n32171_ i1=$abc$109383$new_n32160_ nq=$abc$109383$new_n32172_
+.subckt nexor2_x0 i0=$abc$109383$new_n32172_ i1=$abc$109383$new_n32159_ nq=$abc$109383$new_n32173_
+.subckt nexor2_x0 i0=$abc$109383$new_n32173_ i1=$abc$109383$new_n32143_ nq=$abc$109383$new_n32174_
 .subckt nand2_x0 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29447_ nq=$abc$109383$new_n32175_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[19] q=$abc$109383$new_n32176_
-.subckt a2_x2 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29472_ q=$abc$109383$new_n32177_
-.subckt nxr2_x1 i0=$abc$109383$new_n32177_ i1=$abc$109383$new_n32175_ nq=$abc$109383$new_n32178_
-.subckt nxr2_x1 i0=$abc$109383$new_n32178_ i1=$abc$109383$new_n32174_ nq=$abc$109383$new_n32179_
-.subckt nxr2_x1 i0=$abc$109383$new_n32179_ i1=$abc$109383$new_n32133_ nq=$abc$109383$new_n32180_
-.subckt nxr2_x1 i0=$abc$109383$new_n32180_ i1=$abc$109383$new_n32130_ nq=$abc$109383$new_n32181_
-.subckt nxr2_x1 i0=$abc$109383$new_n32181_ i1=$abc$109383$new_n32040_ nq=$abc$109383$new_n32182_
-.subckt nxr2_x1 i0=$abc$109383$new_n32182_ i1=$abc$109383$new_n32038_ nq=$abc$109383$new_n32183_
-.subckt nxr2_x1 i0=$abc$109383$new_n32183_ i1=$abc$109383$new_n32015_ nq=$abc$109383$new_n32184_
-.subckt nxr2_x1 i0=$abc$109383$new_n32184_ i1=$abc$109383$new_n32013_ nq=$abc$109383$new_n32185_
-.subckt nxr2_x1 i0=$abc$109383$new_n32185_ i1=$abc$109383$new_n32012_ nq=$abc$109383$new_n32186_
-.subckt a3_x2 i0=$abc$109383$new_n32001_ i1=$abc$109383$new_n32000_ i2=$abc$109383$new_n31833_ q=$abc$109383$new_n32187_
-.subckt ao22_x2 i0=$abc$109383$new_n32187_ i1=$abc$109383$new_n32006_ i2=$abc$109383$new_n32186_ q=$abc$109383$new_n32188_
-.subckt o2_x2 i0=$abc$109383$new_n32188_ i1=$abc$109383$new_n29923_ q=$abc$109383$new_n32189_
+.subckt and2_x1 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29472_ q=$abc$109383$new_n32177_
+.subckt nexor2_x0 i0=$abc$109383$new_n32177_ i1=$abc$109383$new_n32175_ nq=$abc$109383$new_n32178_
+.subckt nexor2_x0 i0=$abc$109383$new_n32178_ i1=$abc$109383$new_n32174_ nq=$abc$109383$new_n32179_
+.subckt nexor2_x0 i0=$abc$109383$new_n32179_ i1=$abc$109383$new_n32133_ nq=$abc$109383$new_n32180_
+.subckt nexor2_x0 i0=$abc$109383$new_n32180_ i1=$abc$109383$new_n32130_ nq=$abc$109383$new_n32181_
+.subckt nexor2_x0 i0=$abc$109383$new_n32181_ i1=$abc$109383$new_n32040_ nq=$abc$109383$new_n32182_
+.subckt nexor2_x0 i0=$abc$109383$new_n32182_ i1=$abc$109383$new_n32038_ nq=$abc$109383$new_n32183_
+.subckt nexor2_x0 i0=$abc$109383$new_n32183_ i1=$abc$109383$new_n32015_ nq=$abc$109383$new_n32184_
+.subckt nexor2_x0 i0=$abc$109383$new_n32184_ i1=$abc$109383$new_n32013_ nq=$abc$109383$new_n32185_
+.subckt nexor2_x0 i0=$abc$109383$new_n32185_ i1=$abc$109383$new_n32012_ nq=$abc$109383$new_n32186_
+.subckt and3_x1 i0=$abc$109383$new_n32001_ i1=$abc$109383$new_n32000_ i2=$abc$109383$new_n31833_ q=$abc$109383$new_n32187_
+.subckt and21nor_x1 i0=$abc$109383$new_n32187_ i1=$abc$109383$new_n32006_ i2=$abc$109383$new_n32186_ nq=$abc$109383$new_n32188_
+.subckt or2_x1 i0=$abc$109383$new_n32188_ i1=$abc$109383$new_n29923_ q=$abc$109383$new_n32189_
 .subckt nor3_x0 i0=$abc$109383$new_n32186_ i1=$abc$109383$new_n32006_ i2=$abc$109383$new_n32187_ nq=$abc$109383$new_n32190_
-.subckt ao22_x2 i0=$abc$109383$new_n32190_ i1=$abc$109383$new_n32189_ i2=$abc$109383$new_n32010_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102834
+.subckt and21nor_x1 i0=$abc$109383$new_n32190_ i1=$abc$109383$new_n32189_ i2=$abc$109383$new_n32010_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102834
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[20] nq=$abc$109383$new_n32192_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n32192_ q=$abc$109383$new_n32193_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n32192_ nq=$abc$109383$new_n32193_
 .subckt nor2_x0 i0=$abc$109383$new_n32193_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n32194_
 .subckt nor2_x0 i0=$abc$109383$new_n31863_ i1=$abc$109383$new_n31852_ nq=$abc$109383$new_n32195_
 .subckt nand2_x0 i0=$abc$109383$new_n32184_ i1=$abc$109383$new_n32195_ nq=$abc$109383$new_n32196_
-.subckt a2_x2 i0=$abc$109383$new_n31994_ i1=$abc$109383$new_n31866_ q=$abc$109383$new_n32197_
+.subckt and2_x1 i0=$abc$109383$new_n31994_ i1=$abc$109383$new_n31866_ q=$abc$109383$new_n32197_
 .subckt nand2_x0 i0=$abc$109383$new_n31795_ i1=$abc$109383$new_n31865_ nq=$abc$109383$new_n32198_
-.subckt nxr2_x1 i0=$abc$109383$new_n31993_ i1=$abc$109383$new_n32039_ nq=$abc$109383$new_n32199_
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-.subckt a2_x2 i0=$abc$109383$new_n29243_ i1=$abc$109383$new_n29677_ q=$abc$109383$new_n32278_
-.subckt nxr2_x1 i0=$abc$109383$new_n32072_ i1=$abc$109383$new_n32278_ nq=$abc$109383$new_n32279_
-.subckt a2_x2 i0=$abc$109383$new_n32279_ i1=$abc$109383$new_n32068_ q=$abc$109383$new_n32280_
-.subckt ao22_x2 i0=$abc$109383$new_n32064_ i1=$abc$109383$new_n32280_ i2=$abc$109383$new_n32277_ q=$abc$109383$new_n32281_
-.subckt a2_x2 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[20] q=$abc$109383$new_n32282_
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+.subckt nexor2_x0 i0=$abc$109383$new_n32072_ i1=$abc$109383$new_n32278_ nq=$abc$109383$new_n32279_
+.subckt and2_x1 i0=$abc$109383$new_n32279_ i1=$abc$109383$new_n32068_ q=$abc$109383$new_n32280_
+.subckt and21nor_x1 i0=$abc$109383$new_n32064_ i1=$abc$109383$new_n32280_ i2=$abc$109383$new_n32277_ nq=$abc$109383$new_n32281_
+.subckt and2_x1 i0=$abc$109383$new_n29313_ i1=soc.cpu.minerva.payload__src1$44[20] q=$abc$109383$new_n32282_
 .subckt nand2_x0 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29633_ nq=$abc$109383$new_n32283_
-.subckt a2_x2 i0=$abc$109383$new_n29373_ i1=soc.cpu.minerva.payload__src1$44[19] q=$abc$109383$new_n32284_
-.subckt nxr2_x1 i0=$abc$109383$new_n32284_ i1=$abc$109383$new_n32283_ nq=$abc$109383$new_n32285_
-.subckt nxr2_x1 i0=$abc$109383$new_n32285_ i1=$abc$109383$new_n32282_ nq=$abc$109383$new_n32286_
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 .subckt nand4_x0 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29230_ i2=$abc$109383$new_n29666_ i3=$abc$109383$new_n29646_ nq=$abc$109383$new_n32287_
 .subckt nand2_x0 i0=$abc$109383$new_n29230_ i1=$abc$109383$new_n29666_ nq=$abc$109383$new_n32288_
-.subckt a2_x2 i0=$abc$109383$new_n32288_ i1=$abc$109383$new_n32070_ q=$abc$109383$new_n32289_
-.subckt ao22_x2 i0=$abc$109383$new_n32069_ i1=$abc$109383$new_n32289_ i2=$abc$109383$new_n32287_ q=$abc$109383$new_n32290_
+.subckt and2_x1 i0=$abc$109383$new_n32288_ i1=$abc$109383$new_n32070_ q=$abc$109383$new_n32289_
+.subckt and21nor_x1 i0=$abc$109383$new_n32069_ i1=$abc$109383$new_n32289_ i2=$abc$109383$new_n32287_ nq=$abc$109383$new_n32290_
 .subckt nand2_x0 i0=$abc$109383$new_n29243_ i1=soc.cpu.minerva.payload__src1$44[17] nq=$abc$109383$new_n32291_
 .subckt nand2_x0 i0=$abc$109383$new_n32051_ i1=soc.cpu.minerva.payload__src1$44[15] nq=$abc$109383$new_n32292_
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 .subckt nand2_x0 i0=$abc$109383$new_n32120_ i1=$abc$109383$new_n31967_ nq=$abc$109383$new_n32301_
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 .subckt nand2_x0 i0=$abc$109383$new_n32302_ i1=$abc$109383$new_n32114_ nq=$abc$109383$new_n32303_
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 .subckt nand2_x0 i0=$abc$109383$new_n32099_ i1=$abc$109383$new_n31929_ nq=$abc$109383$new_n32305_
-.subckt oa22_x2 i0=$abc$109383$new_n32094_ i1=$abc$109383$new_n32305_ i2=$abc$109383$new_n32304_ q=$abc$109383$new_n32306_
-.subckt nxr2_x1 i0=$abc$109383$new_n32113_ i1=$abc$109383$new_n32306_ nq=$abc$109383$new_n32307_
-.subckt nxr2_x1 i0=$abc$109383$new_n32124_ i1=$abc$109383$new_n32307_ nq=$abc$109383$new_n32308_
-.subckt ao22_x2 i0=$abc$109383$new_n32097_ i1=$abc$109383$new_n32308_ i2=$abc$109383$new_n32303_ q=$abc$109383$new_n32309_
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 .subckt buf_x4 i=$abc$109383$new_n31569_ q=$abc$109383$new_n32310_
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 .subckt nand2_x0 i0=$abc$109383$new_n32109_ i1=$abc$109383$new_n32108_ nq=$abc$109383$new_n32312_
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 .subckt nand2_x0 i0=$abc$109383$new_n32313_ i1=$abc$109383$new_n32106_ nq=$abc$109383$new_n32314_
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 .subckt nand4_x0 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n32082_ i2=$abc$109383$new_n29599_ i3=$abc$109383$new_n29574_ nq=$abc$109383$new_n32319_
 .subckt nand2_x0 i0=$abc$109383$new_n32082_ i1=$abc$109383$new_n29599_ nq=$abc$109383$new_n32320_
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 .subckt nand2_x0 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29646_ nq=$abc$109383$new_n32323_
 .subckt nand2_x0 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n29599_ nq=$abc$109383$new_n32324_
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 .subckt nand4_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n31569_ i2=$abc$109383$new_n29525_ i3=$abc$109383$new_n29502_ nq=$abc$109383$new_n32328_
 .subckt nand2_x0 i0=$abc$109383$new_n31569_ i1=$abc$109383$new_n29525_ nq=$abc$109383$new_n32329_
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 .subckt nand2_x0 i0=$abc$109383$new_n32163_ i1=$abc$109383$new_n31982_ nq=$abc$109383$new_n32354_
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+.subckt and2_x1 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29415_ q=$abc$109383$new_n32355_
+.subckt or21nand_x1 i0=$abc$109383$new_n32355_ i1=$abc$109383$new_n32354_ i2=$abc$109383$new_n32353_ nq=$abc$109383$new_n32356_
+.subckt nexor2_x0 i0=$abc$109383$new_n32170_ i1=$abc$109383$new_n32356_ nq=$abc$109383$new_n32357_
 .subckt nand2_x0 i0=$abc$109383$new_n32357_ i1=$abc$109383$new_n32160_ nq=$abc$109383$new_n32358_
-.subckt nxr2_x1 i0=$abc$109383$new_n32158_ i1=$abc$109383$new_n32342_ nq=$abc$109383$new_n32359_
-.subckt oa22_x2 i0=$abc$109383$new_n32359_ i1=$abc$109383$new_n32358_ i2=$abc$109383$new_n32352_ q=$abc$109383$new_n32360_
+.subckt nexor2_x0 i0=$abc$109383$new_n32158_ i1=$abc$109383$new_n32342_ nq=$abc$109383$new_n32359_
+.subckt or21nand_x1 i0=$abc$109383$new_n32359_ i1=$abc$109383$new_n32358_ i2=$abc$109383$new_n32352_ nq=$abc$109383$new_n32360_
 .subckt nand2_x0 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29573_ nq=$abc$109383$new_n32361_
 .subckt nand2_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n29525_ nq=$abc$109383$new_n32362_
-.subckt a2_x2 i0=$abc$109383$new_n32310_ i1=$abc$109383$new_n29550_ q=$abc$109383$new_n32363_
-.subckt nxr2_x1 i0=$abc$109383$new_n32363_ i1=$abc$109383$new_n32362_ nq=$abc$109383$new_n32364_
-.subckt nxr2_x1 i0=$abc$109383$new_n32364_ i1=$abc$109383$new_n32361_ nq=$abc$109383$new_n32365_
+.subckt and2_x1 i0=$abc$109383$new_n32310_ i1=$abc$109383$new_n29550_ q=$abc$109383$new_n32363_
+.subckt nexor2_x0 i0=$abc$109383$new_n32363_ i1=$abc$109383$new_n32362_ nq=$abc$109383$new_n32364_
+.subckt nexor2_x0 i0=$abc$109383$new_n32364_ i1=$abc$109383$new_n32361_ nq=$abc$109383$new_n32365_
 .subckt buf_x4 i=$abc$109383$new_n31962_ q=$abc$109383$new_n32366_
 .subckt nand4_x0 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n32366_ i2=$abc$109383$new_n29325_ i3=$abc$109383$new_n29292_ nq=$abc$109383$new_n32367_
 .subckt nand2_x0 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29325_ nq=$abc$109383$new_n32368_
-.subckt a2_x2 i0=$abc$109383$new_n32368_ i1=$abc$109383$new_n32154_ q=$abc$109383$new_n32369_
-.subckt ao22_x2 i0=$abc$109383$new_n32153_ i1=$abc$109383$new_n32369_ i2=$abc$109383$new_n32367_ q=$abc$109383$new_n32370_
+.subckt and2_x1 i0=$abc$109383$new_n32368_ i1=$abc$109383$new_n32154_ q=$abc$109383$new_n32369_
+.subckt and21nor_x1 i0=$abc$109383$new_n32153_ i1=$abc$109383$new_n32369_ i2=$abc$109383$new_n32367_ nq=$abc$109383$new_n32370_
 .subckt nand2_x0 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29503_ nq=$abc$109383$new_n32371_
 .subckt nand2_x0 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n29325_ nq=$abc$109383$new_n32372_
-.subckt a2_x2 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29347_ q=$abc$109383$new_n32373_
-.subckt nxr2_x1 i0=$abc$109383$new_n32373_ i1=$abc$109383$new_n32372_ nq=$abc$109383$new_n32374_
-.subckt nxr2_x1 i0=$abc$109383$new_n32374_ i1=$abc$109383$new_n32371_ nq=$abc$109383$new_n32375_
-.subckt nxr2_x1 i0=$abc$109383$new_n32375_ i1=$abc$109383$new_n32370_ nq=$abc$109383$new_n32376_
-.subckt nxr2_x1 i0=$abc$109383$new_n32376_ i1=$abc$109383$new_n32365_ nq=$abc$109383$new_n32377_
+.subckt and2_x1 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29347_ q=$abc$109383$new_n32373_
+.subckt nexor2_x0 i0=$abc$109383$new_n32373_ i1=$abc$109383$new_n32372_ nq=$abc$109383$new_n32374_
+.subckt nexor2_x0 i0=$abc$109383$new_n32374_ i1=$abc$109383$new_n32371_ nq=$abc$109383$new_n32375_
+.subckt nexor2_x0 i0=$abc$109383$new_n32375_ i1=$abc$109383$new_n32370_ nq=$abc$109383$new_n32376_
+.subckt nexor2_x0 i0=$abc$109383$new_n32376_ i1=$abc$109383$new_n32365_ nq=$abc$109383$new_n32377_
 .subckt nand2_x0 i0=$abc$109383$new_n32170_ i1=$abc$109383$new_n32356_ nq=$abc$109383$new_n32378_
 .subckt nand4_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n31628_ i2=$abc$109383$new_n29415_ i3=$abc$109383$new_n29390_ nq=$abc$109383$new_n32379_
 .subckt nand2_x0 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29415_ nq=$abc$109383$new_n32380_
-.subckt a2_x2 i0=$abc$109383$new_n32380_ i1=$abc$109383$new_n32167_ q=$abc$109383$new_n32381_
-.subckt ao22_x2 i0=$abc$109383$new_n32166_ i1=$abc$109383$new_n32381_ i2=$abc$109383$new_n32379_ q=$abc$109383$new_n32382_
+.subckt and2_x1 i0=$abc$109383$new_n32380_ i1=$abc$109383$new_n32167_ q=$abc$109383$new_n32381_
+.subckt and21nor_x1 i0=$abc$109383$new_n32166_ i1=$abc$109383$new_n32381_ i2=$abc$109383$new_n32379_ nq=$abc$109383$new_n32382_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[19] i1=$abc$109383$new_n31990_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29446_ nq=$abc$109383$new_n32383_
 .subckt nand2_x0 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29291_ nq=$abc$109383$new_n32384_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n29414_ nq=$abc$109383$new_n32385_
-.subckt a2_x2 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29268_ q=$abc$109383$new_n32386_
-.subckt nxr2_x1 i0=$abc$109383$new_n32386_ i1=$abc$109383$new_n32385_ nq=$abc$109383$new_n32387_
-.subckt nxr2_x1 i0=$abc$109383$new_n32387_ i1=$abc$109383$new_n32384_ nq=$abc$109383$new_n32388_
-.subckt nxr2_x1 i0=$abc$109383$new_n32388_ i1=$abc$109383$new_n32383_ nq=$abc$109383$new_n32389_
-.subckt nxr2_x1 i0=$abc$109383$new_n32389_ i1=$abc$109383$new_n32382_ nq=$abc$109383$new_n32390_
-.subckt nxr2_x1 i0=$abc$109383$new_n32390_ i1=$abc$109383$new_n32378_ nq=$abc$109383$new_n32391_
-.subckt nxr2_x1 i0=$abc$109383$new_n32391_ i1=$abc$109383$new_n32377_ nq=$abc$109383$new_n32392_
-.subckt nxr2_x1 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32360_ nq=$abc$109383$new_n32393_
+.subckt and2_x1 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29268_ q=$abc$109383$new_n32386_
+.subckt nexor2_x0 i0=$abc$109383$new_n32386_ i1=$abc$109383$new_n32385_ nq=$abc$109383$new_n32387_
+.subckt nexor2_x0 i0=$abc$109383$new_n32387_ i1=$abc$109383$new_n32384_ nq=$abc$109383$new_n32388_
+.subckt nexor2_x0 i0=$abc$109383$new_n32388_ i1=$abc$109383$new_n32383_ nq=$abc$109383$new_n32389_
+.subckt nexor2_x0 i0=$abc$109383$new_n32389_ i1=$abc$109383$new_n32382_ nq=$abc$109383$new_n32390_
+.subckt nexor2_x0 i0=$abc$109383$new_n32390_ i1=$abc$109383$new_n32378_ nq=$abc$109383$new_n32391_
+.subckt nexor2_x0 i0=$abc$109383$new_n32391_ i1=$abc$109383$new_n32377_ nq=$abc$109383$new_n32392_
+.subckt nexor2_x0 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32360_ nq=$abc$109383$new_n32393_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[18] i1=$abc$109383$new_n29390_ nq=$abc$109383$new_n32394_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[19] i1=$abc$109383$new_n29445_ nq=$abc$109383$new_n32395_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[20] q=$abc$109383$new_n32396_
 .subckt buf_x4 i=$abc$109383$new_n32396_ q=$abc$109383$new_n32397_
-.subckt a2_x2 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n29473_ q=$abc$109383$new_n32398_
-.subckt nxr2_x1 i0=$abc$109383$new_n32398_ i1=$abc$109383$new_n32395_ nq=$abc$109383$new_n32399_
-.subckt nxr2_x1 i0=$abc$109383$new_n32399_ i1=$abc$109383$new_n32394_ nq=$abc$109383$new_n32400_
-.subckt nxr2_x1 i0=$abc$109383$new_n32400_ i1=$abc$109383$new_n32393_ nq=$abc$109383$new_n32401_
-.subckt nxr2_x1 i0=$abc$109383$new_n32401_ i1=$abc$109383$new_n32350_ nq=$abc$109383$new_n32402_
-.subckt nxr2_x1 i0=$abc$109383$new_n32402_ i1=$abc$109383$new_n32349_ nq=$abc$109383$new_n32403_
-.subckt nxr2_x1 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32263_ nq=$abc$109383$new_n32404_
-.subckt nxr2_x1 i0=$abc$109383$new_n32404_ i1=$abc$109383$new_n32254_ nq=$abc$109383$new_n32405_
-.subckt nxr2_x1 i0=$abc$109383$new_n32405_ i1=$abc$109383$new_n32230_ nq=$abc$109383$new_n32406_
-.subckt nxr2_x1 i0=$abc$109383$new_n32406_ i1=$abc$109383$new_n32226_ nq=$abc$109383$new_n32407_
-.subckt nxr2_x1 i0=$abc$109383$new_n32407_ i1=$abc$109383$new_n32225_ nq=$abc$109383$new_n32408_
-.subckt nxr2_x1 i0=$abc$109383$new_n32408_ i1=$abc$109383$new_n32219_ nq=$abc$109383$new_n32409_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n32409_ i2=$abc$109383$new_n32194_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102838
+.subckt and2_x1 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n29473_ q=$abc$109383$new_n32398_
+.subckt nexor2_x0 i0=$abc$109383$new_n32398_ i1=$abc$109383$new_n32395_ nq=$abc$109383$new_n32399_
+.subckt nexor2_x0 i0=$abc$109383$new_n32399_ i1=$abc$109383$new_n32394_ nq=$abc$109383$new_n32400_
+.subckt nexor2_x0 i0=$abc$109383$new_n32400_ i1=$abc$109383$new_n32393_ nq=$abc$109383$new_n32401_
+.subckt nexor2_x0 i0=$abc$109383$new_n32401_ i1=$abc$109383$new_n32350_ nq=$abc$109383$new_n32402_
+.subckt nexor2_x0 i0=$abc$109383$new_n32402_ i1=$abc$109383$new_n32349_ nq=$abc$109383$new_n32403_
+.subckt nexor2_x0 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32263_ nq=$abc$109383$new_n32404_
+.subckt nexor2_x0 i0=$abc$109383$new_n32404_ i1=$abc$109383$new_n32254_ nq=$abc$109383$new_n32405_
+.subckt nexor2_x0 i0=$abc$109383$new_n32405_ i1=$abc$109383$new_n32230_ nq=$abc$109383$new_n32406_
+.subckt nexor2_x0 i0=$abc$109383$new_n32406_ i1=$abc$109383$new_n32226_ nq=$abc$109383$new_n32407_
+.subckt nexor2_x0 i0=$abc$109383$new_n32407_ i1=$abc$109383$new_n32225_ nq=$abc$109383$new_n32408_
+.subckt nexor2_x0 i0=$abc$109383$new_n32408_ i1=$abc$109383$new_n32219_ nq=$abc$109383$new_n32409_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n32409_ i2=$abc$109383$new_n32194_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102838
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[21] nq=$abc$109383$new_n32411_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n32411_ q=$abc$109383$new_n32412_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n32411_ nq=$abc$109383$new_n32412_
 .subckt nor2_x0 i0=$abc$109383$new_n32412_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n32413_
 .subckt nor2_x0 i0=$abc$109383$new_n32407_ i1=$abc$109383$new_n32225_ nq=$abc$109383$new_n32414_
-.subckt ao22_x2 i0=$abc$109383$new_n32197_ i1=$abc$109383$new_n32213_ i2=$abc$109383$new_n32183_ q=$abc$109383$new_n32415_
-.subckt oa22_x2 i0=$abc$109383$new_n32195_ i1=$abc$109383$new_n32184_ i2=$abc$109383$new_n32415_ q=$abc$109383$new_n32416_
-.subckt nxr2_x1 i0=$abc$109383$new_n32407_ i1=$abc$109383$new_n32416_ nq=$abc$109383$new_n32417_
-.subckt oa22_x2 i0=$abc$109383$new_n32219_ i1=$abc$109383$new_n32417_ i2=$abc$109383$new_n32414_ q=$abc$109383$new_n32418_
-.subckt a2_x2 i0=$abc$109383$new_n32075_ i1=$abc$109383$new_n32235_ q=$abc$109383$new_n32419_
-.subckt oa22_x2 i0=$abc$109383$new_n32050_ i1=$abc$109383$new_n32076_ i2=$abc$109383$new_n32419_ q=$abc$109383$new_n32420_
-.subckt nxr2_x1 i0=$abc$109383$new_n32253_ i1=$abc$109383$new_n32420_ nq=$abc$109383$new_n32421_
-.subckt nxr2_x1 i0=$abc$109383$new_n32404_ i1=$abc$109383$new_n32421_ nq=$abc$109383$new_n32422_
+.subckt and21nor_x1 i0=$abc$109383$new_n32197_ i1=$abc$109383$new_n32213_ i2=$abc$109383$new_n32183_ nq=$abc$109383$new_n32415_
+.subckt or21nand_x1 i0=$abc$109383$new_n32195_ i1=$abc$109383$new_n32184_ i2=$abc$109383$new_n32415_ nq=$abc$109383$new_n32416_
+.subckt nexor2_x0 i0=$abc$109383$new_n32407_ i1=$abc$109383$new_n32416_ nq=$abc$109383$new_n32417_
+.subckt or21nand_x1 i0=$abc$109383$new_n32219_ i1=$abc$109383$new_n32417_ i2=$abc$109383$new_n32414_ nq=$abc$109383$new_n32418_
+.subckt and2_x1 i0=$abc$109383$new_n32075_ i1=$abc$109383$new_n32235_ q=$abc$109383$new_n32419_
+.subckt or21nand_x1 i0=$abc$109383$new_n32050_ i1=$abc$109383$new_n32076_ i2=$abc$109383$new_n32419_ nq=$abc$109383$new_n32420_
+.subckt nexor2_x0 i0=$abc$109383$new_n32253_ i1=$abc$109383$new_n32420_ nq=$abc$109383$new_n32421_
+.subckt nexor2_x0 i0=$abc$109383$new_n32404_ i1=$abc$109383$new_n32421_ nq=$abc$109383$new_n32422_
 .subckt nand2_x0 i0=$abc$109383$new_n32182_ i1=$abc$109383$new_n32222_ nq=$abc$109383$new_n32423_
-.subckt oa22_x2 i0=$abc$109383$new_n32228_ i1=$abc$109383$new_n32423_ i2=$abc$109383$new_n32422_ q=$abc$109383$new_n32424_
-.subckt a2_x2 i0=$abc$109383$new_n32181_ i1=$abc$109383$new_n32227_ q=$abc$109383$new_n32425_
-.subckt oa22_x2 i0=$abc$109383$new_n32222_ i1=$abc$109383$new_n32182_ i2=$abc$109383$new_n32425_ q=$abc$109383$new_n32426_
-.subckt nxr2_x1 i0=$abc$109383$new_n32405_ i1=$abc$109383$new_n32426_ nq=$abc$109383$new_n32427_
-.subckt o2_x2 i0=$abc$109383$new_n32037_ i1=$abc$109383$new_n32026_ q=$abc$109383$new_n32428_
-.subckt ao22_x2 i0=$abc$109383$new_n32428_ i1=$abc$109383$new_n32427_ i2=$abc$109383$new_n32424_ q=$abc$109383$new_n32429_
+.subckt or21nand_x1 i0=$abc$109383$new_n32228_ i1=$abc$109383$new_n32423_ i2=$abc$109383$new_n32422_ nq=$abc$109383$new_n32424_
+.subckt and2_x1 i0=$abc$109383$new_n32181_ i1=$abc$109383$new_n32227_ q=$abc$109383$new_n32425_
+.subckt or21nand_x1 i0=$abc$109383$new_n32222_ i1=$abc$109383$new_n32182_ i2=$abc$109383$new_n32425_ nq=$abc$109383$new_n32426_
+.subckt nexor2_x0 i0=$abc$109383$new_n32405_ i1=$abc$109383$new_n32426_ nq=$abc$109383$new_n32427_
+.subckt or2_x1 i0=$abc$109383$new_n32037_ i1=$abc$109383$new_n32026_ q=$abc$109383$new_n32428_
+.subckt and21nor_x1 i0=$abc$109383$new_n32428_ i1=$abc$109383$new_n32427_ i2=$abc$109383$new_n32424_ nq=$abc$109383$new_n32429_
 .subckt nor2_x0 i0=$abc$109383$new_n32253_ i1=$abc$109383$new_n32242_ nq=$abc$109383$new_n32430_
-.subckt a2_x2 i0=$abc$109383$new_n32179_ i1=$abc$109383$new_n32255_ q=$abc$109383$new_n32431_
+.subckt and2_x1 i0=$abc$109383$new_n32179_ i1=$abc$109383$new_n32255_ q=$abc$109383$new_n32431_
 .subckt nand2_x0 i0=$abc$109383$new_n32261_ i1=$abc$109383$new_n32133_ nq=$abc$109383$new_n32432_
-.subckt nxr2_x1 i0=$abc$109383$new_n32129_ i1=$abc$109383$new_n32252_ nq=$abc$109383$new_n32433_
-.subckt oa22_x2 i0=$abc$109383$new_n32433_ i1=$abc$109383$new_n32432_ i2=$abc$109383$new_n32431_ q=$abc$109383$new_n32434_
+.subckt nexor2_x0 i0=$abc$109383$new_n32129_ i1=$abc$109383$new_n32252_ nq=$abc$109383$new_n32433_
+.subckt or21nand_x1 i0=$abc$109383$new_n32433_ i1=$abc$109383$new_n32432_ i2=$abc$109383$new_n32431_ nq=$abc$109383$new_n32434_
 .subckt nand2_x0 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32434_ nq=$abc$109383$new_n32435_
-.subckt nxr2_x1 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32434_ nq=$abc$109383$new_n32436_
-.subckt ao22_x2 i0=$abc$109383$new_n32254_ i1=$abc$109383$new_n32436_ i2=$abc$109383$new_n32435_ q=$abc$109383$new_n32437_
-.subckt a2_x2 i0=$abc$109383$new_n32073_ i1=$abc$109383$new_n32276_ q=$abc$109383$new_n32438_
+.subckt nexor2_x0 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32434_ nq=$abc$109383$new_n32436_
+.subckt and21nor_x1 i0=$abc$109383$new_n32254_ i1=$abc$109383$new_n32436_ i2=$abc$109383$new_n32435_ nq=$abc$109383$new_n32437_
+.subckt and2_x1 i0=$abc$109383$new_n32073_ i1=$abc$109383$new_n32276_ q=$abc$109383$new_n32438_
 .subckt nand2_x0 i0=$abc$109383$new_n32279_ i1=$abc$109383$new_n32068_ nq=$abc$109383$new_n32439_
 .subckt nand2_x0 i0=$abc$109383$new_n29315_ i1=$abc$109383$new_n29611_ nq=$abc$109383$new_n32440_
-.subckt nxr2_x1 i0=$abc$109383$new_n32063_ i1=$abc$109383$new_n32440_ nq=$abc$109383$new_n32441_
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 .subckt nand2_x0 i0=$abc$109383$new_n32297_ i1=$abc$109383$new_n32442_ nq=$abc$109383$new_n32443_
-.subckt nxr2_x1 i0=$abc$109383$new_n32297_ i1=$abc$109383$new_n32442_ nq=$abc$109383$new_n32444_
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 .subckt nand4_x0 i0=$abc$109383$new_n29257_ i1=$abc$109383$new_n29375_ i2=$abc$109383$new_n29636_ i3=$abc$109383$new_n29657_ nq=$abc$109383$new_n32445_
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 .subckt nand2_x0 i0=$abc$109383$new_n32347_ i1=$abc$109383$new_n32449_ nq=$abc$109383$new_n32450_
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 .subckt nand2_x0 i0=$abc$109383$new_n32126_ i1=$abc$109383$new_n32265_ nq=$abc$109383$new_n32452_
 .subckt nand2_x0 i0=$abc$109383$new_n32127_ i1=$abc$109383$new_n32267_ nq=$abc$109383$new_n32453_
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 .subckt nand2_x0 i0=$abc$109383$new_n32401_ i1=$abc$109383$new_n32457_ nq=$abc$109383$new_n32458_
-.subckt nxr2_x1 i0=$abc$109383$new_n32401_ i1=$abc$109383$new_n32457_ nq=$abc$109383$new_n32459_
-.subckt ao22_x2 i0=$abc$109383$new_n32349_ i1=$abc$109383$new_n32459_ i2=$abc$109383$new_n32458_ q=$abc$109383$new_n32460_
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 .subckt nand2_x0 i0=$abc$109383$new_n31936_ i1=$abc$109383$new_n32095_ nq=$abc$109383$new_n32463_
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+.subckt and2_x1 i0=$abc$109383$new_n32345_ i1=$abc$109383$new_n32465_ q=$abc$109383$new_n32466_
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 .subckt nand2_x0 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32360_ nq=$abc$109383$new_n32469_
-.subckt a4_x2 i0=$abc$109383$new_n29257_ i1=$abc$109383$new_n29375_ i2=$abc$109383$new_n29610_ i3=$abc$109383$new_n29634_ q=$abc$109383$new_n32470_
+.subckt and4_x1 i0=$abc$109383$new_n29257_ i1=$abc$109383$new_n29375_ i2=$abc$109383$new_n29610_ i3=$abc$109383$new_n29634_ q=$abc$109383$new_n32470_
 .subckt nand2_x0 i0=$abc$109383$new_n29375_ i1=$abc$109383$new_n29610_ nq=$abc$109383$new_n32471_
 .subckt nand2_x0 i0=$abc$109383$new_n32471_ i1=$abc$109383$new_n32283_ nq=$abc$109383$new_n32472_
-.subckt oa22_x2 i0=$abc$109383$new_n32282_ i1=$abc$109383$new_n32472_ i2=$abc$109383$new_n32470_ q=$abc$109383$new_n32473_
-.subckt a4_x2 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29231_ i2=$abc$109383$new_n29667_ i3=$abc$109383$new_n29647_ q=$abc$109383$new_n32474_
+.subckt or21nand_x1 i0=$abc$109383$new_n32282_ i1=$abc$109383$new_n32472_ i2=$abc$109383$new_n32470_ nq=$abc$109383$new_n32473_
+.subckt and4_x1 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29231_ i2=$abc$109383$new_n29667_ i3=$abc$109383$new_n29647_ q=$abc$109383$new_n32474_
 .subckt nand2_x0 i0=$abc$109383$new_n32288_ i1=$abc$109383$new_n32070_ nq=$abc$109383$new_n32475_
-.subckt oa22_x2 i0=$abc$109383$new_n32278_ i1=$abc$109383$new_n32475_ i2=$abc$109383$new_n32474_ q=$abc$109383$new_n32476_
+.subckt or21nand_x1 i0=$abc$109383$new_n32278_ i1=$abc$109383$new_n32475_ i2=$abc$109383$new_n32474_ nq=$abc$109383$new_n32476_
 .subckt nand2_x0 i0=$abc$109383$new_n32295_ i1=$abc$109383$new_n32476_ nq=$abc$109383$new_n32477_
-.subckt a2_x2 i0=$abc$109383$new_n29243_ i1=$abc$109383$new_n29656_ q=$abc$109383$new_n32478_
-.subckt nxr2_x1 i0=$abc$109383$new_n32294_ i1=$abc$109383$new_n32478_ nq=$abc$109383$new_n32479_
-.subckt a2_x2 i0=$abc$109383$new_n32479_ i1=$abc$109383$new_n32290_ q=$abc$109383$new_n32480_
-.subckt ao22_x2 i0=$abc$109383$new_n32286_ i1=$abc$109383$new_n32480_ i2=$abc$109383$new_n32477_ q=$abc$109383$new_n32481_
-.subckt a2_x2 i0=$abc$109383$new_n29314_ i1=soc.cpu.minerva.payload__src1$44[21] q=$abc$109383$new_n32482_
+.subckt and2_x1 i0=$abc$109383$new_n29243_ i1=$abc$109383$new_n29656_ q=$abc$109383$new_n32478_
+.subckt nexor2_x0 i0=$abc$109383$new_n32294_ i1=$abc$109383$new_n32478_ nq=$abc$109383$new_n32479_
+.subckt and2_x1 i0=$abc$109383$new_n32479_ i1=$abc$109383$new_n32290_ q=$abc$109383$new_n32480_
+.subckt and21nor_x1 i0=$abc$109383$new_n32286_ i1=$abc$109383$new_n32480_ i2=$abc$109383$new_n32477_ nq=$abc$109383$new_n32481_
+.subckt and2_x1 i0=$abc$109383$new_n29314_ i1=soc.cpu.minerva.payload__src1$44[21] q=$abc$109383$new_n32482_
 .subckt nand2_x0 i0=$abc$109383$new_n29256_ i1=$abc$109383$new_n29609_ nq=$abc$109383$new_n32483_
-.subckt a2_x2 i0=$abc$109383$new_n29373_ i1=soc.cpu.minerva.payload__src1$44[20] q=$abc$109383$new_n32484_
-.subckt nxr2_x1 i0=$abc$109383$new_n32484_ i1=$abc$109383$new_n32483_ nq=$abc$109383$new_n32485_
-.subckt nxr2_x1 i0=$abc$109383$new_n32485_ i1=$abc$109383$new_n32482_ nq=$abc$109383$new_n32486_
+.subckt and2_x1 i0=$abc$109383$new_n29373_ i1=soc.cpu.minerva.payload__src1$44[20] q=$abc$109383$new_n32484_
+.subckt nexor2_x0 i0=$abc$109383$new_n32484_ i1=$abc$109383$new_n32483_ nq=$abc$109383$new_n32485_
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 .subckt nand4_x0 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29231_ i2=$abc$109383$new_n29678_ i3=$abc$109383$new_n29667_ nq=$abc$109383$new_n32487_
 .subckt nand2_x0 i0=$abc$109383$new_n29231_ i1=$abc$109383$new_n29678_ nq=$abc$109383$new_n32488_
-.subckt a2_x2 i0=$abc$109383$new_n32488_ i1=$abc$109383$new_n32292_ q=$abc$109383$new_n32489_
-.subckt ao22_x2 i0=$abc$109383$new_n32291_ i1=$abc$109383$new_n32489_ i2=$abc$109383$new_n32487_ q=$abc$109383$new_n32490_
+.subckt and2_x1 i0=$abc$109383$new_n32488_ i1=$abc$109383$new_n32292_ q=$abc$109383$new_n32489_
+.subckt and21nor_x1 i0=$abc$109383$new_n32291_ i1=$abc$109383$new_n32489_ i2=$abc$109383$new_n32487_ nq=$abc$109383$new_n32490_
 .subckt nand2_x0 i0=$abc$109383$new_n29243_ i1=$abc$109383$new_n29633_ nq=$abc$109383$new_n32491_
 .subckt nand2_x0 i0=$abc$109383$new_n32051_ i1=$abc$109383$new_n29677_ nq=$abc$109383$new_n32492_
-.subckt a2_x2 i0=$abc$109383$new_n29230_ i1=soc.cpu.minerva.payload__src1$44[17] q=$abc$109383$new_n32493_
-.subckt nxr2_x1 i0=$abc$109383$new_n32493_ i1=$abc$109383$new_n32492_ nq=$abc$109383$new_n32494_
-.subckt nxr2_x1 i0=$abc$109383$new_n32494_ i1=$abc$109383$new_n32491_ nq=$abc$109383$new_n32495_
-.subckt nxr2_x1 i0=$abc$109383$new_n32495_ i1=$abc$109383$new_n32490_ nq=$abc$109383$new_n32496_
-.subckt nxr2_x1 i0=$abc$109383$new_n32496_ i1=$abc$109383$new_n32486_ nq=$abc$109383$new_n32497_
-.subckt nxr2_x1 i0=$abc$109383$new_n32497_ i1=$abc$109383$new_n32481_ nq=$abc$109383$new_n32498_
-.subckt nxr2_x1 i0=$abc$109383$new_n32498_ i1=$abc$109383$new_n32473_ nq=$abc$109383$new_n32499_
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+.subckt nexor2_x0 i0=$abc$109383$new_n32494_ i1=$abc$109383$new_n32491_ nq=$abc$109383$new_n32495_
+.subckt nexor2_x0 i0=$abc$109383$new_n32495_ i1=$abc$109383$new_n32490_ nq=$abc$109383$new_n32496_
+.subckt nexor2_x0 i0=$abc$109383$new_n32496_ i1=$abc$109383$new_n32486_ nq=$abc$109383$new_n32497_
+.subckt nexor2_x0 i0=$abc$109383$new_n32497_ i1=$abc$109383$new_n32481_ nq=$abc$109383$new_n32498_
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+.subckt and2_x1 i0=$abc$109383$new_n32157_ i1=$abc$109383$new_n32336_ q=$abc$109383$new_n32500_
 .subckt nand2_x0 i0=$abc$109383$new_n32339_ i1=$abc$109383$new_n32152_ nq=$abc$109383$new_n32501_
-.subckt oa22_x2 i0=$abc$109383$new_n32148_ i1=$abc$109383$new_n32501_ i2=$abc$109383$new_n32500_ q=$abc$109383$new_n32502_
+.subckt or21nand_x1 i0=$abc$109383$new_n32148_ i1=$abc$109383$new_n32501_ i2=$abc$109383$new_n32500_ nq=$abc$109383$new_n32502_
 .subckt nand2_x0 i0=$abc$109383$new_n32502_ i1=$abc$109383$new_n32333_ nq=$abc$109383$new_n32503_
 .subckt buf_x4 i=$abc$109383$new_n31908_ q=$abc$109383$new_n32504_
-.subckt a4_x2 i0=$abc$109383$new_n32504_ i1=$abc$109383$new_n32082_ i2=$abc$109383$new_n29599_ i3=$abc$109383$new_n29574_ q=$abc$109383$new_n32505_
+.subckt and4_x1 i0=$abc$109383$new_n32504_ i1=$abc$109383$new_n32082_ i2=$abc$109383$new_n29599_ i3=$abc$109383$new_n29574_ q=$abc$109383$new_n32505_
 .subckt nand2_x0 i0=$abc$109383$new_n32320_ i1=$abc$109383$new_n32103_ nq=$abc$109383$new_n32506_
-.subckt oa22_x2 i0=$abc$109383$new_n32315_ i1=$abc$109383$new_n32506_ i2=$abc$109383$new_n32505_ q=$abc$109383$new_n32507_
-.subckt nxr2_x1 i0=$abc$109383$new_n32332_ i1=$abc$109383$new_n32507_ nq=$abc$109383$new_n32508_
-.subckt nxr2_x1 i0=$abc$109383$new_n32343_ i1=$abc$109383$new_n32508_ nq=$abc$109383$new_n32509_
-.subckt ao22_x2 i0=$abc$109383$new_n32318_ i1=$abc$109383$new_n32509_ i2=$abc$109383$new_n32503_ q=$abc$109383$new_n32510_
+.subckt or21nand_x1 i0=$abc$109383$new_n32315_ i1=$abc$109383$new_n32506_ i2=$abc$109383$new_n32505_ nq=$abc$109383$new_n32507_
+.subckt nexor2_x0 i0=$abc$109383$new_n32332_ i1=$abc$109383$new_n32507_ nq=$abc$109383$new_n32508_
+.subckt nexor2_x0 i0=$abc$109383$new_n32343_ i1=$abc$109383$new_n32508_ nq=$abc$109383$new_n32509_
+.subckt and21nor_x1 i0=$abc$109383$new_n32318_ i1=$abc$109383$new_n32509_ i2=$abc$109383$new_n32503_ nq=$abc$109383$new_n32510_
 .subckt buf_x4 i=$abc$109383$new_n32089_ q=$abc$109383$new_n32511_
-.subckt a4_x2 i0=$abc$109383$new_n32511_ i1=$abc$109383$new_n32310_ i2=$abc$109383$new_n29526_ i3=$abc$109383$new_n29503_ q=$abc$109383$new_n32512_
+.subckt and4_x1 i0=$abc$109383$new_n32511_ i1=$abc$109383$new_n32310_ i2=$abc$109383$new_n29526_ i3=$abc$109383$new_n29503_ q=$abc$109383$new_n32512_
 .subckt nand2_x0 i0=$abc$109383$new_n32329_ i1=$abc$109383$new_n32145_ nq=$abc$109383$new_n32513_
-.subckt oa22_x2 i0=$abc$109383$new_n32341_ i1=$abc$109383$new_n32513_ i2=$abc$109383$new_n32512_ q=$abc$109383$new_n32514_
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 .subckt nand2_x0 i0=$abc$109383$new_n32514_ i1=$abc$109383$new_n32327_ nq=$abc$109383$new_n32515_
-.subckt a2_x2 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29647_ q=$abc$109383$new_n32516_
-.subckt nxr2_x1 i0=$abc$109383$new_n32326_ i1=$abc$109383$new_n32516_ nq=$abc$109383$new_n32517_
-.subckt a2_x2 i0=$abc$109383$new_n32331_ i1=$abc$109383$new_n32517_ q=$abc$109383$new_n32518_
-.subckt ao22_x2 i0=$abc$109383$new_n32322_ i1=$abc$109383$new_n32518_ i2=$abc$109383$new_n32515_ q=$abc$109383$new_n32519_
+.subckt and2_x1 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29647_ q=$abc$109383$new_n32516_
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+.subckt and2_x1 i0=$abc$109383$new_n32331_ i1=$abc$109383$new_n32517_ q=$abc$109383$new_n32518_
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 .subckt buf_x4 i=$abc$109383$new_n32082_ q=$abc$109383$new_n32520_
 .subckt nand4_x0 i0=$abc$109383$new_n32504_ i1=$abc$109383$new_n32520_ i2=$abc$109383$new_n29624_ i3=$abc$109383$new_n29600_ nq=$abc$109383$new_n32521_
 .subckt nand2_x0 i0=$abc$109383$new_n32082_ i1=$abc$109383$new_n29624_ nq=$abc$109383$new_n32522_
-.subckt a2_x2 i0=$abc$109383$new_n32522_ i1=$abc$109383$new_n32324_ q=$abc$109383$new_n32523_
-.subckt ao22_x2 i0=$abc$109383$new_n32323_ i1=$abc$109383$new_n32523_ i2=$abc$109383$new_n32521_ q=$abc$109383$new_n32524_
+.subckt and2_x1 i0=$abc$109383$new_n32522_ i1=$abc$109383$new_n32324_ q=$abc$109383$new_n32523_
+.subckt and21nor_x1 i0=$abc$109383$new_n32323_ i1=$abc$109383$new_n32523_ i2=$abc$109383$new_n32521_ nq=$abc$109383$new_n32524_
 .subckt nand2_x0 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29666_ nq=$abc$109383$new_n32525_
 .subckt nand2_x0 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n29623_ nq=$abc$109383$new_n32526_
-.subckt a2_x2 i0=$abc$109383$new_n32082_ i1=$abc$109383$new_n29646_ q=$abc$109383$new_n32527_
-.subckt nxr2_x1 i0=$abc$109383$new_n32527_ i1=$abc$109383$new_n32526_ nq=$abc$109383$new_n32528_
-.subckt nxr2_x1 i0=$abc$109383$new_n32528_ i1=$abc$109383$new_n32525_ nq=$abc$109383$new_n32529_
+.subckt and2_x1 i0=$abc$109383$new_n32082_ i1=$abc$109383$new_n29646_ q=$abc$109383$new_n32527_
+.subckt nexor2_x0 i0=$abc$109383$new_n32527_ i1=$abc$109383$new_n32526_ nq=$abc$109383$new_n32528_
+.subckt nexor2_x0 i0=$abc$109383$new_n32528_ i1=$abc$109383$new_n32525_ nq=$abc$109383$new_n32529_
 .subckt nand4_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n32310_ i2=$abc$109383$new_n29550_ i3=$abc$109383$new_n29525_ nq=$abc$109383$new_n32530_
 .subckt nand2_x0 i0=$abc$109383$new_n32310_ i1=$abc$109383$new_n29550_ nq=$abc$109383$new_n32531_
-.subckt a2_x2 i0=$abc$109383$new_n32531_ i1=$abc$109383$new_n32362_ q=$abc$109383$new_n32532_
-.subckt ao22_x2 i0=$abc$109383$new_n32361_ i1=$abc$109383$new_n32532_ i2=$abc$109383$new_n32530_ q=$abc$109383$new_n32533_
-.subckt nxr2_x1 i0=$abc$109383$new_n32533_ i1=$abc$109383$new_n32529_ nq=$abc$109383$new_n32534_
-.subckt nxr2_x1 i0=$abc$109383$new_n32534_ i1=$abc$109383$new_n32524_ nq=$abc$109383$new_n32535_
-.subckt a4_x2 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n32366_ i2=$abc$109383$new_n29325_ i3=$abc$109383$new_n29292_ q=$abc$109383$new_n32536_
+.subckt and2_x1 i0=$abc$109383$new_n32531_ i1=$abc$109383$new_n32362_ q=$abc$109383$new_n32532_
+.subckt and21nor_x1 i0=$abc$109383$new_n32361_ i1=$abc$109383$new_n32532_ i2=$abc$109383$new_n32530_ nq=$abc$109383$new_n32533_
+.subckt nexor2_x0 i0=$abc$109383$new_n32533_ i1=$abc$109383$new_n32529_ nq=$abc$109383$new_n32534_
+.subckt nexor2_x0 i0=$abc$109383$new_n32534_ i1=$abc$109383$new_n32524_ nq=$abc$109383$new_n32535_
+.subckt and4_x1 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n32366_ i2=$abc$109383$new_n29325_ i3=$abc$109383$new_n29292_ q=$abc$109383$new_n32536_
 .subckt nand2_x0 i0=$abc$109383$new_n32368_ i1=$abc$109383$new_n32154_ nq=$abc$109383$new_n32537_
-.subckt oa22_x2 i0=$abc$109383$new_n32338_ i1=$abc$109383$new_n32537_ i2=$abc$109383$new_n32536_ q=$abc$109383$new_n32538_
+.subckt or21nand_x1 i0=$abc$109383$new_n32338_ i1=$abc$109383$new_n32537_ i2=$abc$109383$new_n32536_ nq=$abc$109383$new_n32538_
 .subckt nand2_x0 i0=$abc$109383$new_n32375_ i1=$abc$109383$new_n32538_ nq=$abc$109383$new_n32539_
-.subckt a2_x2 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29503_ q=$abc$109383$new_n32540_
-.subckt nxr2_x1 i0=$abc$109383$new_n32374_ i1=$abc$109383$new_n32540_ nq=$abc$109383$new_n32541_
-.subckt a2_x2 i0=$abc$109383$new_n32541_ i1=$abc$109383$new_n32370_ q=$abc$109383$new_n32542_
-.subckt a2_x2 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n32543_
-.subckt nxr2_x1 i0=$abc$109383$new_n32364_ i1=$abc$109383$new_n32543_ nq=$abc$109383$new_n32544_
-.subckt ao22_x2 i0=$abc$109383$new_n32544_ i1=$abc$109383$new_n32542_ i2=$abc$109383$new_n32539_ q=$abc$109383$new_n32545_
-.subckt nxr2_x1 i0=$abc$109383$new_n32545_ i1=$abc$109383$new_n32535_ nq=$abc$109383$new_n32546_
-.subckt nxr2_x1 i0=$abc$109383$new_n32546_ i1=$abc$109383$new_n32519_ nq=$abc$109383$new_n32547_
-.subckt nxr2_x1 i0=$abc$109383$new_n32547_ i1=$abc$109383$new_n32510_ nq=$abc$109383$new_n32548_
-.subckt nxr2_x1 i0=$abc$109383$new_n32548_ i1=$abc$109383$new_n32499_ nq=$abc$109383$new_n32549_
-.subckt nxr2_x1 i0=$abc$109383$new_n32549_ i1=$abc$109383$new_n32469_ nq=$abc$109383$new_n32550_
-.subckt nxr2_x1 i0=$abc$109383$new_n32550_ i1=$abc$109383$new_n32468_ nq=$abc$109383$new_n32551_
+.subckt and2_x1 i0=$abc$109383$new_n31307_ i1=$abc$109383$new_n29503_ q=$abc$109383$new_n32540_
+.subckt nexor2_x0 i0=$abc$109383$new_n32374_ i1=$abc$109383$new_n32540_ nq=$abc$109383$new_n32541_
+.subckt and2_x1 i0=$abc$109383$new_n32541_ i1=$abc$109383$new_n32370_ q=$abc$109383$new_n32542_
+.subckt and2_x1 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n32543_
+.subckt nexor2_x0 i0=$abc$109383$new_n32364_ i1=$abc$109383$new_n32543_ nq=$abc$109383$new_n32544_
+.subckt and21nor_x1 i0=$abc$109383$new_n32544_ i1=$abc$109383$new_n32542_ i2=$abc$109383$new_n32539_ nq=$abc$109383$new_n32545_
+.subckt nexor2_x0 i0=$abc$109383$new_n32545_ i1=$abc$109383$new_n32535_ nq=$abc$109383$new_n32546_
+.subckt nexor2_x0 i0=$abc$109383$new_n32546_ i1=$abc$109383$new_n32519_ nq=$abc$109383$new_n32547_
+.subckt nexor2_x0 i0=$abc$109383$new_n32547_ i1=$abc$109383$new_n32510_ nq=$abc$109383$new_n32548_
+.subckt nexor2_x0 i0=$abc$109383$new_n32548_ i1=$abc$109383$new_n32499_ nq=$abc$109383$new_n32549_
+.subckt nexor2_x0 i0=$abc$109383$new_n32549_ i1=$abc$109383$new_n32469_ nq=$abc$109383$new_n32550_
+.subckt nexor2_x0 i0=$abc$109383$new_n32550_ i1=$abc$109383$new_n32468_ nq=$abc$109383$new_n32551_
 .subckt nand2_x0 i0=$abc$109383$new_n32171_ i1=$abc$109383$new_n32351_ nq=$abc$109383$new_n32552_
-.subckt a2_x2 i0=$abc$109383$new_n32357_ i1=$abc$109383$new_n32160_ q=$abc$109383$new_n32553_
-.subckt ao22_x2 i0=$abc$109383$new_n32159_ i1=$abc$109383$new_n32553_ i2=$abc$109383$new_n32552_ q=$abc$109383$new_n32554_
-.subckt nxr2_x1 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32554_ nq=$abc$109383$new_n32555_
-.subckt a2_x2 i0=$abc$109383$new_n32400_ i1=$abc$109383$new_n32555_ q=$abc$109383$new_n32556_
-.subckt a2_x2 i0=$abc$109383$new_n32170_ i1=$abc$109383$new_n32356_ q=$abc$109383$new_n32557_
-.subckt a2_x2 i0=$abc$109383$new_n32390_ i1=$abc$109383$new_n32557_ q=$abc$109383$new_n32558_
+.subckt and2_x1 i0=$abc$109383$new_n32357_ i1=$abc$109383$new_n32160_ q=$abc$109383$new_n32553_
+.subckt and21nor_x1 i0=$abc$109383$new_n32159_ i1=$abc$109383$new_n32553_ i2=$abc$109383$new_n32552_ nq=$abc$109383$new_n32554_
+.subckt nexor2_x0 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32554_ nq=$abc$109383$new_n32555_
+.subckt and2_x1 i0=$abc$109383$new_n32400_ i1=$abc$109383$new_n32555_ q=$abc$109383$new_n32556_
+.subckt and2_x1 i0=$abc$109383$new_n32170_ i1=$abc$109383$new_n32356_ q=$abc$109383$new_n32557_
+.subckt and2_x1 i0=$abc$109383$new_n32390_ i1=$abc$109383$new_n32557_ q=$abc$109383$new_n32558_
 .subckt buf_x4 i=$abc$109383$new_n31628_ q=$abc$109383$new_n32559_
 .subckt buf_x4 i=$abc$109383$new_n32161_ q=$abc$109383$new_n32560_
-.subckt a4_x2 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32559_ i2=$abc$109383$new_n29415_ i3=$abc$109383$new_n29390_ q=$abc$109383$new_n32561_
+.subckt and4_x1 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32559_ i2=$abc$109383$new_n29415_ i3=$abc$109383$new_n29390_ q=$abc$109383$new_n32561_
 .subckt nand2_x0 i0=$abc$109383$new_n32380_ i1=$abc$109383$new_n32167_ nq=$abc$109383$new_n32562_
-.subckt a2_x2 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29269_ q=$abc$109383$new_n32563_
-.subckt oa22_x2 i0=$abc$109383$new_n32563_ i1=$abc$109383$new_n32562_ i2=$abc$109383$new_n32561_ q=$abc$109383$new_n32564_
-.subckt nxr2_x1 i0=$abc$109383$new_n32389_ i1=$abc$109383$new_n32564_ nq=$abc$109383$new_n32565_
+.subckt and2_x1 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29269_ q=$abc$109383$new_n32563_
+.subckt or21nand_x1 i0=$abc$109383$new_n32563_ i1=$abc$109383$new_n32562_ i2=$abc$109383$new_n32561_ nq=$abc$109383$new_n32564_
+.subckt nexor2_x0 i0=$abc$109383$new_n32389_ i1=$abc$109383$new_n32564_ nq=$abc$109383$new_n32565_
 .subckt nand2_x0 i0=$abc$109383$new_n32565_ i1=$abc$109383$new_n32378_ nq=$abc$109383$new_n32566_
-.subckt nxr2_x1 i0=$abc$109383$new_n32376_ i1=$abc$109383$new_n32544_ nq=$abc$109383$new_n32567_
-.subckt oa22_x2 i0=$abc$109383$new_n32567_ i1=$abc$109383$new_n32566_ i2=$abc$109383$new_n32558_ q=$abc$109383$new_n32568_
+.subckt nexor2_x0 i0=$abc$109383$new_n32376_ i1=$abc$109383$new_n32544_ nq=$abc$109383$new_n32567_
+.subckt or21nand_x1 i0=$abc$109383$new_n32567_ i1=$abc$109383$new_n32566_ i2=$abc$109383$new_n32558_ nq=$abc$109383$new_n32568_
 .subckt nand2_x0 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29600_ nq=$abc$109383$new_n32569_
 .subckt nand2_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n29550_ nq=$abc$109383$new_n32570_
-.subckt a2_x2 i0=$abc$109383$new_n32310_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n32571_
-.subckt nxr2_x1 i0=$abc$109383$new_n32571_ i1=$abc$109383$new_n32570_ nq=$abc$109383$new_n32572_
-.subckt nxr2_x1 i0=$abc$109383$new_n32572_ i1=$abc$109383$new_n32569_ nq=$abc$109383$new_n32573_
+.subckt and2_x1 i0=$abc$109383$new_n32310_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n32571_
+.subckt nexor2_x0 i0=$abc$109383$new_n32571_ i1=$abc$109383$new_n32570_ nq=$abc$109383$new_n32572_
+.subckt nexor2_x0 i0=$abc$109383$new_n32572_ i1=$abc$109383$new_n32569_ nq=$abc$109383$new_n32573_
 .subckt buf_x4 i=$abc$109383$new_n31963_ q=$abc$109383$new_n32574_
 .subckt nand4_x0 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n32366_ i2=$abc$109383$new_n29347_ i3=$abc$109383$new_n29325_ nq=$abc$109383$new_n32575_
 .subckt nand2_x0 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29347_ nq=$abc$109383$new_n32576_
-.subckt a2_x2 i0=$abc$109383$new_n32576_ i1=$abc$109383$new_n32372_ q=$abc$109383$new_n32577_
-.subckt ao22_x2 i0=$abc$109383$new_n32371_ i1=$abc$109383$new_n32577_ i2=$abc$109383$new_n32575_ q=$abc$109383$new_n32578_
+.subckt and2_x1 i0=$abc$109383$new_n32576_ i1=$abc$109383$new_n32372_ q=$abc$109383$new_n32577_
+.subckt and21nor_x1 i0=$abc$109383$new_n32371_ i1=$abc$109383$new_n32577_ i2=$abc$109383$new_n32575_ nq=$abc$109383$new_n32578_
 .subckt buf_x4 i=$abc$109383$new_n31307_ q=$abc$109383$new_n32579_
 .subckt nand2_x0 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29526_ nq=$abc$109383$new_n32580_
 .subckt nand2_x0 i0=$abc$109383$new_n31963_ i1=$abc$109383$new_n29347_ nq=$abc$109383$new_n32581_
-.subckt a2_x2 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29503_ q=$abc$109383$new_n32582_
-.subckt nxr2_x1 i0=$abc$109383$new_n32582_ i1=$abc$109383$new_n32581_ nq=$abc$109383$new_n32583_
-.subckt nxr2_x1 i0=$abc$109383$new_n32583_ i1=$abc$109383$new_n32580_ nq=$abc$109383$new_n32584_
-.subckt nxr2_x1 i0=$abc$109383$new_n32584_ i1=$abc$109383$new_n32578_ nq=$abc$109383$new_n32585_
-.subckt nxr2_x1 i0=$abc$109383$new_n32585_ i1=$abc$109383$new_n32573_ nq=$abc$109383$new_n32586_
+.subckt and2_x1 i0=$abc$109383$new_n31962_ i1=$abc$109383$new_n29503_ q=$abc$109383$new_n32582_
+.subckt nexor2_x0 i0=$abc$109383$new_n32582_ i1=$abc$109383$new_n32581_ nq=$abc$109383$new_n32583_
+.subckt nexor2_x0 i0=$abc$109383$new_n32583_ i1=$abc$109383$new_n32580_ nq=$abc$109383$new_n32584_
+.subckt nexor2_x0 i0=$abc$109383$new_n32584_ i1=$abc$109383$new_n32578_ nq=$abc$109383$new_n32585_
+.subckt nexor2_x0 i0=$abc$109383$new_n32585_ i1=$abc$109383$new_n32573_ nq=$abc$109383$new_n32586_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[19] q=$abc$109383$new_n32587_
-.subckt a4_x2 i0=$abc$109383$new_n32587_ i1=$abc$109383$new_n31990_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29446_ q=$abc$109383$new_n32588_
+.subckt and4_x1 i0=$abc$109383$new_n32587_ i1=$abc$109383$new_n31990_ i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29446_ q=$abc$109383$new_n32588_
 .subckt nand2_x0 i0=$abc$109383$new_n32388_ i1=$abc$109383$new_n32588_ nq=$abc$109383$new_n32589_
-.subckt a2_x2 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29292_ q=$abc$109383$new_n32590_
-.subckt nxr2_x1 i0=$abc$109383$new_n32387_ i1=$abc$109383$new_n32590_ nq=$abc$109383$new_n32591_
-.subckt a2_x2 i0=$abc$109383$new_n32591_ i1=$abc$109383$new_n32383_ q=$abc$109383$new_n32592_
-.subckt ao22_x2 i0=$abc$109383$new_n32382_ i1=$abc$109383$new_n32592_ i2=$abc$109383$new_n32589_ q=$abc$109383$new_n32593_
+.subckt and2_x1 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29292_ q=$abc$109383$new_n32590_
+.subckt nexor2_x0 i0=$abc$109383$new_n32387_ i1=$abc$109383$new_n32590_ nq=$abc$109383$new_n32591_
+.subckt and2_x1 i0=$abc$109383$new_n32591_ i1=$abc$109383$new_n32383_ q=$abc$109383$new_n32592_
+.subckt and21nor_x1 i0=$abc$109383$new_n32382_ i1=$abc$109383$new_n32592_ i2=$abc$109383$new_n32589_ nq=$abc$109383$new_n32593_
 .subckt nand4_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n32559_ i2=$abc$109383$new_n29269_ i3=$abc$109383$new_n29415_ nq=$abc$109383$new_n32594_
 .subckt nand2_x0 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29269_ nq=$abc$109383$new_n32595_
-.subckt a2_x2 i0=$abc$109383$new_n32595_ i1=$abc$109383$new_n32385_ q=$abc$109383$new_n32596_
-.subckt ao22_x2 i0=$abc$109383$new_n32384_ i1=$abc$109383$new_n32596_ i2=$abc$109383$new_n32594_ q=$abc$109383$new_n32597_
+.subckt and2_x1 i0=$abc$109383$new_n32595_ i1=$abc$109383$new_n32385_ q=$abc$109383$new_n32596_
+.subckt and21nor_x1 i0=$abc$109383$new_n32384_ i1=$abc$109383$new_n32596_ i2=$abc$109383$new_n32594_ nq=$abc$109383$new_n32597_
 .subckt nand2_x0 i0=$abc$109383$new_n31469_ i1=$abc$109383$new_n29325_ nq=$abc$109383$new_n32598_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[17] i1=$abc$109383$new_n29268_ nq=$abc$109383$new_n32599_
-.subckt a2_x2 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29291_ q=$abc$109383$new_n32600_
-.subckt nxr2_x1 i0=$abc$109383$new_n32600_ i1=$abc$109383$new_n32599_ nq=$abc$109383$new_n32601_
-.subckt nxr2_x1 i0=$abc$109383$new_n32601_ i1=$abc$109383$new_n32598_ nq=$abc$109383$new_n32602_
+.subckt and2_x1 i0=$abc$109383$new_n31627_ i1=$abc$109383$new_n29291_ q=$abc$109383$new_n32600_
+.subckt nexor2_x0 i0=$abc$109383$new_n32600_ i1=$abc$109383$new_n32599_ nq=$abc$109383$new_n32601_
+.subckt nexor2_x0 i0=$abc$109383$new_n32601_ i1=$abc$109383$new_n32598_ nq=$abc$109383$new_n32602_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[20] i1=soc.cpu.minerva.payload__src2$45[19] i2=$abc$109383$new_n29471_ i3=$abc$109383$new_n29446_ nq=$abc$109383$new_n32603_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[20] i1=$abc$109383$new_n29471_ nq=$abc$109383$new_n32604_
-.subckt a2_x2 i0=$abc$109383$new_n32604_ i1=$abc$109383$new_n32395_ q=$abc$109383$new_n32605_
-.subckt ao22_x2 i0=$abc$109383$new_n32394_ i1=$abc$109383$new_n32605_ i2=$abc$109383$new_n32603_ q=$abc$109383$new_n32606_
-.subckt nxr2_x1 i0=$abc$109383$new_n32606_ i1=$abc$109383$new_n32602_ nq=$abc$109383$new_n32607_
-.subckt nxr2_x1 i0=$abc$109383$new_n32607_ i1=$abc$109383$new_n32597_ nq=$abc$109383$new_n32608_
-.subckt nxr2_x1 i0=$abc$109383$new_n32608_ i1=$abc$109383$new_n32593_ nq=$abc$109383$new_n32609_
-.subckt nxr2_x1 i0=$abc$109383$new_n32609_ i1=$abc$109383$new_n32586_ nq=$abc$109383$new_n32610_
+.subckt and2_x1 i0=$abc$109383$new_n32604_ i1=$abc$109383$new_n32395_ q=$abc$109383$new_n32605_
+.subckt and21nor_x1 i0=$abc$109383$new_n32394_ i1=$abc$109383$new_n32605_ i2=$abc$109383$new_n32603_ nq=$abc$109383$new_n32606_
+.subckt nexor2_x0 i0=$abc$109383$new_n32606_ i1=$abc$109383$new_n32602_ nq=$abc$109383$new_n32607_
+.subckt nexor2_x0 i0=$abc$109383$new_n32607_ i1=$abc$109383$new_n32597_ nq=$abc$109383$new_n32608_
+.subckt nexor2_x0 i0=$abc$109383$new_n32608_ i1=$abc$109383$new_n32593_ nq=$abc$109383$new_n32609_
+.subckt nexor2_x0 i0=$abc$109383$new_n32609_ i1=$abc$109383$new_n32586_ nq=$abc$109383$new_n32610_
 .subckt nand2_x0 i0=$abc$109383$new_n32610_ i1=$abc$109383$new_n32568_ nq=$abc$109383$new_n32611_
 .subckt nand2_x0 i0=$abc$109383$new_n32390_ i1=$abc$109383$new_n32557_ nq=$abc$109383$new_n32612_
-.subckt a2_x2 i0=$abc$109383$new_n32565_ i1=$abc$109383$new_n32378_ q=$abc$109383$new_n32613_
-.subckt ao22_x2 i0=$abc$109383$new_n32377_ i1=$abc$109383$new_n32613_ i2=$abc$109383$new_n32612_ q=$abc$109383$new_n32614_
-.subckt a2_x2 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29600_ q=$abc$109383$new_n32615_
-.subckt nxr2_x1 i0=$abc$109383$new_n32572_ i1=$abc$109383$new_n32615_ nq=$abc$109383$new_n32616_
-.subckt nxr2_x1 i0=$abc$109383$new_n32585_ i1=$abc$109383$new_n32616_ nq=$abc$109383$new_n32617_
-.subckt nxr2_x1 i0=$abc$109383$new_n32609_ i1=$abc$109383$new_n32617_ nq=$abc$109383$new_n32618_
+.subckt and2_x1 i0=$abc$109383$new_n32565_ i1=$abc$109383$new_n32378_ q=$abc$109383$new_n32613_
+.subckt and21nor_x1 i0=$abc$109383$new_n32377_ i1=$abc$109383$new_n32613_ i2=$abc$109383$new_n32612_ nq=$abc$109383$new_n32614_
+.subckt and2_x1 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29600_ q=$abc$109383$new_n32615_
+.subckt nexor2_x0 i0=$abc$109383$new_n32572_ i1=$abc$109383$new_n32615_ nq=$abc$109383$new_n32616_
+.subckt nexor2_x0 i0=$abc$109383$new_n32585_ i1=$abc$109383$new_n32616_ nq=$abc$109383$new_n32617_
+.subckt nexor2_x0 i0=$abc$109383$new_n32609_ i1=$abc$109383$new_n32617_ nq=$abc$109383$new_n32618_
 .subckt nand2_x0 i0=$abc$109383$new_n32618_ i1=$abc$109383$new_n32614_ nq=$abc$109383$new_n32619_
-.subckt a2_x2 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29416_ q=$abc$109383$new_n32620_
+.subckt and2_x1 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29416_ q=$abc$109383$new_n32620_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[20] i1=$abc$109383$new_n29446_ nq=$abc$109383$new_n32621_
-.subckt a2_x2 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29391_ q=$abc$109383$new_n32622_
-.subckt nxr2_x1 i0=$abc$109383$new_n32622_ i1=$abc$109383$new_n32621_ nq=$abc$109383$new_n32623_
-.subckt nxr2_x1 i0=$abc$109383$new_n32623_ i1=$abc$109383$new_n32620_ nq=$abc$109383$new_n32624_
+.subckt and2_x1 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29391_ q=$abc$109383$new_n32622_
+.subckt nexor2_x0 i0=$abc$109383$new_n32622_ i1=$abc$109383$new_n32621_ nq=$abc$109383$new_n32623_
+.subckt nexor2_x0 i0=$abc$109383$new_n32623_ i1=$abc$109383$new_n32620_ nq=$abc$109383$new_n32624_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[21] q=$abc$109383$new_n32625_
 .subckt buf_x4 i=$abc$109383$new_n32625_ q=$abc$109383$new_n32626_
-.subckt a2_x2 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29473_ q=$abc$109383$new_n32627_
-.subckt nxr2_x1 i0=$abc$109383$new_n32627_ i1=$abc$109383$new_n32624_ nq=$abc$109383$new_n32628_
+.subckt and2_x1 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29473_ q=$abc$109383$new_n32627_
+.subckt nexor2_x0 i0=$abc$109383$new_n32627_ i1=$abc$109383$new_n32624_ nq=$abc$109383$new_n32628_
 .subckt nand3_x0 i0=$abc$109383$new_n32628_ i1=$abc$109383$new_n32619_ i2=$abc$109383$new_n32611_ nq=$abc$109383$new_n32629_
-.subckt oa22_x2 i0=$abc$109383$new_n32611_ i1=$abc$109383$new_n32619_ i2=$abc$109383$new_n32628_ q=$abc$109383$new_n32630_
-.subckt oa22_x2 i0=$abc$109383$new_n32630_ i1=$abc$109383$new_n32629_ i2=$abc$109383$new_n32556_ q=$abc$109383$new_n32631_
+.subckt or21nand_x1 i0=$abc$109383$new_n32611_ i1=$abc$109383$new_n32619_ i2=$abc$109383$new_n32628_ nq=$abc$109383$new_n32630_
+.subckt or21nand_x1 i0=$abc$109383$new_n32630_ i1=$abc$109383$new_n32629_ i2=$abc$109383$new_n32556_ nq=$abc$109383$new_n32631_
 .subckt nand3_x0 i0=$abc$109383$new_n32630_ i1=$abc$109383$new_n32629_ i2=$abc$109383$new_n32556_ nq=$abc$109383$new_n32632_
-.subckt a2_x2 i0=$abc$109383$new_n32632_ i1=$abc$109383$new_n32631_ q=$abc$109383$new_n32633_
-.subckt nxr2_x1 i0=$abc$109383$new_n32633_ i1=$abc$109383$new_n32551_ nq=$abc$109383$new_n32634_
-.subckt nxr2_x1 i0=$abc$109383$new_n32634_ i1=$abc$109383$new_n32460_ nq=$abc$109383$new_n32635_
-.subckt nxr2_x1 i0=$abc$109383$new_n32635_ i1=$abc$109383$new_n32456_ nq=$abc$109383$new_n32636_
-.subckt nxr2_x1 i0=$abc$109383$new_n32636_ i1=$abc$109383$new_n32437_ nq=$abc$109383$new_n32637_
-.subckt nxr2_x1 i0=$abc$109383$new_n32637_ i1=$abc$109383$new_n32430_ nq=$abc$109383$new_n32638_
-.subckt nxr2_x1 i0=$abc$109383$new_n32638_ i1=$abc$109383$new_n32429_ nq=$abc$109383$new_n32639_
-.subckt nxr2_x1 i0=$abc$109383$new_n32639_ i1=$abc$109383$new_n32418_ nq=$abc$109383$new_n32640_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n32640_ i2=$abc$109383$new_n32413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102842
+.subckt and2_x1 i0=$abc$109383$new_n32632_ i1=$abc$109383$new_n32631_ q=$abc$109383$new_n32633_
+.subckt nexor2_x0 i0=$abc$109383$new_n32633_ i1=$abc$109383$new_n32551_ nq=$abc$109383$new_n32634_
+.subckt nexor2_x0 i0=$abc$109383$new_n32634_ i1=$abc$109383$new_n32460_ nq=$abc$109383$new_n32635_
+.subckt nexor2_x0 i0=$abc$109383$new_n32635_ i1=$abc$109383$new_n32456_ nq=$abc$109383$new_n32636_
+.subckt nexor2_x0 i0=$abc$109383$new_n32636_ i1=$abc$109383$new_n32437_ nq=$abc$109383$new_n32637_
+.subckt nexor2_x0 i0=$abc$109383$new_n32637_ i1=$abc$109383$new_n32430_ nq=$abc$109383$new_n32638_
+.subckt nexor2_x0 i0=$abc$109383$new_n32638_ i1=$abc$109383$new_n32429_ nq=$abc$109383$new_n32639_
+.subckt nexor2_x0 i0=$abc$109383$new_n32639_ i1=$abc$109383$new_n32418_ nq=$abc$109383$new_n32640_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n32640_ i2=$abc$109383$new_n32413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102842
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[22] nq=$abc$109383$new_n32642_
-.subckt ao22_x2 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n32642_ q=$abc$109383$new_n32643_
+.subckt and21nor_x1 i0=$abc$109383$new_n30811_ i1=$abc$109383$new_n30924_ i2=$abc$109383$new_n32642_ nq=$abc$109383$new_n32643_
 .subckt nor2_x0 i0=$abc$109383$new_n32643_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n32644_
 .subckt nor2_x0 i0=$abc$109383$new_n32638_ i1=$abc$109383$new_n32429_ nq=$abc$109383$new_n32645_
-.subckt a2_x2 i0=$abc$109383$new_n32182_ i1=$abc$109383$new_n32222_ q=$abc$109383$new_n32646_
-.subckt ao22_x2 i0=$abc$109383$new_n32425_ i1=$abc$109383$new_n32646_ i2=$abc$109383$new_n32405_ q=$abc$109383$new_n32647_
-.subckt oa22_x2 i0=$abc$109383$new_n32226_ i1=$abc$109383$new_n32406_ i2=$abc$109383$new_n32647_ q=$abc$109383$new_n32648_
-.subckt nxr2_x1 i0=$abc$109383$new_n32638_ i1=$abc$109383$new_n32648_ nq=$abc$109383$new_n32649_
-.subckt oa22_x2 i0=$abc$109383$new_n32418_ i1=$abc$109383$new_n32649_ i2=$abc$109383$new_n32645_ q=$abc$109383$new_n32650_
-.subckt a2_x2 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32434_ q=$abc$109383$new_n32651_
-.subckt oa22_x2 i0=$abc$109383$new_n32421_ i1=$abc$109383$new_n32404_ i2=$abc$109383$new_n32651_ q=$abc$109383$new_n32652_
+.subckt and2_x1 i0=$abc$109383$new_n32182_ i1=$abc$109383$new_n32222_ q=$abc$109383$new_n32646_
+.subckt and21nor_x1 i0=$abc$109383$new_n32425_ i1=$abc$109383$new_n32646_ i2=$abc$109383$new_n32405_ nq=$abc$109383$new_n32647_
+.subckt or21nand_x1 i0=$abc$109383$new_n32226_ i1=$abc$109383$new_n32406_ i2=$abc$109383$new_n32647_ nq=$abc$109383$new_n32648_
+.subckt nexor2_x0 i0=$abc$109383$new_n32638_ i1=$abc$109383$new_n32648_ nq=$abc$109383$new_n32649_
+.subckt or21nand_x1 i0=$abc$109383$new_n32418_ i1=$abc$109383$new_n32649_ i2=$abc$109383$new_n32645_ nq=$abc$109383$new_n32650_
+.subckt and2_x1 i0=$abc$109383$new_n32403_ i1=$abc$109383$new_n32434_ q=$abc$109383$new_n32651_
+.subckt or21nand_x1 i0=$abc$109383$new_n32421_ i1=$abc$109383$new_n32404_ i2=$abc$109383$new_n32651_ nq=$abc$109383$new_n32652_
 .subckt nand2_x0 i0=$abc$109383$new_n32636_ i1=$abc$109383$new_n32652_ nq=$abc$109383$new_n32653_
-.subckt nxr2_x1 i0=$abc$109383$new_n32636_ i1=$abc$109383$new_n32652_ nq=$abc$109383$new_n32654_
-.subckt o2_x2 i0=$abc$109383$new_n32253_ i1=$abc$109383$new_n32242_ q=$abc$109383$new_n32655_
-.subckt ao22_x2 i0=$abc$109383$new_n32655_ i1=$abc$109383$new_n32654_ i2=$abc$109383$new_n32653_ q=$abc$109383$new_n32656_
+.subckt nexor2_x0 i0=$abc$109383$new_n32636_ i1=$abc$109383$new_n32652_ nq=$abc$109383$new_n32654_
+.subckt or2_x1 i0=$abc$109383$new_n32253_ i1=$abc$109383$new_n32242_ q=$abc$109383$new_n32655_
+.subckt and21nor_x1 i0=$abc$109383$new_n32655_ i1=$abc$109383$new_n32654_ i2=$abc$109383$new_n32653_ nq=$abc$109383$new_n32656_
 .subckt nor2_x0 i0=$abc$109383$new_n32455_ i1=$abc$109383$new_n32448_ nq=$abc$109383$new_n32657_
 .subckt nand2_x0 i0=$abc$109383$new_n32345_ i1=$abc$109383$new_n32465_ nq=$abc$109383$new_n32658_
 .subckt nand2_x0 i0=$abc$109383$new_n32346_ i1=$abc$109383$new_n32467_ nq=$abc$109383$new_n32659_
-.subckt a2_x2 i0=$abc$109383$new_n32659_ i1=$abc$109383$new_n32658_ q=$abc$109383$new_n32660_
-.subckt nxr2_x1 i0=$abc$109383$new_n32550_ i1=$abc$109383$new_n32660_ nq=$abc$109383$new_n32661_
-.subckt nxr2_x1 i0=$abc$109383$new_n32633_ i1=$abc$109383$new_n32661_ nq=$abc$109383$new_n32662_
-.subckt o2_x2 i0=$abc$109383$new_n32459_ i1=$abc$109383$new_n32349_ q=$abc$109383$new_n32663_
-.subckt oa22_x2 i0=$abc$109383$new_n32458_ i1=$abc$109383$new_n32663_ i2=$abc$109383$new_n32662_ q=$abc$109383$new_n32664_
+.subckt and2_x1 i0=$abc$109383$new_n32659_ i1=$abc$109383$new_n32658_ q=$abc$109383$new_n32660_
+.subckt nexor2_x0 i0=$abc$109383$new_n32550_ i1=$abc$109383$new_n32660_ nq=$abc$109383$new_n32661_
+.subckt nexor2_x0 i0=$abc$109383$new_n32633_ i1=$abc$109383$new_n32661_ nq=$abc$109383$new_n32662_
+.subckt or2_x1 i0=$abc$109383$new_n32459_ i1=$abc$109383$new_n32349_ q=$abc$109383$new_n32663_
+.subckt or21nand_x1 i0=$abc$109383$new_n32458_ i1=$abc$109383$new_n32663_ i2=$abc$109383$new_n32662_ nq=$abc$109383$new_n32664_
 .subckt nand2_x0 i0=$abc$109383$new_n32663_ i1=$abc$109383$new_n32458_ nq=$abc$109383$new_n32665_
-.subckt nxr2_x1 i0=$abc$109383$new_n32634_ i1=$abc$109383$new_n32665_ nq=$abc$109383$new_n32666_
-.subckt ao22_x2 i0=$abc$109383$new_n32456_ i1=$abc$109383$new_n32666_ i2=$abc$109383$new_n32664_ q=$abc$109383$new_n32667_
-.subckt a2_x2 i0=$abc$109383$new_n32295_ i1=$abc$109383$new_n32476_ q=$abc$109383$new_n32668_
+.subckt nexor2_x0 i0=$abc$109383$new_n32634_ i1=$abc$109383$new_n32665_ nq=$abc$109383$new_n32666_
+.subckt and21nor_x1 i0=$abc$109383$new_n32456_ i1=$abc$109383$new_n32666_ i2=$abc$109383$new_n32664_ nq=$abc$109383$new_n32667_
+.subckt and2_x1 i0=$abc$109383$new_n32295_ i1=$abc$109383$new_n32476_ q=$abc$109383$new_n32668_
 .subckt nand2_x0 i0=$abc$109383$new_n32479_ i1=$abc$109383$new_n32290_ nq=$abc$109383$new_n32669_
 .subckt nand2_x0 i0=$abc$109383$new_n29315_ i1=$abc$109383$new_n29585_ nq=$abc$109383$new_n32670_
-.subckt nxr2_x1 i0=$abc$109383$new_n32285_ i1=$abc$109383$new_n32670_ nq=$abc$109383$new_n32671_
-.subckt oa22_x2 i0=$abc$109383$new_n32671_ i1=$abc$109383$new_n32669_ i2=$abc$109383$new_n32668_ q=$abc$109383$new_n32672_
+.subckt nexor2_x0 i0=$abc$109383$new_n32285_ i1=$abc$109383$new_n32670_ nq=$abc$109383$new_n32671_
+.subckt or21nand_x1 i0=$abc$109383$new_n32671_ i1=$abc$109383$new_n32669_ i2=$abc$109383$new_n32668_ nq=$abc$109383$new_n32672_
 .subckt nand2_x0 i0=$abc$109383$new_n32497_ i1=$abc$109383$new_n32672_ nq=$abc$109383$new_n32673_
-.subckt nxr2_x1 i0=$abc$109383$new_n32497_ i1=$abc$109383$new_n32672_ nq=$abc$109383$new_n32674_
+.subckt nexor2_x0 i0=$abc$109383$new_n32497_ i1=$abc$109383$new_n32672_ nq=$abc$109383$new_n32674_
 .subckt nand4_x0 i0=$abc$109383$new_n29258_ i1=$abc$109383$new_n29376_ i2=$abc$109383$new_n29612_ i3=$abc$109383$new_n29636_ nq=$abc$109383$new_n32675_
-.subckt a2_x2 i0=$abc$109383$new_n32471_ i1=$abc$109383$new_n32283_ q=$abc$109383$new_n32676_
-.subckt ao22_x2 i0=$abc$109383$new_n32670_ i1=$abc$109383$new_n32676_ i2=$abc$109383$new_n32675_ q=$abc$109383$new_n32677_
-.subckt ao22_x2 i0=$abc$109383$new_n32677_ i1=$abc$109383$new_n32674_ i2=$abc$109383$new_n32673_ q=$abc$109383$new_n32678_
-.subckt a2_x2 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32360_ q=$abc$109383$new_n32679_
+.subckt and2_x1 i0=$abc$109383$new_n32471_ i1=$abc$109383$new_n32283_ q=$abc$109383$new_n32676_
+.subckt and21nor_x1 i0=$abc$109383$new_n32670_ i1=$abc$109383$new_n32676_ i2=$abc$109383$new_n32675_ nq=$abc$109383$new_n32677_
+.subckt and21nor_x1 i0=$abc$109383$new_n32677_ i1=$abc$109383$new_n32674_ i2=$abc$109383$new_n32673_ nq=$abc$109383$new_n32678_
+.subckt and2_x1 i0=$abc$109383$new_n32392_ i1=$abc$109383$new_n32360_ q=$abc$109383$new_n32679_
 .subckt nand2_x0 i0=$abc$109383$new_n32549_ i1=$abc$109383$new_n32679_ nq=$abc$109383$new_n32680_
-.subckt nxr2_x1 i0=$abc$109383$new_n32498_ i1=$abc$109383$new_n32677_ nq=$abc$109383$new_n32681_
-.subckt nxr2_x1 i0=$abc$109383$new_n32548_ i1=$abc$109383$new_n32681_ nq=$abc$109383$new_n32682_
-.subckt a2_x2 i0=$abc$109383$new_n32682_ i1=$abc$109383$new_n32469_ q=$abc$109383$new_n32683_
-.subckt ao22_x2 i0=$abc$109383$new_n32660_ i1=$abc$109383$new_n32683_ i2=$abc$109383$new_n32680_ q=$abc$109383$new_n32684_
-.subckt nxr2_x1 i0=$abc$109383$new_n32684_ i1=$abc$109383$new_n32678_ nq=$abc$109383$new_n32685_
+.subckt nexor2_x0 i0=$abc$109383$new_n32498_ i1=$abc$109383$new_n32677_ nq=$abc$109383$new_n32681_
+.subckt nexor2_x0 i0=$abc$109383$new_n32548_ i1=$abc$109383$new_n32681_ nq=$abc$109383$new_n32682_
+.subckt and2_x1 i0=$abc$109383$new_n32682_ i1=$abc$109383$new_n32469_ q=$abc$109383$new_n32683_
+.subckt and21nor_x1 i0=$abc$109383$new_n32660_ i1=$abc$109383$new_n32683_ i2=$abc$109383$new_n32680_ nq=$abc$109383$new_n32684_
+.subckt nexor2_x0 i0=$abc$109383$new_n32684_ i1=$abc$109383$new_n32678_ nq=$abc$109383$new_n32685_
 .subckt nand2_x0 i0=$abc$109383$new_n32632_ i1=$abc$109383$new_n32631_ nq=$abc$109383$new_n32686_
-.subckt ao22_x2 i0=$abc$109383$new_n32551_ i1=$abc$109383$new_n32686_ i2=$abc$109383$new_n32632_ q=$abc$109383$new_n32687_
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-.subckt nxr2_x1 i0=$abc$109383$new_n32775_ i1=$abc$109383$new_n32725_ nq=$abc$109383$new_n32776_
-.subckt nxr2_x1 i0=$abc$109383$new_n32776_ i1=$abc$109383$new_n32611_ nq=$abc$109383$new_n32777_
-.subckt nxr2_x1 i0=$abc$109383$new_n32777_ i1=$abc$109383$new_n32694_ nq=$abc$109383$new_n32778_
-.subckt a3_x2 i0=$abc$109383$new_n32628_ i1=$abc$109383$new_n32619_ i2=$abc$109383$new_n32611_ q=$abc$109383$new_n32779_
-.subckt a2_x2 i0=$abc$109383$new_n32388_ i1=$abc$109383$new_n32588_ q=$abc$109383$new_n32780_
+.subckt and2_x1 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29526_ q=$abc$109383$new_n32769_
+.subckt nexor2_x0 i0=$abc$109383$new_n32583_ i1=$abc$109383$new_n32769_ nq=$abc$109383$new_n32770_
+.subckt and2_x1 i0=$abc$109383$new_n32770_ i1=$abc$109383$new_n32578_ q=$abc$109383$new_n32771_
+.subckt and21nor_x1 i0=$abc$109383$new_n32616_ i1=$abc$109383$new_n32771_ i2=$abc$109383$new_n32768_ nq=$abc$109383$new_n32772_
+.subckt nexor2_x0 i0=$abc$109383$new_n32772_ i1=$abc$109383$new_n32763_ nq=$abc$109383$new_n32773_
+.subckt nexor2_x0 i0=$abc$109383$new_n32773_ i1=$abc$109383$new_n32747_ nq=$abc$109383$new_n32774_
+.subckt nexor2_x0 i0=$abc$109383$new_n32774_ i1=$abc$109383$new_n32735_ nq=$abc$109383$new_n32775_
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+.subckt and2_x1 i0=$abc$109383$new_n32388_ i1=$abc$109383$new_n32588_ q=$abc$109383$new_n32780_
 .subckt nand2_x0 i0=$abc$109383$new_n32591_ i1=$abc$109383$new_n32383_ nq=$abc$109383$new_n32781_
-.subckt oa22_x2 i0=$abc$109383$new_n32564_ i1=$abc$109383$new_n32781_ i2=$abc$109383$new_n32780_ q=$abc$109383$new_n32782_
-.subckt a2_x2 i0=$abc$109383$new_n32608_ i1=$abc$109383$new_n32782_ q=$abc$109383$new_n32783_
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+.subckt and2_x1 i0=$abc$109383$new_n32608_ i1=$abc$109383$new_n32782_ q=$abc$109383$new_n32783_
 .subckt buf_x4 i=$abc$109383$new_n32559_ q=$abc$109383$new_n32784_
-.subckt a4_x2 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32784_ i2=$abc$109383$new_n29270_ i3=$abc$109383$new_n29416_ q=$abc$109383$new_n32785_
+.subckt and4_x1 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32784_ i2=$abc$109383$new_n29270_ i3=$abc$109383$new_n29416_ q=$abc$109383$new_n32785_
 .subckt nand2_x0 i0=$abc$109383$new_n32595_ i1=$abc$109383$new_n32385_ nq=$abc$109383$new_n32786_
-.subckt oa22_x2 i0=$abc$109383$new_n32590_ i1=$abc$109383$new_n32786_ i2=$abc$109383$new_n32785_ q=$abc$109383$new_n32787_
-.subckt nxr2_x1 i0=$abc$109383$new_n32607_ i1=$abc$109383$new_n32787_ nq=$abc$109383$new_n32788_
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+.subckt nexor2_x0 i0=$abc$109383$new_n32607_ i1=$abc$109383$new_n32787_ nq=$abc$109383$new_n32788_
 .subckt nand2_x0 i0=$abc$109383$new_n32788_ i1=$abc$109383$new_n32593_ nq=$abc$109383$new_n32789_
-.subckt oa22_x2 i0=$abc$109383$new_n32617_ i1=$abc$109383$new_n32789_ i2=$abc$109383$new_n32783_ q=$abc$109383$new_n32790_
+.subckt or21nand_x1 i0=$abc$109383$new_n32617_ i1=$abc$109383$new_n32789_ i2=$abc$109383$new_n32783_ nq=$abc$109383$new_n32790_
 .subckt nand2_x0 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29625_ nq=$abc$109383$new_n32791_
 .subckt nand2_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n29574_ nq=$abc$109383$new_n32792_
-.subckt a2_x2 i0=$abc$109383$new_n32736_ i1=$abc$109383$new_n29600_ q=$abc$109383$new_n32793_
-.subckt nxr2_x1 i0=$abc$109383$new_n32793_ i1=$abc$109383$new_n32792_ nq=$abc$109383$new_n32794_
-.subckt nxr2_x1 i0=$abc$109383$new_n32794_ i1=$abc$109383$new_n32791_ nq=$abc$109383$new_n32795_
+.subckt and2_x1 i0=$abc$109383$new_n32736_ i1=$abc$109383$new_n29600_ q=$abc$109383$new_n32793_
+.subckt nexor2_x0 i0=$abc$109383$new_n32793_ i1=$abc$109383$new_n32792_ nq=$abc$109383$new_n32794_
+.subckt nexor2_x0 i0=$abc$109383$new_n32794_ i1=$abc$109383$new_n32791_ nq=$abc$109383$new_n32795_
 .subckt nand4_x0 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n32764_ i2=$abc$109383$new_n29504_ i3=$abc$109383$new_n29348_ nq=$abc$109383$new_n32796_
 .subckt nand2_x0 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29504_ nq=$abc$109383$new_n32797_
-.subckt a2_x2 i0=$abc$109383$new_n32797_ i1=$abc$109383$new_n32581_ q=$abc$109383$new_n32798_
-.subckt ao22_x2 i0=$abc$109383$new_n32580_ i1=$abc$109383$new_n32798_ i2=$abc$109383$new_n32796_ q=$abc$109383$new_n32799_
+.subckt and2_x1 i0=$abc$109383$new_n32797_ i1=$abc$109383$new_n32581_ q=$abc$109383$new_n32798_
+.subckt and21nor_x1 i0=$abc$109383$new_n32580_ i1=$abc$109383$new_n32798_ i2=$abc$109383$new_n32796_ nq=$abc$109383$new_n32799_
 .subckt nand2_x0 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29551_ nq=$abc$109383$new_n32800_
 .subckt nand2_x0 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n29503_ nq=$abc$109383$new_n32801_
-.subckt a2_x2 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29526_ q=$abc$109383$new_n32802_
-.subckt nxr2_x1 i0=$abc$109383$new_n32802_ i1=$abc$109383$new_n32801_ nq=$abc$109383$new_n32803_
-.subckt nxr2_x1 i0=$abc$109383$new_n32803_ i1=$abc$109383$new_n32800_ nq=$abc$109383$new_n32804_
-.subckt nxr2_x1 i0=$abc$109383$new_n32804_ i1=$abc$109383$new_n32799_ nq=$abc$109383$new_n32805_
-.subckt nxr2_x1 i0=$abc$109383$new_n32805_ i1=$abc$109383$new_n32795_ nq=$abc$109383$new_n32806_
-.subckt a4_x2 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29472_ i3=$abc$109383$new_n29446_ q=$abc$109383$new_n32807_
+.subckt and2_x1 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29526_ q=$abc$109383$new_n32802_
+.subckt nexor2_x0 i0=$abc$109383$new_n32802_ i1=$abc$109383$new_n32801_ nq=$abc$109383$new_n32803_
+.subckt nexor2_x0 i0=$abc$109383$new_n32803_ i1=$abc$109383$new_n32800_ nq=$abc$109383$new_n32804_
+.subckt nexor2_x0 i0=$abc$109383$new_n32804_ i1=$abc$109383$new_n32799_ nq=$abc$109383$new_n32805_
+.subckt nexor2_x0 i0=$abc$109383$new_n32805_ i1=$abc$109383$new_n32795_ nq=$abc$109383$new_n32806_
+.subckt and4_x1 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29472_ i3=$abc$109383$new_n29446_ q=$abc$109383$new_n32807_
 .subckt nand2_x0 i0=$abc$109383$new_n32604_ i1=$abc$109383$new_n32395_ nq=$abc$109383$new_n32808_
-.subckt a2_x2 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29390_ q=$abc$109383$new_n32809_
-.subckt oa22_x2 i0=$abc$109383$new_n32809_ i1=$abc$109383$new_n32808_ i2=$abc$109383$new_n32807_ q=$abc$109383$new_n32810_
+.subckt and2_x1 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29390_ q=$abc$109383$new_n32809_
+.subckt or21nand_x1 i0=$abc$109383$new_n32809_ i1=$abc$109383$new_n32808_ i2=$abc$109383$new_n32807_ nq=$abc$109383$new_n32810_
 .subckt nand2_x0 i0=$abc$109383$new_n32810_ i1=$abc$109383$new_n32602_ nq=$abc$109383$new_n32811_
-.subckt a2_x2 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29326_ q=$abc$109383$new_n32812_
-.subckt nxr2_x1 i0=$abc$109383$new_n32601_ i1=$abc$109383$new_n32812_ nq=$abc$109383$new_n32813_
-.subckt a2_x2 i0=$abc$109383$new_n32606_ i1=$abc$109383$new_n32813_ q=$abc$109383$new_n32814_
-.subckt ao22_x2 i0=$abc$109383$new_n32597_ i1=$abc$109383$new_n32814_ i2=$abc$109383$new_n32811_ q=$abc$109383$new_n32815_
+.subckt and2_x1 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29326_ q=$abc$109383$new_n32812_
+.subckt nexor2_x0 i0=$abc$109383$new_n32601_ i1=$abc$109383$new_n32812_ nq=$abc$109383$new_n32813_
+.subckt and2_x1 i0=$abc$109383$new_n32606_ i1=$abc$109383$new_n32813_ q=$abc$109383$new_n32814_
+.subckt and21nor_x1 i0=$abc$109383$new_n32597_ i1=$abc$109383$new_n32814_ i2=$abc$109383$new_n32811_ nq=$abc$109383$new_n32815_
 .subckt nand4_x0 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32559_ i2=$abc$109383$new_n29293_ i3=$abc$109383$new_n29270_ nq=$abc$109383$new_n32816_
 .subckt nand2_x0 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29292_ nq=$abc$109383$new_n32817_
-.subckt a2_x2 i0=$abc$109383$new_n32817_ i1=$abc$109383$new_n32599_ q=$abc$109383$new_n32818_
-.subckt ao22_x2 i0=$abc$109383$new_n32598_ i1=$abc$109383$new_n32818_ i2=$abc$109383$new_n32816_ q=$abc$109383$new_n32819_
+.subckt and2_x1 i0=$abc$109383$new_n32817_ i1=$abc$109383$new_n32599_ q=$abc$109383$new_n32818_
+.subckt and21nor_x1 i0=$abc$109383$new_n32598_ i1=$abc$109383$new_n32818_ i2=$abc$109383$new_n32816_ nq=$abc$109383$new_n32819_
 .subckt nand2_x0 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29348_ nq=$abc$109383$new_n32820_
 .subckt nand2_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n29292_ nq=$abc$109383$new_n32821_
-.subckt a2_x2 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29325_ q=$abc$109383$new_n32822_
-.subckt nxr2_x1 i0=$abc$109383$new_n32822_ i1=$abc$109383$new_n32821_ nq=$abc$109383$new_n32823_
-.subckt nxr2_x1 i0=$abc$109383$new_n32823_ i1=$abc$109383$new_n32820_ nq=$abc$109383$new_n32824_
+.subckt and2_x1 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29325_ q=$abc$109383$new_n32822_
+.subckt nexor2_x0 i0=$abc$109383$new_n32822_ i1=$abc$109383$new_n32821_ nq=$abc$109383$new_n32823_
+.subckt nexor2_x0 i0=$abc$109383$new_n32823_ i1=$abc$109383$new_n32820_ nq=$abc$109383$new_n32824_
 .subckt nand4_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29390_ i3=$abc$109383$new_n29446_ nq=$abc$109383$new_n32825_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[19] i1=$abc$109383$new_n29390_ nq=$abc$109383$new_n32826_
-.subckt a2_x2 i0=$abc$109383$new_n32826_ i1=$abc$109383$new_n32621_ q=$abc$109383$new_n32827_
+.subckt and2_x1 i0=$abc$109383$new_n32826_ i1=$abc$109383$new_n32621_ q=$abc$109383$new_n32827_
 .subckt nand2_x0 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29415_ nq=$abc$109383$new_n32828_
-.subckt ao22_x2 i0=$abc$109383$new_n32828_ i1=$abc$109383$new_n32827_ i2=$abc$109383$new_n32825_ q=$abc$109383$new_n32829_
-.subckt nxr2_x1 i0=$abc$109383$new_n32829_ i1=$abc$109383$new_n32824_ nq=$abc$109383$new_n32830_
-.subckt nxr2_x1 i0=$abc$109383$new_n32830_ i1=$abc$109383$new_n32819_ nq=$abc$109383$new_n32831_
-.subckt nxr2_x1 i0=$abc$109383$new_n32831_ i1=$abc$109383$new_n32815_ nq=$abc$109383$new_n32832_
-.subckt nxr2_x1 i0=$abc$109383$new_n32832_ i1=$abc$109383$new_n32806_ nq=$abc$109383$new_n32833_
+.subckt and21nor_x1 i0=$abc$109383$new_n32828_ i1=$abc$109383$new_n32827_ i2=$abc$109383$new_n32825_ nq=$abc$109383$new_n32829_
+.subckt nexor2_x0 i0=$abc$109383$new_n32829_ i1=$abc$109383$new_n32824_ nq=$abc$109383$new_n32830_
+.subckt nexor2_x0 i0=$abc$109383$new_n32830_ i1=$abc$109383$new_n32819_ nq=$abc$109383$new_n32831_
+.subckt nexor2_x0 i0=$abc$109383$new_n32831_ i1=$abc$109383$new_n32815_ nq=$abc$109383$new_n32832_
+.subckt nexor2_x0 i0=$abc$109383$new_n32832_ i1=$abc$109383$new_n32806_ nq=$abc$109383$new_n32833_
 .subckt nand2_x0 i0=$abc$109383$new_n32833_ i1=$abc$109383$new_n32790_ nq=$abc$109383$new_n32834_
 .subckt nand2_x0 i0=$abc$109383$new_n32608_ i1=$abc$109383$new_n32782_ nq=$abc$109383$new_n32835_
-.subckt a2_x2 i0=$abc$109383$new_n32788_ i1=$abc$109383$new_n32593_ q=$abc$109383$new_n32836_
-.subckt ao22_x2 i0=$abc$109383$new_n32586_ i1=$abc$109383$new_n32836_ i2=$abc$109383$new_n32835_ q=$abc$109383$new_n32837_
+.subckt and2_x1 i0=$abc$109383$new_n32788_ i1=$abc$109383$new_n32593_ q=$abc$109383$new_n32836_
+.subckt and21nor_x1 i0=$abc$109383$new_n32586_ i1=$abc$109383$new_n32836_ i2=$abc$109383$new_n32835_ nq=$abc$109383$new_n32837_
 .subckt buf_x4 i=$abc$109383$new_n30705_ q=$abc$109383$new_n32838_
-.subckt a2_x2 i0=$abc$109383$new_n32838_ i1=$abc$109383$new_n29625_ q=$abc$109383$new_n32839_
-.subckt nxr2_x1 i0=$abc$109383$new_n32794_ i1=$abc$109383$new_n32839_ nq=$abc$109383$new_n32840_
-.subckt nxr2_x1 i0=$abc$109383$new_n32805_ i1=$abc$109383$new_n32840_ nq=$abc$109383$new_n32841_
-.subckt nxr2_x1 i0=$abc$109383$new_n32832_ i1=$abc$109383$new_n32841_ nq=$abc$109383$new_n32842_
+.subckt and2_x1 i0=$abc$109383$new_n32838_ i1=$abc$109383$new_n29625_ q=$abc$109383$new_n32839_
+.subckt nexor2_x0 i0=$abc$109383$new_n32794_ i1=$abc$109383$new_n32839_ nq=$abc$109383$new_n32840_
+.subckt nexor2_x0 i0=$abc$109383$new_n32805_ i1=$abc$109383$new_n32840_ nq=$abc$109383$new_n32841_
+.subckt nexor2_x0 i0=$abc$109383$new_n32832_ i1=$abc$109383$new_n32841_ nq=$abc$109383$new_n32842_
 .subckt nand2_x0 i0=$abc$109383$new_n32842_ i1=$abc$109383$new_n32837_ nq=$abc$109383$new_n32843_
-.subckt nxr2_x1 i0=$abc$109383$new_n32623_ i1=$abc$109383$new_n32828_ nq=$abc$109383$new_n32844_
+.subckt nexor2_x0 i0=$abc$109383$new_n32623_ i1=$abc$109383$new_n32828_ nq=$abc$109383$new_n32844_
 .subckt nand2_x0 i0=$abc$109383$new_n32627_ i1=$abc$109383$new_n32844_ nq=$abc$109383$new_n32845_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29269_ q=$abc$109383$new_n32846_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29269_ q=$abc$109383$new_n32846_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[20] i1=$abc$109383$new_n29390_ nq=$abc$109383$new_n32847_
 .subckt buf_x4 i=$abc$109383$new_n32587_ q=$abc$109383$new_n32848_
-.subckt a2_x2 i0=$abc$109383$new_n32848_ i1=$abc$109383$new_n29417_ q=$abc$109383$new_n32849_
-.subckt nxr2_x1 i0=$abc$109383$new_n32849_ i1=$abc$109383$new_n32847_ nq=$abc$109383$new_n32850_
-.subckt nxr2_x1 i0=$abc$109383$new_n32850_ i1=$abc$109383$new_n32846_ nq=$abc$109383$new_n32851_
+.subckt and2_x1 i0=$abc$109383$new_n32848_ i1=$abc$109383$new_n29417_ q=$abc$109383$new_n32849_
+.subckt nexor2_x0 i0=$abc$109383$new_n32849_ i1=$abc$109383$new_n32847_ nq=$abc$109383$new_n32850_
+.subckt nexor2_x0 i0=$abc$109383$new_n32850_ i1=$abc$109383$new_n32846_ nq=$abc$109383$new_n32851_
 .subckt nand2_x0 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29448_ nq=$abc$109383$new_n32852_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[22] q=$abc$109383$new_n32853_
 .subckt buf_x4 i=$abc$109383$new_n32853_ q=$abc$109383$new_n32854_
-.subckt a2_x2 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29473_ q=$abc$109383$new_n32855_
-.subckt nxr2_x1 i0=$abc$109383$new_n32855_ i1=$abc$109383$new_n32852_ nq=$abc$109383$new_n32856_
-.subckt nxr2_x1 i0=$abc$109383$new_n32856_ i1=$abc$109383$new_n32851_ nq=$abc$109383$new_n32857_
-.subckt nxr2_x1 i0=$abc$109383$new_n32857_ i1=$abc$109383$new_n32845_ nq=$abc$109383$new_n32858_
+.subckt and2_x1 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29473_ q=$abc$109383$new_n32855_
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+.subckt nexor2_x0 i0=$abc$109383$new_n32856_ i1=$abc$109383$new_n32851_ nq=$abc$109383$new_n32857_
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 .subckt nand3_x0 i0=$abc$109383$new_n32858_ i1=$abc$109383$new_n32843_ i2=$abc$109383$new_n32834_ nq=$abc$109383$new_n32859_
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 .subckt nand3_x0 i0=$abc$109383$new_n32860_ i1=$abc$109383$new_n32859_ i2=$abc$109383$new_n32779_ nq=$abc$109383$new_n32861_
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-.subckt nxr2_x1 i0=$abc$109383$new_n32865_ i1=$abc$109383$new_n32685_ nq=$abc$109383$new_n32866_
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[23] nq=$abc$109383$new_n32872_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n32873_
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 .subckt nor2_x0 i0=$abc$109383$new_n32874_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n32875_
 .subckt nor2_x0 i0=$abc$109383$new_n32868_ i1=$abc$109383$new_n32656_ nq=$abc$109383$new_n32876_
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 .subckt nor2_x0 i0=$abc$109383$new_n32459_ i1=$abc$109383$new_n32349_ nq=$abc$109383$new_n32881_
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-.subckt a2_x2 i0=$abc$109383$new_n32497_ i1=$abc$109383$new_n32672_ q=$abc$109383$new_n32888_
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 .subckt nand2_x0 i0=$abc$109383$new_n32865_ i1=$abc$109383$new_n32890_ nq=$abc$109383$new_n32891_
-.subckt a3_x2 i0=$abc$109383$new_n32630_ i1=$abc$109383$new_n32629_ i2=$abc$109383$new_n32556_ q=$abc$109383$new_n32892_
-.subckt oa22_x2 i0=$abc$109383$new_n32661_ i1=$abc$109383$new_n32633_ i2=$abc$109383$new_n32892_ q=$abc$109383$new_n32893_
-.subckt nxr2_x1 i0=$abc$109383$new_n32864_ i1=$abc$109383$new_n32893_ nq=$abc$109383$new_n32894_
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 .subckt nand2_x0 i0=$abc$109383$new_n32894_ i1=$abc$109383$new_n32685_ nq=$abc$109383$new_n32895_
 .subckt nand3_x0 i0=$abc$109383$new_n32895_ i1=$abc$109383$new_n32891_ i2=$abc$109383$new_n32887_ nq=$abc$109383$new_n32896_
-.subckt nxr2_x1 i0=$abc$109383$new_n32866_ i1=$abc$109383$new_n32887_ nq=$abc$109383$new_n32897_
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-.subckt a2_x2 i0=$abc$109383$new_n32549_ i1=$abc$109383$new_n32679_ q=$abc$109383$new_n32900_
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-.subckt a2_x2 i0=$abc$109383$new_n32901_ i1=$abc$109383$new_n32889_ q=$abc$109383$new_n32902_
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 .subckt nand2_x0 i0=$abc$109383$new_n32547_ i1=$abc$109383$new_n32692_ nq=$abc$109383$new_n32903_
 .subckt nand2_x0 i0=$abc$109383$new_n32548_ i1=$abc$109383$new_n32681_ nq=$abc$109383$new_n32904_
-.subckt a2_x2 i0=$abc$109383$new_n32904_ i1=$abc$109383$new_n32903_ q=$abc$109383$new_n32905_
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 .subckt nand2_x0 i0=$abc$109383$new_n32633_ i1=$abc$109383$new_n32661_ nq=$abc$109383$new_n32908_
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-.subckt ao22_x2 i0=$abc$109383$new_n32685_ i1=$abc$109383$new_n32894_ i2=$abc$109383$new_n32909_ q=$abc$109383$new_n32910_
-.subckt a2_x2 i0=$abc$109383$new_n32495_ i1=$abc$109383$new_n32702_ q=$abc$109383$new_n32911_
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 .subckt nand2_x0 i0=$abc$109383$new_n32705_ i1=$abc$109383$new_n32490_ nq=$abc$109383$new_n32912_
 .subckt nand2_x0 i0=$abc$109383$new_n29315_ i1=$abc$109383$new_n29561_ nq=$abc$109383$new_n32913_
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 .subckt nand2_x0 i0=$abc$109383$new_n32723_ i1=$abc$109383$new_n32915_ nq=$abc$109383$new_n32916_
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 .subckt nand4_x0 i0=$abc$109383$new_n29258_ i1=$abc$109383$new_n29377_ i2=$abc$109383$new_n29585_ i3=$abc$109383$new_n29612_ nq=$abc$109383$new_n32918_
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-.subckt ao22_x2 i0=$abc$109383$new_n32920_ i1=$abc$109383$new_n32917_ i2=$abc$109383$new_n32916_ q=$abc$109383$new_n32921_
-.subckt a2_x2 i0=$abc$109383$new_n32610_ i1=$abc$109383$new_n32568_ q=$abc$109383$new_n32922_
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 .subckt nand2_x0 i0=$abc$109383$new_n32776_ i1=$abc$109383$new_n32922_ nq=$abc$109383$new_n32923_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33014_ i1=$abc$109383$new_n32968_ nq=$abc$109383$new_n33015_
+.subckt nexor2_x0 i0=$abc$109383$new_n33015_ i1=$abc$109383$new_n32834_ nq=$abc$109383$new_n33016_
+.subckt nexor2_x0 i0=$abc$109383$new_n33016_ i1=$abc$109383$new_n32937_ nq=$abc$109383$new_n33017_
+.subckt and2_x1 i0=$abc$109383$new_n32810_ i1=$abc$109383$new_n32602_ q=$abc$109383$new_n33018_
 .subckt nand2_x0 i0=$abc$109383$new_n32606_ i1=$abc$109383$new_n32813_ nq=$abc$109383$new_n33019_
-.subckt oa22_x2 i0=$abc$109383$new_n32787_ i1=$abc$109383$new_n33019_ i2=$abc$109383$new_n33018_ q=$abc$109383$new_n33020_
-.subckt a2_x2 i0=$abc$109383$new_n32831_ i1=$abc$109383$new_n33020_ q=$abc$109383$new_n33021_
-.subckt oa22_x2 i0=$abc$109383$new_n32841_ i1=$abc$109383$new_n32832_ i2=$abc$109383$new_n33021_ q=$abc$109383$new_n33022_
-.subckt a2_x2 i0=$abc$109383$new_n32627_ i1=$abc$109383$new_n32844_ q=$abc$109383$new_n33023_
+.subckt or21nand_x1 i0=$abc$109383$new_n32787_ i1=$abc$109383$new_n33019_ i2=$abc$109383$new_n33018_ nq=$abc$109383$new_n33020_
+.subckt and2_x1 i0=$abc$109383$new_n32831_ i1=$abc$109383$new_n33020_ q=$abc$109383$new_n33021_
+.subckt or21nand_x1 i0=$abc$109383$new_n32841_ i1=$abc$109383$new_n32832_ i2=$abc$109383$new_n33021_ nq=$abc$109383$new_n33022_
+.subckt and2_x1 i0=$abc$109383$new_n32627_ i1=$abc$109383$new_n32844_ q=$abc$109383$new_n33023_
 .subckt nand2_x0 i0=$abc$109383$new_n32857_ i1=$abc$109383$new_n33023_ nq=$abc$109383$new_n33024_
 .subckt nand2_x0 i0=$abc$109383$new_n30705_ i1=$abc$109383$new_n29647_ nq=$abc$109383$new_n33025_
 .subckt nand2_x0 i0=$abc$109383$new_n32089_ i1=$abc$109383$new_n29600_ nq=$abc$109383$new_n33026_
-.subckt a2_x2 i0=$abc$109383$new_n32736_ i1=$abc$109383$new_n29624_ q=$abc$109383$new_n33027_
-.subckt nxr2_x1 i0=$abc$109383$new_n33027_ i1=$abc$109383$new_n33026_ nq=$abc$109383$new_n33028_
-.subckt nxr2_x1 i0=$abc$109383$new_n33028_ i1=$abc$109383$new_n33025_ nq=$abc$109383$new_n33029_
+.subckt and2_x1 i0=$abc$109383$new_n32736_ i1=$abc$109383$new_n29624_ q=$abc$109383$new_n33027_
+.subckt nexor2_x0 i0=$abc$109383$new_n33027_ i1=$abc$109383$new_n33026_ nq=$abc$109383$new_n33028_
+.subckt nexor2_x0 i0=$abc$109383$new_n33028_ i1=$abc$109383$new_n33025_ nq=$abc$109383$new_n33029_
 .subckt nand4_x0 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n32764_ i2=$abc$109383$new_n29527_ i3=$abc$109383$new_n29504_ nq=$abc$109383$new_n33030_
 .subckt nand2_x0 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29526_ nq=$abc$109383$new_n33031_
-.subckt a2_x2 i0=$abc$109383$new_n33031_ i1=$abc$109383$new_n32801_ q=$abc$109383$new_n33032_
-.subckt ao22_x2 i0=$abc$109383$new_n32800_ i1=$abc$109383$new_n33032_ i2=$abc$109383$new_n33030_ q=$abc$109383$new_n33033_
+.subckt and2_x1 i0=$abc$109383$new_n33031_ i1=$abc$109383$new_n32801_ q=$abc$109383$new_n33032_
+.subckt and21nor_x1 i0=$abc$109383$new_n32800_ i1=$abc$109383$new_n33032_ i2=$abc$109383$new_n33030_ nq=$abc$109383$new_n33033_
 .subckt nand2_x0 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29575_ nq=$abc$109383$new_n33034_
 .subckt nand2_x0 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n29526_ nq=$abc$109383$new_n33035_
-.subckt a2_x2 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29550_ q=$abc$109383$new_n33036_
-.subckt nxr2_x1 i0=$abc$109383$new_n33036_ i1=$abc$109383$new_n33035_ nq=$abc$109383$new_n33037_
-.subckt nxr2_x1 i0=$abc$109383$new_n33037_ i1=$abc$109383$new_n33034_ nq=$abc$109383$new_n33038_
-.subckt nxr2_x1 i0=$abc$109383$new_n33038_ i1=$abc$109383$new_n33033_ nq=$abc$109383$new_n33039_
-.subckt nxr2_x1 i0=$abc$109383$new_n33039_ i1=$abc$109383$new_n33029_ nq=$abc$109383$new_n33040_
-.subckt a4_x2 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29391_ i3=$abc$109383$new_n29446_ q=$abc$109383$new_n33041_
+.subckt and2_x1 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29550_ q=$abc$109383$new_n33036_
+.subckt nexor2_x0 i0=$abc$109383$new_n33036_ i1=$abc$109383$new_n33035_ nq=$abc$109383$new_n33037_
+.subckt nexor2_x0 i0=$abc$109383$new_n33037_ i1=$abc$109383$new_n33034_ nq=$abc$109383$new_n33038_
+.subckt nexor2_x0 i0=$abc$109383$new_n33038_ i1=$abc$109383$new_n33033_ nq=$abc$109383$new_n33039_
+.subckt nexor2_x0 i0=$abc$109383$new_n33039_ i1=$abc$109383$new_n33029_ nq=$abc$109383$new_n33040_
+.subckt and4_x1 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29391_ i3=$abc$109383$new_n29446_ q=$abc$109383$new_n33041_
 .subckt nand2_x0 i0=$abc$109383$new_n32826_ i1=$abc$109383$new_n32621_ nq=$abc$109383$new_n33042_
-.subckt oa22_x2 i0=$abc$109383$new_n32620_ i1=$abc$109383$new_n33042_ i2=$abc$109383$new_n33041_ q=$abc$109383$new_n33043_
+.subckt or21nand_x1 i0=$abc$109383$new_n32620_ i1=$abc$109383$new_n33042_ i2=$abc$109383$new_n33041_ nq=$abc$109383$new_n33043_
 .subckt nand2_x0 i0=$abc$109383$new_n33043_ i1=$abc$109383$new_n32824_ nq=$abc$109383$new_n33044_
-.subckt a2_x2 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29348_ q=$abc$109383$new_n33045_
-.subckt nxr2_x1 i0=$abc$109383$new_n32823_ i1=$abc$109383$new_n33045_ nq=$abc$109383$new_n33046_
-.subckt a2_x2 i0=$abc$109383$new_n32829_ i1=$abc$109383$new_n33046_ q=$abc$109383$new_n33047_
-.subckt ao22_x2 i0=$abc$109383$new_n32819_ i1=$abc$109383$new_n33047_ i2=$abc$109383$new_n33044_ q=$abc$109383$new_n33048_
+.subckt and2_x1 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29348_ q=$abc$109383$new_n33045_
+.subckt nexor2_x0 i0=$abc$109383$new_n32823_ i1=$abc$109383$new_n33045_ nq=$abc$109383$new_n33046_
+.subckt and2_x1 i0=$abc$109383$new_n32829_ i1=$abc$109383$new_n33046_ q=$abc$109383$new_n33047_
+.subckt and21nor_x1 i0=$abc$109383$new_n32819_ i1=$abc$109383$new_n33047_ i2=$abc$109383$new_n33044_ nq=$abc$109383$new_n33048_
 .subckt nand4_x0 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32784_ i2=$abc$109383$new_n29326_ i3=$abc$109383$new_n29293_ nq=$abc$109383$new_n33049_
 .subckt nand2_x0 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29326_ nq=$abc$109383$new_n33050_
-.subckt a2_x2 i0=$abc$109383$new_n33050_ i1=$abc$109383$new_n32821_ q=$abc$109383$new_n33051_
-.subckt ao22_x2 i0=$abc$109383$new_n32820_ i1=$abc$109383$new_n33051_ i2=$abc$109383$new_n33049_ q=$abc$109383$new_n33052_
+.subckt and2_x1 i0=$abc$109383$new_n33050_ i1=$abc$109383$new_n32821_ q=$abc$109383$new_n33051_
+.subckt and21nor_x1 i0=$abc$109383$new_n32820_ i1=$abc$109383$new_n33051_ i2=$abc$109383$new_n33049_ nq=$abc$109383$new_n33052_
 .subckt nand2_x0 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29503_ nq=$abc$109383$new_n33053_
 .subckt nand2_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n29325_ nq=$abc$109383$new_n33054_
-.subckt a2_x2 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29347_ q=$abc$109383$new_n33055_
-.subckt nxr2_x1 i0=$abc$109383$new_n33055_ i1=$abc$109383$new_n33054_ nq=$abc$109383$new_n33056_
-.subckt nxr2_x1 i0=$abc$109383$new_n33056_ i1=$abc$109383$new_n33053_ nq=$abc$109383$new_n33057_
+.subckt and2_x1 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29347_ q=$abc$109383$new_n33055_
+.subckt nexor2_x0 i0=$abc$109383$new_n33055_ i1=$abc$109383$new_n33054_ nq=$abc$109383$new_n33056_
+.subckt nexor2_x0 i0=$abc$109383$new_n33056_ i1=$abc$109383$new_n33053_ nq=$abc$109383$new_n33057_
 .subckt nand4_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29415_ i3=$abc$109383$new_n29391_ nq=$abc$109383$new_n33058_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[19] i1=$abc$109383$new_n29415_ nq=$abc$109383$new_n33059_
-.subckt a2_x2 i0=$abc$109383$new_n33059_ i1=$abc$109383$new_n32847_ q=$abc$109383$new_n33060_
+.subckt and2_x1 i0=$abc$109383$new_n33059_ i1=$abc$109383$new_n32847_ q=$abc$109383$new_n33060_
 .subckt nand2_x0 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29269_ nq=$abc$109383$new_n33061_
-.subckt ao22_x2 i0=$abc$109383$new_n33061_ i1=$abc$109383$new_n33060_ i2=$abc$109383$new_n33058_ q=$abc$109383$new_n33062_
-.subckt nxr2_x1 i0=$abc$109383$new_n33062_ i1=$abc$109383$new_n33057_ nq=$abc$109383$new_n33063_
-.subckt nxr2_x1 i0=$abc$109383$new_n33063_ i1=$abc$109383$new_n33052_ nq=$abc$109383$new_n33064_
-.subckt nxr2_x1 i0=$abc$109383$new_n33064_ i1=$abc$109383$new_n33048_ nq=$abc$109383$new_n33065_
-.subckt nxr2_x1 i0=$abc$109383$new_n33065_ i1=$abc$109383$new_n33040_ nq=$abc$109383$new_n33066_
-.subckt nxr2_x1 i0=$abc$109383$new_n33066_ i1=$abc$109383$new_n33024_ nq=$abc$109383$new_n33067_
-.subckt nxr2_x1 i0=$abc$109383$new_n33067_ i1=$abc$109383$new_n33022_ nq=$abc$109383$new_n33068_
-.subckt nxr2_x1 i0=$abc$109383$new_n32850_ i1=$abc$109383$new_n33061_ nq=$abc$109383$new_n33069_
+.subckt and21nor_x1 i0=$abc$109383$new_n33061_ i1=$abc$109383$new_n33060_ i2=$abc$109383$new_n33058_ nq=$abc$109383$new_n33062_
+.subckt nexor2_x0 i0=$abc$109383$new_n33062_ i1=$abc$109383$new_n33057_ nq=$abc$109383$new_n33063_
+.subckt nexor2_x0 i0=$abc$109383$new_n33063_ i1=$abc$109383$new_n33052_ nq=$abc$109383$new_n33064_
+.subckt nexor2_x0 i0=$abc$109383$new_n33064_ i1=$abc$109383$new_n33048_ nq=$abc$109383$new_n33065_
+.subckt nexor2_x0 i0=$abc$109383$new_n33065_ i1=$abc$109383$new_n33040_ nq=$abc$109383$new_n33066_
+.subckt nexor2_x0 i0=$abc$109383$new_n33066_ i1=$abc$109383$new_n33024_ nq=$abc$109383$new_n33067_
+.subckt nexor2_x0 i0=$abc$109383$new_n33067_ i1=$abc$109383$new_n33022_ nq=$abc$109383$new_n33068_
+.subckt nexor2_x0 i0=$abc$109383$new_n32850_ i1=$abc$109383$new_n33061_ nq=$abc$109383$new_n33069_
 .subckt nand2_x0 i0=$abc$109383$new_n32856_ i1=$abc$109383$new_n33069_ nq=$abc$109383$new_n33070_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29293_ q=$abc$109383$new_n33071_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29293_ q=$abc$109383$new_n33071_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[20] i1=$abc$109383$new_n29415_ nq=$abc$109383$new_n33072_
-.subckt a2_x2 i0=$abc$109383$new_n32848_ i1=$abc$109383$new_n29271_ q=$abc$109383$new_n33073_
-.subckt nxr2_x1 i0=$abc$109383$new_n33073_ i1=$abc$109383$new_n33072_ nq=$abc$109383$new_n33074_
-.subckt nxr2_x1 i0=$abc$109383$new_n33074_ i1=$abc$109383$new_n33071_ nq=$abc$109383$new_n33075_
+.subckt and2_x1 i0=$abc$109383$new_n32848_ i1=$abc$109383$new_n29271_ q=$abc$109383$new_n33073_
+.subckt nexor2_x0 i0=$abc$109383$new_n33073_ i1=$abc$109383$new_n33072_ nq=$abc$109383$new_n33074_
+.subckt nexor2_x0 i0=$abc$109383$new_n33074_ i1=$abc$109383$new_n33071_ nq=$abc$109383$new_n33075_
 .subckt nand4_x0 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n32625_ i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ nq=$abc$109383$new_n33076_
 .subckt nand2_x0 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29391_ nq=$abc$109383$new_n33077_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[22] i1=$abc$109383$new_n29447_ nq=$abc$109383$new_n33078_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[23] q=$abc$109383$new_n33079_
-.subckt a2_x2 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n29472_ q=$abc$109383$new_n33080_
-.subckt nxr2_x1 i0=$abc$109383$new_n33080_ i1=$abc$109383$new_n33078_ nq=$abc$109383$new_n33081_
-.subckt nxr2_x1 i0=$abc$109383$new_n33081_ i1=$abc$109383$new_n33077_ nq=$abc$109383$new_n33082_
-.subckt nxr2_x1 i0=$abc$109383$new_n33082_ i1=$abc$109383$new_n33076_ nq=$abc$109383$new_n33083_
-.subckt nxr2_x1 i0=$abc$109383$new_n33083_ i1=$abc$109383$new_n33075_ nq=$abc$109383$new_n33084_
-.subckt nxr2_x1 i0=$abc$109383$new_n33084_ i1=$abc$109383$new_n33070_ nq=$abc$109383$new_n33085_
-.subckt nxr2_x1 i0=$abc$109383$new_n33085_ i1=$abc$109383$new_n33068_ nq=$abc$109383$new_n33086_
-.subckt nxr2_x1 i0=$abc$109383$new_n33086_ i1=$abc$109383$new_n32859_ nq=$abc$109383$new_n33087_
-.subckt nxr2_x1 i0=$abc$109383$new_n33087_ i1=$abc$109383$new_n33017_ nq=$abc$109383$new_n33088_
-.subckt nxr2_x1 i0=$abc$109383$new_n33088_ i1=$abc$109383$new_n32930_ nq=$abc$109383$new_n33089_
-.subckt nxr2_x1 i0=$abc$109383$new_n33089_ i1=$abc$109383$new_n32928_ nq=$abc$109383$new_n33090_
-.subckt nxr2_x1 i0=$abc$109383$new_n33090_ i1=$abc$109383$new_n32910_ nq=$abc$109383$new_n33091_
-.subckt nxr2_x1 i0=$abc$109383$new_n33091_ i1=$abc$109383$new_n32902_ nq=$abc$109383$new_n33092_
-.subckt nxr2_x1 i0=$abc$109383$new_n33092_ i1=$abc$109383$new_n32899_ nq=$abc$109383$new_n33093_
-.subckt nxr2_x1 i0=$abc$109383$new_n33093_ i1=$abc$109383$new_n32880_ nq=$abc$109383$new_n33094_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n33094_ i2=$abc$109383$new_n32875_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102850
+.subckt and2_x1 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n29472_ q=$abc$109383$new_n33080_
+.subckt nexor2_x0 i0=$abc$109383$new_n33080_ i1=$abc$109383$new_n33078_ nq=$abc$109383$new_n33081_
+.subckt nexor2_x0 i0=$abc$109383$new_n33081_ i1=$abc$109383$new_n33077_ nq=$abc$109383$new_n33082_
+.subckt nexor2_x0 i0=$abc$109383$new_n33082_ i1=$abc$109383$new_n33076_ nq=$abc$109383$new_n33083_
+.subckt nexor2_x0 i0=$abc$109383$new_n33083_ i1=$abc$109383$new_n33075_ nq=$abc$109383$new_n33084_
+.subckt nexor2_x0 i0=$abc$109383$new_n33084_ i1=$abc$109383$new_n33070_ nq=$abc$109383$new_n33085_
+.subckt nexor2_x0 i0=$abc$109383$new_n33085_ i1=$abc$109383$new_n33068_ nq=$abc$109383$new_n33086_
+.subckt nexor2_x0 i0=$abc$109383$new_n33086_ i1=$abc$109383$new_n32859_ nq=$abc$109383$new_n33087_
+.subckt nexor2_x0 i0=$abc$109383$new_n33087_ i1=$abc$109383$new_n33017_ nq=$abc$109383$new_n33088_
+.subckt nexor2_x0 i0=$abc$109383$new_n33088_ i1=$abc$109383$new_n32930_ nq=$abc$109383$new_n33089_
+.subckt nexor2_x0 i0=$abc$109383$new_n33089_ i1=$abc$109383$new_n32928_ nq=$abc$109383$new_n33090_
+.subckt nexor2_x0 i0=$abc$109383$new_n33090_ i1=$abc$109383$new_n32910_ nq=$abc$109383$new_n33091_
+.subckt nexor2_x0 i0=$abc$109383$new_n33091_ i1=$abc$109383$new_n32902_ nq=$abc$109383$new_n33092_
+.subckt nexor2_x0 i0=$abc$109383$new_n33092_ i1=$abc$109383$new_n32899_ nq=$abc$109383$new_n33093_
+.subckt nexor2_x0 i0=$abc$109383$new_n33093_ i1=$abc$109383$new_n32880_ nq=$abc$109383$new_n33094_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n33094_ i2=$abc$109383$new_n32875_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102850
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[24] nq=$abc$109383$new_n33096_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n33097_
-.subckt ao22_x2 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n33096_ q=$abc$109383$new_n33098_
+.subckt and21nor_x1 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n33096_ nq=$abc$109383$new_n33098_
 .subckt nor2_x0 i0=$abc$109383$new_n33098_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n33099_
 .subckt nor2_x0 i0=$abc$109383$new_n33092_ i1=$abc$109383$new_n32899_ nq=$abc$109383$new_n33100_
-.subckt a3_x2 i0=$abc$109383$new_n32895_ i1=$abc$109383$new_n32891_ i2=$abc$109383$new_n32887_ q=$abc$109383$new_n33101_
-.subckt oa22_x2 i0=$abc$109383$new_n32657_ i1=$abc$109383$new_n32867_ i2=$abc$109383$new_n33101_ q=$abc$109383$new_n33102_
-.subckt nxr2_x1 i0=$abc$109383$new_n33092_ i1=$abc$109383$new_n33102_ nq=$abc$109383$new_n33103_
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 .subckt nand2_x0 i0=$abc$109383$new_n32957_ i1=$abc$109383$new_n32718_ nq=$abc$109383$new_n33165_
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 .subckt nand2_x0 i0=$abc$109383$new_n32964_ i1=$abc$109383$new_n33166_ nq=$abc$109383$new_n33167_
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 .subckt nand2_x0 i0=$abc$109383$new_n29257_ i1=soc.cpu.minerva.payload__src1$44[22] nq=$abc$109383$new_n33173_
-.subckt a2_x2 i0=$abc$109383$new_n29374_ i1=soc.cpu.minerva.payload__src1$44[23] q=$abc$109383$new_n33174_
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 .subckt nand4_x0 i0=$abc$109383$new_n32699_ i1=$abc$109383$new_n29232_ i2=$abc$109383$new_n29609_ i3=$abc$109383$new_n29634_ nq=$abc$109383$new_n33177_
 .subckt nand2_x0 i0=$abc$109383$new_n29231_ i1=$abc$109383$new_n29609_ nq=$abc$109383$new_n33178_
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 .subckt nand2_x0 i0=$abc$109383$new_n29244_ i1=$abc$109383$new_n29559_ nq=$abc$109383$new_n33181_
 .subckt nand2_x0 i0=$abc$109383$new_n32699_ i1=$abc$109383$new_n29609_ nq=$abc$109383$new_n33182_
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 .subckt nand4_x0 i0=$abc$109383$new_n32973_ i1=$abc$109383$new_n32748_ i2=$abc$109383$new_n29679_ i3=$abc$109383$new_n29668_ nq=$abc$109383$new_n33208_
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 .subckt nand2_x0 i0=$abc$109383$new_n31919_ i1=$abc$109383$new_n29633_ nq=$abc$109383$new_n33212_
 .subckt nand2_x0 i0=$abc$109383$new_n31908_ i1=$abc$109383$new_n29678_ nq=$abc$109383$new_n33213_
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 .subckt nand4_x0 i0=$abc$109383$new_n32511_ i1=$abc$109383$new_n32736_ i2=$abc$109383$new_n29625_ i3=$abc$109383$new_n29601_ nq=$abc$109383$new_n33217_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33039_ i1=$abc$109383$new_n33231_ nq=$abc$109383$new_n33258_
+.subckt or21nand_x1 i0=$abc$109383$new_n33258_ i1=$abc$109383$new_n33065_ i2=$abc$109383$new_n33257_ nq=$abc$109383$new_n33259_
+.subckt and2_x1 i0=$abc$109383$new_n32856_ i1=$abc$109383$new_n33069_ q=$abc$109383$new_n33260_
 .subckt nand2_x0 i0=$abc$109383$new_n33084_ i1=$abc$109383$new_n33260_ nq=$abc$109383$new_n33261_
 .subckt nand2_x0 i0=$abc$109383$new_n32838_ i1=$abc$109383$new_n29667_ nq=$abc$109383$new_n33262_
 .subckt nand2_x0 i0=$abc$109383$new_n32511_ i1=$abc$109383$new_n29624_ nq=$abc$109383$new_n33263_
-.subckt a2_x2 i0=$abc$109383$new_n32736_ i1=$abc$109383$new_n29648_ q=$abc$109383$new_n33264_
-.subckt nxr2_x1 i0=$abc$109383$new_n33264_ i1=$abc$109383$new_n33263_ nq=$abc$109383$new_n33265_
-.subckt nxr2_x1 i0=$abc$109383$new_n33265_ i1=$abc$109383$new_n33262_ nq=$abc$109383$new_n33266_
+.subckt and2_x1 i0=$abc$109383$new_n32736_ i1=$abc$109383$new_n29648_ q=$abc$109383$new_n33264_
+.subckt nexor2_x0 i0=$abc$109383$new_n33264_ i1=$abc$109383$new_n33263_ nq=$abc$109383$new_n33265_
+.subckt nexor2_x0 i0=$abc$109383$new_n33265_ i1=$abc$109383$new_n33262_ nq=$abc$109383$new_n33266_
 .subckt buf_x4 i=$abc$109383$new_n32764_ q=$abc$109383$new_n33267_
 .subckt nand4_x0 i0=$abc$109383$new_n33003_ i1=$abc$109383$new_n33267_ i2=$abc$109383$new_n29551_ i3=$abc$109383$new_n29527_ nq=$abc$109383$new_n33268_
 .subckt nand2_x0 i0=$abc$109383$new_n32764_ i1=$abc$109383$new_n29551_ nq=$abc$109383$new_n33269_
-.subckt a2_x2 i0=$abc$109383$new_n33269_ i1=$abc$109383$new_n33035_ q=$abc$109383$new_n33270_
-.subckt ao22_x2 i0=$abc$109383$new_n33034_ i1=$abc$109383$new_n33270_ i2=$abc$109383$new_n33268_ q=$abc$109383$new_n33271_
-.subckt a2_x2 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n29550_ q=$abc$109383$new_n33272_
-.subckt a2_x2 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n33273_
-.subckt nxr2_x1 i0=$abc$109383$new_n33273_ i1=$abc$109383$new_n33272_ nq=$abc$109383$new_n33274_
-.subckt a2_x2 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29601_ q=$abc$109383$new_n33275_
-.subckt nxr2_x1 i0=$abc$109383$new_n33275_ i1=$abc$109383$new_n33274_ nq=$abc$109383$new_n33276_
-.subckt nxr2_x1 i0=$abc$109383$new_n33276_ i1=$abc$109383$new_n33271_ nq=$abc$109383$new_n33277_
-.subckt nxr2_x1 i0=$abc$109383$new_n33277_ i1=$abc$109383$new_n33266_ nq=$abc$109383$new_n33278_
-.subckt a4_x2 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n32176_ i2=$abc$109383$new_n29416_ i3=$abc$109383$new_n29391_ q=$abc$109383$new_n33279_
+.subckt and2_x1 i0=$abc$109383$new_n33269_ i1=$abc$109383$new_n33035_ q=$abc$109383$new_n33270_
+.subckt and21nor_x1 i0=$abc$109383$new_n33034_ i1=$abc$109383$new_n33270_ i2=$abc$109383$new_n33268_ nq=$abc$109383$new_n33271_
+.subckt and2_x1 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n29550_ q=$abc$109383$new_n33272_
+.subckt and2_x1 i0=$abc$109383$new_n32366_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n33273_
+.subckt nexor2_x0 i0=$abc$109383$new_n33273_ i1=$abc$109383$new_n33272_ nq=$abc$109383$new_n33274_
+.subckt and2_x1 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29601_ q=$abc$109383$new_n33275_
+.subckt nexor2_x0 i0=$abc$109383$new_n33275_ i1=$abc$109383$new_n33274_ nq=$abc$109383$new_n33276_
+.subckt nexor2_x0 i0=$abc$109383$new_n33276_ i1=$abc$109383$new_n33271_ nq=$abc$109383$new_n33277_
+.subckt nexor2_x0 i0=$abc$109383$new_n33277_ i1=$abc$109383$new_n33266_ nq=$abc$109383$new_n33278_
+.subckt and4_x1 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n32176_ i2=$abc$109383$new_n29416_ i3=$abc$109383$new_n29391_ q=$abc$109383$new_n33279_
 .subckt nand2_x0 i0=$abc$109383$new_n33059_ i1=$abc$109383$new_n32847_ nq=$abc$109383$new_n33280_
-.subckt oa22_x2 i0=$abc$109383$new_n32846_ i1=$abc$109383$new_n33280_ i2=$abc$109383$new_n33279_ q=$abc$109383$new_n33281_
+.subckt or21nand_x1 i0=$abc$109383$new_n32846_ i1=$abc$109383$new_n33280_ i2=$abc$109383$new_n33279_ nq=$abc$109383$new_n33281_
 .subckt nand2_x0 i0=$abc$109383$new_n33281_ i1=$abc$109383$new_n33057_ nq=$abc$109383$new_n33282_
-.subckt a2_x2 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29504_ q=$abc$109383$new_n33283_
-.subckt nxr2_x1 i0=$abc$109383$new_n33056_ i1=$abc$109383$new_n33283_ nq=$abc$109383$new_n33284_
-.subckt a2_x2 i0=$abc$109383$new_n33062_ i1=$abc$109383$new_n33284_ q=$abc$109383$new_n33285_
-.subckt ao22_x2 i0=$abc$109383$new_n33052_ i1=$abc$109383$new_n33285_ i2=$abc$109383$new_n33282_ q=$abc$109383$new_n33286_
+.subckt and2_x1 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29504_ q=$abc$109383$new_n33283_
+.subckt nexor2_x0 i0=$abc$109383$new_n33056_ i1=$abc$109383$new_n33283_ nq=$abc$109383$new_n33284_
+.subckt and2_x1 i0=$abc$109383$new_n33062_ i1=$abc$109383$new_n33284_ q=$abc$109383$new_n33285_
+.subckt and21nor_x1 i0=$abc$109383$new_n33052_ i1=$abc$109383$new_n33285_ i2=$abc$109383$new_n33282_ nq=$abc$109383$new_n33286_
 .subckt nand4_x0 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32784_ i2=$abc$109383$new_n29349_ i3=$abc$109383$new_n29327_ nq=$abc$109383$new_n33287_
 .subckt nand2_x0 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29348_ nq=$abc$109383$new_n33288_
-.subckt a2_x2 i0=$abc$109383$new_n33288_ i1=$abc$109383$new_n33054_ q=$abc$109383$new_n33289_
-.subckt ao22_x2 i0=$abc$109383$new_n33053_ i1=$abc$109383$new_n33289_ i2=$abc$109383$new_n33287_ q=$abc$109383$new_n33290_
+.subckt and2_x1 i0=$abc$109383$new_n33288_ i1=$abc$109383$new_n33054_ q=$abc$109383$new_n33289_
+.subckt and21nor_x1 i0=$abc$109383$new_n33053_ i1=$abc$109383$new_n33289_ i2=$abc$109383$new_n33287_ nq=$abc$109383$new_n33290_
 .subckt nand2_x0 i0=$abc$109383$new_n31470_ i1=$abc$109383$new_n29526_ nq=$abc$109383$new_n33291_
 .subckt nand2_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n29347_ nq=$abc$109383$new_n33292_
-.subckt a2_x2 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29503_ q=$abc$109383$new_n33293_
-.subckt nxr2_x1 i0=$abc$109383$new_n33293_ i1=$abc$109383$new_n33292_ nq=$abc$109383$new_n33294_
-.subckt nxr2_x1 i0=$abc$109383$new_n33294_ i1=$abc$109383$new_n33291_ nq=$abc$109383$new_n33295_
+.subckt and2_x1 i0=$abc$109383$new_n31628_ i1=$abc$109383$new_n29503_ q=$abc$109383$new_n33293_
+.subckt nexor2_x0 i0=$abc$109383$new_n33293_ i1=$abc$109383$new_n33292_ nq=$abc$109383$new_n33294_
+.subckt nexor2_x0 i0=$abc$109383$new_n33294_ i1=$abc$109383$new_n33291_ nq=$abc$109383$new_n33295_
 .subckt nand4_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32587_ i2=$abc$109383$new_n29269_ i3=$abc$109383$new_n29416_ nq=$abc$109383$new_n33296_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[19] i1=$abc$109383$new_n29269_ nq=$abc$109383$new_n33297_
-.subckt a2_x2 i0=$abc$109383$new_n33297_ i1=$abc$109383$new_n33072_ q=$abc$109383$new_n33298_
+.subckt and2_x1 i0=$abc$109383$new_n33297_ i1=$abc$109383$new_n33072_ q=$abc$109383$new_n33298_
 .subckt nand2_x0 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29292_ nq=$abc$109383$new_n33299_
-.subckt ao22_x2 i0=$abc$109383$new_n33299_ i1=$abc$109383$new_n33298_ i2=$abc$109383$new_n33296_ q=$abc$109383$new_n33300_
-.subckt nxr2_x1 i0=$abc$109383$new_n33300_ i1=$abc$109383$new_n33295_ nq=$abc$109383$new_n33301_
-.subckt nxr2_x1 i0=$abc$109383$new_n33301_ i1=$abc$109383$new_n33290_ nq=$abc$109383$new_n33302_
-.subckt nxr2_x1 i0=$abc$109383$new_n33302_ i1=$abc$109383$new_n33286_ nq=$abc$109383$new_n33303_
-.subckt nxr2_x1 i0=$abc$109383$new_n33303_ i1=$abc$109383$new_n33278_ nq=$abc$109383$new_n33304_
-.subckt nxr2_x1 i0=$abc$109383$new_n33304_ i1=$abc$109383$new_n33261_ nq=$abc$109383$new_n33305_
-.subckt nxr2_x1 i0=$abc$109383$new_n33305_ i1=$abc$109383$new_n33259_ nq=$abc$109383$new_n33306_
-.subckt a4_x2 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n32626_ i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n33307_
-.subckt a2_x2 i0=$abc$109383$new_n33082_ i1=$abc$109383$new_n33307_ q=$abc$109383$new_n33308_
-.subckt a2_x2 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29392_ q=$abc$109383$new_n33309_
-.subckt nxr2_x1 i0=$abc$109383$new_n33081_ i1=$abc$109383$new_n33309_ nq=$abc$109383$new_n33310_
+.subckt and21nor_x1 i0=$abc$109383$new_n33299_ i1=$abc$109383$new_n33298_ i2=$abc$109383$new_n33296_ nq=$abc$109383$new_n33300_
+.subckt nexor2_x0 i0=$abc$109383$new_n33300_ i1=$abc$109383$new_n33295_ nq=$abc$109383$new_n33301_
+.subckt nexor2_x0 i0=$abc$109383$new_n33301_ i1=$abc$109383$new_n33290_ nq=$abc$109383$new_n33302_
+.subckt nexor2_x0 i0=$abc$109383$new_n33302_ i1=$abc$109383$new_n33286_ nq=$abc$109383$new_n33303_
+.subckt nexor2_x0 i0=$abc$109383$new_n33303_ i1=$abc$109383$new_n33278_ nq=$abc$109383$new_n33304_
+.subckt nexor2_x0 i0=$abc$109383$new_n33304_ i1=$abc$109383$new_n33261_ nq=$abc$109383$new_n33305_
+.subckt nexor2_x0 i0=$abc$109383$new_n33305_ i1=$abc$109383$new_n33259_ nq=$abc$109383$new_n33306_
+.subckt and4_x1 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n32626_ i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n33307_
+.subckt and2_x1 i0=$abc$109383$new_n33082_ i1=$abc$109383$new_n33307_ q=$abc$109383$new_n33308_
+.subckt and2_x1 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29392_ q=$abc$109383$new_n33309_
+.subckt nexor2_x0 i0=$abc$109383$new_n33081_ i1=$abc$109383$new_n33309_ nq=$abc$109383$new_n33310_
 .subckt nand2_x0 i0=$abc$109383$new_n33310_ i1=$abc$109383$new_n33076_ nq=$abc$109383$new_n33311_
-.subckt nxr2_x1 i0=$abc$109383$new_n33074_ i1=$abc$109383$new_n33299_ nq=$abc$109383$new_n33312_
-.subckt oa22_x2 i0=$abc$109383$new_n33312_ i1=$abc$109383$new_n33311_ i2=$abc$109383$new_n33308_ q=$abc$109383$new_n33313_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29327_ q=$abc$109383$new_n33314_
+.subckt nexor2_x0 i0=$abc$109383$new_n33074_ i1=$abc$109383$new_n33299_ nq=$abc$109383$new_n33312_
+.subckt or21nand_x1 i0=$abc$109383$new_n33312_ i1=$abc$109383$new_n33311_ i2=$abc$109383$new_n33308_ nq=$abc$109383$new_n33313_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29327_ q=$abc$109383$new_n33314_
 .subckt nand2_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n29269_ nq=$abc$109383$new_n33315_
-.subckt a2_x2 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29293_ q=$abc$109383$new_n33316_
-.subckt nxr2_x1 i0=$abc$109383$new_n33316_ i1=$abc$109383$new_n33315_ nq=$abc$109383$new_n33317_
-.subckt nxr2_x1 i0=$abc$109383$new_n33317_ i1=$abc$109383$new_n33314_ nq=$abc$109383$new_n33318_
+.subckt and2_x1 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29293_ q=$abc$109383$new_n33316_
+.subckt nexor2_x0 i0=$abc$109383$new_n33316_ i1=$abc$109383$new_n33315_ nq=$abc$109383$new_n33317_
+.subckt nexor2_x0 i0=$abc$109383$new_n33317_ i1=$abc$109383$new_n33314_ nq=$abc$109383$new_n33318_
 .subckt nand4_x0 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29472_ i3=$abc$109383$new_n29447_ nq=$abc$109383$new_n33319_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[23] i1=$abc$109383$new_n29472_ nq=$abc$109383$new_n33320_
-.subckt a2_x2 i0=$abc$109383$new_n33320_ i1=$abc$109383$new_n33078_ q=$abc$109383$new_n33321_
-.subckt ao22_x2 i0=$abc$109383$new_n33077_ i1=$abc$109383$new_n33321_ i2=$abc$109383$new_n33319_ q=$abc$109383$new_n33322_
+.subckt and2_x1 i0=$abc$109383$new_n33320_ i1=$abc$109383$new_n33078_ q=$abc$109383$new_n33321_
+.subckt and21nor_x1 i0=$abc$109383$new_n33077_ i1=$abc$109383$new_n33321_ i2=$abc$109383$new_n33319_ nq=$abc$109383$new_n33322_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[21] i1=$abc$109383$new_n29416_ nq=$abc$109383$new_n33323_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[23] i1=$abc$109383$new_n29446_ nq=$abc$109383$new_n33324_
-.subckt a2_x2 i0=$abc$109383$new_n32853_ i1=$abc$109383$new_n29391_ q=$abc$109383$new_n33325_
-.subckt nxr2_x1 i0=$abc$109383$new_n33325_ i1=$abc$109383$new_n33324_ nq=$abc$109383$new_n33326_
-.subckt nxr2_x1 i0=$abc$109383$new_n33326_ i1=$abc$109383$new_n33323_ nq=$abc$109383$new_n33327_
-.subckt nxr2_x1 i0=$abc$109383$new_n33327_ i1=$abc$109383$new_n33322_ nq=$abc$109383$new_n33328_
-.subckt nxr2_x1 i0=$abc$109383$new_n33328_ i1=$abc$109383$new_n33318_ nq=$abc$109383$new_n33329_
-.subckt nxr2_x1 i0=$abc$109383$new_n33329_ i1=$abc$109383$new_n33313_ nq=$abc$109383$new_n33330_
+.subckt and2_x1 i0=$abc$109383$new_n32853_ i1=$abc$109383$new_n29391_ q=$abc$109383$new_n33325_
+.subckt nexor2_x0 i0=$abc$109383$new_n33325_ i1=$abc$109383$new_n33324_ nq=$abc$109383$new_n33326_
+.subckt nexor2_x0 i0=$abc$109383$new_n33326_ i1=$abc$109383$new_n33323_ nq=$abc$109383$new_n33327_
+.subckt nexor2_x0 i0=$abc$109383$new_n33327_ i1=$abc$109383$new_n33322_ nq=$abc$109383$new_n33328_
+.subckt nexor2_x0 i0=$abc$109383$new_n33328_ i1=$abc$109383$new_n33318_ nq=$abc$109383$new_n33329_
+.subckt nexor2_x0 i0=$abc$109383$new_n33329_ i1=$abc$109383$new_n33313_ nq=$abc$109383$new_n33330_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[24] q=$abc$109383$new_n33331_
 .subckt buf_x4 i=$abc$109383$new_n33331_ q=$abc$109383$new_n33332_
-.subckt a2_x2 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29474_ q=$abc$109383$new_n33333_
-.subckt nxr2_x1 i0=$abc$109383$new_n33333_ i1=$abc$109383$new_n33330_ nq=$abc$109383$new_n33334_
-.subckt nxr2_x1 i0=$abc$109383$new_n33334_ i1=$abc$109383$new_n33306_ nq=$abc$109383$new_n33335_
-.subckt nxr2_x1 i0=$abc$109383$new_n33335_ i1=$abc$109383$new_n33253_ nq=$abc$109383$new_n33336_
-.subckt nxr2_x1 i0=$abc$109383$new_n33336_ i1=$abc$109383$new_n33251_ nq=$abc$109383$new_n33337_
-.subckt nxr2_x1 i0=$abc$109383$new_n33337_ i1=$abc$109383$new_n33152_ nq=$abc$109383$new_n33338_
-.subckt nxr2_x1 i0=$abc$109383$new_n33338_ i1=$abc$109383$new_n33148_ nq=$abc$109383$new_n33339_
-.subckt nxr2_x1 i0=$abc$109383$new_n33339_ i1=$abc$109383$new_n33130_ nq=$abc$109383$new_n33340_
-.subckt nxr2_x1 i0=$abc$109383$new_n33340_ i1=$abc$109383$new_n33122_ nq=$abc$109383$new_n33341_
-.subckt nxr2_x1 i0=$abc$109383$new_n33341_ i1=$abc$109383$new_n33119_ nq=$abc$109383$new_n33342_
-.subckt nxr2_x1 i0=$abc$109383$new_n33342_ i1=$abc$109383$new_n33104_ nq=$abc$109383$new_n33343_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n33343_ i2=$abc$109383$new_n33099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102854
+.subckt and2_x1 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29474_ q=$abc$109383$new_n33333_
+.subckt nexor2_x0 i0=$abc$109383$new_n33333_ i1=$abc$109383$new_n33330_ nq=$abc$109383$new_n33334_
+.subckt nexor2_x0 i0=$abc$109383$new_n33334_ i1=$abc$109383$new_n33306_ nq=$abc$109383$new_n33335_
+.subckt nexor2_x0 i0=$abc$109383$new_n33335_ i1=$abc$109383$new_n33253_ nq=$abc$109383$new_n33336_
+.subckt nexor2_x0 i0=$abc$109383$new_n33336_ i1=$abc$109383$new_n33251_ nq=$abc$109383$new_n33337_
+.subckt nexor2_x0 i0=$abc$109383$new_n33337_ i1=$abc$109383$new_n33152_ nq=$abc$109383$new_n33338_
+.subckt nexor2_x0 i0=$abc$109383$new_n33338_ i1=$abc$109383$new_n33148_ nq=$abc$109383$new_n33339_
+.subckt nexor2_x0 i0=$abc$109383$new_n33339_ i1=$abc$109383$new_n33130_ nq=$abc$109383$new_n33340_
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 .subckt nor2_x0 i0=$abc$109383$new_n33341_ i1=$abc$109383$new_n33119_ nq=$abc$109383$new_n33345_
-.subckt a3_x2 i0=$abc$109383$new_n33115_ i1=$abc$109383$new_n33111_ i2=$abc$109383$new_n33107_ q=$abc$109383$new_n33346_
-.subckt oa22_x2 i0=$abc$109383$new_n32902_ i1=$abc$109383$new_n33091_ i2=$abc$109383$new_n33346_ q=$abc$109383$new_n33347_
-.subckt nxr2_x1 i0=$abc$109383$new_n33341_ i1=$abc$109383$new_n33347_ nq=$abc$109383$new_n33348_
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 .subckt nand2_x0 i0=$abc$109383$new_n33359_ i1=$abc$109383$new_n33148_ nq=$abc$109383$new_n33360_
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-.subckt oa22_x2 i0=$abc$109383$new_n33122_ i1=$abc$109383$new_n33340_ i2=$abc$109383$new_n33361_ q=$abc$109383$new_n33362_
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 .subckt nand2_x0 i0=$abc$109383$new_n33364_ i1=$abc$109383$new_n33354_ nq=$abc$109383$new_n33365_
 .subckt nand2_x0 i0=$abc$109383$new_n33013_ i1=$abc$109383$new_n33157_ nq=$abc$109383$new_n33366_
 .subckt nand2_x0 i0=$abc$109383$new_n33014_ i1=$abc$109383$new_n33144_ nq=$abc$109383$new_n33367_
-.subckt a2_x2 i0=$abc$109383$new_n33367_ i1=$abc$109383$new_n33366_ q=$abc$109383$new_n33368_
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 .subckt nand2_x0 i0=$abc$109383$new_n33087_ i1=$abc$109383$new_n33126_ nq=$abc$109383$new_n33371_
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-.subckt a2_x2 i0=$abc$109383$new_n32964_ i1=$abc$109383$new_n33166_ q=$abc$109383$new_n33374_
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 .subckt nand2_x0 i0=$abc$109383$new_n33169_ i1=$abc$109383$new_n32959_ nq=$abc$109383$new_n33375_
 .subckt nand2_x0 i0=$abc$109383$new_n29316_ i1=$abc$109383$new_n29512_ nq=$abc$109383$new_n33376_
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 .subckt nand2_x0 i0=$abc$109383$new_n33187_ i1=$abc$109383$new_n33378_ nq=$abc$109383$new_n33379_
-.subckt nxr2_x1 i0=$abc$109383$new_n33187_ i1=$abc$109383$new_n33378_ nq=$abc$109383$new_n33380_
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 .subckt nand4_x0 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29377_ i2=$abc$109383$new_n29535_ i3=$abc$109383$new_n29562_ nq=$abc$109383$new_n33381_
-.subckt a2_x2 i0=$abc$109383$new_n33161_ i1=$abc$109383$new_n32952_ q=$abc$109383$new_n33382_
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-.subckt ao22_x2 i0=$abc$109383$new_n33383_ i1=$abc$109383$new_n33380_ i2=$abc$109383$new_n33379_ q=$abc$109383$new_n33384_
-.subckt a2_x2 i0=$abc$109383$new_n33066_ i1=$abc$109383$new_n33237_ q=$abc$109383$new_n33385_
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 .subckt nand2_x0 i0=$abc$109383$new_n33386_ i1=$abc$109383$new_n33236_ nq=$abc$109383$new_n33387_
-.subckt nxr2_x1 i0=$abc$109383$new_n33188_ i1=$abc$109383$new_n33383_ nq=$abc$109383$new_n33388_
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-.subckt nxr2_x1 i0=$abc$109383$new_n33391_ i1=$abc$109383$new_n33384_ nq=$abc$109383$new_n33392_
-.subckt a2_x2 i0=$abc$109383$new_n33085_ i1=$abc$109383$new_n33252_ q=$abc$109383$new_n33393_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33391_ i1=$abc$109383$new_n33384_ nq=$abc$109383$new_n33392_
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 .subckt nand2_x0 i0=$abc$109383$new_n33335_ i1=$abc$109383$new_n33393_ nq=$abc$109383$new_n33394_
-.subckt nxr2_x1 i0=$abc$109383$new_n33335_ i1=$abc$109383$new_n33393_ nq=$abc$109383$new_n33395_
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-.subckt a2_x2 i0=$abc$109383$new_n33192_ i1=$abc$109383$new_n33002_ q=$abc$109383$new_n33397_
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 .subckt nand2_x0 i0=$abc$109383$new_n32761_ i1=$abc$109383$new_n32985_ nq=$abc$109383$new_n33399_
-.subckt oa22_x2 i0=$abc$109383$new_n32976_ i1=$abc$109383$new_n33399_ i2=$abc$109383$new_n33398_ q=$abc$109383$new_n33400_
-.subckt oa22_x2 i0=$abc$109383$new_n33400_ i1=$abc$109383$new_n33012_ i2=$abc$109383$new_n33397_ q=$abc$109383$new_n33401_
-.subckt a2_x2 i0=$abc$109383$new_n33234_ i1=$abc$109383$new_n33401_ q=$abc$109383$new_n33402_
-.subckt oa22_x2 i0=$abc$109383$new_n33388_ i1=$abc$109383$new_n33235_ i2=$abc$109383$new_n33402_ q=$abc$109383$new_n33403_
-.subckt a4_x2 i0=$abc$109383$new_n29258_ i1=$abc$109383$new_n29376_ i2=$abc$109383$new_n29511_ i3=$abc$109383$new_n29534_ q=$abc$109383$new_n33404_
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 .subckt nand2_x0 i0=$abc$109383$new_n29376_ i1=$abc$109383$new_n29511_ nq=$abc$109383$new_n33405_
 .subckt nand2_x0 i0=$abc$109383$new_n33405_ i1=$abc$109383$new_n33173_ nq=$abc$109383$new_n33406_
-.subckt oa22_x2 i0=$abc$109383$new_n33172_ i1=$abc$109383$new_n33406_ i2=$abc$109383$new_n33404_ q=$abc$109383$new_n33407_
-.subckt a4_x2 i0=$abc$109383$new_n32942_ i1=$abc$109383$new_n29233_ i2=$abc$109383$new_n29610_ i3=$abc$109383$new_n29635_ q=$abc$109383$new_n33408_
+.subckt or21nand_x1 i0=$abc$109383$new_n33172_ i1=$abc$109383$new_n33406_ i2=$abc$109383$new_n33404_ nq=$abc$109383$new_n33407_
+.subckt and4_x1 i0=$abc$109383$new_n32942_ i1=$abc$109383$new_n29233_ i2=$abc$109383$new_n29610_ i3=$abc$109383$new_n29635_ q=$abc$109383$new_n33408_
 .subckt nand2_x0 i0=$abc$109383$new_n33178_ i1=$abc$109383$new_n32961_ nq=$abc$109383$new_n33409_
-.subckt oa22_x2 i0=$abc$109383$new_n33168_ i1=$abc$109383$new_n33409_ i2=$abc$109383$new_n33408_ q=$abc$109383$new_n33410_
+.subckt or21nand_x1 i0=$abc$109383$new_n33168_ i1=$abc$109383$new_n33409_ i2=$abc$109383$new_n33408_ nq=$abc$109383$new_n33410_
 .subckt nand2_x0 i0=$abc$109383$new_n33185_ i1=$abc$109383$new_n33410_ nq=$abc$109383$new_n33411_
-.subckt a2_x2 i0=$abc$109383$new_n29244_ i1=$abc$109383$new_n29559_ q=$abc$109383$new_n33412_
-.subckt nxr2_x1 i0=$abc$109383$new_n33184_ i1=$abc$109383$new_n33412_ nq=$abc$109383$new_n33413_
-.subckt a2_x2 i0=$abc$109383$new_n33413_ i1=$abc$109383$new_n33180_ q=$abc$109383$new_n33414_
-.subckt ao22_x2 i0=$abc$109383$new_n33176_ i1=$abc$109383$new_n33414_ i2=$abc$109383$new_n33411_ q=$abc$109383$new_n33415_
-.subckt a2_x2 i0=$abc$109383$new_n29314_ i1=soc.cpu.minerva.payload__src1$44[25] q=$abc$109383$new_n33416_
+.subckt and2_x1 i0=$abc$109383$new_n29244_ i1=$abc$109383$new_n29559_ q=$abc$109383$new_n33412_
+.subckt nexor2_x0 i0=$abc$109383$new_n33184_ i1=$abc$109383$new_n33412_ nq=$abc$109383$new_n33413_
+.subckt and2_x1 i0=$abc$109383$new_n33413_ i1=$abc$109383$new_n33180_ q=$abc$109383$new_n33414_
+.subckt and21nor_x1 i0=$abc$109383$new_n33176_ i1=$abc$109383$new_n33414_ i2=$abc$109383$new_n33411_ nq=$abc$109383$new_n33415_
+.subckt and2_x1 i0=$abc$109383$new_n29314_ i1=soc.cpu.minerva.payload__src1$44[25] q=$abc$109383$new_n33416_
 .subckt nand2_x0 i0=$abc$109383$new_n29257_ i1=soc.cpu.minerva.payload__src1$44[23] nq=$abc$109383$new_n33417_
-.subckt a2_x2 i0=$abc$109383$new_n29374_ i1=soc.cpu.minerva.payload__src1$44[24] q=$abc$109383$new_n33418_
-.subckt nxr2_x1 i0=$abc$109383$new_n33418_ i1=$abc$109383$new_n33417_ nq=$abc$109383$new_n33419_
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+.subckt or21nand_x1 i0=$abc$109383$new_n33489_ i1=$abc$109383$new_n33499_ i2=$abc$109383$new_n33498_ nq=$abc$109383$new_n33500_
 .subckt nand2_x0 i0=$abc$109383$new_n33302_ i1=$abc$109383$new_n33500_ nq=$abc$109383$new_n33501_
-.subckt a4_x2 i0=$abc$109383$new_n33242_ i1=$abc$109383$new_n33241_ i2=$abc$109383$new_n29349_ i3=$abc$109383$new_n29327_ q=$abc$109383$new_n33502_
+.subckt and4_x1 i0=$abc$109383$new_n33242_ i1=$abc$109383$new_n33241_ i2=$abc$109383$new_n29349_ i3=$abc$109383$new_n29327_ q=$abc$109383$new_n33502_
 .subckt nand2_x0 i0=$abc$109383$new_n33288_ i1=$abc$109383$new_n33054_ nq=$abc$109383$new_n33503_
-.subckt oa22_x2 i0=$abc$109383$new_n33283_ i1=$abc$109383$new_n33503_ i2=$abc$109383$new_n33502_ q=$abc$109383$new_n33504_
-.subckt nxr2_x1 i0=$abc$109383$new_n33301_ i1=$abc$109383$new_n33504_ nq=$abc$109383$new_n33505_
-.subckt a2_x2 i0=$abc$109383$new_n33505_ i1=$abc$109383$new_n33286_ q=$abc$109383$new_n33506_
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 .subckt nand2_x0 i0=$abc$109383$new_n33329_ i1=$abc$109383$new_n33313_ nq=$abc$109383$new_n33508_
 .subckt nand2_x0 i0=$abc$109383$new_n32838_ i1=$abc$109383$new_n29678_ nq=$abc$109383$new_n33509_
 .subckt nand2_x0 i0=$abc$109383$new_n32511_ i1=$abc$109383$new_n29648_ nq=$abc$109383$new_n33510_
-.subckt a2_x2 i0=$abc$109383$new_n32737_ i1=$abc$109383$new_n29667_ q=$abc$109383$new_n33511_
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-.subckt nxr2_x1 i0=$abc$109383$new_n33512_ i1=$abc$109383$new_n33509_ nq=$abc$109383$new_n33513_
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 .subckt nand4_x0 i0=$abc$109383$new_n33003_ i1=$abc$109383$new_n33267_ i2=$abc$109383$new_n29575_ i3=$abc$109383$new_n29552_ nq=$abc$109383$new_n33514_
 .subckt nand2_x0 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29601_ nq=$abc$109383$new_n33515_
 .subckt nand2_x0 i0=$abc$109383$new_n32764_ i1=$abc$109383$new_n29575_ nq=$abc$109383$new_n33516_
-.subckt a2_x2 i0=$abc$109383$new_n33516_ i1=$abc$109383$new_n33472_ q=$abc$109383$new_n33517_
-.subckt ao22_x2 i0=$abc$109383$new_n33517_ i1=$abc$109383$new_n33515_ i2=$abc$109383$new_n33514_ q=$abc$109383$new_n33518_
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 .subckt nand2_x0 i0=$abc$109383$new_n32579_ i1=$abc$109383$new_n29626_ nq=$abc$109383$new_n33519_
 .subckt nand2_x0 i0=$abc$109383$new_n32574_ i1=$abc$109383$new_n29575_ nq=$abc$109383$new_n33520_
-.subckt a2_x2 i0=$abc$109383$new_n32764_ i1=$abc$109383$new_n29600_ q=$abc$109383$new_n33521_
-.subckt nxr2_x1 i0=$abc$109383$new_n33521_ i1=$abc$109383$new_n33520_ nq=$abc$109383$new_n33522_
-.subckt nxr2_x1 i0=$abc$109383$new_n33522_ i1=$abc$109383$new_n33519_ nq=$abc$109383$new_n33523_
-.subckt nxr2_x1 i0=$abc$109383$new_n33523_ i1=$abc$109383$new_n33518_ nq=$abc$109383$new_n33524_
-.subckt nxr2_x1 i0=$abc$109383$new_n33524_ i1=$abc$109383$new_n33513_ nq=$abc$109383$new_n33525_
-.subckt a4_x2 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n32176_ i2=$abc$109383$new_n29270_ i3=$abc$109383$new_n29416_ q=$abc$109383$new_n33526_
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 .subckt nand2_x0 i0=$abc$109383$new_n33297_ i1=$abc$109383$new_n33072_ nq=$abc$109383$new_n33527_
-.subckt oa22_x2 i0=$abc$109383$new_n33071_ i1=$abc$109383$new_n33527_ i2=$abc$109383$new_n33526_ q=$abc$109383$new_n33528_
+.subckt or21nand_x1 i0=$abc$109383$new_n33071_ i1=$abc$109383$new_n33527_ i2=$abc$109383$new_n33526_ nq=$abc$109383$new_n33528_
 .subckt nand2_x0 i0=$abc$109383$new_n33528_ i1=$abc$109383$new_n33295_ nq=$abc$109383$new_n33529_
 .subckt buf_x4 i=$abc$109383$new_n31470_ q=$abc$109383$new_n33530_
-.subckt a2_x2 i0=$abc$109383$new_n33530_ i1=$abc$109383$new_n29526_ q=$abc$109383$new_n33531_
-.subckt nxr2_x1 i0=$abc$109383$new_n33294_ i1=$abc$109383$new_n33531_ nq=$abc$109383$new_n33532_
-.subckt a2_x2 i0=$abc$109383$new_n33300_ i1=$abc$109383$new_n33532_ q=$abc$109383$new_n33533_
-.subckt ao22_x2 i0=$abc$109383$new_n33290_ i1=$abc$109383$new_n33533_ i2=$abc$109383$new_n33529_ q=$abc$109383$new_n33534_
+.subckt and2_x1 i0=$abc$109383$new_n33530_ i1=$abc$109383$new_n29526_ q=$abc$109383$new_n33531_
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+.subckt and21nor_x1 i0=$abc$109383$new_n33290_ i1=$abc$109383$new_n33533_ i2=$abc$109383$new_n33529_ nq=$abc$109383$new_n33534_
 .subckt nand4_x0 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n32784_ i2=$abc$109383$new_n29505_ i3=$abc$109383$new_n29349_ nq=$abc$109383$new_n33535_
 .subckt nand2_x0 i0=$abc$109383$new_n32784_ i1=$abc$109383$new_n29504_ nq=$abc$109383$new_n33536_
-.subckt a2_x2 i0=$abc$109383$new_n33536_ i1=$abc$109383$new_n33292_ q=$abc$109383$new_n33537_
-.subckt ao22_x2 i0=$abc$109383$new_n33291_ i1=$abc$109383$new_n33537_ i2=$abc$109383$new_n33535_ q=$abc$109383$new_n33538_
+.subckt and2_x1 i0=$abc$109383$new_n33536_ i1=$abc$109383$new_n33292_ q=$abc$109383$new_n33537_
+.subckt and21nor_x1 i0=$abc$109383$new_n33291_ i1=$abc$109383$new_n33537_ i2=$abc$109383$new_n33535_ nq=$abc$109383$new_n33538_
 .subckt nand2_x0 i0=$abc$109383$new_n33530_ i1=$abc$109383$new_n29551_ nq=$abc$109383$new_n33539_
 .subckt nand2_x0 i0=$abc$109383$new_n32161_ i1=$abc$109383$new_n29503_ nq=$abc$109383$new_n33540_
-.subckt a2_x2 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29525_ q=$abc$109383$new_n33541_
-.subckt nxr2_x1 i0=$abc$109383$new_n33541_ i1=$abc$109383$new_n33540_ nq=$abc$109383$new_n33542_
-.subckt nxr2_x1 i0=$abc$109383$new_n33542_ i1=$abc$109383$new_n33539_ nq=$abc$109383$new_n33543_
+.subckt and2_x1 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29525_ q=$abc$109383$new_n33541_
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 .subckt nand4_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n32176_ i2=$abc$109383$new_n29293_ i3=$abc$109383$new_n29270_ nq=$abc$109383$new_n33544_
 .subckt nand2_x0 i0=$abc$109383$new_n32587_ i1=$abc$109383$new_n29292_ nq=$abc$109383$new_n33545_
-.subckt a2_x2 i0=$abc$109383$new_n33545_ i1=$abc$109383$new_n33315_ q=$abc$109383$new_n33546_
+.subckt and2_x1 i0=$abc$109383$new_n33545_ i1=$abc$109383$new_n33315_ q=$abc$109383$new_n33546_
 .subckt nand2_x0 i0=$abc$109383$new_n31990_ i1=$abc$109383$new_n29326_ nq=$abc$109383$new_n33547_
-.subckt ao22_x2 i0=$abc$109383$new_n33547_ i1=$abc$109383$new_n33546_ i2=$abc$109383$new_n33544_ q=$abc$109383$new_n33548_
-.subckt nxr2_x1 i0=$abc$109383$new_n33548_ i1=$abc$109383$new_n33543_ nq=$abc$109383$new_n33549_
-.subckt nxr2_x1 i0=$abc$109383$new_n33549_ i1=$abc$109383$new_n33538_ nq=$abc$109383$new_n33550_
-.subckt nxr2_x1 i0=$abc$109383$new_n33550_ i1=$abc$109383$new_n33534_ nq=$abc$109383$new_n33551_
-.subckt nxr2_x1 i0=$abc$109383$new_n33551_ i1=$abc$109383$new_n33525_ nq=$abc$109383$new_n33552_
-.subckt nxr2_x1 i0=$abc$109383$new_n33552_ i1=$abc$109383$new_n33508_ nq=$abc$109383$new_n33553_
-.subckt nxr2_x1 i0=$abc$109383$new_n33553_ i1=$abc$109383$new_n33507_ nq=$abc$109383$new_n33554_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33548_ i1=$abc$109383$new_n33543_ nq=$abc$109383$new_n33549_
+.subckt nexor2_x0 i0=$abc$109383$new_n33549_ i1=$abc$109383$new_n33538_ nq=$abc$109383$new_n33550_
+.subckt nexor2_x0 i0=$abc$109383$new_n33550_ i1=$abc$109383$new_n33534_ nq=$abc$109383$new_n33551_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33553_ i1=$abc$109383$new_n33507_ nq=$abc$109383$new_n33554_
 .subckt nand2_x0 i0=$abc$109383$new_n33082_ i1=$abc$109383$new_n33307_ nq=$abc$109383$new_n33555_
-.subckt a2_x2 i0=$abc$109383$new_n33310_ i1=$abc$109383$new_n33076_ q=$abc$109383$new_n33556_
-.subckt ao22_x2 i0=$abc$109383$new_n33075_ i1=$abc$109383$new_n33556_ i2=$abc$109383$new_n33555_ q=$abc$109383$new_n33557_
-.subckt nxr2_x1 i0=$abc$109383$new_n33329_ i1=$abc$109383$new_n33557_ nq=$abc$109383$new_n33558_
+.subckt and2_x1 i0=$abc$109383$new_n33310_ i1=$abc$109383$new_n33076_ q=$abc$109383$new_n33556_
+.subckt and21nor_x1 i0=$abc$109383$new_n33075_ i1=$abc$109383$new_n33556_ i2=$abc$109383$new_n33555_ nq=$abc$109383$new_n33557_
+.subckt nexor2_x0 i0=$abc$109383$new_n33329_ i1=$abc$109383$new_n33557_ nq=$abc$109383$new_n33558_
 .subckt nand2_x0 i0=$abc$109383$new_n33333_ i1=$abc$109383$new_n33558_ nq=$abc$109383$new_n33559_
-.subckt a4_x2 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29472_ i3=$abc$109383$new_n29447_ q=$abc$109383$new_n33560_
+.subckt and4_x1 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29472_ i3=$abc$109383$new_n29447_ q=$abc$109383$new_n33560_
 .subckt nand2_x0 i0=$abc$109383$new_n33320_ i1=$abc$109383$new_n33078_ nq=$abc$109383$new_n33561_
-.subckt oa22_x2 i0=$abc$109383$new_n33309_ i1=$abc$109383$new_n33561_ i2=$abc$109383$new_n33560_ q=$abc$109383$new_n33562_
+.subckt or21nand_x1 i0=$abc$109383$new_n33309_ i1=$abc$109383$new_n33561_ i2=$abc$109383$new_n33560_ nq=$abc$109383$new_n33562_
 .subckt nand2_x0 i0=$abc$109383$new_n33327_ i1=$abc$109383$new_n33562_ nq=$abc$109383$new_n33563_
-.subckt a2_x2 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29416_ q=$abc$109383$new_n33564_
-.subckt nxr2_x1 i0=$abc$109383$new_n33326_ i1=$abc$109383$new_n33564_ nq=$abc$109383$new_n33565_
-.subckt a2_x2 i0=$abc$109383$new_n33565_ i1=$abc$109383$new_n33322_ q=$abc$109383$new_n33566_
-.subckt ao22_x2 i0=$abc$109383$new_n33318_ i1=$abc$109383$new_n33566_ i2=$abc$109383$new_n33563_ q=$abc$109383$new_n33567_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29349_ q=$abc$109383$new_n33568_
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+.subckt and2_x1 i0=$abc$109383$new_n33565_ i1=$abc$109383$new_n33322_ q=$abc$109383$new_n33566_
+.subckt and21nor_x1 i0=$abc$109383$new_n33318_ i1=$abc$109383$new_n33566_ i2=$abc$109383$new_n33563_ nq=$abc$109383$new_n33567_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29349_ q=$abc$109383$new_n33568_
 .subckt nand2_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n29292_ nq=$abc$109383$new_n33569_
-.subckt a2_x2 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29326_ q=$abc$109383$new_n33570_
-.subckt nxr2_x1 i0=$abc$109383$new_n33570_ i1=$abc$109383$new_n33569_ nq=$abc$109383$new_n33571_
-.subckt nxr2_x1 i0=$abc$109383$new_n33571_ i1=$abc$109383$new_n33568_ nq=$abc$109383$new_n33572_
+.subckt and2_x1 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29326_ q=$abc$109383$new_n33570_
+.subckt nexor2_x0 i0=$abc$109383$new_n33570_ i1=$abc$109383$new_n33569_ nq=$abc$109383$new_n33571_
+.subckt nexor2_x0 i0=$abc$109383$new_n33571_ i1=$abc$109383$new_n33568_ nq=$abc$109383$new_n33572_
 .subckt nand4_x0 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29391_ i3=$abc$109383$new_n29447_ nq=$abc$109383$new_n33573_
 .subckt nand2_x0 i0=$abc$109383$new_n32853_ i1=$abc$109383$new_n29391_ nq=$abc$109383$new_n33574_
-.subckt a2_x2 i0=$abc$109383$new_n33574_ i1=$abc$109383$new_n33324_ q=$abc$109383$new_n33575_
-.subckt ao22_x2 i0=$abc$109383$new_n33323_ i1=$abc$109383$new_n33575_ i2=$abc$109383$new_n33573_ q=$abc$109383$new_n33576_
+.subckt and2_x1 i0=$abc$109383$new_n33574_ i1=$abc$109383$new_n33324_ q=$abc$109383$new_n33575_
+.subckt and21nor_x1 i0=$abc$109383$new_n33323_ i1=$abc$109383$new_n33575_ i2=$abc$109383$new_n33573_ nq=$abc$109383$new_n33576_
 .subckt nand2_x0 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29270_ nq=$abc$109383$new_n33577_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[23] i1=$abc$109383$new_n29391_ nq=$abc$109383$new_n33578_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[22] i1=$abc$109383$new_n29416_ q=$abc$109383$new_n33579_
-.subckt nxr2_x1 i0=$abc$109383$new_n33579_ i1=$abc$109383$new_n33578_ nq=$abc$109383$new_n33580_
-.subckt nxr2_x1 i0=$abc$109383$new_n33580_ i1=$abc$109383$new_n33577_ nq=$abc$109383$new_n33581_
-.subckt nxr2_x1 i0=$abc$109383$new_n33581_ i1=$abc$109383$new_n33576_ nq=$abc$109383$new_n33582_
-.subckt nxr2_x1 i0=$abc$109383$new_n33582_ i1=$abc$109383$new_n33572_ nq=$abc$109383$new_n33583_
-.subckt nxr2_x1 i0=$abc$109383$new_n33583_ i1=$abc$109383$new_n33567_ nq=$abc$109383$new_n33584_
-.subckt a2_x2 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29449_ q=$abc$109383$new_n33585_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[22] i1=$abc$109383$new_n29416_ q=$abc$109383$new_n33579_
+.subckt nexor2_x0 i0=$abc$109383$new_n33579_ i1=$abc$109383$new_n33578_ nq=$abc$109383$new_n33580_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33581_ i1=$abc$109383$new_n33576_ nq=$abc$109383$new_n33582_
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 .subckt buf_x4 i=$abc$109383$new_n29473_ q=$abc$109383$new_n33586_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[25] q=$abc$109383$new_n33587_
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 .subckt nand2_x0 i0=$abc$109383$new_n33591_ i1=$abc$109383$new_n33554_ nq=$abc$109383$new_n33592_
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 .subckt nand3_x0 i0=$abc$109383$new_n33599_ i1=$abc$109383$new_n33592_ i2=$abc$109383$new_n33497_ nq=$abc$109383$new_n33600_
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 .subckt nand2_x0 i0=$abc$109383$new_n33608_ i1=$abc$109383$new_n33349_ nq=$abc$109383$new_n33609_
-.subckt ao22_x2 i0=$abc$109383$new_n33608_ i1=$abc$109383$new_n33349_ i2=$abc$109383$new_n31803_ q=$abc$109383$new_n33610_
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 .subckt nand2_x0 i0=$abc$109383$new_n33610_ i1=$abc$109383$new_n33609_ nq=$abc$109383$new_n33611_
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n33612_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[25] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n33613_
-.subckt a2_x2 i0=$abc$109383$new_n33613_ i1=$abc$109383$new_n33611_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102858
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+.subckt and2_x1 i0=$abc$109383$new_n33613_ i1=$abc$109383$new_n33611_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102858
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[26] nq=$abc$109383$new_n33615_
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 .subckt nor2_x0 i0=$abc$109383$new_n33616_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n33617_
 .subckt nand3_x0 i0=$abc$109383$new_n33360_ i1=$abc$109383$new_n33356_ i2=$abc$109383$new_n33352_ nq=$abc$109383$new_n33618_
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 .subckt nand2_x0 i0=$abc$109383$new_n33121_ i1=$abc$109383$new_n33109_ nq=$abc$109383$new_n33620_
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 .subckt nand2_x0 i0=$abc$109383$new_n33606_ i1=$abc$109383$new_n33624_ nq=$abc$109383$new_n33625_
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-.subckt nxr2_x1 i0=$abc$109383$new_n33605_ i1=$abc$109383$new_n33628_ nq=$abc$109383$new_n33629_
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 .subckt nand2_x0 i0=$abc$109383$new_n33629_ i1=$abc$109383$new_n33365_ nq=$abc$109383$new_n33630_
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 .subckt nor2_x0 i0=$abc$109383$new_n33633_ i1=$abc$109383$new_n33623_ nq=$abc$109383$new_n33634_
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+.subckt nexor2_x0 i0=$abc$109383$new_n33823_ i1=$abc$109383$new_n33818_ nq=$abc$109383$new_n33824_
+.subckt nexor2_x0 i0=$abc$109383$new_n33824_ i1=$abc$109383$new_n33813_ nq=$abc$109383$new_n33825_
+.subckt nexor2_x0 i0=$abc$109383$new_n33825_ i1=$abc$109383$new_n33809_ nq=$abc$109383$new_n33826_
+.subckt nexor2_x0 i0=$abc$109383$new_n33826_ i1=$abc$109383$new_n33801_ nq=$abc$109383$new_n33827_
+.subckt nexor2_x0 i0=$abc$109383$new_n33827_ i1=$abc$109383$new_n33785_ nq=$abc$109383$new_n33828_
+.subckt nexor2_x0 i0=$abc$109383$new_n33828_ i1=$abc$109383$new_n33780_ nq=$abc$109383$new_n33829_
 .subckt nand2_x0 i0=$abc$109383$new_n33771_ i1=$abc$109383$new_n33584_ nq=$abc$109383$new_n33830_
-.subckt a4_x2 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29392_ i3=$abc$109383$new_n29447_ q=$abc$109383$new_n33831_
+.subckt and4_x1 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29392_ i3=$abc$109383$new_n29447_ q=$abc$109383$new_n33831_
 .subckt nand2_x0 i0=$abc$109383$new_n33574_ i1=$abc$109383$new_n33324_ nq=$abc$109383$new_n33832_
-.subckt oa22_x2 i0=$abc$109383$new_n33564_ i1=$abc$109383$new_n33832_ i2=$abc$109383$new_n33831_ q=$abc$109383$new_n33833_
-.subckt a2_x2 i0=$abc$109383$new_n33581_ i1=$abc$109383$new_n33833_ q=$abc$109383$new_n33834_
-.subckt a2_x2 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29271_ q=$abc$109383$new_n33835_
-.subckt nxr2_x1 i0=$abc$109383$new_n33580_ i1=$abc$109383$new_n33835_ nq=$abc$109383$new_n33836_
+.subckt or21nand_x1 i0=$abc$109383$new_n33564_ i1=$abc$109383$new_n33832_ i2=$abc$109383$new_n33831_ nq=$abc$109383$new_n33833_
+.subckt and2_x1 i0=$abc$109383$new_n33581_ i1=$abc$109383$new_n33833_ q=$abc$109383$new_n33834_
+.subckt and2_x1 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29271_ q=$abc$109383$new_n33835_
+.subckt nexor2_x0 i0=$abc$109383$new_n33580_ i1=$abc$109383$new_n33835_ nq=$abc$109383$new_n33836_
 .subckt nand2_x0 i0=$abc$109383$new_n33836_ i1=$abc$109383$new_n33576_ nq=$abc$109383$new_n33837_
-.subckt nxr2_x1 i0=$abc$109383$new_n33571_ i1=$abc$109383$new_n33822_ nq=$abc$109383$new_n33838_
-.subckt oa22_x2 i0=$abc$109383$new_n33838_ i1=$abc$109383$new_n33837_ i2=$abc$109383$new_n33834_ q=$abc$109383$new_n33839_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29505_ q=$abc$109383$new_n33840_
+.subckt nexor2_x0 i0=$abc$109383$new_n33571_ i1=$abc$109383$new_n33822_ nq=$abc$109383$new_n33838_
+.subckt or21nand_x1 i0=$abc$109383$new_n33838_ i1=$abc$109383$new_n33837_ i2=$abc$109383$new_n33834_ nq=$abc$109383$new_n33839_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29505_ q=$abc$109383$new_n33840_
 .subckt nand2_x0 i0=$abc$109383$new_n32396_ i1=$abc$109383$new_n29326_ nq=$abc$109383$new_n33841_
-.subckt a2_x2 i0=$abc$109383$new_n32848_ i1=$abc$109383$new_n29349_ q=$abc$109383$new_n33842_
-.subckt nxr2_x1 i0=$abc$109383$new_n33842_ i1=$abc$109383$new_n33841_ nq=$abc$109383$new_n33843_
-.subckt nxr2_x1 i0=$abc$109383$new_n33843_ i1=$abc$109383$new_n33840_ nq=$abc$109383$new_n33844_
+.subckt and2_x1 i0=$abc$109383$new_n32848_ i1=$abc$109383$new_n29349_ q=$abc$109383$new_n33842_
+.subckt nexor2_x0 i0=$abc$109383$new_n33842_ i1=$abc$109383$new_n33841_ nq=$abc$109383$new_n33843_
+.subckt nexor2_x0 i0=$abc$109383$new_n33843_ i1=$abc$109383$new_n33840_ nq=$abc$109383$new_n33844_
 .subckt nand4_x0 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32854_ i2=$abc$109383$new_n29417_ i3=$abc$109383$new_n29392_ nq=$abc$109383$new_n33845_
 .subckt nand2_x0 i0=$abc$109383$new_n32853_ i1=$abc$109383$new_n29417_ nq=$abc$109383$new_n33846_
-.subckt a2_x2 i0=$abc$109383$new_n33846_ i1=$abc$109383$new_n33578_ q=$abc$109383$new_n33847_
-.subckt ao22_x2 i0=$abc$109383$new_n33577_ i1=$abc$109383$new_n33847_ i2=$abc$109383$new_n33845_ q=$abc$109383$new_n33848_
+.subckt and2_x1 i0=$abc$109383$new_n33846_ i1=$abc$109383$new_n33578_ q=$abc$109383$new_n33847_
+.subckt and21nor_x1 i0=$abc$109383$new_n33577_ i1=$abc$109383$new_n33847_ i2=$abc$109383$new_n33845_ nq=$abc$109383$new_n33848_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[21] i1=$abc$109383$new_n29293_ nq=$abc$109383$new_n33849_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[23] i1=$abc$109383$new_n29416_ nq=$abc$109383$new_n33850_
-.subckt a2_x2 i0=$abc$109383$new_n32853_ i1=$abc$109383$new_n29270_ q=$abc$109383$new_n33851_
-.subckt nxr2_x1 i0=$abc$109383$new_n33851_ i1=$abc$109383$new_n33850_ nq=$abc$109383$new_n33852_
-.subckt nxr2_x1 i0=$abc$109383$new_n33852_ i1=$abc$109383$new_n33849_ nq=$abc$109383$new_n33853_
-.subckt nxr2_x1 i0=$abc$109383$new_n33853_ i1=$abc$109383$new_n33848_ nq=$abc$109383$new_n33854_
-.subckt nxr2_x1 i0=$abc$109383$new_n33854_ i1=$abc$109383$new_n33844_ nq=$abc$109383$new_n33855_
-.subckt nxr2_x1 i0=$abc$109383$new_n33855_ i1=$abc$109383$new_n33839_ nq=$abc$109383$new_n33856_
+.subckt and2_x1 i0=$abc$109383$new_n32853_ i1=$abc$109383$new_n29270_ q=$abc$109383$new_n33851_
+.subckt nexor2_x0 i0=$abc$109383$new_n33851_ i1=$abc$109383$new_n33850_ nq=$abc$109383$new_n33852_
+.subckt nexor2_x0 i0=$abc$109383$new_n33852_ i1=$abc$109383$new_n33849_ nq=$abc$109383$new_n33853_
+.subckt nexor2_x0 i0=$abc$109383$new_n33853_ i1=$abc$109383$new_n33848_ nq=$abc$109383$new_n33854_
+.subckt nexor2_x0 i0=$abc$109383$new_n33854_ i1=$abc$109383$new_n33844_ nq=$abc$109383$new_n33855_
+.subckt nexor2_x0 i0=$abc$109383$new_n33855_ i1=$abc$109383$new_n33839_ nq=$abc$109383$new_n33856_
 .subckt nand4_x0 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n33331_ i2=$abc$109383$new_n33586_ i3=$abc$109383$new_n29449_ nq=$abc$109383$new_n33857_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[24] i1=$abc$109383$new_n29392_ nq=$abc$109383$new_n33858_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29447_ nq=$abc$109383$new_n33859_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[26] i1=$abc$109383$new_n29472_ q=$abc$109383$new_n33860_
-.subckt nxr2_x1 i0=$abc$109383$new_n33860_ i1=$abc$109383$new_n33859_ nq=$abc$109383$new_n33861_
-.subckt nxr2_x1 i0=$abc$109383$new_n33861_ i1=$abc$109383$new_n33858_ nq=$abc$109383$new_n33862_
-.subckt nxr2_x1 i0=$abc$109383$new_n33862_ i1=$abc$109383$new_n33857_ nq=$abc$109383$new_n33863_
-.subckt nxr2_x1 i0=$abc$109383$new_n33863_ i1=$abc$109383$new_n33856_ nq=$abc$109383$new_n33864_
-.subckt nxr2_x1 i0=$abc$109383$new_n33864_ i1=$abc$109383$new_n33830_ nq=$abc$109383$new_n33865_
-.subckt nxr2_x1 i0=$abc$109383$new_n33865_ i1=$abc$109383$new_n33829_ nq=$abc$109383$new_n33866_
-.subckt nxr2_x1 i0=$abc$109383$new_n33866_ i1=$abc$109383$new_n33774_ nq=$abc$109383$new_n33867_
-.subckt nxr2_x1 i0=$abc$109383$new_n33867_ i1=$abc$109383$new_n33768_ nq=$abc$109383$new_n33868_
-.subckt nxr2_x1 i0=$abc$109383$new_n33868_ i1=$abc$109383$new_n33676_ nq=$abc$109383$new_n33869_
-.subckt nxr2_x1 i0=$abc$109383$new_n33869_ i1=$abc$109383$new_n33671_ nq=$abc$109383$new_n33870_
-.subckt nxr2_x1 i0=$abc$109383$new_n33870_ i1=$abc$109383$new_n33649_ nq=$abc$109383$new_n33871_
-.subckt nxr2_x1 i0=$abc$109383$new_n33871_ i1=$abc$109383$new_n33647_ nq=$abc$109383$new_n33872_
-.subckt nxr2_x1 i0=$abc$109383$new_n33872_ i1=$abc$109383$new_n33644_ nq=$abc$109383$new_n33873_
-.subckt nxr2_x1 i0=$abc$109383$new_n33873_ i1=$abc$109383$new_n33634_ nq=$abc$109383$new_n33874_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n33874_ i2=$abc$109383$new_n33617_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102862
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[27] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n33876_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[26] i1=$abc$109383$new_n29472_ q=$abc$109383$new_n33860_
+.subckt nexor2_x0 i0=$abc$109383$new_n33860_ i1=$abc$109383$new_n33859_ nq=$abc$109383$new_n33861_
+.subckt nexor2_x0 i0=$abc$109383$new_n33861_ i1=$abc$109383$new_n33858_ nq=$abc$109383$new_n33862_
+.subckt nexor2_x0 i0=$abc$109383$new_n33862_ i1=$abc$109383$new_n33857_ nq=$abc$109383$new_n33863_
+.subckt nexor2_x0 i0=$abc$109383$new_n33863_ i1=$abc$109383$new_n33856_ nq=$abc$109383$new_n33864_
+.subckt nexor2_x0 i0=$abc$109383$new_n33864_ i1=$abc$109383$new_n33830_ nq=$abc$109383$new_n33865_
+.subckt nexor2_x0 i0=$abc$109383$new_n33865_ i1=$abc$109383$new_n33829_ nq=$abc$109383$new_n33866_
+.subckt nexor2_x0 i0=$abc$109383$new_n33866_ i1=$abc$109383$new_n33774_ nq=$abc$109383$new_n33867_
+.subckt nexor2_x0 i0=$abc$109383$new_n33867_ i1=$abc$109383$new_n33768_ nq=$abc$109383$new_n33868_
+.subckt nexor2_x0 i0=$abc$109383$new_n33868_ i1=$abc$109383$new_n33676_ nq=$abc$109383$new_n33869_
+.subckt nexor2_x0 i0=$abc$109383$new_n33869_ i1=$abc$109383$new_n33671_ nq=$abc$109383$new_n33870_
+.subckt nexor2_x0 i0=$abc$109383$new_n33870_ i1=$abc$109383$new_n33649_ nq=$abc$109383$new_n33871_
+.subckt nexor2_x0 i0=$abc$109383$new_n33871_ i1=$abc$109383$new_n33647_ nq=$abc$109383$new_n33872_
+.subckt nexor2_x0 i0=$abc$109383$new_n33872_ i1=$abc$109383$new_n33644_ nq=$abc$109383$new_n33873_
+.subckt nexor2_x0 i0=$abc$109383$new_n33873_ i1=$abc$109383$new_n33634_ nq=$abc$109383$new_n33874_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n33874_ i2=$abc$109383$new_n33617_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102862
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[27] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n33876_
 .subckt buf_x4 i=$abc$109383$new_n30135_ q=$abc$109383$new_n33877_
 .subckt nand3_x0 i0=$abc$109383$new_n33642_ i1=$abc$109383$new_n33638_ i2=$abc$109383$new_n33628_ nq=$abc$109383$new_n33878_
-.subckt ao22_x2 i0=$abc$109383$new_n33365_ i1=$abc$109383$new_n33629_ i2=$abc$109383$new_n33878_ q=$abc$109383$new_n33879_
+.subckt and21nor_x1 i0=$abc$109383$new_n33365_ i1=$abc$109383$new_n33629_ i2=$abc$109383$new_n33878_ nq=$abc$109383$new_n33879_
 .subckt nor2_x0 i0=$abc$109383$new_n33872_ i1=$abc$109383$new_n33879_ nq=$abc$109383$new_n33880_
-.subckt ao22_x2 i0=$abc$109383$new_n33623_ i1=$abc$109383$new_n33633_ i2=$abc$109383$new_n33873_ q=$abc$109383$new_n33881_
-.subckt a2_x2 i0=$abc$109383$new_n33603_ i1=$abc$109383$new_n33640_ q=$abc$109383$new_n33882_
-.subckt oa22_x2 i0=$abc$109383$new_n33637_ i1=$abc$109383$new_n33604_ i2=$abc$109383$new_n33882_ q=$abc$109383$new_n33883_
-.subckt a2_x2 i0=$abc$109383$new_n33431_ i1=$abc$109383$new_n33654_ q=$abc$109383$new_n33884_
-.subckt oa22_x2 i0=$abc$109383$new_n33407_ i1=$abc$109383$new_n33432_ i2=$abc$109383$new_n33884_ q=$abc$109383$new_n33885_
-.subckt nxr2_x1 i0=$abc$109383$new_n33670_ i1=$abc$109383$new_n33885_ nq=$abc$109383$new_n33886_
+.subckt and21nor_x1 i0=$abc$109383$new_n33623_ i1=$abc$109383$new_n33633_ i2=$abc$109383$new_n33873_ nq=$abc$109383$new_n33881_
+.subckt and2_x1 i0=$abc$109383$new_n33603_ i1=$abc$109383$new_n33640_ q=$abc$109383$new_n33882_
+.subckt or21nand_x1 i0=$abc$109383$new_n33637_ i1=$abc$109383$new_n33604_ i2=$abc$109383$new_n33882_ nq=$abc$109383$new_n33883_
+.subckt and2_x1 i0=$abc$109383$new_n33431_ i1=$abc$109383$new_n33654_ q=$abc$109383$new_n33884_
+.subckt or21nand_x1 i0=$abc$109383$new_n33407_ i1=$abc$109383$new_n33432_ i2=$abc$109383$new_n33884_ nq=$abc$109383$new_n33885_
+.subckt nexor2_x0 i0=$abc$109383$new_n33670_ i1=$abc$109383$new_n33885_ nq=$abc$109383$new_n33886_
 .subckt nand2_x0 i0=$abc$109383$new_n33869_ i1=$abc$109383$new_n33886_ nq=$abc$109383$new_n33887_
-.subckt a3_x2 i0=$abc$109383$new_n33599_ i1=$abc$109383$new_n33592_ i2=$abc$109383$new_n33497_ q=$abc$109383$new_n33888_
-.subckt nxr2_x1 i0=$abc$109383$new_n33494_ i1=$abc$109383$new_n33669_ nq=$abc$109383$new_n33889_
-.subckt oa22_x2 i0=$abc$109383$new_n33889_ i1=$abc$109383$new_n33601_ i2=$abc$109383$new_n33888_ q=$abc$109383$new_n33890_
-.subckt nxr2_x1 i0=$abc$109383$new_n33868_ i1=$abc$109383$new_n33890_ nq=$abc$109383$new_n33891_
+.subckt and3_x1 i0=$abc$109383$new_n33599_ i1=$abc$109383$new_n33592_ i2=$abc$109383$new_n33497_ q=$abc$109383$new_n33888_
+.subckt nexor2_x0 i0=$abc$109383$new_n33494_ i1=$abc$109383$new_n33669_ nq=$abc$109383$new_n33889_
+.subckt or21nand_x1 i0=$abc$109383$new_n33889_ i1=$abc$109383$new_n33601_ i2=$abc$109383$new_n33888_ nq=$abc$109383$new_n33890_
+.subckt nexor2_x0 i0=$abc$109383$new_n33868_ i1=$abc$109383$new_n33890_ nq=$abc$109383$new_n33891_
 .subckt nand2_x0 i0=$abc$109383$new_n33891_ i1=$abc$109383$new_n33671_ nq=$abc$109383$new_n33892_
-.subckt a3_x2 i0=$abc$109383$new_n33892_ i1=$abc$109383$new_n33887_ i2=$abc$109383$new_n33883_ q=$abc$109383$new_n33893_
-.subckt oa22_x2 i0=$abc$109383$new_n33647_ i1=$abc$109383$new_n33871_ i2=$abc$109383$new_n33893_ q=$abc$109383$new_n33894_
-.subckt a2_x2 i0=$abc$109383$new_n33662_ i1=$abc$109383$new_n33482_ q=$abc$109383$new_n33895_
-.subckt oa22_x2 i0=$abc$109383$new_n33403_ i1=$abc$109383$new_n33494_ i2=$abc$109383$new_n33895_ q=$abc$109383$new_n33896_
+.subckt and3_x1 i0=$abc$109383$new_n33892_ i1=$abc$109383$new_n33887_ i2=$abc$109383$new_n33883_ q=$abc$109383$new_n33893_
+.subckt or21nand_x1 i0=$abc$109383$new_n33647_ i1=$abc$109383$new_n33871_ i2=$abc$109383$new_n33893_ nq=$abc$109383$new_n33894_
+.subckt and2_x1 i0=$abc$109383$new_n33662_ i1=$abc$109383$new_n33482_ q=$abc$109383$new_n33895_
+.subckt or21nand_x1 i0=$abc$109383$new_n33403_ i1=$abc$109383$new_n33494_ i2=$abc$109383$new_n33895_ nq=$abc$109383$new_n33896_
 .subckt nand2_x0 i0=$abc$109383$new_n33896_ i1=$abc$109383$new_n33885_ nq=$abc$109383$new_n33897_
 .subckt nand2_x0 i0=$abc$109383$new_n33480_ i1=$abc$109383$new_n33681_ nq=$abc$109383$new_n33898_
 .subckt nand2_x0 i0=$abc$109383$new_n33481_ i1=$abc$109383$new_n33664_ nq=$abc$109383$new_n33899_
-.subckt a2_x2 i0=$abc$109383$new_n33899_ i1=$abc$109383$new_n33898_ q=$abc$109383$new_n33900_
-.subckt nxr2_x1 i0=$abc$109383$new_n33767_ i1=$abc$109383$new_n33900_ nq=$abc$109383$new_n33901_
-.subckt nxr2_x1 i0=$abc$109383$new_n33867_ i1=$abc$109383$new_n33901_ nq=$abc$109383$new_n33902_
+.subckt and2_x1 i0=$abc$109383$new_n33899_ i1=$abc$109383$new_n33898_ q=$abc$109383$new_n33900_
+.subckt nexor2_x0 i0=$abc$109383$new_n33767_ i1=$abc$109383$new_n33900_ nq=$abc$109383$new_n33901_
+.subckt nexor2_x0 i0=$abc$109383$new_n33867_ i1=$abc$109383$new_n33901_ nq=$abc$109383$new_n33902_
 .subckt nand3_x0 i0=$abc$109383$new_n33601_ i1=$abc$109383$new_n33600_ i2=$abc$109383$new_n33889_ nq=$abc$109383$new_n33903_
-.subckt oa22_x2 i0=$abc$109383$new_n33600_ i1=$abc$109383$new_n33903_ i2=$abc$109383$new_n33902_ q=$abc$109383$new_n33904_
-.subckt ao22_x2 i0=$abc$109383$new_n33671_ i1=$abc$109383$new_n33891_ i2=$abc$109383$new_n33904_ q=$abc$109383$new_n33905_
-.subckt a2_x2 i0=$abc$109383$new_n33429_ i1=$abc$109383$new_n33690_ q=$abc$109383$new_n33906_
+.subckt or21nand_x1 i0=$abc$109383$new_n33600_ i1=$abc$109383$new_n33903_ i2=$abc$109383$new_n33902_ nq=$abc$109383$new_n33904_
+.subckt and21nor_x1 i0=$abc$109383$new_n33671_ i1=$abc$109383$new_n33891_ i2=$abc$109383$new_n33904_ nq=$abc$109383$new_n33905_
+.subckt and2_x1 i0=$abc$109383$new_n33429_ i1=$abc$109383$new_n33690_ q=$abc$109383$new_n33906_
 .subckt nand2_x0 i0=$abc$109383$new_n33693_ i1=$abc$109383$new_n33424_ nq=$abc$109383$new_n33907_
 .subckt nand2_x0 i0=$abc$109383$new_n29316_ i1=$abc$109383$new_n29333_ nq=$abc$109383$new_n33908_
-.subckt nxr2_x1 i0=$abc$109383$new_n33419_ i1=$abc$109383$new_n33908_ nq=$abc$109383$new_n33909_
-.subckt oa22_x2 i0=$abc$109383$new_n33909_ i1=$abc$109383$new_n33907_ i2=$abc$109383$new_n33906_ q=$abc$109383$new_n33910_
+.subckt nexor2_x0 i0=$abc$109383$new_n33419_ i1=$abc$109383$new_n33908_ nq=$abc$109383$new_n33909_
+.subckt or21nand_x1 i0=$abc$109383$new_n33909_ i1=$abc$109383$new_n33907_ i2=$abc$109383$new_n33906_ nq=$abc$109383$new_n33910_
 .subckt nand2_x0 i0=$abc$109383$new_n33711_ i1=$abc$109383$new_n33910_ nq=$abc$109383$new_n33911_
-.subckt nxr2_x1 i0=$abc$109383$new_n33711_ i1=$abc$109383$new_n33910_ nq=$abc$109383$new_n33912_
+.subckt nexor2_x0 i0=$abc$109383$new_n33711_ i1=$abc$109383$new_n33910_ nq=$abc$109383$new_n33912_
 .subckt nand4_x0 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29378_ i2=$abc$109383$new_n29357_ i3=$abc$109383$new_n29513_ nq=$abc$109383$new_n33913_
-.subckt a2_x2 i0=$abc$109383$new_n33685_ i1=$abc$109383$new_n33417_ q=$abc$109383$new_n33914_
-.subckt ao22_x2 i0=$abc$109383$new_n33908_ i1=$abc$109383$new_n33914_ i2=$abc$109383$new_n33913_ q=$abc$109383$new_n33915_
-.subckt ao22_x2 i0=$abc$109383$new_n33915_ i1=$abc$109383$new_n33912_ i2=$abc$109383$new_n33911_ q=$abc$109383$new_n33916_
-.subckt a2_x2 i0=$abc$109383$new_n33552_ i1=$abc$109383$new_n33763_ q=$abc$109383$new_n33917_
-.subckt oa22_x2 i0=$abc$109383$new_n33595_ i1=$abc$109383$new_n33553_ i2=$abc$109383$new_n33917_ q=$abc$109383$new_n33918_
+.subckt and2_x1 i0=$abc$109383$new_n33685_ i1=$abc$109383$new_n33417_ q=$abc$109383$new_n33914_
+.subckt and21nor_x1 i0=$abc$109383$new_n33908_ i1=$abc$109383$new_n33914_ i2=$abc$109383$new_n33913_ nq=$abc$109383$new_n33915_
+.subckt and21nor_x1 i0=$abc$109383$new_n33915_ i1=$abc$109383$new_n33912_ i2=$abc$109383$new_n33911_ nq=$abc$109383$new_n33916_
+.subckt and2_x1 i0=$abc$109383$new_n33552_ i1=$abc$109383$new_n33763_ q=$abc$109383$new_n33917_
+.subckt or21nand_x1 i0=$abc$109383$new_n33595_ i1=$abc$109383$new_n33553_ i2=$abc$109383$new_n33917_ nq=$abc$109383$new_n33918_
 .subckt nand2_x0 i0=$abc$109383$new_n33918_ i1=$abc$109383$new_n33762_ nq=$abc$109383$new_n33919_
-.subckt nxr2_x1 i0=$abc$109383$new_n33712_ i1=$abc$109383$new_n33915_ nq=$abc$109383$new_n33920_
-.subckt nxr2_x1 i0=$abc$109383$new_n33761_ i1=$abc$109383$new_n33920_ nq=$abc$109383$new_n33921_
-.subckt a2_x2 i0=$abc$109383$new_n33766_ i1=$abc$109383$new_n33921_ q=$abc$109383$new_n33922_
-.subckt ao22_x2 i0=$abc$109383$new_n33900_ i1=$abc$109383$new_n33922_ i2=$abc$109383$new_n33919_ q=$abc$109383$new_n33923_
-.subckt nxr2_x1 i0=$abc$109383$new_n33923_ i1=$abc$109383$new_n33916_ nq=$abc$109383$new_n33924_
-.subckt a2_x2 i0=$abc$109383$new_n33590_ i1=$abc$109383$new_n33597_ q=$abc$109383$new_n33925_
+.subckt nexor2_x0 i0=$abc$109383$new_n33712_ i1=$abc$109383$new_n33915_ nq=$abc$109383$new_n33920_
+.subckt nexor2_x0 i0=$abc$109383$new_n33761_ i1=$abc$109383$new_n33920_ nq=$abc$109383$new_n33921_
+.subckt and2_x1 i0=$abc$109383$new_n33766_ i1=$abc$109383$new_n33921_ q=$abc$109383$new_n33922_
+.subckt and21nor_x1 i0=$abc$109383$new_n33900_ i1=$abc$109383$new_n33922_ i2=$abc$109383$new_n33919_ nq=$abc$109383$new_n33923_
+.subckt nexor2_x0 i0=$abc$109383$new_n33923_ i1=$abc$109383$new_n33916_ nq=$abc$109383$new_n33924_
+.subckt and2_x1 i0=$abc$109383$new_n33590_ i1=$abc$109383$new_n33597_ q=$abc$109383$new_n33925_
 .subckt nand2_x0 i0=$abc$109383$new_n33772_ i1=$abc$109383$new_n33559_ nq=$abc$109383$new_n33926_
-.subckt oa22_x2 i0=$abc$109383$new_n33554_ i1=$abc$109383$new_n33926_ i2=$abc$109383$new_n33925_ q=$abc$109383$new_n33927_
+.subckt or21nand_x1 i0=$abc$109383$new_n33554_ i1=$abc$109383$new_n33926_ i2=$abc$109383$new_n33925_ nq=$abc$109383$new_n33927_
 .subckt nand2_x0 i0=$abc$109383$new_n33866_ i1=$abc$109383$new_n33927_ nq=$abc$109383$new_n33928_
-.subckt nxr2_x1 i0=$abc$109383$new_n33866_ i1=$abc$109383$new_n33927_ nq=$abc$109383$new_n33929_
-.subckt ao22_x2 i0=$abc$109383$new_n33768_ i1=$abc$109383$new_n33929_ i2=$abc$109383$new_n33928_ q=$abc$109383$new_n33930_
-.subckt a2_x2 i0=$abc$109383$new_n33716_ i1=$abc$109383$new_n33467_ q=$abc$109383$new_n33931_
-.subckt a2_x2 i0=$abc$109383$new_n33446_ i1=$abc$109383$new_n33216_ q=$abc$109383$new_n33932_
+.subckt nexor2_x0 i0=$abc$109383$new_n33866_ i1=$abc$109383$new_n33927_ nq=$abc$109383$new_n33929_
+.subckt and21nor_x1 i0=$abc$109383$new_n33768_ i1=$abc$109383$new_n33929_ i2=$abc$109383$new_n33928_ nq=$abc$109383$new_n33930_
+.subckt and2_x1 i0=$abc$109383$new_n33716_ i1=$abc$109383$new_n33467_ q=$abc$109383$new_n33931_
+.subckt and2_x1 i0=$abc$109383$new_n33446_ i1=$abc$109383$new_n33216_ q=$abc$109383$new_n33932_
 .subckt nand2_x0 i0=$abc$109383$new_n33220_ i1=$abc$109383$new_n33449_ nq=$abc$109383$new_n33933_
-.subckt oa22_x2 i0=$abc$109383$new_n33440_ i1=$abc$109383$new_n33933_ i2=$abc$109383$new_n33932_ q=$abc$109383$new_n33934_
-.subckt oa22_x2 i0=$abc$109383$new_n33934_ i1=$abc$109383$new_n33479_ i2=$abc$109383$new_n33931_ q=$abc$109383$new_n33935_
-.subckt a2_x2 i0=$abc$109383$new_n33760_ i1=$abc$109383$new_n33935_ q=$abc$109383$new_n33936_
-.subckt oa22_x2 i0=$abc$109383$new_n33920_ i1=$abc$109383$new_n33761_ i2=$abc$109383$new_n33936_ q=$abc$109383$new_n33937_
-.subckt a4_x2 i0=$abc$109383$new_n29258_ i1=$abc$109383$new_n29376_ i2=soc.cpu.minerva.payload__src1$44[25] i3=$abc$109383$new_n29356_ q=$abc$109383$new_n33938_
+.subckt or21nand_x1 i0=$abc$109383$new_n33440_ i1=$abc$109383$new_n33933_ i2=$abc$109383$new_n33932_ nq=$abc$109383$new_n33934_
+.subckt or21nand_x1 i0=$abc$109383$new_n33934_ i1=$abc$109383$new_n33479_ i2=$abc$109383$new_n33931_ nq=$abc$109383$new_n33935_
+.subckt and2_x1 i0=$abc$109383$new_n33760_ i1=$abc$109383$new_n33935_ q=$abc$109383$new_n33936_
+.subckt or21nand_x1 i0=$abc$109383$new_n33920_ i1=$abc$109383$new_n33761_ i2=$abc$109383$new_n33936_ nq=$abc$109383$new_n33937_
+.subckt and4_x1 i0=$abc$109383$new_n29258_ i1=$abc$109383$new_n29376_ i2=soc.cpu.minerva.payload__src1$44[25] i3=$abc$109383$new_n29356_ q=$abc$109383$new_n33938_
 .subckt nand2_x0 i0=$abc$109383$new_n29377_ i1=$abc$109383$new_n29333_ nq=$abc$109383$new_n33939_
 .subckt nand2_x0 i0=$abc$109383$new_n33939_ i1=$abc$109383$new_n33697_ nq=$abc$109383$new_n33940_
-.subckt oa22_x2 i0=$abc$109383$new_n33696_ i1=$abc$109383$new_n33940_ i2=$abc$109383$new_n33938_ q=$abc$109383$new_n33941_
-.subckt a4_x2 i0=$abc$109383$new_n32942_ i1=$abc$109383$new_n29234_ i2=$abc$109383$new_n29560_ i3=$abc$109383$new_n29584_ q=$abc$109383$new_n33942_
+.subckt or21nand_x1 i0=$abc$109383$new_n33696_ i1=$abc$109383$new_n33940_ i2=$abc$109383$new_n33938_ nq=$abc$109383$new_n33941_
+.subckt and4_x1 i0=$abc$109383$new_n32942_ i1=$abc$109383$new_n29234_ i2=$abc$109383$new_n29560_ i3=$abc$109383$new_n29584_ q=$abc$109383$new_n33942_
 .subckt nand2_x0 i0=$abc$109383$new_n33702_ i1=$abc$109383$new_n33426_ nq=$abc$109383$new_n33943_
-.subckt oa22_x2 i0=$abc$109383$new_n33692_ i1=$abc$109383$new_n33943_ i2=$abc$109383$new_n33942_ q=$abc$109383$new_n33944_
+.subckt or21nand_x1 i0=$abc$109383$new_n33692_ i1=$abc$109383$new_n33943_ i2=$abc$109383$new_n33942_ nq=$abc$109383$new_n33944_
 .subckt nand2_x0 i0=$abc$109383$new_n33709_ i1=$abc$109383$new_n33944_ nq=$abc$109383$new_n33945_
-.subckt a2_x2 i0=$abc$109383$new_n29245_ i1=soc.cpu.minerva.payload__src1$44[23] q=$abc$109383$new_n33946_
-.subckt nxr2_x1 i0=$abc$109383$new_n33708_ i1=$abc$109383$new_n33946_ nq=$abc$109383$new_n33947_
-.subckt a2_x2 i0=$abc$109383$new_n33947_ i1=$abc$109383$new_n33704_ q=$abc$109383$new_n33948_
-.subckt ao22_x2 i0=$abc$109383$new_n33700_ i1=$abc$109383$new_n33948_ i2=$abc$109383$new_n33945_ q=$abc$109383$new_n33949_
-.subckt a2_x2 i0=$abc$109383$new_n29315_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n33950_
+.subckt and2_x1 i0=$abc$109383$new_n29245_ i1=soc.cpu.minerva.payload__src1$44[23] q=$abc$109383$new_n33946_
+.subckt nexor2_x0 i0=$abc$109383$new_n33708_ i1=$abc$109383$new_n33946_ nq=$abc$109383$new_n33947_
+.subckt and2_x1 i0=$abc$109383$new_n33947_ i1=$abc$109383$new_n33704_ q=$abc$109383$new_n33948_
+.subckt and21nor_x1 i0=$abc$109383$new_n33700_ i1=$abc$109383$new_n33948_ i2=$abc$109383$new_n33945_ nq=$abc$109383$new_n33949_
+.subckt and2_x1 i0=$abc$109383$new_n29315_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n33950_
 .subckt nand2_x0 i0=$abc$109383$new_n29257_ i1=soc.cpu.minerva.payload__src1$44[25] nq=$abc$109383$new_n33951_
-.subckt a2_x2 i0=$abc$109383$new_n29375_ i1=soc.cpu.minerva.payload__src1$44[26] q=$abc$109383$new_n33952_
-.subckt nxr2_x1 i0=$abc$109383$new_n33952_ i1=$abc$109383$new_n33951_ nq=$abc$109383$new_n33953_
-.subckt nxr2_x1 i0=$abc$109383$new_n33953_ i1=$abc$109383$new_n33950_ nq=$abc$109383$new_n33954_
+.subckt and2_x1 i0=$abc$109383$new_n29375_ i1=soc.cpu.minerva.payload__src1$44[26] q=$abc$109383$new_n33952_
+.subckt nexor2_x0 i0=$abc$109383$new_n33952_ i1=$abc$109383$new_n33951_ nq=$abc$109383$new_n33953_
+.subckt nexor2_x0 i0=$abc$109383$new_n33953_ i1=$abc$109383$new_n33950_ nq=$abc$109383$new_n33954_
 .subckt nand4_x0 i0=$abc$109383$new_n32942_ i1=$abc$109383$new_n29233_ i2=$abc$109383$new_n29533_ i3=$abc$109383$new_n29560_ nq=$abc$109383$new_n33955_
 .subckt nand2_x0 i0=$abc$109383$new_n29233_ i1=$abc$109383$new_n29533_ nq=$abc$109383$new_n33956_
-.subckt a2_x2 i0=$abc$109383$new_n33956_ i1=$abc$109383$new_n33706_ q=$abc$109383$new_n33957_
-.subckt ao22_x2 i0=$abc$109383$new_n33705_ i1=$abc$109383$new_n33957_ i2=$abc$109383$new_n33955_ q=$abc$109383$new_n33958_
+.subckt and2_x1 i0=$abc$109383$new_n33956_ i1=$abc$109383$new_n33706_ q=$abc$109383$new_n33957_
+.subckt and21nor_x1 i0=$abc$109383$new_n33705_ i1=$abc$109383$new_n33957_ i2=$abc$109383$new_n33955_ nq=$abc$109383$new_n33958_
 .subckt nand2_x0 i0=$abc$109383$new_n29244_ i1=$abc$109383$new_n29355_ nq=$abc$109383$new_n33959_
 .subckt nand2_x0 i0=$abc$109383$new_n32699_ i1=$abc$109383$new_n29533_ nq=$abc$109383$new_n33960_
-.subckt a2_x2 i0=$abc$109383$new_n29232_ i1=soc.cpu.minerva.payload__src1$44[23] q=$abc$109383$new_n33961_
-.subckt nxr2_x1 i0=$abc$109383$new_n33961_ i1=$abc$109383$new_n33960_ nq=$abc$109383$new_n33962_
-.subckt nxr2_x1 i0=$abc$109383$new_n33962_ i1=$abc$109383$new_n33959_ nq=$abc$109383$new_n33963_
-.subckt nxr2_x1 i0=$abc$109383$new_n33963_ i1=$abc$109383$new_n33958_ nq=$abc$109383$new_n33964_
-.subckt nxr2_x1 i0=$abc$109383$new_n33964_ i1=$abc$109383$new_n33954_ nq=$abc$109383$new_n33965_
-.subckt nxr2_x1 i0=$abc$109383$new_n33965_ i1=$abc$109383$new_n33949_ nq=$abc$109383$new_n33966_
-.subckt nxr2_x1 i0=$abc$109383$new_n33966_ i1=$abc$109383$new_n33941_ nq=$abc$109383$new_n33967_
-.subckt a2_x2 i0=$abc$109383$new_n33523_ i1=$abc$109383$new_n33750_ q=$abc$109383$new_n33968_
+.subckt and2_x1 i0=$abc$109383$new_n29232_ i1=soc.cpu.minerva.payload__src1$44[23] q=$abc$109383$new_n33961_
+.subckt nexor2_x0 i0=$abc$109383$new_n33961_ i1=$abc$109383$new_n33960_ nq=$abc$109383$new_n33962_
+.subckt nexor2_x0 i0=$abc$109383$new_n33962_ i1=$abc$109383$new_n33959_ nq=$abc$109383$new_n33963_
+.subckt nexor2_x0 i0=$abc$109383$new_n33963_ i1=$abc$109383$new_n33958_ nq=$abc$109383$new_n33964_
+.subckt nexor2_x0 i0=$abc$109383$new_n33964_ i1=$abc$109383$new_n33954_ nq=$abc$109383$new_n33965_
+.subckt nexor2_x0 i0=$abc$109383$new_n33965_ i1=$abc$109383$new_n33949_ nq=$abc$109383$new_n33966_
+.subckt nexor2_x0 i0=$abc$109383$new_n33966_ i1=$abc$109383$new_n33941_ nq=$abc$109383$new_n33967_
+.subckt and2_x1 i0=$abc$109383$new_n33523_ i1=$abc$109383$new_n33750_ q=$abc$109383$new_n33968_
 .subckt nand2_x0 i0=$abc$109383$new_n33754_ i1=$abc$109383$new_n33518_ nq=$abc$109383$new_n33969_
-.subckt oa22_x2 i0=$abc$109383$new_n33513_ i1=$abc$109383$new_n33969_ i2=$abc$109383$new_n33968_ q=$abc$109383$new_n33970_
+.subckt or21nand_x1 i0=$abc$109383$new_n33513_ i1=$abc$109383$new_n33969_ i2=$abc$109383$new_n33968_ nq=$abc$109383$new_n33970_
 .subckt nand2_x0 i0=$abc$109383$new_n33970_ i1=$abc$109383$new_n33747_ nq=$abc$109383$new_n33971_
-.subckt a4_x2 i0=$abc$109383$new_n32973_ i1=$abc$109383$new_n33452_ i2=$abc$109383$new_n29635_ i3=$abc$109383$new_n32238_ q=$abc$109383$new_n33972_
+.subckt and4_x1 i0=$abc$109383$new_n32973_ i1=$abc$109383$new_n33452_ i2=$abc$109383$new_n29635_ i3=$abc$109383$new_n32238_ q=$abc$109383$new_n33972_
 .subckt nand2_x0 i0=$abc$109383$new_n33734_ i1=$abc$109383$new_n33458_ nq=$abc$109383$new_n33973_
-.subckt oa22_x2 i0=$abc$109383$new_n33729_ i1=$abc$109383$new_n33973_ i2=$abc$109383$new_n33972_ q=$abc$109383$new_n33974_
-.subckt nxr2_x1 i0=$abc$109383$new_n33746_ i1=$abc$109383$new_n33974_ nq=$abc$109383$new_n33975_
-.subckt nxr2_x1 i0=$abc$109383$new_n33758_ i1=$abc$109383$new_n33975_ nq=$abc$109383$new_n33976_
-.subckt ao22_x2 i0=$abc$109383$new_n33732_ i1=$abc$109383$new_n33976_ i2=$abc$109383$new_n33971_ q=$abc$109383$new_n33977_
+.subckt or21nand_x1 i0=$abc$109383$new_n33729_ i1=$abc$109383$new_n33973_ i2=$abc$109383$new_n33972_ nq=$abc$109383$new_n33974_
+.subckt nexor2_x0 i0=$abc$109383$new_n33746_ i1=$abc$109383$new_n33974_ nq=$abc$109383$new_n33975_
+.subckt nexor2_x0 i0=$abc$109383$new_n33758_ i1=$abc$109383$new_n33975_ nq=$abc$109383$new_n33976_
+.subckt and21nor_x1 i0=$abc$109383$new_n33732_ i1=$abc$109383$new_n33976_ i2=$abc$109383$new_n33971_ nq=$abc$109383$new_n33977_
 .subckt buf_x4 i=$abc$109383$new_n32738_ q=$abc$109383$new_n33978_
-.subckt a4_x2 i0=$abc$109383$new_n33978_ i1=$abc$109383$new_n33724_ i2=$abc$109383$new_n29669_ i3=$abc$109383$new_n29649_ q=$abc$109383$new_n33979_
+.subckt and4_x1 i0=$abc$109383$new_n33978_ i1=$abc$109383$new_n33724_ i2=$abc$109383$new_n29669_ i3=$abc$109383$new_n29649_ q=$abc$109383$new_n33979_
 .subckt nand2_x0 i0=$abc$109383$new_n33743_ i1=$abc$109383$new_n33510_ nq=$abc$109383$new_n33980_
-.subckt oa22_x2 i0=$abc$109383$new_n33756_ i1=$abc$109383$new_n33980_ i2=$abc$109383$new_n33979_ q=$abc$109383$new_n33981_
+.subckt or21nand_x1 i0=$abc$109383$new_n33756_ i1=$abc$109383$new_n33980_ i2=$abc$109383$new_n33979_ nq=$abc$109383$new_n33981_
 .subckt nand2_x0 i0=$abc$109383$new_n33981_ i1=$abc$109383$new_n33741_ nq=$abc$109383$new_n33982_
 .subckt buf_x4 i=$abc$109383$new_n32743_ q=$abc$109383$new_n33983_
-.subckt a2_x2 i0=$abc$109383$new_n33983_ i1=$abc$109383$new_n29584_ q=$abc$109383$new_n33984_
-.subckt nxr2_x1 i0=$abc$109383$new_n33740_ i1=$abc$109383$new_n33984_ nq=$abc$109383$new_n33985_
-.subckt a2_x2 i0=$abc$109383$new_n33745_ i1=$abc$109383$new_n33985_ q=$abc$109383$new_n33986_
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+.subckt and21nor_x1 i0=$abc$109383$new_n33813_ i1=$abc$109383$new_n34066_ i2=$abc$109383$new_n34063_ nq=$abc$109383$new_n34067_
 .subckt nand4_x0 i0=$abc$109383$new_n33242_ i1=$abc$109383$new_n33241_ i2=$abc$109383$new_n29552_ i3=$abc$109383$new_n29527_ nq=$abc$109383$new_n34068_
 .subckt nand2_x0 i0=$abc$109383$new_n32784_ i1=$abc$109383$new_n29552_ nq=$abc$109383$new_n34069_
-.subckt a2_x2 i0=$abc$109383$new_n34069_ i1=$abc$109383$new_n33815_ q=$abc$109383$new_n34070_
-.subckt ao22_x2 i0=$abc$109383$new_n33814_ i1=$abc$109383$new_n34070_ i2=$abc$109383$new_n34068_ q=$abc$109383$new_n34071_
+.subckt and2_x1 i0=$abc$109383$new_n34069_ i1=$abc$109383$new_n33815_ q=$abc$109383$new_n34070_
+.subckt and21nor_x1 i0=$abc$109383$new_n33814_ i1=$abc$109383$new_n34070_ i2=$abc$109383$new_n34068_ nq=$abc$109383$new_n34071_
 .subckt nand2_x0 i0=$abc$109383$new_n33530_ i1=$abc$109383$new_n29601_ nq=$abc$109383$new_n34072_
 .subckt nand2_x0 i0=$abc$109383$new_n32560_ i1=$abc$109383$new_n29551_ nq=$abc$109383$new_n34073_
-.subckt a2_x2 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n34074_
-.subckt nxr2_x1 i0=$abc$109383$new_n34074_ i1=$abc$109383$new_n34073_ nq=$abc$109383$new_n34075_
-.subckt nxr2_x1 i0=$abc$109383$new_n34075_ i1=$abc$109383$new_n34072_ nq=$abc$109383$new_n34076_
+.subckt and2_x1 i0=$abc$109383$new_n32559_ i1=$abc$109383$new_n29574_ q=$abc$109383$new_n34074_
+.subckt nexor2_x0 i0=$abc$109383$new_n34074_ i1=$abc$109383$new_n34073_ nq=$abc$109383$new_n34075_
+.subckt nexor2_x0 i0=$abc$109383$new_n34075_ i1=$abc$109383$new_n34072_ nq=$abc$109383$new_n34076_
 .subckt nand4_x0 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n32176_ i2=$abc$109383$new_n29349_ i3=$abc$109383$new_n29327_ nq=$abc$109383$new_n34077_
 .subckt nand2_x0 i0=$abc$109383$new_n32587_ i1=$abc$109383$new_n29348_ nq=$abc$109383$new_n34078_
-.subckt a2_x2 i0=$abc$109383$new_n34078_ i1=$abc$109383$new_n33841_ q=$abc$109383$new_n34079_
+.subckt and2_x1 i0=$abc$109383$new_n34078_ i1=$abc$109383$new_n33841_ q=$abc$109383$new_n34079_
 .subckt nand2_x0 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29504_ nq=$abc$109383$new_n34080_
-.subckt ao22_x2 i0=$abc$109383$new_n34080_ i1=$abc$109383$new_n34079_ i2=$abc$109383$new_n34077_ q=$abc$109383$new_n34081_
-.subckt nxr2_x1 i0=$abc$109383$new_n34081_ i1=$abc$109383$new_n34076_ nq=$abc$109383$new_n34082_
-.subckt nxr2_x1 i0=$abc$109383$new_n34082_ i1=$abc$109383$new_n34071_ nq=$abc$109383$new_n34083_
-.subckt nxr2_x1 i0=$abc$109383$new_n34083_ i1=$abc$109383$new_n34067_ nq=$abc$109383$new_n34084_
-.subckt nxr2_x1 i0=$abc$109383$new_n34084_ i1=$abc$109383$new_n34059_ nq=$abc$109383$new_n34085_
-.subckt nxr2_x1 i0=$abc$109383$new_n34085_ i1=$abc$109383$new_n34042_ nq=$abc$109383$new_n34086_
-.subckt nxr2_x1 i0=$abc$109383$new_n34086_ i1=$abc$109383$new_n34041_ nq=$abc$109383$new_n34087_
+.subckt and21nor_x1 i0=$abc$109383$new_n34080_ i1=$abc$109383$new_n34079_ i2=$abc$109383$new_n34077_ nq=$abc$109383$new_n34081_
+.subckt nexor2_x0 i0=$abc$109383$new_n34081_ i1=$abc$109383$new_n34076_ nq=$abc$109383$new_n34082_
+.subckt nexor2_x0 i0=$abc$109383$new_n34082_ i1=$abc$109383$new_n34071_ nq=$abc$109383$new_n34083_
+.subckt nexor2_x0 i0=$abc$109383$new_n34083_ i1=$abc$109383$new_n34067_ nq=$abc$109383$new_n34084_
+.subckt nexor2_x0 i0=$abc$109383$new_n34084_ i1=$abc$109383$new_n34059_ nq=$abc$109383$new_n34085_
+.subckt nexor2_x0 i0=$abc$109383$new_n34085_ i1=$abc$109383$new_n34042_ nq=$abc$109383$new_n34086_
+.subckt nexor2_x0 i0=$abc$109383$new_n34086_ i1=$abc$109383$new_n34041_ nq=$abc$109383$new_n34087_
 .subckt nand2_x0 i0=$abc$109383$new_n33581_ i1=$abc$109383$new_n33833_ nq=$abc$109383$new_n34088_
-.subckt a2_x2 i0=$abc$109383$new_n33836_ i1=$abc$109383$new_n33576_ q=$abc$109383$new_n34089_
-.subckt ao22_x2 i0=$abc$109383$new_n33572_ i1=$abc$109383$new_n34089_ i2=$abc$109383$new_n34088_ q=$abc$109383$new_n34090_
-.subckt nxr2_x1 i0=$abc$109383$new_n33855_ i1=$abc$109383$new_n34090_ nq=$abc$109383$new_n34091_
+.subckt and2_x1 i0=$abc$109383$new_n33836_ i1=$abc$109383$new_n33576_ q=$abc$109383$new_n34089_
+.subckt and21nor_x1 i0=$abc$109383$new_n33572_ i1=$abc$109383$new_n34089_ i2=$abc$109383$new_n34088_ nq=$abc$109383$new_n34090_
+.subckt nexor2_x0 i0=$abc$109383$new_n33855_ i1=$abc$109383$new_n34090_ nq=$abc$109383$new_n34091_
 .subckt nand2_x0 i0=$abc$109383$new_n33863_ i1=$abc$109383$new_n34091_ nq=$abc$109383$new_n34092_
-.subckt a4_x2 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32854_ i2=$abc$109383$new_n29417_ i3=$abc$109383$new_n29392_ q=$abc$109383$new_n34093_
+.subckt and4_x1 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32854_ i2=$abc$109383$new_n29417_ i3=$abc$109383$new_n29392_ q=$abc$109383$new_n34093_
 .subckt nand2_x0 i0=$abc$109383$new_n33846_ i1=$abc$109383$new_n33578_ nq=$abc$109383$new_n34094_
-.subckt oa22_x2 i0=$abc$109383$new_n33835_ i1=$abc$109383$new_n34094_ i2=$abc$109383$new_n34093_ q=$abc$109383$new_n34095_
-.subckt a2_x2 i0=$abc$109383$new_n33853_ i1=$abc$109383$new_n34095_ q=$abc$109383$new_n34096_
-.subckt a2_x2 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29294_ q=$abc$109383$new_n34097_
-.subckt nxr2_x1 i0=$abc$109383$new_n33852_ i1=$abc$109383$new_n34097_ nq=$abc$109383$new_n34098_
+.subckt or21nand_x1 i0=$abc$109383$new_n33835_ i1=$abc$109383$new_n34094_ i2=$abc$109383$new_n34093_ nq=$abc$109383$new_n34095_
+.subckt and2_x1 i0=$abc$109383$new_n33853_ i1=$abc$109383$new_n34095_ q=$abc$109383$new_n34096_
+.subckt and2_x1 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29294_ q=$abc$109383$new_n34097_
+.subckt nexor2_x0 i0=$abc$109383$new_n33852_ i1=$abc$109383$new_n34097_ nq=$abc$109383$new_n34098_
 .subckt nand2_x0 i0=$abc$109383$new_n34098_ i1=$abc$109383$new_n33848_ nq=$abc$109383$new_n34099_
-.subckt nxr2_x1 i0=$abc$109383$new_n33843_ i1=$abc$109383$new_n34080_ nq=$abc$109383$new_n34100_
-.subckt oa22_x2 i0=$abc$109383$new_n34100_ i1=$abc$109383$new_n34099_ i2=$abc$109383$new_n34096_ q=$abc$109383$new_n34101_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n33331_ i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n34102_
+.subckt nexor2_x0 i0=$abc$109383$new_n33843_ i1=$abc$109383$new_n34080_ nq=$abc$109383$new_n34100_
+.subckt or21nand_x1 i0=$abc$109383$new_n34100_ i1=$abc$109383$new_n34099_ i2=$abc$109383$new_n34096_ nq=$abc$109383$new_n34101_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n33331_ i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n34102_
 .subckt nand2_x0 i0=$abc$109383$new_n33862_ i1=$abc$109383$new_n34102_ nq=$abc$109383$new_n34103_
-.subckt a2_x2 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29527_ q=$abc$109383$new_n34104_
+.subckt and2_x1 i0=$abc$109383$new_n31991_ i1=$abc$109383$new_n29527_ q=$abc$109383$new_n34104_
 .subckt nand2_x0 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n29348_ nq=$abc$109383$new_n34105_
-.subckt a2_x2 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29504_ q=$abc$109383$new_n34106_
-.subckt nxr2_x1 i0=$abc$109383$new_n34106_ i1=$abc$109383$new_n34105_ nq=$abc$109383$new_n34107_
-.subckt nxr2_x1 i0=$abc$109383$new_n34107_ i1=$abc$109383$new_n34104_ nq=$abc$109383$new_n34108_
+.subckt and2_x1 i0=$abc$109383$new_n32176_ i1=$abc$109383$new_n29504_ q=$abc$109383$new_n34106_
+.subckt nexor2_x0 i0=$abc$109383$new_n34106_ i1=$abc$109383$new_n34105_ nq=$abc$109383$new_n34107_
+.subckt nexor2_x0 i0=$abc$109383$new_n34107_ i1=$abc$109383$new_n34104_ nq=$abc$109383$new_n34108_
 .subckt nand4_x0 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n32853_ i2=$abc$109383$new_n29270_ i3=$abc$109383$new_n29417_ nq=$abc$109383$new_n34109_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[22] i1=$abc$109383$new_n29270_ nq=$abc$109383$new_n34110_
-.subckt a2_x2 i0=$abc$109383$new_n34110_ i1=$abc$109383$new_n33850_ q=$abc$109383$new_n34111_
-.subckt ao22_x2 i0=$abc$109383$new_n33849_ i1=$abc$109383$new_n34111_ i2=$abc$109383$new_n34109_ q=$abc$109383$new_n34112_
+.subckt and2_x1 i0=$abc$109383$new_n34110_ i1=$abc$109383$new_n33850_ q=$abc$109383$new_n34111_
+.subckt and21nor_x1 i0=$abc$109383$new_n33849_ i1=$abc$109383$new_n34111_ i2=$abc$109383$new_n34109_ nq=$abc$109383$new_n34112_
 .subckt nand2_x0 i0=$abc$109383$new_n32625_ i1=$abc$109383$new_n29327_ nq=$abc$109383$new_n34113_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[23] i1=$abc$109383$new_n29269_ nq=$abc$109383$new_n34114_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[22] i1=$abc$109383$new_n29292_ q=$abc$109383$new_n34115_
-.subckt nxr2_x1 i0=$abc$109383$new_n34115_ i1=$abc$109383$new_n34114_ nq=$abc$109383$new_n34116_
-.subckt nxr2_x1 i0=$abc$109383$new_n34116_ i1=$abc$109383$new_n34113_ nq=$abc$109383$new_n34117_
-.subckt nxr2_x1 i0=$abc$109383$new_n34117_ i1=$abc$109383$new_n34112_ nq=$abc$109383$new_n34118_
-.subckt nxr2_x1 i0=$abc$109383$new_n34118_ i1=$abc$109383$new_n34108_ nq=$abc$109383$new_n34119_
-.subckt nxr2_x1 i0=$abc$109383$new_n34119_ i1=$abc$109383$new_n34103_ nq=$abc$109383$new_n34120_
-.subckt nxr2_x1 i0=$abc$109383$new_n34120_ i1=$abc$109383$new_n34101_ nq=$abc$109383$new_n34121_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[22] i1=$abc$109383$new_n29292_ q=$abc$109383$new_n34115_
+.subckt nexor2_x0 i0=$abc$109383$new_n34115_ i1=$abc$109383$new_n34114_ nq=$abc$109383$new_n34116_
+.subckt nexor2_x0 i0=$abc$109383$new_n34116_ i1=$abc$109383$new_n34113_ nq=$abc$109383$new_n34117_
+.subckt nexor2_x0 i0=$abc$109383$new_n34117_ i1=$abc$109383$new_n34112_ nq=$abc$109383$new_n34118_
+.subckt nexor2_x0 i0=$abc$109383$new_n34118_ i1=$abc$109383$new_n34108_ nq=$abc$109383$new_n34119_
+.subckt nexor2_x0 i0=$abc$109383$new_n34119_ i1=$abc$109383$new_n34103_ nq=$abc$109383$new_n34120_
+.subckt nexor2_x0 i0=$abc$109383$new_n34120_ i1=$abc$109383$new_n34101_ nq=$abc$109383$new_n34121_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[26] q=$abc$109383$new_n34122_
-.subckt a4_x2 i0=$abc$109383$new_n34122_ i1=soc.cpu.minerva.payload__src2$45[25] i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n34123_
+.subckt and4_x1 i0=$abc$109383$new_n34122_ i1=soc.cpu.minerva.payload__src2$45[25] i2=$abc$109383$new_n29473_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n34123_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29473_ nq=$abc$109383$new_n34124_
 .subckt nand2_x0 i0=$abc$109383$new_n34124_ i1=$abc$109383$new_n33859_ nq=$abc$109383$new_n34125_
-.subckt a2_x2 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29392_ q=$abc$109383$new_n34126_
-.subckt oa22_x2 i0=$abc$109383$new_n34126_ i1=$abc$109383$new_n34125_ i2=$abc$109383$new_n34123_ q=$abc$109383$new_n34127_
+.subckt and2_x1 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29392_ q=$abc$109383$new_n34126_
+.subckt or21nand_x1 i0=$abc$109383$new_n34126_ i1=$abc$109383$new_n34125_ i2=$abc$109383$new_n34123_ nq=$abc$109383$new_n34127_
 .subckt nand2_x0 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29418_ nq=$abc$109383$new_n34128_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29448_ nq=$abc$109383$new_n34129_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29392_ q=$abc$109383$new_n34130_
-.subckt nxr2_x1 i0=$abc$109383$new_n34130_ i1=$abc$109383$new_n34129_ nq=$abc$109383$new_n34131_
-.subckt nxr2_x1 i0=$abc$109383$new_n34131_ i1=$abc$109383$new_n34128_ nq=$abc$109383$new_n34132_
-.subckt nxr2_x1 i0=$abc$109383$new_n34132_ i1=$abc$109383$new_n34127_ nq=$abc$109383$new_n34133_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29392_ q=$abc$109383$new_n34130_
+.subckt nexor2_x0 i0=$abc$109383$new_n34130_ i1=$abc$109383$new_n34129_ nq=$abc$109383$new_n34131_
+.subckt nexor2_x0 i0=$abc$109383$new_n34131_ i1=$abc$109383$new_n34128_ nq=$abc$109383$new_n34132_
+.subckt nexor2_x0 i0=$abc$109383$new_n34132_ i1=$abc$109383$new_n34127_ nq=$abc$109383$new_n34133_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[27] q=$abc$109383$new_n34134_
-.subckt a2_x2 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n34135_
-.subckt nxr2_x1 i0=$abc$109383$new_n34135_ i1=$abc$109383$new_n34133_ nq=$abc$109383$new_n34136_
-.subckt nxr2_x1 i0=$abc$109383$new_n34136_ i1=$abc$109383$new_n34121_ nq=$abc$109383$new_n34137_
-.subckt nxr2_x1 i0=$abc$109383$new_n34137_ i1=$abc$109383$new_n34092_ nq=$abc$109383$new_n34138_
-.subckt nxr2_x1 i0=$abc$109383$new_n34138_ i1=$abc$109383$new_n34087_ nq=$abc$109383$new_n34139_
-.subckt nxr2_x1 i0=$abc$109383$new_n34139_ i1=$abc$109383$new_n34035_ nq=$abc$109383$new_n34140_
-.subckt nxr2_x1 i0=$abc$109383$new_n34140_ i1=$abc$109383$new_n34031_ nq=$abc$109383$new_n34141_
-.subckt nxr2_x1 i0=$abc$109383$new_n34141_ i1=$abc$109383$new_n33930_ nq=$abc$109383$new_n34142_
-.subckt nxr2_x1 i0=$abc$109383$new_n34142_ i1=$abc$109383$new_n33924_ nq=$abc$109383$new_n34143_
-.subckt nxr2_x1 i0=$abc$109383$new_n34143_ i1=$abc$109383$new_n33905_ nq=$abc$109383$new_n34144_
-.subckt nxr2_x1 i0=$abc$109383$new_n34144_ i1=$abc$109383$new_n33897_ nq=$abc$109383$new_n34145_
-.subckt nxr2_x1 i0=$abc$109383$new_n34145_ i1=$abc$109383$new_n33894_ nq=$abc$109383$new_n34146_
-.subckt o3_x2 i0=$abc$109383$new_n34146_ i1=$abc$109383$new_n33881_ i2=$abc$109383$new_n33880_ q=$abc$109383$new_n34147_
+.subckt and2_x1 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n34135_
+.subckt nexor2_x0 i0=$abc$109383$new_n34135_ i1=$abc$109383$new_n34133_ nq=$abc$109383$new_n34136_
+.subckt nexor2_x0 i0=$abc$109383$new_n34136_ i1=$abc$109383$new_n34121_ nq=$abc$109383$new_n34137_
+.subckt nexor2_x0 i0=$abc$109383$new_n34137_ i1=$abc$109383$new_n34092_ nq=$abc$109383$new_n34138_
+.subckt nexor2_x0 i0=$abc$109383$new_n34138_ i1=$abc$109383$new_n34087_ nq=$abc$109383$new_n34139_
+.subckt nexor2_x0 i0=$abc$109383$new_n34139_ i1=$abc$109383$new_n34035_ nq=$abc$109383$new_n34140_
+.subckt nexor2_x0 i0=$abc$109383$new_n34140_ i1=$abc$109383$new_n34031_ nq=$abc$109383$new_n34141_
+.subckt nexor2_x0 i0=$abc$109383$new_n34141_ i1=$abc$109383$new_n33930_ nq=$abc$109383$new_n34142_
+.subckt nexor2_x0 i0=$abc$109383$new_n34142_ i1=$abc$109383$new_n33924_ nq=$abc$109383$new_n34143_
+.subckt nexor2_x0 i0=$abc$109383$new_n34143_ i1=$abc$109383$new_n33905_ nq=$abc$109383$new_n34144_
+.subckt nexor2_x0 i0=$abc$109383$new_n34144_ i1=$abc$109383$new_n33897_ nq=$abc$109383$new_n34145_
+.subckt nexor2_x0 i0=$abc$109383$new_n34145_ i1=$abc$109383$new_n33894_ nq=$abc$109383$new_n34146_
+.subckt or3_x1 i0=$abc$109383$new_n34146_ i1=$abc$109383$new_n33881_ i2=$abc$109383$new_n33880_ q=$abc$109383$new_n34147_
 .subckt nand2_x0 i0=$abc$109383$new_n34147_ i1=$abc$109383$new_n33877_ nq=$abc$109383$new_n34148_
-.subckt ao22_x2 i0=$abc$109383$new_n33880_ i1=$abc$109383$new_n33881_ i2=$abc$109383$new_n34146_ q=$abc$109383$new_n34149_
-.subckt ao22_x2 i0=$abc$109383$new_n34149_ i1=$abc$109383$new_n34148_ i2=$abc$109383$new_n33876_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102866
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-.subckt a2_x2 i0=$abc$109383$new_n29315_ i1=$abc$109383$new_n29422_ q=$abc$109383$new_n34228_
+.subckt nexor2_x0 i0=$abc$109383$new_n33953_ i1=$abc$109383$new_n34216_ nq=$abc$109383$new_n34226_
+.subckt or21nand_x1 i0=$abc$109383$new_n34226_ i1=$abc$109383$new_n34225_ i2=$abc$109383$new_n34222_ nq=$abc$109383$new_n34227_
+.subckt and2_x1 i0=$abc$109383$new_n29315_ i1=$abc$109383$new_n29422_ q=$abc$109383$new_n34228_
 .subckt nand2_x0 i0=$abc$109383$new_n29258_ i1=$abc$109383$new_n29299_ nq=$abc$109383$new_n34229_
-.subckt a2_x2 i0=$abc$109383$new_n29375_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n34230_
-.subckt nxr2_x1 i0=$abc$109383$new_n34230_ i1=$abc$109383$new_n34229_ nq=$abc$109383$new_n34231_
-.subckt nxr2_x1 i0=$abc$109383$new_n34231_ i1=$abc$109383$new_n34228_ nq=$abc$109383$new_n34232_
+.subckt and2_x1 i0=$abc$109383$new_n29375_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n34230_
+.subckt nexor2_x0 i0=$abc$109383$new_n34230_ i1=$abc$109383$new_n34229_ nq=$abc$109383$new_n34231_
+.subckt nexor2_x0 i0=$abc$109383$new_n34231_ i1=$abc$109383$new_n34228_ nq=$abc$109383$new_n34232_
 .subckt nand4_x0 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29234_ i2=$abc$109383$new_n29511_ i3=$abc$109383$new_n29534_ nq=$abc$109383$new_n34233_
 .subckt nand2_x0 i0=$abc$109383$new_n29234_ i1=$abc$109383$new_n29511_ nq=$abc$109383$new_n34234_
-.subckt a2_x2 i0=$abc$109383$new_n34234_ i1=$abc$109383$new_n33960_ q=$abc$109383$new_n34235_
-.subckt ao22_x2 i0=$abc$109383$new_n33959_ i1=$abc$109383$new_n34235_ i2=$abc$109383$new_n34233_ q=$abc$109383$new_n34236_
+.subckt and2_x1 i0=$abc$109383$new_n34234_ i1=$abc$109383$new_n33960_ q=$abc$109383$new_n34235_
+.subckt and21nor_x1 i0=$abc$109383$new_n33959_ i1=$abc$109383$new_n34235_ i2=$abc$109383$new_n34233_ nq=$abc$109383$new_n34236_
 .subckt nand2_x0 i0=$abc$109383$new_n29245_ i1=soc.cpu.minerva.payload__src1$44[25] nq=$abc$109383$new_n34237_
 .subckt nand2_x0 i0=$abc$109383$new_n32942_ i1=soc.cpu.minerva.payload__src1$44[23] nq=$abc$109383$new_n34238_
-.subckt a2_x2 i0=$abc$109383$new_n29233_ i1=$abc$109383$new_n29355_ q=$abc$109383$new_n34239_
-.subckt nxr2_x1 i0=$abc$109383$new_n34239_ i1=$abc$109383$new_n34238_ nq=$abc$109383$new_n34240_
-.subckt nxr2_x1 i0=$abc$109383$new_n34240_ i1=$abc$109383$new_n34237_ nq=$abc$109383$new_n34241_
-.subckt nxr2_x1 i0=$abc$109383$new_n34241_ i1=$abc$109383$new_n34236_ nq=$abc$109383$new_n34242_
-.subckt nxr2_x1 i0=$abc$109383$new_n34242_ i1=$abc$109383$new_n34232_ nq=$abc$109383$new_n34243_
-.subckt nxr2_x1 i0=$abc$109383$new_n34243_ i1=$abc$109383$new_n34227_ nq=$abc$109383$new_n34244_
-.subckt nxr2_x1 i0=$abc$109383$new_n34244_ i1=$abc$109383$new_n34217_ nq=$abc$109383$new_n34245_
-.subckt a2_x2 i0=$abc$109383$new_n33799_ i1=$abc$109383$new_n34007_ q=$abc$109383$new_n34246_
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+.subckt nexor2_x0 i0=$abc$109383$new_n34241_ i1=$abc$109383$new_n34236_ nq=$abc$109383$new_n34242_
+.subckt nexor2_x0 i0=$abc$109383$new_n34242_ i1=$abc$109383$new_n34232_ nq=$abc$109383$new_n34243_
+.subckt nexor2_x0 i0=$abc$109383$new_n34243_ i1=$abc$109383$new_n34227_ nq=$abc$109383$new_n34244_
+.subckt nexor2_x0 i0=$abc$109383$new_n34244_ i1=$abc$109383$new_n34217_ nq=$abc$109383$new_n34245_
+.subckt and2_x1 i0=$abc$109383$new_n33799_ i1=$abc$109383$new_n34007_ q=$abc$109383$new_n34246_
 .subckt nand2_x0 i0=$abc$109383$new_n34010_ i1=$abc$109383$new_n33794_ nq=$abc$109383$new_n34247_
-.subckt oa22_x2 i0=$abc$109383$new_n33790_ i1=$abc$109383$new_n34247_ i2=$abc$109383$new_n34246_ q=$abc$109383$new_n34248_
-.subckt a2_x2 i0=$abc$109383$new_n34248_ i1=$abc$109383$new_n34003_ q=$abc$109383$new_n34249_
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-.subckt a4_x2 i0=$abc$109383$new_n33978_ i1=$abc$109383$new_n33724_ i2=$abc$109383$new_n29680_ i3=$abc$109383$new_n29669_ q=$abc$109383$new_n34251_
+.subckt or21nand_x1 i0=$abc$109383$new_n33790_ i1=$abc$109383$new_n34247_ i2=$abc$109383$new_n34246_ nq=$abc$109383$new_n34248_
+.subckt and2_x1 i0=$abc$109383$new_n34248_ i1=$abc$109383$new_n34003_ q=$abc$109383$new_n34249_
+.subckt or21nand_x1 i0=$abc$109383$new_n34209_ i1=$abc$109383$new_n34015_ i2=$abc$109383$new_n34249_ nq=$abc$109383$new_n34250_
+.subckt and4_x1 i0=$abc$109383$new_n33978_ i1=$abc$109383$new_n33724_ i2=$abc$109383$new_n29680_ i3=$abc$109383$new_n29669_ q=$abc$109383$new_n34251_
 .subckt nand2_x0 i0=$abc$109383$new_n33999_ i1=$abc$109383$new_n33787_ nq=$abc$109383$new_n34252_
-.subckt oa22_x2 i0=$abc$109383$new_n34012_ i1=$abc$109383$new_n34252_ i2=$abc$109383$new_n34251_ q=$abc$109383$new_n34253_
-.subckt a2_x2 i0=$abc$109383$new_n34253_ i1=$abc$109383$new_n33997_ q=$abc$109383$new_n34254_
-.subckt a2_x2 i0=$abc$109383$new_n33983_ i1=$abc$109383$new_n29560_ q=$abc$109383$new_n34255_
-.subckt nxr2_x1 i0=$abc$109383$new_n33996_ i1=$abc$109383$new_n34255_ nq=$abc$109383$new_n34256_
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 .subckt nand2_x0 i0=$abc$109383$new_n34001_ i1=$abc$109383$new_n34256_ nq=$abc$109383$new_n34257_
 .subckt buf_x4 i=$abc$109383$new_n33452_ q=$abc$109383$new_n34258_
-.subckt a4_x2 i0=$abc$109383$new_n33988_ i1=$abc$109383$new_n34258_ i2=$abc$109383$new_n29611_ i3=$abc$109383$new_n29636_ q=$abc$109383$new_n34259_
+.subckt and4_x1 i0=$abc$109383$new_n33988_ i1=$abc$109383$new_n34258_ i2=$abc$109383$new_n29611_ i3=$abc$109383$new_n29636_ q=$abc$109383$new_n34259_
 .subckt nand2_x0 i0=$abc$109383$new_n33990_ i1=$abc$109383$new_n33738_ nq=$abc$109383$new_n34260_
-.subckt oa22_x2 i0=$abc$109383$new_n33984_ i1=$abc$109383$new_n34260_ i2=$abc$109383$new_n34259_ q=$abc$109383$new_n34261_
-.subckt oa22_x2 i0=$abc$109383$new_n34261_ i1=$abc$109383$new_n34257_ i2=$abc$109383$new_n34254_ q=$abc$109383$new_n34262_
+.subckt or21nand_x1 i0=$abc$109383$new_n33984_ i1=$abc$109383$new_n34260_ i2=$abc$109383$new_n34259_ nq=$abc$109383$new_n34261_
+.subckt or21nand_x1 i0=$abc$109383$new_n34261_ i1=$abc$109383$new_n34257_ i2=$abc$109383$new_n34254_ nq=$abc$109383$new_n34262_
 .subckt nand4_x0 i0=$abc$109383$new_n33988_ i1=$abc$109383$new_n34258_ i2=$abc$109383$new_n29585_ i3=$abc$109383$new_n29611_ nq=$abc$109383$new_n34263_
 .subckt nand2_x0 i0=$abc$109383$new_n34258_ i1=$abc$109383$new_n29584_ nq=$abc$109383$new_n34264_
-.subckt a2_x2 i0=$abc$109383$new_n34264_ i1=$abc$109383$new_n33994_ q=$abc$109383$new_n34265_
-.subckt ao22_x2 i0=$abc$109383$new_n33993_ i1=$abc$109383$new_n34265_ i2=$abc$109383$new_n34263_ q=$abc$109383$new_n34266_
+.subckt and2_x1 i0=$abc$109383$new_n34264_ i1=$abc$109383$new_n33994_ q=$abc$109383$new_n34265_
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 .subckt nand2_x0 i0=$abc$109383$new_n32743_ i1=$abc$109383$new_n29534_ nq=$abc$109383$new_n34267_
 .subckt nand2_x0 i0=$abc$109383$new_n32973_ i1=$abc$109383$new_n29583_ nq=$abc$109383$new_n34268_
-.subckt a2_x2 i0=$abc$109383$new_n33452_ i1=$abc$109383$new_n29559_ q=$abc$109383$new_n34269_
-.subckt nxr2_x1 i0=$abc$109383$new_n34269_ i1=$abc$109383$new_n34268_ nq=$abc$109383$new_n34270_
-.subckt nxr2_x1 i0=$abc$109383$new_n34270_ i1=$abc$109383$new_n34267_ nq=$abc$109383$new_n34271_
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 .subckt nand4_x0 i0=$abc$109383$new_n32738_ i1=$abc$109383$new_n33724_ i2=$abc$109383$new_n29657_ i3=$abc$109383$new_n29680_ nq=$abc$109383$new_n34272_
 .subckt nand2_x0 i0=$abc$109383$new_n33724_ i1=$abc$109383$new_n29657_ nq=$abc$109383$new_n34273_
-.subckt a2_x2 i0=$abc$109383$new_n34273_ i1=$abc$109383$new_n34044_ q=$abc$109383$new_n34274_
-.subckt ao22_x2 i0=$abc$109383$new_n34043_ i1=$abc$109383$new_n34274_ i2=$abc$109383$new_n34272_ q=$abc$109383$new_n34275_
-.subckt nxr2_x1 i0=$abc$109383$new_n34275_ i1=$abc$109383$new_n34271_ nq=$abc$109383$new_n34276_
-.subckt nxr2_x1 i0=$abc$109383$new_n34276_ i1=$abc$109383$new_n34266_ nq=$abc$109383$new_n34277_
-.subckt a4_x2 i0=$abc$109383$new_n34004_ i1=$abc$109383$new_n34048_ i2=$abc$109383$new_n29626_ i3=$abc$109383$new_n29602_ q=$abc$109383$new_n34278_
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 .subckt nand2_x0 i0=$abc$109383$new_n34050_ i1=$abc$109383$new_n33796_ nq=$abc$109383$new_n34279_
-.subckt oa22_x2 i0=$abc$109383$new_n34009_ i1=$abc$109383$new_n34279_ i2=$abc$109383$new_n34278_ q=$abc$109383$new_n34280_
-.subckt a2_x2 i0=$abc$109383$new_n34057_ i1=$abc$109383$new_n34280_ q=$abc$109383$new_n34281_
-.subckt a2_x2 i0=$abc$109383$new_n33752_ i1=$abc$109383$new_n29669_ q=$abc$109383$new_n34282_
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 .subckt nand2_x0 i0=$abc$109383$new_n34283_ i1=$abc$109383$new_n34052_ nq=$abc$109383$new_n34284_
-.subckt oa22_x2 i0=$abc$109383$new_n34047_ i1=$abc$109383$new_n34284_ i2=$abc$109383$new_n34281_ q=$abc$109383$new_n34285_
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 .subckt nand2_x0 i0=$abc$109383$new_n34285_ i1=$abc$109383$new_n34277_ nq=$abc$109383$new_n34286_
-.subckt a4_x2 i0=$abc$109383$new_n33988_ i1=$abc$109383$new_n33452_ i2=$abc$109383$new_n29584_ i3=$abc$109383$new_n29611_ q=$abc$109383$new_n34287_
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 .subckt nand2_x0 i0=$abc$109383$new_n34264_ i1=$abc$109383$new_n33994_ nq=$abc$109383$new_n34288_
-.subckt oa22_x2 i0=$abc$109383$new_n34255_ i1=$abc$109383$new_n34288_ i2=$abc$109383$new_n34287_ q=$abc$109383$new_n34289_
-.subckt nxr2_x1 i0=$abc$109383$new_n34276_ i1=$abc$109383$new_n34289_ nq=$abc$109383$new_n34290_
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 .subckt nand2_x0 i0=$abc$109383$new_n34057_ i1=$abc$109383$new_n34280_ nq=$abc$109383$new_n34291_
-.subckt a2_x2 i0=$abc$109383$new_n34283_ i1=$abc$109383$new_n34052_ q=$abc$109383$new_n34292_
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 .subckt buf_x4 i=$abc$109383$new_n32838_ q=$abc$109383$new_n34293_
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 .subckt nand2_x0 i0=$abc$109383$new_n34296_ i1=$abc$109383$new_n34290_ nq=$abc$109383$new_n34297_
 .subckt nand3_x0 i0=$abc$109383$new_n34297_ i1=$abc$109383$new_n34286_ i2=$abc$109383$new_n34262_ nq=$abc$109383$new_n34298_
-.subckt oa22_x2 i0=$abc$109383$new_n34297_ i1=$abc$109383$new_n34286_ i2=$abc$109383$new_n34262_ q=$abc$109383$new_n34299_
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 .subckt nand3_x0 i0=$abc$109383$new_n34299_ i1=$abc$109383$new_n34298_ i2=$abc$109383$new_n34250_ nq=$abc$109383$new_n34300_
-.subckt oa22_x2 i0=$abc$109383$new_n34299_ i1=$abc$109383$new_n34298_ i2=$abc$109383$new_n34250_ q=$abc$109383$new_n34301_
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 .subckt nand2_x0 i0=$abc$109383$new_n34085_ i1=$abc$109383$new_n34304_ nq=$abc$109383$new_n34305_
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 .subckt nand3_x0 i0=$abc$109383$new_n34391_ i1=$abc$109383$new_n34385_ i2=$abc$109383$new_n34384_ nq=$abc$109383$new_n34392_
-.subckt oa22_x2 i0=$abc$109383$new_n34384_ i1=$abc$109383$new_n34385_ i2=$abc$109383$new_n34391_ q=$abc$109383$new_n34393_
+.subckt or21nand_x1 i0=$abc$109383$new_n34384_ i1=$abc$109383$new_n34385_ i2=$abc$109383$new_n34391_ nq=$abc$109383$new_n34393_
 .subckt nand3_x0 i0=$abc$109383$new_n34393_ i1=$abc$109383$new_n34392_ i2=$abc$109383$new_n34329_ nq=$abc$109383$new_n34394_
-.subckt oa22_x2 i0=$abc$109383$new_n34393_ i1=$abc$109383$new_n34392_ i2=$abc$109383$new_n34329_ q=$abc$109383$new_n34395_
+.subckt or21nand_x1 i0=$abc$109383$new_n34393_ i1=$abc$109383$new_n34392_ i2=$abc$109383$new_n34329_ nq=$abc$109383$new_n34395_
 .subckt nand2_x0 i0=$abc$109383$new_n34395_ i1=$abc$109383$new_n34394_ nq=$abc$109383$new_n34396_
 .subckt nand2_x0 i0=$abc$109383$new_n33853_ i1=$abc$109383$new_n34095_ nq=$abc$109383$new_n34397_
-.subckt a2_x2 i0=$abc$109383$new_n34098_ i1=$abc$109383$new_n33848_ q=$abc$109383$new_n34398_
-.subckt ao22_x2 i0=$abc$109383$new_n33844_ i1=$abc$109383$new_n34398_ i2=$abc$109383$new_n34397_ q=$abc$109383$new_n34399_
-.subckt nxr2_x1 i0=$abc$109383$new_n34120_ i1=$abc$109383$new_n34399_ nq=$abc$109383$new_n34400_
+.subckt and2_x1 i0=$abc$109383$new_n34098_ i1=$abc$109383$new_n33848_ q=$abc$109383$new_n34398_
+.subckt and21nor_x1 i0=$abc$109383$new_n33844_ i1=$abc$109383$new_n34398_ i2=$abc$109383$new_n34397_ nq=$abc$109383$new_n34399_
+.subckt nexor2_x0 i0=$abc$109383$new_n34120_ i1=$abc$109383$new_n34399_ nq=$abc$109383$new_n34400_
 .subckt nand2_x0 i0=$abc$109383$new_n34136_ i1=$abc$109383$new_n34400_ nq=$abc$109383$new_n34401_
 .subckt buf_x4 i=$abc$109383$new_n32854_ q=$abc$109383$new_n34402_
 .subckt buf_x4 i=$abc$109383$new_n33079_ q=$abc$109383$new_n34403_
-.subckt a4_x2 i0=$abc$109383$new_n34403_ i1=$abc$109383$new_n34402_ i2=$abc$109383$new_n29272_ i3=$abc$109383$new_n29418_ q=$abc$109383$new_n34404_
+.subckt and4_x1 i0=$abc$109383$new_n34403_ i1=$abc$109383$new_n34402_ i2=$abc$109383$new_n29272_ i3=$abc$109383$new_n29418_ q=$abc$109383$new_n34404_
 .subckt nand2_x0 i0=$abc$109383$new_n34110_ i1=$abc$109383$new_n33850_ nq=$abc$109383$new_n34405_
-.subckt oa22_x2 i0=$abc$109383$new_n34097_ i1=$abc$109383$new_n34405_ i2=$abc$109383$new_n34404_ q=$abc$109383$new_n34406_
-.subckt a2_x2 i0=$abc$109383$new_n34117_ i1=$abc$109383$new_n34406_ q=$abc$109383$new_n34407_
-.subckt a2_x2 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29329_ q=$abc$109383$new_n34408_
-.subckt nxr2_x1 i0=$abc$109383$new_n34116_ i1=$abc$109383$new_n34408_ nq=$abc$109383$new_n34409_
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+.subckt and2_x1 i0=$abc$109383$new_n34117_ i1=$abc$109383$new_n34406_ q=$abc$109383$new_n34407_
+.subckt and2_x1 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29329_ q=$abc$109383$new_n34408_
+.subckt nexor2_x0 i0=$abc$109383$new_n34116_ i1=$abc$109383$new_n34408_ nq=$abc$109383$new_n34409_
 .subckt nand2_x0 i0=$abc$109383$new_n34409_ i1=$abc$109383$new_n34112_ nq=$abc$109383$new_n34410_
-.subckt oa22_x2 i0=$abc$109383$new_n34388_ i1=$abc$109383$new_n34410_ i2=$abc$109383$new_n34407_ q=$abc$109383$new_n34411_
+.subckt or21nand_x1 i0=$abc$109383$new_n34388_ i1=$abc$109383$new_n34410_ i2=$abc$109383$new_n34407_ nq=$abc$109383$new_n34411_
 .subckt nand2_x0 i0=$abc$109383$new_n34132_ i1=$abc$109383$new_n34127_ nq=$abc$109383$new_n34412_
-.subckt a2_x2 i0=$abc$109383$new_n34370_ i1=$abc$109383$new_n29553_ q=$abc$109383$new_n34413_
+.subckt and2_x1 i0=$abc$109383$new_n34370_ i1=$abc$109383$new_n29553_ q=$abc$109383$new_n34413_
 .subckt nand2_x0 i0=$abc$109383$new_n32397_ i1=$abc$109383$new_n29505_ nq=$abc$109383$new_n34414_
 .subckt buf_x4 i=$abc$109383$new_n32848_ q=$abc$109383$new_n34415_
-.subckt a2_x2 i0=$abc$109383$new_n34415_ i1=$abc$109383$new_n29528_ q=$abc$109383$new_n34416_
-.subckt nxr2_x1 i0=$abc$109383$new_n34416_ i1=$abc$109383$new_n34414_ nq=$abc$109383$new_n34417_
-.subckt nxr2_x1 i0=$abc$109383$new_n34417_ i1=$abc$109383$new_n34413_ nq=$abc$109383$new_n34418_
+.subckt and2_x1 i0=$abc$109383$new_n34415_ i1=$abc$109383$new_n29528_ q=$abc$109383$new_n34416_
+.subckt nexor2_x0 i0=$abc$109383$new_n34416_ i1=$abc$109383$new_n34414_ nq=$abc$109383$new_n34417_
+.subckt nexor2_x0 i0=$abc$109383$new_n34417_ i1=$abc$109383$new_n34413_ nq=$abc$109383$new_n34418_
 .subckt nand4_x0 i0=$abc$109383$new_n34403_ i1=$abc$109383$new_n34402_ i2=$abc$109383$new_n29294_ i3=$abc$109383$new_n29271_ nq=$abc$109383$new_n34419_
 .subckt nand2_x0 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29294_ nq=$abc$109383$new_n34420_
-.subckt a2_x2 i0=$abc$109383$new_n34420_ i1=$abc$109383$new_n34114_ q=$abc$109383$new_n34421_
-.subckt ao22_x2 i0=$abc$109383$new_n34113_ i1=$abc$109383$new_n34421_ i2=$abc$109383$new_n34419_ q=$abc$109383$new_n34422_
+.subckt and2_x1 i0=$abc$109383$new_n34420_ i1=$abc$109383$new_n34114_ q=$abc$109383$new_n34421_
+.subckt and21nor_x1 i0=$abc$109383$new_n34113_ i1=$abc$109383$new_n34421_ i2=$abc$109383$new_n34419_ nq=$abc$109383$new_n34422_
 .subckt nand2_x0 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29350_ nq=$abc$109383$new_n34423_
 .subckt nand2_x0 i0=$abc$109383$new_n33079_ i1=$abc$109383$new_n29294_ nq=$abc$109383$new_n34424_
-.subckt a2_x2 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29327_ q=$abc$109383$new_n34425_
-.subckt nxr2_x1 i0=$abc$109383$new_n34425_ i1=$abc$109383$new_n34424_ nq=$abc$109383$new_n34426_
-.subckt nxr2_x1 i0=$abc$109383$new_n34426_ i1=$abc$109383$new_n34423_ nq=$abc$109383$new_n34427_
-.subckt nxr2_x1 i0=$abc$109383$new_n34427_ i1=$abc$109383$new_n34422_ nq=$abc$109383$new_n34428_
-.subckt nxr2_x1 i0=$abc$109383$new_n34428_ i1=$abc$109383$new_n34418_ nq=$abc$109383$new_n34429_
-.subckt nxr2_x1 i0=$abc$109383$new_n34429_ i1=$abc$109383$new_n34412_ nq=$abc$109383$new_n34430_
-.subckt nxr2_x1 i0=$abc$109383$new_n34430_ i1=$abc$109383$new_n34411_ nq=$abc$109383$new_n34431_
+.subckt and2_x1 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29327_ q=$abc$109383$new_n34425_
+.subckt nexor2_x0 i0=$abc$109383$new_n34425_ i1=$abc$109383$new_n34424_ nq=$abc$109383$new_n34426_
+.subckt nexor2_x0 i0=$abc$109383$new_n34426_ i1=$abc$109383$new_n34423_ nq=$abc$109383$new_n34427_
+.subckt nexor2_x0 i0=$abc$109383$new_n34427_ i1=$abc$109383$new_n34422_ nq=$abc$109383$new_n34428_
+.subckt nexor2_x0 i0=$abc$109383$new_n34428_ i1=$abc$109383$new_n34418_ nq=$abc$109383$new_n34429_
+.subckt nexor2_x0 i0=$abc$109383$new_n34429_ i1=$abc$109383$new_n34412_ nq=$abc$109383$new_n34430_
+.subckt nexor2_x0 i0=$abc$109383$new_n34430_ i1=$abc$109383$new_n34411_ nq=$abc$109383$new_n34431_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[25] q=$abc$109383$new_n34432_
 .subckt buf_x4 i=$abc$109383$new_n34122_ q=$abc$109383$new_n34433_
 .subckt nand4_x0 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n34432_ i2=$abc$109383$new_n29474_ i3=$abc$109383$new_n29450_ nq=$abc$109383$new_n34434_
-.subckt a2_x2 i0=$abc$109383$new_n34124_ i1=$abc$109383$new_n33859_ q=$abc$109383$new_n34435_
-.subckt ao22_x2 i0=$abc$109383$new_n33858_ i1=$abc$109383$new_n34435_ i2=$abc$109383$new_n34434_ q=$abc$109383$new_n34436_
-.subckt nxr2_x1 i0=$abc$109383$new_n34132_ i1=$abc$109383$new_n34436_ nq=$abc$109383$new_n34437_
+.subckt and2_x1 i0=$abc$109383$new_n34124_ i1=$abc$109383$new_n33859_ q=$abc$109383$new_n34435_
+.subckt and21nor_x1 i0=$abc$109383$new_n33858_ i1=$abc$109383$new_n34435_ i2=$abc$109383$new_n34434_ nq=$abc$109383$new_n34436_
+.subckt nexor2_x0 i0=$abc$109383$new_n34132_ i1=$abc$109383$new_n34436_ nq=$abc$109383$new_n34437_
 .subckt nand2_x0 i0=$abc$109383$new_n34135_ i1=$abc$109383$new_n34437_ nq=$abc$109383$new_n34438_
-.subckt a4_x2 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n33587_ i2=$abc$109383$new_n29393_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n34439_
+.subckt and4_x1 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n33587_ i2=$abc$109383$new_n29393_ i3=$abc$109383$new_n29448_ q=$abc$109383$new_n34439_
 .subckt nand2_x0 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29393_ nq=$abc$109383$new_n34440_
 .subckt nand2_x0 i0=$abc$109383$new_n34440_ i1=$abc$109383$new_n34129_ nq=$abc$109383$new_n34441_
-.subckt a2_x2 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29418_ q=$abc$109383$new_n34442_
-.subckt oa22_x2 i0=$abc$109383$new_n34442_ i1=$abc$109383$new_n34441_ i2=$abc$109383$new_n34439_ q=$abc$109383$new_n34443_
+.subckt and2_x1 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29418_ q=$abc$109383$new_n34442_
+.subckt or21nand_x1 i0=$abc$109383$new_n34442_ i1=$abc$109383$new_n34441_ i2=$abc$109383$new_n34439_ nq=$abc$109383$new_n34443_
 .subckt nand2_x0 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29272_ nq=$abc$109383$new_n34444_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29393_ nq=$abc$109383$new_n34445_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29418_ q=$abc$109383$new_n34446_
-.subckt nxr2_x1 i0=$abc$109383$new_n34446_ i1=$abc$109383$new_n34445_ nq=$abc$109383$new_n34447_
-.subckt nxr2_x1 i0=$abc$109383$new_n34447_ i1=$abc$109383$new_n34444_ nq=$abc$109383$new_n34448_
-.subckt nxr2_x1 i0=$abc$109383$new_n34448_ i1=$abc$109383$new_n34443_ nq=$abc$109383$new_n34449_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29418_ q=$abc$109383$new_n34446_
+.subckt nexor2_x0 i0=$abc$109383$new_n34446_ i1=$abc$109383$new_n34445_ nq=$abc$109383$new_n34447_
+.subckt nexor2_x0 i0=$abc$109383$new_n34447_ i1=$abc$109383$new_n34444_ nq=$abc$109383$new_n34448_
+.subckt nexor2_x0 i0=$abc$109383$new_n34448_ i1=$abc$109383$new_n34443_ nq=$abc$109383$new_n34449_
 .subckt buf_x4 i=$abc$109383$new_n34134_ q=$abc$109383$new_n34450_
 .subckt nand2_x0 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29450_ nq=$abc$109383$new_n34451_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[28] q=$abc$109383$new_n34452_
-.subckt a2_x2 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n34453_
-.subckt nxr2_x1 i0=$abc$109383$new_n34453_ i1=$abc$109383$new_n34451_ nq=$abc$109383$new_n34454_
-.subckt nxr2_x1 i0=$abc$109383$new_n34454_ i1=$abc$109383$new_n34449_ nq=$abc$109383$new_n34455_
-.subckt nxr2_x1 i0=$abc$109383$new_n34455_ i1=$abc$109383$new_n34438_ nq=$abc$109383$new_n34456_
-.subckt nxr2_x1 i0=$abc$109383$new_n34456_ i1=$abc$109383$new_n34431_ nq=$abc$109383$new_n34457_
-.subckt nxr2_x1 i0=$abc$109383$new_n34457_ i1=$abc$109383$new_n34401_ nq=$abc$109383$new_n34458_
-.subckt nxr2_x1 i0=$abc$109383$new_n34458_ i1=$abc$109383$new_n34396_ nq=$abc$109383$new_n34459_
-.subckt nxr2_x1 i0=$abc$109383$new_n34459_ i1=$abc$109383$new_n34324_ nq=$abc$109383$new_n34460_
-.subckt nxr2_x1 i0=$abc$109383$new_n34460_ i1=$abc$109383$new_n34320_ nq=$abc$109383$new_n34461_
-.subckt nxr2_x1 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34203_ nq=$abc$109383$new_n34462_
-.subckt nxr2_x1 i0=$abc$109383$new_n34462_ i1=$abc$109383$new_n34198_ nq=$abc$109383$new_n34463_
-.subckt nxr2_x1 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34179_ nq=$abc$109383$new_n34464_
-.subckt nxr2_x1 i0=$abc$109383$new_n34464_ i1=$abc$109383$new_n34167_ nq=$abc$109383$new_n34465_
-.subckt nxr2_x1 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34164_ nq=$abc$109383$new_n34466_
+.subckt and2_x1 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n34453_
+.subckt nexor2_x0 i0=$abc$109383$new_n34453_ i1=$abc$109383$new_n34451_ nq=$abc$109383$new_n34454_
+.subckt nexor2_x0 i0=$abc$109383$new_n34454_ i1=$abc$109383$new_n34449_ nq=$abc$109383$new_n34455_
+.subckt nexor2_x0 i0=$abc$109383$new_n34455_ i1=$abc$109383$new_n34438_ nq=$abc$109383$new_n34456_
+.subckt nexor2_x0 i0=$abc$109383$new_n34456_ i1=$abc$109383$new_n34431_ nq=$abc$109383$new_n34457_
+.subckt nexor2_x0 i0=$abc$109383$new_n34457_ i1=$abc$109383$new_n34401_ nq=$abc$109383$new_n34458_
+.subckt nexor2_x0 i0=$abc$109383$new_n34458_ i1=$abc$109383$new_n34396_ nq=$abc$109383$new_n34459_
+.subckt nexor2_x0 i0=$abc$109383$new_n34459_ i1=$abc$109383$new_n34324_ nq=$abc$109383$new_n34460_
+.subckt nexor2_x0 i0=$abc$109383$new_n34460_ i1=$abc$109383$new_n34320_ nq=$abc$109383$new_n34461_
+.subckt nexor2_x0 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34203_ nq=$abc$109383$new_n34462_
+.subckt nexor2_x0 i0=$abc$109383$new_n34462_ i1=$abc$109383$new_n34198_ nq=$abc$109383$new_n34463_
+.subckt nexor2_x0 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34179_ nq=$abc$109383$new_n34464_
+.subckt nexor2_x0 i0=$abc$109383$new_n34464_ i1=$abc$109383$new_n34167_ nq=$abc$109383$new_n34465_
+.subckt nexor2_x0 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34164_ nq=$abc$109383$new_n34466_
 .subckt nand3_x0 i0=$abc$109383$new_n33892_ i1=$abc$109383$new_n33887_ i2=$abc$109383$new_n33883_ nq=$abc$109383$new_n34467_
-.subckt nxr2_x1 i0=$abc$109383$new_n33870_ i1=$abc$109383$new_n33883_ nq=$abc$109383$new_n34468_
+.subckt nexor2_x0 i0=$abc$109383$new_n33870_ i1=$abc$109383$new_n33883_ nq=$abc$109383$new_n34468_
 .subckt nand2_x0 i0=$abc$109383$new_n33646_ i1=$abc$109383$new_n33636_ nq=$abc$109383$new_n34469_
-.subckt ao22_x2 i0=$abc$109383$new_n34469_ i1=$abc$109383$new_n34468_ i2=$abc$109383$new_n34467_ q=$abc$109383$new_n34470_
-.subckt nxr2_x1 i0=$abc$109383$new_n34145_ i1=$abc$109383$new_n34470_ nq=$abc$109383$new_n34471_
-.subckt a2_x2 i0=$abc$109383$new_n34471_ i1=$abc$109383$new_n33873_ q=$abc$109383$new_n34472_
+.subckt and21nor_x1 i0=$abc$109383$new_n34469_ i1=$abc$109383$new_n34468_ i2=$abc$109383$new_n34467_ nq=$abc$109383$new_n34470_
+.subckt nexor2_x0 i0=$abc$109383$new_n34145_ i1=$abc$109383$new_n34470_ nq=$abc$109383$new_n34471_
+.subckt and2_x1 i0=$abc$109383$new_n34471_ i1=$abc$109383$new_n33873_ q=$abc$109383$new_n34472_
 .subckt nand4_x0 i0=$abc$109383$new_n34472_ i1=$abc$109383$new_n33622_ i2=$abc$109383$new_n33348_ i3=$abc$109383$new_n33104_ nq=$abc$109383$new_n34473_
 .subckt nand2_x0 i0=$abc$109383$new_n34144_ i1=$abc$109383$new_n34163_ nq=$abc$109383$new_n34474_
-.subckt nxr2_x1 i0=$abc$109383$new_n34143_ i1=$abc$109383$new_n34153_ nq=$abc$109383$new_n34475_
+.subckt nexor2_x0 i0=$abc$109383$new_n34143_ i1=$abc$109383$new_n34153_ nq=$abc$109383$new_n34475_
 .subckt nand2_x0 i0=$abc$109383$new_n34475_ i1=$abc$109383$new_n33897_ nq=$abc$109383$new_n34476_
-.subckt oa22_x2 i0=$abc$109383$new_n34476_ i1=$abc$109383$new_n34474_ i2=$abc$109383$new_n33894_ q=$abc$109383$new_n34477_
+.subckt or21nand_x1 i0=$abc$109383$new_n34476_ i1=$abc$109383$new_n34474_ i2=$abc$109383$new_n33894_ nq=$abc$109383$new_n34477_
 .subckt nand2_x0 i0=$abc$109383$new_n34477_ i1=$abc$109383$new_n33880_ nq=$abc$109383$new_n34478_
 .subckt nand3_x0 i0=$abc$109383$new_n34476_ i1=$abc$109383$new_n34474_ i2=$abc$109383$new_n33894_ nq=$abc$109383$new_n34479_
 .subckt nand2_x0 i0=$abc$109383$new_n34471_ i1=$abc$109383$new_n33873_ nq=$abc$109383$new_n34480_
 .subckt nand3_x0 i0=$abc$109383$new_n33630_ i1=$abc$109383$new_n33625_ i2=$abc$109383$new_n33362_ nq=$abc$109383$new_n34481_
-.subckt a2_x2 i0=$abc$109383$new_n33606_ i1=$abc$109383$new_n33624_ q=$abc$109383$new_n34482_
-.subckt a2_x2 i0=$abc$109383$new_n33629_ i1=$abc$109383$new_n33365_ q=$abc$109383$new_n34483_
-.subckt ao22_x2 i0=$abc$109383$new_n34483_ i1=$abc$109383$new_n34482_ i2=$abc$109383$new_n33621_ q=$abc$109383$new_n34484_
-.subckt o2_x2 i0=$abc$109383$new_n33341_ i1=$abc$109383$new_n33119_ q=$abc$109383$new_n34485_
-.subckt ao22_x2 i0=$abc$109383$new_n34485_ i1=$abc$109383$new_n34484_ i2=$abc$109383$new_n34481_ q=$abc$109383$new_n34486_
-.subckt ao22_x2 i0=$abc$109383$new_n34486_ i1=$abc$109383$new_n34480_ i2=$abc$109383$new_n34479_ q=$abc$109383$new_n34487_
-.subckt a2_x2 i0=$abc$109383$new_n34487_ i1=$abc$109383$new_n34478_ q=$abc$109383$new_n34488_
+.subckt and2_x1 i0=$abc$109383$new_n33606_ i1=$abc$109383$new_n33624_ q=$abc$109383$new_n34482_
+.subckt and2_x1 i0=$abc$109383$new_n33629_ i1=$abc$109383$new_n33365_ q=$abc$109383$new_n34483_
+.subckt and21nor_x1 i0=$abc$109383$new_n34483_ i1=$abc$109383$new_n34482_ i2=$abc$109383$new_n33621_ nq=$abc$109383$new_n34484_
+.subckt or2_x1 i0=$abc$109383$new_n33341_ i1=$abc$109383$new_n33119_ q=$abc$109383$new_n34485_
+.subckt and21nor_x1 i0=$abc$109383$new_n34485_ i1=$abc$109383$new_n34484_ i2=$abc$109383$new_n34481_ nq=$abc$109383$new_n34486_
+.subckt and21nor_x1 i0=$abc$109383$new_n34486_ i1=$abc$109383$new_n34480_ i2=$abc$109383$new_n34479_ nq=$abc$109383$new_n34487_
+.subckt and2_x1 i0=$abc$109383$new_n34487_ i1=$abc$109383$new_n34478_ q=$abc$109383$new_n34488_
 .subckt nand3_x0 i0=$abc$109383$new_n34488_ i1=$abc$109383$new_n34473_ i2=$abc$109383$new_n34466_ nq=$abc$109383$new_n34489_
-.subckt oa22_x2 i0=$abc$109383$new_n34488_ i1=$abc$109383$new_n34473_ i2=$abc$109383$new_n34466_ q=$abc$109383$new_n34490_
-.subckt oa22_x2 i0=$abc$109383$new_n34490_ i1=$abc$109383$new_n34489_ i2=$abc$109383$new_n29223_ q=$abc$109383$new_n34491_
+.subckt or21nand_x1 i0=$abc$109383$new_n34488_ i1=$abc$109383$new_n34473_ i2=$abc$109383$new_n34466_ nq=$abc$109383$new_n34490_
+.subckt or21nand_x1 i0=$abc$109383$new_n34490_ i1=$abc$109383$new_n34489_ i2=$abc$109383$new_n29223_ nq=$abc$109383$new_n34491_
 .subckt buf_x4 i=$abc$109383$new_n27993_ q=$abc$109383$new_n34492_
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[28] nq=$abc$109383$new_n34493_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n34494_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n34493_ q=$abc$109383$new_n34495_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n30083_ i2=$abc$109383$new_n34493_ nq=$abc$109383$new_n34495_
 .subckt nor2_x0 i0=$abc$109383$new_n34495_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n34496_
-.subckt a2_x2 i0=$abc$109383$new_n34496_ i1=$abc$109383$new_n34491_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102870
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[29] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n34498_
+.subckt and2_x1 i0=$abc$109383$new_n34496_ i1=$abc$109383$new_n34491_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102870
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[29] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n34498_
 .subckt nand2_x0 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34164_ nq=$abc$109383$new_n34499_
-.subckt a2_x2 i0=$abc$109383$new_n33867_ i1=$abc$109383$new_n33901_ q=$abc$109383$new_n34500_
-.subckt ao22_x2 i0=$abc$109383$new_n34158_ i1=$abc$109383$new_n34500_ i2=$abc$109383$new_n34141_ q=$abc$109383$new_n34501_
-.subckt oa22_x2 i0=$abc$109383$new_n34156_ i1=$abc$109383$new_n34142_ i2=$abc$109383$new_n34501_ q=$abc$109383$new_n34502_
+.subckt and2_x1 i0=$abc$109383$new_n33867_ i1=$abc$109383$new_n33901_ q=$abc$109383$new_n34500_
+.subckt and21nor_x1 i0=$abc$109383$new_n34158_ i1=$abc$109383$new_n34500_ i2=$abc$109383$new_n34141_ nq=$abc$109383$new_n34501_
+.subckt or21nand_x1 i0=$abc$109383$new_n34156_ i1=$abc$109383$new_n34142_ i2=$abc$109383$new_n34501_ nq=$abc$109383$new_n34502_
 .subckt nand2_x0 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34502_ nq=$abc$109383$new_n34503_
-.subckt nxr2_x1 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34502_ nq=$abc$109383$new_n34504_
-.subckt ao22_x2 i0=$abc$109383$new_n34167_ i1=$abc$109383$new_n34504_ i2=$abc$109383$new_n34503_ q=$abc$109383$new_n34505_
-.subckt a2_x2 i0=$abc$109383$new_n33965_ i1=$abc$109383$new_n34184_ q=$abc$109383$new_n34506_
-.subckt oa22_x2 i0=$abc$109383$new_n33941_ i1=$abc$109383$new_n33966_ i2=$abc$109383$new_n34506_ q=$abc$109383$new_n34507_
-.subckt a2_x2 i0=$abc$109383$new_n34192_ i1=$abc$109383$new_n34018_ q=$abc$109383$new_n34508_
-.subckt oa22_x2 i0=$abc$109383$new_n33937_ i1=$abc$109383$new_n34030_ i2=$abc$109383$new_n34508_ q=$abc$109383$new_n34509_
+.subckt nexor2_x0 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34502_ nq=$abc$109383$new_n34504_
+.subckt and21nor_x1 i0=$abc$109383$new_n34167_ i1=$abc$109383$new_n34504_ i2=$abc$109383$new_n34503_ nq=$abc$109383$new_n34505_
+.subckt and2_x1 i0=$abc$109383$new_n33965_ i1=$abc$109383$new_n34184_ q=$abc$109383$new_n34506_
+.subckt or21nand_x1 i0=$abc$109383$new_n33941_ i1=$abc$109383$new_n33966_ i2=$abc$109383$new_n34506_ nq=$abc$109383$new_n34507_
+.subckt and2_x1 i0=$abc$109383$new_n34192_ i1=$abc$109383$new_n34018_ q=$abc$109383$new_n34508_
+.subckt or21nand_x1 i0=$abc$109383$new_n33937_ i1=$abc$109383$new_n34030_ i2=$abc$109383$new_n34508_ nq=$abc$109383$new_n34509_
 .subckt nand2_x0 i0=$abc$109383$new_n34509_ i1=$abc$109383$new_n34507_ nq=$abc$109383$new_n34510_
 .subckt nand2_x0 i0=$abc$109383$new_n34139_ i1=$abc$109383$new_n34201_ nq=$abc$109383$new_n34511_
-.subckt nxr2_x1 i0=$abc$109383$new_n34139_ i1=$abc$109383$new_n34201_ nq=$abc$109383$new_n34512_
-.subckt ao22_x2 i0=$abc$109383$new_n34031_ i1=$abc$109383$new_n34512_ i2=$abc$109383$new_n34511_ q=$abc$109383$new_n34513_
-.subckt o2_x2 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34513_ q=$abc$109383$new_n34514_
-.subckt nxr2_x1 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34513_ nq=$abc$109383$new_n34515_
-.subckt ao22_x2 i0=$abc$109383$new_n34198_ i1=$abc$109383$new_n34515_ i2=$abc$109383$new_n34514_ q=$abc$109383$new_n34516_
+.subckt nexor2_x0 i0=$abc$109383$new_n34139_ i1=$abc$109383$new_n34201_ nq=$abc$109383$new_n34512_
+.subckt and21nor_x1 i0=$abc$109383$new_n34031_ i1=$abc$109383$new_n34512_ i2=$abc$109383$new_n34511_ nq=$abc$109383$new_n34513_
+.subckt or2_x1 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34513_ q=$abc$109383$new_n34514_
+.subckt nexor2_x0 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34513_ nq=$abc$109383$new_n34515_
+.subckt and21nor_x1 i0=$abc$109383$new_n34198_ i1=$abc$109383$new_n34515_ i2=$abc$109383$new_n34514_ nq=$abc$109383$new_n34516_
 .subckt nand2_x0 i0=$abc$109383$new_n34243_ i1=$abc$109383$new_n34227_ nq=$abc$109383$new_n34517_
-.subckt ao22_x2 i0=$abc$109383$new_n34217_ i1=$abc$109383$new_n34244_ i2=$abc$109383$new_n34517_ q=$abc$109383$new_n34518_
-.subckt a2_x2 i0=$abc$109383$new_n34085_ i1=$abc$109383$new_n34304_ q=$abc$109383$new_n34519_
-.subckt oa22_x2 i0=$abc$109383$new_n34041_ i1=$abc$109383$new_n34086_ i2=$abc$109383$new_n34519_ q=$abc$109383$new_n34520_
+.subckt and21nor_x1 i0=$abc$109383$new_n34217_ i1=$abc$109383$new_n34244_ i2=$abc$109383$new_n34517_ nq=$abc$109383$new_n34518_
+.subckt and2_x1 i0=$abc$109383$new_n34085_ i1=$abc$109383$new_n34304_ q=$abc$109383$new_n34519_
+.subckt or21nand_x1 i0=$abc$109383$new_n34041_ i1=$abc$109383$new_n34086_ i2=$abc$109383$new_n34519_ nq=$abc$109383$new_n34520_
 .subckt nand2_x0 i0=$abc$109383$new_n34520_ i1=$abc$109383$new_n34303_ nq=$abc$109383$new_n34521_
 .subckt buf_x4 i=$abc$109383$new_n29333_ q=$abc$109383$new_n34522_
 .subckt buf_x4 i=$abc$109383$new_n29300_ q=$abc$109383$new_n34523_
-.subckt a4_x2 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29379_ i2=$abc$109383$new_n34523_ i3=$abc$109383$new_n34522_ q=$abc$109383$new_n34524_
+.subckt and4_x1 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29379_ i2=$abc$109383$new_n34523_ i3=$abc$109383$new_n34522_ q=$abc$109383$new_n34524_
 .subckt nand2_x0 i0=$abc$109383$new_n34214_ i1=$abc$109383$new_n33951_ nq=$abc$109383$new_n34525_
-.subckt oa22_x2 i0=$abc$109383$new_n33950_ i1=$abc$109383$new_n34525_ i2=$abc$109383$new_n34524_ q=$abc$109383$new_n34526_
-.subckt nxr2_x1 i0=$abc$109383$new_n34244_ i1=$abc$109383$new_n34526_ nq=$abc$109383$new_n34527_
-.subckt nxr2_x1 i0=$abc$109383$new_n34302_ i1=$abc$109383$new_n34527_ nq=$abc$109383$new_n34528_
-.subckt nxr2_x1 i0=$abc$109383$new_n34318_ i1=$abc$109383$new_n34528_ nq=$abc$109383$new_n34529_
-.subckt ao22_x2 i0=$abc$109383$new_n34212_ i1=$abc$109383$new_n34529_ i2=$abc$109383$new_n34521_ q=$abc$109383$new_n34530_
-.subckt nxr2_x1 i0=$abc$109383$new_n34530_ i1=$abc$109383$new_n34518_ nq=$abc$109383$new_n34531_
-.subckt a2_x2 i0=$abc$109383$new_n34137_ i1=$abc$109383$new_n34321_ q=$abc$109383$new_n34532_
-.subckt nxr2_x1 i0=$abc$109383$new_n34086_ i1=$abc$109383$new_n34317_ nq=$abc$109383$new_n34533_
-.subckt oa22_x2 i0=$abc$109383$new_n34533_ i1=$abc$109383$new_n34138_ i2=$abc$109383$new_n34532_ q=$abc$109383$new_n34534_
+.subckt or21nand_x1 i0=$abc$109383$new_n33950_ i1=$abc$109383$new_n34525_ i2=$abc$109383$new_n34524_ nq=$abc$109383$new_n34526_
+.subckt nexor2_x0 i0=$abc$109383$new_n34244_ i1=$abc$109383$new_n34526_ nq=$abc$109383$new_n34527_
+.subckt nexor2_x0 i0=$abc$109383$new_n34302_ i1=$abc$109383$new_n34527_ nq=$abc$109383$new_n34528_
+.subckt nexor2_x0 i0=$abc$109383$new_n34318_ i1=$abc$109383$new_n34528_ nq=$abc$109383$new_n34529_
+.subckt and21nor_x1 i0=$abc$109383$new_n34212_ i1=$abc$109383$new_n34529_ i2=$abc$109383$new_n34521_ nq=$abc$109383$new_n34530_
+.subckt nexor2_x0 i0=$abc$109383$new_n34530_ i1=$abc$109383$new_n34518_ nq=$abc$109383$new_n34531_
+.subckt and2_x1 i0=$abc$109383$new_n34137_ i1=$abc$109383$new_n34321_ q=$abc$109383$new_n34532_
+.subckt nexor2_x0 i0=$abc$109383$new_n34086_ i1=$abc$109383$new_n34317_ nq=$abc$109383$new_n34533_
+.subckt or21nand_x1 i0=$abc$109383$new_n34533_ i1=$abc$109383$new_n34138_ i2=$abc$109383$new_n34532_ nq=$abc$109383$new_n34534_
 .subckt nand2_x0 i0=$abc$109383$new_n34459_ i1=$abc$109383$new_n34534_ nq=$abc$109383$new_n34535_
 .subckt nand2_x0 i0=$abc$109383$new_n34460_ i1=$abc$109383$new_n34320_ nq=$abc$109383$new_n34536_
-.subckt a2_x2 i0=$abc$109383$new_n34536_ i1=$abc$109383$new_n34535_ q=$abc$109383$new_n34537_
-.subckt a3_x2 i0=$abc$109383$new_n34299_ i1=$abc$109383$new_n34298_ i2=$abc$109383$new_n34250_ q=$abc$109383$new_n34538_
-.subckt oa22_x2 i0=$abc$109383$new_n34527_ i1=$abc$109383$new_n34302_ i2=$abc$109383$new_n34538_ q=$abc$109383$new_n34539_
-.subckt a4_x2 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29378_ i2=$abc$109383$new_n29276_ i3=$abc$109383$new_n29300_ q=$abc$109383$new_n34540_
+.subckt and2_x1 i0=$abc$109383$new_n34536_ i1=$abc$109383$new_n34535_ q=$abc$109383$new_n34537_
+.subckt and3_x1 i0=$abc$109383$new_n34299_ i1=$abc$109383$new_n34298_ i2=$abc$109383$new_n34250_ q=$abc$109383$new_n34538_
+.subckt or21nand_x1 i0=$abc$109383$new_n34527_ i1=$abc$109383$new_n34302_ i2=$abc$109383$new_n34538_ nq=$abc$109383$new_n34539_
+.subckt and4_x1 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29378_ i2=$abc$109383$new_n29276_ i3=$abc$109383$new_n29300_ q=$abc$109383$new_n34540_
 .subckt nand2_x0 i0=$abc$109383$new_n29378_ i1=$abc$109383$new_n29276_ nq=$abc$109383$new_n34541_
 .subckt nand2_x0 i0=$abc$109383$new_n34541_ i1=$abc$109383$new_n34229_ nq=$abc$109383$new_n34542_
-.subckt oa22_x2 i0=$abc$109383$new_n34228_ i1=$abc$109383$new_n34542_ i2=$abc$109383$new_n34540_ q=$abc$109383$new_n34543_
-.subckt a4_x2 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29235_ i2=$abc$109383$new_n29512_ i3=$abc$109383$new_n29535_ q=$abc$109383$new_n34544_
+.subckt or21nand_x1 i0=$abc$109383$new_n34228_ i1=$abc$109383$new_n34542_ i2=$abc$109383$new_n34540_ nq=$abc$109383$new_n34543_
+.subckt and4_x1 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29235_ i2=$abc$109383$new_n29512_ i3=$abc$109383$new_n29535_ q=$abc$109383$new_n34544_
 .subckt nand2_x0 i0=$abc$109383$new_n34234_ i1=$abc$109383$new_n33960_ nq=$abc$109383$new_n34545_
-.subckt oa22_x2 i0=$abc$109383$new_n34223_ i1=$abc$109383$new_n34545_ i2=$abc$109383$new_n34544_ q=$abc$109383$new_n34546_
+.subckt or21nand_x1 i0=$abc$109383$new_n34223_ i1=$abc$109383$new_n34545_ i2=$abc$109383$new_n34544_ nq=$abc$109383$new_n34546_
 .subckt nand2_x0 i0=$abc$109383$new_n34241_ i1=$abc$109383$new_n34546_ nq=$abc$109383$new_n34547_
-.subckt a2_x2 i0=$abc$109383$new_n29245_ i1=soc.cpu.minerva.payload__src1$44[25] q=$abc$109383$new_n34548_
-.subckt nxr2_x1 i0=$abc$109383$new_n34240_ i1=$abc$109383$new_n34548_ nq=$abc$109383$new_n34549_
-.subckt a2_x2 i0=$abc$109383$new_n34549_ i1=$abc$109383$new_n34236_ q=$abc$109383$new_n34550_
-.subckt ao22_x2 i0=$abc$109383$new_n34232_ i1=$abc$109383$new_n34550_ i2=$abc$109383$new_n34547_ q=$abc$109383$new_n34551_
-.subckt a2_x2 i0=$abc$109383$new_n29315_ i1=soc.cpu.minerva.payload__src1$44[29] q=$abc$109383$new_n34552_
+.subckt and2_x1 i0=$abc$109383$new_n29245_ i1=soc.cpu.minerva.payload__src1$44[25] q=$abc$109383$new_n34548_
+.subckt nexor2_x0 i0=$abc$109383$new_n34240_ i1=$abc$109383$new_n34548_ nq=$abc$109383$new_n34549_
+.subckt and2_x1 i0=$abc$109383$new_n34549_ i1=$abc$109383$new_n34236_ q=$abc$109383$new_n34550_
+.subckt and21nor_x1 i0=$abc$109383$new_n34232_ i1=$abc$109383$new_n34550_ i2=$abc$109383$new_n34547_ nq=$abc$109383$new_n34551_
+.subckt and2_x1 i0=$abc$109383$new_n29315_ i1=soc.cpu.minerva.payload__src1$44[29] q=$abc$109383$new_n34552_
 .subckt nand2_x0 i0=$abc$109383$new_n29258_ i1=soc.cpu.minerva.payload__src1$44[27] nq=$abc$109383$new_n34553_
-.subckt a2_x2 i0=$abc$109383$new_n29376_ i1=soc.cpu.minerva.payload__src1$44[28] q=$abc$109383$new_n34554_
-.subckt nxr2_x1 i0=$abc$109383$new_n34554_ i1=$abc$109383$new_n34553_ nq=$abc$109383$new_n34555_
-.subckt nxr2_x1 i0=$abc$109383$new_n34555_ i1=$abc$109383$new_n34552_ nq=$abc$109383$new_n34556_
+.subckt and2_x1 i0=$abc$109383$new_n29376_ i1=soc.cpu.minerva.payload__src1$44[28] q=$abc$109383$new_n34554_
+.subckt nexor2_x0 i0=$abc$109383$new_n34554_ i1=$abc$109383$new_n34553_ nq=$abc$109383$new_n34555_
+.subckt nexor2_x0 i0=$abc$109383$new_n34555_ i1=$abc$109383$new_n34552_ nq=$abc$109383$new_n34556_
 .subckt nand4_x0 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29234_ i2=$abc$109383$new_n29356_ i3=$abc$109383$new_n29511_ nq=$abc$109383$new_n34557_
 .subckt nand2_x0 i0=$abc$109383$new_n29234_ i1=$abc$109383$new_n29355_ nq=$abc$109383$new_n34558_
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 .subckt nand2_x0 i0=$abc$109383$new_n29245_ i1=$abc$109383$new_n29299_ nq=$abc$109383$new_n34561_
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+.subckt or21nand_x1 i0=$abc$109383$new_n34408_ i1=$abc$109383$new_n34718_ i2=$abc$109383$new_n34717_ nq=$abc$109383$new_n34719_
+.subckt and2_x1 i0=$abc$109383$new_n34427_ i1=$abc$109383$new_n34719_ q=$abc$109383$new_n34720_
+.subckt and2_x1 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29351_ q=$abc$109383$new_n34721_
+.subckt nexor2_x0 i0=$abc$109383$new_n34426_ i1=$abc$109383$new_n34721_ nq=$abc$109383$new_n34722_
 .subckt nand2_x0 i0=$abc$109383$new_n34722_ i1=$abc$109383$new_n34422_ nq=$abc$109383$new_n34723_
-.subckt oa22_x2 i0=$abc$109383$new_n34699_ i1=$abc$109383$new_n34723_ i2=$abc$109383$new_n34720_ q=$abc$109383$new_n34724_
+.subckt or21nand_x1 i0=$abc$109383$new_n34699_ i1=$abc$109383$new_n34723_ i2=$abc$109383$new_n34720_ nq=$abc$109383$new_n34724_
 .subckt nand2_x0 i0=$abc$109383$new_n34448_ i1=$abc$109383$new_n34443_ nq=$abc$109383$new_n34725_
-.subckt a2_x2 i0=$abc$109383$new_n34370_ i1=$abc$109383$new_n29577_ q=$abc$109383$new_n34726_
+.subckt and2_x1 i0=$abc$109383$new_n34370_ i1=$abc$109383$new_n29577_ q=$abc$109383$new_n34726_
 .subckt nand2_x0 i0=$abc$109383$new_n34346_ i1=$abc$109383$new_n29528_ nq=$abc$109383$new_n34727_
-.subckt a2_x2 i0=$abc$109383$new_n34415_ i1=$abc$109383$new_n29553_ q=$abc$109383$new_n34728_
-.subckt nxr2_x1 i0=$abc$109383$new_n34728_ i1=$abc$109383$new_n34727_ nq=$abc$109383$new_n34729_
-.subckt nxr2_x1 i0=$abc$109383$new_n34729_ i1=$abc$109383$new_n34726_ nq=$abc$109383$new_n34730_
+.subckt and2_x1 i0=$abc$109383$new_n34415_ i1=$abc$109383$new_n29553_ q=$abc$109383$new_n34728_
+.subckt nexor2_x0 i0=$abc$109383$new_n34728_ i1=$abc$109383$new_n34727_ nq=$abc$109383$new_n34729_
+.subckt nexor2_x0 i0=$abc$109383$new_n34729_ i1=$abc$109383$new_n34726_ nq=$abc$109383$new_n34730_
 .subckt nand4_x0 i0=$abc$109383$new_n34403_ i1=$abc$109383$new_n34402_ i2=$abc$109383$new_n29328_ i3=$abc$109383$new_n29295_ nq=$abc$109383$new_n34731_
 .subckt nand2_x0 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29328_ nq=$abc$109383$new_n34732_
-.subckt a2_x2 i0=$abc$109383$new_n34732_ i1=$abc$109383$new_n34424_ q=$abc$109383$new_n34733_
-.subckt ao22_x2 i0=$abc$109383$new_n34423_ i1=$abc$109383$new_n34733_ i2=$abc$109383$new_n34731_ q=$abc$109383$new_n34734_
+.subckt and2_x1 i0=$abc$109383$new_n34732_ i1=$abc$109383$new_n34424_ q=$abc$109383$new_n34733_
+.subckt and21nor_x1 i0=$abc$109383$new_n34423_ i1=$abc$109383$new_n34733_ i2=$abc$109383$new_n34731_ nq=$abc$109383$new_n34734_
 .subckt nand2_x0 i0=$abc$109383$new_n32626_ i1=$abc$109383$new_n29506_ nq=$abc$109383$new_n34735_
 .subckt nand2_x0 i0=$abc$109383$new_n34403_ i1=$abc$109383$new_n29327_ nq=$abc$109383$new_n34736_
-.subckt a2_x2 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29349_ q=$abc$109383$new_n34737_
-.subckt nxr2_x1 i0=$abc$109383$new_n34737_ i1=$abc$109383$new_n34736_ nq=$abc$109383$new_n34738_
-.subckt nxr2_x1 i0=$abc$109383$new_n34738_ i1=$abc$109383$new_n34735_ nq=$abc$109383$new_n34739_
-.subckt nxr2_x1 i0=$abc$109383$new_n34739_ i1=$abc$109383$new_n34734_ nq=$abc$109383$new_n34740_
-.subckt nxr2_x1 i0=$abc$109383$new_n34740_ i1=$abc$109383$new_n34730_ nq=$abc$109383$new_n34741_
-.subckt nxr2_x1 i0=$abc$109383$new_n34741_ i1=$abc$109383$new_n34725_ nq=$abc$109383$new_n34742_
-.subckt nxr2_x1 i0=$abc$109383$new_n34742_ i1=$abc$109383$new_n34724_ nq=$abc$109383$new_n34743_
+.subckt and2_x1 i0=$abc$109383$new_n32854_ i1=$abc$109383$new_n29349_ q=$abc$109383$new_n34737_
+.subckt nexor2_x0 i0=$abc$109383$new_n34737_ i1=$abc$109383$new_n34736_ nq=$abc$109383$new_n34738_
+.subckt nexor2_x0 i0=$abc$109383$new_n34738_ i1=$abc$109383$new_n34735_ nq=$abc$109383$new_n34739_
+.subckt nexor2_x0 i0=$abc$109383$new_n34739_ i1=$abc$109383$new_n34734_ nq=$abc$109383$new_n34740_
+.subckt nexor2_x0 i0=$abc$109383$new_n34740_ i1=$abc$109383$new_n34730_ nq=$abc$109383$new_n34741_
+.subckt nexor2_x0 i0=$abc$109383$new_n34741_ i1=$abc$109383$new_n34725_ nq=$abc$109383$new_n34742_
+.subckt nexor2_x0 i0=$abc$109383$new_n34742_ i1=$abc$109383$new_n34724_ nq=$abc$109383$new_n34743_
 .subckt nand2_x0 i0=$abc$109383$new_n34454_ i1=$abc$109383$new_n34713_ nq=$abc$109383$new_n34744_
-.subckt a4_x2 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n33587_ i2=$abc$109383$new_n29418_ i3=$abc$109383$new_n29393_ q=$abc$109383$new_n34745_
+.subckt and4_x1 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n33587_ i2=$abc$109383$new_n29418_ i3=$abc$109383$new_n29393_ q=$abc$109383$new_n34745_
 .subckt nand2_x0 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29418_ nq=$abc$109383$new_n34746_
 .subckt nand2_x0 i0=$abc$109383$new_n34746_ i1=$abc$109383$new_n34445_ nq=$abc$109383$new_n34747_
-.subckt a2_x2 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29272_ q=$abc$109383$new_n34748_
-.subckt oa22_x2 i0=$abc$109383$new_n34748_ i1=$abc$109383$new_n34747_ i2=$abc$109383$new_n34745_ q=$abc$109383$new_n34749_
+.subckt and2_x1 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29272_ q=$abc$109383$new_n34748_
+.subckt or21nand_x1 i0=$abc$109383$new_n34748_ i1=$abc$109383$new_n34747_ i2=$abc$109383$new_n34745_ nq=$abc$109383$new_n34749_
 .subckt nand4_x0 i0=soc.cpu.minerva.payload__src2$45[28] i1=soc.cpu.minerva.payload__src2$45[27] i2=$abc$109383$new_n33586_ i3=$abc$109383$new_n29449_ nq=$abc$109383$new_n34750_
 .subckt nand2_x0 i0=$abc$109383$new_n33331_ i1=$abc$109383$new_n29295_ nq=$abc$109383$new_n34751_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29417_ nq=$abc$109383$new_n34752_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29271_ q=$abc$109383$new_n34753_
-.subckt nxr2_x1 i0=$abc$109383$new_n34753_ i1=$abc$109383$new_n34752_ nq=$abc$109383$new_n34754_
-.subckt nxr2_x1 i0=$abc$109383$new_n34754_ i1=$abc$109383$new_n34751_ nq=$abc$109383$new_n34755_
-.subckt nxr2_x1 i0=$abc$109383$new_n34755_ i1=$abc$109383$new_n34750_ nq=$abc$109383$new_n34756_
-.subckt nxr2_x1 i0=$abc$109383$new_n34756_ i1=$abc$109383$new_n34749_ nq=$abc$109383$new_n34757_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29271_ q=$abc$109383$new_n34753_
+.subckt nexor2_x0 i0=$abc$109383$new_n34753_ i1=$abc$109383$new_n34752_ nq=$abc$109383$new_n34754_
+.subckt nexor2_x0 i0=$abc$109383$new_n34754_ i1=$abc$109383$new_n34751_ nq=$abc$109383$new_n34755_
+.subckt nexor2_x0 i0=$abc$109383$new_n34755_ i1=$abc$109383$new_n34750_ nq=$abc$109383$new_n34756_
+.subckt nexor2_x0 i0=$abc$109383$new_n34756_ i1=$abc$109383$new_n34749_ nq=$abc$109383$new_n34757_
 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29394_ nq=$abc$109383$new_n34758_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29449_ nq=$abc$109383$new_n34759_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[29] q=$abc$109383$new_n34760_
-.subckt a2_x2 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n34761_
-.subckt nxr2_x1 i0=$abc$109383$new_n34761_ i1=$abc$109383$new_n34759_ nq=$abc$109383$new_n34762_
-.subckt nxr2_x1 i0=$abc$109383$new_n34762_ i1=$abc$109383$new_n34758_ nq=$abc$109383$new_n34763_
-.subckt nxr2_x1 i0=$abc$109383$new_n34763_ i1=$abc$109383$new_n34757_ nq=$abc$109383$new_n34764_
-.subckt nxr2_x1 i0=$abc$109383$new_n34764_ i1=$abc$109383$new_n34744_ nq=$abc$109383$new_n34765_
-.subckt nxr2_x1 i0=$abc$109383$new_n34765_ i1=$abc$109383$new_n34743_ nq=$abc$109383$new_n34766_
-.subckt nxr2_x1 i0=$abc$109383$new_n34766_ i1=$abc$109383$new_n34716_ nq=$abc$109383$new_n34767_
-.subckt nxr2_x1 i0=$abc$109383$new_n34767_ i1=$abc$109383$new_n34707_ nq=$abc$109383$new_n34768_
-.subckt nxr2_x1 i0=$abc$109383$new_n34768_ i1=$abc$109383$new_n34642_ nq=$abc$109383$new_n34769_
-.subckt nxr2_x1 i0=$abc$109383$new_n34769_ i1=$abc$109383$new_n34638_ nq=$abc$109383$new_n34770_
-.subckt nxr2_x1 i0=$abc$109383$new_n34770_ i1=$abc$109383$new_n34537_ nq=$abc$109383$new_n34771_
-.subckt nxr2_x1 i0=$abc$109383$new_n34771_ i1=$abc$109383$new_n34531_ nq=$abc$109383$new_n34772_
-.subckt nxr2_x1 i0=$abc$109383$new_n34772_ i1=$abc$109383$new_n34516_ nq=$abc$109383$new_n34773_
-.subckt nxr2_x1 i0=$abc$109383$new_n34773_ i1=$abc$109383$new_n34510_ nq=$abc$109383$new_n34774_
-.subckt nxr2_x1 i0=$abc$109383$new_n34774_ i1=$abc$109383$new_n34505_ nq=$abc$109383$new_n34775_
+.subckt and2_x1 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n34761_
+.subckt nexor2_x0 i0=$abc$109383$new_n34761_ i1=$abc$109383$new_n34759_ nq=$abc$109383$new_n34762_
+.subckt nexor2_x0 i0=$abc$109383$new_n34762_ i1=$abc$109383$new_n34758_ nq=$abc$109383$new_n34763_
+.subckt nexor2_x0 i0=$abc$109383$new_n34763_ i1=$abc$109383$new_n34757_ nq=$abc$109383$new_n34764_
+.subckt nexor2_x0 i0=$abc$109383$new_n34764_ i1=$abc$109383$new_n34744_ nq=$abc$109383$new_n34765_
+.subckt nexor2_x0 i0=$abc$109383$new_n34765_ i1=$abc$109383$new_n34743_ nq=$abc$109383$new_n34766_
+.subckt nexor2_x0 i0=$abc$109383$new_n34766_ i1=$abc$109383$new_n34716_ nq=$abc$109383$new_n34767_
+.subckt nexor2_x0 i0=$abc$109383$new_n34767_ i1=$abc$109383$new_n34707_ nq=$abc$109383$new_n34768_
+.subckt nexor2_x0 i0=$abc$109383$new_n34768_ i1=$abc$109383$new_n34642_ nq=$abc$109383$new_n34769_
+.subckt nexor2_x0 i0=$abc$109383$new_n34769_ i1=$abc$109383$new_n34638_ nq=$abc$109383$new_n34770_
+.subckt nexor2_x0 i0=$abc$109383$new_n34770_ i1=$abc$109383$new_n34537_ nq=$abc$109383$new_n34771_
+.subckt nexor2_x0 i0=$abc$109383$new_n34771_ i1=$abc$109383$new_n34531_ nq=$abc$109383$new_n34772_
+.subckt nexor2_x0 i0=$abc$109383$new_n34772_ i1=$abc$109383$new_n34516_ nq=$abc$109383$new_n34773_
+.subckt nexor2_x0 i0=$abc$109383$new_n34773_ i1=$abc$109383$new_n34510_ nq=$abc$109383$new_n34774_
+.subckt nexor2_x0 i0=$abc$109383$new_n34774_ i1=$abc$109383$new_n34505_ nq=$abc$109383$new_n34775_
 .subckt nand3_x0 i0=$abc$109383$new_n34775_ i1=$abc$109383$new_n34490_ i2=$abc$109383$new_n34499_ nq=$abc$109383$new_n34776_
 .subckt nand2_x0 i0=$abc$109383$new_n34776_ i1=$abc$109383$new_n33877_ nq=$abc$109383$new_n34777_
-.subckt a2_x2 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34502_ q=$abc$109383$new_n34778_
-.subckt a2_x2 i0=$abc$109383$new_n34166_ i1=$abc$109383$new_n34155_ q=$abc$109383$new_n34779_
-.subckt oa22_x2 i0=$abc$109383$new_n34779_ i1=$abc$109383$new_n34464_ i2=$abc$109383$new_n34778_ q=$abc$109383$new_n34780_
-.subckt nxr2_x1 i0=$abc$109383$new_n34774_ i1=$abc$109383$new_n34780_ nq=$abc$109383$new_n34781_
+.subckt and2_x1 i0=$abc$109383$new_n34463_ i1=$abc$109383$new_n34502_ q=$abc$109383$new_n34778_
+.subckt and2_x1 i0=$abc$109383$new_n34166_ i1=$abc$109383$new_n34155_ q=$abc$109383$new_n34779_
+.subckt or21nand_x1 i0=$abc$109383$new_n34779_ i1=$abc$109383$new_n34464_ i2=$abc$109383$new_n34778_ nq=$abc$109383$new_n34780_
+.subckt nexor2_x0 i0=$abc$109383$new_n34774_ i1=$abc$109383$new_n34780_ nq=$abc$109383$new_n34781_
 .subckt nand3_x0 i0=$abc$109383$new_n34161_ i1=$abc$109383$new_n34157_ i2=$abc$109383$new_n34153_ nq=$abc$109383$new_n34782_
-.subckt ao22_x2 i0=$abc$109383$new_n33897_ i1=$abc$109383$new_n34475_ i2=$abc$109383$new_n34782_ q=$abc$109383$new_n34783_
-.subckt nxr2_x1 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34783_ nq=$abc$109383$new_n34784_
-.subckt a4_x2 i0=$abc$109383$new_n34472_ i1=$abc$109383$new_n33622_ i2=$abc$109383$new_n33348_ i3=$abc$109383$new_n33104_ q=$abc$109383$new_n34785_
+.subckt and21nor_x1 i0=$abc$109383$new_n33897_ i1=$abc$109383$new_n34475_ i2=$abc$109383$new_n34782_ nq=$abc$109383$new_n34783_
+.subckt nexor2_x0 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34783_ nq=$abc$109383$new_n34784_
+.subckt and4_x1 i0=$abc$109383$new_n34472_ i1=$abc$109383$new_n33622_ i2=$abc$109383$new_n33348_ i3=$abc$109383$new_n33104_ q=$abc$109383$new_n34785_
 .subckt nand2_x0 i0=$abc$109383$new_n34487_ i1=$abc$109383$new_n34478_ nq=$abc$109383$new_n34786_
-.subckt ao22_x2 i0=$abc$109383$new_n34786_ i1=$abc$109383$new_n34785_ i2=$abc$109383$new_n34784_ q=$abc$109383$new_n34787_
-.subckt a2_x2 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34164_ q=$abc$109383$new_n34788_
-.subckt ao22_x2 i0=$abc$109383$new_n34788_ i1=$abc$109383$new_n34787_ i2=$abc$109383$new_n34781_ q=$abc$109383$new_n34789_
-.subckt ao22_x2 i0=$abc$109383$new_n34789_ i1=$abc$109383$new_n34777_ i2=$abc$109383$new_n34498_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102874
+.subckt and21nor_x1 i0=$abc$109383$new_n34786_ i1=$abc$109383$new_n34785_ i2=$abc$109383$new_n34784_ nq=$abc$109383$new_n34787_
+.subckt and2_x1 i0=$abc$109383$new_n34465_ i1=$abc$109383$new_n34164_ q=$abc$109383$new_n34788_
+.subckt and21nor_x1 i0=$abc$109383$new_n34788_ i1=$abc$109383$new_n34787_ i2=$abc$109383$new_n34781_ nq=$abc$109383$new_n34789_
+.subckt and21nor_x1 i0=$abc$109383$new_n34789_ i1=$abc$109383$new_n34777_ i2=$abc$109383$new_n34498_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102874
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[30] nq=$abc$109383$new_n34791_
-.subckt ao22_x2 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n34791_ q=$abc$109383$new_n34792_
+.subckt and21nor_x1 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n34791_ nq=$abc$109383$new_n34792_
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n34793_
 .subckt buf_x4 i=$abc$109383$new_n34793_ q=$abc$109383$new_n34794_
-.subckt a2_x2 i0=$abc$109383$new_n34509_ i1=$abc$109383$new_n34507_ q=$abc$109383$new_n34795_
+.subckt and2_x1 i0=$abc$109383$new_n34509_ i1=$abc$109383$new_n34507_ q=$abc$109383$new_n34795_
 .subckt nand2_x0 i0=$abc$109383$new_n34773_ i1=$abc$109383$new_n34795_ nq=$abc$109383$new_n34796_
 .subckt nor2_x0 i0=$abc$109383$new_n34461_ i1=$abc$109383$new_n34513_ nq=$abc$109383$new_n34797_
-.subckt nxr2_x1 i0=$abc$109383$new_n34197_ i1=$abc$109383$new_n34507_ nq=$abc$109383$new_n34798_
-.subckt oa22_x2 i0=$abc$109383$new_n34798_ i1=$abc$109383$new_n34462_ i2=$abc$109383$new_n34797_ q=$abc$109383$new_n34799_
-.subckt nxr2_x1 i0=$abc$109383$new_n34772_ i1=$abc$109383$new_n34799_ nq=$abc$109383$new_n34800_
+.subckt nexor2_x0 i0=$abc$109383$new_n34197_ i1=$abc$109383$new_n34507_ nq=$abc$109383$new_n34798_
+.subckt or21nand_x1 i0=$abc$109383$new_n34798_ i1=$abc$109383$new_n34462_ i2=$abc$109383$new_n34797_ nq=$abc$109383$new_n34799_
+.subckt nexor2_x0 i0=$abc$109383$new_n34772_ i1=$abc$109383$new_n34799_ nq=$abc$109383$new_n34800_
 .subckt nand2_x0 i0=$abc$109383$new_n34800_ i1=$abc$109383$new_n34510_ nq=$abc$109383$new_n34801_
-.subckt a3_x2 i0=$abc$109383$new_n34801_ i1=$abc$109383$new_n34796_ i2=$abc$109383$new_n34780_ q=$abc$109383$new_n34802_
-.subckt oa22_x2 i0=$abc$109383$new_n34801_ i1=$abc$109383$new_n34796_ i2=$abc$109383$new_n34780_ q=$abc$109383$new_n34803_
-.subckt oa22_x2 i0=$abc$109383$new_n34788_ i1=$abc$109383$new_n34803_ i2=$abc$109383$new_n34802_ q=$abc$109383$new_n34804_
-.subckt oa22_x2 i0=$abc$109383$new_n34787_ i1=$abc$109383$new_n34775_ i2=$abc$109383$new_n34804_ q=$abc$109383$new_n34805_
-.subckt a2_x2 i0=$abc$109383$new_n34243_ i1=$abc$109383$new_n34227_ q=$abc$109383$new_n34806_
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 .subckt nand2_x0 i0=$abc$109383$new_n29316_ i1=$abc$109383$new_n29425_ nq=$abc$109383$new_n34807_
-.subckt nxr2_x1 i0=$abc$109383$new_n34231_ i1=$abc$109383$new_n34807_ nq=$abc$109383$new_n34808_
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-.subckt nxr2_x1 i0=$abc$109383$new_n34809_ i1=$abc$109383$new_n34227_ nq=$abc$109383$new_n34810_
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 .subckt nand2_x0 i0=$abc$109383$new_n34771_ i1=$abc$109383$new_n34812_ nq=$abc$109383$new_n34813_
-.subckt a2_x2 i0=$abc$109383$new_n34459_ i1=$abc$109383$new_n34534_ q=$abc$109383$new_n34814_
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-.subckt nxr2_x1 i0=$abc$109383$new_n34770_ i1=$abc$109383$new_n34815_ nq=$abc$109383$new_n34816_
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 .subckt nand2_x0 i0=$abc$109383$new_n34816_ i1=$abc$109383$new_n34531_ nq=$abc$109383$new_n34817_
-.subckt a3_x2 i0=$abc$109383$new_n34817_ i1=$abc$109383$new_n34813_ i2=$abc$109383$new_n34799_ q=$abc$109383$new_n34818_
-.subckt oa22_x2 i0=$abc$109383$new_n34795_ i1=$abc$109383$new_n34773_ i2=$abc$109383$new_n34818_ q=$abc$109383$new_n34819_
-.subckt a2_x2 i0=$abc$109383$new_n34520_ i1=$abc$109383$new_n34303_ q=$abc$109383$new_n34820_
-.subckt a2_x2 i0=$abc$109383$new_n34016_ i1=$abc$109383$new_n34205_ q=$abc$109383$new_n34821_
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-.subckt oa22_x2 i0=$abc$109383$new_n34822_ i1=$abc$109383$new_n34319_ i2=$abc$109383$new_n34820_ q=$abc$109383$new_n34823_
-.subckt a2_x2 i0=$abc$109383$new_n34823_ i1=$abc$109383$new_n34811_ q=$abc$109383$new_n34824_
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 .subckt nand2_x0 i0=$abc$109383$new_n34770_ i1=$abc$109383$new_n34815_ nq=$abc$109383$new_n34825_
-.subckt ao22_x2 i0=$abc$109383$new_n34531_ i1=$abc$109383$new_n34816_ i2=$abc$109383$new_n34825_ q=$abc$109383$new_n34826_
-.subckt a2_x2 i0=$abc$109383$new_n34241_ i1=$abc$109383$new_n34546_ q=$abc$109383$new_n34827_
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 .subckt nand2_x0 i0=$abc$109383$new_n34549_ i1=$abc$109383$new_n34236_ nq=$abc$109383$new_n34828_
-.subckt oa22_x2 i0=$abc$109383$new_n34808_ i1=$abc$109383$new_n34828_ i2=$abc$109383$new_n34827_ q=$abc$109383$new_n34829_
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 .subckt nand2_x0 i0=$abc$109383$new_n34567_ i1=$abc$109383$new_n34829_ nq=$abc$109383$new_n34830_
-.subckt nxr2_x1 i0=$abc$109383$new_n34567_ i1=$abc$109383$new_n34829_ nq=$abc$109383$new_n34831_
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 .subckt nand4_x0 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29379_ i2=$abc$109383$new_n29277_ i3=$abc$109383$new_n29302_ nq=$abc$109383$new_n34832_
-.subckt a2_x2 i0=$abc$109383$new_n34541_ i1=$abc$109383$new_n34229_ q=$abc$109383$new_n34833_
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-.subckt ao22_x2 i0=$abc$109383$new_n34834_ i1=$abc$109383$new_n34831_ i2=$abc$109383$new_n34830_ q=$abc$109383$new_n34835_
-.subckt a3_x2 i0=$abc$109383$new_n34391_ i1=$abc$109383$new_n34385_ i2=$abc$109383$new_n34384_ q=$abc$109383$new_n34836_
-.subckt oa22_x2 i0=$abc$109383$new_n34329_ i1=$abc$109383$new_n34393_ i2=$abc$109383$new_n34836_ q=$abc$109383$new_n34837_
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 .subckt nand2_x0 i0=$abc$109383$new_n34837_ i1=$abc$109383$new_n34622_ nq=$abc$109383$new_n34838_
-.subckt nxr2_x1 i0=$abc$109383$new_n34568_ i1=$abc$109383$new_n34834_ nq=$abc$109383$new_n34839_
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 .subckt nand2_x0 i0=$abc$109383$new_n34301_ i1=$abc$109383$new_n34300_ nq=$abc$109383$new_n34842_
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-.subckt ao22_x2 i0=$abc$109383$new_n34843_ i1=$abc$109383$new_n34841_ i2=$abc$109383$new_n34838_ q=$abc$109383$new_n34844_
-.subckt nxr2_x1 i0=$abc$109383$new_n34844_ i1=$abc$109383$new_n34835_ nq=$abc$109383$new_n34845_
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 .subckt nand2_x0 i0=$abc$109383$new_n34641_ i1=$abc$109383$new_n34640_ nq=$abc$109383$new_n34846_
 .subckt nand2_x0 i0=$abc$109383$new_n34768_ i1=$abc$109383$new_n34846_ nq=$abc$109383$new_n34847_
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-.subckt a3_x2 i0=$abc$109383$new_n34619_ i1=$abc$109383$new_n34618_ i2=$abc$109383$new_n34851_ q=$abc$109383$new_n34852_
-.subckt oa22_x2 i0=$abc$109383$new_n34839_ i1=$abc$109383$new_n34621_ i2=$abc$109383$new_n34852_ q=$abc$109383$new_n34853_
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+.subckt and21nor_x1 i0=$abc$109383$new_n34638_ i1=$abc$109383$new_n34848_ i2=$abc$109383$new_n34847_ nq=$abc$109383$new_n34849_
+.subckt and2_x1 i0=$abc$109383$new_n34285_ i1=$abc$109383$new_n34277_ q=$abc$109383$new_n34850_
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 .subckt buf_x4 i=$abc$109383$new_n29276_ q=$abc$109383$new_n34854_
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+.subckt and4_x1 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29378_ i2=$abc$109383$new_n29423_ i3=$abc$109383$new_n34854_ q=$abc$109383$new_n34855_
 .subckt nand2_x0 i0=$abc$109383$new_n29379_ i1=$abc$109383$new_n29424_ nq=$abc$109383$new_n34856_
 .subckt nand2_x0 i0=$abc$109383$new_n34856_ i1=$abc$109383$new_n34553_ nq=$abc$109383$new_n34857_
-.subckt oa22_x2 i0=$abc$109383$new_n34552_ i1=$abc$109383$new_n34857_ i2=$abc$109383$new_n34855_ q=$abc$109383$new_n34858_
+.subckt or21nand_x1 i0=$abc$109383$new_n34552_ i1=$abc$109383$new_n34857_ i2=$abc$109383$new_n34855_ nq=$abc$109383$new_n34858_
 .subckt buf_x4 i=$abc$109383$new_n34218_ q=$abc$109383$new_n34859_
-.subckt a4_x2 i0=$abc$109383$new_n34859_ i1=$abc$109383$new_n29235_ i2=$abc$109383$new_n29356_ i3=$abc$109383$new_n29512_ q=$abc$109383$new_n34860_
+.subckt and4_x1 i0=$abc$109383$new_n34859_ i1=$abc$109383$new_n29235_ i2=$abc$109383$new_n29356_ i3=$abc$109383$new_n29512_ q=$abc$109383$new_n34860_
 .subckt nand2_x0 i0=$abc$109383$new_n34558_ i1=$abc$109383$new_n34238_ nq=$abc$109383$new_n34861_
-.subckt oa22_x2 i0=$abc$109383$new_n34548_ i1=$abc$109383$new_n34861_ i2=$abc$109383$new_n34860_ q=$abc$109383$new_n34862_
+.subckt or21nand_x1 i0=$abc$109383$new_n34548_ i1=$abc$109383$new_n34861_ i2=$abc$109383$new_n34860_ nq=$abc$109383$new_n34862_
 .subckt nand2_x0 i0=$abc$109383$new_n34565_ i1=$abc$109383$new_n34862_ nq=$abc$109383$new_n34863_
-.subckt a2_x2 i0=$abc$109383$new_n29245_ i1=$abc$109383$new_n29299_ q=$abc$109383$new_n34864_
-.subckt nxr2_x1 i0=$abc$109383$new_n34564_ i1=$abc$109383$new_n34864_ nq=$abc$109383$new_n34865_
-.subckt a2_x2 i0=$abc$109383$new_n34865_ i1=$abc$109383$new_n34560_ q=$abc$109383$new_n34866_
-.subckt ao22_x2 i0=$abc$109383$new_n34556_ i1=$abc$109383$new_n34866_ i2=$abc$109383$new_n34863_ q=$abc$109383$new_n34867_
-.subckt a2_x2 i0=$abc$109383$new_n29316_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n34868_
+.subckt and2_x1 i0=$abc$109383$new_n29245_ i1=$abc$109383$new_n29299_ q=$abc$109383$new_n34864_
+.subckt nexor2_x0 i0=$abc$109383$new_n34564_ i1=$abc$109383$new_n34864_ nq=$abc$109383$new_n34865_
+.subckt and2_x1 i0=$abc$109383$new_n34865_ i1=$abc$109383$new_n34560_ q=$abc$109383$new_n34866_
+.subckt and21nor_x1 i0=$abc$109383$new_n34556_ i1=$abc$109383$new_n34866_ i2=$abc$109383$new_n34863_ nq=$abc$109383$new_n34867_
+.subckt and2_x1 i0=$abc$109383$new_n29316_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n34868_
 .subckt nand2_x0 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29422_ nq=$abc$109383$new_n34869_
-.subckt a2_x2 i0=$abc$109383$new_n29377_ i1=soc.cpu.minerva.payload__src1$44[29] q=$abc$109383$new_n34870_
-.subckt nxr2_x1 i0=$abc$109383$new_n34870_ i1=$abc$109383$new_n34869_ nq=$abc$109383$new_n34871_
-.subckt nxr2_x1 i0=$abc$109383$new_n34871_ i1=$abc$109383$new_n34868_ nq=$abc$109383$new_n34872_
+.subckt and2_x1 i0=$abc$109383$new_n29377_ i1=soc.cpu.minerva.payload__src1$44[29] q=$abc$109383$new_n34870_
+.subckt nexor2_x0 i0=$abc$109383$new_n34870_ i1=$abc$109383$new_n34869_ nq=$abc$109383$new_n34871_
+.subckt nexor2_x0 i0=$abc$109383$new_n34871_ i1=$abc$109383$new_n34868_ nq=$abc$109383$new_n34872_
 .subckt nand4_x0 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29235_ i2=$abc$109383$new_n29333_ i3=$abc$109383$new_n29356_ nq=$abc$109383$new_n34873_
 .subckt nand2_x0 i0=$abc$109383$new_n29234_ i1=$abc$109383$new_n29333_ nq=$abc$109383$new_n34874_
-.subckt a2_x2 i0=$abc$109383$new_n34874_ i1=$abc$109383$new_n34562_ q=$abc$109383$new_n34875_
-.subckt ao22_x2 i0=$abc$109383$new_n34561_ i1=$abc$109383$new_n34875_ i2=$abc$109383$new_n34873_ q=$abc$109383$new_n34876_
+.subckt and2_x1 i0=$abc$109383$new_n34874_ i1=$abc$109383$new_n34562_ q=$abc$109383$new_n34875_
+.subckt and21nor_x1 i0=$abc$109383$new_n34561_ i1=$abc$109383$new_n34875_ i2=$abc$109383$new_n34873_ nq=$abc$109383$new_n34876_
 .subckt nand2_x0 i0=$abc$109383$new_n29245_ i1=soc.cpu.minerva.payload__src1$44[27] nq=$abc$109383$new_n34877_
 .subckt nand2_x0 i0=$abc$109383$new_n34218_ i1=soc.cpu.minerva.payload__src1$44[25] nq=$abc$109383$new_n34878_
-.subckt a2_x2 i0=$abc$109383$new_n29234_ i1=$abc$109383$new_n29299_ q=$abc$109383$new_n34879_
-.subckt nxr2_x1 i0=$abc$109383$new_n34879_ i1=$abc$109383$new_n34878_ nq=$abc$109383$new_n34880_
-.subckt nxr2_x1 i0=$abc$109383$new_n34880_ i1=$abc$109383$new_n34877_ nq=$abc$109383$new_n34881_
-.subckt nxr2_x1 i0=$abc$109383$new_n34881_ i1=$abc$109383$new_n34876_ nq=$abc$109383$new_n34882_
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-.subckt nxr2_x1 i0=$abc$109383$new_n35055_ i1=$abc$109383$new_n35047_ nq=$abc$109383$new_n35056_
-.subckt nxr2_x1 i0=$abc$109383$new_n35056_ i1=$abc$109383$new_n35031_ nq=$abc$109383$new_n35057_
+.subckt and2_x1 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29296_ q=$abc$109383$new_n35052_
+.subckt nexor2_x0 i0=$abc$109383$new_n34754_ i1=$abc$109383$new_n35052_ nq=$abc$109383$new_n35053_
+.subckt and2_x1 i0=$abc$109383$new_n35053_ i1=$abc$109383$new_n34750_ q=$abc$109383$new_n35054_
+.subckt and21nor_x1 i0=$abc$109383$new_n35015_ i1=$abc$109383$new_n35054_ i2=$abc$109383$new_n35051_ nq=$abc$109383$new_n35055_
+.subckt nexor2_x0 i0=$abc$109383$new_n35055_ i1=$abc$109383$new_n35047_ nq=$abc$109383$new_n35056_
+.subckt nexor2_x0 i0=$abc$109383$new_n35056_ i1=$abc$109383$new_n35031_ nq=$abc$109383$new_n35057_
 .subckt nand2_x0 i0=$abc$109383$new_n34763_ i1=$abc$109383$new_n35016_ nq=$abc$109383$new_n35058_
-.subckt a4_x2 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n34432_ i2=$abc$109383$new_n29273_ i3=$abc$109383$new_n29419_ q=$abc$109383$new_n35059_
+.subckt and4_x1 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n34432_ i2=$abc$109383$new_n29273_ i3=$abc$109383$new_n29419_ q=$abc$109383$new_n35059_
 .subckt nand2_x0 i0=$abc$109383$new_n34432_ i1=$abc$109383$new_n29273_ nq=$abc$109383$new_n35060_
 .subckt nand2_x0 i0=$abc$109383$new_n35060_ i1=$abc$109383$new_n34752_ nq=$abc$109383$new_n35061_
-.subckt oa22_x2 i0=$abc$109383$new_n35052_ i1=$abc$109383$new_n35061_ i2=$abc$109383$new_n35059_ q=$abc$109383$new_n35062_
+.subckt or21nand_x1 i0=$abc$109383$new_n35052_ i1=$abc$109383$new_n35061_ i2=$abc$109383$new_n35059_ nq=$abc$109383$new_n35062_
 .subckt nand2_x0 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29329_ nq=$abc$109383$new_n35063_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29272_ nq=$abc$109383$new_n35064_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29295_ q=$abc$109383$new_n35065_
-.subckt nxr2_x1 i0=$abc$109383$new_n35065_ i1=$abc$109383$new_n35064_ nq=$abc$109383$new_n35066_
-.subckt nxr2_x1 i0=$abc$109383$new_n35066_ i1=$abc$109383$new_n35063_ nq=$abc$109383$new_n35067_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[25] i1=$abc$109383$new_n29295_ q=$abc$109383$new_n35065_
+.subckt nexor2_x0 i0=$abc$109383$new_n35065_ i1=$abc$109383$new_n35064_ nq=$abc$109383$new_n35066_
+.subckt nexor2_x0 i0=$abc$109383$new_n35066_ i1=$abc$109383$new_n35063_ nq=$abc$109383$new_n35067_
 .subckt nand4_x0 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n34452_ i2=$abc$109383$new_n29474_ i3=$abc$109383$new_n29449_ nq=$abc$109383$new_n35068_
 .subckt nand2_x0 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n33586_ nq=$abc$109383$new_n35069_
-.subckt a2_x2 i0=$abc$109383$new_n35069_ i1=$abc$109383$new_n34759_ q=$abc$109383$new_n35070_
-.subckt ao22_x2 i0=$abc$109383$new_n34758_ i1=$abc$109383$new_n35070_ i2=$abc$109383$new_n35068_ q=$abc$109383$new_n35071_
-.subckt nxr2_x1 i0=$abc$109383$new_n35071_ i1=$abc$109383$new_n35067_ nq=$abc$109383$new_n35072_
-.subckt nxr2_x1 i0=$abc$109383$new_n35072_ i1=$abc$109383$new_n35062_ nq=$abc$109383$new_n35073_
-.subckt a2_x2 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29419_ q=$abc$109383$new_n35074_
+.subckt and2_x1 i0=$abc$109383$new_n35069_ i1=$abc$109383$new_n34759_ q=$abc$109383$new_n35070_
+.subckt and21nor_x1 i0=$abc$109383$new_n34758_ i1=$abc$109383$new_n35070_ i2=$abc$109383$new_n35068_ nq=$abc$109383$new_n35071_
+.subckt nexor2_x0 i0=$abc$109383$new_n35071_ i1=$abc$109383$new_n35067_ nq=$abc$109383$new_n35072_
+.subckt nexor2_x0 i0=$abc$109383$new_n35072_ i1=$abc$109383$new_n35062_ nq=$abc$109383$new_n35073_
+.subckt and2_x1 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29419_ q=$abc$109383$new_n35074_
 .subckt nand2_x0 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n29449_ nq=$abc$109383$new_n35075_
-.subckt a2_x2 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n29393_ q=$abc$109383$new_n35076_
-.subckt nxr2_x1 i0=$abc$109383$new_n35076_ i1=$abc$109383$new_n35075_ nq=$abc$109383$new_n35077_
-.subckt nxr2_x1 i0=$abc$109383$new_n35077_ i1=$abc$109383$new_n35074_ nq=$abc$109383$new_n35078_
+.subckt and2_x1 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n29393_ q=$abc$109383$new_n35076_
+.subckt nexor2_x0 i0=$abc$109383$new_n35076_ i1=$abc$109383$new_n35075_ nq=$abc$109383$new_n35077_
+.subckt nexor2_x0 i0=$abc$109383$new_n35077_ i1=$abc$109383$new_n35074_ nq=$abc$109383$new_n35078_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[30] q=$abc$109383$new_n35079_
 .subckt buf_x4 i=$abc$109383$new_n35079_ q=$abc$109383$new_n35080_
-.subckt a2_x2 i0=$abc$109383$new_n35080_ i1=$abc$109383$new_n29474_ q=$abc$109383$new_n35081_
-.subckt nxr2_x1 i0=$abc$109383$new_n35081_ i1=$abc$109383$new_n35078_ nq=$abc$109383$new_n35082_
-.subckt nxr2_x1 i0=$abc$109383$new_n35082_ i1=$abc$109383$new_n35073_ nq=$abc$109383$new_n35083_
-.subckt nxr2_x1 i0=$abc$109383$new_n35083_ i1=$abc$109383$new_n35058_ nq=$abc$109383$new_n35084_
-.subckt nxr2_x1 i0=$abc$109383$new_n35084_ i1=$abc$109383$new_n35057_ nq=$abc$109383$new_n35085_
-.subckt nxr2_x1 i0=$abc$109383$new_n35085_ i1=$abc$109383$new_n35019_ nq=$abc$109383$new_n35086_
-.subckt nxr2_x1 i0=$abc$109383$new_n35086_ i1=$abc$109383$new_n35010_ nq=$abc$109383$new_n35087_
-.subckt nxr2_x1 i0=$abc$109383$new_n35087_ i1=$abc$109383$new_n34951_ nq=$abc$109383$new_n35088_
-.subckt nxr2_x1 i0=$abc$109383$new_n35088_ i1=$abc$109383$new_n34942_ nq=$abc$109383$new_n35089_
-.subckt nxr2_x1 i0=$abc$109383$new_n35089_ i1=$abc$109383$new_n34849_ nq=$abc$109383$new_n35090_
-.subckt nxr2_x1 i0=$abc$109383$new_n35090_ i1=$abc$109383$new_n34845_ nq=$abc$109383$new_n35091_
-.subckt nxr2_x1 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n34826_ nq=$abc$109383$new_n35092_
-.subckt nxr2_x1 i0=$abc$109383$new_n35092_ i1=$abc$109383$new_n34824_ nq=$abc$109383$new_n35093_
-.subckt nxr2_x1 i0=$abc$109383$new_n35093_ i1=$abc$109383$new_n34819_ nq=$abc$109383$new_n35094_
-.subckt nxr2_x1 i0=$abc$109383$new_n35094_ i1=$abc$109383$new_n34805_ nq=$abc$109383$new_n35095_
-.subckt oa22_x2 i0=$abc$109383$new_n35095_ i1=$abc$109383$new_n34794_ i2=$abc$109383$new_n29220_ q=$abc$109383$new_n35096_
+.subckt and2_x1 i0=$abc$109383$new_n35080_ i1=$abc$109383$new_n29474_ q=$abc$109383$new_n35081_
+.subckt nexor2_x0 i0=$abc$109383$new_n35081_ i1=$abc$109383$new_n35078_ nq=$abc$109383$new_n35082_
+.subckt nexor2_x0 i0=$abc$109383$new_n35082_ i1=$abc$109383$new_n35073_ nq=$abc$109383$new_n35083_
+.subckt nexor2_x0 i0=$abc$109383$new_n35083_ i1=$abc$109383$new_n35058_ nq=$abc$109383$new_n35084_
+.subckt nexor2_x0 i0=$abc$109383$new_n35084_ i1=$abc$109383$new_n35057_ nq=$abc$109383$new_n35085_
+.subckt nexor2_x0 i0=$abc$109383$new_n35085_ i1=$abc$109383$new_n35019_ nq=$abc$109383$new_n35086_
+.subckt nexor2_x0 i0=$abc$109383$new_n35086_ i1=$abc$109383$new_n35010_ nq=$abc$109383$new_n35087_
+.subckt nexor2_x0 i0=$abc$109383$new_n35087_ i1=$abc$109383$new_n34951_ nq=$abc$109383$new_n35088_
+.subckt nexor2_x0 i0=$abc$109383$new_n35088_ i1=$abc$109383$new_n34942_ nq=$abc$109383$new_n35089_
+.subckt nexor2_x0 i0=$abc$109383$new_n35089_ i1=$abc$109383$new_n34849_ nq=$abc$109383$new_n35090_
+.subckt nexor2_x0 i0=$abc$109383$new_n35090_ i1=$abc$109383$new_n34845_ nq=$abc$109383$new_n35091_
+.subckt nexor2_x0 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n34826_ nq=$abc$109383$new_n35092_
+.subckt nexor2_x0 i0=$abc$109383$new_n35092_ i1=$abc$109383$new_n34824_ nq=$abc$109383$new_n35093_
+.subckt nexor2_x0 i0=$abc$109383$new_n35093_ i1=$abc$109383$new_n34819_ nq=$abc$109383$new_n35094_
+.subckt nexor2_x0 i0=$abc$109383$new_n35094_ i1=$abc$109383$new_n34805_ nq=$abc$109383$new_n35095_
+.subckt or21nand_x1 i0=$abc$109383$new_n35095_ i1=$abc$109383$new_n34794_ i2=$abc$109383$new_n29220_ nq=$abc$109383$new_n35096_
 .subckt nor2_x0 i0=$abc$109383$new_n35096_ i1=$abc$109383$new_n34792_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102878
 .subckt buf_x4 i=$abc$109383$new_n30265_ q=$abc$109383$new_n35098_
 .subckt buf_x4 i=$abc$109383$new_n35098_ q=$abc$109383$new_n35099_
 .subckt nand3_x0 i0=$abc$109383$new_n34817_ i1=$abc$109383$new_n34813_ i2=$abc$109383$new_n34799_ nq=$abc$109383$new_n35100_
-.subckt ao22_x2 i0=$abc$109383$new_n34510_ i1=$abc$109383$new_n34800_ i2=$abc$109383$new_n35100_ q=$abc$109383$new_n35101_
-.subckt o2_x2 i0=$abc$109383$new_n35093_ i1=$abc$109383$new_n35101_ q=$abc$109383$new_n35102_
+.subckt and21nor_x1 i0=$abc$109383$new_n34510_ i1=$abc$109383$new_n34800_ i2=$abc$109383$new_n35100_ nq=$abc$109383$new_n35101_
+.subckt or2_x1 i0=$abc$109383$new_n35093_ i1=$abc$109383$new_n35101_ q=$abc$109383$new_n35102_
 .subckt nand2_x0 i0=$abc$109383$new_n35094_ i1=$abc$109383$new_n34805_ nq=$abc$109383$new_n35103_
-.subckt a2_x2 i0=$abc$109383$new_n34770_ i1=$abc$109383$new_n34815_ q=$abc$109383$new_n35104_
-.subckt oa22_x2 i0=$abc$109383$new_n34812_ i1=$abc$109383$new_n34771_ i2=$abc$109383$new_n35104_ q=$abc$109383$new_n35105_
+.subckt and2_x1 i0=$abc$109383$new_n34770_ i1=$abc$109383$new_n34815_ q=$abc$109383$new_n35104_
+.subckt or21nand_x1 i0=$abc$109383$new_n34812_ i1=$abc$109383$new_n34771_ i2=$abc$109383$new_n35104_ nq=$abc$109383$new_n35105_
 .subckt nand2_x0 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n35105_ nq=$abc$109383$new_n35106_
-.subckt nxr2_x1 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n35105_ nq=$abc$109383$new_n35107_
+.subckt nexor2_x0 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n35105_ nq=$abc$109383$new_n35107_
 .subckt nand2_x0 i0=$abc$109383$new_n34823_ i1=$abc$109383$new_n34811_ nq=$abc$109383$new_n35108_
-.subckt ao22_x2 i0=$abc$109383$new_n35108_ i1=$abc$109383$new_n35107_ i2=$abc$109383$new_n35106_ q=$abc$109383$new_n35109_
-.subckt a2_x2 i0=$abc$109383$new_n34567_ i1=$abc$109383$new_n34829_ q=$abc$109383$new_n35110_
-.subckt oa22_x2 i0=$abc$109383$new_n34543_ i1=$abc$109383$new_n34568_ i2=$abc$109383$new_n35110_ q=$abc$109383$new_n35111_
-.subckt a2_x2 i0=$abc$109383$new_n34837_ i1=$abc$109383$new_n34622_ q=$abc$109383$new_n35112_
-.subckt oa22_x2 i0=$abc$109383$new_n34539_ i1=$abc$109383$new_n34637_ i2=$abc$109383$new_n35112_ q=$abc$109383$new_n35113_
+.subckt and21nor_x1 i0=$abc$109383$new_n35108_ i1=$abc$109383$new_n35107_ i2=$abc$109383$new_n35106_ nq=$abc$109383$new_n35109_
+.subckt and2_x1 i0=$abc$109383$new_n34567_ i1=$abc$109383$new_n34829_ q=$abc$109383$new_n35110_
+.subckt or21nand_x1 i0=$abc$109383$new_n34543_ i1=$abc$109383$new_n34568_ i2=$abc$109383$new_n35110_ nq=$abc$109383$new_n35111_
+.subckt and2_x1 i0=$abc$109383$new_n34837_ i1=$abc$109383$new_n34622_ q=$abc$109383$new_n35112_
+.subckt or21nand_x1 i0=$abc$109383$new_n34539_ i1=$abc$109383$new_n34637_ i2=$abc$109383$new_n35112_ nq=$abc$109383$new_n35113_
 .subckt nand2_x0 i0=$abc$109383$new_n35113_ i1=$abc$109383$new_n35111_ nq=$abc$109383$new_n35114_
 .subckt nand3_x0 i0=$abc$109383$new_n34619_ i1=$abc$109383$new_n34618_ i2=$abc$109383$new_n34851_ nq=$abc$109383$new_n35115_
-.subckt nxr2_x1 i0=$abc$109383$new_n34620_ i1=$abc$109383$new_n34851_ nq=$abc$109383$new_n35116_
-.subckt ao22_x2 i0=$abc$109383$new_n34569_ i1=$abc$109383$new_n35116_ i2=$abc$109383$new_n35115_ q=$abc$109383$new_n35117_
-.subckt nxr2_x1 i0=$abc$109383$new_n34941_ i1=$abc$109383$new_n35117_ nq=$abc$109383$new_n35118_
-.subckt nxr2_x1 i0=$abc$109383$new_n35088_ i1=$abc$109383$new_n35118_ nq=$abc$109383$new_n35119_
-.subckt nxr2_x1 i0=$abc$109383$new_n34637_ i1=$abc$109383$new_n34843_ nq=$abc$109383$new_n35120_
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+.subckt and21nor_x1 i0=$abc$109383$new_n34569_ i1=$abc$109383$new_n35116_ i2=$abc$109383$new_n35115_ nq=$abc$109383$new_n35117_
+.subckt nexor2_x0 i0=$abc$109383$new_n34941_ i1=$abc$109383$new_n35117_ nq=$abc$109383$new_n35118_
+.subckt nexor2_x0 i0=$abc$109383$new_n35088_ i1=$abc$109383$new_n35118_ nq=$abc$109383$new_n35119_
+.subckt nexor2_x0 i0=$abc$109383$new_n34637_ i1=$abc$109383$new_n34843_ nq=$abc$109383$new_n35120_
 .subckt nand2_x0 i0=$abc$109383$new_n34769_ i1=$abc$109383$new_n35120_ nq=$abc$109383$new_n35121_
-.subckt oa22_x2 i0=$abc$109383$new_n34847_ i1=$abc$109383$new_n35121_ i2=$abc$109383$new_n35119_ q=$abc$109383$new_n35122_
-.subckt a2_x2 i0=$abc$109383$new_n34768_ i1=$abc$109383$new_n34846_ q=$abc$109383$new_n35123_
-.subckt oa22_x2 i0=$abc$109383$new_n35120_ i1=$abc$109383$new_n34769_ i2=$abc$109383$new_n35123_ q=$abc$109383$new_n35124_
-.subckt nxr2_x1 i0=$abc$109383$new_n35089_ i1=$abc$109383$new_n35124_ nq=$abc$109383$new_n35125_
-.subckt ao22_x2 i0=$abc$109383$new_n34845_ i1=$abc$109383$new_n35125_ i2=$abc$109383$new_n35122_ q=$abc$109383$new_n35126_
-.subckt a2_x2 i0=$abc$109383$new_n34565_ i1=$abc$109383$new_n34862_ q=$abc$109383$new_n35127_
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+.subckt and2_x1 i0=$abc$109383$new_n34768_ i1=$abc$109383$new_n34846_ q=$abc$109383$new_n35123_
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+.subckt nexor2_x0 i0=$abc$109383$new_n35089_ i1=$abc$109383$new_n35124_ nq=$abc$109383$new_n35125_
+.subckt and21nor_x1 i0=$abc$109383$new_n34845_ i1=$abc$109383$new_n35125_ i2=$abc$109383$new_n35122_ nq=$abc$109383$new_n35126_
+.subckt and2_x1 i0=$abc$109383$new_n34565_ i1=$abc$109383$new_n34862_ q=$abc$109383$new_n35127_
 .subckt nand2_x0 i0=$abc$109383$new_n34865_ i1=$abc$109383$new_n34560_ nq=$abc$109383$new_n35128_
 .subckt nand2_x0 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29398_ nq=$abc$109383$new_n35129_
-.subckt nxr2_x1 i0=$abc$109383$new_n34555_ i1=$abc$109383$new_n35129_ nq=$abc$109383$new_n35130_
-.subckt oa22_x2 i0=$abc$109383$new_n35130_ i1=$abc$109383$new_n35128_ i2=$abc$109383$new_n35127_ q=$abc$109383$new_n35131_
+.subckt nexor2_x0 i0=$abc$109383$new_n34555_ i1=$abc$109383$new_n35129_ nq=$abc$109383$new_n35130_
+.subckt or21nand_x1 i0=$abc$109383$new_n35130_ i1=$abc$109383$new_n35128_ i2=$abc$109383$new_n35127_ nq=$abc$109383$new_n35131_
 .subckt nand2_x0 i0=$abc$109383$new_n34883_ i1=$abc$109383$new_n35131_ nq=$abc$109383$new_n35132_
-.subckt nxr2_x1 i0=$abc$109383$new_n34883_ i1=$abc$109383$new_n35131_ nq=$abc$109383$new_n35133_
+.subckt nexor2_x0 i0=$abc$109383$new_n34883_ i1=$abc$109383$new_n35131_ nq=$abc$109383$new_n35133_
 .subckt nand4_x0 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29379_ i2=$abc$109383$new_n29425_ i3=$abc$109383$new_n29278_ nq=$abc$109383$new_n35134_
-.subckt a2_x2 i0=$abc$109383$new_n34856_ i1=$abc$109383$new_n34553_ q=$abc$109383$new_n35135_
-.subckt ao22_x2 i0=$abc$109383$new_n35129_ i1=$abc$109383$new_n35135_ i2=$abc$109383$new_n35134_ q=$abc$109383$new_n35136_
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 .subckt buf_x4 i=$abc$109383$new_n29397_ q=$abc$109383$new_n35155_
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 .subckt nand2_x0 i0=$abc$109383$new_n29379_ i1=$abc$109383$new_n35155_ nq=$abc$109383$new_n35157_
 .subckt nand2_x0 i0=$abc$109383$new_n35157_ i1=$abc$109383$new_n34869_ nq=$abc$109383$new_n35158_
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 .subckt buf_x4 i=$abc$109383$new_n29235_ q=$abc$109383$new_n35160_
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+.subckt and4_x1 i0=$abc$109383$new_n34859_ i1=$abc$109383$new_n35160_ i2=$abc$109383$new_n29333_ i3=$abc$109383$new_n29357_ q=$abc$109383$new_n35161_
 .subckt nand2_x0 i0=$abc$109383$new_n34874_ i1=$abc$109383$new_n34562_ nq=$abc$109383$new_n35162_
-.subckt oa22_x2 i0=$abc$109383$new_n34864_ i1=$abc$109383$new_n35162_ i2=$abc$109383$new_n35161_ q=$abc$109383$new_n35163_
+.subckt or21nand_x1 i0=$abc$109383$new_n34864_ i1=$abc$109383$new_n35162_ i2=$abc$109383$new_n35161_ nq=$abc$109383$new_n35163_
 .subckt nand2_x0 i0=$abc$109383$new_n34881_ i1=$abc$109383$new_n35163_ nq=$abc$109383$new_n35164_
-.subckt a2_x2 i0=$abc$109383$new_n29245_ i1=$abc$109383$new_n29276_ q=$abc$109383$new_n35165_
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-.subckt a2_x2 i0=$abc$109383$new_n29316_ i1=$abc$109383$new_n29476_ q=$abc$109383$new_n35169_
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+.subckt and2_x1 i0=$abc$109383$new_n35166_ i1=$abc$109383$new_n34876_ q=$abc$109383$new_n35167_
+.subckt and21nor_x1 i0=$abc$109383$new_n34872_ i1=$abc$109383$new_n35167_ i2=$abc$109383$new_n35164_ nq=$abc$109383$new_n35168_
+.subckt and2_x1 i0=$abc$109383$new_n29316_ i1=$abc$109383$new_n29476_ q=$abc$109383$new_n35169_
 .subckt nand2_x0 i0=$abc$109383$new_n29259_ i1=soc.cpu.minerva.payload__src1$44[29] nq=$abc$109383$new_n35170_
-.subckt a2_x2 i0=$abc$109383$new_n29377_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n35171_
-.subckt nxr2_x1 i0=$abc$109383$new_n35171_ i1=$abc$109383$new_n35170_ nq=$abc$109383$new_n35172_
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 .subckt nand4_x0 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29235_ i2=$abc$109383$new_n29300_ i3=$abc$109383$new_n29333_ nq=$abc$109383$new_n35174_
 .subckt nand2_x0 i0=$abc$109383$new_n29235_ i1=$abc$109383$new_n29299_ nq=$abc$109383$new_n35175_
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 .subckt nand2_x0 i0=$abc$109383$new_n29245_ i1=$abc$109383$new_n29422_ nq=$abc$109383$new_n35178_
 .subckt nand2_x0 i0=$abc$109383$new_n34218_ i1=$abc$109383$new_n29299_ nq=$abc$109383$new_n35179_
-.subckt a2_x2 i0=$abc$109383$new_n29235_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n35180_
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 .subckt nand4_x0 i0=$abc$109383$new_n34901_ i1=$abc$109383$new_n34900_ i2=$abc$109383$new_n29536_ i3=$abc$109383$new_n29562_ nq=$abc$109383$new_n35187_
-.subckt a2_x2 i0=$abc$109383$new_n34903_ i1=$abc$109383$new_n34589_ q=$abc$109383$new_n35188_
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 .subckt nand2_x0 i0=$abc$109383$new_n34928_ i1=$abc$109383$new_n35190_ nq=$abc$109383$new_n35191_
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 .subckt buf_x4 i=$abc$109383$new_n34575_ q=$abc$109383$new_n35194_
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 .subckt nand2_x0 i0=$abc$109383$new_n34912_ i1=$abc$109383$new_n34645_ nq=$abc$109383$new_n35196_
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 .subckt nand2_x0 i0=$abc$109383$new_n35197_ i1=$abc$109383$new_n34910_ nq=$abc$109383$new_n35198_
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 .subckt nand2_x0 i0=$abc$109383$new_n34900_ i1=$abc$109383$new_n29512_ nq=$abc$109383$new_n35204_
 .subckt nand2_x0 i0=$abc$109383$new_n35204_ i1=$abc$109383$new_n34907_ nq=$abc$109383$new_n35205_
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 .subckt nand2_x0 i0=$abc$109383$new_n33983_ i1=$abc$109383$new_n29333_ nq=$abc$109383$new_n35207_
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 .subckt nand4_x0 i0=$abc$109383$new_n33978_ i1=$abc$109383$new_n34575_ i2=$abc$109383$new_n29586_ i3=$abc$109383$new_n29612_ nq=$abc$109383$new_n35212_
 .subckt nand2_x0 i0=$abc$109383$new_n34575_ i1=$abc$109383$new_n29585_ nq=$abc$109383$new_n35213_
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+.subckt or21nand_x1 i0=$abc$109383$new_n35370_ i1=$abc$109383$new_n35380_ i2=$abc$109383$new_n35378_ nq=$abc$109383$new_n35381_
 .subckt nand2_x0 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29351_ nq=$abc$109383$new_n35382_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29295_ nq=$abc$109383$new_n35383_
-.subckt a2_x2 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29328_ q=$abc$109383$new_n35384_
-.subckt nxr2_x1 i0=$abc$109383$new_n35384_ i1=$abc$109383$new_n35383_ nq=$abc$109383$new_n35385_
-.subckt nxr2_x1 i0=$abc$109383$new_n35385_ i1=$abc$109383$new_n35382_ nq=$abc$109383$new_n35386_
+.subckt and2_x1 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29328_ q=$abc$109383$new_n35384_
+.subckt nexor2_x0 i0=$abc$109383$new_n35384_ i1=$abc$109383$new_n35383_ nq=$abc$109383$new_n35385_
+.subckt nexor2_x0 i0=$abc$109383$new_n35385_ i1=$abc$109383$new_n35382_ nq=$abc$109383$new_n35386_
 .subckt nand4_x0 i0=$abc$109383$new_n35364_ i1=$abc$109383$new_n35048_ i2=$abc$109383$new_n29394_ i3=$abc$109383$new_n29450_ nq=$abc$109383$new_n35387_
 .subckt nand2_x0 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n29394_ nq=$abc$109383$new_n35388_
-.subckt a2_x2 i0=$abc$109383$new_n35388_ i1=$abc$109383$new_n35075_ q=$abc$109383$new_n35389_
+.subckt and2_x1 i0=$abc$109383$new_n35388_ i1=$abc$109383$new_n35075_ q=$abc$109383$new_n35389_
 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29419_ nq=$abc$109383$new_n35390_
-.subckt ao22_x2 i0=$abc$109383$new_n35390_ i1=$abc$109383$new_n35389_ i2=$abc$109383$new_n35387_ q=$abc$109383$new_n35391_
-.subckt nxr2_x1 i0=$abc$109383$new_n35391_ i1=$abc$109383$new_n35386_ nq=$abc$109383$new_n35392_
-.subckt nxr2_x1 i0=$abc$109383$new_n35392_ i1=$abc$109383$new_n35381_ nq=$abc$109383$new_n35393_
-.subckt nxr2_x1 i0=$abc$109383$new_n35077_ i1=$abc$109383$new_n35390_ nq=$abc$109383$new_n35394_
+.subckt and21nor_x1 i0=$abc$109383$new_n35390_ i1=$abc$109383$new_n35389_ i2=$abc$109383$new_n35387_ nq=$abc$109383$new_n35391_
+.subckt nexor2_x0 i0=$abc$109383$new_n35391_ i1=$abc$109383$new_n35386_ nq=$abc$109383$new_n35392_
+.subckt nexor2_x0 i0=$abc$109383$new_n35392_ i1=$abc$109383$new_n35381_ nq=$abc$109383$new_n35393_
+.subckt nexor2_x0 i0=$abc$109383$new_n35077_ i1=$abc$109383$new_n35390_ nq=$abc$109383$new_n35394_
 .subckt nand2_x0 i0=$abc$109383$new_n35081_ i1=$abc$109383$new_n35394_ nq=$abc$109383$new_n35395_
-.subckt a2_x2 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29273_ q=$abc$109383$new_n35396_
+.subckt and2_x1 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29273_ q=$abc$109383$new_n35396_
 .subckt nand2_x0 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n29393_ nq=$abc$109383$new_n35397_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29419_ q=$abc$109383$new_n35398_
-.subckt nxr2_x1 i0=$abc$109383$new_n35398_ i1=$abc$109383$new_n35397_ nq=$abc$109383$new_n35399_
-.subckt nxr2_x1 i0=$abc$109383$new_n35399_ i1=$abc$109383$new_n35396_ nq=$abc$109383$new_n35400_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29419_ q=$abc$109383$new_n35398_
+.subckt nexor2_x0 i0=$abc$109383$new_n35398_ i1=$abc$109383$new_n35397_ nq=$abc$109383$new_n35399_
+.subckt nexor2_x0 i0=$abc$109383$new_n35399_ i1=$abc$109383$new_n35396_ nq=$abc$109383$new_n35400_
 .subckt nand2_x0 i0=$abc$109383$new_n35080_ i1=$abc$109383$new_n29450_ nq=$abc$109383$new_n35401_
 .subckt buf_x4 i=soc.cpu.minerva.payload__src2$45[31] q=$abc$109383$new_n35402_
-.subckt a2_x2 i0=$abc$109383$new_n35402_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n35403_
-.subckt nxr2_x1 i0=$abc$109383$new_n35403_ i1=$abc$109383$new_n35401_ nq=$abc$109383$new_n35404_
-.subckt nxr2_x1 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35400_ nq=$abc$109383$new_n35405_
-.subckt nxr2_x1 i0=$abc$109383$new_n35405_ i1=$abc$109383$new_n35395_ nq=$abc$109383$new_n35406_
-.subckt nxr2_x1 i0=$abc$109383$new_n35406_ i1=$abc$109383$new_n35393_ nq=$abc$109383$new_n35407_
-.subckt nxr2_x1 i0=$abc$109383$new_n35407_ i1=$abc$109383$new_n35376_ nq=$abc$109383$new_n35408_
-.subckt nxr2_x1 i0=$abc$109383$new_n35408_ i1=$abc$109383$new_n35375_ nq=$abc$109383$new_n35409_
-.subckt nxr2_x1 i0=$abc$109383$new_n35409_ i1=$abc$109383$new_n35338_ nq=$abc$109383$new_n35410_
-.subckt nxr2_x1 i0=$abc$109383$new_n35410_ i1=$abc$109383$new_n35327_ nq=$abc$109383$new_n35411_
-.subckt nxr2_x1 i0=$abc$109383$new_n35411_ i1=$abc$109383$new_n35268_ nq=$abc$109383$new_n35412_
-.subckt nxr2_x1 i0=$abc$109383$new_n35412_ i1=$abc$109383$new_n35258_ nq=$abc$109383$new_n35413_
-.subckt nxr2_x1 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35150_ nq=$abc$109383$new_n35414_
-.subckt nxr2_x1 i0=$abc$109383$new_n35414_ i1=$abc$109383$new_n35145_ nq=$abc$109383$new_n35415_
-.subckt nxr2_x1 i0=$abc$109383$new_n35415_ i1=$abc$109383$new_n35126_ nq=$abc$109383$new_n35416_
-.subckt nxr2_x1 i0=$abc$109383$new_n35416_ i1=$abc$109383$new_n35114_ nq=$abc$109383$new_n35417_
-.subckt nxr2_x1 i0=$abc$109383$new_n35417_ i1=$abc$109383$new_n35109_ nq=$abc$109383$new_n35418_
+.subckt and2_x1 i0=$abc$109383$new_n35402_ i1=$abc$109383$new_n33586_ q=$abc$109383$new_n35403_
+.subckt nexor2_x0 i0=$abc$109383$new_n35403_ i1=$abc$109383$new_n35401_ nq=$abc$109383$new_n35404_
+.subckt nexor2_x0 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35400_ nq=$abc$109383$new_n35405_
+.subckt nexor2_x0 i0=$abc$109383$new_n35405_ i1=$abc$109383$new_n35395_ nq=$abc$109383$new_n35406_
+.subckt nexor2_x0 i0=$abc$109383$new_n35406_ i1=$abc$109383$new_n35393_ nq=$abc$109383$new_n35407_
+.subckt nexor2_x0 i0=$abc$109383$new_n35407_ i1=$abc$109383$new_n35376_ nq=$abc$109383$new_n35408_
+.subckt nexor2_x0 i0=$abc$109383$new_n35408_ i1=$abc$109383$new_n35375_ nq=$abc$109383$new_n35409_
+.subckt nexor2_x0 i0=$abc$109383$new_n35409_ i1=$abc$109383$new_n35338_ nq=$abc$109383$new_n35410_
+.subckt nexor2_x0 i0=$abc$109383$new_n35410_ i1=$abc$109383$new_n35327_ nq=$abc$109383$new_n35411_
+.subckt nexor2_x0 i0=$abc$109383$new_n35411_ i1=$abc$109383$new_n35268_ nq=$abc$109383$new_n35412_
+.subckt nexor2_x0 i0=$abc$109383$new_n35412_ i1=$abc$109383$new_n35258_ nq=$abc$109383$new_n35413_
+.subckt nexor2_x0 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35150_ nq=$abc$109383$new_n35414_
+.subckt nexor2_x0 i0=$abc$109383$new_n35414_ i1=$abc$109383$new_n35145_ nq=$abc$109383$new_n35415_
+.subckt nexor2_x0 i0=$abc$109383$new_n35415_ i1=$abc$109383$new_n35126_ nq=$abc$109383$new_n35416_
+.subckt nexor2_x0 i0=$abc$109383$new_n35416_ i1=$abc$109383$new_n35114_ nq=$abc$109383$new_n35417_
+.subckt nexor2_x0 i0=$abc$109383$new_n35417_ i1=$abc$109383$new_n35109_ nq=$abc$109383$new_n35418_
 .subckt nand3_x0 i0=$abc$109383$new_n35418_ i1=$abc$109383$new_n35103_ i2=$abc$109383$new_n35102_ nq=$abc$109383$new_n35419_
-.subckt oa22_x2 i0=$abc$109383$new_n35102_ i1=$abc$109383$new_n35103_ i2=$abc$109383$new_n35418_ q=$abc$109383$new_n35420_
+.subckt or21nand_x1 i0=$abc$109383$new_n35102_ i1=$abc$109383$new_n35103_ i2=$abc$109383$new_n35418_ nq=$abc$109383$new_n35420_
 .subckt nand3_x0 i0=$abc$109383$new_n35420_ i1=$abc$109383$new_n35419_ i2=$abc$109383$new_n35099_ nq=$abc$109383$new_n35421_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[31] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n35422_
-.subckt a2_x2 i0=$abc$109383$new_n35422_ i1=$abc$109383$new_n35421_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102882
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[31] i2=$abc$109383$new_n31806_ nq=$abc$109383$new_n35422_
+.subckt and2_x1 i0=$abc$109383$new_n35422_ i1=$abc$109383$new_n35421_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102882
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[32] nq=$abc$109383$new_n35424_
-.subckt ao22_x2 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n35424_ q=$abc$109383$new_n35425_
+.subckt and21nor_x1 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n35424_ nq=$abc$109383$new_n35425_
 .subckt nor2_x0 i0=$abc$109383$new_n35425_ i1=$abc$109383$new_n31335_ nq=$abc$109383$new_n35426_
-.subckt a2_x2 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n35105_ q=$abc$109383$new_n35427_
-.subckt oa22_x2 i0=$abc$109383$new_n34824_ i1=$abc$109383$new_n35092_ i2=$abc$109383$new_n35427_ q=$abc$109383$new_n35428_
-.subckt a2_x2 i0=$abc$109383$new_n35113_ i1=$abc$109383$new_n35111_ q=$abc$109383$new_n35429_
+.subckt and2_x1 i0=$abc$109383$new_n35091_ i1=$abc$109383$new_n35105_ q=$abc$109383$new_n35427_
+.subckt or21nand_x1 i0=$abc$109383$new_n34824_ i1=$abc$109383$new_n35092_ i2=$abc$109383$new_n35427_ nq=$abc$109383$new_n35428_
+.subckt and2_x1 i0=$abc$109383$new_n35113_ i1=$abc$109383$new_n35111_ q=$abc$109383$new_n35429_
 .subckt nand2_x0 i0=$abc$109383$new_n35416_ i1=$abc$109383$new_n35429_ nq=$abc$109383$new_n35430_
-.subckt a2_x2 i0=$abc$109383$new_n34769_ i1=$abc$109383$new_n35120_ q=$abc$109383$new_n35431_
-.subckt ao22_x2 i0=$abc$109383$new_n35123_ i1=$abc$109383$new_n35431_ i2=$abc$109383$new_n35089_ q=$abc$109383$new_n35432_
-.subckt nxr2_x1 i0=$abc$109383$new_n34844_ i1=$abc$109383$new_n35111_ nq=$abc$109383$new_n35433_
-.subckt oa22_x2 i0=$abc$109383$new_n35433_ i1=$abc$109383$new_n35090_ i2=$abc$109383$new_n35432_ q=$abc$109383$new_n35434_
-.subckt nxr2_x1 i0=$abc$109383$new_n35415_ i1=$abc$109383$new_n35434_ nq=$abc$109383$new_n35435_
+.subckt and2_x1 i0=$abc$109383$new_n34769_ i1=$abc$109383$new_n35120_ q=$abc$109383$new_n35431_
+.subckt and21nor_x1 i0=$abc$109383$new_n35123_ i1=$abc$109383$new_n35431_ i2=$abc$109383$new_n35089_ nq=$abc$109383$new_n35432_
+.subckt nexor2_x0 i0=$abc$109383$new_n34844_ i1=$abc$109383$new_n35111_ nq=$abc$109383$new_n35433_
+.subckt or21nand_x1 i0=$abc$109383$new_n35433_ i1=$abc$109383$new_n35090_ i2=$abc$109383$new_n35432_ nq=$abc$109383$new_n35434_
+.subckt nexor2_x0 i0=$abc$109383$new_n35415_ i1=$abc$109383$new_n35434_ nq=$abc$109383$new_n35435_
 .subckt nand2_x0 i0=$abc$109383$new_n35435_ i1=$abc$109383$new_n35114_ nq=$abc$109383$new_n35436_
-.subckt oa22_x2 i0=$abc$109383$new_n35436_ i1=$abc$109383$new_n35430_ i2=$abc$109383$new_n35428_ q=$abc$109383$new_n35437_
-.subckt a3_x2 i0=$abc$109383$new_n35436_ i1=$abc$109383$new_n35430_ i2=$abc$109383$new_n35428_ q=$abc$109383$new_n35438_
+.subckt or21nand_x1 i0=$abc$109383$new_n35436_ i1=$abc$109383$new_n35430_ i2=$abc$109383$new_n35428_ nq=$abc$109383$new_n35437_
+.subckt and3_x1 i0=$abc$109383$new_n35436_ i1=$abc$109383$new_n35430_ i2=$abc$109383$new_n35428_ q=$abc$109383$new_n35438_
 .subckt nor2_x0 i0=$abc$109383$new_n35093_ i1=$abc$109383$new_n35101_ nq=$abc$109383$new_n35439_
-.subckt ao22_x2 i0=$abc$109383$new_n35439_ i1=$abc$109383$new_n35438_ i2=$abc$109383$new_n35437_ q=$abc$109383$new_n35440_
-.subckt a2_x2 i0=$abc$109383$new_n35418_ i1=$abc$109383$new_n35094_ q=$abc$109383$new_n35441_
-.subckt oa22_x2 i0=$abc$109383$new_n34805_ i1=$abc$109383$new_n35441_ i2=$abc$109383$new_n35440_ q=$abc$109383$new_n35442_
-.subckt a2_x2 i0=$abc$109383$new_n34883_ i1=$abc$109383$new_n35131_ q=$abc$109383$new_n35443_
-.subckt oa22_x2 i0=$abc$109383$new_n34858_ i1=$abc$109383$new_n34884_ i2=$abc$109383$new_n35443_ q=$abc$109383$new_n35444_
-.subckt nxr2_x1 i0=$abc$109383$new_n35144_ i1=$abc$109383$new_n35444_ nq=$abc$109383$new_n35445_
+.subckt and21nor_x1 i0=$abc$109383$new_n35439_ i1=$abc$109383$new_n35438_ i2=$abc$109383$new_n35437_ nq=$abc$109383$new_n35440_
+.subckt and2_x1 i0=$abc$109383$new_n35418_ i1=$abc$109383$new_n35094_ q=$abc$109383$new_n35441_
+.subckt or21nand_x1 i0=$abc$109383$new_n34805_ i1=$abc$109383$new_n35441_ i2=$abc$109383$new_n35440_ nq=$abc$109383$new_n35442_
+.subckt and2_x1 i0=$abc$109383$new_n34883_ i1=$abc$109383$new_n35131_ q=$abc$109383$new_n35443_
+.subckt or21nand_x1 i0=$abc$109383$new_n34858_ i1=$abc$109383$new_n34884_ i2=$abc$109383$new_n35443_ nq=$abc$109383$new_n35444_
+.subckt nexor2_x0 i0=$abc$109383$new_n35144_ i1=$abc$109383$new_n35444_ nq=$abc$109383$new_n35445_
 .subckt nand2_x0 i0=$abc$109383$new_n35414_ i1=$abc$109383$new_n35445_ nq=$abc$109383$new_n35446_
-.subckt a3_x2 i0=$abc$109383$new_n34767_ i1=$abc$109383$new_n34949_ i2=$abc$109383$new_n34948_ q=$abc$109383$new_n35447_
-.subckt a2_x2 i0=$abc$109383$new_n34766_ i1=$abc$109383$new_n34946_ q=$abc$109383$new_n35448_
-.subckt ao22_x2 i0=$abc$109383$new_n35448_ i1=$abc$109383$new_n35447_ i2=$abc$109383$new_n35087_ q=$abc$109383$new_n35449_
-.subckt oa22_x2 i0=$abc$109383$new_n35118_ i1=$abc$109383$new_n35088_ i2=$abc$109383$new_n35449_ q=$abc$109383$new_n35450_
-.subckt nxr2_x1 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35450_ nq=$abc$109383$new_n35451_
+.subckt and3_x1 i0=$abc$109383$new_n34767_ i1=$abc$109383$new_n34949_ i2=$abc$109383$new_n34948_ q=$abc$109383$new_n35447_
+.subckt and2_x1 i0=$abc$109383$new_n34766_ i1=$abc$109383$new_n34946_ q=$abc$109383$new_n35448_
+.subckt and21nor_x1 i0=$abc$109383$new_n35448_ i1=$abc$109383$new_n35447_ i2=$abc$109383$new_n35087_ nq=$abc$109383$new_n35449_
+.subckt or21nand_x1 i0=$abc$109383$new_n35118_ i1=$abc$109383$new_n35088_ i2=$abc$109383$new_n35449_ nq=$abc$109383$new_n35450_
+.subckt nexor2_x0 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35450_ nq=$abc$109383$new_n35451_
 .subckt nand2_x0 i0=$abc$109383$new_n35451_ i1=$abc$109383$new_n35145_ nq=$abc$109383$new_n35452_
-.subckt a3_x2 i0=$abc$109383$new_n35452_ i1=$abc$109383$new_n35446_ i2=$abc$109383$new_n35434_ q=$abc$109383$new_n35453_
-.subckt oa22_x2 i0=$abc$109383$new_n35429_ i1=$abc$109383$new_n35416_ i2=$abc$109383$new_n35453_ q=$abc$109383$new_n35454_
-.subckt a2_x2 i0=$abc$109383$new_n35139_ i1=$abc$109383$new_n34932_ q=$abc$109383$new_n35455_
-.subckt oa22_x2 i0=$abc$109383$new_n34853_ i1=$abc$109383$new_n34941_ i2=$abc$109383$new_n35455_ q=$abc$109383$new_n35456_
+.subckt and3_x1 i0=$abc$109383$new_n35452_ i1=$abc$109383$new_n35446_ i2=$abc$109383$new_n35434_ q=$abc$109383$new_n35453_
+.subckt or21nand_x1 i0=$abc$109383$new_n35429_ i1=$abc$109383$new_n35416_ i2=$abc$109383$new_n35453_ nq=$abc$109383$new_n35454_
+.subckt and2_x1 i0=$abc$109383$new_n35139_ i1=$abc$109383$new_n34932_ q=$abc$109383$new_n35455_
+.subckt or21nand_x1 i0=$abc$109383$new_n34853_ i1=$abc$109383$new_n34941_ i2=$abc$109383$new_n35455_ nq=$abc$109383$new_n35456_
 .subckt nand2_x0 i0=$abc$109383$new_n35456_ i1=$abc$109383$new_n35444_ nq=$abc$109383$new_n35457_
 .subckt nand2_x0 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35450_ nq=$abc$109383$new_n35458_
-.subckt ao22_x2 i0=$abc$109383$new_n35145_ i1=$abc$109383$new_n35451_ i2=$abc$109383$new_n35458_ q=$abc$109383$new_n35459_
-.subckt a2_x2 i0=$abc$109383$new_n34881_ i1=$abc$109383$new_n35163_ q=$abc$109383$new_n35460_
+.subckt and21nor_x1 i0=$abc$109383$new_n35145_ i1=$abc$109383$new_n35451_ i2=$abc$109383$new_n35458_ nq=$abc$109383$new_n35459_
+.subckt and2_x1 i0=$abc$109383$new_n34881_ i1=$abc$109383$new_n35163_ q=$abc$109383$new_n35460_
 .subckt nand2_x0 i0=$abc$109383$new_n35166_ i1=$abc$109383$new_n34876_ nq=$abc$109383$new_n35461_
 .subckt nand2_x0 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29454_ nq=$abc$109383$new_n35462_
-.subckt nxr2_x1 i0=$abc$109383$new_n34871_ i1=$abc$109383$new_n35462_ nq=$abc$109383$new_n35463_
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-.subckt a2_x2 i0=$abc$109383$new_n35184_ i1=$abc$109383$new_n35464_ q=$abc$109383$new_n35465_
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+.subckt and2_x1 i0=$abc$109383$new_n35184_ i1=$abc$109383$new_n35464_ q=$abc$109383$new_n35465_
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 .subckt nand4_x0 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29380_ i2=$abc$109383$new_n29398_ i3=$abc$109383$new_n29425_ nq=$abc$109383$new_n35467_
-.subckt a2_x2 i0=$abc$109383$new_n35157_ i1=$abc$109383$new_n34869_ q=$abc$109383$new_n35468_
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-.subckt nxr2_x1 i0=$abc$109383$new_n35185_ i1=$abc$109383$new_n35469_ nq=$abc$109383$new_n35470_
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+.subckt nexor2_x0 i0=$abc$109383$new_n35185_ i1=$abc$109383$new_n35469_ nq=$abc$109383$new_n35470_
 .subckt nand2_x0 i0=$abc$109383$new_n35230_ i1=$abc$109383$new_n35470_ nq=$abc$109383$new_n35471_
-.subckt a2_x2 i0=$abc$109383$new_n34928_ i1=$abc$109383$new_n35190_ q=$abc$109383$new_n35472_
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 .subckt nand2_x0 i0=$abc$109383$new_n34597_ i1=$abc$109383$new_n34897_ nq=$abc$109383$new_n35474_
-.subckt oa22_x2 i0=$abc$109383$new_n34612_ i1=$abc$109383$new_n35474_ i2=$abc$109383$new_n35473_ q=$abc$109383$new_n35475_
-.subckt oa22_x2 i0=$abc$109383$new_n35475_ i1=$abc$109383$new_n34929_ i2=$abc$109383$new_n35472_ q=$abc$109383$new_n35476_
-.subckt nxr2_x1 i0=$abc$109383$new_n35229_ i1=$abc$109383$new_n35476_ nq=$abc$109383$new_n35477_
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+.subckt or21nand_x1 i0=$abc$109383$new_n35475_ i1=$abc$109383$new_n34929_ i2=$abc$109383$new_n35472_ nq=$abc$109383$new_n35476_
+.subckt nexor2_x0 i0=$abc$109383$new_n35229_ i1=$abc$109383$new_n35476_ nq=$abc$109383$new_n35477_
 .subckt nand2_x0 i0=$abc$109383$new_n35477_ i1=$abc$109383$new_n35186_ nq=$abc$109383$new_n35478_
-.subckt a3_x2 i0=$abc$109383$new_n35005_ i1=$abc$109383$new_n34999_ i2=$abc$109383$new_n34998_ q=$abc$109383$new_n35479_
-.subckt oa22_x2 i0=$abc$109383$new_n34953_ i1=$abc$109383$new_n35007_ i2=$abc$109383$new_n35479_ q=$abc$109383$new_n35480_
+.subckt and3_x1 i0=$abc$109383$new_n35005_ i1=$abc$109383$new_n34999_ i2=$abc$109383$new_n34998_ q=$abc$109383$new_n35479_
+.subckt or21nand_x1 i0=$abc$109383$new_n34953_ i1=$abc$109383$new_n35007_ i2=$abc$109383$new_n35479_ nq=$abc$109383$new_n35480_
 .subckt nand3_x0 i0=$abc$109383$new_n35480_ i1=$abc$109383$new_n35478_ i2=$abc$109383$new_n35471_ nq=$abc$109383$new_n35481_
-.subckt nxr2_x1 i0=$abc$109383$new_n35230_ i1=$abc$109383$new_n35470_ nq=$abc$109383$new_n35482_
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 .subckt nand2_x0 i0=$abc$109383$new_n34930_ i1=$abc$109383$new_n35152_ nq=$abc$109383$new_n35484_
-.subckt nxr2_x1 i0=$abc$109383$new_n34930_ i1=$abc$109383$new_n35152_ nq=$abc$109383$new_n35485_
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-.subckt ao22_x2 i0=$abc$109383$new_n35486_ i1=$abc$109383$new_n35483_ i2=$abc$109383$new_n35481_ q=$abc$109383$new_n35487_
-.subckt nxr2_x1 i0=$abc$109383$new_n35487_ i1=$abc$109383$new_n35466_ nq=$abc$109383$new_n35488_
-.subckt a2_x2 i0=soc.cpu.minerva.multiplier.x_src2_signed i1=soc.cpu.minerva.payload__src2$45[31] q=$abc$109383$new_n35489_
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+.subckt and21nor_x1 i0=$abc$109383$new_n34885_ i1=$abc$109383$new_n35485_ i2=$abc$109383$new_n35484_ nq=$abc$109383$new_n35486_
+.subckt and21nor_x1 i0=$abc$109383$new_n35486_ i1=$abc$109383$new_n35483_ i2=$abc$109383$new_n35481_ nq=$abc$109383$new_n35487_
+.subckt nexor2_x0 i0=$abc$109383$new_n35487_ i1=$abc$109383$new_n35466_ nq=$abc$109383$new_n35488_
+.subckt and2_x1 i0=soc.cpu.minerva.multiplier.x_src2_signed i1=soc.cpu.minerva.payload__src2$45[31] q=$abc$109383$new_n35489_
 .subckt buf_x4 i=$abc$109383$new_n35489_ q=$abc$109383$new_n35490_
 .subckt buf_x4 i=$abc$109383$new_n35490_ q=$abc$109383$new_n35491_
 .subckt buf_x4 i=$abc$109383$new_n35491_ q=$abc$109383$new_n35492_
 .subckt buf_x4 i=$abc$109383$new_n35492_ q=$abc$109383$new_n35493_
 .subckt buf_x4 i=$abc$109383$new_n35493_ q=$abc$109383$new_n35494_
 .subckt buf_x4 i=$abc$109383$new_n35494_ q=$abc$109383$new_n35495_
-.subckt nxr2_x1 i0=$abc$109383$new_n35495_ i1=$abc$109383$new_n35488_ nq=$abc$109383$new_n35496_
-.subckt a2_x2 i0=$abc$109383$new_n34765_ i1=$abc$109383$new_n35264_ q=$abc$109383$new_n35497_
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-.subckt oa22_x2 i0=$abc$109383$new_n35146_ i1=$abc$109383$new_n35086_ i2=$abc$109383$new_n35499_ q=$abc$109383$new_n35500_
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 .subckt nand2_x0 i0=$abc$109383$new_n35411_ i1=$abc$109383$new_n35500_ nq=$abc$109383$new_n35501_
 .subckt nand2_x0 i0=$abc$109383$new_n35257_ i1=$abc$109383$new_n35154_ nq=$abc$109383$new_n35502_
 .subckt nand2_x0 i0=$abc$109383$new_n35483_ i1=$abc$109383$new_n35486_ nq=$abc$109383$new_n35503_
 .subckt nand3_x0 i0=$abc$109383$new_n35412_ i1=$abc$109383$new_n35503_ i2=$abc$109383$new_n35502_ nq=$abc$109383$new_n35504_
-.subckt a2_x2 i0=$abc$109383$new_n35504_ i1=$abc$109383$new_n35501_ q=$abc$109383$new_n35505_
-.subckt a2_x2 i0=$abc$109383$new_n35197_ i1=$abc$109383$new_n34910_ q=$abc$109383$new_n35506_
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 .subckt nand2_x0 i0=$abc$109383$new_n34915_ i1=$abc$109383$new_n35200_ nq=$abc$109383$new_n35507_
-.subckt oa22_x2 i0=$abc$109383$new_n34905_ i1=$abc$109383$new_n35507_ i2=$abc$109383$new_n35506_ q=$abc$109383$new_n35508_
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 .subckt nand2_x0 i0=$abc$109383$new_n35228_ i1=$abc$109383$new_n35508_ nq=$abc$109383$new_n35509_
 .subckt buf_x4 i=$abc$109383$new_n34900_ q=$abc$109383$new_n35510_
 .subckt buf_x4 i=$abc$109383$new_n34901_ q=$abc$109383$new_n35511_
 .subckt nand4_x0 i0=$abc$109383$new_n35511_ i1=$abc$109383$new_n35510_ i2=$abc$109383$new_n29514_ i3=$abc$109383$new_n29537_ nq=$abc$109383$new_n35512_
-.subckt a2_x2 i0=$abc$109383$new_n35204_ i1=$abc$109383$new_n34907_ q=$abc$109383$new_n35513_
-.subckt ao22_x2 i0=$abc$109383$new_n34906_ i1=$abc$109383$new_n35513_ i2=$abc$109383$new_n35512_ q=$abc$109383$new_n35514_
-.subckt nxr2_x1 i0=$abc$109383$new_n35217_ i1=$abc$109383$new_n35514_ nq=$abc$109383$new_n35515_
-.subckt nxr2_x1 i0=$abc$109383$new_n35227_ i1=$abc$109383$new_n35515_ nq=$abc$109383$new_n35516_
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 .subckt nand2_x0 i0=$abc$109383$new_n35516_ i1=$abc$109383$new_n35202_ nq=$abc$109383$new_n35517_
-.subckt a3_x2 i0=$abc$109383$new_n35517_ i1=$abc$109383$new_n35509_ i2=$abc$109383$new_n35476_ q=$abc$109383$new_n35518_
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-.subckt a4_x2 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29379_ i2=$abc$109383$new_n29454_ i3=$abc$109383$new_n29398_ q=$abc$109383$new_n35520_
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+.subckt and4_x1 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29379_ i2=$abc$109383$new_n29454_ i3=$abc$109383$new_n29398_ q=$abc$109383$new_n35520_
 .subckt nand2_x0 i0=$abc$109383$new_n29379_ i1=$abc$109383$new_n29455_ nq=$abc$109383$new_n35521_
 .subckt nand2_x0 i0=$abc$109383$new_n35521_ i1=$abc$109383$new_n35170_ nq=$abc$109383$new_n35522_
-.subckt oa22_x2 i0=$abc$109383$new_n35169_ i1=$abc$109383$new_n35522_ i2=$abc$109383$new_n35520_ q=$abc$109383$new_n35523_
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 .subckt buf_x4 i=$abc$109383$new_n34859_ q=$abc$109383$new_n35524_
-.subckt a4_x2 i0=$abc$109383$new_n35524_ i1=$abc$109383$new_n29236_ i2=$abc$109383$new_n34523_ i3=$abc$109383$new_n29334_ q=$abc$109383$new_n35525_
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 .subckt nand2_x0 i0=$abc$109383$new_n35175_ i1=$abc$109383$new_n34878_ nq=$abc$109383$new_n35526_
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 .subckt nand2_x0 i0=$abc$109383$new_n35182_ i1=$abc$109383$new_n35527_ nq=$abc$109383$new_n35528_
-.subckt a2_x2 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n29423_ q=$abc$109383$new_n35529_
-.subckt nxr2_x1 i0=$abc$109383$new_n35181_ i1=$abc$109383$new_n35529_ nq=$abc$109383$new_n35530_
-.subckt a2_x2 i0=$abc$109383$new_n35530_ i1=$abc$109383$new_n35177_ q=$abc$109383$new_n35531_
-.subckt ao22_x2 i0=$abc$109383$new_n35173_ i1=$abc$109383$new_n35531_ i2=$abc$109383$new_n35528_ q=$abc$109383$new_n35532_
+.subckt and2_x1 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n29423_ q=$abc$109383$new_n35529_
+.subckt nexor2_x0 i0=$abc$109383$new_n35181_ i1=$abc$109383$new_n35529_ nq=$abc$109383$new_n35530_
+.subckt and2_x1 i0=$abc$109383$new_n35530_ i1=$abc$109383$new_n35177_ q=$abc$109383$new_n35531_
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 .subckt buf_x4 i=soc.cpu.minerva.payload__src1$44[31] q=$abc$109383$new_n35533_
-.subckt a3_x2 i0=$abc$109383$new_n30279_ i1=$abc$109383$new_n29316_ i2=$abc$109383$new_n35533_ q=$abc$109383$new_n35534_
+.subckt and3_x1 i0=$abc$109383$new_n30279_ i1=$abc$109383$new_n29316_ i2=$abc$109383$new_n35533_ q=$abc$109383$new_n35534_
 .subckt nand2_x0 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29453_ nq=$abc$109383$new_n35535_
-.subckt a2_x2 i0=$abc$109383$new_n29378_ i1=$abc$109383$new_n35533_ q=$abc$109383$new_n35536_
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-.subckt nxr2_x1 i0=$abc$109383$new_n35537_ i1=$abc$109383$new_n35534_ nq=$abc$109383$new_n35538_
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 .subckt nand4_x0 i0=$abc$109383$new_n34859_ i1=$abc$109383$new_n35160_ i2=$abc$109383$new_n29276_ i3=$abc$109383$new_n29300_ nq=$abc$109383$new_n35539_
 .subckt nand2_x0 i0=$abc$109383$new_n35160_ i1=$abc$109383$new_n29276_ nq=$abc$109383$new_n35540_
-.subckt a2_x2 i0=$abc$109383$new_n35540_ i1=$abc$109383$new_n35179_ q=$abc$109383$new_n35541_
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+.subckt and2_x1 i0=$abc$109383$new_n35540_ i1=$abc$109383$new_n35179_ q=$abc$109383$new_n35541_
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 .subckt nand2_x0 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n29397_ nq=$abc$109383$new_n35543_
 .subckt nand2_x0 i0=$abc$109383$new_n34859_ i1=$abc$109383$new_n29276_ nq=$abc$109383$new_n35544_
-.subckt a2_x2 i0=$abc$109383$new_n29235_ i1=$abc$109383$new_n29422_ q=$abc$109383$new_n35545_
-.subckt nxr2_x1 i0=$abc$109383$new_n35545_ i1=$abc$109383$new_n35544_ nq=$abc$109383$new_n35546_
-.subckt nxr2_x1 i0=$abc$109383$new_n35546_ i1=$abc$109383$new_n35543_ nq=$abc$109383$new_n35547_
-.subckt nxr2_x1 i0=$abc$109383$new_n35547_ i1=$abc$109383$new_n35542_ nq=$abc$109383$new_n35548_
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 .subckt nand4_x0 i0=$abc$109383$new_n35331_ i1=$abc$109383$new_n35330_ i2=$abc$109383$new_n29297_ i3=$abc$109383$new_n29274_ nq=$abc$109383$new_n35720_
-.subckt a2_x2 i0=$abc$109383$new_n35379_ i1=$abc$109383$new_n35064_ q=$abc$109383$new_n35721_
-.subckt ao22_x2 i0=$abc$109383$new_n35063_ i1=$abc$109383$new_n35721_ i2=$abc$109383$new_n35720_ q=$abc$109383$new_n35722_
-.subckt ao22_x2 i0=$abc$109383$new_n35722_ i1=$abc$109383$new_n35719_ i2=$abc$109383$new_n35715_ q=$abc$109383$new_n35723_
-.subckt nxr2_x1 i0=$abc$109383$new_n35723_ i1=$abc$109383$new_n35711_ nq=$abc$109383$new_n35724_
-.subckt nxr2_x1 i0=$abc$109383$new_n35724_ i1=$abc$109383$new_n35695_ nq=$abc$109383$new_n35725_
-.subckt a2_x2 i0=$abc$109383$new_n35081_ i1=$abc$109383$new_n35394_ q=$abc$109383$new_n35726_
+.subckt and2_x1 i0=$abc$109383$new_n35379_ i1=$abc$109383$new_n35064_ q=$abc$109383$new_n35721_
+.subckt and21nor_x1 i0=$abc$109383$new_n35063_ i1=$abc$109383$new_n35721_ i2=$abc$109383$new_n35720_ nq=$abc$109383$new_n35722_
+.subckt and21nor_x1 i0=$abc$109383$new_n35722_ i1=$abc$109383$new_n35719_ i2=$abc$109383$new_n35715_ nq=$abc$109383$new_n35723_
+.subckt nexor2_x0 i0=$abc$109383$new_n35723_ i1=$abc$109383$new_n35711_ nq=$abc$109383$new_n35724_
+.subckt nexor2_x0 i0=$abc$109383$new_n35724_ i1=$abc$109383$new_n35695_ nq=$abc$109383$new_n35725_
+.subckt and2_x1 i0=$abc$109383$new_n35081_ i1=$abc$109383$new_n35394_ q=$abc$109383$new_n35726_
 .subckt nand2_x0 i0=$abc$109383$new_n35405_ i1=$abc$109383$new_n35726_ nq=$abc$109383$new_n35727_
 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29273_ nq=$abc$109383$new_n35728_
-.subckt nxr2_x1 i0=$abc$109383$new_n35399_ i1=$abc$109383$new_n35728_ nq=$abc$109383$new_n35729_
-.subckt nxr2_x1 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35729_ nq=$abc$109383$new_n35730_
-.subckt a2_x2 i0=$abc$109383$new_n35730_ i1=$abc$109383$new_n35395_ q=$abc$109383$new_n35731_
-.subckt ao22_x2 i0=$abc$109383$new_n35393_ i1=$abc$109383$new_n35731_ i2=$abc$109383$new_n35727_ q=$abc$109383$new_n35732_
-.subckt a4_x2 i0=$abc$109383$new_n35331_ i1=$abc$109383$new_n35377_ i2=$abc$109383$new_n29330_ i3=$abc$109383$new_n29296_ q=$abc$109383$new_n35733_
+.subckt nexor2_x0 i0=$abc$109383$new_n35399_ i1=$abc$109383$new_n35728_ nq=$abc$109383$new_n35729_
+.subckt nexor2_x0 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35729_ nq=$abc$109383$new_n35730_
+.subckt and2_x1 i0=$abc$109383$new_n35730_ i1=$abc$109383$new_n35395_ q=$abc$109383$new_n35731_
+.subckt and21nor_x1 i0=$abc$109383$new_n35393_ i1=$abc$109383$new_n35731_ i2=$abc$109383$new_n35727_ nq=$abc$109383$new_n35732_
+.subckt and4_x1 i0=$abc$109383$new_n35331_ i1=$abc$109383$new_n35377_ i2=$abc$109383$new_n29330_ i3=$abc$109383$new_n29296_ q=$abc$109383$new_n35733_
 .subckt nand2_x0 i0=$abc$109383$new_n35377_ i1=$abc$109383$new_n29330_ nq=$abc$109383$new_n35734_
 .subckt nand2_x0 i0=$abc$109383$new_n35734_ i1=$abc$109383$new_n35383_ nq=$abc$109383$new_n35735_
-.subckt oa22_x2 i0=$abc$109383$new_n35717_ i1=$abc$109383$new_n35735_ i2=$abc$109383$new_n35733_ q=$abc$109383$new_n35736_
+.subckt or21nand_x1 i0=$abc$109383$new_n35717_ i1=$abc$109383$new_n35735_ i2=$abc$109383$new_n35733_ nq=$abc$109383$new_n35736_
 .subckt nand2_x0 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29507_ nq=$abc$109383$new_n35737_
 .subckt nand2_x0 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n29329_ nq=$abc$109383$new_n35738_
-.subckt a2_x2 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29351_ q=$abc$109383$new_n35739_
-.subckt nxr2_x1 i0=$abc$109383$new_n35739_ i1=$abc$109383$new_n35738_ nq=$abc$109383$new_n35740_
-.subckt nxr2_x1 i0=$abc$109383$new_n35740_ i1=$abc$109383$new_n35737_ nq=$abc$109383$new_n35741_
+.subckt and2_x1 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29351_ q=$abc$109383$new_n35739_
+.subckt nexor2_x0 i0=$abc$109383$new_n35739_ i1=$abc$109383$new_n35738_ nq=$abc$109383$new_n35740_
+.subckt nexor2_x0 i0=$abc$109383$new_n35740_ i1=$abc$109383$new_n35737_ nq=$abc$109383$new_n35741_
 .subckt nand4_x0 i0=$abc$109383$new_n35364_ i1=$abc$109383$new_n35048_ i2=$abc$109383$new_n29419_ i3=$abc$109383$new_n29394_ nq=$abc$109383$new_n35742_
 .subckt nand2_x0 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n29419_ nq=$abc$109383$new_n35743_
-.subckt a2_x2 i0=$abc$109383$new_n35743_ i1=$abc$109383$new_n35397_ q=$abc$109383$new_n35744_
-.subckt ao22_x2 i0=$abc$109383$new_n35728_ i1=$abc$109383$new_n35744_ i2=$abc$109383$new_n35742_ q=$abc$109383$new_n35745_
-.subckt nxr2_x1 i0=$abc$109383$new_n35745_ i1=$abc$109383$new_n35741_ nq=$abc$109383$new_n35746_
-.subckt nxr2_x1 i0=$abc$109383$new_n35746_ i1=$abc$109383$new_n35736_ nq=$abc$109383$new_n35747_
+.subckt and2_x1 i0=$abc$109383$new_n35743_ i1=$abc$109383$new_n35397_ q=$abc$109383$new_n35744_
+.subckt and21nor_x1 i0=$abc$109383$new_n35728_ i1=$abc$109383$new_n35744_ i2=$abc$109383$new_n35742_ nq=$abc$109383$new_n35745_
+.subckt nexor2_x0 i0=$abc$109383$new_n35745_ i1=$abc$109383$new_n35741_ nq=$abc$109383$new_n35746_
+.subckt nexor2_x0 i0=$abc$109383$new_n35746_ i1=$abc$109383$new_n35736_ nq=$abc$109383$new_n35747_
 .subckt nand2_x0 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35729_ nq=$abc$109383$new_n35748_
-.subckt a2_x2 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29296_ q=$abc$109383$new_n35749_
+.subckt and2_x1 i0=$abc$109383$new_n34450_ i1=$abc$109383$new_n29296_ q=$abc$109383$new_n35749_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[29] i1=$abc$109383$new_n29418_ nq=$abc$109383$new_n35750_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29271_ q=$abc$109383$new_n35751_
-.subckt nxr2_x1 i0=$abc$109383$new_n35751_ i1=$abc$109383$new_n35750_ nq=$abc$109383$new_n35752_
-.subckt nxr2_x1 i0=$abc$109383$new_n35752_ i1=$abc$109383$new_n35749_ nq=$abc$109383$new_n35753_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29271_ q=$abc$109383$new_n35751_
+.subckt nexor2_x0 i0=$abc$109383$new_n35751_ i1=$abc$109383$new_n35750_ nq=$abc$109383$new_n35752_
+.subckt nexor2_x0 i0=$abc$109383$new_n35752_ i1=$abc$109383$new_n35749_ nq=$abc$109383$new_n35753_
 .subckt nand4_x0 i0=$abc$109383$new_n35080_ i1=$abc$109383$new_n35402_ i2=$abc$109383$new_n29474_ i3=$abc$109383$new_n29450_ nq=$abc$109383$new_n35754_
 .subckt nand2_x0 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29394_ nq=$abc$109383$new_n35755_
 .subckt nand3_x0 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29757_ i2=$abc$109383$new_n29448_ nq=$abc$109383$new_n35756_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29447_ q=$abc$109383$new_n35757_
-.subckt oa22_x2 i0=$abc$109383$new_n29757_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n35757_ q=$abc$109383$new_n35758_
-.subckt a2_x2 i0=$abc$109383$new_n35758_ i1=$abc$109383$new_n35756_ q=$abc$109383$new_n35759_
-.subckt nxr2_x1 i0=$abc$109383$new_n35759_ i1=$abc$109383$new_n35755_ nq=$abc$109383$new_n35760_
-.subckt nxr2_x1 i0=$abc$109383$new_n35760_ i1=$abc$109383$new_n35754_ nq=$abc$109383$new_n35761_
-.subckt nxr2_x1 i0=$abc$109383$new_n35761_ i1=$abc$109383$new_n35753_ nq=$abc$109383$new_n35762_
-.subckt nxr2_x1 i0=$abc$109383$new_n35762_ i1=$abc$109383$new_n35748_ nq=$abc$109383$new_n35763_
-.subckt nxr2_x1 i0=$abc$109383$new_n35763_ i1=$abc$109383$new_n35747_ nq=$abc$109383$new_n35764_
-.subckt nxr2_x1 i0=$abc$109383$new_n35764_ i1=$abc$109383$new_n35732_ nq=$abc$109383$new_n35765_
-.subckt nxr2_x1 i0=$abc$109383$new_n35765_ i1=$abc$109383$new_n35725_ nq=$abc$109383$new_n35766_
-.subckt nxr2_x1 i0=$abc$109383$new_n35766_ i1=$abc$109383$new_n35686_ nq=$abc$109383$new_n35767_
-.subckt nxr2_x1 i0=$abc$109383$new_n35767_ i1=$abc$109383$new_n35680_ nq=$abc$109383$new_n35768_
-.subckt nxr2_x1 i0=$abc$109383$new_n35768_ i1=$abc$109383$new_n35615_ nq=$abc$109383$new_n35769_
-.subckt nxr2_x1 i0=$abc$109383$new_n35769_ i1=$abc$109383$new_n35607_ nq=$abc$109383$new_n35770_
-.subckt nxr2_x1 i0=$abc$109383$new_n35770_ i1=$abc$109383$new_n35505_ nq=$abc$109383$new_n35771_
-.subckt nxr2_x1 i0=$abc$109383$new_n35771_ i1=$abc$109383$new_n35496_ nq=$abc$109383$new_n35772_
-.subckt nxr2_x1 i0=$abc$109383$new_n35772_ i1=$abc$109383$new_n35459_ nq=$abc$109383$new_n35773_
-.subckt nxr2_x1 i0=$abc$109383$new_n35773_ i1=$abc$109383$new_n35457_ nq=$abc$109383$new_n35774_
-.subckt nxr2_x1 i0=$abc$109383$new_n35774_ i1=$abc$109383$new_n35454_ nq=$abc$109383$new_n35775_
-.subckt nxr2_x1 i0=$abc$109383$new_n35775_ i1=$abc$109383$new_n35442_ nq=$abc$109383$new_n35776_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n35776_ i2=$abc$109383$new_n35426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102886
-.subckt a2_x2 i0=$abc$109383$new_n35774_ i1=$abc$109383$new_n35454_ q=$abc$109383$new_n35778_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29447_ q=$abc$109383$new_n35757_
+.subckt or21nand_x1 i0=$abc$109383$new_n29757_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n35757_ nq=$abc$109383$new_n35758_
+.subckt and2_x1 i0=$abc$109383$new_n35758_ i1=$abc$109383$new_n35756_ q=$abc$109383$new_n35759_
+.subckt nexor2_x0 i0=$abc$109383$new_n35759_ i1=$abc$109383$new_n35755_ nq=$abc$109383$new_n35760_
+.subckt nexor2_x0 i0=$abc$109383$new_n35760_ i1=$abc$109383$new_n35754_ nq=$abc$109383$new_n35761_
+.subckt nexor2_x0 i0=$abc$109383$new_n35761_ i1=$abc$109383$new_n35753_ nq=$abc$109383$new_n35762_
+.subckt nexor2_x0 i0=$abc$109383$new_n35762_ i1=$abc$109383$new_n35748_ nq=$abc$109383$new_n35763_
+.subckt nexor2_x0 i0=$abc$109383$new_n35763_ i1=$abc$109383$new_n35747_ nq=$abc$109383$new_n35764_
+.subckt nexor2_x0 i0=$abc$109383$new_n35764_ i1=$abc$109383$new_n35732_ nq=$abc$109383$new_n35765_
+.subckt nexor2_x0 i0=$abc$109383$new_n35765_ i1=$abc$109383$new_n35725_ nq=$abc$109383$new_n35766_
+.subckt nexor2_x0 i0=$abc$109383$new_n35766_ i1=$abc$109383$new_n35686_ nq=$abc$109383$new_n35767_
+.subckt nexor2_x0 i0=$abc$109383$new_n35767_ i1=$abc$109383$new_n35680_ nq=$abc$109383$new_n35768_
+.subckt nexor2_x0 i0=$abc$109383$new_n35768_ i1=$abc$109383$new_n35615_ nq=$abc$109383$new_n35769_
+.subckt nexor2_x0 i0=$abc$109383$new_n35769_ i1=$abc$109383$new_n35607_ nq=$abc$109383$new_n35770_
+.subckt nexor2_x0 i0=$abc$109383$new_n35770_ i1=$abc$109383$new_n35505_ nq=$abc$109383$new_n35771_
+.subckt nexor2_x0 i0=$abc$109383$new_n35771_ i1=$abc$109383$new_n35496_ nq=$abc$109383$new_n35772_
+.subckt nexor2_x0 i0=$abc$109383$new_n35772_ i1=$abc$109383$new_n35459_ nq=$abc$109383$new_n35773_
+.subckt nexor2_x0 i0=$abc$109383$new_n35773_ i1=$abc$109383$new_n35457_ nq=$abc$109383$new_n35774_
+.subckt nexor2_x0 i0=$abc$109383$new_n35774_ i1=$abc$109383$new_n35454_ nq=$abc$109383$new_n35775_
+.subckt nexor2_x0 i0=$abc$109383$new_n35775_ i1=$abc$109383$new_n35442_ nq=$abc$109383$new_n35776_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n35776_ i2=$abc$109383$new_n35426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102886
+.subckt and2_x1 i0=$abc$109383$new_n35774_ i1=$abc$109383$new_n35454_ q=$abc$109383$new_n35778_
 .subckt nand3_x0 i0=$abc$109383$new_n35452_ i1=$abc$109383$new_n35446_ i2=$abc$109383$new_n35434_ nq=$abc$109383$new_n35779_
-.subckt ao22_x2 i0=$abc$109383$new_n35114_ i1=$abc$109383$new_n35435_ i2=$abc$109383$new_n35779_ q=$abc$109383$new_n35780_
-.subckt nxr2_x1 i0=$abc$109383$new_n35774_ i1=$abc$109383$new_n35780_ nq=$abc$109383$new_n35781_
-.subckt oa22_x2 i0=$abc$109383$new_n35442_ i1=$abc$109383$new_n35781_ i2=$abc$109383$new_n35778_ q=$abc$109383$new_n35782_
-.subckt a2_x2 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35450_ q=$abc$109383$new_n35783_
-.subckt oa22_x2 i0=$abc$109383$new_n35445_ i1=$abc$109383$new_n35414_ i2=$abc$109383$new_n35783_ q=$abc$109383$new_n35784_
-.subckt a2_x2 i0=$abc$109383$new_n35772_ i1=$abc$109383$new_n35784_ q=$abc$109383$new_n35785_
-.subckt a2_x2 i0=$abc$109383$new_n35456_ i1=$abc$109383$new_n35444_ q=$abc$109383$new_n35786_
-.subckt oa22_x2 i0=$abc$109383$new_n35786_ i1=$abc$109383$new_n35773_ i2=$abc$109383$new_n35785_ q=$abc$109383$new_n35787_
-.subckt a3_x2 i0=$abc$109383$new_n35480_ i1=$abc$109383$new_n35478_ i2=$abc$109383$new_n35471_ q=$abc$109383$new_n35788_
-.subckt oa22_x2 i0=$abc$109383$new_n35154_ i1=$abc$109383$new_n35257_ i2=$abc$109383$new_n35788_ q=$abc$109383$new_n35789_
+.subckt and21nor_x1 i0=$abc$109383$new_n35114_ i1=$abc$109383$new_n35435_ i2=$abc$109383$new_n35779_ nq=$abc$109383$new_n35780_
+.subckt nexor2_x0 i0=$abc$109383$new_n35774_ i1=$abc$109383$new_n35780_ nq=$abc$109383$new_n35781_
+.subckt or21nand_x1 i0=$abc$109383$new_n35442_ i1=$abc$109383$new_n35781_ i2=$abc$109383$new_n35778_ nq=$abc$109383$new_n35782_
+.subckt and2_x1 i0=$abc$109383$new_n35413_ i1=$abc$109383$new_n35450_ q=$abc$109383$new_n35783_
+.subckt or21nand_x1 i0=$abc$109383$new_n35445_ i1=$abc$109383$new_n35414_ i2=$abc$109383$new_n35783_ nq=$abc$109383$new_n35784_
+.subckt and2_x1 i0=$abc$109383$new_n35772_ i1=$abc$109383$new_n35784_ q=$abc$109383$new_n35785_
+.subckt and2_x1 i0=$abc$109383$new_n35456_ i1=$abc$109383$new_n35444_ q=$abc$109383$new_n35786_
+.subckt or21nand_x1 i0=$abc$109383$new_n35786_ i1=$abc$109383$new_n35773_ i2=$abc$109383$new_n35785_ nq=$abc$109383$new_n35787_
+.subckt and3_x1 i0=$abc$109383$new_n35480_ i1=$abc$109383$new_n35478_ i2=$abc$109383$new_n35471_ q=$abc$109383$new_n35788_
+.subckt or21nand_x1 i0=$abc$109383$new_n35154_ i1=$abc$109383$new_n35257_ i2=$abc$109383$new_n35788_ nq=$abc$109383$new_n35789_
 .subckt nand2_x0 i0=$abc$109383$new_n35789_ i1=$abc$109383$new_n35466_ nq=$abc$109383$new_n35790_
 .subckt nand2_x0 i0=$abc$109383$new_n35184_ i1=$abc$109383$new_n35464_ nq=$abc$109383$new_n35791_
-.subckt nxr2_x1 i0=$abc$109383$new_n35184_ i1=$abc$109383$new_n35464_ nq=$abc$109383$new_n35792_
-.subckt ao22_x2 i0=$abc$109383$new_n35469_ i1=$abc$109383$new_n35792_ i2=$abc$109383$new_n35791_ q=$abc$109383$new_n35793_
-.subckt a2_x2 i0=$abc$109383$new_n35487_ i1=$abc$109383$new_n35793_ q=$abc$109383$new_n35794_
+.subckt nexor2_x0 i0=$abc$109383$new_n35184_ i1=$abc$109383$new_n35464_ nq=$abc$109383$new_n35792_
+.subckt and21nor_x1 i0=$abc$109383$new_n35469_ i1=$abc$109383$new_n35792_ i2=$abc$109383$new_n35791_ nq=$abc$109383$new_n35793_
+.subckt and2_x1 i0=$abc$109383$new_n35487_ i1=$abc$109383$new_n35793_ q=$abc$109383$new_n35794_
 .subckt nand2_x0 i0=soc.cpu.minerva.multiplier.x_src2_signed i1=$abc$109383$new_n35402_ nq=$abc$109383$new_n35795_
 .subckt buf_x4 i=$abc$109383$new_n35795_ q=$abc$109383$new_n35796_
 .subckt buf_x4 i=$abc$109383$new_n35796_ q=$abc$109383$new_n35797_
 .subckt buf_x4 i=$abc$109383$new_n35797_ q=$abc$109383$new_n35798_
-.subckt ao22_x2 i0=$abc$109383$new_n35798_ i1=$abc$109383$new_n35794_ i2=$abc$109383$new_n35790_ q=$abc$109383$new_n35799_
+.subckt and21nor_x1 i0=$abc$109383$new_n35798_ i1=$abc$109383$new_n35794_ i2=$abc$109383$new_n35790_ nq=$abc$109383$new_n35799_
 .subckt nand3_x0 i0=$abc$109383$new_n35517_ i1=$abc$109383$new_n35509_ i2=$abc$109383$new_n35476_ nq=$abc$109383$new_n35800_
-.subckt ao22_x2 i0=$abc$109383$new_n35186_ i1=$abc$109383$new_n35477_ i2=$abc$109383$new_n35800_ q=$abc$109383$new_n35801_
-.subckt nxr2_x1 i0=$abc$109383$new_n35606_ i1=$abc$109383$new_n35801_ nq=$abc$109383$new_n35802_
-.subckt nxr2_x1 i0=$abc$109383$new_n35769_ i1=$abc$109383$new_n35802_ nq=$abc$109383$new_n35803_
-.subckt oa22_x2 i0=$abc$109383$new_n35501_ i1=$abc$109383$new_n35504_ i2=$abc$109383$new_n35803_ q=$abc$109383$new_n35804_
+.subckt and21nor_x1 i0=$abc$109383$new_n35186_ i1=$abc$109383$new_n35477_ i2=$abc$109383$new_n35800_ nq=$abc$109383$new_n35801_
+.subckt nexor2_x0 i0=$abc$109383$new_n35606_ i1=$abc$109383$new_n35801_ nq=$abc$109383$new_n35802_
+.subckt nexor2_x0 i0=$abc$109383$new_n35769_ i1=$abc$109383$new_n35802_ nq=$abc$109383$new_n35803_
+.subckt or21nand_x1 i0=$abc$109383$new_n35501_ i1=$abc$109383$new_n35504_ i2=$abc$109383$new_n35803_ nq=$abc$109383$new_n35804_
 .subckt nand2_x0 i0=$abc$109383$new_n35504_ i1=$abc$109383$new_n35501_ nq=$abc$109383$new_n35805_
-.subckt nxr2_x1 i0=$abc$109383$new_n35770_ i1=$abc$109383$new_n35805_ nq=$abc$109383$new_n35806_
-.subckt ao22_x2 i0=$abc$109383$new_n35496_ i1=$abc$109383$new_n35806_ i2=$abc$109383$new_n35804_ q=$abc$109383$new_n35807_
-.subckt a2_x2 i0=$abc$109383$new_n35182_ i1=$abc$109383$new_n35527_ q=$abc$109383$new_n35808_
+.subckt nexor2_x0 i0=$abc$109383$new_n35770_ i1=$abc$109383$new_n35805_ nq=$abc$109383$new_n35806_
+.subckt and21nor_x1 i0=$abc$109383$new_n35496_ i1=$abc$109383$new_n35806_ i2=$abc$109383$new_n35804_ nq=$abc$109383$new_n35807_
+.subckt and2_x1 i0=$abc$109383$new_n35182_ i1=$abc$109383$new_n35527_ q=$abc$109383$new_n35808_
 .subckt nand2_x0 i0=$abc$109383$new_n35530_ i1=$abc$109383$new_n35177_ nq=$abc$109383$new_n35809_
 .subckt nand2_x0 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29480_ nq=$abc$109383$new_n35810_
-.subckt nxr2_x1 i0=$abc$109383$new_n35172_ i1=$abc$109383$new_n35810_ nq=$abc$109383$new_n35811_
-.subckt oa22_x2 i0=$abc$109383$new_n35811_ i1=$abc$109383$new_n35809_ i2=$abc$109383$new_n35808_ q=$abc$109383$new_n35812_
+.subckt nexor2_x0 i0=$abc$109383$new_n35172_ i1=$abc$109383$new_n35810_ nq=$abc$109383$new_n35811_
+.subckt or21nand_x1 i0=$abc$109383$new_n35811_ i1=$abc$109383$new_n35809_ i2=$abc$109383$new_n35808_ nq=$abc$109383$new_n35812_
 .subckt nand2_x0 i0=$abc$109383$new_n35549_ i1=$abc$109383$new_n35812_ nq=$abc$109383$new_n35813_
 .subckt nand3_x0 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29316_ i2=$abc$109383$new_n29476_ nq=$abc$109383$new_n35814_
-.subckt nxr2_x1 i0=$abc$109383$new_n35537_ i1=$abc$109383$new_n35814_ nq=$abc$109383$new_n35815_
-.subckt nxr2_x1 i0=$abc$109383$new_n35548_ i1=$abc$109383$new_n35815_ nq=$abc$109383$new_n35816_
-.subckt a2_x2 i0=$abc$109383$new_n35816_ i1=$abc$109383$new_n35532_ q=$abc$109383$new_n35817_
+.subckt nexor2_x0 i0=$abc$109383$new_n35537_ i1=$abc$109383$new_n35814_ nq=$abc$109383$new_n35815_
+.subckt nexor2_x0 i0=$abc$109383$new_n35548_ i1=$abc$109383$new_n35815_ nq=$abc$109383$new_n35816_
+.subckt and2_x1 i0=$abc$109383$new_n35816_ i1=$abc$109383$new_n35532_ q=$abc$109383$new_n35817_
 .subckt nand4_x0 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29380_ i2=$abc$109383$new_n29456_ i3=$abc$109383$new_n29399_ nq=$abc$109383$new_n35818_
-.subckt a2_x2 i0=$abc$109383$new_n35521_ i1=$abc$109383$new_n35170_ q=$abc$109383$new_n35819_
-.subckt ao22_x2 i0=$abc$109383$new_n35810_ i1=$abc$109383$new_n35819_ i2=$abc$109383$new_n35818_ q=$abc$109383$new_n35820_
-.subckt ao22_x2 i0=$abc$109383$new_n35820_ i1=$abc$109383$new_n35817_ i2=$abc$109383$new_n35813_ q=$abc$109383$new_n35821_
-.subckt a3_x2 i0=$abc$109383$new_n35600_ i1=$abc$109383$new_n35598_ i2=$abc$109383$new_n35597_ q=$abc$109383$new_n35822_
-.subckt oa22_x2 i0=$abc$109383$new_n35269_ i1=$abc$109383$new_n35326_ i2=$abc$109383$new_n35822_ q=$abc$109383$new_n35823_
+.subckt and2_x1 i0=$abc$109383$new_n35521_ i1=$abc$109383$new_n35170_ q=$abc$109383$new_n35819_
+.subckt and21nor_x1 i0=$abc$109383$new_n35810_ i1=$abc$109383$new_n35819_ i2=$abc$109383$new_n35818_ nq=$abc$109383$new_n35820_
+.subckt and21nor_x1 i0=$abc$109383$new_n35820_ i1=$abc$109383$new_n35817_ i2=$abc$109383$new_n35813_ nq=$abc$109383$new_n35821_
+.subckt and3_x1 i0=$abc$109383$new_n35600_ i1=$abc$109383$new_n35598_ i2=$abc$109383$new_n35597_ q=$abc$109383$new_n35822_
+.subckt or21nand_x1 i0=$abc$109383$new_n35269_ i1=$abc$109383$new_n35326_ i2=$abc$109383$new_n35822_ nq=$abc$109383$new_n35823_
 .subckt nand2_x0 i0=$abc$109383$new_n35823_ i1=$abc$109383$new_n35594_ nq=$abc$109383$new_n35824_
-.subckt nxr2_x1 i0=$abc$109383$new_n35550_ i1=$abc$109383$new_n35820_ nq=$abc$109383$new_n35825_
-.subckt nxr2_x1 i0=$abc$109383$new_n35593_ i1=$abc$109383$new_n35825_ nq=$abc$109383$new_n35826_
-.subckt nxr2_x1 i0=$abc$109383$new_n35605_ i1=$abc$109383$new_n35826_ nq=$abc$109383$new_n35827_
-.subckt ao22_x2 i0=$abc$109383$new_n35801_ i1=$abc$109383$new_n35827_ i2=$abc$109383$new_n35824_ q=$abc$109383$new_n35828_
-.subckt nxr2_x1 i0=$abc$109383$new_n35828_ i1=$abc$109383$new_n35821_ nq=$abc$109383$new_n35829_
+.subckt nexor2_x0 i0=$abc$109383$new_n35550_ i1=$abc$109383$new_n35820_ nq=$abc$109383$new_n35825_
+.subckt nexor2_x0 i0=$abc$109383$new_n35593_ i1=$abc$109383$new_n35825_ nq=$abc$109383$new_n35826_
+.subckt nexor2_x0 i0=$abc$109383$new_n35605_ i1=$abc$109383$new_n35826_ nq=$abc$109383$new_n35827_
+.subckt and21nor_x1 i0=$abc$109383$new_n35801_ i1=$abc$109383$new_n35827_ i2=$abc$109383$new_n35824_ nq=$abc$109383$new_n35828_
+.subckt nexor2_x0 i0=$abc$109383$new_n35828_ i1=$abc$109383$new_n35821_ nq=$abc$109383$new_n35829_
 .subckt nand2_x0 i0=$abc$109383$new_n35315_ i1=$abc$109383$new_n35296_ nq=$abc$109383$new_n35830_
-.subckt ao22_x2 i0=$abc$109383$new_n35596_ i1=$abc$109383$new_n35316_ i2=$abc$109383$new_n35830_ q=$abc$109383$new_n35831_
-.subckt nxr2_x1 i0=$abc$109383$new_n35679_ i1=$abc$109383$new_n35831_ nq=$abc$109383$new_n35832_
-.subckt nxr2_x1 i0=$abc$109383$new_n35767_ i1=$abc$109383$new_n35832_ nq=$abc$109383$new_n35833_
-.subckt oa22_x2 i0=$abc$109383$new_n35611_ i1=$abc$109383$new_n35614_ i2=$abc$109383$new_n35833_ q=$abc$109383$new_n35834_
-.subckt a3_x2 i0=$abc$109383$new_n35833_ i1=$abc$109383$new_n35614_ i2=$abc$109383$new_n35611_ q=$abc$109383$new_n35835_
-.subckt ao22_x2 i0=$abc$109383$new_n35607_ i1=$abc$109383$new_n35835_ i2=$abc$109383$new_n35834_ q=$abc$109383$new_n35836_
-.subckt a2_x2 i0=$abc$109383$new_n35227_ i1=$abc$109383$new_n35515_ q=$abc$109383$new_n35837_
-.subckt oa22_x2 i0=$abc$109383$new_n35508_ i1=$abc$109383$new_n35228_ i2=$abc$109383$new_n35837_ q=$abc$109383$new_n35838_
-.subckt a2_x2 i0=$abc$109383$new_n35592_ i1=$abc$109383$new_n35838_ q=$abc$109383$new_n35839_
-.subckt oa22_x2 i0=$abc$109383$new_n35825_ i1=$abc$109383$new_n35593_ i2=$abc$109383$new_n35839_ q=$abc$109383$new_n35840_
-.subckt a4_x2 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29380_ i2=$abc$109383$new_n29455_ i3=$abc$109383$new_n29479_ q=$abc$109383$new_n35841_
+.subckt and21nor_x1 i0=$abc$109383$new_n35596_ i1=$abc$109383$new_n35316_ i2=$abc$109383$new_n35830_ nq=$abc$109383$new_n35831_
+.subckt nexor2_x0 i0=$abc$109383$new_n35679_ i1=$abc$109383$new_n35831_ nq=$abc$109383$new_n35832_
+.subckt nexor2_x0 i0=$abc$109383$new_n35767_ i1=$abc$109383$new_n35832_ nq=$abc$109383$new_n35833_
+.subckt or21nand_x1 i0=$abc$109383$new_n35611_ i1=$abc$109383$new_n35614_ i2=$abc$109383$new_n35833_ nq=$abc$109383$new_n35834_
+.subckt and3_x1 i0=$abc$109383$new_n35833_ i1=$abc$109383$new_n35614_ i2=$abc$109383$new_n35611_ q=$abc$109383$new_n35835_
+.subckt and21nor_x1 i0=$abc$109383$new_n35607_ i1=$abc$109383$new_n35835_ i2=$abc$109383$new_n35834_ nq=$abc$109383$new_n35836_
+.subckt and2_x1 i0=$abc$109383$new_n35227_ i1=$abc$109383$new_n35515_ q=$abc$109383$new_n35837_
+.subckt or21nand_x1 i0=$abc$109383$new_n35508_ i1=$abc$109383$new_n35228_ i2=$abc$109383$new_n35837_ nq=$abc$109383$new_n35838_
+.subckt and2_x1 i0=$abc$109383$new_n35592_ i1=$abc$109383$new_n35838_ q=$abc$109383$new_n35839_
+.subckt or21nand_x1 i0=$abc$109383$new_n35825_ i1=$abc$109383$new_n35593_ i2=$abc$109383$new_n35839_ nq=$abc$109383$new_n35840_
+.subckt and4_x1 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29380_ i2=$abc$109383$new_n29455_ i3=$abc$109383$new_n29479_ q=$abc$109383$new_n35841_
 .subckt nand2_x0 i0=$abc$109383$new_n29380_ i1=$abc$109383$new_n29479_ nq=$abc$109383$new_n35842_
 .subckt nand2_x0 i0=$abc$109383$new_n35842_ i1=$abc$109383$new_n35535_ nq=$abc$109383$new_n35843_
-.subckt oa22_x2 i0=$abc$109383$new_n35534_ i1=$abc$109383$new_n35843_ i2=$abc$109383$new_n35841_ q=$abc$109383$new_n35844_
-.subckt a4_x2 i0=$abc$109383$new_n35524_ i1=$abc$109383$new_n29236_ i2=$abc$109383$new_n34854_ i3=$abc$109383$new_n34523_ q=$abc$109383$new_n35845_
+.subckt or21nand_x1 i0=$abc$109383$new_n35534_ i1=$abc$109383$new_n35843_ i2=$abc$109383$new_n35841_ nq=$abc$109383$new_n35844_
+.subckt and4_x1 i0=$abc$109383$new_n35524_ i1=$abc$109383$new_n29236_ i2=$abc$109383$new_n34854_ i3=$abc$109383$new_n34523_ q=$abc$109383$new_n35845_
 .subckt nand2_x0 i0=$abc$109383$new_n35540_ i1=$abc$109383$new_n35179_ nq=$abc$109383$new_n35846_
-.subckt oa22_x2 i0=$abc$109383$new_n35529_ i1=$abc$109383$new_n35846_ i2=$abc$109383$new_n35845_ q=$abc$109383$new_n35847_
+.subckt or21nand_x1 i0=$abc$109383$new_n35529_ i1=$abc$109383$new_n35846_ i2=$abc$109383$new_n35845_ nq=$abc$109383$new_n35847_
 .subckt nand2_x0 i0=$abc$109383$new_n35547_ i1=$abc$109383$new_n35847_ nq=$abc$109383$new_n35848_
-.subckt a2_x2 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n29397_ q=$abc$109383$new_n35849_
-.subckt nxr2_x1 i0=$abc$109383$new_n35546_ i1=$abc$109383$new_n35849_ nq=$abc$109383$new_n35850_
-.subckt a2_x2 i0=$abc$109383$new_n35850_ i1=$abc$109383$new_n35542_ q=$abc$109383$new_n35851_
-.subckt ao22_x2 i0=$abc$109383$new_n35538_ i1=$abc$109383$new_n35851_ i2=$abc$109383$new_n35848_ q=$abc$109383$new_n35852_
+.subckt and2_x1 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n29397_ q=$abc$109383$new_n35849_
+.subckt nexor2_x0 i0=$abc$109383$new_n35546_ i1=$abc$109383$new_n35849_ nq=$abc$109383$new_n35850_
+.subckt and2_x1 i0=$abc$109383$new_n35850_ i1=$abc$109383$new_n35542_ q=$abc$109383$new_n35851_
+.subckt and21nor_x1 i0=$abc$109383$new_n35538_ i1=$abc$109383$new_n35851_ i2=$abc$109383$new_n35848_ nq=$abc$109383$new_n35852_
 .subckt nand4_x0 i0=$abc$109383$new_n35524_ i1=$abc$109383$new_n29236_ i2=$abc$109383$new_n29423_ i3=$abc$109383$new_n29277_ nq=$abc$109383$new_n35853_
 .subckt nand2_x0 i0=$abc$109383$new_n35160_ i1=$abc$109383$new_n29423_ nq=$abc$109383$new_n35854_
-.subckt a2_x2 i0=$abc$109383$new_n35854_ i1=$abc$109383$new_n35544_ q=$abc$109383$new_n35855_
-.subckt ao22_x2 i0=$abc$109383$new_n35543_ i1=$abc$109383$new_n35855_ i2=$abc$109383$new_n35853_ q=$abc$109383$new_n35856_
+.subckt and2_x1 i0=$abc$109383$new_n35854_ i1=$abc$109383$new_n35544_ q=$abc$109383$new_n35855_
+.subckt and21nor_x1 i0=$abc$109383$new_n35543_ i1=$abc$109383$new_n35855_ i2=$abc$109383$new_n35853_ nq=$abc$109383$new_n35856_
 .subckt nand2_x0 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n29453_ nq=$abc$109383$new_n35857_
 .subckt nand2_x0 i0=$abc$109383$new_n34859_ i1=$abc$109383$new_n29422_ nq=$abc$109383$new_n35858_
-.subckt a2_x2 i0=$abc$109383$new_n35160_ i1=$abc$109383$new_n29397_ q=$abc$109383$new_n35859_
-.subckt nxr2_x1 i0=$abc$109383$new_n35859_ i1=$abc$109383$new_n35858_ nq=$abc$109383$new_n35860_
-.subckt nxr2_x1 i0=$abc$109383$new_n35860_ i1=$abc$109383$new_n35857_ nq=$abc$109383$new_n35861_
-.subckt nxr2_x1 i0=$abc$109383$new_n35861_ i1=$abc$109383$new_n35856_ nq=$abc$109383$new_n35862_
-.subckt a2_x2 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29476_ q=$abc$109383$new_n35863_
-.subckt a3_x2 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29377_ i2=$abc$109383$new_n29476_ q=$abc$109383$new_n35864_
-.subckt nxr2_x1 i0=$abc$109383$new_n35864_ i1=$abc$109383$new_n35863_ nq=$abc$109383$new_n35865_
-.subckt nxr2_x1 i0=$abc$109383$new_n35865_ i1=$abc$109383$new_n35814_ nq=$abc$109383$new_n35866_
-.subckt nxr2_x1 i0=$abc$109383$new_n35866_ i1=$abc$109383$new_n35862_ nq=$abc$109383$new_n35867_
-.subckt nxr2_x1 i0=$abc$109383$new_n35867_ i1=$abc$109383$new_n35852_ nq=$abc$109383$new_n35868_
-.subckt nxr2_x1 i0=$abc$109383$new_n35868_ i1=$abc$109383$new_n35844_ nq=$abc$109383$new_n35869_
-.subckt a2_x2 i0=$abc$109383$new_n35285_ i1=$abc$109383$new_n35585_ q=$abc$109383$new_n35870_
+.subckt and2_x1 i0=$abc$109383$new_n35160_ i1=$abc$109383$new_n29397_ q=$abc$109383$new_n35859_
+.subckt nexor2_x0 i0=$abc$109383$new_n35859_ i1=$abc$109383$new_n35858_ nq=$abc$109383$new_n35860_
+.subckt nexor2_x0 i0=$abc$109383$new_n35860_ i1=$abc$109383$new_n35857_ nq=$abc$109383$new_n35861_
+.subckt nexor2_x0 i0=$abc$109383$new_n35861_ i1=$abc$109383$new_n35856_ nq=$abc$109383$new_n35862_
+.subckt and2_x1 i0=$abc$109383$new_n29259_ i1=$abc$109383$new_n29476_ q=$abc$109383$new_n35863_
+.subckt and3_x1 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29377_ i2=$abc$109383$new_n29476_ q=$abc$109383$new_n35864_
+.subckt nexor2_x0 i0=$abc$109383$new_n35864_ i1=$abc$109383$new_n35863_ nq=$abc$109383$new_n35865_
+.subckt nexor2_x0 i0=$abc$109383$new_n35865_ i1=$abc$109383$new_n35814_ nq=$abc$109383$new_n35866_
+.subckt nexor2_x0 i0=$abc$109383$new_n35866_ i1=$abc$109383$new_n35862_ nq=$abc$109383$new_n35867_
+.subckt nexor2_x0 i0=$abc$109383$new_n35867_ i1=$abc$109383$new_n35852_ nq=$abc$109383$new_n35868_
+.subckt nexor2_x0 i0=$abc$109383$new_n35868_ i1=$abc$109383$new_n35844_ nq=$abc$109383$new_n35869_
+.subckt and2_x1 i0=$abc$109383$new_n35285_ i1=$abc$109383$new_n35585_ q=$abc$109383$new_n35870_
 .subckt nand2_x0 i0=$abc$109383$new_n35588_ i1=$abc$109383$new_n35280_ nq=$abc$109383$new_n35871_
-.subckt oa22_x2 i0=$abc$109383$new_n35595_ i1=$abc$109383$new_n35871_ i2=$abc$109383$new_n35870_ q=$abc$109383$new_n35872_
+.subckt or21nand_x1 i0=$abc$109383$new_n35595_ i1=$abc$109383$new_n35871_ i2=$abc$109383$new_n35870_ nq=$abc$109383$new_n35872_
 .subckt nand2_x0 i0=$abc$109383$new_n35872_ i1=$abc$109383$new_n35580_ nq=$abc$109383$new_n35873_
 .subckt buf_x4 i=$abc$109383$new_n29357_ q=$abc$109383$new_n35874_
 .subckt buf_x4 i=$abc$109383$new_n35510_ q=$abc$109383$new_n35875_
-.subckt a4_x2 i0=$abc$109383$new_n35511_ i1=$abc$109383$new_n35875_ i2=$abc$109383$new_n35874_ i3=$abc$109383$new_n29513_ q=$abc$109383$new_n35876_
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 .subckt nand2_x0 i0=$abc$109383$new_n35566_ i1=$abc$109383$new_n35208_ nq=$abc$109383$new_n35877_
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-.subckt nxr2_x1 i0=$abc$109383$new_n36043_ i1=$abc$109383$new_n36035_ nq=$abc$109383$new_n36044_
-.subckt nxr2_x1 i0=$abc$109383$new_n36044_ i1=$abc$109383$new_n36019_ nq=$abc$109383$new_n36045_
-.subckt a2_x2 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35729_ q=$abc$109383$new_n36046_
+.subckt and2_x1 i0=$abc$109383$new_n35716_ i1=$abc$109383$new_n29507_ q=$abc$109383$new_n36040_
+.subckt nexor2_x0 i0=$abc$109383$new_n35740_ i1=$abc$109383$new_n36040_ nq=$abc$109383$new_n36041_
+.subckt and2_x1 i0=$abc$109383$new_n35745_ i1=$abc$109383$new_n36041_ q=$abc$109383$new_n36042_
+.subckt and21nor_x1 i0=$abc$109383$new_n36006_ i1=$abc$109383$new_n36042_ i2=$abc$109383$new_n36039_ nq=$abc$109383$new_n36043_
+.subckt nexor2_x0 i0=$abc$109383$new_n36043_ i1=$abc$109383$new_n36035_ nq=$abc$109383$new_n36044_
+.subckt nexor2_x0 i0=$abc$109383$new_n36044_ i1=$abc$109383$new_n36019_ nq=$abc$109383$new_n36045_
+.subckt and2_x1 i0=$abc$109383$new_n35404_ i1=$abc$109383$new_n35729_ q=$abc$109383$new_n36046_
 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29295_ nq=$abc$109383$new_n36047_
-.subckt nxr2_x1 i0=$abc$109383$new_n35752_ i1=$abc$109383$new_n36047_ nq=$abc$109383$new_n36048_
+.subckt nexor2_x0 i0=$abc$109383$new_n35752_ i1=$abc$109383$new_n36047_ nq=$abc$109383$new_n36048_
 .subckt buf_x4 i=$abc$109383$new_n35080_ q=$abc$109383$new_n36049_
 .subckt nand4_x0 i0=$abc$109383$new_n35757_ i1=$abc$109383$new_n36049_ i2=$abc$109383$new_n29749_ i3=$abc$109383$new_n29474_ nq=$abc$109383$new_n36050_
-.subckt a4_x2 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n35402_ i2=$abc$109383$new_n33586_ i3=$abc$109383$new_n29449_ q=$abc$109383$new_n36051_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[30] i1=$abc$109383$new_n29393_ q=$abc$109383$new_n36052_
+.subckt and4_x1 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n35402_ i2=$abc$109383$new_n33586_ i3=$abc$109383$new_n29449_ q=$abc$109383$new_n36051_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[30] i1=$abc$109383$new_n29393_ q=$abc$109383$new_n36052_
 .subckt nand3_x0 i0=$abc$109383$new_n35758_ i1=$abc$109383$new_n35756_ i2=$abc$109383$new_n36052_ nq=$abc$109383$new_n36053_
-.subckt oa22_x2 i0=$abc$109383$new_n35758_ i1=$abc$109383$new_n35756_ i2=$abc$109383$new_n36052_ q=$abc$109383$new_n36054_
-.subckt oa22_x2 i0=$abc$109383$new_n36054_ i1=$abc$109383$new_n36053_ i2=$abc$109383$new_n36051_ q=$abc$109383$new_n36055_
+.subckt or21nand_x1 i0=$abc$109383$new_n35758_ i1=$abc$109383$new_n35756_ i2=$abc$109383$new_n36052_ nq=$abc$109383$new_n36054_
+.subckt or21nand_x1 i0=$abc$109383$new_n36054_ i1=$abc$109383$new_n36053_ i2=$abc$109383$new_n36051_ nq=$abc$109383$new_n36055_
 .subckt nand3_x0 i0=$abc$109383$new_n36055_ i1=$abc$109383$new_n36050_ i2=$abc$109383$new_n36048_ nq=$abc$109383$new_n36056_
-.subckt oa22_x2 i0=$abc$109383$new_n36055_ i1=$abc$109383$new_n36050_ i2=$abc$109383$new_n36048_ q=$abc$109383$new_n36057_
+.subckt or21nand_x1 i0=$abc$109383$new_n36055_ i1=$abc$109383$new_n36050_ i2=$abc$109383$new_n36048_ nq=$abc$109383$new_n36057_
 .subckt nand3_x0 i0=$abc$109383$new_n36057_ i1=$abc$109383$new_n36056_ i2=$abc$109383$new_n36046_ nq=$abc$109383$new_n36058_
-.subckt nxr2_x1 i0=$abc$109383$new_n35761_ i1=$abc$109383$new_n36048_ nq=$abc$109383$new_n36059_
-.subckt a2_x2 i0=$abc$109383$new_n36059_ i1=$abc$109383$new_n35748_ q=$abc$109383$new_n36060_
-.subckt ao22_x2 i0=$abc$109383$new_n35747_ i1=$abc$109383$new_n36060_ i2=$abc$109383$new_n36058_ q=$abc$109383$new_n36061_
-.subckt a4_x2 i0=$abc$109383$new_n35331_ i1=$abc$109383$new_n35377_ i2=$abc$109383$new_n29352_ i3=$abc$109383$new_n29330_ q=$abc$109383$new_n36062_
+.subckt nexor2_x0 i0=$abc$109383$new_n35761_ i1=$abc$109383$new_n36048_ nq=$abc$109383$new_n36059_
+.subckt and2_x1 i0=$abc$109383$new_n36059_ i1=$abc$109383$new_n35748_ q=$abc$109383$new_n36060_
+.subckt and21nor_x1 i0=$abc$109383$new_n35747_ i1=$abc$109383$new_n36060_ i2=$abc$109383$new_n36058_ nq=$abc$109383$new_n36061_
+.subckt and4_x1 i0=$abc$109383$new_n35331_ i1=$abc$109383$new_n35377_ i2=$abc$109383$new_n29352_ i3=$abc$109383$new_n29330_ q=$abc$109383$new_n36062_
 .subckt nand2_x0 i0=$abc$109383$new_n35377_ i1=$abc$109383$new_n29352_ nq=$abc$109383$new_n36063_
 .subckt nand2_x0 i0=$abc$109383$new_n36063_ i1=$abc$109383$new_n35738_ nq=$abc$109383$new_n36064_
-.subckt oa22_x2 i0=$abc$109383$new_n36040_ i1=$abc$109383$new_n36064_ i2=$abc$109383$new_n36062_ q=$abc$109383$new_n36065_
+.subckt or21nand_x1 i0=$abc$109383$new_n36040_ i1=$abc$109383$new_n36064_ i2=$abc$109383$new_n36062_ nq=$abc$109383$new_n36065_
 .subckt nand2_x0 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29529_ nq=$abc$109383$new_n36066_
 .subckt nand2_x0 i0=$abc$109383$new_n34122_ i1=$abc$109383$new_n29351_ nq=$abc$109383$new_n36067_
-.subckt a2_x2 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29506_ q=$abc$109383$new_n36068_
-.subckt nxr2_x1 i0=$abc$109383$new_n36068_ i1=$abc$109383$new_n36067_ nq=$abc$109383$new_n36069_
-.subckt nxr2_x1 i0=$abc$109383$new_n36069_ i1=$abc$109383$new_n36066_ nq=$abc$109383$new_n36070_
+.subckt and2_x1 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29506_ q=$abc$109383$new_n36068_
+.subckt nexor2_x0 i0=$abc$109383$new_n36068_ i1=$abc$109383$new_n36067_ nq=$abc$109383$new_n36069_
+.subckt nexor2_x0 i0=$abc$109383$new_n36069_ i1=$abc$109383$new_n36066_ nq=$abc$109383$new_n36070_
 .subckt nand4_x0 i0=$abc$109383$new_n35364_ i1=$abc$109383$new_n35048_ i2=$abc$109383$new_n29273_ i3=$abc$109383$new_n29419_ nq=$abc$109383$new_n36071_
 .subckt nand2_x0 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n29272_ nq=$abc$109383$new_n36072_
-.subckt a2_x2 i0=$abc$109383$new_n36072_ i1=$abc$109383$new_n35750_ q=$abc$109383$new_n36073_
-.subckt ao22_x2 i0=$abc$109383$new_n36047_ i1=$abc$109383$new_n36073_ i2=$abc$109383$new_n36071_ q=$abc$109383$new_n36074_
-.subckt nxr2_x1 i0=$abc$109383$new_n36074_ i1=$abc$109383$new_n36070_ nq=$abc$109383$new_n36075_
-.subckt nxr2_x1 i0=$abc$109383$new_n36075_ i1=$abc$109383$new_n36065_ nq=$abc$109383$new_n36076_
-.subckt a4_x2 i0=$abc$109383$new_n35757_ i1=$abc$109383$new_n35080_ i2=$abc$109383$new_n29749_ i3=$abc$109383$new_n29474_ q=$abc$109383$new_n36077_
-.subckt oa22_x2 i0=$abc$109383$new_n36048_ i1=$abc$109383$new_n36055_ i2=$abc$109383$new_n36077_ q=$abc$109383$new_n36078_
+.subckt and2_x1 i0=$abc$109383$new_n36072_ i1=$abc$109383$new_n35750_ q=$abc$109383$new_n36073_
+.subckt and21nor_x1 i0=$abc$109383$new_n36047_ i1=$abc$109383$new_n36073_ i2=$abc$109383$new_n36071_ nq=$abc$109383$new_n36074_
+.subckt nexor2_x0 i0=$abc$109383$new_n36074_ i1=$abc$109383$new_n36070_ nq=$abc$109383$new_n36075_
+.subckt nexor2_x0 i0=$abc$109383$new_n36075_ i1=$abc$109383$new_n36065_ nq=$abc$109383$new_n36076_
+.subckt and4_x1 i0=$abc$109383$new_n35757_ i1=$abc$109383$new_n35080_ i2=$abc$109383$new_n29749_ i3=$abc$109383$new_n29474_ q=$abc$109383$new_n36077_
+.subckt or21nand_x1 i0=$abc$109383$new_n36048_ i1=$abc$109383$new_n36055_ i2=$abc$109383$new_n36077_ nq=$abc$109383$new_n36078_
 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29329_ nq=$abc$109383$new_n36079_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[29] i1=$abc$109383$new_n29272_ nq=$abc$109383$new_n36080_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29295_ q=$abc$109383$new_n36081_
-.subckt nxr2_x1 i0=$abc$109383$new_n36081_ i1=$abc$109383$new_n36080_ nq=$abc$109383$new_n36082_
-.subckt nxr2_x1 i0=$abc$109383$new_n36082_ i1=$abc$109383$new_n36079_ nq=$abc$109383$new_n36083_
-.subckt a3_x2 i0=$abc$109383$new_n35489_ i1=$abc$109383$new_n29757_ i2=$abc$109383$new_n29448_ q=$abc$109383$new_n36084_
-.subckt oa22_x2 i0=$abc$109383$new_n36052_ i1=$abc$109383$new_n35758_ i2=$abc$109383$new_n36084_ q=$abc$109383$new_n36085_
-.subckt a2_x2 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29417_ q=$abc$109383$new_n36086_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29295_ q=$abc$109383$new_n36081_
+.subckt nexor2_x0 i0=$abc$109383$new_n36081_ i1=$abc$109383$new_n36080_ nq=$abc$109383$new_n36082_
+.subckt nexor2_x0 i0=$abc$109383$new_n36082_ i1=$abc$109383$new_n36079_ nq=$abc$109383$new_n36083_
+.subckt and3_x1 i0=$abc$109383$new_n35489_ i1=$abc$109383$new_n29757_ i2=$abc$109383$new_n29448_ q=$abc$109383$new_n36084_
+.subckt or21nand_x1 i0=$abc$109383$new_n36052_ i1=$abc$109383$new_n35758_ i2=$abc$109383$new_n36084_ nq=$abc$109383$new_n36085_
+.subckt and2_x1 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29417_ q=$abc$109383$new_n36086_
 .subckt nand3_x0 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29393_ i2=$abc$109383$new_n29753_ nq=$abc$109383$new_n36087_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29392_ q=$abc$109383$new_n36088_
-.subckt oa22_x2 i0=$abc$109383$new_n29753_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n36088_ q=$abc$109383$new_n36089_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29392_ q=$abc$109383$new_n36088_
+.subckt or21nand_x1 i0=$abc$109383$new_n29753_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n36088_ nq=$abc$109383$new_n36089_
 .subckt nand3_x0 i0=$abc$109383$new_n36089_ i1=$abc$109383$new_n36087_ i2=$abc$109383$new_n36086_ nq=$abc$109383$new_n36090_
-.subckt oa22_x2 i0=$abc$109383$new_n36089_ i1=$abc$109383$new_n36087_ i2=$abc$109383$new_n36086_ q=$abc$109383$new_n36091_
+.subckt or21nand_x1 i0=$abc$109383$new_n36089_ i1=$abc$109383$new_n36087_ i2=$abc$109383$new_n36086_ nq=$abc$109383$new_n36091_
 .subckt nand3_x0 i0=$abc$109383$new_n36091_ i1=$abc$109383$new_n36090_ i2=$abc$109383$new_n36085_ nq=$abc$109383$new_n36092_
-.subckt oa22_x2 i0=$abc$109383$new_n36091_ i1=$abc$109383$new_n36090_ i2=$abc$109383$new_n36085_ q=$abc$109383$new_n36093_
+.subckt or21nand_x1 i0=$abc$109383$new_n36091_ i1=$abc$109383$new_n36090_ i2=$abc$109383$new_n36085_ nq=$abc$109383$new_n36093_
 .subckt nand3_x0 i0=$abc$109383$new_n36093_ i1=$abc$109383$new_n36092_ i2=$abc$109383$new_n36083_ nq=$abc$109383$new_n36094_
-.subckt oa22_x2 i0=$abc$109383$new_n36093_ i1=$abc$109383$new_n36092_ i2=$abc$109383$new_n36083_ q=$abc$109383$new_n36095_
+.subckt or21nand_x1 i0=$abc$109383$new_n36093_ i1=$abc$109383$new_n36092_ i2=$abc$109383$new_n36083_ nq=$abc$109383$new_n36095_
 .subckt nand3_x0 i0=$abc$109383$new_n36095_ i1=$abc$109383$new_n36094_ i2=$abc$109383$new_n36078_ nq=$abc$109383$new_n36096_
-.subckt oa22_x2 i0=$abc$109383$new_n36095_ i1=$abc$109383$new_n36094_ i2=$abc$109383$new_n36078_ q=$abc$109383$new_n36097_
-.subckt a2_x2 i0=$abc$109383$new_n36097_ i1=$abc$109383$new_n36096_ q=$abc$109383$new_n36098_
-.subckt nxr2_x1 i0=$abc$109383$new_n36098_ i1=$abc$109383$new_n36076_ nq=$abc$109383$new_n36099_
-.subckt nxr2_x1 i0=$abc$109383$new_n36099_ i1=$abc$109383$new_n36061_ nq=$abc$109383$new_n36100_
-.subckt nxr2_x1 i0=$abc$109383$new_n36100_ i1=$abc$109383$new_n36045_ nq=$abc$109383$new_n36101_
-.subckt nxr2_x1 i0=$abc$109383$new_n36101_ i1=$abc$109383$new_n36010_ nq=$abc$109383$new_n36102_
-.subckt nxr2_x1 i0=$abc$109383$new_n36102_ i1=$abc$109383$new_n35997_ nq=$abc$109383$new_n36103_
-.subckt nxr2_x1 i0=$abc$109383$new_n36103_ i1=$abc$109383$new_n35939_ nq=$abc$109383$new_n36104_
-.subckt nxr2_x1 i0=$abc$109383$new_n36104_ i1=$abc$109383$new_n35930_ nq=$abc$109383$new_n36105_
-.subckt nxr2_x1 i0=$abc$109383$new_n36105_ i1=$abc$109383$new_n35836_ nq=$abc$109383$new_n36106_
-.subckt nxr2_x1 i0=$abc$109383$new_n36106_ i1=$abc$109383$new_n35829_ nq=$abc$109383$new_n36107_
-.subckt nxr2_x1 i0=$abc$109383$new_n36107_ i1=$abc$109383$new_n35807_ nq=$abc$109383$new_n36108_
-.subckt nxr2_x1 i0=$abc$109383$new_n36108_ i1=$abc$109383$new_n35799_ nq=$abc$109383$new_n36109_
-.subckt nxr2_x1 i0=$abc$109383$new_n36109_ i1=$abc$109383$new_n35787_ nq=$abc$109383$new_n36110_
+.subckt or21nand_x1 i0=$abc$109383$new_n36095_ i1=$abc$109383$new_n36094_ i2=$abc$109383$new_n36078_ nq=$abc$109383$new_n36097_
+.subckt and2_x1 i0=$abc$109383$new_n36097_ i1=$abc$109383$new_n36096_ q=$abc$109383$new_n36098_
+.subckt nexor2_x0 i0=$abc$109383$new_n36098_ i1=$abc$109383$new_n36076_ nq=$abc$109383$new_n36099_
+.subckt nexor2_x0 i0=$abc$109383$new_n36099_ i1=$abc$109383$new_n36061_ nq=$abc$109383$new_n36100_
+.subckt nexor2_x0 i0=$abc$109383$new_n36100_ i1=$abc$109383$new_n36045_ nq=$abc$109383$new_n36101_
+.subckt nexor2_x0 i0=$abc$109383$new_n36101_ i1=$abc$109383$new_n36010_ nq=$abc$109383$new_n36102_
+.subckt nexor2_x0 i0=$abc$109383$new_n36102_ i1=$abc$109383$new_n35997_ nq=$abc$109383$new_n36103_
+.subckt nexor2_x0 i0=$abc$109383$new_n36103_ i1=$abc$109383$new_n35939_ nq=$abc$109383$new_n36104_
+.subckt nexor2_x0 i0=$abc$109383$new_n36104_ i1=$abc$109383$new_n35930_ nq=$abc$109383$new_n36105_
+.subckt nexor2_x0 i0=$abc$109383$new_n36105_ i1=$abc$109383$new_n35836_ nq=$abc$109383$new_n36106_
+.subckt nexor2_x0 i0=$abc$109383$new_n36106_ i1=$abc$109383$new_n35829_ nq=$abc$109383$new_n36107_
+.subckt nexor2_x0 i0=$abc$109383$new_n36107_ i1=$abc$109383$new_n35807_ nq=$abc$109383$new_n36108_
+.subckt nexor2_x0 i0=$abc$109383$new_n36108_ i1=$abc$109383$new_n35799_ nq=$abc$109383$new_n36109_
+.subckt nexor2_x0 i0=$abc$109383$new_n36109_ i1=$abc$109383$new_n35787_ nq=$abc$109383$new_n36110_
 .subckt nand2_x0 i0=$abc$109383$new_n36110_ i1=$abc$109383$new_n35782_ nq=$abc$109383$new_n36111_
-.subckt ao22_x2 i0=$abc$109383$new_n36110_ i1=$abc$109383$new_n35782_ i2=$abc$109383$new_n31803_ q=$abc$109383$new_n36112_
+.subckt and21nor_x1 i0=$abc$109383$new_n36110_ i1=$abc$109383$new_n35782_ i2=$abc$109383$new_n31803_ nq=$abc$109383$new_n36112_
 .subckt nand2_x0 i0=$abc$109383$new_n36112_ i1=$abc$109383$new_n36111_ nq=$abc$109383$new_n36113_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[33] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n36114_
-.subckt a2_x2 i0=$abc$109383$new_n36114_ i1=$abc$109383$new_n36113_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102890
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[33] i2=$abc$109383$new_n31806_ nq=$abc$109383$new_n36114_
+.subckt and2_x1 i0=$abc$109383$new_n36114_ i1=$abc$109383$new_n36113_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102890
 .subckt buf_x4 i=$abc$109383$new_n27420_ q=$abc$109383$new_n36116_
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[34] nq=$abc$109383$new_n36117_
-.subckt ao22_x2 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n36117_ q=$abc$109383$new_n36118_
+.subckt and21nor_x1 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n36117_ nq=$abc$109383$new_n36118_
 .subckt nor2_x0 i0=$abc$109383$new_n36118_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n36119_
 .subckt nand2_x0 i0=$abc$109383$new_n35772_ i1=$abc$109383$new_n35784_ nq=$abc$109383$new_n36120_
-.subckt nxr2_x1 i0=$abc$109383$new_n35772_ i1=$abc$109383$new_n35784_ nq=$abc$109383$new_n36121_
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-.subckt ao22_x2 i0=$abc$109383$new_n35641_ i1=$abc$109383$new_n36199_ i2=$abc$109383$new_n36198_ q=$abc$109383$new_n36200_
-.subckt nxr2_x1 i0=$abc$109383$new_n35996_ i1=$abc$109383$new_n36200_ nq=$abc$109383$new_n36201_
-.subckt nxr2_x1 i0=$abc$109383$new_n36102_ i1=$abc$109383$new_n36201_ nq=$abc$109383$new_n36202_
+.subckt nexor2_x0 i0=$abc$109383$new_n35666_ i1=$abc$109383$new_n35942_ nq=$abc$109383$new_n36199_
+.subckt and21nor_x1 i0=$abc$109383$new_n35641_ i1=$abc$109383$new_n36199_ i2=$abc$109383$new_n36198_ nq=$abc$109383$new_n36200_
+.subckt nexor2_x0 i0=$abc$109383$new_n35996_ i1=$abc$109383$new_n36200_ nq=$abc$109383$new_n36201_
+.subckt nexor2_x0 i0=$abc$109383$new_n36102_ i1=$abc$109383$new_n36201_ nq=$abc$109383$new_n36202_
 .subckt nand2_x0 i0=$abc$109383$new_n35767_ i1=$abc$109383$new_n35832_ nq=$abc$109383$new_n36203_
-.subckt oa22_x2 i0=$abc$109383$new_n35932_ i1=$abc$109383$new_n36203_ i2=$abc$109383$new_n36202_ q=$abc$109383$new_n36204_
-.subckt a2_x2 i0=$abc$109383$new_n35766_ i1=$abc$109383$new_n35931_ q=$abc$109383$new_n36205_
-.subckt oa22_x2 i0=$abc$109383$new_n35832_ i1=$abc$109383$new_n35767_ i2=$abc$109383$new_n36205_ q=$abc$109383$new_n36206_
-.subckt nxr2_x1 i0=$abc$109383$new_n36103_ i1=$abc$109383$new_n36206_ nq=$abc$109383$new_n36207_
-.subckt ao22_x2 i0=$abc$109383$new_n35930_ i1=$abc$109383$new_n36207_ i2=$abc$109383$new_n36204_ q=$abc$109383$new_n36208_
-.subckt a2_x2 i0=$abc$109383$new_n35886_ i1=$abc$109383$new_n35573_ q=$abc$109383$new_n36209_
+.subckt or21nand_x1 i0=$abc$109383$new_n35932_ i1=$abc$109383$new_n36203_ i2=$abc$109383$new_n36202_ nq=$abc$109383$new_n36204_
+.subckt and2_x1 i0=$abc$109383$new_n35766_ i1=$abc$109383$new_n35931_ q=$abc$109383$new_n36205_
+.subckt or21nand_x1 i0=$abc$109383$new_n35832_ i1=$abc$109383$new_n35767_ i2=$abc$109383$new_n36205_ nq=$abc$109383$new_n36206_
+.subckt nexor2_x0 i0=$abc$109383$new_n36103_ i1=$abc$109383$new_n36206_ nq=$abc$109383$new_n36207_
+.subckt and21nor_x1 i0=$abc$109383$new_n35930_ i1=$abc$109383$new_n36207_ i2=$abc$109383$new_n36204_ nq=$abc$109383$new_n36208_
+.subckt and2_x1 i0=$abc$109383$new_n35886_ i1=$abc$109383$new_n35573_ q=$abc$109383$new_n36209_
 .subckt nand2_x0 i0=$abc$109383$new_n35578_ i1=$abc$109383$new_n35889_ nq=$abc$109383$new_n36210_
-.subckt oa22_x2 i0=$abc$109383$new_n35878_ i1=$abc$109383$new_n36210_ i2=$abc$109383$new_n36209_ q=$abc$109383$new_n36211_
+.subckt or21nand_x1 i0=$abc$109383$new_n35878_ i1=$abc$109383$new_n36210_ i2=$abc$109383$new_n36209_ nq=$abc$109383$new_n36211_
 .subckt nand2_x0 i0=$abc$109383$new_n35918_ i1=$abc$109383$new_n36211_ nq=$abc$109383$new_n36212_
-.subckt a4_x2 i0=$abc$109383$new_n35511_ i1=$abc$109383$new_n35875_ i2=$abc$109383$new_n34522_ i3=$abc$109383$new_n35874_ q=$abc$109383$new_n36213_
+.subckt and4_x1 i0=$abc$109383$new_n35511_ i1=$abc$109383$new_n35875_ i2=$abc$109383$new_n34522_ i3=$abc$109383$new_n35874_ q=$abc$109383$new_n36213_
 .subckt nand2_x0 i0=$abc$109383$new_n35893_ i1=$abc$109383$new_n35570_ nq=$abc$109383$new_n36214_
-.subckt oa22_x2 i0=$abc$109383$new_n35888_ i1=$abc$109383$new_n36214_ i2=$abc$109383$new_n36213_ q=$abc$109383$new_n36215_
-.subckt nxr2_x1 i0=$abc$109383$new_n35905_ i1=$abc$109383$new_n36215_ nq=$abc$109383$new_n36216_
-.subckt nxr2_x1 i0=$abc$109383$new_n35917_ i1=$abc$109383$new_n36216_ nq=$abc$109383$new_n36217_
+.subckt or21nand_x1 i0=$abc$109383$new_n35888_ i1=$abc$109383$new_n36214_ i2=$abc$109383$new_n36213_ nq=$abc$109383$new_n36215_
+.subckt nexor2_x0 i0=$abc$109383$new_n35905_ i1=$abc$109383$new_n36215_ nq=$abc$109383$new_n36216_
+.subckt nexor2_x0 i0=$abc$109383$new_n35917_ i1=$abc$109383$new_n36216_ nq=$abc$109383$new_n36217_
 .subckt nand2_x0 i0=$abc$109383$new_n36217_ i1=$abc$109383$new_n35891_ nq=$abc$109383$new_n36218_
-.subckt a3_x2 i0=$abc$109383$new_n36218_ i1=$abc$109383$new_n36212_ i2=$abc$109383$new_n36188_ q=$abc$109383$new_n36219_
-.subckt oa22_x2 i0=$abc$109383$new_n36182_ i1=$abc$109383$new_n35920_ i2=$abc$109383$new_n36219_ q=$abc$109383$new_n36220_
+.subckt and3_x1 i0=$abc$109383$new_n36218_ i1=$abc$109383$new_n36212_ i2=$abc$109383$new_n36188_ q=$abc$109383$new_n36219_
+.subckt or21nand_x1 i0=$abc$109383$new_n36182_ i1=$abc$109383$new_n35920_ i2=$abc$109383$new_n36219_ nq=$abc$109383$new_n36220_
 .subckt nand2_x0 i0=$abc$109383$new_n29260_ i1=$abc$109383$new_n29476_ nq=$abc$109383$new_n36221_
 .subckt nand3_x0 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29378_ i2=$abc$109383$new_n29476_ nq=$abc$109383$new_n36222_
 .subckt nand2_x0 i0=$abc$109383$new_n36222_ i1=$abc$109383$new_n36221_ nq=$abc$109383$new_n36223_
 .subckt nand4_x0 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29259_ i2=$abc$109383$new_n29378_ i3=$abc$109383$new_n35533_ nq=$abc$109383$new_n36224_
 .subckt nand2_x0 i0=$abc$109383$new_n36224_ i1=$abc$109383$new_n35814_ nq=$abc$109383$new_n36225_
-.subckt a2_x2 i0=$abc$109383$new_n36225_ i1=$abc$109383$new_n36223_ q=$abc$109383$new_n36226_
+.subckt and2_x1 i0=$abc$109383$new_n36225_ i1=$abc$109383$new_n36223_ q=$abc$109383$new_n36226_
 .subckt nand2_x0 i0=$abc$109383$new_n35861_ i1=$abc$109383$new_n36174_ nq=$abc$109383$new_n36227_
-.subckt a2_x2 i0=$abc$109383$new_n29246_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n36228_
-.subckt nxr2_x1 i0=$abc$109383$new_n35860_ i1=$abc$109383$new_n36228_ nq=$abc$109383$new_n36229_
-.subckt a2_x2 i0=$abc$109383$new_n36229_ i1=$abc$109383$new_n35856_ q=$abc$109383$new_n36230_
-.subckt ao22_x2 i0=$abc$109383$new_n35866_ i1=$abc$109383$new_n36230_ i2=$abc$109383$new_n36227_ q=$abc$109383$new_n36231_
+.subckt and2_x1 i0=$abc$109383$new_n29246_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n36228_
+.subckt nexor2_x0 i0=$abc$109383$new_n35860_ i1=$abc$109383$new_n36228_ nq=$abc$109383$new_n36229_
+.subckt and2_x1 i0=$abc$109383$new_n36229_ i1=$abc$109383$new_n35856_ q=$abc$109383$new_n36230_
+.subckt and21nor_x1 i0=$abc$109383$new_n35866_ i1=$abc$109383$new_n36230_ i2=$abc$109383$new_n36227_ nq=$abc$109383$new_n36231_
 .subckt buf_x4 i=$abc$109383$new_n35524_ q=$abc$109383$new_n36232_
 .subckt nand4_x0 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29237_ i2=$abc$109383$new_n35155_ i3=$abc$109383$new_n29424_ nq=$abc$109383$new_n36233_
 .subckt nand2_x0 i0=$abc$109383$new_n35160_ i1=$abc$109383$new_n29397_ nq=$abc$109383$new_n36234_
-.subckt a2_x2 i0=$abc$109383$new_n36234_ i1=$abc$109383$new_n35858_ q=$abc$109383$new_n36235_
-.subckt ao22_x2 i0=$abc$109383$new_n35857_ i1=$abc$109383$new_n36235_ i2=$abc$109383$new_n36233_ q=$abc$109383$new_n36236_
+.subckt and2_x1 i0=$abc$109383$new_n36234_ i1=$abc$109383$new_n35858_ q=$abc$109383$new_n36235_
+.subckt and21nor_x1 i0=$abc$109383$new_n35857_ i1=$abc$109383$new_n36235_ i2=$abc$109383$new_n36233_ nq=$abc$109383$new_n36236_
 .subckt nand2_x0 i0=$abc$109383$new_n29246_ i1=$abc$109383$new_n35533_ nq=$abc$109383$new_n36237_
 .subckt nand2_x0 i0=$abc$109383$new_n34859_ i1=soc.cpu.minerva.payload__src1$44[29] nq=$abc$109383$new_n36238_
-.subckt a2_x2 i0=$abc$109383$new_n35160_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n36239_
-.subckt nxr2_x1 i0=$abc$109383$new_n36239_ i1=$abc$109383$new_n36238_ nq=$abc$109383$new_n36240_
-.subckt nxr2_x1 i0=$abc$109383$new_n36240_ i1=$abc$109383$new_n36237_ nq=$abc$109383$new_n36241_
-.subckt nxr2_x1 i0=$abc$109383$new_n36241_ i1=$abc$109383$new_n36236_ nq=$abc$109383$new_n36242_
+.subckt and2_x1 i0=$abc$109383$new_n35160_ i1=soc.cpu.minerva.payload__src1$44[30] q=$abc$109383$new_n36239_
+.subckt nexor2_x0 i0=$abc$109383$new_n36239_ i1=$abc$109383$new_n36238_ nq=$abc$109383$new_n36240_
+.subckt nexor2_x0 i0=$abc$109383$new_n36240_ i1=$abc$109383$new_n36237_ nq=$abc$109383$new_n36241_
+.subckt nexor2_x0 i0=$abc$109383$new_n36241_ i1=$abc$109383$new_n36236_ nq=$abc$109383$new_n36242_
 .subckt nand2_x0 i0=$abc$109383$new_n35865_ i1=$abc$109383$new_n35534_ nq=$abc$109383$new_n36243_
 .subckt buf_x4 i=$abc$109383$new_n36243_ q=$abc$109383$new_n36244_
-.subckt a2_x2 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29476_ q=$abc$109383$new_n36245_
+.subckt and2_x1 i0=soc.cpu.minerva.multiplier.x_src1_signed i1=$abc$109383$new_n29476_ q=$abc$109383$new_n36245_
 .subckt nand2_x0 i0=$abc$109383$new_n36245_ i1=$abc$109383$new_n29830_ nq=$abc$109383$new_n36246_
-.subckt oa22_x2 i0=$abc$109383$new_n36223_ i1=$abc$109383$new_n36225_ i2=$abc$109383$new_n36246_ q=$abc$109383$new_n36247_
+.subckt or21nand_x1 i0=$abc$109383$new_n36223_ i1=$abc$109383$new_n36225_ i2=$abc$109383$new_n36246_ nq=$abc$109383$new_n36247_
 .subckt buf_x4 i=$abc$109383$new_n36247_ q=$abc$109383$new_n36248_
-.subckt a2_x2 i0=$abc$109383$new_n36248_ i1=$abc$109383$new_n36244_ q=$abc$109383$new_n36249_
+.subckt and2_x1 i0=$abc$109383$new_n36248_ i1=$abc$109383$new_n36244_ q=$abc$109383$new_n36249_
 .subckt buf_x4 i=$abc$109383$new_n36249_ q=$abc$109383$new_n36250_
-.subckt nxr2_x1 i0=$abc$109383$new_n36250_ i1=$abc$109383$new_n36242_ nq=$abc$109383$new_n36251_
-.subckt nxr2_x1 i0=$abc$109383$new_n36251_ i1=$abc$109383$new_n36231_ nq=$abc$109383$new_n36252_
-.subckt nxr2_x1 i0=$abc$109383$new_n36252_ i1=$abc$109383$new_n36226_ nq=$abc$109383$new_n36253_
-.subckt a2_x2 i0=$abc$109383$new_n35639_ i1=$abc$109383$new_n35910_ q=$abc$109383$new_n36254_
+.subckt nexor2_x0 i0=$abc$109383$new_n36250_ i1=$abc$109383$new_n36242_ nq=$abc$109383$new_n36251_
+.subckt nexor2_x0 i0=$abc$109383$new_n36251_ i1=$abc$109383$new_n36231_ nq=$abc$109383$new_n36252_
+.subckt nexor2_x0 i0=$abc$109383$new_n36252_ i1=$abc$109383$new_n36226_ nq=$abc$109383$new_n36253_
+.subckt and2_x1 i0=$abc$109383$new_n35639_ i1=$abc$109383$new_n35910_ q=$abc$109383$new_n36254_
 .subckt nand2_x0 i0=$abc$109383$new_n35913_ i1=$abc$109383$new_n35634_ nq=$abc$109383$new_n36255_
-.subckt oa22_x2 i0=$abc$109383$new_n35629_ i1=$abc$109383$new_n36255_ i2=$abc$109383$new_n36254_ q=$abc$109383$new_n36256_
+.subckt or21nand_x1 i0=$abc$109383$new_n35629_ i1=$abc$109383$new_n36255_ i2=$abc$109383$new_n36254_ nq=$abc$109383$new_n36256_
 .subckt nand2_x0 i0=$abc$109383$new_n36256_ i1=$abc$109383$new_n35906_ nq=$abc$109383$new_n36257_
-.subckt ao22_x2 i0=$abc$109383$new_n35891_ i1=$abc$109383$new_n36217_ i2=$abc$109383$new_n36257_ q=$abc$109383$new_n36258_
-.subckt a4_x2 i0=$abc$109383$new_n35883_ i1=$abc$109383$new_n35882_ i2=$abc$109383$new_n29537_ i3=$abc$109383$new_n29563_ q=$abc$109383$new_n36259_
+.subckt and21nor_x1 i0=$abc$109383$new_n35891_ i1=$abc$109383$new_n36217_ i2=$abc$109383$new_n36257_ nq=$abc$109383$new_n36258_
+.subckt and4_x1 i0=$abc$109383$new_n35883_ i1=$abc$109383$new_n35882_ i2=$abc$109383$new_n29537_ i3=$abc$109383$new_n29563_ q=$abc$109383$new_n36259_
 .subckt nand2_x0 i0=$abc$109383$new_n35902_ i1=$abc$109383$new_n35626_ nq=$abc$109383$new_n36260_
-.subckt oa22_x2 i0=$abc$109383$new_n35915_ i1=$abc$109383$new_n36260_ i2=$abc$109383$new_n36259_ q=$abc$109383$new_n36261_
+.subckt or21nand_x1 i0=$abc$109383$new_n35915_ i1=$abc$109383$new_n36260_ i2=$abc$109383$new_n36259_ nq=$abc$109383$new_n36261_
 .subckt nand2_x0 i0=$abc$109383$new_n36261_ i1=$abc$109383$new_n35900_ nq=$abc$109383$new_n36262_
-.subckt a2_x2 i0=$abc$109383$new_n35560_ i1=$abc$109383$new_n34854_ q=$abc$109383$new_n36263_
-.subckt nxr2_x1 i0=$abc$109383$new_n35899_ i1=$abc$109383$new_n36263_ nq=$abc$109383$new_n36264_
-.subckt a2_x2 i0=$abc$109383$new_n35904_ i1=$abc$109383$new_n36264_ q=$abc$109383$new_n36265_
-.subckt ao22_x2 i0=$abc$109383$new_n35895_ i1=$abc$109383$new_n36265_ i2=$abc$109383$new_n36262_ q=$abc$109383$new_n36266_
+.subckt and2_x1 i0=$abc$109383$new_n35560_ i1=$abc$109383$new_n34854_ q=$abc$109383$new_n36263_
+.subckt nexor2_x0 i0=$abc$109383$new_n35899_ i1=$abc$109383$new_n36263_ nq=$abc$109383$new_n36264_
+.subckt and2_x1 i0=$abc$109383$new_n35904_ i1=$abc$109383$new_n36264_ q=$abc$109383$new_n36265_
+.subckt and21nor_x1 i0=$abc$109383$new_n35895_ i1=$abc$109383$new_n36265_ i2=$abc$109383$new_n36262_ nq=$abc$109383$new_n36266_
 .subckt nand4_x0 i0=$abc$109383$new_n35511_ i1=$abc$109383$new_n35875_ i2=$abc$109383$new_n34523_ i3=$abc$109383$new_n34522_ nq=$abc$109383$new_n36267_
 .subckt nand2_x0 i0=$abc$109383$new_n35510_ i1=$abc$109383$new_n34523_ nq=$abc$109383$new_n36268_
-.subckt a2_x2 i0=$abc$109383$new_n36268_ i1=$abc$109383$new_n35897_ q=$abc$109383$new_n36269_
-.subckt ao22_x2 i0=$abc$109383$new_n35896_ i1=$abc$109383$new_n36269_ i2=$abc$109383$new_n36267_ q=$abc$109383$new_n36270_
+.subckt and2_x1 i0=$abc$109383$new_n36268_ i1=$abc$109383$new_n35897_ q=$abc$109383$new_n36269_
+.subckt and21nor_x1 i0=$abc$109383$new_n35896_ i1=$abc$109383$new_n36269_ i2=$abc$109383$new_n36267_ nq=$abc$109383$new_n36270_
 .subckt nand2_x0 i0=$abc$109383$new_n35560_ i1=$abc$109383$new_n29422_ nq=$abc$109383$new_n36271_
 .subckt nand2_x0 i0=$abc$109383$new_n34901_ i1=$abc$109383$new_n29299_ nq=$abc$109383$new_n36272_
-.subckt a2_x2 i0=$abc$109383$new_n34900_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n36273_
-.subckt nxr2_x1 i0=$abc$109383$new_n36273_ i1=$abc$109383$new_n36272_ nq=$abc$109383$new_n36274_
-.subckt nxr2_x1 i0=$abc$109383$new_n36274_ i1=$abc$109383$new_n36271_ nq=$abc$109383$new_n36275_
+.subckt and2_x1 i0=$abc$109383$new_n34900_ i1=soc.cpu.minerva.payload__src1$44[27] q=$abc$109383$new_n36273_
+.subckt nexor2_x0 i0=$abc$109383$new_n36273_ i1=$abc$109383$new_n36272_ nq=$abc$109383$new_n36274_
+.subckt nexor2_x0 i0=$abc$109383$new_n36274_ i1=$abc$109383$new_n36271_ nq=$abc$109383$new_n36275_
 .subckt nand4_x0 i0=$abc$109383$new_n34891_ i1=$abc$109383$new_n35554_ i2=$abc$109383$new_n29513_ i3=$abc$109383$new_n29536_ nq=$abc$109383$new_n36276_
 .subckt nand2_x0 i0=$abc$109383$new_n35194_ i1=$abc$109383$new_n29513_ nq=$abc$109383$new_n36277_
-.subckt a2_x2 i0=$abc$109383$new_n36277_ i1=$abc$109383$new_n35946_ q=$abc$109383$new_n36278_
-.subckt ao22_x2 i0=$abc$109383$new_n35945_ i1=$abc$109383$new_n36278_ i2=$abc$109383$new_n36276_ q=$abc$109383$new_n36279_
-.subckt nxr2_x1 i0=$abc$109383$new_n36279_ i1=$abc$109383$new_n36275_ nq=$abc$109383$new_n36280_
-.subckt nxr2_x1 i0=$abc$109383$new_n36280_ i1=$abc$109383$new_n36270_ nq=$abc$109383$new_n36281_
-.subckt a4_x2 i0=$abc$109383$new_n35582_ i1=$abc$109383$new_n35907_ i2=$abc$109383$new_n29614_ i3=$abc$109383$new_n35630_ q=$abc$109383$new_n36282_
+.subckt and2_x1 i0=$abc$109383$new_n36277_ i1=$abc$109383$new_n35946_ q=$abc$109383$new_n36278_
+.subckt and21nor_x1 i0=$abc$109383$new_n35945_ i1=$abc$109383$new_n36278_ i2=$abc$109383$new_n36276_ nq=$abc$109383$new_n36279_
+.subckt nexor2_x0 i0=$abc$109383$new_n36279_ i1=$abc$109383$new_n36275_ nq=$abc$109383$new_n36280_
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 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29351_ nq=$abc$109383$new_n36445_
 .subckt nand2_x0 i0=$abc$109383$new_n34760_ i1=$abc$109383$new_n29295_ nq=$abc$109383$new_n36446_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29328_ q=$abc$109383$new_n36447_
-.subckt nxr2_x1 i0=$abc$109383$new_n36447_ i1=$abc$109383$new_n36446_ nq=$abc$109383$new_n36448_
-.subckt nxr2_x1 i0=$abc$109383$new_n36448_ i1=$abc$109383$new_n36445_ nq=$abc$109383$new_n36449_
-.subckt a3_x2 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29393_ i2=$abc$109383$new_n29753_ q=$abc$109383$new_n36450_
-.subckt oa22_x2 i0=$abc$109383$new_n36086_ i1=$abc$109383$new_n36089_ i2=$abc$109383$new_n36450_ q=$abc$109383$new_n36451_
-.subckt a2_x2 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29271_ q=$abc$109383$new_n36452_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29328_ q=$abc$109383$new_n36447_
+.subckt nexor2_x0 i0=$abc$109383$new_n36447_ i1=$abc$109383$new_n36446_ nq=$abc$109383$new_n36448_
+.subckt nexor2_x0 i0=$abc$109383$new_n36448_ i1=$abc$109383$new_n36445_ nq=$abc$109383$new_n36449_
+.subckt and3_x1 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29393_ i2=$abc$109383$new_n29753_ q=$abc$109383$new_n36450_
+.subckt or21nand_x1 i0=$abc$109383$new_n36086_ i1=$abc$109383$new_n36089_ i2=$abc$109383$new_n36450_ nq=$abc$109383$new_n36451_
+.subckt and2_x1 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29271_ q=$abc$109383$new_n36452_
 .subckt nand3_x0 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29418_ i2=$abc$109383$new_n29749_ nq=$abc$109383$new_n36453_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29417_ q=$abc$109383$new_n36454_
-.subckt oa22_x2 i0=$abc$109383$new_n29749_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n36454_ q=$abc$109383$new_n36455_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29417_ q=$abc$109383$new_n36454_
+.subckt or21nand_x1 i0=$abc$109383$new_n29749_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n36454_ nq=$abc$109383$new_n36455_
 .subckt nand3_x0 i0=$abc$109383$new_n36455_ i1=$abc$109383$new_n36453_ i2=$abc$109383$new_n36452_ nq=$abc$109383$new_n36456_
-.subckt oa22_x2 i0=$abc$109383$new_n36455_ i1=$abc$109383$new_n36453_ i2=$abc$109383$new_n36452_ q=$abc$109383$new_n36457_
+.subckt or21nand_x1 i0=$abc$109383$new_n36455_ i1=$abc$109383$new_n36453_ i2=$abc$109383$new_n36452_ nq=$abc$109383$new_n36457_
 .subckt nand3_x0 i0=$abc$109383$new_n36457_ i1=$abc$109383$new_n36456_ i2=$abc$109383$new_n36451_ nq=$abc$109383$new_n36458_
-.subckt oa22_x2 i0=$abc$109383$new_n36457_ i1=$abc$109383$new_n36456_ i2=$abc$109383$new_n36451_ q=$abc$109383$new_n36459_
+.subckt or21nand_x1 i0=$abc$109383$new_n36457_ i1=$abc$109383$new_n36456_ i2=$abc$109383$new_n36451_ nq=$abc$109383$new_n36459_
 .subckt nand3_x0 i0=$abc$109383$new_n36459_ i1=$abc$109383$new_n36458_ i2=$abc$109383$new_n36449_ nq=$abc$109383$new_n36460_
-.subckt oa22_x2 i0=$abc$109383$new_n36459_ i1=$abc$109383$new_n36458_ i2=$abc$109383$new_n36449_ q=$abc$109383$new_n36461_
+.subckt or21nand_x1 i0=$abc$109383$new_n36459_ i1=$abc$109383$new_n36458_ i2=$abc$109383$new_n36449_ nq=$abc$109383$new_n36461_
 .subckt nand3_x0 i0=$abc$109383$new_n36461_ i1=$abc$109383$new_n36460_ i2=$abc$109383$new_n36444_ nq=$abc$109383$new_n36462_
-.subckt oa22_x2 i0=$abc$109383$new_n36461_ i1=$abc$109383$new_n36460_ i2=$abc$109383$new_n36444_ q=$abc$109383$new_n36463_
-.subckt a2_x2 i0=$abc$109383$new_n36463_ i1=$abc$109383$new_n36462_ q=$abc$109383$new_n36464_
-.subckt nxr2_x1 i0=$abc$109383$new_n36464_ i1=$abc$109383$new_n36442_ nq=$abc$109383$new_n36465_
-.subckt nxr2_x1 i0=$abc$109383$new_n36465_ i1=$abc$109383$new_n36427_ nq=$abc$109383$new_n36466_
-.subckt nxr2_x1 i0=$abc$109383$new_n36466_ i1=$abc$109383$new_n36425_ nq=$abc$109383$new_n36467_
-.subckt nxr2_x1 i0=$abc$109383$new_n36467_ i1=$abc$109383$new_n36385_ nq=$abc$109383$new_n36468_
-.subckt nxr2_x1 i0=$abc$109383$new_n36468_ i1=$abc$109383$new_n36379_ nq=$abc$109383$new_n36469_
-.subckt nxr2_x1 i0=$abc$109383$new_n36469_ i1=$abc$109383$new_n36324_ nq=$abc$109383$new_n36470_
-.subckt nxr2_x1 i0=$abc$109383$new_n36470_ i1=$abc$109383$new_n36313_ nq=$abc$109383$new_n36471_
-.subckt nxr2_x1 i0=$abc$109383$new_n36471_ i1=$abc$109383$new_n36208_ nq=$abc$109383$new_n36472_
-.subckt nxr2_x1 i0=$abc$109383$new_n36472_ i1=$abc$109383$new_n36197_ nq=$abc$109383$new_n36473_
-.subckt nxr2_x1 i0=$abc$109383$new_n36473_ i1=$abc$109383$new_n36167_ nq=$abc$109383$new_n36474_
-.subckt nxr2_x1 i0=$abc$109383$new_n36474_ i1=$abc$109383$new_n36159_ nq=$abc$109383$new_n36475_
-.subckt nxr2_x1 i0=$abc$109383$new_n36475_ i1=$abc$109383$new_n36156_ nq=$abc$109383$new_n36476_
-.subckt nxr2_x1 i0=$abc$109383$new_n36476_ i1=$abc$109383$new_n36144_ nq=$abc$109383$new_n36477_
-.subckt ao22_x2 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n36477_ i2=$abc$109383$new_n36119_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102894
-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[35] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n36479_
+.subckt or21nand_x1 i0=$abc$109383$new_n36461_ i1=$abc$109383$new_n36460_ i2=$abc$109383$new_n36444_ nq=$abc$109383$new_n36463_
+.subckt and2_x1 i0=$abc$109383$new_n36463_ i1=$abc$109383$new_n36462_ q=$abc$109383$new_n36464_
+.subckt nexor2_x0 i0=$abc$109383$new_n36464_ i1=$abc$109383$new_n36442_ nq=$abc$109383$new_n36465_
+.subckt nexor2_x0 i0=$abc$109383$new_n36465_ i1=$abc$109383$new_n36427_ nq=$abc$109383$new_n36466_
+.subckt nexor2_x0 i0=$abc$109383$new_n36466_ i1=$abc$109383$new_n36425_ nq=$abc$109383$new_n36467_
+.subckt nexor2_x0 i0=$abc$109383$new_n36467_ i1=$abc$109383$new_n36385_ nq=$abc$109383$new_n36468_
+.subckt nexor2_x0 i0=$abc$109383$new_n36468_ i1=$abc$109383$new_n36379_ nq=$abc$109383$new_n36469_
+.subckt nexor2_x0 i0=$abc$109383$new_n36469_ i1=$abc$109383$new_n36324_ nq=$abc$109383$new_n36470_
+.subckt nexor2_x0 i0=$abc$109383$new_n36470_ i1=$abc$109383$new_n36313_ nq=$abc$109383$new_n36471_
+.subckt nexor2_x0 i0=$abc$109383$new_n36471_ i1=$abc$109383$new_n36208_ nq=$abc$109383$new_n36472_
+.subckt nexor2_x0 i0=$abc$109383$new_n36472_ i1=$abc$109383$new_n36197_ nq=$abc$109383$new_n36473_
+.subckt nexor2_x0 i0=$abc$109383$new_n36473_ i1=$abc$109383$new_n36167_ nq=$abc$109383$new_n36474_
+.subckt nexor2_x0 i0=$abc$109383$new_n36474_ i1=$abc$109383$new_n36159_ nq=$abc$109383$new_n36475_
+.subckt nexor2_x0 i0=$abc$109383$new_n36475_ i1=$abc$109383$new_n36156_ nq=$abc$109383$new_n36476_
+.subckt nexor2_x0 i0=$abc$109383$new_n36476_ i1=$abc$109383$new_n36144_ nq=$abc$109383$new_n36477_
+.subckt and21nor_x1 i0=$abc$109383$new_n32008_ i1=$abc$109383$new_n36477_ i2=$abc$109383$new_n36119_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102894
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[35] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n36479_
 .subckt nand3_x0 i0=$abc$109383$new_n36154_ i1=$abc$109383$new_n36148_ i2=$abc$109383$new_n36135_ nq=$abc$109383$new_n36480_
-.subckt ao22_x2 i0=$abc$109383$new_n35799_ i1=$abc$109383$new_n36136_ i2=$abc$109383$new_n36480_ q=$abc$109383$new_n36481_
+.subckt and21nor_x1 i0=$abc$109383$new_n35799_ i1=$abc$109383$new_n36136_ i2=$abc$109383$new_n36480_ nq=$abc$109383$new_n36481_
 .subckt nor2_x0 i0=$abc$109383$new_n36475_ i1=$abc$109383$new_n36481_ nq=$abc$109383$new_n36482_
-.subckt a3_x2 i0=$abc$109383$new_n36137_ i1=$abc$109383$new_n36129_ i2=$abc$109383$new_n35787_ q=$abc$109383$new_n36483_
-.subckt oa22_x2 i0=$abc$109383$new_n36137_ i1=$abc$109383$new_n36129_ i2=$abc$109383$new_n35787_ q=$abc$109383$new_n36484_
-.subckt oa22_x2 i0=$abc$109383$new_n35778_ i1=$abc$109383$new_n36484_ i2=$abc$109383$new_n36483_ q=$abc$109383$new_n36485_
-.subckt a3_x2 i0=$abc$109383$new_n36123_ i1=$abc$109383$new_n35781_ i2=$abc$109383$new_n35442_ q=$abc$109383$new_n36486_
-.subckt ao22_x2 i0=$abc$109383$new_n36486_ i1=$abc$109383$new_n36485_ i2=$abc$109383$new_n36476_ q=$abc$109383$new_n36487_
-.subckt a2_x2 i0=$abc$109383$new_n35769_ i1=$abc$109383$new_n35802_ q=$abc$109383$new_n36488_
-.subckt ao22_x2 i0=$abc$109383$new_n36151_ i1=$abc$109383$new_n36488_ i2=$abc$109383$new_n36105_ q=$abc$109383$new_n36489_
-.subckt oa22_x2 i0=$abc$109383$new_n36147_ i1=$abc$109383$new_n36106_ i2=$abc$109383$new_n36489_ q=$abc$109383$new_n36490_
-.subckt a2_x2 i0=$abc$109383$new_n35867_ i1=$abc$109383$new_n36170_ q=$abc$109383$new_n36491_
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+.subckt and2_x1 i0=$abc$109383$new_n35769_ i1=$abc$109383$new_n35802_ q=$abc$109383$new_n36488_
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+.subckt and2_x1 i0=$abc$109383$new_n35867_ i1=$abc$109383$new_n36170_ q=$abc$109383$new_n36491_
 .subckt nand2_x0 i0=$abc$109383$new_n36176_ i1=$abc$109383$new_n35852_ nq=$abc$109383$new_n36492_
-.subckt oa22_x2 i0=$abc$109383$new_n35844_ i1=$abc$109383$new_n36492_ i2=$abc$109383$new_n36491_ q=$abc$109383$new_n36493_
-.subckt nxr2_x1 i0=$abc$109383$new_n36196_ i1=$abc$109383$new_n36493_ nq=$abc$109383$new_n36494_
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 .subckt nand2_x0 i0=$abc$109383$new_n36472_ i1=$abc$109383$new_n36494_ nq=$abc$109383$new_n36495_
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-.subckt nxr2_x1 i0=$abc$109383$new_n36471_ i1=$abc$109383$new_n36498_ nq=$abc$109383$new_n36499_
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 .subckt nand2_x0 i0=$abc$109383$new_n36499_ i1=$abc$109383$new_n36197_ nq=$abc$109383$new_n36500_
-.subckt a3_x2 i0=$abc$109383$new_n36500_ i1=$abc$109383$new_n36495_ i2=$abc$109383$new_n36490_ q=$abc$109383$new_n36501_
-.subckt oa22_x2 i0=$abc$109383$new_n36159_ i1=$abc$109383$new_n36474_ i2=$abc$109383$new_n36501_ q=$abc$109383$new_n36502_
-.subckt a3_x2 i0=$abc$109383$new_n36192_ i1=$abc$109383$new_n36190_ i2=$abc$109383$new_n36183_ q=$abc$109383$new_n36503_
-.subckt oa22_x2 i0=$abc$109383$new_n35840_ i1=$abc$109383$new_n35929_ i2=$abc$109383$new_n36503_ q=$abc$109383$new_n36504_
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 .subckt nand2_x0 i0=$abc$109383$new_n36504_ i1=$abc$109383$new_n36493_ nq=$abc$109383$new_n36505_
 .subckt nand3_x0 i0=$abc$109383$new_n36218_ i1=$abc$109383$new_n36212_ i2=$abc$109383$new_n36188_ nq=$abc$109383$new_n36506_
-.subckt ao22_x2 i0=$abc$109383$new_n35869_ i1=$abc$109383$new_n36189_ i2=$abc$109383$new_n36506_ q=$abc$109383$new_n36507_
-.subckt nxr2_x1 i0=$abc$109383$new_n36312_ i1=$abc$109383$new_n36507_ nq=$abc$109383$new_n36508_
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+.subckt and4_x1 i0=$abc$109383$new_n35331_ i1=$abc$109383$new_n35377_ i2=$abc$109383$new_n29529_ i3=$abc$109383$new_n29508_ q=$abc$109383$new_n36762_
 .subckt nand2_x0 i0=$abc$109383$new_n35330_ i1=$abc$109383$new_n29530_ nq=$abc$109383$new_n36763_
 .subckt nand2_x0 i0=$abc$109383$new_n36763_ i1=$abc$109383$new_n36433_ nq=$abc$109383$new_n36764_
-.subckt oa22_x2 i0=$abc$109383$new_n36751_ i1=$abc$109383$new_n36764_ i2=$abc$109383$new_n36762_ q=$abc$109383$new_n36765_
+.subckt or21nand_x1 i0=$abc$109383$new_n36751_ i1=$abc$109383$new_n36764_ i2=$abc$109383$new_n36762_ nq=$abc$109383$new_n36765_
 .subckt nand2_x0 i0=$abc$109383$new_n33332_ i1=$abc$109383$new_n29578_ nq=$abc$109383$new_n36766_
 .subckt nand2_x0 i0=$abc$109383$new_n34433_ i1=$abc$109383$new_n34981_ nq=$abc$109383$new_n36767_
-.subckt a2_x2 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29553_ q=$abc$109383$new_n36768_
-.subckt nxr2_x1 i0=$abc$109383$new_n36768_ i1=$abc$109383$new_n36767_ nq=$abc$109383$new_n36769_
-.subckt nxr2_x1 i0=$abc$109383$new_n36769_ i1=$abc$109383$new_n36766_ nq=$abc$109383$new_n36770_
+.subckt and2_x1 i0=$abc$109383$new_n33587_ i1=$abc$109383$new_n29553_ q=$abc$109383$new_n36768_
+.subckt nexor2_x0 i0=$abc$109383$new_n36768_ i1=$abc$109383$new_n36767_ nq=$abc$109383$new_n36769_
+.subckt nexor2_x0 i0=$abc$109383$new_n36769_ i1=$abc$109383$new_n36766_ nq=$abc$109383$new_n36770_
 .subckt nand4_x0 i0=$abc$109383$new_n35364_ i1=$abc$109383$new_n35048_ i2=$abc$109383$new_n29330_ i3=$abc$109383$new_n29297_ nq=$abc$109383$new_n36771_
 .subckt nand2_x0 i0=$abc$109383$new_n35048_ i1=$abc$109383$new_n29329_ nq=$abc$109383$new_n36772_
-.subckt a2_x2 i0=$abc$109383$new_n36772_ i1=$abc$109383$new_n36446_ q=$abc$109383$new_n36773_
-.subckt ao22_x2 i0=$abc$109383$new_n36445_ i1=$abc$109383$new_n36773_ i2=$abc$109383$new_n36771_ q=$abc$109383$new_n36774_
-.subckt nxr2_x1 i0=$abc$109383$new_n36774_ i1=$abc$109383$new_n36770_ nq=$abc$109383$new_n36775_
-.subckt nxr2_x1 i0=$abc$109383$new_n36775_ i1=$abc$109383$new_n36765_ nq=$abc$109383$new_n36776_
-.subckt a3_x2 i0=$abc$109383$new_n36457_ i1=$abc$109383$new_n36456_ i2=$abc$109383$new_n36451_ q=$abc$109383$new_n36777_
-.subckt oa22_x2 i0=$abc$109383$new_n36449_ i1=$abc$109383$new_n36459_ i2=$abc$109383$new_n36777_ q=$abc$109383$new_n36778_
+.subckt and2_x1 i0=$abc$109383$new_n36772_ i1=$abc$109383$new_n36446_ q=$abc$109383$new_n36773_
+.subckt and21nor_x1 i0=$abc$109383$new_n36445_ i1=$abc$109383$new_n36773_ i2=$abc$109383$new_n36771_ nq=$abc$109383$new_n36774_
+.subckt nexor2_x0 i0=$abc$109383$new_n36774_ i1=$abc$109383$new_n36770_ nq=$abc$109383$new_n36775_
+.subckt nexor2_x0 i0=$abc$109383$new_n36775_ i1=$abc$109383$new_n36765_ nq=$abc$109383$new_n36776_
+.subckt and3_x1 i0=$abc$109383$new_n36457_ i1=$abc$109383$new_n36456_ i2=$abc$109383$new_n36451_ q=$abc$109383$new_n36777_
+.subckt or21nand_x1 i0=$abc$109383$new_n36449_ i1=$abc$109383$new_n36459_ i2=$abc$109383$new_n36777_ nq=$abc$109383$new_n36778_
 .subckt nand2_x0 i0=$abc$109383$new_n34134_ i1=$abc$109383$new_n29507_ nq=$abc$109383$new_n36779_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__src2$45[29] i1=$abc$109383$new_n29328_ nq=$abc$109383$new_n36780_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29350_ q=$abc$109383$new_n36781_
-.subckt nxr2_x1 i0=$abc$109383$new_n36781_ i1=$abc$109383$new_n36780_ nq=$abc$109383$new_n36782_
-.subckt nxr2_x1 i0=$abc$109383$new_n36782_ i1=$abc$109383$new_n36779_ nq=$abc$109383$new_n36783_
-.subckt a3_x2 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29418_ i2=$abc$109383$new_n29749_ q=$abc$109383$new_n36784_
-.subckt oa22_x2 i0=$abc$109383$new_n36452_ i1=$abc$109383$new_n36455_ i2=$abc$109383$new_n36784_ q=$abc$109383$new_n36785_
-.subckt a2_x2 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29294_ q=$abc$109383$new_n36786_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[28] i1=$abc$109383$new_n29350_ q=$abc$109383$new_n36781_
+.subckt nexor2_x0 i0=$abc$109383$new_n36781_ i1=$abc$109383$new_n36780_ nq=$abc$109383$new_n36782_
+.subckt nexor2_x0 i0=$abc$109383$new_n36782_ i1=$abc$109383$new_n36779_ nq=$abc$109383$new_n36783_
+.subckt and3_x1 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29418_ i2=$abc$109383$new_n29749_ q=$abc$109383$new_n36784_
+.subckt or21nand_x1 i0=$abc$109383$new_n36452_ i1=$abc$109383$new_n36455_ i2=$abc$109383$new_n36784_ nq=$abc$109383$new_n36785_
+.subckt and2_x1 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29294_ q=$abc$109383$new_n36786_
 .subckt nand3_x0 i0=$abc$109383$new_n35490_ i1=$abc$109383$new_n29272_ i2=$abc$109383$new_n29746_ nq=$abc$109383$new_n36787_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29271_ q=$abc$109383$new_n36788_
-.subckt oa22_x2 i0=$abc$109383$new_n29746_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n36788_ q=$abc$109383$new_n36789_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29271_ q=$abc$109383$new_n36788_
+.subckt or21nand_x1 i0=$abc$109383$new_n29746_ i1=$abc$109383$new_n35489_ i2=$abc$109383$new_n36788_ nq=$abc$109383$new_n36789_
 .subckt nand3_x0 i0=$abc$109383$new_n36789_ i1=$abc$109383$new_n36787_ i2=$abc$109383$new_n36786_ nq=$abc$109383$new_n36790_
-.subckt oa22_x2 i0=$abc$109383$new_n36789_ i1=$abc$109383$new_n36787_ i2=$abc$109383$new_n36786_ q=$abc$109383$new_n36791_
+.subckt or21nand_x1 i0=$abc$109383$new_n36789_ i1=$abc$109383$new_n36787_ i2=$abc$109383$new_n36786_ nq=$abc$109383$new_n36791_
 .subckt nand3_x0 i0=$abc$109383$new_n36791_ i1=$abc$109383$new_n36790_ i2=$abc$109383$new_n36785_ nq=$abc$109383$new_n36792_
-.subckt oa22_x2 i0=$abc$109383$new_n36791_ i1=$abc$109383$new_n36790_ i2=$abc$109383$new_n36785_ q=$abc$109383$new_n36793_
+.subckt or21nand_x1 i0=$abc$109383$new_n36791_ i1=$abc$109383$new_n36790_ i2=$abc$109383$new_n36785_ nq=$abc$109383$new_n36793_
 .subckt nand3_x0 i0=$abc$109383$new_n36793_ i1=$abc$109383$new_n36792_ i2=$abc$109383$new_n36783_ nq=$abc$109383$new_n36794_
-.subckt oa22_x2 i0=$abc$109383$new_n36793_ i1=$abc$109383$new_n36792_ i2=$abc$109383$new_n36783_ q=$abc$109383$new_n36795_
+.subckt or21nand_x1 i0=$abc$109383$new_n36793_ i1=$abc$109383$new_n36792_ i2=$abc$109383$new_n36783_ nq=$abc$109383$new_n36795_
 .subckt nand3_x0 i0=$abc$109383$new_n36795_ i1=$abc$109383$new_n36794_ i2=$abc$109383$new_n36778_ nq=$abc$109383$new_n36796_
-.subckt oa22_x2 i0=$abc$109383$new_n36795_ i1=$abc$109383$new_n36794_ i2=$abc$109383$new_n36778_ q=$abc$109383$new_n36797_
-.subckt a2_x2 i0=$abc$109383$new_n36797_ i1=$abc$109383$new_n36796_ q=$abc$109383$new_n36798_
-.subckt nxr2_x1 i0=$abc$109383$new_n36798_ i1=$abc$109383$new_n36776_ nq=$abc$109383$new_n36799_
-.subckt nxr2_x1 i0=$abc$109383$new_n36799_ i1=$abc$109383$new_n36761_ nq=$abc$109383$new_n36800_
-.subckt nxr2_x1 i0=$abc$109383$new_n36800_ i1=$abc$109383$new_n36759_ nq=$abc$109383$new_n36801_
-.subckt nxr2_x1 i0=$abc$109383$new_n36801_ i1=$abc$109383$new_n36720_ nq=$abc$109383$new_n36802_
-.subckt nxr2_x1 i0=$abc$109383$new_n36802_ i1=$abc$109383$new_n36714_ nq=$abc$109383$new_n36803_
-.subckt nxr2_x1 i0=$abc$109383$new_n36803_ i1=$abc$109383$new_n36660_ nq=$abc$109383$new_n36804_
-.subckt nxr2_x1 i0=$abc$109383$new_n36804_ i1=$abc$109383$new_n36649_ nq=$abc$109383$new_n36805_
-.subckt nxr2_x1 i0=$abc$109383$new_n36805_ i1=$abc$109383$new_n36552_ nq=$abc$109383$new_n36806_
-.subckt nxr2_x1 i0=$abc$109383$new_n36806_ i1=$abc$109383$new_n36541_ nq=$abc$109383$new_n36807_
-.subckt nxr2_x1 i0=$abc$109383$new_n36807_ i1=$abc$109383$new_n36512_ nq=$abc$109383$new_n36808_
-.subckt nxr2_x1 i0=$abc$109383$new_n36808_ i1=$abc$109383$new_n36505_ nq=$abc$109383$new_n36809_
-.subckt nxr2_x1 i0=$abc$109383$new_n36809_ i1=$abc$109383$new_n36502_ nq=$abc$109383$new_n36810_
-.subckt o3_x2 i0=$abc$109383$new_n36810_ i1=$abc$109383$new_n36487_ i2=$abc$109383$new_n36482_ q=$abc$109383$new_n36811_
+.subckt or21nand_x1 i0=$abc$109383$new_n36795_ i1=$abc$109383$new_n36794_ i2=$abc$109383$new_n36778_ nq=$abc$109383$new_n36797_
+.subckt and2_x1 i0=$abc$109383$new_n36797_ i1=$abc$109383$new_n36796_ q=$abc$109383$new_n36798_
+.subckt nexor2_x0 i0=$abc$109383$new_n36798_ i1=$abc$109383$new_n36776_ nq=$abc$109383$new_n36799_
+.subckt nexor2_x0 i0=$abc$109383$new_n36799_ i1=$abc$109383$new_n36761_ nq=$abc$109383$new_n36800_
+.subckt nexor2_x0 i0=$abc$109383$new_n36800_ i1=$abc$109383$new_n36759_ nq=$abc$109383$new_n36801_
+.subckt nexor2_x0 i0=$abc$109383$new_n36801_ i1=$abc$109383$new_n36720_ nq=$abc$109383$new_n36802_
+.subckt nexor2_x0 i0=$abc$109383$new_n36802_ i1=$abc$109383$new_n36714_ nq=$abc$109383$new_n36803_
+.subckt nexor2_x0 i0=$abc$109383$new_n36803_ i1=$abc$109383$new_n36660_ nq=$abc$109383$new_n36804_
+.subckt nexor2_x0 i0=$abc$109383$new_n36804_ i1=$abc$109383$new_n36649_ nq=$abc$109383$new_n36805_
+.subckt nexor2_x0 i0=$abc$109383$new_n36805_ i1=$abc$109383$new_n36552_ nq=$abc$109383$new_n36806_
+.subckt nexor2_x0 i0=$abc$109383$new_n36806_ i1=$abc$109383$new_n36541_ nq=$abc$109383$new_n36807_
+.subckt nexor2_x0 i0=$abc$109383$new_n36807_ i1=$abc$109383$new_n36512_ nq=$abc$109383$new_n36808_
+.subckt nexor2_x0 i0=$abc$109383$new_n36808_ i1=$abc$109383$new_n36505_ nq=$abc$109383$new_n36809_
+.subckt nexor2_x0 i0=$abc$109383$new_n36809_ i1=$abc$109383$new_n36502_ nq=$abc$109383$new_n36810_
+.subckt or3_x1 i0=$abc$109383$new_n36810_ i1=$abc$109383$new_n36487_ i2=$abc$109383$new_n36482_ q=$abc$109383$new_n36811_
 .subckt nand2_x0 i0=$abc$109383$new_n36811_ i1=$abc$109383$new_n33877_ nq=$abc$109383$new_n36812_
-.subckt ao22_x2 i0=$abc$109383$new_n36482_ i1=$abc$109383$new_n36487_ i2=$abc$109383$new_n36810_ q=$abc$109383$new_n36813_
-.subckt ao22_x2 i0=$abc$109383$new_n36813_ i1=$abc$109383$new_n36812_ i2=$abc$109383$new_n36479_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102898
+.subckt and21nor_x1 i0=$abc$109383$new_n36482_ i1=$abc$109383$new_n36487_ i2=$abc$109383$new_n36810_ nq=$abc$109383$new_n36813_
+.subckt and21nor_x1 i0=$abc$109383$new_n36813_ i1=$abc$109383$new_n36812_ i2=$abc$109383$new_n36479_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102898
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[36] nq=$abc$109383$new_n36815_
-.subckt ao22_x2 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n36815_ q=$abc$109383$new_n36816_
+.subckt and21nor_x1 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n36815_ nq=$abc$109383$new_n36816_
 .subckt nor2_x0 i0=$abc$109383$new_n36816_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n36817_
 .subckt nand3_x0 i0=$abc$109383$new_n36500_ i1=$abc$109383$new_n36495_ i2=$abc$109383$new_n36490_ nq=$abc$109383$new_n36818_
-.subckt nxr2_x1 i0=$abc$109383$new_n36473_ i1=$abc$109383$new_n36490_ nq=$abc$109383$new_n36819_
+.subckt nexor2_x0 i0=$abc$109383$new_n36473_ i1=$abc$109383$new_n36490_ nq=$abc$109383$new_n36819_
 .subckt nand2_x0 i0=$abc$109383$new_n36158_ i1=$abc$109383$new_n36146_ nq=$abc$109383$new_n36820_
-.subckt ao22_x2 i0=$abc$109383$new_n36820_ i1=$abc$109383$new_n36819_ i2=$abc$109383$new_n36818_ q=$abc$109383$new_n36821_
-.subckt nxr2_x1 i0=$abc$109383$new_n36809_ i1=$abc$109383$new_n36821_ nq=$abc$109383$new_n36822_
-.subckt a2_x2 i0=$abc$109383$new_n36822_ i1=$abc$109383$new_n36476_ q=$abc$109383$new_n36823_
-.subckt ao22_x2 i0=$abc$109383$new_n36486_ i1=$abc$109383$new_n36485_ i2=$abc$109383$new_n36823_ q=$abc$109383$new_n36824_
-.subckt a2_x2 i0=$abc$109383$new_n36504_ i1=$abc$109383$new_n36493_ q=$abc$109383$new_n36825_
-.subckt nxr2_x1 i0=$abc$109383$new_n36808_ i1=$abc$109383$new_n36825_ nq=$abc$109383$new_n36826_
+.subckt and21nor_x1 i0=$abc$109383$new_n36820_ i1=$abc$109383$new_n36819_ i2=$abc$109383$new_n36818_ nq=$abc$109383$new_n36821_
+.subckt nexor2_x0 i0=$abc$109383$new_n36809_ i1=$abc$109383$new_n36821_ nq=$abc$109383$new_n36822_
+.subckt and2_x1 i0=$abc$109383$new_n36822_ i1=$abc$109383$new_n36476_ q=$abc$109383$new_n36823_
+.subckt and21nor_x1 i0=$abc$109383$new_n36486_ i1=$abc$109383$new_n36485_ i2=$abc$109383$new_n36823_ nq=$abc$109383$new_n36824_
+.subckt and2_x1 i0=$abc$109383$new_n36504_ i1=$abc$109383$new_n36493_ q=$abc$109383$new_n36825_
+.subckt nexor2_x0 i0=$abc$109383$new_n36808_ i1=$abc$109383$new_n36825_ nq=$abc$109383$new_n36826_
 .subckt nand2_x0 i0=$abc$109383$new_n36826_ i1=$abc$109383$new_n36821_ nq=$abc$109383$new_n36827_
-.subckt a2_x2 i0=$abc$109383$new_n36809_ i1=$abc$109383$new_n36502_ q=$abc$109383$new_n36828_
-.subckt ao22_x2 i0=$abc$109383$new_n36482_ i1=$abc$109383$new_n36828_ i2=$abc$109383$new_n36827_ q=$abc$109383$new_n36829_
-.subckt a2_x2 i0=$abc$109383$new_n36104_ i1=$abc$109383$new_n36163_ q=$abc$109383$new_n36830_
-.subckt ao22_x2 i0=$abc$109383$new_n36497_ i1=$abc$109383$new_n36830_ i2=$abc$109383$new_n36471_ q=$abc$109383$new_n36831_
-.subckt oa22_x2 i0=$abc$109383$new_n36494_ i1=$abc$109383$new_n36472_ i2=$abc$109383$new_n36831_ q=$abc$109383$new_n36832_
+.subckt and2_x1 i0=$abc$109383$new_n36809_ i1=$abc$109383$new_n36502_ q=$abc$109383$new_n36828_
+.subckt and21nor_x1 i0=$abc$109383$new_n36482_ i1=$abc$109383$new_n36828_ i2=$abc$109383$new_n36827_ nq=$abc$109383$new_n36829_
+.subckt and2_x1 i0=$abc$109383$new_n36104_ i1=$abc$109383$new_n36163_ q=$abc$109383$new_n36830_
+.subckt and21nor_x1 i0=$abc$109383$new_n36497_ i1=$abc$109383$new_n36830_ i2=$abc$109383$new_n36471_ nq=$abc$109383$new_n36831_
+.subckt or21nand_x1 i0=$abc$109383$new_n36494_ i1=$abc$109383$new_n36472_ i2=$abc$109383$new_n36831_ nq=$abc$109383$new_n36832_
 .subckt nor3_x0 i0=$abc$109383$new_n36523_ i1=$abc$109383$new_n36518_ i2=$abc$109383$new_n36231_ nq=$abc$109383$new_n36833_
-.subckt nxr2_x1 i0=$abc$109383$new_n36250_ i1=$abc$109383$new_n36522_ nq=$abc$109383$new_n36834_
+.subckt nexor2_x0 i0=$abc$109383$new_n36250_ i1=$abc$109383$new_n36522_ nq=$abc$109383$new_n36834_
 .subckt nand2_x0 i0=$abc$109383$new_n36834_ i1=$abc$109383$new_n36231_ nq=$abc$109383$new_n36835_
-.subckt oa22_x2 i0=$abc$109383$new_n36565_ i1=$abc$109383$new_n36835_ i2=$abc$109383$new_n36833_ q=$abc$109383$new_n36836_
-.subckt nxr2_x1 i0=$abc$109383$new_n36540_ i1=$abc$109383$new_n36836_ nq=$abc$109383$new_n36837_
+.subckt or21nand_x1 i0=$abc$109383$new_n36565_ i1=$abc$109383$new_n36835_ i2=$abc$109383$new_n36833_ nq=$abc$109383$new_n36836_
+.subckt nexor2_x0 i0=$abc$109383$new_n36540_ i1=$abc$109383$new_n36836_ nq=$abc$109383$new_n36837_
 .subckt nand2_x0 i0=$abc$109383$new_n36806_ i1=$abc$109383$new_n36837_ nq=$abc$109383$new_n36838_
-.subckt a2_x2 i0=$abc$109383$new_n36102_ i1=$abc$109383$new_n36201_ q=$abc$109383$new_n36839_
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-.subckt oa22_x2 i0=$abc$109383$new_n36508_ i1=$abc$109383$new_n36470_ i2=$abc$109383$new_n36840_ q=$abc$109383$new_n36841_
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 .subckt nor2_x0 i0=$abc$109383$new_n37173_ i1=$abc$109383$new_n37172_ nq=$abc$109383$new_n37174_
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 .subckt nor2_x0 i0=$abc$109383$new_n37173_ i1=$abc$109383$new_n37181_ nq=$abc$109383$new_n37182_
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 .subckt nand2_x0 i0=$abc$109383$new_n37167_ i1=$abc$109383$new_n37189_ nq=$abc$109383$new_n37190_
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 .subckt nand2_x0 i0=$abc$109383$new_n36906_ i1=$abc$109383$new_n36904_ nq=$abc$109383$new_n37209_
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 .subckt nand2_x0 i0=$abc$109383$new_n36944_ i1=$abc$109383$new_n36664_ nq=$abc$109383$new_n37272_
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 .subckt nand2_x0 i0=$abc$109383$new_n36946_ i1=$abc$109383$new_n37276_ nq=$abc$109383$new_n37277_
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 .subckt nand4_x0 i0=$abc$109383$new_n36597_ i1=$abc$109383$new_n36891_ i2=$abc$109383$new_n35155_ i3=$abc$109383$new_n29424_ nq=$abc$109383$new_n37279_
 .subckt nand2_x0 i0=$abc$109383$new_n35875_ i1=$abc$109383$new_n35155_ nq=$abc$109383$new_n37280_
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 .subckt nand2_x0 i0=$abc$109383$new_n35560_ i1=$abc$109383$new_n29477_ nq=$abc$109383$new_n37283_
 .subckt nand2_x0 i0=$abc$109383$new_n34901_ i1=soc.cpu.minerva.payload__src1$44[29] nq=$abc$109383$new_n37284_
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 .subckt nand4_x0 i0=$abc$109383$new_n35555_ i1=$abc$109383$new_n35882_ i2=$abc$109383$new_n34523_ i3=$abc$109383$new_n34522_ nq=$abc$109383$new_n37288_
 .subckt nand2_x0 i0=$abc$109383$new_n35554_ i1=$abc$109383$new_n29300_ nq=$abc$109383$new_n37289_
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 .subckt nand2_x0 i0=$abc$109383$new_n37001_ i1=$abc$109383$new_n36673_ nq=$abc$109383$new_n37295_
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 .subckt nand2_x0 i0=$abc$109383$new_n37008_ i1=$abc$109383$new_n37296_ nq=$abc$109383$new_n37297_
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 .subckt nand2_x0 i0=$abc$109383$new_n37037_ i1=$abc$109383$new_n37308_ nq=$abc$109383$new_n37309_
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-.subckt nxr2_x1 i0=$abc$109383$new_n37472_ i1=$abc$109383$new_n37469_ nq=$abc$109383$new_n37473_
-.subckt oa22_x2 i0=$abc$109383$new_n37147_ i1=$abc$109383$new_n37150_ i2=$abc$109383$new_n37445_ q=$abc$109383$new_n37474_
-.subckt a2_x2 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29350_ q=$abc$109383$new_n37475_
+.subckt and2_x1 i0=$abc$109383$new_n34452_ i1=$abc$109383$new_n34981_ q=$abc$109383$new_n37471_
+.subckt nexor2_x0 i0=$abc$109383$new_n37471_ i1=$abc$109383$new_n37470_ nq=$abc$109383$new_n37472_
+.subckt nexor2_x0 i0=$abc$109383$new_n37472_ i1=$abc$109383$new_n37469_ nq=$abc$109383$new_n37473_
+.subckt or21nand_x1 i0=$abc$109383$new_n37147_ i1=$abc$109383$new_n37150_ i2=$abc$109383$new_n37445_ nq=$abc$109383$new_n37474_
+.subckt and2_x1 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n29350_ q=$abc$109383$new_n37475_
 .subckt nand3_x0 i0=$abc$109383$new_n35491_ i1=$abc$109383$new_n29329_ i2=$abc$109383$new_n29738_ nq=$abc$109383$new_n37476_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29328_ q=$abc$109383$new_n37477_
-.subckt oa22_x2 i0=$abc$109383$new_n29738_ i1=$abc$109383$new_n35490_ i2=$abc$109383$new_n37477_ q=$abc$109383$new_n37478_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__src2$45[31] i1=$abc$109383$new_n29328_ q=$abc$109383$new_n37477_
+.subckt or21nand_x1 i0=$abc$109383$new_n29738_ i1=$abc$109383$new_n35490_ i2=$abc$109383$new_n37477_ nq=$abc$109383$new_n37478_
 .subckt nand3_x0 i0=$abc$109383$new_n37478_ i1=$abc$109383$new_n37476_ i2=$abc$109383$new_n37475_ nq=$abc$109383$new_n37479_
-.subckt oa22_x2 i0=$abc$109383$new_n37478_ i1=$abc$109383$new_n37476_ i2=$abc$109383$new_n37475_ q=$abc$109383$new_n37480_
+.subckt or21nand_x1 i0=$abc$109383$new_n37478_ i1=$abc$109383$new_n37476_ i2=$abc$109383$new_n37475_ nq=$abc$109383$new_n37480_
 .subckt nand3_x0 i0=$abc$109383$new_n37480_ i1=$abc$109383$new_n37479_ i2=$abc$109383$new_n37474_ nq=$abc$109383$new_n37481_
-.subckt oa22_x2 i0=$abc$109383$new_n37480_ i1=$abc$109383$new_n37479_ i2=$abc$109383$new_n37474_ q=$abc$109383$new_n37482_
+.subckt or21nand_x1 i0=$abc$109383$new_n37480_ i1=$abc$109383$new_n37479_ i2=$abc$109383$new_n37474_ nq=$abc$109383$new_n37482_
 .subckt nand3_x0 i0=$abc$109383$new_n37482_ i1=$abc$109383$new_n37481_ i2=$abc$109383$new_n37473_ nq=$abc$109383$new_n37483_
-.subckt oa22_x2 i0=$abc$109383$new_n37482_ i1=$abc$109383$new_n37481_ i2=$abc$109383$new_n37473_ q=$abc$109383$new_n37484_
+.subckt or21nand_x1 i0=$abc$109383$new_n37482_ i1=$abc$109383$new_n37481_ i2=$abc$109383$new_n37473_ nq=$abc$109383$new_n37484_
 .subckt nand3_x0 i0=$abc$109383$new_n37484_ i1=$abc$109383$new_n37483_ i2=$abc$109383$new_n37468_ nq=$abc$109383$new_n37485_
-.subckt oa22_x2 i0=$abc$109383$new_n37484_ i1=$abc$109383$new_n37483_ i2=$abc$109383$new_n37468_ q=$abc$109383$new_n37486_
-.subckt a2_x2 i0=$abc$109383$new_n37486_ i1=$abc$109383$new_n37485_ q=$abc$109383$new_n37487_
-.subckt nxr2_x1 i0=$abc$109383$new_n37487_ i1=$abc$109383$new_n37467_ nq=$abc$109383$new_n37488_
-.subckt nxr2_x1 i0=$abc$109383$new_n37488_ i1=$abc$109383$new_n37452_ nq=$abc$109383$new_n37489_
-.subckt nxr2_x1 i0=$abc$109383$new_n37489_ i1=$abc$109383$new_n37436_ nq=$abc$109383$new_n37490_
-.subckt nxr2_x1 i0=$abc$109383$new_n37490_ i1=$abc$109383$new_n37398_ nq=$abc$109383$new_n37491_
-.subckt nxr2_x1 i0=$abc$109383$new_n37491_ i1=$abc$109383$new_n37392_ nq=$abc$109383$new_n37492_
-.subckt nxr2_x1 i0=$abc$109383$new_n37492_ i1=$abc$109383$new_n37336_ nq=$abc$109383$new_n37493_
-.subckt nxr2_x1 i0=$abc$109383$new_n37493_ i1=$abc$109383$new_n37325_ nq=$abc$109383$new_n37494_
-.subckt nxr2_x1 i0=$abc$109383$new_n37494_ i1=$abc$109383$new_n37237_ nq=$abc$109383$new_n37495_
-.subckt nxr2_x1 i0=$abc$109383$new_n37495_ i1=$abc$109383$new_n37226_ nq=$abc$109383$new_n37496_
-.subckt nxr2_x1 i0=$abc$109383$new_n37496_ i1=$abc$109383$new_n37208_ nq=$abc$109383$new_n37497_
-.subckt nxr2_x1 i0=$abc$109383$new_n37497_ i1=$abc$109383$new_n37201_ nq=$abc$109383$new_n37498_
-.subckt nxr2_x1 i0=$abc$109383$new_n37498_ i1=$abc$109383$new_n37198_ nq=$abc$109383$new_n37499_
-.subckt nxr2_x1 i0=$abc$109383$new_n37499_ i1=$abc$109383$new_n37182_ nq=$abc$109383$new_n37500_
+.subckt or21nand_x1 i0=$abc$109383$new_n37484_ i1=$abc$109383$new_n37483_ i2=$abc$109383$new_n37468_ nq=$abc$109383$new_n37486_
+.subckt and2_x1 i0=$abc$109383$new_n37486_ i1=$abc$109383$new_n37485_ q=$abc$109383$new_n37487_
+.subckt nexor2_x0 i0=$abc$109383$new_n37487_ i1=$abc$109383$new_n37467_ nq=$abc$109383$new_n37488_
+.subckt nexor2_x0 i0=$abc$109383$new_n37488_ i1=$abc$109383$new_n37452_ nq=$abc$109383$new_n37489_
+.subckt nexor2_x0 i0=$abc$109383$new_n37489_ i1=$abc$109383$new_n37436_ nq=$abc$109383$new_n37490_
+.subckt nexor2_x0 i0=$abc$109383$new_n37490_ i1=$abc$109383$new_n37398_ nq=$abc$109383$new_n37491_
+.subckt nexor2_x0 i0=$abc$109383$new_n37491_ i1=$abc$109383$new_n37392_ nq=$abc$109383$new_n37492_
+.subckt nexor2_x0 i0=$abc$109383$new_n37492_ i1=$abc$109383$new_n37336_ nq=$abc$109383$new_n37493_
+.subckt nexor2_x0 i0=$abc$109383$new_n37493_ i1=$abc$109383$new_n37325_ nq=$abc$109383$new_n37494_
+.subckt nexor2_x0 i0=$abc$109383$new_n37494_ i1=$abc$109383$new_n37237_ nq=$abc$109383$new_n37495_
+.subckt nexor2_x0 i0=$abc$109383$new_n37495_ i1=$abc$109383$new_n37226_ nq=$abc$109383$new_n37496_
+.subckt nexor2_x0 i0=$abc$109383$new_n37496_ i1=$abc$109383$new_n37208_ nq=$abc$109383$new_n37497_
+.subckt nexor2_x0 i0=$abc$109383$new_n37497_ i1=$abc$109383$new_n37201_ nq=$abc$109383$new_n37498_
+.subckt nexor2_x0 i0=$abc$109383$new_n37498_ i1=$abc$109383$new_n37198_ nq=$abc$109383$new_n37499_
+.subckt nexor2_x0 i0=$abc$109383$new_n37499_ i1=$abc$109383$new_n37182_ nq=$abc$109383$new_n37500_
 .subckt buf_x4 i=$abc$109383$new_n29222_ q=$abc$109383$new_n37501_
-.subckt ao22_x2 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n37500_ i2=$abc$109383$new_n37178_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102906
+.subckt and21nor_x1 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n37500_ i2=$abc$109383$new_n37178_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102906
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[38] nq=$abc$109383$new_n37503_
-.subckt ao22_x2 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n37503_ q=$abc$109383$new_n37504_
+.subckt and21nor_x1 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n37503_ nq=$abc$109383$new_n37504_
 .subckt nor2_x0 i0=$abc$109383$new_n37504_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n37505_
-.subckt a3_x2 i0=$abc$109383$new_n37195_ i1=$abc$109383$new_n37190_ i2=$abc$109383$new_n37185_ q=$abc$109383$new_n37506_
-.subckt a2_x2 i0=$abc$109383$new_n36848_ i1=$abc$109383$new_n36836_ q=$abc$109383$new_n37507_
-.subckt oa22_x2 i0=$abc$109383$new_n37507_ i1=$abc$109383$new_n37169_ i2=$abc$109383$new_n37506_ q=$abc$109383$new_n37508_
-.subckt a2_x2 i0=$abc$109383$new_n37498_ i1=$abc$109383$new_n37508_ q=$abc$109383$new_n37509_
-.subckt ao22_x2 i0=$abc$109383$new_n37181_ i1=$abc$109383$new_n37173_ i2=$abc$109383$new_n37499_ q=$abc$109383$new_n37510_
+.subckt and3_x1 i0=$abc$109383$new_n37195_ i1=$abc$109383$new_n37190_ i2=$abc$109383$new_n37185_ q=$abc$109383$new_n37506_
+.subckt and2_x1 i0=$abc$109383$new_n36848_ i1=$abc$109383$new_n36836_ q=$abc$109383$new_n37507_
+.subckt or21nand_x1 i0=$abc$109383$new_n37507_ i1=$abc$109383$new_n37169_ i2=$abc$109383$new_n37506_ nq=$abc$109383$new_n37508_
+.subckt and2_x1 i0=$abc$109383$new_n37498_ i1=$abc$109383$new_n37508_ q=$abc$109383$new_n37509_
+.subckt and21nor_x1 i0=$abc$109383$new_n37181_ i1=$abc$109383$new_n37173_ i2=$abc$109383$new_n37499_ nq=$abc$109383$new_n37510_
 .subckt nor2_x0 i0=$abc$109383$new_n37510_ i1=$abc$109383$new_n37509_ nq=$abc$109383$new_n37511_
-.subckt a2_x2 i0=$abc$109383$new_n36804_ i1=$abc$109383$new_n36852_ q=$abc$109383$new_n37512_
-.subckt ao22_x2 i0=$abc$109383$new_n37192_ i1=$abc$109383$new_n37512_ i2=$abc$109383$new_n37166_ q=$abc$109383$new_n37513_
-.subckt oa22_x2 i0=$abc$109383$new_n37189_ i1=$abc$109383$new_n37167_ i2=$abc$109383$new_n37513_ q=$abc$109383$new_n37514_
-.subckt a2_x2 i0=$abc$109383$new_n36918_ i1=$abc$109383$new_n37209_ q=$abc$109383$new_n37515_
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+.subckt and21nor_x1 i0=$abc$109383$new_n37192_ i1=$abc$109383$new_n37512_ i2=$abc$109383$new_n37166_ nq=$abc$109383$new_n37513_
+.subckt or21nand_x1 i0=$abc$109383$new_n37189_ i1=$abc$109383$new_n37167_ i2=$abc$109383$new_n37513_ nq=$abc$109383$new_n37514_
+.subckt and2_x1 i0=$abc$109383$new_n36918_ i1=$abc$109383$new_n37209_ q=$abc$109383$new_n37515_
 .subckt nand2_x0 i0=$abc$109383$new_n37211_ i1=$abc$109383$new_n36907_ nq=$abc$109383$new_n37516_
-.subckt oa22_x2 i0=$abc$109383$new_n36565_ i1=$abc$109383$new_n37516_ i2=$abc$109383$new_n37515_ q=$abc$109383$new_n37517_
-.subckt nxr2_x1 i0=$abc$109383$new_n37225_ i1=$abc$109383$new_n37517_ nq=$abc$109383$new_n37518_
+.subckt or21nand_x1 i0=$abc$109383$new_n36565_ i1=$abc$109383$new_n37516_ i2=$abc$109383$new_n37515_ nq=$abc$109383$new_n37517_
+.subckt nexor2_x0 i0=$abc$109383$new_n37225_ i1=$abc$109383$new_n37517_ nq=$abc$109383$new_n37518_
 .subckt nand2_x0 i0=$abc$109383$new_n37495_ i1=$abc$109383$new_n37518_ nq=$abc$109383$new_n37519_
-.subckt a2_x2 i0=$abc$109383$new_n36802_ i1=$abc$109383$new_n36878_ q=$abc$109383$new_n37520_
-.subckt ao22_x2 i0=$abc$109383$new_n37234_ i1=$abc$109383$new_n37520_ i2=$abc$109383$new_n37164_ q=$abc$109383$new_n37521_
-.subckt oa22_x2 i0=$abc$109383$new_n37204_ i1=$abc$109383$new_n37165_ i2=$abc$109383$new_n37521_ q=$abc$109383$new_n37522_
-.subckt nxr2_x1 i0=$abc$109383$new_n37494_ i1=$abc$109383$new_n37522_ nq=$abc$109383$new_n37523_
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+.subckt and21nor_x1 i0=$abc$109383$new_n37234_ i1=$abc$109383$new_n37520_ i2=$abc$109383$new_n37164_ nq=$abc$109383$new_n37521_
+.subckt or21nand_x1 i0=$abc$109383$new_n37204_ i1=$abc$109383$new_n37165_ i2=$abc$109383$new_n37521_ nq=$abc$109383$new_n37522_
+.subckt nexor2_x0 i0=$abc$109383$new_n37494_ i1=$abc$109383$new_n37522_ nq=$abc$109383$new_n37523_
 .subckt nand2_x0 i0=$abc$109383$new_n37523_ i1=$abc$109383$new_n37226_ nq=$abc$109383$new_n37524_
 .subckt nand3_x0 i0=$abc$109383$new_n37524_ i1=$abc$109383$new_n37519_ i2=$abc$109383$new_n37514_ nq=$abc$109383$new_n37525_
-.subckt nxr2_x1 i0=$abc$109383$new_n37496_ i1=$abc$109383$new_n37514_ nq=$abc$109383$new_n37526_
-.subckt ao22_x2 i0=$abc$109383$new_n37201_ i1=$abc$109383$new_n37526_ i2=$abc$109383$new_n37525_ q=$abc$109383$new_n37527_
-.subckt a3_x2 i0=$abc$109383$new_n37221_ i1=$abc$109383$new_n37219_ i2=$abc$109383$new_n37215_ q=$abc$109383$new_n37528_
-.subckt oa22_x2 i0=$abc$109383$new_n36899_ i1=$abc$109383$new_n36980_ i2=$abc$109383$new_n37528_ q=$abc$109383$new_n37529_
+.subckt nexor2_x0 i0=$abc$109383$new_n37496_ i1=$abc$109383$new_n37514_ nq=$abc$109383$new_n37526_
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+.subckt and3_x1 i0=$abc$109383$new_n37221_ i1=$abc$109383$new_n37219_ i2=$abc$109383$new_n37215_ q=$abc$109383$new_n37528_
+.subckt or21nand_x1 i0=$abc$109383$new_n36899_ i1=$abc$109383$new_n36980_ i2=$abc$109383$new_n37528_ nq=$abc$109383$new_n37529_
 .subckt nand2_x0 i0=$abc$109383$new_n37529_ i1=$abc$109383$new_n37517_ nq=$abc$109383$new_n37530_
 .subckt nand3_x0 i0=$abc$109383$new_n37247_ i1=$abc$109383$new_n37241_ i2=$abc$109383$new_n37217_ nq=$abc$109383$new_n37531_
-.subckt ao22_x2 i0=$abc$109383$new_n36920_ i1=$abc$109383$new_n37218_ i2=$abc$109383$new_n37531_ q=$abc$109383$new_n37532_
-.subckt nxr2_x1 i0=$abc$109383$new_n37324_ i1=$abc$109383$new_n37532_ nq=$abc$109383$new_n37533_
-.subckt nxr2_x1 i0=$abc$109383$new_n37493_ i1=$abc$109383$new_n37533_ nq=$abc$109383$new_n37534_
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+.subckt nexor2_x0 i0=$abc$109383$new_n37324_ i1=$abc$109383$new_n37532_ nq=$abc$109383$new_n37533_
+.subckt nexor2_x0 i0=$abc$109383$new_n37493_ i1=$abc$109383$new_n37533_ nq=$abc$109383$new_n37534_
 .subckt nand2_x0 i0=$abc$109383$new_n37165_ i1=$abc$109383$new_n37204_ nq=$abc$109383$new_n37535_
-.subckt oa22_x2 i0=$abc$109383$new_n37232_ i1=$abc$109383$new_n37535_ i2=$abc$109383$new_n37534_ q=$abc$109383$new_n37536_
-.subckt ao22_x2 i0=$abc$109383$new_n37226_ i1=$abc$109383$new_n37523_ i2=$abc$109383$new_n37536_ q=$abc$109383$new_n37537_
+.subckt or21nand_x1 i0=$abc$109383$new_n37232_ i1=$abc$109383$new_n37535_ i2=$abc$109383$new_n37534_ nq=$abc$109383$new_n37536_
+.subckt and21nor_x1 i0=$abc$109383$new_n37226_ i1=$abc$109383$new_n37523_ i2=$abc$109383$new_n37536_ nq=$abc$109383$new_n37537_
 .subckt nand2_x0 i0=$abc$109383$new_n37256_ i1=$abc$109383$new_n37254_ nq=$abc$109383$new_n37538_
 .subckt nand2_x0 i0=$abc$109383$new_n37263_ i1=$abc$109383$new_n37538_ nq=$abc$109383$new_n37539_
-.subckt a2_x2 i0=$abc$109383$new_n36916_ i1=$abc$109383$new_n37253_ q=$abc$109383$new_n37540_
-.subckt ao22_x2 i0=$abc$109383$new_n36517_ i1=$abc$109383$new_n36516_ i2=$abc$109383$new_n36917_ q=$abc$109383$new_n37541_
-.subckt a3_x2 i0=$abc$109383$new_n37262_ i1=$abc$109383$new_n36248_ i2=$abc$109383$new_n36244_ q=$abc$109383$new_n37542_
+.subckt and2_x1 i0=$abc$109383$new_n36916_ i1=$abc$109383$new_n37253_ q=$abc$109383$new_n37540_
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+.subckt and3_x1 i0=$abc$109383$new_n37262_ i1=$abc$109383$new_n36248_ i2=$abc$109383$new_n36244_ q=$abc$109383$new_n37542_
 .subckt nand2_x0 i0=$abc$109383$new_n37261_ i1=$abc$109383$new_n37259_ nq=$abc$109383$new_n37543_
-.subckt ao22_x2 i0=$abc$109383$new_n36517_ i1=$abc$109383$new_n36516_ i2=$abc$109383$new_n37543_ q=$abc$109383$new_n37544_
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 .subckt nor4_x0 i0=$abc$109383$new_n37544_ i1=$abc$109383$new_n37542_ i2=$abc$109383$new_n37541_ i3=$abc$109383$new_n37540_ nq=$abc$109383$new_n37545_
-.subckt ao22_x2 i0=$abc$109383$new_n36527_ i1=$abc$109383$new_n37545_ i2=$abc$109383$new_n37539_ q=$abc$109383$new_n37546_
-.subckt a3_x2 i0=$abc$109383$new_n37319_ i1=$abc$109383$new_n37317_ i2=$abc$109383$new_n37309_ q=$abc$109383$new_n37547_
-.subckt oa22_x2 i0=$abc$109383$new_n36994_ i1=$abc$109383$new_n37047_ i2=$abc$109383$new_n37547_ q=$abc$109383$new_n37548_
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 .subckt nand3_x0 i0=$abc$109383$new_n35491_ i1=$abc$109383$new_n29351_ i2=$abc$109383$new_n29734_ nq=$abc$109383$new_n37791_
-.subckt a2_x2 i0=$abc$109383$new_n35402_ i1=$abc$109383$new_n29350_ q=$abc$109383$new_n37792_
-.subckt oa22_x2 i0=$abc$109383$new_n29734_ i1=$abc$109383$new_n35490_ i2=$abc$109383$new_n37792_ q=$abc$109383$new_n37793_
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 .subckt nand3_x0 i0=$abc$109383$new_n37793_ i1=$abc$109383$new_n37791_ i2=$abc$109383$new_n37790_ nq=$abc$109383$new_n37794_
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 .subckt nand3_x0 i0=$abc$109383$new_n37795_ i1=$abc$109383$new_n37794_ i2=$abc$109383$new_n37789_ nq=$abc$109383$new_n37796_
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 .subckt nand3_x0 i0=$abc$109383$new_n37797_ i1=$abc$109383$new_n37796_ i2=$abc$109383$new_n37788_ nq=$abc$109383$new_n37798_
-.subckt oa22_x2 i0=$abc$109383$new_n37797_ i1=$abc$109383$new_n37796_ i2=$abc$109383$new_n37788_ q=$abc$109383$new_n37799_
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 .subckt nand3_x0 i0=$abc$109383$new_n37799_ i1=$abc$109383$new_n37798_ i2=$abc$109383$new_n37783_ nq=$abc$109383$new_n37800_
-.subckt oa22_x2 i0=$abc$109383$new_n37799_ i1=$abc$109383$new_n37798_ i2=$abc$109383$new_n37783_ q=$abc$109383$new_n37801_
-.subckt a2_x2 i0=$abc$109383$new_n37801_ i1=$abc$109383$new_n37800_ q=$abc$109383$new_n37802_
-.subckt nxr2_x1 i0=$abc$109383$new_n37802_ i1=$abc$109383$new_n37782_ nq=$abc$109383$new_n37803_
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-.subckt nxr2_x1 i0=$abc$109383$new_n37811_ i1=$abc$109383$new_n37537_ nq=$abc$109383$new_n37812_
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-.subckt nxr2_x1 i0=$abc$109383$new_n37813_ i1=$abc$109383$new_n37527_ nq=$abc$109383$new_n37814_
-.subckt nxr2_x1 i0=$abc$109383$new_n37814_ i1=$abc$109383$new_n37511_ nq=$abc$109383$new_n37815_
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-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[39] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n37817_
-.subckt a3_x2 i0=$abc$109383$new_n37524_ i1=$abc$109383$new_n37519_ i2=$abc$109383$new_n37514_ q=$abc$109383$new_n37818_
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-.subckt a2_x2 i0=$abc$109383$new_n37263_ i1=$abc$109383$new_n37538_ q=$abc$109383$new_n37826_
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-.subckt oa22_x2 i0=$abc$109383$new_n36565_ i1=$abc$109383$new_n37827_ i2=$abc$109383$new_n37826_ q=$abc$109383$new_n37828_
-.subckt nxr2_x1 i0=$abc$109383$new_n37553_ i1=$abc$109383$new_n37828_ nq=$abc$109383$new_n37829_
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+.subckt nexor2_x0 i0=$abc$109383$new_n37811_ i1=$abc$109383$new_n37537_ nq=$abc$109383$new_n37812_
+.subckt nexor2_x0 i0=$abc$109383$new_n37812_ i1=$abc$109383$new_n37530_ nq=$abc$109383$new_n37813_
+.subckt nexor2_x0 i0=$abc$109383$new_n37813_ i1=$abc$109383$new_n37527_ nq=$abc$109383$new_n37814_
+.subckt nexor2_x0 i0=$abc$109383$new_n37814_ i1=$abc$109383$new_n37511_ nq=$abc$109383$new_n37815_
+.subckt and21nor_x1 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n37815_ i2=$abc$109383$new_n37505_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102910
+.subckt and21nor_x1 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[39] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n37817_
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 .subckt nand2_x0 i0=$abc$109383$new_n37810_ i1=$abc$109383$new_n37829_ nq=$abc$109383$new_n37830_
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 .subckt nand2_x0 i0=$abc$109383$new_n37834_ i1=$abc$109383$new_n37554_ nq=$abc$109383$new_n37835_
-.subckt a3_x2 i0=$abc$109383$new_n37835_ i1=$abc$109383$new_n37830_ i2=$abc$109383$new_n37825_ q=$abc$109383$new_n37836_
-.subckt a2_x2 i0=$abc$109383$new_n37529_ i1=$abc$109383$new_n37517_ q=$abc$109383$new_n37837_
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 .subckt nand2_x0 i0=$abc$109383$new_n37840_ i1=$abc$109383$new_n37828_ nq=$abc$109383$new_n37841_
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 .subckt buf_x4 i=$abc$109383$new_n37851_ q=$abc$109383$new_n37852_
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-.subckt a2_x2 i0=$abc$109383$new_n35079_ i1=$abc$109383$new_n34981_ q=$abc$109383$new_n38102_
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 .subckt nand3_x0 i0=$abc$109383$new_n35491_ i1=$abc$109383$new_n29507_ i2=$abc$109383$new_n29731_ nq=$abc$109383$new_n38103_
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 .subckt nand3_x0 i0=$abc$109383$new_n38105_ i1=$abc$109383$new_n38103_ i2=$abc$109383$new_n38102_ nq=$abc$109383$new_n38106_
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 .subckt nand3_x0 i0=$abc$109383$new_n38107_ i1=$abc$109383$new_n38106_ i2=$abc$109383$new_n38101_ nq=$abc$109383$new_n38108_
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 .subckt nand3_x0 i0=$abc$109383$new_n38109_ i1=$abc$109383$new_n38108_ i2=$abc$109383$new_n38100_ nq=$abc$109383$new_n38110_
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 .subckt nand3_x0 i0=$abc$109383$new_n38111_ i1=$abc$109383$new_n38110_ i2=$abc$109383$new_n38095_ nq=$abc$109383$new_n38112_
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 .subckt nand2_x0 i0=$abc$109383$new_n38127_ i1=$abc$109383$new_n33877_ nq=$abc$109383$new_n38128_
-.subckt ao22_x2 i0=$abc$109383$new_n37821_ i1=$abc$109383$new_n37822_ i2=$abc$109383$new_n38126_ q=$abc$109383$new_n38129_
-.subckt ao22_x2 i0=$abc$109383$new_n38129_ i1=$abc$109383$new_n38128_ i2=$abc$109383$new_n37817_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102914
+.subckt and21nor_x1 i0=$abc$109383$new_n37821_ i1=$abc$109383$new_n37822_ i2=$abc$109383$new_n38126_ nq=$abc$109383$new_n38129_
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[40] nq=$abc$109383$new_n38131_
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 .subckt nor2_x0 i0=$abc$109383$new_n38132_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n38133_
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 .subckt nand2_x0 i0=$abc$109383$new_n38124_ i1=$abc$109383$new_n38134_ nq=$abc$109383$new_n38135_
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-.subckt nxr2_x1 i0=$abc$109383$new_n38123_ i1=$abc$109383$new_n38138_ nq=$abc$109383$new_n38139_
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 .subckt nand2_x0 i0=$abc$109383$new_n38139_ i1=$abc$109383$new_n37841_ nq=$abc$109383$new_n38140_
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-.subckt a3_x2 i0=$abc$109383$new_n38140_ i1=$abc$109383$new_n38135_ i2=$abc$109383$new_n37838_ q=$abc$109383$new_n38142_
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 .subckt nand2_x0 i0=$abc$109383$new_n38144_ i1=$abc$109383$new_n37198_ nq=$abc$109383$new_n38145_
-.subckt oa22_x2 i0=$abc$109383$new_n37181_ i1=$abc$109383$new_n38145_ i2=$abc$109383$new_n37509_ q=$abc$109383$new_n38146_
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 .subckt nand3_x0 i0=$abc$109383$new_n37835_ i1=$abc$109383$new_n37830_ i2=$abc$109383$new_n37825_ nq=$abc$109383$new_n38147_
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 .subckt buf_x4 i=$abc$109383$new_n38155_ q=$abc$109383$new_n38156_
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 .subckt nand2_x0 i0=$abc$109383$new_n38122_ i1=$abc$109383$new_n38157_ nq=$abc$109383$new_n38158_
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 .subckt buf_x4 i=$abc$109383$new_n38156_ q=$abc$109383$new_n38166_
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@@ -23505,5065 +23505,5065 @@
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 .subckt nand4_x0 i0=$abc$109383$new_n38390_ i1=$abc$109383$new_n38389_ i2=$abc$109383$new_n29653_ i3=$abc$109383$new_n29630_ nq=$abc$109383$new_n38662_
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-.subckt oa22_x2 i0=$abc$109383$new_n38100_ i1=$abc$109383$new_n38109_ i2=$abc$109383$new_n38668_ q=$abc$109383$new_n38669_
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 .subckt nand4_x0 i0=$abc$109383$new_n37430_ i1=$abc$109383$new_n37745_ i2=$abc$109383$new_n29673_ i3=$abc$109383$new_n29653_ nq=$abc$109383$new_n38673_
 .subckt nand2_x0 i0=$abc$109383$new_n37745_ i1=$abc$109383$new_n29673_ nq=$abc$109383$new_n38674_
-.subckt a2_x2 i0=$abc$109383$new_n38674_ i1=$abc$109383$new_n38404_ q=$abc$109383$new_n38675_
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 .subckt nand2_x0 i0=$abc$109383$new_n37086_ i1=$abc$109383$new_n29660_ nq=$abc$109383$new_n38677_
 .subckt nand2_x0 i0=$abc$109383$new_n36003_ i1=$abc$109383$new_n29672_ nq=$abc$109383$new_n38678_
-.subckt a2_x2 i0=$abc$109383$new_n37090_ i1=$abc$109383$new_n29683_ q=$abc$109383$new_n38679_
-.subckt nxr2_x1 i0=$abc$109383$new_n38679_ i1=$abc$109383$new_n38678_ nq=$abc$109383$new_n38680_
-.subckt nxr2_x1 i0=$abc$109383$new_n38680_ i1=$abc$109383$new_n38677_ nq=$abc$109383$new_n38681_
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 .subckt nand4_x0 i0=$abc$109383$new_n37737_ i1=$abc$109383$new_n38381_ i2=$abc$109383$new_n29606_ i3=$abc$109383$new_n29581_ nq=$abc$109383$new_n38682_
 .subckt nand2_x0 i0=$abc$109383$new_n38381_ i1=$abc$109383$new_n29606_ nq=$abc$109383$new_n38683_
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 .subckt nand2_x0 i0=$abc$109383$new_n36747_ i1=$abc$109383$new_n29629_ nq=$abc$109383$new_n38685_
-.subckt ao22_x2 i0=$abc$109383$new_n38685_ i1=$abc$109383$new_n38684_ i2=$abc$109383$new_n38682_ q=$abc$109383$new_n38686_
-.subckt nxr2_x1 i0=$abc$109383$new_n38686_ i1=$abc$109383$new_n38681_ nq=$abc$109383$new_n38687_
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 .subckt nand2_x0 i0=$abc$109383$new_n36747_ i1=$abc$109383$new_n29652_ nq=$abc$109383$new_n38689_
 .subckt nand2_x0 i0=$abc$109383$new_n36412_ i1=$abc$109383$new_n29605_ nq=$abc$109383$new_n38690_
-.subckt a2_x2 i0=$abc$109383$new_n37080_ i1=$abc$109383$new_n29629_ q=$abc$109383$new_n38691_
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-.subckt nxr2_x1 i0=$abc$109383$new_n38692_ i1=$abc$109383$new_n38689_ nq=$abc$109383$new_n38693_
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 .subckt nand2_x0 i0=$abc$109383$new_n37097_ i1=$abc$109383$new_n29530_ nq=$abc$109383$new_n38694_
-.subckt ao22_x2 i0=$abc$109383$new_n29509_ i1=$abc$109383$new_n35796_ i2=$abc$109383$new_n38694_ q=$abc$109383$new_n38695_
-.subckt ao22_x2 i0=$abc$109383$new_n38432_ i1=$abc$109383$new_n38695_ i2=$abc$109383$new_n38433_ q=$abc$109383$new_n38696_
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 .subckt nand2_x0 i0=$abc$109383$new_n36049_ i1=$abc$109383$new_n29580_ nq=$abc$109383$new_n38697_
 .subckt nand3_x0 i0=$abc$109383$new_n35492_ i1=$abc$109383$new_n29556_ i2=$abc$109383$new_n29720_ nq=$abc$109383$new_n38698_
-.subckt a2_x2 i0=$abc$109383$new_n37097_ i1=$abc$109383$new_n29555_ q=$abc$109383$new_n38699_
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-.subckt a2_x2 i0=$abc$109383$new_n38700_ i1=$abc$109383$new_n38698_ q=$abc$109383$new_n38701_
-.subckt nxr2_x1 i0=$abc$109383$new_n38701_ i1=$abc$109383$new_n38697_ nq=$abc$109383$new_n38702_
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 .subckt nand2_x0 i0=$abc$109383$new_n38438_ i1=$abc$109383$new_n38705_ nq=$abc$109383$new_n38706_
-.subckt oa22_x2 i0=$abc$109383$new_n38102_ i1=$abc$109383$new_n38105_ i2=$abc$109383$new_n38417_ q=$abc$109383$new_n38707_
+.subckt or21nand_x1 i0=$abc$109383$new_n38102_ i1=$abc$109383$new_n38105_ i2=$abc$109383$new_n38417_ nq=$abc$109383$new_n38707_
 .subckt nand2_x0 i0=$abc$109383$new_n38437_ i1=$abc$109383$new_n38707_ nq=$abc$109383$new_n38708_
-.subckt oa22_x2 i0=$abc$109383$new_n38708_ i1=$abc$109383$new_n38706_ i2=$abc$109383$new_n38704_ q=$abc$109383$new_n38709_
+.subckt or21nand_x1 i0=$abc$109383$new_n38708_ i1=$abc$109383$new_n38706_ i2=$abc$109383$new_n38704_ nq=$abc$109383$new_n38709_
 .subckt nand3_x0 i0=$abc$109383$new_n38704_ i1=$abc$109383$new_n38706_ i2=$abc$109383$new_n38708_ nq=$abc$109383$new_n38710_
 .subckt nand3_x0 i0=$abc$109383$new_n38710_ i1=$abc$109383$new_n38709_ i2=$abc$109383$new_n38688_ nq=$abc$109383$new_n38711_
-.subckt oa22_x2 i0=$abc$109383$new_n38710_ i1=$abc$109383$new_n38709_ i2=$abc$109383$new_n38688_ q=$abc$109383$new_n38712_
+.subckt or21nand_x1 i0=$abc$109383$new_n38710_ i1=$abc$109383$new_n38709_ i2=$abc$109383$new_n38688_ nq=$abc$109383$new_n38712_
 .subckt nand3_x0 i0=$abc$109383$new_n38712_ i1=$abc$109383$new_n38711_ i2=$abc$109383$new_n38672_ nq=$abc$109383$new_n38713_
-.subckt oa22_x2 i0=$abc$109383$new_n38712_ i1=$abc$109383$new_n38711_ i2=$abc$109383$new_n38672_ q=$abc$109383$new_n38714_
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 .subckt nand3_x0 i0=$abc$109383$new_n38714_ i1=$abc$109383$new_n38713_ i2=$abc$109383$new_n38667_ nq=$abc$109383$new_n38715_
-.subckt oa22_x2 i0=$abc$109383$new_n38714_ i1=$abc$109383$new_n38713_ i2=$abc$109383$new_n38667_ q=$abc$109383$new_n38716_
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 .subckt nand3_x0 i0=$abc$109383$new_n38716_ i1=$abc$109383$new_n38715_ i2=$abc$109383$new_n38630_ nq=$abc$109383$new_n38717_
-.subckt oa22_x2 i0=$abc$109383$new_n38716_ i1=$abc$109383$new_n38715_ i2=$abc$109383$new_n38630_ q=$abc$109383$new_n38718_
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 .subckt nand3_x0 i0=$abc$109383$new_n38718_ i1=$abc$109383$new_n38717_ i2=$abc$109383$new_n38625_ nq=$abc$109383$new_n38719_
-.subckt oa22_x2 i0=$abc$109383$new_n38718_ i1=$abc$109383$new_n38717_ i2=$abc$109383$new_n38625_ q=$abc$109383$new_n38720_
-.subckt a2_x2 i0=$abc$109383$new_n38720_ i1=$abc$109383$new_n38719_ q=$abc$109383$new_n38721_
-.subckt nxr2_x1 i0=$abc$109383$new_n38721_ i1=$abc$109383$new_n38571_ nq=$abc$109383$new_n38722_
-.subckt nxr2_x1 i0=$abc$109383$new_n38722_ i1=$abc$109383$new_n38560_ nq=$abc$109383$new_n38723_
-.subckt nxr2_x1 i0=$abc$109383$new_n38723_ i1=$abc$109383$new_n38498_ nq=$abc$109383$new_n38724_
-.subckt nxr2_x1 i0=$abc$109383$new_n38724_ i1=$abc$109383$new_n38487_ nq=$abc$109383$new_n38725_
-.subckt nxr2_x1 i0=$abc$109383$new_n38725_ i1=$abc$109383$new_n38480_ nq=$abc$109383$new_n38726_
-.subckt nxr2_x1 i0=$abc$109383$new_n38726_ i1=$abc$109383$new_n38468_ nq=$abc$109383$new_n38727_
-.subckt nxr2_x1 i0=$abc$109383$new_n38727_ i1=$abc$109383$new_n38465_ nq=$abc$109383$new_n38728_
-.subckt o2_x2 i0=$abc$109383$new_n38728_ i1=$abc$109383$new_n38459_ q=$abc$109383$new_n38729_
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+.subckt and2_x1 i0=$abc$109383$new_n38720_ i1=$abc$109383$new_n38719_ q=$abc$109383$new_n38721_
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+.subckt nexor2_x0 i0=$abc$109383$new_n38723_ i1=$abc$109383$new_n38498_ nq=$abc$109383$new_n38724_
+.subckt nexor2_x0 i0=$abc$109383$new_n38724_ i1=$abc$109383$new_n38487_ nq=$abc$109383$new_n38725_
+.subckt nexor2_x0 i0=$abc$109383$new_n38725_ i1=$abc$109383$new_n38480_ nq=$abc$109383$new_n38726_
+.subckt nexor2_x0 i0=$abc$109383$new_n38726_ i1=$abc$109383$new_n38468_ nq=$abc$109383$new_n38727_
+.subckt nexor2_x0 i0=$abc$109383$new_n38727_ i1=$abc$109383$new_n38465_ nq=$abc$109383$new_n38728_
+.subckt or2_x1 i0=$abc$109383$new_n38728_ i1=$abc$109383$new_n38459_ q=$abc$109383$new_n38729_
 .subckt nand2_x0 i0=$abc$109383$new_n38728_ i1=$abc$109383$new_n38459_ nq=$abc$109383$new_n38730_
 .subckt nand3_x0 i0=$abc$109383$new_n38730_ i1=$abc$109383$new_n38729_ i2=$abc$109383$new_n35099_ nq=$abc$109383$new_n38731_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[41] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n38732_
-.subckt a2_x2 i0=$abc$109383$new_n38732_ i1=$abc$109383$new_n38731_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102922
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[41] i2=$abc$109383$new_n31806_ nq=$abc$109383$new_n38732_
+.subckt and2_x1 i0=$abc$109383$new_n38732_ i1=$abc$109383$new_n38731_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102922
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[42] nq=$abc$109383$new_n38734_
-.subckt ao22_x2 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n38734_ q=$abc$109383$new_n38735_
+.subckt and21nor_x1 i0=$abc$109383$new_n32873_ i1=$abc$109383$new_n33097_ i2=$abc$109383$new_n38734_ nq=$abc$109383$new_n38735_
 .subckt nor2_x0 i0=$abc$109383$new_n38735_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n38736_
-.subckt a2_x2 i0=$abc$109383$new_n38449_ i1=$abc$109383$new_n38462_ q=$abc$109383$new_n38737_
-.subckt a2_x2 i0=$abc$109383$new_n38168_ i1=$abc$109383$new_n38166_ q=$abc$109383$new_n38738_
-.subckt oa22_x2 i0=$abc$109383$new_n38738_ i1=$abc$109383$new_n38450_ i2=$abc$109383$new_n38737_ q=$abc$109383$new_n38739_
-.subckt nxr2_x1 i0=$abc$109383$new_n38727_ i1=$abc$109383$new_n38739_ nq=$abc$109383$new_n38740_
-.subckt a3_x2 i0=$abc$109383$new_n38740_ i1=$abc$109383$new_n38458_ i2=$abc$109383$new_n38154_ q=$abc$109383$new_n38741_
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 .subckt nand2_x0 i0=$abc$109383$new_n38703_ i1=$abc$109383$new_n38693_ nq=$abc$109383$new_n38997_
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 .subckt nand2_x0 i0=$abc$109383$new_n38702_ i1=$abc$109383$new_n39000_ nq=$abc$109383$new_n39001_
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 .subckt nand3_x0 i0=$abc$109383$new_n38996_ i1=$abc$109383$new_n38997_ i2=$abc$109383$new_n39001_ nq=$abc$109383$new_n39003_
 .subckt nand3_x0 i0=$abc$109383$new_n39003_ i1=$abc$109383$new_n39002_ i2=$abc$109383$new_n38980_ nq=$abc$109383$new_n39004_
-.subckt oa22_x2 i0=$abc$109383$new_n39003_ i1=$abc$109383$new_n39002_ i2=$abc$109383$new_n38980_ q=$abc$109383$new_n39005_
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-.subckt nxr2_x1 i0=$abc$109383$new_n39013_ i1=$abc$109383$new_n38769_ nq=$abc$109383$new_n39014_
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-.subckt nxr2_x1 i0=$abc$109383$new_n39016_ i1=$abc$109383$new_n38751_ nq=$abc$109383$new_n39017_
-.subckt nxr2_x1 i0=$abc$109383$new_n39017_ i1=$abc$109383$new_n38745_ nq=$abc$109383$new_n39018_
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-.subckt ao22_x2 i0=$abc$109383$new_n29997_ i1=soc.cpu.minerva.multiplier.m_prod[43] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n39020_
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 .subckt nand2_x0 i0=$abc$109383$new_n38725_ i1=$abc$109383$new_n38749_ nq=$abc$109383$new_n39021_
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 .subckt buf_x4 i=$abc$109383$new_n38166_ q=$abc$109383$new_n39023_
 .subckt nand2_x0 i0=$abc$109383$new_n38467_ i1=$abc$109383$new_n39023_ nq=$abc$109383$new_n39024_
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 .subckt nor2_x0 i0=$abc$109383$new_n39016_ i1=$abc$109383$new_n39025_ nq=$abc$109383$new_n39026_
-.subckt ao22_x2 i0=$abc$109383$new_n38741_ i1=$abc$109383$new_n38744_ i2=$abc$109383$new_n39017_ q=$abc$109383$new_n39027_
-.subckt a2_x2 i0=$abc$109383$new_n38723_ i1=$abc$109383$new_n38757_ q=$abc$109383$new_n39028_
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 .subckt nand2_x0 i0=$abc$109383$new_n39013_ i1=$abc$109383$new_n39031_ nq=$abc$109383$new_n39032_
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 .subckt nand2_x0 i0=$abc$109383$new_n39036_ i1=$abc$109383$new_n38769_ nq=$abc$109383$new_n39037_
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 .subckt nand2_x0 i0=$abc$109383$new_n38540_ i1=$abc$109383$new_n38781_ nq=$abc$109383$new_n39042_
 .subckt nand2_x0 i0=$abc$109383$new_n38240_ i1=$abc$109383$new_n38228_ nq=$abc$109383$new_n39043_
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 .subckt nand3_x0 i0=$abc$109383$new_n38791_ i1=$abc$109383$new_n38517_ i2=$abc$109383$new_n38792_ nq=$abc$109383$new_n39049_
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+.subckt nexor2_x0 i0=$abc$109383$new_n39544_ i1=$abc$109383$new_n39543_ nq=$abc$109383$new_n39545_
+.subckt nexor2_x0 i0=$abc$109383$new_n39545_ i1=$abc$109383$new_n39542_ nq=$abc$109383$new_n39546_
 .subckt nand2_x0 i0=$abc$109383$new_n39274_ i1=$abc$109383$new_n29607_ nq=$abc$109383$new_n39547_
-.subckt ao22_x2 i0=$abc$109383$new_n29581_ i1=$abc$109383$new_n35796_ i2=$abc$109383$new_n39547_ q=$abc$109383$new_n39548_
-.subckt ao22_x2 i0=$abc$109383$new_n39278_ i1=$abc$109383$new_n39548_ i2=$abc$109383$new_n39279_ q=$abc$109383$new_n39549_
+.subckt and21nor_x1 i0=$abc$109383$new_n29581_ i1=$abc$109383$new_n35796_ i2=$abc$109383$new_n39547_ nq=$abc$109383$new_n39548_
+.subckt and21nor_x1 i0=$abc$109383$new_n39278_ i1=$abc$109383$new_n39548_ i2=$abc$109383$new_n39279_ nq=$abc$109383$new_n39549_
 .subckt nand2_x0 i0=$abc$109383$new_n39259_ i1=$abc$109383$new_n29653_ nq=$abc$109383$new_n39550_
 .subckt nand3_x0 i0=$abc$109383$new_n35493_ i1=$abc$109383$new_n29631_ i2=$abc$109383$new_n29707_ nq=$abc$109383$new_n39551_
-.subckt a2_x2 i0=$abc$109383$new_n39274_ i1=$abc$109383$new_n29630_ q=$abc$109383$new_n39552_
-.subckt oa22_x2 i0=$abc$109383$new_n29707_ i1=$abc$109383$new_n35493_ i2=$abc$109383$new_n39552_ q=$abc$109383$new_n39553_
-.subckt a2_x2 i0=$abc$109383$new_n39553_ i1=$abc$109383$new_n39551_ q=$abc$109383$new_n39554_
-.subckt nxr2_x1 i0=$abc$109383$new_n39554_ i1=$abc$109383$new_n39550_ nq=$abc$109383$new_n39555_
-.subckt nxr2_x1 i0=$abc$109383$new_n39555_ i1=$abc$109383$new_n39549_ nq=$abc$109383$new_n39556_
-.subckt nxr2_x1 i0=$abc$109383$new_n39556_ i1=$abc$109383$new_n39546_ nq=$abc$109383$new_n39557_
-.subckt nxr2_x1 i0=$abc$109383$new_n39557_ i1=$abc$109383$new_n39541_ nq=$abc$109383$new_n39558_
-.subckt nxr2_x1 i0=$abc$109383$new_n39558_ i1=$abc$109383$new_n39534_ nq=$abc$109383$new_n39559_
-.subckt nxr2_x1 i0=$abc$109383$new_n39559_ i1=$abc$109383$new_n39518_ nq=$abc$109383$new_n39560_
-.subckt nxr2_x1 i0=$abc$109383$new_n39560_ i1=$abc$109383$new_n39516_ nq=$abc$109383$new_n39561_
-.subckt nxr2_x1 i0=$abc$109383$new_n39561_ i1=$abc$109383$new_n39479_ nq=$abc$109383$new_n39562_
-.subckt nxr2_x1 i0=$abc$109383$new_n39562_ i1=$abc$109383$new_n39466_ nq=$abc$109383$new_n39563_
-.subckt nxr2_x1 i0=$abc$109383$new_n39563_ i1=$abc$109383$new_n39403_ nq=$abc$109383$new_n39564_
-.subckt nxr2_x1 i0=$abc$109383$new_n39564_ i1=$abc$109383$new_n39389_ nq=$abc$109383$new_n39565_
-.subckt nxr2_x1 i0=$abc$109383$new_n39565_ i1=$abc$109383$new_n39349_ nq=$abc$109383$new_n39566_
-.subckt nxr2_x1 i0=$abc$109383$new_n39566_ i1=$abc$109383$new_n39339_ nq=$abc$109383$new_n39567_
-.subckt nxr2_x1 i0=$abc$109383$new_n39567_ i1=$abc$109383$new_n39333_ nq=$abc$109383$new_n39568_
-.subckt nxr2_x1 i0=$abc$109383$new_n39568_ i1=$abc$109383$new_n39315_ nq=$abc$109383$new_n39569_
-.subckt nxr2_x1 i0=$abc$109383$new_n39569_ i1=$abc$109383$new_n39314_ nq=$abc$109383$new_n39570_
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+.subckt and2_x1 i0=$abc$109383$new_n39553_ i1=$abc$109383$new_n39551_ q=$abc$109383$new_n39554_
+.subckt nexor2_x0 i0=$abc$109383$new_n39554_ i1=$abc$109383$new_n39550_ nq=$abc$109383$new_n39555_
+.subckt nexor2_x0 i0=$abc$109383$new_n39555_ i1=$abc$109383$new_n39549_ nq=$abc$109383$new_n39556_
+.subckt nexor2_x0 i0=$abc$109383$new_n39556_ i1=$abc$109383$new_n39546_ nq=$abc$109383$new_n39557_
+.subckt nexor2_x0 i0=$abc$109383$new_n39557_ i1=$abc$109383$new_n39541_ nq=$abc$109383$new_n39558_
+.subckt nexor2_x0 i0=$abc$109383$new_n39558_ i1=$abc$109383$new_n39534_ nq=$abc$109383$new_n39559_
+.subckt nexor2_x0 i0=$abc$109383$new_n39559_ i1=$abc$109383$new_n39518_ nq=$abc$109383$new_n39560_
+.subckt nexor2_x0 i0=$abc$109383$new_n39560_ i1=$abc$109383$new_n39516_ nq=$abc$109383$new_n39561_
+.subckt nexor2_x0 i0=$abc$109383$new_n39561_ i1=$abc$109383$new_n39479_ nq=$abc$109383$new_n39562_
+.subckt nexor2_x0 i0=$abc$109383$new_n39562_ i1=$abc$109383$new_n39466_ nq=$abc$109383$new_n39563_
+.subckt nexor2_x0 i0=$abc$109383$new_n39563_ i1=$abc$109383$new_n39403_ nq=$abc$109383$new_n39564_
+.subckt nexor2_x0 i0=$abc$109383$new_n39564_ i1=$abc$109383$new_n39389_ nq=$abc$109383$new_n39565_
+.subckt nexor2_x0 i0=$abc$109383$new_n39565_ i1=$abc$109383$new_n39349_ nq=$abc$109383$new_n39566_
+.subckt nexor2_x0 i0=$abc$109383$new_n39566_ i1=$abc$109383$new_n39339_ nq=$abc$109383$new_n39567_
+.subckt nexor2_x0 i0=$abc$109383$new_n39567_ i1=$abc$109383$new_n39333_ nq=$abc$109383$new_n39568_
+.subckt nexor2_x0 i0=$abc$109383$new_n39568_ i1=$abc$109383$new_n39315_ nq=$abc$109383$new_n39569_
+.subckt nexor2_x0 i0=$abc$109383$new_n39569_ i1=$abc$109383$new_n39314_ nq=$abc$109383$new_n39570_
 .subckt nand3_x0 i0=$abc$109383$new_n39037_ i1=$abc$109383$new_n39032_ i2=$abc$109383$new_n39030_ nq=$abc$109383$new_n39571_
-.subckt nxr2_x1 i0=$abc$109383$new_n39014_ i1=$abc$109383$new_n39030_ nq=$abc$109383$new_n39572_
+.subckt nexor2_x0 i0=$abc$109383$new_n39014_ i1=$abc$109383$new_n39030_ nq=$abc$109383$new_n39572_
 .subckt nand2_x0 i0=$abc$109383$new_n38753_ i1=$abc$109383$new_n38166_ nq=$abc$109383$new_n39573_
-.subckt ao22_x2 i0=$abc$109383$new_n39573_ i1=$abc$109383$new_n39572_ i2=$abc$109383$new_n39571_ q=$abc$109383$new_n39574_
-.subckt nxr2_x1 i0=$abc$109383$new_n39297_ i1=$abc$109383$new_n39574_ nq=$abc$109383$new_n39575_
-.subckt a2_x2 i0=$abc$109383$new_n39575_ i1=$abc$109383$new_n39017_ q=$abc$109383$new_n39576_
+.subckt and21nor_x1 i0=$abc$109383$new_n39573_ i1=$abc$109383$new_n39572_ i2=$abc$109383$new_n39571_ nq=$abc$109383$new_n39574_
+.subckt nexor2_x0 i0=$abc$109383$new_n39297_ i1=$abc$109383$new_n39574_ nq=$abc$109383$new_n39575_
+.subckt and2_x1 i0=$abc$109383$new_n39575_ i1=$abc$109383$new_n39017_ q=$abc$109383$new_n39576_
 .subckt nand4_x0 i0=$abc$109383$new_n39576_ i1=$abc$109383$new_n38740_ i2=$abc$109383$new_n38458_ i3=$abc$109383$new_n38154_ nq=$abc$109383$new_n39577_
 .subckt nand2_x0 i0=$abc$109383$new_n39296_ i1=$abc$109383$new_n39313_ nq=$abc$109383$new_n39578_
-.subckt nxr2_x1 i0=$abc$109383$new_n39295_ i1=$abc$109383$new_n39304_ nq=$abc$109383$new_n39579_
+.subckt nexor2_x0 i0=$abc$109383$new_n39295_ i1=$abc$109383$new_n39304_ nq=$abc$109383$new_n39579_
 .subckt nand2_x0 i0=$abc$109383$new_n39579_ i1=$abc$109383$new_n39041_ nq=$abc$109383$new_n39580_
 .subckt nand3_x0 i0=$abc$109383$new_n39580_ i1=$abc$109383$new_n39578_ i2=$abc$109383$new_n39039_ nq=$abc$109383$new_n39581_
-.subckt oa22_x2 i0=$abc$109383$new_n39580_ i1=$abc$109383$new_n39578_ i2=$abc$109383$new_n39039_ q=$abc$109383$new_n39582_
+.subckt or21nand_x1 i0=$abc$109383$new_n39580_ i1=$abc$109383$new_n39578_ i2=$abc$109383$new_n39039_ nq=$abc$109383$new_n39582_
 .subckt nand2_x0 i0=$abc$109383$new_n39582_ i1=$abc$109383$new_n39026_ nq=$abc$109383$new_n39583_
 .subckt nand3_x0 i0=$abc$109383$new_n39575_ i1=$abc$109383$new_n39017_ i2=$abc$109383$new_n38744_ nq=$abc$109383$new_n39584_
-.subckt a3_x2 i0=$abc$109383$new_n39584_ i1=$abc$109383$new_n39583_ i2=$abc$109383$new_n39581_ q=$abc$109383$new_n39585_
+.subckt and3_x1 i0=$abc$109383$new_n39584_ i1=$abc$109383$new_n39583_ i2=$abc$109383$new_n39581_ q=$abc$109383$new_n39585_
 .subckt nand3_x0 i0=$abc$109383$new_n39585_ i1=$abc$109383$new_n39577_ i2=$abc$109383$new_n39570_ nq=$abc$109383$new_n39586_
-.subckt oa22_x2 i0=$abc$109383$new_n39585_ i1=$abc$109383$new_n39577_ i2=$abc$109383$new_n39570_ q=$abc$109383$new_n39587_
-.subckt oa22_x2 i0=$abc$109383$new_n39587_ i1=$abc$109383$new_n39586_ i2=$abc$109383$new_n29223_ q=$abc$109383$new_n39588_
+.subckt or21nand_x1 i0=$abc$109383$new_n39585_ i1=$abc$109383$new_n39577_ i2=$abc$109383$new_n39570_ nq=$abc$109383$new_n39587_
+.subckt or21nand_x1 i0=$abc$109383$new_n39587_ i1=$abc$109383$new_n39586_ i2=$abc$109383$new_n29223_ nq=$abc$109383$new_n39588_
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[44] nq=$abc$109383$new_n39589_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n39590_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n39589_ q=$abc$109383$new_n39591_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n39589_ nq=$abc$109383$new_n39591_
 .subckt nor2_x0 i0=$abc$109383$new_n39591_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n39592_
-.subckt a2_x2 i0=$abc$109383$new_n39592_ i1=$abc$109383$new_n39588_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102934
-.subckt ao22_x2 i0=$abc$109383$new_n35098_ i1=soc.cpu.minerva.multiplier.m_prod[45] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n39594_
-.subckt a3_x2 i0=$abc$109383$new_n39331_ i1=$abc$109383$new_n39327_ i2=$abc$109383$new_n39308_ q=$abc$109383$new_n39595_
-.subckt oa22_x2 i0=$abc$109383$new_n39305_ i1=$abc$109383$new_n39294_ i2=$abc$109383$new_n39595_ q=$abc$109383$new_n39596_
-.subckt a2_x2 i0=$abc$109383$new_n39567_ i1=$abc$109383$new_n39596_ q=$abc$109383$new_n39597_
+.subckt and2_x1 i0=$abc$109383$new_n39592_ i1=$abc$109383$new_n39588_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102934
+.subckt and21nor_x1 i0=$abc$109383$new_n35098_ i1=soc.cpu.minerva.multiplier.m_prod[45] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n39594_
+.subckt and3_x1 i0=$abc$109383$new_n39331_ i1=$abc$109383$new_n39327_ i2=$abc$109383$new_n39308_ q=$abc$109383$new_n39595_
+.subckt or21nand_x1 i0=$abc$109383$new_n39305_ i1=$abc$109383$new_n39294_ i2=$abc$109383$new_n39595_ nq=$abc$109383$new_n39596_
+.subckt and2_x1 i0=$abc$109383$new_n39567_ i1=$abc$109383$new_n39596_ q=$abc$109383$new_n39597_
 .subckt nor2_x0 i0=$abc$109383$new_n39066_ i1=$abc$109383$new_n39312_ nq=$abc$109383$new_n39598_
-.subckt oa22_x2 i0=$abc$109383$new_n39598_ i1=$abc$109383$new_n39568_ i2=$abc$109383$new_n39597_ q=$abc$109383$new_n39599_
-.subckt o2_x2 i0=$abc$109383$new_n39338_ i1=$abc$109383$new_n39312_ q=$abc$109383$new_n39600_
-.subckt a3_x2 i0=$abc$109383$new_n39347_ i1=$abc$109383$new_n39343_ i2=$abc$109383$new_n39329_ q=$abc$109383$new_n39601_
-.subckt oa22_x2 i0=$abc$109383$new_n39326_ i1=$abc$109383$new_n39292_ i2=$abc$109383$new_n39601_ q=$abc$109383$new_n39602_
+.subckt or21nand_x1 i0=$abc$109383$new_n39598_ i1=$abc$109383$new_n39568_ i2=$abc$109383$new_n39597_ nq=$abc$109383$new_n39599_
+.subckt or2_x1 i0=$abc$109383$new_n39338_ i1=$abc$109383$new_n39312_ q=$abc$109383$new_n39600_
+.subckt and3_x1 i0=$abc$109383$new_n39347_ i1=$abc$109383$new_n39343_ i2=$abc$109383$new_n39329_ q=$abc$109383$new_n39601_
+.subckt or21nand_x1 i0=$abc$109383$new_n39326_ i1=$abc$109383$new_n39292_ i2=$abc$109383$new_n39601_ nq=$abc$109383$new_n39602_
 .subckt nand2_x0 i0=$abc$109383$new_n39565_ i1=$abc$109383$new_n39602_ nq=$abc$109383$new_n39603_
-.subckt nxr2_x1 i0=$abc$109383$new_n39565_ i1=$abc$109383$new_n39602_ nq=$abc$109383$new_n39604_
-.subckt ao22_x2 i0=$abc$109383$new_n39339_ i1=$abc$109383$new_n39604_ i2=$abc$109383$new_n39603_ q=$abc$109383$new_n39605_
-.subckt a2_x2 i0=$abc$109383$new_n39376_ i1=$abc$109383$new_n39187_ q=$abc$109383$new_n39606_
-.subckt oa22_x2 i0=$abc$109383$new_n39143_ i1=$abc$109383$new_n39196_ i2=$abc$109383$new_n39606_ q=$abc$109383$new_n39607_
+.subckt nexor2_x0 i0=$abc$109383$new_n39565_ i1=$abc$109383$new_n39602_ nq=$abc$109383$new_n39604_
+.subckt and21nor_x1 i0=$abc$109383$new_n39339_ i1=$abc$109383$new_n39604_ i2=$abc$109383$new_n39603_ nq=$abc$109383$new_n39605_
+.subckt and2_x1 i0=$abc$109383$new_n39376_ i1=$abc$109383$new_n39187_ q=$abc$109383$new_n39606_
+.subckt or21nand_x1 i0=$abc$109383$new_n39143_ i1=$abc$109383$new_n39196_ i2=$abc$109383$new_n39606_ nq=$abc$109383$new_n39607_
 .subckt nand2_x0 i0=$abc$109383$new_n39607_ i1=$abc$109383$new_n39374_ nq=$abc$109383$new_n39608_
-.subckt nxr2_x1 i0=$abc$109383$new_n39373_ i1=$abc$109383$new_n38182_ nq=$abc$109383$new_n39609_
-.subckt nxr2_x1 i0=$abc$109383$new_n39387_ i1=$abc$109383$new_n39609_ nq=$abc$109383$new_n39610_
+.subckt nexor2_x0 i0=$abc$109383$new_n39373_ i1=$abc$109383$new_n38182_ nq=$abc$109383$new_n39609_
+.subckt nexor2_x0 i0=$abc$109383$new_n39387_ i1=$abc$109383$new_n39609_ nq=$abc$109383$new_n39610_
 .subckt nand2_x0 i0=$abc$109383$new_n39109_ i1=$abc$109383$new_n39352_ nq=$abc$109383$new_n39611_
-.subckt a4_x2 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n38513_ i2=$abc$109383$new_n29457_ i3=$abc$109383$new_n29482_ q=$abc$109383$new_n39612_
+.subckt and4_x1 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n38513_ i2=$abc$109383$new_n29457_ i3=$abc$109383$new_n29482_ q=$abc$109383$new_n39612_
 .subckt nand2_x0 i0=$abc$109383$new_n38797_ i1=$abc$109383$new_n38575_ nq=$abc$109383$new_n39613_
-.subckt oa22_x2 i0=$abc$109383$new_n38810_ i1=$abc$109383$new_n39613_ i2=$abc$109383$new_n39612_ q=$abc$109383$new_n39614_
-.subckt ao22_x2 i0=$abc$109383$new_n39047_ i1=$abc$109383$new_n39046_ i2=$abc$109383$new_n39614_ q=$abc$109383$new_n39615_
+.subckt or21nand_x1 i0=$abc$109383$new_n38810_ i1=$abc$109383$new_n39613_ i2=$abc$109383$new_n39612_ nq=$abc$109383$new_n39614_
+.subckt and21nor_x1 i0=$abc$109383$new_n39047_ i1=$abc$109383$new_n39046_ i2=$abc$109383$new_n39614_ nq=$abc$109383$new_n39615_
 .subckt nand3_x0 i0=$abc$109383$new_n38799_ i1=$abc$109383$new_n38791_ i2=$abc$109383$new_n38792_ nq=$abc$109383$new_n39616_
-.subckt oa22_x2 i0=$abc$109383$new_n38509_ i1=$abc$109383$new_n39616_ i2=$abc$109383$new_n39615_ q=$abc$109383$new_n39617_
-.subckt nxr2_x1 i0=$abc$109383$new_n39108_ i1=$abc$109383$new_n39617_ nq=$abc$109383$new_n39618_
-.subckt a2_x2 i0=$abc$109383$new_n39618_ i1=$abc$109383$new_n39088_ q=$abc$109383$new_n39619_
+.subckt or21nand_x1 i0=$abc$109383$new_n38509_ i1=$abc$109383$new_n39616_ i2=$abc$109383$new_n39615_ nq=$abc$109383$new_n39617_
+.subckt nexor2_x0 i0=$abc$109383$new_n39108_ i1=$abc$109383$new_n39617_ nq=$abc$109383$new_n39618_
+.subckt and2_x1 i0=$abc$109383$new_n39618_ i1=$abc$109383$new_n39088_ q=$abc$109383$new_n39619_
 .subckt buf_x4 i=$abc$109383$new_n38172_ q=$abc$109383$new_n39620_
-.subckt ao22_x2 i0=$abc$109383$new_n39620_ i1=$abc$109383$new_n39619_ i2=$abc$109383$new_n39611_ q=$abc$109383$new_n39621_
-.subckt ao22_x2 i0=$abc$109383$new_n39621_ i1=$abc$109383$new_n39610_ i2=$abc$109383$new_n39608_ q=$abc$109383$new_n39622_
-.subckt nxr2_x1 i0=$abc$109383$new_n39622_ i1=$abc$109383$new_n39040_ nq=$abc$109383$new_n39623_
-.subckt a3_x2 i0=$abc$109383$new_n39401_ i1=$abc$109383$new_n39394_ i2=$abc$109383$new_n39345_ q=$abc$109383$new_n39624_
-.subckt oa22_x2 i0=$abc$109383$new_n39342_ i1=$abc$109383$new_n39290_ i2=$abc$109383$new_n39624_ q=$abc$109383$new_n39625_
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 .subckt nand2_x0 i0=$abc$109383$new_n39555_ i1=$abc$109383$new_n39803_ nq=$abc$109383$new_n39804_
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 .subckt nand2_x0 i0=$abc$109383$new_n39274_ i1=$abc$109383$new_n29631_ nq=$abc$109383$new_n39814_
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 .subckt nand2_x0 i0=$abc$109383$new_n39259_ i1=$abc$109383$new_n29674_ nq=$abc$109383$new_n39817_
 .subckt nand3_x0 i0=$abc$109383$new_n35493_ i1=$abc$109383$new_n29653_ i2=$abc$109383$new_n29704_ nq=$abc$109383$new_n39818_
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 .subckt nand3_x0 i0=$abc$109383$new_n39584_ i1=$abc$109383$new_n39583_ i2=$abc$109383$new_n39581_ nq=$abc$109383$new_n39842_
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[46] nq=$abc$109383$new_n39854_
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 .subckt nand2_x0 i0=$abc$109383$new_n39858_ i1=$abc$109383$new_n39850_ nq=$abc$109383$new_n39859_
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 .subckt nand3_x0 i0=$abc$109383$new_n40350_ i1=$abc$109383$new_n40349_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n40351_
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+.subckt nexor2_x0 i0=$abc$109383$new_n40996_ i1=$abc$109383$new_n40990_ nq=$abc$109383$new_n40997_
+.subckt nexor2_x0 i0=$abc$109383$new_n40997_ i1=$abc$109383$new_n40985_ nq=$abc$109383$new_n40998_
+.subckt and3_x1 i0=$abc$109383$new_n35495_ i1=$abc$109383$new_n29663_ i2=$abc$109383$new_n29697_ q=$abc$109383$new_n40999_
+.subckt or21nand_x1 i0=$abc$109383$new_n40778_ i1=$abc$109383$new_n40575_ i2=$abc$109383$new_n40999_ nq=$abc$109383$new_n41000_
 .subckt nand2_x0 i0=$abc$109383$new_n40795_ i1=$abc$109383$new_n41000_ nq=$abc$109383$new_n41001_
-.subckt a2_x2 i0=$abc$109383$new_n40560_ i1=$abc$109383$new_n29619_ q=$abc$109383$new_n41002_
-.subckt nxr2_x1 i0=$abc$109383$new_n40794_ i1=$abc$109383$new_n41002_ nq=$abc$109383$new_n41003_
-.subckt a2_x2 i0=$abc$109383$new_n41003_ i1=$abc$109383$new_n40789_ q=$abc$109383$new_n41004_
-.subckt ao22_x2 i0=$abc$109383$new_n40786_ i1=$abc$109383$new_n41004_ i2=$abc$109383$new_n41001_ q=$abc$109383$new_n41005_
-.subckt a2_x2 i0=$abc$109383$new_n40059_ i1=$abc$109383$new_n29519_ q=$abc$109383$new_n41006_
+.subckt and2_x1 i0=$abc$109383$new_n40560_ i1=$abc$109383$new_n29619_ q=$abc$109383$new_n41002_
+.subckt nexor2_x0 i0=$abc$109383$new_n40794_ i1=$abc$109383$new_n41002_ nq=$abc$109383$new_n41003_
+.subckt and2_x1 i0=$abc$109383$new_n41003_ i1=$abc$109383$new_n40789_ q=$abc$109383$new_n41004_
+.subckt and21nor_x1 i0=$abc$109383$new_n40786_ i1=$abc$109383$new_n41004_ i2=$abc$109383$new_n41001_ nq=$abc$109383$new_n41005_
+.subckt and2_x1 i0=$abc$109383$new_n40059_ i1=$abc$109383$new_n29519_ q=$abc$109383$new_n41006_
 .subckt nand2_x0 i0=$abc$109383$new_n40528_ i1=$abc$109383$new_n29568_ nq=$abc$109383$new_n41007_
-.subckt a2_x2 i0=$abc$109383$new_n40527_ i1=$abc$109383$new_n29541_ q=$abc$109383$new_n41008_
-.subckt nxr2_x1 i0=$abc$109383$new_n41008_ i1=$abc$109383$new_n41007_ nq=$abc$109383$new_n41009_
-.subckt nxr2_x1 i0=$abc$109383$new_n41009_ i1=$abc$109383$new_n41006_ nq=$abc$109383$new_n41010_
+.subckt and2_x1 i0=$abc$109383$new_n40527_ i1=$abc$109383$new_n29541_ q=$abc$109383$new_n41008_
+.subckt nexor2_x0 i0=$abc$109383$new_n41008_ i1=$abc$109383$new_n41007_ nq=$abc$109383$new_n41009_
+.subckt nexor2_x0 i0=$abc$109383$new_n41009_ i1=$abc$109383$new_n41006_ nq=$abc$109383$new_n41010_
 .subckt nand2_x0 i0=$abc$109383$new_n40324_ i1=$abc$109383$new_n29642_ nq=$abc$109383$new_n41011_
-.subckt ao22_x2 i0=$abc$109383$new_n29663_ i1=$abc$109383$new_n35797_ i2=$abc$109383$new_n41011_ q=$abc$109383$new_n41012_
-.subckt ao22_x2 i0=$abc$109383$new_n40790_ i1=$abc$109383$new_n41012_ i2=$abc$109383$new_n40793_ q=$abc$109383$new_n41013_
+.subckt and21nor_x1 i0=$abc$109383$new_n29663_ i1=$abc$109383$new_n35797_ i2=$abc$109383$new_n41011_ nq=$abc$109383$new_n41012_
+.subckt and21nor_x1 i0=$abc$109383$new_n40790_ i1=$abc$109383$new_n41012_ i2=$abc$109383$new_n40793_ nq=$abc$109383$new_n41013_
 .subckt nand2_x0 i0=$abc$109383$new_n40560_ i1=$abc$109383$new_n29592_ nq=$abc$109383$new_n41014_
-.subckt a2_x2 i0=$abc$109383$new_n40324_ i1=$abc$109383$new_n29618_ q=$abc$109383$new_n41015_
-.subckt oa22_x2 i0=$abc$109383$new_n29705_ i1=$abc$109383$new_n35495_ i2=$abc$109383$new_n41015_ q=$abc$109383$new_n41016_
+.subckt and2_x1 i0=$abc$109383$new_n40324_ i1=$abc$109383$new_n29618_ q=$abc$109383$new_n41015_
+.subckt or21nand_x1 i0=$abc$109383$new_n29705_ i1=$abc$109383$new_n35495_ i2=$abc$109383$new_n41015_ nq=$abc$109383$new_n41016_
 .subckt nand3_x0 i0=$abc$109383$new_n35495_ i1=$abc$109383$new_n29618_ i2=$abc$109383$new_n29705_ nq=$abc$109383$new_n41017_
-.subckt a2_x2 i0=$abc$109383$new_n41017_ i1=$abc$109383$new_n41016_ q=$abc$109383$new_n41018_
-.subckt nxr2_x1 i0=$abc$109383$new_n41018_ i1=$abc$109383$new_n41014_ nq=$abc$109383$new_n41019_
-.subckt nxr2_x1 i0=$abc$109383$new_n41019_ i1=$abc$109383$new_n41013_ nq=$abc$109383$new_n41020_
-.subckt nxr2_x1 i0=$abc$109383$new_n41020_ i1=$abc$109383$new_n41010_ nq=$abc$109383$new_n41021_
-.subckt nxr2_x1 i0=$abc$109383$new_n41021_ i1=$abc$109383$new_n41005_ nq=$abc$109383$new_n41022_
-.subckt nxr2_x1 i0=$abc$109383$new_n41022_ i1=$abc$109383$new_n40998_ nq=$abc$109383$new_n41023_
-.subckt nxr2_x1 i0=$abc$109383$new_n41023_ i1=$abc$109383$new_n40981_ nq=$abc$109383$new_n41024_
-.subckt nxr2_x1 i0=$abc$109383$new_n41024_ i1=$abc$109383$new_n40979_ nq=$abc$109383$new_n41025_
-.subckt nxr2_x1 i0=$abc$109383$new_n41025_ i1=$abc$109383$new_n40943_ nq=$abc$109383$new_n41026_
-.subckt nxr2_x1 i0=$abc$109383$new_n41026_ i1=$abc$109383$new_n40926_ nq=$abc$109383$new_n41027_
-.subckt nxr2_x1 i0=$abc$109383$new_n41027_ i1=$abc$109383$new_n40883_ nq=$abc$109383$new_n41028_
-.subckt nxr2_x1 i0=$abc$109383$new_n41028_ i1=$abc$109383$new_n40872_ nq=$abc$109383$new_n41029_
-.subckt nxr2_x1 i0=$abc$109383$new_n41029_ i1=$abc$109383$new_n40864_ nq=$abc$109383$new_n41030_
-.subckt nxr2_x1 i0=$abc$109383$new_n41030_ i1=$abc$109383$new_n40852_ nq=$abc$109383$new_n41031_
-.subckt nxr2_x1 i0=$abc$109383$new_n41031_ i1=$abc$109383$new_n40846_ nq=$abc$109383$new_n41032_
-.subckt nxr2_x1 i0=$abc$109383$new_n41032_ i1=$abc$109383$new_n40835_ nq=$abc$109383$new_n41033_
-.subckt nxr2_x1 i0=$abc$109383$new_n41033_ i1=$abc$109383$new_n40833_ nq=$abc$109383$new_n41034_
-.subckt a3_x2 i0=$abc$109383$new_n41034_ i1=$abc$109383$new_n40829_ i2=$abc$109383$new_n40823_ q=$abc$109383$new_n41035_
-.subckt o2_x2 i0=$abc$109383$new_n40807_ i1=$abc$109383$new_n40831_ q=$abc$109383$new_n41036_
-.subckt nxr2_x1 i0=$abc$109383$new_n40807_ i1=$abc$109383$new_n40831_ nq=$abc$109383$new_n41037_
-.subckt ao22_x2 i0=$abc$109383$new_n40614_ i1=$abc$109383$new_n41037_ i2=$abc$109383$new_n41036_ q=$abc$109383$new_n41038_
-.subckt nxr2_x1 i0=$abc$109383$new_n41033_ i1=$abc$109383$new_n41038_ nq=$abc$109383$new_n41039_
+.subckt and2_x1 i0=$abc$109383$new_n41017_ i1=$abc$109383$new_n41016_ q=$abc$109383$new_n41018_
+.subckt nexor2_x0 i0=$abc$109383$new_n41018_ i1=$abc$109383$new_n41014_ nq=$abc$109383$new_n41019_
+.subckt nexor2_x0 i0=$abc$109383$new_n41019_ i1=$abc$109383$new_n41013_ nq=$abc$109383$new_n41020_
+.subckt nexor2_x0 i0=$abc$109383$new_n41020_ i1=$abc$109383$new_n41010_ nq=$abc$109383$new_n41021_
+.subckt nexor2_x0 i0=$abc$109383$new_n41021_ i1=$abc$109383$new_n41005_ nq=$abc$109383$new_n41022_
+.subckt nexor2_x0 i0=$abc$109383$new_n41022_ i1=$abc$109383$new_n40998_ nq=$abc$109383$new_n41023_
+.subckt nexor2_x0 i0=$abc$109383$new_n41023_ i1=$abc$109383$new_n40981_ nq=$abc$109383$new_n41024_
+.subckt nexor2_x0 i0=$abc$109383$new_n41024_ i1=$abc$109383$new_n40979_ nq=$abc$109383$new_n41025_
+.subckt nexor2_x0 i0=$abc$109383$new_n41025_ i1=$abc$109383$new_n40943_ nq=$abc$109383$new_n41026_
+.subckt nexor2_x0 i0=$abc$109383$new_n41026_ i1=$abc$109383$new_n40926_ nq=$abc$109383$new_n41027_
+.subckt nexor2_x0 i0=$abc$109383$new_n41027_ i1=$abc$109383$new_n40883_ nq=$abc$109383$new_n41028_
+.subckt nexor2_x0 i0=$abc$109383$new_n41028_ i1=$abc$109383$new_n40872_ nq=$abc$109383$new_n41029_
+.subckt nexor2_x0 i0=$abc$109383$new_n41029_ i1=$abc$109383$new_n40864_ nq=$abc$109383$new_n41030_
+.subckt nexor2_x0 i0=$abc$109383$new_n41030_ i1=$abc$109383$new_n40852_ nq=$abc$109383$new_n41031_
+.subckt nexor2_x0 i0=$abc$109383$new_n41031_ i1=$abc$109383$new_n40846_ nq=$abc$109383$new_n41032_
+.subckt nexor2_x0 i0=$abc$109383$new_n41032_ i1=$abc$109383$new_n40835_ nq=$abc$109383$new_n41033_
+.subckt nexor2_x0 i0=$abc$109383$new_n41033_ i1=$abc$109383$new_n40833_ nq=$abc$109383$new_n41034_
+.subckt and3_x1 i0=$abc$109383$new_n41034_ i1=$abc$109383$new_n40829_ i2=$abc$109383$new_n40823_ q=$abc$109383$new_n41035_
+.subckt or2_x1 i0=$abc$109383$new_n40807_ i1=$abc$109383$new_n40831_ q=$abc$109383$new_n41036_
+.subckt nexor2_x0 i0=$abc$109383$new_n40807_ i1=$abc$109383$new_n40831_ nq=$abc$109383$new_n41037_
+.subckt and21nor_x1 i0=$abc$109383$new_n40614_ i1=$abc$109383$new_n41037_ i2=$abc$109383$new_n41036_ nq=$abc$109383$new_n41038_
+.subckt nexor2_x0 i0=$abc$109383$new_n41033_ i1=$abc$109383$new_n41038_ nq=$abc$109383$new_n41039_
 .subckt nand2_x0 i0=$abc$109383$new_n40825_ i1=$abc$109383$new_n40821_ nq=$abc$109383$new_n41040_
-.subckt a2_x2 i0=$abc$109383$new_n40809_ i1=$abc$109383$new_n40610_ q=$abc$109383$new_n41041_
-.subckt ao22_x2 i0=$abc$109383$new_n40596_ i1=$abc$109383$new_n41041_ i2=$abc$109383$new_n41040_ q=$abc$109383$new_n41042_
-.subckt a3_x2 i0=$abc$109383$new_n40822_ i1=$abc$109383$new_n40599_ i2=$abc$109383$new_n40371_ q=$abc$109383$new_n41043_
-.subckt ao22_x2 i0=$abc$109383$new_n41043_ i1=$abc$109383$new_n41042_ i2=$abc$109383$new_n41039_ q=$abc$109383$new_n41044_
-.subckt ao22_x2 i0=$abc$109383$new_n41044_ i1=$abc$109383$new_n41035_ i2=$abc$109383$new_n40817_ q=$abc$109383$new_n41045_
+.subckt and2_x1 i0=$abc$109383$new_n40809_ i1=$abc$109383$new_n40610_ q=$abc$109383$new_n41041_
+.subckt and21nor_x1 i0=$abc$109383$new_n40596_ i1=$abc$109383$new_n41041_ i2=$abc$109383$new_n41040_ nq=$abc$109383$new_n41042_
+.subckt and3_x1 i0=$abc$109383$new_n40822_ i1=$abc$109383$new_n40599_ i2=$abc$109383$new_n40371_ q=$abc$109383$new_n41043_
+.subckt and21nor_x1 i0=$abc$109383$new_n41043_ i1=$abc$109383$new_n41042_ i2=$abc$109383$new_n41039_ nq=$abc$109383$new_n41044_
+.subckt and21nor_x1 i0=$abc$109383$new_n41044_ i1=$abc$109383$new_n41035_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n41045_
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[50] nq=$abc$109383$new_n41046_
-.subckt ao22_x2 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n29209_ i2=$abc$109383$new_n41046_ q=$abc$109383$new_n41047_
-.subckt o2_x2 i0=$abc$109383$new_n41047_ i1=$abc$109383$new_n29220_ q=$abc$109383$new_n41048_
+.subckt and21nor_x1 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n29209_ i2=$abc$109383$new_n41046_ nq=$abc$109383$new_n41047_
+.subckt or2_x1 i0=$abc$109383$new_n41047_ i1=$abc$109383$new_n29220_ q=$abc$109383$new_n41048_
 .subckt nor2_x0 i0=$abc$109383$new_n41048_ i1=$abc$109383$new_n41045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102958
-.subckt ao22_x2 i0=$abc$109383$new_n35098_ i1=soc.cpu.minerva.multiplier.m_prod[51] i2=$abc$109383$new_n30477_ q=$abc$109383$new_n41050_
+.subckt and21nor_x1 i0=$abc$109383$new_n35098_ i1=soc.cpu.minerva.multiplier.m_prod[51] i2=$abc$109383$new_n30477_ nq=$abc$109383$new_n41050_
 .subckt nand3_x0 i0=$abc$109383$new_n40844_ i1=$abc$109383$new_n40840_ i2=$abc$109383$new_n40837_ nq=$abc$109383$new_n41051_
-.subckt nxr2_x1 i0=$abc$109383$new_n40805_ i1=$abc$109383$new_n40837_ nq=$abc$109383$new_n41052_
-.subckt nxr2_x1 i0=$abc$109383$new_n40636_ i1=$abc$109383$new_n40834_ nq=$abc$109383$new_n41053_
-.subckt ao22_x2 i0=$abc$109383$new_n41053_ i1=$abc$109383$new_n41052_ i2=$abc$109383$new_n41051_ q=$abc$109383$new_n41054_
+.subckt nexor2_x0 i0=$abc$109383$new_n40805_ i1=$abc$109383$new_n40837_ nq=$abc$109383$new_n41052_
+.subckt nexor2_x0 i0=$abc$109383$new_n40636_ i1=$abc$109383$new_n40834_ nq=$abc$109383$new_n41053_
+.subckt and21nor_x1 i0=$abc$109383$new_n41053_ i1=$abc$109383$new_n41052_ i2=$abc$109383$new_n41051_ nq=$abc$109383$new_n41054_
 .subckt nor2_x0 i0=$abc$109383$new_n41031_ i1=$abc$109383$new_n41054_ nq=$abc$109383$new_n41055_
 .subckt nor2_x0 i0=$abc$109383$new_n40636_ i1=$abc$109383$new_n40834_ nq=$abc$109383$new_n41056_
-.subckt oa22_x2 i0=$abc$109383$new_n41056_ i1=$abc$109383$new_n41032_ i2=$abc$109383$new_n41055_ q=$abc$109383$new_n41057_
-.subckt o2_x2 i0=$abc$109383$new_n40851_ i1=$abc$109383$new_n40834_ q=$abc$109383$new_n41058_
-.subckt a3_x2 i0=$abc$109383$new_n40862_ i1=$abc$109383$new_n40858_ i2=$abc$109383$new_n40842_ q=$abc$109383$new_n41059_
-.subckt oa22_x2 i0=$abc$109383$new_n40839_ i1=$abc$109383$new_n40804_ i2=$abc$109383$new_n41059_ q=$abc$109383$new_n41060_
+.subckt or21nand_x1 i0=$abc$109383$new_n41056_ i1=$abc$109383$new_n41032_ i2=$abc$109383$new_n41055_ nq=$abc$109383$new_n41057_
+.subckt or2_x1 i0=$abc$109383$new_n40851_ i1=$abc$109383$new_n40834_ q=$abc$109383$new_n41058_
+.subckt and3_x1 i0=$abc$109383$new_n40862_ i1=$abc$109383$new_n40858_ i2=$abc$109383$new_n40842_ q=$abc$109383$new_n41059_
+.subckt or21nand_x1 i0=$abc$109383$new_n40839_ i1=$abc$109383$new_n40804_ i2=$abc$109383$new_n41059_ nq=$abc$109383$new_n41060_
 .subckt buf_x4 i=$abc$109383$new_n40838_ q=$abc$109383$new_n41061_
-.subckt nxr2_x1 i0=$abc$109383$new_n40871_ i1=$abc$109383$new_n41061_ nq=$abc$109383$new_n41062_
+.subckt nexor2_x0 i0=$abc$109383$new_n40871_ i1=$abc$109383$new_n41061_ nq=$abc$109383$new_n41062_
 .subckt nand2_x0 i0=$abc$109383$new_n41028_ i1=$abc$109383$new_n41062_ nq=$abc$109383$new_n41063_
-.subckt a3_x2 i0=$abc$109383$new_n40881_ i1=$abc$109383$new_n40877_ i2=$abc$109383$new_n40860_ q=$abc$109383$new_n41064_
-.subckt oa22_x2 i0=$abc$109383$new_n40857_ i1=$abc$109383$new_n40802_ i2=$abc$109383$new_n41064_ q=$abc$109383$new_n41065_
-.subckt nxr2_x1 i0=$abc$109383$new_n41027_ i1=$abc$109383$new_n41065_ nq=$abc$109383$new_n41066_
+.subckt and3_x1 i0=$abc$109383$new_n40881_ i1=$abc$109383$new_n40877_ i2=$abc$109383$new_n40860_ q=$abc$109383$new_n41064_
+.subckt or21nand_x1 i0=$abc$109383$new_n40857_ i1=$abc$109383$new_n40802_ i2=$abc$109383$new_n41064_ nq=$abc$109383$new_n41065_
+.subckt nexor2_x0 i0=$abc$109383$new_n41027_ i1=$abc$109383$new_n41065_ nq=$abc$109383$new_n41066_
 .subckt nand2_x0 i0=$abc$109383$new_n41066_ i1=$abc$109383$new_n40872_ nq=$abc$109383$new_n41067_
 .subckt nand3_x0 i0=$abc$109383$new_n41067_ i1=$abc$109383$new_n41063_ i2=$abc$109383$new_n41060_ nq=$abc$109383$new_n41068_
-.subckt nxr2_x1 i0=$abc$109383$new_n41029_ i1=$abc$109383$new_n41060_ nq=$abc$109383$new_n41069_
-.subckt nxr2_x1 i0=$abc$109383$new_n40851_ i1=$abc$109383$new_n39312_ nq=$abc$109383$new_n41070_
-.subckt ao22_x2 i0=$abc$109383$new_n41070_ i1=$abc$109383$new_n41069_ i2=$abc$109383$new_n41068_ q=$abc$109383$new_n41071_
-.subckt a2_x2 i0=$abc$109383$new_n40866_ i1=$abc$109383$new_n40697_ q=$abc$109383$new_n41072_
+.subckt nexor2_x0 i0=$abc$109383$new_n41029_ i1=$abc$109383$new_n41060_ nq=$abc$109383$new_n41069_
+.subckt nexor2_x0 i0=$abc$109383$new_n40851_ i1=$abc$109383$new_n39312_ nq=$abc$109383$new_n41070_
+.subckt and21nor_x1 i0=$abc$109383$new_n41070_ i1=$abc$109383$new_n41069_ i2=$abc$109383$new_n41068_ nq=$abc$109383$new_n41071_
+.subckt and2_x1 i0=$abc$109383$new_n40866_ i1=$abc$109383$new_n40697_ q=$abc$109383$new_n41072_
 .subckt nand2_x0 i0=$abc$109383$new_n40705_ i1=$abc$109383$new_n40868_ nq=$abc$109383$new_n41073_
-.subckt oa22_x2 i0=$abc$109383$new_n40673_ i1=$abc$109383$new_n41073_ i2=$abc$109383$new_n41072_ q=$abc$109383$new_n41074_
+.subckt or21nand_x1 i0=$abc$109383$new_n40673_ i1=$abc$109383$new_n41073_ i2=$abc$109383$new_n41072_ nq=$abc$109383$new_n41074_
 .subckt nand3_x0 i0=$abc$109383$new_n41074_ i1=$abc$109383$new_n40629_ i2=$abc$109383$new_n40626_ nq=$abc$109383$new_n41075_
-.subckt ao22_x2 i0=$abc$109383$new_n40634_ i1=$abc$109383$new_n40633_ i2=$abc$109383$new_n40870_ q=$abc$109383$new_n41076_
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 .subckt buf_x4 i=$abc$109383$new_n41414_ q=$abc$109383$new_n41961_
-.subckt a4_x2 i0=$abc$109383$new_n41415_ i1=$abc$109383$new_n41961_ i2=$abc$109383$new_n29403_ i3=$abc$109383$new_n29430_ q=$abc$109383$new_n41962_
+.subckt and4_x1 i0=$abc$109383$new_n41415_ i1=$abc$109383$new_n41961_ i2=$abc$109383$new_n29403_ i3=$abc$109383$new_n29430_ q=$abc$109383$new_n41962_
 .subckt nand2_x0 i0=$abc$109383$new_n41961_ i1=$abc$109383$new_n29403_ nq=$abc$109383$new_n41963_
 .subckt nand2_x0 i0=$abc$109383$new_n41963_ i1=$abc$109383$new_n41792_ nq=$abc$109383$new_n41964_
-.subckt oa22_x2 i0=$abc$109383$new_n41953_ i1=$abc$109383$new_n41964_ i2=$abc$109383$new_n41962_ q=$abc$109383$new_n41965_
+.subckt or21nand_x1 i0=$abc$109383$new_n41953_ i1=$abc$109383$new_n41964_ i2=$abc$109383$new_n41962_ nq=$abc$109383$new_n41965_
 .subckt nand2_x0 i0=$abc$109383$new_n40930_ i1=$abc$109383$new_n29486_ nq=$abc$109383$new_n41966_
 .subckt nand2_x0 i0=$abc$109383$new_n41415_ i1=$abc$109383$new_n29403_ nq=$abc$109383$new_n41967_
-.subckt a2_x2 i0=$abc$109383$new_n41414_ i1=$abc$109383$new_n29460_ q=$abc$109383$new_n41968_
-.subckt nxr2_x1 i0=$abc$109383$new_n41968_ i1=$abc$109383$new_n41967_ nq=$abc$109383$new_n41969_
-.subckt nxr2_x1 i0=$abc$109383$new_n41969_ i1=$abc$109383$new_n41966_ nq=$abc$109383$new_n41970_
+.subckt and2_x1 i0=$abc$109383$new_n41414_ i1=$abc$109383$new_n29460_ q=$abc$109383$new_n41968_
+.subckt nexor2_x0 i0=$abc$109383$new_n41968_ i1=$abc$109383$new_n41967_ nq=$abc$109383$new_n41969_
+.subckt nexor2_x0 i0=$abc$109383$new_n41969_ i1=$abc$109383$new_n41966_ nq=$abc$109383$new_n41970_
 .subckt nand4_x0 i0=$abc$109383$new_n41774_ i1=$abc$109383$new_n41587_ i2=$abc$109383$new_n29307_ i3=$abc$109383$new_n29341_ nq=$abc$109383$new_n41971_
 .subckt buf_x4 i=$abc$109383$new_n40994_ q=$abc$109383$new_n41972_
 .subckt nand2_x0 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29283_ nq=$abc$109383$new_n41973_
 .subckt nand2_x0 i0=$abc$109383$new_n41587_ i1=$abc$109383$new_n29307_ nq=$abc$109383$new_n41974_
-.subckt a2_x2 i0=$abc$109383$new_n41974_ i1=$abc$109383$new_n41810_ q=$abc$109383$new_n41975_
-.subckt ao22_x2 i0=$abc$109383$new_n41975_ i1=$abc$109383$new_n41973_ i2=$abc$109383$new_n41971_ q=$abc$109383$new_n41976_
-.subckt nxr2_x1 i0=$abc$109383$new_n41976_ i1=$abc$109383$new_n41970_ nq=$abc$109383$new_n41977_
-.subckt nxr2_x1 i0=$abc$109383$new_n41977_ i1=$abc$109383$new_n41965_ nq=$abc$109383$new_n41978_
-.subckt a3_x2 i0=$abc$109383$new_n41616_ i1=$abc$109383$new_n29543_ i2=$abc$109383$new_n29717_ q=$abc$109383$new_n41979_
-.subckt oa22_x2 i0=$abc$109383$new_n41806_ i1=$abc$109383$new_n41634_ i2=$abc$109383$new_n41979_ q=$abc$109383$new_n41980_
+.subckt and2_x1 i0=$abc$109383$new_n41974_ i1=$abc$109383$new_n41810_ q=$abc$109383$new_n41975_
+.subckt and21nor_x1 i0=$abc$109383$new_n41975_ i1=$abc$109383$new_n41973_ i2=$abc$109383$new_n41971_ nq=$abc$109383$new_n41976_
+.subckt nexor2_x0 i0=$abc$109383$new_n41976_ i1=$abc$109383$new_n41970_ nq=$abc$109383$new_n41977_
+.subckt nexor2_x0 i0=$abc$109383$new_n41977_ i1=$abc$109383$new_n41965_ nq=$abc$109383$new_n41978_
+.subckt and3_x1 i0=$abc$109383$new_n41616_ i1=$abc$109383$new_n29543_ i2=$abc$109383$new_n29717_ q=$abc$109383$new_n41979_
+.subckt or21nand_x1 i0=$abc$109383$new_n41806_ i1=$abc$109383$new_n41634_ i2=$abc$109383$new_n41979_ nq=$abc$109383$new_n41980_
 .subckt nand2_x0 i0=$abc$109383$new_n41823_ i1=$abc$109383$new_n41980_ nq=$abc$109383$new_n41981_
-.subckt a2_x2 i0=$abc$109383$new_n41435_ i1=$abc$109383$new_n29364_ q=$abc$109383$new_n41982_
-.subckt nxr2_x1 i0=$abc$109383$new_n41822_ i1=$abc$109383$new_n41982_ nq=$abc$109383$new_n41983_
-.subckt a2_x2 i0=$abc$109383$new_n41983_ i1=$abc$109383$new_n41817_ q=$abc$109383$new_n41984_
-.subckt ao22_x2 i0=$abc$109383$new_n41814_ i1=$abc$109383$new_n41984_ i2=$abc$109383$new_n41981_ q=$abc$109383$new_n41985_
-.subckt a2_x2 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29430_ q=$abc$109383$new_n41986_
+.subckt and2_x1 i0=$abc$109383$new_n41435_ i1=$abc$109383$new_n29364_ q=$abc$109383$new_n41982_
+.subckt nexor2_x0 i0=$abc$109383$new_n41822_ i1=$abc$109383$new_n41982_ nq=$abc$109383$new_n41983_
+.subckt and2_x1 i0=$abc$109383$new_n41983_ i1=$abc$109383$new_n41817_ q=$abc$109383$new_n41984_
+.subckt and21nor_x1 i0=$abc$109383$new_n41814_ i1=$abc$109383$new_n41984_ i2=$abc$109383$new_n41981_ nq=$abc$109383$new_n41985_
+.subckt and2_x1 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29430_ q=$abc$109383$new_n41986_
 .subckt nand2_x0 i0=$abc$109383$new_n41182_ i1=$abc$109383$new_n29307_ nq=$abc$109383$new_n41987_
-.subckt a2_x2 i0=$abc$109383$new_n41587_ i1=$abc$109383$new_n29282_ q=$abc$109383$new_n41988_
-.subckt nxr2_x1 i0=$abc$109383$new_n41988_ i1=$abc$109383$new_n41987_ nq=$abc$109383$new_n41989_
-.subckt nxr2_x1 i0=$abc$109383$new_n41989_ i1=$abc$109383$new_n41986_ nq=$abc$109383$new_n41990_
+.subckt and2_x1 i0=$abc$109383$new_n41587_ i1=$abc$109383$new_n29282_ q=$abc$109383$new_n41988_
+.subckt nexor2_x0 i0=$abc$109383$new_n41988_ i1=$abc$109383$new_n41987_ nq=$abc$109383$new_n41989_
+.subckt nexor2_x0 i0=$abc$109383$new_n41989_ i1=$abc$109383$new_n41986_ nq=$abc$109383$new_n41990_
 .subckt nand2_x0 i0=$abc$109383$new_n41445_ i1=$abc$109383$new_n29520_ nq=$abc$109383$new_n41991_
-.subckt ao22_x2 i0=$abc$109383$new_n29543_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n41991_ q=$abc$109383$new_n41992_
-.subckt ao22_x2 i0=$abc$109383$new_n41818_ i1=$abc$109383$new_n41992_ i2=$abc$109383$new_n41821_ q=$abc$109383$new_n41993_
+.subckt and21nor_x1 i0=$abc$109383$new_n29543_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n41991_ nq=$abc$109383$new_n41992_
+.subckt and21nor_x1 i0=$abc$109383$new_n41818_ i1=$abc$109383$new_n41992_ i2=$abc$109383$new_n41821_ nq=$abc$109383$new_n41993_
 .subckt nand2_x0 i0=$abc$109383$new_n41435_ i1=$abc$109383$new_n29340_ nq=$abc$109383$new_n41994_
-.subckt a2_x2 i0=$abc$109383$new_n41445_ i1=$abc$109383$new_n29363_ q=$abc$109383$new_n41995_
-.subckt oa22_x2 i0=$abc$109383$new_n29724_ i1=$abc$109383$new_n41616_ i2=$abc$109383$new_n41995_ q=$abc$109383$new_n41996_
+.subckt and2_x1 i0=$abc$109383$new_n41445_ i1=$abc$109383$new_n29363_ q=$abc$109383$new_n41995_
+.subckt or21nand_x1 i0=$abc$109383$new_n29724_ i1=$abc$109383$new_n41616_ i2=$abc$109383$new_n41995_ nq=$abc$109383$new_n41996_
 .subckt nand3_x0 i0=$abc$109383$new_n41616_ i1=$abc$109383$new_n29363_ i2=$abc$109383$new_n29724_ nq=$abc$109383$new_n41997_
-.subckt a2_x2 i0=$abc$109383$new_n41997_ i1=$abc$109383$new_n41996_ q=$abc$109383$new_n41998_
-.subckt nxr2_x1 i0=$abc$109383$new_n41998_ i1=$abc$109383$new_n41994_ nq=$abc$109383$new_n41999_
-.subckt nxr2_x1 i0=$abc$109383$new_n41999_ i1=$abc$109383$new_n41993_ nq=$abc$109383$new_n42000_
-.subckt nxr2_x1 i0=$abc$109383$new_n42000_ i1=$abc$109383$new_n41990_ nq=$abc$109383$new_n42001_
-.subckt nxr2_x1 i0=$abc$109383$new_n42001_ i1=$abc$109383$new_n41985_ nq=$abc$109383$new_n42002_
-.subckt nxr2_x1 i0=$abc$109383$new_n42002_ i1=$abc$109383$new_n41978_ nq=$abc$109383$new_n42003_
-.subckt nxr2_x1 i0=$abc$109383$new_n42003_ i1=$abc$109383$new_n41960_ nq=$abc$109383$new_n42004_
-.subckt nxr2_x1 i0=$abc$109383$new_n42004_ i1=$abc$109383$new_n41958_ nq=$abc$109383$new_n42005_
-.subckt nxr2_x1 i0=$abc$109383$new_n42005_ i1=$abc$109383$new_n41939_ nq=$abc$109383$new_n42006_
-.subckt nxr2_x1 i0=$abc$109383$new_n42006_ i1=$abc$109383$new_n41926_ nq=$abc$109383$new_n42007_
-.subckt nxr2_x1 i0=$abc$109383$new_n42007_ i1=$abc$109383$new_n41914_ nq=$abc$109383$new_n42008_
-.subckt nxr2_x1 i0=$abc$109383$new_n42008_ i1=$abc$109383$new_n41905_ nq=$abc$109383$new_n42009_
-.subckt nxr2_x1 i0=$abc$109383$new_n42009_ i1=$abc$109383$new_n41894_ nq=$abc$109383$new_n42010_
-.subckt nxr2_x1 i0=$abc$109383$new_n42010_ i1=$abc$109383$new_n41884_ nq=$abc$109383$new_n42011_
-.subckt nxr2_x1 i0=$abc$109383$new_n42011_ i1=$abc$109383$new_n41876_ nq=$abc$109383$new_n42012_
-.subckt nxr2_x1 i0=$abc$109383$new_n42012_ i1=$abc$109383$new_n41863_ nq=$abc$109383$new_n42013_
-.subckt nxr2_x1 i0=$abc$109383$new_n42013_ i1=$abc$109383$new_n41862_ nq=$abc$109383$new_n42014_
+.subckt and2_x1 i0=$abc$109383$new_n41997_ i1=$abc$109383$new_n41996_ q=$abc$109383$new_n41998_
+.subckt nexor2_x0 i0=$abc$109383$new_n41998_ i1=$abc$109383$new_n41994_ nq=$abc$109383$new_n41999_
+.subckt nexor2_x0 i0=$abc$109383$new_n41999_ i1=$abc$109383$new_n41993_ nq=$abc$109383$new_n42000_
+.subckt nexor2_x0 i0=$abc$109383$new_n42000_ i1=$abc$109383$new_n41990_ nq=$abc$109383$new_n42001_
+.subckt nexor2_x0 i0=$abc$109383$new_n42001_ i1=$abc$109383$new_n41985_ nq=$abc$109383$new_n42002_
+.subckt nexor2_x0 i0=$abc$109383$new_n42002_ i1=$abc$109383$new_n41978_ nq=$abc$109383$new_n42003_
+.subckt nexor2_x0 i0=$abc$109383$new_n42003_ i1=$abc$109383$new_n41960_ nq=$abc$109383$new_n42004_
+.subckt nexor2_x0 i0=$abc$109383$new_n42004_ i1=$abc$109383$new_n41958_ nq=$abc$109383$new_n42005_
+.subckt nexor2_x0 i0=$abc$109383$new_n42005_ i1=$abc$109383$new_n41939_ nq=$abc$109383$new_n42006_
+.subckt nexor2_x0 i0=$abc$109383$new_n42006_ i1=$abc$109383$new_n41926_ nq=$abc$109383$new_n42007_
+.subckt nexor2_x0 i0=$abc$109383$new_n42007_ i1=$abc$109383$new_n41914_ nq=$abc$109383$new_n42008_
+.subckt nexor2_x0 i0=$abc$109383$new_n42008_ i1=$abc$109383$new_n41905_ nq=$abc$109383$new_n42009_
+.subckt nexor2_x0 i0=$abc$109383$new_n42009_ i1=$abc$109383$new_n41894_ nq=$abc$109383$new_n42010_
+.subckt nexor2_x0 i0=$abc$109383$new_n42010_ i1=$abc$109383$new_n41884_ nq=$abc$109383$new_n42011_
+.subckt nexor2_x0 i0=$abc$109383$new_n42011_ i1=$abc$109383$new_n41876_ nq=$abc$109383$new_n42012_
+.subckt nexor2_x0 i0=$abc$109383$new_n42012_ i1=$abc$109383$new_n41863_ nq=$abc$109383$new_n42013_
+.subckt nexor2_x0 i0=$abc$109383$new_n42013_ i1=$abc$109383$new_n41862_ nq=$abc$109383$new_n42014_
 .subckt nand3_x0 i0=$abc$109383$new_n42014_ i1=$abc$109383$new_n41855_ i2=$abc$109383$new_n41854_ nq=$abc$109383$new_n42015_
-.subckt oa22_x2 i0=$abc$109383$new_n41854_ i1=$abc$109383$new_n41855_ i2=$abc$109383$new_n42014_ q=$abc$109383$new_n42016_
+.subckt or21nand_x1 i0=$abc$109383$new_n41854_ i1=$abc$109383$new_n41855_ i2=$abc$109383$new_n42014_ nq=$abc$109383$new_n42016_
 .subckt nand3_x0 i0=$abc$109383$new_n42016_ i1=$abc$109383$new_n42015_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n42017_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[55] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n42018_
-.subckt a2_x2 i0=$abc$109383$new_n42018_ i1=$abc$109383$new_n42017_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102978
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.multiplier.m_prod[55] i2=$abc$109383$new_n31806_ nq=$abc$109383$new_n42018_
+.subckt and2_x1 i0=$abc$109383$new_n42018_ i1=$abc$109383$new_n42017_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102978
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[56] nq=$abc$109383$new_n42020_
-.subckt ao22_x2 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42020_ q=$abc$109383$new_n42021_
+.subckt and21nor_x1 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42020_ nq=$abc$109383$new_n42021_
 .subckt nor2_x0 i0=$abc$109383$new_n42021_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n42022_
 .subckt nor2_x0 i0=$abc$109383$new_n41835_ i1=$abc$109383$new_n41859_ nq=$abc$109383$new_n42023_
 .subckt buf_x4 i=$abc$109383$new_n41276_ q=$abc$109383$new_n42024_
 .subckt nor2_x0 i0=$abc$109383$new_n41501_ i1=$abc$109383$new_n42024_ nq=$abc$109383$new_n42025_
-.subckt oa22_x2 i0=$abc$109383$new_n42025_ i1=$abc$109383$new_n41836_ i2=$abc$109383$new_n42023_ q=$abc$109383$new_n42026_
+.subckt or21nand_x1 i0=$abc$109383$new_n42025_ i1=$abc$109383$new_n41836_ i2=$abc$109383$new_n42023_ nq=$abc$109383$new_n42026_
 .subckt nand2_x0 i0=$abc$109383$new_n42013_ i1=$abc$109383$new_n42026_ nq=$abc$109383$new_n42027_
 .subckt nor2_x0 i0=$abc$109383$new_n41693_ i1=$abc$109383$new_n41276_ nq=$abc$109383$new_n42028_
-.subckt nxr2_x1 i0=$abc$109383$new_n42012_ i1=$abc$109383$new_n42028_ nq=$abc$109383$new_n42029_
-.subckt a2_x2 i0=$abc$109383$new_n42029_ i1=$abc$109383$new_n41862_ q=$abc$109383$new_n42030_
-.subckt ao22_x2 i0=$abc$109383$new_n41854_ i1=$abc$109383$new_n42030_ i2=$abc$109383$new_n42027_ q=$abc$109383$new_n42031_
-.subckt nxr2_x1 i0=$abc$109383$new_n42013_ i1=$abc$109383$new_n42026_ nq=$abc$109383$new_n42032_
-.subckt ao22_x2 i0=$abc$109383$new_n41855_ i1=$abc$109383$new_n42032_ i2=$abc$109383$new_n42031_ q=$abc$109383$new_n42033_
-.subckt a3_x2 i0=$abc$109383$new_n41872_ i1=$abc$109383$new_n41868_ i2=$abc$109383$new_n41865_ q=$abc$109383$new_n42034_
-.subckt oa22_x2 i0=$abc$109383$new_n41694_ i1=$abc$109383$new_n41834_ i2=$abc$109383$new_n42034_ q=$abc$109383$new_n42035_
-.subckt nxr2_x1 i0=$abc$109383$new_n41883_ i1=$abc$109383$new_n41686_ nq=$abc$109383$new_n42036_
+.subckt nexor2_x0 i0=$abc$109383$new_n42012_ i1=$abc$109383$new_n42028_ nq=$abc$109383$new_n42029_
+.subckt and2_x1 i0=$abc$109383$new_n42029_ i1=$abc$109383$new_n41862_ q=$abc$109383$new_n42030_
+.subckt and21nor_x1 i0=$abc$109383$new_n41854_ i1=$abc$109383$new_n42030_ i2=$abc$109383$new_n42027_ nq=$abc$109383$new_n42031_
+.subckt nexor2_x0 i0=$abc$109383$new_n42013_ i1=$abc$109383$new_n42026_ nq=$abc$109383$new_n42032_
+.subckt and21nor_x1 i0=$abc$109383$new_n41855_ i1=$abc$109383$new_n42032_ i2=$abc$109383$new_n42031_ nq=$abc$109383$new_n42033_
+.subckt and3_x1 i0=$abc$109383$new_n41872_ i1=$abc$109383$new_n41868_ i2=$abc$109383$new_n41865_ q=$abc$109383$new_n42034_
+.subckt or21nand_x1 i0=$abc$109383$new_n41694_ i1=$abc$109383$new_n41834_ i2=$abc$109383$new_n42034_ nq=$abc$109383$new_n42035_
+.subckt nexor2_x0 i0=$abc$109383$new_n41883_ i1=$abc$109383$new_n41686_ nq=$abc$109383$new_n42036_
 .subckt nand2_x0 i0=$abc$109383$new_n42010_ i1=$abc$109383$new_n42036_ nq=$abc$109383$new_n42037_
-.subckt a3_x2 i0=$abc$109383$new_n41892_ i1=$abc$109383$new_n41888_ i2=$abc$109383$new_n41870_ q=$abc$109383$new_n42038_
-.subckt oa22_x2 i0=$abc$109383$new_n41867_ i1=$abc$109383$new_n41832_ i2=$abc$109383$new_n42038_ q=$abc$109383$new_n42039_
-.subckt nxr2_x1 i0=$abc$109383$new_n42009_ i1=$abc$109383$new_n42039_ nq=$abc$109383$new_n42040_
+.subckt and3_x1 i0=$abc$109383$new_n41892_ i1=$abc$109383$new_n41888_ i2=$abc$109383$new_n41870_ q=$abc$109383$new_n42038_
+.subckt or21nand_x1 i0=$abc$109383$new_n41867_ i1=$abc$109383$new_n41832_ i2=$abc$109383$new_n42038_ nq=$abc$109383$new_n42039_
+.subckt nexor2_x0 i0=$abc$109383$new_n42009_ i1=$abc$109383$new_n42039_ nq=$abc$109383$new_n42040_
 .subckt nand2_x0 i0=$abc$109383$new_n42040_ i1=$abc$109383$new_n41884_ nq=$abc$109383$new_n42041_
 .subckt nand3_x0 i0=$abc$109383$new_n42041_ i1=$abc$109383$new_n42037_ i2=$abc$109383$new_n42035_ nq=$abc$109383$new_n42042_
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 .subckt nand2_x0 i0=$abc$109383$new_n41974_ i1=$abc$109383$new_n41810_ nq=$abc$109383$new_n42122_
-.subckt oa22_x2 i0=$abc$109383$new_n42122_ i1=$abc$109383$new_n41813_ i2=$abc$109383$new_n42121_ q=$abc$109383$new_n42123_
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 .subckt nand2_x0 i0=$abc$109383$new_n42123_ i1=$abc$109383$new_n41970_ nq=$abc$109383$new_n42124_
 .subckt buf_x4 i=$abc$109383$new_n40930_ q=$abc$109383$new_n42125_
-.subckt a2_x2 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29487_ q=$abc$109383$new_n42126_
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-.subckt a2_x2 i0=$abc$109383$new_n41976_ i1=$abc$109383$new_n42127_ q=$abc$109383$new_n42128_
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-.subckt nxr2_x1 i0=$abc$109383$new_n42129_ i1=$abc$109383$new_n41948_ nq=$abc$109383$new_n42130_
-.subckt nxr2_x1 i0=$abc$109383$new_n42130_ i1=$abc$109383$new_n42119_ nq=$abc$109383$new_n42131_
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 .subckt nand2_x0 i0=$abc$109383$new_n42001_ i1=$abc$109383$new_n42111_ nq=$abc$109383$new_n42132_
-.subckt ao22_x2 i0=$abc$109383$new_n41978_ i1=$abc$109383$new_n42112_ i2=$abc$109383$new_n42132_ q=$abc$109383$new_n42133_
-.subckt a4_x2 i0=$abc$109383$new_n42100_ i1=$abc$109383$new_n41961_ i2=$abc$109383$new_n29460_ i3=$abc$109383$new_n29404_ q=$abc$109383$new_n42134_
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+.subckt and4_x1 i0=$abc$109383$new_n42100_ i1=$abc$109383$new_n41961_ i2=$abc$109383$new_n29460_ i3=$abc$109383$new_n29404_ q=$abc$109383$new_n42134_
 .subckt nand2_x0 i0=$abc$109383$new_n41961_ i1=$abc$109383$new_n29461_ nq=$abc$109383$new_n42135_
 .subckt nand2_x0 i0=$abc$109383$new_n42135_ i1=$abc$109383$new_n41967_ nq=$abc$109383$new_n42136_
-.subckt oa22_x2 i0=$abc$109383$new_n42126_ i1=$abc$109383$new_n42136_ i2=$abc$109383$new_n42134_ q=$abc$109383$new_n42137_
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 .subckt nand3_x0 i0=$abc$109383$new_n30283_ i1=$abc$109383$new_n42125_ i2=$abc$109383$new_n29486_ nq=$abc$109383$new_n42138_
 .subckt nand2_x0 i0=$abc$109383$new_n41415_ i1=$abc$109383$new_n29460_ nq=$abc$109383$new_n42139_
-.subckt a2_x2 i0=$abc$109383$new_n41961_ i1=$abc$109383$new_n29486_ q=$abc$109383$new_n42140_
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 .subckt nand4_x0 i0=$abc$109383$new_n41774_ i1=$abc$109383$new_n42120_ i2=$abc$109383$new_n29283_ i3=$abc$109383$new_n29308_ nq=$abc$109383$new_n42143_
 .subckt nand2_x0 i0=$abc$109383$new_n42120_ i1=$abc$109383$new_n29283_ nq=$abc$109383$new_n42144_
-.subckt a2_x2 i0=$abc$109383$new_n42144_ i1=$abc$109383$new_n41987_ q=$abc$109383$new_n42145_
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 .subckt nand2_x0 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29430_ nq=$abc$109383$new_n42146_
-.subckt ao22_x2 i0=$abc$109383$new_n42146_ i1=$abc$109383$new_n42145_ i2=$abc$109383$new_n42143_ q=$abc$109383$new_n42147_
-.subckt nxr2_x1 i0=$abc$109383$new_n42147_ i1=$abc$109383$new_n42142_ nq=$abc$109383$new_n42148_
-.subckt nxr2_x1 i0=$abc$109383$new_n42148_ i1=$abc$109383$new_n42137_ nq=$abc$109383$new_n42149_
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 .subckt buf_x4 i=$abc$109383$new_n41616_ q=$abc$109383$new_n42150_
-.subckt a3_x2 i0=$abc$109383$new_n42150_ i1=$abc$109383$new_n29521_ i2=$abc$109383$new_n29721_ q=$abc$109383$new_n42151_
-.subckt oa22_x2 i0=$abc$109383$new_n41982_ i1=$abc$109383$new_n41820_ i2=$abc$109383$new_n42151_ q=$abc$109383$new_n42152_
+.subckt and3_x1 i0=$abc$109383$new_n42150_ i1=$abc$109383$new_n29521_ i2=$abc$109383$new_n29721_ q=$abc$109383$new_n42151_
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 .subckt nand2_x0 i0=$abc$109383$new_n41999_ i1=$abc$109383$new_n42152_ nq=$abc$109383$new_n42153_
-.subckt a2_x2 i0=$abc$109383$new_n41435_ i1=$abc$109383$new_n29341_ q=$abc$109383$new_n42154_
-.subckt nxr2_x1 i0=$abc$109383$new_n41998_ i1=$abc$109383$new_n42154_ nq=$abc$109383$new_n42155_
-.subckt a2_x2 i0=$abc$109383$new_n42155_ i1=$abc$109383$new_n41993_ q=$abc$109383$new_n42156_
-.subckt ao22_x2 i0=$abc$109383$new_n41990_ i1=$abc$109383$new_n42156_ i2=$abc$109383$new_n42153_ q=$abc$109383$new_n42157_
-.subckt a2_x2 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29404_ q=$abc$109383$new_n42158_
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+.subckt and2_x1 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29404_ q=$abc$109383$new_n42158_
 .subckt nand2_x0 i0=$abc$109383$new_n41774_ i1=$abc$109383$new_n29283_ nq=$abc$109383$new_n42159_
-.subckt a2_x2 i0=$abc$109383$new_n41587_ i1=$abc$109383$new_n29430_ q=$abc$109383$new_n42160_
-.subckt nxr2_x1 i0=$abc$109383$new_n42160_ i1=$abc$109383$new_n42159_ nq=$abc$109383$new_n42161_
-.subckt nxr2_x1 i0=$abc$109383$new_n42161_ i1=$abc$109383$new_n42158_ nq=$abc$109383$new_n42162_
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 .subckt buf_x4 i=$abc$109383$new_n41445_ q=$abc$109383$new_n42163_
 .subckt nand2_x0 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29364_ nq=$abc$109383$new_n42164_
-.subckt ao22_x2 i0=$abc$109383$new_n29520_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n42164_ q=$abc$109383$new_n42165_
-.subckt ao22_x2 i0=$abc$109383$new_n41994_ i1=$abc$109383$new_n42165_ i2=$abc$109383$new_n41997_ q=$abc$109383$new_n42166_
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+.subckt and21nor_x1 i0=$abc$109383$new_n41994_ i1=$abc$109383$new_n42165_ i2=$abc$109383$new_n41997_ nq=$abc$109383$new_n42166_
 .subckt nand2_x0 i0=$abc$109383$new_n41435_ i1=$abc$109383$new_n29307_ nq=$abc$109383$new_n42167_
-.subckt a2_x2 i0=$abc$109383$new_n41445_ i1=$abc$109383$new_n29340_ q=$abc$109383$new_n42168_
-.subckt oa22_x2 i0=$abc$109383$new_n29732_ i1=$abc$109383$new_n41616_ i2=$abc$109383$new_n42168_ q=$abc$109383$new_n42169_
+.subckt and2_x1 i0=$abc$109383$new_n41445_ i1=$abc$109383$new_n29340_ q=$abc$109383$new_n42168_
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 .subckt nand3_x0 i0=$abc$109383$new_n41616_ i1=$abc$109383$new_n29341_ i2=$abc$109383$new_n29732_ nq=$abc$109383$new_n42170_
-.subckt a2_x2 i0=$abc$109383$new_n42170_ i1=$abc$109383$new_n42169_ q=$abc$109383$new_n42171_
-.subckt nxr2_x1 i0=$abc$109383$new_n42171_ i1=$abc$109383$new_n42167_ nq=$abc$109383$new_n42172_
-.subckt nxr2_x1 i0=$abc$109383$new_n42172_ i1=$abc$109383$new_n42166_ nq=$abc$109383$new_n42173_
-.subckt nxr2_x1 i0=$abc$109383$new_n42173_ i1=$abc$109383$new_n42162_ nq=$abc$109383$new_n42174_
-.subckt nxr2_x1 i0=$abc$109383$new_n42174_ i1=$abc$109383$new_n42157_ nq=$abc$109383$new_n42175_
-.subckt nxr2_x1 i0=$abc$109383$new_n42175_ i1=$abc$109383$new_n42149_ nq=$abc$109383$new_n42176_
-.subckt nxr2_x1 i0=$abc$109383$new_n42176_ i1=$abc$109383$new_n42133_ nq=$abc$109383$new_n42177_
-.subckt nxr2_x1 i0=$abc$109383$new_n42177_ i1=$abc$109383$new_n42131_ nq=$abc$109383$new_n42178_
-.subckt nxr2_x1 i0=$abc$109383$new_n42178_ i1=$abc$109383$new_n42115_ nq=$abc$109383$new_n42179_
-.subckt nxr2_x1 i0=$abc$109383$new_n42179_ i1=$abc$109383$new_n42099_ nq=$abc$109383$new_n42180_
-.subckt nxr2_x1 i0=$abc$109383$new_n42180_ i1=$abc$109383$new_n42091_ nq=$abc$109383$new_n42181_
-.subckt nxr2_x1 i0=$abc$109383$new_n42181_ i1=$abc$109383$new_n42082_ nq=$abc$109383$new_n42182_
-.subckt nxr2_x1 i0=$abc$109383$new_n42182_ i1=$abc$109383$new_n42073_ nq=$abc$109383$new_n42183_
-.subckt nxr2_x1 i0=$abc$109383$new_n42183_ i1=$abc$109383$new_n42065_ nq=$abc$109383$new_n42184_
-.subckt nxr2_x1 i0=$abc$109383$new_n42184_ i1=$abc$109383$new_n42057_ nq=$abc$109383$new_n42185_
-.subckt nxr2_x1 i0=$abc$109383$new_n42185_ i1=$abc$109383$new_n42049_ nq=$abc$109383$new_n42186_
-.subckt nxr2_x1 i0=$abc$109383$new_n42186_ i1=$abc$109383$new_n42044_ nq=$abc$109383$new_n42187_
-.subckt nxr2_x1 i0=$abc$109383$new_n42187_ i1=$abc$109383$new_n42033_ nq=$abc$109383$new_n42188_
-.subckt ao22_x2 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n42188_ i2=$abc$109383$new_n42022_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102982
+.subckt and2_x1 i0=$abc$109383$new_n42170_ i1=$abc$109383$new_n42169_ q=$abc$109383$new_n42171_
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+.subckt nexor2_x0 i0=$abc$109383$new_n42172_ i1=$abc$109383$new_n42166_ nq=$abc$109383$new_n42173_
+.subckt nexor2_x0 i0=$abc$109383$new_n42173_ i1=$abc$109383$new_n42162_ nq=$abc$109383$new_n42174_
+.subckt nexor2_x0 i0=$abc$109383$new_n42174_ i1=$abc$109383$new_n42157_ nq=$abc$109383$new_n42175_
+.subckt nexor2_x0 i0=$abc$109383$new_n42175_ i1=$abc$109383$new_n42149_ nq=$abc$109383$new_n42176_
+.subckt nexor2_x0 i0=$abc$109383$new_n42176_ i1=$abc$109383$new_n42133_ nq=$abc$109383$new_n42177_
+.subckt nexor2_x0 i0=$abc$109383$new_n42177_ i1=$abc$109383$new_n42131_ nq=$abc$109383$new_n42178_
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+.subckt nexor2_x0 i0=$abc$109383$new_n42179_ i1=$abc$109383$new_n42099_ nq=$abc$109383$new_n42180_
+.subckt nexor2_x0 i0=$abc$109383$new_n42180_ i1=$abc$109383$new_n42091_ nq=$abc$109383$new_n42181_
+.subckt nexor2_x0 i0=$abc$109383$new_n42181_ i1=$abc$109383$new_n42082_ nq=$abc$109383$new_n42182_
+.subckt nexor2_x0 i0=$abc$109383$new_n42182_ i1=$abc$109383$new_n42073_ nq=$abc$109383$new_n42183_
+.subckt nexor2_x0 i0=$abc$109383$new_n42183_ i1=$abc$109383$new_n42065_ nq=$abc$109383$new_n42184_
+.subckt nexor2_x0 i0=$abc$109383$new_n42184_ i1=$abc$109383$new_n42057_ nq=$abc$109383$new_n42185_
+.subckt nexor2_x0 i0=$abc$109383$new_n42185_ i1=$abc$109383$new_n42049_ nq=$abc$109383$new_n42186_
+.subckt nexor2_x0 i0=$abc$109383$new_n42186_ i1=$abc$109383$new_n42044_ nq=$abc$109383$new_n42187_
+.subckt nexor2_x0 i0=$abc$109383$new_n42187_ i1=$abc$109383$new_n42033_ nq=$abc$109383$new_n42188_
+.subckt and21nor_x1 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n42188_ i2=$abc$109383$new_n42022_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102982
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[57] nq=$abc$109383$new_n42190_
-.subckt ao22_x2 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42190_ q=$abc$109383$new_n42191_
+.subckt and21nor_x1 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42190_ nq=$abc$109383$new_n42191_
 .subckt nor2_x0 i0=$abc$109383$new_n42191_ i1=$abc$109383$new_n36116_ nq=$abc$109383$new_n42192_
-.subckt a3_x2 i0=$abc$109383$new_n42041_ i1=$abc$109383$new_n42037_ i2=$abc$109383$new_n42035_ q=$abc$109383$new_n42193_
-.subckt oa22_x2 i0=$abc$109383$new_n42028_ i1=$abc$109383$new_n42012_ i2=$abc$109383$new_n42193_ q=$abc$109383$new_n42194_
+.subckt and3_x1 i0=$abc$109383$new_n42041_ i1=$abc$109383$new_n42037_ i2=$abc$109383$new_n42035_ q=$abc$109383$new_n42193_
+.subckt or21nand_x1 i0=$abc$109383$new_n42028_ i1=$abc$109383$new_n42012_ i2=$abc$109383$new_n42193_ nq=$abc$109383$new_n42194_
 .subckt nand2_x0 i0=$abc$109383$new_n42186_ i1=$abc$109383$new_n42194_ nq=$abc$109383$new_n42195_
-.subckt nxr2_x1 i0=$abc$109383$new_n42186_ i1=$abc$109383$new_n42194_ nq=$abc$109383$new_n42196_
-.subckt ao22_x2 i0=$abc$109383$new_n42033_ i1=$abc$109383$new_n42196_ i2=$abc$109383$new_n42195_ q=$abc$109383$new_n42197_
-.subckt a3_x2 i0=$abc$109383$new_n42055_ i1=$abc$109383$new_n42051_ i2=$abc$109383$new_n42039_ q=$abc$109383$new_n42198_
-.subckt oa22_x2 i0=$abc$109383$new_n42036_ i1=$abc$109383$new_n42010_ i2=$abc$109383$new_n42198_ q=$abc$109383$new_n42199_
-.subckt nxr2_x1 i0=$abc$109383$new_n42064_ i1=$abc$109383$new_n41686_ nq=$abc$109383$new_n42200_
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+.subckt and21nor_x1 i0=$abc$109383$new_n42033_ i1=$abc$109383$new_n42196_ i2=$abc$109383$new_n42195_ nq=$abc$109383$new_n42197_
+.subckt and3_x1 i0=$abc$109383$new_n42055_ i1=$abc$109383$new_n42051_ i2=$abc$109383$new_n42039_ q=$abc$109383$new_n42198_
+.subckt or21nand_x1 i0=$abc$109383$new_n42036_ i1=$abc$109383$new_n42010_ i2=$abc$109383$new_n42198_ nq=$abc$109383$new_n42199_
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-.subckt a3_x2 i0=$abc$109383$new_n30283_ i1=$abc$109383$new_n42125_ i2=$abc$109383$new_n29487_ q=$abc$109383$new_n42286_
-.subckt nxr2_x1 i0=$abc$109383$new_n42141_ i1=$abc$109383$new_n42286_ nq=$abc$109383$new_n42287_
-.subckt a2_x2 i0=$abc$109383$new_n42147_ i1=$abc$109383$new_n42287_ q=$abc$109383$new_n42288_
-.subckt ao22_x2 i0=$abc$109383$new_n42270_ i1=$abc$109383$new_n42288_ i2=$abc$109383$new_n42285_ q=$abc$109383$new_n42289_
-.subckt nxr2_x1 i0=$abc$109383$new_n42289_ i1=$abc$109383$new_n41948_ nq=$abc$109383$new_n42290_
-.subckt nxr2_x1 i0=$abc$109383$new_n42290_ i1=$abc$109383$new_n42119_ nq=$abc$109383$new_n42291_
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 .subckt nand2_x0 i0=$abc$109383$new_n42174_ i1=$abc$109383$new_n42276_ nq=$abc$109383$new_n42292_
-.subckt ao22_x2 i0=$abc$109383$new_n42149_ i1=$abc$109383$new_n42277_ i2=$abc$109383$new_n42292_ q=$abc$109383$new_n42293_
-.subckt a4_x2 i0=$abc$109383$new_n42100_ i1=$abc$109383$new_n42267_ i2=$abc$109383$new_n29461_ i3=$abc$109383$new_n29487_ q=$abc$109383$new_n42294_
+.subckt and21nor_x1 i0=$abc$109383$new_n42149_ i1=$abc$109383$new_n42277_ i2=$abc$109383$new_n42292_ nq=$abc$109383$new_n42293_
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 .subckt nand2_x0 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29488_ nq=$abc$109383$new_n42295_
 .subckt nand2_x0 i0=$abc$109383$new_n42295_ i1=$abc$109383$new_n42139_ nq=$abc$109383$new_n42296_
-.subckt oa22_x2 i0=$abc$109383$new_n42286_ i1=$abc$109383$new_n42296_ i2=$abc$109383$new_n42294_ q=$abc$109383$new_n42297_
-.subckt a4_x2 i0=$abc$109383$new_n42281_ i1=$abc$109383$new_n42120_ i2=$abc$109383$new_n29431_ i3=$abc$109383$new_n29284_ q=$abc$109383$new_n42298_
+.subckt or21nand_x1 i0=$abc$109383$new_n42286_ i1=$abc$109383$new_n42296_ i2=$abc$109383$new_n42294_ nq=$abc$109383$new_n42297_
+.subckt and4_x1 i0=$abc$109383$new_n42281_ i1=$abc$109383$new_n42120_ i2=$abc$109383$new_n29431_ i3=$abc$109383$new_n29284_ q=$abc$109383$new_n42298_
 .subckt nand2_x0 i0=$abc$109383$new_n42120_ i1=$abc$109383$new_n29431_ nq=$abc$109383$new_n42299_
 .subckt nand2_x0 i0=$abc$109383$new_n42299_ i1=$abc$109383$new_n42159_ nq=$abc$109383$new_n42300_
-.subckt oa22_x2 i0=$abc$109383$new_n42158_ i1=$abc$109383$new_n42300_ i2=$abc$109383$new_n42298_ q=$abc$109383$new_n42301_
-.subckt a2_x2 i0=$abc$109383$new_n41415_ i1=$abc$109383$new_n29487_ q=$abc$109383$new_n42302_
-.subckt a3_x2 i0=$abc$109383$new_n30283_ i1=$abc$109383$new_n41961_ i2=$abc$109383$new_n29487_ q=$abc$109383$new_n42303_
-.subckt nxr2_x1 i0=$abc$109383$new_n42303_ i1=$abc$109383$new_n42302_ nq=$abc$109383$new_n42304_
-.subckt nxr2_x1 i0=$abc$109383$new_n42304_ i1=$abc$109383$new_n42138_ nq=$abc$109383$new_n42305_
-.subckt nxr2_x1 i0=$abc$109383$new_n42305_ i1=$abc$109383$new_n42301_ nq=$abc$109383$new_n42306_
-.subckt nxr2_x1 i0=$abc$109383$new_n42306_ i1=$abc$109383$new_n42297_ nq=$abc$109383$new_n42307_
-.subckt a3_x2 i0=$abc$109383$new_n42150_ i1=$abc$109383$new_n29364_ i2=$abc$109383$new_n29724_ q=$abc$109383$new_n42308_
-.subckt oa22_x2 i0=$abc$109383$new_n42154_ i1=$abc$109383$new_n41996_ i2=$abc$109383$new_n42308_ q=$abc$109383$new_n42309_
+.subckt or21nand_x1 i0=$abc$109383$new_n42158_ i1=$abc$109383$new_n42300_ i2=$abc$109383$new_n42298_ nq=$abc$109383$new_n42301_
+.subckt and2_x1 i0=$abc$109383$new_n41415_ i1=$abc$109383$new_n29487_ q=$abc$109383$new_n42302_
+.subckt and3_x1 i0=$abc$109383$new_n30283_ i1=$abc$109383$new_n41961_ i2=$abc$109383$new_n29487_ q=$abc$109383$new_n42303_
+.subckt nexor2_x0 i0=$abc$109383$new_n42303_ i1=$abc$109383$new_n42302_ nq=$abc$109383$new_n42304_
+.subckt nexor2_x0 i0=$abc$109383$new_n42304_ i1=$abc$109383$new_n42138_ nq=$abc$109383$new_n42305_
+.subckt nexor2_x0 i0=$abc$109383$new_n42305_ i1=$abc$109383$new_n42301_ nq=$abc$109383$new_n42306_
+.subckt nexor2_x0 i0=$abc$109383$new_n42306_ i1=$abc$109383$new_n42297_ nq=$abc$109383$new_n42307_
+.subckt and3_x1 i0=$abc$109383$new_n42150_ i1=$abc$109383$new_n29364_ i2=$abc$109383$new_n29724_ q=$abc$109383$new_n42308_
+.subckt or21nand_x1 i0=$abc$109383$new_n42154_ i1=$abc$109383$new_n41996_ i2=$abc$109383$new_n42308_ nq=$abc$109383$new_n42309_
 .subckt nand2_x0 i0=$abc$109383$new_n42172_ i1=$abc$109383$new_n42309_ nq=$abc$109383$new_n42310_
 .subckt buf_x4 i=$abc$109383$new_n41435_ q=$abc$109383$new_n42311_
-.subckt a2_x2 i0=$abc$109383$new_n42311_ i1=$abc$109383$new_n29308_ q=$abc$109383$new_n42312_
-.subckt nxr2_x1 i0=$abc$109383$new_n42171_ i1=$abc$109383$new_n42312_ nq=$abc$109383$new_n42313_
-.subckt a2_x2 i0=$abc$109383$new_n42313_ i1=$abc$109383$new_n42166_ q=$abc$109383$new_n42314_
-.subckt ao22_x2 i0=$abc$109383$new_n42162_ i1=$abc$109383$new_n42314_ i2=$abc$109383$new_n42310_ q=$abc$109383$new_n42315_
-.subckt a2_x2 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29461_ q=$abc$109383$new_n42316_
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+.subckt nexor2_x0 i0=$abc$109383$new_n42171_ i1=$abc$109383$new_n42312_ nq=$abc$109383$new_n42313_
+.subckt and2_x1 i0=$abc$109383$new_n42313_ i1=$abc$109383$new_n42166_ q=$abc$109383$new_n42314_
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+.subckt and2_x1 i0=$abc$109383$new_n41972_ i1=$abc$109383$new_n29461_ q=$abc$109383$new_n42316_
 .subckt nand2_x0 i0=$abc$109383$new_n41774_ i1=$abc$109383$new_n29431_ nq=$abc$109383$new_n42317_
-.subckt a2_x2 i0=$abc$109383$new_n42120_ i1=$abc$109383$new_n29404_ q=$abc$109383$new_n42318_
-.subckt nxr2_x1 i0=$abc$109383$new_n42318_ i1=$abc$109383$new_n42317_ nq=$abc$109383$new_n42319_
-.subckt nxr2_x1 i0=$abc$109383$new_n42319_ i1=$abc$109383$new_n42316_ nq=$abc$109383$new_n42320_
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+.subckt nexor2_x0 i0=$abc$109383$new_n42318_ i1=$abc$109383$new_n42317_ nq=$abc$109383$new_n42319_
+.subckt nexor2_x0 i0=$abc$109383$new_n42319_ i1=$abc$109383$new_n42316_ nq=$abc$109383$new_n42320_
 .subckt nand2_x0 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29341_ nq=$abc$109383$new_n42321_
-.subckt ao22_x2 i0=$abc$109383$new_n29364_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n42321_ q=$abc$109383$new_n42322_
-.subckt ao22_x2 i0=$abc$109383$new_n42167_ i1=$abc$109383$new_n42322_ i2=$abc$109383$new_n42170_ q=$abc$109383$new_n42323_
+.subckt and21nor_x1 i0=$abc$109383$new_n29364_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n42321_ nq=$abc$109383$new_n42322_
+.subckt and21nor_x1 i0=$abc$109383$new_n42167_ i1=$abc$109383$new_n42322_ i2=$abc$109383$new_n42170_ nq=$abc$109383$new_n42323_
 .subckt nand2_x0 i0=$abc$109383$new_n42311_ i1=$abc$109383$new_n29283_ nq=$abc$109383$new_n42324_
-.subckt a2_x2 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29307_ q=$abc$109383$new_n42325_
-.subckt oa22_x2 i0=$abc$109383$new_n29735_ i1=$abc$109383$new_n41616_ i2=$abc$109383$new_n42325_ q=$abc$109383$new_n42326_
+.subckt and2_x1 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29307_ q=$abc$109383$new_n42325_
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 .subckt nand3_x0 i0=$abc$109383$new_n41616_ i1=$abc$109383$new_n29307_ i2=$abc$109383$new_n29735_ nq=$abc$109383$new_n42327_
-.subckt a2_x2 i0=$abc$109383$new_n42327_ i1=$abc$109383$new_n42326_ q=$abc$109383$new_n42328_
-.subckt nxr2_x1 i0=$abc$109383$new_n42328_ i1=$abc$109383$new_n42324_ nq=$abc$109383$new_n42329_
-.subckt nxr2_x1 i0=$abc$109383$new_n42329_ i1=$abc$109383$new_n42323_ nq=$abc$109383$new_n42330_
-.subckt nxr2_x1 i0=$abc$109383$new_n42330_ i1=$abc$109383$new_n42320_ nq=$abc$109383$new_n42331_
-.subckt nxr2_x1 i0=$abc$109383$new_n42331_ i1=$abc$109383$new_n42315_ nq=$abc$109383$new_n42332_
-.subckt nxr2_x1 i0=$abc$109383$new_n42332_ i1=$abc$109383$new_n42307_ nq=$abc$109383$new_n42333_
-.subckt nxr2_x1 i0=$abc$109383$new_n42333_ i1=$abc$109383$new_n42293_ nq=$abc$109383$new_n42334_
-.subckt nxr2_x1 i0=$abc$109383$new_n42334_ i1=$abc$109383$new_n42291_ nq=$abc$109383$new_n42335_
-.subckt nxr2_x1 i0=$abc$109383$new_n42335_ i1=$abc$109383$new_n42280_ nq=$abc$109383$new_n42336_
-.subckt nxr2_x1 i0=$abc$109383$new_n42336_ i1=$abc$109383$new_n42266_ nq=$abc$109383$new_n42337_
-.subckt nxr2_x1 i0=$abc$109383$new_n42337_ i1=$abc$109383$new_n42260_ nq=$abc$109383$new_n42338_
-.subckt nxr2_x1 i0=$abc$109383$new_n42338_ i1=$abc$109383$new_n42251_ nq=$abc$109383$new_n42339_
-.subckt nxr2_x1 i0=$abc$109383$new_n42339_ i1=$abc$109383$new_n42239_ nq=$abc$109383$new_n42340_
-.subckt nxr2_x1 i0=$abc$109383$new_n42340_ i1=$abc$109383$new_n42231_ nq=$abc$109383$new_n42341_
-.subckt nxr2_x1 i0=$abc$109383$new_n42341_ i1=$abc$109383$new_n42222_ nq=$abc$109383$new_n42342_
-.subckt nxr2_x1 i0=$abc$109383$new_n42342_ i1=$abc$109383$new_n42214_ nq=$abc$109383$new_n42343_
-.subckt nxr2_x1 i0=$abc$109383$new_n42343_ i1=$abc$109383$new_n42208_ nq=$abc$109383$new_n42344_
-.subckt nxr2_x1 i0=$abc$109383$new_n42344_ i1=$abc$109383$new_n42197_ nq=$abc$109383$new_n42345_
-.subckt ao22_x2 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n42345_ i2=$abc$109383$new_n42192_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$102986
+.subckt and2_x1 i0=$abc$109383$new_n42327_ i1=$abc$109383$new_n42326_ q=$abc$109383$new_n42328_
+.subckt nexor2_x0 i0=$abc$109383$new_n42328_ i1=$abc$109383$new_n42324_ nq=$abc$109383$new_n42329_
+.subckt nexor2_x0 i0=$abc$109383$new_n42329_ i1=$abc$109383$new_n42323_ nq=$abc$109383$new_n42330_
+.subckt nexor2_x0 i0=$abc$109383$new_n42330_ i1=$abc$109383$new_n42320_ nq=$abc$109383$new_n42331_
+.subckt nexor2_x0 i0=$abc$109383$new_n42331_ i1=$abc$109383$new_n42315_ nq=$abc$109383$new_n42332_
+.subckt nexor2_x0 i0=$abc$109383$new_n42332_ i1=$abc$109383$new_n42307_ nq=$abc$109383$new_n42333_
+.subckt nexor2_x0 i0=$abc$109383$new_n42333_ i1=$abc$109383$new_n42293_ nq=$abc$109383$new_n42334_
+.subckt nexor2_x0 i0=$abc$109383$new_n42334_ i1=$abc$109383$new_n42291_ nq=$abc$109383$new_n42335_
+.subckt nexor2_x0 i0=$abc$109383$new_n42335_ i1=$abc$109383$new_n42280_ nq=$abc$109383$new_n42336_
+.subckt nexor2_x0 i0=$abc$109383$new_n42336_ i1=$abc$109383$new_n42266_ nq=$abc$109383$new_n42337_
+.subckt nexor2_x0 i0=$abc$109383$new_n42337_ i1=$abc$109383$new_n42260_ nq=$abc$109383$new_n42338_
+.subckt nexor2_x0 i0=$abc$109383$new_n42338_ i1=$abc$109383$new_n42251_ nq=$abc$109383$new_n42339_
+.subckt nexor2_x0 i0=$abc$109383$new_n42339_ i1=$abc$109383$new_n42239_ nq=$abc$109383$new_n42340_
+.subckt nexor2_x0 i0=$abc$109383$new_n42340_ i1=$abc$109383$new_n42231_ nq=$abc$109383$new_n42341_
+.subckt nexor2_x0 i0=$abc$109383$new_n42341_ i1=$abc$109383$new_n42222_ nq=$abc$109383$new_n42342_
+.subckt nexor2_x0 i0=$abc$109383$new_n42342_ i1=$abc$109383$new_n42214_ nq=$abc$109383$new_n42343_
+.subckt nexor2_x0 i0=$abc$109383$new_n42343_ i1=$abc$109383$new_n42208_ nq=$abc$109383$new_n42344_
+.subckt nexor2_x0 i0=$abc$109383$new_n42344_ i1=$abc$109383$new_n42197_ nq=$abc$109383$new_n42345_
+.subckt and21nor_x1 i0=$abc$109383$new_n37501_ i1=$abc$109383$new_n42345_ i2=$abc$109383$new_n42192_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$102986
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[58] nq=$abc$109383$new_n42347_
-.subckt ao22_x2 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42347_ q=$abc$109383$new_n42348_
+.subckt and21nor_x1 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42347_ nq=$abc$109383$new_n42348_
 .subckt nor2_x0 i0=$abc$109383$new_n42348_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n42349_
-.subckt a3_x2 i0=$abc$109383$new_n42205_ i1=$abc$109383$new_n42201_ i2=$abc$109383$new_n42199_ q=$abc$109383$new_n42350_
-.subckt a2_x2 i0=$abc$109383$new_n42048_ i1=$abc$109383$new_n41686_ q=$abc$109383$new_n42351_
-.subckt oa22_x2 i0=$abc$109383$new_n42351_ i1=$abc$109383$new_n42185_ i2=$abc$109383$new_n42350_ q=$abc$109383$new_n42352_
+.subckt and3_x1 i0=$abc$109383$new_n42205_ i1=$abc$109383$new_n42201_ i2=$abc$109383$new_n42199_ q=$abc$109383$new_n42350_
+.subckt and2_x1 i0=$abc$109383$new_n42048_ i1=$abc$109383$new_n41686_ q=$abc$109383$new_n42351_
+.subckt or21nand_x1 i0=$abc$109383$new_n42351_ i1=$abc$109383$new_n42185_ i2=$abc$109383$new_n42350_ nq=$abc$109383$new_n42352_
 .subckt nand2_x0 i0=$abc$109383$new_n42343_ i1=$abc$109383$new_n42352_ nq=$abc$109383$new_n42353_
-.subckt nxr2_x1 i0=$abc$109383$new_n42343_ i1=$abc$109383$new_n42352_ nq=$abc$109383$new_n42354_
-.subckt ao22_x2 i0=$abc$109383$new_n42197_ i1=$abc$109383$new_n42354_ i2=$abc$109383$new_n42353_ q=$abc$109383$new_n42355_
-.subckt a3_x2 i0=$abc$109383$new_n42220_ i1=$abc$109383$new_n42216_ i2=$abc$109383$new_n42203_ q=$abc$109383$new_n42356_
-.subckt oa22_x2 i0=$abc$109383$new_n42200_ i1=$abc$109383$new_n42183_ i2=$abc$109383$new_n42356_ q=$abc$109383$new_n42357_
-.subckt nxr2_x1 i0=$abc$109383$new_n42230_ i1=$abc$109383$new_n41686_ nq=$abc$109383$new_n42358_
+.subckt nexor2_x0 i0=$abc$109383$new_n42343_ i1=$abc$109383$new_n42352_ nq=$abc$109383$new_n42354_
+.subckt and21nor_x1 i0=$abc$109383$new_n42197_ i1=$abc$109383$new_n42354_ i2=$abc$109383$new_n42353_ nq=$abc$109383$new_n42355_
+.subckt and3_x1 i0=$abc$109383$new_n42220_ i1=$abc$109383$new_n42216_ i2=$abc$109383$new_n42203_ q=$abc$109383$new_n42356_
+.subckt or21nand_x1 i0=$abc$109383$new_n42200_ i1=$abc$109383$new_n42183_ i2=$abc$109383$new_n42356_ nq=$abc$109383$new_n42357_
+.subckt nexor2_x0 i0=$abc$109383$new_n42230_ i1=$abc$109383$new_n41686_ nq=$abc$109383$new_n42358_
 .subckt nand2_x0 i0=$abc$109383$new_n42340_ i1=$abc$109383$new_n42358_ nq=$abc$109383$new_n42359_
-.subckt a3_x2 i0=$abc$109383$new_n42237_ i1=$abc$109383$new_n42233_ i2=$abc$109383$new_n42218_ q=$abc$109383$new_n42360_
-.subckt oa22_x2 i0=$abc$109383$new_n42215_ i1=$abc$109383$new_n42181_ i2=$abc$109383$new_n42360_ q=$abc$109383$new_n42361_
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[59] nq=$abc$109383$new_n42505_
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 .subckt nor2_x0 i0=$abc$109383$new_n42506_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n42507_
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 .subckt buf_x4 i=$abc$109383$new_n42150_ q=$abc$109383$new_n42610_
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 .subckt nand2_x0 i0=$abc$109383$new_n42487_ i1=$abc$109383$new_n42612_ nq=$abc$109383$new_n42613_
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 .subckt nand2_x0 i0=$abc$109383$new_n42281_ i1=$abc$109383$new_n29461_ nq=$abc$109383$new_n42619_
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 .subckt nand2_x0 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29284_ nq=$abc$109383$new_n42623_
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 .subckt nand2_x0 i0=$abc$109383$new_n42311_ i1=$abc$109383$new_n29405_ nq=$abc$109383$new_n42626_
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 .subckt nand3_x0 i0=$abc$109383$new_n42150_ i1=$abc$109383$new_n29431_ i2=$abc$109383$new_n29742_ nq=$abc$109383$new_n42629_
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[60] nq=$abc$109383$new_n42649_
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 .subckt nor2_x0 i0=$abc$109383$new_n42650_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n42651_
-.subckt a3_x2 i0=$abc$109383$new_n42521_ i1=$abc$109383$new_n42517_ i2=$abc$109383$new_n42515_ q=$abc$109383$new_n42652_
-.subckt a2_x2 i0=$abc$109383$new_n42371_ i1=$abc$109383$new_n42367_ q=$abc$109383$new_n42653_
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 .subckt nand2_x0 i0=$abc$109383$new_n42645_ i1=$abc$109383$new_n42654_ nq=$abc$109383$new_n42655_
-.subckt nxr2_x1 i0=$abc$109383$new_n42645_ i1=$abc$109383$new_n42654_ nq=$abc$109383$new_n42656_
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-.subckt a3_x2 i0=$abc$109383$new_n42535_ i1=$abc$109383$new_n42531_ i2=$abc$109383$new_n42519_ q=$abc$109383$new_n42658_
-.subckt oa22_x2 i0=$abc$109383$new_n42516_ i1=$abc$109383$new_n42498_ i2=$abc$109383$new_n42658_ q=$abc$109383$new_n42659_
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 .subckt nand2_x0 i0=$abc$109383$new_n42642_ i1=$abc$109383$new_n42660_ nq=$abc$109383$new_n42661_
-.subckt a3_x2 i0=$abc$109383$new_n42551_ i1=$abc$109383$new_n42547_ i2=$abc$109383$new_n42533_ q=$abc$109383$new_n42662_
-.subckt oa22_x2 i0=$abc$109383$new_n42530_ i1=$abc$109383$new_n42496_ i2=$abc$109383$new_n42662_ q=$abc$109383$new_n42663_
-.subckt nxr2_x1 i0=$abc$109383$new_n42641_ i1=$abc$109383$new_n42663_ nq=$abc$109383$new_n42664_
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 .subckt nand2_x0 i0=$abc$109383$new_n42664_ i1=$abc$109383$new_n42544_ nq=$abc$109383$new_n42665_
 .subckt nand3_x0 i0=$abc$109383$new_n42665_ i1=$abc$109383$new_n42661_ i2=$abc$109383$new_n42659_ nq=$abc$109383$new_n42666_
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 .subckt buf_x4 i=$abc$109383$new_n42209_ q=$abc$109383$new_n42669_
 .subckt buf_x4 i=$abc$109383$new_n42210_ q=$abc$109383$new_n42670_
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-.subckt oa22_x2 i0=$abc$109383$new_n42669_ i1=$abc$109383$new_n42670_ i2=$abc$109383$new_n42540_ q=$abc$109383$new_n42672_
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 .subckt nand2_x0 i0=$abc$109383$new_n42673_ i1=$abc$109383$new_n42367_ nq=$abc$109383$new_n42674_
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 .subckt nand2_x0 i0=$abc$109383$new_n42640_ i1=$abc$109383$new_n42675_ nq=$abc$109383$new_n42676_
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 .subckt nand2_x0 i0=$abc$109383$new_n42679_ i1=$abc$109383$new_n42562_ nq=$abc$109383$new_n42680_
 .subckt nand3_x0 i0=$abc$109383$new_n42680_ i1=$abc$109383$new_n42676_ i2=$abc$109383$new_n42663_ nq=$abc$109383$new_n42681_
-.subckt ao22_x2 i0=$abc$109383$new_n42544_ i1=$abc$109383$new_n42664_ i2=$abc$109383$new_n42681_ q=$abc$109383$new_n42682_
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 .subckt buf_x4 i=$abc$109383$new_n42223_ q=$abc$109383$new_n42683_
 .subckt buf_x4 i=$abc$109383$new_n42224_ q=$abc$109383$new_n42684_
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 .subckt buf_x4 i=$abc$109383$new_n29222_ q=$abc$109383$new_n42784_
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 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[61] nq=$abc$109383$new_n42786_
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 .subckt nor2_x0 i0=$abc$109383$new_n42787_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n42788_
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 .subckt nand2_x0 i0=$abc$109383$new_n42781_ i1=$abc$109383$new_n42791_ nq=$abc$109383$new_n42792_
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 .subckt nand2_x0 i0=$abc$109383$new_n42778_ i1=$abc$109383$new_n42797_ nq=$abc$109383$new_n42798_
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 .subckt nand3_x0 i0=$abc$109383$new_n42802_ i1=$abc$109383$new_n42798_ i2=$abc$109383$new_n42796_ nq=$abc$109383$new_n42803_
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 .subckt buf_x4 i=$abc$109383$new_n42367_ q=$abc$109383$new_n42806_
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 .subckt nand2_x0 i0=$abc$109383$new_n42809_ i1=$abc$109383$new_n42806_ nq=$abc$109383$new_n42810_
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 .subckt nand3_x0 i0=$abc$109383$new_n42816_ i1=$abc$109383$new_n42812_ i2=$abc$109383$new_n42800_ nq=$abc$109383$new_n42817_
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 .subckt nand3_x0 i0=$abc$109383$new_n42821_ i1=$abc$109383$new_n42210_ i2=$abc$109383$new_n42209_ nq=$abc$109383$new_n42822_
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+.subckt nexor2_x0 i0=$abc$109383$new_n42734_ i1=$abc$109383$new_n42563_ nq=$abc$109383$new_n42843_
 .subckt nand2_x0 i0=$abc$109383$new_n42772_ i1=$abc$109383$new_n42843_ nq=$abc$109383$new_n42844_
-.subckt a2_x2 i0=$abc$109383$new_n42633_ i1=$abc$109383$new_n42726_ q=$abc$109383$new_n42845_
-.subckt oa22_x2 i0=$abc$109383$new_n42721_ i1=$abc$109383$new_n42634_ i2=$abc$109383$new_n42845_ q=$abc$109383$new_n42846_
-.subckt nxr2_x1 i0=$abc$109383$new_n42771_ i1=$abc$109383$new_n42846_ nq=$abc$109383$new_n42847_
+.subckt and2_x1 i0=$abc$109383$new_n42633_ i1=$abc$109383$new_n42726_ q=$abc$109383$new_n42845_
+.subckt or21nand_x1 i0=$abc$109383$new_n42721_ i1=$abc$109383$new_n42634_ i2=$abc$109383$new_n42845_ nq=$abc$109383$new_n42846_
+.subckt nexor2_x0 i0=$abc$109383$new_n42771_ i1=$abc$109383$new_n42846_ nq=$abc$109383$new_n42847_
 .subckt nand2_x0 i0=$abc$109383$new_n42847_ i1=$abc$109383$new_n42735_ nq=$abc$109383$new_n42848_
 .subckt nand3_x0 i0=$abc$109383$new_n42848_ i1=$abc$109383$new_n42844_ i2=$abc$109383$new_n42829_ nq=$abc$109383$new_n42849_
-.subckt ao22_x2 i0=$abc$109383$new_n42720_ i1=$abc$109383$new_n42830_ i2=$abc$109383$new_n42849_ q=$abc$109383$new_n42850_
-.subckt o2_x2 i0=$abc$109383$new_n42733_ i1=$abc$109383$new_n42244_ q=$abc$109383$new_n42851_
-.subckt a2_x2 i0=$abc$109383$new_n42733_ i1=$abc$109383$new_n42244_ q=$abc$109383$new_n42852_
-.subckt ao22_x2 i0=$abc$109383$new_n42563_ i1=$abc$109383$new_n42852_ i2=$abc$109383$new_n42851_ q=$abc$109383$new_n42853_
-.subckt nxr2_x1 i0=$abc$109383$new_n42853_ i1=$abc$109383$new_n42261_ nq=$abc$109383$new_n42854_
-.subckt nxr2_x1 i0=$abc$109383$new_n42854_ i1=$abc$109383$new_n42383_ nq=$abc$109383$new_n42855_
-.subckt nxr2_x1 i0=$abc$109383$new_n42744_ i1=$abc$109383$new_n42578_ nq=$abc$109383$new_n42856_
+.subckt and21nor_x1 i0=$abc$109383$new_n42720_ i1=$abc$109383$new_n42830_ i2=$abc$109383$new_n42849_ nq=$abc$109383$new_n42850_
+.subckt or2_x1 i0=$abc$109383$new_n42733_ i1=$abc$109383$new_n42244_ q=$abc$109383$new_n42851_
+.subckt and2_x1 i0=$abc$109383$new_n42733_ i1=$abc$109383$new_n42244_ q=$abc$109383$new_n42852_
+.subckt and21nor_x1 i0=$abc$109383$new_n42563_ i1=$abc$109383$new_n42852_ i2=$abc$109383$new_n42851_ nq=$abc$109383$new_n42853_
+.subckt nexor2_x0 i0=$abc$109383$new_n42853_ i1=$abc$109383$new_n42261_ nq=$abc$109383$new_n42854_
+.subckt nexor2_x0 i0=$abc$109383$new_n42854_ i1=$abc$109383$new_n42383_ nq=$abc$109383$new_n42855_
+.subckt nexor2_x0 i0=$abc$109383$new_n42744_ i1=$abc$109383$new_n42578_ nq=$abc$109383$new_n42856_
 .subckt nand2_x0 i0=$abc$109383$new_n42770_ i1=$abc$109383$new_n42856_ nq=$abc$109383$new_n42857_
-.subckt a2_x2 i0=$abc$109383$new_n42631_ i1=$abc$109383$new_n42747_ q=$abc$109383$new_n42858_
+.subckt and2_x1 i0=$abc$109383$new_n42631_ i1=$abc$109383$new_n42747_ q=$abc$109383$new_n42858_
 .subckt nand2_x0 i0=$abc$109383$new_n42750_ i1=$abc$109383$new_n42625_ nq=$abc$109383$new_n42859_
-.subckt nxr2_x1 i0=$abc$109383$new_n42621_ i1=$abc$109383$new_n42742_ nq=$abc$109383$new_n42860_
-.subckt oa22_x2 i0=$abc$109383$new_n42860_ i1=$abc$109383$new_n42859_ i2=$abc$109383$new_n42858_ q=$abc$109383$new_n42861_
-.subckt nxr2_x1 i0=$abc$109383$new_n42769_ i1=$abc$109383$new_n42861_ nq=$abc$109383$new_n42862_
+.subckt nexor2_x0 i0=$abc$109383$new_n42621_ i1=$abc$109383$new_n42742_ nq=$abc$109383$new_n42860_
+.subckt or21nand_x1 i0=$abc$109383$new_n42860_ i1=$abc$109383$new_n42859_ i2=$abc$109383$new_n42858_ nq=$abc$109383$new_n42861_
+.subckt nexor2_x0 i0=$abc$109383$new_n42769_ i1=$abc$109383$new_n42861_ nq=$abc$109383$new_n42862_
 .subckt nand2_x0 i0=$abc$109383$new_n42862_ i1=$abc$109383$new_n42745_ nq=$abc$109383$new_n42863_
 .subckt nand3_x0 i0=$abc$109383$new_n42863_ i1=$abc$109383$new_n42857_ i2=$abc$109383$new_n42846_ nq=$abc$109383$new_n42864_
-.subckt ao22_x2 i0=$abc$109383$new_n42735_ i1=$abc$109383$new_n42847_ i2=$abc$109383$new_n42864_ q=$abc$109383$new_n42865_
-.subckt oa22_x2 i0=$abc$109383$new_n42459_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42743_ q=$abc$109383$new_n42866_
-.subckt a3_x2 i0=$abc$109383$new_n42743_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42459_ q=$abc$109383$new_n42867_
-.subckt ao22_x2 i0=$abc$109383$new_n42578_ i1=$abc$109383$new_n42867_ i2=$abc$109383$new_n42866_ q=$abc$109383$new_n42868_
-.subckt nxr2_x1 i0=$abc$109383$new_n42868_ i1=$abc$109383$new_n41948_ nq=$abc$109383$new_n42869_
-.subckt nxr2_x1 i0=$abc$109383$new_n42869_ i1=$abc$109383$new_n42556_ nq=$abc$109383$new_n42870_
+.subckt and21nor_x1 i0=$abc$109383$new_n42735_ i1=$abc$109383$new_n42847_ i2=$abc$109383$new_n42864_ nq=$abc$109383$new_n42865_
+.subckt or21nand_x1 i0=$abc$109383$new_n42459_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42743_ nq=$abc$109383$new_n42866_
+.subckt and3_x1 i0=$abc$109383$new_n42743_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42459_ q=$abc$109383$new_n42867_
+.subckt and21nor_x1 i0=$abc$109383$new_n42578_ i1=$abc$109383$new_n42867_ i2=$abc$109383$new_n42866_ nq=$abc$109383$new_n42868_
+.subckt nexor2_x0 i0=$abc$109383$new_n42868_ i1=$abc$109383$new_n41948_ nq=$abc$109383$new_n42869_
+.subckt nexor2_x0 i0=$abc$109383$new_n42869_ i1=$abc$109383$new_n42556_ nq=$abc$109383$new_n42870_
 .subckt nand2_x0 i0=$abc$109383$new_n42769_ i1=$abc$109383$new_n42861_ nq=$abc$109383$new_n42871_
-.subckt ao22_x2 i0=$abc$109383$new_n42745_ i1=$abc$109383$new_n42862_ i2=$abc$109383$new_n42871_ q=$abc$109383$new_n42872_
+.subckt and21nor_x1 i0=$abc$109383$new_n42745_ i1=$abc$109383$new_n42862_ i2=$abc$109383$new_n42871_ nq=$abc$109383$new_n42872_
 .subckt nand4_x0 i0=$abc$109383$new_n30284_ i1=$abc$109383$new_n42591_ i2=$abc$109383$new_n42738_ i3=$abc$109383$new_n29490_ nq=$abc$109383$new_n42873_
 .subckt nand2_x0 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29489_ nq=$abc$109383$new_n42874_
 .subckt nand3_x0 i0=$abc$109383$new_n30284_ i1=$abc$109383$new_n42435_ i2=$abc$109383$new_n29489_ nq=$abc$109383$new_n42875_
-.subckt a2_x2 i0=$abc$109383$new_n42875_ i1=$abc$109383$new_n42874_ q=$abc$109383$new_n42876_
-.subckt ao22_x2 i0=$abc$109383$new_n42742_ i1=$abc$109383$new_n42876_ i2=$abc$109383$new_n42873_ q=$abc$109383$new_n42877_
-.subckt nxr2_x1 i0=$abc$109383$new_n42877_ i1=$abc$109383$new_n42602_ nq=$abc$109383$new_n42878_
-.subckt nxr2_x1 i0=$abc$109383$new_n42878_ i1=$abc$109383$new_n42453_ nq=$abc$109383$new_n42879_
-.subckt a3_x2 i0=$abc$109383$new_n42610_ i1=$abc$109383$new_n29432_ i2=$abc$109383$new_n29742_ q=$abc$109383$new_n42880_
-.subckt oa22_x2 i0=$abc$109383$new_n42749_ i1=$abc$109383$new_n42628_ i2=$abc$109383$new_n42880_ q=$abc$109383$new_n42881_
+.subckt and2_x1 i0=$abc$109383$new_n42875_ i1=$abc$109383$new_n42874_ q=$abc$109383$new_n42876_
+.subckt and21nor_x1 i0=$abc$109383$new_n42742_ i1=$abc$109383$new_n42876_ i2=$abc$109383$new_n42873_ nq=$abc$109383$new_n42877_
+.subckt nexor2_x0 i0=$abc$109383$new_n42877_ i1=$abc$109383$new_n42602_ nq=$abc$109383$new_n42878_
+.subckt nexor2_x0 i0=$abc$109383$new_n42878_ i1=$abc$109383$new_n42453_ nq=$abc$109383$new_n42879_
+.subckt and3_x1 i0=$abc$109383$new_n42610_ i1=$abc$109383$new_n29432_ i2=$abc$109383$new_n29742_ q=$abc$109383$new_n42880_
+.subckt or21nand_x1 i0=$abc$109383$new_n42749_ i1=$abc$109383$new_n42628_ i2=$abc$109383$new_n42880_ nq=$abc$109383$new_n42881_
 .subckt nand2_x0 i0=$abc$109383$new_n42762_ i1=$abc$109383$new_n42881_ nq=$abc$109383$new_n42882_
-.subckt a2_x2 i0=$abc$109383$new_n42759_ i1=$abc$109383$new_n42758_ q=$abc$109383$new_n42883_
-.subckt nxr2_x1 i0=$abc$109383$new_n42761_ i1=$abc$109383$new_n42883_ nq=$abc$109383$new_n42884_
-.subckt a2_x2 i0=$abc$109383$new_n42884_ i1=$abc$109383$new_n42756_ q=$abc$109383$new_n42885_
-.subckt ao22_x2 i0=$abc$109383$new_n42768_ i1=$abc$109383$new_n42885_ i2=$abc$109383$new_n42882_ q=$abc$109383$new_n42886_
+.subckt and2_x1 i0=$abc$109383$new_n42759_ i1=$abc$109383$new_n42758_ q=$abc$109383$new_n42883_
+.subckt nexor2_x0 i0=$abc$109383$new_n42761_ i1=$abc$109383$new_n42883_ nq=$abc$109383$new_n42884_
+.subckt and2_x1 i0=$abc$109383$new_n42884_ i1=$abc$109383$new_n42756_ q=$abc$109383$new_n42885_
+.subckt and21nor_x1 i0=$abc$109383$new_n42768_ i1=$abc$109383$new_n42885_ i2=$abc$109383$new_n42882_ nq=$abc$109383$new_n42886_
 .subckt nand2_x0 i0=$abc$109383$new_n42311_ i1=$abc$109383$new_n29462_ nq=$abc$109383$new_n42887_
 .subckt nand2_x0 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29405_ nq=$abc$109383$new_n42888_
-.subckt ao22_x2 i0=$abc$109383$new_n29432_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n42888_ q=$abc$109383$new_n42889_
-.subckt ao22_x2 i0=$abc$109383$new_n42889_ i1=$abc$109383$new_n42887_ i2=$abc$109383$new_n42759_ q=$abc$109383$new_n42890_
+.subckt and21nor_x1 i0=$abc$109383$new_n29432_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n42888_ nq=$abc$109383$new_n42889_
+.subckt and21nor_x1 i0=$abc$109383$new_n42889_ i1=$abc$109383$new_n42887_ i2=$abc$109383$new_n42759_ nq=$abc$109383$new_n42890_
 .subckt buf_x4 i=$abc$109383$new_n42311_ q=$abc$109383$new_n42891_
 .subckt nand2_x0 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29489_ nq=$abc$109383$new_n42892_
-.subckt a2_x2 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29461_ q=$abc$109383$new_n42893_
-.subckt oa22_x2 i0=$abc$109383$new_n29750_ i1=$abc$109383$new_n42610_ i2=$abc$109383$new_n42893_ q=$abc$109383$new_n42894_
+.subckt and2_x1 i0=$abc$109383$new_n42163_ i1=$abc$109383$new_n29461_ q=$abc$109383$new_n42893_
+.subckt or21nand_x1 i0=$abc$109383$new_n29750_ i1=$abc$109383$new_n42610_ i2=$abc$109383$new_n42893_ nq=$abc$109383$new_n42894_
 .subckt nand3_x0 i0=$abc$109383$new_n42610_ i1=$abc$109383$new_n29462_ i2=$abc$109383$new_n29750_ nq=$abc$109383$new_n42895_
-.subckt a2_x2 i0=$abc$109383$new_n42895_ i1=$abc$109383$new_n42894_ q=$abc$109383$new_n42896_
-.subckt nxr2_x1 i0=$abc$109383$new_n42896_ i1=$abc$109383$new_n42892_ nq=$abc$109383$new_n42897_
-.subckt nxr2_x1 i0=$abc$109383$new_n42897_ i1=$abc$109383$new_n42890_ nq=$abc$109383$new_n42898_
-.subckt o2_x2 i0=$abc$109383$new_n42767_ i1=$abc$109383$new_n42742_ q=$abc$109383$new_n42899_
+.subckt and2_x1 i0=$abc$109383$new_n42895_ i1=$abc$109383$new_n42894_ q=$abc$109383$new_n42896_
+.subckt nexor2_x0 i0=$abc$109383$new_n42896_ i1=$abc$109383$new_n42892_ nq=$abc$109383$new_n42897_
+.subckt nexor2_x0 i0=$abc$109383$new_n42897_ i1=$abc$109383$new_n42890_ nq=$abc$109383$new_n42898_
+.subckt or2_x1 i0=$abc$109383$new_n42767_ i1=$abc$109383$new_n42742_ q=$abc$109383$new_n42899_
 .subckt nand2_x0 i0=$abc$109383$new_n42767_ i1=$abc$109383$new_n42618_ nq=$abc$109383$new_n42900_
 .subckt nand3_x0 i0=$abc$109383$new_n30284_ i1=$abc$109383$new_n42591_ i2=$abc$109383$new_n29489_ nq=$abc$109383$new_n42901_
 .subckt nand2_x0 i0=$abc$109383$new_n42901_ i1=$abc$109383$new_n42875_ nq=$abc$109383$new_n42902_
 .subckt nand3_x0 i0=$abc$109383$new_n42902_ i1=$abc$109383$new_n42900_ i2=$abc$109383$new_n42873_ nq=$abc$109383$new_n42903_
-.subckt a2_x2 i0=$abc$109383$new_n42903_ i1=$abc$109383$new_n42899_ q=$abc$109383$new_n42904_
-.subckt nxr2_x1 i0=$abc$109383$new_n42904_ i1=$abc$109383$new_n42898_ nq=$abc$109383$new_n42905_
-.subckt nxr2_x1 i0=$abc$109383$new_n42905_ i1=$abc$109383$new_n42886_ nq=$abc$109383$new_n42906_
-.subckt nxr2_x1 i0=$abc$109383$new_n42906_ i1=$abc$109383$new_n42879_ nq=$abc$109383$new_n42907_
-.subckt nxr2_x1 i0=$abc$109383$new_n42907_ i1=$abc$109383$new_n42872_ nq=$abc$109383$new_n42908_
-.subckt nxr2_x1 i0=$abc$109383$new_n42908_ i1=$abc$109383$new_n42870_ nq=$abc$109383$new_n42909_
-.subckt nxr2_x1 i0=$abc$109383$new_n42909_ i1=$abc$109383$new_n42865_ nq=$abc$109383$new_n42910_
-.subckt nxr2_x1 i0=$abc$109383$new_n42910_ i1=$abc$109383$new_n42855_ nq=$abc$109383$new_n42911_
-.subckt nxr2_x1 i0=$abc$109383$new_n42911_ i1=$abc$109383$new_n42850_ nq=$abc$109383$new_n42912_
-.subckt nxr2_x1 i0=$abc$109383$new_n42912_ i1=$abc$109383$new_n42842_ nq=$abc$109383$new_n42913_
-.subckt nxr2_x1 i0=$abc$109383$new_n42913_ i1=$abc$109383$new_n42833_ nq=$abc$109383$new_n42914_
-.subckt nxr2_x1 i0=$abc$109383$new_n42914_ i1=$abc$109383$new_n42825_ nq=$abc$109383$new_n42915_
-.subckt nxr2_x1 i0=$abc$109383$new_n42915_ i1=$abc$109383$new_n42818_ nq=$abc$109383$new_n42916_
-.subckt nxr2_x1 i0=$abc$109383$new_n42916_ i1=$abc$109383$new_n42810_ nq=$abc$109383$new_n42917_
-.subckt nxr2_x1 i0=$abc$109383$new_n42917_ i1=$abc$109383$new_n42805_ nq=$abc$109383$new_n42918_
-.subckt nxr2_x1 i0=$abc$109383$new_n42918_ i1=$abc$109383$new_n42794_ nq=$abc$109383$new_n42919_
-.subckt ao22_x2 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n42919_ i2=$abc$109383$new_n42788_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103002
+.subckt and2_x1 i0=$abc$109383$new_n42903_ i1=$abc$109383$new_n42899_ q=$abc$109383$new_n42904_
+.subckt nexor2_x0 i0=$abc$109383$new_n42904_ i1=$abc$109383$new_n42898_ nq=$abc$109383$new_n42905_
+.subckt nexor2_x0 i0=$abc$109383$new_n42905_ i1=$abc$109383$new_n42886_ nq=$abc$109383$new_n42906_
+.subckt nexor2_x0 i0=$abc$109383$new_n42906_ i1=$abc$109383$new_n42879_ nq=$abc$109383$new_n42907_
+.subckt nexor2_x0 i0=$abc$109383$new_n42907_ i1=$abc$109383$new_n42872_ nq=$abc$109383$new_n42908_
+.subckt nexor2_x0 i0=$abc$109383$new_n42908_ i1=$abc$109383$new_n42870_ nq=$abc$109383$new_n42909_
+.subckt nexor2_x0 i0=$abc$109383$new_n42909_ i1=$abc$109383$new_n42865_ nq=$abc$109383$new_n42910_
+.subckt nexor2_x0 i0=$abc$109383$new_n42910_ i1=$abc$109383$new_n42855_ nq=$abc$109383$new_n42911_
+.subckt nexor2_x0 i0=$abc$109383$new_n42911_ i1=$abc$109383$new_n42850_ nq=$abc$109383$new_n42912_
+.subckt nexor2_x0 i0=$abc$109383$new_n42912_ i1=$abc$109383$new_n42842_ nq=$abc$109383$new_n42913_
+.subckt nexor2_x0 i0=$abc$109383$new_n42913_ i1=$abc$109383$new_n42833_ nq=$abc$109383$new_n42914_
+.subckt nexor2_x0 i0=$abc$109383$new_n42914_ i1=$abc$109383$new_n42825_ nq=$abc$109383$new_n42915_
+.subckt nexor2_x0 i0=$abc$109383$new_n42915_ i1=$abc$109383$new_n42818_ nq=$abc$109383$new_n42916_
+.subckt nexor2_x0 i0=$abc$109383$new_n42916_ i1=$abc$109383$new_n42810_ nq=$abc$109383$new_n42917_
+.subckt nexor2_x0 i0=$abc$109383$new_n42917_ i1=$abc$109383$new_n42805_ nq=$abc$109383$new_n42918_
+.subckt nexor2_x0 i0=$abc$109383$new_n42918_ i1=$abc$109383$new_n42794_ nq=$abc$109383$new_n42919_
+.subckt and21nor_x1 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n42919_ i2=$abc$109383$new_n42788_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103002
 .subckt inv_x0 i=soc.cpu.minerva.multiplier.m_prod[62] nq=$abc$109383$new_n42921_
-.subckt ao22_x2 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42921_ q=$abc$109383$new_n42922_
+.subckt and21nor_x1 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n42921_ nq=$abc$109383$new_n42922_
 .subckt nor2_x0 i0=$abc$109383$new_n42922_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n42923_
-.subckt a3_x2 i0=$abc$109383$new_n42802_ i1=$abc$109383$new_n42798_ i2=$abc$109383$new_n42796_ q=$abc$109383$new_n42924_
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+.subckt and21nor_x1 i0=$abc$109383$new_n29405_ i1=$abc$109383$new_n35798_ i2=$abc$109383$new_n42996_ nq=$abc$109383$new_n42997_
+.subckt and21nor_x1 i0=$abc$109383$new_n42892_ i1=$abc$109383$new_n42997_ i2=$abc$109383$new_n42895_ nq=$abc$109383$new_n42998_
 .subckt nand3_x0 i0=$abc$109383$new_n30284_ i1=$abc$109383$new_n42891_ i2=$abc$109383$new_n29490_ nq=$abc$109383$new_n42999_
-.subckt a2_x2 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29489_ q=$abc$109383$new_n43000_
-.subckt a2_x2 i0=$abc$109383$new_n42610_ i1=$abc$109383$new_n29754_ q=$abc$109383$new_n43001_
-.subckt mx2_x2 cmd=$abc$109383$new_n43001_ i0=$abc$109383$new_n43000_ i1=$abc$109383$new_n29756_ q=$abc$109383$new_n43002_
-.subckt nxr2_x1 i0=$abc$109383$new_n43002_ i1=$abc$109383$new_n42999_ nq=$abc$109383$new_n43003_
-.subckt nxr2_x1 i0=$abc$109383$new_n43003_ i1=$abc$109383$new_n42998_ nq=$abc$109383$new_n43004_
-.subckt nxr2_x1 i0=$abc$109383$new_n43004_ i1=$abc$109383$new_n42904_ nq=$abc$109383$new_n43005_
-.subckt nxr2_x1 i0=$abc$109383$new_n43005_ i1=$abc$109383$new_n42995_ nq=$abc$109383$new_n43006_
-.subckt nxr2_x1 i0=$abc$109383$new_n43006_ i1=$abc$109383$new_n42879_ nq=$abc$109383$new_n43007_
-.subckt nxr2_x1 i0=$abc$109383$new_n43007_ i1=$abc$109383$new_n42990_ nq=$abc$109383$new_n43008_
-.subckt oa22_x2 i0=$abc$109383$new_n42459_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42877_ q=$abc$109383$new_n43009_
-.subckt a3_x2 i0=$abc$109383$new_n42877_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42459_ q=$abc$109383$new_n43010_
-.subckt ao22_x2 i0=$abc$109383$new_n42578_ i1=$abc$109383$new_n43010_ i2=$abc$109383$new_n43009_ q=$abc$109383$new_n43011_
-.subckt nxr2_x1 i0=$abc$109383$new_n43011_ i1=$abc$109383$new_n41948_ nq=$abc$109383$new_n43012_
-.subckt nxr2_x1 i0=$abc$109383$new_n43012_ i1=$abc$109383$new_n42563_ nq=$abc$109383$new_n43013_
-.subckt nxr2_x1 i0=$abc$109383$new_n43013_ i1=$abc$109383$new_n43008_ nq=$abc$109383$new_n43014_
-.subckt nxr2_x1 i0=$abc$109383$new_n43014_ i1=$abc$109383$new_n42978_ nq=$abc$109383$new_n43015_
-.subckt nxr2_x1 i0=$abc$109383$new_n43015_ i1=$abc$109383$new_n42973_ nq=$abc$109383$new_n43016_
-.subckt nxr2_x1 i0=$abc$109383$new_n43016_ i1=$abc$109383$new_n42968_ nq=$abc$109383$new_n43017_
-.subckt nxr2_x1 i0=$abc$109383$new_n43017_ i1=$abc$109383$new_n42963_ nq=$abc$109383$new_n43018_
-.subckt nxr2_x1 i0=$abc$109383$new_n43018_ i1=$abc$109383$new_n42955_ nq=$abc$109383$new_n43019_
-.subckt nxr2_x1 i0=$abc$109383$new_n43019_ i1=$abc$109383$new_n42950_ nq=$abc$109383$new_n43020_
-.subckt nxr2_x1 i0=$abc$109383$new_n43020_ i1=$abc$109383$new_n42943_ nq=$abc$109383$new_n43021_
-.subckt nxr2_x1 i0=$abc$109383$new_n43021_ i1=$abc$109383$new_n42938_ nq=$abc$109383$new_n43022_
-.subckt nxr2_x1 i0=$abc$109383$new_n43022_ i1=$abc$109383$new_n42934_ nq=$abc$109383$new_n43023_
-.subckt nxr2_x1 i0=$abc$109383$new_n43023_ i1=$abc$109383$new_n42929_ nq=$abc$109383$new_n43024_
-.subckt ao22_x2 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n43024_ i2=$abc$109383$new_n42923_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103006
-.subckt ao22_x2 i0=$abc$109383$new_n35098_ i1=soc.cpu.minerva.multiplier.m_prod[63] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n43026_
-.subckt a2_x2 i0=$abc$109383$new_n42915_ i1=$abc$109383$new_n42931_ q=$abc$109383$new_n43027_
-.subckt a2_x2 i0=$abc$109383$new_n42809_ i1=$abc$109383$new_n42806_ q=$abc$109383$new_n43028_
-.subckt oa22_x2 i0=$abc$109383$new_n43028_ i1=$abc$109383$new_n42916_ i2=$abc$109383$new_n43027_ q=$abc$109383$new_n43029_
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+.subckt nexor2_x0 i0=$abc$109383$new_n43005_ i1=$abc$109383$new_n42995_ nq=$abc$109383$new_n43006_
+.subckt nexor2_x0 i0=$abc$109383$new_n43006_ i1=$abc$109383$new_n42879_ nq=$abc$109383$new_n43007_
+.subckt nexor2_x0 i0=$abc$109383$new_n43007_ i1=$abc$109383$new_n42990_ nq=$abc$109383$new_n43008_
+.subckt or21nand_x1 i0=$abc$109383$new_n42459_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42877_ nq=$abc$109383$new_n43009_
+.subckt and3_x1 i0=$abc$109383$new_n42877_ i1=$abc$109383$new_n42463_ i2=$abc$109383$new_n42459_ q=$abc$109383$new_n43010_
+.subckt and21nor_x1 i0=$abc$109383$new_n42578_ i1=$abc$109383$new_n43010_ i2=$abc$109383$new_n43009_ nq=$abc$109383$new_n43011_
+.subckt nexor2_x0 i0=$abc$109383$new_n43011_ i1=$abc$109383$new_n41948_ nq=$abc$109383$new_n43012_
+.subckt nexor2_x0 i0=$abc$109383$new_n43012_ i1=$abc$109383$new_n42563_ nq=$abc$109383$new_n43013_
+.subckt nexor2_x0 i0=$abc$109383$new_n43013_ i1=$abc$109383$new_n43008_ nq=$abc$109383$new_n43014_
+.subckt nexor2_x0 i0=$abc$109383$new_n43014_ i1=$abc$109383$new_n42978_ nq=$abc$109383$new_n43015_
+.subckt nexor2_x0 i0=$abc$109383$new_n43015_ i1=$abc$109383$new_n42973_ nq=$abc$109383$new_n43016_
+.subckt nexor2_x0 i0=$abc$109383$new_n43016_ i1=$abc$109383$new_n42968_ nq=$abc$109383$new_n43017_
+.subckt nexor2_x0 i0=$abc$109383$new_n43017_ i1=$abc$109383$new_n42963_ nq=$abc$109383$new_n43018_
+.subckt nexor2_x0 i0=$abc$109383$new_n43018_ i1=$abc$109383$new_n42955_ nq=$abc$109383$new_n43019_
+.subckt nexor2_x0 i0=$abc$109383$new_n43019_ i1=$abc$109383$new_n42950_ nq=$abc$109383$new_n43020_
+.subckt nexor2_x0 i0=$abc$109383$new_n43020_ i1=$abc$109383$new_n42943_ nq=$abc$109383$new_n43021_
+.subckt nexor2_x0 i0=$abc$109383$new_n43021_ i1=$abc$109383$new_n42938_ nq=$abc$109383$new_n43022_
+.subckt nexor2_x0 i0=$abc$109383$new_n43022_ i1=$abc$109383$new_n42934_ nq=$abc$109383$new_n43023_
+.subckt nexor2_x0 i0=$abc$109383$new_n43023_ i1=$abc$109383$new_n42929_ nq=$abc$109383$new_n43024_
+.subckt and21nor_x1 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n43024_ i2=$abc$109383$new_n42923_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103006
+.subckt and21nor_x1 i0=$abc$109383$new_n35098_ i1=soc.cpu.minerva.multiplier.m_prod[63] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n43026_
+.subckt and2_x1 i0=$abc$109383$new_n42915_ i1=$abc$109383$new_n42931_ q=$abc$109383$new_n43027_
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+.subckt or21nand_x1 i0=$abc$109383$new_n43028_ i1=$abc$109383$new_n42916_ i2=$abc$109383$new_n43027_ nq=$abc$109383$new_n43029_
 .subckt nand2_x0 i0=$abc$109383$new_n43022_ i1=$abc$109383$new_n43029_ nq=$abc$109383$new_n43030_
-.subckt nxr2_x1 i0=$abc$109383$new_n43022_ i1=$abc$109383$new_n43029_ nq=$abc$109383$new_n43031_
-.subckt ao22_x2 i0=$abc$109383$new_n42929_ i1=$abc$109383$new_n43031_ i2=$abc$109383$new_n43030_ q=$abc$109383$new_n43032_
-.subckt a2_x2 i0=$abc$109383$new_n42913_ i1=$abc$109383$new_n42940_ q=$abc$109383$new_n43033_
-.subckt nxr2_x1 i0=$abc$109383$new_n42824_ i1=$abc$109383$new_n42806_ nq=$abc$109383$new_n43034_
-.subckt oa22_x2 i0=$abc$109383$new_n43034_ i1=$abc$109383$new_n42914_ i2=$abc$109383$new_n43033_ q=$abc$109383$new_n43035_
-.subckt nxr2_x1 i0=$abc$109383$new_n42949_ i1=$abc$109383$new_n42806_ nq=$abc$109383$new_n43036_
+.subckt nexor2_x0 i0=$abc$109383$new_n43022_ i1=$abc$109383$new_n43029_ nq=$abc$109383$new_n43031_
+.subckt and21nor_x1 i0=$abc$109383$new_n42929_ i1=$abc$109383$new_n43031_ i2=$abc$109383$new_n43030_ nq=$abc$109383$new_n43032_
+.subckt and2_x1 i0=$abc$109383$new_n42913_ i1=$abc$109383$new_n42940_ q=$abc$109383$new_n43033_
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 .subckt nand2_x0 i0=$abc$109383$new_n43019_ i1=$abc$109383$new_n43036_ nq=$abc$109383$new_n43037_
-.subckt a2_x2 i0=$abc$109383$new_n42911_ i1=$abc$109383$new_n42952_ q=$abc$109383$new_n43038_
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-.subckt oa22_x2 i0=$abc$109383$new_n43039_ i1=$abc$109383$new_n42912_ i2=$abc$109383$new_n43038_ q=$abc$109383$new_n43040_
-.subckt nxr2_x1 i0=$abc$109383$new_n43018_ i1=$abc$109383$new_n43040_ nq=$abc$109383$new_n43041_
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+.subckt nexor2_x0 i0=$abc$109383$new_n42841_ i1=$abc$109383$new_n42529_ nq=$abc$109383$new_n43039_
+.subckt or21nand_x1 i0=$abc$109383$new_n43039_ i1=$abc$109383$new_n42912_ i2=$abc$109383$new_n43038_ nq=$abc$109383$new_n43040_
+.subckt nexor2_x0 i0=$abc$109383$new_n43018_ i1=$abc$109383$new_n43040_ nq=$abc$109383$new_n43041_
 .subckt nand2_x0 i0=$abc$109383$new_n43041_ i1=$abc$109383$new_n42950_ nq=$abc$109383$new_n43042_
-.subckt a3_x2 i0=$abc$109383$new_n43042_ i1=$abc$109383$new_n43037_ i2=$abc$109383$new_n43035_ q=$abc$109383$new_n43043_
-.subckt a2_x2 i0=$abc$109383$new_n42937_ i1=$abc$109383$new_n42806_ q=$abc$109383$new_n43044_
-.subckt oa22_x2 i0=$abc$109383$new_n43044_ i1=$abc$109383$new_n43021_ i2=$abc$109383$new_n43043_ q=$abc$109383$new_n43045_
-.subckt a3_x2 i0=$abc$109383$new_n42946_ i1=$abc$109383$new_n42670_ i2=$abc$109383$new_n42669_ q=$abc$109383$new_n43046_
-.subckt oa22_x2 i0=$abc$109383$new_n42669_ i1=$abc$109383$new_n42670_ i2=$abc$109383$new_n42946_ q=$abc$109383$new_n43047_
-.subckt oa22_x2 i0=$abc$109383$new_n42370_ i1=$abc$109383$new_n43047_ i2=$abc$109383$new_n43046_ q=$abc$109383$new_n43048_
-.subckt a2_x2 i0=$abc$109383$new_n43048_ i1=$abc$109383$new_n42806_ q=$abc$109383$new_n43049_
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 .subckt nand2_x0 i0=$abc$109383$new_n43017_ i1=$abc$109383$new_n43050_ nq=$abc$109383$new_n43051_
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-.subckt nxr2_x1 i0=$abc$109383$new_n43016_ i1=$abc$109383$new_n43054_ nq=$abc$109383$new_n43055_
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 .subckt nand2_x0 i0=$abc$109383$new_n43055_ i1=$abc$109383$new_n42963_ nq=$abc$109383$new_n43056_
 .subckt nand3_x0 i0=$abc$109383$new_n43056_ i1=$abc$109383$new_n43051_ i2=$abc$109383$new_n43040_ nq=$abc$109383$new_n43057_
-.subckt ao22_x2 i0=$abc$109383$new_n42950_ i1=$abc$109383$new_n43041_ i2=$abc$109383$new_n43057_ q=$abc$109383$new_n43058_
-.subckt nxr2_x1 i0=$abc$109383$new_n42972_ i1=$abc$109383$new_n42545_ nq=$abc$109383$new_n43059_
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 .subckt nand2_x0 i0=$abc$109383$new_n43015_ i1=$abc$109383$new_n43059_ nq=$abc$109383$new_n43060_
-.subckt a2_x2 i0=$abc$109383$new_n42907_ i1=$abc$109383$new_n42975_ q=$abc$109383$new_n43061_
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-.subckt nxr2_x1 i0=$abc$109383$new_n43014_ i1=$abc$109383$new_n43063_ nq=$abc$109383$new_n43064_
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 .subckt nand2_x0 i0=$abc$109383$new_n43064_ i1=$abc$109383$new_n42973_ nq=$abc$109383$new_n43065_
-.subckt a3_x2 i0=$abc$109383$new_n43065_ i1=$abc$109383$new_n43060_ i2=$abc$109383$new_n43054_ q=$abc$109383$new_n43066_
-.subckt oa22_x2 i0=$abc$109383$new_n43050_ i1=$abc$109383$new_n43017_ i2=$abc$109383$new_n43066_ q=$abc$109383$new_n43067_
-.subckt mx2_x2 cmd=$abc$109383$new_n40413_ i0=$abc$109383$new_n41881_ i1=$abc$109383$new_n39879_ q=$abc$109383$new_n43068_
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 .subckt nand2_x0 i0=$abc$109383$new_n42993_ i1=$abc$109383$new_n42890_ nq=$abc$109383$new_n43070_
 .subckt nand2_x0 i0=$abc$109383$new_n42903_ i1=$abc$109383$new_n42899_ nq=$abc$109383$new_n43071_
-.subckt oa22_x2 i0=$abc$109383$new_n43071_ i1=$abc$109383$new_n43070_ i2=$abc$109383$new_n43069_ q=$abc$109383$new_n43072_
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 .subckt nand2_x0 i0=$abc$109383$new_n43005_ i1=$abc$109383$new_n43072_ nq=$abc$109383$new_n43073_
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-.subckt a3_x2 i0=$abc$109383$new_n42610_ i1=$abc$109383$new_n29754_ i2=$abc$109383$new_n29490_ q=$abc$109383$new_n43077_
-.subckt oa22_x2 i0=$abc$109383$new_n29754_ i1=$abc$109383$new_n42610_ i2=$abc$109383$new_n43000_ q=$abc$109383$new_n43078_
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-.subckt oa22_x2 i0=$abc$109383$new_n43079_ i1=$abc$109383$new_n43078_ i2=$abc$109383$new_n43077_ q=$abc$109383$new_n43080_
-.subckt mx2_x2 cmd=$abc$109383$new_n29490_ i0=soc.cpu.minerva.multiplier.x_src2_signed i1=$abc$109383$new_n30284_ q=$abc$109383$new_n43081_
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 .subckt nand2_x0 i0=$abc$109383$new_n43081_ i1=$abc$109383$new_n42999_ nq=$abc$109383$new_n43082_
 .subckt inv_x1 i=$abc$109383$new_n42753_ nq=$abc$109383$new_n43083_
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 .subckt nand2_x0 i0=$abc$109383$new_n43003_ i1=$abc$109383$new_n43087_ nq=$abc$109383$new_n43088_
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 .subckt nand2_x0 i0=$abc$109383$new_n43089_ i1=$abc$109383$new_n42998_ nq=$abc$109383$new_n43090_
-.subckt mx2_x2 cmd=$abc$109383$new_n42904_ i0=$abc$109383$new_n43090_ i1=$abc$109383$new_n43088_ q=$abc$109383$new_n43091_
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 .subckt nand2_x0 i0=$abc$109383$new_n43007_ i1=$abc$109383$new_n42990_ nq=$abc$109383$new_n43097_
 .subckt nor2_x0 i0=$abc$109383$new_n43007_ i1=$abc$109383$new_n42990_ nq=$abc$109383$new_n43098_
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 .subckt nor2_x0 i0=$abc$109383$new_n42868_ i1=$abc$109383$new_n42834_ nq=$abc$109383$new_n43108_
 .subckt nand2_x0 i0=$abc$109383$new_n42868_ i1=$abc$109383$new_n42834_ nq=$abc$109383$new_n43109_
-.subckt oa22_x2 i0=$abc$109383$new_n42556_ i1=$abc$109383$new_n43109_ i2=$abc$109383$new_n43108_ q=$abc$109383$new_n43110_
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 .subckt nand3_x0 i0=$abc$109383$new_n43110_ i1=$abc$109383$new_n42684_ i2=$abc$109383$new_n42683_ nq=$abc$109383$new_n43111_
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-.subckt ao22_x2 i0=$abc$109383$new_n42545_ i1=$abc$109383$new_n43112_ i2=$abc$109383$new_n43111_ q=$abc$109383$new_n43113_
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 .subckt nand2_x0 i0=$abc$109383$new_n43014_ i1=$abc$109383$new_n43063_ nq=$abc$109383$new_n43114_
-.subckt ao22_x2 i0=$abc$109383$new_n42973_ i1=$abc$109383$new_n43064_ i2=$abc$109383$new_n43114_ q=$abc$109383$new_n43115_
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-.subckt oa22_x2 i0=$abc$109383$new_n42383_ i1=$abc$109383$new_n43119_ i2=$abc$109383$new_n43118_ q=$abc$109383$new_n43120_
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 .subckt nand3_x0 i0=$abc$109383$new_n43120_ i1=$abc$109383$new_n42670_ i2=$abc$109383$new_n42669_ nq=$abc$109383$new_n43121_
-.subckt ao22_x2 i0=$abc$109383$new_n41691_ i1=$abc$109383$new_n41881_ i2=$abc$109383$new_n42961_ q=$abc$109383$new_n43122_
-.subckt ao22_x2 i0=$abc$109383$new_n42529_ i1=$abc$109383$new_n43122_ i2=$abc$109383$new_n43121_ q=$abc$109383$new_n43123_
-.subckt nxr2_x1 i0=$abc$109383$new_n43123_ i1=$abc$109383$new_n42806_ nq=$abc$109383$new_n43124_
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 .subckt nand2_x0 i0=$abc$109383$new_n42029_ i1=$abc$109383$new_n41862_ nq=$abc$109383$new_n43139_
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-.subckt oa22_x2 i0=$abc$109383$new_n41848_ i1=$abc$109383$new_n42014_ i2=$abc$109383$new_n43141_ q=$abc$109383$new_n43142_
-.subckt oa22_x2 i0=$abc$109383$new_n43142_ i1=$abc$109383$new_n42187_ i2=$abc$109383$new_n43137_ q=$abc$109383$new_n43143_
-.subckt oa22_x2 i0=$abc$109383$new_n43143_ i1=$abc$109383$new_n42344_ i2=$abc$109383$new_n43136_ q=$abc$109383$new_n43144_
-.subckt oa22_x2 i0=$abc$109383$new_n43144_ i1=$abc$109383$new_n42502_ i2=$abc$109383$new_n43135_ q=$abc$109383$new_n43145_
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-.subckt oa22_x2 i0=$abc$109383$new_n43146_ i1=$abc$109383$new_n42782_ i2=$abc$109383$new_n43133_ q=$abc$109383$new_n43147_
-.subckt oa22_x2 i0=$abc$109383$new_n43147_ i1=$abc$109383$new_n42918_ i2=$abc$109383$new_n43132_ q=$abc$109383$new_n43148_
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+.subckt and2_x1 i0=$abc$109383$new_n41837_ i1=$abc$109383$new_n41674_ q=$abc$109383$new_n43140_
+.subckt or21nand_x1 i0=$abc$109383$new_n43140_ i1=$abc$109383$new_n43139_ i2=$abc$109383$new_n43138_ nq=$abc$109383$new_n43141_
+.subckt or21nand_x1 i0=$abc$109383$new_n41848_ i1=$abc$109383$new_n42014_ i2=$abc$109383$new_n43141_ nq=$abc$109383$new_n43142_
+.subckt or21nand_x1 i0=$abc$109383$new_n43142_ i1=$abc$109383$new_n42187_ i2=$abc$109383$new_n43137_ nq=$abc$109383$new_n43143_
+.subckt or21nand_x1 i0=$abc$109383$new_n43143_ i1=$abc$109383$new_n42344_ i2=$abc$109383$new_n43136_ nq=$abc$109383$new_n43144_
+.subckt or21nand_x1 i0=$abc$109383$new_n43144_ i1=$abc$109383$new_n42502_ i2=$abc$109383$new_n43135_ nq=$abc$109383$new_n43145_
+.subckt or21nand_x1 i0=$abc$109383$new_n43145_ i1=$abc$109383$new_n42646_ i2=$abc$109383$new_n43134_ nq=$abc$109383$new_n43146_
+.subckt or21nand_x1 i0=$abc$109383$new_n43146_ i1=$abc$109383$new_n42782_ i2=$abc$109383$new_n43133_ nq=$abc$109383$new_n43147_
+.subckt or21nand_x1 i0=$abc$109383$new_n43147_ i1=$abc$109383$new_n42918_ i2=$abc$109383$new_n43132_ nq=$abc$109383$new_n43148_
+.subckt or21nand_x1 i0=$abc$109383$new_n43148_ i1=$abc$109383$new_n43023_ i2=$abc$109383$new_n43131_ nq=$abc$109383$new_n43149_
 .subckt nand3_x0 i0=$abc$109383$new_n43042_ i1=$abc$109383$new_n43037_ i2=$abc$109383$new_n43035_ nq=$abc$109383$new_n43150_
-.subckt nxr2_x1 i0=$abc$109383$new_n43020_ i1=$abc$109383$new_n43035_ nq=$abc$109383$new_n43151_
-.subckt ao22_x2 i0=$abc$109383$new_n42938_ i1=$abc$109383$new_n43151_ i2=$abc$109383$new_n43150_ q=$abc$109383$new_n43152_
-.subckt nxr2_x1 i0=$abc$109383$new_n43128_ i1=$abc$109383$new_n43152_ nq=$abc$109383$new_n43153_
-.subckt a2_x2 i0=$abc$109383$new_n43153_ i1=$abc$109383$new_n43149_ q=$abc$109383$new_n43154_
-.subckt ao22_x2 i0=$abc$109383$new_n43154_ i1=$abc$109383$new_n43130_ i2=$abc$109383$new_n43026_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103010
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[32] i1=soc.cpu.minerva.multiplier.m_prod[0] q=$abc$109383$new_n43156_
+.subckt nexor2_x0 i0=$abc$109383$new_n43020_ i1=$abc$109383$new_n43035_ nq=$abc$109383$new_n43151_
+.subckt and21nor_x1 i0=$abc$109383$new_n42938_ i1=$abc$109383$new_n43151_ i2=$abc$109383$new_n43150_ nq=$abc$109383$new_n43152_
+.subckt nexor2_x0 i0=$abc$109383$new_n43128_ i1=$abc$109383$new_n43152_ nq=$abc$109383$new_n43153_
+.subckt and2_x1 i0=$abc$109383$new_n43153_ i1=$abc$109383$new_n43149_ q=$abc$109383$new_n43154_
+.subckt and21nor_x1 i0=$abc$109383$new_n43154_ i1=$abc$109383$new_n43130_ i2=$abc$109383$new_n43026_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103010
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[32] i1=soc.cpu.minerva.multiplier.m_prod[0] q=$abc$109383$new_n43156_
 .subckt buf_x4 i=$abc$109383$new_n17846_ q=$abc$109383$new_n43157_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43156_ i1=soc.cpu.minerva.multiplier.w_result[0] q=$abc$109383$new_n43158_
-.subckt a2_x2 i0=$abc$109383$new_n43158_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103014
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[33] i1=soc.cpu.minerva.multiplier.m_prod[1] q=$abc$109383$new_n43160_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43160_ i1=soc.cpu.minerva.multiplier.w_result[1] q=$abc$109383$new_n43161_
-.subckt a2_x2 i0=$abc$109383$new_n43161_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103018
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[34] i1=soc.cpu.minerva.multiplier.m_prod[2] q=$abc$109383$new_n43163_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43163_ i1=soc.cpu.minerva.multiplier.w_result[2] q=$abc$109383$new_n43164_
-.subckt a2_x2 i0=$abc$109383$new_n43164_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103022
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[35] i1=soc.cpu.minerva.multiplier.m_prod[3] q=$abc$109383$new_n43166_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43166_ i1=soc.cpu.minerva.multiplier.w_result[3] q=$abc$109383$new_n43167_
-.subckt a2_x2 i0=$abc$109383$new_n43167_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103026
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[36] i1=soc.cpu.minerva.multiplier.m_prod[4] q=$abc$109383$new_n43169_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43169_ i1=soc.cpu.minerva.multiplier.w_result[4] q=$abc$109383$new_n43170_
-.subckt a2_x2 i0=$abc$109383$new_n43170_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103030
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43156_ i1=soc.cpu.minerva.multiplier.w_result[0] q=$abc$109383$new_n43158_
+.subckt and2_x1 i0=$abc$109383$new_n43158_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103014
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[33] i1=soc.cpu.minerva.multiplier.m_prod[1] q=$abc$109383$new_n43160_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43160_ i1=soc.cpu.minerva.multiplier.w_result[1] q=$abc$109383$new_n43161_
+.subckt and2_x1 i0=$abc$109383$new_n43161_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103018
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[34] i1=soc.cpu.minerva.multiplier.m_prod[2] q=$abc$109383$new_n43163_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43163_ i1=soc.cpu.minerva.multiplier.w_result[2] q=$abc$109383$new_n43164_
+.subckt and2_x1 i0=$abc$109383$new_n43164_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103022
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[35] i1=soc.cpu.minerva.multiplier.m_prod[3] q=$abc$109383$new_n43166_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43166_ i1=soc.cpu.minerva.multiplier.w_result[3] q=$abc$109383$new_n43167_
+.subckt and2_x1 i0=$abc$109383$new_n43167_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103026
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[36] i1=soc.cpu.minerva.multiplier.m_prod[4] q=$abc$109383$new_n43169_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43169_ i1=soc.cpu.minerva.multiplier.w_result[4] q=$abc$109383$new_n43170_
+.subckt and2_x1 i0=$abc$109383$new_n43170_ i1=$abc$109383$new_n29188_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103030
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n43172_
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[37] i1=soc.cpu.minerva.multiplier.m_prod[5] q=$abc$109383$new_n43173_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43173_ i1=soc.cpu.minerva.multiplier.w_result[5] q=$abc$109383$new_n43174_
-.subckt a2_x2 i0=$abc$109383$new_n43174_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103034
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[38] i1=soc.cpu.minerva.multiplier.m_prod[6] q=$abc$109383$new_n43176_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43176_ i1=soc.cpu.minerva.multiplier.w_result[6] q=$abc$109383$new_n43177_
-.subckt a2_x2 i0=$abc$109383$new_n43177_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103038
-.subckt mx2_x2 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[39] i1=soc.cpu.minerva.multiplier.m_prod[7] q=$abc$109383$new_n43179_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43179_ i1=soc.cpu.minerva.multiplier.w_result[7] q=$abc$109383$new_n43180_
-.subckt a2_x2 i0=$abc$109383$new_n43180_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103042
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[37] i1=soc.cpu.minerva.multiplier.m_prod[5] q=$abc$109383$new_n43173_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43173_ i1=soc.cpu.minerva.multiplier.w_result[5] q=$abc$109383$new_n43174_
+.subckt and2_x1 i0=$abc$109383$new_n43174_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103034
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[38] i1=soc.cpu.minerva.multiplier.m_prod[6] q=$abc$109383$new_n43176_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43176_ i1=soc.cpu.minerva.multiplier.w_result[6] q=$abc$109383$new_n43177_
+.subckt and2_x1 i0=$abc$109383$new_n43177_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103038
+.subckt mux2_x1 cmd=$abc$109383$new_n30296_ i0=soc.cpu.minerva.multiplier.m_prod[39] i1=soc.cpu.minerva.multiplier.m_prod[7] q=$abc$109383$new_n43179_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43179_ i1=soc.cpu.minerva.multiplier.w_result[7] q=$abc$109383$new_n43180_
+.subckt and2_x1 i0=$abc$109383$new_n43180_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103042
 .subckt buf_x4 i=soc.cpu.minerva.multiplier.m_low q=$abc$109383$new_n43182_
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[40] i1=soc.cpu.minerva.multiplier.m_prod[8] q=$abc$109383$new_n43183_
-.subckt mx2_x2 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43183_ i1=soc.cpu.minerva.multiplier.w_result[8] q=$abc$109383$new_n43184_
-.subckt a2_x2 i0=$abc$109383$new_n43184_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103046
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[41] i1=soc.cpu.minerva.multiplier.m_prod[9] q=$abc$109383$new_n43186_
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[40] i1=soc.cpu.minerva.multiplier.m_prod[8] q=$abc$109383$new_n43183_
+.subckt mux2_x1 cmd=$abc$109383$new_n43157_ i0=$abc$109383$new_n43183_ i1=soc.cpu.minerva.multiplier.w_result[8] q=$abc$109383$new_n43184_
+.subckt and2_x1 i0=$abc$109383$new_n43184_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103046
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[41] i1=soc.cpu.minerva.multiplier.m_prod[9] q=$abc$109383$new_n43186_
 .subckt buf_x4 i=$abc$109383$new_n17846_ q=$abc$109383$new_n43187_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43186_ i1=soc.cpu.minerva.multiplier.w_result[9] q=$abc$109383$new_n43188_
-.subckt a2_x2 i0=$abc$109383$new_n43188_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103050
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[42] i1=soc.cpu.minerva.multiplier.m_prod[10] q=$abc$109383$new_n43190_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43190_ i1=soc.cpu.minerva.multiplier.w_result[10] q=$abc$109383$new_n43191_
-.subckt a2_x2 i0=$abc$109383$new_n43191_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103054
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[43] i1=soc.cpu.minerva.multiplier.m_prod[11] q=$abc$109383$new_n43193_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43193_ i1=soc.cpu.minerva.multiplier.w_result[11] q=$abc$109383$new_n43194_
-.subckt a2_x2 i0=$abc$109383$new_n43194_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103058
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[44] i1=soc.cpu.minerva.multiplier.m_prod[12] q=$abc$109383$new_n43196_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43196_ i1=soc.cpu.minerva.multiplier.w_result[12] q=$abc$109383$new_n43197_
-.subckt a2_x2 i0=$abc$109383$new_n43197_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103062
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[45] i1=soc.cpu.minerva.multiplier.m_prod[13] q=$abc$109383$new_n43199_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43199_ i1=soc.cpu.minerva.multiplier.w_result[13] q=$abc$109383$new_n43200_
-.subckt a2_x2 i0=$abc$109383$new_n43200_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103066
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[46] i1=soc.cpu.minerva.multiplier.m_prod[14] q=$abc$109383$new_n43202_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43202_ i1=soc.cpu.minerva.multiplier.w_result[14] q=$abc$109383$new_n43203_
-.subckt a2_x2 i0=$abc$109383$new_n43203_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103070
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43186_ i1=soc.cpu.minerva.multiplier.w_result[9] q=$abc$109383$new_n43188_
+.subckt and2_x1 i0=$abc$109383$new_n43188_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103050
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[42] i1=soc.cpu.minerva.multiplier.m_prod[10] q=$abc$109383$new_n43190_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43190_ i1=soc.cpu.minerva.multiplier.w_result[10] q=$abc$109383$new_n43191_
+.subckt and2_x1 i0=$abc$109383$new_n43191_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103054
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[43] i1=soc.cpu.minerva.multiplier.m_prod[11] q=$abc$109383$new_n43193_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43193_ i1=soc.cpu.minerva.multiplier.w_result[11] q=$abc$109383$new_n43194_
+.subckt and2_x1 i0=$abc$109383$new_n43194_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103058
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[44] i1=soc.cpu.minerva.multiplier.m_prod[12] q=$abc$109383$new_n43196_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43196_ i1=soc.cpu.minerva.multiplier.w_result[12] q=$abc$109383$new_n43197_
+.subckt and2_x1 i0=$abc$109383$new_n43197_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103062
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[45] i1=soc.cpu.minerva.multiplier.m_prod[13] q=$abc$109383$new_n43199_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43199_ i1=soc.cpu.minerva.multiplier.w_result[13] q=$abc$109383$new_n43200_
+.subckt and2_x1 i0=$abc$109383$new_n43200_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103066
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[46] i1=soc.cpu.minerva.multiplier.m_prod[14] q=$abc$109383$new_n43202_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43202_ i1=soc.cpu.minerva.multiplier.w_result[14] q=$abc$109383$new_n43203_
+.subckt and2_x1 i0=$abc$109383$new_n43203_ i1=$abc$109383$new_n43172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103070
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n43205_
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[47] i1=soc.cpu.minerva.multiplier.m_prod[15] q=$abc$109383$new_n43206_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43206_ i1=soc.cpu.minerva.multiplier.w_result[15] q=$abc$109383$new_n43207_
-.subckt a2_x2 i0=$abc$109383$new_n43207_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103074
-.subckt mx2_x2 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[48] i1=soc.cpu.minerva.multiplier.m_prod[16] q=$abc$109383$new_n43209_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43209_ i1=soc.cpu.minerva.multiplier.w_result[16] q=$abc$109383$new_n43210_
-.subckt a2_x2 i0=$abc$109383$new_n43210_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103078
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[47] i1=soc.cpu.minerva.multiplier.m_prod[15] q=$abc$109383$new_n43206_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43206_ i1=soc.cpu.minerva.multiplier.w_result[15] q=$abc$109383$new_n43207_
+.subckt and2_x1 i0=$abc$109383$new_n43207_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103074
+.subckt mux2_x1 cmd=$abc$109383$new_n43182_ i0=soc.cpu.minerva.multiplier.m_prod[48] i1=soc.cpu.minerva.multiplier.m_prod[16] q=$abc$109383$new_n43209_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43209_ i1=soc.cpu.minerva.multiplier.w_result[16] q=$abc$109383$new_n43210_
+.subckt and2_x1 i0=$abc$109383$new_n43210_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103078
 .subckt buf_x4 i=soc.cpu.minerva.multiplier.m_low q=$abc$109383$new_n43212_
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[49] i1=soc.cpu.minerva.multiplier.m_prod[17] q=$abc$109383$new_n43213_
-.subckt mx2_x2 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43213_ i1=soc.cpu.minerva.multiplier.w_result[17] q=$abc$109383$new_n43214_
-.subckt a2_x2 i0=$abc$109383$new_n43214_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103082
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[50] i1=soc.cpu.minerva.multiplier.m_prod[18] q=$abc$109383$new_n43216_
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[49] i1=soc.cpu.minerva.multiplier.m_prod[17] q=$abc$109383$new_n43213_
+.subckt mux2_x1 cmd=$abc$109383$new_n43187_ i0=$abc$109383$new_n43213_ i1=soc.cpu.minerva.multiplier.w_result[17] q=$abc$109383$new_n43214_
+.subckt and2_x1 i0=$abc$109383$new_n43214_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103082
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[50] i1=soc.cpu.minerva.multiplier.m_prod[18] q=$abc$109383$new_n43216_
 .subckt buf_x4 i=$abc$109383$new_n17846_ q=$abc$109383$new_n43217_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43216_ i1=soc.cpu.minerva.multiplier.w_result[18] q=$abc$109383$new_n43218_
-.subckt a2_x2 i0=$abc$109383$new_n43218_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103086
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[51] i1=soc.cpu.minerva.multiplier.m_prod[19] q=$abc$109383$new_n43220_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43220_ i1=soc.cpu.minerva.multiplier.w_result[19] q=$abc$109383$new_n43221_
-.subckt a2_x2 i0=$abc$109383$new_n43221_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103090
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[52] i1=soc.cpu.minerva.multiplier.m_prod[20] q=$abc$109383$new_n43223_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43223_ i1=soc.cpu.minerva.multiplier.w_result[20] q=$abc$109383$new_n43224_
-.subckt a2_x2 i0=$abc$109383$new_n43224_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103094
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[53] i1=soc.cpu.minerva.multiplier.m_prod[21] q=$abc$109383$new_n43226_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43226_ i1=soc.cpu.minerva.multiplier.w_result[21] q=$abc$109383$new_n43227_
-.subckt a2_x2 i0=$abc$109383$new_n43227_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103098
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[54] i1=soc.cpu.minerva.multiplier.m_prod[22] q=$abc$109383$new_n43229_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43229_ i1=soc.cpu.minerva.multiplier.w_result[22] q=$abc$109383$new_n43230_
-.subckt a2_x2 i0=$abc$109383$new_n43230_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103102
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[55] i1=soc.cpu.minerva.multiplier.m_prod[23] q=$abc$109383$new_n43232_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43232_ i1=soc.cpu.minerva.multiplier.w_result[23] q=$abc$109383$new_n43233_
-.subckt a2_x2 i0=$abc$109383$new_n43233_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103106
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[56] i1=soc.cpu.minerva.multiplier.m_prod[24] q=$abc$109383$new_n43235_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43235_ i1=soc.cpu.minerva.multiplier.w_result[24] q=$abc$109383$new_n43236_
-.subckt a2_x2 i0=$abc$109383$new_n43236_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103110
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43216_ i1=soc.cpu.minerva.multiplier.w_result[18] q=$abc$109383$new_n43218_
+.subckt and2_x1 i0=$abc$109383$new_n43218_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103086
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[51] i1=soc.cpu.minerva.multiplier.m_prod[19] q=$abc$109383$new_n43220_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43220_ i1=soc.cpu.minerva.multiplier.w_result[19] q=$abc$109383$new_n43221_
+.subckt and2_x1 i0=$abc$109383$new_n43221_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103090
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[52] i1=soc.cpu.minerva.multiplier.m_prod[20] q=$abc$109383$new_n43223_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43223_ i1=soc.cpu.minerva.multiplier.w_result[20] q=$abc$109383$new_n43224_
+.subckt and2_x1 i0=$abc$109383$new_n43224_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103094
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[53] i1=soc.cpu.minerva.multiplier.m_prod[21] q=$abc$109383$new_n43226_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43226_ i1=soc.cpu.minerva.multiplier.w_result[21] q=$abc$109383$new_n43227_
+.subckt and2_x1 i0=$abc$109383$new_n43227_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103098
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[54] i1=soc.cpu.minerva.multiplier.m_prod[22] q=$abc$109383$new_n43229_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43229_ i1=soc.cpu.minerva.multiplier.w_result[22] q=$abc$109383$new_n43230_
+.subckt and2_x1 i0=$abc$109383$new_n43230_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103102
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[55] i1=soc.cpu.minerva.multiplier.m_prod[23] q=$abc$109383$new_n43232_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43232_ i1=soc.cpu.minerva.multiplier.w_result[23] q=$abc$109383$new_n43233_
+.subckt and2_x1 i0=$abc$109383$new_n43233_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103106
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[56] i1=soc.cpu.minerva.multiplier.m_prod[24] q=$abc$109383$new_n43235_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43235_ i1=soc.cpu.minerva.multiplier.w_result[24] q=$abc$109383$new_n43236_
+.subckt and2_x1 i0=$abc$109383$new_n43236_ i1=$abc$109383$new_n43205_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103110
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n43238_
-.subckt mx2_x2 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[57] i1=soc.cpu.minerva.multiplier.m_prod[25] q=$abc$109383$new_n43239_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43239_ i1=soc.cpu.minerva.multiplier.w_result[25] q=$abc$109383$new_n43240_
-.subckt a2_x2 i0=$abc$109383$new_n43240_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103114
-.subckt mx2_x2 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[58] i1=soc.cpu.minerva.multiplier.m_prod[26] q=$abc$109383$new_n43242_
-.subckt mx2_x2 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43242_ i1=soc.cpu.minerva.multiplier.w_result[26] q=$abc$109383$new_n43243_
-.subckt a2_x2 i0=$abc$109383$new_n43243_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103118
-.subckt mx2_x2 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[59] i1=soc.cpu.minerva.multiplier.m_prod[27] q=$abc$109383$new_n43245_
-.subckt mx2_x2 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43245_ i1=soc.cpu.minerva.multiplier.w_result[27] q=$abc$109383$new_n43246_
-.subckt a2_x2 i0=$abc$109383$new_n43246_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103122
-.subckt mx2_x2 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[60] i1=soc.cpu.minerva.multiplier.m_prod[28] q=$abc$109383$new_n43248_
-.subckt mx2_x2 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43248_ i1=soc.cpu.minerva.multiplier.w_result[28] q=$abc$109383$new_n43249_
-.subckt a2_x2 i0=$abc$109383$new_n43249_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103126
-.subckt mx2_x2 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[61] i1=soc.cpu.minerva.multiplier.m_prod[29] q=$abc$109383$new_n43251_
-.subckt mx2_x2 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43251_ i1=soc.cpu.minerva.multiplier.w_result[29] q=$abc$109383$new_n43252_
-.subckt a2_x2 i0=$abc$109383$new_n43252_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103130
-.subckt mx2_x2 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[62] i1=soc.cpu.minerva.multiplier.m_prod[30] q=$abc$109383$new_n43254_
-.subckt mx2_x2 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43254_ i1=soc.cpu.minerva.multiplier.w_result[30] q=$abc$109383$new_n43255_
-.subckt a2_x2 i0=$abc$109383$new_n43255_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103134
-.subckt mx2_x2 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[63] i1=soc.cpu.minerva.multiplier.m_prod[31] q=$abc$109383$new_n43257_
-.subckt mx2_x2 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43257_ i1=soc.cpu.minerva.multiplier.w_result[31] q=$abc$109383$new_n43258_
-.subckt a2_x2 i0=$abc$109383$new_n43258_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103138
-.subckt nxr2_x1 i0=$abc$109383$new_n15520_ i1=$abc$109383$new_n19817_ nq=$abc$109383$new_n43260_
-.subckt nxr2_x1 i0=$abc$109383$new_n15837_ i1=$abc$109383$new_n19822_ nq=$abc$109383$new_n43261_
-.subckt a2_x2 i0=$abc$109383$new_n43261_ i1=$abc$109383$new_n43260_ q=$abc$109383$new_n43262_
-.subckt nxr2_x1 i0=$abc$109383$new_n15780_ i1=$abc$109383$new_n19816_ nq=$abc$109383$new_n43263_
-.subckt nxr2_x1 i0=$abc$109383$new_n15577_ i1=$abc$109383$new_n19818_ nq=$abc$109383$new_n43264_
-.subckt nxr2_x1 i0=$abc$109383$new_n15779_ i1=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n43265_
-.subckt a4_x2 i0=$abc$109383$new_n43265_ i1=$abc$109383$new_n43264_ i2=$abc$109383$new_n43263_ i3=$abc$109383$new_n27525_ q=$abc$109383$new_n43266_
-.subckt a2_x2 i0=$abc$109383$new_n43266_ i1=$abc$109383$new_n43262_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103188
-.subckt nxr2_x1 i0=$abc$109383$new_n18474_ i1=$abc$109383$new_n19817_ nq=$abc$109383$new_n43268_
-.subckt nxr2_x1 i0=$abc$109383$new_n17916_ i1=$abc$109383$new_n19822_ nq=$abc$109383$new_n43269_
-.subckt a2_x2 i0=$abc$109383$new_n43269_ i1=$abc$109383$new_n43268_ q=$abc$109383$new_n43270_
-.subckt nxr2_x1 i0=$abc$109383$new_n17788_ i1=$abc$109383$new_n19816_ nq=$abc$109383$new_n43271_
-.subckt nxr2_x1 i0=$abc$109383$new_n17960_ i1=$abc$109383$new_n19818_ nq=$abc$109383$new_n43272_
-.subckt nxr2_x1 i0=$abc$109383$new_n18223_ i1=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n43273_
-.subckt a4_x2 i0=$abc$109383$new_n43273_ i1=$abc$109383$new_n43272_ i2=$abc$109383$new_n43271_ i3=$abc$109383$new_n27525_ q=$abc$109383$new_n43274_
-.subckt a2_x2 i0=$abc$109383$new_n43274_ i1=$abc$109383$new_n43270_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103190
+.subckt mux2_x1 cmd=$abc$109383$new_n43212_ i0=soc.cpu.minerva.multiplier.m_prod[57] i1=soc.cpu.minerva.multiplier.m_prod[25] q=$abc$109383$new_n43239_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43239_ i1=soc.cpu.minerva.multiplier.w_result[25] q=$abc$109383$new_n43240_
+.subckt and2_x1 i0=$abc$109383$new_n43240_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103114
+.subckt mux2_x1 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[58] i1=soc.cpu.minerva.multiplier.m_prod[26] q=$abc$109383$new_n43242_
+.subckt mux2_x1 cmd=$abc$109383$new_n43217_ i0=$abc$109383$new_n43242_ i1=soc.cpu.minerva.multiplier.w_result[26] q=$abc$109383$new_n43243_
+.subckt and2_x1 i0=$abc$109383$new_n43243_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103118
+.subckt mux2_x1 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[59] i1=soc.cpu.minerva.multiplier.m_prod[27] q=$abc$109383$new_n43245_
+.subckt mux2_x1 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43245_ i1=soc.cpu.minerva.multiplier.w_result[27] q=$abc$109383$new_n43246_
+.subckt and2_x1 i0=$abc$109383$new_n43246_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103122
+.subckt mux2_x1 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[60] i1=soc.cpu.minerva.multiplier.m_prod[28] q=$abc$109383$new_n43248_
+.subckt mux2_x1 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43248_ i1=soc.cpu.minerva.multiplier.w_result[28] q=$abc$109383$new_n43249_
+.subckt and2_x1 i0=$abc$109383$new_n43249_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103126
+.subckt mux2_x1 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[61] i1=soc.cpu.minerva.multiplier.m_prod[29] q=$abc$109383$new_n43251_
+.subckt mux2_x1 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43251_ i1=soc.cpu.minerva.multiplier.w_result[29] q=$abc$109383$new_n43252_
+.subckt and2_x1 i0=$abc$109383$new_n43252_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103130
+.subckt mux2_x1 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[62] i1=soc.cpu.minerva.multiplier.m_prod[30] q=$abc$109383$new_n43254_
+.subckt mux2_x1 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43254_ i1=soc.cpu.minerva.multiplier.w_result[30] q=$abc$109383$new_n43255_
+.subckt and2_x1 i0=$abc$109383$new_n43255_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103134
+.subckt mux2_x1 cmd=soc.cpu.minerva.multiplier.m_low i0=soc.cpu.minerva.multiplier.m_prod[63] i1=soc.cpu.minerva.multiplier.m_prod[31] q=$abc$109383$new_n43257_
+.subckt mux2_x1 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n43257_ i1=soc.cpu.minerva.multiplier.w_result[31] q=$abc$109383$new_n43258_
+.subckt and2_x1 i0=$abc$109383$new_n43258_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103138
+.subckt nexor2_x0 i0=$abc$109383$new_n15520_ i1=$abc$109383$new_n19817_ nq=$abc$109383$new_n43260_
+.subckt nexor2_x0 i0=$abc$109383$new_n15837_ i1=$abc$109383$new_n19822_ nq=$abc$109383$new_n43261_
+.subckt and2_x1 i0=$abc$109383$new_n43261_ i1=$abc$109383$new_n43260_ q=$abc$109383$new_n43262_
+.subckt nexor2_x0 i0=$abc$109383$new_n15780_ i1=$abc$109383$new_n19816_ nq=$abc$109383$new_n43263_
+.subckt nexor2_x0 i0=$abc$109383$new_n15577_ i1=$abc$109383$new_n19818_ nq=$abc$109383$new_n43264_
+.subckt nexor2_x0 i0=$abc$109383$new_n15779_ i1=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n43265_
+.subckt and4_x1 i0=$abc$109383$new_n43265_ i1=$abc$109383$new_n43264_ i2=$abc$109383$new_n43263_ i3=$abc$109383$new_n27525_ q=$abc$109383$new_n43266_
+.subckt and2_x1 i0=$abc$109383$new_n43266_ i1=$abc$109383$new_n43262_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103188
+.subckt nexor2_x0 i0=$abc$109383$new_n18474_ i1=$abc$109383$new_n19817_ nq=$abc$109383$new_n43268_
+.subckt nexor2_x0 i0=$abc$109383$new_n17916_ i1=$abc$109383$new_n19822_ nq=$abc$109383$new_n43269_
+.subckt and2_x1 i0=$abc$109383$new_n43269_ i1=$abc$109383$new_n43268_ q=$abc$109383$new_n43270_
+.subckt nexor2_x0 i0=$abc$109383$new_n17788_ i1=$abc$109383$new_n19816_ nq=$abc$109383$new_n43271_
+.subckt nexor2_x0 i0=$abc$109383$new_n17960_ i1=$abc$109383$new_n19818_ nq=$abc$109383$new_n43272_
+.subckt nexor2_x0 i0=$abc$109383$new_n18223_ i1=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n43273_
+.subckt and4_x1 i0=$abc$109383$new_n43273_ i1=$abc$109383$new_n43272_ i2=$abc$109383$new_n43271_ i3=$abc$109383$new_n27525_ q=$abc$109383$new_n43274_
+.subckt and2_x1 i0=$abc$109383$new_n43274_ i1=$abc$109383$new_n43270_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103190
 .subckt nor3_x0 i0=soc.timer.bridge.csr_bridge_1.wb__ack i1=soc.timer.bridge.csr_bridge_0.wb__ack i2=soc.hyperram.bus__ack nq=$abc$109383$new_n43276_
 .subckt nor2_x0 i0=soc.bridge.csr_bridge_1.wb__ack i1=soc.bridge.csr_bridge_0.wb__ack nq=$abc$109383$new_n43277_
 .subckt nor4_x0 i0=soc.ram.bus__ack i1=soc.rom.bridge.csr_bridge_0.wb__ack i2=soc.rom.data_bus__ack i3=soc.gpio.bridge.csr_bridge_0.wb__ack nq=$abc$109383$new_n43278_
 .subckt nand3_x0 i0=$abc$109383$new_n43278_ i1=$abc$109383$new_n43277_ i2=$abc$109383$new_n43276_ nq=$abc$109383$new_n43279_
-.subckt oa22_x2 i0=$abc$109383$new_n43279_ i1=$abc$109383$new_n28643_ i2=$abc$109383$new_n15256_ q=$abc$109383$new_n43280_
+.subckt or21nand_x1 i0=$abc$109383$new_n43279_ i1=$abc$109383$new_n28643_ i2=$abc$109383$new_n15256_ nq=$abc$109383$new_n43280_
 .subckt buf_x4 i=$abc$109383$new_n43280_ q=$abc$109383$new_n43281_
 .subckt nand2_x0 i0=$abc$109383$new_n43281_ i1=$abc$109383$new_n29202_ nq=$abc$109383$new_n43282_
-.subckt a2_x2 i0=$abc$109383$new_n43282_ i1=soc.cpu.minerva.loadstore.dbus__stb q=$abc$109383$new_n43283_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__store$51 i1=soc.cpu.minerva.payload__load$50 i2=$abc$109383$new_n17843_ q=$abc$109383$new_n43284_
-.subckt a3_x2 i0=$abc$109383$new_n43284_ i1=$abc$109383$new_n15258_ i2=$abc$109383$new_n29192_ q=$abc$109383$new_n43285_
+.subckt and2_x1 i0=$abc$109383$new_n43282_ i1=soc.cpu.minerva.loadstore.dbus__stb q=$abc$109383$new_n43283_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__store$51 i1=soc.cpu.minerva.payload__load$50 i2=$abc$109383$new_n17843_ nq=$abc$109383$new_n43284_
+.subckt and3_x1 i0=$abc$109383$new_n43284_ i1=$abc$109383$new_n15258_ i2=$abc$109383$new_n29192_ q=$abc$109383$new_n43285_
 .subckt buf_x4 i=$abc$109383$new_n43285_ q=$abc$109383$new_n43286_
 .subckt buf_x4 i=$abc$109383$new_n43286_ q=$abc$109383$new_n43287_
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=$abc$109383$new_n43283_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103194
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=$abc$109383$new_n43283_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103194
 .subckt buf_x4 i=$abc$109383$new_n43281_ q=$abc$109383$new_n43289_
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[0] q=$abc$109383$new_n43290_
-.subckt a2_x2 i0=$abc$109383$new_n43290_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n43291_
-.subckt mx2_x2 cmd=$abc$109383$new_n14954_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[0] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[0] q=$abc$109383$new_n43292_
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[0] nq=$abc$109383$new_n43290_
+.subckt and2_x1 i0=$abc$109383$new_n43290_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n43291_
+.subckt mux2_x1 cmd=$abc$109383$new_n14954_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[0] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[0] q=$abc$109383$new_n43292_
 .subckt nand3_x0 i0=$abc$109383$new_n43292_ i1=$abc$109383$new_n27640_ i2=$abc$109383$new_n27639_ nq=$abc$109383$new_n43293_
 .subckt inv_x0 i=soc.gpio.bridge.csr_bridge_0.wb__dat_r[0] nq=$abc$109383$new_n43294_
 .subckt nor2_x0 i0=$abc$109383$new_n27565_ i1=$abc$109383$new_n43294_ nq=$abc$109383$new_n43295_
@@ -28574,26 +28574,26 @@
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[0] nq=$abc$109383$new_n43300_
 .subckt nand3_x0 i0=$abc$109383$new_n27466_ i1=$abc$109383$new_n19691_ i2=soc.bridge.csr_bridge_1.wb__dat_r[0] nq=$abc$109383$new_n43301_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[0] nq=$abc$109383$new_n43302_
-.subckt o2_x2 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n43302_ q=$abc$109383$new_n43303_
-.subckt a2_x2 i0=$abc$109383$new_n43303_ i1=$abc$109383$new_n43301_ q=$abc$109383$new_n43304_
+.subckt or2_x1 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n43302_ q=$abc$109383$new_n43303_
+.subckt and2_x1 i0=$abc$109383$new_n43303_ i1=$abc$109383$new_n43301_ q=$abc$109383$new_n43304_
 .subckt buf_x4 i=$abc$109383$new_n21997_ q=$abc$109383$new_n43305_
-.subckt o3_x2 i0=$abc$109383$new_n22000_ i1=$abc$109383$new_n43305_ i2=$abc$109383$new_n21995_ q=$abc$109383$new_n43306_
-.subckt ao22_x2 i0=$abc$109383$new_n43306_ i1=$abc$109383$new_n43304_ i2=$abc$109383$new_n43300_ q=$abc$109383$new_n43307_
+.subckt or3_x1 i0=$abc$109383$new_n22000_ i1=$abc$109383$new_n43305_ i2=$abc$109383$new_n21995_ q=$abc$109383$new_n43306_
+.subckt and21nor_x1 i0=$abc$109383$new_n43306_ i1=$abc$109383$new_n43304_ i2=$abc$109383$new_n43300_ nq=$abc$109383$new_n43307_
 .subckt inv_x0 i=soc.hyperram.sr[0] nq=$abc$109383$new_n43308_
-.subckt a2_x2 i0=$abc$109383$new_n28954_ i1=$abc$109383$new_n28953_ q=$abc$109383$new_n43309_
+.subckt and2_x1 i0=$abc$109383$new_n28954_ i1=$abc$109383$new_n28953_ q=$abc$109383$new_n43309_
 .subckt buf_x4 i=$abc$109383$new_n43309_ q=$abc$109383$new_n43310_
 .subckt buf_x4 i=$abc$109383$new_n43310_ q=$abc$109383$new_n43311_
 .subckt buf_x4 i=$abc$109383$new_n21997_ q=$abc$109383$new_n43312_
 .subckt nand2_x0 i0=$abc$109383$new_n28803_ i1=$abc$109383$new_n14897_ nq=$abc$109383$new_n43313_
 .subckt buf_x4 i=$abc$109383$new_n43313_ q=$abc$109383$new_n43314_
 .subckt buf_x4 i=$abc$109383$new_n43314_ q=$abc$109383$new_n43315_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n43308_ q=$abc$109383$new_n43316_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n43308_ q=$abc$109383$new_n43316_
 .subckt nand2_x0 i0=$abc$109383$new_n28184_ i1=$abc$109383$new_n27494_ nq=$abc$109383$new_n43317_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[0] nq=$abc$109383$new_n43318_
-.subckt ao22_x2 i0=$abc$109383$new_n43318_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n43316_ q=$abc$109383$new_n43319_
+.subckt and21nor_x1 i0=$abc$109383$new_n43318_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n43316_ nq=$abc$109383$new_n43319_
 .subckt nand4_x0 i0=$abc$109383$new_n43319_ i1=$abc$109383$new_n43307_ i2=$abc$109383$new_n43296_ i3=$abc$109383$new_n43293_ nq=$abc$109383$new_n43320_
-.subckt a4_x2 i0=$abc$109383$new_n27461_ i1=$abc$109383$new_n27460_ i2=$abc$109383$new_n19678_ i3=$abc$109383$new_n19661_ q=$abc$109383$new_n43321_
-.subckt a2_x2 i0=$abc$109383$new_n43321_ i1=$abc$109383$new_n19667_ q=$abc$109383$new_n43322_
+.subckt and4_x1 i0=$abc$109383$new_n27461_ i1=$abc$109383$new_n27460_ i2=$abc$109383$new_n19678_ i3=$abc$109383$new_n19661_ q=$abc$109383$new_n43321_
+.subckt and2_x1 i0=$abc$109383$new_n43321_ i1=$abc$109383$new_n19667_ q=$abc$109383$new_n43322_
 .subckt buf_x4 i=$abc$109383$new_n43322_ q=$abc$109383$new_n43323_
 .subckt inv_x1 i=$\soc.ram.ram$rdreg[0]$q[4] nq=$abc$109383$new_n43324_
 .subckt buf_x4 i=$abc$109383$new_n43324_ q=$abc$109383$new_n43325_
@@ -28610,7 +28610,7 @@
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[2] q=$abc$109383$new_n43336_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43337_
 .subckt buf_x4 i=$abc$109383$new_n43337_ q=$abc$109383$new_n43338_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[56][0] i1=soc.ram.ram[60][0] q=$abc$109383$new_n43339_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[56][0] i1=soc.ram.ram[60][0] q=$abc$109383$new_n43339_
 .subckt nand2_x0 i0=$abc$109383$new_n43339_ i1=$abc$109383$new_n43335_ nq=$abc$109383$new_n43340_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43341_
 .subckt buf_x4 i=$abc$109383$new_n43341_ q=$abc$109383$new_n43342_
@@ -28620,8 +28620,8 @@
 .subckt buf_x4 i=$abc$109383$new_n43345_ q=$abc$109383$new_n43346_
 .subckt buf_x4 i=$abc$109383$new_n43346_ q=$abc$109383$new_n43347_
 .subckt inv_x0 i=soc.ram.ram[61][0] nq=$abc$109383$new_n43348_
-.subckt oa22_x2 i0=$abc$109383$new_n43348_ i1=$abc$109383$new_n43347_ i2=$abc$109383$new_n43334_ q=$abc$109383$new_n43349_
-.subckt ao22_x2 i0=$abc$109383$new_n43349_ i1=$abc$109383$new_n43344_ i2=$abc$109383$new_n43340_ q=$abc$109383$new_n43350_
+.subckt or21nand_x1 i0=$abc$109383$new_n43348_ i1=$abc$109383$new_n43347_ i2=$abc$109383$new_n43334_ nq=$abc$109383$new_n43349_
+.subckt and21nor_x1 i0=$abc$109383$new_n43349_ i1=$abc$109383$new_n43344_ i2=$abc$109383$new_n43340_ nq=$abc$109383$new_n43350_
 .subckt nand2_x0 i0=$abc$109383$new_n43350_ i1=$abc$109383$new_n43331_ nq=$abc$109383$new_n43351_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[3] q=$abc$109383$new_n43352_
 .subckt buf_x4 i=$abc$109383$new_n43352_ q=$abc$109383$new_n43353_
@@ -28629,37 +28629,37 @@
 .subckt buf_x4 i=$abc$109383$new_n43332_ q=$abc$109383$new_n43355_
 .subckt buf_x4 i=$abc$109383$new_n43355_ q=$abc$109383$new_n43356_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43357_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[58][0] i1=soc.ram.ram[62][0] q=$abc$109383$new_n43358_
-.subckt a2_x2 i0=$abc$109383$new_n43358_ i1=$abc$109383$new_n43356_ q=$abc$109383$new_n43359_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[58][0] i1=soc.ram.ram[62][0] q=$abc$109383$new_n43358_
+.subckt and2_x1 i0=$abc$109383$new_n43358_ i1=$abc$109383$new_n43356_ q=$abc$109383$new_n43359_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[0] q=$abc$109383$new_n43360_
 .subckt buf_x4 i=$abc$109383$new_n43360_ q=$abc$109383$new_n43361_
 .subckt buf_x4 i=$abc$109383$new_n43361_ q=$abc$109383$new_n43362_
 .subckt inv_x1 i=$\soc.ram.ram$rdreg[0]$q[2] nq=$abc$109383$new_n43363_
 .subckt buf_x4 i=$abc$109383$new_n43363_ q=$abc$109383$new_n43364_
 .subckt buf_x4 i=$abc$109383$new_n43364_ q=$abc$109383$new_n43365_
-.subckt ao22_x2 i0=soc.ram.ram[63][0] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n43362_ q=$abc$109383$new_n43366_
+.subckt and21nor_x1 i0=soc.ram.ram[63][0] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n43362_ nq=$abc$109383$new_n43366_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43367_
 .subckt buf_x4 i=$abc$109383$new_n43367_ q=$abc$109383$new_n43368_
-.subckt o2_x2 i0=soc.ram.ram[59][0] i1=$abc$109383$new_n43368_ q=$abc$109383$new_n43369_
-.subckt oa22_x2 i0=$abc$109383$new_n43369_ i1=$abc$109383$new_n43366_ i2=$abc$109383$new_n43359_ q=$abc$109383$new_n43370_
+.subckt or2_x1 i0=soc.ram.ram[59][0] i1=$abc$109383$new_n43368_ q=$abc$109383$new_n43369_
+.subckt or21nand_x1 i0=$abc$109383$new_n43369_ i1=$abc$109383$new_n43366_ i2=$abc$109383$new_n43359_ nq=$abc$109383$new_n43370_
 .subckt buf_x4 i=$abc$109383$new_n43328_ q=$abc$109383$new_n43371_
 .subckt buf_x4 i=$abc$109383$new_n43371_ q=$abc$109383$new_n43372_
-.subckt ao22_x2 i0=$abc$109383$new_n43372_ i1=$abc$109383$new_n43370_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n43373_
-.subckt a2_x2 i0=$abc$109383$new_n43373_ i1=$abc$109383$new_n43351_ q=$abc$109383$new_n43374_
+.subckt and21nor_x1 i0=$abc$109383$new_n43372_ i1=$abc$109383$new_n43370_ i2=$abc$109383$new_n43354_ nq=$abc$109383$new_n43373_
+.subckt and2_x1 i0=$abc$109383$new_n43373_ i1=$abc$109383$new_n43351_ q=$abc$109383$new_n43374_
 .subckt buf_x4 i=$abc$109383$new_n43371_ q=$abc$109383$new_n43375_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[0] q=$abc$109383$new_n43376_
 .subckt buf_x4 i=$abc$109383$new_n43376_ q=$abc$109383$new_n43377_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[2] q=$abc$109383$new_n43378_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43379_
 .subckt buf_x4 i=$abc$109383$new_n43379_ q=$abc$109383$new_n43380_
-.subckt ao22_x2 i0=soc.ram.ram[51][0] i1=$abc$109383$new_n43380_ i2=$abc$109383$new_n43377_ q=$abc$109383$new_n43381_
+.subckt and21nor_x1 i0=soc.ram.ram[51][0] i1=$abc$109383$new_n43380_ i2=$abc$109383$new_n43377_ nq=$abc$109383$new_n43381_
 .subckt buf_x4 i=$abc$109383$new_n43364_ q=$abc$109383$new_n43382_
-.subckt ao22_x2 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[55][0] i2=$abc$109383$new_n43381_ q=$abc$109383$new_n43383_
+.subckt and21nor_x1 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[55][0] i2=$abc$109383$new_n43381_ nq=$abc$109383$new_n43383_
 .subckt buf_x4 i=$abc$109383$new_n43333_ q=$abc$109383$new_n43384_
 .subckt buf_x4 i=$abc$109383$new_n43345_ q=$abc$109383$new_n43385_
-.subckt mx2_x2 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[50][0] i1=soc.ram.ram[54][0] q=$abc$109383$new_n43386_
-.subckt a2_x2 i0=$abc$109383$new_n43386_ i1=$abc$109383$new_n43384_ q=$abc$109383$new_n43387_
-.subckt o3_x2 i0=$abc$109383$new_n43387_ i1=$abc$109383$new_n43383_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n43388_
+.subckt mux2_x1 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[50][0] i1=soc.ram.ram[54][0] q=$abc$109383$new_n43386_
+.subckt and2_x1 i0=$abc$109383$new_n43386_ i1=$abc$109383$new_n43384_ q=$abc$109383$new_n43387_
+.subckt or3_x1 i0=$abc$109383$new_n43387_ i1=$abc$109383$new_n43383_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n43388_
 .subckt inv_x0 i=$\soc.ram.ram$rdreg[0]$q[3] nq=$abc$109383$new_n43389_
 .subckt buf_x4 i=$abc$109383$new_n43389_ q=$abc$109383$new_n43390_
 .subckt buf_x4 i=$abc$109383$new_n43390_ q=$abc$109383$new_n43391_
@@ -28668,17 +28668,17 @@
 .subckt buf_x4 i=$abc$109383$new_n43393_ q=$abc$109383$new_n43394_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43395_
 .subckt buf_x4 i=$abc$109383$new_n43395_ q=$abc$109383$new_n43396_
-.subckt ao22_x2 i0=soc.ram.ram[49][0] i1=$abc$109383$new_n43396_ i2=$abc$109383$new_n43394_ q=$abc$109383$new_n43397_
+.subckt and21nor_x1 i0=soc.ram.ram[49][0] i1=$abc$109383$new_n43396_ i2=$abc$109383$new_n43394_ nq=$abc$109383$new_n43397_
 .subckt buf_x4 i=$abc$109383$new_n43363_ q=$abc$109383$new_n43398_
 .subckt buf_x4 i=$abc$109383$new_n43398_ q=$abc$109383$new_n43399_
-.subckt ao22_x2 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[53][0] i2=$abc$109383$new_n43397_ q=$abc$109383$new_n43400_
+.subckt and21nor_x1 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[53][0] i2=$abc$109383$new_n43397_ nq=$abc$109383$new_n43400_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[1] q=$abc$109383$new_n43401_
 .subckt buf_x4 i=$abc$109383$new_n43401_ q=$abc$109383$new_n43402_
 .subckt buf_x4 i=$abc$109383$new_n43345_ q=$abc$109383$new_n43403_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[48][0] i1=soc.ram.ram[52][0] q=$abc$109383$new_n43404_
-.subckt oa22_x2 i0=$abc$109383$new_n43384_ i1=$abc$109383$new_n43404_ i2=$abc$109383$new_n43402_ q=$abc$109383$new_n43405_
-.subckt ao22_x2 i0=$abc$109383$new_n43405_ i1=$abc$109383$new_n43400_ i2=$abc$109383$new_n43392_ q=$abc$109383$new_n43406_
-.subckt a2_x2 i0=$abc$109383$new_n43406_ i1=$abc$109383$new_n43388_ q=$abc$109383$new_n43407_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[48][0] i1=soc.ram.ram[52][0] q=$abc$109383$new_n43404_
+.subckt or21nand_x1 i0=$abc$109383$new_n43384_ i1=$abc$109383$new_n43404_ i2=$abc$109383$new_n43402_ nq=$abc$109383$new_n43405_
+.subckt and21nor_x1 i0=$abc$109383$new_n43405_ i1=$abc$109383$new_n43400_ i2=$abc$109383$new_n43392_ nq=$abc$109383$new_n43406_
+.subckt and2_x1 i0=$abc$109383$new_n43406_ i1=$abc$109383$new_n43388_ q=$abc$109383$new_n43407_
 .subckt nor3_x0 i0=$abc$109383$new_n43407_ i1=$abc$109383$new_n43374_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n43408_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n43409_
 .subckt buf_x4 i=$abc$109383$new_n43409_ q=$abc$109383$new_n43410_
@@ -28691,46 +28691,46 @@
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[2] q=$abc$109383$new_n43417_
 .subckt buf_x4 i=$abc$109383$new_n43417_ q=$abc$109383$new_n43418_
 .subckt buf_x4 i=$abc$109383$new_n43418_ q=$abc$109383$new_n43419_
-.subckt mx2_x2 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[35][0] i1=soc.ram.ram[39][0] q=$abc$109383$new_n43420_
-.subckt a2_x2 i0=$abc$109383$new_n43420_ i1=$abc$109383$new_n43416_ q=$abc$109383$new_n43421_
+.subckt mux2_x1 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[35][0] i1=soc.ram.ram[39][0] q=$abc$109383$new_n43420_
+.subckt and2_x1 i0=$abc$109383$new_n43420_ i1=$abc$109383$new_n43416_ q=$abc$109383$new_n43421_
 .subckt buf_x4 i=$abc$109383$new_n43328_ q=$abc$109383$new_n43422_
 .subckt buf_x4 i=$abc$109383$new_n43422_ q=$abc$109383$new_n43423_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43424_
 .subckt buf_x4 i=$abc$109383$new_n43424_ q=$abc$109383$new_n43425_
-.subckt mx2_x2 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[34][0] i1=soc.ram.ram[38][0] q=$abc$109383$new_n43426_
+.subckt mux2_x1 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[34][0] i1=soc.ram.ram[38][0] q=$abc$109383$new_n43426_
 .subckt buf_x4 i=$abc$109383$new_n43332_ q=$abc$109383$new_n43427_
 .subckt buf_x4 i=$abc$109383$new_n43427_ q=$abc$109383$new_n43428_
-.subckt oa22_x2 i0=$abc$109383$new_n43428_ i1=$abc$109383$new_n43426_ i2=$abc$109383$new_n43423_ q=$abc$109383$new_n43429_
-.subckt o2_x2 i0=$abc$109383$new_n43429_ i1=$abc$109383$new_n43421_ q=$abc$109383$new_n43430_
+.subckt or21nand_x1 i0=$abc$109383$new_n43428_ i1=$abc$109383$new_n43426_ i2=$abc$109383$new_n43423_ nq=$abc$109383$new_n43429_
+.subckt or2_x1 i0=$abc$109383$new_n43429_ i1=$abc$109383$new_n43421_ q=$abc$109383$new_n43430_
 .subckt buf_x4 i=$abc$109383$new_n43389_ q=$abc$109383$new_n43431_
 .subckt buf_x4 i=$abc$109383$new_n43431_ q=$abc$109383$new_n43432_
 .subckt buf_x4 i=$abc$109383$new_n43432_ q=$abc$109383$new_n43433_
 .subckt buf_x4 i=$abc$109383$new_n43355_ q=$abc$109383$new_n43434_
 .subckt buf_x4 i=$abc$109383$new_n43434_ q=$abc$109383$new_n43435_
-.subckt mx2_x2 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[32][0] i1=soc.ram.ram[36][0] q=$abc$109383$new_n43436_
-.subckt a2_x2 i0=$abc$109383$new_n43436_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n43437_
+.subckt mux2_x1 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[32][0] i1=soc.ram.ram[36][0] q=$abc$109383$new_n43436_
+.subckt and2_x1 i0=$abc$109383$new_n43436_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n43437_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[1] q=$abc$109383$new_n43438_
 .subckt buf_x4 i=$abc$109383$new_n43438_ q=$abc$109383$new_n43439_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43440_
 .subckt buf_x4 i=$abc$109383$new_n43440_ q=$abc$109383$new_n43441_
-.subckt mx2_x2 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[33][0] i1=soc.ram.ram[37][0] q=$abc$109383$new_n43442_
+.subckt mux2_x1 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[33][0] i1=soc.ram.ram[37][0] q=$abc$109383$new_n43442_
 .subckt buf_x4 i=$abc$109383$new_n43376_ q=$abc$109383$new_n43443_
 .subckt buf_x4 i=$abc$109383$new_n43443_ q=$abc$109383$new_n43444_
-.subckt oa22_x2 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n43442_ i2=$abc$109383$new_n43439_ q=$abc$109383$new_n43445_
-.subckt ao22_x2 i0=$abc$109383$new_n43445_ i1=$abc$109383$new_n43437_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n43446_
+.subckt or21nand_x1 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n43442_ i2=$abc$109383$new_n43439_ nq=$abc$109383$new_n43445_
+.subckt and21nor_x1 i0=$abc$109383$new_n43445_ i1=$abc$109383$new_n43437_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n43446_
 .subckt nand2_x0 i0=$abc$109383$new_n43446_ i1=$abc$109383$new_n43430_ nq=$abc$109383$new_n43447_
 .subckt buf_x4 i=$abc$109383$new_n43422_ q=$abc$109383$new_n43448_
 .subckt buf_x4 i=$abc$109383$new_n43448_ q=$abc$109383$new_n43449_
-.subckt mx2_x2 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[42][0] i1=soc.ram.ram[46][0] q=$abc$109383$new_n43450_
-.subckt mx2_x2 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[43][0] i1=soc.ram.ram[47][0] q=$abc$109383$new_n43451_
-.subckt mx2_x2 cmd=$abc$109383$new_n43384_ i0=$abc$109383$new_n43451_ i1=$abc$109383$new_n43450_ q=$abc$109383$new_n43452_
-.subckt o2_x2 i0=$abc$109383$new_n43452_ i1=$abc$109383$new_n43449_ q=$abc$109383$new_n43453_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[40][0] i1=soc.ram.ram[44][0] q=$abc$109383$new_n43454_
-.subckt mx2_x2 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[41][0] i1=soc.ram.ram[45][0] q=$abc$109383$new_n43455_
+.subckt mux2_x1 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[42][0] i1=soc.ram.ram[46][0] q=$abc$109383$new_n43450_
+.subckt mux2_x1 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[43][0] i1=soc.ram.ram[47][0] q=$abc$109383$new_n43451_
+.subckt mux2_x1 cmd=$abc$109383$new_n43384_ i0=$abc$109383$new_n43451_ i1=$abc$109383$new_n43450_ q=$abc$109383$new_n43452_
+.subckt or2_x1 i0=$abc$109383$new_n43452_ i1=$abc$109383$new_n43449_ q=$abc$109383$new_n43453_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[40][0] i1=soc.ram.ram[44][0] q=$abc$109383$new_n43454_
+.subckt mux2_x1 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[41][0] i1=soc.ram.ram[45][0] q=$abc$109383$new_n43455_
 .subckt buf_x4 i=$abc$109383$new_n43333_ q=$abc$109383$new_n43456_
-.subckt mx2_x2 cmd=$abc$109383$new_n43456_ i0=$abc$109383$new_n43455_ i1=$abc$109383$new_n43454_ q=$abc$109383$new_n43457_
+.subckt mux2_x1 cmd=$abc$109383$new_n43456_ i0=$abc$109383$new_n43455_ i1=$abc$109383$new_n43454_ q=$abc$109383$new_n43457_
 .subckt buf_x4 i=$abc$109383$new_n43402_ q=$abc$109383$new_n43458_
-.subckt ao22_x2 i0=$abc$109383$new_n43458_ i1=$abc$109383$new_n43457_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n43459_
+.subckt and21nor_x1 i0=$abc$109383$new_n43458_ i1=$abc$109383$new_n43457_ i2=$abc$109383$new_n43354_ nq=$abc$109383$new_n43459_
 .subckt nand2_x0 i0=$abc$109383$new_n43459_ i1=$abc$109383$new_n43453_ nq=$abc$109383$new_n43460_
 .subckt nand3_x0 i0=$abc$109383$new_n43460_ i1=$abc$109383$new_n43447_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n43461_
 .subckt nand2_x0 i0=$abc$109383$new_n43461_ i1=$abc$109383$new_n43410_ nq=$abc$109383$new_n43462_
@@ -28756,32 +28756,32 @@
 .subckt buf_x4 i=$abc$109383$new_n43481_ q=$abc$109383$new_n43482_
 .subckt buf_x4 i=$abc$109383$new_n43440_ q=$abc$109383$new_n43483_
 .subckt buf_x4 i=$abc$109383$new_n43483_ q=$abc$109383$new_n43484_
-.subckt ao22_x2 i0=soc.ram.ram[17][0] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n43485_
+.subckt and21nor_x1 i0=soc.ram.ram[17][0] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n43485_
 .subckt nand2_x0 i0=$abc$109383$new_n43485_ i1=$abc$109383$new_n43479_ nq=$abc$109383$new_n43486_
 .subckt buf_x4 i=$abc$109383$new_n43332_ q=$abc$109383$new_n43487_
 .subckt buf_x4 i=$abc$109383$new_n43487_ q=$abc$109383$new_n43488_
 .subckt buf_x4 i=$abc$109383$new_n43488_ q=$abc$109383$new_n43489_
 .subckt buf_x4 i=$abc$109383$new_n43385_ q=$abc$109383$new_n43490_
-.subckt mx2_x2 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[16][0] i1=soc.ram.ram[20][0] q=$abc$109383$new_n43491_
+.subckt mux2_x1 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[16][0] i1=soc.ram.ram[20][0] q=$abc$109383$new_n43491_
 .subckt nand2_x0 i0=$abc$109383$new_n43491_ i1=$abc$109383$new_n43489_ nq=$abc$109383$new_n43492_
 .subckt nand3_x0 i0=$abc$109383$new_n43492_ i1=$abc$109383$new_n43486_ i2=$abc$109383$new_n43473_ nq=$abc$109383$new_n43493_
 .subckt buf_x4 i=$abc$109383$new_n43333_ q=$abc$109383$new_n43494_
 .subckt buf_x4 i=$abc$109383$new_n43474_ q=$abc$109383$new_n43495_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[18][0] i1=soc.ram.ram[22][0] q=$abc$109383$new_n43496_
-.subckt a2_x2 i0=$abc$109383$new_n43496_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n43497_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[18][0] i1=soc.ram.ram[22][0] q=$abc$109383$new_n43496_
+.subckt and2_x1 i0=$abc$109383$new_n43496_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n43497_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[0] q=$abc$109383$new_n43498_
 .subckt buf_x4 i=$abc$109383$new_n43498_ q=$abc$109383$new_n43499_
-.subckt ao22_x2 i0=soc.ram.ram[19][0] i1=$abc$109383$new_n43403_ i2=$abc$109383$new_n43499_ q=$abc$109383$new_n43500_
+.subckt and21nor_x1 i0=soc.ram.ram[19][0] i1=$abc$109383$new_n43403_ i2=$abc$109383$new_n43499_ nq=$abc$109383$new_n43500_
 .subckt buf_x4 i=$abc$109383$new_n43363_ q=$abc$109383$new_n43501_
 .subckt buf_x4 i=$abc$109383$new_n43501_ q=$abc$109383$new_n43502_
-.subckt ao22_x2 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[23][0] i2=$abc$109383$new_n43500_ q=$abc$109383$new_n43503_
-.subckt o3_x2 i0=$abc$109383$new_n43503_ i1=$abc$109383$new_n43497_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n43504_
+.subckt and21nor_x1 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[23][0] i2=$abc$109383$new_n43500_ nq=$abc$109383$new_n43503_
+.subckt or3_x1 i0=$abc$109383$new_n43503_ i1=$abc$109383$new_n43497_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n43504_
 .subckt nand3_x0 i0=$abc$109383$new_n43504_ i1=$abc$109383$new_n43493_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n43505_
 .subckt buf_x4 i=$abc$109383$new_n43438_ q=$abc$109383$new_n43506_
 .subckt buf_x4 i=$abc$109383$new_n43506_ q=$abc$109383$new_n43507_
 .subckt buf_x4 i=$abc$109383$new_n43488_ q=$abc$109383$new_n43508_
 .subckt buf_x4 i=$abc$109383$new_n43346_ q=$abc$109383$new_n43509_
-.subckt mx2_x2 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[26][0] i1=soc.ram.ram[30][0] q=$abc$109383$new_n43510_
+.subckt mux2_x1 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[26][0] i1=soc.ram.ram[30][0] q=$abc$109383$new_n43510_
 .subckt nand2_x0 i0=$abc$109383$new_n43510_ i1=$abc$109383$new_n43508_ nq=$abc$109383$new_n43511_
 .subckt buf_x4 i=$abc$109383$new_n43417_ q=$abc$109383$new_n43512_
 .subckt buf_x4 i=$abc$109383$new_n43512_ q=$abc$109383$new_n43513_
@@ -28792,24 +28792,24 @@
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43518_
 .subckt buf_x4 i=$abc$109383$new_n43518_ q=$abc$109383$new_n43519_
 .subckt buf_x4 i=$abc$109383$new_n43519_ q=$abc$109383$new_n43520_
-.subckt ao22_x2 i0=soc.ram.ram[27][0] i1=$abc$109383$new_n43520_ i2=$abc$109383$new_n43517_ q=$abc$109383$new_n43521_
+.subckt and21nor_x1 i0=soc.ram.ram[27][0] i1=$abc$109383$new_n43520_ i2=$abc$109383$new_n43517_ nq=$abc$109383$new_n43521_
 .subckt nand2_x0 i0=$abc$109383$new_n43521_ i1=$abc$109383$new_n43516_ nq=$abc$109383$new_n43522_
 .subckt nand3_x0 i0=$abc$109383$new_n43522_ i1=$abc$109383$new_n43511_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n43523_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[3] q=$abc$109383$new_n43524_
 .subckt buf_x4 i=$abc$109383$new_n43524_ q=$abc$109383$new_n43525_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43526_
 .subckt buf_x4 i=$abc$109383$new_n43526_ q=$abc$109383$new_n43527_
-.subckt ao22_x2 i0=soc.ram.ram[25][0] i1=$abc$109383$new_n43527_ i2=$abc$109383$new_n43481_ q=$abc$109383$new_n43528_
+.subckt and21nor_x1 i0=soc.ram.ram[25][0] i1=$abc$109383$new_n43527_ i2=$abc$109383$new_n43481_ nq=$abc$109383$new_n43528_
 .subckt buf_x4 i=$abc$109383$new_n43363_ q=$abc$109383$new_n43529_
 .subckt buf_x4 i=$abc$109383$new_n43529_ q=$abc$109383$new_n43530_
-.subckt ao22_x2 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[29][0] i2=$abc$109383$new_n43528_ q=$abc$109383$new_n43531_
+.subckt and21nor_x1 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[29][0] i2=$abc$109383$new_n43528_ nq=$abc$109383$new_n43531_
 .subckt buf_x4 i=$abc$109383$new_n43401_ q=$abc$109383$new_n43532_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43533_
-.subckt mx2_x2 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[24][0] i1=soc.ram.ram[28][0] q=$abc$109383$new_n43534_
-.subckt oa22_x2 i0=$abc$109383$new_n43356_ i1=$abc$109383$new_n43534_ i2=$abc$109383$new_n43532_ q=$abc$109383$new_n43535_
-.subckt ao22_x2 i0=$abc$109383$new_n43535_ i1=$abc$109383$new_n43531_ i2=$abc$109383$new_n43525_ q=$abc$109383$new_n43536_
+.subckt mux2_x1 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[24][0] i1=soc.ram.ram[28][0] q=$abc$109383$new_n43534_
+.subckt or21nand_x1 i0=$abc$109383$new_n43356_ i1=$abc$109383$new_n43534_ i2=$abc$109383$new_n43532_ nq=$abc$109383$new_n43535_
+.subckt and21nor_x1 i0=$abc$109383$new_n43535_ i1=$abc$109383$new_n43531_ i2=$abc$109383$new_n43525_ nq=$abc$109383$new_n43536_
 .subckt nand2_x0 i0=$abc$109383$new_n43536_ i1=$abc$109383$new_n43523_ nq=$abc$109383$new_n43537_
-.subckt a3_x2 i0=$abc$109383$new_n43537_ i1=$abc$109383$new_n43505_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n43538_
+.subckt and3_x1 i0=$abc$109383$new_n43537_ i1=$abc$109383$new_n43505_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n43538_
 .subckt buf_x4 i=$abc$109383$new_n43466_ q=$abc$109383$new_n43539_
 .subckt buf_x4 i=$abc$109383$new_n43539_ q=$abc$109383$new_n43540_
 .subckt buf_x4 i=$abc$109383$new_n43540_ q=$abc$109383$new_n43541_
@@ -28818,48 +28818,48 @@
 .subckt buf_x4 i=$abc$109383$new_n43543_ q=$abc$109383$new_n43544_
 .subckt buf_x4 i=$abc$109383$new_n43360_ q=$abc$109383$new_n43545_
 .subckt buf_x4 i=$abc$109383$new_n43545_ q=$abc$109383$new_n43546_
-.subckt ao22_x2 i0=$abc$109383$new_n43441_ i1=soc.ram.ram[3][0] i2=$abc$109383$new_n43546_ q=$abc$109383$new_n43547_
-.subckt ao22_x2 i0=soc.ram.ram[7][0] i1=$abc$109383$new_n43399_ i2=$abc$109383$new_n43547_ q=$abc$109383$new_n43548_
+.subckt and21nor_x1 i0=$abc$109383$new_n43441_ i1=soc.ram.ram[3][0] i2=$abc$109383$new_n43546_ nq=$abc$109383$new_n43547_
+.subckt and21nor_x1 i0=soc.ram.ram[7][0] i1=$abc$109383$new_n43399_ i2=$abc$109383$new_n43547_ nq=$abc$109383$new_n43548_
 .subckt buf_x4 i=$abc$109383$new_n43487_ q=$abc$109383$new_n43549_
 .subckt buf_x4 i=$abc$109383$new_n43474_ q=$abc$109383$new_n43550_
-.subckt mx2_x2 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[2][0] i1=soc.ram.ram[6][0] q=$abc$109383$new_n43551_
-.subckt a2_x2 i0=$abc$109383$new_n43551_ i1=$abc$109383$new_n43549_ q=$abc$109383$new_n43552_
-.subckt o3_x2 i0=$abc$109383$new_n43552_ i1=$abc$109383$new_n43548_ i2=$abc$109383$new_n43544_ q=$abc$109383$new_n43553_
+.subckt mux2_x1 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[2][0] i1=soc.ram.ram[6][0] q=$abc$109383$new_n43551_
+.subckt and2_x1 i0=$abc$109383$new_n43551_ i1=$abc$109383$new_n43549_ q=$abc$109383$new_n43552_
+.subckt or3_x1 i0=$abc$109383$new_n43552_ i1=$abc$109383$new_n43548_ i2=$abc$109383$new_n43544_ q=$abc$109383$new_n43553_
 .subckt buf_x4 i=$abc$109383$new_n43431_ q=$abc$109383$new_n43554_
 .subckt buf_x4 i=$abc$109383$new_n43554_ q=$abc$109383$new_n43555_
 .subckt buf_x4 i=$abc$109383$new_n43360_ q=$abc$109383$new_n43556_
 .subckt buf_x4 i=$abc$109383$new_n43556_ q=$abc$109383$new_n43557_
 .subckt buf_x4 i=$abc$109383$new_n43367_ q=$abc$109383$new_n43558_
-.subckt ao22_x2 i0=soc.ram.ram[1][0] i1=$abc$109383$new_n43558_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n43559_
+.subckt and21nor_x1 i0=soc.ram.ram[1][0] i1=$abc$109383$new_n43558_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n43559_
 .subckt buf_x4 i=$abc$109383$new_n43501_ q=$abc$109383$new_n43560_
 .subckt buf_x4 i=$abc$109383$new_n43560_ q=$abc$109383$new_n43561_
-.subckt ao22_x2 i0=soc.ram.ram[5][0] i1=$abc$109383$new_n43561_ i2=$abc$109383$new_n43559_ q=$abc$109383$new_n43562_
+.subckt and21nor_x1 i0=soc.ram.ram[5][0] i1=$abc$109383$new_n43561_ i2=$abc$109383$new_n43559_ nq=$abc$109383$new_n43562_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[1] q=$abc$109383$new_n43563_
 .subckt buf_x4 i=$abc$109383$new_n43563_ q=$abc$109383$new_n43564_
-.subckt mx2_x2 cmd=$abc$109383$new_n43519_ i0=soc.ram.ram[0][0] i1=soc.ram.ram[4][0] q=$abc$109383$new_n43565_
-.subckt oa22_x2 i0=$abc$109383$new_n43549_ i1=$abc$109383$new_n43565_ i2=$abc$109383$new_n43564_ q=$abc$109383$new_n43566_
-.subckt ao22_x2 i0=$abc$109383$new_n43566_ i1=$abc$109383$new_n43562_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n43567_
-.subckt a2_x2 i0=$abc$109383$new_n43567_ i1=$abc$109383$new_n43553_ q=$abc$109383$new_n43568_
+.subckt mux2_x1 cmd=$abc$109383$new_n43519_ i0=soc.ram.ram[0][0] i1=soc.ram.ram[4][0] q=$abc$109383$new_n43565_
+.subckt or21nand_x1 i0=$abc$109383$new_n43549_ i1=$abc$109383$new_n43565_ i2=$abc$109383$new_n43564_ nq=$abc$109383$new_n43566_
+.subckt and21nor_x1 i0=$abc$109383$new_n43566_ i1=$abc$109383$new_n43562_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n43567_
+.subckt and2_x1 i0=$abc$109383$new_n43567_ i1=$abc$109383$new_n43553_ q=$abc$109383$new_n43568_
 .subckt buf_x4 i=$abc$109383$new_n43524_ q=$abc$109383$new_n43569_
 .subckt buf_x4 i=$abc$109383$new_n43569_ q=$abc$109383$new_n43570_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[14][0] i1=soc.ram.ram[15][0] q=$abc$109383$new_n43571_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[10][0] i1=soc.ram.ram[11][0] q=$abc$109383$new_n43572_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[14][0] i1=soc.ram.ram[15][0] q=$abc$109383$new_n43571_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[10][0] i1=soc.ram.ram[11][0] q=$abc$109383$new_n43572_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43573_
 .subckt buf_x4 i=$abc$109383$new_n43573_ q=$abc$109383$new_n43574_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=$abc$109383$new_n43572_ i1=$abc$109383$new_n43571_ q=$abc$109383$new_n43575_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[12][0] i1=soc.ram.ram[13][0] q=$abc$109383$new_n43576_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[8][0] i1=soc.ram.ram[9][0] q=$abc$109383$new_n43577_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=$abc$109383$new_n43577_ i1=$abc$109383$new_n43576_ q=$abc$109383$new_n43578_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=$abc$109383$new_n43572_ i1=$abc$109383$new_n43571_ q=$abc$109383$new_n43575_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[12][0] i1=soc.ram.ram[13][0] q=$abc$109383$new_n43576_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[8][0] i1=soc.ram.ram[9][0] q=$abc$109383$new_n43577_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=$abc$109383$new_n43577_ i1=$abc$109383$new_n43576_ q=$abc$109383$new_n43578_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[1] q=$abc$109383$new_n43579_
 .subckt buf_x4 i=$abc$109383$new_n43579_ q=$abc$109383$new_n43580_
-.subckt mx2_x2 cmd=$abc$109383$new_n43580_ i0=$abc$109383$new_n43578_ i1=$abc$109383$new_n43575_ q=$abc$109383$new_n43581_
-.subckt a2_x2 i0=$abc$109383$new_n43581_ i1=$abc$109383$new_n43570_ q=$abc$109383$new_n43582_
+.subckt mux2_x1 cmd=$abc$109383$new_n43580_ i0=$abc$109383$new_n43578_ i1=$abc$109383$new_n43575_ q=$abc$109383$new_n43581_
+.subckt and2_x1 i0=$abc$109383$new_n43581_ i1=$abc$109383$new_n43570_ q=$abc$109383$new_n43582_
 .subckt nor3_x0 i0=$abc$109383$new_n43582_ i1=$abc$109383$new_n43568_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n43583_
 .subckt nor3_x0 i0=$abc$109383$new_n43583_ i1=$abc$109383$new_n43538_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n43584_
-.subckt o2_x2 i0=$abc$109383$new_n43584_ i1=$abc$109383$new_n43463_ q=$abc$109383$new_n43585_
+.subckt or2_x1 i0=$abc$109383$new_n43584_ i1=$abc$109383$new_n43463_ q=$abc$109383$new_n43585_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n43586_
 .subckt buf_x4 i=$abc$109383$new_n43586_ q=$abc$109383$new_n43587_
-.subckt ao22_x2 i0=$abc$109383$new_n43587_ i1=$abc$109383$new_n43585_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n43588_
+.subckt and21nor_x1 i0=$abc$109383$new_n43587_ i1=$abc$109383$new_n43585_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n43588_
 .subckt inv_x0 i=$\soc.ram.ram$rdreg[0]$q[6] nq=$abc$109383$new_n43589_
 .subckt buf_x4 i=$abc$109383$new_n43589_ q=$abc$109383$new_n43590_
 .subckt buf_x4 i=$abc$109383$new_n43590_ q=$abc$109383$new_n43591_
@@ -28867,7 +28867,7 @@
 .subckt buf_x4 i=$abc$109383$new_n43467_ q=$abc$109383$new_n43593_
 .subckt buf_x4 i=$abc$109383$new_n43333_ q=$abc$109383$new_n43594_
 .subckt buf_x4 i=$abc$109383$new_n43594_ q=$abc$109383$new_n43595_
-.subckt mx2_x2 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[90][0] i1=soc.ram.ram[94][0] q=$abc$109383$new_n43596_
+.subckt mux2_x1 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[90][0] i1=soc.ram.ram[94][0] q=$abc$109383$new_n43596_
 .subckt nand2_x0 i0=$abc$109383$new_n43596_ i1=$abc$109383$new_n43595_ nq=$abc$109383$new_n43597_
 .subckt buf_x4 i=$abc$109383$new_n43518_ q=$abc$109383$new_n43598_
 .subckt buf_x4 i=$abc$109383$new_n43598_ q=$abc$109383$new_n43599_
@@ -28875,9 +28875,9 @@
 .subckt buf_x4 i=$abc$109383$new_n43332_ q=$abc$109383$new_n43601_
 .subckt buf_x4 i=$abc$109383$new_n43424_ q=$abc$109383$new_n43602_
 .subckt inv_x0 i=soc.ram.ram[95][0] nq=$abc$109383$new_n43603_
-.subckt oa22_x2 i0=$abc$109383$new_n43603_ i1=$abc$109383$new_n43602_ i2=$abc$109383$new_n43601_ q=$abc$109383$new_n43604_
-.subckt ao22_x2 i0=$abc$109383$new_n43604_ i1=$abc$109383$new_n43600_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n43605_
-.subckt a2_x2 i0=$abc$109383$new_n43605_ i1=$abc$109383$new_n43597_ q=$abc$109383$new_n43606_
+.subckt or21nand_x1 i0=$abc$109383$new_n43603_ i1=$abc$109383$new_n43602_ i2=$abc$109383$new_n43601_ nq=$abc$109383$new_n43604_
+.subckt and21nor_x1 i0=$abc$109383$new_n43604_ i1=$abc$109383$new_n43600_ i2=$abc$109383$new_n43506_ nq=$abc$109383$new_n43605_
+.subckt and2_x1 i0=$abc$109383$new_n43605_ i1=$abc$109383$new_n43597_ q=$abc$109383$new_n43606_
 .subckt buf_x4 i=$abc$109383$new_n43573_ q=$abc$109383$new_n43607_
 .subckt buf_x4 i=$abc$109383$new_n43607_ q=$abc$109383$new_n43608_
 .subckt inv_x0 i=soc.ram.ram[93][0] nq=$abc$109383$new_n43609_
@@ -28885,75 +28885,75 @@
 .subckt buf_x4 i=$abc$109383$new_n43414_ q=$abc$109383$new_n43611_
 .subckt buf_x4 i=$abc$109383$new_n43417_ q=$abc$109383$new_n43612_
 .subckt buf_x4 i=$abc$109383$new_n43612_ q=$abc$109383$new_n43613_
-.subckt ao22_x2 i0=soc.ram.ram[89][0] i1=$abc$109383$new_n43613_ i2=$abc$109383$new_n43611_ q=$abc$109383$new_n43614_
+.subckt and21nor_x1 i0=soc.ram.ram[89][0] i1=$abc$109383$new_n43613_ i2=$abc$109383$new_n43611_ nq=$abc$109383$new_n43614_
 .subckt nand2_x0 i0=$abc$109383$new_n43614_ i1=$abc$109383$new_n43610_ nq=$abc$109383$new_n43615_
 .subckt buf_x4 i=$abc$109383$new_n43601_ q=$abc$109383$new_n43616_
 .subckt buf_x4 i=$abc$109383$new_n43474_ q=$abc$109383$new_n43617_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[88][0] i1=soc.ram.ram[92][0] q=$abc$109383$new_n43618_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[88][0] i1=soc.ram.ram[92][0] q=$abc$109383$new_n43618_
 .subckt nand2_x0 i0=$abc$109383$new_n43618_ i1=$abc$109383$new_n43616_ nq=$abc$109383$new_n43619_
-.subckt a2_x2 i0=$abc$109383$new_n43619_ i1=$abc$109383$new_n43448_ q=$abc$109383$new_n43620_
-.subckt a2_x2 i0=$abc$109383$new_n43620_ i1=$abc$109383$new_n43615_ q=$abc$109383$new_n43621_
-.subckt ao22_x2 i0=$abc$109383$new_n43621_ i1=$abc$109383$new_n43606_ i2=$abc$109383$new_n43570_ q=$abc$109383$new_n43622_
+.subckt and2_x1 i0=$abc$109383$new_n43619_ i1=$abc$109383$new_n43448_ q=$abc$109383$new_n43620_
+.subckt and2_x1 i0=$abc$109383$new_n43620_ i1=$abc$109383$new_n43615_ q=$abc$109383$new_n43621_
+.subckt and21nor_x1 i0=$abc$109383$new_n43621_ i1=$abc$109383$new_n43606_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n43622_
 .subckt buf_x4 i=$abc$109383$new_n43434_ q=$abc$109383$new_n43623_
 .subckt buf_x4 i=$abc$109383$new_n43337_ q=$abc$109383$new_n43624_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[82][0] i1=soc.ram.ram[86][0] q=$abc$109383$new_n43625_
-.subckt a2_x2 i0=$abc$109383$new_n43625_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n43626_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[82][0] i1=soc.ram.ram[86][0] q=$abc$109383$new_n43625_
+.subckt and2_x1 i0=$abc$109383$new_n43625_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n43626_
 .subckt buf_x4 i=$abc$109383$new_n43379_ q=$abc$109383$new_n43627_
-.subckt mx2_x2 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[83][0] i1=soc.ram.ram[87][0] q=$abc$109383$new_n43628_
+.subckt mux2_x1 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[83][0] i1=soc.ram.ram[87][0] q=$abc$109383$new_n43628_
 .subckt buf_x4 i=$abc$109383$new_n43498_ q=$abc$109383$new_n43629_
 .subckt buf_x4 i=$abc$109383$new_n43629_ q=$abc$109383$new_n43630_
-.subckt oa22_x2 i0=$abc$109383$new_n43630_ i1=$abc$109383$new_n43628_ i2=$abc$109383$new_n43448_ q=$abc$109383$new_n43631_
+.subckt or21nand_x1 i0=$abc$109383$new_n43630_ i1=$abc$109383$new_n43628_ i2=$abc$109383$new_n43448_ nq=$abc$109383$new_n43631_
 .subckt nor2_x0 i0=$abc$109383$new_n43631_ i1=$abc$109383$new_n43626_ nq=$abc$109383$new_n43632_
 .subckt buf_x4 i=$abc$109383$new_n43355_ q=$abc$109383$new_n43633_
 .subckt buf_x4 i=$abc$109383$new_n43633_ q=$abc$109383$new_n43634_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43635_
 .subckt buf_x4 i=$abc$109383$new_n43635_ q=$abc$109383$new_n43636_
-.subckt mx2_x2 cmd=$abc$109383$new_n43636_ i0=soc.ram.ram[80][0] i1=soc.ram.ram[84][0] q=$abc$109383$new_n43637_
-.subckt a2_x2 i0=$abc$109383$new_n43637_ i1=$abc$109383$new_n43634_ q=$abc$109383$new_n43638_
+.subckt mux2_x1 cmd=$abc$109383$new_n43636_ i0=soc.ram.ram[80][0] i1=soc.ram.ram[84][0] q=$abc$109383$new_n43637_
+.subckt and2_x1 i0=$abc$109383$new_n43637_ i1=$abc$109383$new_n43634_ q=$abc$109383$new_n43638_
 .subckt buf_x4 i=$abc$109383$new_n43474_ q=$abc$109383$new_n43639_
-.subckt mx2_x2 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[81][0] i1=soc.ram.ram[85][0] q=$abc$109383$new_n43640_
+.subckt mux2_x1 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[81][0] i1=soc.ram.ram[85][0] q=$abc$109383$new_n43640_
 .subckt buf_x4 i=$abc$109383$new_n43498_ q=$abc$109383$new_n43641_
 .subckt buf_x4 i=$abc$109383$new_n43641_ q=$abc$109383$new_n43642_
-.subckt oa22_x2 i0=$abc$109383$new_n43642_ i1=$abc$109383$new_n43640_ i2=$abc$109383$new_n43564_ q=$abc$109383$new_n43643_
+.subckt or21nand_x1 i0=$abc$109383$new_n43642_ i1=$abc$109383$new_n43640_ i2=$abc$109383$new_n43564_ nq=$abc$109383$new_n43643_
 .subckt nor2_x0 i0=$abc$109383$new_n43643_ i1=$abc$109383$new_n43638_ nq=$abc$109383$new_n43644_
-.subckt ao22_x2 i0=$abc$109383$new_n43644_ i1=$abc$109383$new_n43632_ i2=$abc$109383$new_n43471_ q=$abc$109383$new_n43645_
-.subckt ao22_x2 i0=$abc$109383$new_n43645_ i1=$abc$109383$new_n43622_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n43646_
+.subckt and21nor_x1 i0=$abc$109383$new_n43644_ i1=$abc$109383$new_n43632_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n43645_
+.subckt and21nor_x1 i0=$abc$109383$new_n43645_ i1=$abc$109383$new_n43622_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n43646_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[3] q=$abc$109383$new_n43647_
 .subckt buf_x4 i=$abc$109383$new_n43647_ q=$abc$109383$new_n43648_
 .subckt buf_x4 i=$abc$109383$new_n43648_ q=$abc$109383$new_n43649_
 .subckt buf_x4 i=$abc$109383$new_n43439_ q=$abc$109383$new_n43650_
 .subckt buf_x4 i=$abc$109383$new_n43360_ q=$abc$109383$new_n43651_
-.subckt mx2_x2 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[76][0] i1=soc.ram.ram[77][0] q=$abc$109383$new_n43652_
-.subckt mx2_x2 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[72][0] i1=soc.ram.ram[73][0] q=$abc$109383$new_n43653_
+.subckt mux2_x1 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[76][0] i1=soc.ram.ram[77][0] q=$abc$109383$new_n43652_
+.subckt mux2_x1 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[72][0] i1=soc.ram.ram[73][0] q=$abc$109383$new_n43653_
 .subckt buf_x4 i=$abc$109383$new_n43403_ q=$abc$109383$new_n43654_
-.subckt mx2_x2 cmd=$abc$109383$new_n43654_ i0=$abc$109383$new_n43653_ i1=$abc$109383$new_n43652_ q=$abc$109383$new_n43655_
+.subckt mux2_x1 cmd=$abc$109383$new_n43654_ i0=$abc$109383$new_n43653_ i1=$abc$109383$new_n43652_ q=$abc$109383$new_n43655_
 .subckt nor2_x0 i0=$abc$109383$new_n43655_ i1=$abc$109383$new_n43650_ nq=$abc$109383$new_n43656_
 .subckt buf_x4 i=$abc$109383$new_n43360_ q=$abc$109383$new_n43657_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[78][0] i1=soc.ram.ram[79][0] q=$abc$109383$new_n43658_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[74][0] i1=soc.ram.ram[75][0] q=$abc$109383$new_n43659_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[78][0] i1=soc.ram.ram[79][0] q=$abc$109383$new_n43658_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[74][0] i1=soc.ram.ram[75][0] q=$abc$109383$new_n43659_
 .subckt buf_x4 i=$abc$109383$new_n43512_ q=$abc$109383$new_n43660_
-.subckt mx2_x2 cmd=$abc$109383$new_n43660_ i0=$abc$109383$new_n43659_ i1=$abc$109383$new_n43658_ q=$abc$109383$new_n43661_
+.subckt mux2_x1 cmd=$abc$109383$new_n43660_ i0=$abc$109383$new_n43659_ i1=$abc$109383$new_n43658_ q=$abc$109383$new_n43661_
 .subckt nor2_x0 i0=$abc$109383$new_n43661_ i1=$abc$109383$new_n43544_ nq=$abc$109383$new_n43662_
-.subckt ao22_x2 i0=$abc$109383$new_n43662_ i1=$abc$109383$new_n43656_ i2=$abc$109383$new_n43649_ q=$abc$109383$new_n43663_
+.subckt and21nor_x1 i0=$abc$109383$new_n43662_ i1=$abc$109383$new_n43656_ i2=$abc$109383$new_n43649_ nq=$abc$109383$new_n43663_
 .subckt buf_x4 i=$abc$109383$new_n43432_ q=$abc$109383$new_n43664_
 .subckt buf_x4 i=$abc$109383$new_n43564_ q=$abc$109383$new_n43665_
-.subckt mx2_x2 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[64][0] i1=soc.ram.ram[68][0] q=$abc$109383$new_n43666_
-.subckt mx2_x2 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[65][0] i1=soc.ram.ram[69][0] q=$abc$109383$new_n43667_
-.subckt mx2_x2 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n43667_ i1=$abc$109383$new_n43666_ q=$abc$109383$new_n43668_
+.subckt mux2_x1 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[64][0] i1=soc.ram.ram[68][0] q=$abc$109383$new_n43666_
+.subckt mux2_x1 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[65][0] i1=soc.ram.ram[69][0] q=$abc$109383$new_n43667_
+.subckt mux2_x1 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n43667_ i1=$abc$109383$new_n43666_ q=$abc$109383$new_n43668_
 .subckt nor2_x0 i0=$abc$109383$new_n43668_ i1=$abc$109383$new_n43665_ nq=$abc$109383$new_n43669_
 .subckt buf_x4 i=$abc$109383$new_n43526_ q=$abc$109383$new_n43670_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[67][0] i1=soc.ram.ram[71][0] q=$abc$109383$new_n43671_
-.subckt a2_x2 i0=$abc$109383$new_n43671_ i1=$abc$109383$new_n43482_ q=$abc$109383$new_n43672_
-.subckt mx2_x2 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[66][0] i1=soc.ram.ram[70][0] q=$abc$109383$new_n43673_
-.subckt oa22_x2 i0=$abc$109383$new_n43594_ i1=$abc$109383$new_n43673_ i2=$abc$109383$new_n43371_ q=$abc$109383$new_n43674_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[67][0] i1=soc.ram.ram[71][0] q=$abc$109383$new_n43671_
+.subckt and2_x1 i0=$abc$109383$new_n43671_ i1=$abc$109383$new_n43482_ q=$abc$109383$new_n43672_
+.subckt mux2_x1 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[66][0] i1=soc.ram.ram[70][0] q=$abc$109383$new_n43673_
+.subckt or21nand_x1 i0=$abc$109383$new_n43594_ i1=$abc$109383$new_n43673_ i2=$abc$109383$new_n43371_ nq=$abc$109383$new_n43674_
 .subckt nor2_x0 i0=$abc$109383$new_n43674_ i1=$abc$109383$new_n43672_ nq=$abc$109383$new_n43675_
-.subckt ao22_x2 i0=$abc$109383$new_n43675_ i1=$abc$109383$new_n43669_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n43676_
-.subckt ao22_x2 i0=$abc$109383$new_n43676_ i1=$abc$109383$new_n43663_ i2=$abc$109383$new_n43326_ q=$abc$109383$new_n43677_
+.subckt and21nor_x1 i0=$abc$109383$new_n43675_ i1=$abc$109383$new_n43669_ i2=$abc$109383$new_n43664_ nq=$abc$109383$new_n43676_
+.subckt and21nor_x1 i0=$abc$109383$new_n43676_ i1=$abc$109383$new_n43663_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n43677_
 .subckt nor3_x0 i0=$abc$109383$new_n43677_ i1=$abc$109383$new_n43646_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n43678_
 .subckt buf_x4 i=$abc$109383$new_n43544_ q=$abc$109383$new_n43679_
 .subckt buf_x4 i=$abc$109383$new_n43334_ q=$abc$109383$new_n43680_
 .subckt buf_x4 i=$abc$109383$new_n43680_ q=$abc$109383$new_n43681_
-.subckt mx2_x2 cmd=$abc$109383$new_n43608_ i0=soc.ram.ram[120][0] i1=soc.ram.ram[124][0] q=$abc$109383$new_n43682_
+.subckt mux2_x1 cmd=$abc$109383$new_n43608_ i0=soc.ram.ram[120][0] i1=soc.ram.ram[124][0] q=$abc$109383$new_n43682_
 .subckt nand2_x0 i0=$abc$109383$new_n43682_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n43683_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43684_
 .subckt buf_x4 i=$abc$109383$new_n43684_ q=$abc$109383$new_n43685_
@@ -28965,53 +28965,53 @@
 .subckt buf_x4 i=$abc$109383$new_n43690_ q=$abc$109383$new_n43691_
 .subckt buf_x4 i=$abc$109383$new_n43533_ q=$abc$109383$new_n43692_
 .subckt buf_x4 i=$abc$109383$new_n43692_ q=$abc$109383$new_n43693_
-.subckt ao22_x2 i0=soc.ram.ram[121][0] i1=$abc$109383$new_n43693_ i2=$abc$109383$new_n43691_ q=$abc$109383$new_n43694_
+.subckt and21nor_x1 i0=soc.ram.ram[121][0] i1=$abc$109383$new_n43693_ i2=$abc$109383$new_n43691_ nq=$abc$109383$new_n43694_
 .subckt nand2_x0 i0=$abc$109383$new_n43694_ i1=$abc$109383$new_n43689_ nq=$abc$109383$new_n43695_
 .subckt nand3_x0 i0=$abc$109383$new_n43695_ i1=$abc$109383$new_n43683_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n43696_
 .subckt buf_x4 i=$abc$109383$new_n43466_ q=$abc$109383$new_n43697_
 .subckt buf_x4 i=$abc$109383$new_n43498_ q=$abc$109383$new_n43698_
 .subckt buf_x4 i=$abc$109383$new_n43698_ q=$abc$109383$new_n43699_
 .subckt buf_x4 i=$abc$109383$new_n43550_ q=$abc$109383$new_n43700_
-.subckt ao22_x2 i0=soc.ram.ram[123][0] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ q=$abc$109383$new_n43701_
+.subckt and21nor_x1 i0=soc.ram.ram[123][0] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ nq=$abc$109383$new_n43701_
 .subckt buf_x4 i=$abc$109383$new_n43365_ q=$abc$109383$new_n43702_
-.subckt ao22_x2 i0=$abc$109383$new_n43702_ i1=soc.ram.ram[127][0] i2=$abc$109383$new_n43701_ q=$abc$109383$new_n43703_
+.subckt and21nor_x1 i0=$abc$109383$new_n43702_ i1=soc.ram.ram[127][0] i2=$abc$109383$new_n43701_ nq=$abc$109383$new_n43703_
 .subckt buf_x4 i=$abc$109383$new_n43684_ q=$abc$109383$new_n43704_
-.subckt mx2_x2 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[122][0] i1=soc.ram.ram[126][0] q=$abc$109383$new_n43705_
+.subckt mux2_x1 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[122][0] i1=soc.ram.ram[126][0] q=$abc$109383$new_n43705_
 .subckt buf_x4 i=$abc$109383$new_n43355_ q=$abc$109383$new_n43706_
 .subckt buf_x4 i=$abc$109383$new_n43706_ q=$abc$109383$new_n43707_
-.subckt oa22_x2 i0=$abc$109383$new_n43707_ i1=$abc$109383$new_n43705_ i2=$abc$109383$new_n43423_ q=$abc$109383$new_n43708_
-.subckt ao22_x2 i0=$abc$109383$new_n43708_ i1=$abc$109383$new_n43703_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n43709_
-.subckt a2_x2 i0=$abc$109383$new_n43709_ i1=$abc$109383$new_n43696_ q=$abc$109383$new_n43710_
+.subckt or21nand_x1 i0=$abc$109383$new_n43707_ i1=$abc$109383$new_n43705_ i2=$abc$109383$new_n43423_ nq=$abc$109383$new_n43708_
+.subckt and21nor_x1 i0=$abc$109383$new_n43708_ i1=$abc$109383$new_n43703_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n43709_
+.subckt and2_x1 i0=$abc$109383$new_n43709_ i1=$abc$109383$new_n43696_ q=$abc$109383$new_n43710_
 .subckt buf_x4 i=$abc$109383$new_n43390_ q=$abc$109383$new_n43711_
 .subckt buf_x4 i=$abc$109383$new_n43711_ q=$abc$109383$new_n43712_
 .subckt buf_x4 i=$abc$109383$new_n43712_ q=$abc$109383$new_n43713_
 .subckt buf_x4 i=$abc$109383$new_n43324_ q=$abc$109383$new_n43714_
 .subckt buf_x4 i=$abc$109383$new_n43714_ q=$abc$109383$new_n43715_
-.subckt mx2_x2 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[105][0] i1=soc.ram.ram[109][0] q=$abc$109383$new_n43716_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[104][0] i1=soc.ram.ram[108][0] q=$abc$109383$new_n43717_
+.subckt mux2_x1 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[105][0] i1=soc.ram.ram[109][0] q=$abc$109383$new_n43716_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[104][0] i1=soc.ram.ram[108][0] q=$abc$109383$new_n43717_
 .subckt buf_x4 i=$abc$109383$new_n43480_ q=$abc$109383$new_n43718_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=$abc$109383$new_n43717_ i1=$abc$109383$new_n43716_ q=$abc$109383$new_n43719_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[107][0] i1=soc.ram.ram[111][0] q=$abc$109383$new_n43720_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[106][0] i1=soc.ram.ram[110][0] q=$abc$109383$new_n43721_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=$abc$109383$new_n43721_ i1=$abc$109383$new_n43720_ q=$abc$109383$new_n43722_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=$abc$109383$new_n43717_ i1=$abc$109383$new_n43716_ q=$abc$109383$new_n43719_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[107][0] i1=soc.ram.ram[111][0] q=$abc$109383$new_n43720_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[106][0] i1=soc.ram.ram[110][0] q=$abc$109383$new_n43721_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=$abc$109383$new_n43721_ i1=$abc$109383$new_n43720_ q=$abc$109383$new_n43722_
 .subckt buf_x4 i=$abc$109383$new_n43328_ q=$abc$109383$new_n43723_
 .subckt buf_x4 i=$abc$109383$new_n43723_ q=$abc$109383$new_n43724_
-.subckt mx2_x2 cmd=$abc$109383$new_n43724_ i0=$abc$109383$new_n43722_ i1=$abc$109383$new_n43719_ q=$abc$109383$new_n43725_
-.subckt oa22_x2 i0=$abc$109383$new_n43725_ i1=$abc$109383$new_n43715_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n43726_
-.subckt ao22_x2 i0=$abc$109383$new_n43726_ i1=$abc$109383$new_n43710_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n43727_
+.subckt mux2_x1 cmd=$abc$109383$new_n43724_ i0=$abc$109383$new_n43722_ i1=$abc$109383$new_n43719_ q=$abc$109383$new_n43725_
+.subckt or21nand_x1 i0=$abc$109383$new_n43725_ i1=$abc$109383$new_n43715_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n43726_
+.subckt and21nor_x1 i0=$abc$109383$new_n43726_ i1=$abc$109383$new_n43710_ i2=$abc$109383$new_n43464_ nq=$abc$109383$new_n43727_
 .subckt buf_x4 i=$abc$109383$new_n43466_ q=$abc$109383$new_n43728_
 .subckt buf_x4 i=$abc$109383$new_n43728_ q=$abc$109383$new_n43729_
 .subckt buf_x4 i=$abc$109383$new_n43448_ q=$abc$109383$new_n43730_
 .subckt buf_x4 i=$abc$109383$new_n43706_ q=$abc$109383$new_n43731_
-.subckt mx2_x2 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[98][0] i1=soc.ram.ram[102][0] q=$abc$109383$new_n43732_
-.subckt a2_x2 i0=$abc$109383$new_n43732_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n43733_
-.subckt ao22_x2 i0=soc.ram.ram[99][0] i1=$abc$109383$new_n43425_ i2=$abc$109383$new_n43481_ q=$abc$109383$new_n43734_
-.subckt ao22_x2 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[103][0] i2=$abc$109383$new_n43734_ q=$abc$109383$new_n43735_
-.subckt o3_x2 i0=$abc$109383$new_n43735_ i1=$abc$109383$new_n43733_ i2=$abc$109383$new_n43730_ q=$abc$109383$new_n43736_
+.subckt mux2_x1 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[98][0] i1=soc.ram.ram[102][0] q=$abc$109383$new_n43732_
+.subckt and2_x1 i0=$abc$109383$new_n43732_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n43733_
+.subckt and21nor_x1 i0=soc.ram.ram[99][0] i1=$abc$109383$new_n43425_ i2=$abc$109383$new_n43481_ nq=$abc$109383$new_n43734_
+.subckt and21nor_x1 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[103][0] i2=$abc$109383$new_n43734_ nq=$abc$109383$new_n43735_
+.subckt or3_x1 i0=$abc$109383$new_n43735_ i1=$abc$109383$new_n43733_ i2=$abc$109383$new_n43730_ q=$abc$109383$new_n43736_
 .subckt buf_x4 i=$abc$109383$new_n43706_ q=$abc$109383$new_n43737_
 .subckt buf_x4 i=$abc$109383$new_n43737_ q=$abc$109383$new_n43738_
 .subckt buf_x4 i=$abc$109383$new_n43380_ q=$abc$109383$new_n43739_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[96][0] i1=soc.ram.ram[100][0] q=$abc$109383$new_n43740_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[96][0] i1=soc.ram.ram[100][0] q=$abc$109383$new_n43740_
 .subckt nand2_x0 i0=$abc$109383$new_n43740_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n43741_
 .subckt buf_x4 i=$abc$109383$new_n43424_ q=$abc$109383$new_n43742_
 .subckt buf_x4 i=$abc$109383$new_n43742_ q=$abc$109383$new_n43743_
@@ -29020,52 +29020,52 @@
 .subckt nand2_x0 i0=$abc$109383$new_n43745_ i1=$abc$109383$new_n43744_ nq=$abc$109383$new_n43746_
 .subckt buf_x4 i=$abc$109383$new_n43394_ q=$abc$109383$new_n43747_
 .subckt buf_x4 i=$abc$109383$new_n43636_ q=$abc$109383$new_n43748_
-.subckt ao22_x2 i0=soc.ram.ram[97][0] i1=$abc$109383$new_n43748_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n43749_
+.subckt and21nor_x1 i0=soc.ram.ram[97][0] i1=$abc$109383$new_n43748_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n43749_
 .subckt nand2_x0 i0=$abc$109383$new_n43749_ i1=$abc$109383$new_n43746_ nq=$abc$109383$new_n43750_
 .subckt nand3_x0 i0=$abc$109383$new_n43750_ i1=$abc$109383$new_n43741_ i2=$abc$109383$new_n43331_ nq=$abc$109383$new_n43751_
-.subckt oa22_x2 i0=$abc$109383$new_n43751_ i1=$abc$109383$new_n43736_ i2=$abc$109383$new_n43729_ q=$abc$109383$new_n43752_
+.subckt or21nand_x1 i0=$abc$109383$new_n43751_ i1=$abc$109383$new_n43736_ i2=$abc$109383$new_n43729_ nq=$abc$109383$new_n43752_
 .subckt buf_x4 i=$abc$109383$new_n43423_ q=$abc$109383$new_n43753_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[112][0] i1=soc.ram.ram[116][0] q=$abc$109383$new_n43754_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[112][0] i1=soc.ram.ram[116][0] q=$abc$109383$new_n43754_
 .subckt buf_x4 i=$abc$109383$new_n43440_ q=$abc$109383$new_n43755_
-.subckt mx2_x2 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[113][0] i1=soc.ram.ram[117][0] q=$abc$109383$new_n43756_
-.subckt mx2_x2 cmd=$abc$109383$new_n43616_ i0=$abc$109383$new_n43756_ i1=$abc$109383$new_n43754_ q=$abc$109383$new_n43757_
-.subckt a2_x2 i0=$abc$109383$new_n43757_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n43758_
+.subckt mux2_x1 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[113][0] i1=soc.ram.ram[117][0] q=$abc$109383$new_n43756_
+.subckt mux2_x1 cmd=$abc$109383$new_n43616_ i0=$abc$109383$new_n43756_ i1=$abc$109383$new_n43754_ q=$abc$109383$new_n43757_
+.subckt and2_x1 i0=$abc$109383$new_n43757_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n43758_
 .subckt buf_x4 i=$abc$109383$new_n43633_ q=$abc$109383$new_n43759_
-.subckt mx2_x2 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[115][0] i1=soc.ram.ram[119][0] q=$abc$109383$new_n43760_
-.subckt o2_x2 i0=$abc$109383$new_n43760_ i1=$abc$109383$new_n43759_ q=$abc$109383$new_n43761_
-.subckt mx2_x2 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[114][0] i1=soc.ram.ram[118][0] q=$abc$109383$new_n43762_
-.subckt ao22_x2 i0=$abc$109383$new_n43690_ i1=$abc$109383$new_n43762_ i2=$abc$109383$new_n43439_ q=$abc$109383$new_n43763_
-.subckt a2_x2 i0=$abc$109383$new_n43763_ i1=$abc$109383$new_n43761_ q=$abc$109383$new_n43764_
-.subckt o2_x2 i0=$abc$109383$new_n43764_ i1=$abc$109383$new_n43758_ q=$abc$109383$new_n43765_
-.subckt ao22_x2 i0=$abc$109383$new_n43326_ i1=$abc$109383$new_n43765_ i2=$abc$109383$new_n43752_ q=$abc$109383$new_n43766_
+.subckt mux2_x1 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[115][0] i1=soc.ram.ram[119][0] q=$abc$109383$new_n43760_
+.subckt or2_x1 i0=$abc$109383$new_n43760_ i1=$abc$109383$new_n43759_ q=$abc$109383$new_n43761_
+.subckt mux2_x1 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[114][0] i1=soc.ram.ram[118][0] q=$abc$109383$new_n43762_
+.subckt and21nor_x1 i0=$abc$109383$new_n43690_ i1=$abc$109383$new_n43762_ i2=$abc$109383$new_n43439_ nq=$abc$109383$new_n43763_
+.subckt and2_x1 i0=$abc$109383$new_n43763_ i1=$abc$109383$new_n43761_ q=$abc$109383$new_n43764_
+.subckt or2_x1 i0=$abc$109383$new_n43764_ i1=$abc$109383$new_n43758_ q=$abc$109383$new_n43765_
+.subckt and21nor_x1 i0=$abc$109383$new_n43326_ i1=$abc$109383$new_n43765_ i2=$abc$109383$new_n43752_ nq=$abc$109383$new_n43766_
 .subckt buf_x4 i=$abc$109383$new_n43353_ q=$abc$109383$new_n43767_
 .subckt buf_x4 i=$abc$109383$new_n43767_ q=$abc$109383$new_n43768_
 .subckt buf_x4 i=$abc$109383$new_n43768_ q=$abc$109383$new_n43769_
-.subckt ao22_x2 i0=$abc$109383$new_n43769_ i1=$abc$109383$new_n43766_ i2=$abc$109383$new_n43727_ q=$abc$109383$new_n43770_
-.subckt o3_x2 i0=$abc$109383$new_n43770_ i1=$abc$109383$new_n43678_ i2=$abc$109383$new_n43591_ q=$abc$109383$new_n43771_
-.subckt oa22_x2 i0=$abc$109383$new_n43771_ i1=$abc$109383$new_n43588_ i2=$abc$109383$new_n43320_ q=$abc$109383$new_n43772_
+.subckt and21nor_x1 i0=$abc$109383$new_n43769_ i1=$abc$109383$new_n43766_ i2=$abc$109383$new_n43727_ nq=$abc$109383$new_n43770_
+.subckt or3_x1 i0=$abc$109383$new_n43770_ i1=$abc$109383$new_n43678_ i2=$abc$109383$new_n43591_ q=$abc$109383$new_n43771_
+.subckt or21nand_x1 i0=$abc$109383$new_n43771_ i1=$abc$109383$new_n43588_ i2=$abc$109383$new_n43320_ nq=$abc$109383$new_n43772_
 .subckt buf_x4 i=$abc$109383$new_n43282_ q=$abc$109383$new_n43773_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n43772_ i2=$abc$109383$new_n43291_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103198
-.subckt a2_x2 i0=$abc$109383$new_n43281_ i1=$abc$109383$new_n29202_ q=$abc$109383$new_n43775_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n43772_ i2=$abc$109383$new_n43291_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103198
+.subckt and2_x1 i0=$abc$109383$new_n43281_ i1=$abc$109383$new_n29202_ q=$abc$109383$new_n43775_
 .subckt buf_x4 i=$abc$109383$new_n43775_ q=$abc$109383$new_n43776_
-.subckt a3_x2 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ i2=$abc$109383$new_n19663_ q=$abc$109383$new_n43777_
+.subckt and3_x1 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ i2=$abc$109383$new_n19663_ q=$abc$109383$new_n43777_
 .subckt buf_x4 i=$abc$109383$new_n43777_ q=$abc$109383$new_n43778_
 .subckt inv_x0 i=$\soc.ram.ram$rdreg[0]$q[5] nq=$abc$109383$new_n43779_
 .subckt buf_x4 i=$abc$109383$new_n43779_ q=$abc$109383$new_n43780_
 .subckt buf_x4 i=$abc$109383$new_n43780_ q=$abc$109383$new_n43781_
 .subckt buf_x4 i=$abc$109383$new_n43781_ q=$abc$109383$new_n43782_
 .subckt buf_x4 i=$abc$109383$new_n43729_ q=$abc$109383$new_n43783_
-.subckt mx2_x2 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[53][1] i1=soc.ram.ram[55][1] q=$abc$109383$new_n43784_
-.subckt mx2_x2 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[49][1] i1=soc.ram.ram[51][1] q=$abc$109383$new_n43785_
+.subckt mux2_x1 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[53][1] i1=soc.ram.ram[55][1] q=$abc$109383$new_n43784_
+.subckt mux2_x1 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[49][1] i1=soc.ram.ram[51][1] q=$abc$109383$new_n43785_
 .subckt buf_x4 i=$abc$109383$new_n43660_ q=$abc$109383$new_n43786_
-.subckt mx2_x2 cmd=$abc$109383$new_n43786_ i0=$abc$109383$new_n43785_ i1=$abc$109383$new_n43784_ q=$abc$109383$new_n43787_
-.subckt mx2_x2 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[52][1] i1=soc.ram.ram[54][1] q=$abc$109383$new_n43788_
-.subckt mx2_x2 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[48][1] i1=soc.ram.ram[50][1] q=$abc$109383$new_n43789_
-.subckt mx2_x2 cmd=$abc$109383$new_n43786_ i0=$abc$109383$new_n43789_ i1=$abc$109383$new_n43788_ q=$abc$109383$new_n43790_
+.subckt mux2_x1 cmd=$abc$109383$new_n43786_ i0=$abc$109383$new_n43785_ i1=$abc$109383$new_n43784_ q=$abc$109383$new_n43787_
+.subckt mux2_x1 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[52][1] i1=soc.ram.ram[54][1] q=$abc$109383$new_n43788_
+.subckt mux2_x1 cmd=$abc$109383$new_n43532_ i0=soc.ram.ram[48][1] i1=soc.ram.ram[50][1] q=$abc$109383$new_n43789_
+.subckt mux2_x1 cmd=$abc$109383$new_n43786_ i0=$abc$109383$new_n43789_ i1=$abc$109383$new_n43788_ q=$abc$109383$new_n43790_
 .subckt buf_x4 i=$abc$109383$new_n43642_ q=$abc$109383$new_n43791_
 .subckt buf_x4 i=$abc$109383$new_n43791_ q=$abc$109383$new_n43792_
-.subckt mx2_x2 cmd=$abc$109383$new_n43792_ i0=$abc$109383$new_n43790_ i1=$abc$109383$new_n43787_ q=$abc$109383$new_n43793_
-.subckt a2_x2 i0=$abc$109383$new_n43793_ i1=$abc$109383$new_n43783_ q=$abc$109383$new_n43794_
+.subckt mux2_x1 cmd=$abc$109383$new_n43792_ i0=$abc$109383$new_n43790_ i1=$abc$109383$new_n43787_ q=$abc$109383$new_n43793_
+.subckt and2_x1 i0=$abc$109383$new_n43793_ i1=$abc$109383$new_n43783_ q=$abc$109383$new_n43794_
 .subckt buf_x4 i=$abc$109383$new_n43715_ q=$abc$109383$new_n43795_
 .subckt buf_x4 i=$abc$109383$new_n43480_ q=$abc$109383$new_n43796_
 .subckt buf_x4 i=$abc$109383$new_n43796_ q=$abc$109383$new_n43797_
@@ -29074,39 +29074,39 @@
 .subckt buf_x4 i=$abc$109383$new_n43799_ q=$abc$109383$new_n43800_
 .subckt buf_x4 i=$abc$109383$new_n43800_ q=$abc$109383$new_n43801_
 .subckt buf_x4 i=$abc$109383$new_n43801_ q=$abc$109383$new_n43802_
-.subckt ao22_x2 i0=soc.ram.ram[33][1] i1=$abc$109383$new_n43802_ i2=$abc$109383$new_n43798_ q=$abc$109383$new_n43803_
+.subckt and21nor_x1 i0=soc.ram.ram[33][1] i1=$abc$109383$new_n43802_ i2=$abc$109383$new_n43798_ nq=$abc$109383$new_n43803_
 .subckt buf_x4 i=$abc$109383$new_n43398_ q=$abc$109383$new_n43804_
 .subckt buf_x4 i=$abc$109383$new_n43804_ q=$abc$109383$new_n43805_
 .subckt buf_x4 i=$abc$109383$new_n43805_ q=$abc$109383$new_n43806_
-.subckt ao22_x2 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[37][1] i2=$abc$109383$new_n43803_ q=$abc$109383$new_n43807_
+.subckt and21nor_x1 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[37][1] i2=$abc$109383$new_n43803_ nq=$abc$109383$new_n43807_
 .subckt buf_x4 i=$abc$109383$new_n43402_ q=$abc$109383$new_n43808_
 .subckt buf_x4 i=$abc$109383$new_n43808_ q=$abc$109383$new_n43809_
 .subckt buf_x4 i=$abc$109383$new_n43533_ q=$abc$109383$new_n43810_
 .subckt buf_x4 i=$abc$109383$new_n43810_ q=$abc$109383$new_n43811_
-.subckt mx2_x2 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[32][1] i1=soc.ram.ram[36][1] q=$abc$109383$new_n43812_
+.subckt mux2_x1 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[32][1] i1=soc.ram.ram[36][1] q=$abc$109383$new_n43812_
 .subckt buf_x4 i=$abc$109383$new_n43356_ q=$abc$109383$new_n43813_
 .subckt buf_x4 i=$abc$109383$new_n43813_ q=$abc$109383$new_n43814_
-.subckt oa22_x2 i0=$abc$109383$new_n43814_ i1=$abc$109383$new_n43812_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n43815_
-.subckt ao22_x2 i0=$abc$109383$new_n43815_ i1=$abc$109383$new_n43807_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n43816_
+.subckt or21nand_x1 i0=$abc$109383$new_n43814_ i1=$abc$109383$new_n43812_ i2=$abc$109383$new_n43809_ nq=$abc$109383$new_n43815_
+.subckt and21nor_x1 i0=$abc$109383$new_n43815_ i1=$abc$109383$new_n43807_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n43816_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n43817_
 .subckt buf_x4 i=$abc$109383$new_n43817_ q=$abc$109383$new_n43818_
 .subckt buf_x4 i=$abc$109383$new_n43818_ q=$abc$109383$new_n43819_
-.subckt mx2_x2 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[34][1] i1=soc.ram.ram[38][1] q=$abc$109383$new_n43820_
+.subckt mux2_x1 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[34][1] i1=soc.ram.ram[38][1] q=$abc$109383$new_n43820_
 .subckt buf_x4 i=$abc$109383$new_n43813_ q=$abc$109383$new_n43821_
-.subckt oa22_x2 i0=$abc$109383$new_n43821_ i1=$abc$109383$new_n43820_ i2=$abc$109383$new_n43331_ q=$abc$109383$new_n43822_
+.subckt or21nand_x1 i0=$abc$109383$new_n43821_ i1=$abc$109383$new_n43820_ i2=$abc$109383$new_n43331_ nq=$abc$109383$new_n43822_
 .subckt buf_x4 i=$abc$109383$new_n43699_ q=$abc$109383$new_n43823_
 .subckt buf_x4 i=$abc$109383$new_n43823_ q=$abc$109383$new_n43824_
 .subckt buf_x4 i=$abc$109383$new_n43654_ q=$abc$109383$new_n43825_
 .subckt buf_x4 i=$abc$109383$new_n43825_ q=$abc$109383$new_n43826_
-.subckt ao22_x2 i0=soc.ram.ram[35][1] i1=$abc$109383$new_n43826_ i2=$abc$109383$new_n43824_ q=$abc$109383$new_n43827_
+.subckt and21nor_x1 i0=soc.ram.ram[35][1] i1=$abc$109383$new_n43826_ i2=$abc$109383$new_n43824_ nq=$abc$109383$new_n43827_
 .subckt buf_x4 i=$abc$109383$new_n43602_ q=$abc$109383$new_n43828_
 .subckt buf_x4 i=$abc$109383$new_n43828_ q=$abc$109383$new_n43829_
 .subckt buf_x4 i=$abc$109383$new_n43829_ q=$abc$109383$new_n43830_
 .subckt inv_x0 i=soc.ram.ram[39][1] nq=$abc$109383$new_n43831_
 .subckt nand2_x0 i0=$abc$109383$new_n43831_ i1=$abc$109383$new_n43830_ nq=$abc$109383$new_n43832_
-.subckt oa22_x2 i0=$abc$109383$new_n43832_ i1=$abc$109383$new_n43827_ i2=$abc$109383$new_n43822_ q=$abc$109383$new_n43833_
-.subckt oa22_x2 i0=$abc$109383$new_n43833_ i1=$abc$109383$new_n43816_ i2=$abc$109383$new_n43794_ q=$abc$109383$new_n43834_
-.subckt o2_x2 i0=$abc$109383$new_n43834_ i1=$abc$109383$new_n43782_ q=$abc$109383$new_n43835_
+.subckt or21nand_x1 i0=$abc$109383$new_n43832_ i1=$abc$109383$new_n43827_ i2=$abc$109383$new_n43822_ nq=$abc$109383$new_n43833_
+.subckt or21nand_x1 i0=$abc$109383$new_n43833_ i1=$abc$109383$new_n43816_ i2=$abc$109383$new_n43794_ nq=$abc$109383$new_n43834_
+.subckt or2_x1 i0=$abc$109383$new_n43834_ i1=$abc$109383$new_n43782_ q=$abc$109383$new_n43835_
 .subckt buf_x4 i=$abc$109383$new_n43390_ q=$abc$109383$new_n43836_
 .subckt buf_x4 i=$abc$109383$new_n43836_ q=$abc$109383$new_n43837_
 .subckt buf_x4 i=$abc$109383$new_n43837_ q=$abc$109383$new_n43838_
@@ -29120,52 +29120,52 @@
 .subckt buf_x4 i=$abc$109383$new_n43845_ q=$abc$109383$new_n43846_
 .subckt buf_x4 i=$abc$109383$new_n43846_ q=$abc$109383$new_n43847_
 .subckt buf_x4 i=$abc$109383$new_n43847_ q=$abc$109383$new_n43848_
-.subckt mx2_x2 cmd=$abc$109383$new_n43848_ i0=soc.ram.ram[4][1] i1=soc.ram.ram[5][1] q=$abc$109383$new_n43849_
-.subckt mx2_x2 cmd=$abc$109383$new_n43848_ i0=soc.ram.ram[0][1] i1=soc.ram.ram[1][1] q=$abc$109383$new_n43850_
+.subckt mux2_x1 cmd=$abc$109383$new_n43848_ i0=soc.ram.ram[4][1] i1=soc.ram.ram[5][1] q=$abc$109383$new_n43849_
+.subckt mux2_x1 cmd=$abc$109383$new_n43848_ i0=soc.ram.ram[0][1] i1=soc.ram.ram[1][1] q=$abc$109383$new_n43850_
 .subckt buf_x4 i=$abc$109383$new_n43801_ q=$abc$109383$new_n43851_
 .subckt buf_x4 i=$abc$109383$new_n43851_ q=$abc$109383$new_n43852_
-.subckt mx2_x2 cmd=$abc$109383$new_n43852_ i0=$abc$109383$new_n43850_ i1=$abc$109383$new_n43849_ q=$abc$109383$new_n43853_
+.subckt mux2_x1 cmd=$abc$109383$new_n43852_ i0=$abc$109383$new_n43850_ i1=$abc$109383$new_n43849_ q=$abc$109383$new_n43853_
 .subckt nor2_x0 i0=$abc$109383$new_n43853_ i1=$abc$109383$new_n43844_ nq=$abc$109383$new_n43854_
 .subckt buf_x4 i=$abc$109383$new_n43423_ q=$abc$109383$new_n43855_
 .subckt buf_x4 i=$abc$109383$new_n43855_ q=$abc$109383$new_n43856_
 .subckt buf_x4 i=$abc$109383$new_n43856_ q=$abc$109383$new_n43857_
-.subckt mx2_x2 cmd=$abc$109383$new_n43823_ i0=soc.ram.ram[6][1] i1=soc.ram.ram[7][1] q=$abc$109383$new_n43858_
-.subckt mx2_x2 cmd=$abc$109383$new_n43823_ i0=soc.ram.ram[2][1] i1=soc.ram.ram[3][1] q=$abc$109383$new_n43859_
+.subckt mux2_x1 cmd=$abc$109383$new_n43823_ i0=soc.ram.ram[6][1] i1=soc.ram.ram[7][1] q=$abc$109383$new_n43858_
+.subckt mux2_x1 cmd=$abc$109383$new_n43823_ i0=soc.ram.ram[2][1] i1=soc.ram.ram[3][1] q=$abc$109383$new_n43859_
 .subckt buf_x4 i=$abc$109383$new_n43484_ q=$abc$109383$new_n43860_
 .subckt buf_x4 i=$abc$109383$new_n43860_ q=$abc$109383$new_n43861_
-.subckt mx2_x2 cmd=$abc$109383$new_n43861_ i0=$abc$109383$new_n43859_ i1=$abc$109383$new_n43858_ q=$abc$109383$new_n43862_
+.subckt mux2_x1 cmd=$abc$109383$new_n43861_ i0=$abc$109383$new_n43859_ i1=$abc$109383$new_n43858_ q=$abc$109383$new_n43862_
 .subckt nor2_x0 i0=$abc$109383$new_n43862_ i1=$abc$109383$new_n43857_ nq=$abc$109383$new_n43863_
 .subckt nor3_x0 i0=$abc$109383$new_n43863_ i1=$abc$109383$new_n43854_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n43864_
 .subckt buf_x4 i=$abc$109383$new_n43409_ q=$abc$109383$new_n43865_
 .subckt buf_x4 i=$abc$109383$new_n43680_ q=$abc$109383$new_n43866_
 .subckt buf_x4 i=$abc$109383$new_n43357_ q=$abc$109383$new_n43867_
 .subckt buf_x4 i=$abc$109383$new_n43867_ q=$abc$109383$new_n43868_
-.subckt mx2_x2 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[16][1] i1=soc.ram.ram[20][1] q=$abc$109383$new_n43869_
-.subckt a2_x2 i0=$abc$109383$new_n43869_ i1=$abc$109383$new_n43866_ q=$abc$109383$new_n43870_
+.subckt mux2_x1 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[16][1] i1=soc.ram.ram[20][1] q=$abc$109383$new_n43869_
+.subckt and2_x1 i0=$abc$109383$new_n43869_ i1=$abc$109383$new_n43866_ q=$abc$109383$new_n43870_
 .subckt buf_x4 i=$abc$109383$new_n43651_ q=$abc$109383$new_n43871_
 .subckt buf_x4 i=$abc$109383$new_n43871_ q=$abc$109383$new_n43872_
 .subckt buf_x4 i=$abc$109383$new_n43367_ q=$abc$109383$new_n43873_
 .subckt buf_x4 i=$abc$109383$new_n43873_ q=$abc$109383$new_n43874_
-.subckt ao22_x2 i0=soc.ram.ram[17][1] i1=$abc$109383$new_n43874_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n43875_
+.subckt and21nor_x1 i0=soc.ram.ram[17][1] i1=$abc$109383$new_n43874_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n43875_
 .subckt buf_x4 i=$abc$109383$new_n43363_ q=$abc$109383$new_n43876_
 .subckt buf_x4 i=$abc$109383$new_n43876_ q=$abc$109383$new_n43877_
 .subckt buf_x4 i=$abc$109383$new_n43877_ q=$abc$109383$new_n43878_
 .subckt buf_x4 i=$abc$109383$new_n43878_ q=$abc$109383$new_n43879_
-.subckt ao22_x2 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[21][1] i2=$abc$109383$new_n43875_ q=$abc$109383$new_n43880_
-.subckt o3_x2 i0=$abc$109383$new_n43880_ i1=$abc$109383$new_n43870_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n43881_
+.subckt and21nor_x1 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[21][1] i2=$abc$109383$new_n43875_ nq=$abc$109383$new_n43880_
+.subckt or3_x1 i0=$abc$109383$new_n43880_ i1=$abc$109383$new_n43870_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n43881_
 .subckt buf_x4 i=$abc$109383$new_n43697_ q=$abc$109383$new_n43882_
 .subckt buf_x4 i=$abc$109383$new_n43680_ q=$abc$109383$new_n43883_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[18][1] i1=soc.ram.ram[22][1] q=$abc$109383$new_n43884_
-.subckt a2_x2 i0=$abc$109383$new_n43884_ i1=$abc$109383$new_n43883_ q=$abc$109383$new_n43885_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[18][1] i1=soc.ram.ram[22][1] q=$abc$109383$new_n43884_
+.subckt and2_x1 i0=$abc$109383$new_n43884_ i1=$abc$109383$new_n43883_ q=$abc$109383$new_n43885_
 .subckt buf_x4 i=$abc$109383$new_n43799_ q=$abc$109383$new_n43886_
 .subckt buf_x4 i=$abc$109383$new_n43886_ q=$abc$109383$new_n43887_
-.subckt mx2_x2 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[19][1] i1=soc.ram.ram[23][1] q=$abc$109383$new_n43888_
+.subckt mux2_x1 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[19][1] i1=soc.ram.ram[23][1] q=$abc$109383$new_n43888_
 .subckt buf_x4 i=$abc$109383$new_n43546_ q=$abc$109383$new_n43889_
 .subckt buf_x4 i=$abc$109383$new_n43889_ q=$abc$109383$new_n43890_
-.subckt oa22_x2 i0=$abc$109383$new_n43890_ i1=$abc$109383$new_n43888_ i2=$abc$109383$new_n43855_ q=$abc$109383$new_n43891_
-.subckt ao22_x2 i0=$abc$109383$new_n43891_ i1=$abc$109383$new_n43885_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n43892_
-.subckt oa22_x2 i0=$abc$109383$new_n43892_ i1=$abc$109383$new_n43881_ i2=$abc$109383$new_n43865_ q=$abc$109383$new_n43893_
-.subckt ao22_x2 i0=$abc$109383$new_n43893_ i1=$abc$109383$new_n43864_ i2=$abc$109383$new_n43840_ q=$abc$109383$new_n43894_
+.subckt or21nand_x1 i0=$abc$109383$new_n43890_ i1=$abc$109383$new_n43888_ i2=$abc$109383$new_n43855_ nq=$abc$109383$new_n43891_
+.subckt and21nor_x1 i0=$abc$109383$new_n43891_ i1=$abc$109383$new_n43885_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n43892_
+.subckt or21nand_x1 i0=$abc$109383$new_n43892_ i1=$abc$109383$new_n43881_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n43893_
+.subckt and21nor_x1 i0=$abc$109383$new_n43893_ i1=$abc$109383$new_n43864_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n43894_
 .subckt nand2_x0 i0=$abc$109383$new_n43894_ i1=$abc$109383$new_n43835_ nq=$abc$109383$new_n43895_
 .subckt buf_x4 i=$abc$109383$new_n43647_ q=$abc$109383$new_n43896_
 .subckt buf_x4 i=$abc$109383$new_n43896_ q=$abc$109383$new_n43897_
@@ -29180,17 +29180,17 @@
 .subckt buf_x4 i=$abc$109383$new_n43742_ q=$abc$109383$new_n43906_
 .subckt buf_x4 i=$abc$109383$new_n43906_ q=$abc$109383$new_n43907_
 .subckt buf_x4 i=$abc$109383$new_n43907_ q=$abc$109383$new_n43908_
-.subckt mx2_x2 cmd=$abc$109383$new_n43908_ i0=soc.ram.ram[42][1] i1=soc.ram.ram[46][1] q=$abc$109383$new_n43909_
-.subckt a2_x2 i0=$abc$109383$new_n43909_ i1=$abc$109383$new_n43905_ q=$abc$109383$new_n43910_
+.subckt mux2_x1 cmd=$abc$109383$new_n43908_ i0=soc.ram.ram[42][1] i1=soc.ram.ram[46][1] q=$abc$109383$new_n43909_
+.subckt and2_x1 i0=$abc$109383$new_n43909_ i1=$abc$109383$new_n43905_ q=$abc$109383$new_n43910_
 .subckt buf_x4 i=$abc$109383$new_n43544_ q=$abc$109383$new_n43911_
 .subckt buf_x4 i=$abc$109383$new_n43911_ q=$abc$109383$new_n43912_
 .subckt buf_x4 i=$abc$109383$new_n43362_ q=$abc$109383$new_n43913_
 .subckt buf_x4 i=$abc$109383$new_n43913_ q=$abc$109383$new_n43914_
 .subckt buf_x4 i=$abc$109383$new_n43748_ q=$abc$109383$new_n43915_
-.subckt ao22_x2 i0=soc.ram.ram[43][1] i1=$abc$109383$new_n43915_ i2=$abc$109383$new_n43914_ q=$abc$109383$new_n43916_
-.subckt ao22_x2 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[47][1] i2=$abc$109383$new_n43916_ q=$abc$109383$new_n43917_
-.subckt o2_x2 i0=$abc$109383$new_n43917_ i1=$abc$109383$new_n43912_ q=$abc$109383$new_n43918_
-.subckt o2_x2 i0=$abc$109383$new_n43918_ i1=$abc$109383$new_n43910_ q=$abc$109383$new_n43919_
+.subckt and21nor_x1 i0=soc.ram.ram[43][1] i1=$abc$109383$new_n43915_ i2=$abc$109383$new_n43914_ nq=$abc$109383$new_n43916_
+.subckt and21nor_x1 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[47][1] i2=$abc$109383$new_n43916_ nq=$abc$109383$new_n43917_
+.subckt or2_x1 i0=$abc$109383$new_n43917_ i1=$abc$109383$new_n43912_ q=$abc$109383$new_n43918_
+.subckt or2_x1 i0=$abc$109383$new_n43918_ i1=$abc$109383$new_n43910_ q=$abc$109383$new_n43919_
 .subckt buf_x4 i=$abc$109383$new_n43324_ q=$abc$109383$new_n43920_
 .subckt buf_x4 i=$abc$109383$new_n43920_ q=$abc$109383$new_n43921_
 .subckt buf_x4 i=$abc$109383$new_n43921_ q=$abc$109383$new_n43922_
@@ -29199,24 +29199,24 @@
 .subckt buf_x4 i=$abc$109383$new_n43380_ q=$abc$109383$new_n43925_
 .subckt buf_x4 i=$abc$109383$new_n43925_ q=$abc$109383$new_n43926_
 .subckt buf_x4 i=$abc$109383$new_n43926_ q=$abc$109383$new_n43927_
-.subckt ao22_x2 i0=soc.ram.ram[41][1] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ q=$abc$109383$new_n43928_
+.subckt and21nor_x1 i0=soc.ram.ram[41][1] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ nq=$abc$109383$new_n43928_
 .subckt buf_x4 i=$abc$109383$new_n43364_ q=$abc$109383$new_n43929_
 .subckt buf_x4 i=$abc$109383$new_n43929_ q=$abc$109383$new_n43930_
 .subckt buf_x4 i=$abc$109383$new_n43930_ q=$abc$109383$new_n43931_
 .subckt buf_x4 i=$abc$109383$new_n43931_ q=$abc$109383$new_n43932_
-.subckt ao22_x2 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[45][1] i2=$abc$109383$new_n43928_ q=$abc$109383$new_n43933_
+.subckt and21nor_x1 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[45][1] i2=$abc$109383$new_n43928_ nq=$abc$109383$new_n43933_
 .subckt buf_x4 i=$abc$109383$new_n43580_ q=$abc$109383$new_n43934_
 .subckt buf_x4 i=$abc$109383$new_n43934_ q=$abc$109383$new_n43935_
 .subckt buf_x4 i=$abc$109383$new_n43378_ q=$abc$109383$new_n43936_
 .subckt buf_x4 i=$abc$109383$new_n43936_ q=$abc$109383$new_n43937_
 .subckt buf_x4 i=$abc$109383$new_n43937_ q=$abc$109383$new_n43938_
 .subckt buf_x4 i=$abc$109383$new_n43938_ q=$abc$109383$new_n43939_
-.subckt mx2_x2 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[40][1] i1=soc.ram.ram[44][1] q=$abc$109383$new_n43940_
+.subckt mux2_x1 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[40][1] i1=soc.ram.ram[44][1] q=$abc$109383$new_n43940_
 .subckt buf_x4 i=$abc$109383$new_n43434_ q=$abc$109383$new_n43941_
 .subckt buf_x4 i=$abc$109383$new_n43941_ q=$abc$109383$new_n43942_
 .subckt buf_x4 i=$abc$109383$new_n43942_ q=$abc$109383$new_n43943_
-.subckt oa22_x2 i0=$abc$109383$new_n43943_ i1=$abc$109383$new_n43940_ i2=$abc$109383$new_n43935_ q=$abc$109383$new_n43944_
-.subckt ao22_x2 i0=$abc$109383$new_n43944_ i1=$abc$109383$new_n43933_ i2=$abc$109383$new_n43922_ q=$abc$109383$new_n43945_
+.subckt or21nand_x1 i0=$abc$109383$new_n43943_ i1=$abc$109383$new_n43940_ i2=$abc$109383$new_n43935_ nq=$abc$109383$new_n43944_
+.subckt and21nor_x1 i0=$abc$109383$new_n43944_ i1=$abc$109383$new_n43933_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n43945_
 .subckt nand2_x0 i0=$abc$109383$new_n43945_ i1=$abc$109383$new_n43919_ nq=$abc$109383$new_n43946_
 .subckt buf_x4 i=$abc$109383$new_n43532_ q=$abc$109383$new_n43947_
 .subckt buf_x4 i=$abc$109383$new_n43947_ q=$abc$109383$new_n43948_
@@ -29227,7 +29227,7 @@
 .subckt buf_x4 i=$abc$109383$new_n43952_ q=$abc$109383$new_n43953_
 .subckt buf_x4 i=$abc$109383$new_n43953_ q=$abc$109383$new_n43954_
 .subckt buf_x4 i=$abc$109383$new_n43954_ q=$abc$109383$new_n43955_
-.subckt mx2_x2 cmd=$abc$109383$new_n43955_ i0=soc.ram.ram[58][1] i1=soc.ram.ram[62][1] q=$abc$109383$new_n43956_
+.subckt mux2_x1 cmd=$abc$109383$new_n43955_ i0=soc.ram.ram[58][1] i1=soc.ram.ram[62][1] q=$abc$109383$new_n43956_
 .subckt nand2_x0 i0=$abc$109383$new_n43956_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n43957_
 .subckt buf_x4 i=$abc$109383$new_n43852_ q=$abc$109383$new_n43958_
 .subckt inv_x0 i=soc.ram.ram[63][1] nq=$abc$109383$new_n43959_
@@ -29239,75 +29239,75 @@
 .subckt buf_x4 i=$abc$109383$new_n43520_ q=$abc$109383$new_n43965_
 .subckt buf_x4 i=$abc$109383$new_n43965_ q=$abc$109383$new_n43966_
 .subckt buf_x4 i=$abc$109383$new_n43966_ q=$abc$109383$new_n43967_
-.subckt ao22_x2 i0=soc.ram.ram[59][1] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n43964_ q=$abc$109383$new_n43968_
+.subckt and21nor_x1 i0=soc.ram.ram[59][1] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n43964_ nq=$abc$109383$new_n43968_
 .subckt nand2_x0 i0=$abc$109383$new_n43968_ i1=$abc$109383$new_n43960_ nq=$abc$109383$new_n43969_
 .subckt nand3_x0 i0=$abc$109383$new_n43969_ i1=$abc$109383$new_n43957_ i2=$abc$109383$new_n43950_ nq=$abc$109383$new_n43970_
 .subckt buf_x4 i=$abc$109383$new_n43593_ q=$abc$109383$new_n43971_
 .subckt buf_x4 i=$abc$109383$new_n43889_ q=$abc$109383$new_n43972_
 .subckt buf_x4 i=$abc$109383$new_n43972_ q=$abc$109383$new_n43973_
-.subckt ao22_x2 i0=soc.ram.ram[57][1] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n43974_
-.subckt ao22_x2 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[61][1] i2=$abc$109383$new_n43974_ q=$abc$109383$new_n43975_
+.subckt and21nor_x1 i0=soc.ram.ram[57][1] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n43974_
+.subckt and21nor_x1 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[61][1] i2=$abc$109383$new_n43974_ nq=$abc$109383$new_n43975_
 .subckt buf_x4 i=$abc$109383$new_n43684_ q=$abc$109383$new_n43976_
 .subckt buf_x4 i=$abc$109383$new_n43976_ q=$abc$109383$new_n43977_
 .subckt buf_x4 i=$abc$109383$new_n43977_ q=$abc$109383$new_n43978_
-.subckt mx2_x2 cmd=$abc$109383$new_n43978_ i0=soc.ram.ram[56][1] i1=soc.ram.ram[60][1] q=$abc$109383$new_n43979_
+.subckt mux2_x1 cmd=$abc$109383$new_n43978_ i0=soc.ram.ram[56][1] i1=soc.ram.ram[60][1] q=$abc$109383$new_n43979_
 .subckt buf_x4 i=$abc$109383$new_n43759_ q=$abc$109383$new_n43980_
 .subckt buf_x4 i=$abc$109383$new_n43980_ q=$abc$109383$new_n43981_
-.subckt oa22_x2 i0=$abc$109383$new_n43981_ i1=$abc$109383$new_n43979_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n43982_
-.subckt ao22_x2 i0=$abc$109383$new_n43982_ i1=$abc$109383$new_n43975_ i2=$abc$109383$new_n43971_ q=$abc$109383$new_n43983_
+.subckt or21nand_x1 i0=$abc$109383$new_n43981_ i1=$abc$109383$new_n43979_ i2=$abc$109383$new_n43843_ nq=$abc$109383$new_n43982_
+.subckt and21nor_x1 i0=$abc$109383$new_n43982_ i1=$abc$109383$new_n43975_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n43983_
 .subckt nand2_x0 i0=$abc$109383$new_n43983_ i1=$abc$109383$new_n43970_ nq=$abc$109383$new_n43984_
 .subckt nand3_x0 i0=$abc$109383$new_n43984_ i1=$abc$109383$new_n43946_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n43985_
 .subckt buf_x4 i=$abc$109383$new_n43861_ q=$abc$109383$new_n43986_
 .subckt buf_x4 i=$abc$109383$new_n43691_ q=$abc$109383$new_n43987_
-.subckt mx2_x2 cmd=$abc$109383$new_n43987_ i0=soc.ram.ram[8][1] i1=soc.ram.ram[9][1] q=$abc$109383$new_n43988_
-.subckt o2_x2 i0=$abc$109383$new_n43988_ i1=$abc$109383$new_n43986_ q=$abc$109383$new_n43989_
+.subckt mux2_x1 cmd=$abc$109383$new_n43987_ i0=soc.ram.ram[8][1] i1=soc.ram.ram[9][1] q=$abc$109383$new_n43988_
+.subckt or2_x1 i0=$abc$109383$new_n43988_ i1=$abc$109383$new_n43986_ q=$abc$109383$new_n43989_
 .subckt buf_x4 i=$abc$109383$new_n43372_ q=$abc$109383$new_n43990_
 .subckt buf_x4 i=$abc$109383$new_n43990_ q=$abc$109383$new_n43991_
 .subckt buf_x4 i=$abc$109383$new_n43913_ q=$abc$109383$new_n43992_
-.subckt mx2_x2 cmd=$abc$109383$new_n43992_ i0=soc.ram.ram[12][1] i1=soc.ram.ram[13][1] q=$abc$109383$new_n43993_
-.subckt ao22_x2 i0=$abc$109383$new_n43993_ i1=$abc$109383$new_n43932_ i2=$abc$109383$new_n43991_ q=$abc$109383$new_n43994_
+.subckt mux2_x1 cmd=$abc$109383$new_n43992_ i0=soc.ram.ram[12][1] i1=soc.ram.ram[13][1] q=$abc$109383$new_n43993_
+.subckt and21nor_x1 i0=$abc$109383$new_n43993_ i1=$abc$109383$new_n43932_ i2=$abc$109383$new_n43991_ nq=$abc$109383$new_n43994_
 .subckt nand2_x0 i0=$abc$109383$new_n43994_ i1=$abc$109383$new_n43989_ nq=$abc$109383$new_n43995_
 .subckt buf_x4 i=$abc$109383$new_n43556_ q=$abc$109383$new_n43996_
 .subckt buf_x4 i=$abc$109383$new_n43996_ q=$abc$109383$new_n43997_
 .subckt buf_x4 i=$abc$109383$new_n43997_ q=$abc$109383$new_n43998_
-.subckt mx2_x2 cmd=$abc$109383$new_n43998_ i0=soc.ram.ram[10][1] i1=soc.ram.ram[11][1] q=$abc$109383$new_n43999_
-.subckt o2_x2 i0=$abc$109383$new_n43999_ i1=$abc$109383$new_n43967_ q=$abc$109383$new_n44000_
+.subckt mux2_x1 cmd=$abc$109383$new_n43998_ i0=soc.ram.ram[10][1] i1=soc.ram.ram[11][1] q=$abc$109383$new_n43999_
+.subckt or2_x1 i0=$abc$109383$new_n43999_ i1=$abc$109383$new_n43967_ q=$abc$109383$new_n44000_
 .subckt buf_x4 i=$abc$109383$new_n43797_ q=$abc$109383$new_n44001_
-.subckt mx2_x2 cmd=$abc$109383$new_n44001_ i0=soc.ram.ram[14][1] i1=soc.ram.ram[15][1] q=$abc$109383$new_n44002_
-.subckt ao22_x2 i0=$abc$109383$new_n44002_ i1=$abc$109383$new_n43932_ i2=$abc$109383$new_n43949_ q=$abc$109383$new_n44003_
+.subckt mux2_x1 cmd=$abc$109383$new_n44001_ i0=soc.ram.ram[14][1] i1=soc.ram.ram[15][1] q=$abc$109383$new_n44002_
+.subckt and21nor_x1 i0=$abc$109383$new_n44002_ i1=$abc$109383$new_n43932_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n44003_
 .subckt nand2_x0 i0=$abc$109383$new_n44003_ i1=$abc$109383$new_n44000_ nq=$abc$109383$new_n44004_
-.subckt oa22_x2 i0=$abc$109383$new_n44004_ i1=$abc$109383$new_n43995_ i2=$abc$109383$new_n43971_ q=$abc$109383$new_n44005_
+.subckt or21nand_x1 i0=$abc$109383$new_n44004_ i1=$abc$109383$new_n43995_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n44005_
 .subckt buf_x4 i=$abc$109383$new_n43780_ q=$abc$109383$new_n44006_
 .subckt buf_x4 i=$abc$109383$new_n44006_ q=$abc$109383$new_n44007_
 .subckt buf_x4 i=$abc$109383$new_n43737_ q=$abc$109383$new_n44008_
 .subckt buf_x4 i=$abc$109383$new_n44008_ q=$abc$109383$new_n44009_
 .subckt buf_x4 i=$abc$109383$new_n43441_ q=$abc$109383$new_n44010_
 .subckt buf_x4 i=$abc$109383$new_n44010_ q=$abc$109383$new_n44011_
-.subckt mx2_x2 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[24][1] i1=soc.ram.ram[28][1] q=$abc$109383$new_n44012_
+.subckt mux2_x1 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[24][1] i1=soc.ram.ram[28][1] q=$abc$109383$new_n44012_
 .subckt nand2_x0 i0=$abc$109383$new_n44012_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n44013_
 .subckt nor2_x0 i0=soc.ram.ram[25][1] i1=$abc$109383$new_n43908_ nq=$abc$109383$new_n44014_
 .subckt buf_x4 i=$abc$109383$new_n43759_ q=$abc$109383$new_n44015_
 .subckt buf_x4 i=$abc$109383$new_n43624_ q=$abc$109383$new_n44016_
 .subckt buf_x4 i=$abc$109383$new_n44016_ q=$abc$109383$new_n44017_
 .subckt inv_x0 i=soc.ram.ram[29][1] nq=$abc$109383$new_n44018_
-.subckt oa22_x2 i0=$abc$109383$new_n44018_ i1=$abc$109383$new_n44017_ i2=$abc$109383$new_n44015_ q=$abc$109383$new_n44019_
-.subckt ao22_x2 i0=$abc$109383$new_n44019_ i1=$abc$109383$new_n44014_ i2=$abc$109383$new_n44013_ q=$abc$109383$new_n44020_
-.subckt a2_x2 i0=$abc$109383$new_n44020_ i1=$abc$109383$new_n43912_ q=$abc$109383$new_n44021_
+.subckt or21nand_x1 i0=$abc$109383$new_n44018_ i1=$abc$109383$new_n44017_ i2=$abc$109383$new_n44015_ nq=$abc$109383$new_n44019_
+.subckt and21nor_x1 i0=$abc$109383$new_n44019_ i1=$abc$109383$new_n44014_ i2=$abc$109383$new_n44013_ nq=$abc$109383$new_n44020_
+.subckt and2_x1 i0=$abc$109383$new_n44020_ i1=$abc$109383$new_n43912_ q=$abc$109383$new_n44021_
 .subckt buf_x4 i=$abc$109383$new_n43954_ q=$abc$109383$new_n44022_
 .subckt inv_x0 i=soc.ram.ram[31][1] nq=$abc$109383$new_n44023_
 .subckt nand2_x0 i0=$abc$109383$new_n44023_ i1=$abc$109383$new_n44022_ nq=$abc$109383$new_n44024_
 .subckt buf_x4 i=$abc$109383$new_n43533_ q=$abc$109383$new_n44025_
 .subckt buf_x4 i=$abc$109383$new_n44025_ q=$abc$109383$new_n44026_
 .subckt buf_x4 i=$abc$109383$new_n44026_ q=$abc$109383$new_n44027_
-.subckt ao22_x2 i0=soc.ram.ram[27][1] i1=$abc$109383$new_n44027_ i2=$abc$109383$new_n43963_ q=$abc$109383$new_n44028_
+.subckt and21nor_x1 i0=soc.ram.ram[27][1] i1=$abc$109383$new_n44027_ i2=$abc$109383$new_n43963_ nq=$abc$109383$new_n44028_
 .subckt nand2_x0 i0=$abc$109383$new_n44028_ i1=$abc$109383$new_n44024_ nq=$abc$109383$new_n44029_
 .subckt buf_x4 i=$abc$109383$new_n43665_ q=$abc$109383$new_n44030_
 .subckt buf_x4 i=$abc$109383$new_n43508_ q=$abc$109383$new_n44031_
-.subckt mx2_x2 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[26][1] i1=soc.ram.ram[30][1] q=$abc$109383$new_n44032_
+.subckt mux2_x1 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[26][1] i1=soc.ram.ram[30][1] q=$abc$109383$new_n44032_
 .subckt nand2_x0 i0=$abc$109383$new_n44032_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n44033_
-.subckt a2_x2 i0=$abc$109383$new_n44033_ i1=$abc$109383$new_n44030_ q=$abc$109383$new_n44034_
-.subckt oa22_x2 i0=$abc$109383$new_n44034_ i1=$abc$109383$new_n44029_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n44035_
-.subckt ao22_x2 i0=$abc$109383$new_n44035_ i1=$abc$109383$new_n44021_ i2=$abc$109383$new_n44007_ q=$abc$109383$new_n44036_
+.subckt and2_x1 i0=$abc$109383$new_n44033_ i1=$abc$109383$new_n44030_ q=$abc$109383$new_n44034_
+.subckt or21nand_x1 i0=$abc$109383$new_n44034_ i1=$abc$109383$new_n44029_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n44035_
+.subckt and21nor_x1 i0=$abc$109383$new_n44035_ i1=$abc$109383$new_n44021_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n44036_
 .subckt nand2_x0 i0=$abc$109383$new_n44036_ i1=$abc$109383$new_n44005_ nq=$abc$109383$new_n44037_
 .subckt nand3_x0 i0=$abc$109383$new_n44037_ i1=$abc$109383$new_n43985_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n44038_
 .subckt nand3_x0 i0=$abc$109383$new_n44038_ i1=$abc$109383$new_n43895_ i2=$abc$109383$new_n43591_ nq=$abc$109383$new_n44039_
@@ -29316,47 +29316,47 @@
 .subckt buf_x4 i=$abc$109383$new_n43502_ q=$abc$109383$new_n44042_
 .subckt buf_x4 i=$abc$109383$new_n44042_ q=$abc$109383$new_n44043_
 .subckt buf_x4 i=$abc$109383$new_n43718_ q=$abc$109383$new_n44044_
-.subckt mx2_x2 cmd=$abc$109383$new_n44044_ i0=soc.ram.ram[90][1] i1=soc.ram.ram[91][1] q=$abc$109383$new_n44045_
-.subckt a2_x2 i0=$abc$109383$new_n44045_ i1=$abc$109383$new_n44043_ q=$abc$109383$new_n44046_
+.subckt mux2_x1 cmd=$abc$109383$new_n44044_ i0=soc.ram.ram[90][1] i1=soc.ram.ram[91][1] q=$abc$109383$new_n44045_
+.subckt and2_x1 i0=$abc$109383$new_n44045_ i1=$abc$109383$new_n44043_ q=$abc$109383$new_n44046_
 .subckt buf_x4 i=$abc$109383$new_n43361_ q=$abc$109383$new_n44047_
-.subckt mx2_x2 cmd=$abc$109383$new_n44047_ i0=soc.ram.ram[94][1] i1=soc.ram.ram[95][1] q=$abc$109383$new_n44048_
-.subckt oa22_x2 i0=$abc$109383$new_n44048_ i1=$abc$109383$new_n43965_ i2=$abc$109383$new_n43372_ q=$abc$109383$new_n44049_
+.subckt mux2_x1 cmd=$abc$109383$new_n44047_ i0=soc.ram.ram[94][1] i1=soc.ram.ram[95][1] q=$abc$109383$new_n44048_
+.subckt or21nand_x1 i0=$abc$109383$new_n44048_ i1=$abc$109383$new_n43965_ i2=$abc$109383$new_n43372_ nq=$abc$109383$new_n44049_
 .subckt nor2_x0 i0=$abc$109383$new_n44049_ i1=$abc$109383$new_n44046_ nq=$abc$109383$new_n44050_
-.subckt mx2_x2 cmd=$abc$109383$new_n43444_ i0=soc.ram.ram[88][1] i1=soc.ram.ram[89][1] q=$abc$109383$new_n44051_
-.subckt a2_x2 i0=$abc$109383$new_n44051_ i1=$abc$109383$new_n44043_ q=$abc$109383$new_n44052_
+.subckt mux2_x1 cmd=$abc$109383$new_n43444_ i0=soc.ram.ram[88][1] i1=soc.ram.ram[89][1] q=$abc$109383$new_n44051_
+.subckt and2_x1 i0=$abc$109383$new_n44051_ i1=$abc$109383$new_n44043_ q=$abc$109383$new_n44052_
 .subckt buf_x4 i=$abc$109383$new_n43393_ q=$abc$109383$new_n44053_
-.subckt mx2_x2 cmd=$abc$109383$new_n44053_ i0=soc.ram.ram[92][1] i1=soc.ram.ram[93][1] q=$abc$109383$new_n44054_
-.subckt oa22_x2 i0=$abc$109383$new_n44054_ i1=$abc$109383$new_n43477_ i2=$abc$109383$new_n43458_ q=$abc$109383$new_n44055_
+.subckt mux2_x1 cmd=$abc$109383$new_n44053_ i0=soc.ram.ram[92][1] i1=soc.ram.ram[93][1] q=$abc$109383$new_n44054_
+.subckt or21nand_x1 i0=$abc$109383$new_n44054_ i1=$abc$109383$new_n43477_ i2=$abc$109383$new_n43458_ nq=$abc$109383$new_n44055_
 .subckt nor2_x0 i0=$abc$109383$new_n44055_ i1=$abc$109383$new_n44052_ nq=$abc$109383$new_n44056_
-.subckt ao22_x2 i0=$abc$109383$new_n44056_ i1=$abc$109383$new_n44050_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n44057_
+.subckt and21nor_x1 i0=$abc$109383$new_n44056_ i1=$abc$109383$new_n44050_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n44057_
 .subckt nand2_x0 i0=soc.ram.ram[77][1] i1=$abc$109383$new_n43331_ nq=$abc$109383$new_n44058_
 .subckt inv_x0 i=soc.ram.ram[79][1] nq=$abc$109383$new_n44059_
 .subckt buf_x4 i=$abc$109383$new_n43328_ q=$abc$109383$new_n44060_
 .subckt buf_x4 i=$abc$109383$new_n44060_ q=$abc$109383$new_n44061_
-.subckt ao22_x2 i0=$abc$109383$new_n44061_ i1=$abc$109383$new_n44059_ i2=$abc$109383$new_n43744_ q=$abc$109383$new_n44062_
+.subckt and21nor_x1 i0=$abc$109383$new_n44061_ i1=$abc$109383$new_n44059_ i2=$abc$109383$new_n43744_ nq=$abc$109383$new_n44062_
 .subckt nand2_x0 i0=$abc$109383$new_n44062_ i1=$abc$109383$new_n44058_ nq=$abc$109383$new_n44063_
 .subckt buf_x4 i=$abc$109383$new_n44053_ q=$abc$109383$new_n44064_
 .subckt buf_x4 i=$abc$109383$new_n44064_ q=$abc$109383$new_n44065_
 .subckt buf_x4 i=$abc$109383$new_n43385_ q=$abc$109383$new_n44066_
-.subckt oa22_x2 i0=$abc$109383$new_n43532_ i1=soc.ram.ram[75][1] i2=$abc$109383$new_n44066_ q=$abc$109383$new_n44067_
-.subckt oa22_x2 i0=$abc$109383$new_n43724_ i1=soc.ram.ram[73][1] i2=$abc$109383$new_n44067_ q=$abc$109383$new_n44068_
-.subckt a2_x2 i0=$abc$109383$new_n44068_ i1=$abc$109383$new_n44065_ q=$abc$109383$new_n44069_
+.subckt or21nand_x1 i0=$abc$109383$new_n43532_ i1=soc.ram.ram[75][1] i2=$abc$109383$new_n44066_ nq=$abc$109383$new_n44067_
+.subckt or21nand_x1 i0=$abc$109383$new_n43724_ i1=soc.ram.ram[73][1] i2=$abc$109383$new_n44067_ nq=$abc$109383$new_n44068_
+.subckt and2_x1 i0=$abc$109383$new_n44068_ i1=$abc$109383$new_n44065_ q=$abc$109383$new_n44069_
 .subckt nand2_x0 i0=$abc$109383$new_n44069_ i1=$abc$109383$new_n44063_ nq=$abc$109383$new_n44070_
 .subckt nand2_x0 i0=soc.ram.ram[76][1] i1=$abc$109383$new_n43330_ nq=$abc$109383$new_n44071_
 .subckt buf_x4 i=$abc$109383$new_n43424_ q=$abc$109383$new_n44072_
 .subckt buf_x4 i=$abc$109383$new_n44072_ q=$abc$109383$new_n44073_
 .subckt inv_x0 i=soc.ram.ram[78][1] nq=$abc$109383$new_n44074_
 .subckt buf_x4 i=$abc$109383$new_n43542_ q=$abc$109383$new_n44075_
-.subckt ao22_x2 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n44074_ i2=$abc$109383$new_n44073_ q=$abc$109383$new_n44076_
-.subckt a2_x2 i0=$abc$109383$new_n44076_ i1=$abc$109383$new_n44071_ q=$abc$109383$new_n44077_
+.subckt and21nor_x1 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n44074_ i2=$abc$109383$new_n44073_ nq=$abc$109383$new_n44076_
+.subckt and2_x1 i0=$abc$109383$new_n44076_ i1=$abc$109383$new_n44071_ q=$abc$109383$new_n44077_
 .subckt buf_x4 i=$abc$109383$new_n43616_ q=$abc$109383$new_n44078_
-.subckt oa22_x2 i0=$abc$109383$new_n43438_ i1=soc.ram.ram[74][1] i2=$abc$109383$new_n43396_ q=$abc$109383$new_n44079_
+.subckt or21nand_x1 i0=$abc$109383$new_n43438_ i1=soc.ram.ram[74][1] i2=$abc$109383$new_n43396_ nq=$abc$109383$new_n44079_
 .subckt buf_x4 i=$abc$109383$new_n43542_ q=$abc$109383$new_n44080_
-.subckt oa22_x2 i0=$abc$109383$new_n44080_ i1=soc.ram.ram[72][1] i2=$abc$109383$new_n44079_ q=$abc$109383$new_n44081_
+.subckt or21nand_x1 i0=$abc$109383$new_n44080_ i1=soc.ram.ram[72][1] i2=$abc$109383$new_n44079_ nq=$abc$109383$new_n44081_
 .subckt nand2_x0 i0=$abc$109383$new_n44081_ i1=$abc$109383$new_n44078_ nq=$abc$109383$new_n44082_
-.subckt ao22_x2 i0=$abc$109383$new_n44082_ i1=$abc$109383$new_n44077_ i2=$abc$109383$new_n43920_ q=$abc$109383$new_n44083_
-.subckt a2_x2 i0=$abc$109383$new_n44083_ i1=$abc$109383$new_n44070_ q=$abc$109383$new_n44084_
-.subckt ao22_x2 i0=$abc$109383$new_n44084_ i1=$abc$109383$new_n44057_ i2=$abc$109383$new_n43769_ q=$abc$109383$new_n44085_
+.subckt and21nor_x1 i0=$abc$109383$new_n44082_ i1=$abc$109383$new_n44077_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n44083_
+.subckt and2_x1 i0=$abc$109383$new_n44083_ i1=$abc$109383$new_n44070_ q=$abc$109383$new_n44084_
+.subckt and21nor_x1 i0=$abc$109383$new_n44084_ i1=$abc$109383$new_n44057_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n44085_
 .subckt buf_x4 i=$abc$109383$new_n43392_ q=$abc$109383$new_n44086_
 .subckt buf_x4 i=$abc$109383$new_n44086_ q=$abc$109383$new_n44087_
 .subckt buf_x4 i=$abc$109383$new_n43925_ q=$abc$109383$new_n44088_
@@ -29365,49 +29365,49 @@
 .subckt buf_x4 i=$abc$109383$new_n43394_ q=$abc$109383$new_n44091_
 .subckt buf_x4 i=$abc$109383$new_n43799_ q=$abc$109383$new_n44092_
 .subckt buf_x4 i=$abc$109383$new_n44092_ q=$abc$109383$new_n44093_
-.subckt ao22_x2 i0=soc.ram.ram[83][1] i1=$abc$109383$new_n44093_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n44094_
+.subckt and21nor_x1 i0=soc.ram.ram[83][1] i1=$abc$109383$new_n44093_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n44094_
 .subckt nand2_x0 i0=$abc$109383$new_n44094_ i1=$abc$109383$new_n44090_ nq=$abc$109383$new_n44095_
 .subckt buf_x4 i=$abc$109383$new_n43402_ q=$abc$109383$new_n44096_
 .subckt buf_x4 i=$abc$109383$new_n43384_ q=$abc$109383$new_n44097_
 .subckt buf_x4 i=$abc$109383$new_n43367_ q=$abc$109383$new_n44098_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[82][1] i1=soc.ram.ram[86][1] q=$abc$109383$new_n44099_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[82][1] i1=soc.ram.ram[86][1] q=$abc$109383$new_n44099_
 .subckt nand2_x0 i0=$abc$109383$new_n44099_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n44100_
-.subckt a2_x2 i0=$abc$109383$new_n44100_ i1=$abc$109383$new_n44096_ q=$abc$109383$new_n44101_
-.subckt a2_x2 i0=$abc$109383$new_n44101_ i1=$abc$109383$new_n44095_ q=$abc$109383$new_n44102_
+.subckt and2_x1 i0=$abc$109383$new_n44100_ i1=$abc$109383$new_n44096_ q=$abc$109383$new_n44101_
+.subckt and2_x1 i0=$abc$109383$new_n44101_ i1=$abc$109383$new_n44095_ q=$abc$109383$new_n44102_
 .subckt buf_x4 i=$abc$109383$new_n43633_ q=$abc$109383$new_n44103_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[80][1] i1=soc.ram.ram[84][1] q=$abc$109383$new_n44104_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[80][1] i1=soc.ram.ram[84][1] q=$abc$109383$new_n44104_
 .subckt nand2_x0 i0=$abc$109383$new_n44104_ i1=$abc$109383$new_n44103_ nq=$abc$109383$new_n44105_
 .subckt buf_x4 i=$abc$109383$new_n43796_ q=$abc$109383$new_n44106_
-.subckt o2_x2 i0=soc.ram.ram[81][1] i1=$abc$109383$new_n43692_ q=$abc$109383$new_n44107_
+.subckt or2_x1 i0=soc.ram.ram[81][1] i1=$abc$109383$new_n43692_ q=$abc$109383$new_n44107_
 .subckt nand2_x0 i0=$abc$109383$new_n44107_ i1=$abc$109383$new_n44106_ nq=$abc$109383$new_n44108_
 .subckt inv_x0 i=soc.ram.ram[85][1] nq=$abc$109383$new_n44109_
-.subckt a2_x2 i0=$abc$109383$new_n44109_ i1=$abc$109383$new_n44066_ q=$abc$109383$new_n44110_
-.subckt ao22_x2 i0=$abc$109383$new_n44110_ i1=$abc$109383$new_n44108_ i2=$abc$109383$new_n44105_ q=$abc$109383$new_n44111_
-.subckt a2_x2 i0=$abc$109383$new_n44111_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n44112_
-.subckt ao22_x2 i0=$abc$109383$new_n44112_ i1=$abc$109383$new_n44102_ i2=$abc$109383$new_n43540_ q=$abc$109383$new_n44113_
+.subckt and2_x1 i0=$abc$109383$new_n44109_ i1=$abc$109383$new_n44066_ q=$abc$109383$new_n44110_
+.subckt and21nor_x1 i0=$abc$109383$new_n44110_ i1=$abc$109383$new_n44108_ i2=$abc$109383$new_n44105_ nq=$abc$109383$new_n44111_
+.subckt and2_x1 i0=$abc$109383$new_n44111_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n44112_
+.subckt and21nor_x1 i0=$abc$109383$new_n44112_ i1=$abc$109383$new_n44102_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n44113_
 .subckt buf_x4 i=$abc$109383$new_n43714_ q=$abc$109383$new_n44114_
 .subckt buf_x4 i=$abc$109383$new_n44080_ q=$abc$109383$new_n44115_
 .subckt inv_x0 i=soc.ram.ram[69][1] nq=$abc$109383$new_n44116_
 .subckt nand2_x0 i0=$abc$109383$new_n44116_ i1=$abc$109383$new_n43825_ nq=$abc$109383$new_n44117_
 .subckt buf_x4 i=$abc$109383$new_n43627_ q=$abc$109383$new_n44118_
-.subckt ao22_x2 i0=soc.ram.ram[65][1] i1=$abc$109383$new_n44118_ i2=$abc$109383$new_n43847_ q=$abc$109383$new_n44119_
+.subckt and21nor_x1 i0=soc.ram.ram[65][1] i1=$abc$109383$new_n44118_ i2=$abc$109383$new_n43847_ nq=$abc$109383$new_n44119_
 .subckt nand2_x0 i0=$abc$109383$new_n44119_ i1=$abc$109383$new_n44117_ nq=$abc$109383$new_n44120_
 .subckt buf_x4 i=$abc$109383$new_n43487_ q=$abc$109383$new_n44121_
 .subckt buf_x4 i=$abc$109383$new_n44121_ q=$abc$109383$new_n44122_
-.subckt mx2_x2 cmd=$abc$109383$new_n43700_ i0=soc.ram.ram[64][1] i1=soc.ram.ram[68][1] q=$abc$109383$new_n44123_
+.subckt mux2_x1 cmd=$abc$109383$new_n43700_ i0=soc.ram.ram[64][1] i1=soc.ram.ram[68][1] q=$abc$109383$new_n44123_
 .subckt nand2_x0 i0=$abc$109383$new_n44123_ i1=$abc$109383$new_n44122_ nq=$abc$109383$new_n44124_
-.subckt a3_x2 i0=$abc$109383$new_n44124_ i1=$abc$109383$new_n44120_ i2=$abc$109383$new_n44115_ q=$abc$109383$new_n44125_
+.subckt and3_x1 i0=$abc$109383$new_n44124_ i1=$abc$109383$new_n44120_ i2=$abc$109383$new_n44115_ q=$abc$109383$new_n44125_
 .subckt inv_x0 i=soc.ram.ram[71][1] nq=$abc$109383$new_n44126_
 .subckt nand2_x0 i0=$abc$109383$new_n44126_ i1=$abc$109383$new_n43514_ nq=$abc$109383$new_n44127_
-.subckt ao22_x2 i0=soc.ram.ram[67][1] i1=$abc$109383$new_n43520_ i2=$abc$109383$new_n43517_ q=$abc$109383$new_n44128_
+.subckt and21nor_x1 i0=soc.ram.ram[67][1] i1=$abc$109383$new_n43520_ i2=$abc$109383$new_n43517_ nq=$abc$109383$new_n44128_
 .subckt nand2_x0 i0=$abc$109383$new_n44128_ i1=$abc$109383$new_n44127_ nq=$abc$109383$new_n44129_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[66][1] i1=soc.ram.ram[70][1] q=$abc$109383$new_n44130_
-.subckt a2_x2 i0=$abc$109383$new_n44130_ i1=$abc$109383$new_n43616_ q=$abc$109383$new_n44131_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[66][1] i1=soc.ram.ram[70][1] q=$abc$109383$new_n44130_
+.subckt and2_x1 i0=$abc$109383$new_n44130_ i1=$abc$109383$new_n43616_ q=$abc$109383$new_n44131_
 .subckt nor2_x0 i0=$abc$109383$new_n44131_ i1=$abc$109383$new_n43372_ nq=$abc$109383$new_n44132_
-.subckt a2_x2 i0=$abc$109383$new_n44132_ i1=$abc$109383$new_n44129_ q=$abc$109383$new_n44133_
-.subckt ao22_x2 i0=$abc$109383$new_n44133_ i1=$abc$109383$new_n44125_ i2=$abc$109383$new_n44114_ q=$abc$109383$new_n44134_
-.subckt ao22_x2 i0=$abc$109383$new_n44134_ i1=$abc$109383$new_n44113_ i2=$abc$109383$new_n44087_ q=$abc$109383$new_n44135_
-.subckt ao22_x2 i0=$abc$109383$new_n44135_ i1=$abc$109383$new_n44085_ i2=$abc$109383$new_n44007_ q=$abc$109383$new_n44136_
+.subckt and2_x1 i0=$abc$109383$new_n44132_ i1=$abc$109383$new_n44129_ q=$abc$109383$new_n44133_
+.subckt and21nor_x1 i0=$abc$109383$new_n44133_ i1=$abc$109383$new_n44125_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n44134_
+.subckt and21nor_x1 i0=$abc$109383$new_n44134_ i1=$abc$109383$new_n44113_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n44135_
+.subckt and21nor_x1 i0=$abc$109383$new_n44135_ i1=$abc$109383$new_n44085_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n44136_
 .subckt buf_x4 i=$abc$109383$new_n43936_ q=$abc$109383$new_n44137_
 .subckt buf_x4 i=$abc$109383$new_n44137_ q=$abc$109383$new_n44138_
 .subckt buf_x4 i=$abc$109383$new_n44138_ q=$abc$109383$new_n44139_
@@ -29418,108 +29418,108 @@
 .subckt buf_x4 i=$abc$109383$new_n43417_ q=$abc$109383$new_n44144_
 .subckt buf_x4 i=$abc$109383$new_n44144_ q=$abc$109383$new_n44145_
 .subckt buf_x4 i=$abc$109383$new_n44145_ q=$abc$109383$new_n44146_
-.subckt ao22_x2 i0=soc.ram.ram[107][1] i1=$abc$109383$new_n44146_ i2=$abc$109383$new_n44143_ q=$abc$109383$new_n44147_
+.subckt and21nor_x1 i0=soc.ram.ram[107][1] i1=$abc$109383$new_n44146_ i2=$abc$109383$new_n44143_ nq=$abc$109383$new_n44147_
 .subckt nand2_x0 i0=$abc$109383$new_n44147_ i1=$abc$109383$new_n44141_ nq=$abc$109383$new_n44148_
 .subckt buf_x4 i=$abc$109383$new_n43353_ q=$abc$109383$new_n44149_
 .subckt buf_x4 i=$abc$109383$new_n43428_ q=$abc$109383$new_n44150_
-.subckt mx2_x2 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[106][1] i1=soc.ram.ram[110][1] q=$abc$109383$new_n44151_
+.subckt mux2_x1 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[106][1] i1=soc.ram.ram[110][1] q=$abc$109383$new_n44151_
 .subckt nand2_x0 i0=$abc$109383$new_n44151_ i1=$abc$109383$new_n44150_ nq=$abc$109383$new_n44152_
-.subckt a2_x2 i0=$abc$109383$new_n44152_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n44153_
-.subckt a2_x2 i0=$abc$109383$new_n44153_ i1=$abc$109383$new_n44148_ q=$abc$109383$new_n44154_
+.subckt and2_x1 i0=$abc$109383$new_n44152_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n44153_
+.subckt and2_x1 i0=$abc$109383$new_n44153_ i1=$abc$109383$new_n44148_ q=$abc$109383$new_n44154_
 .subckt buf_x4 i=$abc$109383$new_n43724_ q=$abc$109383$new_n44155_
 .subckt buf_x4 i=$abc$109383$new_n44025_ q=$abc$109383$new_n44156_
-.subckt o2_x2 i0=soc.ram.ram[99][1] i1=$abc$109383$new_n44156_ q=$abc$109383$new_n44157_
+.subckt or2_x1 i0=soc.ram.ram[99][1] i1=$abc$109383$new_n44156_ q=$abc$109383$new_n44157_
 .subckt buf_x4 i=$abc$109383$new_n43365_ q=$abc$109383$new_n44158_
-.subckt ao22_x2 i0=soc.ram.ram[103][1] i1=$abc$109383$new_n44158_ i2=$abc$109383$new_n44064_ q=$abc$109383$new_n44159_
+.subckt and21nor_x1 i0=soc.ram.ram[103][1] i1=$abc$109383$new_n44158_ i2=$abc$109383$new_n44064_ nq=$abc$109383$new_n44159_
 .subckt nand2_x0 i0=$abc$109383$new_n44159_ i1=$abc$109383$new_n44157_ nq=$abc$109383$new_n44160_
 .subckt buf_x4 i=$abc$109383$new_n43389_ q=$abc$109383$new_n44161_
 .subckt buf_x4 i=$abc$109383$new_n44161_ q=$abc$109383$new_n44162_
 .subckt buf_x4 i=$abc$109383$new_n43474_ q=$abc$109383$new_n44163_
 .subckt buf_x4 i=$abc$109383$new_n44163_ q=$abc$109383$new_n44164_
 .subckt inv_x0 i=soc.ram.ram[102][1] nq=$abc$109383$new_n44165_
-.subckt a2_x2 i0=$abc$109383$new_n44165_ i1=$abc$109383$new_n44164_ q=$abc$109383$new_n44166_
+.subckt and2_x1 i0=$abc$109383$new_n44165_ i1=$abc$109383$new_n44164_ q=$abc$109383$new_n44166_
 .subckt buf_x4 i=$abc$109383$new_n43337_ q=$abc$109383$new_n44167_
-.subckt o2_x2 i0=soc.ram.ram[98][1] i1=$abc$109383$new_n44167_ q=$abc$109383$new_n44168_
+.subckt or2_x1 i0=soc.ram.ram[98][1] i1=$abc$109383$new_n44167_ q=$abc$109383$new_n44168_
 .subckt nand2_x0 i0=$abc$109383$new_n44168_ i1=$abc$109383$new_n43902_ nq=$abc$109383$new_n44169_
-.subckt ao22_x2 i0=$abc$109383$new_n44169_ i1=$abc$109383$new_n44166_ i2=$abc$109383$new_n44162_ q=$abc$109383$new_n44170_
-.subckt oa22_x2 i0=$abc$109383$new_n44170_ i1=$abc$109383$new_n44160_ i2=$abc$109383$new_n44155_ q=$abc$109383$new_n44171_
-.subckt o2_x2 i0=$abc$109383$new_n44171_ i1=$abc$109383$new_n44154_ q=$abc$109383$new_n44172_
+.subckt and21nor_x1 i0=$abc$109383$new_n44169_ i1=$abc$109383$new_n44166_ i2=$abc$109383$new_n44162_ nq=$abc$109383$new_n44170_
+.subckt or21nand_x1 i0=$abc$109383$new_n44170_ i1=$abc$109383$new_n44160_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n44171_
+.subckt or2_x1 i0=$abc$109383$new_n44171_ i1=$abc$109383$new_n44154_ q=$abc$109383$new_n44172_
 .subckt inv_x0 i=soc.ram.ram[109][1] nq=$abc$109383$new_n44173_
 .subckt nand2_x0 i0=$abc$109383$new_n44173_ i1=$abc$109383$new_n43829_ nq=$abc$109383$new_n44174_
 .subckt buf_x4 i=$abc$109383$new_n43415_ q=$abc$109383$new_n44175_
 .subckt buf_x4 i=$abc$109383$new_n44098_ q=$abc$109383$new_n44176_
-.subckt ao22_x2 i0=soc.ram.ram[105][1] i1=$abc$109383$new_n44176_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n44177_
+.subckt and21nor_x1 i0=soc.ram.ram[105][1] i1=$abc$109383$new_n44176_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n44177_
 .subckt nand2_x0 i0=$abc$109383$new_n44177_ i1=$abc$109383$new_n44174_ nq=$abc$109383$new_n44178_
 .subckt buf_x4 i=$abc$109383$new_n43487_ q=$abc$109383$new_n44179_
 .subckt buf_x4 i=$abc$109383$new_n44179_ q=$abc$109383$new_n44180_
 .subckt buf_x4 i=$abc$109383$new_n44163_ q=$abc$109383$new_n44181_
-.subckt mx2_x2 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[104][1] i1=soc.ram.ram[108][1] q=$abc$109383$new_n44182_
+.subckt mux2_x1 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[104][1] i1=soc.ram.ram[108][1] q=$abc$109383$new_n44182_
 .subckt nand2_x0 i0=$abc$109383$new_n44182_ i1=$abc$109383$new_n44180_ nq=$abc$109383$new_n44183_
-.subckt a2_x2 i0=$abc$109383$new_n44183_ i1=$abc$109383$new_n43767_ q=$abc$109383$new_n44184_
-.subckt a2_x2 i0=$abc$109383$new_n44184_ i1=$abc$109383$new_n44178_ q=$abc$109383$new_n44185_
+.subckt and2_x1 i0=$abc$109383$new_n44183_ i1=$abc$109383$new_n43767_ q=$abc$109383$new_n44184_
+.subckt and2_x1 i0=$abc$109383$new_n44184_ i1=$abc$109383$new_n44178_ q=$abc$109383$new_n44185_
 .subckt buf_x4 i=$abc$109383$new_n43440_ q=$abc$109383$new_n44186_
 .subckt buf_x4 i=$abc$109383$new_n44186_ q=$abc$109383$new_n44187_
 .subckt buf_x4 i=$abc$109383$new_n44187_ q=$abc$109383$new_n44188_
 .subckt inv_x0 i=soc.ram.ram[101][1] nq=$abc$109383$new_n44189_
 .subckt nand2_x0 i0=$abc$109383$new_n44189_ i1=$abc$109383$new_n44188_ nq=$abc$109383$new_n44190_
 .subckt buf_x4 i=$abc$109383$new_n43602_ q=$abc$109383$new_n44191_
-.subckt ao22_x2 i0=soc.ram.ram[97][1] i1=$abc$109383$new_n44191_ i2=$abc$109383$new_n43797_ q=$abc$109383$new_n44192_
+.subckt and21nor_x1 i0=soc.ram.ram[97][1] i1=$abc$109383$new_n44191_ i2=$abc$109383$new_n43797_ nq=$abc$109383$new_n44192_
 .subckt nand2_x0 i0=$abc$109383$new_n44192_ i1=$abc$109383$new_n44190_ nq=$abc$109383$new_n44193_
 .subckt inv_x0 i=soc.ram.ram[100][1] nq=$abc$109383$new_n44194_
-.subckt a2_x2 i0=$abc$109383$new_n44194_ i1=$abc$109383$new_n43347_ q=$abc$109383$new_n44195_
-.subckt o2_x2 i0=soc.ram.ram[96][1] i1=$abc$109383$new_n43636_ q=$abc$109383$new_n44196_
+.subckt and2_x1 i0=$abc$109383$new_n44194_ i1=$abc$109383$new_n43347_ q=$abc$109383$new_n44195_
+.subckt or2_x1 i0=soc.ram.ram[96][1] i1=$abc$109383$new_n43636_ q=$abc$109383$new_n44196_
 .subckt nand2_x0 i0=$abc$109383$new_n44196_ i1=$abc$109383$new_n43488_ nq=$abc$109383$new_n44197_
-.subckt ao22_x2 i0=$abc$109383$new_n44197_ i1=$abc$109383$new_n44195_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n44198_
-.subckt oa22_x2 i0=$abc$109383$new_n44198_ i1=$abc$109383$new_n44193_ i2=$abc$109383$new_n43507_ q=$abc$109383$new_n44199_
-.subckt ao22_x2 i0=$abc$109383$new_n44199_ i1=$abc$109383$new_n44185_ i2=$abc$109383$new_n43326_ q=$abc$109383$new_n44200_
-.subckt a2_x2 i0=$abc$109383$new_n44200_ i1=$abc$109383$new_n44172_ q=$abc$109383$new_n44201_
+.subckt and21nor_x1 i0=$abc$109383$new_n44197_ i1=$abc$109383$new_n44195_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n44198_
+.subckt or21nand_x1 i0=$abc$109383$new_n44198_ i1=$abc$109383$new_n44193_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n44199_
+.subckt and21nor_x1 i0=$abc$109383$new_n44199_ i1=$abc$109383$new_n44185_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n44200_
+.subckt and2_x1 i0=$abc$109383$new_n44200_ i1=$abc$109383$new_n44172_ q=$abc$109383$new_n44201_
 .subckt buf_x4 i=$abc$109383$new_n43639_ q=$abc$109383$new_n44202_
-.subckt mx2_x2 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[122][1] i1=soc.ram.ram[126][1] q=$abc$109383$new_n44203_
+.subckt mux2_x1 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[122][1] i1=soc.ram.ram[126][1] q=$abc$109383$new_n44203_
 .subckt buf_x4 i=$abc$109383$new_n43456_ q=$abc$109383$new_n44204_
-.subckt oa22_x2 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n44203_ i2=$abc$109383$new_n43392_ q=$abc$109383$new_n44205_
-.subckt ao22_x2 i0=soc.ram.ram[123][1] i1=$abc$109383$new_n43926_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n44206_
+.subckt or21nand_x1 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n44203_ i2=$abc$109383$new_n43392_ nq=$abc$109383$new_n44205_
+.subckt and21nor_x1 i0=soc.ram.ram[123][1] i1=$abc$109383$new_n43926_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n44206_
 .subckt buf_x4 i=$abc$109383$new_n43810_ q=$abc$109383$new_n44207_
 .subckt buf_x4 i=$abc$109383$new_n44207_ q=$abc$109383$new_n44208_
 .subckt inv_x0 i=soc.ram.ram[127][1] nq=$abc$109383$new_n44209_
 .subckt nand2_x0 i0=$abc$109383$new_n44209_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n44210_
-.subckt oa22_x2 i0=$abc$109383$new_n44210_ i1=$abc$109383$new_n44206_ i2=$abc$109383$new_n44205_ q=$abc$109383$new_n44211_
+.subckt or21nand_x1 i0=$abc$109383$new_n44210_ i1=$abc$109383$new_n44206_ i2=$abc$109383$new_n44205_ nq=$abc$109383$new_n44211_
 .subckt buf_x4 i=$abc$109383$new_n43564_ q=$abc$109383$new_n44212_
 .subckt buf_x4 i=$abc$109383$new_n44212_ q=$abc$109383$new_n44213_
 .subckt buf_x4 i=$abc$109383$new_n43394_ q=$abc$109383$new_n44214_
 .subckt buf_x4 i=$abc$109383$new_n43800_ q=$abc$109383$new_n44215_
-.subckt ao22_x2 i0=soc.ram.ram[115][1] i1=$abc$109383$new_n44215_ i2=$abc$109383$new_n44214_ q=$abc$109383$new_n44216_
-.subckt ao22_x2 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[119][1] i2=$abc$109383$new_n44216_ q=$abc$109383$new_n44217_
-.subckt o2_x2 i0=soc.ram.ram[114][1] i1=$abc$109383$new_n44191_ q=$abc$109383$new_n44218_
-.subckt ao22_x2 i0=soc.ram.ram[118][1] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n43549_ q=$abc$109383$new_n44219_
-.subckt oa22_x2 i0=$abc$109383$new_n44219_ i1=$abc$109383$new_n44218_ i2=$abc$109383$new_n43525_ q=$abc$109383$new_n44220_
-.subckt ao22_x2 i0=$abc$109383$new_n44220_ i1=$abc$109383$new_n44217_ i2=$abc$109383$new_n44213_ q=$abc$109383$new_n44221_
+.subckt and21nor_x1 i0=soc.ram.ram[115][1] i1=$abc$109383$new_n44215_ i2=$abc$109383$new_n44214_ nq=$abc$109383$new_n44216_
+.subckt and21nor_x1 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[119][1] i2=$abc$109383$new_n44216_ nq=$abc$109383$new_n44217_
+.subckt or2_x1 i0=soc.ram.ram[114][1] i1=$abc$109383$new_n44191_ q=$abc$109383$new_n44218_
+.subckt and21nor_x1 i0=soc.ram.ram[118][1] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n43549_ nq=$abc$109383$new_n44219_
+.subckt or21nand_x1 i0=$abc$109383$new_n44219_ i1=$abc$109383$new_n44218_ i2=$abc$109383$new_n43525_ nq=$abc$109383$new_n44220_
+.subckt and21nor_x1 i0=$abc$109383$new_n44220_ i1=$abc$109383$new_n44217_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n44221_
 .subckt nand2_x0 i0=$abc$109383$new_n44221_ i1=$abc$109383$new_n44211_ nq=$abc$109383$new_n44222_
 .subckt inv_x0 i=soc.ram.ram[125][1] nq=$abc$109383$new_n44223_
 .subckt nand2_x0 i0=$abc$109383$new_n44223_ i1=$abc$109383$new_n43802_ nq=$abc$109383$new_n44224_
 .subckt buf_x4 i=$abc$109383$new_n44137_ q=$abc$109383$new_n44225_
-.subckt ao22_x2 i0=soc.ram.ram[121][1] i1=$abc$109383$new_n44225_ i2=$abc$109383$new_n43913_ q=$abc$109383$new_n44226_
+.subckt and21nor_x1 i0=soc.ram.ram[121][1] i1=$abc$109383$new_n44225_ i2=$abc$109383$new_n43913_ nq=$abc$109383$new_n44226_
 .subckt nand2_x0 i0=$abc$109383$new_n44226_ i1=$abc$109383$new_n44224_ nq=$abc$109383$new_n44227_
 .subckt buf_x4 i=$abc$109383$new_n43524_ q=$abc$109383$new_n44228_
 .subckt buf_x4 i=$abc$109383$new_n44144_ q=$abc$109383$new_n44229_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[120][1] i1=soc.ram.ram[124][1] q=$abc$109383$new_n44230_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[120][1] i1=soc.ram.ram[124][1] q=$abc$109383$new_n44230_
 .subckt nand2_x0 i0=$abc$109383$new_n44230_ i1=$abc$109383$new_n44204_ nq=$abc$109383$new_n44231_
-.subckt a2_x2 i0=$abc$109383$new_n44231_ i1=$abc$109383$new_n44228_ q=$abc$109383$new_n44232_
-.subckt a2_x2 i0=$abc$109383$new_n44232_ i1=$abc$109383$new_n44227_ q=$abc$109383$new_n44233_
+.subckt and2_x1 i0=$abc$109383$new_n44231_ i1=$abc$109383$new_n44228_ q=$abc$109383$new_n44232_
+.subckt and2_x1 i0=$abc$109383$new_n44232_ i1=$abc$109383$new_n44227_ q=$abc$109383$new_n44233_
 .subckt buf_x4 i=$abc$109383$new_n44164_ q=$abc$109383$new_n44234_
 .subckt inv_x0 i=soc.ram.ram[117][1] nq=$abc$109383$new_n44235_
 .subckt nand2_x0 i0=$abc$109383$new_n44235_ i1=$abc$109383$new_n44234_ nq=$abc$109383$new_n44236_
 .subckt buf_x4 i=$abc$109383$new_n43627_ q=$abc$109383$new_n44237_
-.subckt ao22_x2 i0=soc.ram.ram[113][1] i1=$abc$109383$new_n44237_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n44238_
+.subckt and21nor_x1 i0=soc.ram.ram[113][1] i1=$abc$109383$new_n44237_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n44238_
 .subckt nand2_x0 i0=$abc$109383$new_n44238_ i1=$abc$109383$new_n44236_ nq=$abc$109383$new_n44239_
 .subckt buf_x4 i=$abc$109383$new_n43469_ q=$abc$109383$new_n44240_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[112][1] i1=soc.ram.ram[116][1] q=$abc$109383$new_n44241_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[112][1] i1=soc.ram.ram[116][1] q=$abc$109383$new_n44241_
 .subckt nand2_x0 i0=$abc$109383$new_n44241_ i1=$abc$109383$new_n43731_ nq=$abc$109383$new_n44242_
-.subckt a2_x2 i0=$abc$109383$new_n44242_ i1=$abc$109383$new_n44240_ q=$abc$109383$new_n44243_
-.subckt oa22_x2 i0=$abc$109383$new_n44243_ i1=$abc$109383$new_n44239_ i2=$abc$109383$new_n43650_ q=$abc$109383$new_n44244_
-.subckt ao22_x2 i0=$abc$109383$new_n44244_ i1=$abc$109383$new_n44233_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n44245_
-.subckt a2_x2 i0=$abc$109383$new_n44245_ i1=$abc$109383$new_n44222_ q=$abc$109383$new_n44246_
-.subckt ao22_x2 i0=$abc$109383$new_n44246_ i1=$abc$109383$new_n44201_ i2=$abc$109383$new_n43465_ q=$abc$109383$new_n44247_
-.subckt o2_x2 i0=$abc$109383$new_n44247_ i1=$abc$109383$new_n44136_ q=$abc$109383$new_n44248_
+.subckt and2_x1 i0=$abc$109383$new_n44242_ i1=$abc$109383$new_n44240_ q=$abc$109383$new_n44243_
+.subckt or21nand_x1 i0=$abc$109383$new_n44243_ i1=$abc$109383$new_n44239_ i2=$abc$109383$new_n43650_ nq=$abc$109383$new_n44244_
+.subckt and21nor_x1 i0=$abc$109383$new_n44244_ i1=$abc$109383$new_n44233_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n44245_
+.subckt and2_x1 i0=$abc$109383$new_n44245_ i1=$abc$109383$new_n44222_ q=$abc$109383$new_n44246_
+.subckt and21nor_x1 i0=$abc$109383$new_n44246_ i1=$abc$109383$new_n44201_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n44247_
+.subckt or2_x1 i0=$abc$109383$new_n44247_ i1=$abc$109383$new_n44136_ q=$abc$109383$new_n44248_
 .subckt nand2_x0 i0=$abc$109383$new_n44248_ i1=$abc$109383$new_n44040_ nq=$abc$109383$new_n44249_
 .subckt nand3_x0 i0=$abc$109383$new_n44249_ i1=$abc$109383$new_n44039_ i2=$abc$109383$new_n43778_ nq=$abc$109383$new_n44250_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[1] nq=$abc$109383$new_n44251_
@@ -29527,249 +29527,249 @@
 .subckt buf_x4 i=$abc$109383$new_n43310_ q=$abc$109383$new_n44253_
 .subckt buf_x4 i=$abc$109383$new_n21997_ q=$abc$109383$new_n44254_
 .subckt buf_x4 i=$abc$109383$new_n43314_ q=$abc$109383$new_n44255_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n44252_ q=$abc$109383$new_n44256_
-.subckt a2_x2 i0=$abc$109383$new_n44256_ i1=$abc$109383$new_n44251_ q=$abc$109383$new_n44257_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n44252_ q=$abc$109383$new_n44256_
+.subckt and2_x1 i0=$abc$109383$new_n44256_ i1=$abc$109383$new_n44251_ q=$abc$109383$new_n44257_
 .subckt buf_x4 i=$abc$109383$new_n21995_ q=$abc$109383$new_n44258_
 .subckt buf_x4 i=$abc$109383$new_n22000_ q=$abc$109383$new_n44259_
 .subckt nand3_x0 i0=$abc$109383$new_n20241_ i1=$abc$109383$new_n23713_ i2=soc.bridge.csr_bridge_1.wb__dat_r[1] nq=$abc$109383$new_n44260_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[1] nq=$abc$109383$new_n44261_
-.subckt o2_x2 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n44261_ q=$abc$109383$new_n44262_
-.subckt a2_x2 i0=$abc$109383$new_n44262_ i1=$abc$109383$new_n44260_ q=$abc$109383$new_n44263_
-.subckt o4_x2 i0=$abc$109383$new_n44263_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n44264_
+.subckt or2_x1 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n44261_ q=$abc$109383$new_n44262_
+.subckt and2_x1 i0=$abc$109383$new_n44262_ i1=$abc$109383$new_n44260_ q=$abc$109383$new_n44263_
+.subckt or4_x1 i0=$abc$109383$new_n44263_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n44264_
 .subckt buf_x4 i=$abc$109383$new_n27462_ q=$abc$109383$new_n44265_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n44265_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[1] nq=$abc$109383$new_n44266_
-.subckt a2_x2 i0=$abc$109383$new_n44266_ i1=$abc$109383$new_n44264_ q=$abc$109383$new_n44267_
+.subckt and2_x1 i0=$abc$109383$new_n44266_ i1=$abc$109383$new_n44264_ q=$abc$109383$new_n44267_
 .subckt buf_x4 i=$abc$109383$new_n27492_ q=$abc$109383$new_n44268_
 .subckt buf_x4 i=$abc$109383$new_n27462_ q=$abc$109383$new_n44269_
 .subckt nand3_x0 i0=$abc$109383$new_n44269_ i1=$abc$109383$new_n44268_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[1] nq=$abc$109383$new_n44270_
 .subckt nand3_x0 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[1] nq=$abc$109383$new_n44271_
-.subckt oa22_x2 i0=$abc$109383$new_n44271_ i1=$abc$109383$new_n44270_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n44272_
-.subckt a3_x2 i0=$abc$109383$new_n44272_ i1=$abc$109383$new_n44267_ i2=$abc$109383$new_n44257_ q=$abc$109383$new_n44273_
+.subckt or21nand_x1 i0=$abc$109383$new_n44271_ i1=$abc$109383$new_n44270_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n44272_
+.subckt and3_x1 i0=$abc$109383$new_n44272_ i1=$abc$109383$new_n44267_ i2=$abc$109383$new_n44257_ q=$abc$109383$new_n44273_
 .subckt nand3_x0 i0=$abc$109383$new_n44273_ i1=$abc$109383$new_n44250_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n44274_
 .subckt buf_x4 i=$abc$109383$new_n29202_ q=$abc$109383$new_n44275_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[1] q=$abc$109383$new_n44276_
-.subckt a2_x2 i0=$abc$109383$new_n44276_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n44277_
-.subckt a2_x2 i0=$abc$109383$new_n44277_ i1=$abc$109383$new_n44274_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103202
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[1] nq=$abc$109383$new_n44276_
+.subckt and2_x1 i0=$abc$109383$new_n44276_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n44277_
+.subckt and2_x1 i0=$abc$109383$new_n44277_ i1=$abc$109383$new_n44274_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103202
 .subckt buf_x4 i=$abc$109383$new_n43281_ q=$abc$109383$new_n44279_
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[2] q=$abc$109383$new_n44280_
-.subckt a2_x2 i0=$abc$109383$new_n44280_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n44281_
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[2] nq=$abc$109383$new_n44280_
+.subckt and2_x1 i0=$abc$109383$new_n44280_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n44281_
 .subckt buf_x4 i=$abc$109383$new_n27492_ q=$abc$109383$new_n44282_
 .subckt buf_x4 i=$abc$109383$new_n27462_ q=$abc$109383$new_n44283_
 .subckt nand3_x0 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n44282_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[2] nq=$abc$109383$new_n44284_
 .subckt buf_x4 i=$abc$109383$new_n28958_ q=$abc$109383$new_n44285_
 .subckt buf_x4 i=$abc$109383$new_n28966_ q=$abc$109383$new_n44286_
 .subckt nand3_x0 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[2] nq=$abc$109383$new_n44287_
-.subckt oa22_x2 i0=$abc$109383$new_n44287_ i1=$abc$109383$new_n44284_ i2=$abc$109383$new_n28563_ q=$abc$109383$new_n44288_
+.subckt or21nand_x1 i0=$abc$109383$new_n44287_ i1=$abc$109383$new_n44284_ i2=$abc$109383$new_n28563_ nq=$abc$109383$new_n44288_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[2] nq=$abc$109383$new_n44289_
 .subckt buf_x4 i=$abc$109383$new_n20803_ q=$abc$109383$new_n44290_
 .subckt nand3_x0 i0=$abc$109383$new_n21937_ i1=$abc$109383$new_n44290_ i2=soc.bridge.csr_bridge_1.wb__dat_r[2] nq=$abc$109383$new_n44291_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[2] nq=$abc$109383$new_n44292_
-.subckt o2_x2 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n44292_ q=$abc$109383$new_n44293_
-.subckt a2_x2 i0=$abc$109383$new_n44293_ i1=$abc$109383$new_n44291_ q=$abc$109383$new_n44294_
-.subckt ao22_x2 i0=$abc$109383$new_n43306_ i1=$abc$109383$new_n44294_ i2=$abc$109383$new_n44289_ q=$abc$109383$new_n44295_
+.subckt or2_x1 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n44292_ q=$abc$109383$new_n44293_
+.subckt and2_x1 i0=$abc$109383$new_n44293_ i1=$abc$109383$new_n44291_ q=$abc$109383$new_n44294_
+.subckt and21nor_x1 i0=$abc$109383$new_n43306_ i1=$abc$109383$new_n44294_ i2=$abc$109383$new_n44289_ nq=$abc$109383$new_n44295_
 .subckt inv_x0 i=soc.hyperram.sr[2] nq=$abc$109383$new_n44296_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n44296_ q=$abc$109383$new_n44297_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n44296_ q=$abc$109383$new_n44297_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[2] nq=$abc$109383$new_n44298_
-.subckt ao22_x2 i0=$abc$109383$new_n44298_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n44297_ q=$abc$109383$new_n44299_
+.subckt and21nor_x1 i0=$abc$109383$new_n44298_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n44297_ nq=$abc$109383$new_n44299_
 .subckt nand3_x0 i0=$abc$109383$new_n44299_ i1=$abc$109383$new_n44295_ i2=$abc$109383$new_n44288_ nq=$abc$109383$new_n44300_
-.subckt mx2_x2 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[2][2] i1=soc.ram.ram[6][2] q=$abc$109383$new_n44301_
-.subckt o2_x2 i0=$abc$109383$new_n44301_ i1=$abc$109383$new_n43823_ q=$abc$109383$new_n44302_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[3][2] i1=soc.ram.ram[7][2] q=$abc$109383$new_n44303_
-.subckt ao22_x2 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n44303_ i2=$abc$109383$new_n43837_ q=$abc$109383$new_n44304_
+.subckt mux2_x1 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[2][2] i1=soc.ram.ram[6][2] q=$abc$109383$new_n44301_
+.subckt or2_x1 i0=$abc$109383$new_n44301_ i1=$abc$109383$new_n43823_ q=$abc$109383$new_n44302_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[3][2] i1=soc.ram.ram[7][2] q=$abc$109383$new_n44303_
+.subckt and21nor_x1 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n44303_ i2=$abc$109383$new_n43837_ nq=$abc$109383$new_n44304_
 .subckt nand2_x0 i0=$abc$109383$new_n44304_ i1=$abc$109383$new_n44302_ nq=$abc$109383$new_n44305_
 .subckt buf_x4 i=$abc$109383$new_n43607_ q=$abc$109383$new_n44306_
 .subckt inv_x0 i=soc.ram.ram[15][2] nq=$abc$109383$new_n44307_
 .subckt nand2_x0 i0=$abc$109383$new_n44307_ i1=$abc$109383$new_n44306_ nq=$abc$109383$new_n44308_
-.subckt ao22_x2 i0=soc.ram.ram[11][2] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n44142_ q=$abc$109383$new_n44309_
+.subckt and21nor_x1 i0=soc.ram.ram[11][2] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n44142_ nq=$abc$109383$new_n44309_
 .subckt nand2_x0 i0=$abc$109383$new_n44309_ i1=$abc$109383$new_n44308_ nq=$abc$109383$new_n44310_
-.subckt mx2_x2 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[10][2] i1=soc.ram.ram[14][2] q=$abc$109383$new_n44311_
+.subckt mux2_x1 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[10][2] i1=soc.ram.ram[14][2] q=$abc$109383$new_n44311_
 .subckt nand2_x0 i0=$abc$109383$new_n44311_ i1=$abc$109383$new_n43941_ nq=$abc$109383$new_n44312_
-.subckt oa22_x2 i0=$abc$109383$new_n44312_ i1=$abc$109383$new_n44310_ i2=$abc$109383$new_n43712_ q=$abc$109383$new_n44313_
+.subckt or21nand_x1 i0=$abc$109383$new_n44312_ i1=$abc$109383$new_n44310_ i2=$abc$109383$new_n43712_ nq=$abc$109383$new_n44313_
 .subckt nand3_x0 i0=$abc$109383$new_n44313_ i1=$abc$109383$new_n44305_ i2=$abc$109383$new_n43715_ nq=$abc$109383$new_n44314_
 .subckt nand2_x0 i0=soc.ram.ram[23][2] i1=$abc$109383$new_n43555_ nq=$abc$109383$new_n44315_
 .subckt buf_x4 i=$abc$109383$new_n43558_ q=$abc$109383$new_n44316_
 .subckt inv_x0 i=soc.ram.ram[31][2] nq=$abc$109383$new_n44317_
-.subckt ao22_x2 i0=$abc$109383$new_n44317_ i1=$abc$109383$new_n43432_ i2=$abc$109383$new_n44316_ q=$abc$109383$new_n44318_
+.subckt and21nor_x1 i0=$abc$109383$new_n44317_ i1=$abc$109383$new_n43432_ i2=$abc$109383$new_n44316_ nq=$abc$109383$new_n44318_
 .subckt nand2_x0 i0=$abc$109383$new_n44318_ i1=$abc$109383$new_n44315_ nq=$abc$109383$new_n44319_
-.subckt oa22_x2 i0=soc.ram.ram[27][2] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43886_ q=$abc$109383$new_n44320_
-.subckt oa22_x2 i0=$abc$109383$new_n43711_ i1=soc.ram.ram[19][2] i2=$abc$109383$new_n44320_ q=$abc$109383$new_n44321_
-.subckt a2_x2 i0=$abc$109383$new_n44321_ i1=$abc$109383$new_n43791_ q=$abc$109383$new_n44322_
+.subckt or21nand_x1 i0=soc.ram.ram[27][2] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43886_ nq=$abc$109383$new_n44320_
+.subckt or21nand_x1 i0=$abc$109383$new_n43711_ i1=soc.ram.ram[19][2] i2=$abc$109383$new_n44320_ nq=$abc$109383$new_n44321_
+.subckt and2_x1 i0=$abc$109383$new_n44321_ i1=$abc$109383$new_n43791_ q=$abc$109383$new_n44322_
 .subckt nand2_x0 i0=$abc$109383$new_n44322_ i1=$abc$109383$new_n44319_ nq=$abc$109383$new_n44323_
 .subckt nand2_x0 i0=soc.ram.ram[22][2] i1=$abc$109383$new_n43391_ nq=$abc$109383$new_n44324_
 .subckt inv_x0 i=soc.ram.ram[30][2] nq=$abc$109383$new_n44325_
-.subckt ao22_x2 i0=$abc$109383$new_n44325_ i1=$abc$109383$new_n43469_ i2=$abc$109383$new_n44098_ q=$abc$109383$new_n44326_
-.subckt a2_x2 i0=$abc$109383$new_n44326_ i1=$abc$109383$new_n44324_ q=$abc$109383$new_n44327_
-.subckt oa22_x2 i0=soc.ram.ram[26][2] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n43612_ q=$abc$109383$new_n44328_
-.subckt oa22_x2 i0=$abc$109383$new_n43469_ i1=soc.ram.ram[18][2] i2=$abc$109383$new_n44328_ q=$abc$109383$new_n44329_
+.subckt and21nor_x1 i0=$abc$109383$new_n44325_ i1=$abc$109383$new_n43469_ i2=$abc$109383$new_n44098_ nq=$abc$109383$new_n44326_
+.subckt and2_x1 i0=$abc$109383$new_n44326_ i1=$abc$109383$new_n44324_ q=$abc$109383$new_n44327_
+.subckt or21nand_x1 i0=soc.ram.ram[26][2] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n43612_ nq=$abc$109383$new_n44328_
+.subckt or21nand_x1 i0=$abc$109383$new_n43469_ i1=soc.ram.ram[18][2] i2=$abc$109383$new_n44328_ nq=$abc$109383$new_n44329_
 .subckt nand2_x0 i0=$abc$109383$new_n44329_ i1=$abc$109383$new_n44103_ nq=$abc$109383$new_n44330_
-.subckt ao22_x2 i0=$abc$109383$new_n44330_ i1=$abc$109383$new_n44327_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n44331_
+.subckt and21nor_x1 i0=$abc$109383$new_n44330_ i1=$abc$109383$new_n44327_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n44331_
 .subckt nand2_x0 i0=$abc$109383$new_n44331_ i1=$abc$109383$new_n44323_ nq=$abc$109383$new_n44332_
-.subckt oa22_x2 i0=$abc$109383$new_n44332_ i1=$abc$109383$new_n44314_ i2=$abc$109383$new_n43679_ q=$abc$109383$new_n44333_
+.subckt or21nand_x1 i0=$abc$109383$new_n44332_ i1=$abc$109383$new_n44314_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n44333_
 .subckt buf_x4 i=$abc$109383$new_n43360_ q=$abc$109383$new_n44334_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[28][2] i1=soc.ram.ram[29][2] q=$abc$109383$new_n44335_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[24][2] i1=soc.ram.ram[25][2] q=$abc$109383$new_n44336_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[28][2] i1=soc.ram.ram[29][2] q=$abc$109383$new_n44335_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[24][2] i1=soc.ram.ram[25][2] q=$abc$109383$new_n44336_
 .subckt buf_x4 i=$abc$109383$new_n43417_ q=$abc$109383$new_n44337_
 .subckt buf_x4 i=$abc$109383$new_n44337_ q=$abc$109383$new_n44338_
-.subckt mx2_x2 cmd=$abc$109383$new_n44338_ i0=$abc$109383$new_n44336_ i1=$abc$109383$new_n44335_ q=$abc$109383$new_n44339_
+.subckt mux2_x1 cmd=$abc$109383$new_n44338_ i0=$abc$109383$new_n44336_ i1=$abc$109383$new_n44335_ q=$abc$109383$new_n44339_
 .subckt nor2_x0 i0=$abc$109383$new_n44339_ i1=$abc$109383$new_n43392_ nq=$abc$109383$new_n44340_
-.subckt mx2_x2 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[20][2] i1=soc.ram.ram[21][2] q=$abc$109383$new_n44341_
-.subckt mx2_x2 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[16][2] i1=soc.ram.ram[17][2] q=$abc$109383$new_n44342_
-.subckt mx2_x2 cmd=$abc$109383$new_n43873_ i0=$abc$109383$new_n44342_ i1=$abc$109383$new_n44341_ q=$abc$109383$new_n44343_
+.subckt mux2_x1 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[20][2] i1=soc.ram.ram[21][2] q=$abc$109383$new_n44341_
+.subckt mux2_x1 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[16][2] i1=soc.ram.ram[17][2] q=$abc$109383$new_n44342_
+.subckt mux2_x1 cmd=$abc$109383$new_n43873_ i0=$abc$109383$new_n44342_ i1=$abc$109383$new_n44341_ q=$abc$109383$new_n44343_
 .subckt nor2_x0 i0=$abc$109383$new_n44343_ i1=$abc$109383$new_n43525_ nq=$abc$109383$new_n44344_
-.subckt o2_x2 i0=$abc$109383$new_n44344_ i1=$abc$109383$new_n44340_ q=$abc$109383$new_n44345_
+.subckt or2_x1 i0=$abc$109383$new_n44344_ i1=$abc$109383$new_n44340_ q=$abc$109383$new_n44345_
 .subckt nand2_x0 i0=$abc$109383$new_n44345_ i1=$abc$109383$new_n43729_ nq=$abc$109383$new_n44346_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[0][2] i1=soc.ram.ram[4][2] q=$abc$109383$new_n44347_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[1][2] i1=soc.ram.ram[5][2] q=$abc$109383$new_n44348_
-.subckt mx2_x2 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n44348_ i1=$abc$109383$new_n44347_ q=$abc$109383$new_n44349_
-.subckt o2_x2 i0=$abc$109383$new_n44349_ i1=$abc$109383$new_n43896_ q=$abc$109383$new_n44350_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[0][2] i1=soc.ram.ram[4][2] q=$abc$109383$new_n44347_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[1][2] i1=soc.ram.ram[5][2] q=$abc$109383$new_n44348_
+.subckt mux2_x1 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n44348_ i1=$abc$109383$new_n44347_ q=$abc$109383$new_n44349_
+.subckt or2_x1 i0=$abc$109383$new_n44349_ i1=$abc$109383$new_n43896_ q=$abc$109383$new_n44350_
 .subckt buf_x4 i=$abc$109383$new_n43345_ q=$abc$109383$new_n44351_
-.subckt mx2_x2 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[8][2] i1=soc.ram.ram[12][2] q=$abc$109383$new_n44352_
-.subckt a2_x2 i0=$abc$109383$new_n44352_ i1=$abc$109383$new_n43384_ q=$abc$109383$new_n44353_
+.subckt mux2_x1 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[8][2] i1=soc.ram.ram[12][2] q=$abc$109383$new_n44352_
+.subckt and2_x1 i0=$abc$109383$new_n44352_ i1=$abc$109383$new_n43384_ q=$abc$109383$new_n44353_
 .subckt inv_x0 i=soc.ram.ram[13][2] nq=$abc$109383$new_n44354_
 .subckt nand2_x0 i0=$abc$109383$new_n44354_ i1=$abc$109383$new_n43800_ nq=$abc$109383$new_n44355_
-.subckt ao22_x2 i0=soc.ram.ram[9][2] i1=$abc$109383$new_n43573_ i2=$abc$109383$new_n44334_ q=$abc$109383$new_n44356_
-.subckt oa22_x2 i0=$abc$109383$new_n44356_ i1=$abc$109383$new_n44355_ i2=$abc$109383$new_n43431_ q=$abc$109383$new_n44357_
-.subckt o2_x2 i0=$abc$109383$new_n44357_ i1=$abc$109383$new_n44353_ q=$abc$109383$new_n44358_
-.subckt oa22_x2 i0=$abc$109383$new_n44358_ i1=$abc$109383$new_n44350_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n44359_
-.subckt oa22_x2 i0=$abc$109383$new_n44359_ i1=$abc$109383$new_n44346_ i2=$abc$109383$new_n44030_ q=$abc$109383$new_n44360_
-.subckt a2_x2 i0=$abc$109383$new_n44360_ i1=$abc$109383$new_n44333_ q=$abc$109383$new_n44361_
+.subckt and21nor_x1 i0=soc.ram.ram[9][2] i1=$abc$109383$new_n43573_ i2=$abc$109383$new_n44334_ nq=$abc$109383$new_n44356_
+.subckt or21nand_x1 i0=$abc$109383$new_n44356_ i1=$abc$109383$new_n44355_ i2=$abc$109383$new_n43431_ nq=$abc$109383$new_n44357_
+.subckt or2_x1 i0=$abc$109383$new_n44357_ i1=$abc$109383$new_n44353_ q=$abc$109383$new_n44358_
+.subckt or21nand_x1 i0=$abc$109383$new_n44358_ i1=$abc$109383$new_n44350_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n44359_
+.subckt or21nand_x1 i0=$abc$109383$new_n44359_ i1=$abc$109383$new_n44346_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n44360_
+.subckt and2_x1 i0=$abc$109383$new_n44360_ i1=$abc$109383$new_n44333_ q=$abc$109383$new_n44361_
 .subckt inv_x0 i=soc.ram.ram[41][2] nq=$abc$109383$new_n44362_
 .subckt inv_x0 i=soc.ram.ram[45][2] nq=$abc$109383$new_n44363_
-.subckt mx2_x2 cmd=$abc$109383$new_n43502_ i0=$abc$109383$new_n44363_ i1=$abc$109383$new_n44362_ q=$abc$109383$new_n44364_
+.subckt mux2_x1 cmd=$abc$109383$new_n43502_ i0=$abc$109383$new_n44363_ i1=$abc$109383$new_n44362_ q=$abc$109383$new_n44364_
 .subckt inv_x0 i=soc.ram.ram[40][2] nq=$abc$109383$new_n44365_
 .subckt inv_x0 i=soc.ram.ram[44][2] nq=$abc$109383$new_n44366_
-.subckt mx2_x2 cmd=$abc$109383$new_n43502_ i0=$abc$109383$new_n44366_ i1=$abc$109383$new_n44365_ q=$abc$109383$new_n44367_
+.subckt mux2_x1 cmd=$abc$109383$new_n43502_ i0=$abc$109383$new_n44366_ i1=$abc$109383$new_n44365_ q=$abc$109383$new_n44367_
 .subckt buf_x4 i=$abc$109383$new_n43796_ q=$abc$109383$new_n44368_
-.subckt mx2_x2 cmd=$abc$109383$new_n44368_ i0=$abc$109383$new_n44367_ i1=$abc$109383$new_n44364_ q=$abc$109383$new_n44369_
-.subckt a2_x2 i0=$abc$109383$new_n44369_ i1=$abc$109383$new_n44155_ q=$abc$109383$new_n44370_
+.subckt mux2_x1 cmd=$abc$109383$new_n44368_ i0=$abc$109383$new_n44367_ i1=$abc$109383$new_n44364_ q=$abc$109383$new_n44369_
+.subckt and2_x1 i0=$abc$109383$new_n44369_ i1=$abc$109383$new_n44155_ q=$abc$109383$new_n44370_
 .subckt inv_x0 i=soc.ram.ram[43][2] nq=$abc$109383$new_n44371_
 .subckt inv_x0 i=soc.ram.ram[47][2] nq=$abc$109383$new_n44372_
-.subckt mx2_x2 cmd=$abc$109383$new_n43398_ i0=$abc$109383$new_n44372_ i1=$abc$109383$new_n44371_ q=$abc$109383$new_n44373_
+.subckt mux2_x1 cmd=$abc$109383$new_n43398_ i0=$abc$109383$new_n44372_ i1=$abc$109383$new_n44371_ q=$abc$109383$new_n44373_
 .subckt inv_x0 i=soc.ram.ram[42][2] nq=$abc$109383$new_n44374_
 .subckt inv_x0 i=soc.ram.ram[46][2] nq=$abc$109383$new_n44375_
-.subckt mx2_x2 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n44375_ i1=$abc$109383$new_n44374_ q=$abc$109383$new_n44376_
+.subckt mux2_x1 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n44375_ i1=$abc$109383$new_n44374_ q=$abc$109383$new_n44376_
 .subckt buf_x4 i=$abc$109383$new_n43641_ q=$abc$109383$new_n44377_
-.subckt mx2_x2 cmd=$abc$109383$new_n44377_ i0=$abc$109383$new_n44376_ i1=$abc$109383$new_n44373_ q=$abc$109383$new_n44378_
-.subckt oa22_x2 i0=$abc$109383$new_n44212_ i1=$abc$109383$new_n44378_ i2=$abc$109383$new_n43392_ q=$abc$109383$new_n44379_
-.subckt o2_x2 i0=$abc$109383$new_n44379_ i1=$abc$109383$new_n44370_ q=$abc$109383$new_n44380_
+.subckt mux2_x1 cmd=$abc$109383$new_n44377_ i0=$abc$109383$new_n44376_ i1=$abc$109383$new_n44373_ q=$abc$109383$new_n44378_
+.subckt or21nand_x1 i0=$abc$109383$new_n44212_ i1=$abc$109383$new_n44378_ i2=$abc$109383$new_n43392_ nq=$abc$109383$new_n44379_
+.subckt or2_x1 i0=$abc$109383$new_n44379_ i1=$abc$109383$new_n44370_ q=$abc$109383$new_n44380_
 .subckt buf_x4 i=$abc$109383$new_n44080_ q=$abc$109383$new_n44381_
 .subckt inv_x0 i=soc.ram.ram[33][2] nq=$abc$109383$new_n44382_
 .subckt inv_x0 i=soc.ram.ram[37][2] nq=$abc$109383$new_n44383_
-.subckt mx2_x2 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n44383_ i1=$abc$109383$new_n44382_ q=$abc$109383$new_n44384_
+.subckt mux2_x1 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n44383_ i1=$abc$109383$new_n44382_ q=$abc$109383$new_n44384_
 .subckt inv_x0 i=soc.ram.ram[32][2] nq=$abc$109383$new_n44385_
 .subckt inv_x0 i=soc.ram.ram[36][2] nq=$abc$109383$new_n44386_
-.subckt mx2_x2 cmd=$abc$109383$new_n43398_ i0=$abc$109383$new_n44386_ i1=$abc$109383$new_n44385_ q=$abc$109383$new_n44387_
-.subckt mx2_x2 cmd=$abc$109383$new_n43630_ i0=$abc$109383$new_n44387_ i1=$abc$109383$new_n44384_ q=$abc$109383$new_n44388_
-.subckt a2_x2 i0=$abc$109383$new_n44388_ i1=$abc$109383$new_n44381_ q=$abc$109383$new_n44389_
+.subckt mux2_x1 cmd=$abc$109383$new_n43398_ i0=$abc$109383$new_n44386_ i1=$abc$109383$new_n44385_ q=$abc$109383$new_n44387_
+.subckt mux2_x1 cmd=$abc$109383$new_n43630_ i0=$abc$109383$new_n44387_ i1=$abc$109383$new_n44384_ q=$abc$109383$new_n44388_
+.subckt and2_x1 i0=$abc$109383$new_n44388_ i1=$abc$109383$new_n44381_ q=$abc$109383$new_n44389_
 .subckt buf_x4 i=$abc$109383$new_n43524_ q=$abc$109383$new_n44390_
 .subckt buf_x4 i=$abc$109383$new_n43329_ q=$abc$109383$new_n44391_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[34][2] i1=soc.ram.ram[38][2] q=$abc$109383$new_n44392_
-.subckt mx2_x2 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[35][2] i1=soc.ram.ram[39][2] q=$abc$109383$new_n44393_
-.subckt mx2_x2 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n44393_ i1=$abc$109383$new_n44392_ q=$abc$109383$new_n44394_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[34][2] i1=soc.ram.ram[38][2] q=$abc$109383$new_n44392_
+.subckt mux2_x1 cmd=$abc$109383$new_n43526_ i0=soc.ram.ram[35][2] i1=soc.ram.ram[39][2] q=$abc$109383$new_n44393_
+.subckt mux2_x1 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n44393_ i1=$abc$109383$new_n44392_ q=$abc$109383$new_n44394_
 .subckt nor2_x0 i0=$abc$109383$new_n44394_ i1=$abc$109383$new_n44391_ nq=$abc$109383$new_n44395_
-.subckt o2_x2 i0=$abc$109383$new_n44395_ i1=$abc$109383$new_n44390_ q=$abc$109383$new_n44396_
-.subckt ao22_x2 i0=$abc$109383$new_n44396_ i1=$abc$109383$new_n44389_ i2=$abc$109383$new_n43715_ q=$abc$109383$new_n44397_
+.subckt or2_x1 i0=$abc$109383$new_n44395_ i1=$abc$109383$new_n44390_ q=$abc$109383$new_n44396_
+.subckt and21nor_x1 i0=$abc$109383$new_n44396_ i1=$abc$109383$new_n44389_ i2=$abc$109383$new_n43715_ nq=$abc$109383$new_n44397_
 .subckt nand2_x0 i0=$abc$109383$new_n44397_ i1=$abc$109383$new_n44380_ nq=$abc$109383$new_n44398_
-.subckt mx2_x2 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[58][2] i1=soc.ram.ram[62][2] q=$abc$109383$new_n44399_
-.subckt oa22_x2 i0=$abc$109383$new_n43595_ i1=$abc$109383$new_n44399_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n44400_
+.subckt mux2_x1 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[58][2] i1=soc.ram.ram[62][2] q=$abc$109383$new_n44399_
+.subckt or21nand_x1 i0=$abc$109383$new_n43595_ i1=$abc$109383$new_n44399_ i2=$abc$109383$new_n43375_ nq=$abc$109383$new_n44400_
 .subckt buf_x4 i=$abc$109383$new_n43376_ q=$abc$109383$new_n44401_
 .subckt buf_x4 i=$abc$109383$new_n44401_ q=$abc$109383$new_n44402_
 .subckt buf_x4 i=$abc$109383$new_n44402_ q=$abc$109383$new_n44403_
 .subckt buf_x4 i=$abc$109383$new_n43639_ q=$abc$109383$new_n44404_
 .subckt buf_x4 i=$abc$109383$new_n44404_ q=$abc$109383$new_n44405_
-.subckt ao22_x2 i0=soc.ram.ram[59][2] i1=$abc$109383$new_n44405_ i2=$abc$109383$new_n44403_ q=$abc$109383$new_n44406_
+.subckt and21nor_x1 i0=soc.ram.ram[59][2] i1=$abc$109383$new_n44405_ i2=$abc$109383$new_n44403_ nq=$abc$109383$new_n44406_
 .subckt inv_x0 i=soc.ram.ram[63][2] nq=$abc$109383$new_n44407_
 .subckt nand2_x0 i0=$abc$109383$new_n44407_ i1=$abc$109383$new_n44139_ nq=$abc$109383$new_n44408_
-.subckt oa22_x2 i0=$abc$109383$new_n44408_ i1=$abc$109383$new_n44406_ i2=$abc$109383$new_n44400_ q=$abc$109383$new_n44409_
+.subckt or21nand_x1 i0=$abc$109383$new_n44408_ i1=$abc$109383$new_n44406_ i2=$abc$109383$new_n44400_ nq=$abc$109383$new_n44409_
 .subckt buf_x4 i=$abc$109383$new_n43525_ q=$abc$109383$new_n44410_
-.subckt ao22_x2 i0=soc.ram.ram[57][2] i1=$abc$109383$new_n43739_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n44411_
+.subckt and21nor_x1 i0=soc.ram.ram[57][2] i1=$abc$109383$new_n43739_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n44411_
 .subckt buf_x4 i=$abc$109383$new_n43530_ q=$abc$109383$new_n44412_
-.subckt ao22_x2 i0=$abc$109383$new_n44412_ i1=soc.ram.ram[61][2] i2=$abc$109383$new_n44411_ q=$abc$109383$new_n44413_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[56][2] i1=soc.ram.ram[60][2] q=$abc$109383$new_n44414_
-.subckt oa22_x2 i0=$abc$109383$new_n43435_ i1=$abc$109383$new_n44414_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n44415_
-.subckt ao22_x2 i0=$abc$109383$new_n44415_ i1=$abc$109383$new_n44413_ i2=$abc$109383$new_n44410_ q=$abc$109383$new_n44416_
+.subckt and21nor_x1 i0=$abc$109383$new_n44412_ i1=soc.ram.ram[61][2] i2=$abc$109383$new_n44411_ nq=$abc$109383$new_n44413_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[56][2] i1=soc.ram.ram[60][2] q=$abc$109383$new_n44414_
+.subckt or21nand_x1 i0=$abc$109383$new_n43435_ i1=$abc$109383$new_n44414_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n44415_
+.subckt and21nor_x1 i0=$abc$109383$new_n44415_ i1=$abc$109383$new_n44413_ i2=$abc$109383$new_n44410_ nq=$abc$109383$new_n44416_
 .subckt nand2_x0 i0=$abc$109383$new_n44416_ i1=$abc$109383$new_n44409_ nq=$abc$109383$new_n44417_
 .subckt buf_x4 i=$abc$109383$new_n43518_ q=$abc$109383$new_n44418_
 .subckt buf_x4 i=$abc$109383$new_n44418_ q=$abc$109383$new_n44419_
-.subckt ao22_x2 i0=soc.ram.ram[51][2] i1=$abc$109383$new_n44419_ i2=$abc$109383$new_n43847_ q=$abc$109383$new_n44420_
+.subckt and21nor_x1 i0=soc.ram.ram[51][2] i1=$abc$109383$new_n44419_ i2=$abc$109383$new_n43847_ nq=$abc$109383$new_n44420_
 .subckt buf_x4 i=$abc$109383$new_n43382_ q=$abc$109383$new_n44421_
-.subckt ao22_x2 i0=$abc$109383$new_n44421_ i1=soc.ram.ram[55][2] i2=$abc$109383$new_n44420_ q=$abc$109383$new_n44422_
+.subckt and21nor_x1 i0=$abc$109383$new_n44421_ i1=soc.ram.ram[55][2] i2=$abc$109383$new_n44420_ nq=$abc$109383$new_n44422_
 .subckt buf_x4 i=$abc$109383$new_n43379_ q=$abc$109383$new_n44423_
 .subckt buf_x4 i=$abc$109383$new_n44423_ q=$abc$109383$new_n44424_
-.subckt o2_x2 i0=soc.ram.ram[50][2] i1=$abc$109383$new_n44424_ q=$abc$109383$new_n44425_
+.subckt or2_x1 i0=soc.ram.ram[50][2] i1=$abc$109383$new_n44424_ q=$abc$109383$new_n44425_
 .subckt buf_x4 i=$abc$109383$new_n43333_ q=$abc$109383$new_n44426_
 .subckt buf_x4 i=$abc$109383$new_n43529_ q=$abc$109383$new_n44427_
-.subckt ao22_x2 i0=soc.ram.ram[54][2] i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n44426_ q=$abc$109383$new_n44428_
-.subckt oa22_x2 i0=$abc$109383$new_n44428_ i1=$abc$109383$new_n44425_ i2=$abc$109383$new_n44391_ q=$abc$109383$new_n44429_
+.subckt and21nor_x1 i0=soc.ram.ram[54][2] i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n44426_ nq=$abc$109383$new_n44428_
+.subckt or21nand_x1 i0=$abc$109383$new_n44428_ i1=$abc$109383$new_n44425_ i2=$abc$109383$new_n44391_ nq=$abc$109383$new_n44429_
 .subckt nor2_x0 i0=$abc$109383$new_n44429_ i1=$abc$109383$new_n44422_ nq=$abc$109383$new_n44430_
 .subckt buf_x4 i=$abc$109383$new_n43558_ q=$abc$109383$new_n44431_
 .subckt inv_x0 i=soc.ram.ram[53][2] nq=$abc$109383$new_n44432_
 .subckt nand2_x0 i0=$abc$109383$new_n44432_ i1=$abc$109383$new_n44431_ nq=$abc$109383$new_n44433_
 .subckt buf_x4 i=$abc$109383$new_n44337_ q=$abc$109383$new_n44434_
-.subckt ao22_x2 i0=soc.ram.ram[49][2] i1=$abc$109383$new_n44434_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n44435_
+.subckt and21nor_x1 i0=soc.ram.ram[49][2] i1=$abc$109383$new_n44434_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n44435_
 .subckt nand2_x0 i0=$abc$109383$new_n44435_ i1=$abc$109383$new_n44433_ nq=$abc$109383$new_n44436_
-.subckt mx2_x2 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[48][2] i1=soc.ram.ram[52][2] q=$abc$109383$new_n44437_
+.subckt mux2_x1 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[48][2] i1=soc.ram.ram[52][2] q=$abc$109383$new_n44437_
 .subckt nand2_x0 i0=$abc$109383$new_n44437_ i1=$abc$109383$new_n43488_ nq=$abc$109383$new_n44438_
-.subckt a2_x2 i0=$abc$109383$new_n44438_ i1=$abc$109383$new_n44080_ q=$abc$109383$new_n44439_
-.subckt oa22_x2 i0=$abc$109383$new_n44439_ i1=$abc$109383$new_n44436_ i2=$abc$109383$new_n43525_ q=$abc$109383$new_n44440_
-.subckt ao22_x2 i0=$abc$109383$new_n44440_ i1=$abc$109383$new_n44430_ i2=$abc$109383$new_n43729_ q=$abc$109383$new_n44441_
+.subckt and2_x1 i0=$abc$109383$new_n44438_ i1=$abc$109383$new_n44080_ q=$abc$109383$new_n44439_
+.subckt or21nand_x1 i0=$abc$109383$new_n44439_ i1=$abc$109383$new_n44436_ i2=$abc$109383$new_n43525_ nq=$abc$109383$new_n44440_
+.subckt and21nor_x1 i0=$abc$109383$new_n44440_ i1=$abc$109383$new_n44430_ i2=$abc$109383$new_n43729_ nq=$abc$109383$new_n44441_
 .subckt nand2_x0 i0=$abc$109383$new_n44441_ i1=$abc$109383$new_n44417_ nq=$abc$109383$new_n44442_
-.subckt a2_x2 i0=$abc$109383$new_n44442_ i1=$abc$109383$new_n44398_ q=$abc$109383$new_n44443_
+.subckt and2_x1 i0=$abc$109383$new_n44442_ i1=$abc$109383$new_n44398_ q=$abc$109383$new_n44443_
 .subckt buf_x4 i=$abc$109383$new_n43780_ q=$abc$109383$new_n44444_
-.subckt mx2_x2 cmd=$abc$109383$new_n44444_ i0=$abc$109383$new_n44443_ i1=$abc$109383$new_n44361_ q=$abc$109383$new_n44445_
+.subckt mux2_x1 cmd=$abc$109383$new_n44444_ i0=$abc$109383$new_n44443_ i1=$abc$109383$new_n44361_ q=$abc$109383$new_n44445_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n44446_
-.subckt ao22_x2 i0=$abc$109383$new_n44446_ i1=$abc$109383$new_n44445_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n44447_
+.subckt and21nor_x1 i0=$abc$109383$new_n44446_ i1=$abc$109383$new_n44445_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n44447_
 .subckt buf_x4 i=$abc$109383$new_n43554_ q=$abc$109383$new_n44448_
 .subckt buf_x4 i=$abc$109383$new_n44448_ q=$abc$109383$new_n44449_
 .subckt buf_x4 i=$abc$109383$new_n43654_ q=$abc$109383$new_n44450_
 .subckt buf_x4 i=$abc$109383$new_n44450_ q=$abc$109383$new_n44451_
 .subckt inv_x0 i=soc.ram.ram[87][2] nq=$abc$109383$new_n44452_
 .subckt nand2_x0 i0=$abc$109383$new_n44452_ i1=$abc$109383$new_n44451_ nq=$abc$109383$new_n44453_
-.subckt ao22_x2 i0=soc.ram.ram[83][2] i1=$abc$109383$new_n43926_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n44454_
+.subckt and21nor_x1 i0=soc.ram.ram[83][2] i1=$abc$109383$new_n43926_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n44454_
 .subckt nand2_x0 i0=$abc$109383$new_n44454_ i1=$abc$109383$new_n44453_ nq=$abc$109383$new_n44455_
 .subckt buf_x4 i=$abc$109383$new_n43488_ q=$abc$109383$new_n44456_
 .subckt buf_x4 i=$abc$109383$new_n44456_ q=$abc$109383$new_n44457_
-.subckt mx2_x2 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[82][2] i1=soc.ram.ram[86][2] q=$abc$109383$new_n44458_
+.subckt mux2_x1 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[82][2] i1=soc.ram.ram[86][2] q=$abc$109383$new_n44458_
 .subckt nand2_x0 i0=$abc$109383$new_n44458_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n44459_
 .subckt nand3_x0 i0=$abc$109383$new_n44459_ i1=$abc$109383$new_n44455_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n44460_
-.subckt ao22_x2 i0=soc.ram.ram[91][2] i1=$abc$109383$new_n44419_ i2=$abc$109383$new_n44402_ q=$abc$109383$new_n44461_
-.subckt ao22_x2 i0=$abc$109383$new_n44421_ i1=soc.ram.ram[95][2] i2=$abc$109383$new_n44461_ q=$abc$109383$new_n44462_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[90][2] i1=soc.ram.ram[94][2] q=$abc$109383$new_n44463_
-.subckt oa22_x2 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n44463_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n44464_
-.subckt ao22_x2 i0=$abc$109383$new_n44464_ i1=$abc$109383$new_n44462_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n44465_
+.subckt and21nor_x1 i0=soc.ram.ram[91][2] i1=$abc$109383$new_n44419_ i2=$abc$109383$new_n44402_ nq=$abc$109383$new_n44461_
+.subckt and21nor_x1 i0=$abc$109383$new_n44421_ i1=soc.ram.ram[95][2] i2=$abc$109383$new_n44461_ nq=$abc$109383$new_n44462_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[90][2] i1=soc.ram.ram[94][2] q=$abc$109383$new_n44463_
+.subckt or21nand_x1 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n44463_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n44464_
+.subckt and21nor_x1 i0=$abc$109383$new_n44464_ i1=$abc$109383$new_n44462_ i2=$abc$109383$new_n43809_ nq=$abc$109383$new_n44465_
 .subckt nand2_x0 i0=$abc$109383$new_n44465_ i1=$abc$109383$new_n44460_ nq=$abc$109383$new_n44466_
-.subckt mx2_x2 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[92][2] i1=soc.ram.ram[93][2] q=$abc$109383$new_n44467_
-.subckt mx2_x2 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[88][2] i1=soc.ram.ram[89][2] q=$abc$109383$new_n44468_
+.subckt mux2_x1 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[92][2] i1=soc.ram.ram[93][2] q=$abc$109383$new_n44467_
+.subckt mux2_x1 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[88][2] i1=soc.ram.ram[89][2] q=$abc$109383$new_n44468_
 .subckt buf_x4 i=$abc$109383$new_n43598_ q=$abc$109383$new_n44469_
-.subckt mx2_x2 cmd=$abc$109383$new_n44469_ i0=$abc$109383$new_n44468_ i1=$abc$109383$new_n44467_ q=$abc$109383$new_n44470_
+.subckt mux2_x1 cmd=$abc$109383$new_n44469_ i0=$abc$109383$new_n44468_ i1=$abc$109383$new_n44467_ q=$abc$109383$new_n44470_
 .subckt nor2_x0 i0=$abc$109383$new_n44470_ i1=$abc$109383$new_n43433_ nq=$abc$109383$new_n44471_
-.subckt mx2_x2 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[84][2] i1=soc.ram.ram[85][2] q=$abc$109383$new_n44472_
-.subckt mx2_x2 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[80][2] i1=soc.ram.ram[81][2] q=$abc$109383$new_n44473_
-.subckt mx2_x2 cmd=$abc$109383$new_n43509_ i0=$abc$109383$new_n44473_ i1=$abc$109383$new_n44472_ q=$abc$109383$new_n44474_
+.subckt mux2_x1 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[84][2] i1=soc.ram.ram[85][2] q=$abc$109383$new_n44472_
+.subckt mux2_x1 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[80][2] i1=soc.ram.ram[81][2] q=$abc$109383$new_n44473_
+.subckt mux2_x1 cmd=$abc$109383$new_n43509_ i0=$abc$109383$new_n44473_ i1=$abc$109383$new_n44472_ q=$abc$109383$new_n44474_
 .subckt nor2_x0 i0=$abc$109383$new_n44474_ i1=$abc$109383$new_n43767_ nq=$abc$109383$new_n44475_
-.subckt o3_x2 i0=$abc$109383$new_n44475_ i1=$abc$109383$new_n44471_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n44476_
-.subckt oa22_x2 i0=$abc$109383$new_n44476_ i1=$abc$109383$new_n44466_ i2=$abc$109383$new_n43921_ q=$abc$109383$new_n44477_
+.subckt or3_x1 i0=$abc$109383$new_n44475_ i1=$abc$109383$new_n44471_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n44476_
+.subckt or21nand_x1 i0=$abc$109383$new_n44476_ i1=$abc$109383$new_n44466_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n44477_
 .subckt buf_x4 i=$abc$109383$new_n43467_ q=$abc$109383$new_n44478_
 .subckt buf_x4 i=$abc$109383$new_n43712_ q=$abc$109383$new_n44479_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[74][2] i1=soc.ram.ram[78][2] q=$abc$109383$new_n44480_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[75][2] i1=soc.ram.ram[79][2] q=$abc$109383$new_n44481_
-.subckt mx2_x2 cmd=$abc$109383$new_n43941_ i0=$abc$109383$new_n44481_ i1=$abc$109383$new_n44480_ q=$abc$109383$new_n44482_
-.subckt o2_x2 i0=$abc$109383$new_n44482_ i1=$abc$109383$new_n44479_ q=$abc$109383$new_n44483_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[74][2] i1=soc.ram.ram[78][2] q=$abc$109383$new_n44480_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[75][2] i1=soc.ram.ram[79][2] q=$abc$109383$new_n44481_
+.subckt mux2_x1 cmd=$abc$109383$new_n43941_ i0=$abc$109383$new_n44481_ i1=$abc$109383$new_n44480_ q=$abc$109383$new_n44482_
+.subckt or2_x1 i0=$abc$109383$new_n44482_ i1=$abc$109383$new_n44479_ q=$abc$109383$new_n44483_
 .subckt buf_x4 i=$abc$109383$new_n43555_ q=$abc$109383$new_n44484_
 .subckt buf_x4 i=$abc$109383$new_n43494_ q=$abc$109383$new_n44485_
 .subckt buf_x4 i=$abc$109383$new_n44485_ q=$abc$109383$new_n44486_
 .subckt buf_x4 i=$abc$109383$new_n44145_ q=$abc$109383$new_n44487_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[66][2] i1=soc.ram.ram[70][2] q=$abc$109383$new_n44488_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[66][2] i1=soc.ram.ram[70][2] q=$abc$109383$new_n44488_
 .subckt nand2_x0 i0=$abc$109383$new_n44488_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n44489_
-.subckt mx2_x2 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[67][2] i1=soc.ram.ram[71][2] q=$abc$109383$new_n44490_
+.subckt mux2_x1 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[67][2] i1=soc.ram.ram[71][2] q=$abc$109383$new_n44490_
 .subckt nand2_x0 i0=$abc$109383$new_n44490_ i1=$abc$109383$new_n43963_ nq=$abc$109383$new_n44491_
 .subckt nand3_x0 i0=$abc$109383$new_n44491_ i1=$abc$109383$new_n44489_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n44492_
 .subckt nand3_x0 i0=$abc$109383$new_n44492_ i1=$abc$109383$new_n44483_ i2=$abc$109383$new_n43935_ nq=$abc$109383$new_n44493_
 .subckt buf_x4 i=$abc$109383$new_n44155_ q=$abc$109383$new_n44494_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[64][2] i1=soc.ram.ram[68][2] q=$abc$109383$new_n44495_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[65][2] i1=soc.ram.ram[69][2] q=$abc$109383$new_n44496_
-.subckt mx2_x2 cmd=$abc$109383$new_n43737_ i0=$abc$109383$new_n44496_ i1=$abc$109383$new_n44495_ q=$abc$109383$new_n44497_
-.subckt o2_x2 i0=$abc$109383$new_n44497_ i1=$abc$109383$new_n43570_ q=$abc$109383$new_n44498_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[64][2] i1=soc.ram.ram[68][2] q=$abc$109383$new_n44495_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[65][2] i1=soc.ram.ram[69][2] q=$abc$109383$new_n44496_
+.subckt mux2_x1 cmd=$abc$109383$new_n43737_ i0=$abc$109383$new_n44496_ i1=$abc$109383$new_n44495_ q=$abc$109383$new_n44497_
+.subckt or2_x1 i0=$abc$109383$new_n44497_ i1=$abc$109383$new_n43570_ q=$abc$109383$new_n44498_
 .subckt buf_x4 i=$abc$109383$new_n44228_ q=$abc$109383$new_n44499_
 .subckt buf_x4 i=$abc$109383$new_n43818_ q=$abc$109383$new_n44500_
 .subckt buf_x4 i=$abc$109383$new_n44500_ q=$abc$109383$new_n44501_
@@ -29777,94 +29777,94 @@
 .subckt nand2_x0 i0=$abc$109383$new_n44502_ i1=$abc$109383$new_n44501_ nq=$abc$109383$new_n44503_
 .subckt buf_x4 i=$abc$109383$new_n43629_ q=$abc$109383$new_n44504_
 .subckt buf_x4 i=$abc$109383$new_n44504_ q=$abc$109383$new_n44505_
-.subckt ao22_x2 i0=soc.ram.ram[73][2] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n44505_ q=$abc$109383$new_n44506_
+.subckt and21nor_x1 i0=soc.ram.ram[73][2] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n44505_ nq=$abc$109383$new_n44506_
 .subckt nand2_x0 i0=$abc$109383$new_n44506_ i1=$abc$109383$new_n44503_ nq=$abc$109383$new_n44507_
 .subckt buf_x4 i=$abc$109383$new_n43607_ q=$abc$109383$new_n44508_
-.subckt mx2_x2 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[72][2] i1=soc.ram.ram[76][2] q=$abc$109383$new_n44509_
+.subckt mux2_x1 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[72][2] i1=soc.ram.ram[76][2] q=$abc$109383$new_n44509_
 .subckt nand2_x0 i0=$abc$109383$new_n44509_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n44510_
 .subckt nand3_x0 i0=$abc$109383$new_n44510_ i1=$abc$109383$new_n44507_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n44511_
 .subckt nand3_x0 i0=$abc$109383$new_n44511_ i1=$abc$109383$new_n44498_ i2=$abc$109383$new_n44494_ nq=$abc$109383$new_n44512_
-.subckt oa22_x2 i0=$abc$109383$new_n44512_ i1=$abc$109383$new_n44493_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n44513_
-.subckt a3_x2 i0=$abc$109383$new_n44513_ i1=$abc$109383$new_n44477_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n44514_
+.subckt or21nand_x1 i0=$abc$109383$new_n44512_ i1=$abc$109383$new_n44493_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n44513_
+.subckt and3_x1 i0=$abc$109383$new_n44513_ i1=$abc$109383$new_n44477_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n44514_
 .subckt inv_x0 i=soc.ram.ram[105][2] nq=$abc$109383$new_n44515_
 .subckt inv_x0 i=soc.ram.ram[109][2] nq=$abc$109383$new_n44516_
-.subckt mx2_x2 cmd=$abc$109383$new_n43560_ i0=$abc$109383$new_n44516_ i1=$abc$109383$new_n44515_ q=$abc$109383$new_n44517_
+.subckt mux2_x1 cmd=$abc$109383$new_n43560_ i0=$abc$109383$new_n44516_ i1=$abc$109383$new_n44515_ q=$abc$109383$new_n44517_
 .subckt inv_x0 i=soc.ram.ram[104][2] nq=$abc$109383$new_n44518_
 .subckt inv_x0 i=soc.ram.ram[108][2] nq=$abc$109383$new_n44519_
-.subckt mx2_x2 cmd=$abc$109383$new_n43560_ i0=$abc$109383$new_n44519_ i1=$abc$109383$new_n44518_ q=$abc$109383$new_n44520_
-.subckt mx2_x2 cmd=$abc$109383$new_n43889_ i0=$abc$109383$new_n44520_ i1=$abc$109383$new_n44517_ q=$abc$109383$new_n44521_
-.subckt a2_x2 i0=$abc$109383$new_n44521_ i1=$abc$109383$new_n43473_ q=$abc$109383$new_n44522_
+.subckt mux2_x1 cmd=$abc$109383$new_n43560_ i0=$abc$109383$new_n44519_ i1=$abc$109383$new_n44518_ q=$abc$109383$new_n44520_
+.subckt mux2_x1 cmd=$abc$109383$new_n43889_ i0=$abc$109383$new_n44520_ i1=$abc$109383$new_n44517_ q=$abc$109383$new_n44521_
+.subckt and2_x1 i0=$abc$109383$new_n44521_ i1=$abc$109383$new_n43473_ q=$abc$109383$new_n44522_
 .subckt buf_x4 i=$abc$109383$new_n43711_ q=$abc$109383$new_n44523_
 .subckt inv_x0 i=soc.ram.ram[106][2] nq=$abc$109383$new_n44524_
 .subckt inv_x0 i=soc.ram.ram[110][2] nq=$abc$109383$new_n44525_
-.subckt mx2_x2 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n44525_ i1=$abc$109383$new_n44524_ q=$abc$109383$new_n44526_
+.subckt mux2_x1 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n44525_ i1=$abc$109383$new_n44524_ q=$abc$109383$new_n44526_
 .subckt inv_x0 i=soc.ram.ram[107][2] nq=$abc$109383$new_n44527_
 .subckt inv_x0 i=soc.ram.ram[111][2] nq=$abc$109383$new_n44528_
-.subckt mx2_x2 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n44528_ i1=$abc$109383$new_n44527_ q=$abc$109383$new_n44529_
-.subckt mx2_x2 cmd=$abc$109383$new_n43384_ i0=$abc$109383$new_n44529_ i1=$abc$109383$new_n44526_ q=$abc$109383$new_n44530_
-.subckt oa22_x2 i0=$abc$109383$new_n43458_ i1=$abc$109383$new_n44530_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n44531_
-.subckt o2_x2 i0=$abc$109383$new_n44531_ i1=$abc$109383$new_n44522_ q=$abc$109383$new_n44532_
+.subckt mux2_x1 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n44528_ i1=$abc$109383$new_n44527_ q=$abc$109383$new_n44529_
+.subckt mux2_x1 cmd=$abc$109383$new_n43384_ i0=$abc$109383$new_n44529_ i1=$abc$109383$new_n44526_ q=$abc$109383$new_n44530_
+.subckt or21nand_x1 i0=$abc$109383$new_n43458_ i1=$abc$109383$new_n44530_ i2=$abc$109383$new_n44523_ nq=$abc$109383$new_n44531_
+.subckt or2_x1 i0=$abc$109383$new_n44531_ i1=$abc$109383$new_n44522_ q=$abc$109383$new_n44532_
 .subckt inv_x0 i=soc.ram.ram[97][2] nq=$abc$109383$new_n44533_
 .subckt inv_x0 i=soc.ram.ram[101][2] nq=$abc$109383$new_n44534_
 .subckt buf_x4 i=$abc$109383$new_n43876_ q=$abc$109383$new_n44535_
-.subckt mx2_x2 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n44534_ i1=$abc$109383$new_n44533_ q=$abc$109383$new_n44536_
+.subckt mux2_x1 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n44534_ i1=$abc$109383$new_n44533_ q=$abc$109383$new_n44536_
 .subckt inv_x0 i=soc.ram.ram[96][2] nq=$abc$109383$new_n44537_
 .subckt inv_x0 i=soc.ram.ram[100][2] nq=$abc$109383$new_n44538_
-.subckt mx2_x2 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n44538_ i1=$abc$109383$new_n44537_ q=$abc$109383$new_n44539_
-.subckt mx2_x2 cmd=$abc$109383$new_n44402_ i0=$abc$109383$new_n44539_ i1=$abc$109383$new_n44536_ q=$abc$109383$new_n44540_
-.subckt a2_x2 i0=$abc$109383$new_n44540_ i1=$abc$109383$new_n43449_ q=$abc$109383$new_n44541_
-.subckt mx2_x2 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[99][2] i1=soc.ram.ram[103][2] q=$abc$109383$new_n44542_
-.subckt mx2_x2 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[98][2] i1=soc.ram.ram[102][2] q=$abc$109383$new_n44543_
-.subckt mx2_x2 cmd=$abc$109383$new_n43546_ i0=$abc$109383$new_n44543_ i1=$abc$109383$new_n44542_ q=$abc$109383$new_n44544_
+.subckt mux2_x1 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n44538_ i1=$abc$109383$new_n44537_ q=$abc$109383$new_n44539_
+.subckt mux2_x1 cmd=$abc$109383$new_n44402_ i0=$abc$109383$new_n44539_ i1=$abc$109383$new_n44536_ q=$abc$109383$new_n44540_
+.subckt and2_x1 i0=$abc$109383$new_n44540_ i1=$abc$109383$new_n43449_ q=$abc$109383$new_n44541_
+.subckt mux2_x1 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[99][2] i1=soc.ram.ram[103][2] q=$abc$109383$new_n44542_
+.subckt mux2_x1 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[98][2] i1=soc.ram.ram[102][2] q=$abc$109383$new_n44543_
+.subckt mux2_x1 cmd=$abc$109383$new_n43546_ i0=$abc$109383$new_n44543_ i1=$abc$109383$new_n44542_ q=$abc$109383$new_n44544_
 .subckt nor2_x0 i0=$abc$109383$new_n44544_ i1=$abc$109383$new_n43330_ nq=$abc$109383$new_n44545_
-.subckt o2_x2 i0=$abc$109383$new_n44545_ i1=$abc$109383$new_n44228_ q=$abc$109383$new_n44546_
-.subckt ao22_x2 i0=$abc$109383$new_n44546_ i1=$abc$109383$new_n44541_ i2=$abc$109383$new_n44114_ q=$abc$109383$new_n44547_
-.subckt a2_x2 i0=$abc$109383$new_n44547_ i1=$abc$109383$new_n44532_ q=$abc$109383$new_n44548_
-.subckt mx2_x2 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[122][2] i1=soc.ram.ram[126][2] q=$abc$109383$new_n44549_
-.subckt oa22_x2 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n44549_ i2=$abc$109383$new_n43724_ q=$abc$109383$new_n44550_
-.subckt ao22_x2 i0=soc.ram.ram[123][2] i1=$abc$109383$new_n43868_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n44551_
+.subckt or2_x1 i0=$abc$109383$new_n44545_ i1=$abc$109383$new_n44228_ q=$abc$109383$new_n44546_
+.subckt and21nor_x1 i0=$abc$109383$new_n44546_ i1=$abc$109383$new_n44541_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n44547_
+.subckt and2_x1 i0=$abc$109383$new_n44547_ i1=$abc$109383$new_n44532_ q=$abc$109383$new_n44548_
+.subckt mux2_x1 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[122][2] i1=soc.ram.ram[126][2] q=$abc$109383$new_n44549_
+.subckt or21nand_x1 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n44549_ i2=$abc$109383$new_n43724_ nq=$abc$109383$new_n44550_
+.subckt and21nor_x1 i0=soc.ram.ram[123][2] i1=$abc$109383$new_n43868_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n44551_
 .subckt inv_x0 i=soc.ram.ram[127][2] nq=$abc$109383$new_n44552_
 .subckt nand2_x0 i0=$abc$109383$new_n44552_ i1=$abc$109383$new_n44011_ nq=$abc$109383$new_n44553_
-.subckt oa22_x2 i0=$abc$109383$new_n44553_ i1=$abc$109383$new_n44551_ i2=$abc$109383$new_n44550_ q=$abc$109383$new_n44554_
+.subckt or21nand_x1 i0=$abc$109383$new_n44553_ i1=$abc$109383$new_n44551_ i2=$abc$109383$new_n44550_ nq=$abc$109383$new_n44554_
 .subckt buf_x4 i=$abc$109383$new_n43403_ q=$abc$109383$new_n44555_
-.subckt ao22_x2 i0=soc.ram.ram[121][2] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43642_ q=$abc$109383$new_n44556_
-.subckt ao22_x2 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[125][2] i2=$abc$109383$new_n44556_ q=$abc$109383$new_n44557_
-.subckt mx2_x2 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[120][2] i1=soc.ram.ram[124][2] q=$abc$109383$new_n44558_
-.subckt oa22_x2 i0=$abc$109383$new_n43428_ i1=$abc$109383$new_n44558_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n44559_
-.subckt ao22_x2 i0=$abc$109383$new_n44559_ i1=$abc$109383$new_n44557_ i2=$abc$109383$new_n43649_ q=$abc$109383$new_n44560_
+.subckt and21nor_x1 i0=soc.ram.ram[121][2] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43642_ nq=$abc$109383$new_n44556_
+.subckt and21nor_x1 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[125][2] i2=$abc$109383$new_n44556_ nq=$abc$109383$new_n44557_
+.subckt mux2_x1 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[120][2] i1=soc.ram.ram[124][2] q=$abc$109383$new_n44558_
+.subckt or21nand_x1 i0=$abc$109383$new_n43428_ i1=$abc$109383$new_n44558_ i2=$abc$109383$new_n43506_ nq=$abc$109383$new_n44559_
+.subckt and21nor_x1 i0=$abc$109383$new_n44559_ i1=$abc$109383$new_n44557_ i2=$abc$109383$new_n43649_ nq=$abc$109383$new_n44560_
 .subckt nand2_x0 i0=$abc$109383$new_n44560_ i1=$abc$109383$new_n44554_ nq=$abc$109383$new_n44561_
 .subckt buf_x4 i=$abc$109383$new_n44426_ q=$abc$109383$new_n44562_
 .subckt buf_x4 i=$abc$109383$new_n43357_ q=$abc$109383$new_n44563_
-.subckt mx2_x2 cmd=$abc$109383$new_n44563_ i0=soc.ram.ram[114][2] i1=soc.ram.ram[118][2] q=$abc$109383$new_n44564_
+.subckt mux2_x1 cmd=$abc$109383$new_n44563_ i0=soc.ram.ram[114][2] i1=soc.ram.ram[118][2] q=$abc$109383$new_n44564_
 .subckt nand2_x0 i0=$abc$109383$new_n44564_ i1=$abc$109383$new_n44562_ nq=$abc$109383$new_n44565_
-.subckt mx2_x2 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[115][2] i1=soc.ram.ram[119][2] q=$abc$109383$new_n44566_
+.subckt mux2_x1 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[115][2] i1=soc.ram.ram[119][2] q=$abc$109383$new_n44566_
 .subckt nand2_x0 i0=$abc$109383$new_n44566_ i1=$abc$109383$new_n43962_ nq=$abc$109383$new_n44567_
-.subckt a3_x2 i0=$abc$109383$new_n44567_ i1=$abc$109383$new_n44565_ i2=$abc$109383$new_n44096_ q=$abc$109383$new_n44568_
-.subckt mx2_x2 cmd=$abc$109383$new_n43636_ i0=soc.ram.ram[112][2] i1=soc.ram.ram[116][2] q=$abc$109383$new_n44569_
+.subckt and3_x1 i0=$abc$109383$new_n44567_ i1=$abc$109383$new_n44565_ i2=$abc$109383$new_n44096_ q=$abc$109383$new_n44568_
+.subckt mux2_x1 cmd=$abc$109383$new_n43636_ i0=soc.ram.ram[112][2] i1=soc.ram.ram[116][2] q=$abc$109383$new_n44569_
 .subckt nand2_x0 i0=$abc$109383$new_n44569_ i1=$abc$109383$new_n43435_ nq=$abc$109383$new_n44570_
 .subckt buf_x4 i=$abc$109383$new_n43417_ q=$abc$109383$new_n44571_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[113][2] i1=soc.ram.ram[117][2] q=$abc$109383$new_n44572_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[113][2] i1=soc.ram.ram[117][2] q=$abc$109383$new_n44572_
 .subckt nand2_x0 i0=$abc$109383$new_n44572_ i1=$abc$109383$new_n44377_ nq=$abc$109383$new_n44573_
-.subckt a2_x2 i0=$abc$109383$new_n44573_ i1=$abc$109383$new_n44075_ q=$abc$109383$new_n44574_
-.subckt oa22_x2 i0=$abc$109383$new_n44574_ i1=$abc$109383$new_n44570_ i2=$abc$109383$new_n43569_ q=$abc$109383$new_n44575_
-.subckt ao22_x2 i0=$abc$109383$new_n44575_ i1=$abc$109383$new_n44568_ i2=$abc$109383$new_n43467_ q=$abc$109383$new_n44576_
-.subckt a2_x2 i0=$abc$109383$new_n44576_ i1=$abc$109383$new_n44561_ q=$abc$109383$new_n44577_
-.subckt ao22_x2 i0=$abc$109383$new_n44577_ i1=$abc$109383$new_n44548_ i2=$abc$109383$new_n43865_ q=$abc$109383$new_n44578_
+.subckt and2_x1 i0=$abc$109383$new_n44573_ i1=$abc$109383$new_n44075_ q=$abc$109383$new_n44574_
+.subckt or21nand_x1 i0=$abc$109383$new_n44574_ i1=$abc$109383$new_n44570_ i2=$abc$109383$new_n43569_ nq=$abc$109383$new_n44575_
+.subckt and21nor_x1 i0=$abc$109383$new_n44575_ i1=$abc$109383$new_n44568_ i2=$abc$109383$new_n43467_ nq=$abc$109383$new_n44576_
+.subckt and2_x1 i0=$abc$109383$new_n44576_ i1=$abc$109383$new_n44561_ q=$abc$109383$new_n44577_
+.subckt and21nor_x1 i0=$abc$109383$new_n44577_ i1=$abc$109383$new_n44548_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n44578_
 .subckt nor2_x0 i0=$abc$109383$new_n44578_ i1=$abc$109383$new_n44514_ nq=$abc$109383$new_n44579_
-.subckt o2_x2 i0=$abc$109383$new_n44579_ i1=$abc$109383$new_n43591_ q=$abc$109383$new_n44580_
-.subckt oa22_x2 i0=$abc$109383$new_n44580_ i1=$abc$109383$new_n44447_ i2=$abc$109383$new_n44300_ q=$abc$109383$new_n44581_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n44581_ i2=$abc$109383$new_n44281_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103206
+.subckt or2_x1 i0=$abc$109383$new_n44579_ i1=$abc$109383$new_n43591_ q=$abc$109383$new_n44580_
+.subckt or21nand_x1 i0=$abc$109383$new_n44580_ i1=$abc$109383$new_n44447_ i2=$abc$109383$new_n44300_ nq=$abc$109383$new_n44581_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n44581_ i2=$abc$109383$new_n44281_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103206
 .subckt nand2_x0 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n28378_ nq=$abc$109383$new_n44583_
 .subckt buf_x4 i=$abc$109383$new_n44114_ q=$abc$109383$new_n44584_
 .subckt buf_x4 i=$abc$109383$new_n44584_ q=$abc$109383$new_n44585_
 .subckt buf_x4 i=$abc$109383$new_n43599_ q=$abc$109383$new_n44586_
 .subckt buf_x4 i=$abc$109383$new_n44586_ q=$abc$109383$new_n44587_
-.subckt mx2_x2 cmd=$abc$109383$new_n44587_ i0=soc.ram.ram[26][3] i1=soc.ram.ram[30][3] q=$abc$109383$new_n44588_
+.subckt mux2_x1 cmd=$abc$109383$new_n44587_ i0=soc.ram.ram[26][3] i1=soc.ram.ram[30][3] q=$abc$109383$new_n44588_
 .subckt nand2_x0 i0=$abc$109383$new_n44588_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n44589_
 .subckt buf_x4 i=$abc$109383$new_n43798_ q=$abc$109383$new_n44590_
 .subckt buf_x4 i=$abc$109383$new_n44590_ q=$abc$109383$new_n44591_
 .subckt buf_x4 i=$abc$109383$new_n44405_ q=$abc$109383$new_n44592_
-.subckt mx2_x2 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[27][3] i1=soc.ram.ram[31][3] q=$abc$109383$new_n44593_
+.subckt mux2_x1 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[27][3] i1=soc.ram.ram[31][3] q=$abc$109383$new_n44593_
 .subckt nand2_x0 i0=$abc$109383$new_n44593_ i1=$abc$109383$new_n44591_ nq=$abc$109383$new_n44594_
 .subckt nand3_x0 i0=$abc$109383$new_n44594_ i1=$abc$109383$new_n44589_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n44595_
 .subckt buf_x4 i=$abc$109383$new_n43487_ q=$abc$109383$new_n44596_
@@ -29872,12 +29872,12 @@
 .subckt buf_x4 i=$abc$109383$new_n44597_ q=$abc$109383$new_n44598_
 .subckt buf_x4 i=$abc$109383$new_n44598_ q=$abc$109383$new_n44599_
 .subckt buf_x4 i=$abc$109383$new_n43477_ q=$abc$109383$new_n44600_
-.subckt mx2_x2 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[24][3] i1=soc.ram.ram[28][3] q=$abc$109383$new_n44601_
+.subckt mux2_x1 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[24][3] i1=soc.ram.ram[28][3] q=$abc$109383$new_n44601_
 .subckt nand2_x0 i0=$abc$109383$new_n44601_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n44602_
 .subckt buf_x4 i=$abc$109383$new_n43924_ q=$abc$109383$new_n44603_
 .subckt buf_x4 i=$abc$109383$new_n44066_ q=$abc$109383$new_n44604_
 .subckt buf_x4 i=$abc$109383$new_n44604_ q=$abc$109383$new_n44605_
-.subckt mx2_x2 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[25][3] i1=soc.ram.ram[29][3] q=$abc$109383$new_n44606_
+.subckt mux2_x1 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[25][3] i1=soc.ram.ram[29][3] q=$abc$109383$new_n44606_
 .subckt nand2_x0 i0=$abc$109383$new_n44606_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n44607_
 .subckt nand3_x0 i0=$abc$109383$new_n44607_ i1=$abc$109383$new_n44602_ i2=$abc$109383$new_n43857_ nq=$abc$109383$new_n44608_
 .subckt nand3_x0 i0=$abc$109383$new_n44608_ i1=$abc$109383$new_n44595_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n44609_
@@ -29887,10 +29887,10 @@
 .subckt buf_x4 i=$abc$109383$new_n43826_ q=$abc$109383$new_n44613_
 .subckt inv_x0 i=soc.ram.ram[21][3] nq=$abc$109383$new_n44614_
 .subckt nand2_x0 i0=$abc$109383$new_n44614_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n44615_
-.subckt ao22_x2 i0=soc.ram.ram[17][3] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44590_ q=$abc$109383$new_n44616_
+.subckt and21nor_x1 i0=soc.ram.ram[17][3] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44590_ nq=$abc$109383$new_n44616_
 .subckt nand2_x0 i0=$abc$109383$new_n44616_ i1=$abc$109383$new_n44615_ nq=$abc$109383$new_n44617_
 .subckt buf_x4 i=$abc$109383$new_n44457_ q=$abc$109383$new_n44618_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[16][3] i1=soc.ram.ram[20][3] q=$abc$109383$new_n44619_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[16][3] i1=soc.ram.ram[20][3] q=$abc$109383$new_n44619_
 .subckt nand2_x0 i0=$abc$109383$new_n44619_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n44620_
 .subckt nand3_x0 i0=$abc$109383$new_n44620_ i1=$abc$109383$new_n44617_ i2=$abc$109383$new_n43857_ nq=$abc$109383$new_n44621_
 .subckt buf_x4 i=$abc$109383$new_n43650_ q=$abc$109383$new_n44622_
@@ -29899,29 +29899,29 @@
 .subckt nand2_x0 i0=$abc$109383$new_n44624_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n44625_
 .subckt buf_x4 i=$abc$109383$new_n44106_ q=$abc$109383$new_n44626_
 .subckt buf_x4 i=$abc$109383$new_n44626_ q=$abc$109383$new_n44627_
-.subckt ao22_x2 i0=soc.ram.ram[19][3] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n44628_
+.subckt and21nor_x1 i0=soc.ram.ram[19][3] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n44628_
 .subckt nand2_x0 i0=$abc$109383$new_n44628_ i1=$abc$109383$new_n44625_ nq=$abc$109383$new_n44629_
 .subckt buf_x4 i=$abc$109383$new_n43456_ q=$abc$109383$new_n44630_
 .subckt buf_x4 i=$abc$109383$new_n44630_ q=$abc$109383$new_n44631_
 .subckt buf_x4 i=$abc$109383$new_n44631_ q=$abc$109383$new_n44632_
 .subckt buf_x4 i=$abc$109383$new_n43419_ q=$abc$109383$new_n44633_
 .subckt buf_x4 i=$abc$109383$new_n44633_ q=$abc$109383$new_n44634_
-.subckt mx2_x2 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[18][3] i1=soc.ram.ram[22][3] q=$abc$109383$new_n44635_
+.subckt mux2_x1 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[18][3] i1=soc.ram.ram[22][3] q=$abc$109383$new_n44635_
 .subckt nand2_x0 i0=$abc$109383$new_n44635_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n44636_
 .subckt nand3_x0 i0=$abc$109383$new_n44636_ i1=$abc$109383$new_n44629_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n44637_
 .subckt nand3_x0 i0=$abc$109383$new_n44637_ i1=$abc$109383$new_n44621_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n44638_
-.subckt oa22_x2 i0=$abc$109383$new_n44638_ i1=$abc$109383$new_n44609_ i2=$abc$109383$new_n44585_ q=$abc$109383$new_n44639_
+.subckt or21nand_x1 i0=$abc$109383$new_n44638_ i1=$abc$109383$new_n44609_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n44639_
 .subckt buf_x4 i=$abc$109383$new_n43898_ q=$abc$109383$new_n44640_
 .subckt buf_x4 i=$abc$109383$new_n43507_ q=$abc$109383$new_n44641_
 .subckt buf_x4 i=$abc$109383$new_n44641_ q=$abc$109383$new_n44642_
-.subckt mx2_x2 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[10][3] i1=soc.ram.ram[14][3] q=$abc$109383$new_n44643_
+.subckt mux2_x1 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[10][3] i1=soc.ram.ram[14][3] q=$abc$109383$new_n44643_
 .subckt nand2_x0 i0=$abc$109383$new_n44643_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n44644_
-.subckt mx2_x2 cmd=$abc$109383$new_n44451_ i0=soc.ram.ram[11][3] i1=soc.ram.ram[15][3] q=$abc$109383$new_n44645_
+.subckt mux2_x1 cmd=$abc$109383$new_n44451_ i0=soc.ram.ram[11][3] i1=soc.ram.ram[15][3] q=$abc$109383$new_n44645_
 .subckt nand2_x0 i0=$abc$109383$new_n44645_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n44646_
 .subckt nand3_x0 i0=$abc$109383$new_n44646_ i1=$abc$109383$new_n44644_ i2=$abc$109383$new_n44642_ nq=$abc$109383$new_n44647_
-.subckt mx2_x2 cmd=$abc$109383$new_n44451_ i0=soc.ram.ram[8][3] i1=soc.ram.ram[12][3] q=$abc$109383$new_n44648_
+.subckt mux2_x1 cmd=$abc$109383$new_n44451_ i0=soc.ram.ram[8][3] i1=soc.ram.ram[12][3] q=$abc$109383$new_n44648_
 .subckt nand2_x0 i0=$abc$109383$new_n44648_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n44649_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[9][3] i1=soc.ram.ram[13][3] q=$abc$109383$new_n44650_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[9][3] i1=soc.ram.ram[13][3] q=$abc$109383$new_n44650_
 .subckt nand2_x0 i0=$abc$109383$new_n44650_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n44651_
 .subckt nand3_x0 i0=$abc$109383$new_n44651_ i1=$abc$109383$new_n44649_ i2=$abc$109383$new_n43857_ nq=$abc$109383$new_n44652_
 .subckt nand3_x0 i0=$abc$109383$new_n44652_ i1=$abc$109383$new_n44647_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n44653_
@@ -29932,80 +29932,80 @@
 .subckt inv_x0 i=soc.ram.ram[5][3] nq=$abc$109383$new_n44658_
 .subckt nand2_x0 i0=$abc$109383$new_n44658_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n44659_
 .subckt buf_x4 i=$abc$109383$new_n43926_ q=$abc$109383$new_n44660_
-.subckt ao22_x2 i0=soc.ram.ram[1][3] i1=$abc$109383$new_n44660_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n44661_
+.subckt and21nor_x1 i0=soc.ram.ram[1][3] i1=$abc$109383$new_n44660_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n44661_
 .subckt nand2_x0 i0=$abc$109383$new_n44661_ i1=$abc$109383$new_n44659_ nq=$abc$109383$new_n44662_
-.subckt mx2_x2 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[0][3] i1=soc.ram.ram[4][3] q=$abc$109383$new_n44663_
+.subckt mux2_x1 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[0][3] i1=soc.ram.ram[4][3] q=$abc$109383$new_n44663_
 .subckt nand2_x0 i0=$abc$109383$new_n44663_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n44664_
 .subckt nand3_x0 i0=$abc$109383$new_n44664_ i1=$abc$109383$new_n44662_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n44665_
 .subckt buf_x4 i=$abc$109383$new_n44027_ q=$abc$109383$new_n44666_
 .subckt inv_x0 i=soc.ram.ram[7][3] nq=$abc$109383$new_n44667_
 .subckt nand2_x0 i0=$abc$109383$new_n44667_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n44668_
-.subckt ao22_x2 i0=soc.ram.ram[3][3] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n44669_
+.subckt and21nor_x1 i0=soc.ram.ram[3][3] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n44669_
 .subckt nand2_x0 i0=$abc$109383$new_n44669_ i1=$abc$109383$new_n44668_ nq=$abc$109383$new_n44670_
-.subckt mx2_x2 cmd=$abc$109383$new_n44501_ i0=soc.ram.ram[2][3] i1=soc.ram.ram[6][3] q=$abc$109383$new_n44671_
+.subckt mux2_x1 cmd=$abc$109383$new_n44501_ i0=soc.ram.ram[2][3] i1=soc.ram.ram[6][3] q=$abc$109383$new_n44671_
 .subckt nand2_x0 i0=$abc$109383$new_n44671_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n44672_
 .subckt nand3_x0 i0=$abc$109383$new_n44672_ i1=$abc$109383$new_n44670_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n44673_
 .subckt nand3_x0 i0=$abc$109383$new_n44673_ i1=$abc$109383$new_n44665_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n44674_
-.subckt oa22_x2 i0=$abc$109383$new_n44674_ i1=$abc$109383$new_n44653_ i2=$abc$109383$new_n43841_ q=$abc$109383$new_n44675_
+.subckt or21nand_x1 i0=$abc$109383$new_n44674_ i1=$abc$109383$new_n44653_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n44675_
 .subckt nand3_x0 i0=$abc$109383$new_n44675_ i1=$abc$109383$new_n44639_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n44676_
 .subckt buf_x4 i=$abc$109383$new_n44410_ q=$abc$109383$new_n44677_
-.subckt mx2_x2 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[57][3] i1=soc.ram.ram[61][3] q=$abc$109383$new_n44678_
-.subckt mx2_x2 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[56][3] i1=soc.ram.ram[60][3] q=$abc$109383$new_n44679_
-.subckt mx2_x2 cmd=$abc$109383$new_n43998_ i0=$abc$109383$new_n44679_ i1=$abc$109383$new_n44678_ q=$abc$109383$new_n44680_
+.subckt mux2_x1 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[57][3] i1=soc.ram.ram[61][3] q=$abc$109383$new_n44678_
+.subckt mux2_x1 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[56][3] i1=soc.ram.ram[60][3] q=$abc$109383$new_n44679_
+.subckt mux2_x1 cmd=$abc$109383$new_n43998_ i0=$abc$109383$new_n44679_ i1=$abc$109383$new_n44678_ q=$abc$109383$new_n44680_
 .subckt nand2_x0 i0=$abc$109383$new_n44680_ i1=$abc$109383$new_n44677_ nq=$abc$109383$new_n44681_
 .subckt inv_x0 i=soc.ram.ram[49][3] nq=$abc$109383$new_n44682_
 .subckt inv_x0 i=soc.ram.ram[53][3] nq=$abc$109383$new_n44683_
-.subckt mx2_x2 cmd=$abc$109383$new_n43530_ i0=$abc$109383$new_n44683_ i1=$abc$109383$new_n44682_ q=$abc$109383$new_n44684_
+.subckt mux2_x1 cmd=$abc$109383$new_n43530_ i0=$abc$109383$new_n44683_ i1=$abc$109383$new_n44682_ q=$abc$109383$new_n44684_
 .subckt inv_x0 i=soc.ram.ram[48][3] nq=$abc$109383$new_n44685_
 .subckt inv_x0 i=soc.ram.ram[52][3] nq=$abc$109383$new_n44686_
-.subckt mx2_x2 cmd=$abc$109383$new_n44427_ i0=$abc$109383$new_n44686_ i1=$abc$109383$new_n44685_ q=$abc$109383$new_n44687_
+.subckt mux2_x1 cmd=$abc$109383$new_n44427_ i0=$abc$109383$new_n44686_ i1=$abc$109383$new_n44685_ q=$abc$109383$new_n44687_
 .subckt buf_x4 i=$abc$109383$new_n43611_ q=$abc$109383$new_n44688_
-.subckt mx2_x2 cmd=$abc$109383$new_n44688_ i0=$abc$109383$new_n44687_ i1=$abc$109383$new_n44684_ q=$abc$109383$new_n44689_
-.subckt ao22_x2 i0=$abc$109383$new_n44689_ i1=$abc$109383$new_n44499_ i2=$abc$109383$new_n44656_ q=$abc$109383$new_n44690_
-.subckt oa22_x2 i0=$abc$109383$new_n44690_ i1=$abc$109383$new_n44681_ i2=$abc$109383$new_n44584_ q=$abc$109383$new_n44691_
+.subckt mux2_x1 cmd=$abc$109383$new_n44688_ i0=$abc$109383$new_n44687_ i1=$abc$109383$new_n44684_ q=$abc$109383$new_n44689_
+.subckt and21nor_x1 i0=$abc$109383$new_n44689_ i1=$abc$109383$new_n44499_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n44690_
+.subckt or21nand_x1 i0=$abc$109383$new_n44690_ i1=$abc$109383$new_n44681_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n44691_
 .subckt buf_x4 i=$abc$109383$new_n43470_ q=$abc$109383$new_n44692_
 .subckt buf_x4 i=$abc$109383$new_n44692_ q=$abc$109383$new_n44693_
-.subckt mx2_x2 cmd=$abc$109383$new_n43802_ i0=soc.ram.ram[58][3] i1=soc.ram.ram[62][3] q=$abc$109383$new_n44694_
+.subckt mux2_x1 cmd=$abc$109383$new_n43802_ i0=soc.ram.ram[58][3] i1=soc.ram.ram[62][3] q=$abc$109383$new_n44694_
 .subckt nand2_x0 i0=$abc$109383$new_n44694_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n44695_
 .subckt inv_x0 i=soc.ram.ram[63][3] nq=$abc$109383$new_n44696_
 .subckt nand2_x0 i0=$abc$109383$new_n44696_ i1=$abc$109383$new_n43861_ nq=$abc$109383$new_n44697_
-.subckt ao22_x2 i0=soc.ram.ram[59][3] i1=$abc$109383$new_n43915_ i2=$abc$109383$new_n43914_ q=$abc$109383$new_n44698_
+.subckt and21nor_x1 i0=soc.ram.ram[59][3] i1=$abc$109383$new_n43915_ i2=$abc$109383$new_n43914_ nq=$abc$109383$new_n44698_
 .subckt nand2_x0 i0=$abc$109383$new_n44698_ i1=$abc$109383$new_n44697_ nq=$abc$109383$new_n44699_
-.subckt oa22_x2 i0=$abc$109383$new_n44699_ i1=$abc$109383$new_n44695_ i2=$abc$109383$new_n44693_ q=$abc$109383$new_n44700_
-.subckt a2_x2 i0=$abc$109383$new_n44700_ i1=$abc$109383$new_n44623_ q=$abc$109383$new_n44701_
+.subckt or21nand_x1 i0=$abc$109383$new_n44699_ i1=$abc$109383$new_n44695_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n44700_
+.subckt and2_x1 i0=$abc$109383$new_n44700_ i1=$abc$109383$new_n44623_ q=$abc$109383$new_n44701_
 .subckt buf_x4 i=$abc$109383$new_n44562_ q=$abc$109383$new_n44702_
 .subckt buf_x4 i=$abc$109383$new_n44702_ q=$abc$109383$new_n44703_
 .subckt buf_x4 i=$abc$109383$new_n43953_ q=$abc$109383$new_n44704_
-.subckt mx2_x2 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[50][3] i1=soc.ram.ram[54][3] q=$abc$109383$new_n44705_
+.subckt mux2_x1 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[50][3] i1=soc.ram.ram[54][3] q=$abc$109383$new_n44705_
 .subckt nand2_x0 i0=$abc$109383$new_n44705_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n44706_
-.subckt o2_x2 i0=soc.ram.ram[51][3] i1=$abc$109383$new_n43927_ q=$abc$109383$new_n44707_
-.subckt ao22_x2 i0=soc.ram.ram[55][3] i1=$abc$109383$new_n43931_ i2=$abc$109383$new_n43963_ q=$abc$109383$new_n44708_
+.subckt or2_x1 i0=soc.ram.ram[51][3] i1=$abc$109383$new_n43927_ q=$abc$109383$new_n44707_
+.subckt and21nor_x1 i0=soc.ram.ram[55][3] i1=$abc$109383$new_n43931_ i2=$abc$109383$new_n43963_ nq=$abc$109383$new_n44708_
 .subckt nand2_x0 i0=$abc$109383$new_n44708_ i1=$abc$109383$new_n44707_ nq=$abc$109383$new_n44709_
-.subckt oa22_x2 i0=$abc$109383$new_n44709_ i1=$abc$109383$new_n44706_ i2=$abc$109383$new_n44677_ q=$abc$109383$new_n44710_
-.subckt oa22_x2 i0=$abc$109383$new_n44710_ i1=$abc$109383$new_n44701_ i2=$abc$109383$new_n44691_ q=$abc$109383$new_n44711_
-.subckt o2_x2 i0=soc.ram.ram[41][3] i1=$abc$109383$new_n44208_ q=$abc$109383$new_n44712_
-.subckt ao22_x2 i0=soc.ram.ram[45][3] i1=$abc$109383$new_n43931_ i2=$abc$109383$new_n43998_ q=$abc$109383$new_n44713_
-.subckt a2_x2 i0=$abc$109383$new_n44713_ i1=$abc$109383$new_n44712_ q=$abc$109383$new_n44714_
-.subckt mx2_x2 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[40][3] i1=soc.ram.ram[44][3] q=$abc$109383$new_n44715_
-.subckt a2_x2 i0=$abc$109383$new_n44715_ i1=$abc$109383$new_n43904_ q=$abc$109383$new_n44716_
-.subckt ao22_x2 i0=$abc$109383$new_n44716_ i1=$abc$109383$new_n44714_ i2=$abc$109383$new_n44677_ q=$abc$109383$new_n44717_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[32][3] i1=soc.ram.ram[36][3] q=$abc$109383$new_n44718_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[33][3] i1=soc.ram.ram[37][3] q=$abc$109383$new_n44719_
-.subckt mx2_x2 cmd=$abc$109383$new_n44015_ i0=$abc$109383$new_n44719_ i1=$abc$109383$new_n44718_ q=$abc$109383$new_n44720_
-.subckt oa22_x2 i0=$abc$109383$new_n44720_ i1=$abc$109383$new_n44611_ i2=$abc$109383$new_n43949_ q=$abc$109383$new_n44721_
-.subckt o2_x2 i0=$abc$109383$new_n44721_ i1=$abc$109383$new_n44717_ q=$abc$109383$new_n44722_
-.subckt mx2_x2 cmd=$abc$109383$new_n44139_ i0=soc.ram.ram[35][3] i1=soc.ram.ram[39][3] q=$abc$109383$new_n44723_
-.subckt mx2_x2 cmd=$abc$109383$new_n44139_ i0=soc.ram.ram[34][3] i1=soc.ram.ram[38][3] q=$abc$109383$new_n44724_
+.subckt or21nand_x1 i0=$abc$109383$new_n44709_ i1=$abc$109383$new_n44706_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n44710_
+.subckt or21nand_x1 i0=$abc$109383$new_n44710_ i1=$abc$109383$new_n44701_ i2=$abc$109383$new_n44691_ nq=$abc$109383$new_n44711_
+.subckt or2_x1 i0=soc.ram.ram[41][3] i1=$abc$109383$new_n44208_ q=$abc$109383$new_n44712_
+.subckt and21nor_x1 i0=soc.ram.ram[45][3] i1=$abc$109383$new_n43931_ i2=$abc$109383$new_n43998_ nq=$abc$109383$new_n44713_
+.subckt and2_x1 i0=$abc$109383$new_n44713_ i1=$abc$109383$new_n44712_ q=$abc$109383$new_n44714_
+.subckt mux2_x1 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[40][3] i1=soc.ram.ram[44][3] q=$abc$109383$new_n44715_
+.subckt and2_x1 i0=$abc$109383$new_n44715_ i1=$abc$109383$new_n43904_ q=$abc$109383$new_n44716_
+.subckt and21nor_x1 i0=$abc$109383$new_n44716_ i1=$abc$109383$new_n44714_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n44717_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[32][3] i1=soc.ram.ram[36][3] q=$abc$109383$new_n44718_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[33][3] i1=soc.ram.ram[37][3] q=$abc$109383$new_n44719_
+.subckt mux2_x1 cmd=$abc$109383$new_n44015_ i0=$abc$109383$new_n44719_ i1=$abc$109383$new_n44718_ q=$abc$109383$new_n44720_
+.subckt or21nand_x1 i0=$abc$109383$new_n44720_ i1=$abc$109383$new_n44611_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n44721_
+.subckt or2_x1 i0=$abc$109383$new_n44721_ i1=$abc$109383$new_n44717_ q=$abc$109383$new_n44722_
+.subckt mux2_x1 cmd=$abc$109383$new_n44139_ i0=soc.ram.ram[35][3] i1=soc.ram.ram[39][3] q=$abc$109383$new_n44723_
+.subckt mux2_x1 cmd=$abc$109383$new_n44139_ i0=soc.ram.ram[34][3] i1=soc.ram.ram[38][3] q=$abc$109383$new_n44724_
 .subckt buf_x4 i=$abc$109383$new_n43914_ q=$abc$109383$new_n44725_
-.subckt mx2_x2 cmd=$abc$109383$new_n44725_ i0=$abc$109383$new_n44724_ i1=$abc$109383$new_n44723_ q=$abc$109383$new_n44726_
+.subckt mux2_x1 cmd=$abc$109383$new_n44725_ i0=$abc$109383$new_n44724_ i1=$abc$109383$new_n44723_ q=$abc$109383$new_n44726_
 .subckt nand2_x0 i0=$abc$109383$new_n44726_ i1=$abc$109383$new_n44612_ nq=$abc$109383$new_n44727_
-.subckt o2_x2 i0=soc.ram.ram[43][3] i1=$abc$109383$new_n43852_ q=$abc$109383$new_n44728_
-.subckt ao22_x2 i0=soc.ram.ram[47][3] i1=$abc$109383$new_n43806_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n44729_
+.subckt or2_x1 i0=soc.ram.ram[43][3] i1=$abc$109383$new_n43852_ q=$abc$109383$new_n44728_
+.subckt and21nor_x1 i0=soc.ram.ram[47][3] i1=$abc$109383$new_n43806_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n44729_
 .subckt nand2_x0 i0=$abc$109383$new_n44729_ i1=$abc$109383$new_n44728_ nq=$abc$109383$new_n44730_
 .subckt buf_x4 i=$abc$109383$new_n43866_ q=$abc$109383$new_n44731_
-.subckt mx2_x2 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[42][3] i1=soc.ram.ram[46][3] q=$abc$109383$new_n44732_
+.subckt mux2_x1 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[42][3] i1=soc.ram.ram[46][3] q=$abc$109383$new_n44732_
 .subckt nand2_x0 i0=$abc$109383$new_n44732_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n44733_
-.subckt oa22_x2 i0=$abc$109383$new_n44733_ i1=$abc$109383$new_n44730_ i2=$abc$109383$new_n44087_ q=$abc$109383$new_n44734_
+.subckt or21nand_x1 i0=$abc$109383$new_n44733_ i1=$abc$109383$new_n44730_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n44734_
 .subckt nand3_x0 i0=$abc$109383$new_n44734_ i1=$abc$109383$new_n44727_ i2=$abc$109383$new_n43950_ nq=$abc$109383$new_n44735_
 .subckt nand3_x0 i0=$abc$109383$new_n44735_ i1=$abc$109383$new_n44722_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n44736_
 .subckt nand3_x0 i0=$abc$109383$new_n44736_ i1=$abc$109383$new_n44711_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n44737_
@@ -30014,539 +30014,539 @@
 .subckt buf_x4 i=$abc$109383$new_n44114_ q=$abc$109383$new_n44740_
 .subckt buf_x4 i=$abc$109383$new_n44391_ q=$abc$109383$new_n44741_
 .subckt buf_x4 i=$abc$109383$new_n44741_ q=$abc$109383$new_n44742_
-.subckt mx2_x2 cmd=$abc$109383$new_n43802_ i0=soc.ram.ram[88][3] i1=soc.ram.ram[92][3] q=$abc$109383$new_n44743_
+.subckt mux2_x1 cmd=$abc$109383$new_n43802_ i0=soc.ram.ram[88][3] i1=soc.ram.ram[92][3] q=$abc$109383$new_n44743_
 .subckt nand2_x0 i0=$abc$109383$new_n44743_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n44744_
 .subckt inv_x0 i=soc.ram.ram[93][3] nq=$abc$109383$new_n44745_
 .subckt nand2_x0 i0=$abc$109383$new_n44745_ i1=$abc$109383$new_n43908_ nq=$abc$109383$new_n44746_
-.subckt ao22_x2 i0=soc.ram.ram[89][3] i1=$abc$109383$new_n43687_ i2=$abc$109383$new_n43992_ q=$abc$109383$new_n44747_
+.subckt and21nor_x1 i0=soc.ram.ram[89][3] i1=$abc$109383$new_n43687_ i2=$abc$109383$new_n43992_ nq=$abc$109383$new_n44747_
 .subckt nand2_x0 i0=$abc$109383$new_n44747_ i1=$abc$109383$new_n44746_ nq=$abc$109383$new_n44748_
 .subckt nand3_x0 i0=$abc$109383$new_n44748_ i1=$abc$109383$new_n44744_ i2=$abc$109383$new_n44742_ nq=$abc$109383$new_n44749_
 .subckt buf_x4 i=$abc$109383$new_n44047_ q=$abc$109383$new_n44750_
 .subckt buf_x4 i=$abc$109383$new_n44167_ q=$abc$109383$new_n44751_
-.subckt ao22_x2 i0=soc.ram.ram[91][3] i1=$abc$109383$new_n44751_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n44752_
-.subckt ao22_x2 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[95][3] i2=$abc$109383$new_n44752_ q=$abc$109383$new_n44753_
-.subckt mx2_x2 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[90][3] i1=soc.ram.ram[94][3] q=$abc$109383$new_n44754_
-.subckt oa22_x2 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n44754_ i2=$abc$109383$new_n43372_ q=$abc$109383$new_n44755_
-.subckt ao22_x2 i0=$abc$109383$new_n44755_ i1=$abc$109383$new_n44753_ i2=$abc$109383$new_n43768_ q=$abc$109383$new_n44756_
+.subckt and21nor_x1 i0=soc.ram.ram[91][3] i1=$abc$109383$new_n44751_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n44752_
+.subckt and21nor_x1 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[95][3] i2=$abc$109383$new_n44752_ nq=$abc$109383$new_n44753_
+.subckt mux2_x1 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[90][3] i1=soc.ram.ram[94][3] q=$abc$109383$new_n44754_
+.subckt or21nand_x1 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n44754_ i2=$abc$109383$new_n43372_ nq=$abc$109383$new_n44755_
+.subckt and21nor_x1 i0=$abc$109383$new_n44755_ i1=$abc$109383$new_n44753_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n44756_
 .subckt nand2_x0 i0=$abc$109383$new_n44756_ i1=$abc$109383$new_n44749_ nq=$abc$109383$new_n44757_
-.subckt mx2_x2 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[83][3] i1=soc.ram.ram[87][3] q=$abc$109383$new_n44758_
-.subckt mx2_x2 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[82][3] i1=soc.ram.ram[86][3] q=$abc$109383$new_n44759_
-.subckt mx2_x2 cmd=$abc$109383$new_n44091_ i0=$abc$109383$new_n44759_ i1=$abc$109383$new_n44758_ q=$abc$109383$new_n44760_
-.subckt mx2_x2 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[81][3] i1=soc.ram.ram[85][3] q=$abc$109383$new_n44761_
-.subckt mx2_x2 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[80][3] i1=soc.ram.ram[84][3] q=$abc$109383$new_n44762_
-.subckt mx2_x2 cmd=$abc$109383$new_n44091_ i0=$abc$109383$new_n44762_ i1=$abc$109383$new_n44761_ q=$abc$109383$new_n44763_
-.subckt mx2_x2 cmd=$abc$109383$new_n43842_ i0=$abc$109383$new_n44763_ i1=$abc$109383$new_n44760_ q=$abc$109383$new_n44764_
+.subckt mux2_x1 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[83][3] i1=soc.ram.ram[87][3] q=$abc$109383$new_n44758_
+.subckt mux2_x1 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[82][3] i1=soc.ram.ram[86][3] q=$abc$109383$new_n44759_
+.subckt mux2_x1 cmd=$abc$109383$new_n44091_ i0=$abc$109383$new_n44759_ i1=$abc$109383$new_n44758_ q=$abc$109383$new_n44760_
+.subckt mux2_x1 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[81][3] i1=soc.ram.ram[85][3] q=$abc$109383$new_n44761_
+.subckt mux2_x1 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[80][3] i1=soc.ram.ram[84][3] q=$abc$109383$new_n44762_
+.subckt mux2_x1 cmd=$abc$109383$new_n44091_ i0=$abc$109383$new_n44762_ i1=$abc$109383$new_n44761_ q=$abc$109383$new_n44763_
+.subckt mux2_x1 cmd=$abc$109383$new_n43842_ i0=$abc$109383$new_n44763_ i1=$abc$109383$new_n44760_ q=$abc$109383$new_n44764_
 .subckt nand2_x0 i0=$abc$109383$new_n44764_ i1=$abc$109383$new_n43839_ nq=$abc$109383$new_n44765_
-.subckt oa22_x2 i0=$abc$109383$new_n44765_ i1=$abc$109383$new_n44757_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n44766_
+.subckt or21nand_x1 i0=$abc$109383$new_n44765_ i1=$abc$109383$new_n44757_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n44766_
 .subckt buf_x4 i=$abc$109383$new_n43354_ q=$abc$109383$new_n44767_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[75][3] i1=soc.ram.ram[79][3] q=$abc$109383$new_n44768_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[74][3] i1=soc.ram.ram[78][3] q=$abc$109383$new_n44769_
-.subckt mx2_x2 cmd=$abc$109383$new_n43444_ i0=$abc$109383$new_n44769_ i1=$abc$109383$new_n44768_ q=$abc$109383$new_n44770_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[73][3] i1=soc.ram.ram[77][3] q=$abc$109383$new_n44771_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[72][3] i1=soc.ram.ram[76][3] q=$abc$109383$new_n44772_
-.subckt mx2_x2 cmd=$abc$109383$new_n43630_ i0=$abc$109383$new_n44772_ i1=$abc$109383$new_n44771_ q=$abc$109383$new_n44773_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[75][3] i1=soc.ram.ram[79][3] q=$abc$109383$new_n44768_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[74][3] i1=soc.ram.ram[78][3] q=$abc$109383$new_n44769_
+.subckt mux2_x1 cmd=$abc$109383$new_n43444_ i0=$abc$109383$new_n44769_ i1=$abc$109383$new_n44768_ q=$abc$109383$new_n44770_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[73][3] i1=soc.ram.ram[77][3] q=$abc$109383$new_n44771_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[72][3] i1=soc.ram.ram[76][3] q=$abc$109383$new_n44772_
+.subckt mux2_x1 cmd=$abc$109383$new_n43630_ i0=$abc$109383$new_n44772_ i1=$abc$109383$new_n44771_ q=$abc$109383$new_n44773_
 .subckt buf_x4 i=$abc$109383$new_n43439_ q=$abc$109383$new_n44774_
-.subckt mx2_x2 cmd=$abc$109383$new_n44774_ i0=$abc$109383$new_n44773_ i1=$abc$109383$new_n44770_ q=$abc$109383$new_n44775_
-.subckt a2_x2 i0=$abc$109383$new_n44775_ i1=$abc$109383$new_n44767_ q=$abc$109383$new_n44776_
-.subckt ao22_x2 i0=soc.ram.ram[67][3] i1=$abc$109383$new_n44137_ i2=$abc$109383$new_n43362_ q=$abc$109383$new_n44777_
+.subckt mux2_x1 cmd=$abc$109383$new_n44774_ i0=$abc$109383$new_n44773_ i1=$abc$109383$new_n44770_ q=$abc$109383$new_n44775_
+.subckt and2_x1 i0=$abc$109383$new_n44775_ i1=$abc$109383$new_n44767_ q=$abc$109383$new_n44776_
+.subckt and21nor_x1 i0=soc.ram.ram[67][3] i1=$abc$109383$new_n44137_ i2=$abc$109383$new_n43362_ nq=$abc$109383$new_n44777_
 .subckt buf_x4 i=$abc$109383$new_n43398_ q=$abc$109383$new_n44778_
-.subckt ao22_x2 i0=$abc$109383$new_n44778_ i1=soc.ram.ram[71][3] i2=$abc$109383$new_n44777_ q=$abc$109383$new_n44779_
-.subckt mx2_x2 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[66][3] i1=soc.ram.ram[70][3] q=$abc$109383$new_n44780_
-.subckt oa22_x2 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n44780_ i2=$abc$109383$new_n44779_ q=$abc$109383$new_n44781_
-.subckt mx2_x2 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[64][3] i1=soc.ram.ram[68][3] q=$abc$109383$new_n44782_
+.subckt and21nor_x1 i0=$abc$109383$new_n44778_ i1=soc.ram.ram[71][3] i2=$abc$109383$new_n44777_ nq=$abc$109383$new_n44779_
+.subckt mux2_x1 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[66][3] i1=soc.ram.ram[70][3] q=$abc$109383$new_n44780_
+.subckt or21nand_x1 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n44780_ i2=$abc$109383$new_n44779_ nq=$abc$109383$new_n44781_
+.subckt mux2_x1 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[64][3] i1=soc.ram.ram[68][3] q=$abc$109383$new_n44782_
 .subckt nand2_x0 i0=$abc$109383$new_n44782_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n44783_
 .subckt inv_x0 i=soc.ram.ram[69][3] nq=$abc$109383$new_n44784_
 .subckt nand2_x0 i0=$abc$109383$new_n44784_ i1=$abc$109383$new_n43802_ nq=$abc$109383$new_n44785_
-.subckt ao22_x2 i0=soc.ram.ram[65][3] i1=$abc$109383$new_n43608_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n44786_
+.subckt and21nor_x1 i0=soc.ram.ram[65][3] i1=$abc$109383$new_n43608_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n44786_
 .subckt nand2_x0 i0=$abc$109383$new_n44786_ i1=$abc$109383$new_n44785_ nq=$abc$109383$new_n44787_
 .subckt nand2_x0 i0=$abc$109383$new_n44787_ i1=$abc$109383$new_n44783_ nq=$abc$109383$new_n44788_
 .subckt buf_x4 i=$abc$109383$new_n43458_ q=$abc$109383$new_n44789_
-.subckt mx2_x2 cmd=$abc$109383$new_n44789_ i0=$abc$109383$new_n44788_ i1=$abc$109383$new_n44781_ q=$abc$109383$new_n44790_
-.subckt oa22_x2 i0=$abc$109383$new_n43839_ i1=$abc$109383$new_n44790_ i2=$abc$109383$new_n44776_ q=$abc$109383$new_n44791_
+.subckt mux2_x1 cmd=$abc$109383$new_n44789_ i0=$abc$109383$new_n44788_ i1=$abc$109383$new_n44781_ q=$abc$109383$new_n44790_
+.subckt or21nand_x1 i0=$abc$109383$new_n43839_ i1=$abc$109383$new_n44790_ i2=$abc$109383$new_n44776_ nq=$abc$109383$new_n44791_
 .subckt nand2_x0 i0=$abc$109383$new_n44791_ i1=$abc$109383$new_n43922_ nq=$abc$109383$new_n44792_
-.subckt a3_x2 i0=$abc$109383$new_n44792_ i1=$abc$109383$new_n44766_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n44793_
+.subckt and3_x1 i0=$abc$109383$new_n44792_ i1=$abc$109383$new_n44766_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n44793_
 .subckt buf_x4 i=$abc$109383$new_n43449_ q=$abc$109383$new_n44794_
 .subckt buf_x4 i=$abc$109383$new_n43346_ q=$abc$109383$new_n44795_
-.subckt mx2_x2 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[106][3] i1=soc.ram.ram[110][3] q=$abc$109383$new_n44796_
-.subckt mx2_x2 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[107][3] i1=soc.ram.ram[111][3] q=$abc$109383$new_n44797_
-.subckt mx2_x2 cmd=$abc$109383$new_n44204_ i0=$abc$109383$new_n44797_ i1=$abc$109383$new_n44796_ q=$abc$109383$new_n44798_
-.subckt o2_x2 i0=$abc$109383$new_n44798_ i1=$abc$109383$new_n44794_ q=$abc$109383$new_n44799_
-.subckt mx2_x2 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[104][3] i1=soc.ram.ram[108][3] q=$abc$109383$new_n44800_
-.subckt mx2_x2 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[105][3] i1=soc.ram.ram[109][3] q=$abc$109383$new_n44801_
-.subckt mx2_x2 cmd=$abc$109383$new_n44562_ i0=$abc$109383$new_n44801_ i1=$abc$109383$new_n44800_ q=$abc$109383$new_n44802_
-.subckt ao22_x2 i0=$abc$109383$new_n44789_ i1=$abc$109383$new_n44802_ i2=$abc$109383$new_n44499_ q=$abc$109383$new_n44803_
+.subckt mux2_x1 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[106][3] i1=soc.ram.ram[110][3] q=$abc$109383$new_n44796_
+.subckt mux2_x1 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[107][3] i1=soc.ram.ram[111][3] q=$abc$109383$new_n44797_
+.subckt mux2_x1 cmd=$abc$109383$new_n44204_ i0=$abc$109383$new_n44797_ i1=$abc$109383$new_n44796_ q=$abc$109383$new_n44798_
+.subckt or2_x1 i0=$abc$109383$new_n44798_ i1=$abc$109383$new_n44794_ q=$abc$109383$new_n44799_
+.subckt mux2_x1 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[104][3] i1=soc.ram.ram[108][3] q=$abc$109383$new_n44800_
+.subckt mux2_x1 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[105][3] i1=soc.ram.ram[109][3] q=$abc$109383$new_n44801_
+.subckt mux2_x1 cmd=$abc$109383$new_n44562_ i0=$abc$109383$new_n44801_ i1=$abc$109383$new_n44800_ q=$abc$109383$new_n44802_
+.subckt and21nor_x1 i0=$abc$109383$new_n44789_ i1=$abc$109383$new_n44802_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n44803_
 .subckt nand2_x0 i0=$abc$109383$new_n44803_ i1=$abc$109383$new_n44799_ nq=$abc$109383$new_n44804_
 .subckt inv_x0 i=soc.ram.ram[103][3] nq=$abc$109383$new_n44805_
 .subckt nand2_x0 i0=$abc$109383$new_n44805_ i1=$abc$109383$new_n44660_ nq=$abc$109383$new_n44806_
 .subckt buf_x4 i=$abc$109383$new_n43913_ q=$abc$109383$new_n44807_
 .subckt buf_x4 i=$abc$109383$new_n43685_ q=$abc$109383$new_n44808_
 .subckt buf_x4 i=$abc$109383$new_n44808_ q=$abc$109383$new_n44809_
-.subckt ao22_x2 i0=soc.ram.ram[99][3] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n44810_
+.subckt and21nor_x1 i0=soc.ram.ram[99][3] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n44810_
 .subckt nand2_x0 i0=$abc$109383$new_n44810_ i1=$abc$109383$new_n44806_ nq=$abc$109383$new_n44811_
 .subckt buf_x4 i=$abc$109383$new_n44115_ q=$abc$109383$new_n44812_
-.subckt mx2_x2 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[98][3] i1=soc.ram.ram[102][3] q=$abc$109383$new_n44813_
-.subckt a2_x2 i0=$abc$109383$new_n44813_ i1=$abc$109383$new_n43738_ q=$abc$109383$new_n44814_
+.subckt mux2_x1 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[98][3] i1=soc.ram.ram[102][3] q=$abc$109383$new_n44813_
+.subckt and2_x1 i0=$abc$109383$new_n44813_ i1=$abc$109383$new_n43738_ q=$abc$109383$new_n44814_
 .subckt nor2_x0 i0=$abc$109383$new_n44814_ i1=$abc$109383$new_n44812_ nq=$abc$109383$new_n44815_
 .subckt nand2_x0 i0=$abc$109383$new_n44815_ i1=$abc$109383$new_n44811_ nq=$abc$109383$new_n44816_
 .subckt buf_x4 i=$abc$109383$new_n44164_ q=$abc$109383$new_n44817_
 .subckt buf_x4 i=$abc$109383$new_n44817_ q=$abc$109383$new_n44818_
 .subckt inv_x0 i=soc.ram.ram[101][3] nq=$abc$109383$new_n44819_
 .subckt nand2_x0 i0=$abc$109383$new_n44819_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n44820_
-.subckt ao22_x2 i0=soc.ram.ram[97][3] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43890_ q=$abc$109383$new_n44821_
+.subckt and21nor_x1 i0=soc.ram.ram[97][3] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43890_ nq=$abc$109383$new_n44821_
 .subckt nand2_x0 i0=$abc$109383$new_n44821_ i1=$abc$109383$new_n44820_ nq=$abc$109383$new_n44822_
 .subckt buf_x4 i=$abc$109383$new_n43489_ q=$abc$109383$new_n44823_
 .subckt buf_x4 i=$abc$109383$new_n44338_ q=$abc$109383$new_n44824_
-.subckt mx2_x2 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[96][3] i1=soc.ram.ram[100][3] q=$abc$109383$new_n44825_
+.subckt mux2_x1 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[96][3] i1=soc.ram.ram[100][3] q=$abc$109383$new_n44825_
 .subckt nand2_x0 i0=$abc$109383$new_n44825_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n44826_
 .subckt nand3_x0 i0=$abc$109383$new_n44826_ i1=$abc$109383$new_n44822_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n44827_
 .subckt nand3_x0 i0=$abc$109383$new_n44827_ i1=$abc$109383$new_n44816_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n44828_
-.subckt oa22_x2 i0=$abc$109383$new_n44828_ i1=$abc$109383$new_n44804_ i2=$abc$109383$new_n43541_ q=$abc$109383$new_n44829_
+.subckt or21nand_x1 i0=$abc$109383$new_n44828_ i1=$abc$109383$new_n44804_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n44829_
 .subckt buf_x4 i=$abc$109383$new_n43623_ q=$abc$109383$new_n44830_
-.subckt mx2_x2 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[114][3] i1=soc.ram.ram[118][3] q=$abc$109383$new_n44831_
-.subckt a2_x2 i0=$abc$109383$new_n44831_ i1=$abc$109383$new_n44830_ q=$abc$109383$new_n44832_
-.subckt mx2_x2 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[115][3] i1=soc.ram.ram[119][3] q=$abc$109383$new_n44833_
-.subckt oa22_x2 i0=$abc$109383$new_n44403_ i1=$abc$109383$new_n44833_ i2=$abc$109383$new_n44381_ q=$abc$109383$new_n44834_
-.subckt o2_x2 i0=$abc$109383$new_n44834_ i1=$abc$109383$new_n44832_ q=$abc$109383$new_n44835_
+.subckt mux2_x1 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[114][3] i1=soc.ram.ram[118][3] q=$abc$109383$new_n44831_
+.subckt and2_x1 i0=$abc$109383$new_n44831_ i1=$abc$109383$new_n44830_ q=$abc$109383$new_n44832_
+.subckt mux2_x1 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[115][3] i1=soc.ram.ram[119][3] q=$abc$109383$new_n44833_
+.subckt or21nand_x1 i0=$abc$109383$new_n44403_ i1=$abc$109383$new_n44833_ i2=$abc$109383$new_n44381_ nq=$abc$109383$new_n44834_
+.subckt or2_x1 i0=$abc$109383$new_n44834_ i1=$abc$109383$new_n44832_ q=$abc$109383$new_n44835_
 .subckt buf_x4 i=$abc$109383$new_n43427_ q=$abc$109383$new_n44836_
 .subckt buf_x4 i=$abc$109383$new_n44836_ q=$abc$109383$new_n44837_
 .subckt buf_x4 i=$abc$109383$new_n43527_ q=$abc$109383$new_n44838_
-.subckt mx2_x2 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[112][3] i1=soc.ram.ram[116][3] q=$abc$109383$new_n44839_
-.subckt a2_x2 i0=$abc$109383$new_n44839_ i1=$abc$109383$new_n44837_ q=$abc$109383$new_n44840_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[113][3] i1=soc.ram.ram[117][3] q=$abc$109383$new_n44841_
-.subckt oa22_x2 i0=$abc$109383$new_n43691_ i1=$abc$109383$new_n44841_ i2=$abc$109383$new_n44096_ q=$abc$109383$new_n44842_
-.subckt ao22_x2 i0=$abc$109383$new_n44842_ i1=$abc$109383$new_n44840_ i2=$abc$109383$new_n44086_ q=$abc$109383$new_n44843_
+.subckt mux2_x1 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[112][3] i1=soc.ram.ram[116][3] q=$abc$109383$new_n44839_
+.subckt and2_x1 i0=$abc$109383$new_n44839_ i1=$abc$109383$new_n44837_ q=$abc$109383$new_n44840_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[113][3] i1=soc.ram.ram[117][3] q=$abc$109383$new_n44841_
+.subckt or21nand_x1 i0=$abc$109383$new_n43691_ i1=$abc$109383$new_n44841_ i2=$abc$109383$new_n44096_ nq=$abc$109383$new_n44842_
+.subckt and21nor_x1 i0=$abc$109383$new_n44842_ i1=$abc$109383$new_n44840_ i2=$abc$109383$new_n44086_ nq=$abc$109383$new_n44843_
 .subckt nand2_x0 i0=$abc$109383$new_n44843_ i1=$abc$109383$new_n44835_ nq=$abc$109383$new_n44844_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[120][3] i1=soc.ram.ram[124][3] q=$abc$109383$new_n44845_
-.subckt oa22_x2 i0=$abc$109383$new_n43680_ i1=$abc$109383$new_n44845_ i2=$abc$109383$new_n43808_ q=$abc$109383$new_n44846_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[120][3] i1=soc.ram.ram[124][3] q=$abc$109383$new_n44845_
+.subckt or21nand_x1 i0=$abc$109383$new_n43680_ i1=$abc$109383$new_n44845_ i2=$abc$109383$new_n43808_ nq=$abc$109383$new_n44846_
 .subckt buf_x4 i=$abc$109383$new_n43444_ q=$abc$109383$new_n44847_
 .subckt buf_x4 i=$abc$109383$new_n43476_ q=$abc$109383$new_n44848_
-.subckt ao22_x2 i0=soc.ram.ram[121][3] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n44849_
+.subckt and21nor_x1 i0=soc.ram.ram[121][3] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n44849_
 .subckt inv_x0 i=soc.ram.ram[125][3] nq=$abc$109383$new_n44850_
 .subckt nand2_x0 i0=$abc$109383$new_n44850_ i1=$abc$109383$new_n43687_ nq=$abc$109383$new_n44851_
-.subckt oa22_x2 i0=$abc$109383$new_n44851_ i1=$abc$109383$new_n44849_ i2=$abc$109383$new_n44846_ q=$abc$109383$new_n44852_
+.subckt or21nand_x1 i0=$abc$109383$new_n44851_ i1=$abc$109383$new_n44849_ i2=$abc$109383$new_n44846_ nq=$abc$109383$new_n44852_
 .subckt buf_x4 i=$abc$109383$new_n44774_ q=$abc$109383$new_n44853_
 .subckt buf_x4 i=$abc$109383$new_n43707_ q=$abc$109383$new_n44854_
-.subckt mx2_x2 cmd=$abc$109383$new_n44118_ i0=soc.ram.ram[122][3] i1=soc.ram.ram[126][3] q=$abc$109383$new_n44855_
+.subckt mux2_x1 cmd=$abc$109383$new_n44118_ i0=soc.ram.ram[122][3] i1=soc.ram.ram[126][3] q=$abc$109383$new_n44855_
 .subckt nand2_x0 i0=$abc$109383$new_n44855_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n44856_
 .subckt inv_x0 i=soc.ram.ram[127][3] nq=$abc$109383$new_n44857_
-.subckt a2_x2 i0=$abc$109383$new_n44857_ i1=$abc$109383$new_n43786_ q=$abc$109383$new_n44858_
+.subckt and2_x1 i0=$abc$109383$new_n44857_ i1=$abc$109383$new_n43786_ q=$abc$109383$new_n44858_
 .subckt buf_x4 i=$abc$109383$new_n43800_ q=$abc$109383$new_n44859_
-.subckt o2_x2 i0=soc.ram.ram[123][3] i1=$abc$109383$new_n44859_ q=$abc$109383$new_n44860_
+.subckt or2_x1 i0=soc.ram.ram[123][3] i1=$abc$109383$new_n44859_ q=$abc$109383$new_n44860_
 .subckt nand2_x0 i0=$abc$109383$new_n44860_ i1=$abc$109383$new_n44847_ nq=$abc$109383$new_n44861_
-.subckt ao22_x2 i0=$abc$109383$new_n44861_ i1=$abc$109383$new_n44858_ i2=$abc$109383$new_n44856_ q=$abc$109383$new_n44862_
+.subckt and21nor_x1 i0=$abc$109383$new_n44861_ i1=$abc$109383$new_n44858_ i2=$abc$109383$new_n44856_ nq=$abc$109383$new_n44862_
 .subckt nand2_x0 i0=$abc$109383$new_n44862_ i1=$abc$109383$new_n44853_ nq=$abc$109383$new_n44863_
 .subckt nand3_x0 i0=$abc$109383$new_n44863_ i1=$abc$109383$new_n44852_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n44864_
-.subckt oa22_x2 i0=$abc$109383$new_n44864_ i1=$abc$109383$new_n44844_ i2=$abc$109383$new_n44584_ q=$abc$109383$new_n44865_
+.subckt or21nand_x1 i0=$abc$109383$new_n44864_ i1=$abc$109383$new_n44844_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n44865_
 .subckt nand3_x0 i0=$abc$109383$new_n44865_ i1=$abc$109383$new_n44829_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n44866_
 .subckt nand2_x0 i0=$abc$109383$new_n44866_ i1=$abc$109383$new_n44446_ nq=$abc$109383$new_n44867_
-.subckt o2_x2 i0=$abc$109383$new_n44867_ i1=$abc$109383$new_n44793_ q=$abc$109383$new_n44868_
-.subckt oa22_x2 i0=$abc$109383$new_n44868_ i1=$abc$109383$new_n44738_ i2=$abc$109383$new_n44583_ q=$abc$109383$new_n44869_
+.subckt or2_x1 i0=$abc$109383$new_n44867_ i1=$abc$109383$new_n44793_ q=$abc$109383$new_n44868_
+.subckt or21nand_x1 i0=$abc$109383$new_n44868_ i1=$abc$109383$new_n44738_ i2=$abc$109383$new_n44583_ nq=$abc$109383$new_n44869_
 .subckt buf_x4 i=$abc$109383$new_n28115_ q=$abc$109383$new_n44870_
 .subckt buf_x4 i=$abc$109383$new_n28117_ q=$abc$109383$new_n44871_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[3] nq=$abc$109383$new_n44872_
-.subckt o2_x2 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n44872_ q=$abc$109383$new_n44873_
-.subckt o3_x2 i0=$abc$109383$new_n44873_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n44874_
-.subckt a2_x2 i0=$abc$109383$new_n28919_ i1=$abc$109383$new_n28915_ q=$abc$109383$new_n44875_
+.subckt or2_x1 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n44872_ q=$abc$109383$new_n44873_
+.subckt or3_x1 i0=$abc$109383$new_n44873_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n44874_
+.subckt and2_x1 i0=$abc$109383$new_n28919_ i1=$abc$109383$new_n28915_ q=$abc$109383$new_n44875_
 .subckt buf_x4 i=$abc$109383$new_n44875_ q=$abc$109383$new_n44876_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n27639_ i2=$abc$109383$new_n28379_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[3] nq=$abc$109383$new_n44877_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[3] nq=$abc$109383$new_n44878_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[3] nq=$abc$109383$new_n44879_
-.subckt a2_x2 i0=$abc$109383$new_n44879_ i1=$abc$109383$new_n44878_ q=$abc$109383$new_n44880_
+.subckt and2_x1 i0=$abc$109383$new_n44879_ i1=$abc$109383$new_n44878_ q=$abc$109383$new_n44880_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[3] nq=$abc$109383$new_n44881_
 .subckt nor2_x0 i0=$abc$109383$new_n28563_ i1=$abc$109383$new_n44881_ nq=$abc$109383$new_n44882_
 .subckt nand4_x0 i0=$abc$109383$new_n44882_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n29107_ i3=$abc$109383$new_n19664_ nq=$abc$109383$new_n44883_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n19664_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[3] nq=$abc$109383$new_n44884_
-.subckt a2_x2 i0=$abc$109383$new_n44884_ i1=$abc$109383$new_n44883_ q=$abc$109383$new_n44885_
-.subckt a4_x2 i0=$abc$109383$new_n44885_ i1=$abc$109383$new_n44880_ i2=$abc$109383$new_n44877_ i3=$abc$109383$new_n44874_ q=$abc$109383$new_n44886_
+.subckt and2_x1 i0=$abc$109383$new_n44884_ i1=$abc$109383$new_n44883_ q=$abc$109383$new_n44885_
+.subckt and4_x1 i0=$abc$109383$new_n44885_ i1=$abc$109383$new_n44880_ i2=$abc$109383$new_n44877_ i3=$abc$109383$new_n44874_ q=$abc$109383$new_n44886_
 .subckt nand3_x0 i0=$abc$109383$new_n44886_ i1=$abc$109383$new_n44869_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n44887_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[3] q=$abc$109383$new_n44888_
-.subckt a2_x2 i0=$abc$109383$new_n44888_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n44889_
-.subckt a2_x2 i0=$abc$109383$new_n44889_ i1=$abc$109383$new_n44887_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103210
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[3] nq=$abc$109383$new_n44888_
+.subckt and2_x1 i0=$abc$109383$new_n44888_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n44889_
+.subckt and2_x1 i0=$abc$109383$new_n44889_ i1=$abc$109383$new_n44887_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103210
 .subckt nand3_x0 i0=$abc$109383$new_n19678_ i1=$abc$109383$new_n19667_ i2=$abc$109383$new_n28379_ nq=$abc$109383$new_n44891_
 .subckt buf_x4 i=$abc$109383$new_n43821_ q=$abc$109383$new_n44892_
 .subckt inv_x0 i=soc.ram.ram[80][4] nq=$abc$109383$new_n44893_
 .subckt inv_x0 i=soc.ram.ram[84][4] nq=$abc$109383$new_n44894_
-.subckt mx2_x2 cmd=$abc$109383$new_n44043_ i0=$abc$109383$new_n44894_ i1=$abc$109383$new_n44893_ q=$abc$109383$new_n44895_
+.subckt mux2_x1 cmd=$abc$109383$new_n44043_ i0=$abc$109383$new_n44894_ i1=$abc$109383$new_n44893_ q=$abc$109383$new_n44895_
 .subckt nand2_x0 i0=$abc$109383$new_n44895_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n44896_
-.subckt mx2_x2 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[81][4] i1=soc.ram.ram[85][4] q=$abc$109383$new_n44897_
-.subckt ao22_x2 i0=$abc$109383$new_n43681_ i1=$abc$109383$new_n44897_ i2=$abc$109383$new_n43990_ q=$abc$109383$new_n44898_
+.subckt mux2_x1 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[81][4] i1=soc.ram.ram[85][4] q=$abc$109383$new_n44897_
+.subckt and21nor_x1 i0=$abc$109383$new_n43681_ i1=$abc$109383$new_n44897_ i2=$abc$109383$new_n43990_ nq=$abc$109383$new_n44898_
 .subckt nand2_x0 i0=$abc$109383$new_n44898_ i1=$abc$109383$new_n44896_ nq=$abc$109383$new_n44899_
 .subckt inv_x0 i=soc.ram.ram[82][4] nq=$abc$109383$new_n44900_
 .subckt inv_x0 i=soc.ram.ram[86][4] nq=$abc$109383$new_n44901_
 .subckt buf_x4 i=$abc$109383$new_n43561_ q=$abc$109383$new_n44902_
-.subckt mx2_x2 cmd=$abc$109383$new_n44902_ i0=$abc$109383$new_n44901_ i1=$abc$109383$new_n44900_ q=$abc$109383$new_n44903_
+.subckt mux2_x1 cmd=$abc$109383$new_n44902_ i0=$abc$109383$new_n44901_ i1=$abc$109383$new_n44900_ q=$abc$109383$new_n44903_
 .subckt nand2_x0 i0=$abc$109383$new_n44903_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n44904_
 .subckt buf_x4 i=$abc$109383$new_n44096_ q=$abc$109383$new_n44905_
-.subckt mx2_x2 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[83][4] i1=soc.ram.ram[87][4] q=$abc$109383$new_n44906_
-.subckt ao22_x2 i0=$abc$109383$new_n43942_ i1=$abc$109383$new_n44906_ i2=$abc$109383$new_n44905_ q=$abc$109383$new_n44907_
+.subckt mux2_x1 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[83][4] i1=soc.ram.ram[87][4] q=$abc$109383$new_n44906_
+.subckt and21nor_x1 i0=$abc$109383$new_n43942_ i1=$abc$109383$new_n44906_ i2=$abc$109383$new_n44905_ nq=$abc$109383$new_n44907_
 .subckt nand2_x0 i0=$abc$109383$new_n44907_ i1=$abc$109383$new_n44904_ nq=$abc$109383$new_n44908_
-.subckt oa22_x2 i0=$abc$109383$new_n44908_ i1=$abc$109383$new_n44899_ i2=$abc$109383$new_n44677_ q=$abc$109383$new_n44909_
+.subckt or21nand_x1 i0=$abc$109383$new_n44908_ i1=$abc$109383$new_n44899_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n44909_
 .subckt buf_x4 i=$abc$109383$new_n44149_ q=$abc$109383$new_n44910_
 .subckt buf_x4 i=$abc$109383$new_n44910_ q=$abc$109383$new_n44911_
 .subckt inv_x0 i=soc.ram.ram[95][4] nq=$abc$109383$new_n44912_
 .subckt nand2_x0 i0=$abc$109383$new_n44912_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n44913_
-.subckt ao22_x2 i0=soc.ram.ram[91][4] i1=$abc$109383$new_n44587_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n44914_
+.subckt and21nor_x1 i0=soc.ram.ram[91][4] i1=$abc$109383$new_n44587_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n44914_
 .subckt nand2_x0 i0=$abc$109383$new_n44914_ i1=$abc$109383$new_n44913_ nq=$abc$109383$new_n44915_
 .subckt buf_x4 i=$abc$109383$new_n43506_ q=$abc$109383$new_n44916_
 .subckt buf_x4 i=$abc$109383$new_n44916_ q=$abc$109383$new_n44917_
 .subckt buf_x4 i=$abc$109383$new_n43428_ q=$abc$109383$new_n44918_
 .subckt buf_x4 i=$abc$109383$new_n44918_ q=$abc$109383$new_n44919_
-.subckt mx2_x2 cmd=$abc$109383$new_n43926_ i0=soc.ram.ram[90][4] i1=soc.ram.ram[94][4] q=$abc$109383$new_n44920_
+.subckt mux2_x1 cmd=$abc$109383$new_n43926_ i0=soc.ram.ram[90][4] i1=soc.ram.ram[94][4] q=$abc$109383$new_n44920_
 .subckt nand2_x0 i0=$abc$109383$new_n44920_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n44921_
-.subckt a2_x2 i0=$abc$109383$new_n44921_ i1=$abc$109383$new_n44917_ q=$abc$109383$new_n44922_
+.subckt and2_x1 i0=$abc$109383$new_n44921_ i1=$abc$109383$new_n44917_ q=$abc$109383$new_n44922_
 .subckt nand2_x0 i0=$abc$109383$new_n44922_ i1=$abc$109383$new_n44915_ nq=$abc$109383$new_n44923_
 .subckt buf_x4 i=$abc$109383$new_n43343_ q=$abc$109383$new_n44924_
-.subckt mx2_x2 cmd=$abc$109383$new_n44924_ i0=soc.ram.ram[88][4] i1=soc.ram.ram[92][4] q=$abc$109383$new_n44925_
+.subckt mux2_x1 cmd=$abc$109383$new_n44924_ i0=soc.ram.ram[88][4] i1=soc.ram.ram[92][4] q=$abc$109383$new_n44925_
 .subckt nand2_x0 i0=$abc$109383$new_n44925_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n44926_
 .subckt buf_x4 i=$abc$109383$new_n43939_ q=$abc$109383$new_n44927_
 .subckt inv_x0 i=soc.ram.ram[93][4] nq=$abc$109383$new_n44928_
 .subckt nand2_x0 i0=$abc$109383$new_n44928_ i1=$abc$109383$new_n44927_ nq=$abc$109383$new_n44929_
 .subckt buf_x4 i=$abc$109383$new_n44604_ q=$abc$109383$new_n44930_
-.subckt ao22_x2 i0=soc.ram.ram[89][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ q=$abc$109383$new_n44931_
+.subckt and21nor_x1 i0=soc.ram.ram[89][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ nq=$abc$109383$new_n44931_
 .subckt nand2_x0 i0=$abc$109383$new_n44931_ i1=$abc$109383$new_n44929_ nq=$abc$109383$new_n44932_
 .subckt nand3_x0 i0=$abc$109383$new_n44932_ i1=$abc$109383$new_n44926_ i2=$abc$109383$new_n43991_ nq=$abc$109383$new_n44933_
 .subckt nand3_x0 i0=$abc$109383$new_n44933_ i1=$abc$109383$new_n44923_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n44934_
-.subckt oa22_x2 i0=$abc$109383$new_n44934_ i1=$abc$109383$new_n44909_ i2=$abc$109383$new_n43922_ q=$abc$109383$new_n44935_
+.subckt or21nand_x1 i0=$abc$109383$new_n44934_ i1=$abc$109383$new_n44909_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n44935_
 .subckt buf_x4 i=$abc$109383$new_n43868_ q=$abc$109383$new_n44936_
-.subckt mx2_x2 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[74][4] i1=soc.ram.ram[78][4] q=$abc$109383$new_n44937_
+.subckt mux2_x1 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[74][4] i1=soc.ram.ram[78][4] q=$abc$109383$new_n44937_
 .subckt nand2_x0 i0=$abc$109383$new_n44937_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n44938_
-.subckt mx2_x2 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[75][4] i1=soc.ram.ram[79][4] q=$abc$109383$new_n44939_
+.subckt mux2_x1 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[75][4] i1=soc.ram.ram[79][4] q=$abc$109383$new_n44939_
 .subckt nand2_x0 i0=$abc$109383$new_n44939_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n44940_
 .subckt nand3_x0 i0=$abc$109383$new_n44940_ i1=$abc$109383$new_n44938_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n44941_
-.subckt mx2_x2 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[72][4] i1=soc.ram.ram[76][4] q=$abc$109383$new_n44942_
+.subckt mux2_x1 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[72][4] i1=soc.ram.ram[76][4] q=$abc$109383$new_n44942_
 .subckt nand2_x0 i0=$abc$109383$new_n44942_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n44943_
 .subckt buf_x4 i=$abc$109383$new_n43871_ q=$abc$109383$new_n44944_
 .subckt buf_x4 i=$abc$109383$new_n44944_ q=$abc$109383$new_n44945_
 .subckt buf_x4 i=$abc$109383$new_n44945_ q=$abc$109383$new_n44946_
-.subckt mx2_x2 cmd=$abc$109383$new_n44924_ i0=soc.ram.ram[73][4] i1=soc.ram.ram[77][4] q=$abc$109383$new_n44947_
+.subckt mux2_x1 cmd=$abc$109383$new_n44924_ i0=soc.ram.ram[73][4] i1=soc.ram.ram[77][4] q=$abc$109383$new_n44947_
 .subckt nand2_x0 i0=$abc$109383$new_n44947_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n44948_
 .subckt nand3_x0 i0=$abc$109383$new_n44948_ i1=$abc$109383$new_n44943_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n44949_
 .subckt nand3_x0 i0=$abc$109383$new_n44949_ i1=$abc$109383$new_n44941_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n44950_
 .subckt buf_x4 i=$abc$109383$new_n44449_ q=$abc$109383$new_n44951_
 .subckt inv_x0 i=soc.ram.ram[69][4] nq=$abc$109383$new_n44952_
 .subckt nand2_x0 i0=$abc$109383$new_n44952_ i1=$abc$109383$new_n44022_ nq=$abc$109383$new_n44953_
-.subckt ao22_x2 i0=soc.ram.ram[65][4] i1=$abc$109383$new_n43826_ i2=$abc$109383$new_n43824_ q=$abc$109383$new_n44954_
+.subckt and21nor_x1 i0=soc.ram.ram[65][4] i1=$abc$109383$new_n43826_ i2=$abc$109383$new_n43824_ nq=$abc$109383$new_n44954_
 .subckt nand2_x0 i0=$abc$109383$new_n44954_ i1=$abc$109383$new_n44953_ nq=$abc$109383$new_n44955_
-.subckt mx2_x2 cmd=$abc$109383$new_n43687_ i0=soc.ram.ram[64][4] i1=soc.ram.ram[68][4] q=$abc$109383$new_n44956_
+.subckt mux2_x1 cmd=$abc$109383$new_n43687_ i0=soc.ram.ram[64][4] i1=soc.ram.ram[68][4] q=$abc$109383$new_n44956_
 .subckt nand2_x0 i0=$abc$109383$new_n44956_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n44957_
 .subckt nand3_x0 i0=$abc$109383$new_n44957_ i1=$abc$109383$new_n44955_ i2=$abc$109383$new_n43991_ nq=$abc$109383$new_n44958_
 .subckt buf_x4 i=$abc$109383$new_n44213_ q=$abc$109383$new_n44959_
 .subckt inv_x0 i=soc.ram.ram[71][4] nq=$abc$109383$new_n44960_
 .subckt nand2_x0 i0=$abc$109383$new_n44960_ i1=$abc$109383$new_n44927_ nq=$abc$109383$new_n44961_
-.subckt ao22_x2 i0=soc.ram.ram[67][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ q=$abc$109383$new_n44962_
+.subckt and21nor_x1 i0=soc.ram.ram[67][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ nq=$abc$109383$new_n44962_
 .subckt nand2_x0 i0=$abc$109383$new_n44962_ i1=$abc$109383$new_n44961_ nq=$abc$109383$new_n44963_
-.subckt mx2_x2 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[66][4] i1=soc.ram.ram[70][4] q=$abc$109383$new_n44964_
+.subckt mux2_x1 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[66][4] i1=soc.ram.ram[70][4] q=$abc$109383$new_n44964_
 .subckt nand2_x0 i0=$abc$109383$new_n44964_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n44965_
 .subckt nand3_x0 i0=$abc$109383$new_n44965_ i1=$abc$109383$new_n44963_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n44966_
 .subckt nand3_x0 i0=$abc$109383$new_n44966_ i1=$abc$109383$new_n44958_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n44967_
-.subckt oa22_x2 i0=$abc$109383$new_n44967_ i1=$abc$109383$new_n44950_ i2=$abc$109383$new_n43971_ q=$abc$109383$new_n44968_
+.subckt or21nand_x1 i0=$abc$109383$new_n44967_ i1=$abc$109383$new_n44950_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n44968_
 .subckt nand3_x0 i0=$abc$109383$new_n44968_ i1=$abc$109383$new_n44935_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n44969_
-.subckt mx2_x2 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[106][4] i1=soc.ram.ram[110][4] q=$abc$109383$new_n44970_
+.subckt mux2_x1 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[106][4] i1=soc.ram.ram[110][4] q=$abc$109383$new_n44970_
 .subckt nand2_x0 i0=$abc$109383$new_n44970_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n44971_
-.subckt mx2_x2 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[107][4] i1=soc.ram.ram[111][4] q=$abc$109383$new_n44972_
+.subckt mux2_x1 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[107][4] i1=soc.ram.ram[111][4] q=$abc$109383$new_n44972_
 .subckt nand2_x0 i0=$abc$109383$new_n44972_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n44973_
 .subckt nand3_x0 i0=$abc$109383$new_n44973_ i1=$abc$109383$new_n44971_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n44974_
-.subckt mx2_x2 cmd=$abc$109383$new_n43954_ i0=soc.ram.ram[104][4] i1=soc.ram.ram[108][4] q=$abc$109383$new_n44975_
+.subckt mux2_x1 cmd=$abc$109383$new_n43954_ i0=soc.ram.ram[104][4] i1=soc.ram.ram[108][4] q=$abc$109383$new_n44975_
 .subckt nand2_x0 i0=$abc$109383$new_n44975_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n44976_
-.subckt mx2_x2 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[105][4] i1=soc.ram.ram[109][4] q=$abc$109383$new_n44977_
+.subckt mux2_x1 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[105][4] i1=soc.ram.ram[109][4] q=$abc$109383$new_n44977_
 .subckt nand2_x0 i0=$abc$109383$new_n44977_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n44978_
 .subckt nand3_x0 i0=$abc$109383$new_n44978_ i1=$abc$109383$new_n44976_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n44979_
 .subckt nand3_x0 i0=$abc$109383$new_n44979_ i1=$abc$109383$new_n44974_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n44980_
 .subckt inv_x0 i=soc.ram.ram[101][4] nq=$abc$109383$new_n44981_
 .subckt nand2_x0 i0=$abc$109383$new_n44981_ i1=$abc$109383$new_n44022_ nq=$abc$109383$new_n44982_
-.subckt ao22_x2 i0=soc.ram.ram[97][4] i1=$abc$109383$new_n43826_ i2=$abc$109383$new_n43824_ q=$abc$109383$new_n44983_
+.subckt and21nor_x1 i0=soc.ram.ram[97][4] i1=$abc$109383$new_n43826_ i2=$abc$109383$new_n43824_ nq=$abc$109383$new_n44983_
 .subckt nand2_x0 i0=$abc$109383$new_n44983_ i1=$abc$109383$new_n44982_ nq=$abc$109383$new_n44984_
-.subckt mx2_x2 cmd=$abc$109383$new_n43687_ i0=soc.ram.ram[96][4] i1=soc.ram.ram[100][4] q=$abc$109383$new_n44985_
+.subckt mux2_x1 cmd=$abc$109383$new_n43687_ i0=soc.ram.ram[96][4] i1=soc.ram.ram[100][4] q=$abc$109383$new_n44985_
 .subckt nand2_x0 i0=$abc$109383$new_n44985_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n44986_
 .subckt nand3_x0 i0=$abc$109383$new_n44986_ i1=$abc$109383$new_n44984_ i2=$abc$109383$new_n43991_ nq=$abc$109383$new_n44987_
 .subckt inv_x0 i=soc.ram.ram[103][4] nq=$abc$109383$new_n44988_
 .subckt nand2_x0 i0=$abc$109383$new_n44988_ i1=$abc$109383$new_n44927_ nq=$abc$109383$new_n44989_
-.subckt ao22_x2 i0=soc.ram.ram[99][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ q=$abc$109383$new_n44990_
+.subckt and21nor_x1 i0=soc.ram.ram[99][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ nq=$abc$109383$new_n44990_
 .subckt nand2_x0 i0=$abc$109383$new_n44990_ i1=$abc$109383$new_n44989_ nq=$abc$109383$new_n44991_
-.subckt mx2_x2 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[98][4] i1=soc.ram.ram[102][4] q=$abc$109383$new_n44992_
+.subckt mux2_x1 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[98][4] i1=soc.ram.ram[102][4] q=$abc$109383$new_n44992_
 .subckt nand2_x0 i0=$abc$109383$new_n44992_ i1=$abc$109383$new_n43943_ nq=$abc$109383$new_n44993_
 .subckt nand3_x0 i0=$abc$109383$new_n44993_ i1=$abc$109383$new_n44991_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n44994_
 .subckt nand3_x0 i0=$abc$109383$new_n44994_ i1=$abc$109383$new_n44987_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n44995_
-.subckt oa22_x2 i0=$abc$109383$new_n44995_ i1=$abc$109383$new_n44980_ i2=$abc$109383$new_n43971_ q=$abc$109383$new_n44996_
-.subckt mx2_x2 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[122][4] i1=soc.ram.ram[126][4] q=$abc$109383$new_n44997_
+.subckt or21nand_x1 i0=$abc$109383$new_n44995_ i1=$abc$109383$new_n44980_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n44996_
+.subckt mux2_x1 cmd=$abc$109383$new_n44704_ i0=soc.ram.ram[122][4] i1=soc.ram.ram[126][4] q=$abc$109383$new_n44997_
 .subckt nand2_x0 i0=$abc$109383$new_n44997_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n44998_
-.subckt mx2_x2 cmd=$abc$109383$new_n44924_ i0=soc.ram.ram[123][4] i1=soc.ram.ram[127][4] q=$abc$109383$new_n44999_
+.subckt mux2_x1 cmd=$abc$109383$new_n44924_ i0=soc.ram.ram[123][4] i1=soc.ram.ram[127][4] q=$abc$109383$new_n44999_
 .subckt nand2_x0 i0=$abc$109383$new_n44999_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n45000_
 .subckt nand3_x0 i0=$abc$109383$new_n45000_ i1=$abc$109383$new_n44998_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n45001_
-.subckt mx2_x2 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[120][4] i1=soc.ram.ram[124][4] q=$abc$109383$new_n45002_
+.subckt mux2_x1 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[120][4] i1=soc.ram.ram[124][4] q=$abc$109383$new_n45002_
 .subckt nand2_x0 i0=$abc$109383$new_n45002_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n45003_
-.subckt mx2_x2 cmd=$abc$109383$new_n43687_ i0=soc.ram.ram[121][4] i1=soc.ram.ram[125][4] q=$abc$109383$new_n45004_
+.subckt mux2_x1 cmd=$abc$109383$new_n43687_ i0=soc.ram.ram[121][4] i1=soc.ram.ram[125][4] q=$abc$109383$new_n45004_
 .subckt nand2_x0 i0=$abc$109383$new_n45004_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n45005_
 .subckt nand3_x0 i0=$abc$109383$new_n45005_ i1=$abc$109383$new_n45003_ i2=$abc$109383$new_n43991_ nq=$abc$109383$new_n45006_
 .subckt nand3_x0 i0=$abc$109383$new_n45006_ i1=$abc$109383$new_n45001_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n45007_
 .subckt inv_x0 i=soc.ram.ram[119][4] nq=$abc$109383$new_n45008_
 .subckt nand2_x0 i0=$abc$109383$new_n45008_ i1=$abc$109383$new_n44927_ nq=$abc$109383$new_n45009_
-.subckt ao22_x2 i0=soc.ram.ram[115][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ q=$abc$109383$new_n45010_
+.subckt and21nor_x1 i0=soc.ram.ram[115][4] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43792_ nq=$abc$109383$new_n45010_
 .subckt nand2_x0 i0=$abc$109383$new_n45010_ i1=$abc$109383$new_n45009_ nq=$abc$109383$new_n45011_
-.subckt mx2_x2 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[114][4] i1=soc.ram.ram[118][4] q=$abc$109383$new_n45012_
+.subckt mux2_x1 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[114][4] i1=soc.ram.ram[118][4] q=$abc$109383$new_n45012_
 .subckt nand2_x0 i0=$abc$109383$new_n45012_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n45013_
 .subckt nand3_x0 i0=$abc$109383$new_n45013_ i1=$abc$109383$new_n45011_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n45014_
 .subckt buf_x4 i=$abc$109383$new_n44061_ q=$abc$109383$new_n45015_
 .subckt buf_x4 i=$abc$109383$new_n45015_ q=$abc$109383$new_n45016_
 .subckt inv_x0 i=soc.ram.ram[117][4] nq=$abc$109383$new_n45017_
 .subckt nand2_x0 i0=$abc$109383$new_n45017_ i1=$abc$109383$new_n43830_ nq=$abc$109383$new_n45018_
-.subckt ao22_x2 i0=soc.ram.ram[113][4] i1=$abc$109383$new_n44208_ i2=$abc$109383$new_n43987_ q=$abc$109383$new_n45019_
+.subckt and21nor_x1 i0=soc.ram.ram[113][4] i1=$abc$109383$new_n44208_ i2=$abc$109383$new_n43987_ nq=$abc$109383$new_n45019_
 .subckt nand2_x0 i0=$abc$109383$new_n45019_ i1=$abc$109383$new_n45018_ nq=$abc$109383$new_n45020_
-.subckt mx2_x2 cmd=$abc$109383$new_n43851_ i0=soc.ram.ram[112][4] i1=soc.ram.ram[116][4] q=$abc$109383$new_n45021_
+.subckt mux2_x1 cmd=$abc$109383$new_n43851_ i0=soc.ram.ram[112][4] i1=soc.ram.ram[116][4] q=$abc$109383$new_n45021_
 .subckt nand2_x0 i0=$abc$109383$new_n45021_ i1=$abc$109383$new_n43943_ nq=$abc$109383$new_n45022_
 .subckt nand3_x0 i0=$abc$109383$new_n45022_ i1=$abc$109383$new_n45020_ i2=$abc$109383$new_n45016_ nq=$abc$109383$new_n45023_
 .subckt nand3_x0 i0=$abc$109383$new_n45023_ i1=$abc$109383$new_n45014_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n45024_
-.subckt oa22_x2 i0=$abc$109383$new_n45024_ i1=$abc$109383$new_n45007_ i2=$abc$109383$new_n43327_ q=$abc$109383$new_n45025_
+.subckt or21nand_x1 i0=$abc$109383$new_n45024_ i1=$abc$109383$new_n45007_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n45025_
 .subckt nand3_x0 i0=$abc$109383$new_n45025_ i1=$abc$109383$new_n44996_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n45026_
 .subckt nand3_x0 i0=$abc$109383$new_n45026_ i1=$abc$109383$new_n44969_ i2=$abc$109383$new_n44040_ nq=$abc$109383$new_n45027_
 .subckt buf_x4 i=$abc$109383$new_n43325_ q=$abc$109383$new_n45028_
 .subckt nand2_x0 i0=soc.ram.ram[4][4] i1=$abc$109383$new_n44115_ nq=$abc$109383$new_n45029_
 .subckt buf_x4 i=$abc$109383$new_n43624_ q=$abc$109383$new_n45030_
 .subckt inv_x0 i=soc.ram.ram[6][4] nq=$abc$109383$new_n45031_
-.subckt ao22_x2 i0=$abc$109383$new_n44080_ i1=$abc$109383$new_n45031_ i2=$abc$109383$new_n45030_ q=$abc$109383$new_n45032_
+.subckt and21nor_x1 i0=$abc$109383$new_n44080_ i1=$abc$109383$new_n45031_ i2=$abc$109383$new_n45030_ nq=$abc$109383$new_n45032_
 .subckt nand2_x0 i0=$abc$109383$new_n45032_ i1=$abc$109383$new_n45029_ nq=$abc$109383$new_n45033_
-.subckt oa22_x2 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[2][4] i2=$abc$109383$new_n44186_ q=$abc$109383$new_n45034_
-.subckt oa22_x2 i0=$abc$109383$new_n43371_ i1=soc.ram.ram[0][4] i2=$abc$109383$new_n45034_ q=$abc$109383$new_n45035_
-.subckt a2_x2 i0=$abc$109383$new_n45035_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n45036_
+.subckt or21nand_x1 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[2][4] i2=$abc$109383$new_n44186_ nq=$abc$109383$new_n45034_
+.subckt or21nand_x1 i0=$abc$109383$new_n43371_ i1=soc.ram.ram[0][4] i2=$abc$109383$new_n45034_ nq=$abc$109383$new_n45035_
+.subckt and2_x1 i0=$abc$109383$new_n45035_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n45036_
 .subckt nand2_x0 i0=$abc$109383$new_n45036_ i1=$abc$109383$new_n45033_ nq=$abc$109383$new_n45037_
 .subckt nand2_x0 i0=soc.ram.ram[5][4] i1=$abc$109383$new_n43372_ nq=$abc$109383$new_n45038_
 .subckt inv_x0 i=soc.ram.ram[7][4] nq=$abc$109383$new_n45039_
-.subckt ao22_x2 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n45039_ i2=$abc$109383$new_n44093_ q=$abc$109383$new_n45040_
+.subckt and21nor_x1 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n45039_ i2=$abc$109383$new_n44093_ nq=$abc$109383$new_n45040_
 .subckt nand2_x0 i0=$abc$109383$new_n45040_ i1=$abc$109383$new_n45038_ nq=$abc$109383$new_n45041_
 .subckt buf_x4 i=$abc$109383$new_n43657_ q=$abc$109383$new_n45042_
 .subckt buf_x4 i=$abc$109383$new_n45042_ q=$abc$109383$new_n45043_
-.subckt oa22_x2 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[3][4] i2=$abc$109383$new_n43598_ q=$abc$109383$new_n45044_
-.subckt oa22_x2 i0=$abc$109383$new_n44060_ i1=soc.ram.ram[1][4] i2=$abc$109383$new_n45044_ q=$abc$109383$new_n45045_
-.subckt a2_x2 i0=$abc$109383$new_n45045_ i1=$abc$109383$new_n45043_ q=$abc$109383$new_n45046_
+.subckt or21nand_x1 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[3][4] i2=$abc$109383$new_n43598_ nq=$abc$109383$new_n45044_
+.subckt or21nand_x1 i0=$abc$109383$new_n44060_ i1=soc.ram.ram[1][4] i2=$abc$109383$new_n45044_ nq=$abc$109383$new_n45045_
+.subckt and2_x1 i0=$abc$109383$new_n45045_ i1=$abc$109383$new_n45043_ q=$abc$109383$new_n45046_
 .subckt nand2_x0 i0=$abc$109383$new_n45046_ i1=$abc$109383$new_n45041_ nq=$abc$109383$new_n45047_
-.subckt oa22_x2 i0=$abc$109383$new_n45047_ i1=$abc$109383$new_n45037_ i2=$abc$109383$new_n43897_ q=$abc$109383$new_n45048_
+.subckt or21nand_x1 i0=$abc$109383$new_n45047_ i1=$abc$109383$new_n45037_ i2=$abc$109383$new_n43897_ nq=$abc$109383$new_n45048_
 .subckt nand2_x0 i0=soc.ram.ram[12][4] i1=$abc$109383$new_n44381_ nq=$abc$109383$new_n45049_
 .subckt inv_x0 i=soc.ram.ram[14][4] nq=$abc$109383$new_n45050_
-.subckt ao22_x2 i0=$abc$109383$new_n43448_ i1=$abc$109383$new_n45050_ i2=$abc$109383$new_n43874_ q=$abc$109383$new_n45051_
+.subckt and21nor_x1 i0=$abc$109383$new_n43448_ i1=$abc$109383$new_n45050_ i2=$abc$109383$new_n43874_ nq=$abc$109383$new_n45051_
 .subckt nand2_x0 i0=$abc$109383$new_n45051_ i1=$abc$109383$new_n45049_ nq=$abc$109383$new_n45052_
 .subckt buf_x4 i=$abc$109383$new_n43456_ q=$abc$109383$new_n45053_
-.subckt oa22_x2 i0=$abc$109383$new_n43438_ i1=soc.ram.ram[10][4] i2=$abc$109383$new_n43425_ q=$abc$109383$new_n45054_
-.subckt oa22_x2 i0=$abc$109383$new_n44075_ i1=soc.ram.ram[8][4] i2=$abc$109383$new_n45054_ q=$abc$109383$new_n45055_
-.subckt a2_x2 i0=$abc$109383$new_n45055_ i1=$abc$109383$new_n45053_ q=$abc$109383$new_n45056_
+.subckt or21nand_x1 i0=$abc$109383$new_n43438_ i1=soc.ram.ram[10][4] i2=$abc$109383$new_n43425_ nq=$abc$109383$new_n45054_
+.subckt or21nand_x1 i0=$abc$109383$new_n44075_ i1=soc.ram.ram[8][4] i2=$abc$109383$new_n45054_ nq=$abc$109383$new_n45055_
+.subckt and2_x1 i0=$abc$109383$new_n45055_ i1=$abc$109383$new_n45053_ q=$abc$109383$new_n45056_
 .subckt nand2_x0 i0=$abc$109383$new_n45056_ i1=$abc$109383$new_n45052_ nq=$abc$109383$new_n45057_
 .subckt nand2_x0 i0=soc.ram.ram[13][4] i1=$abc$109383$new_n43544_ nq=$abc$109383$new_n45058_
 .subckt buf_x4 i=$abc$109383$new_n43937_ q=$abc$109383$new_n45059_
 .subckt inv_x0 i=soc.ram.ram[15][4] nq=$abc$109383$new_n45060_
-.subckt ao22_x2 i0=$abc$109383$new_n43543_ i1=$abc$109383$new_n45060_ i2=$abc$109383$new_n45059_ q=$abc$109383$new_n45061_
+.subckt and21nor_x1 i0=$abc$109383$new_n43543_ i1=$abc$109383$new_n45060_ i2=$abc$109383$new_n45059_ nq=$abc$109383$new_n45061_
 .subckt nand2_x0 i0=$abc$109383$new_n45061_ i1=$abc$109383$new_n45058_ nq=$abc$109383$new_n45062_
-.subckt oa22_x2 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[11][4] i2=$abc$109383$new_n43627_ q=$abc$109383$new_n45063_
-.subckt oa22_x2 i0=$abc$109383$new_n43371_ i1=soc.ram.ram[9][4] i2=$abc$109383$new_n45063_ q=$abc$109383$new_n45064_
-.subckt a2_x2 i0=$abc$109383$new_n45064_ i1=$abc$109383$new_n44944_ q=$abc$109383$new_n45065_
+.subckt or21nand_x1 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[11][4] i2=$abc$109383$new_n43627_ nq=$abc$109383$new_n45063_
+.subckt or21nand_x1 i0=$abc$109383$new_n43371_ i1=soc.ram.ram[9][4] i2=$abc$109383$new_n45063_ nq=$abc$109383$new_n45064_
+.subckt and2_x1 i0=$abc$109383$new_n45064_ i1=$abc$109383$new_n44944_ q=$abc$109383$new_n45065_
 .subckt nand2_x0 i0=$abc$109383$new_n45065_ i1=$abc$109383$new_n45062_ nq=$abc$109383$new_n45066_
-.subckt oa22_x2 i0=$abc$109383$new_n45066_ i1=$abc$109383$new_n45057_ i2=$abc$109383$new_n43838_ q=$abc$109383$new_n45067_
-.subckt a3_x2 i0=$abc$109383$new_n45067_ i1=$abc$109383$new_n45048_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n45068_
+.subckt or21nand_x1 i0=$abc$109383$new_n45066_ i1=$abc$109383$new_n45057_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n45067_
+.subckt and3_x1 i0=$abc$109383$new_n45067_ i1=$abc$109383$new_n45048_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n45068_
 .subckt buf_x4 i=$abc$109383$new_n43391_ q=$abc$109383$new_n45069_
 .subckt buf_x4 i=$abc$109383$new_n45069_ q=$abc$109383$new_n45070_
 .subckt inv_x0 i=soc.ram.ram[21][4] nq=$abc$109383$new_n45071_
 .subckt nand2_x0 i0=$abc$109383$new_n45071_ i1=$abc$109383$new_n44924_ nq=$abc$109383$new_n45072_
 .subckt buf_x4 i=$abc$109383$new_n43961_ q=$abc$109383$new_n45073_
-.subckt ao22_x2 i0=soc.ram.ram[17][4] i1=$abc$109383$new_n44824_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n45074_
+.subckt and21nor_x1 i0=soc.ram.ram[17][4] i1=$abc$109383$new_n44824_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n45074_
 .subckt nand2_x0 i0=$abc$109383$new_n45074_ i1=$abc$109383$new_n45072_ nq=$abc$109383$new_n45075_
 .subckt buf_x4 i=$abc$109383$new_n43475_ q=$abc$109383$new_n45076_
-.subckt mx2_x2 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[16][4] i1=soc.ram.ram[20][4] q=$abc$109383$new_n45077_
+.subckt mux2_x1 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[16][4] i1=soc.ram.ram[20][4] q=$abc$109383$new_n45077_
 .subckt nand2_x0 i0=$abc$109383$new_n45077_ i1=$abc$109383$new_n44180_ nq=$abc$109383$new_n45078_
-.subckt a2_x2 i0=$abc$109383$new_n45078_ i1=$abc$109383$new_n43730_ q=$abc$109383$new_n45079_
+.subckt and2_x1 i0=$abc$109383$new_n45078_ i1=$abc$109383$new_n43730_ q=$abc$109383$new_n45079_
 .subckt nand2_x0 i0=$abc$109383$new_n45079_ i1=$abc$109383$new_n45075_ nq=$abc$109383$new_n45080_
 .subckt buf_x4 i=$abc$109383$new_n43550_ q=$abc$109383$new_n45081_
 .subckt buf_x4 i=$abc$109383$new_n45081_ q=$abc$109383$new_n45082_
-.subckt o2_x2 i0=soc.ram.ram[19][4] i1=$abc$109383$new_n45082_ q=$abc$109383$new_n45083_
-.subckt ao22_x2 i0=soc.ram.ram[23][4] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n45084_
+.subckt or2_x1 i0=soc.ram.ram[19][4] i1=$abc$109383$new_n45082_ q=$abc$109383$new_n45083_
+.subckt and21nor_x1 i0=soc.ram.ram[23][4] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n45084_
 .subckt nand2_x0 i0=$abc$109383$new_n45084_ i1=$abc$109383$new_n45083_ nq=$abc$109383$new_n45085_
 .subckt nor2_x0 i0=soc.ram.ram[18][4] i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n45086_
 .subckt buf_x4 i=$abc$109383$new_n43639_ q=$abc$109383$new_n45087_
 .subckt inv_x0 i=soc.ram.ram[22][4] nq=$abc$109383$new_n45088_
-.subckt oa22_x2 i0=$abc$109383$new_n45088_ i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n43611_ q=$abc$109383$new_n45089_
-.subckt ao22_x2 i0=$abc$109383$new_n45089_ i1=$abc$109383$new_n45086_ i2=$abc$109383$new_n44212_ q=$abc$109383$new_n45090_
+.subckt or21nand_x1 i0=$abc$109383$new_n45088_ i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n43611_ nq=$abc$109383$new_n45089_
+.subckt and21nor_x1 i0=$abc$109383$new_n45089_ i1=$abc$109383$new_n45086_ i2=$abc$109383$new_n44212_ nq=$abc$109383$new_n45090_
 .subckt nand2_x0 i0=$abc$109383$new_n45090_ i1=$abc$109383$new_n45085_ nq=$abc$109383$new_n45091_
 .subckt nand3_x0 i0=$abc$109383$new_n45091_ i1=$abc$109383$new_n45080_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n45092_
 .subckt buf_x4 i=$abc$109383$new_n43698_ q=$abc$109383$new_n45093_
 .subckt buf_x4 i=$abc$109383$new_n45093_ q=$abc$109383$new_n45094_
-.subckt mx2_x2 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[27][4] i1=soc.ram.ram[31][4] q=$abc$109383$new_n45095_
-.subckt mx2_x2 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[25][4] i1=soc.ram.ram[29][4] q=$abc$109383$new_n45096_
-.subckt mx2_x2 cmd=$abc$109383$new_n43532_ i0=$abc$109383$new_n45096_ i1=$abc$109383$new_n45095_ q=$abc$109383$new_n45097_
+.subckt mux2_x1 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[27][4] i1=soc.ram.ram[31][4] q=$abc$109383$new_n45095_
+.subckt mux2_x1 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[25][4] i1=soc.ram.ram[29][4] q=$abc$109383$new_n45096_
+.subckt mux2_x1 cmd=$abc$109383$new_n43532_ i0=$abc$109383$new_n45096_ i1=$abc$109383$new_n45095_ q=$abc$109383$new_n45097_
 .subckt nand2_x0 i0=$abc$109383$new_n45097_ i1=$abc$109383$new_n45094_ nq=$abc$109383$new_n45098_
-.subckt mx2_x2 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[26][4] i1=soc.ram.ram[30][4] q=$abc$109383$new_n45099_
-.subckt mx2_x2 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[24][4] i1=soc.ram.ram[28][4] q=$abc$109383$new_n45100_
-.subckt mx2_x2 cmd=$abc$109383$new_n43579_ i0=$abc$109383$new_n45100_ i1=$abc$109383$new_n45099_ q=$abc$109383$new_n45101_
+.subckt mux2_x1 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[26][4] i1=soc.ram.ram[30][4] q=$abc$109383$new_n45099_
+.subckt mux2_x1 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[24][4] i1=soc.ram.ram[28][4] q=$abc$109383$new_n45100_
+.subckt mux2_x1 cmd=$abc$109383$new_n43579_ i0=$abc$109383$new_n45100_ i1=$abc$109383$new_n45099_ q=$abc$109383$new_n45101_
 .subckt nand2_x0 i0=$abc$109383$new_n45101_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n45102_
-.subckt oa22_x2 i0=$abc$109383$new_n45102_ i1=$abc$109383$new_n45098_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n45103_
-.subckt a2_x2 i0=$abc$109383$new_n45103_ i1=$abc$109383$new_n43729_ q=$abc$109383$new_n45104_
-.subckt a2_x2 i0=$abc$109383$new_n45104_ i1=$abc$109383$new_n45092_ q=$abc$109383$new_n45105_
-.subckt ao22_x2 i0=$abc$109383$new_n45105_ i1=$abc$109383$new_n45068_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n45106_
-.subckt o2_x2 i0=soc.ram.ram[51][4] i1=$abc$109383$new_n45082_ q=$abc$109383$new_n45107_
-.subckt ao22_x2 i0=soc.ram.ram[55][4] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n45108_
+.subckt or21nand_x1 i0=$abc$109383$new_n45102_ i1=$abc$109383$new_n45098_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n45103_
+.subckt and2_x1 i0=$abc$109383$new_n45103_ i1=$abc$109383$new_n43729_ q=$abc$109383$new_n45104_
+.subckt and2_x1 i0=$abc$109383$new_n45104_ i1=$abc$109383$new_n45092_ q=$abc$109383$new_n45105_
+.subckt and21nor_x1 i0=$abc$109383$new_n45105_ i1=$abc$109383$new_n45068_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n45106_
+.subckt or2_x1 i0=soc.ram.ram[51][4] i1=$abc$109383$new_n45082_ q=$abc$109383$new_n45107_
+.subckt and21nor_x1 i0=soc.ram.ram[55][4] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n45108_
 .subckt nand2_x0 i0=$abc$109383$new_n45108_ i1=$abc$109383$new_n45107_ nq=$abc$109383$new_n45109_
 .subckt inv_x0 i=soc.ram.ram[54][4] nq=$abc$109383$new_n45110_
 .subckt nand2_x0 i0=$abc$109383$new_n45110_ i1=$abc$109383$new_n43851_ nq=$abc$109383$new_n45111_
-.subckt o2_x2 i0=soc.ram.ram[50][4] i1=$abc$109383$new_n44838_ q=$abc$109383$new_n45112_
-.subckt a2_x2 i0=$abc$109383$new_n45112_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n45113_
+.subckt or2_x1 i0=soc.ram.ram[50][4] i1=$abc$109383$new_n44838_ q=$abc$109383$new_n45112_
+.subckt and2_x1 i0=$abc$109383$new_n45112_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n45113_
 .subckt nand2_x0 i0=$abc$109383$new_n45113_ i1=$abc$109383$new_n45111_ nq=$abc$109383$new_n45114_
-.subckt oa22_x2 i0=$abc$109383$new_n45114_ i1=$abc$109383$new_n45109_ i2=$abc$109383$new_n43570_ q=$abc$109383$new_n45115_
+.subckt or21nand_x1 i0=$abc$109383$new_n45114_ i1=$abc$109383$new_n45109_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n45115_
 .subckt buf_x4 i=$abc$109383$new_n43704_ q=$abc$109383$new_n45116_
 .subckt buf_x4 i=$abc$109383$new_n45116_ q=$abc$109383$new_n45117_
 .subckt inv_x0 i=soc.ram.ram[63][4] nq=$abc$109383$new_n45118_
 .subckt nand2_x0 i0=$abc$109383$new_n45118_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n45119_
-.subckt ao22_x2 i0=soc.ram.ram[59][4] i1=$abc$109383$new_n44316_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n45120_
+.subckt and21nor_x1 i0=soc.ram.ram[59][4] i1=$abc$109383$new_n44316_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n45120_
 .subckt nand2_x0 i0=$abc$109383$new_n45120_ i1=$abc$109383$new_n45119_ nq=$abc$109383$new_n45121_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[58][4] i1=soc.ram.ram[62][4] q=$abc$109383$new_n45122_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[58][4] i1=soc.ram.ram[62][4] q=$abc$109383$new_n45122_
 .subckt nand2_x0 i0=$abc$109383$new_n45122_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n45123_
-.subckt oa22_x2 i0=$abc$109383$new_n45123_ i1=$abc$109383$new_n45121_ i2=$abc$109383$new_n44610_ q=$abc$109383$new_n45124_
+.subckt or21nand_x1 i0=$abc$109383$new_n45123_ i1=$abc$109383$new_n45121_ i2=$abc$109383$new_n44610_ nq=$abc$109383$new_n45124_
 .subckt nand3_x0 i0=$abc$109383$new_n45124_ i1=$abc$109383$new_n45115_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n45125_
-.subckt mx2_x2 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[56][4] i1=soc.ram.ram[60][4] q=$abc$109383$new_n45126_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[57][4] i1=soc.ram.ram[61][4] q=$abc$109383$new_n45127_
-.subckt mx2_x2 cmd=$abc$109383$new_n43941_ i0=$abc$109383$new_n45127_ i1=$abc$109383$new_n45126_ q=$abc$109383$new_n45128_
+.subckt mux2_x1 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[56][4] i1=soc.ram.ram[60][4] q=$abc$109383$new_n45126_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[57][4] i1=soc.ram.ram[61][4] q=$abc$109383$new_n45127_
+.subckt mux2_x1 cmd=$abc$109383$new_n43941_ i0=$abc$109383$new_n45127_ i1=$abc$109383$new_n45126_ q=$abc$109383$new_n45128_
 .subckt nand2_x0 i0=$abc$109383$new_n45128_ i1=$abc$109383$new_n44410_ nq=$abc$109383$new_n45129_
-.subckt mx2_x2 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[48][4] i1=soc.ram.ram[52][4] q=$abc$109383$new_n45130_
-.subckt mx2_x2 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[49][4] i1=soc.ram.ram[53][4] q=$abc$109383$new_n45131_
-.subckt mx2_x2 cmd=$abc$109383$new_n43759_ i0=$abc$109383$new_n45131_ i1=$abc$109383$new_n45130_ q=$abc$109383$new_n45132_
+.subckt mux2_x1 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[48][4] i1=soc.ram.ram[52][4] q=$abc$109383$new_n45130_
+.subckt mux2_x1 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[49][4] i1=soc.ram.ram[53][4] q=$abc$109383$new_n45131_
+.subckt mux2_x1 cmd=$abc$109383$new_n43759_ i0=$abc$109383$new_n45131_ i1=$abc$109383$new_n45130_ q=$abc$109383$new_n45132_
 .subckt nand2_x0 i0=$abc$109383$new_n45132_ i1=$abc$109383$new_n43838_ nq=$abc$109383$new_n45133_
 .subckt nand3_x0 i0=$abc$109383$new_n45133_ i1=$abc$109383$new_n45129_ i2=$abc$109383$new_n44812_ nq=$abc$109383$new_n45134_
-.subckt a2_x2 i0=$abc$109383$new_n45134_ i1=$abc$109383$new_n43540_ q=$abc$109383$new_n45135_
+.subckt and2_x1 i0=$abc$109383$new_n45134_ i1=$abc$109383$new_n43540_ q=$abc$109383$new_n45135_
 .subckt nand2_x0 i0=$abc$109383$new_n45135_ i1=$abc$109383$new_n45125_ nq=$abc$109383$new_n45136_
 .subckt buf_x4 i=$abc$109383$new_n43665_ q=$abc$109383$new_n45137_
 .subckt buf_x4 i=$abc$109383$new_n43518_ q=$abc$109383$new_n45138_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[40][4] i1=soc.ram.ram[44][4] q=$abc$109383$new_n45139_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[41][4] i1=soc.ram.ram[45][4] q=$abc$109383$new_n45140_
-.subckt mx2_x2 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n45140_ i1=$abc$109383$new_n45139_ q=$abc$109383$new_n45141_
-.subckt a2_x2 i0=$abc$109383$new_n45141_ i1=$abc$109383$new_n43354_ q=$abc$109383$new_n45142_
-.subckt mx2_x2 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[32][4] i1=soc.ram.ram[36][4] q=$abc$109383$new_n45143_
-.subckt mx2_x2 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[33][4] i1=soc.ram.ram[37][4] q=$abc$109383$new_n45144_
-.subckt mx2_x2 cmd=$abc$109383$new_n43494_ i0=$abc$109383$new_n45144_ i1=$abc$109383$new_n45143_ q=$abc$109383$new_n45145_
-.subckt a2_x2 i0=$abc$109383$new_n45145_ i1=$abc$109383$new_n43392_ q=$abc$109383$new_n45146_
-.subckt o3_x2 i0=$abc$109383$new_n45146_ i1=$abc$109383$new_n45142_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n45147_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[40][4] i1=soc.ram.ram[44][4] q=$abc$109383$new_n45139_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[41][4] i1=soc.ram.ram[45][4] q=$abc$109383$new_n45140_
+.subckt mux2_x1 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n45140_ i1=$abc$109383$new_n45139_ q=$abc$109383$new_n45141_
+.subckt and2_x1 i0=$abc$109383$new_n45141_ i1=$abc$109383$new_n43354_ q=$abc$109383$new_n45142_
+.subckt mux2_x1 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[32][4] i1=soc.ram.ram[36][4] q=$abc$109383$new_n45143_
+.subckt mux2_x1 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[33][4] i1=soc.ram.ram[37][4] q=$abc$109383$new_n45144_
+.subckt mux2_x1 cmd=$abc$109383$new_n43494_ i0=$abc$109383$new_n45144_ i1=$abc$109383$new_n45143_ q=$abc$109383$new_n45145_
+.subckt and2_x1 i0=$abc$109383$new_n45145_ i1=$abc$109383$new_n43392_ q=$abc$109383$new_n45146_
+.subckt or3_x1 i0=$abc$109383$new_n45146_ i1=$abc$109383$new_n45142_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n45147_
 .subckt inv_x0 i=soc.ram.ram[47][4] nq=$abc$109383$new_n45148_
 .subckt nand2_x0 i0=$abc$109383$new_n45148_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n45149_
-.subckt ao22_x2 i0=soc.ram.ram[43][4] i1=$abc$109383$new_n43874_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n45150_
+.subckt and21nor_x1 i0=soc.ram.ram[43][4] i1=$abc$109383$new_n43874_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n45150_
 .subckt nand2_x0 i0=$abc$109383$new_n45150_ i1=$abc$109383$new_n45149_ nq=$abc$109383$new_n45151_
-.subckt mx2_x2 cmd=$abc$109383$new_n44187_ i0=soc.ram.ram[42][4] i1=soc.ram.ram[46][4] q=$abc$109383$new_n45152_
+.subckt mux2_x1 cmd=$abc$109383$new_n44187_ i0=soc.ram.ram[42][4] i1=soc.ram.ram[46][4] q=$abc$109383$new_n45152_
 .subckt nand2_x0 i0=$abc$109383$new_n45152_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n45153_
-.subckt oa22_x2 i0=$abc$109383$new_n45153_ i1=$abc$109383$new_n45151_ i2=$abc$109383$new_n44610_ q=$abc$109383$new_n45154_
+.subckt or21nand_x1 i0=$abc$109383$new_n45153_ i1=$abc$109383$new_n45151_ i2=$abc$109383$new_n44610_ nq=$abc$109383$new_n45154_
 .subckt buf_x4 i=$abc$109383$new_n43654_ q=$abc$109383$new_n45155_
-.subckt o2_x2 i0=soc.ram.ram[35][4] i1=$abc$109383$new_n45155_ q=$abc$109383$new_n45156_
+.subckt or2_x1 i0=soc.ram.ram[35][4] i1=$abc$109383$new_n45155_ q=$abc$109383$new_n45156_
 .subckt buf_x4 i=$abc$109383$new_n43929_ q=$abc$109383$new_n45157_
-.subckt ao22_x2 i0=soc.ram.ram[39][4] i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n45043_ q=$abc$109383$new_n45158_
+.subckt and21nor_x1 i0=soc.ram.ram[39][4] i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n45043_ nq=$abc$109383$new_n45158_
 .subckt nand2_x0 i0=$abc$109383$new_n45158_ i1=$abc$109383$new_n45156_ nq=$abc$109383$new_n45159_
 .subckt buf_x4 i=$abc$109383$new_n43519_ q=$abc$109383$new_n45160_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[34][4] i1=soc.ram.ram[38][4] q=$abc$109383$new_n45161_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[34][4] i1=soc.ram.ram[38][4] q=$abc$109383$new_n45161_
 .subckt nand2_x0 i0=$abc$109383$new_n45161_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n45162_
-.subckt oa22_x2 i0=$abc$109383$new_n45162_ i1=$abc$109383$new_n45159_ i2=$abc$109383$new_n43897_ q=$abc$109383$new_n45163_
+.subckt or21nand_x1 i0=$abc$109383$new_n45162_ i1=$abc$109383$new_n45159_ i2=$abc$109383$new_n43897_ nq=$abc$109383$new_n45163_
 .subckt nand3_x0 i0=$abc$109383$new_n45163_ i1=$abc$109383$new_n45154_ i2=$abc$109383$new_n43935_ nq=$abc$109383$new_n45164_
 .subckt nand3_x0 i0=$abc$109383$new_n45164_ i1=$abc$109383$new_n45147_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n45165_
-.subckt a3_x2 i0=$abc$109383$new_n45165_ i1=$abc$109383$new_n45136_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n45166_
-.subckt o3_x2 i0=$abc$109383$new_n45166_ i1=$abc$109383$new_n45106_ i2=$abc$109383$new_n44446_ q=$abc$109383$new_n45167_
-.subckt oa22_x2 i0=$abc$109383$new_n45167_ i1=$abc$109383$new_n45027_ i2=$abc$109383$new_n44891_ q=$abc$109383$new_n45168_
+.subckt and3_x1 i0=$abc$109383$new_n45165_ i1=$abc$109383$new_n45136_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n45166_
+.subckt or3_x1 i0=$abc$109383$new_n45166_ i1=$abc$109383$new_n45106_ i2=$abc$109383$new_n44446_ q=$abc$109383$new_n45167_
+.subckt or21nand_x1 i0=$abc$109383$new_n45167_ i1=$abc$109383$new_n45027_ i2=$abc$109383$new_n44891_ nq=$abc$109383$new_n45168_
 .subckt nand3_x0 i0=$abc$109383$new_n27645_ i1=$abc$109383$new_n27594_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[4] nq=$abc$109383$new_n45169_
-.subckt a4_x2 i0=$abc$109383$new_n29095_ i1=$abc$109383$new_n27423_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n20241_ q=$abc$109383$new_n45170_
+.subckt and4_x1 i0=$abc$109383$new_n29095_ i1=$abc$109383$new_n27423_ i2=$abc$109383$new_n19663_ i3=$abc$109383$new_n20241_ q=$abc$109383$new_n45170_
 .subckt buf_x4 i=$abc$109383$new_n45170_ q=$abc$109383$new_n45171_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[4] nq=$abc$109383$new_n45172_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[4] nq=$abc$109383$new_n45173_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[4] nq=$abc$109383$new_n45174_
 .subckt inv_x0 i=soc.hyperram.sr[4] nq=$abc$109383$new_n45175_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n45175_ q=$abc$109383$new_n45176_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n45175_ q=$abc$109383$new_n45176_
 .subckt buf_x4 i=$abc$109383$new_n21959_ q=$abc$109383$new_n45177_
 .subckt buf_x4 i=$abc$109383$new_n21961_ q=$abc$109383$new_n45178_
 .subckt buf_x4 i=$abc$109383$new_n21963_ q=$abc$109383$new_n45179_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[4] nq=$abc$109383$new_n45180_
 .subckt nor2_x0 i0=$abc$109383$new_n19692_ i1=$abc$109383$new_n45180_ nq=$abc$109383$new_n45181_
 .subckt nand4_x0 i0=$abc$109383$new_n45181_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n45182_
-.subckt a3_x2 i0=$abc$109383$new_n45182_ i1=$abc$109383$new_n45176_ i2=$abc$109383$new_n45174_ q=$abc$109383$new_n45183_
-.subckt a4_x2 i0=$abc$109383$new_n45183_ i1=$abc$109383$new_n45173_ i2=$abc$109383$new_n45172_ i3=$abc$109383$new_n45169_ q=$abc$109383$new_n45184_
+.subckt and3_x1 i0=$abc$109383$new_n45182_ i1=$abc$109383$new_n45176_ i2=$abc$109383$new_n45174_ q=$abc$109383$new_n45183_
+.subckt and4_x1 i0=$abc$109383$new_n45183_ i1=$abc$109383$new_n45173_ i2=$abc$109383$new_n45172_ i3=$abc$109383$new_n45169_ q=$abc$109383$new_n45184_
 .subckt nand3_x0 i0=$abc$109383$new_n45184_ i1=$abc$109383$new_n45168_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n45185_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[4] q=$abc$109383$new_n45186_
-.subckt a2_x2 i0=$abc$109383$new_n45186_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n45187_
-.subckt a2_x2 i0=$abc$109383$new_n45187_ i1=$abc$109383$new_n45185_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103214
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[5] q=$abc$109383$new_n45189_
-.subckt a2_x2 i0=$abc$109383$new_n45189_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n45190_
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[4] nq=$abc$109383$new_n45186_
+.subckt and2_x1 i0=$abc$109383$new_n45186_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n45187_
+.subckt and2_x1 i0=$abc$109383$new_n45187_ i1=$abc$109383$new_n45185_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103214
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[5] nq=$abc$109383$new_n45189_
+.subckt and2_x1 i0=$abc$109383$new_n45189_ i1=$abc$109383$new_n28054_ q=$abc$109383$new_n45190_
 .subckt nand4_x0 i0=$abc$109383$new_n14915_ i1=$abc$109383$new_n14906_ i2=$abc$109383$new_n14897_ i3=soc.decoder.data_bus__dat_r[5] nq=$abc$109383$new_n45191_
 .subckt inv_x0 i=soc.hyperram.sr[5] nq=$abc$109383$new_n45192_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n45192_ q=$abc$109383$new_n45193_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n45192_ q=$abc$109383$new_n45193_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[5] nq=$abc$109383$new_n45194_
 .subckt nor2_x0 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n45194_ nq=$abc$109383$new_n45195_
 .subckt nand4_x0 i0=$abc$109383$new_n45195_ i1=$abc$109383$new_n21963_ i2=$abc$109383$new_n21961_ i3=$abc$109383$new_n21959_ nq=$abc$109383$new_n45196_
-.subckt a3_x2 i0=$abc$109383$new_n45196_ i1=$abc$109383$new_n45193_ i2=$abc$109383$new_n45191_ q=$abc$109383$new_n45197_
+.subckt and3_x1 i0=$abc$109383$new_n45196_ i1=$abc$109383$new_n45193_ i2=$abc$109383$new_n45191_ q=$abc$109383$new_n45197_
 .subckt nand2_x0 i0=$abc$109383$new_n28239_ i1=$abc$109383$new_n28237_ nq=$abc$109383$new_n45198_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[5] nq=$abc$109383$new_n45199_
-.subckt ao22_x2 i0=$abc$109383$new_n45199_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n45197_ q=$abc$109383$new_n45200_
+.subckt and21nor_x1 i0=$abc$109383$new_n45199_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n45197_ nq=$abc$109383$new_n45200_
 .subckt nand2_x0 i0=$abc$109383$new_n45170_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[5] nq=$abc$109383$new_n45201_
 .subckt nand2_x0 i0=$abc$109383$new_n27645_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[5] nq=$abc$109383$new_n45202_
-.subckt ao22_x2 i0=$abc$109383$new_n28563_ i1=$abc$109383$new_n45202_ i2=$abc$109383$new_n45201_ q=$abc$109383$new_n45203_
+.subckt and21nor_x1 i0=$abc$109383$new_n28563_ i1=$abc$109383$new_n45202_ i2=$abc$109383$new_n45201_ nq=$abc$109383$new_n45203_
 .subckt nand2_x0 i0=$abc$109383$new_n45203_ i1=$abc$109383$new_n45200_ nq=$abc$109383$new_n45204_
-.subckt mx2_x2 cmd=$abc$109383$new_n43926_ i0=soc.ram.ram[19][5] i1=soc.ram.ram[23][5] q=$abc$109383$new_n45205_
+.subckt mux2_x1 cmd=$abc$109383$new_n43926_ i0=soc.ram.ram[19][5] i1=soc.ram.ram[23][5] q=$abc$109383$new_n45205_
 .subckt nand2_x0 i0=$abc$109383$new_n45205_ i1=$abc$109383$new_n44590_ nq=$abc$109383$new_n45206_
 .subckt buf_x4 i=$abc$109383$new_n44469_ q=$abc$109383$new_n45207_
-.subckt mx2_x2 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[18][5] i1=soc.ram.ram[22][5] q=$abc$109383$new_n45208_
+.subckt mux2_x1 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[18][5] i1=soc.ram.ram[22][5] q=$abc$109383$new_n45208_
 .subckt nand2_x0 i0=$abc$109383$new_n45208_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n45209_
 .subckt nand3_x0 i0=$abc$109383$new_n45209_ i1=$abc$109383$new_n45206_ i2=$abc$109383$new_n43935_ nq=$abc$109383$new_n45210_
 .subckt buf_x4 i=$abc$109383$new_n44523_ q=$abc$109383$new_n45211_
-.subckt mx2_x2 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[17][5] i1=soc.ram.ram[21][5] q=$abc$109383$new_n45212_
-.subckt mx2_x2 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[16][5] i1=soc.ram.ram[20][5] q=$abc$109383$new_n45213_
-.subckt mx2_x2 cmd=$abc$109383$new_n44175_ i0=$abc$109383$new_n45213_ i1=$abc$109383$new_n45212_ q=$abc$109383$new_n45214_
-.subckt ao22_x2 i0=$abc$109383$new_n43809_ i1=$abc$109383$new_n45214_ i2=$abc$109383$new_n45211_ q=$abc$109383$new_n45215_
+.subckt mux2_x1 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[17][5] i1=soc.ram.ram[21][5] q=$abc$109383$new_n45212_
+.subckt mux2_x1 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[16][5] i1=soc.ram.ram[20][5] q=$abc$109383$new_n45213_
+.subckt mux2_x1 cmd=$abc$109383$new_n44175_ i0=$abc$109383$new_n45213_ i1=$abc$109383$new_n45212_ q=$abc$109383$new_n45214_
+.subckt and21nor_x1 i0=$abc$109383$new_n43809_ i1=$abc$109383$new_n45214_ i2=$abc$109383$new_n45211_ nq=$abc$109383$new_n45215_
 .subckt nand2_x0 i0=$abc$109383$new_n45215_ i1=$abc$109383$new_n45210_ nq=$abc$109383$new_n45216_
 .subckt inv_x0 i=soc.ram.ram[31][5] nq=$abc$109383$new_n45217_
 .subckt nand2_x0 i0=$abc$109383$new_n45217_ i1=$abc$109383$new_n44587_ nq=$abc$109383$new_n45218_
 .subckt buf_x4 i=$abc$109383$new_n44073_ q=$abc$109383$new_n45219_
-.subckt ao22_x2 i0=soc.ram.ram[27][5] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44001_ q=$abc$109383$new_n45220_
+.subckt and21nor_x1 i0=soc.ram.ram[27][5] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44001_ nq=$abc$109383$new_n45220_
 .subckt nand2_x0 i0=$abc$109383$new_n45220_ i1=$abc$109383$new_n45218_ nq=$abc$109383$new_n45221_
 .subckt buf_x4 i=$abc$109383$new_n43685_ q=$abc$109383$new_n45222_
-.subckt mx2_x2 cmd=$abc$109383$new_n45222_ i0=soc.ram.ram[26][5] i1=soc.ram.ram[30][5] q=$abc$109383$new_n45223_
+.subckt mux2_x1 cmd=$abc$109383$new_n45222_ i0=soc.ram.ram[26][5] i1=soc.ram.ram[30][5] q=$abc$109383$new_n45223_
 .subckt nand2_x0 i0=$abc$109383$new_n45223_ i1=$abc$109383$new_n44830_ nq=$abc$109383$new_n45224_
-.subckt a2_x2 i0=$abc$109383$new_n45224_ i1=$abc$109383$new_n43948_ q=$abc$109383$new_n45225_
+.subckt and2_x1 i0=$abc$109383$new_n45224_ i1=$abc$109383$new_n43948_ q=$abc$109383$new_n45225_
 .subckt nand2_x0 i0=$abc$109383$new_n45225_ i1=$abc$109383$new_n45221_ nq=$abc$109383$new_n45226_
 .subckt buf_x4 i=$abc$109383$new_n44229_ q=$abc$109383$new_n45227_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[24][5] i1=soc.ram.ram[28][5] q=$abc$109383$new_n45228_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[24][5] i1=soc.ram.ram[28][5] q=$abc$109383$new_n45228_
 .subckt nand2_x0 i0=$abc$109383$new_n45228_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n45229_
 .subckt inv_x0 i=soc.ram.ram[29][5] nq=$abc$109383$new_n45230_
 .subckt nand2_x0 i0=$abc$109383$new_n45230_ i1=$abc$109383$new_n44930_ nq=$abc$109383$new_n45231_
 .subckt buf_x4 i=$abc$109383$new_n44402_ q=$abc$109383$new_n45232_
 .subckt buf_x4 i=$abc$109383$new_n43519_ q=$abc$109383$new_n45233_
 .subckt buf_x4 i=$abc$109383$new_n45233_ q=$abc$109383$new_n45234_
-.subckt ao22_x2 i0=soc.ram.ram[25][5] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ q=$abc$109383$new_n45235_
+.subckt and21nor_x1 i0=soc.ram.ram[25][5] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ nq=$abc$109383$new_n45235_
 .subckt nand2_x0 i0=$abc$109383$new_n45235_ i1=$abc$109383$new_n45231_ nq=$abc$109383$new_n45236_
 .subckt nand3_x0 i0=$abc$109383$new_n45236_ i1=$abc$109383$new_n45229_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n45237_
 .subckt nand3_x0 i0=$abc$109383$new_n45237_ i1=$abc$109383$new_n45226_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n45238_
-.subckt oa22_x2 i0=$abc$109383$new_n45238_ i1=$abc$109383$new_n45216_ i2=$abc$109383$new_n44584_ q=$abc$109383$new_n45239_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[11][5] i1=soc.ram.ram[15][5] q=$abc$109383$new_n45240_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[10][5] i1=soc.ram.ram[14][5] q=$abc$109383$new_n45241_
-.subckt mx2_x2 cmd=$abc$109383$new_n43416_ i0=$abc$109383$new_n45241_ i1=$abc$109383$new_n45240_ q=$abc$109383$new_n45242_
-.subckt o2_x2 i0=$abc$109383$new_n45242_ i1=$abc$109383$new_n44812_ q=$abc$109383$new_n45243_
+.subckt or21nand_x1 i0=$abc$109383$new_n45238_ i1=$abc$109383$new_n45216_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n45239_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[11][5] i1=soc.ram.ram[15][5] q=$abc$109383$new_n45240_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[10][5] i1=soc.ram.ram[14][5] q=$abc$109383$new_n45241_
+.subckt mux2_x1 cmd=$abc$109383$new_n43416_ i0=$abc$109383$new_n45241_ i1=$abc$109383$new_n45240_ q=$abc$109383$new_n45242_
+.subckt or2_x1 i0=$abc$109383$new_n45242_ i1=$abc$109383$new_n44812_ q=$abc$109383$new_n45243_
 .subckt buf_x4 i=$abc$109383$new_n44390_ q=$abc$109383$new_n45244_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[9][5] i1=soc.ram.ram[13][5] q=$abc$109383$new_n45245_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[8][5] i1=soc.ram.ram[12][5] q=$abc$109383$new_n45246_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[9][5] i1=soc.ram.ram[13][5] q=$abc$109383$new_n45245_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[8][5] i1=soc.ram.ram[12][5] q=$abc$109383$new_n45246_
 .subckt buf_x4 i=$abc$109383$new_n43557_ q=$abc$109383$new_n45247_
-.subckt mx2_x2 cmd=$abc$109383$new_n45247_ i0=$abc$109383$new_n45246_ i1=$abc$109383$new_n45245_ q=$abc$109383$new_n45248_
-.subckt ao22_x2 i0=$abc$109383$new_n43934_ i1=$abc$109383$new_n45248_ i2=$abc$109383$new_n45244_ q=$abc$109383$new_n45249_
+.subckt mux2_x1 cmd=$abc$109383$new_n45247_ i0=$abc$109383$new_n45246_ i1=$abc$109383$new_n45245_ q=$abc$109383$new_n45248_
+.subckt and21nor_x1 i0=$abc$109383$new_n43934_ i1=$abc$109383$new_n45248_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n45249_
 .subckt nand2_x0 i0=$abc$109383$new_n45249_ i1=$abc$109383$new_n45243_ nq=$abc$109383$new_n45250_
-.subckt mx2_x2 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[0][5] i1=soc.ram.ram[4][5] q=$abc$109383$new_n45251_
-.subckt a2_x2 i0=$abc$109383$new_n45251_ i1=$abc$109383$new_n43456_ q=$abc$109383$new_n45252_
+.subckt mux2_x1 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[0][5] i1=soc.ram.ram[4][5] q=$abc$109383$new_n45251_
+.subckt and2_x1 i0=$abc$109383$new_n45251_ i1=$abc$109383$new_n43456_ q=$abc$109383$new_n45252_
 .subckt inv_x0 i=soc.ram.ram[5][5] nq=$abc$109383$new_n45253_
 .subckt nand2_x0 i0=$abc$109383$new_n45253_ i1=$abc$109383$new_n45059_ nq=$abc$109383$new_n45254_
-.subckt ao22_x2 i0=soc.ram.ram[1][5] i1=$abc$109383$new_n44563_ i2=$abc$109383$new_n44047_ q=$abc$109383$new_n45255_
-.subckt oa22_x2 i0=$abc$109383$new_n45255_ i1=$abc$109383$new_n45254_ i2=$abc$109383$new_n45252_ q=$abc$109383$new_n45256_
-.subckt ao22_x2 i0=soc.ram.ram[3][5] i1=$abc$109383$new_n43598_ i2=$abc$109383$new_n43629_ q=$abc$109383$new_n45257_
-.subckt ao22_x2 i0=$abc$109383$new_n43929_ i1=soc.ram.ram[7][5] i2=$abc$109383$new_n45257_ q=$abc$109383$new_n45258_
-.subckt mx2_x2 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[2][5] i1=soc.ram.ram[6][5] q=$abc$109383$new_n45259_
-.subckt oa22_x2 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n45259_ i2=$abc$109383$new_n45258_ q=$abc$109383$new_n45260_
-.subckt mx2_x2 cmd=$abc$109383$new_n43855_ i0=$abc$109383$new_n45260_ i1=$abc$109383$new_n45256_ q=$abc$109383$new_n45261_
+.subckt and21nor_x1 i0=soc.ram.ram[1][5] i1=$abc$109383$new_n44563_ i2=$abc$109383$new_n44047_ nq=$abc$109383$new_n45255_
+.subckt or21nand_x1 i0=$abc$109383$new_n45255_ i1=$abc$109383$new_n45254_ i2=$abc$109383$new_n45252_ nq=$abc$109383$new_n45256_
+.subckt and21nor_x1 i0=soc.ram.ram[3][5] i1=$abc$109383$new_n43598_ i2=$abc$109383$new_n43629_ nq=$abc$109383$new_n45257_
+.subckt and21nor_x1 i0=$abc$109383$new_n43929_ i1=soc.ram.ram[7][5] i2=$abc$109383$new_n45257_ nq=$abc$109383$new_n45258_
+.subckt mux2_x1 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[2][5] i1=soc.ram.ram[6][5] q=$abc$109383$new_n45259_
+.subckt or21nand_x1 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n45259_ i2=$abc$109383$new_n45258_ nq=$abc$109383$new_n45260_
+.subckt mux2_x1 cmd=$abc$109383$new_n43855_ i0=$abc$109383$new_n45260_ i1=$abc$109383$new_n45256_ q=$abc$109383$new_n45261_
 .subckt nand2_x0 i0=$abc$109383$new_n45261_ i1=$abc$109383$new_n43472_ nq=$abc$109383$new_n45262_
-.subckt oa22_x2 i0=$abc$109383$new_n45262_ i1=$abc$109383$new_n45250_ i2=$abc$109383$new_n43783_ q=$abc$109383$new_n45263_
+.subckt or21nand_x1 i0=$abc$109383$new_n45262_ i1=$abc$109383$new_n45250_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n45263_
 .subckt nand3_x0 i0=$abc$109383$new_n45263_ i1=$abc$109383$new_n45239_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n45264_
 .subckt buf_x4 i=$abc$109383$new_n44181_ q=$abc$109383$new_n45265_
-.subckt mx2_x2 cmd=$abc$109383$new_n45265_ i0=soc.ram.ram[58][5] i1=soc.ram.ram[62][5] q=$abc$109383$new_n45266_
+.subckt mux2_x1 cmd=$abc$109383$new_n45265_ i0=soc.ram.ram[58][5] i1=soc.ram.ram[62][5] q=$abc$109383$new_n45266_
 .subckt nand2_x0 i0=$abc$109383$new_n45266_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n45267_
 .subckt buf_x4 i=$abc$109383$new_n44505_ q=$abc$109383$new_n45268_
-.subckt mx2_x2 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[59][5] i1=soc.ram.ram[63][5] q=$abc$109383$new_n45269_
+.subckt mux2_x1 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[59][5] i1=soc.ram.ram[63][5] q=$abc$109383$new_n45269_
 .subckt nand2_x0 i0=$abc$109383$new_n45269_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n45270_
 .subckt nand3_x0 i0=$abc$109383$new_n45270_ i1=$abc$109383$new_n45267_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n45271_
-.subckt mx2_x2 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[56][5] i1=soc.ram.ram[60][5] q=$abc$109383$new_n45272_
+.subckt mux2_x1 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[56][5] i1=soc.ram.ram[60][5] q=$abc$109383$new_n45272_
 .subckt nand2_x0 i0=$abc$109383$new_n45272_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n45273_
 .subckt buf_x4 i=$abc$109383$new_n44563_ q=$abc$109383$new_n45274_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[57][5] i1=soc.ram.ram[61][5] q=$abc$109383$new_n45275_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[57][5] i1=soc.ram.ram[61][5] q=$abc$109383$new_n45275_
 .subckt nand2_x0 i0=$abc$109383$new_n45275_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n45276_
 .subckt nand3_x0 i0=$abc$109383$new_n45276_ i1=$abc$109383$new_n45273_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n45277_
 .subckt nand3_x0 i0=$abc$109383$new_n45277_ i1=$abc$109383$new_n45271_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n45278_
@@ -30554,41 +30554,41 @@
 .subckt buf_x4 i=$abc$109383$new_n45279_ q=$abc$109383$new_n45280_
 .subckt inv_x0 i=soc.ram.ram[55][5] nq=$abc$109383$new_n45281_
 .subckt nand2_x0 i0=$abc$109383$new_n45281_ i1=$abc$109383$new_n44930_ nq=$abc$109383$new_n45282_
-.subckt ao22_x2 i0=soc.ram.ram[51][5] i1=$abc$109383$new_n45082_ i2=$abc$109383$new_n45232_ q=$abc$109383$new_n45283_
+.subckt and21nor_x1 i0=soc.ram.ram[51][5] i1=$abc$109383$new_n45082_ i2=$abc$109383$new_n45232_ nq=$abc$109383$new_n45283_
 .subckt nand2_x0 i0=$abc$109383$new_n45283_ i1=$abc$109383$new_n45282_ nq=$abc$109383$new_n45284_
 .subckt buf_x4 i=$abc$109383$new_n43368_ q=$abc$109383$new_n45285_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[50][5] i1=soc.ram.ram[54][5] q=$abc$109383$new_n45286_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[50][5] i1=soc.ram.ram[54][5] q=$abc$109383$new_n45286_
 .subckt nand2_x0 i0=$abc$109383$new_n45286_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n45287_
 .subckt nand3_x0 i0=$abc$109383$new_n45287_ i1=$abc$109383$new_n45284_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n45288_
 .subckt inv_x0 i=soc.ram.ram[53][5] nq=$abc$109383$new_n45289_
 .subckt nand2_x0 i0=$abc$109383$new_n45289_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n45290_
-.subckt ao22_x2 i0=soc.ram.ram[49][5] i1=$abc$109383$new_n44234_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n45291_
+.subckt and21nor_x1 i0=soc.ram.ram[49][5] i1=$abc$109383$new_n44234_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n45291_
 .subckt nand2_x0 i0=$abc$109383$new_n45291_ i1=$abc$109383$new_n45290_ nq=$abc$109383$new_n45292_
-.subckt mx2_x2 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[48][5] i1=soc.ram.ram[52][5] q=$abc$109383$new_n45293_
+.subckt mux2_x1 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[48][5] i1=soc.ram.ram[52][5] q=$abc$109383$new_n45293_
 .subckt nand2_x0 i0=$abc$109383$new_n45293_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n45294_
 .subckt nand3_x0 i0=$abc$109383$new_n45294_ i1=$abc$109383$new_n45292_ i2=$abc$109383$new_n44812_ nq=$abc$109383$new_n45295_
 .subckt nand3_x0 i0=$abc$109383$new_n45295_ i1=$abc$109383$new_n45288_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n45296_
-.subckt oa22_x2 i0=$abc$109383$new_n45296_ i1=$abc$109383$new_n45278_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n45297_
+.subckt or21nand_x1 i0=$abc$109383$new_n45296_ i1=$abc$109383$new_n45278_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n45297_
 .subckt buf_x4 i=$abc$109383$new_n43649_ q=$abc$109383$new_n45298_
-.subckt mx2_x2 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[42][5] i1=soc.ram.ram[46][5] q=$abc$109383$new_n45299_
+.subckt mux2_x1 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[42][5] i1=soc.ram.ram[46][5] q=$abc$109383$new_n45299_
 .subckt nand2_x0 i0=$abc$109383$new_n45299_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n45300_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[43][5] i1=soc.ram.ram[47][5] q=$abc$109383$new_n45301_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[43][5] i1=soc.ram.ram[47][5] q=$abc$109383$new_n45301_
 .subckt nand2_x0 i0=$abc$109383$new_n45301_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n45302_
 .subckt nand3_x0 i0=$abc$109383$new_n45302_ i1=$abc$109383$new_n45300_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n45303_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[40][5] i1=soc.ram.ram[44][5] q=$abc$109383$new_n45304_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[40][5] i1=soc.ram.ram[44][5] q=$abc$109383$new_n45304_
 .subckt nand2_x0 i0=$abc$109383$new_n45304_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n45305_
 .subckt buf_x4 i=$abc$109383$new_n43574_ q=$abc$109383$new_n45306_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[41][5] i1=soc.ram.ram[45][5] q=$abc$109383$new_n45307_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[41][5] i1=soc.ram.ram[45][5] q=$abc$109383$new_n45307_
 .subckt nand2_x0 i0=$abc$109383$new_n45307_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n45308_
 .subckt nand3_x0 i0=$abc$109383$new_n45308_ i1=$abc$109383$new_n45305_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n45309_
 .subckt nand3_x0 i0=$abc$109383$new_n45309_ i1=$abc$109383$new_n45303_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n45310_
 .subckt buf_x4 i=$abc$109383$new_n43664_ q=$abc$109383$new_n45311_
 .subckt inv_x0 i=soc.ram.ram[37][5] nq=$abc$109383$new_n45312_
 .subckt nand2_x0 i0=$abc$109383$new_n45312_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n45313_
-.subckt ao22_x2 i0=soc.ram.ram[33][5] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n45314_
+.subckt and21nor_x1 i0=soc.ram.ram[33][5] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n45314_
 .subckt nand2_x0 i0=$abc$109383$new_n45314_ i1=$abc$109383$new_n45313_ nq=$abc$109383$new_n45315_
 .subckt buf_x4 i=$abc$109383$new_n43595_ q=$abc$109383$new_n45316_
-.subckt mx2_x2 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[32][5] i1=soc.ram.ram[36][5] q=$abc$109383$new_n45317_
+.subckt mux2_x1 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[32][5] i1=soc.ram.ram[36][5] q=$abc$109383$new_n45317_
 .subckt nand2_x0 i0=$abc$109383$new_n45317_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n45318_
 .subckt nand3_x0 i0=$abc$109383$new_n45318_ i1=$abc$109383$new_n45315_ i2=$abc$109383$new_n44812_ nq=$abc$109383$new_n45319_
 .subckt buf_x4 i=$abc$109383$new_n43665_ q=$abc$109383$new_n45320_
@@ -30596,119 +30596,119 @@
 .subckt buf_x4 i=$abc$109383$new_n45321_ q=$abc$109383$new_n45322_
 .subckt inv_x0 i=soc.ram.ram[39][5] nq=$abc$109383$new_n45323_
 .subckt nand2_x0 i0=$abc$109383$new_n45323_ i1=$abc$109383$new_n45322_ nq=$abc$109383$new_n45324_
-.subckt ao22_x2 i0=soc.ram.ram[35][5] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ q=$abc$109383$new_n45325_
+.subckt and21nor_x1 i0=soc.ram.ram[35][5] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ nq=$abc$109383$new_n45325_
 .subckt nand2_x0 i0=$abc$109383$new_n45325_ i1=$abc$109383$new_n45324_ nq=$abc$109383$new_n45326_
-.subckt mx2_x2 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[34][5] i1=soc.ram.ram[38][5] q=$abc$109383$new_n45327_
+.subckt mux2_x1 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[34][5] i1=soc.ram.ram[38][5] q=$abc$109383$new_n45327_
 .subckt nand2_x0 i0=$abc$109383$new_n45327_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n45328_
 .subckt nand3_x0 i0=$abc$109383$new_n45328_ i1=$abc$109383$new_n45326_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n45329_
 .subckt nand3_x0 i0=$abc$109383$new_n45329_ i1=$abc$109383$new_n45319_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n45330_
-.subckt oa22_x2 i0=$abc$109383$new_n45330_ i1=$abc$109383$new_n45310_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n45331_
+.subckt or21nand_x1 i0=$abc$109383$new_n45330_ i1=$abc$109383$new_n45310_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n45331_
 .subckt nand3_x0 i0=$abc$109383$new_n45331_ i1=$abc$109383$new_n45297_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n45332_
-.subckt oa22_x2 i0=$abc$109383$new_n45332_ i1=$abc$109383$new_n45264_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n45333_
-.subckt a2_x2 i0=$abc$109383$new_n45333_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n45334_
+.subckt or21nand_x1 i0=$abc$109383$new_n45332_ i1=$abc$109383$new_n45264_ i2=$abc$109383$new_n43586_ nq=$abc$109383$new_n45333_
+.subckt and2_x1 i0=$abc$109383$new_n45333_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n45334_
 .subckt buf_x4 i=$abc$109383$new_n44390_ q=$abc$109383$new_n45335_
-.subckt mx2_x2 cmd=$abc$109383$new_n43660_ i0=soc.ram.ram[88][5] i1=soc.ram.ram[92][5] q=$abc$109383$new_n45336_
+.subckt mux2_x1 cmd=$abc$109383$new_n43660_ i0=soc.ram.ram[88][5] i1=soc.ram.ram[92][5] q=$abc$109383$new_n45336_
 .subckt nand2_x0 i0=$abc$109383$new_n45336_ i1=$abc$109383$new_n44485_ nq=$abc$109383$new_n45337_
 .subckt inv_x0 i=soc.ram.ram[93][5] nq=$abc$109383$new_n45338_
 .subckt nand2_x0 i0=$abc$109383$new_n45338_ i1=$abc$109383$new_n43477_ nq=$abc$109383$new_n45339_
-.subckt ao22_x2 i0=soc.ram.ram[89][5] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n44044_ q=$abc$109383$new_n45340_
+.subckt and21nor_x1 i0=soc.ram.ram[89][5] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n44044_ nq=$abc$109383$new_n45340_
 .subckt nand2_x0 i0=$abc$109383$new_n45340_ i1=$abc$109383$new_n45339_ nq=$abc$109383$new_n45341_
-.subckt a3_x2 i0=$abc$109383$new_n45341_ i1=$abc$109383$new_n45337_ i2=$abc$109383$new_n44115_ q=$abc$109383$new_n45342_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[90][5] i1=soc.ram.ram[94][5] q=$abc$109383$new_n45343_
+.subckt and3_x1 i0=$abc$109383$new_n45341_ i1=$abc$109383$new_n45337_ i2=$abc$109383$new_n44115_ q=$abc$109383$new_n45342_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[90][5] i1=soc.ram.ram[94][5] q=$abc$109383$new_n45343_
 .subckt nand2_x0 i0=$abc$109383$new_n45343_ i1=$abc$109383$new_n44836_ nq=$abc$109383$new_n45344_
-.subckt o2_x2 i0=soc.ram.ram[91][5] i1=$abc$109383$new_n44167_ q=$abc$109383$new_n45345_
+.subckt or2_x1 i0=soc.ram.ram[91][5] i1=$abc$109383$new_n44167_ q=$abc$109383$new_n45345_
 .subckt nand2_x0 i0=$abc$109383$new_n45345_ i1=$abc$109383$new_n43517_ nq=$abc$109383$new_n45346_
 .subckt inv_x0 i=soc.ram.ram[95][5] nq=$abc$109383$new_n45347_
-.subckt a2_x2 i0=$abc$109383$new_n45347_ i1=$abc$109383$new_n44563_ q=$abc$109383$new_n45348_
-.subckt ao22_x2 i0=$abc$109383$new_n45348_ i1=$abc$109383$new_n45346_ i2=$abc$109383$new_n45344_ q=$abc$109383$new_n45349_
-.subckt a2_x2 i0=$abc$109383$new_n45349_ i1=$abc$109383$new_n43665_ q=$abc$109383$new_n45350_
-.subckt ao22_x2 i0=$abc$109383$new_n45350_ i1=$abc$109383$new_n45342_ i2=$abc$109383$new_n45335_ q=$abc$109383$new_n45351_
-.subckt mx2_x2 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[82][5] i1=soc.ram.ram[86][5] q=$abc$109383$new_n45352_
+.subckt and2_x1 i0=$abc$109383$new_n45347_ i1=$abc$109383$new_n44563_ q=$abc$109383$new_n45348_
+.subckt and21nor_x1 i0=$abc$109383$new_n45348_ i1=$abc$109383$new_n45346_ i2=$abc$109383$new_n45344_ nq=$abc$109383$new_n45349_
+.subckt and2_x1 i0=$abc$109383$new_n45349_ i1=$abc$109383$new_n43665_ q=$abc$109383$new_n45350_
+.subckt and21nor_x1 i0=$abc$109383$new_n45350_ i1=$abc$109383$new_n45342_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n45351_
+.subckt mux2_x1 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[82][5] i1=soc.ram.ram[86][5] q=$abc$109383$new_n45352_
 .subckt nand2_x0 i0=$abc$109383$new_n45352_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n45353_
-.subckt mx2_x2 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[83][5] i1=soc.ram.ram[87][5] q=$abc$109383$new_n45354_
+.subckt mux2_x1 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[83][5] i1=soc.ram.ram[87][5] q=$abc$109383$new_n45354_
 .subckt nand2_x0 i0=$abc$109383$new_n45354_ i1=$abc$109383$new_n43890_ nq=$abc$109383$new_n45355_
 .subckt nand3_x0 i0=$abc$109383$new_n45355_ i1=$abc$109383$new_n45353_ i2=$abc$109383$new_n43934_ nq=$abc$109383$new_n45356_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[80][5] i1=soc.ram.ram[84][5] q=$abc$109383$new_n45357_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[81][5] i1=soc.ram.ram[85][5] q=$abc$109383$new_n45358_
-.subckt mx2_x2 cmd=$abc$109383$new_n43594_ i0=$abc$109383$new_n45358_ i1=$abc$109383$new_n45357_ q=$abc$109383$new_n45359_
-.subckt o2_x2 i0=$abc$109383$new_n45359_ i1=$abc$109383$new_n45279_ q=$abc$109383$new_n45360_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[80][5] i1=soc.ram.ram[84][5] q=$abc$109383$new_n45357_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[81][5] i1=soc.ram.ram[85][5] q=$abc$109383$new_n45358_
+.subckt mux2_x1 cmd=$abc$109383$new_n43594_ i0=$abc$109383$new_n45358_ i1=$abc$109383$new_n45357_ q=$abc$109383$new_n45359_
+.subckt or2_x1 i0=$abc$109383$new_n45359_ i1=$abc$109383$new_n45279_ q=$abc$109383$new_n45360_
 .subckt nand2_x0 i0=$abc$109383$new_n45360_ i1=$abc$109383$new_n45356_ nq=$abc$109383$new_n45361_
-.subckt a2_x2 i0=$abc$109383$new_n45361_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n45362_
-.subckt ao22_x2 i0=$abc$109383$new_n45362_ i1=$abc$109383$new_n45351_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n45363_
-.subckt mx2_x2 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[66][5] i1=soc.ram.ram[70][5] q=$abc$109383$new_n45364_
+.subckt and2_x1 i0=$abc$109383$new_n45361_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n45362_
+.subckt and21nor_x1 i0=$abc$109383$new_n45362_ i1=$abc$109383$new_n45351_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n45363_
+.subckt mux2_x1 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[66][5] i1=soc.ram.ram[70][5] q=$abc$109383$new_n45364_
 .subckt nand2_x0 i0=$abc$109383$new_n45364_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n45365_
-.subckt mx2_x2 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[67][5] i1=soc.ram.ram[71][5] q=$abc$109383$new_n45366_
+.subckt mux2_x1 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[67][5] i1=soc.ram.ram[71][5] q=$abc$109383$new_n45366_
 .subckt nand2_x0 i0=$abc$109383$new_n45366_ i1=$abc$109383$new_n43890_ nq=$abc$109383$new_n45367_
 .subckt nand3_x0 i0=$abc$109383$new_n45367_ i1=$abc$109383$new_n45365_ i2=$abc$109383$new_n43934_ nq=$abc$109383$new_n45368_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[64][5] i1=soc.ram.ram[68][5] q=$abc$109383$new_n45369_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[65][5] i1=soc.ram.ram[69][5] q=$abc$109383$new_n45370_
-.subckt mx2_x2 cmd=$abc$109383$new_n43594_ i0=$abc$109383$new_n45370_ i1=$abc$109383$new_n45369_ q=$abc$109383$new_n45371_
-.subckt o2_x2 i0=$abc$109383$new_n45371_ i1=$abc$109383$new_n43665_ q=$abc$109383$new_n45372_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[64][5] i1=soc.ram.ram[68][5] q=$abc$109383$new_n45369_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[65][5] i1=soc.ram.ram[69][5] q=$abc$109383$new_n45370_
+.subckt mux2_x1 cmd=$abc$109383$new_n43594_ i0=$abc$109383$new_n45370_ i1=$abc$109383$new_n45369_ q=$abc$109383$new_n45371_
+.subckt or2_x1 i0=$abc$109383$new_n45371_ i1=$abc$109383$new_n43665_ q=$abc$109383$new_n45372_
 .subckt nand2_x0 i0=$abc$109383$new_n45372_ i1=$abc$109383$new_n45368_ nq=$abc$109383$new_n45373_
-.subckt a2_x2 i0=$abc$109383$new_n45373_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n45374_
-.subckt mx2_x2 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[72][5] i1=soc.ram.ram[76][5] q=$abc$109383$new_n45375_
+.subckt and2_x1 i0=$abc$109383$new_n45373_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n45374_
+.subckt mux2_x1 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[72][5] i1=soc.ram.ram[76][5] q=$abc$109383$new_n45375_
 .subckt nand2_x0 i0=$abc$109383$new_n45375_ i1=$abc$109383$new_n43813_ nq=$abc$109383$new_n45376_
 .subckt inv_x0 i=soc.ram.ram[77][5] nq=$abc$109383$new_n45377_
 .subckt nand2_x0 i0=$abc$109383$new_n45377_ i1=$abc$109383$new_n44176_ nq=$abc$109383$new_n45378_
-.subckt ao22_x2 i0=soc.ram.ram[73][5] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43961_ q=$abc$109383$new_n45379_
+.subckt and21nor_x1 i0=soc.ram.ram[73][5] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43961_ nq=$abc$109383$new_n45379_
 .subckt nand2_x0 i0=$abc$109383$new_n45379_ i1=$abc$109383$new_n45378_ nq=$abc$109383$new_n45380_
-.subckt a3_x2 i0=$abc$109383$new_n45380_ i1=$abc$109383$new_n45376_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n45381_
-.subckt mx2_x2 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[74][5] i1=soc.ram.ram[78][5] q=$abc$109383$new_n45382_
+.subckt and3_x1 i0=$abc$109383$new_n45380_ i1=$abc$109383$new_n45376_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n45381_
+.subckt mux2_x1 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[74][5] i1=soc.ram.ram[78][5] q=$abc$109383$new_n45382_
 .subckt nand2_x0 i0=$abc$109383$new_n45382_ i1=$abc$109383$new_n43549_ nq=$abc$109383$new_n45383_
-.subckt o2_x2 i0=soc.ram.ram[75][5] i1=$abc$109383$new_n43483_ q=$abc$109383$new_n45384_
+.subckt or2_x1 i0=soc.ram.ram[75][5] i1=$abc$109383$new_n43483_ q=$abc$109383$new_n45384_
 .subckt nand2_x0 i0=$abc$109383$new_n45384_ i1=$abc$109383$new_n43611_ nq=$abc$109383$new_n45385_
 .subckt inv_x0 i=soc.ram.ram[79][5] nq=$abc$109383$new_n45386_
-.subckt a2_x2 i0=$abc$109383$new_n45386_ i1=$abc$109383$new_n43602_ q=$abc$109383$new_n45387_
-.subckt ao22_x2 i0=$abc$109383$new_n45387_ i1=$abc$109383$new_n45385_ i2=$abc$109383$new_n45383_ q=$abc$109383$new_n45388_
-.subckt a2_x2 i0=$abc$109383$new_n45388_ i1=$abc$109383$new_n43808_ q=$abc$109383$new_n45389_
-.subckt ao22_x2 i0=$abc$109383$new_n45389_ i1=$abc$109383$new_n45381_ i2=$abc$109383$new_n43570_ q=$abc$109383$new_n45390_
-.subckt ao22_x2 i0=$abc$109383$new_n45390_ i1=$abc$109383$new_n45374_ i2=$abc$109383$new_n43921_ q=$abc$109383$new_n45391_
-.subckt ao22_x2 i0=$abc$109383$new_n45391_ i1=$abc$109383$new_n45363_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n45392_
+.subckt and2_x1 i0=$abc$109383$new_n45386_ i1=$abc$109383$new_n43602_ q=$abc$109383$new_n45387_
+.subckt and21nor_x1 i0=$abc$109383$new_n45387_ i1=$abc$109383$new_n45385_ i2=$abc$109383$new_n45383_ nq=$abc$109383$new_n45388_
+.subckt and2_x1 i0=$abc$109383$new_n45388_ i1=$abc$109383$new_n43808_ q=$abc$109383$new_n45389_
+.subckt and21nor_x1 i0=$abc$109383$new_n45389_ i1=$abc$109383$new_n45381_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n45390_
+.subckt and21nor_x1 i0=$abc$109383$new_n45390_ i1=$abc$109383$new_n45374_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n45391_
+.subckt and21nor_x1 i0=$abc$109383$new_n45391_ i1=$abc$109383$new_n45363_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n45392_
 .subckt buf_x4 i=$abc$109383$new_n43648_ q=$abc$109383$new_n45393_
 .subckt buf_x4 i=$abc$109383$new_n45393_ q=$abc$109383$new_n45394_
 .subckt buf_x4 i=$abc$109383$new_n44204_ q=$abc$109383$new_n45395_
-.subckt mx2_x2 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[122][5] i1=soc.ram.ram[126][5] q=$abc$109383$new_n45396_
+.subckt mux2_x1 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[122][5] i1=soc.ram.ram[126][5] q=$abc$109383$new_n45396_
 .subckt nand2_x0 i0=$abc$109383$new_n45396_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n45397_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[123][5] i1=soc.ram.ram[127][5] q=$abc$109383$new_n45398_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[123][5] i1=soc.ram.ram[127][5] q=$abc$109383$new_n45398_
 .subckt nand2_x0 i0=$abc$109383$new_n45398_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n45399_
 .subckt nand3_x0 i0=$abc$109383$new_n45399_ i1=$abc$109383$new_n45397_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n45400_
 .subckt buf_x4 i=$abc$109383$new_n44381_ q=$abc$109383$new_n45401_
 .subckt buf_x4 i=$abc$109383$new_n45053_ q=$abc$109383$new_n45402_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[120][5] i1=soc.ram.ram[124][5] q=$abc$109383$new_n45403_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[120][5] i1=soc.ram.ram[124][5] q=$abc$109383$new_n45403_
 .subckt nand2_x0 i0=$abc$109383$new_n45403_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n45404_
 .subckt buf_x4 i=$abc$109383$new_n44688_ q=$abc$109383$new_n45405_
 .subckt buf_x4 i=$abc$109383$new_n43342_ q=$abc$109383$new_n45406_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[121][5] i1=soc.ram.ram[125][5] q=$abc$109383$new_n45407_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[121][5] i1=soc.ram.ram[125][5] q=$abc$109383$new_n45407_
 .subckt nand2_x0 i0=$abc$109383$new_n45407_ i1=$abc$109383$new_n45405_ nq=$abc$109383$new_n45408_
 .subckt nand3_x0 i0=$abc$109383$new_n45408_ i1=$abc$109383$new_n45404_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n45409_
 .subckt nand3_x0 i0=$abc$109383$new_n45409_ i1=$abc$109383$new_n45400_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n45410_
 .subckt inv_x0 i=soc.ram.ram[117][5] nq=$abc$109383$new_n45411_
 .subckt nand2_x0 i0=$abc$109383$new_n45411_ i1=$abc$109383$new_n44704_ nq=$abc$109383$new_n45412_
-.subckt ao22_x2 i0=soc.ram.ram[113][5] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n45413_
+.subckt and21nor_x1 i0=soc.ram.ram[113][5] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n45413_
 .subckt nand2_x0 i0=$abc$109383$new_n45413_ i1=$abc$109383$new_n45412_ nq=$abc$109383$new_n45414_
-.subckt mx2_x2 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[112][5] i1=soc.ram.ram[116][5] q=$abc$109383$new_n45415_
+.subckt mux2_x1 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[112][5] i1=soc.ram.ram[116][5] q=$abc$109383$new_n45415_
 .subckt nand2_x0 i0=$abc$109383$new_n45415_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n45416_
 .subckt nand3_x0 i0=$abc$109383$new_n45416_ i1=$abc$109383$new_n45414_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n45417_
 .subckt inv_x0 i=soc.ram.ram[119][5] nq=$abc$109383$new_n45418_
 .subckt nand2_x0 i0=$abc$109383$new_n45418_ i1=$abc$109383$new_n43939_ nq=$abc$109383$new_n45419_
-.subckt ao22_x2 i0=soc.ram.ram[115][5] i1=$abc$109383$new_n45227_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n45420_
+.subckt and21nor_x1 i0=soc.ram.ram[115][5] i1=$abc$109383$new_n45227_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n45420_
 .subckt nand2_x0 i0=$abc$109383$new_n45420_ i1=$abc$109383$new_n45419_ nq=$abc$109383$new_n45421_
-.subckt mx2_x2 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[114][5] i1=soc.ram.ram[118][5] q=$abc$109383$new_n45422_
+.subckt mux2_x1 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[114][5] i1=soc.ram.ram[118][5] q=$abc$109383$new_n45422_
 .subckt nand2_x0 i0=$abc$109383$new_n45422_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n45423_
 .subckt nand3_x0 i0=$abc$109383$new_n45423_ i1=$abc$109383$new_n45421_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n45424_
 .subckt nand3_x0 i0=$abc$109383$new_n45424_ i1=$abc$109383$new_n45417_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n45425_
-.subckt oa22_x2 i0=$abc$109383$new_n45425_ i1=$abc$109383$new_n45410_ i2=$abc$109383$new_n43921_ q=$abc$109383$new_n45426_
+.subckt or21nand_x1 i0=$abc$109383$new_n45425_ i1=$abc$109383$new_n45410_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n45426_
 .subckt buf_x4 i=$abc$109383$new_n43506_ q=$abc$109383$new_n45427_
 .subckt buf_x4 i=$abc$109383$new_n45427_ q=$abc$109383$new_n45428_
-.subckt mx2_x2 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[106][5] i1=soc.ram.ram[110][5] q=$abc$109383$new_n45429_
+.subckt mux2_x1 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[106][5] i1=soc.ram.ram[110][5] q=$abc$109383$new_n45429_
 .subckt nand2_x0 i0=$abc$109383$new_n45429_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n45430_
-.subckt mx2_x2 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[107][5] i1=soc.ram.ram[111][5] q=$abc$109383$new_n45431_
+.subckt mux2_x1 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[107][5] i1=soc.ram.ram[111][5] q=$abc$109383$new_n45431_
 .subckt nand2_x0 i0=$abc$109383$new_n45431_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n45432_
 .subckt nand3_x0 i0=$abc$109383$new_n45432_ i1=$abc$109383$new_n45430_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n45433_
 .subckt buf_x4 i=$abc$109383$new_n43730_ q=$abc$109383$new_n45434_
-.subckt mx2_x2 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[104][5] i1=soc.ram.ram[108][5] q=$abc$109383$new_n45435_
+.subckt mux2_x1 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[104][5] i1=soc.ram.ram[108][5] q=$abc$109383$new_n45435_
 .subckt nand2_x0 i0=$abc$109383$new_n45435_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n45436_
-.subckt mx2_x2 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[105][5] i1=soc.ram.ram[109][5] q=$abc$109383$new_n45437_
+.subckt mux2_x1 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[105][5] i1=soc.ram.ram[109][5] q=$abc$109383$new_n45437_
 .subckt nand2_x0 i0=$abc$109383$new_n45437_ i1=$abc$109383$new_n43963_ nq=$abc$109383$new_n45438_
 .subckt nand3_x0 i0=$abc$109383$new_n45438_ i1=$abc$109383$new_n45436_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n45439_
 .subckt nand3_x0 i0=$abc$109383$new_n45439_ i1=$abc$109383$new_n45433_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n45440_
@@ -30717,2030 +30717,2030 @@
 .subckt nand2_x0 i0=$abc$109383$new_n45442_ i1=$abc$109383$new_n44634_ nq=$abc$109383$new_n45443_
 .subckt buf_x4 i=$abc$109383$new_n43517_ q=$abc$109383$new_n45444_
 .subckt buf_x4 i=$abc$109383$new_n45081_ q=$abc$109383$new_n45445_
-.subckt ao22_x2 i0=soc.ram.ram[97][5] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n45446_
+.subckt and21nor_x1 i0=soc.ram.ram[97][5] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n45446_
 .subckt nand2_x0 i0=$abc$109383$new_n45446_ i1=$abc$109383$new_n45443_ nq=$abc$109383$new_n45447_
 .subckt buf_x4 i=$abc$109383$new_n43595_ q=$abc$109383$new_n45448_
-.subckt mx2_x2 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[96][5] i1=soc.ram.ram[100][5] q=$abc$109383$new_n45449_
+.subckt mux2_x1 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[96][5] i1=soc.ram.ram[100][5] q=$abc$109383$new_n45449_
 .subckt nand2_x0 i0=$abc$109383$new_n45449_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n45450_
 .subckt nand3_x0 i0=$abc$109383$new_n45450_ i1=$abc$109383$new_n45447_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n45451_
 .subckt buf_x4 i=$abc$109383$new_n44500_ q=$abc$109383$new_n45452_
 .subckt inv_x0 i=soc.ram.ram[103][5] nq=$abc$109383$new_n45453_
 .subckt nand2_x0 i0=$abc$109383$new_n45453_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n45454_
 .subckt buf_x4 i=$abc$109383$new_n43630_ q=$abc$109383$new_n45455_
-.subckt ao22_x2 i0=soc.ram.ram[99][5] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n45456_
+.subckt and21nor_x1 i0=soc.ram.ram[99][5] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n45456_
 .subckt nand2_x0 i0=$abc$109383$new_n45456_ i1=$abc$109383$new_n45454_ nq=$abc$109383$new_n45457_
-.subckt mx2_x2 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[98][5] i1=soc.ram.ram[102][5] q=$abc$109383$new_n45458_
+.subckt mux2_x1 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[98][5] i1=soc.ram.ram[102][5] q=$abc$109383$new_n45458_
 .subckt nand2_x0 i0=$abc$109383$new_n45458_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n45459_
 .subckt nand3_x0 i0=$abc$109383$new_n45459_ i1=$abc$109383$new_n45457_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n45460_
 .subckt nand3_x0 i0=$abc$109383$new_n45460_ i1=$abc$109383$new_n45451_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n45461_
-.subckt oa22_x2 i0=$abc$109383$new_n45461_ i1=$abc$109383$new_n45440_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n45462_
-.subckt a3_x2 i0=$abc$109383$new_n45462_ i1=$abc$109383$new_n45426_ i2=$abc$109383$new_n43900_ q=$abc$109383$new_n45463_
-.subckt o2_x2 i0=$abc$109383$new_n45463_ i1=$abc$109383$new_n45392_ q=$abc$109383$new_n45464_
+.subckt or21nand_x1 i0=$abc$109383$new_n45461_ i1=$abc$109383$new_n45440_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n45462_
+.subckt and3_x1 i0=$abc$109383$new_n45462_ i1=$abc$109383$new_n45426_ i2=$abc$109383$new_n43900_ q=$abc$109383$new_n45463_
+.subckt or2_x1 i0=$abc$109383$new_n45463_ i1=$abc$109383$new_n45392_ q=$abc$109383$new_n45464_
 .subckt nand2_x0 i0=$abc$109383$new_n45464_ i1=$abc$109383$new_n44040_ nq=$abc$109383$new_n45465_
-.subckt oa22_x2 i0=$abc$109383$new_n45465_ i1=$abc$109383$new_n45334_ i2=$abc$109383$new_n45204_ q=$abc$109383$new_n45466_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n45466_ i2=$abc$109383$new_n45190_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103218
+.subckt or21nand_x1 i0=$abc$109383$new_n45465_ i1=$abc$109383$new_n45334_ i2=$abc$109383$new_n45204_ nq=$abc$109383$new_n45466_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n45466_ i2=$abc$109383$new_n45190_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103218
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n45468_
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[6] q=$abc$109383$new_n45469_
-.subckt a2_x2 i0=$abc$109383$new_n45469_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n45470_
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[6] nq=$abc$109383$new_n45469_
+.subckt and2_x1 i0=$abc$109383$new_n45469_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n45470_
 .subckt buf_x4 i=$abc$109383$new_n27492_ q=$abc$109383$new_n45471_
-.subckt a3_x2 i0=$abc$109383$new_n44269_ i1=$abc$109383$new_n45471_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n45472_
-.subckt a3_x2 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n45473_
-.subckt ao22_x2 i0=$abc$109383$new_n45473_ i1=$abc$109383$new_n45472_ i2=$abc$109383$new_n27594_ q=$abc$109383$new_n45474_
+.subckt and3_x1 i0=$abc$109383$new_n44269_ i1=$abc$109383$new_n45471_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n45472_
+.subckt and3_x1 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n45473_
+.subckt and21nor_x1 i0=$abc$109383$new_n45473_ i1=$abc$109383$new_n45472_ i2=$abc$109383$new_n27594_ nq=$abc$109383$new_n45474_
 .subckt buf_x4 i=$abc$109383$new_n43589_ q=$abc$109383$new_n45475_
-.subckt mx2_x2 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[80][6] i1=soc.ram.ram[84][6] q=$abc$109383$new_n45476_
+.subckt mux2_x1 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[80][6] i1=soc.ram.ram[84][6] q=$abc$109383$new_n45476_
 .subckt nand2_x0 i0=$abc$109383$new_n45476_ i1=$abc$109383$new_n43942_ nq=$abc$109383$new_n45477_
 .subckt buf_x4 i=$abc$109383$new_n44859_ q=$abc$109383$new_n45478_
 .subckt inv_x0 i=soc.ram.ram[85][6] nq=$abc$109383$new_n45479_
 .subckt nand2_x0 i0=$abc$109383$new_n45479_ i1=$abc$109383$new_n45478_ nq=$abc$109383$new_n45480_
 .subckt buf_x4 i=$abc$109383$new_n44047_ q=$abc$109383$new_n45481_
-.subckt ao22_x2 i0=soc.ram.ram[81][6] i1=$abc$109383$new_n44508_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n45482_
+.subckt and21nor_x1 i0=soc.ram.ram[81][6] i1=$abc$109383$new_n44508_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n45482_
 .subckt nand2_x0 i0=$abc$109383$new_n45482_ i1=$abc$109383$new_n45480_ nq=$abc$109383$new_n45483_
 .subckt nand3_x0 i0=$abc$109383$new_n45483_ i1=$abc$109383$new_n45477_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n45484_
-.subckt ao22_x2 i0=soc.ram.ram[89][6] i1=$abc$109383$new_n43613_ i2=$abc$109383$new_n43415_ q=$abc$109383$new_n45485_
-.subckt ao22_x2 i0=$abc$109383$new_n43561_ i1=soc.ram.ram[93][6] i2=$abc$109383$new_n45485_ q=$abc$109383$new_n45486_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[88][6] i1=soc.ram.ram[92][6] q=$abc$109383$new_n45487_
-.subckt oa22_x2 i0=$abc$109383$new_n44121_ i1=$abc$109383$new_n45487_ i2=$abc$109383$new_n43391_ q=$abc$109383$new_n45488_
-.subckt ao22_x2 i0=$abc$109383$new_n45488_ i1=$abc$109383$new_n45486_ i2=$abc$109383$new_n43855_ q=$abc$109383$new_n45489_
-.subckt a2_x2 i0=$abc$109383$new_n45489_ i1=$abc$109383$new_n45484_ q=$abc$109383$new_n45490_
-.subckt mx2_x2 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[82][6] i1=soc.ram.ram[86][6] q=$abc$109383$new_n45491_
+.subckt and21nor_x1 i0=soc.ram.ram[89][6] i1=$abc$109383$new_n43613_ i2=$abc$109383$new_n43415_ nq=$abc$109383$new_n45485_
+.subckt and21nor_x1 i0=$abc$109383$new_n43561_ i1=soc.ram.ram[93][6] i2=$abc$109383$new_n45485_ nq=$abc$109383$new_n45486_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[88][6] i1=soc.ram.ram[92][6] q=$abc$109383$new_n45487_
+.subckt or21nand_x1 i0=$abc$109383$new_n44121_ i1=$abc$109383$new_n45487_ i2=$abc$109383$new_n43391_ nq=$abc$109383$new_n45488_
+.subckt and21nor_x1 i0=$abc$109383$new_n45488_ i1=$abc$109383$new_n45486_ i2=$abc$109383$new_n43855_ nq=$abc$109383$new_n45489_
+.subckt and2_x1 i0=$abc$109383$new_n45489_ i1=$abc$109383$new_n45484_ q=$abc$109383$new_n45490_
+.subckt mux2_x1 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[82][6] i1=soc.ram.ram[86][6] q=$abc$109383$new_n45491_
 .subckt nand2_x0 i0=$abc$109383$new_n45491_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n45492_
 .subckt inv_x0 i=soc.ram.ram[87][6] nq=$abc$109383$new_n45493_
 .subckt nand2_x0 i0=$abc$109383$new_n45493_ i1=$abc$109383$new_n44586_ nq=$abc$109383$new_n45494_
-.subckt ao22_x2 i0=soc.ram.ram[83][6] i1=$abc$109383$new_n43887_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n45495_
+.subckt and21nor_x1 i0=soc.ram.ram[83][6] i1=$abc$109383$new_n43887_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n45495_
 .subckt nand2_x0 i0=$abc$109383$new_n45495_ i1=$abc$109383$new_n45494_ nq=$abc$109383$new_n45496_
 .subckt nand3_x0 i0=$abc$109383$new_n45496_ i1=$abc$109383$new_n45492_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n45497_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[90][6] i1=soc.ram.ram[94][6] q=$abc$109383$new_n45498_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[90][6] i1=soc.ram.ram[94][6] q=$abc$109383$new_n45498_
 .subckt nand2_x0 i0=$abc$109383$new_n45498_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n45499_
 .subckt inv_x0 i=soc.ram.ram[95][6] nq=$abc$109383$new_n45500_
 .subckt nand2_x0 i0=$abc$109383$new_n45500_ i1=$abc$109383$new_n43744_ nq=$abc$109383$new_n45501_
-.subckt ao22_x2 i0=soc.ram.ram[91][6] i1=$abc$109383$new_n43748_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n45502_
+.subckt and21nor_x1 i0=soc.ram.ram[91][6] i1=$abc$109383$new_n43748_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n45502_
 .subckt nand2_x0 i0=$abc$109383$new_n45502_ i1=$abc$109383$new_n45501_ nq=$abc$109383$new_n45503_
 .subckt nand3_x0 i0=$abc$109383$new_n45503_ i1=$abc$109383$new_n45499_ i2=$abc$109383$new_n43897_ nq=$abc$109383$new_n45504_
-.subckt a3_x2 i0=$abc$109383$new_n45504_ i1=$abc$109383$new_n45497_ i2=$abc$109383$new_n43948_ q=$abc$109383$new_n45505_
-.subckt ao22_x2 i0=$abc$109383$new_n45505_ i1=$abc$109383$new_n45490_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n45506_
+.subckt and3_x1 i0=$abc$109383$new_n45504_ i1=$abc$109383$new_n45497_ i2=$abc$109383$new_n43948_ q=$abc$109383$new_n45505_
+.subckt and21nor_x1 i0=$abc$109383$new_n45505_ i1=$abc$109383$new_n45490_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n45506_
 .subckt buf_x4 i=$abc$109383$new_n43920_ q=$abc$109383$new_n45507_
-.subckt mx2_x2 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[74][6] i1=soc.ram.ram[78][6] q=$abc$109383$new_n45508_
+.subckt mux2_x1 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[74][6] i1=soc.ram.ram[78][6] q=$abc$109383$new_n45508_
 .subckt nand2_x0 i0=$abc$109383$new_n45508_ i1=$abc$109383$new_n44837_ nq=$abc$109383$new_n45509_
-.subckt o2_x2 i0=soc.ram.ram[75][6] i1=$abc$109383$new_n45406_ q=$abc$109383$new_n45510_
-.subckt ao22_x2 i0=soc.ram.ram[79][6] i1=$abc$109383$new_n43561_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n45511_
+.subckt or2_x1 i0=soc.ram.ram[75][6] i1=$abc$109383$new_n45406_ q=$abc$109383$new_n45510_
+.subckt and21nor_x1 i0=soc.ram.ram[79][6] i1=$abc$109383$new_n43561_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n45511_
 .subckt nand2_x0 i0=$abc$109383$new_n45511_ i1=$abc$109383$new_n45510_ nq=$abc$109383$new_n45512_
-.subckt oa22_x2 i0=$abc$109383$new_n45512_ i1=$abc$109383$new_n45509_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n45513_
-.subckt mx2_x2 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[66][6] i1=soc.ram.ram[70][6] q=$abc$109383$new_n45514_
-.subckt mx2_x2 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[67][6] i1=soc.ram.ram[71][6] q=$abc$109383$new_n45515_
-.subckt mx2_x2 cmd=$abc$109383$new_n43595_ i0=$abc$109383$new_n45515_ i1=$abc$109383$new_n45514_ q=$abc$109383$new_n45516_
+.subckt or21nand_x1 i0=$abc$109383$new_n45512_ i1=$abc$109383$new_n45509_ i2=$abc$109383$new_n43664_ nq=$abc$109383$new_n45513_
+.subckt mux2_x1 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[66][6] i1=soc.ram.ram[70][6] q=$abc$109383$new_n45514_
+.subckt mux2_x1 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[67][6] i1=soc.ram.ram[71][6] q=$abc$109383$new_n45515_
+.subckt mux2_x1 cmd=$abc$109383$new_n43595_ i0=$abc$109383$new_n45515_ i1=$abc$109383$new_n45514_ q=$abc$109383$new_n45516_
 .subckt nand2_x0 i0=$abc$109383$new_n45516_ i1=$abc$109383$new_n44086_ nq=$abc$109383$new_n45517_
 .subckt nand3_x0 i0=$abc$109383$new_n45517_ i1=$abc$109383$new_n45513_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n45518_
 .subckt buf_x4 i=$abc$109383$new_n43724_ q=$abc$109383$new_n45519_
 .subckt buf_x4 i=$abc$109383$new_n45519_ q=$abc$109383$new_n45520_
-.subckt mx2_x2 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[72][6] i1=soc.ram.ram[76][6] q=$abc$109383$new_n45521_
+.subckt mux2_x1 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[72][6] i1=soc.ram.ram[76][6] q=$abc$109383$new_n45521_
 .subckt nand2_x0 i0=$abc$109383$new_n45521_ i1=$abc$109383$new_n44008_ nq=$abc$109383$new_n45522_
-.subckt o2_x2 i0=soc.ram.ram[73][6] i1=$abc$109383$new_n44500_ q=$abc$109383$new_n45523_
-.subckt ao22_x2 i0=soc.ram.ram[77][6] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n44214_ q=$abc$109383$new_n45524_
+.subckt or2_x1 i0=soc.ram.ram[73][6] i1=$abc$109383$new_n44500_ q=$abc$109383$new_n45523_
+.subckt and21nor_x1 i0=soc.ram.ram[77][6] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n44214_ nq=$abc$109383$new_n45524_
 .subckt nand2_x0 i0=$abc$109383$new_n45524_ i1=$abc$109383$new_n45523_ nq=$abc$109383$new_n45525_
-.subckt oa22_x2 i0=$abc$109383$new_n45525_ i1=$abc$109383$new_n45522_ i2=$abc$109383$new_n44692_ q=$abc$109383$new_n45526_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[64][6] i1=soc.ram.ram[68][6] q=$abc$109383$new_n45527_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[65][6] i1=soc.ram.ram[69][6] q=$abc$109383$new_n45528_
-.subckt mx2_x2 cmd=$abc$109383$new_n45053_ i0=$abc$109383$new_n45528_ i1=$abc$109383$new_n45527_ q=$abc$109383$new_n45529_
+.subckt or21nand_x1 i0=$abc$109383$new_n45525_ i1=$abc$109383$new_n45522_ i2=$abc$109383$new_n44692_ nq=$abc$109383$new_n45526_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[64][6] i1=soc.ram.ram[68][6] q=$abc$109383$new_n45527_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[65][6] i1=soc.ram.ram[69][6] q=$abc$109383$new_n45528_
+.subckt mux2_x1 cmd=$abc$109383$new_n45053_ i0=$abc$109383$new_n45528_ i1=$abc$109383$new_n45527_ q=$abc$109383$new_n45529_
 .subckt nand2_x0 i0=$abc$109383$new_n45529_ i1=$abc$109383$new_n45070_ nq=$abc$109383$new_n45530_
 .subckt nand3_x0 i0=$abc$109383$new_n45530_ i1=$abc$109383$new_n45526_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n45531_
-.subckt a3_x2 i0=$abc$109383$new_n45531_ i1=$abc$109383$new_n45518_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n45532_
+.subckt and3_x1 i0=$abc$109383$new_n45531_ i1=$abc$109383$new_n45518_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n45532_
 .subckt nor3_x0 i0=$abc$109383$new_n45532_ i1=$abc$109383$new_n45506_ i2=$abc$109383$new_n43410_ nq=$abc$109383$new_n45533_
 .subckt buf_x4 i=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n45534_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[100][6] i1=soc.ram.ram[101][6] q=$abc$109383$new_n45535_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[96][6] i1=soc.ram.ram[97][6] q=$abc$109383$new_n45536_
-.subckt mx2_x2 cmd=$abc$109383$new_n43513_ i0=$abc$109383$new_n45536_ i1=$abc$109383$new_n45535_ q=$abc$109383$new_n45537_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[100][6] i1=soc.ram.ram[101][6] q=$abc$109383$new_n45535_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[96][6] i1=soc.ram.ram[97][6] q=$abc$109383$new_n45536_
+.subckt mux2_x1 cmd=$abc$109383$new_n43513_ i0=$abc$109383$new_n45536_ i1=$abc$109383$new_n45535_ q=$abc$109383$new_n45537_
 .subckt nor2_x0 i0=$abc$109383$new_n45537_ i1=$abc$109383$new_n44390_ nq=$abc$109383$new_n45538_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[108][6] i1=soc.ram.ram[109][6] q=$abc$109383$new_n45539_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[104][6] i1=soc.ram.ram[105][6] q=$abc$109383$new_n45540_
-.subckt mx2_x2 cmd=$abc$109383$new_n43558_ i0=$abc$109383$new_n45540_ i1=$abc$109383$new_n45539_ q=$abc$109383$new_n45541_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[108][6] i1=soc.ram.ram[109][6] q=$abc$109383$new_n45539_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[104][6] i1=soc.ram.ram[105][6] q=$abc$109383$new_n45540_
+.subckt mux2_x1 cmd=$abc$109383$new_n43558_ i0=$abc$109383$new_n45540_ i1=$abc$109383$new_n45539_ q=$abc$109383$new_n45541_
 .subckt nor2_x0 i0=$abc$109383$new_n45541_ i1=$abc$109383$new_n43712_ nq=$abc$109383$new_n45542_
-.subckt o3_x2 i0=$abc$109383$new_n45542_ i1=$abc$109383$new_n45538_ i2=$abc$109383$new_n43842_ q=$abc$109383$new_n45543_
-.subckt ao22_x2 i0=soc.ram.ram[99][6] i1=$abc$109383$new_n43396_ i2=$abc$109383$new_n43394_ q=$abc$109383$new_n45544_
-.subckt ao22_x2 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[103][6] i2=$abc$109383$new_n45544_ q=$abc$109383$new_n45545_
+.subckt or3_x1 i0=$abc$109383$new_n45542_ i1=$abc$109383$new_n45538_ i2=$abc$109383$new_n43842_ q=$abc$109383$new_n45543_
+.subckt and21nor_x1 i0=soc.ram.ram[99][6] i1=$abc$109383$new_n43396_ i2=$abc$109383$new_n43394_ nq=$abc$109383$new_n45544_
+.subckt and21nor_x1 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[103][6] i2=$abc$109383$new_n45544_ nq=$abc$109383$new_n45545_
 .subckt buf_x4 i=$abc$109383$new_n43379_ q=$abc$109383$new_n45546_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[98][6] i1=soc.ram.ram[102][6] q=$abc$109383$new_n45547_
-.subckt a2_x2 i0=$abc$109383$new_n45547_ i1=$abc$109383$new_n44179_ q=$abc$109383$new_n45548_
-.subckt o3_x2 i0=$abc$109383$new_n45548_ i1=$abc$109383$new_n45545_ i2=$abc$109383$new_n43767_ q=$abc$109383$new_n45549_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[98][6] i1=soc.ram.ram[102][6] q=$abc$109383$new_n45547_
+.subckt and2_x1 i0=$abc$109383$new_n45547_ i1=$abc$109383$new_n44179_ q=$abc$109383$new_n45548_
+.subckt or3_x1 i0=$abc$109383$new_n45548_ i1=$abc$109383$new_n45545_ i2=$abc$109383$new_n43767_ q=$abc$109383$new_n45549_
 .subckt buf_x4 i=$abc$109383$new_n43355_ q=$abc$109383$new_n45550_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[106][6] i1=soc.ram.ram[110][6] q=$abc$109383$new_n45551_
-.subckt a2_x2 i0=$abc$109383$new_n45551_ i1=$abc$109383$new_n45550_ q=$abc$109383$new_n45552_
-.subckt ao22_x2 i0=soc.ram.ram[111][6] i1=$abc$109383$new_n43560_ i2=$abc$109383$new_n43546_ q=$abc$109383$new_n45553_
-.subckt o2_x2 i0=soc.ram.ram[107][6] i1=$abc$109383$new_n43704_ q=$abc$109383$new_n45554_
-.subckt oa22_x2 i0=$abc$109383$new_n45554_ i1=$abc$109383$new_n45553_ i2=$abc$109383$new_n45552_ q=$abc$109383$new_n45555_
-.subckt ao22_x2 i0=$abc$109383$new_n45555_ i1=$abc$109383$new_n43392_ i2=$abc$109383$new_n43650_ q=$abc$109383$new_n45556_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[106][6] i1=soc.ram.ram[110][6] q=$abc$109383$new_n45551_
+.subckt and2_x1 i0=$abc$109383$new_n45551_ i1=$abc$109383$new_n45550_ q=$abc$109383$new_n45552_
+.subckt and21nor_x1 i0=soc.ram.ram[111][6] i1=$abc$109383$new_n43560_ i2=$abc$109383$new_n43546_ nq=$abc$109383$new_n45553_
+.subckt or2_x1 i0=soc.ram.ram[107][6] i1=$abc$109383$new_n43704_ q=$abc$109383$new_n45554_
+.subckt or21nand_x1 i0=$abc$109383$new_n45554_ i1=$abc$109383$new_n45553_ i2=$abc$109383$new_n45552_ nq=$abc$109383$new_n45555_
+.subckt and21nor_x1 i0=$abc$109383$new_n45555_ i1=$abc$109383$new_n43392_ i2=$abc$109383$new_n43650_ nq=$abc$109383$new_n45556_
 .subckt nand2_x0 i0=$abc$109383$new_n45556_ i1=$abc$109383$new_n45549_ nq=$abc$109383$new_n45557_
-.subckt oa22_x2 i0=$abc$109383$new_n45557_ i1=$abc$109383$new_n45543_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n45558_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[122][6] i1=soc.ram.ram[126][6] q=$abc$109383$new_n45559_
-.subckt a2_x2 i0=$abc$109383$new_n45559_ i1=$abc$109383$new_n44562_ q=$abc$109383$new_n45560_
+.subckt or21nand_x1 i0=$abc$109383$new_n45557_ i1=$abc$109383$new_n45543_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n45558_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[122][6] i1=soc.ram.ram[126][6] q=$abc$109383$new_n45559_
+.subckt and2_x1 i0=$abc$109383$new_n45559_ i1=$abc$109383$new_n44562_ q=$abc$109383$new_n45560_
 .subckt inv_x0 i=soc.ram.ram[127][6] nq=$abc$109383$new_n45561_
 .subckt nand2_x0 i0=$abc$109383$new_n45561_ i1=$abc$109383$new_n45222_ nq=$abc$109383$new_n45562_
-.subckt ao22_x2 i0=soc.ram.ram[123][6] i1=$abc$109383$new_n43607_ i2=$abc$109383$new_n45042_ q=$abc$109383$new_n45563_
-.subckt oa22_x2 i0=$abc$109383$new_n45563_ i1=$abc$109383$new_n45562_ i2=$abc$109383$new_n44240_ q=$abc$109383$new_n45564_
-.subckt o2_x2 i0=$abc$109383$new_n45564_ i1=$abc$109383$new_n45560_ q=$abc$109383$new_n45565_
+.subckt and21nor_x1 i0=soc.ram.ram[123][6] i1=$abc$109383$new_n43607_ i2=$abc$109383$new_n45042_ nq=$abc$109383$new_n45563_
+.subckt or21nand_x1 i0=$abc$109383$new_n45563_ i1=$abc$109383$new_n45562_ i2=$abc$109383$new_n44240_ nq=$abc$109383$new_n45564_
+.subckt or2_x1 i0=$abc$109383$new_n45564_ i1=$abc$109383$new_n45560_ q=$abc$109383$new_n45565_
 .subckt buf_x4 i=$abc$109383$new_n43474_ q=$abc$109383$new_n45566_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[114][6] i1=soc.ram.ram[118][6] q=$abc$109383$new_n45567_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[115][6] i1=soc.ram.ram[119][6] q=$abc$109383$new_n45568_
-.subckt mx2_x2 cmd=$abc$109383$new_n43549_ i0=$abc$109383$new_n45568_ i1=$abc$109383$new_n45567_ q=$abc$109383$new_n45569_
-.subckt o2_x2 i0=$abc$109383$new_n45569_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n45570_
-.subckt oa22_x2 i0=$abc$109383$new_n45570_ i1=$abc$109383$new_n45565_ i2=$abc$109383$new_n43911_ q=$abc$109383$new_n45571_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[114][6] i1=soc.ram.ram[118][6] q=$abc$109383$new_n45567_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[115][6] i1=soc.ram.ram[119][6] q=$abc$109383$new_n45568_
+.subckt mux2_x1 cmd=$abc$109383$new_n43549_ i0=$abc$109383$new_n45568_ i1=$abc$109383$new_n45567_ q=$abc$109383$new_n45569_
+.subckt or2_x1 i0=$abc$109383$new_n45569_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n45570_
+.subckt or21nand_x1 i0=$abc$109383$new_n45570_ i1=$abc$109383$new_n45565_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n45571_
 .subckt inv_x0 i=soc.ram.ram[125][6] nq=$abc$109383$new_n45572_
 .subckt nand2_x0 i0=$abc$109383$new_n45572_ i1=$abc$109383$new_n43915_ nq=$abc$109383$new_n45573_
-.subckt ao22_x2 i0=soc.ram.ram[121][6] i1=$abc$109383$new_n45285_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n45574_
+.subckt and21nor_x1 i0=soc.ram.ram[121][6] i1=$abc$109383$new_n45285_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n45574_
 .subckt nand2_x0 i0=$abc$109383$new_n45574_ i1=$abc$109383$new_n45573_ nq=$abc$109383$new_n45575_
-.subckt mx2_x2 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[120][6] i1=soc.ram.ram[124][6] q=$abc$109383$new_n45576_
+.subckt mux2_x1 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[120][6] i1=soc.ram.ram[124][6] q=$abc$109383$new_n45576_
 .subckt nand2_x0 i0=$abc$109383$new_n45576_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n45577_
 .subckt nand3_x0 i0=$abc$109383$new_n45577_ i1=$abc$109383$new_n45575_ i2=$abc$109383$new_n44410_ nq=$abc$109383$new_n45578_
 .subckt buf_x4 i=$abc$109383$new_n44808_ q=$abc$109383$new_n45579_
 .subckt inv_x0 i=soc.ram.ram[117][6] nq=$abc$109383$new_n45580_
 .subckt nand2_x0 i0=$abc$109383$new_n45580_ i1=$abc$109383$new_n45579_ nq=$abc$109383$new_n45581_
-.subckt ao22_x2 i0=soc.ram.ram[113][6] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n45582_
+.subckt and21nor_x1 i0=soc.ram.ram[113][6] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n45582_
 .subckt nand2_x0 i0=$abc$109383$new_n45582_ i1=$abc$109383$new_n45581_ nq=$abc$109383$new_n45583_
-.subckt mx2_x2 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[112][6] i1=soc.ram.ram[116][6] q=$abc$109383$new_n45584_
+.subckt mux2_x1 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[112][6] i1=soc.ram.ram[116][6] q=$abc$109383$new_n45584_
 .subckt nand2_x0 i0=$abc$109383$new_n45584_ i1=$abc$109383$new_n44630_ nq=$abc$109383$new_n45585_
-.subckt a2_x2 i0=$abc$109383$new_n45585_ i1=$abc$109383$new_n44523_ q=$abc$109383$new_n45586_
+.subckt and2_x1 i0=$abc$109383$new_n45585_ i1=$abc$109383$new_n44523_ q=$abc$109383$new_n45586_
 .subckt nand2_x0 i0=$abc$109383$new_n45586_ i1=$abc$109383$new_n45583_ nq=$abc$109383$new_n45587_
-.subckt oa22_x2 i0=$abc$109383$new_n45587_ i1=$abc$109383$new_n45578_ i2=$abc$109383$new_n44213_ q=$abc$109383$new_n45588_
+.subckt or21nand_x1 i0=$abc$109383$new_n45587_ i1=$abc$109383$new_n45578_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n45588_
 .subckt nand3_x0 i0=$abc$109383$new_n45588_ i1=$abc$109383$new_n45571_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n45589_
-.subckt a3_x2 i0=$abc$109383$new_n45589_ i1=$abc$109383$new_n45558_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n45590_
+.subckt and3_x1 i0=$abc$109383$new_n45589_ i1=$abc$109383$new_n45558_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n45590_
 .subckt nor3_x0 i0=$abc$109383$new_n45590_ i1=$abc$109383$new_n45533_ i2=$abc$109383$new_n45475_ nq=$abc$109383$new_n45591_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[18][6] i1=soc.ram.ram[22][6] q=$abc$109383$new_n45592_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[18][6] i1=soc.ram.ram[22][6] q=$abc$109383$new_n45592_
 .subckt nand2_x0 i0=$abc$109383$new_n45592_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n45593_
-.subckt mx2_x2 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[19][6] i1=soc.ram.ram[23][6] q=$abc$109383$new_n45594_
+.subckt mux2_x1 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[19][6] i1=soc.ram.ram[23][6] q=$abc$109383$new_n45594_
 .subckt nand2_x0 i0=$abc$109383$new_n45594_ i1=$abc$109383$new_n44945_ nq=$abc$109383$new_n45595_
 .subckt nand3_x0 i0=$abc$109383$new_n45595_ i1=$abc$109383$new_n45593_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n45596_
-.subckt mx2_x2 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[16][6] i1=soc.ram.ram[20][6] q=$abc$109383$new_n45597_
+.subckt mux2_x1 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[16][6] i1=soc.ram.ram[20][6] q=$abc$109383$new_n45597_
 .subckt nand2_x0 i0=$abc$109383$new_n45597_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n45598_
 .subckt buf_x4 i=$abc$109383$new_n45247_ q=$abc$109383$new_n45599_
-.subckt mx2_x2 cmd=$abc$109383$new_n44808_ i0=soc.ram.ram[17][6] i1=soc.ram.ram[21][6] q=$abc$109383$new_n45600_
+.subckt mux2_x1 cmd=$abc$109383$new_n44808_ i0=soc.ram.ram[17][6] i1=soc.ram.ram[21][6] q=$abc$109383$new_n45600_
 .subckt nand2_x0 i0=$abc$109383$new_n45600_ i1=$abc$109383$new_n45599_ nq=$abc$109383$new_n45601_
 .subckt nand3_x0 i0=$abc$109383$new_n45601_ i1=$abc$109383$new_n45598_ i2=$abc$109383$new_n43990_ nq=$abc$109383$new_n45602_
 .subckt nand3_x0 i0=$abc$109383$new_n45602_ i1=$abc$109383$new_n45596_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n45603_
 .subckt buf_x4 i=$abc$109383$new_n44096_ q=$abc$109383$new_n45604_
-.subckt mx2_x2 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[26][6] i1=soc.ram.ram[30][6] q=$abc$109383$new_n45605_
+.subckt mux2_x1 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[26][6] i1=soc.ram.ram[30][6] q=$abc$109383$new_n45605_
 .subckt nand2_x0 i0=$abc$109383$new_n45605_ i1=$abc$109383$new_n44204_ nq=$abc$109383$new_n45606_
-.subckt o2_x2 i0=soc.ram.ram[27][6] i1=$abc$109383$new_n43925_ q=$abc$109383$new_n45607_
+.subckt or2_x1 i0=soc.ram.ram[27][6] i1=$abc$109383$new_n43925_ q=$abc$109383$new_n45607_
 .subckt nand2_x0 i0=$abc$109383$new_n45607_ i1=$abc$109383$new_n44688_ nq=$abc$109383$new_n45608_
 .subckt buf_x4 i=$abc$109383$new_n43670_ q=$abc$109383$new_n45609_
 .subckt inv_x0 i=soc.ram.ram[31][6] nq=$abc$109383$new_n45610_
-.subckt a2_x2 i0=$abc$109383$new_n45610_ i1=$abc$109383$new_n45609_ q=$abc$109383$new_n45611_
-.subckt ao22_x2 i0=$abc$109383$new_n45611_ i1=$abc$109383$new_n45608_ i2=$abc$109383$new_n45606_ q=$abc$109383$new_n45612_
+.subckt and2_x1 i0=$abc$109383$new_n45610_ i1=$abc$109383$new_n45609_ q=$abc$109383$new_n45611_
+.subckt and21nor_x1 i0=$abc$109383$new_n45611_ i1=$abc$109383$new_n45608_ i2=$abc$109383$new_n45606_ nq=$abc$109383$new_n45612_
 .subckt nand2_x0 i0=$abc$109383$new_n45612_ i1=$abc$109383$new_n45604_ nq=$abc$109383$new_n45613_
 .subckt buf_x4 i=$abc$109383$new_n43330_ q=$abc$109383$new_n45614_
-.subckt mx2_x2 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[24][6] i1=soc.ram.ram[28][6] q=$abc$109383$new_n45615_
+.subckt mux2_x1 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[24][6] i1=soc.ram.ram[28][6] q=$abc$109383$new_n45615_
 .subckt nand2_x0 i0=$abc$109383$new_n45615_ i1=$abc$109383$new_n43942_ nq=$abc$109383$new_n45616_
 .subckt inv_x0 i=soc.ram.ram[29][6] nq=$abc$109383$new_n45617_
 .subckt nand2_x0 i0=$abc$109383$new_n45617_ i1=$abc$109383$new_n43851_ nq=$abc$109383$new_n45618_
-.subckt ao22_x2 i0=soc.ram.ram[25][6] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n45619_
+.subckt and21nor_x1 i0=soc.ram.ram[25][6] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n45619_
 .subckt nand2_x0 i0=$abc$109383$new_n45619_ i1=$abc$109383$new_n45618_ nq=$abc$109383$new_n45620_
 .subckt nand3_x0 i0=$abc$109383$new_n45620_ i1=$abc$109383$new_n45616_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n45621_
 .subckt nand3_x0 i0=$abc$109383$new_n45621_ i1=$abc$109383$new_n45613_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n45622_
-.subckt oa22_x2 i0=$abc$109383$new_n45622_ i1=$abc$109383$new_n45603_ i2=$abc$109383$new_n43326_ q=$abc$109383$new_n45623_
-.subckt mx2_x2 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[10][6] i1=soc.ram.ram[14][6] q=$abc$109383$new_n45624_
+.subckt or21nand_x1 i0=$abc$109383$new_n45622_ i1=$abc$109383$new_n45603_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n45623_
+.subckt mux2_x1 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[10][6] i1=soc.ram.ram[14][6] q=$abc$109383$new_n45624_
 .subckt nand2_x0 i0=$abc$109383$new_n45624_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n45625_
-.subckt mx2_x2 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[11][6] i1=soc.ram.ram[15][6] q=$abc$109383$new_n45626_
+.subckt mux2_x1 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[11][6] i1=soc.ram.ram[15][6] q=$abc$109383$new_n45626_
 .subckt nand2_x0 i0=$abc$109383$new_n45626_ i1=$abc$109383$new_n45599_ nq=$abc$109383$new_n45627_
 .subckt nand3_x0 i0=$abc$109383$new_n45627_ i1=$abc$109383$new_n45625_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n45628_
 .subckt buf_x4 i=$abc$109383$new_n43375_ q=$abc$109383$new_n45629_
 .subckt buf_x4 i=$abc$109383$new_n43435_ q=$abc$109383$new_n45630_
-.subckt mx2_x2 cmd=$abc$109383$new_n44808_ i0=soc.ram.ram[8][6] i1=soc.ram.ram[12][6] q=$abc$109383$new_n45631_
+.subckt mux2_x1 cmd=$abc$109383$new_n44808_ i0=soc.ram.ram[8][6] i1=soc.ram.ram[12][6] q=$abc$109383$new_n45631_
 .subckt nand2_x0 i0=$abc$109383$new_n45631_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n45632_
-.subckt mx2_x2 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[9][6] i1=soc.ram.ram[13][6] q=$abc$109383$new_n45633_
+.subckt mux2_x1 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[9][6] i1=soc.ram.ram[13][6] q=$abc$109383$new_n45633_
 .subckt nand2_x0 i0=$abc$109383$new_n45633_ i1=$abc$109383$new_n43992_ nq=$abc$109383$new_n45634_
 .subckt nand3_x0 i0=$abc$109383$new_n45634_ i1=$abc$109383$new_n45632_ i2=$abc$109383$new_n45629_ nq=$abc$109383$new_n45635_
 .subckt nand3_x0 i0=$abc$109383$new_n45635_ i1=$abc$109383$new_n45628_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n45636_
 .subckt inv_x0 i=soc.ram.ram[5][6] nq=$abc$109383$new_n45637_
 .subckt nand2_x0 i0=$abc$109383$new_n45637_ i1=$abc$109383$new_n43915_ nq=$abc$109383$new_n45638_
-.subckt ao22_x2 i0=soc.ram.ram[1][6] i1=$abc$109383$new_n44316_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n45639_
+.subckt and21nor_x1 i0=soc.ram.ram[1][6] i1=$abc$109383$new_n44316_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n45639_
 .subckt nand2_x0 i0=$abc$109383$new_n45639_ i1=$abc$109383$new_n45638_ nq=$abc$109383$new_n45640_
-.subckt mx2_x2 cmd=$abc$109383$new_n43906_ i0=soc.ram.ram[0][6] i1=soc.ram.ram[4][6] q=$abc$109383$new_n45641_
+.subckt mux2_x1 cmd=$abc$109383$new_n43906_ i0=soc.ram.ram[0][6] i1=soc.ram.ram[4][6] q=$abc$109383$new_n45641_
 .subckt nand2_x0 i0=$abc$109383$new_n45641_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n45642_
 .subckt nand3_x0 i0=$abc$109383$new_n45642_ i1=$abc$109383$new_n45640_ i2=$abc$109383$new_n45015_ nq=$abc$109383$new_n45643_
 .subckt inv_x0 i=soc.ram.ram[7][6] nq=$abc$109383$new_n45644_
 .subckt nand2_x0 i0=$abc$109383$new_n45644_ i1=$abc$109383$new_n45478_ nq=$abc$109383$new_n45645_
-.subckt ao22_x2 i0=soc.ram.ram[3][6] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n45646_
+.subckt and21nor_x1 i0=soc.ram.ram[3][6] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n45646_
 .subckt nand2_x0 i0=$abc$109383$new_n45646_ i1=$abc$109383$new_n45645_ nq=$abc$109383$new_n45647_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[2][6] i1=soc.ram.ram[6][6] q=$abc$109383$new_n45648_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[2][6] i1=soc.ram.ram[6][6] q=$abc$109383$new_n45648_
 .subckt nand2_x0 i0=$abc$109383$new_n45648_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n45649_
 .subckt nand3_x0 i0=$abc$109383$new_n45649_ i1=$abc$109383$new_n45647_ i2=$abc$109383$new_n43809_ nq=$abc$109383$new_n45650_
 .subckt nand3_x0 i0=$abc$109383$new_n45650_ i1=$abc$109383$new_n45643_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n45651_
-.subckt oa22_x2 i0=$abc$109383$new_n45651_ i1=$abc$109383$new_n45636_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n45652_
+.subckt or21nand_x1 i0=$abc$109383$new_n45651_ i1=$abc$109383$new_n45636_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n45652_
 .subckt nand3_x0 i0=$abc$109383$new_n45652_ i1=$abc$109383$new_n45623_ i2=$abc$109383$new_n44444_ nq=$abc$109383$new_n45653_
-.subckt mx2_x2 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[42][6] i1=soc.ram.ram[46][6] q=$abc$109383$new_n45654_
+.subckt mux2_x1 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[42][6] i1=soc.ram.ram[46][6] q=$abc$109383$new_n45654_
 .subckt nand2_x0 i0=$abc$109383$new_n45654_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n45655_
-.subckt mx2_x2 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[43][6] i1=soc.ram.ram[47][6] q=$abc$109383$new_n45656_
+.subckt mux2_x1 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[43][6] i1=soc.ram.ram[47][6] q=$abc$109383$new_n45656_
 .subckt nand2_x0 i0=$abc$109383$new_n45656_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n45657_
 .subckt nand3_x0 i0=$abc$109383$new_n45657_ i1=$abc$109383$new_n45655_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n45658_
 .subckt buf_x4 i=$abc$109383$new_n44562_ q=$abc$109383$new_n45659_
-.subckt mx2_x2 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[40][6] i1=soc.ram.ram[44][6] q=$abc$109383$new_n45660_
+.subckt mux2_x1 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[40][6] i1=soc.ram.ram[44][6] q=$abc$109383$new_n45660_
 .subckt nand2_x0 i0=$abc$109383$new_n45660_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n45661_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[41][6] i1=soc.ram.ram[45][6] q=$abc$109383$new_n45662_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[41][6] i1=soc.ram.ram[45][6] q=$abc$109383$new_n45662_
 .subckt nand2_x0 i0=$abc$109383$new_n45662_ i1=$abc$109383$new_n44945_ nq=$abc$109383$new_n45663_
 .subckt nand3_x0 i0=$abc$109383$new_n45663_ i1=$abc$109383$new_n45661_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n45664_
 .subckt nand3_x0 i0=$abc$109383$new_n45664_ i1=$abc$109383$new_n45658_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n45665_
 .subckt inv_x0 i=soc.ram.ram[37][6] nq=$abc$109383$new_n45666_
 .subckt nand2_x0 i0=$abc$109383$new_n45666_ i1=$abc$109383$new_n44017_ nq=$abc$109383$new_n45667_
 .subckt buf_x4 i=$abc$109383$new_n43660_ q=$abc$109383$new_n45668_
-.subckt ao22_x2 i0=soc.ram.ram[33][6] i1=$abc$109383$new_n45668_ i2=$abc$109383$new_n43791_ q=$abc$109383$new_n45669_
+.subckt and21nor_x1 i0=soc.ram.ram[33][6] i1=$abc$109383$new_n45668_ i2=$abc$109383$new_n43791_ nq=$abc$109383$new_n45669_
 .subckt nand2_x0 i0=$abc$109383$new_n45669_ i1=$abc$109383$new_n45667_ nq=$abc$109383$new_n45670_
-.subckt mx2_x2 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[32][6] i1=soc.ram.ram[36][6] q=$abc$109383$new_n45671_
+.subckt mux2_x1 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[32][6] i1=soc.ram.ram[36][6] q=$abc$109383$new_n45671_
 .subckt nand2_x0 i0=$abc$109383$new_n45671_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n45672_
 .subckt nand3_x0 i0=$abc$109383$new_n45672_ i1=$abc$109383$new_n45670_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n45673_
 .subckt buf_x4 i=$abc$109383$new_n44751_ q=$abc$109383$new_n45674_
 .subckt inv_x0 i=soc.ram.ram[39][6] nq=$abc$109383$new_n45675_
 .subckt nand2_x0 i0=$abc$109383$new_n45675_ i1=$abc$109383$new_n45674_ nq=$abc$109383$new_n45676_
-.subckt ao22_x2 i0=soc.ram.ram[35][6] i1=$abc$109383$new_n44026_ i2=$abc$109383$new_n44143_ q=$abc$109383$new_n45677_
+.subckt and21nor_x1 i0=soc.ram.ram[35][6] i1=$abc$109383$new_n44026_ i2=$abc$109383$new_n44143_ nq=$abc$109383$new_n45677_
 .subckt nand2_x0 i0=$abc$109383$new_n45677_ i1=$abc$109383$new_n45676_ nq=$abc$109383$new_n45678_
-.subckt mx2_x2 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[34][6] i1=soc.ram.ram[38][6] q=$abc$109383$new_n45679_
+.subckt mux2_x1 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[34][6] i1=soc.ram.ram[38][6] q=$abc$109383$new_n45679_
 .subckt nand2_x0 i0=$abc$109383$new_n45679_ i1=$abc$109383$new_n44830_ nq=$abc$109383$new_n45680_
 .subckt nand3_x0 i0=$abc$109383$new_n45680_ i1=$abc$109383$new_n45678_ i2=$abc$109383$new_n45604_ nq=$abc$109383$new_n45681_
 .subckt nand3_x0 i0=$abc$109383$new_n45681_ i1=$abc$109383$new_n45673_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n45682_
-.subckt oa22_x2 i0=$abc$109383$new_n45682_ i1=$abc$109383$new_n45665_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n45683_
-.subckt mx2_x2 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[50][6] i1=soc.ram.ram[54][6] q=$abc$109383$new_n45684_
+.subckt or21nand_x1 i0=$abc$109383$new_n45682_ i1=$abc$109383$new_n45665_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n45683_
+.subckt mux2_x1 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[50][6] i1=soc.ram.ram[54][6] q=$abc$109383$new_n45684_
 .subckt nand2_x0 i0=$abc$109383$new_n45684_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n45685_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[51][6] i1=soc.ram.ram[55][6] q=$abc$109383$new_n45686_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[51][6] i1=soc.ram.ram[55][6] q=$abc$109383$new_n45686_
 .subckt nand2_x0 i0=$abc$109383$new_n45686_ i1=$abc$109383$new_n44945_ nq=$abc$109383$new_n45687_
 .subckt nand3_x0 i0=$abc$109383$new_n45687_ i1=$abc$109383$new_n45685_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n45688_
-.subckt mx2_x2 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[48][6] i1=soc.ram.ram[52][6] q=$abc$109383$new_n45689_
+.subckt mux2_x1 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[48][6] i1=soc.ram.ram[52][6] q=$abc$109383$new_n45689_
 .subckt nand2_x0 i0=$abc$109383$new_n45689_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n45690_
 .subckt buf_x4 i=$abc$109383$new_n43976_ q=$abc$109383$new_n45691_
-.subckt mx2_x2 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[49][6] i1=soc.ram.ram[53][6] q=$abc$109383$new_n45692_
+.subckt mux2_x1 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[49][6] i1=soc.ram.ram[53][6] q=$abc$109383$new_n45692_
 .subckt nand2_x0 i0=$abc$109383$new_n45692_ i1=$abc$109383$new_n43998_ nq=$abc$109383$new_n45693_
 .subckt nand3_x0 i0=$abc$109383$new_n45693_ i1=$abc$109383$new_n45690_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n45694_
 .subckt nand3_x0 i0=$abc$109383$new_n45694_ i1=$abc$109383$new_n45688_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n45695_
-.subckt mx2_x2 cmd=$abc$109383$new_n44338_ i0=soc.ram.ram[58][6] i1=soc.ram.ram[62][6] q=$abc$109383$new_n45696_
+.subckt mux2_x1 cmd=$abc$109383$new_n44338_ i0=soc.ram.ram[58][6] i1=soc.ram.ram[62][6] q=$abc$109383$new_n45696_
 .subckt nand2_x0 i0=$abc$109383$new_n45696_ i1=$abc$109383$new_n44485_ nq=$abc$109383$new_n45697_
-.subckt o2_x2 i0=soc.ram.ram[59][6] i1=$abc$109383$new_n44187_ q=$abc$109383$new_n45698_
+.subckt or2_x1 i0=soc.ram.ram[59][6] i1=$abc$109383$new_n44187_ q=$abc$109383$new_n45698_
 .subckt nand2_x0 i0=$abc$109383$new_n45698_ i1=$abc$109383$new_n44143_ nq=$abc$109383$new_n45699_
 .subckt inv_x0 i=soc.ram.ram[63][6] nq=$abc$109383$new_n45700_
-.subckt a2_x2 i0=$abc$109383$new_n45700_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n45701_
-.subckt ao22_x2 i0=$abc$109383$new_n45701_ i1=$abc$109383$new_n45699_ i2=$abc$109383$new_n45697_ q=$abc$109383$new_n45702_
+.subckt and2_x1 i0=$abc$109383$new_n45700_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n45701_
+.subckt and21nor_x1 i0=$abc$109383$new_n45701_ i1=$abc$109383$new_n45699_ i2=$abc$109383$new_n45697_ nq=$abc$109383$new_n45702_
 .subckt nand2_x0 i0=$abc$109383$new_n45702_ i1=$abc$109383$new_n45604_ nq=$abc$109383$new_n45703_
-.subckt mx2_x2 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[56][6] i1=soc.ram.ram[60][6] q=$abc$109383$new_n45704_
+.subckt mux2_x1 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[56][6] i1=soc.ram.ram[60][6] q=$abc$109383$new_n45704_
 .subckt nand2_x0 i0=$abc$109383$new_n45704_ i1=$abc$109383$new_n44830_ nq=$abc$109383$new_n45705_
 .subckt inv_x0 i=soc.ram.ram[61][6] nq=$abc$109383$new_n45706_
 .subckt nand2_x0 i0=$abc$109383$new_n45706_ i1=$abc$109383$new_n44809_ nq=$abc$109383$new_n45707_
-.subckt ao22_x2 i0=soc.ram.ram[57][6] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n45247_ q=$abc$109383$new_n45708_
+.subckt and21nor_x1 i0=soc.ram.ram[57][6] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n45247_ nq=$abc$109383$new_n45708_
 .subckt nand2_x0 i0=$abc$109383$new_n45708_ i1=$abc$109383$new_n45707_ nq=$abc$109383$new_n45709_
 .subckt nand3_x0 i0=$abc$109383$new_n45709_ i1=$abc$109383$new_n45705_ i2=$abc$109383$new_n45015_ nq=$abc$109383$new_n45710_
 .subckt nand3_x0 i0=$abc$109383$new_n45710_ i1=$abc$109383$new_n45703_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n45711_
-.subckt oa22_x2 i0=$abc$109383$new_n45711_ i1=$abc$109383$new_n45695_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n45712_
+.subckt or21nand_x1 i0=$abc$109383$new_n45711_ i1=$abc$109383$new_n45695_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n45712_
 .subckt nand3_x0 i0=$abc$109383$new_n45712_ i1=$abc$109383$new_n45683_ i2=$abc$109383$new_n43410_ nq=$abc$109383$new_n45713_
-.subckt a3_x2 i0=$abc$109383$new_n45713_ i1=$abc$109383$new_n45653_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n45714_
-.subckt ao22_x2 i0=$abc$109383$new_n45714_ i1=$abc$109383$new_n45591_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n45715_
+.subckt and3_x1 i0=$abc$109383$new_n45713_ i1=$abc$109383$new_n45653_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n45714_
+.subckt and21nor_x1 i0=$abc$109383$new_n45714_ i1=$abc$109383$new_n45591_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n45715_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[6] nq=$abc$109383$new_n45716_
 .subckt inv_x0 i=soc.hyperram.sr[6] nq=$abc$109383$new_n45717_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n45717_ q=$abc$109383$new_n45718_
-.subckt a2_x2 i0=$abc$109383$new_n45718_ i1=$abc$109383$new_n45716_ q=$abc$109383$new_n45719_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n45717_ q=$abc$109383$new_n45718_
+.subckt and2_x1 i0=$abc$109383$new_n45718_ i1=$abc$109383$new_n45716_ q=$abc$109383$new_n45719_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[6] nq=$abc$109383$new_n45720_
-.subckt o2_x2 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n45720_ q=$abc$109383$new_n45721_
-.subckt o4_x2 i0=$abc$109383$new_n45721_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43312_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n45722_
+.subckt or2_x1 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n45720_ q=$abc$109383$new_n45721_
+.subckt or4_x1 i0=$abc$109383$new_n45721_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43312_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n45722_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n44265_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[6] nq=$abc$109383$new_n45723_
 .subckt nand3_x0 i0=$abc$109383$new_n45723_ i1=$abc$109383$new_n45722_ i2=$abc$109383$new_n45719_ nq=$abc$109383$new_n45724_
-.subckt o3_x2 i0=$abc$109383$new_n45724_ i1=$abc$109383$new_n45715_ i2=$abc$109383$new_n45474_ q=$abc$109383$new_n45725_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n45725_ i2=$abc$109383$new_n45470_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103222
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[7] q=$abc$109383$new_n45727_
-.subckt a2_x2 i0=$abc$109383$new_n45727_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n45728_
-.subckt a3_x2 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n45729_
-.subckt a3_x2 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n45730_
-.subckt ao22_x2 i0=$abc$109383$new_n45730_ i1=$abc$109383$new_n45729_ i2=$abc$109383$new_n27594_ q=$abc$109383$new_n45731_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[18][7] i1=soc.ram.ram[22][7] q=$abc$109383$new_n45732_
+.subckt or3_x1 i0=$abc$109383$new_n45724_ i1=$abc$109383$new_n45715_ i2=$abc$109383$new_n45474_ q=$abc$109383$new_n45725_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n45725_ i2=$abc$109383$new_n45470_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103222
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[7] nq=$abc$109383$new_n45727_
+.subckt and2_x1 i0=$abc$109383$new_n45727_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n45728_
+.subckt and3_x1 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n45729_
+.subckt and3_x1 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n45730_
+.subckt and21nor_x1 i0=$abc$109383$new_n45730_ i1=$abc$109383$new_n45729_ i2=$abc$109383$new_n27594_ nq=$abc$109383$new_n45731_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[18][7] i1=soc.ram.ram[22][7] q=$abc$109383$new_n45732_
 .subckt nand2_x0 i0=$abc$109383$new_n45732_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n45733_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[19][7] i1=soc.ram.ram[23][7] q=$abc$109383$new_n45734_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[19][7] i1=soc.ram.ram[23][7] q=$abc$109383$new_n45734_
 .subckt nand2_x0 i0=$abc$109383$new_n45734_ i1=$abc$109383$new_n45405_ nq=$abc$109383$new_n45735_
 .subckt nand3_x0 i0=$abc$109383$new_n45735_ i1=$abc$109383$new_n45733_ i2=$abc$109383$new_n44622_ nq=$abc$109383$new_n45736_
-.subckt mx2_x2 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[16][7] i1=soc.ram.ram[20][7] q=$abc$109383$new_n45737_
+.subckt mux2_x1 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[16][7] i1=soc.ram.ram[20][7] q=$abc$109383$new_n45737_
 .subckt nand2_x0 i0=$abc$109383$new_n45737_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n45738_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[17][7] i1=soc.ram.ram[21][7] q=$abc$109383$new_n45739_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[17][7] i1=soc.ram.ram[21][7] q=$abc$109383$new_n45739_
 .subckt nand2_x0 i0=$abc$109383$new_n45739_ i1=$abc$109383$new_n43998_ nq=$abc$109383$new_n45740_
 .subckt nand3_x0 i0=$abc$109383$new_n45740_ i1=$abc$109383$new_n45738_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n45741_
 .subckt nand3_x0 i0=$abc$109383$new_n45741_ i1=$abc$109383$new_n45736_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n45742_
-.subckt mx2_x2 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[26][7] i1=soc.ram.ram[30][7] q=$abc$109383$new_n45743_
+.subckt mux2_x1 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[26][7] i1=soc.ram.ram[30][7] q=$abc$109383$new_n45743_
 .subckt nand2_x0 i0=$abc$109383$new_n45743_ i1=$abc$109383$new_n43489_ nq=$abc$109383$new_n45744_
-.subckt o2_x2 i0=soc.ram.ram[27][7] i1=$abc$109383$new_n44010_ q=$abc$109383$new_n45745_
+.subckt or2_x1 i0=soc.ram.ram[27][7] i1=$abc$109383$new_n44010_ q=$abc$109383$new_n45745_
 .subckt nand2_x0 i0=$abc$109383$new_n45745_ i1=$abc$109383$new_n45073_ nq=$abc$109383$new_n45746_
 .subckt inv_x0 i=soc.ram.ram[31][7] nq=$abc$109383$new_n45747_
-.subckt a2_x2 i0=$abc$109383$new_n45747_ i1=$abc$109383$new_n44215_ q=$abc$109383$new_n45748_
-.subckt ao22_x2 i0=$abc$109383$new_n45748_ i1=$abc$109383$new_n45746_ i2=$abc$109383$new_n45744_ q=$abc$109383$new_n45749_
+.subckt and2_x1 i0=$abc$109383$new_n45747_ i1=$abc$109383$new_n44215_ q=$abc$109383$new_n45748_
+.subckt and21nor_x1 i0=$abc$109383$new_n45748_ i1=$abc$109383$new_n45746_ i2=$abc$109383$new_n45744_ nq=$abc$109383$new_n45749_
 .subckt nand2_x0 i0=$abc$109383$new_n45749_ i1=$abc$109383$new_n44213_ nq=$abc$109383$new_n45750_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[24][7] i1=soc.ram.ram[28][7] q=$abc$109383$new_n45751_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[24][7] i1=soc.ram.ram[28][7] q=$abc$109383$new_n45751_
 .subckt nand2_x0 i0=$abc$109383$new_n45751_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n45752_
 .subckt inv_x0 i=soc.ram.ram[29][7] nq=$abc$109383$new_n45753_
 .subckt nand2_x0 i0=$abc$109383$new_n45753_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n45754_
 .subckt buf_x4 i=$abc$109383$new_n44563_ q=$abc$109383$new_n45755_
-.subckt ao22_x2 i0=soc.ram.ram[25][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n45756_
+.subckt and21nor_x1 i0=soc.ram.ram[25][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n45756_
 .subckt nand2_x0 i0=$abc$109383$new_n45756_ i1=$abc$109383$new_n45754_ nq=$abc$109383$new_n45757_
 .subckt nand3_x0 i0=$abc$109383$new_n45757_ i1=$abc$109383$new_n45752_ i2=$abc$109383$new_n45629_ nq=$abc$109383$new_n45758_
 .subckt nand3_x0 i0=$abc$109383$new_n45758_ i1=$abc$109383$new_n45750_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n45759_
-.subckt oa22_x2 i0=$abc$109383$new_n45759_ i1=$abc$109383$new_n45742_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n45760_
+.subckt or21nand_x1 i0=$abc$109383$new_n45759_ i1=$abc$109383$new_n45742_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n45760_
 .subckt buf_x4 i=$abc$109383$new_n43467_ q=$abc$109383$new_n45761_
-.subckt mx2_x2 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[10][7] i1=soc.ram.ram[14][7] q=$abc$109383$new_n45762_
+.subckt mux2_x1 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[10][7] i1=soc.ram.ram[14][7] q=$abc$109383$new_n45762_
 .subckt nand2_x0 i0=$abc$109383$new_n45762_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n45763_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[11][7] i1=soc.ram.ram[15][7] q=$abc$109383$new_n45764_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[11][7] i1=soc.ram.ram[15][7] q=$abc$109383$new_n45764_
 .subckt nand2_x0 i0=$abc$109383$new_n45764_ i1=$abc$109383$new_n43998_ nq=$abc$109383$new_n45765_
 .subckt nand3_x0 i0=$abc$109383$new_n45765_ i1=$abc$109383$new_n45763_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n45766_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[8][7] i1=soc.ram.ram[12][7] q=$abc$109383$new_n45767_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[8][7] i1=soc.ram.ram[12][7] q=$abc$109383$new_n45767_
 .subckt nand2_x0 i0=$abc$109383$new_n45767_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n45768_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[9][7] i1=soc.ram.ram[13][7] q=$abc$109383$new_n45769_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[9][7] i1=soc.ram.ram[13][7] q=$abc$109383$new_n45769_
 .subckt nand2_x0 i0=$abc$109383$new_n45769_ i1=$abc$109383$new_n45599_ nq=$abc$109383$new_n45770_
 .subckt nand3_x0 i0=$abc$109383$new_n45770_ i1=$abc$109383$new_n45768_ i2=$abc$109383$new_n43990_ nq=$abc$109383$new_n45771_
 .subckt nand3_x0 i0=$abc$109383$new_n45771_ i1=$abc$109383$new_n45766_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n45772_
 .subckt inv_x0 i=soc.ram.ram[5][7] nq=$abc$109383$new_n45773_
 .subckt nand2_x0 i0=$abc$109383$new_n45773_ i1=$abc$109383$new_n43978_ nq=$abc$109383$new_n45774_
-.subckt ao22_x2 i0=soc.ram.ram[1][7] i1=$abc$109383$new_n44633_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n45775_
+.subckt and21nor_x1 i0=soc.ram.ram[1][7] i1=$abc$109383$new_n44633_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n45775_
 .subckt nand2_x0 i0=$abc$109383$new_n45775_ i1=$abc$109383$new_n45774_ nq=$abc$109383$new_n45776_
-.subckt mx2_x2 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[0][7] i1=soc.ram.ram[4][7] q=$abc$109383$new_n45777_
+.subckt mux2_x1 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[0][7] i1=soc.ram.ram[4][7] q=$abc$109383$new_n45777_
 .subckt nand2_x0 i0=$abc$109383$new_n45777_ i1=$abc$109383$new_n43942_ nq=$abc$109383$new_n45778_
 .subckt nand3_x0 i0=$abc$109383$new_n45778_ i1=$abc$109383$new_n45776_ i2=$abc$109383$new_n45629_ nq=$abc$109383$new_n45779_
 .subckt inv_x0 i=soc.ram.ram[7][7] nq=$abc$109383$new_n45780_
 .subckt nand2_x0 i0=$abc$109383$new_n45780_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n45781_
-.subckt ao22_x2 i0=soc.ram.ram[3][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n45782_
+.subckt and21nor_x1 i0=soc.ram.ram[3][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n45782_
 .subckt nand2_x0 i0=$abc$109383$new_n45782_ i1=$abc$109383$new_n45781_ nq=$abc$109383$new_n45783_
-.subckt mx2_x2 cmd=$abc$109383$new_n43906_ i0=soc.ram.ram[2][7] i1=soc.ram.ram[6][7] q=$abc$109383$new_n45784_
+.subckt mux2_x1 cmd=$abc$109383$new_n43906_ i0=soc.ram.ram[2][7] i1=soc.ram.ram[6][7] q=$abc$109383$new_n45784_
 .subckt nand2_x0 i0=$abc$109383$new_n45784_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n45785_
 .subckt nand3_x0 i0=$abc$109383$new_n45785_ i1=$abc$109383$new_n45783_ i2=$abc$109383$new_n44789_ nq=$abc$109383$new_n45786_
 .subckt nand3_x0 i0=$abc$109383$new_n45786_ i1=$abc$109383$new_n45779_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n45787_
-.subckt oa22_x2 i0=$abc$109383$new_n45787_ i1=$abc$109383$new_n45772_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n45788_
+.subckt or21nand_x1 i0=$abc$109383$new_n45787_ i1=$abc$109383$new_n45772_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n45788_
 .subckt nand3_x0 i0=$abc$109383$new_n45788_ i1=$abc$109383$new_n45760_ i2=$abc$109383$new_n43590_ nq=$abc$109383$new_n45789_
-.subckt mx2_x2 cmd=$abc$109383$new_n44186_ i0=soc.ram.ram[74][7] i1=soc.ram.ram[78][7] q=$abc$109383$new_n45790_
+.subckt mux2_x1 cmd=$abc$109383$new_n44186_ i0=soc.ram.ram[74][7] i1=soc.ram.ram[78][7] q=$abc$109383$new_n45790_
 .subckt nand2_x0 i0=$abc$109383$new_n45790_ i1=$abc$109383$new_n43731_ nq=$abc$109383$new_n45791_
 .subckt inv_x0 i=soc.ram.ram[79][7] nq=$abc$109383$new_n45792_
-.subckt a2_x2 i0=$abc$109383$new_n45792_ i1=$abc$109383$new_n43347_ q=$abc$109383$new_n45793_
-.subckt o2_x2 i0=soc.ram.ram[75][7] i1=$abc$109383$new_n43636_ q=$abc$109383$new_n45794_
+.subckt and2_x1 i0=$abc$109383$new_n45792_ i1=$abc$109383$new_n43347_ q=$abc$109383$new_n45793_
+.subckt or2_x1 i0=soc.ram.ram[75][7] i1=$abc$109383$new_n43636_ q=$abc$109383$new_n45794_
 .subckt nand2_x0 i0=$abc$109383$new_n45794_ i1=$abc$109383$new_n44504_ nq=$abc$109383$new_n45795_
-.subckt ao22_x2 i0=$abc$109383$new_n45795_ i1=$abc$109383$new_n45793_ i2=$abc$109383$new_n45791_ q=$abc$109383$new_n45796_
+.subckt and21nor_x1 i0=$abc$109383$new_n45795_ i1=$abc$109383$new_n45793_ i2=$abc$109383$new_n45791_ nq=$abc$109383$new_n45796_
 .subckt nand2_x0 i0=$abc$109383$new_n45796_ i1=$abc$109383$new_n44149_ nq=$abc$109383$new_n45797_
-.subckt mx2_x2 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[66][7] i1=soc.ram.ram[70][7] q=$abc$109383$new_n45798_
-.subckt a2_x2 i0=$abc$109383$new_n45798_ i1=$abc$109383$new_n43334_ q=$abc$109383$new_n45799_
-.subckt ao22_x2 i0=soc.ram.ram[67][7] i1=$abc$109383$new_n43817_ i2=$abc$109383$new_n43556_ q=$abc$109383$new_n45800_
-.subckt ao22_x2 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[71][7] i2=$abc$109383$new_n45800_ q=$abc$109383$new_n45801_
-.subckt o3_x2 i0=$abc$109383$new_n45801_ i1=$abc$109383$new_n45799_ i2=$abc$109383$new_n43648_ q=$abc$109383$new_n45802_
-.subckt oa22_x2 i0=$abc$109383$new_n45802_ i1=$abc$109383$new_n45797_ i2=$abc$109383$new_n44155_ q=$abc$109383$new_n45803_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[64][7] i1=soc.ram.ram[68][7] q=$abc$109383$new_n45804_
-.subckt a2_x2 i0=$abc$109383$new_n45804_ i1=$abc$109383$new_n43594_ q=$abc$109383$new_n45805_
-.subckt ao22_x2 i0=soc.ram.ram[65][7] i1=$abc$109383$new_n43418_ i2=$abc$109383$new_n43651_ q=$abc$109383$new_n45806_
-.subckt ao22_x2 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[69][7] i2=$abc$109383$new_n45806_ q=$abc$109383$new_n45807_
-.subckt o3_x2 i0=$abc$109383$new_n45807_ i1=$abc$109383$new_n45805_ i2=$abc$109383$new_n43896_ q=$abc$109383$new_n45808_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[72][7] i1=soc.ram.ram[76][7] q=$abc$109383$new_n45809_
+.subckt mux2_x1 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[66][7] i1=soc.ram.ram[70][7] q=$abc$109383$new_n45798_
+.subckt and2_x1 i0=$abc$109383$new_n45798_ i1=$abc$109383$new_n43334_ q=$abc$109383$new_n45799_
+.subckt and21nor_x1 i0=soc.ram.ram[67][7] i1=$abc$109383$new_n43817_ i2=$abc$109383$new_n43556_ nq=$abc$109383$new_n45800_
+.subckt and21nor_x1 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[71][7] i2=$abc$109383$new_n45800_ nq=$abc$109383$new_n45801_
+.subckt or3_x1 i0=$abc$109383$new_n45801_ i1=$abc$109383$new_n45799_ i2=$abc$109383$new_n43648_ q=$abc$109383$new_n45802_
+.subckt or21nand_x1 i0=$abc$109383$new_n45802_ i1=$abc$109383$new_n45797_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n45803_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[64][7] i1=soc.ram.ram[68][7] q=$abc$109383$new_n45804_
+.subckt and2_x1 i0=$abc$109383$new_n45804_ i1=$abc$109383$new_n43594_ q=$abc$109383$new_n45805_
+.subckt and21nor_x1 i0=soc.ram.ram[65][7] i1=$abc$109383$new_n43418_ i2=$abc$109383$new_n43651_ nq=$abc$109383$new_n45806_
+.subckt and21nor_x1 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[69][7] i2=$abc$109383$new_n45806_ nq=$abc$109383$new_n45807_
+.subckt or3_x1 i0=$abc$109383$new_n45807_ i1=$abc$109383$new_n45805_ i2=$abc$109383$new_n43896_ q=$abc$109383$new_n45808_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[72][7] i1=soc.ram.ram[76][7] q=$abc$109383$new_n45809_
 .subckt nand2_x0 i0=$abc$109383$new_n45809_ i1=$abc$109383$new_n44179_ nq=$abc$109383$new_n45810_
 .subckt nor2_x0 i0=soc.ram.ram[73][7] i1=$abc$109383$new_n44202_ nq=$abc$109383$new_n45811_
 .subckt inv_x0 i=soc.ram.ram[77][7] nq=$abc$109383$new_n45812_
-.subckt oa22_x2 i0=$abc$109383$new_n45812_ i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43601_ q=$abc$109383$new_n45813_
-.subckt ao22_x2 i0=$abc$109383$new_n45813_ i1=$abc$109383$new_n45811_ i2=$abc$109383$new_n45810_ q=$abc$109383$new_n45814_
+.subckt or21nand_x1 i0=$abc$109383$new_n45812_ i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43601_ nq=$abc$109383$new_n45813_
+.subckt and21nor_x1 i0=$abc$109383$new_n45813_ i1=$abc$109383$new_n45811_ i2=$abc$109383$new_n45810_ nq=$abc$109383$new_n45814_
 .subckt nand2_x0 i0=$abc$109383$new_n45814_ i1=$abc$109383$new_n44228_ nq=$abc$109383$new_n45815_
-.subckt oa22_x2 i0=$abc$109383$new_n45815_ i1=$abc$109383$new_n45808_ i2=$abc$109383$new_n44916_ q=$abc$109383$new_n45816_
+.subckt or21nand_x1 i0=$abc$109383$new_n45815_ i1=$abc$109383$new_n45808_ i2=$abc$109383$new_n44916_ nq=$abc$109383$new_n45816_
 .subckt nand3_x0 i0=$abc$109383$new_n45816_ i1=$abc$109383$new_n45803_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n45817_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[80][7] i1=soc.ram.ram[84][7] q=$abc$109383$new_n45818_
-.subckt a2_x2 i0=$abc$109383$new_n45818_ i1=$abc$109383$new_n44426_ q=$abc$109383$new_n45819_
-.subckt ao22_x2 i0=soc.ram.ram[81][7] i1=$abc$109383$new_n44571_ i2=$abc$109383$new_n43651_ q=$abc$109383$new_n45820_
-.subckt ao22_x2 i0=$abc$109383$new_n43560_ i1=soc.ram.ram[85][7] i2=$abc$109383$new_n45820_ q=$abc$109383$new_n45821_
-.subckt o3_x2 i0=$abc$109383$new_n45821_ i1=$abc$109383$new_n45819_ i2=$abc$109383$new_n43896_ q=$abc$109383$new_n45822_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[88][7] i1=soc.ram.ram[92][7] q=$abc$109383$new_n45823_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[80][7] i1=soc.ram.ram[84][7] q=$abc$109383$new_n45818_
+.subckt and2_x1 i0=$abc$109383$new_n45818_ i1=$abc$109383$new_n44426_ q=$abc$109383$new_n45819_
+.subckt and21nor_x1 i0=soc.ram.ram[81][7] i1=$abc$109383$new_n44571_ i2=$abc$109383$new_n43651_ nq=$abc$109383$new_n45820_
+.subckt and21nor_x1 i0=$abc$109383$new_n43560_ i1=soc.ram.ram[85][7] i2=$abc$109383$new_n45820_ nq=$abc$109383$new_n45821_
+.subckt or3_x1 i0=$abc$109383$new_n45821_ i1=$abc$109383$new_n45819_ i2=$abc$109383$new_n43896_ q=$abc$109383$new_n45822_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[88][7] i1=soc.ram.ram[92][7] q=$abc$109383$new_n45823_
 .subckt nand2_x0 i0=$abc$109383$new_n45823_ i1=$abc$109383$new_n44179_ nq=$abc$109383$new_n45824_
 .subckt buf_x4 i=$abc$109383$new_n45566_ q=$abc$109383$new_n45825_
 .subckt nor2_x0 i0=soc.ram.ram[89][7] i1=$abc$109383$new_n45825_ nq=$abc$109383$new_n45826_
 .subckt inv_x0 i=soc.ram.ram[93][7] nq=$abc$109383$new_n45827_
-.subckt oa22_x2 i0=$abc$109383$new_n45827_ i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43601_ q=$abc$109383$new_n45828_
-.subckt ao22_x2 i0=$abc$109383$new_n45828_ i1=$abc$109383$new_n45826_ i2=$abc$109383$new_n45824_ q=$abc$109383$new_n45829_
+.subckt or21nand_x1 i0=$abc$109383$new_n45827_ i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43601_ nq=$abc$109383$new_n45828_
+.subckt and21nor_x1 i0=$abc$109383$new_n45828_ i1=$abc$109383$new_n45826_ i2=$abc$109383$new_n45824_ nq=$abc$109383$new_n45829_
 .subckt nand2_x0 i0=$abc$109383$new_n45829_ i1=$abc$109383$new_n44228_ nq=$abc$109383$new_n45830_
-.subckt oa22_x2 i0=$abc$109383$new_n45830_ i1=$abc$109383$new_n45822_ i2=$abc$109383$new_n44916_ q=$abc$109383$new_n45831_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[90][7] i1=soc.ram.ram[94][7] q=$abc$109383$new_n45832_
+.subckt or21nand_x1 i0=$abc$109383$new_n45830_ i1=$abc$109383$new_n45822_ i2=$abc$109383$new_n44916_ nq=$abc$109383$new_n45831_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[90][7] i1=soc.ram.ram[94][7] q=$abc$109383$new_n45832_
 .subckt nand2_x0 i0=$abc$109383$new_n45832_ i1=$abc$109383$new_n43616_ nq=$abc$109383$new_n45833_
 .subckt inv_x0 i=soc.ram.ram[95][7] nq=$abc$109383$new_n45834_
-.subckt a2_x2 i0=$abc$109383$new_n45834_ i1=$abc$109383$new_n44025_ q=$abc$109383$new_n45835_
-.subckt o2_x2 i0=soc.ram.ram[91][7] i1=$abc$109383$new_n43670_ q=$abc$109383$new_n45836_
+.subckt and2_x1 i0=$abc$109383$new_n45834_ i1=$abc$109383$new_n44025_ q=$abc$109383$new_n45835_
+.subckt or2_x1 i0=soc.ram.ram[91][7] i1=$abc$109383$new_n43670_ q=$abc$109383$new_n45836_
 .subckt nand2_x0 i0=$abc$109383$new_n45836_ i1=$abc$109383$new_n44142_ nq=$abc$109383$new_n45837_
-.subckt ao22_x2 i0=$abc$109383$new_n45837_ i1=$abc$109383$new_n45835_ i2=$abc$109383$new_n45833_ q=$abc$109383$new_n45838_
+.subckt and21nor_x1 i0=$abc$109383$new_n45837_ i1=$abc$109383$new_n45835_ i2=$abc$109383$new_n45833_ nq=$abc$109383$new_n45838_
 .subckt nand2_x0 i0=$abc$109383$new_n45838_ i1=$abc$109383$new_n43767_ nq=$abc$109383$new_n45839_
-.subckt mx2_x2 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[82][7] i1=soc.ram.ram[86][7] q=$abc$109383$new_n45840_
-.subckt a2_x2 i0=$abc$109383$new_n45840_ i1=$abc$109383$new_n43434_ q=$abc$109383$new_n45841_
-.subckt ao22_x2 i0=soc.ram.ram[83][7] i1=$abc$109383$new_n43337_ i2=$abc$109383$new_n44334_ q=$abc$109383$new_n45842_
-.subckt ao22_x2 i0=$abc$109383$new_n43398_ i1=soc.ram.ram[87][7] i2=$abc$109383$new_n45842_ q=$abc$109383$new_n45843_
-.subckt o3_x2 i0=$abc$109383$new_n45843_ i1=$abc$109383$new_n45841_ i2=$abc$109383$new_n43353_ q=$abc$109383$new_n45844_
-.subckt oa22_x2 i0=$abc$109383$new_n45844_ i1=$abc$109383$new_n45839_ i2=$abc$109383$new_n43753_ q=$abc$109383$new_n45845_
+.subckt mux2_x1 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[82][7] i1=soc.ram.ram[86][7] q=$abc$109383$new_n45840_
+.subckt and2_x1 i0=$abc$109383$new_n45840_ i1=$abc$109383$new_n43434_ q=$abc$109383$new_n45841_
+.subckt and21nor_x1 i0=soc.ram.ram[83][7] i1=$abc$109383$new_n43337_ i2=$abc$109383$new_n44334_ nq=$abc$109383$new_n45842_
+.subckt and21nor_x1 i0=$abc$109383$new_n43398_ i1=soc.ram.ram[87][7] i2=$abc$109383$new_n45842_ nq=$abc$109383$new_n45843_
+.subckt or3_x1 i0=$abc$109383$new_n45843_ i1=$abc$109383$new_n45841_ i2=$abc$109383$new_n43353_ q=$abc$109383$new_n45844_
+.subckt or21nand_x1 i0=$abc$109383$new_n45844_ i1=$abc$109383$new_n45839_ i2=$abc$109383$new_n43753_ nq=$abc$109383$new_n45845_
 .subckt nand3_x0 i0=$abc$109383$new_n45845_ i1=$abc$109383$new_n45831_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n45846_
 .subckt nand2_x0 i0=$abc$109383$new_n45846_ i1=$abc$109383$new_n45817_ nq=$abc$109383$new_n45847_
-.subckt ao22_x2 i0=$abc$109383$new_n45847_ i1=$abc$109383$new_n43589_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n45848_
-.subckt a2_x2 i0=$abc$109383$new_n45848_ i1=$abc$109383$new_n45789_ q=$abc$109383$new_n45849_
-.subckt mx2_x2 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[50][7] i1=soc.ram.ram[54][7] q=$abc$109383$new_n45850_
+.subckt and21nor_x1 i0=$abc$109383$new_n45847_ i1=$abc$109383$new_n43589_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n45848_
+.subckt and2_x1 i0=$abc$109383$new_n45848_ i1=$abc$109383$new_n45789_ q=$abc$109383$new_n45849_
+.subckt mux2_x1 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[50][7] i1=soc.ram.ram[54][7] q=$abc$109383$new_n45850_
 .subckt nand2_x0 i0=$abc$109383$new_n45850_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n45851_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[51][7] i1=soc.ram.ram[55][7] q=$abc$109383$new_n45852_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[51][7] i1=soc.ram.ram[55][7] q=$abc$109383$new_n45852_
 .subckt nand2_x0 i0=$abc$109383$new_n45852_ i1=$abc$109383$new_n45599_ nq=$abc$109383$new_n45853_
 .subckt nand3_x0 i0=$abc$109383$new_n45853_ i1=$abc$109383$new_n45851_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n45854_
-.subckt mx2_x2 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[48][7] i1=soc.ram.ram[52][7] q=$abc$109383$new_n45855_
-.subckt mx2_x2 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[49][7] i1=soc.ram.ram[53][7] q=$abc$109383$new_n45856_
-.subckt mx2_x2 cmd=$abc$109383$new_n43488_ i0=$abc$109383$new_n45856_ i1=$abc$109383$new_n45855_ q=$abc$109383$new_n45857_
-.subckt o2_x2 i0=$abc$109383$new_n45857_ i1=$abc$109383$new_n44916_ q=$abc$109383$new_n45858_
-.subckt oa22_x2 i0=$abc$109383$new_n45858_ i1=$abc$109383$new_n45854_ i2=$abc$109383$new_n44499_ q=$abc$109383$new_n45859_
-.subckt mx2_x2 cmd=$abc$109383$new_n44808_ i0=soc.ram.ram[56][7] i1=soc.ram.ram[60][7] q=$abc$109383$new_n45860_
+.subckt mux2_x1 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[48][7] i1=soc.ram.ram[52][7] q=$abc$109383$new_n45855_
+.subckt mux2_x1 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[49][7] i1=soc.ram.ram[53][7] q=$abc$109383$new_n45856_
+.subckt mux2_x1 cmd=$abc$109383$new_n43488_ i0=$abc$109383$new_n45856_ i1=$abc$109383$new_n45855_ q=$abc$109383$new_n45857_
+.subckt or2_x1 i0=$abc$109383$new_n45857_ i1=$abc$109383$new_n44916_ q=$abc$109383$new_n45858_
+.subckt or21nand_x1 i0=$abc$109383$new_n45858_ i1=$abc$109383$new_n45854_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n45859_
+.subckt mux2_x1 cmd=$abc$109383$new_n44808_ i0=soc.ram.ram[56][7] i1=soc.ram.ram[60][7] q=$abc$109383$new_n45860_
 .subckt nand2_x0 i0=$abc$109383$new_n45860_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n45861_
 .subckt inv_x0 i=soc.ram.ram[61][7] nq=$abc$109383$new_n45862_
 .subckt nand2_x0 i0=$abc$109383$new_n45862_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n45863_
-.subckt ao22_x2 i0=soc.ram.ram[57][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n45864_
+.subckt and21nor_x1 i0=soc.ram.ram[57][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n45864_
 .subckt nand2_x0 i0=$abc$109383$new_n45864_ i1=$abc$109383$new_n45863_ nq=$abc$109383$new_n45865_
 .subckt nand3_x0 i0=$abc$109383$new_n45865_ i1=$abc$109383$new_n45861_ i2=$abc$109383$new_n45629_ nq=$abc$109383$new_n45866_
-.subckt mx2_x2 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[58][7] i1=soc.ram.ram[62][7] q=$abc$109383$new_n45867_
-.subckt oa22_x2 i0=$abc$109383$new_n44179_ i1=$abc$109383$new_n45867_ i2=$abc$109383$new_n43448_ q=$abc$109383$new_n45868_
-.subckt ao22_x2 i0=soc.ram.ram[59][7] i1=$abc$109383$new_n44073_ i2=$abc$109383$new_n43797_ q=$abc$109383$new_n45869_
+.subckt mux2_x1 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[58][7] i1=soc.ram.ram[62][7] q=$abc$109383$new_n45867_
+.subckt or21nand_x1 i0=$abc$109383$new_n44179_ i1=$abc$109383$new_n45867_ i2=$abc$109383$new_n43448_ nq=$abc$109383$new_n45868_
+.subckt and21nor_x1 i0=soc.ram.ram[59][7] i1=$abc$109383$new_n44073_ i2=$abc$109383$new_n43797_ nq=$abc$109383$new_n45869_
 .subckt buf_x4 i=$abc$109383$new_n43347_ q=$abc$109383$new_n45870_
 .subckt inv_x0 i=soc.ram.ram[63][7] nq=$abc$109383$new_n45871_
 .subckt nand2_x0 i0=$abc$109383$new_n45871_ i1=$abc$109383$new_n45870_ nq=$abc$109383$new_n45872_
-.subckt oa22_x2 i0=$abc$109383$new_n45872_ i1=$abc$109383$new_n45869_ i2=$abc$109383$new_n45868_ q=$abc$109383$new_n45873_
-.subckt oa22_x2 i0=$abc$109383$new_n45873_ i1=$abc$109383$new_n45866_ i2=$abc$109383$new_n44086_ q=$abc$109383$new_n45874_
+.subckt or21nand_x1 i0=$abc$109383$new_n45872_ i1=$abc$109383$new_n45869_ i2=$abc$109383$new_n45868_ nq=$abc$109383$new_n45873_
+.subckt or21nand_x1 i0=$abc$109383$new_n45873_ i1=$abc$109383$new_n45866_ i2=$abc$109383$new_n44086_ nq=$abc$109383$new_n45874_
 .subckt nand3_x0 i0=$abc$109383$new_n45874_ i1=$abc$109383$new_n45859_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n45875_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[42][7] i1=soc.ram.ram[46][7] q=$abc$109383$new_n45876_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[43][7] i1=soc.ram.ram[47][7] q=$abc$109383$new_n45877_
-.subckt mx2_x2 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n45877_ i1=$abc$109383$new_n45876_ q=$abc$109383$new_n45878_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[40][7] i1=soc.ram.ram[44][7] q=$abc$109383$new_n45879_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[41][7] i1=soc.ram.ram[45][7] q=$abc$109383$new_n45880_
-.subckt mx2_x2 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n45880_ i1=$abc$109383$new_n45879_ q=$abc$109383$new_n45881_
-.subckt mx2_x2 cmd=$abc$109383$new_n44096_ i0=$abc$109383$new_n45881_ i1=$abc$109383$new_n45878_ q=$abc$109383$new_n45882_
-.subckt o2_x2 i0=$abc$109383$new_n45882_ i1=$abc$109383$new_n44484_ q=$abc$109383$new_n45883_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[42][7] i1=soc.ram.ram[46][7] q=$abc$109383$new_n45876_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[43][7] i1=soc.ram.ram[47][7] q=$abc$109383$new_n45877_
+.subckt mux2_x1 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n45877_ i1=$abc$109383$new_n45876_ q=$abc$109383$new_n45878_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[40][7] i1=soc.ram.ram[44][7] q=$abc$109383$new_n45879_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[41][7] i1=soc.ram.ram[45][7] q=$abc$109383$new_n45880_
+.subckt mux2_x1 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n45880_ i1=$abc$109383$new_n45879_ q=$abc$109383$new_n45881_
+.subckt mux2_x1 cmd=$abc$109383$new_n44096_ i0=$abc$109383$new_n45881_ i1=$abc$109383$new_n45878_ q=$abc$109383$new_n45882_
+.subckt or2_x1 i0=$abc$109383$new_n45882_ i1=$abc$109383$new_n44484_ q=$abc$109383$new_n45883_
 .subckt inv_x0 i=soc.ram.ram[37][7] nq=$abc$109383$new_n45884_
 .subckt nand2_x0 i0=$abc$109383$new_n45884_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n45885_
-.subckt ao22_x2 i0=soc.ram.ram[33][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n45886_
+.subckt and21nor_x1 i0=soc.ram.ram[33][7] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n45886_
 .subckt nand2_x0 i0=$abc$109383$new_n45886_ i1=$abc$109383$new_n45885_ nq=$abc$109383$new_n45887_
 .subckt buf_x4 i=$abc$109383$new_n43755_ q=$abc$109383$new_n45888_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[32][7] i1=soc.ram.ram[36][7] q=$abc$109383$new_n45889_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[32][7] i1=soc.ram.ram[36][7] q=$abc$109383$new_n45889_
 .subckt nand2_x0 i0=$abc$109383$new_n45889_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n45890_
 .subckt nand3_x0 i0=$abc$109383$new_n45890_ i1=$abc$109383$new_n45887_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n45891_
 .subckt inv_x0 i=soc.ram.ram[39][7] nq=$abc$109383$new_n45892_
 .subckt nand2_x0 i0=$abc$109383$new_n45892_ i1=$abc$109383$new_n44809_ nq=$abc$109383$new_n45893_
-.subckt ao22_x2 i0=soc.ram.ram[35][7] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n45894_
+.subckt and21nor_x1 i0=soc.ram.ram[35][7] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n45894_
 .subckt nand2_x0 i0=$abc$109383$new_n45894_ i1=$abc$109383$new_n45893_ nq=$abc$109383$new_n45895_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[34][7] i1=soc.ram.ram[38][7] q=$abc$109383$new_n45896_
-.subckt a2_x2 i0=$abc$109383$new_n45896_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n45897_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[34][7] i1=soc.ram.ram[38][7] q=$abc$109383$new_n45896_
+.subckt and2_x1 i0=$abc$109383$new_n45896_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n45897_
 .subckt nor2_x0 i0=$abc$109383$new_n45897_ i1=$abc$109383$new_n43855_ nq=$abc$109383$new_n45898_
 .subckt nand2_x0 i0=$abc$109383$new_n45898_ i1=$abc$109383$new_n45895_ nq=$abc$109383$new_n45899_
-.subckt oa22_x2 i0=$abc$109383$new_n45899_ i1=$abc$109383$new_n45891_ i2=$abc$109383$new_n45244_ q=$abc$109383$new_n45900_
+.subckt or21nand_x1 i0=$abc$109383$new_n45899_ i1=$abc$109383$new_n45891_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n45900_
 .subckt nand3_x0 i0=$abc$109383$new_n45900_ i1=$abc$109383$new_n45883_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n45901_
 .subckt nand3_x0 i0=$abc$109383$new_n45901_ i1=$abc$109383$new_n45875_ i2=$abc$109383$new_n43590_ nq=$abc$109383$new_n45902_
 .subckt inv_x0 i=soc.ram.ram[105][7] nq=$abc$109383$new_n45903_
 .subckt inv_x0 i=soc.ram.ram[109][7] nq=$abc$109383$new_n45904_
-.subckt mx2_x2 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n45904_ i1=$abc$109383$new_n45903_ q=$abc$109383$new_n45905_
+.subckt mux2_x1 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n45904_ i1=$abc$109383$new_n45903_ q=$abc$109383$new_n45905_
 .subckt inv_x0 i=soc.ram.ram[104][7] nq=$abc$109383$new_n45906_
 .subckt inv_x0 i=soc.ram.ram[108][7] nq=$abc$109383$new_n45907_
-.subckt mx2_x2 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n45907_ i1=$abc$109383$new_n45906_ q=$abc$109383$new_n45908_
-.subckt mx2_x2 cmd=$abc$109383$new_n43415_ i0=$abc$109383$new_n45908_ i1=$abc$109383$new_n45905_ q=$abc$109383$new_n45909_
-.subckt a2_x2 i0=$abc$109383$new_n45909_ i1=$abc$109383$new_n43375_ q=$abc$109383$new_n45910_
+.subckt mux2_x1 cmd=$abc$109383$new_n43529_ i0=$abc$109383$new_n45907_ i1=$abc$109383$new_n45906_ q=$abc$109383$new_n45908_
+.subckt mux2_x1 cmd=$abc$109383$new_n43415_ i0=$abc$109383$new_n45908_ i1=$abc$109383$new_n45905_ q=$abc$109383$new_n45909_
+.subckt and2_x1 i0=$abc$109383$new_n45909_ i1=$abc$109383$new_n43375_ q=$abc$109383$new_n45910_
 .subckt inv_x0 i=soc.ram.ram[106][7] nq=$abc$109383$new_n45911_
 .subckt inv_x0 i=soc.ram.ram[110][7] nq=$abc$109383$new_n45912_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n45912_ i1=$abc$109383$new_n45911_ q=$abc$109383$new_n45913_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n45912_ i1=$abc$109383$new_n45911_ q=$abc$109383$new_n45913_
 .subckt inv_x0 i=soc.ram.ram[107][7] nq=$abc$109383$new_n45914_
 .subckt inv_x0 i=soc.ram.ram[111][7] nq=$abc$109383$new_n45915_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n45915_ i1=$abc$109383$new_n45914_ q=$abc$109383$new_n45916_
-.subckt mx2_x2 cmd=$abc$109383$new_n43706_ i0=$abc$109383$new_n45916_ i1=$abc$109383$new_n45913_ q=$abc$109383$new_n45917_
-.subckt oa22_x2 i0=$abc$109383$new_n43506_ i1=$abc$109383$new_n45917_ i2=$abc$109383$new_n44240_ q=$abc$109383$new_n45918_
-.subckt o2_x2 i0=$abc$109383$new_n45918_ i1=$abc$109383$new_n45910_ q=$abc$109383$new_n45919_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n45915_ i1=$abc$109383$new_n45914_ q=$abc$109383$new_n45916_
+.subckt mux2_x1 cmd=$abc$109383$new_n43706_ i0=$abc$109383$new_n45916_ i1=$abc$109383$new_n45913_ q=$abc$109383$new_n45917_
+.subckt or21nand_x1 i0=$abc$109383$new_n43506_ i1=$abc$109383$new_n45917_ i2=$abc$109383$new_n44240_ nq=$abc$109383$new_n45918_
+.subckt or2_x1 i0=$abc$109383$new_n45918_ i1=$abc$109383$new_n45910_ q=$abc$109383$new_n45919_
 .subckt inv_x0 i=soc.ram.ram[97][7] nq=$abc$109383$new_n45920_
 .subckt inv_x0 i=soc.ram.ram[101][7] nq=$abc$109383$new_n45921_
-.subckt mx2_x2 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n45921_ i1=$abc$109383$new_n45920_ q=$abc$109383$new_n45922_
+.subckt mux2_x1 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n45921_ i1=$abc$109383$new_n45920_ q=$abc$109383$new_n45922_
 .subckt inv_x0 i=soc.ram.ram[96][7] nq=$abc$109383$new_n45923_
 .subckt inv_x0 i=soc.ram.ram[100][7] nq=$abc$109383$new_n45924_
-.subckt mx2_x2 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n45924_ i1=$abc$109383$new_n45923_ q=$abc$109383$new_n45925_
-.subckt mx2_x2 cmd=$abc$109383$new_n44053_ i0=$abc$109383$new_n45925_ i1=$abc$109383$new_n45922_ q=$abc$109383$new_n45926_
-.subckt a2_x2 i0=$abc$109383$new_n45926_ i1=$abc$109383$new_n44391_ q=$abc$109383$new_n45927_
-.subckt mx2_x2 cmd=$abc$109383$new_n43417_ i0=soc.ram.ram[99][7] i1=soc.ram.ram[103][7] q=$abc$109383$new_n45928_
-.subckt mx2_x2 cmd=$abc$109383$new_n43417_ i0=soc.ram.ram[98][7] i1=soc.ram.ram[102][7] q=$abc$109383$new_n45929_
-.subckt mx2_x2 cmd=$abc$109383$new_n43556_ i0=$abc$109383$new_n45929_ i1=$abc$109383$new_n45928_ q=$abc$109383$new_n45930_
+.subckt mux2_x1 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n45924_ i1=$abc$109383$new_n45923_ q=$abc$109383$new_n45925_
+.subckt mux2_x1 cmd=$abc$109383$new_n44053_ i0=$abc$109383$new_n45925_ i1=$abc$109383$new_n45922_ q=$abc$109383$new_n45926_
+.subckt and2_x1 i0=$abc$109383$new_n45926_ i1=$abc$109383$new_n44391_ q=$abc$109383$new_n45927_
+.subckt mux2_x1 cmd=$abc$109383$new_n43417_ i0=soc.ram.ram[99][7] i1=soc.ram.ram[103][7] q=$abc$109383$new_n45928_
+.subckt mux2_x1 cmd=$abc$109383$new_n43417_ i0=soc.ram.ram[98][7] i1=soc.ram.ram[102][7] q=$abc$109383$new_n45929_
+.subckt mux2_x1 cmd=$abc$109383$new_n43556_ i0=$abc$109383$new_n45929_ i1=$abc$109383$new_n45928_ q=$abc$109383$new_n45930_
 .subckt nor2_x0 i0=$abc$109383$new_n45930_ i1=$abc$109383$new_n43543_ nq=$abc$109383$new_n45931_
-.subckt o2_x2 i0=$abc$109383$new_n45931_ i1=$abc$109383$new_n43648_ q=$abc$109383$new_n45932_
-.subckt ao22_x2 i0=$abc$109383$new_n45932_ i1=$abc$109383$new_n45927_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n45933_
+.subckt or2_x1 i0=$abc$109383$new_n45931_ i1=$abc$109383$new_n43648_ q=$abc$109383$new_n45932_
+.subckt and21nor_x1 i0=$abc$109383$new_n45932_ i1=$abc$109383$new_n45927_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n45933_
 .subckt nand2_x0 i0=$abc$109383$new_n45933_ i1=$abc$109383$new_n45919_ nq=$abc$109383$new_n45934_
-.subckt mx2_x2 cmd=$abc$109383$new_n43519_ i0=soc.ram.ram[122][7] i1=soc.ram.ram[126][7] q=$abc$109383$new_n45935_
-.subckt oa22_x2 i0=$abc$109383$new_n43549_ i1=$abc$109383$new_n45935_ i2=$abc$109383$new_n43543_ q=$abc$109383$new_n45936_
-.subckt ao22_x2 i0=soc.ram.ram[123][7] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n44044_ q=$abc$109383$new_n45937_
+.subckt mux2_x1 cmd=$abc$109383$new_n43519_ i0=soc.ram.ram[122][7] i1=soc.ram.ram[126][7] q=$abc$109383$new_n45935_
+.subckt or21nand_x1 i0=$abc$109383$new_n43549_ i1=$abc$109383$new_n45935_ i2=$abc$109383$new_n43543_ nq=$abc$109383$new_n45936_
+.subckt and21nor_x1 i0=soc.ram.ram[123][7] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n44044_ nq=$abc$109383$new_n45937_
 .subckt inv_x0 i=soc.ram.ram[127][7] nq=$abc$109383$new_n45938_
 .subckt nand2_x0 i0=$abc$109383$new_n45938_ i1=$abc$109383$new_n44156_ nq=$abc$109383$new_n45939_
-.subckt oa22_x2 i0=$abc$109383$new_n45939_ i1=$abc$109383$new_n45937_ i2=$abc$109383$new_n45936_ q=$abc$109383$new_n45940_
+.subckt or21nand_x1 i0=$abc$109383$new_n45939_ i1=$abc$109383$new_n45937_ i2=$abc$109383$new_n45936_ nq=$abc$109383$new_n45940_
 .subckt buf_x4 i=$abc$109383$new_n43545_ q=$abc$109383$new_n45941_
 .subckt buf_x4 i=$abc$109383$new_n43799_ q=$abc$109383$new_n45942_
-.subckt ao22_x2 i0=soc.ram.ram[121][7] i1=$abc$109383$new_n45942_ i2=$abc$109383$new_n45941_ q=$abc$109383$new_n45943_
-.subckt ao22_x2 i0=$abc$109383$new_n43804_ i1=soc.ram.ram[125][7] i2=$abc$109383$new_n45943_ q=$abc$109383$new_n45944_
-.subckt mx2_x2 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[120][7] i1=soc.ram.ram[124][7] q=$abc$109383$new_n45945_
-.subckt oa22_x2 i0=$abc$109383$new_n44426_ i1=$abc$109383$new_n45945_ i2=$abc$109383$new_n43402_ q=$abc$109383$new_n45946_
-.subckt ao22_x2 i0=$abc$109383$new_n45946_ i1=$abc$109383$new_n45944_ i2=$abc$109383$new_n44390_ q=$abc$109383$new_n45947_
+.subckt and21nor_x1 i0=soc.ram.ram[121][7] i1=$abc$109383$new_n45942_ i2=$abc$109383$new_n45941_ nq=$abc$109383$new_n45943_
+.subckt and21nor_x1 i0=$abc$109383$new_n43804_ i1=soc.ram.ram[125][7] i2=$abc$109383$new_n45943_ nq=$abc$109383$new_n45944_
+.subckt mux2_x1 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[120][7] i1=soc.ram.ram[124][7] q=$abc$109383$new_n45945_
+.subckt or21nand_x1 i0=$abc$109383$new_n44426_ i1=$abc$109383$new_n45945_ i2=$abc$109383$new_n43402_ nq=$abc$109383$new_n45946_
+.subckt and21nor_x1 i0=$abc$109383$new_n45946_ i1=$abc$109383$new_n45944_ i2=$abc$109383$new_n44390_ nq=$abc$109383$new_n45947_
 .subckt nand2_x0 i0=$abc$109383$new_n45947_ i1=$abc$109383$new_n45940_ nq=$abc$109383$new_n45948_
-.subckt o2_x2 i0=soc.ram.ram[115][7] i1=$abc$109383$new_n43873_ q=$abc$109383$new_n45949_
-.subckt ao22_x2 i0=soc.ram.ram[119][7] i1=$abc$109383$new_n43560_ i2=$abc$109383$new_n43796_ q=$abc$109383$new_n45950_
+.subckt or2_x1 i0=soc.ram.ram[115][7] i1=$abc$109383$new_n43873_ q=$abc$109383$new_n45949_
+.subckt and21nor_x1 i0=soc.ram.ram[119][7] i1=$abc$109383$new_n43560_ i2=$abc$109383$new_n43796_ nq=$abc$109383$new_n45950_
 .subckt nand2_x0 i0=$abc$109383$new_n45950_ i1=$abc$109383$new_n45949_ nq=$abc$109383$new_n45951_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[114][7] i1=soc.ram.ram[118][7] q=$abc$109383$new_n45952_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[114][7] i1=soc.ram.ram[118][7] q=$abc$109383$new_n45952_
 .subckt nand2_x0 i0=$abc$109383$new_n45952_ i1=$abc$109383$new_n44836_ nq=$abc$109383$new_n45953_
-.subckt a3_x2 i0=$abc$109383$new_n45953_ i1=$abc$109383$new_n45951_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n45954_
+.subckt and3_x1 i0=$abc$109383$new_n45953_ i1=$abc$109383$new_n45951_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n45954_
 .subckt inv_x0 i=soc.ram.ram[117][7] nq=$abc$109383$new_n45955_
 .subckt nand2_x0 i0=$abc$109383$new_n45955_ i1=$abc$109383$new_n43490_ nq=$abc$109383$new_n45956_
-.subckt ao22_x2 i0=soc.ram.ram[113][7] i1=$abc$109383$new_n43519_ i2=$abc$109383$new_n43443_ q=$abc$109383$new_n45957_
+.subckt and21nor_x1 i0=soc.ram.ram[113][7] i1=$abc$109383$new_n43519_ i2=$abc$109383$new_n43443_ nq=$abc$109383$new_n45957_
 .subckt nand2_x0 i0=$abc$109383$new_n45957_ i1=$abc$109383$new_n45956_ nq=$abc$109383$new_n45958_
 .subckt buf_x4 i=$abc$109383$new_n43336_ q=$abc$109383$new_n45959_
 .subckt inv_x0 i=soc.ram.ram[116][7] nq=$abc$109383$new_n45960_
-.subckt a2_x2 i0=$abc$109383$new_n45960_ i1=$abc$109383$new_n45959_ q=$abc$109383$new_n45961_
-.subckt o2_x2 i0=soc.ram.ram[112][7] i1=$abc$109383$new_n43440_ q=$abc$109383$new_n45962_
+.subckt and2_x1 i0=$abc$109383$new_n45960_ i1=$abc$109383$new_n45959_ q=$abc$109383$new_n45961_
+.subckt or2_x1 i0=soc.ram.ram[112][7] i1=$abc$109383$new_n43440_ q=$abc$109383$new_n45962_
 .subckt nand2_x0 i0=$abc$109383$new_n45962_ i1=$abc$109383$new_n43333_ nq=$abc$109383$new_n45963_
-.subckt ao22_x2 i0=$abc$109383$new_n45963_ i1=$abc$109383$new_n45961_ i2=$abc$109383$new_n43422_ q=$abc$109383$new_n45964_
-.subckt oa22_x2 i0=$abc$109383$new_n45964_ i1=$abc$109383$new_n45958_ i2=$abc$109383$new_n43524_ q=$abc$109383$new_n45965_
-.subckt ao22_x2 i0=$abc$109383$new_n45965_ i1=$abc$109383$new_n45954_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n45966_
+.subckt and21nor_x1 i0=$abc$109383$new_n45963_ i1=$abc$109383$new_n45961_ i2=$abc$109383$new_n43422_ nq=$abc$109383$new_n45964_
+.subckt or21nand_x1 i0=$abc$109383$new_n45964_ i1=$abc$109383$new_n45958_ i2=$abc$109383$new_n43524_ nq=$abc$109383$new_n45965_
+.subckt and21nor_x1 i0=$abc$109383$new_n45965_ i1=$abc$109383$new_n45954_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n45966_
 .subckt nand2_x0 i0=$abc$109383$new_n45966_ i1=$abc$109383$new_n45948_ nq=$abc$109383$new_n45967_
-.subckt oa22_x2 i0=$abc$109383$new_n45967_ i1=$abc$109383$new_n45934_ i2=$abc$109383$new_n43589_ q=$abc$109383$new_n45968_
-.subckt a2_x2 i0=$abc$109383$new_n45968_ i1=$abc$109383$new_n45534_ q=$abc$109383$new_n45969_
-.subckt a2_x2 i0=$abc$109383$new_n45969_ i1=$abc$109383$new_n45902_ q=$abc$109383$new_n45970_
-.subckt ao22_x2 i0=$abc$109383$new_n45970_ i1=$abc$109383$new_n45849_ i2=$abc$109383$new_n43322_ q=$abc$109383$new_n45971_
+.subckt or21nand_x1 i0=$abc$109383$new_n45967_ i1=$abc$109383$new_n45934_ i2=$abc$109383$new_n43589_ nq=$abc$109383$new_n45968_
+.subckt and2_x1 i0=$abc$109383$new_n45968_ i1=$abc$109383$new_n45534_ q=$abc$109383$new_n45969_
+.subckt and2_x1 i0=$abc$109383$new_n45969_ i1=$abc$109383$new_n45902_ q=$abc$109383$new_n45970_
+.subckt and21nor_x1 i0=$abc$109383$new_n45970_ i1=$abc$109383$new_n45849_ i2=$abc$109383$new_n43322_ nq=$abc$109383$new_n45971_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[7] nq=$abc$109383$new_n45972_
 .subckt inv_x0 i=soc.hyperram.sr[7] nq=$abc$109383$new_n45973_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n45973_ q=$abc$109383$new_n45974_
-.subckt a2_x2 i0=$abc$109383$new_n45974_ i1=$abc$109383$new_n45972_ q=$abc$109383$new_n45975_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n45973_ q=$abc$109383$new_n45974_
+.subckt and2_x1 i0=$abc$109383$new_n45974_ i1=$abc$109383$new_n45972_ q=$abc$109383$new_n45975_
 .subckt buf_x4 i=$abc$109383$new_n21997_ q=$abc$109383$new_n45976_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[7] nq=$abc$109383$new_n45977_
-.subckt o2_x2 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n45977_ q=$abc$109383$new_n45978_
-.subckt o4_x2 i0=$abc$109383$new_n45978_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n45979_
+.subckt or2_x1 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n45977_ q=$abc$109383$new_n45978_
+.subckt or4_x1 i0=$abc$109383$new_n45978_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n45979_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n44265_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[7] nq=$abc$109383$new_n45980_
 .subckt nand3_x0 i0=$abc$109383$new_n45980_ i1=$abc$109383$new_n45979_ i2=$abc$109383$new_n45975_ nq=$abc$109383$new_n45981_
-.subckt o3_x2 i0=$abc$109383$new_n45981_ i1=$abc$109383$new_n45971_ i2=$abc$109383$new_n45731_ q=$abc$109383$new_n45982_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n45982_ i2=$abc$109383$new_n45728_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103226
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[8] q=$abc$109383$new_n45984_
-.subckt a2_x2 i0=$abc$109383$new_n45984_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n45985_
+.subckt or3_x1 i0=$abc$109383$new_n45981_ i1=$abc$109383$new_n45971_ i2=$abc$109383$new_n45731_ q=$abc$109383$new_n45982_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n45982_ i2=$abc$109383$new_n45728_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103226
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[8] nq=$abc$109383$new_n45984_
+.subckt and2_x1 i0=$abc$109383$new_n45984_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n45985_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[8] nq=$abc$109383$new_n45986_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[8] nq=$abc$109383$new_n45987_
 .subckt nand3_x0 i0=$abc$109383$new_n21937_ i1=$abc$109383$new_n44290_ i2=soc.bridge.csr_bridge_1.wb__dat_r[8] nq=$abc$109383$new_n45988_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[8] nq=$abc$109383$new_n45989_
-.subckt o2_x2 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n45989_ q=$abc$109383$new_n45990_
+.subckt or2_x1 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n45989_ q=$abc$109383$new_n45990_
 .subckt nand2_x0 i0=$abc$109383$new_n45990_ i1=$abc$109383$new_n45988_ nq=$abc$109383$new_n45991_
 .subckt nand4_x0 i0=$abc$109383$new_n45991_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n45992_
-.subckt a2_x2 i0=$abc$109383$new_n45992_ i1=$abc$109383$new_n45987_ q=$abc$109383$new_n45993_
+.subckt and2_x1 i0=$abc$109383$new_n45992_ i1=$abc$109383$new_n45987_ q=$abc$109383$new_n45993_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[8] nq=$abc$109383$new_n45994_
 .subckt inv_x0 i=soc.hyperram.sr[8] nq=$abc$109383$new_n45995_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n45995_ q=$abc$109383$new_n45996_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n45995_ q=$abc$109383$new_n45996_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_1.wb__dat_r[8] nq=$abc$109383$new_n45997_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[8] nq=$abc$109383$new_n45998_
-.subckt mx2_x2 cmd=$abc$109383$new_n22004_ i0=$abc$109383$new_n45998_ i1=$abc$109383$new_n45997_ q=$abc$109383$new_n45999_
+.subckt mux2_x1 cmd=$abc$109383$new_n22004_ i0=$abc$109383$new_n45998_ i1=$abc$109383$new_n45997_ q=$abc$109383$new_n45999_
 .subckt nand4_x0 i0=$abc$109383$new_n27638_ i1=$abc$109383$new_n27643_ i2=$abc$109383$new_n28378_ i3=$abc$109383$new_n14802_ nq=$abc$109383$new_n46000_
-.subckt ao22_x2 i0=$abc$109383$new_n46000_ i1=$abc$109383$new_n45999_ i2=$abc$109383$new_n45996_ q=$abc$109383$new_n46001_
+.subckt and21nor_x1 i0=$abc$109383$new_n46000_ i1=$abc$109383$new_n45999_ i2=$abc$109383$new_n45996_ nq=$abc$109383$new_n46001_
 .subckt nand4_x0 i0=$abc$109383$new_n46001_ i1=$abc$109383$new_n45994_ i2=$abc$109383$new_n45993_ i3=$abc$109383$new_n45986_ nq=$abc$109383$new_n46002_
 .subckt nand2_x0 i0=soc.ram.ram[89][8] i1=$abc$109383$new_n44060_ nq=$abc$109383$new_n46003_
 .subckt inv_x0 i=soc.ram.ram[91][8] nq=$abc$109383$new_n46004_
-.subckt ao22_x2 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n46004_ i2=$abc$109383$new_n43502_ q=$abc$109383$new_n46005_
-.subckt a2_x2 i0=$abc$109383$new_n46005_ i1=$abc$109383$new_n46003_ q=$abc$109383$new_n46006_
+.subckt and21nor_x1 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n46004_ i2=$abc$109383$new_n43502_ nq=$abc$109383$new_n46005_
+.subckt and2_x1 i0=$abc$109383$new_n46005_ i1=$abc$109383$new_n46003_ q=$abc$109383$new_n46006_
 .subckt nand2_x0 i0=soc.ram.ram[93][8] i1=$abc$109383$new_n43329_ nq=$abc$109383$new_n46007_
 .subckt inv_x0 i=soc.ram.ram[95][8] nq=$abc$109383$new_n46008_
-.subckt ao22_x2 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n46008_ i2=$abc$109383$new_n43742_ q=$abc$109383$new_n46009_
-.subckt a2_x2 i0=$abc$109383$new_n46009_ i1=$abc$109383$new_n46007_ q=$abc$109383$new_n46010_
-.subckt ao22_x2 i0=$abc$109383$new_n46010_ i1=$abc$109383$new_n46006_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n46011_
+.subckt and21nor_x1 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n46008_ i2=$abc$109383$new_n43742_ nq=$abc$109383$new_n46009_
+.subckt and2_x1 i0=$abc$109383$new_n46009_ i1=$abc$109383$new_n46007_ q=$abc$109383$new_n46010_
+.subckt and21nor_x1 i0=$abc$109383$new_n46010_ i1=$abc$109383$new_n46006_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n46011_
 .subckt nand2_x0 i0=soc.ram.ram[88][8] i1=$abc$109383$new_n43329_ nq=$abc$109383$new_n46012_
 .subckt inv_x0 i=soc.ram.ram[90][8] nq=$abc$109383$new_n46013_
-.subckt ao22_x2 i0=$abc$109383$new_n43328_ i1=$abc$109383$new_n46013_ i2=$abc$109383$new_n43560_ q=$abc$109383$new_n46014_
-.subckt a2_x2 i0=$abc$109383$new_n46014_ i1=$abc$109383$new_n46012_ q=$abc$109383$new_n46015_
+.subckt and21nor_x1 i0=$abc$109383$new_n43328_ i1=$abc$109383$new_n46013_ i2=$abc$109383$new_n43560_ nq=$abc$109383$new_n46014_
+.subckt and2_x1 i0=$abc$109383$new_n46014_ i1=$abc$109383$new_n46012_ q=$abc$109383$new_n46015_
 .subckt nand2_x0 i0=soc.ram.ram[92][8] i1=$abc$109383$new_n43723_ nq=$abc$109383$new_n46016_
 .subckt inv_x0 i=soc.ram.ram[94][8] nq=$abc$109383$new_n46017_
-.subckt ao22_x2 i0=$abc$109383$new_n43328_ i1=$abc$109383$new_n46017_ i2=$abc$109383$new_n45138_ q=$abc$109383$new_n46018_
-.subckt a2_x2 i0=$abc$109383$new_n46018_ i1=$abc$109383$new_n46016_ q=$abc$109383$new_n46019_
-.subckt ao22_x2 i0=$abc$109383$new_n46019_ i1=$abc$109383$new_n46015_ i2=$abc$109383$new_n43623_ q=$abc$109383$new_n46020_
-.subckt ao22_x2 i0=$abc$109383$new_n46020_ i1=$abc$109383$new_n46011_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n46021_
-.subckt mx2_x2 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[73][8] i1=soc.ram.ram[77][8] q=$abc$109383$new_n46022_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[72][8] i1=soc.ram.ram[76][8] q=$abc$109383$new_n46023_
-.subckt mx2_x2 cmd=$abc$109383$new_n43847_ i0=$abc$109383$new_n46023_ i1=$abc$109383$new_n46022_ q=$abc$109383$new_n46024_
-.subckt a2_x2 i0=$abc$109383$new_n46024_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n46025_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[75][8] i1=soc.ram.ram[79][8] q=$abc$109383$new_n46026_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[74][8] i1=soc.ram.ram[78][8] q=$abc$109383$new_n46027_
-.subckt mx2_x2 cmd=$abc$109383$new_n43996_ i0=$abc$109383$new_n46027_ i1=$abc$109383$new_n46026_ q=$abc$109383$new_n46028_
-.subckt oa22_x2 i0=$abc$109383$new_n43808_ i1=$abc$109383$new_n46028_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n46029_
+.subckt and21nor_x1 i0=$abc$109383$new_n43328_ i1=$abc$109383$new_n46017_ i2=$abc$109383$new_n45138_ nq=$abc$109383$new_n46018_
+.subckt and2_x1 i0=$abc$109383$new_n46018_ i1=$abc$109383$new_n46016_ q=$abc$109383$new_n46019_
+.subckt and21nor_x1 i0=$abc$109383$new_n46019_ i1=$abc$109383$new_n46015_ i2=$abc$109383$new_n43623_ nq=$abc$109383$new_n46020_
+.subckt and21nor_x1 i0=$abc$109383$new_n46020_ i1=$abc$109383$new_n46011_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n46021_
+.subckt mux2_x1 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[73][8] i1=soc.ram.ram[77][8] q=$abc$109383$new_n46022_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[72][8] i1=soc.ram.ram[76][8] q=$abc$109383$new_n46023_
+.subckt mux2_x1 cmd=$abc$109383$new_n43847_ i0=$abc$109383$new_n46023_ i1=$abc$109383$new_n46022_ q=$abc$109383$new_n46024_
+.subckt and2_x1 i0=$abc$109383$new_n46024_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n46025_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[75][8] i1=soc.ram.ram[79][8] q=$abc$109383$new_n46026_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[74][8] i1=soc.ram.ram[78][8] q=$abc$109383$new_n46027_
+.subckt mux2_x1 cmd=$abc$109383$new_n43996_ i0=$abc$109383$new_n46027_ i1=$abc$109383$new_n46026_ q=$abc$109383$new_n46028_
+.subckt or21nand_x1 i0=$abc$109383$new_n43808_ i1=$abc$109383$new_n46028_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n46029_
 .subckt nor2_x0 i0=$abc$109383$new_n46029_ i1=$abc$109383$new_n46025_ nq=$abc$109383$new_n46030_
-.subckt ao22_x2 i0=$abc$109383$new_n46030_ i1=$abc$109383$new_n46021_ i2=$abc$109383$new_n44910_ q=$abc$109383$new_n46031_
-.subckt mx2_x2 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[64][8] i1=soc.ram.ram[68][8] q=$abc$109383$new_n46032_
-.subckt a2_x2 i0=$abc$109383$new_n46032_ i1=$abc$109383$new_n43902_ q=$abc$109383$new_n46033_
-.subckt ao22_x2 i0=soc.ram.ram[65][8] i1=$abc$109383$new_n45138_ i2=$abc$109383$new_n44401_ q=$abc$109383$new_n46034_
-.subckt ao22_x2 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[69][8] i2=$abc$109383$new_n46034_ q=$abc$109383$new_n46035_
-.subckt ao22_x2 i0=$abc$109383$new_n46035_ i1=$abc$109383$new_n46033_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n46036_
-.subckt ao22_x2 i0=soc.ram.ram[67][8] i1=$abc$109383$new_n43573_ i2=$abc$109383$new_n43361_ q=$abc$109383$new_n46037_
-.subckt ao22_x2 i0=$abc$109383$new_n43877_ i1=soc.ram.ram[71][8] i2=$abc$109383$new_n46037_ q=$abc$109383$new_n46038_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[66][8] i1=soc.ram.ram[70][8] q=$abc$109383$new_n46039_
-.subckt oa22_x2 i0=$abc$109383$new_n43494_ i1=$abc$109383$new_n46039_ i2=$abc$109383$new_n46038_ q=$abc$109383$new_n46040_
-.subckt a2_x2 i0=$abc$109383$new_n46040_ i1=$abc$109383$new_n43458_ q=$abc$109383$new_n46041_
+.subckt and21nor_x1 i0=$abc$109383$new_n46030_ i1=$abc$109383$new_n46021_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n46031_
+.subckt mux2_x1 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[64][8] i1=soc.ram.ram[68][8] q=$abc$109383$new_n46032_
+.subckt and2_x1 i0=$abc$109383$new_n46032_ i1=$abc$109383$new_n43902_ q=$abc$109383$new_n46033_
+.subckt and21nor_x1 i0=soc.ram.ram[65][8] i1=$abc$109383$new_n45138_ i2=$abc$109383$new_n44401_ nq=$abc$109383$new_n46034_
+.subckt and21nor_x1 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[69][8] i2=$abc$109383$new_n46034_ nq=$abc$109383$new_n46035_
+.subckt and21nor_x1 i0=$abc$109383$new_n46035_ i1=$abc$109383$new_n46033_ i2=$abc$109383$new_n43375_ nq=$abc$109383$new_n46036_
+.subckt and21nor_x1 i0=soc.ram.ram[67][8] i1=$abc$109383$new_n43573_ i2=$abc$109383$new_n43361_ nq=$abc$109383$new_n46037_
+.subckt and21nor_x1 i0=$abc$109383$new_n43877_ i1=soc.ram.ram[71][8] i2=$abc$109383$new_n46037_ nq=$abc$109383$new_n46038_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[66][8] i1=soc.ram.ram[70][8] q=$abc$109383$new_n46039_
+.subckt or21nand_x1 i0=$abc$109383$new_n43494_ i1=$abc$109383$new_n46039_ i2=$abc$109383$new_n46038_ nq=$abc$109383$new_n46040_
+.subckt and2_x1 i0=$abc$109383$new_n46040_ i1=$abc$109383$new_n43458_ q=$abc$109383$new_n46041_
 .subckt nor3_x0 i0=$abc$109383$new_n46041_ i1=$abc$109383$new_n46036_ i2=$abc$109383$new_n43467_ nq=$abc$109383$new_n46042_
-.subckt mx2_x2 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[80][8] i1=soc.ram.ram[84][8] q=$abc$109383$new_n46043_
-.subckt a2_x2 i0=$abc$109383$new_n46043_ i1=$abc$109383$new_n43549_ q=$abc$109383$new_n46044_
-.subckt ao22_x2 i0=soc.ram.ram[81][8] i1=$abc$109383$new_n43495_ i2=$abc$109383$new_n43698_ q=$abc$109383$new_n46045_
-.subckt ao22_x2 i0=$abc$109383$new_n43365_ i1=soc.ram.ram[85][8] i2=$abc$109383$new_n46045_ q=$abc$109383$new_n46046_
-.subckt ao22_x2 i0=$abc$109383$new_n46046_ i1=$abc$109383$new_n46044_ i2=$abc$109383$new_n43330_ q=$abc$109383$new_n46047_
-.subckt mx2_x2 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[82][8] i1=soc.ram.ram[86][8] q=$abc$109383$new_n46048_
-.subckt a2_x2 i0=$abc$109383$new_n46048_ i1=$abc$109383$new_n43384_ q=$abc$109383$new_n46049_
-.subckt ao22_x2 i0=soc.ram.ram[83][8] i1=$abc$109383$new_n44351_ i2=$abc$109383$new_n43414_ q=$abc$109383$new_n46050_
-.subckt ao22_x2 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[87][8] i2=$abc$109383$new_n46050_ q=$abc$109383$new_n46051_
-.subckt ao22_x2 i0=$abc$109383$new_n46051_ i1=$abc$109383$new_n46049_ i2=$abc$109383$new_n43580_ q=$abc$109383$new_n46052_
+.subckt mux2_x1 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[80][8] i1=soc.ram.ram[84][8] q=$abc$109383$new_n46043_
+.subckt and2_x1 i0=$abc$109383$new_n46043_ i1=$abc$109383$new_n43549_ q=$abc$109383$new_n46044_
+.subckt and21nor_x1 i0=soc.ram.ram[81][8] i1=$abc$109383$new_n43495_ i2=$abc$109383$new_n43698_ nq=$abc$109383$new_n46045_
+.subckt and21nor_x1 i0=$abc$109383$new_n43365_ i1=soc.ram.ram[85][8] i2=$abc$109383$new_n46045_ nq=$abc$109383$new_n46046_
+.subckt and21nor_x1 i0=$abc$109383$new_n46046_ i1=$abc$109383$new_n46044_ i2=$abc$109383$new_n43330_ nq=$abc$109383$new_n46047_
+.subckt mux2_x1 cmd=$abc$109383$new_n43385_ i0=soc.ram.ram[82][8] i1=soc.ram.ram[86][8] q=$abc$109383$new_n46048_
+.subckt and2_x1 i0=$abc$109383$new_n46048_ i1=$abc$109383$new_n43384_ q=$abc$109383$new_n46049_
+.subckt and21nor_x1 i0=soc.ram.ram[83][8] i1=$abc$109383$new_n44351_ i2=$abc$109383$new_n43414_ nq=$abc$109383$new_n46050_
+.subckt and21nor_x1 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[87][8] i2=$abc$109383$new_n46050_ nq=$abc$109383$new_n46051_
+.subckt and21nor_x1 i0=$abc$109383$new_n46051_ i1=$abc$109383$new_n46049_ i2=$abc$109383$new_n43580_ nq=$abc$109383$new_n46052_
 .subckt nor3_x0 i0=$abc$109383$new_n46052_ i1=$abc$109383$new_n46047_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n46053_
-.subckt ao22_x2 i0=$abc$109383$new_n46053_ i1=$abc$109383$new_n46042_ i2=$abc$109383$new_n44484_ q=$abc$109383$new_n46054_
-.subckt ao22_x2 i0=$abc$109383$new_n46054_ i1=$abc$109383$new_n46031_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n46055_
-.subckt mx2_x2 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[114][8] i1=soc.ram.ram[118][8] q=$abc$109383$new_n46056_
+.subckt and21nor_x1 i0=$abc$109383$new_n46053_ i1=$abc$109383$new_n46042_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n46054_
+.subckt and21nor_x1 i0=$abc$109383$new_n46054_ i1=$abc$109383$new_n46031_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n46055_
+.subckt mux2_x1 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[114][8] i1=soc.ram.ram[118][8] q=$abc$109383$new_n46056_
 .subckt nand2_x0 i0=$abc$109383$new_n46056_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n46057_
-.subckt mx2_x2 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[115][8] i1=soc.ram.ram[119][8] q=$abc$109383$new_n46058_
+.subckt mux2_x1 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[115][8] i1=soc.ram.ram[119][8] q=$abc$109383$new_n46058_
 .subckt nand2_x0 i0=$abc$109383$new_n46058_ i1=$abc$109383$new_n43992_ nq=$abc$109383$new_n46059_
 .subckt nand3_x0 i0=$abc$109383$new_n46059_ i1=$abc$109383$new_n46057_ i2=$abc$109383$new_n45604_ nq=$abc$109383$new_n46060_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[112][8] i1=soc.ram.ram[116][8] q=$abc$109383$new_n46061_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[113][8] i1=soc.ram.ram[117][8] q=$abc$109383$new_n46062_
-.subckt mx2_x2 cmd=$abc$109383$new_n43488_ i0=$abc$109383$new_n46062_ i1=$abc$109383$new_n46061_ q=$abc$109383$new_n46063_
-.subckt ao22_x2 i0=$abc$109383$new_n44212_ i1=$abc$109383$new_n46063_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n46064_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[112][8] i1=soc.ram.ram[116][8] q=$abc$109383$new_n46061_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[113][8] i1=soc.ram.ram[117][8] q=$abc$109383$new_n46062_
+.subckt mux2_x1 cmd=$abc$109383$new_n43488_ i0=$abc$109383$new_n46062_ i1=$abc$109383$new_n46061_ q=$abc$109383$new_n46063_
+.subckt and21nor_x1 i0=$abc$109383$new_n44212_ i1=$abc$109383$new_n46063_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n46064_
 .subckt nand2_x0 i0=$abc$109383$new_n46064_ i1=$abc$109383$new_n46060_ nq=$abc$109383$new_n46065_
-.subckt mx2_x2 cmd=$abc$109383$new_n44187_ i0=soc.ram.ram[120][8] i1=soc.ram.ram[124][8] q=$abc$109383$new_n46066_
+.subckt mux2_x1 cmd=$abc$109383$new_n44187_ i0=soc.ram.ram[120][8] i1=soc.ram.ram[124][8] q=$abc$109383$new_n46066_
 .subckt nand2_x0 i0=$abc$109383$new_n46066_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n46067_
 .subckt inv_x0 i=soc.ram.ram[125][8] nq=$abc$109383$new_n46068_
 .subckt nand2_x0 i0=$abc$109383$new_n46068_ i1=$abc$109383$new_n43926_ nq=$abc$109383$new_n46069_
-.subckt ao22_x2 i0=soc.ram.ram[121][8] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n46070_
+.subckt and21nor_x1 i0=soc.ram.ram[121][8] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n46070_
 .subckt nand2_x0 i0=$abc$109383$new_n46070_ i1=$abc$109383$new_n46069_ nq=$abc$109383$new_n46071_
 .subckt nand3_x0 i0=$abc$109383$new_n46071_ i1=$abc$109383$new_n46067_ i2=$abc$109383$new_n44741_ nq=$abc$109383$new_n46072_
-.subckt mx2_x2 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[122][8] i1=soc.ram.ram[126][8] q=$abc$109383$new_n46073_
-.subckt oa22_x2 i0=$abc$109383$new_n43456_ i1=$abc$109383$new_n46073_ i2=$abc$109383$new_n43543_ q=$abc$109383$new_n46074_
-.subckt ao22_x2 i0=soc.ram.ram[123][8] i1=$abc$109383$new_n44237_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n46075_
+.subckt mux2_x1 cmd=$abc$109383$new_n43550_ i0=soc.ram.ram[122][8] i1=soc.ram.ram[126][8] q=$abc$109383$new_n46073_
+.subckt or21nand_x1 i0=$abc$109383$new_n43456_ i1=$abc$109383$new_n46073_ i2=$abc$109383$new_n43543_ nq=$abc$109383$new_n46074_
+.subckt and21nor_x1 i0=soc.ram.ram[123][8] i1=$abc$109383$new_n44237_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n46075_
 .subckt inv_x0 i=soc.ram.ram[127][8] nq=$abc$109383$new_n46076_
 .subckt nand2_x0 i0=$abc$109383$new_n46076_ i1=$abc$109383$new_n43868_ nq=$abc$109383$new_n46077_
-.subckt oa22_x2 i0=$abc$109383$new_n46077_ i1=$abc$109383$new_n46075_ i2=$abc$109383$new_n46074_ q=$abc$109383$new_n46078_
+.subckt or21nand_x1 i0=$abc$109383$new_n46077_ i1=$abc$109383$new_n46075_ i2=$abc$109383$new_n46074_ nq=$abc$109383$new_n46078_
 .subckt nand3_x0 i0=$abc$109383$new_n46078_ i1=$abc$109383$new_n46072_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n46079_
-.subckt oa22_x2 i0=$abc$109383$new_n46079_ i1=$abc$109383$new_n46065_ i2=$abc$109383$new_n43412_ q=$abc$109383$new_n46080_
-.subckt mx2_x2 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[98][8] i1=soc.ram.ram[102][8] q=$abc$109383$new_n46081_
+.subckt or21nand_x1 i0=$abc$109383$new_n46079_ i1=$abc$109383$new_n46065_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n46080_
+.subckt mux2_x1 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[98][8] i1=soc.ram.ram[102][8] q=$abc$109383$new_n46081_
 .subckt nand2_x0 i0=$abc$109383$new_n46081_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n46082_
-.subckt mx2_x2 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[99][8] i1=soc.ram.ram[103][8] q=$abc$109383$new_n46083_
+.subckt mux2_x1 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[99][8] i1=soc.ram.ram[103][8] q=$abc$109383$new_n46083_
 .subckt nand2_x0 i0=$abc$109383$new_n46083_ i1=$abc$109383$new_n43998_ nq=$abc$109383$new_n46084_
 .subckt nand3_x0 i0=$abc$109383$new_n46084_ i1=$abc$109383$new_n46082_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n46085_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[96][8] i1=soc.ram.ram[100][8] q=$abc$109383$new_n46086_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[97][8] i1=soc.ram.ram[101][8] q=$abc$109383$new_n46087_
-.subckt mx2_x2 cmd=$abc$109383$new_n43902_ i0=$abc$109383$new_n46087_ i1=$abc$109383$new_n46086_ q=$abc$109383$new_n46088_
-.subckt ao22_x2 i0=$abc$109383$new_n45279_ i1=$abc$109383$new_n46088_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n46089_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[96][8] i1=soc.ram.ram[100][8] q=$abc$109383$new_n46086_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[97][8] i1=soc.ram.ram[101][8] q=$abc$109383$new_n46087_
+.subckt mux2_x1 cmd=$abc$109383$new_n43902_ i0=$abc$109383$new_n46087_ i1=$abc$109383$new_n46086_ q=$abc$109383$new_n46088_
+.subckt and21nor_x1 i0=$abc$109383$new_n45279_ i1=$abc$109383$new_n46088_ i2=$abc$109383$new_n43664_ nq=$abc$109383$new_n46089_
 .subckt nand2_x0 i0=$abc$109383$new_n46089_ i1=$abc$109383$new_n46085_ nq=$abc$109383$new_n46090_
-.subckt mx2_x2 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[104][8] i1=soc.ram.ram[108][8] q=$abc$109383$new_n46091_
+.subckt mux2_x1 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[104][8] i1=soc.ram.ram[108][8] q=$abc$109383$new_n46091_
 .subckt nand2_x0 i0=$abc$109383$new_n46091_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n46092_
 .subckt inv_x0 i=soc.ram.ram[109][8] nq=$abc$109383$new_n46093_
 .subckt nand2_x0 i0=$abc$109383$new_n46093_ i1=$abc$109383$new_n43802_ nq=$abc$109383$new_n46094_
-.subckt ao22_x2 i0=soc.ram.ram[105][8] i1=$abc$109383$new_n43938_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n46095_
+.subckt and21nor_x1 i0=soc.ram.ram[105][8] i1=$abc$109383$new_n43938_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n46095_
 .subckt nand2_x0 i0=$abc$109383$new_n46095_ i1=$abc$109383$new_n46094_ nq=$abc$109383$new_n46096_
 .subckt nand3_x0 i0=$abc$109383$new_n46096_ i1=$abc$109383$new_n46092_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n46097_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[106][8] i1=soc.ram.ram[110][8] q=$abc$109383$new_n46098_
-.subckt oa22_x2 i0=$abc$109383$new_n44596_ i1=$abc$109383$new_n46098_ i2=$abc$109383$new_n44080_ q=$abc$109383$new_n46099_
-.subckt ao22_x2 i0=soc.ram.ram[107][8] i1=$abc$109383$new_n44838_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n46100_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[106][8] i1=soc.ram.ram[110][8] q=$abc$109383$new_n46098_
+.subckt or21nand_x1 i0=$abc$109383$new_n44596_ i1=$abc$109383$new_n46098_ i2=$abc$109383$new_n44080_ nq=$abc$109383$new_n46099_
+.subckt and21nor_x1 i0=soc.ram.ram[107][8] i1=$abc$109383$new_n44838_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n46100_
 .subckt inv_x0 i=soc.ram.ram[111][8] nq=$abc$109383$new_n46101_
 .subckt nand2_x0 i0=$abc$109383$new_n46101_ i1=$abc$109383$new_n43786_ nq=$abc$109383$new_n46102_
-.subckt oa22_x2 i0=$abc$109383$new_n46102_ i1=$abc$109383$new_n46100_ i2=$abc$109383$new_n46099_ q=$abc$109383$new_n46103_
+.subckt or21nand_x1 i0=$abc$109383$new_n46102_ i1=$abc$109383$new_n46100_ i2=$abc$109383$new_n46099_ nq=$abc$109383$new_n46103_
 .subckt nand3_x0 i0=$abc$109383$new_n46103_ i1=$abc$109383$new_n46097_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n46104_
-.subckt oa22_x2 i0=$abc$109383$new_n46104_ i1=$abc$109383$new_n46090_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n46105_
-.subckt a3_x2 i0=$abc$109383$new_n46105_ i1=$abc$109383$new_n46080_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n46106_
+.subckt or21nand_x1 i0=$abc$109383$new_n46104_ i1=$abc$109383$new_n46090_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n46105_
+.subckt and3_x1 i0=$abc$109383$new_n46105_ i1=$abc$109383$new_n46080_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n46106_
 .subckt nor2_x0 i0=$abc$109383$new_n46106_ i1=$abc$109383$new_n46055_ nq=$abc$109383$new_n46107_
-.subckt ao22_x2 i0=$abc$109383$new_n43591_ i1=$abc$109383$new_n46107_ i2=$abc$109383$new_n43778_ q=$abc$109383$new_n46108_
+.subckt and21nor_x1 i0=$abc$109383$new_n43591_ i1=$abc$109383$new_n46107_ i2=$abc$109383$new_n43778_ nq=$abc$109383$new_n46108_
 .subckt buf_x4 i=$abc$109383$new_n43715_ q=$abc$109383$new_n46109_
 .subckt inv_x0 i=soc.ram.ram[21][8] nq=$abc$109383$new_n46110_
 .subckt nand2_x0 i0=$abc$109383$new_n46110_ i1=$abc$109383$new_n44451_ nq=$abc$109383$new_n46111_
 .subckt buf_x4 i=$abc$109383$new_n44044_ q=$abc$109383$new_n46112_
 .subckt buf_x4 i=$abc$109383$new_n44187_ q=$abc$109383$new_n46113_
-.subckt ao22_x2 i0=soc.ram.ram[17][8] i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n46112_ q=$abc$109383$new_n46114_
+.subckt and21nor_x1 i0=soc.ram.ram[17][8] i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n46112_ nq=$abc$109383$new_n46114_
 .subckt nand2_x0 i0=$abc$109383$new_n46114_ i1=$abc$109383$new_n46111_ nq=$abc$109383$new_n46115_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[16][8] i1=soc.ram.ram[20][8] q=$abc$109383$new_n46116_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[16][8] i1=soc.ram.ram[20][8] q=$abc$109383$new_n46116_
 .subckt nand2_x0 i0=$abc$109383$new_n46116_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n46117_
 .subckt nand3_x0 i0=$abc$109383$new_n46117_ i1=$abc$109383$new_n46115_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n46118_
 .subckt buf_x4 i=$abc$109383$new_n44774_ q=$abc$109383$new_n46119_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[18][8] i1=soc.ram.ram[22][8] q=$abc$109383$new_n46120_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[18][8] i1=soc.ram.ram[22][8] q=$abc$109383$new_n46120_
 .subckt nand2_x0 i0=$abc$109383$new_n46120_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n46121_
 .subckt inv_x0 i=soc.ram.ram[23][8] nq=$abc$109383$new_n46122_
 .subckt nand2_x0 i0=$abc$109383$new_n46122_ i1=$abc$109383$new_n44634_ nq=$abc$109383$new_n46123_
-.subckt ao22_x2 i0=soc.ram.ram[19][8] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n46124_
+.subckt and21nor_x1 i0=soc.ram.ram[19][8] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n46124_
 .subckt nand2_x0 i0=$abc$109383$new_n46124_ i1=$abc$109383$new_n46123_ nq=$abc$109383$new_n46125_
 .subckt nand3_x0 i0=$abc$109383$new_n46125_ i1=$abc$109383$new_n46121_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n46126_
 .subckt nand3_x0 i0=$abc$109383$new_n46126_ i1=$abc$109383$new_n46118_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n46127_
 .subckt buf_x4 i=$abc$109383$new_n43616_ q=$abc$109383$new_n46128_
-.subckt mx2_x2 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[26][8] i1=soc.ram.ram[30][8] q=$abc$109383$new_n46129_
+.subckt mux2_x1 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[26][8] i1=soc.ram.ram[30][8] q=$abc$109383$new_n46129_
 .subckt nand2_x0 i0=$abc$109383$new_n46129_ i1=$abc$109383$new_n46128_ nq=$abc$109383$new_n46130_
 .subckt inv_x0 i=soc.ram.ram[31][8] nq=$abc$109383$new_n46131_
-.subckt a2_x2 i0=$abc$109383$new_n46131_ i1=$abc$109383$new_n43811_ q=$abc$109383$new_n46132_
-.subckt o2_x2 i0=soc.ram.ram[27][8] i1=$abc$109383$new_n43906_ q=$abc$109383$new_n46133_
+.subckt and2_x1 i0=$abc$109383$new_n46131_ i1=$abc$109383$new_n43811_ q=$abc$109383$new_n46132_
+.subckt or2_x1 i0=soc.ram.ram[27][8] i1=$abc$109383$new_n43906_ q=$abc$109383$new_n46133_
 .subckt nand2_x0 i0=$abc$109383$new_n46133_ i1=$abc$109383$new_n43791_ nq=$abc$109383$new_n46134_
-.subckt ao22_x2 i0=$abc$109383$new_n46134_ i1=$abc$109383$new_n46132_ i2=$abc$109383$new_n46130_ q=$abc$109383$new_n46135_
+.subckt and21nor_x1 i0=$abc$109383$new_n46134_ i1=$abc$109383$new_n46132_ i2=$abc$109383$new_n46130_ nq=$abc$109383$new_n46135_
 .subckt nand2_x0 i0=$abc$109383$new_n46135_ i1=$abc$109383$new_n45280_ nq=$abc$109383$new_n46136_
 .subckt buf_x4 i=$abc$109383$new_n43579_ q=$abc$109383$new_n46137_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[24][8] i1=soc.ram.ram[28][8] q=$abc$109383$new_n46138_
-.subckt oa22_x2 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n46138_ i2=$abc$109383$new_n46137_ q=$abc$109383$new_n46139_
-.subckt ao22_x2 i0=soc.ram.ram[25][8] i1=$abc$109383$new_n44500_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n46140_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[24][8] i1=soc.ram.ram[28][8] q=$abc$109383$new_n46138_
+.subckt or21nand_x1 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n46138_ i2=$abc$109383$new_n46137_ nq=$abc$109383$new_n46139_
+.subckt and21nor_x1 i0=soc.ram.ram[25][8] i1=$abc$109383$new_n44500_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n46140_
 .subckt inv_x0 i=soc.ram.ram[29][8] nq=$abc$109383$new_n46141_
 .subckt nand2_x0 i0=$abc$109383$new_n46141_ i1=$abc$109383$new_n44011_ nq=$abc$109383$new_n46142_
-.subckt oa22_x2 i0=$abc$109383$new_n46142_ i1=$abc$109383$new_n46140_ i2=$abc$109383$new_n46139_ q=$abc$109383$new_n46143_
+.subckt or21nand_x1 i0=$abc$109383$new_n46142_ i1=$abc$109383$new_n46140_ i2=$abc$109383$new_n46139_ nq=$abc$109383$new_n46143_
 .subckt nand3_x0 i0=$abc$109383$new_n46143_ i1=$abc$109383$new_n46136_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n46144_
-.subckt oa22_x2 i0=$abc$109383$new_n46144_ i1=$abc$109383$new_n46127_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n46145_
-.subckt mx2_x2 cmd=$abc$109383$new_n43825_ i0=soc.ram.ram[2][8] i1=soc.ram.ram[6][8] q=$abc$109383$new_n46146_
+.subckt or21nand_x1 i0=$abc$109383$new_n46144_ i1=$abc$109383$new_n46127_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n46145_
+.subckt mux2_x1 cmd=$abc$109383$new_n43825_ i0=soc.ram.ram[2][8] i1=soc.ram.ram[6][8] q=$abc$109383$new_n46146_
 .subckt nand2_x0 i0=$abc$109383$new_n46146_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46147_
-.subckt mx2_x2 cmd=$abc$109383$new_n43786_ i0=soc.ram.ram[3][8] i1=soc.ram.ram[7][8] q=$abc$109383$new_n46148_
+.subckt mux2_x1 cmd=$abc$109383$new_n43786_ i0=soc.ram.ram[3][8] i1=soc.ram.ram[7][8] q=$abc$109383$new_n46148_
 .subckt nand2_x0 i0=$abc$109383$new_n46148_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n46149_
 .subckt nand3_x0 i0=$abc$109383$new_n46149_ i1=$abc$109383$new_n46147_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n46150_
-.subckt mx2_x2 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[0][8] i1=soc.ram.ram[4][8] q=$abc$109383$new_n46151_
-.subckt mx2_x2 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[1][8] i1=soc.ram.ram[5][8] q=$abc$109383$new_n46152_
-.subckt mx2_x2 cmd=$abc$109383$new_n44103_ i0=$abc$109383$new_n46152_ i1=$abc$109383$new_n46151_ q=$abc$109383$new_n46153_
+.subckt mux2_x1 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[0][8] i1=soc.ram.ram[4][8] q=$abc$109383$new_n46151_
+.subckt mux2_x1 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[1][8] i1=soc.ram.ram[5][8] q=$abc$109383$new_n46152_
+.subckt mux2_x1 cmd=$abc$109383$new_n44103_ i0=$abc$109383$new_n46152_ i1=$abc$109383$new_n46151_ q=$abc$109383$new_n46153_
 .subckt buf_x4 i=$abc$109383$new_n46137_ q=$abc$109383$new_n46154_
-.subckt ao22_x2 i0=$abc$109383$new_n46154_ i1=$abc$109383$new_n46153_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n46155_
+.subckt and21nor_x1 i0=$abc$109383$new_n46154_ i1=$abc$109383$new_n46153_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n46155_
 .subckt nand2_x0 i0=$abc$109383$new_n46155_ i1=$abc$109383$new_n46150_ nq=$abc$109383$new_n46156_
-.subckt mx2_x2 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[8][8] i1=soc.ram.ram[12][8] q=$abc$109383$new_n46157_
+.subckt mux2_x1 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[8][8] i1=soc.ram.ram[12][8] q=$abc$109383$new_n46157_
 .subckt nand2_x0 i0=$abc$109383$new_n46157_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n46158_
 .subckt inv_x0 i=soc.ram.ram[13][8] nq=$abc$109383$new_n46159_
 .subckt nand2_x0 i0=$abc$109383$new_n46159_ i1=$abc$109383$new_n44017_ nq=$abc$109383$new_n46160_
-.subckt ao22_x2 i0=soc.ram.ram[9][8] i1=$abc$109383$new_n45668_ i2=$abc$109383$new_n43791_ q=$abc$109383$new_n46161_
+.subckt and21nor_x1 i0=soc.ram.ram[9][8] i1=$abc$109383$new_n45668_ i2=$abc$109383$new_n43791_ nq=$abc$109383$new_n46161_
 .subckt nand2_x0 i0=$abc$109383$new_n46161_ i1=$abc$109383$new_n46160_ nq=$abc$109383$new_n46162_
 .subckt nand3_x0 i0=$abc$109383$new_n46162_ i1=$abc$109383$new_n46158_ i2=$abc$109383$new_n44812_ nq=$abc$109383$new_n46163_
-.subckt mx2_x2 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[10][8] i1=soc.ram.ram[14][8] q=$abc$109383$new_n46164_
-.subckt oa22_x2 i0=$abc$109383$new_n43737_ i1=$abc$109383$new_n46164_ i2=$abc$109383$new_n43724_ q=$abc$109383$new_n46165_
-.subckt ao22_x2 i0=soc.ram.ram[11][8] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n46166_
+.subckt mux2_x1 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[10][8] i1=soc.ram.ram[14][8] q=$abc$109383$new_n46164_
+.subckt or21nand_x1 i0=$abc$109383$new_n43737_ i1=$abc$109383$new_n46164_ i2=$abc$109383$new_n43724_ nq=$abc$109383$new_n46165_
+.subckt and21nor_x1 i0=soc.ram.ram[11][8] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n46166_
 .subckt inv_x0 i=soc.ram.ram[15][8] nq=$abc$109383$new_n46167_
 .subckt nand2_x0 i0=$abc$109383$new_n46167_ i1=$abc$109383$new_n46113_ nq=$abc$109383$new_n46168_
-.subckt oa22_x2 i0=$abc$109383$new_n46168_ i1=$abc$109383$new_n46166_ i2=$abc$109383$new_n46165_ q=$abc$109383$new_n46169_
+.subckt or21nand_x1 i0=$abc$109383$new_n46168_ i1=$abc$109383$new_n46166_ i2=$abc$109383$new_n46165_ nq=$abc$109383$new_n46169_
 .subckt nand3_x0 i0=$abc$109383$new_n46169_ i1=$abc$109383$new_n46163_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n46170_
-.subckt oa22_x2 i0=$abc$109383$new_n46170_ i1=$abc$109383$new_n46156_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n46171_
+.subckt or21nand_x1 i0=$abc$109383$new_n46170_ i1=$abc$109383$new_n46156_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n46171_
 .subckt nand3_x0 i0=$abc$109383$new_n46171_ i1=$abc$109383$new_n46145_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n46172_
-.subckt mx2_x2 cmd=$abc$109383$new_n43477_ i0=soc.ram.ram[42][8] i1=soc.ram.ram[46][8] q=$abc$109383$new_n46173_
+.subckt mux2_x1 cmd=$abc$109383$new_n43477_ i0=soc.ram.ram[42][8] i1=soc.ram.ram[46][8] q=$abc$109383$new_n46173_
 .subckt nand2_x0 i0=$abc$109383$new_n46173_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n46174_
 .subckt buf_x4 i=$abc$109383$new_n45232_ q=$abc$109383$new_n46175_
-.subckt mx2_x2 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[43][8] i1=soc.ram.ram[47][8] q=$abc$109383$new_n46176_
+.subckt mux2_x1 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[43][8] i1=soc.ram.ram[47][8] q=$abc$109383$new_n46176_
 .subckt nand2_x0 i0=$abc$109383$new_n46176_ i1=$abc$109383$new_n46175_ nq=$abc$109383$new_n46177_
 .subckt nand3_x0 i0=$abc$109383$new_n46177_ i1=$abc$109383$new_n46174_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n46178_
-.subckt mx2_x2 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[40][8] i1=soc.ram.ram[44][8] q=$abc$109383$new_n46179_
+.subckt mux2_x1 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[40][8] i1=soc.ram.ram[44][8] q=$abc$109383$new_n46179_
 .subckt nand2_x0 i0=$abc$109383$new_n46179_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46180_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[41][8] i1=soc.ram.ram[45][8] q=$abc$109383$new_n46181_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[41][8] i1=soc.ram.ram[45][8] q=$abc$109383$new_n46181_
 .subckt nand2_x0 i0=$abc$109383$new_n46181_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n46182_
 .subckt nand3_x0 i0=$abc$109383$new_n46182_ i1=$abc$109383$new_n46180_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n46183_
 .subckt nand3_x0 i0=$abc$109383$new_n46183_ i1=$abc$109383$new_n46178_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n46184_
 .subckt inv_x0 i=soc.ram.ram[39][8] nq=$abc$109383$new_n46185_
 .subckt nand2_x0 i0=$abc$109383$new_n46185_ i1=$abc$109383$new_n43826_ nq=$abc$109383$new_n46186_
 .subckt buf_x4 i=$abc$109383$new_n44118_ q=$abc$109383$new_n46187_
-.subckt ao22_x2 i0=soc.ram.ram[35][8] i1=$abc$109383$new_n46187_ i2=$abc$109383$new_n43923_ q=$abc$109383$new_n46188_
+.subckt and21nor_x1 i0=soc.ram.ram[35][8] i1=$abc$109383$new_n46187_ i2=$abc$109383$new_n43923_ nq=$abc$109383$new_n46188_
 .subckt nand2_x0 i0=$abc$109383$new_n46188_ i1=$abc$109383$new_n46186_ nq=$abc$109383$new_n46189_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[34][8] i1=soc.ram.ram[38][8] q=$abc$109383$new_n46190_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[34][8] i1=soc.ram.ram[38][8] q=$abc$109383$new_n46190_
 .subckt nand2_x0 i0=$abc$109383$new_n46190_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n46191_
 .subckt nand3_x0 i0=$abc$109383$new_n46191_ i1=$abc$109383$new_n46189_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n46192_
 .subckt inv_x0 i=soc.ram.ram[37][8] nq=$abc$109383$new_n46193_
 .subckt nand2_x0 i0=$abc$109383$new_n46193_ i1=$abc$109383$new_n44930_ nq=$abc$109383$new_n46194_
-.subckt ao22_x2 i0=soc.ram.ram[33][8] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ q=$abc$109383$new_n46195_
+.subckt and21nor_x1 i0=soc.ram.ram[33][8] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ nq=$abc$109383$new_n46195_
 .subckt nand2_x0 i0=$abc$109383$new_n46195_ i1=$abc$109383$new_n46194_ nq=$abc$109383$new_n46196_
-.subckt mx2_x2 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[32][8] i1=soc.ram.ram[36][8] q=$abc$109383$new_n46197_
+.subckt mux2_x1 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[32][8] i1=soc.ram.ram[36][8] q=$abc$109383$new_n46197_
 .subckt nand2_x0 i0=$abc$109383$new_n46197_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n46198_
 .subckt nand3_x0 i0=$abc$109383$new_n46198_ i1=$abc$109383$new_n46196_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n46199_
 .subckt nand3_x0 i0=$abc$109383$new_n46199_ i1=$abc$109383$new_n46192_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n46200_
-.subckt oa22_x2 i0=$abc$109383$new_n46200_ i1=$abc$109383$new_n46184_ i2=$abc$109383$new_n43783_ q=$abc$109383$new_n46201_
-.subckt mx2_x2 cmd=$abc$109383$new_n45265_ i0=soc.ram.ram[58][8] i1=soc.ram.ram[62][8] q=$abc$109383$new_n46202_
+.subckt or21nand_x1 i0=$abc$109383$new_n46200_ i1=$abc$109383$new_n46184_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n46201_
+.subckt mux2_x1 cmd=$abc$109383$new_n45265_ i0=soc.ram.ram[58][8] i1=soc.ram.ram[62][8] q=$abc$109383$new_n46202_
 .subckt nand2_x0 i0=$abc$109383$new_n46202_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46203_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[59][8] i1=soc.ram.ram[63][8] q=$abc$109383$new_n46204_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[59][8] i1=soc.ram.ram[63][8] q=$abc$109383$new_n46204_
 .subckt nand2_x0 i0=$abc$109383$new_n46204_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n46205_
 .subckt nand3_x0 i0=$abc$109383$new_n46205_ i1=$abc$109383$new_n46203_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n46206_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[56][8] i1=soc.ram.ram[60][8] q=$abc$109383$new_n46207_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[56][8] i1=soc.ram.ram[60][8] q=$abc$109383$new_n46207_
 .subckt nand2_x0 i0=$abc$109383$new_n46207_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n46208_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[57][8] i1=soc.ram.ram[61][8] q=$abc$109383$new_n46209_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[57][8] i1=soc.ram.ram[61][8] q=$abc$109383$new_n46209_
 .subckt nand2_x0 i0=$abc$109383$new_n46209_ i1=$abc$109383$new_n43963_ nq=$abc$109383$new_n46210_
 .subckt nand3_x0 i0=$abc$109383$new_n46210_ i1=$abc$109383$new_n46208_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n46211_
 .subckt nand3_x0 i0=$abc$109383$new_n46211_ i1=$abc$109383$new_n46206_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n46212_
 .subckt inv_x0 i=soc.ram.ram[53][8] nq=$abc$109383$new_n46213_
 .subckt nand2_x0 i0=$abc$109383$new_n46213_ i1=$abc$109383$new_n44930_ nq=$abc$109383$new_n46214_
-.subckt ao22_x2 i0=soc.ram.ram[49][8] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ q=$abc$109383$new_n46215_
+.subckt and21nor_x1 i0=soc.ram.ram[49][8] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ nq=$abc$109383$new_n46215_
 .subckt nand2_x0 i0=$abc$109383$new_n46215_ i1=$abc$109383$new_n46214_ nq=$abc$109383$new_n46216_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[48][8] i1=soc.ram.ram[52][8] q=$abc$109383$new_n46217_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[48][8] i1=soc.ram.ram[52][8] q=$abc$109383$new_n46217_
 .subckt nand2_x0 i0=$abc$109383$new_n46217_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n46218_
 .subckt nand3_x0 i0=$abc$109383$new_n46218_ i1=$abc$109383$new_n46216_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n46219_
 .subckt inv_x0 i=soc.ram.ram[55][8] nq=$abc$109383$new_n46220_
 .subckt nand2_x0 i0=$abc$109383$new_n46220_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n46221_
-.subckt ao22_x2 i0=soc.ram.ram[51][8] i1=$abc$109383$new_n44234_ i2=$abc$109383$new_n44505_ q=$abc$109383$new_n46222_
+.subckt and21nor_x1 i0=soc.ram.ram[51][8] i1=$abc$109383$new_n44234_ i2=$abc$109383$new_n44505_ nq=$abc$109383$new_n46222_
 .subckt nand2_x0 i0=$abc$109383$new_n46222_ i1=$abc$109383$new_n46221_ nq=$abc$109383$new_n46223_
-.subckt mx2_x2 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[50][8] i1=soc.ram.ram[54][8] q=$abc$109383$new_n46224_
+.subckt mux2_x1 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[50][8] i1=soc.ram.ram[54][8] q=$abc$109383$new_n46224_
 .subckt nand2_x0 i0=$abc$109383$new_n46224_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n46225_
 .subckt nand3_x0 i0=$abc$109383$new_n46225_ i1=$abc$109383$new_n46223_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n46226_
 .subckt nand3_x0 i0=$abc$109383$new_n46226_ i1=$abc$109383$new_n46219_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n46227_
-.subckt oa22_x2 i0=$abc$109383$new_n46227_ i1=$abc$109383$new_n46212_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n46228_
+.subckt or21nand_x1 i0=$abc$109383$new_n46227_ i1=$abc$109383$new_n46212_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n46228_
 .subckt nand3_x0 i0=$abc$109383$new_n46228_ i1=$abc$109383$new_n46201_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n46229_
-.subckt oa22_x2 i0=$abc$109383$new_n46229_ i1=$abc$109383$new_n46172_ i2=$abc$109383$new_n43587_ q=$abc$109383$new_n46230_
-.subckt oa22_x2 i0=$abc$109383$new_n46230_ i1=$abc$109383$new_n46108_ i2=$abc$109383$new_n46002_ q=$abc$109383$new_n46231_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n46231_ i2=$abc$109383$new_n45985_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103230
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[9] q=$abc$109383$new_n46233_
-.subckt a2_x2 i0=$abc$109383$new_n46233_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n46234_
+.subckt or21nand_x1 i0=$abc$109383$new_n46229_ i1=$abc$109383$new_n46172_ i2=$abc$109383$new_n43587_ nq=$abc$109383$new_n46230_
+.subckt or21nand_x1 i0=$abc$109383$new_n46230_ i1=$abc$109383$new_n46108_ i2=$abc$109383$new_n46002_ nq=$abc$109383$new_n46231_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n46231_ i2=$abc$109383$new_n45985_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103230
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[9] nq=$abc$109383$new_n46233_
+.subckt and2_x1 i0=$abc$109383$new_n46233_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n46234_
 .subckt buf_x4 i=$abc$109383$new_n14897_ q=$abc$109383$new_n46235_
 .subckt buf_x4 i=$abc$109383$new_n14906_ q=$abc$109383$new_n46236_
 .subckt buf_x4 i=$abc$109383$new_n14915_ q=$abc$109383$new_n46237_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[9] nq=$abc$109383$new_n46238_
 .subckt nand3_x0 i0=$abc$109383$new_n27466_ i1=$abc$109383$new_n19691_ i2=soc.bridge.csr_bridge_1.wb__dat_r[9] nq=$abc$109383$new_n46239_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n46240_
-.subckt o2_x2 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n46240_ q=$abc$109383$new_n46241_
+.subckt or2_x1 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n46240_ q=$abc$109383$new_n46241_
 .subckt nand2_x0 i0=$abc$109383$new_n46241_ i1=$abc$109383$new_n46239_ nq=$abc$109383$new_n46242_
 .subckt nand4_x0 i0=$abc$109383$new_n46242_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n46243_
-.subckt a2_x2 i0=$abc$109383$new_n46243_ i1=$abc$109383$new_n46238_ q=$abc$109383$new_n46244_
+.subckt and2_x1 i0=$abc$109383$new_n46243_ i1=$abc$109383$new_n46238_ q=$abc$109383$new_n46244_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n46245_
-.subckt ao22_x2 i0=$abc$109383$new_n46245_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n46244_ q=$abc$109383$new_n46246_
+.subckt and21nor_x1 i0=$abc$109383$new_n46245_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n46244_ nq=$abc$109383$new_n46246_
 .subckt inv_x0 i=soc.hyperram.sr[9] nq=$abc$109383$new_n46247_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n46247_ q=$abc$109383$new_n46248_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n46247_ q=$abc$109383$new_n46248_
 .subckt nand2_x0 i0=$abc$109383$new_n45170_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n46249_
 .subckt nand2_x0 i0=$abc$109383$new_n27645_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n46250_
-.subckt ao22_x2 i0=$abc$109383$new_n28563_ i1=$abc$109383$new_n46250_ i2=$abc$109383$new_n46249_ q=$abc$109383$new_n46251_
+.subckt and21nor_x1 i0=$abc$109383$new_n28563_ i1=$abc$109383$new_n46250_ i2=$abc$109383$new_n46249_ nq=$abc$109383$new_n46251_
 .subckt nand3_x0 i0=$abc$109383$new_n46251_ i1=$abc$109383$new_n46248_ i2=$abc$109383$new_n46246_ nq=$abc$109383$new_n46252_
-.subckt mx2_x2 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[24][9] i1=soc.ram.ram[28][9] q=$abc$109383$new_n46253_
+.subckt mux2_x1 cmd=$abc$109383$new_n43915_ i0=soc.ram.ram[24][9] i1=soc.ram.ram[28][9] q=$abc$109383$new_n46253_
 .subckt nand2_x0 i0=$abc$109383$new_n46253_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n46254_
 .subckt inv_x0 i=soc.ram.ram[29][9] nq=$abc$109383$new_n46255_
 .subckt nand2_x0 i0=$abc$109383$new_n46255_ i1=$abc$109383$new_n43852_ nq=$abc$109383$new_n46256_
-.subckt ao22_x2 i0=soc.ram.ram[25][9] i1=$abc$109383$new_n43954_ i2=$abc$109383$new_n44945_ q=$abc$109383$new_n46257_
+.subckt and21nor_x1 i0=soc.ram.ram[25][9] i1=$abc$109383$new_n43954_ i2=$abc$109383$new_n44945_ nq=$abc$109383$new_n46257_
 .subckt nand2_x0 i0=$abc$109383$new_n46257_ i1=$abc$109383$new_n46256_ nq=$abc$109383$new_n46258_
 .subckt nand3_x0 i0=$abc$109383$new_n46258_ i1=$abc$109383$new_n46254_ i2=$abc$109383$new_n45016_ nq=$abc$109383$new_n46259_
-.subckt ao22_x2 i0=soc.ram.ram[27][9] i1=$abc$109383$new_n44500_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n46260_
-.subckt ao22_x2 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[31][9] i2=$abc$109383$new_n46260_ q=$abc$109383$new_n46261_
-.subckt mx2_x2 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[26][9] i1=soc.ram.ram[30][9] q=$abc$109383$new_n46262_
-.subckt oa22_x2 i0=$abc$109383$new_n44597_ i1=$abc$109383$new_n46262_ i2=$abc$109383$new_n44381_ q=$abc$109383$new_n46263_
-.subckt ao22_x2 i0=$abc$109383$new_n46263_ i1=$abc$109383$new_n46261_ i2=$abc$109383$new_n44767_ q=$abc$109383$new_n46264_
+.subckt and21nor_x1 i0=soc.ram.ram[27][9] i1=$abc$109383$new_n44500_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n46260_
+.subckt and21nor_x1 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[31][9] i2=$abc$109383$new_n46260_ nq=$abc$109383$new_n46261_
+.subckt mux2_x1 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[26][9] i1=soc.ram.ram[30][9] q=$abc$109383$new_n46262_
+.subckt or21nand_x1 i0=$abc$109383$new_n44597_ i1=$abc$109383$new_n46262_ i2=$abc$109383$new_n44381_ nq=$abc$109383$new_n46263_
+.subckt and21nor_x1 i0=$abc$109383$new_n46263_ i1=$abc$109383$new_n46261_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n46264_
 .subckt nand2_x0 i0=$abc$109383$new_n46264_ i1=$abc$109383$new_n46259_ nq=$abc$109383$new_n46265_
-.subckt mx2_x2 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[16][9] i1=soc.ram.ram[20][9] q=$abc$109383$new_n46266_
-.subckt mx2_x2 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[17][9] i1=soc.ram.ram[21][9] q=$abc$109383$new_n46267_
-.subckt mx2_x2 cmd=$abc$109383$new_n44562_ i0=$abc$109383$new_n46267_ i1=$abc$109383$new_n46266_ q=$abc$109383$new_n46268_
-.subckt o2_x2 i0=$abc$109383$new_n46268_ i1=$abc$109383$new_n44622_ q=$abc$109383$new_n46269_
-.subckt mx2_x2 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[18][9] i1=soc.ram.ram[22][9] q=$abc$109383$new_n46270_
-.subckt a2_x2 i0=$abc$109383$new_n46270_ i1=$abc$109383$new_n44597_ q=$abc$109383$new_n46271_
-.subckt ao22_x2 i0=soc.ram.ram[19][9] i1=$abc$109383$new_n44202_ i2=$abc$109383$new_n44504_ q=$abc$109383$new_n46272_
-.subckt ao22_x2 i0=$abc$109383$new_n45157_ i1=soc.ram.ram[23][9] i2=$abc$109383$new_n46272_ q=$abc$109383$new_n46273_
-.subckt o3_x2 i0=$abc$109383$new_n46273_ i1=$abc$109383$new_n46271_ i2=$abc$109383$new_n45629_ q=$abc$109383$new_n46274_
+.subckt mux2_x1 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[16][9] i1=soc.ram.ram[20][9] q=$abc$109383$new_n46266_
+.subckt mux2_x1 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[17][9] i1=soc.ram.ram[21][9] q=$abc$109383$new_n46267_
+.subckt mux2_x1 cmd=$abc$109383$new_n44562_ i0=$abc$109383$new_n46267_ i1=$abc$109383$new_n46266_ q=$abc$109383$new_n46268_
+.subckt or2_x1 i0=$abc$109383$new_n46268_ i1=$abc$109383$new_n44622_ q=$abc$109383$new_n46269_
+.subckt mux2_x1 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[18][9] i1=soc.ram.ram[22][9] q=$abc$109383$new_n46270_
+.subckt and2_x1 i0=$abc$109383$new_n46270_ i1=$abc$109383$new_n44597_ q=$abc$109383$new_n46271_
+.subckt and21nor_x1 i0=soc.ram.ram[19][9] i1=$abc$109383$new_n44202_ i2=$abc$109383$new_n44504_ nq=$abc$109383$new_n46272_
+.subckt and21nor_x1 i0=$abc$109383$new_n45157_ i1=soc.ram.ram[23][9] i2=$abc$109383$new_n46272_ nq=$abc$109383$new_n46273_
+.subckt or3_x1 i0=$abc$109383$new_n46273_ i1=$abc$109383$new_n46271_ i2=$abc$109383$new_n45629_ q=$abc$109383$new_n46274_
 .subckt nand3_x0 i0=$abc$109383$new_n46274_ i1=$abc$109383$new_n46269_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n46275_
-.subckt oa22_x2 i0=$abc$109383$new_n46275_ i1=$abc$109383$new_n46265_ i2=$abc$109383$new_n43413_ q=$abc$109383$new_n46276_
-.subckt mx2_x2 cmd=$abc$109383$new_n43851_ i0=soc.ram.ram[3][9] i1=soc.ram.ram[7][9] q=$abc$109383$new_n46277_
+.subckt or21nand_x1 i0=$abc$109383$new_n46275_ i1=$abc$109383$new_n46265_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n46276_
+.subckt mux2_x1 cmd=$abc$109383$new_n43851_ i0=soc.ram.ram[3][9] i1=soc.ram.ram[7][9] q=$abc$109383$new_n46277_
 .subckt nand2_x0 i0=$abc$109383$new_n46277_ i1=$abc$109383$new_n44725_ nq=$abc$109383$new_n46278_
-.subckt mx2_x2 cmd=$abc$109383$new_n43907_ i0=soc.ram.ram[2][9] i1=soc.ram.ram[6][9] q=$abc$109383$new_n46279_
+.subckt mux2_x1 cmd=$abc$109383$new_n43907_ i0=soc.ram.ram[2][9] i1=soc.ram.ram[6][9] q=$abc$109383$new_n46279_
 .subckt nand2_x0 i0=$abc$109383$new_n46279_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n46280_
 .subckt nand3_x0 i0=$abc$109383$new_n46280_ i1=$abc$109383$new_n46278_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n46281_
-.subckt mx2_x2 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[1][9] i1=soc.ram.ram[5][9] q=$abc$109383$new_n46282_
-.subckt mx2_x2 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[0][9] i1=soc.ram.ram[4][9] q=$abc$109383$new_n46283_
-.subckt mx2_x2 cmd=$abc$109383$new_n43962_ i0=$abc$109383$new_n46283_ i1=$abc$109383$new_n46282_ q=$abc$109383$new_n46284_
-.subckt ao22_x2 i0=$abc$109383$new_n45604_ i1=$abc$109383$new_n46284_ i2=$abc$109383$new_n45070_ q=$abc$109383$new_n46285_
+.subckt mux2_x1 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[1][9] i1=soc.ram.ram[5][9] q=$abc$109383$new_n46282_
+.subckt mux2_x1 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[0][9] i1=soc.ram.ram[4][9] q=$abc$109383$new_n46283_
+.subckt mux2_x1 cmd=$abc$109383$new_n43962_ i0=$abc$109383$new_n46283_ i1=$abc$109383$new_n46282_ q=$abc$109383$new_n46284_
+.subckt and21nor_x1 i0=$abc$109383$new_n45604_ i1=$abc$109383$new_n46284_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n46285_
 .subckt nand2_x0 i0=$abc$109383$new_n46285_ i1=$abc$109383$new_n46281_ nq=$abc$109383$new_n46286_
 .subckt inv_x0 i=soc.ram.ram[15][9] nq=$abc$109383$new_n46287_
 .subckt nand2_x0 i0=$abc$109383$new_n46287_ i1=$abc$109383$new_n43908_ nq=$abc$109383$new_n46288_
-.subckt ao22_x2 i0=soc.ram.ram[11][9] i1=$abc$109383$new_n43978_ i2=$abc$109383$new_n43992_ q=$abc$109383$new_n46289_
+.subckt and21nor_x1 i0=soc.ram.ram[11][9] i1=$abc$109383$new_n43978_ i2=$abc$109383$new_n43992_ nq=$abc$109383$new_n46289_
 .subckt nand2_x0 i0=$abc$109383$new_n46289_ i1=$abc$109383$new_n46288_ nq=$abc$109383$new_n46290_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[10][9] i1=soc.ram.ram[14][9] q=$abc$109383$new_n46291_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[10][9] i1=soc.ram.ram[14][9] q=$abc$109383$new_n46291_
 .subckt nand2_x0 i0=$abc$109383$new_n46291_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n46292_
-.subckt a2_x2 i0=$abc$109383$new_n46292_ i1=$abc$109383$new_n44905_ q=$abc$109383$new_n46293_
+.subckt and2_x1 i0=$abc$109383$new_n46292_ i1=$abc$109383$new_n44905_ q=$abc$109383$new_n46293_
 .subckt nand2_x0 i0=$abc$109383$new_n46293_ i1=$abc$109383$new_n46290_ nq=$abc$109383$new_n46294_
-.subckt mx2_x2 cmd=$abc$109383$new_n45445_ i0=soc.ram.ram[8][9] i1=soc.ram.ram[12][9] q=$abc$109383$new_n46295_
+.subckt mux2_x1 cmd=$abc$109383$new_n45445_ i0=soc.ram.ram[8][9] i1=soc.ram.ram[12][9] q=$abc$109383$new_n46295_
 .subckt nand2_x0 i0=$abc$109383$new_n46295_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n46296_
 .subckt inv_x0 i=soc.ram.ram[13][9] nq=$abc$109383$new_n46297_
 .subckt nand2_x0 i0=$abc$109383$new_n46297_ i1=$abc$109383$new_n44600_ nq=$abc$109383$new_n46298_
-.subckt ao22_x2 i0=soc.ram.ram[9][9] i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43890_ q=$abc$109383$new_n46299_
+.subckt and21nor_x1 i0=soc.ram.ram[9][9] i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43890_ nq=$abc$109383$new_n46299_
 .subckt nand2_x0 i0=$abc$109383$new_n46299_ i1=$abc$109383$new_n46298_ nq=$abc$109383$new_n46300_
 .subckt nand3_x0 i0=$abc$109383$new_n46300_ i1=$abc$109383$new_n46296_ i2=$abc$109383$new_n44494_ nq=$abc$109383$new_n46301_
 .subckt nand3_x0 i0=$abc$109383$new_n46301_ i1=$abc$109383$new_n46294_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n46302_
-.subckt oa22_x2 i0=$abc$109383$new_n46302_ i1=$abc$109383$new_n46286_ i2=$abc$109383$new_n43541_ q=$abc$109383$new_n46303_
+.subckt or21nand_x1 i0=$abc$109383$new_n46302_ i1=$abc$109383$new_n46286_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n46303_
 .subckt nand3_x0 i0=$abc$109383$new_n46303_ i1=$abc$109383$new_n46276_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n46304_
-.subckt mx2_x2 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[58][9] i1=soc.ram.ram[62][9] q=$abc$109383$new_n46305_
+.subckt mux2_x1 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[58][9] i1=soc.ram.ram[62][9] q=$abc$109383$new_n46305_
 .subckt nand2_x0 i0=$abc$109383$new_n46305_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n46306_
-.subckt mx2_x2 cmd=$abc$109383$new_n44088_ i0=soc.ram.ram[59][9] i1=soc.ram.ram[63][9] q=$abc$109383$new_n46307_
+.subckt mux2_x1 cmd=$abc$109383$new_n44088_ i0=soc.ram.ram[59][9] i1=soc.ram.ram[63][9] q=$abc$109383$new_n46307_
 .subckt nand2_x0 i0=$abc$109383$new_n46307_ i1=$abc$109383$new_n44590_ nq=$abc$109383$new_n46308_
 .subckt nand3_x0 i0=$abc$109383$new_n46308_ i1=$abc$109383$new_n46306_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n46309_
-.subckt mx2_x2 cmd=$abc$109383$new_n44088_ i0=soc.ram.ram[56][9] i1=soc.ram.ram[60][9] q=$abc$109383$new_n46310_
+.subckt mux2_x1 cmd=$abc$109383$new_n44088_ i0=soc.ram.ram[56][9] i1=soc.ram.ram[60][9] q=$abc$109383$new_n46310_
 .subckt nand2_x0 i0=$abc$109383$new_n46310_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n46311_
-.subckt mx2_x2 cmd=$abc$109383$new_n44586_ i0=soc.ram.ram[57][9] i1=soc.ram.ram[61][9] q=$abc$109383$new_n46312_
+.subckt mux2_x1 cmd=$abc$109383$new_n44586_ i0=soc.ram.ram[57][9] i1=soc.ram.ram[61][9] q=$abc$109383$new_n46312_
 .subckt nand2_x0 i0=$abc$109383$new_n46312_ i1=$abc$109383$new_n44627_ nq=$abc$109383$new_n46313_
 .subckt nand3_x0 i0=$abc$109383$new_n46313_ i1=$abc$109383$new_n46311_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n46314_
 .subckt nand3_x0 i0=$abc$109383$new_n46314_ i1=$abc$109383$new_n46309_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n46315_
 .subckt inv_x0 i=soc.ram.ram[53][9] nq=$abc$109383$new_n46316_
 .subckt nand2_x0 i0=$abc$109383$new_n46316_ i1=$abc$109383$new_n43927_ nq=$abc$109383$new_n46317_
-.subckt ao22_x2 i0=soc.ram.ram[49][9] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44065_ q=$abc$109383$new_n46318_
+.subckt and21nor_x1 i0=soc.ram.ram[49][9] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44065_ nq=$abc$109383$new_n46318_
 .subckt nand2_x0 i0=$abc$109383$new_n46318_ i1=$abc$109383$new_n46317_ nq=$abc$109383$new_n46319_
-.subckt mx2_x2 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[48][9] i1=soc.ram.ram[52][9] q=$abc$109383$new_n46320_
+.subckt mux2_x1 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[48][9] i1=soc.ram.ram[52][9] q=$abc$109383$new_n46320_
 .subckt nand2_x0 i0=$abc$109383$new_n46320_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n46321_
 .subckt nand3_x0 i0=$abc$109383$new_n46321_ i1=$abc$109383$new_n46319_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n46322_
 .subckt buf_x4 i=$abc$109383$new_n45082_ q=$abc$109383$new_n46323_
 .subckt inv_x0 i=soc.ram.ram[55][9] nq=$abc$109383$new_n46324_
 .subckt nand2_x0 i0=$abc$109383$new_n46324_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n46325_
-.subckt ao22_x2 i0=soc.ram.ram[51][9] i1=$abc$109383$new_n43802_ i2=$abc$109383$new_n43798_ q=$abc$109383$new_n46326_
+.subckt and21nor_x1 i0=soc.ram.ram[51][9] i1=$abc$109383$new_n43802_ i2=$abc$109383$new_n43798_ nq=$abc$109383$new_n46326_
 .subckt nand2_x0 i0=$abc$109383$new_n46326_ i1=$abc$109383$new_n46325_ nq=$abc$109383$new_n46327_
-.subckt mx2_x2 cmd=$abc$109383$new_n43825_ i0=soc.ram.ram[50][9] i1=soc.ram.ram[54][9] q=$abc$109383$new_n46328_
+.subckt mux2_x1 cmd=$abc$109383$new_n43825_ i0=soc.ram.ram[50][9] i1=soc.ram.ram[54][9] q=$abc$109383$new_n46328_
 .subckt nand2_x0 i0=$abc$109383$new_n46328_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46329_
 .subckt nand3_x0 i0=$abc$109383$new_n46329_ i1=$abc$109383$new_n46327_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n46330_
 .subckt nand3_x0 i0=$abc$109383$new_n46330_ i1=$abc$109383$new_n46322_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n46331_
-.subckt oa22_x2 i0=$abc$109383$new_n46331_ i1=$abc$109383$new_n46315_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n46332_
-.subckt mx2_x2 cmd=$abc$109383$new_n44088_ i0=soc.ram.ram[42][9] i1=soc.ram.ram[46][9] q=$abc$109383$new_n46333_
+.subckt or21nand_x1 i0=$abc$109383$new_n46331_ i1=$abc$109383$new_n46315_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n46332_
+.subckt mux2_x1 cmd=$abc$109383$new_n44088_ i0=soc.ram.ram[42][9] i1=soc.ram.ram[46][9] q=$abc$109383$new_n46333_
 .subckt nand2_x0 i0=$abc$109383$new_n46333_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n46334_
-.subckt mx2_x2 cmd=$abc$109383$new_n44586_ i0=soc.ram.ram[43][9] i1=soc.ram.ram[47][9] q=$abc$109383$new_n46335_
+.subckt mux2_x1 cmd=$abc$109383$new_n44586_ i0=soc.ram.ram[43][9] i1=soc.ram.ram[47][9] q=$abc$109383$new_n46335_
 .subckt nand2_x0 i0=$abc$109383$new_n46335_ i1=$abc$109383$new_n44627_ nq=$abc$109383$new_n46336_
 .subckt nand3_x0 i0=$abc$109383$new_n46336_ i1=$abc$109383$new_n46334_ i2=$abc$109383$new_n43935_ nq=$abc$109383$new_n46337_
-.subckt mx2_x2 cmd=$abc$109383$new_n44586_ i0=soc.ram.ram[40][9] i1=soc.ram.ram[44][9] q=$abc$109383$new_n46338_
+.subckt mux2_x1 cmd=$abc$109383$new_n44586_ i0=soc.ram.ram[40][9] i1=soc.ram.ram[44][9] q=$abc$109383$new_n46338_
 .subckt nand2_x0 i0=$abc$109383$new_n46338_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n46339_
-.subckt mx2_x2 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[41][9] i1=soc.ram.ram[45][9] q=$abc$109383$new_n46340_
+.subckt mux2_x1 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[41][9] i1=soc.ram.ram[45][9] q=$abc$109383$new_n46340_
 .subckt nand2_x0 i0=$abc$109383$new_n46340_ i1=$abc$109383$new_n43924_ nq=$abc$109383$new_n46341_
 .subckt nand3_x0 i0=$abc$109383$new_n46341_ i1=$abc$109383$new_n46339_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n46342_
 .subckt nand3_x0 i0=$abc$109383$new_n46342_ i1=$abc$109383$new_n46337_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n46343_
 .subckt inv_x0 i=soc.ram.ram[39][9] nq=$abc$109383$new_n46344_
 .subckt nand2_x0 i0=$abc$109383$new_n46344_ i1=$abc$109383$new_n43966_ nq=$abc$109383$new_n46345_
-.subckt ao22_x2 i0=soc.ram.ram[35][9] i1=$abc$109383$new_n43802_ i2=$abc$109383$new_n44001_ q=$abc$109383$new_n46346_
+.subckt and21nor_x1 i0=soc.ram.ram[35][9] i1=$abc$109383$new_n43802_ i2=$abc$109383$new_n44001_ nq=$abc$109383$new_n46346_
 .subckt nand2_x0 i0=$abc$109383$new_n46346_ i1=$abc$109383$new_n46345_ nq=$abc$109383$new_n46347_
-.subckt mx2_x2 cmd=$abc$109383$new_n44450_ i0=soc.ram.ram[34][9] i1=soc.ram.ram[38][9] q=$abc$109383$new_n46348_
+.subckt mux2_x1 cmd=$abc$109383$new_n44450_ i0=soc.ram.ram[34][9] i1=soc.ram.ram[38][9] q=$abc$109383$new_n46348_
 .subckt nand2_x0 i0=$abc$109383$new_n46348_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46349_
 .subckt nand3_x0 i0=$abc$109383$new_n46349_ i1=$abc$109383$new_n46347_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n46350_
 .subckt inv_x0 i=soc.ram.ram[37][9] nq=$abc$109383$new_n46351_
 .subckt nand2_x0 i0=$abc$109383$new_n46351_ i1=$abc$109383$new_n44600_ nq=$abc$109383$new_n46352_
-.subckt ao22_x2 i0=soc.ram.ram[33][9] i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43890_ q=$abc$109383$new_n46353_
+.subckt and21nor_x1 i0=soc.ram.ram[33][9] i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43890_ nq=$abc$109383$new_n46353_
 .subckt nand2_x0 i0=$abc$109383$new_n46353_ i1=$abc$109383$new_n46352_ nq=$abc$109383$new_n46354_
-.subckt mx2_x2 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[32][9] i1=soc.ram.ram[36][9] q=$abc$109383$new_n46355_
+.subckt mux2_x1 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[32][9] i1=soc.ram.ram[36][9] q=$abc$109383$new_n46355_
 .subckt nand2_x0 i0=$abc$109383$new_n46355_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n46356_
 .subckt nand3_x0 i0=$abc$109383$new_n46356_ i1=$abc$109383$new_n46354_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n46357_
 .subckt nand3_x0 i0=$abc$109383$new_n46357_ i1=$abc$109383$new_n46350_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n46358_
-.subckt oa22_x2 i0=$abc$109383$new_n46358_ i1=$abc$109383$new_n46343_ i2=$abc$109383$new_n43541_ q=$abc$109383$new_n46359_
+.subckt or21nand_x1 i0=$abc$109383$new_n46358_ i1=$abc$109383$new_n46343_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n46359_
 .subckt nand3_x0 i0=$abc$109383$new_n46359_ i1=$abc$109383$new_n46332_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n46360_
-.subckt oa22_x2 i0=$abc$109383$new_n46360_ i1=$abc$109383$new_n46304_ i2=$abc$109383$new_n43587_ q=$abc$109383$new_n46361_
+.subckt or21nand_x1 i0=$abc$109383$new_n46360_ i1=$abc$109383$new_n46304_ i2=$abc$109383$new_n43587_ nq=$abc$109383$new_n46361_
 .subckt inv_x0 i=soc.ram.ram[87][9] nq=$abc$109383$new_n46362_
 .subckt nand2_x0 i0=$abc$109383$new_n46362_ i1=$abc$109383$new_n43861_ nq=$abc$109383$new_n46363_
-.subckt ao22_x2 i0=soc.ram.ram[83][9] i1=$abc$109383$new_n43829_ i2=$abc$109383$new_n43914_ q=$abc$109383$new_n46364_
+.subckt and21nor_x1 i0=soc.ram.ram[83][9] i1=$abc$109383$new_n43829_ i2=$abc$109383$new_n43914_ nq=$abc$109383$new_n46364_
 .subckt nand2_x0 i0=$abc$109383$new_n46364_ i1=$abc$109383$new_n46363_ nq=$abc$109383$new_n46365_
-.subckt mx2_x2 cmd=$abc$109383$new_n45082_ i0=soc.ram.ram[82][9] i1=soc.ram.ram[86][9] q=$abc$109383$new_n46366_
+.subckt mux2_x1 cmd=$abc$109383$new_n45082_ i0=soc.ram.ram[82][9] i1=soc.ram.ram[86][9] q=$abc$109383$new_n46366_
 .subckt nand2_x0 i0=$abc$109383$new_n46366_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n46367_
 .subckt nand3_x0 i0=$abc$109383$new_n46367_ i1=$abc$109383$new_n46365_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n46368_
-.subckt ao22_x2 i0=soc.ram.ram[91][9] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n46369_
+.subckt and21nor_x1 i0=soc.ram.ram[91][9] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n46369_
 .subckt buf_x4 i=$abc$109383$new_n44778_ q=$abc$109383$new_n46370_
-.subckt ao22_x2 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[95][9] i2=$abc$109383$new_n46369_ q=$abc$109383$new_n46371_
-.subckt mx2_x2 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[90][9] i1=soc.ram.ram[94][9] q=$abc$109383$new_n46372_
-.subckt oa22_x2 i0=$abc$109383$new_n43595_ i1=$abc$109383$new_n46372_ i2=$abc$109383$new_n43712_ q=$abc$109383$new_n46373_
-.subckt ao22_x2 i0=$abc$109383$new_n46373_ i1=$abc$109383$new_n46371_ i2=$abc$109383$new_n45320_ q=$abc$109383$new_n46374_
+.subckt and21nor_x1 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[95][9] i2=$abc$109383$new_n46369_ nq=$abc$109383$new_n46371_
+.subckt mux2_x1 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[90][9] i1=soc.ram.ram[94][9] q=$abc$109383$new_n46372_
+.subckt or21nand_x1 i0=$abc$109383$new_n43595_ i1=$abc$109383$new_n46372_ i2=$abc$109383$new_n43712_ nq=$abc$109383$new_n46373_
+.subckt and21nor_x1 i0=$abc$109383$new_n46373_ i1=$abc$109383$new_n46371_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n46374_
 .subckt nand2_x0 i0=$abc$109383$new_n46374_ i1=$abc$109383$new_n46368_ nq=$abc$109383$new_n46375_
 .subckt inv_x0 i=soc.ram.ram[93][9] nq=$abc$109383$new_n46376_
 .subckt nand2_x0 i0=$abc$109383$new_n46376_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n46377_
-.subckt ao22_x2 i0=soc.ram.ram[89][9] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ q=$abc$109383$new_n46378_
+.subckt and21nor_x1 i0=soc.ram.ram[89][9] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ nq=$abc$109383$new_n46378_
 .subckt nand2_x0 i0=$abc$109383$new_n46378_ i1=$abc$109383$new_n46377_ nq=$abc$109383$new_n46379_
-.subckt mx2_x2 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[88][9] i1=soc.ram.ram[92][9] q=$abc$109383$new_n46380_
+.subckt mux2_x1 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[88][9] i1=soc.ram.ram[92][9] q=$abc$109383$new_n46380_
 .subckt nand2_x0 i0=$abc$109383$new_n46380_ i1=$abc$109383$new_n44830_ nq=$abc$109383$new_n46381_
-.subckt a2_x2 i0=$abc$109383$new_n46381_ i1=$abc$109383$new_n43897_ q=$abc$109383$new_n46382_
+.subckt and2_x1 i0=$abc$109383$new_n46381_ i1=$abc$109383$new_n43897_ q=$abc$109383$new_n46382_
 .subckt nand2_x0 i0=$abc$109383$new_n46382_ i1=$abc$109383$new_n46379_ nq=$abc$109383$new_n46383_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[80][9] i1=soc.ram.ram[84][9] q=$abc$109383$new_n46384_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[80][9] i1=soc.ram.ram[84][9] q=$abc$109383$new_n46384_
 .subckt nand2_x0 i0=$abc$109383$new_n46384_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n46385_
 .subckt buf_x4 i=$abc$109383$new_n44146_ q=$abc$109383$new_n46386_
 .subckt inv_x0 i=soc.ram.ram[85][9] nq=$abc$109383$new_n46387_
 .subckt nand2_x0 i0=$abc$109383$new_n46387_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n46388_
-.subckt ao22_x2 i0=soc.ram.ram[81][9] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n46389_
+.subckt and21nor_x1 i0=soc.ram.ram[81][9] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n46389_
 .subckt nand2_x0 i0=$abc$109383$new_n46389_ i1=$abc$109383$new_n46388_ nq=$abc$109383$new_n46390_
 .subckt nand3_x0 i0=$abc$109383$new_n46390_ i1=$abc$109383$new_n46385_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n46391_
 .subckt nand3_x0 i0=$abc$109383$new_n46391_ i1=$abc$109383$new_n46383_ i2=$abc$109383$new_n44742_ nq=$abc$109383$new_n46392_
-.subckt oa22_x2 i0=$abc$109383$new_n46392_ i1=$abc$109383$new_n46375_ i2=$abc$109383$new_n44584_ q=$abc$109383$new_n46393_
-.subckt mx2_x2 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[75][9] i1=soc.ram.ram[79][9] q=$abc$109383$new_n46394_
-.subckt mx2_x2 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[74][9] i1=soc.ram.ram[78][9] q=$abc$109383$new_n46395_
-.subckt mx2_x2 cmd=$abc$109383$new_n45481_ i0=$abc$109383$new_n46395_ i1=$abc$109383$new_n46394_ q=$abc$109383$new_n46396_
-.subckt o2_x2 i0=$abc$109383$new_n46396_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n46397_
-.subckt mx2_x2 cmd=$abc$109383$new_n44604_ i0=soc.ram.ram[67][9] i1=soc.ram.ram[71][9] q=$abc$109383$new_n46398_
+.subckt or21nand_x1 i0=$abc$109383$new_n46392_ i1=$abc$109383$new_n46375_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n46393_
+.subckt mux2_x1 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[75][9] i1=soc.ram.ram[79][9] q=$abc$109383$new_n46394_
+.subckt mux2_x1 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[74][9] i1=soc.ram.ram[78][9] q=$abc$109383$new_n46395_
+.subckt mux2_x1 cmd=$abc$109383$new_n45481_ i0=$abc$109383$new_n46395_ i1=$abc$109383$new_n46394_ q=$abc$109383$new_n46396_
+.subckt or2_x1 i0=$abc$109383$new_n46396_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n46397_
+.subckt mux2_x1 cmd=$abc$109383$new_n44604_ i0=soc.ram.ram[67][9] i1=soc.ram.ram[71][9] q=$abc$109383$new_n46398_
 .subckt nand2_x0 i0=$abc$109383$new_n46398_ i1=$abc$109383$new_n46175_ nq=$abc$109383$new_n46399_
-.subckt mx2_x2 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[66][9] i1=soc.ram.ram[70][9] q=$abc$109383$new_n46400_
+.subckt mux2_x1 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[66][9] i1=soc.ram.ram[70][9] q=$abc$109383$new_n46400_
 .subckt nand2_x0 i0=$abc$109383$new_n46400_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n46401_
 .subckt nand3_x0 i0=$abc$109383$new_n46401_ i1=$abc$109383$new_n46399_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n46402_
 .subckt nand3_x0 i0=$abc$109383$new_n46402_ i1=$abc$109383$new_n46397_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n46403_
-.subckt mx2_x2 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[64][9] i1=soc.ram.ram[68][9] q=$abc$109383$new_n46404_
-.subckt mx2_x2 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[65][9] i1=soc.ram.ram[69][9] q=$abc$109383$new_n46405_
-.subckt mx2_x2 cmd=$abc$109383$new_n43759_ i0=$abc$109383$new_n46405_ i1=$abc$109383$new_n46404_ q=$abc$109383$new_n46406_
-.subckt o2_x2 i0=$abc$109383$new_n46406_ i1=$abc$109383$new_n44410_ q=$abc$109383$new_n46407_
-.subckt mx2_x2 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[72][9] i1=soc.ram.ram[76][9] q=$abc$109383$new_n46408_
+.subckt mux2_x1 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[64][9] i1=soc.ram.ram[68][9] q=$abc$109383$new_n46404_
+.subckt mux2_x1 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[65][9] i1=soc.ram.ram[69][9] q=$abc$109383$new_n46405_
+.subckt mux2_x1 cmd=$abc$109383$new_n43759_ i0=$abc$109383$new_n46405_ i1=$abc$109383$new_n46404_ q=$abc$109383$new_n46406_
+.subckt or2_x1 i0=$abc$109383$new_n46406_ i1=$abc$109383$new_n44410_ q=$abc$109383$new_n46407_
+.subckt mux2_x1 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[72][9] i1=soc.ram.ram[76][9] q=$abc$109383$new_n46408_
 .subckt nand2_x0 i0=$abc$109383$new_n46408_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n46409_
 .subckt inv_x0 i=soc.ram.ram[77][9] nq=$abc$109383$new_n46410_
 .subckt nand2_x0 i0=$abc$109383$new_n46410_ i1=$abc$109383$new_n44501_ nq=$abc$109383$new_n46411_
-.subckt ao22_x2 i0=soc.ram.ram[73][9] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n46412_
+.subckt and21nor_x1 i0=soc.ram.ram[73][9] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n46412_
 .subckt nand2_x0 i0=$abc$109383$new_n46412_ i1=$abc$109383$new_n46411_ nq=$abc$109383$new_n46413_
 .subckt nand3_x0 i0=$abc$109383$new_n46413_ i1=$abc$109383$new_n46409_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n46414_
 .subckt nand3_x0 i0=$abc$109383$new_n46414_ i1=$abc$109383$new_n46407_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n46415_
-.subckt oa22_x2 i0=$abc$109383$new_n46415_ i1=$abc$109383$new_n46403_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n46416_
+.subckt or21nand_x1 i0=$abc$109383$new_n46415_ i1=$abc$109383$new_n46403_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n46416_
 .subckt nand3_x0 i0=$abc$109383$new_n46416_ i1=$abc$109383$new_n46393_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n46417_
 .subckt buf_x4 i=$abc$109383$new_n44041_ q=$abc$109383$new_n46418_
-.subckt o2_x2 i0=soc.ram.ram[115][9] i1=$abc$109383$new_n43978_ q=$abc$109383$new_n46419_
-.subckt ao22_x2 i0=soc.ram.ram[119][9] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n46420_
+.subckt or2_x1 i0=soc.ram.ram[115][9] i1=$abc$109383$new_n43978_ q=$abc$109383$new_n46419_
+.subckt and21nor_x1 i0=soc.ram.ram[119][9] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n46420_
 .subckt nand2_x0 i0=$abc$109383$new_n46420_ i1=$abc$109383$new_n46419_ nq=$abc$109383$new_n46421_
 .subckt inv_x0 i=soc.ram.ram[118][9] nq=$abc$109383$new_n46422_
 .subckt nand2_x0 i0=$abc$109383$new_n46422_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n46423_
-.subckt o2_x2 i0=soc.ram.ram[114][9] i1=$abc$109383$new_n43811_ q=$abc$109383$new_n46424_
-.subckt a2_x2 i0=$abc$109383$new_n46424_ i1=$abc$109383$new_n44078_ q=$abc$109383$new_n46425_
+.subckt or2_x1 i0=soc.ram.ram[114][9] i1=$abc$109383$new_n43811_ q=$abc$109383$new_n46424_
+.subckt and2_x1 i0=$abc$109383$new_n46424_ i1=$abc$109383$new_n44078_ q=$abc$109383$new_n46425_
 .subckt nand2_x0 i0=$abc$109383$new_n46425_ i1=$abc$109383$new_n46423_ nq=$abc$109383$new_n46426_
-.subckt oa22_x2 i0=$abc$109383$new_n46426_ i1=$abc$109383$new_n46421_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n46427_
+.subckt or21nand_x1 i0=$abc$109383$new_n46426_ i1=$abc$109383$new_n46421_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46427_
 .subckt buf_x4 i=$abc$109383$new_n44604_ q=$abc$109383$new_n46428_
 .subckt inv_x0 i=soc.ram.ram[117][9] nq=$abc$109383$new_n46429_
 .subckt nand2_x0 i0=$abc$109383$new_n46429_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n46430_
-.subckt ao22_x2 i0=soc.ram.ram[113][9] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n46431_
+.subckt and21nor_x1 i0=soc.ram.ram[113][9] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n46431_
 .subckt nand2_x0 i0=$abc$109383$new_n46431_ i1=$abc$109383$new_n46430_ nq=$abc$109383$new_n46432_
-.subckt mx2_x2 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[112][9] i1=soc.ram.ram[116][9] q=$abc$109383$new_n46433_
+.subckt mux2_x1 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[112][9] i1=soc.ram.ram[116][9] q=$abc$109383$new_n46433_
 .subckt nand2_x0 i0=$abc$109383$new_n46433_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n46434_
-.subckt oa22_x2 i0=$abc$109383$new_n46434_ i1=$abc$109383$new_n46432_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n46435_
+.subckt or21nand_x1 i0=$abc$109383$new_n46434_ i1=$abc$109383$new_n46432_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n46435_
 .subckt nand3_x0 i0=$abc$109383$new_n46435_ i1=$abc$109383$new_n46427_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n46436_
 .subckt inv_x0 i=soc.ram.ram[125][9] nq=$abc$109383$new_n46437_
 .subckt nand2_x0 i0=$abc$109383$new_n46437_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n46438_
-.subckt ao22_x2 i0=soc.ram.ram[121][9] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n46439_
+.subckt and21nor_x1 i0=soc.ram.ram[121][9] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n46439_
 .subckt nand2_x0 i0=$abc$109383$new_n46439_ i1=$abc$109383$new_n46438_ nq=$abc$109383$new_n46440_
-.subckt mx2_x2 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[120][9] i1=soc.ram.ram[124][9] q=$abc$109383$new_n46441_
+.subckt mux2_x1 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[120][9] i1=soc.ram.ram[124][9] q=$abc$109383$new_n46441_
 .subckt nand2_x0 i0=$abc$109383$new_n46441_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n46442_
-.subckt oa22_x2 i0=$abc$109383$new_n46442_ i1=$abc$109383$new_n46440_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n46443_
+.subckt or21nand_x1 i0=$abc$109383$new_n46442_ i1=$abc$109383$new_n46440_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n46443_
 .subckt inv_x0 i=soc.ram.ram[127][9] nq=$abc$109383$new_n46444_
 .subckt nand2_x0 i0=$abc$109383$new_n46444_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n46445_
-.subckt ao22_x2 i0=soc.ram.ram[123][9] i1=$abc$109383$new_n44405_ i2=$abc$109383$new_n44403_ q=$abc$109383$new_n46446_
+.subckt and21nor_x1 i0=soc.ram.ram[123][9] i1=$abc$109383$new_n44405_ i2=$abc$109383$new_n44403_ nq=$abc$109383$new_n46446_
 .subckt nand2_x0 i0=$abc$109383$new_n46446_ i1=$abc$109383$new_n46445_ nq=$abc$109383$new_n46447_
-.subckt mx2_x2 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[122][9] i1=soc.ram.ram[126][9] q=$abc$109383$new_n46448_
+.subckt mux2_x1 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[122][9] i1=soc.ram.ram[126][9] q=$abc$109383$new_n46448_
 .subckt nand2_x0 i0=$abc$109383$new_n46448_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n46449_
-.subckt oa22_x2 i0=$abc$109383$new_n46449_ i1=$abc$109383$new_n46447_ i2=$abc$109383$new_n43679_ q=$abc$109383$new_n46450_
+.subckt or21nand_x1 i0=$abc$109383$new_n46449_ i1=$abc$109383$new_n46447_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n46450_
 .subckt nand3_x0 i0=$abc$109383$new_n46450_ i1=$abc$109383$new_n46443_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n46451_
 .subckt nand3_x0 i0=$abc$109383$new_n46451_ i1=$abc$109383$new_n46436_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n46452_
 .subckt inv_x0 i=soc.ram.ram[109][9] nq=$abc$109383$new_n46453_
 .subckt nand2_x0 i0=$abc$109383$new_n46453_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n46454_
-.subckt ao22_x2 i0=soc.ram.ram[105][9] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n46455_
+.subckt and21nor_x1 i0=soc.ram.ram[105][9] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n46455_
 .subckt nand2_x0 i0=$abc$109383$new_n46455_ i1=$abc$109383$new_n46454_ nq=$abc$109383$new_n46456_
-.subckt mx2_x2 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[104][9] i1=soc.ram.ram[108][9] q=$abc$109383$new_n46457_
+.subckt mux2_x1 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[104][9] i1=soc.ram.ram[108][9] q=$abc$109383$new_n46457_
 .subckt nand2_x0 i0=$abc$109383$new_n46457_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n46458_
-.subckt oa22_x2 i0=$abc$109383$new_n46458_ i1=$abc$109383$new_n46456_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n46459_
+.subckt or21nand_x1 i0=$abc$109383$new_n46458_ i1=$abc$109383$new_n46456_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n46459_
 .subckt inv_x0 i=soc.ram.ram[111][9] nq=$abc$109383$new_n46460_
 .subckt nand2_x0 i0=$abc$109383$new_n46460_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n46461_
-.subckt ao22_x2 i0=soc.ram.ram[107][9] i1=$abc$109383$new_n44405_ i2=$abc$109383$new_n44403_ q=$abc$109383$new_n46462_
+.subckt and21nor_x1 i0=soc.ram.ram[107][9] i1=$abc$109383$new_n44405_ i2=$abc$109383$new_n44403_ nq=$abc$109383$new_n46462_
 .subckt nand2_x0 i0=$abc$109383$new_n46462_ i1=$abc$109383$new_n46461_ nq=$abc$109383$new_n46463_
-.subckt mx2_x2 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[106][9] i1=soc.ram.ram[110][9] q=$abc$109383$new_n46464_
+.subckt mux2_x1 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[106][9] i1=soc.ram.ram[110][9] q=$abc$109383$new_n46464_
 .subckt nand2_x0 i0=$abc$109383$new_n46464_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n46465_
-.subckt oa22_x2 i0=$abc$109383$new_n46465_ i1=$abc$109383$new_n46463_ i2=$abc$109383$new_n43679_ q=$abc$109383$new_n46466_
+.subckt or21nand_x1 i0=$abc$109383$new_n46465_ i1=$abc$109383$new_n46463_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n46466_
 .subckt nand3_x0 i0=$abc$109383$new_n46466_ i1=$abc$109383$new_n46459_ i2=$abc$109383$new_n44677_ nq=$abc$109383$new_n46467_
-.subckt o2_x2 i0=soc.ram.ram[99][9] i1=$abc$109383$new_n45478_ q=$abc$109383$new_n46468_
-.subckt ao22_x2 i0=soc.ram.ram[103][9] i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n44403_ q=$abc$109383$new_n46469_
+.subckt or2_x1 i0=soc.ram.ram[99][9] i1=$abc$109383$new_n45478_ q=$abc$109383$new_n46468_
+.subckt and21nor_x1 i0=soc.ram.ram[103][9] i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n44403_ nq=$abc$109383$new_n46469_
 .subckt nand2_x0 i0=$abc$109383$new_n46469_ i1=$abc$109383$new_n46468_ nq=$abc$109383$new_n46470_
 .subckt inv_x0 i=soc.ram.ram[102][9] nq=$abc$109383$new_n46471_
 .subckt nand2_x0 i0=$abc$109383$new_n46471_ i1=$abc$109383$new_n45322_ nq=$abc$109383$new_n46472_
-.subckt o2_x2 i0=soc.ram.ram[98][9] i1=$abc$109383$new_n44016_ q=$abc$109383$new_n46473_
-.subckt a2_x2 i0=$abc$109383$new_n46473_ i1=$abc$109383$new_n43508_ q=$abc$109383$new_n46474_
+.subckt or2_x1 i0=soc.ram.ram[98][9] i1=$abc$109383$new_n44016_ q=$abc$109383$new_n46473_
+.subckt and2_x1 i0=$abc$109383$new_n46473_ i1=$abc$109383$new_n43508_ q=$abc$109383$new_n46474_
 .subckt nand2_x0 i0=$abc$109383$new_n46474_ i1=$abc$109383$new_n46472_ nq=$abc$109383$new_n46475_
-.subckt oa22_x2 i0=$abc$109383$new_n46475_ i1=$abc$109383$new_n46470_ i2=$abc$109383$new_n43679_ q=$abc$109383$new_n46476_
+.subckt or21nand_x1 i0=$abc$109383$new_n46475_ i1=$abc$109383$new_n46470_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n46476_
 .subckt inv_x0 i=soc.ram.ram[101][9] nq=$abc$109383$new_n46477_
 .subckt nand2_x0 i0=$abc$109383$new_n46477_ i1=$abc$109383$new_n44501_ nq=$abc$109383$new_n46478_
-.subckt ao22_x2 i0=soc.ram.ram[97][9] i1=$abc$109383$new_n44234_ i2=$abc$109383$new_n44505_ q=$abc$109383$new_n46479_
+.subckt and21nor_x1 i0=soc.ram.ram[97][9] i1=$abc$109383$new_n44234_ i2=$abc$109383$new_n44505_ nq=$abc$109383$new_n46479_
 .subckt nand2_x0 i0=$abc$109383$new_n46479_ i1=$abc$109383$new_n46478_ nq=$abc$109383$new_n46480_
-.subckt mx2_x2 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[96][9] i1=soc.ram.ram[100][9] q=$abc$109383$new_n46481_
+.subckt mux2_x1 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[96][9] i1=soc.ram.ram[100][9] q=$abc$109383$new_n46481_
 .subckt nand2_x0 i0=$abc$109383$new_n46481_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n46482_
-.subckt oa22_x2 i0=$abc$109383$new_n46482_ i1=$abc$109383$new_n46480_ i2=$abc$109383$new_n45604_ q=$abc$109383$new_n46483_
+.subckt or21nand_x1 i0=$abc$109383$new_n46482_ i1=$abc$109383$new_n46480_ i2=$abc$109383$new_n45604_ nq=$abc$109383$new_n46483_
 .subckt nand3_x0 i0=$abc$109383$new_n46483_ i1=$abc$109383$new_n46476_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n46484_
 .subckt nand3_x0 i0=$abc$109383$new_n46484_ i1=$abc$109383$new_n46467_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n46485_
 .subckt nand3_x0 i0=$abc$109383$new_n46485_ i1=$abc$109383$new_n46452_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n46486_
-.subckt oa22_x2 i0=$abc$109383$new_n46486_ i1=$abc$109383$new_n46417_ i2=$abc$109383$new_n45475_ q=$abc$109383$new_n46487_
-.subckt a2_x2 i0=$abc$109383$new_n46487_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n46488_
-.subckt oa22_x2 i0=$abc$109383$new_n46488_ i1=$abc$109383$new_n46361_ i2=$abc$109383$new_n46252_ q=$abc$109383$new_n46489_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n46489_ i2=$abc$109383$new_n46234_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103234
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[10] q=$abc$109383$new_n46491_
-.subckt a2_x2 i0=$abc$109383$new_n46491_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n46492_
+.subckt or21nand_x1 i0=$abc$109383$new_n46486_ i1=$abc$109383$new_n46417_ i2=$abc$109383$new_n45475_ nq=$abc$109383$new_n46487_
+.subckt and2_x1 i0=$abc$109383$new_n46487_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n46488_
+.subckt or21nand_x1 i0=$abc$109383$new_n46488_ i1=$abc$109383$new_n46361_ i2=$abc$109383$new_n46252_ nq=$abc$109383$new_n46489_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n46489_ i2=$abc$109383$new_n46234_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103234
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[10] nq=$abc$109383$new_n46491_
+.subckt and2_x1 i0=$abc$109383$new_n46491_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n46492_
 .subckt inv_x0 i=soc.ram.ram[16][10] nq=$abc$109383$new_n46493_
 .subckt inv_x0 i=soc.ram.ram[20][10] nq=$abc$109383$new_n46494_
 .subckt buf_x4 i=$abc$109383$new_n44535_ q=$abc$109383$new_n46495_
-.subckt mx2_x2 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n46494_ i1=$abc$109383$new_n46493_ q=$abc$109383$new_n46496_
+.subckt mux2_x1 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n46494_ i1=$abc$109383$new_n46493_ q=$abc$109383$new_n46496_
 .subckt inv_x0 i=soc.ram.ram[17][10] nq=$abc$109383$new_n46497_
 .subckt inv_x0 i=soc.ram.ram[21][10] nq=$abc$109383$new_n46498_
-.subckt mx2_x2 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n46498_ i1=$abc$109383$new_n46497_ q=$abc$109383$new_n46499_
-.subckt mx2_x2 cmd=$abc$109383$new_n44837_ i0=$abc$109383$new_n46499_ i1=$abc$109383$new_n46496_ q=$abc$109383$new_n46500_
+.subckt mux2_x1 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n46498_ i1=$abc$109383$new_n46497_ q=$abc$109383$new_n46499_
+.subckt mux2_x1 cmd=$abc$109383$new_n44837_ i0=$abc$109383$new_n46499_ i1=$abc$109383$new_n46496_ q=$abc$109383$new_n46500_
 .subckt nand2_x0 i0=$abc$109383$new_n46500_ i1=$abc$109383$new_n44693_ nq=$abc$109383$new_n46501_
-.subckt mx2_x2 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[24][10] i1=soc.ram.ram[28][10] q=$abc$109383$new_n46502_
-.subckt a2_x2 i0=$abc$109383$new_n46502_ i1=$abc$109383$new_n44854_ q=$abc$109383$new_n46503_
+.subckt mux2_x1 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[24][10] i1=soc.ram.ram[28][10] q=$abc$109383$new_n46502_
+.subckt and2_x1 i0=$abc$109383$new_n46502_ i1=$abc$109383$new_n44854_ q=$abc$109383$new_n46503_
 .subckt inv_x0 i=soc.ram.ram[29][10] nq=$abc$109383$new_n46504_
 .subckt nand2_x0 i0=$abc$109383$new_n46504_ i1=$abc$109383$new_n45668_ nq=$abc$109383$new_n46505_
-.subckt ao22_x2 i0=soc.ram.ram[25][10] i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n43630_ q=$abc$109383$new_n46506_
-.subckt oa22_x2 i0=$abc$109383$new_n46506_ i1=$abc$109383$new_n46505_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n46507_
-.subckt o2_x2 i0=$abc$109383$new_n46507_ i1=$abc$109383$new_n46503_ q=$abc$109383$new_n46508_
-.subckt oa22_x2 i0=$abc$109383$new_n46508_ i1=$abc$109383$new_n46501_ i2=$abc$109383$new_n43935_ q=$abc$109383$new_n46509_
+.subckt and21nor_x1 i0=soc.ram.ram[25][10] i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n43630_ nq=$abc$109383$new_n46506_
+.subckt or21nand_x1 i0=$abc$109383$new_n46506_ i1=$abc$109383$new_n46505_ i2=$abc$109383$new_n44523_ nq=$abc$109383$new_n46507_
+.subckt or2_x1 i0=$abc$109383$new_n46507_ i1=$abc$109383$new_n46503_ q=$abc$109383$new_n46508_
+.subckt or21nand_x1 i0=$abc$109383$new_n46508_ i1=$abc$109383$new_n46501_ i2=$abc$109383$new_n43935_ nq=$abc$109383$new_n46509_
 .subckt inv_x0 i=soc.ram.ram[18][10] nq=$abc$109383$new_n46510_
 .subckt inv_x0 i=soc.ram.ram[22][10] nq=$abc$109383$new_n46511_
-.subckt mx2_x2 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n46511_ i1=$abc$109383$new_n46510_ q=$abc$109383$new_n46512_
+.subckt mux2_x1 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n46511_ i1=$abc$109383$new_n46510_ q=$abc$109383$new_n46512_
 .subckt inv_x0 i=soc.ram.ram[19][10] nq=$abc$109383$new_n46513_
 .subckt inv_x0 i=soc.ram.ram[23][10] nq=$abc$109383$new_n46514_
-.subckt mx2_x2 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n46514_ i1=$abc$109383$new_n46513_ q=$abc$109383$new_n46515_
-.subckt mx2_x2 cmd=$abc$109383$new_n46128_ i0=$abc$109383$new_n46515_ i1=$abc$109383$new_n46512_ q=$abc$109383$new_n46516_
+.subckt mux2_x1 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n46514_ i1=$abc$109383$new_n46513_ q=$abc$109383$new_n46515_
+.subckt mux2_x1 cmd=$abc$109383$new_n46128_ i0=$abc$109383$new_n46515_ i1=$abc$109383$new_n46512_ q=$abc$109383$new_n46516_
 .subckt nand2_x0 i0=$abc$109383$new_n46516_ i1=$abc$109383$new_n45311_ nq=$abc$109383$new_n46517_
-.subckt mx2_x2 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[26][10] i1=soc.ram.ram[30][10] q=$abc$109383$new_n46518_
-.subckt a2_x2 i0=$abc$109383$new_n46518_ i1=$abc$109383$new_n44150_ q=$abc$109383$new_n46519_
+.subckt mux2_x1 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[26][10] i1=soc.ram.ram[30][10] q=$abc$109383$new_n46518_
+.subckt and2_x1 i0=$abc$109383$new_n46518_ i1=$abc$109383$new_n44150_ q=$abc$109383$new_n46519_
 .subckt inv_x0 i=soc.ram.ram[31][10] nq=$abc$109383$new_n46520_
 .subckt nand2_x0 i0=$abc$109383$new_n46520_ i1=$abc$109383$new_n44026_ nq=$abc$109383$new_n46521_
-.subckt ao22_x2 i0=soc.ram.ram[27][10] i1=$abc$109383$new_n45076_ i2=$abc$109383$new_n43961_ q=$abc$109383$new_n46522_
-.subckt oa22_x2 i0=$abc$109383$new_n46522_ i1=$abc$109383$new_n46521_ i2=$abc$109383$new_n43837_ q=$abc$109383$new_n46523_
-.subckt o2_x2 i0=$abc$109383$new_n46523_ i1=$abc$109383$new_n46519_ q=$abc$109383$new_n46524_
-.subckt oa22_x2 i0=$abc$109383$new_n46524_ i1=$abc$109383$new_n46517_ i2=$abc$109383$new_n45520_ q=$abc$109383$new_n46525_
+.subckt and21nor_x1 i0=soc.ram.ram[27][10] i1=$abc$109383$new_n45076_ i2=$abc$109383$new_n43961_ nq=$abc$109383$new_n46522_
+.subckt or21nand_x1 i0=$abc$109383$new_n46522_ i1=$abc$109383$new_n46521_ i2=$abc$109383$new_n43837_ nq=$abc$109383$new_n46523_
+.subckt or2_x1 i0=$abc$109383$new_n46523_ i1=$abc$109383$new_n46519_ q=$abc$109383$new_n46524_
+.subckt or21nand_x1 i0=$abc$109383$new_n46524_ i1=$abc$109383$new_n46517_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n46525_
 .subckt nand3_x0 i0=$abc$109383$new_n46525_ i1=$abc$109383$new_n46509_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n46526_
 .subckt buf_x4 i=$abc$109383$new_n44905_ q=$abc$109383$new_n46527_
-.subckt mx2_x2 cmd=$abc$109383$new_n43926_ i0=soc.ram.ram[10][10] i1=soc.ram.ram[14][10] q=$abc$109383$new_n46528_
+.subckt mux2_x1 cmd=$abc$109383$new_n43926_ i0=soc.ram.ram[10][10] i1=soc.ram.ram[14][10] q=$abc$109383$new_n46528_
 .subckt nand2_x0 i0=$abc$109383$new_n46528_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n46529_
 .subckt inv_x0 i=soc.ram.ram[15][10] nq=$abc$109383$new_n46530_
 .subckt nand2_x0 i0=$abc$109383$new_n46530_ i1=$abc$109383$new_n44660_ nq=$abc$109383$new_n46531_
-.subckt ao22_x2 i0=soc.ram.ram[11][10] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n46532_
+.subckt and21nor_x1 i0=soc.ram.ram[11][10] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n46532_
 .subckt nand2_x0 i0=$abc$109383$new_n46532_ i1=$abc$109383$new_n46531_ nq=$abc$109383$new_n46533_
 .subckt nand3_x0 i0=$abc$109383$new_n46533_ i1=$abc$109383$new_n46529_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n46534_
-.subckt mx2_x2 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[2][10] i1=soc.ram.ram[6][10] q=$abc$109383$new_n46535_
+.subckt mux2_x1 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[2][10] i1=soc.ram.ram[6][10] q=$abc$109383$new_n46535_
 .subckt nand2_x0 i0=$abc$109383$new_n46535_ i1=$abc$109383$new_n44919_ nq=$abc$109383$new_n46536_
 .subckt inv_x0 i=soc.ram.ram[7][10] nq=$abc$109383$new_n46537_
 .subckt nand2_x0 i0=$abc$109383$new_n46537_ i1=$abc$109383$new_n44587_ nq=$abc$109383$new_n46538_
-.subckt ao22_x2 i0=soc.ram.ram[3][10] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44001_ q=$abc$109383$new_n46539_
+.subckt and21nor_x1 i0=soc.ram.ram[3][10] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44001_ nq=$abc$109383$new_n46539_
 .subckt nand2_x0 i0=$abc$109383$new_n46539_ i1=$abc$109383$new_n46538_ nq=$abc$109383$new_n46540_
 .subckt nand3_x0 i0=$abc$109383$new_n46540_ i1=$abc$109383$new_n46536_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n46541_
 .subckt nand3_x0 i0=$abc$109383$new_n46541_ i1=$abc$109383$new_n46534_ i2=$abc$109383$new_n46527_ nq=$abc$109383$new_n46542_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[0][10] i1=soc.ram.ram[4][10] q=$abc$109383$new_n46543_
-.subckt a2_x2 i0=$abc$109383$new_n46543_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n46544_
-.subckt ao22_x2 i0=soc.ram.ram[1][10] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ q=$abc$109383$new_n46545_
-.subckt ao22_x2 i0=$abc$109383$new_n43702_ i1=soc.ram.ram[5][10] i2=$abc$109383$new_n46545_ q=$abc$109383$new_n46546_
-.subckt o3_x2 i0=$abc$109383$new_n46546_ i1=$abc$109383$new_n46544_ i2=$abc$109383$new_n44410_ q=$abc$109383$new_n46547_
-.subckt mx2_x2 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[8][10] i1=soc.ram.ram[12][10] q=$abc$109383$new_n46548_
-.subckt a2_x2 i0=$abc$109383$new_n46548_ i1=$abc$109383$new_n44836_ q=$abc$109383$new_n46549_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[0][10] i1=soc.ram.ram[4][10] q=$abc$109383$new_n46543_
+.subckt and2_x1 i0=$abc$109383$new_n46543_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n46544_
+.subckt and21nor_x1 i0=soc.ram.ram[1][10] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ nq=$abc$109383$new_n46545_
+.subckt and21nor_x1 i0=$abc$109383$new_n43702_ i1=soc.ram.ram[5][10] i2=$abc$109383$new_n46545_ nq=$abc$109383$new_n46546_
+.subckt or3_x1 i0=$abc$109383$new_n46546_ i1=$abc$109383$new_n46544_ i2=$abc$109383$new_n44410_ q=$abc$109383$new_n46547_
+.subckt mux2_x1 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[8][10] i1=soc.ram.ram[12][10] q=$abc$109383$new_n46548_
+.subckt and2_x1 i0=$abc$109383$new_n46548_ i1=$abc$109383$new_n44836_ q=$abc$109383$new_n46549_
 .subckt inv_x0 i=soc.ram.ram[13][10] nq=$abc$109383$new_n46550_
 .subckt nand2_x0 i0=$abc$109383$new_n46550_ i1=$abc$109383$new_n45155_ nq=$abc$109383$new_n46551_
-.subckt ao22_x2 i0=soc.ram.ram[9][10] i1=$abc$109383$new_n44404_ i2=$abc$109383$new_n43630_ q=$abc$109383$new_n46552_
-.subckt oa22_x2 i0=$abc$109383$new_n46552_ i1=$abc$109383$new_n46551_ i2=$abc$109383$new_n46549_ q=$abc$109383$new_n46553_
-.subckt o2_x2 i0=$abc$109383$new_n46553_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n46554_
+.subckt and21nor_x1 i0=soc.ram.ram[9][10] i1=$abc$109383$new_n44404_ i2=$abc$109383$new_n43630_ nq=$abc$109383$new_n46552_
+.subckt or21nand_x1 i0=$abc$109383$new_n46552_ i1=$abc$109383$new_n46551_ i2=$abc$109383$new_n46549_ nq=$abc$109383$new_n46553_
+.subckt or2_x1 i0=$abc$109383$new_n46553_ i1=$abc$109383$new_n45211_ q=$abc$109383$new_n46554_
 .subckt nand3_x0 i0=$abc$109383$new_n46554_ i1=$abc$109383$new_n46547_ i2=$abc$109383$new_n44742_ nq=$abc$109383$new_n46555_
-.subckt oa22_x2 i0=$abc$109383$new_n46555_ i1=$abc$109383$new_n46542_ i2=$abc$109383$new_n43541_ q=$abc$109383$new_n46556_
-.subckt a3_x2 i0=$abc$109383$new_n46556_ i1=$abc$109383$new_n46526_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n46557_
-.subckt o2_x2 i0=soc.ram.ram[51][10] i1=$abc$109383$new_n44704_ q=$abc$109383$new_n46558_
-.subckt ao22_x2 i0=soc.ram.ram[55][10] i1=$abc$109383$new_n44043_ i2=$abc$109383$new_n44065_ q=$abc$109383$new_n46559_
+.subckt or21nand_x1 i0=$abc$109383$new_n46555_ i1=$abc$109383$new_n46542_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n46556_
+.subckt and3_x1 i0=$abc$109383$new_n46556_ i1=$abc$109383$new_n46526_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n46557_
+.subckt or2_x1 i0=soc.ram.ram[51][10] i1=$abc$109383$new_n44704_ q=$abc$109383$new_n46558_
+.subckt and21nor_x1 i0=soc.ram.ram[55][10] i1=$abc$109383$new_n44043_ i2=$abc$109383$new_n44065_ nq=$abc$109383$new_n46559_
 .subckt nand2_x0 i0=$abc$109383$new_n46559_ i1=$abc$109383$new_n46558_ nq=$abc$109383$new_n46560_
 .subckt inv_x0 i=soc.ram.ram[54][10] nq=$abc$109383$new_n46561_
 .subckt nand2_x0 i0=$abc$109383$new_n46561_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n46562_
-.subckt o2_x2 i0=soc.ram.ram[50][10] i1=$abc$109383$new_n45265_ q=$abc$109383$new_n46563_
-.subckt a2_x2 i0=$abc$109383$new_n46563_ i1=$abc$109383$new_n43738_ q=$abc$109383$new_n46564_
+.subckt or2_x1 i0=soc.ram.ram[50][10] i1=$abc$109383$new_n45265_ q=$abc$109383$new_n46563_
+.subckt and2_x1 i0=$abc$109383$new_n46563_ i1=$abc$109383$new_n43738_ q=$abc$109383$new_n46564_
 .subckt nand2_x0 i0=$abc$109383$new_n46564_ i1=$abc$109383$new_n46562_ nq=$abc$109383$new_n46565_
-.subckt oa22_x2 i0=$abc$109383$new_n46565_ i1=$abc$109383$new_n46560_ i2=$abc$109383$new_n44794_ q=$abc$109383$new_n46566_
+.subckt or21nand_x1 i0=$abc$109383$new_n46565_ i1=$abc$109383$new_n46560_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n46566_
 .subckt inv_x0 i=soc.ram.ram[53][10] nq=$abc$109383$new_n46567_
 .subckt nand2_x0 i0=$abc$109383$new_n46567_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n46568_
-.subckt ao22_x2 i0=soc.ram.ram[49][10] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ q=$abc$109383$new_n46569_
+.subckt and21nor_x1 i0=soc.ram.ram[49][10] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ nq=$abc$109383$new_n46569_
 .subckt nand2_x0 i0=$abc$109383$new_n46569_ i1=$abc$109383$new_n46568_ nq=$abc$109383$new_n46570_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[48][10] i1=soc.ram.ram[52][10] q=$abc$109383$new_n46571_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[48][10] i1=soc.ram.ram[52][10] q=$abc$109383$new_n46571_
 .subckt nand2_x0 i0=$abc$109383$new_n46571_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n46572_
-.subckt oa22_x2 i0=$abc$109383$new_n46572_ i1=$abc$109383$new_n46570_ i2=$abc$109383$new_n46119_ q=$abc$109383$new_n46573_
+.subckt or21nand_x1 i0=$abc$109383$new_n46572_ i1=$abc$109383$new_n46570_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n46573_
 .subckt nand3_x0 i0=$abc$109383$new_n46573_ i1=$abc$109383$new_n46566_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n46574_
 .subckt inv_x0 i=soc.ram.ram[61][10] nq=$abc$109383$new_n46575_
 .subckt nand2_x0 i0=$abc$109383$new_n46575_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n46576_
-.subckt ao22_x2 i0=soc.ram.ram[57][10] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ q=$abc$109383$new_n46577_
+.subckt and21nor_x1 i0=soc.ram.ram[57][10] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ nq=$abc$109383$new_n46577_
 .subckt nand2_x0 i0=$abc$109383$new_n46577_ i1=$abc$109383$new_n46576_ nq=$abc$109383$new_n46578_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[56][10] i1=soc.ram.ram[60][10] q=$abc$109383$new_n46579_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[56][10] i1=soc.ram.ram[60][10] q=$abc$109383$new_n46579_
 .subckt nand2_x0 i0=$abc$109383$new_n46579_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n46580_
-.subckt oa22_x2 i0=$abc$109383$new_n46580_ i1=$abc$109383$new_n46578_ i2=$abc$109383$new_n46119_ q=$abc$109383$new_n46581_
+.subckt or21nand_x1 i0=$abc$109383$new_n46580_ i1=$abc$109383$new_n46578_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n46581_
 .subckt inv_x0 i=soc.ram.ram[63][10] nq=$abc$109383$new_n46582_
 .subckt nand2_x0 i0=$abc$109383$new_n46582_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n46583_
-.subckt ao22_x2 i0=soc.ram.ram[59][10] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n46584_
+.subckt and21nor_x1 i0=soc.ram.ram[59][10] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n46584_
 .subckt nand2_x0 i0=$abc$109383$new_n46584_ i1=$abc$109383$new_n46583_ nq=$abc$109383$new_n46585_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[58][10] i1=soc.ram.ram[62][10] q=$abc$109383$new_n46586_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[58][10] i1=soc.ram.ram[62][10] q=$abc$109383$new_n46586_
 .subckt nand2_x0 i0=$abc$109383$new_n46586_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n46587_
-.subckt oa22_x2 i0=$abc$109383$new_n46587_ i1=$abc$109383$new_n46585_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n46588_
+.subckt or21nand_x1 i0=$abc$109383$new_n46587_ i1=$abc$109383$new_n46585_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46588_
 .subckt nand3_x0 i0=$abc$109383$new_n46588_ i1=$abc$109383$new_n46581_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n46589_
 .subckt nand3_x0 i0=$abc$109383$new_n46589_ i1=$abc$109383$new_n46574_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n46590_
 .subckt inv_x0 i=soc.ram.ram[45][10] nq=$abc$109383$new_n46591_
 .subckt nand2_x0 i0=$abc$109383$new_n46591_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n46592_
-.subckt ao22_x2 i0=soc.ram.ram[41][10] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n44626_ q=$abc$109383$new_n46593_
+.subckt and21nor_x1 i0=soc.ram.ram[41][10] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n44626_ nq=$abc$109383$new_n46593_
 .subckt nand2_x0 i0=$abc$109383$new_n46593_ i1=$abc$109383$new_n46592_ nq=$abc$109383$new_n46594_
-.subckt mx2_x2 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[40][10] i1=soc.ram.ram[44][10] q=$abc$109383$new_n46595_
+.subckt mux2_x1 cmd=$abc$109383$new_n45227_ i0=soc.ram.ram[40][10] i1=soc.ram.ram[44][10] q=$abc$109383$new_n46595_
 .subckt nand2_x0 i0=$abc$109383$new_n46595_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n46596_
-.subckt oa22_x2 i0=$abc$109383$new_n46596_ i1=$abc$109383$new_n46594_ i2=$abc$109383$new_n46119_ q=$abc$109383$new_n46597_
+.subckt or21nand_x1 i0=$abc$109383$new_n46596_ i1=$abc$109383$new_n46594_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n46597_
 .subckt inv_x0 i=soc.ram.ram[47][10] nq=$abc$109383$new_n46598_
 .subckt nand2_x0 i0=$abc$109383$new_n46598_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n46599_
-.subckt ao22_x2 i0=soc.ram.ram[43][10] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n46600_
+.subckt and21nor_x1 i0=soc.ram.ram[43][10] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n46600_
 .subckt nand2_x0 i0=$abc$109383$new_n46600_ i1=$abc$109383$new_n46599_ nq=$abc$109383$new_n46601_
-.subckt mx2_x2 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[42][10] i1=soc.ram.ram[46][10] q=$abc$109383$new_n46602_
+.subckt mux2_x1 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[42][10] i1=soc.ram.ram[46][10] q=$abc$109383$new_n46602_
 .subckt nand2_x0 i0=$abc$109383$new_n46602_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n46603_
-.subckt oa22_x2 i0=$abc$109383$new_n46603_ i1=$abc$109383$new_n46601_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n46604_
+.subckt or21nand_x1 i0=$abc$109383$new_n46603_ i1=$abc$109383$new_n46601_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46604_
 .subckt nand3_x0 i0=$abc$109383$new_n46604_ i1=$abc$109383$new_n46597_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n46605_
-.subckt o2_x2 i0=soc.ram.ram[35][10] i1=$abc$109383$new_n43687_ q=$abc$109383$new_n46606_
-.subckt ao22_x2 i0=soc.ram.ram[39][10] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n46607_
+.subckt or2_x1 i0=soc.ram.ram[35][10] i1=$abc$109383$new_n43687_ q=$abc$109383$new_n46606_
+.subckt and21nor_x1 i0=soc.ram.ram[39][10] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n46607_
 .subckt nand2_x0 i0=$abc$109383$new_n46607_ i1=$abc$109383$new_n46606_ nq=$abc$109383$new_n46608_
 .subckt inv_x0 i=soc.ram.ram[38][10] nq=$abc$109383$new_n46609_
 .subckt nand2_x0 i0=$abc$109383$new_n46609_ i1=$abc$109383$new_n44930_ nq=$abc$109383$new_n46610_
-.subckt o2_x2 i0=soc.ram.ram[34][10] i1=$abc$109383$new_n45274_ q=$abc$109383$new_n46611_
-.subckt a2_x2 i0=$abc$109383$new_n46611_ i1=$abc$109383$new_n46128_ q=$abc$109383$new_n46612_
+.subckt or2_x1 i0=soc.ram.ram[34][10] i1=$abc$109383$new_n45274_ q=$abc$109383$new_n46611_
+.subckt and2_x1 i0=$abc$109383$new_n46611_ i1=$abc$109383$new_n46128_ q=$abc$109383$new_n46612_
 .subckt nand2_x0 i0=$abc$109383$new_n46612_ i1=$abc$109383$new_n46610_ nq=$abc$109383$new_n46613_
-.subckt oa22_x2 i0=$abc$109383$new_n46613_ i1=$abc$109383$new_n46608_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n46614_
+.subckt or21nand_x1 i0=$abc$109383$new_n46613_ i1=$abc$109383$new_n46608_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46614_
 .subckt inv_x0 i=soc.ram.ram[37][10] nq=$abc$109383$new_n46615_
 .subckt nand2_x0 i0=$abc$109383$new_n46615_ i1=$abc$109383$new_n43826_ nq=$abc$109383$new_n46616_
-.subckt ao22_x2 i0=soc.ram.ram[33][10] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n46617_
+.subckt and21nor_x1 i0=soc.ram.ram[33][10] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n46617_
 .subckt nand2_x0 i0=$abc$109383$new_n46617_ i1=$abc$109383$new_n46616_ nq=$abc$109383$new_n46618_
-.subckt mx2_x2 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[32][10] i1=soc.ram.ram[36][10] q=$abc$109383$new_n46619_
+.subckt mux2_x1 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[32][10] i1=soc.ram.ram[36][10] q=$abc$109383$new_n46619_
 .subckt nand2_x0 i0=$abc$109383$new_n46619_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n46620_
-.subckt oa22_x2 i0=$abc$109383$new_n46620_ i1=$abc$109383$new_n46618_ i2=$abc$109383$new_n44030_ q=$abc$109383$new_n46621_
+.subckt or21nand_x1 i0=$abc$109383$new_n46620_ i1=$abc$109383$new_n46618_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n46621_
 .subckt nand3_x0 i0=$abc$109383$new_n46621_ i1=$abc$109383$new_n46614_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n46622_
 .subckt nand3_x0 i0=$abc$109383$new_n46622_ i1=$abc$109383$new_n46605_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n46623_
 .subckt nand3_x0 i0=$abc$109383$new_n46623_ i1=$abc$109383$new_n46590_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n46624_
 .subckt nand2_x0 i0=$abc$109383$new_n46624_ i1=$abc$109383$new_n45475_ nq=$abc$109383$new_n46625_
 .subckt nor2_x0 i0=$abc$109383$new_n46625_ i1=$abc$109383$new_n46557_ nq=$abc$109383$new_n46626_
-.subckt mx2_x2 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[82][10] i1=soc.ram.ram[86][10] q=$abc$109383$new_n46627_
+.subckt mux2_x1 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[82][10] i1=soc.ram.ram[86][10] q=$abc$109383$new_n46627_
 .subckt nand2_x0 i0=$abc$109383$new_n46627_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n46628_
-.subckt mx2_x2 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[83][10] i1=soc.ram.ram[87][10] q=$abc$109383$new_n46629_
+.subckt mux2_x1 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[83][10] i1=soc.ram.ram[87][10] q=$abc$109383$new_n46629_
 .subckt nand2_x0 i0=$abc$109383$new_n46629_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n46630_
 .subckt nand3_x0 i0=$abc$109383$new_n46630_ i1=$abc$109383$new_n46628_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n46631_
-.subckt mx2_x2 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[80][10] i1=soc.ram.ram[84][10] q=$abc$109383$new_n46632_
+.subckt mux2_x1 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[80][10] i1=soc.ram.ram[84][10] q=$abc$109383$new_n46632_
 .subckt nand2_x0 i0=$abc$109383$new_n46632_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n46633_
-.subckt mx2_x2 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[81][10] i1=soc.ram.ram[85][10] q=$abc$109383$new_n46634_
+.subckt mux2_x1 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[81][10] i1=soc.ram.ram[85][10] q=$abc$109383$new_n46634_
 .subckt nand2_x0 i0=$abc$109383$new_n46634_ i1=$abc$109383$new_n43792_ nq=$abc$109383$new_n46635_
 .subckt nand3_x0 i0=$abc$109383$new_n46635_ i1=$abc$109383$new_n46633_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n46636_
 .subckt nand3_x0 i0=$abc$109383$new_n46636_ i1=$abc$109383$new_n46631_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n46637_
-.subckt mx2_x2 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[90][10] i1=soc.ram.ram[94][10] q=$abc$109383$new_n46638_
+.subckt mux2_x1 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[90][10] i1=soc.ram.ram[94][10] q=$abc$109383$new_n46638_
 .subckt nand2_x0 i0=$abc$109383$new_n46638_ i1=$abc$109383$new_n44078_ nq=$abc$109383$new_n46639_
-.subckt o2_x2 i0=soc.ram.ram[91][10] i1=$abc$109383$new_n45222_ q=$abc$109383$new_n46640_
+.subckt or2_x1 i0=soc.ram.ram[91][10] i1=$abc$109383$new_n45222_ q=$abc$109383$new_n46640_
 .subckt nand2_x0 i0=$abc$109383$new_n46640_ i1=$abc$109383$new_n45444_ nq=$abc$109383$new_n46641_
 .subckt inv_x0 i=soc.ram.ram[95][10] nq=$abc$109383$new_n46642_
-.subckt a2_x2 i0=$abc$109383$new_n46642_ i1=$abc$109383$new_n45030_ q=$abc$109383$new_n46643_
-.subckt ao22_x2 i0=$abc$109383$new_n46643_ i1=$abc$109383$new_n46641_ i2=$abc$109383$new_n46639_ q=$abc$109383$new_n46644_
+.subckt and2_x1 i0=$abc$109383$new_n46642_ i1=$abc$109383$new_n45030_ q=$abc$109383$new_n46643_
+.subckt and21nor_x1 i0=$abc$109383$new_n46643_ i1=$abc$109383$new_n46641_ i2=$abc$109383$new_n46639_ nq=$abc$109383$new_n46644_
 .subckt nand2_x0 i0=$abc$109383$new_n46644_ i1=$abc$109383$new_n44622_ nq=$abc$109383$new_n46645_
-.subckt mx2_x2 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[88][10] i1=soc.ram.ram[92][10] q=$abc$109383$new_n46646_
+.subckt mux2_x1 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[88][10] i1=soc.ram.ram[92][10] q=$abc$109383$new_n46646_
 .subckt nand2_x0 i0=$abc$109383$new_n46646_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n46647_
 .subckt inv_x0 i=soc.ram.ram[93][10] nq=$abc$109383$new_n46648_
 .subckt nand2_x0 i0=$abc$109383$new_n46648_ i1=$abc$109383$new_n44924_ nq=$abc$109383$new_n46649_
-.subckt ao22_x2 i0=soc.ram.ram[89][10] i1=$abc$109383$new_n44824_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n46650_
+.subckt and21nor_x1 i0=soc.ram.ram[89][10] i1=$abc$109383$new_n44824_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n46650_
 .subckt nand2_x0 i0=$abc$109383$new_n46650_ i1=$abc$109383$new_n46649_ nq=$abc$109383$new_n46651_
 .subckt nand3_x0 i0=$abc$109383$new_n46651_ i1=$abc$109383$new_n46647_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n46652_
 .subckt nand3_x0 i0=$abc$109383$new_n46652_ i1=$abc$109383$new_n46645_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n46653_
-.subckt oa22_x2 i0=$abc$109383$new_n46653_ i1=$abc$109383$new_n46637_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n46654_
-.subckt mx2_x2 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[74][10] i1=soc.ram.ram[78][10] q=$abc$109383$new_n46655_
+.subckt or21nand_x1 i0=$abc$109383$new_n46653_ i1=$abc$109383$new_n46637_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n46654_
+.subckt mux2_x1 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[74][10] i1=soc.ram.ram[78][10] q=$abc$109383$new_n46655_
 .subckt nand2_x0 i0=$abc$109383$new_n46655_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n46656_
-.subckt mx2_x2 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[75][10] i1=soc.ram.ram[79][10] q=$abc$109383$new_n46657_
+.subckt mux2_x1 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[75][10] i1=soc.ram.ram[79][10] q=$abc$109383$new_n46657_
 .subckt nand2_x0 i0=$abc$109383$new_n46657_ i1=$abc$109383$new_n43792_ nq=$abc$109383$new_n46658_
 .subckt nand3_x0 i0=$abc$109383$new_n46658_ i1=$abc$109383$new_n46656_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n46659_
-.subckt mx2_x2 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[72][10] i1=soc.ram.ram[76][10] q=$abc$109383$new_n46660_
+.subckt mux2_x1 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[72][10] i1=soc.ram.ram[76][10] q=$abc$109383$new_n46660_
 .subckt nand2_x0 i0=$abc$109383$new_n46660_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n46661_
-.subckt mx2_x2 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[73][10] i1=soc.ram.ram[77][10] q=$abc$109383$new_n46662_
+.subckt mux2_x1 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[73][10] i1=soc.ram.ram[77][10] q=$abc$109383$new_n46662_
 .subckt nand2_x0 i0=$abc$109383$new_n46662_ i1=$abc$109383$new_n45405_ nq=$abc$109383$new_n46663_
 .subckt nand3_x0 i0=$abc$109383$new_n46663_ i1=$abc$109383$new_n46661_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n46664_
 .subckt nand3_x0 i0=$abc$109383$new_n46664_ i1=$abc$109383$new_n46659_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n46665_
 .subckt inv_x0 i=soc.ram.ram[69][10] nq=$abc$109383$new_n46666_
 .subckt nand2_x0 i0=$abc$109383$new_n46666_ i1=$abc$109383$new_n44704_ nq=$abc$109383$new_n46667_
-.subckt ao22_x2 i0=soc.ram.ram[65][10] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n43823_ q=$abc$109383$new_n46668_
+.subckt and21nor_x1 i0=soc.ram.ram[65][10] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n43823_ nq=$abc$109383$new_n46668_
 .subckt nand2_x0 i0=$abc$109383$new_n46668_ i1=$abc$109383$new_n46667_ nq=$abc$109383$new_n46669_
-.subckt mx2_x2 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[64][10] i1=soc.ram.ram[68][10] q=$abc$109383$new_n46670_
+.subckt mux2_x1 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[64][10] i1=soc.ram.ram[68][10] q=$abc$109383$new_n46670_
 .subckt nand2_x0 i0=$abc$109383$new_n46670_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n46671_
 .subckt nand3_x0 i0=$abc$109383$new_n46671_ i1=$abc$109383$new_n46669_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n46672_
 .subckt inv_x0 i=soc.ram.ram[71][10] nq=$abc$109383$new_n46673_
 .subckt nand2_x0 i0=$abc$109383$new_n46673_ i1=$abc$109383$new_n44924_ nq=$abc$109383$new_n46674_
-.subckt ao22_x2 i0=soc.ram.ram[67][10] i1=$abc$109383$new_n45227_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n46675_
+.subckt and21nor_x1 i0=soc.ram.ram[67][10] i1=$abc$109383$new_n45227_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n46675_
 .subckt nand2_x0 i0=$abc$109383$new_n46675_ i1=$abc$109383$new_n46674_ nq=$abc$109383$new_n46676_
-.subckt mx2_x2 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[66][10] i1=soc.ram.ram[70][10] q=$abc$109383$new_n46677_
+.subckt mux2_x1 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[66][10] i1=soc.ram.ram[70][10] q=$abc$109383$new_n46677_
 .subckt nand2_x0 i0=$abc$109383$new_n46677_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n46678_
 .subckt nand3_x0 i0=$abc$109383$new_n46678_ i1=$abc$109383$new_n46676_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n46679_
 .subckt nand3_x0 i0=$abc$109383$new_n46679_ i1=$abc$109383$new_n46672_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n46680_
-.subckt oa22_x2 i0=$abc$109383$new_n46680_ i1=$abc$109383$new_n46665_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n46681_
+.subckt or21nand_x1 i0=$abc$109383$new_n46680_ i1=$abc$109383$new_n46665_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n46681_
 .subckt nand3_x0 i0=$abc$109383$new_n46681_ i1=$abc$109383$new_n46654_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n46682_
-.subckt mx2_x2 cmd=$abc$109383$new_n44234_ i0=soc.ram.ram[98][10] i1=soc.ram.ram[102][10] q=$abc$109383$new_n46683_
+.subckt mux2_x1 cmd=$abc$109383$new_n44234_ i0=soc.ram.ram[98][10] i1=soc.ram.ram[102][10] q=$abc$109383$new_n46683_
 .subckt nand2_x0 i0=$abc$109383$new_n46683_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46684_
-.subckt mx2_x2 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[99][10] i1=soc.ram.ram[103][10] q=$abc$109383$new_n46685_
+.subckt mux2_x1 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[99][10] i1=soc.ram.ram[103][10] q=$abc$109383$new_n46685_
 .subckt nand2_x0 i0=$abc$109383$new_n46685_ i1=$abc$109383$new_n46175_ nq=$abc$109383$new_n46686_
 .subckt nand3_x0 i0=$abc$109383$new_n46686_ i1=$abc$109383$new_n46684_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n46687_
-.subckt mx2_x2 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[96][10] i1=soc.ram.ram[100][10] q=$abc$109383$new_n46688_
+.subckt mux2_x1 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[96][10] i1=soc.ram.ram[100][10] q=$abc$109383$new_n46688_
 .subckt nand2_x0 i0=$abc$109383$new_n46688_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n46689_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[97][10] i1=soc.ram.ram[101][10] q=$abc$109383$new_n46690_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[97][10] i1=soc.ram.ram[101][10] q=$abc$109383$new_n46690_
 .subckt nand2_x0 i0=$abc$109383$new_n46690_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n46691_
 .subckt nand3_x0 i0=$abc$109383$new_n46691_ i1=$abc$109383$new_n46689_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n46692_
 .subckt nand3_x0 i0=$abc$109383$new_n46692_ i1=$abc$109383$new_n46687_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n46693_
-.subckt mx2_x2 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[106][10] i1=soc.ram.ram[110][10] q=$abc$109383$new_n46694_
+.subckt mux2_x1 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[106][10] i1=soc.ram.ram[110][10] q=$abc$109383$new_n46694_
 .subckt nand2_x0 i0=$abc$109383$new_n46694_ i1=$abc$109383$new_n44837_ nq=$abc$109383$new_n46695_
 .subckt buf_x4 i=$abc$109383$new_n44402_ q=$abc$109383$new_n46696_
-.subckt o2_x2 i0=soc.ram.ram[107][10] i1=$abc$109383$new_n43686_ q=$abc$109383$new_n46697_
+.subckt or2_x1 i0=soc.ram.ram[107][10] i1=$abc$109383$new_n43686_ q=$abc$109383$new_n46697_
 .subckt nand2_x0 i0=$abc$109383$new_n46697_ i1=$abc$109383$new_n46696_ nq=$abc$109383$new_n46698_
 .subckt inv_x0 i=soc.ram.ram[111][10] nq=$abc$109383$new_n46699_
-.subckt a2_x2 i0=$abc$109383$new_n46699_ i1=$abc$109383$new_n45755_ q=$abc$109383$new_n46700_
-.subckt ao22_x2 i0=$abc$109383$new_n46700_ i1=$abc$109383$new_n46698_ i2=$abc$109383$new_n46695_ q=$abc$109383$new_n46701_
+.subckt and2_x1 i0=$abc$109383$new_n46699_ i1=$abc$109383$new_n45755_ q=$abc$109383$new_n46700_
+.subckt and21nor_x1 i0=$abc$109383$new_n46700_ i1=$abc$109383$new_n46698_ i2=$abc$109383$new_n46695_ nq=$abc$109383$new_n46701_
 .subckt nand2_x0 i0=$abc$109383$new_n46701_ i1=$abc$109383$new_n46119_ nq=$abc$109383$new_n46702_
-.subckt mx2_x2 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[104][10] i1=soc.ram.ram[108][10] q=$abc$109383$new_n46703_
+.subckt mux2_x1 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[104][10] i1=soc.ram.ram[108][10] q=$abc$109383$new_n46703_
 .subckt nand2_x0 i0=$abc$109383$new_n46703_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n46704_
 .subckt inv_x0 i=soc.ram.ram[109][10] nq=$abc$109383$new_n46705_
 .subckt nand2_x0 i0=$abc$109383$new_n46705_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n46706_
-.subckt ao22_x2 i0=soc.ram.ram[105][10] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n46707_
+.subckt and21nor_x1 i0=soc.ram.ram[105][10] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n46707_
 .subckt nand2_x0 i0=$abc$109383$new_n46707_ i1=$abc$109383$new_n46706_ nq=$abc$109383$new_n46708_
 .subckt nand3_x0 i0=$abc$109383$new_n46708_ i1=$abc$109383$new_n46704_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46709_
 .subckt nand3_x0 i0=$abc$109383$new_n46709_ i1=$abc$109383$new_n46702_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n46710_
-.subckt oa22_x2 i0=$abc$109383$new_n46710_ i1=$abc$109383$new_n46693_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n46711_
-.subckt mx2_x2 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[122][10] i1=soc.ram.ram[126][10] q=$abc$109383$new_n46712_
+.subckt or21nand_x1 i0=$abc$109383$new_n46710_ i1=$abc$109383$new_n46693_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n46711_
+.subckt mux2_x1 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[122][10] i1=soc.ram.ram[126][10] q=$abc$109383$new_n46712_
 .subckt nand2_x0 i0=$abc$109383$new_n46712_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n46713_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[123][10] i1=soc.ram.ram[127][10] q=$abc$109383$new_n46714_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[123][10] i1=soc.ram.ram[127][10] q=$abc$109383$new_n46714_
 .subckt nand2_x0 i0=$abc$109383$new_n46714_ i1=$abc$109383$new_n45268_ nq=$abc$109383$new_n46715_
 .subckt nand3_x0 i0=$abc$109383$new_n46715_ i1=$abc$109383$new_n46713_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n46716_
-.subckt mx2_x2 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[120][10] i1=soc.ram.ram[124][10] q=$abc$109383$new_n46717_
+.subckt mux2_x1 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[120][10] i1=soc.ram.ram[124][10] q=$abc$109383$new_n46717_
 .subckt nand2_x0 i0=$abc$109383$new_n46717_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n46718_
-.subckt mx2_x2 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[121][10] i1=soc.ram.ram[125][10] q=$abc$109383$new_n46719_
+.subckt mux2_x1 cmd=$abc$109383$new_n43868_ i0=soc.ram.ram[121][10] i1=soc.ram.ram[125][10] q=$abc$109383$new_n46719_
 .subckt nand2_x0 i0=$abc$109383$new_n46719_ i1=$abc$109383$new_n43963_ nq=$abc$109383$new_n46720_
 .subckt nand3_x0 i0=$abc$109383$new_n46720_ i1=$abc$109383$new_n46718_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n46721_
 .subckt nand3_x0 i0=$abc$109383$new_n46721_ i1=$abc$109383$new_n46716_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n46722_
 .subckt inv_x0 i=soc.ram.ram[117][10] nq=$abc$109383$new_n46723_
 .subckt nand2_x0 i0=$abc$109383$new_n46723_ i1=$abc$109383$new_n44936_ nq=$abc$109383$new_n46724_
-.subckt ao22_x2 i0=soc.ram.ram[113][10] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n46725_
+.subckt and21nor_x1 i0=soc.ram.ram[113][10] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n46725_
 .subckt nand2_x0 i0=$abc$109383$new_n46725_ i1=$abc$109383$new_n46724_ nq=$abc$109383$new_n46726_
-.subckt mx2_x2 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[112][10] i1=soc.ram.ram[116][10] q=$abc$109383$new_n46727_
+.subckt mux2_x1 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[112][10] i1=soc.ram.ram[116][10] q=$abc$109383$new_n46727_
 .subckt nand2_x0 i0=$abc$109383$new_n46727_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n46728_
 .subckt nand3_x0 i0=$abc$109383$new_n46728_ i1=$abc$109383$new_n46726_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46729_
 .subckt inv_x0 i=soc.ram.ram[119][10] nq=$abc$109383$new_n46730_
 .subckt nand2_x0 i0=$abc$109383$new_n46730_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n46731_
-.subckt ao22_x2 i0=soc.ram.ram[115][10] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n46732_
+.subckt and21nor_x1 i0=soc.ram.ram[115][10] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n46732_
 .subckt nand2_x0 i0=$abc$109383$new_n46732_ i1=$abc$109383$new_n46731_ nq=$abc$109383$new_n46733_
-.subckt mx2_x2 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[114][10] i1=soc.ram.ram[118][10] q=$abc$109383$new_n46734_
+.subckt mux2_x1 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[114][10] i1=soc.ram.ram[118][10] q=$abc$109383$new_n46734_
 .subckt nand2_x0 i0=$abc$109383$new_n46734_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n46735_
 .subckt nand3_x0 i0=$abc$109383$new_n46735_ i1=$abc$109383$new_n46733_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n46736_
 .subckt nand3_x0 i0=$abc$109383$new_n46736_ i1=$abc$109383$new_n46729_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n46737_
-.subckt oa22_x2 i0=$abc$109383$new_n46737_ i1=$abc$109383$new_n46722_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n46738_
+.subckt or21nand_x1 i0=$abc$109383$new_n46737_ i1=$abc$109383$new_n46722_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n46738_
 .subckt nand3_x0 i0=$abc$109383$new_n46738_ i1=$abc$109383$new_n46711_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n46739_
-.subckt a3_x2 i0=$abc$109383$new_n46739_ i1=$abc$109383$new_n46682_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n46740_
-.subckt ao22_x2 i0=$abc$109383$new_n46740_ i1=$abc$109383$new_n46626_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n46741_
+.subckt and3_x1 i0=$abc$109383$new_n46739_ i1=$abc$109383$new_n46682_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n46740_
+.subckt and21nor_x1 i0=$abc$109383$new_n46740_ i1=$abc$109383$new_n46626_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n46741_
 .subckt nand3_x0 i0=$abc$109383$new_n20241_ i1=$abc$109383$new_n23713_ i2=soc.bridge.csr_bridge_1.wb__dat_r[10] nq=$abc$109383$new_n46742_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[10] nq=$abc$109383$new_n46743_
-.subckt o2_x2 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n46743_ q=$abc$109383$new_n46744_
-.subckt a2_x2 i0=$abc$109383$new_n46744_ i1=$abc$109383$new_n46742_ q=$abc$109383$new_n46745_
-.subckt o4_x2 i0=$abc$109383$new_n46745_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n46746_
+.subckt or2_x1 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n46743_ q=$abc$109383$new_n46744_
+.subckt and2_x1 i0=$abc$109383$new_n46744_ i1=$abc$109383$new_n46742_ q=$abc$109383$new_n46745_
+.subckt or4_x1 i0=$abc$109383$new_n46745_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n46746_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[10] nq=$abc$109383$new_n46747_
 .subckt inv_x0 i=soc.hyperram.sr[10] nq=$abc$109383$new_n46748_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n46748_ q=$abc$109383$new_n46749_
-.subckt a2_x2 i0=$abc$109383$new_n46749_ i1=$abc$109383$new_n46747_ q=$abc$109383$new_n46750_
-.subckt a2_x2 i0=$abc$109383$new_n46750_ i1=$abc$109383$new_n46746_ q=$abc$109383$new_n46751_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n46748_ q=$abc$109383$new_n46749_
+.subckt and2_x1 i0=$abc$109383$new_n46749_ i1=$abc$109383$new_n46747_ q=$abc$109383$new_n46750_
+.subckt and2_x1 i0=$abc$109383$new_n46750_ i1=$abc$109383$new_n46746_ q=$abc$109383$new_n46751_
 .subckt nand3_x0 i0=$abc$109383$new_n27494_ i1=$abc$109383$new_n44282_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[10] nq=$abc$109383$new_n46752_
 .subckt nand3_x0 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[10] nq=$abc$109383$new_n46753_
-.subckt oa22_x2 i0=$abc$109383$new_n46753_ i1=$abc$109383$new_n46752_ i2=$abc$109383$new_n28563_ q=$abc$109383$new_n46754_
+.subckt or21nand_x1 i0=$abc$109383$new_n46753_ i1=$abc$109383$new_n46752_ i2=$abc$109383$new_n28563_ nq=$abc$109383$new_n46754_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n27640_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[10] nq=$abc$109383$new_n46755_
 .subckt nand3_x0 i0=$abc$109383$new_n46755_ i1=$abc$109383$new_n46754_ i2=$abc$109383$new_n46751_ nq=$abc$109383$new_n46756_
-.subckt o2_x2 i0=$abc$109383$new_n46756_ i1=$abc$109383$new_n46741_ q=$abc$109383$new_n46757_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n46757_ i2=$abc$109383$new_n46492_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103238
-.subckt oa22_x2 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[11] q=$abc$109383$new_n46759_
-.subckt a2_x2 i0=$abc$109383$new_n46759_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n46760_
+.subckt or2_x1 i0=$abc$109383$new_n46756_ i1=$abc$109383$new_n46741_ q=$abc$109383$new_n46757_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n46757_ i2=$abc$109383$new_n46492_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103238
+.subckt or21nand_x1 i0=$abc$109383$new_n29203_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[11] nq=$abc$109383$new_n46759_
+.subckt and2_x1 i0=$abc$109383$new_n46759_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n46760_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[11] nq=$abc$109383$new_n46761_
 .subckt inv_x0 i=soc.hyperram.sr[11] nq=$abc$109383$new_n46762_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n46762_ q=$abc$109383$new_n46763_
-.subckt a2_x2 i0=$abc$109383$new_n46763_ i1=$abc$109383$new_n46761_ q=$abc$109383$new_n46764_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n46762_ q=$abc$109383$new_n46763_
+.subckt and2_x1 i0=$abc$109383$new_n46763_ i1=$abc$109383$new_n46761_ q=$abc$109383$new_n46764_
 .subckt nand3_x0 i0=$abc$109383$new_n27494_ i1=$abc$109383$new_n44282_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[11] nq=$abc$109383$new_n46765_
 .subckt nand3_x0 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[11] nq=$abc$109383$new_n46766_
-.subckt oa22_x2 i0=$abc$109383$new_n46766_ i1=$abc$109383$new_n46765_ i2=$abc$109383$new_n28563_ q=$abc$109383$new_n46767_
+.subckt or21nand_x1 i0=$abc$109383$new_n46766_ i1=$abc$109383$new_n46765_ i2=$abc$109383$new_n28563_ nq=$abc$109383$new_n46767_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[11] nq=$abc$109383$new_n46768_
-.subckt o2_x2 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n46768_ q=$abc$109383$new_n46769_
-.subckt o4_x2 i0=$abc$109383$new_n46769_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n46770_
+.subckt or2_x1 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n46768_ q=$abc$109383$new_n46769_
+.subckt or4_x1 i0=$abc$109383$new_n46769_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n46770_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[11] nq=$abc$109383$new_n46771_
-.subckt ao22_x2 i0=$abc$109383$new_n46771_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n46770_ q=$abc$109383$new_n46772_
+.subckt and21nor_x1 i0=$abc$109383$new_n46771_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n46770_ nq=$abc$109383$new_n46772_
 .subckt nand3_x0 i0=$abc$109383$new_n46772_ i1=$abc$109383$new_n46767_ i2=$abc$109383$new_n46764_ nq=$abc$109383$new_n46773_
-.subckt mx2_x2 cmd=$abc$109383$new_n45445_ i0=soc.ram.ram[19][11] i1=soc.ram.ram[23][11] q=$abc$109383$new_n46774_
+.subckt mux2_x1 cmd=$abc$109383$new_n45445_ i0=soc.ram.ram[19][11] i1=soc.ram.ram[23][11] q=$abc$109383$new_n46774_
 .subckt nand2_x0 i0=$abc$109383$new_n46774_ i1=$abc$109383$new_n43924_ nq=$abc$109383$new_n46775_
-.subckt mx2_x2 cmd=$abc$109383$new_n44450_ i0=soc.ram.ram[18][11] i1=soc.ram.ram[22][11] q=$abc$109383$new_n46776_
+.subckt mux2_x1 cmd=$abc$109383$new_n44450_ i0=soc.ram.ram[18][11] i1=soc.ram.ram[22][11] q=$abc$109383$new_n46776_
 .subckt nand2_x0 i0=$abc$109383$new_n46776_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n46777_
 .subckt nand3_x0 i0=$abc$109383$new_n46777_ i1=$abc$109383$new_n46775_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n46778_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[17][11] i1=soc.ram.ram[21][11] q=$abc$109383$new_n46779_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[16][11] i1=soc.ram.ram[20][11] q=$abc$109383$new_n46780_
-.subckt mx2_x2 cmd=$abc$109383$new_n44750_ i0=$abc$109383$new_n46780_ i1=$abc$109383$new_n46779_ q=$abc$109383$new_n46781_
-.subckt ao22_x2 i0=$abc$109383$new_n43842_ i1=$abc$109383$new_n46781_ i2=$abc$109383$new_n44479_ q=$abc$109383$new_n46782_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[17][11] i1=soc.ram.ram[21][11] q=$abc$109383$new_n46779_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[16][11] i1=soc.ram.ram[20][11] q=$abc$109383$new_n46780_
+.subckt mux2_x1 cmd=$abc$109383$new_n44750_ i0=$abc$109383$new_n46780_ i1=$abc$109383$new_n46779_ q=$abc$109383$new_n46781_
+.subckt and21nor_x1 i0=$abc$109383$new_n43842_ i1=$abc$109383$new_n46781_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n46782_
 .subckt nand2_x0 i0=$abc$109383$new_n46782_ i1=$abc$109383$new_n46778_ nq=$abc$109383$new_n46783_
 .subckt inv_x0 i=soc.ram.ram[31][11] nq=$abc$109383$new_n46784_
 .subckt nand2_x0 i0=$abc$109383$new_n46784_ i1=$abc$109383$new_n44605_ nq=$abc$109383$new_n46785_
-.subckt ao22_x2 i0=soc.ram.ram[27][11] i1=$abc$109383$new_n44088_ i2=$abc$109383$new_n46112_ q=$abc$109383$new_n46786_
+.subckt and21nor_x1 i0=soc.ram.ram[27][11] i1=$abc$109383$new_n44088_ i2=$abc$109383$new_n46112_ nq=$abc$109383$new_n46786_
 .subckt nand2_x0 i0=$abc$109383$new_n46786_ i1=$abc$109383$new_n46785_ nq=$abc$109383$new_n46787_
-.subckt mx2_x2 cmd=$abc$109383$new_n43743_ i0=soc.ram.ram[26][11] i1=soc.ram.ram[30][11] q=$abc$109383$new_n46788_
+.subckt mux2_x1 cmd=$abc$109383$new_n43743_ i0=soc.ram.ram[26][11] i1=soc.ram.ram[30][11] q=$abc$109383$new_n46788_
 .subckt nand2_x0 i0=$abc$109383$new_n46788_ i1=$abc$109383$new_n44008_ nq=$abc$109383$new_n46789_
-.subckt a2_x2 i0=$abc$109383$new_n46789_ i1=$abc$109383$new_n46154_ q=$abc$109383$new_n46790_
+.subckt and2_x1 i0=$abc$109383$new_n46789_ i1=$abc$109383$new_n46154_ q=$abc$109383$new_n46790_
 .subckt nand2_x0 i0=$abc$109383$new_n46790_ i1=$abc$109383$new_n46787_ nq=$abc$109383$new_n46791_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[24][11] i1=soc.ram.ram[28][11] q=$abc$109383$new_n46792_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[24][11] i1=soc.ram.ram[28][11] q=$abc$109383$new_n46792_
 .subckt nand2_x0 i0=$abc$109383$new_n46792_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n46793_
 .subckt inv_x0 i=soc.ram.ram[29][11] nq=$abc$109383$new_n46794_
 .subckt nand2_x0 i0=$abc$109383$new_n46794_ i1=$abc$109383$new_n45322_ nq=$abc$109383$new_n46795_
-.subckt ao22_x2 i0=soc.ram.ram[25][11] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ q=$abc$109383$new_n46796_
+.subckt and21nor_x1 i0=soc.ram.ram[25][11] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ nq=$abc$109383$new_n46796_
 .subckt nand2_x0 i0=$abc$109383$new_n46796_ i1=$abc$109383$new_n46795_ nq=$abc$109383$new_n46797_
 .subckt nand3_x0 i0=$abc$109383$new_n46797_ i1=$abc$109383$new_n46793_ i2=$abc$109383$new_n44812_ nq=$abc$109383$new_n46798_
 .subckt nand3_x0 i0=$abc$109383$new_n46798_ i1=$abc$109383$new_n46791_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n46799_
-.subckt oa22_x2 i0=$abc$109383$new_n46799_ i1=$abc$109383$new_n46783_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n46800_
-.subckt mx2_x2 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[11][11] i1=soc.ram.ram[15][11] q=$abc$109383$new_n46801_
-.subckt mx2_x2 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[10][11] i1=soc.ram.ram[14][11] q=$abc$109383$new_n46802_
-.subckt mx2_x2 cmd=$abc$109383$new_n43691_ i0=$abc$109383$new_n46802_ i1=$abc$109383$new_n46801_ q=$abc$109383$new_n46803_
-.subckt o2_x2 i0=$abc$109383$new_n46803_ i1=$abc$109383$new_n45401_ q=$abc$109383$new_n46804_
-.subckt mx2_x2 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[9][11] i1=soc.ram.ram[13][11] q=$abc$109383$new_n46805_
-.subckt mx2_x2 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[8][11] i1=soc.ram.ram[12][11] q=$abc$109383$new_n46806_
-.subckt mx2_x2 cmd=$abc$109383$new_n43872_ i0=$abc$109383$new_n46806_ i1=$abc$109383$new_n46805_ q=$abc$109383$new_n46807_
-.subckt ao22_x2 i0=$abc$109383$new_n43948_ i1=$abc$109383$new_n46807_ i2=$abc$109383$new_n45335_ q=$abc$109383$new_n46808_
+.subckt or21nand_x1 i0=$abc$109383$new_n46799_ i1=$abc$109383$new_n46783_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n46800_
+.subckt mux2_x1 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[11][11] i1=soc.ram.ram[15][11] q=$abc$109383$new_n46801_
+.subckt mux2_x1 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[10][11] i1=soc.ram.ram[14][11] q=$abc$109383$new_n46802_
+.subckt mux2_x1 cmd=$abc$109383$new_n43691_ i0=$abc$109383$new_n46802_ i1=$abc$109383$new_n46801_ q=$abc$109383$new_n46803_
+.subckt or2_x1 i0=$abc$109383$new_n46803_ i1=$abc$109383$new_n45401_ q=$abc$109383$new_n46804_
+.subckt mux2_x1 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[9][11] i1=soc.ram.ram[13][11] q=$abc$109383$new_n46805_
+.subckt mux2_x1 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[8][11] i1=soc.ram.ram[12][11] q=$abc$109383$new_n46806_
+.subckt mux2_x1 cmd=$abc$109383$new_n43872_ i0=$abc$109383$new_n46806_ i1=$abc$109383$new_n46805_ q=$abc$109383$new_n46807_
+.subckt and21nor_x1 i0=$abc$109383$new_n43948_ i1=$abc$109383$new_n46807_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n46808_
 .subckt nand2_x0 i0=$abc$109383$new_n46808_ i1=$abc$109383$new_n46804_ nq=$abc$109383$new_n46809_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[0][11] i1=soc.ram.ram[4][11] q=$abc$109383$new_n46810_
-.subckt a2_x2 i0=$abc$109383$new_n46810_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n46811_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[0][11] i1=soc.ram.ram[4][11] q=$abc$109383$new_n46810_
+.subckt and2_x1 i0=$abc$109383$new_n46810_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n46811_
 .subckt inv_x0 i=soc.ram.ram[5][11] nq=$abc$109383$new_n46812_
 .subckt nand2_x0 i0=$abc$109383$new_n46812_ i1=$abc$109383$new_n43608_ nq=$abc$109383$new_n46813_
 .subckt buf_x4 i=$abc$109383$new_n43556_ q=$abc$109383$new_n46814_
-.subckt ao22_x2 i0=soc.ram.ram[1][11] i1=$abc$109383$new_n43818_ i2=$abc$109383$new_n46814_ q=$abc$109383$new_n46815_
-.subckt oa22_x2 i0=$abc$109383$new_n46815_ i1=$abc$109383$new_n46813_ i2=$abc$109383$new_n46811_ q=$abc$109383$new_n46816_
-.subckt ao22_x2 i0=soc.ram.ram[3][11] i1=$abc$109383$new_n44423_ i2=$abc$109383$new_n43443_ q=$abc$109383$new_n46817_
-.subckt ao22_x2 i0=$abc$109383$new_n43929_ i1=soc.ram.ram[7][11] i2=$abc$109383$new_n46817_ q=$abc$109383$new_n46818_
-.subckt mx2_x2 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[2][11] i1=soc.ram.ram[6][11] q=$abc$109383$new_n46819_
-.subckt oa22_x2 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n46819_ i2=$abc$109383$new_n46818_ q=$abc$109383$new_n46820_
-.subckt mx2_x2 cmd=$abc$109383$new_n43473_ i0=$abc$109383$new_n46820_ i1=$abc$109383$new_n46816_ q=$abc$109383$new_n46821_
+.subckt and21nor_x1 i0=soc.ram.ram[1][11] i1=$abc$109383$new_n43818_ i2=$abc$109383$new_n46814_ nq=$abc$109383$new_n46815_
+.subckt or21nand_x1 i0=$abc$109383$new_n46815_ i1=$abc$109383$new_n46813_ i2=$abc$109383$new_n46811_ nq=$abc$109383$new_n46816_
+.subckt and21nor_x1 i0=soc.ram.ram[3][11] i1=$abc$109383$new_n44423_ i2=$abc$109383$new_n43443_ nq=$abc$109383$new_n46817_
+.subckt and21nor_x1 i0=$abc$109383$new_n43929_ i1=soc.ram.ram[7][11] i2=$abc$109383$new_n46817_ nq=$abc$109383$new_n46818_
+.subckt mux2_x1 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[2][11] i1=soc.ram.ram[6][11] q=$abc$109383$new_n46819_
+.subckt or21nand_x1 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n46819_ i2=$abc$109383$new_n46818_ nq=$abc$109383$new_n46820_
+.subckt mux2_x1 cmd=$abc$109383$new_n43473_ i0=$abc$109383$new_n46820_ i1=$abc$109383$new_n46816_ q=$abc$109383$new_n46821_
 .subckt nand2_x0 i0=$abc$109383$new_n46821_ i1=$abc$109383$new_n43472_ nq=$abc$109383$new_n46822_
-.subckt oa22_x2 i0=$abc$109383$new_n46822_ i1=$abc$109383$new_n46809_ i2=$abc$109383$new_n43783_ q=$abc$109383$new_n46823_
-.subckt a3_x2 i0=$abc$109383$new_n46823_ i1=$abc$109383$new_n46800_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n46824_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[50][11] i1=soc.ram.ram[54][11] q=$abc$109383$new_n46825_
+.subckt or21nand_x1 i0=$abc$109383$new_n46822_ i1=$abc$109383$new_n46809_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n46823_
+.subckt and3_x1 i0=$abc$109383$new_n46823_ i1=$abc$109383$new_n46800_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n46824_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[50][11] i1=soc.ram.ram[54][11] q=$abc$109383$new_n46825_
 .subckt nand2_x0 i0=$abc$109383$new_n46825_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n46826_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[51][11] i1=soc.ram.ram[55][11] q=$abc$109383$new_n46827_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[51][11] i1=soc.ram.ram[55][11] q=$abc$109383$new_n46827_
 .subckt nand2_x0 i0=$abc$109383$new_n46827_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n46828_
 .subckt nand3_x0 i0=$abc$109383$new_n46828_ i1=$abc$109383$new_n46826_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n46829_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[48][11] i1=soc.ram.ram[52][11] q=$abc$109383$new_n46830_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[48][11] i1=soc.ram.ram[52][11] q=$abc$109383$new_n46830_
 .subckt nand2_x0 i0=$abc$109383$new_n46830_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n46831_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[49][11] i1=soc.ram.ram[53][11] q=$abc$109383$new_n46832_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[49][11] i1=soc.ram.ram[53][11] q=$abc$109383$new_n46832_
 .subckt nand2_x0 i0=$abc$109383$new_n46832_ i1=$abc$109383$new_n45405_ nq=$abc$109383$new_n46833_
 .subckt nand3_x0 i0=$abc$109383$new_n46833_ i1=$abc$109383$new_n46831_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n46834_
 .subckt nand3_x0 i0=$abc$109383$new_n46834_ i1=$abc$109383$new_n46829_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n46835_
-.subckt mx2_x2 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[58][11] i1=soc.ram.ram[62][11] q=$abc$109383$new_n46836_
+.subckt mux2_x1 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[58][11] i1=soc.ram.ram[62][11] q=$abc$109383$new_n46836_
 .subckt nand2_x0 i0=$abc$109383$new_n46836_ i1=$abc$109383$new_n44180_ nq=$abc$109383$new_n46837_
-.subckt o2_x2 i0=soc.ram.ram[59][11] i1=$abc$109383$new_n43887_ q=$abc$109383$new_n46838_
+.subckt or2_x1 i0=soc.ram.ram[59][11] i1=$abc$109383$new_n43887_ q=$abc$109383$new_n46838_
 .subckt nand2_x0 i0=$abc$109383$new_n46838_ i1=$abc$109383$new_n45094_ nq=$abc$109383$new_n46839_
 .subckt inv_x0 i=soc.ram.ram[63][11] nq=$abc$109383$new_n46840_
-.subckt a2_x2 i0=$abc$109383$new_n46840_ i1=$abc$109383$new_n45691_ q=$abc$109383$new_n46841_
-.subckt ao22_x2 i0=$abc$109383$new_n46841_ i1=$abc$109383$new_n46839_ i2=$abc$109383$new_n46837_ q=$abc$109383$new_n46842_
+.subckt and2_x1 i0=$abc$109383$new_n46840_ i1=$abc$109383$new_n45691_ q=$abc$109383$new_n46841_
+.subckt and21nor_x1 i0=$abc$109383$new_n46841_ i1=$abc$109383$new_n46839_ i2=$abc$109383$new_n46837_ nq=$abc$109383$new_n46842_
 .subckt nand2_x0 i0=$abc$109383$new_n46842_ i1=$abc$109383$new_n45137_ nq=$abc$109383$new_n46843_
-.subckt mx2_x2 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[56][11] i1=soc.ram.ram[60][11] q=$abc$109383$new_n46844_
+.subckt mux2_x1 cmd=$abc$109383$new_n44225_ i0=soc.ram.ram[56][11] i1=soc.ram.ram[60][11] q=$abc$109383$new_n46844_
 .subckt nand2_x0 i0=$abc$109383$new_n46844_ i1=$abc$109383$new_n43681_ nq=$abc$109383$new_n46845_
 .subckt inv_x0 i=soc.ram.ram[61][11] nq=$abc$109383$new_n46846_
 .subckt nand2_x0 i0=$abc$109383$new_n46846_ i1=$abc$109383$new_n43978_ nq=$abc$109383$new_n46847_
-.subckt ao22_x2 i0=soc.ram.ram[57][11] i1=$abc$109383$new_n43811_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n46848_
+.subckt and21nor_x1 i0=soc.ram.ram[57][11] i1=$abc$109383$new_n43811_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n46848_
 .subckt nand2_x0 i0=$abc$109383$new_n46848_ i1=$abc$109383$new_n46847_ nq=$abc$109383$new_n46849_
 .subckt nand3_x0 i0=$abc$109383$new_n46849_ i1=$abc$109383$new_n46845_ i2=$abc$109383$new_n43990_ nq=$abc$109383$new_n46850_
 .subckt nand3_x0 i0=$abc$109383$new_n46850_ i1=$abc$109383$new_n46843_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n46851_
-.subckt oa22_x2 i0=$abc$109383$new_n46851_ i1=$abc$109383$new_n46835_ i2=$abc$109383$new_n43921_ q=$abc$109383$new_n46852_
-.subckt mx2_x2 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[42][11] i1=soc.ram.ram[46][11] q=$abc$109383$new_n46853_
+.subckt or21nand_x1 i0=$abc$109383$new_n46851_ i1=$abc$109383$new_n46835_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n46852_
+.subckt mux2_x1 cmd=$abc$109383$new_n43514_ i0=soc.ram.ram[42][11] i1=soc.ram.ram[46][11] q=$abc$109383$new_n46853_
 .subckt nand2_x0 i0=$abc$109383$new_n46853_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n46854_
-.subckt mx2_x2 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[43][11] i1=soc.ram.ram[47][11] q=$abc$109383$new_n46855_
+.subckt mux2_x1 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[43][11] i1=soc.ram.ram[47][11] q=$abc$109383$new_n46855_
 .subckt nand2_x0 i0=$abc$109383$new_n46855_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n46856_
 .subckt nand3_x0 i0=$abc$109383$new_n46856_ i1=$abc$109383$new_n46854_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n46857_
-.subckt mx2_x2 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[40][11] i1=soc.ram.ram[44][11] q=$abc$109383$new_n46858_
+.subckt mux2_x1 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[40][11] i1=soc.ram.ram[44][11] q=$abc$109383$new_n46858_
 .subckt nand2_x0 i0=$abc$109383$new_n46858_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n46859_
-.subckt mx2_x2 cmd=$abc$109383$new_n44500_ i0=soc.ram.ram[41][11] i1=soc.ram.ram[45][11] q=$abc$109383$new_n46860_
+.subckt mux2_x1 cmd=$abc$109383$new_n44500_ i0=soc.ram.ram[41][11] i1=soc.ram.ram[45][11] q=$abc$109383$new_n46860_
 .subckt nand2_x0 i0=$abc$109383$new_n46860_ i1=$abc$109383$new_n43792_ nq=$abc$109383$new_n46861_
 .subckt nand3_x0 i0=$abc$109383$new_n46861_ i1=$abc$109383$new_n46859_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n46862_
 .subckt nand3_x0 i0=$abc$109383$new_n46862_ i1=$abc$109383$new_n46857_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n46863_
 .subckt inv_x0 i=soc.ram.ram[37][11] nq=$abc$109383$new_n46864_
 .subckt nand2_x0 i0=$abc$109383$new_n46864_ i1=$abc$109383$new_n44936_ nq=$abc$109383$new_n46865_
-.subckt ao22_x2 i0=soc.ram.ram[33][11] i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n46866_
+.subckt and21nor_x1 i0=soc.ram.ram[33][11] i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n46866_
 .subckt nand2_x0 i0=$abc$109383$new_n46866_ i1=$abc$109383$new_n46865_ nq=$abc$109383$new_n46867_
-.subckt mx2_x2 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[32][11] i1=soc.ram.ram[36][11] q=$abc$109383$new_n46868_
+.subckt mux2_x1 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[32][11] i1=soc.ram.ram[36][11] q=$abc$109383$new_n46868_
 .subckt nand2_x0 i0=$abc$109383$new_n46868_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n46869_
 .subckt nand3_x0 i0=$abc$109383$new_n46869_ i1=$abc$109383$new_n46867_ i2=$abc$109383$new_n45441_ nq=$abc$109383$new_n46870_
 .subckt inv_x0 i=soc.ram.ram[39][11] nq=$abc$109383$new_n46871_
 .subckt nand2_x0 i0=$abc$109383$new_n46871_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n46872_
-.subckt ao22_x2 i0=soc.ram.ram[35][11] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n43823_ q=$abc$109383$new_n46873_
+.subckt and21nor_x1 i0=soc.ram.ram[35][11] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n43823_ nq=$abc$109383$new_n46873_
 .subckt nand2_x0 i0=$abc$109383$new_n46873_ i1=$abc$109383$new_n46872_ nq=$abc$109383$new_n46874_
-.subckt mx2_x2 cmd=$abc$109383$new_n45030_ i0=soc.ram.ram[34][11] i1=soc.ram.ram[38][11] q=$abc$109383$new_n46875_
+.subckt mux2_x1 cmd=$abc$109383$new_n45030_ i0=soc.ram.ram[34][11] i1=soc.ram.ram[38][11] q=$abc$109383$new_n46875_
 .subckt nand2_x0 i0=$abc$109383$new_n46875_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n46876_
 .subckt nand3_x0 i0=$abc$109383$new_n46876_ i1=$abc$109383$new_n46874_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n46877_
 .subckt nand3_x0 i0=$abc$109383$new_n46877_ i1=$abc$109383$new_n46870_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n46878_
-.subckt oa22_x2 i0=$abc$109383$new_n46878_ i1=$abc$109383$new_n46863_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n46879_
-.subckt a3_x2 i0=$abc$109383$new_n46879_ i1=$abc$109383$new_n46852_ i2=$abc$109383$new_n43900_ q=$abc$109383$new_n46880_
+.subckt or21nand_x1 i0=$abc$109383$new_n46878_ i1=$abc$109383$new_n46863_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n46879_
+.subckt and3_x1 i0=$abc$109383$new_n46879_ i1=$abc$109383$new_n46852_ i2=$abc$109383$new_n43900_ q=$abc$109383$new_n46880_
 .subckt nor2_x0 i0=$abc$109383$new_n46880_ i1=$abc$109383$new_n46824_ nq=$abc$109383$new_n46881_
-.subckt ao22_x2 i0=$abc$109383$new_n44446_ i1=$abc$109383$new_n46881_ i2=$abc$109383$new_n43322_ q=$abc$109383$new_n46882_
+.subckt and21nor_x1 i0=$abc$109383$new_n44446_ i1=$abc$109383$new_n46881_ i2=$abc$109383$new_n43322_ nq=$abc$109383$new_n46882_
 .subckt buf_x4 i=$abc$109383$new_n43590_ q=$abc$109383$new_n46883_
-.subckt mx2_x2 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[120][11] i1=soc.ram.ram[124][11] q=$abc$109383$new_n46884_
-.subckt a2_x2 i0=$abc$109383$new_n46884_ i1=$abc$109383$new_n43903_ q=$abc$109383$new_n46885_
-.subckt mx2_x2 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[121][11] i1=soc.ram.ram[125][11] q=$abc$109383$new_n46886_
-.subckt oa22_x2 i0=$abc$109383$new_n43872_ i1=$abc$109383$new_n46886_ i2=$abc$109383$new_n43837_ q=$abc$109383$new_n46887_
+.subckt mux2_x1 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[120][11] i1=soc.ram.ram[124][11] q=$abc$109383$new_n46884_
+.subckt and2_x1 i0=$abc$109383$new_n46884_ i1=$abc$109383$new_n43903_ q=$abc$109383$new_n46885_
+.subckt mux2_x1 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[121][11] i1=soc.ram.ram[125][11] q=$abc$109383$new_n46886_
+.subckt or21nand_x1 i0=$abc$109383$new_n43872_ i1=$abc$109383$new_n46886_ i2=$abc$109383$new_n43837_ nq=$abc$109383$new_n46887_
 .subckt nor2_x0 i0=$abc$109383$new_n46887_ i1=$abc$109383$new_n46885_ nq=$abc$109383$new_n46888_
 .subckt inv_x0 i=soc.ram.ram[112][11] nq=$abc$109383$new_n46889_
 .subckt inv_x0 i=soc.ram.ram[116][11] nq=$abc$109383$new_n46890_
-.subckt mx2_x2 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n46890_ i1=$abc$109383$new_n46889_ q=$abc$109383$new_n46891_
-.subckt ao22_x2 i0=$abc$109383$new_n44403_ i1=$abc$109383$new_n46891_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n46892_
+.subckt mux2_x1 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n46890_ i1=$abc$109383$new_n46889_ q=$abc$109383$new_n46891_
+.subckt and21nor_x1 i0=$abc$109383$new_n44403_ i1=$abc$109383$new_n46891_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n46892_
 .subckt inv_x0 i=soc.ram.ram[117][11] nq=$abc$109383$new_n46893_
 .subckt nand2_x0 i0=$abc$109383$new_n46893_ i1=$abc$109383$new_n44704_ nq=$abc$109383$new_n46894_
-.subckt ao22_x2 i0=soc.ram.ram[113][11] i1=$abc$109383$new_n45870_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n46895_
+.subckt and21nor_x1 i0=soc.ram.ram[113][11] i1=$abc$109383$new_n45870_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n46895_
 .subckt nand2_x0 i0=$abc$109383$new_n46895_ i1=$abc$109383$new_n46894_ nq=$abc$109383$new_n46896_
-.subckt oa22_x2 i0=$abc$109383$new_n46896_ i1=$abc$109383$new_n46892_ i2=$abc$109383$new_n46888_ q=$abc$109383$new_n46897_
+.subckt or21nand_x1 i0=$abc$109383$new_n46896_ i1=$abc$109383$new_n46892_ i2=$abc$109383$new_n46888_ nq=$abc$109383$new_n46897_
 .subckt nand2_x0 i0=$abc$109383$new_n46897_ i1=$abc$109383$new_n43991_ nq=$abc$109383$new_n46898_
-.subckt mx2_x2 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[122][11] i1=soc.ram.ram[126][11] q=$abc$109383$new_n46899_
-.subckt a2_x2 i0=$abc$109383$new_n46899_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n46900_
-.subckt mx2_x2 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[123][11] i1=soc.ram.ram[127][11] q=$abc$109383$new_n46901_
-.subckt oa22_x2 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n46901_ i2=$abc$109383$new_n44162_ q=$abc$109383$new_n46902_
+.subckt mux2_x1 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[122][11] i1=soc.ram.ram[126][11] q=$abc$109383$new_n46899_
+.subckt and2_x1 i0=$abc$109383$new_n46899_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n46900_
+.subckt mux2_x1 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[123][11] i1=soc.ram.ram[127][11] q=$abc$109383$new_n46901_
+.subckt or21nand_x1 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n46901_ i2=$abc$109383$new_n44162_ nq=$abc$109383$new_n46902_
 .subckt nor2_x0 i0=$abc$109383$new_n46902_ i1=$abc$109383$new_n46900_ nq=$abc$109383$new_n46903_
 .subckt inv_x0 i=soc.ram.ram[114][11] nq=$abc$109383$new_n46904_
 .subckt inv_x0 i=soc.ram.ram[118][11] nq=$abc$109383$new_n46905_
-.subckt mx2_x2 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n46905_ i1=$abc$109383$new_n46904_ q=$abc$109383$new_n46906_
-.subckt ao22_x2 i0=$abc$109383$new_n44505_ i1=$abc$109383$new_n46906_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n46907_
+.subckt mux2_x1 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n46905_ i1=$abc$109383$new_n46904_ q=$abc$109383$new_n46906_
+.subckt and21nor_x1 i0=$abc$109383$new_n44505_ i1=$abc$109383$new_n46906_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n46907_
 .subckt inv_x0 i=soc.ram.ram[119][11] nq=$abc$109383$new_n46908_
 .subckt nand2_x0 i0=$abc$109383$new_n46908_ i1=$abc$109383$new_n44924_ nq=$abc$109383$new_n46909_
-.subckt ao22_x2 i0=soc.ram.ram[115][11] i1=$abc$109383$new_n45227_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n46910_
+.subckt and21nor_x1 i0=soc.ram.ram[115][11] i1=$abc$109383$new_n45227_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n46910_
 .subckt nand2_x0 i0=$abc$109383$new_n46910_ i1=$abc$109383$new_n46909_ nq=$abc$109383$new_n46911_
-.subckt oa22_x2 i0=$abc$109383$new_n46911_ i1=$abc$109383$new_n46907_ i2=$abc$109383$new_n46903_ q=$abc$109383$new_n46912_
+.subckt or21nand_x1 i0=$abc$109383$new_n46911_ i1=$abc$109383$new_n46907_ i2=$abc$109383$new_n46903_ nq=$abc$109383$new_n46912_
 .subckt nand2_x0 i0=$abc$109383$new_n46912_ i1=$abc$109383$new_n46527_ nq=$abc$109383$new_n46913_
 .subckt nand3_x0 i0=$abc$109383$new_n46913_ i1=$abc$109383$new_n46898_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n46914_
-.subckt mx2_x2 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[106][11] i1=soc.ram.ram[110][11] q=$abc$109383$new_n46915_
-.subckt a2_x2 i0=$abc$109383$new_n46915_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n46916_
-.subckt mx2_x2 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[107][11] i1=soc.ram.ram[111][11] q=$abc$109383$new_n46917_
-.subckt oa22_x2 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n46917_ i2=$abc$109383$new_n44162_ q=$abc$109383$new_n46918_
+.subckt mux2_x1 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[106][11] i1=soc.ram.ram[110][11] q=$abc$109383$new_n46915_
+.subckt and2_x1 i0=$abc$109383$new_n46915_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n46916_
+.subckt mux2_x1 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[107][11] i1=soc.ram.ram[111][11] q=$abc$109383$new_n46917_
+.subckt or21nand_x1 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n46917_ i2=$abc$109383$new_n44162_ nq=$abc$109383$new_n46918_
 .subckt nor2_x0 i0=$abc$109383$new_n46918_ i1=$abc$109383$new_n46916_ nq=$abc$109383$new_n46919_
 .subckt inv_x0 i=soc.ram.ram[98][11] nq=$abc$109383$new_n46920_
 .subckt inv_x0 i=soc.ram.ram[102][11] nq=$abc$109383$new_n46921_
-.subckt mx2_x2 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n46921_ i1=$abc$109383$new_n46920_ q=$abc$109383$new_n46922_
-.subckt ao22_x2 i0=$abc$109383$new_n45455_ i1=$abc$109383$new_n46922_ i2=$abc$109383$new_n44448_ q=$abc$109383$new_n46923_
+.subckt mux2_x1 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n46921_ i1=$abc$109383$new_n46920_ q=$abc$109383$new_n46922_
+.subckt and21nor_x1 i0=$abc$109383$new_n45455_ i1=$abc$109383$new_n46922_ i2=$abc$109383$new_n44448_ nq=$abc$109383$new_n46923_
 .subckt inv_x0 i=soc.ram.ram[103][11] nq=$abc$109383$new_n46924_
 .subckt nand2_x0 i0=$abc$109383$new_n46924_ i1=$abc$109383$new_n43939_ nq=$abc$109383$new_n46925_
 .subckt buf_x4 i=$abc$109383$new_n43513_ q=$abc$109383$new_n46926_
-.subckt ao22_x2 i0=soc.ram.ram[99][11] i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n46927_
+.subckt and21nor_x1 i0=soc.ram.ram[99][11] i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n46927_
 .subckt nand2_x0 i0=$abc$109383$new_n46927_ i1=$abc$109383$new_n46925_ nq=$abc$109383$new_n46928_
-.subckt oa22_x2 i0=$abc$109383$new_n46928_ i1=$abc$109383$new_n46923_ i2=$abc$109383$new_n46919_ q=$abc$109383$new_n46929_
+.subckt or21nand_x1 i0=$abc$109383$new_n46928_ i1=$abc$109383$new_n46923_ i2=$abc$109383$new_n46919_ nq=$abc$109383$new_n46929_
 .subckt nand2_x0 i0=$abc$109383$new_n46929_ i1=$abc$109383$new_n46527_ nq=$abc$109383$new_n46930_
-.subckt mx2_x2 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[104][11] i1=soc.ram.ram[108][11] q=$abc$109383$new_n46931_
-.subckt a2_x2 i0=$abc$109383$new_n46931_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n46932_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[105][11] i1=soc.ram.ram[109][11] q=$abc$109383$new_n46933_
+.subckt mux2_x1 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[104][11] i1=soc.ram.ram[108][11] q=$abc$109383$new_n46931_
+.subckt and2_x1 i0=$abc$109383$new_n46931_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n46932_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[105][11] i1=soc.ram.ram[109][11] q=$abc$109383$new_n46933_
 .subckt buf_x4 i=$abc$109383$new_n43362_ q=$abc$109383$new_n46934_
-.subckt oa22_x2 i0=$abc$109383$new_n46934_ i1=$abc$109383$new_n46933_ i2=$abc$109383$new_n44162_ q=$abc$109383$new_n46935_
+.subckt or21nand_x1 i0=$abc$109383$new_n46934_ i1=$abc$109383$new_n46933_ i2=$abc$109383$new_n44162_ nq=$abc$109383$new_n46935_
 .subckt nor2_x0 i0=$abc$109383$new_n46935_ i1=$abc$109383$new_n46932_ nq=$abc$109383$new_n46936_
 .subckt inv_x0 i=soc.ram.ram[96][11] nq=$abc$109383$new_n46937_
 .subckt inv_x0 i=soc.ram.ram[100][11] nq=$abc$109383$new_n46938_
-.subckt mx2_x2 cmd=$abc$109383$new_n43399_ i0=$abc$109383$new_n46938_ i1=$abc$109383$new_n46937_ q=$abc$109383$new_n46939_
-.subckt ao22_x2 i0=$abc$109383$new_n43791_ i1=$abc$109383$new_n46939_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n46940_
+.subckt mux2_x1 cmd=$abc$109383$new_n43399_ i0=$abc$109383$new_n46938_ i1=$abc$109383$new_n46937_ q=$abc$109383$new_n46939_
+.subckt and21nor_x1 i0=$abc$109383$new_n43791_ i1=$abc$109383$new_n46939_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n46940_
 .subckt inv_x0 i=soc.ram.ram[101][11] nq=$abc$109383$new_n46941_
 .subckt nand2_x0 i0=$abc$109383$new_n46941_ i1=$abc$109383$new_n43687_ nq=$abc$109383$new_n46942_
-.subckt ao22_x2 i0=soc.ram.ram[97][11] i1=$abc$109383$new_n43811_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n46943_
+.subckt and21nor_x1 i0=soc.ram.ram[97][11] i1=$abc$109383$new_n43811_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n46943_
 .subckt nand2_x0 i0=$abc$109383$new_n46943_ i1=$abc$109383$new_n46942_ nq=$abc$109383$new_n46944_
-.subckt oa22_x2 i0=$abc$109383$new_n46944_ i1=$abc$109383$new_n46940_ i2=$abc$109383$new_n46936_ q=$abc$109383$new_n46945_
+.subckt or21nand_x1 i0=$abc$109383$new_n46944_ i1=$abc$109383$new_n46940_ i2=$abc$109383$new_n46936_ nq=$abc$109383$new_n46945_
 .subckt nand2_x0 i0=$abc$109383$new_n46945_ i1=$abc$109383$new_n45016_ nq=$abc$109383$new_n46946_
 .subckt nand3_x0 i0=$abc$109383$new_n46946_ i1=$abc$109383$new_n46930_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n46947_
 .subckt nand3_x0 i0=$abc$109383$new_n46947_ i1=$abc$109383$new_n46914_ i2=$abc$109383$new_n43410_ nq=$abc$109383$new_n46948_
-.subckt mx2_x2 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[90][11] i1=soc.ram.ram[94][11] q=$abc$109383$new_n46949_
-.subckt a2_x2 i0=$abc$109383$new_n46949_ i1=$abc$109383$new_n43616_ q=$abc$109383$new_n46950_
-.subckt mx2_x2 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[91][11] i1=soc.ram.ram[95][11] q=$abc$109383$new_n46951_
-.subckt oa22_x2 i0=$abc$109383$new_n43996_ i1=$abc$109383$new_n46951_ i2=$abc$109383$new_n43711_ q=$abc$109383$new_n46952_
+.subckt mux2_x1 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[90][11] i1=soc.ram.ram[94][11] q=$abc$109383$new_n46949_
+.subckt and2_x1 i0=$abc$109383$new_n46949_ i1=$abc$109383$new_n43616_ q=$abc$109383$new_n46950_
+.subckt mux2_x1 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[91][11] i1=soc.ram.ram[95][11] q=$abc$109383$new_n46951_
+.subckt or21nand_x1 i0=$abc$109383$new_n43996_ i1=$abc$109383$new_n46951_ i2=$abc$109383$new_n43711_ nq=$abc$109383$new_n46952_
 .subckt nor2_x0 i0=$abc$109383$new_n46952_ i1=$abc$109383$new_n46950_ nq=$abc$109383$new_n46953_
 .subckt inv_x0 i=soc.ram.ram[82][11] nq=$abc$109383$new_n46954_
 .subckt inv_x0 i=soc.ram.ram[86][11] nq=$abc$109383$new_n46955_
-.subckt mx2_x2 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n46955_ i1=$abc$109383$new_n46954_ q=$abc$109383$new_n46956_
-.subckt ao22_x2 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n46956_ i2=$abc$109383$new_n44240_ q=$abc$109383$new_n46957_
+.subckt mux2_x1 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n46955_ i1=$abc$109383$new_n46954_ q=$abc$109383$new_n46956_
+.subckt and21nor_x1 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n46956_ i2=$abc$109383$new_n44240_ nq=$abc$109383$new_n46957_
 .subckt inv_x0 i=soc.ram.ram[87][11] nq=$abc$109383$new_n46958_
 .subckt nand2_x0 i0=$abc$109383$new_n46958_ i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n46959_
-.subckt ao22_x2 i0=soc.ram.ram[83][11] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ q=$abc$109383$new_n46960_
+.subckt and21nor_x1 i0=soc.ram.ram[83][11] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ nq=$abc$109383$new_n46960_
 .subckt nand2_x0 i0=$abc$109383$new_n46960_ i1=$abc$109383$new_n46959_ nq=$abc$109383$new_n46961_
-.subckt oa22_x2 i0=$abc$109383$new_n46961_ i1=$abc$109383$new_n46957_ i2=$abc$109383$new_n46953_ q=$abc$109383$new_n46962_
+.subckt or21nand_x1 i0=$abc$109383$new_n46961_ i1=$abc$109383$new_n46957_ i2=$abc$109383$new_n46953_ nq=$abc$109383$new_n46962_
 .subckt nand2_x0 i0=$abc$109383$new_n46962_ i1=$abc$109383$new_n45320_ nq=$abc$109383$new_n46963_
-.subckt mx2_x2 cmd=$abc$109383$new_n44423_ i0=soc.ram.ram[88][11] i1=soc.ram.ram[92][11] q=$abc$109383$new_n46964_
-.subckt a2_x2 i0=$abc$109383$new_n46964_ i1=$abc$109383$new_n44596_ q=$abc$109383$new_n46965_
-.subckt mx2_x2 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[89][11] i1=soc.ram.ram[93][11] q=$abc$109383$new_n46966_
-.subckt oa22_x2 i0=$abc$109383$new_n43362_ i1=$abc$109383$new_n46966_ i2=$abc$109383$new_n44161_ q=$abc$109383$new_n46967_
+.subckt mux2_x1 cmd=$abc$109383$new_n44423_ i0=soc.ram.ram[88][11] i1=soc.ram.ram[92][11] q=$abc$109383$new_n46964_
+.subckt and2_x1 i0=$abc$109383$new_n46964_ i1=$abc$109383$new_n44596_ q=$abc$109383$new_n46965_
+.subckt mux2_x1 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[89][11] i1=soc.ram.ram[93][11] q=$abc$109383$new_n46966_
+.subckt or21nand_x1 i0=$abc$109383$new_n43362_ i1=$abc$109383$new_n46966_ i2=$abc$109383$new_n44161_ nq=$abc$109383$new_n46967_
 .subckt nor2_x0 i0=$abc$109383$new_n46967_ i1=$abc$109383$new_n46965_ nq=$abc$109383$new_n46968_
 .subckt inv_x0 i=soc.ram.ram[80][11] nq=$abc$109383$new_n46969_
 .subckt inv_x0 i=soc.ram.ram[84][11] nq=$abc$109383$new_n46970_
-.subckt mx2_x2 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n46970_ i1=$abc$109383$new_n46969_ q=$abc$109383$new_n46971_
-.subckt ao22_x2 i0=$abc$109383$new_n43961_ i1=$abc$109383$new_n46971_ i2=$abc$109383$new_n43554_ q=$abc$109383$new_n46972_
+.subckt mux2_x1 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n46970_ i1=$abc$109383$new_n46969_ q=$abc$109383$new_n46971_
+.subckt and21nor_x1 i0=$abc$109383$new_n43961_ i1=$abc$109383$new_n46971_ i2=$abc$109383$new_n43554_ nq=$abc$109383$new_n46972_
 .subckt inv_x0 i=soc.ram.ram[85][11] nq=$abc$109383$new_n46973_
 .subckt nand2_x0 i0=$abc$109383$new_n46973_ i1=$abc$109383$new_n44508_ nq=$abc$109383$new_n46974_
-.subckt ao22_x2 i0=soc.ram.ram[81][11] i1=$abc$109383$new_n44338_ i2=$abc$109383$new_n43690_ q=$abc$109383$new_n46975_
+.subckt and21nor_x1 i0=soc.ram.ram[81][11] i1=$abc$109383$new_n44338_ i2=$abc$109383$new_n43690_ nq=$abc$109383$new_n46975_
 .subckt nand2_x0 i0=$abc$109383$new_n46975_ i1=$abc$109383$new_n46974_ nq=$abc$109383$new_n46976_
-.subckt oa22_x2 i0=$abc$109383$new_n46976_ i1=$abc$109383$new_n46972_ i2=$abc$109383$new_n46968_ q=$abc$109383$new_n46977_
+.subckt or21nand_x1 i0=$abc$109383$new_n46976_ i1=$abc$109383$new_n46972_ i2=$abc$109383$new_n46968_ nq=$abc$109383$new_n46977_
 .subckt nand2_x0 i0=$abc$109383$new_n46977_ i1=$abc$109383$new_n45629_ nq=$abc$109383$new_n46978_
-.subckt oa22_x2 i0=$abc$109383$new_n46978_ i1=$abc$109383$new_n46963_ i2=$abc$109383$new_n43412_ q=$abc$109383$new_n46979_
-.subckt mx2_x2 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[74][11] i1=soc.ram.ram[78][11] q=$abc$109383$new_n46980_
+.subckt or21nand_x1 i0=$abc$109383$new_n46978_ i1=$abc$109383$new_n46963_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n46979_
+.subckt mux2_x1 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[74][11] i1=soc.ram.ram[78][11] q=$abc$109383$new_n46980_
 .subckt nand2_x0 i0=$abc$109383$new_n46980_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n46981_
-.subckt mx2_x2 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[75][11] i1=soc.ram.ram[79][11] q=$abc$109383$new_n46982_
+.subckt mux2_x1 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[75][11] i1=soc.ram.ram[79][11] q=$abc$109383$new_n46982_
 .subckt nand2_x0 i0=$abc$109383$new_n46982_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n46983_
 .subckt nand3_x0 i0=$abc$109383$new_n46983_ i1=$abc$109383$new_n46981_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n46984_
-.subckt mx2_x2 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[72][11] i1=soc.ram.ram[76][11] q=$abc$109383$new_n46985_
+.subckt mux2_x1 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[72][11] i1=soc.ram.ram[76][11] q=$abc$109383$new_n46985_
 .subckt nand2_x0 i0=$abc$109383$new_n46985_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n46986_
-.subckt mx2_x2 cmd=$abc$109383$new_n44500_ i0=soc.ram.ram[73][11] i1=soc.ram.ram[77][11] q=$abc$109383$new_n46987_
+.subckt mux2_x1 cmd=$abc$109383$new_n44500_ i0=soc.ram.ram[73][11] i1=soc.ram.ram[77][11] q=$abc$109383$new_n46987_
 .subckt nand2_x0 i0=$abc$109383$new_n46987_ i1=$abc$109383$new_n43792_ nq=$abc$109383$new_n46988_
 .subckt nand3_x0 i0=$abc$109383$new_n46988_ i1=$abc$109383$new_n46986_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n46989_
 .subckt nand3_x0 i0=$abc$109383$new_n46989_ i1=$abc$109383$new_n46984_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n46990_
-.subckt ao22_x2 i0=soc.ram.ram[67][11] i1=$abc$109383$new_n43509_ i2=$abc$109383$new_n43642_ q=$abc$109383$new_n46991_
-.subckt ao22_x2 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[71][11] i2=$abc$109383$new_n46991_ q=$abc$109383$new_n46992_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[66][11] i1=soc.ram.ram[70][11] q=$abc$109383$new_n46993_
-.subckt a2_x2 i0=$abc$109383$new_n46993_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n46994_
-.subckt o3_x2 i0=$abc$109383$new_n46994_ i1=$abc$109383$new_n46992_ i2=$abc$109383$new_n44741_ q=$abc$109383$new_n46995_
+.subckt and21nor_x1 i0=soc.ram.ram[67][11] i1=$abc$109383$new_n43509_ i2=$abc$109383$new_n43642_ nq=$abc$109383$new_n46991_
+.subckt and21nor_x1 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[71][11] i2=$abc$109383$new_n46991_ nq=$abc$109383$new_n46992_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[66][11] i1=soc.ram.ram[70][11] q=$abc$109383$new_n46993_
+.subckt and2_x1 i0=$abc$109383$new_n46993_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n46994_
+.subckt or3_x1 i0=$abc$109383$new_n46994_ i1=$abc$109383$new_n46992_ i2=$abc$109383$new_n44741_ q=$abc$109383$new_n46995_
 .subckt inv_x0 i=soc.ram.ram[69][11] nq=$abc$109383$new_n46996_
 .subckt nand2_x0 i0=$abc$109383$new_n46996_ i1=$abc$109383$new_n44936_ nq=$abc$109383$new_n46997_
-.subckt ao22_x2 i0=soc.ram.ram[65][11] i1=$abc$109383$new_n43477_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n46998_
+.subckt and21nor_x1 i0=soc.ram.ram[65][11] i1=$abc$109383$new_n43477_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n46998_
 .subckt nand2_x0 i0=$abc$109383$new_n46998_ i1=$abc$109383$new_n46997_ nq=$abc$109383$new_n46999_
-.subckt mx2_x2 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[64][11] i1=soc.ram.ram[68][11] q=$abc$109383$new_n47000_
+.subckt mux2_x1 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[64][11] i1=soc.ram.ram[68][11] q=$abc$109383$new_n47000_
 .subckt nand2_x0 i0=$abc$109383$new_n47000_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n47001_
 .subckt nand3_x0 i0=$abc$109383$new_n47001_ i1=$abc$109383$new_n46999_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n47002_
 .subckt nand3_x0 i0=$abc$109383$new_n47002_ i1=$abc$109383$new_n46995_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n47003_
 .subckt nand3_x0 i0=$abc$109383$new_n47003_ i1=$abc$109383$new_n46990_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n47004_
-.subckt a2_x2 i0=$abc$109383$new_n47004_ i1=$abc$109383$new_n46979_ q=$abc$109383$new_n47005_
-.subckt ao22_x2 i0=$abc$109383$new_n43900_ i1=$abc$109383$new_n47005_ i2=$abc$109383$new_n46948_ q=$abc$109383$new_n47006_
-.subckt o2_x2 i0=$abc$109383$new_n47006_ i1=$abc$109383$new_n46883_ q=$abc$109383$new_n47007_
-.subckt oa22_x2 i0=$abc$109383$new_n47007_ i1=$abc$109383$new_n46882_ i2=$abc$109383$new_n46773_ q=$abc$109383$new_n47008_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n47008_ i2=$abc$109383$new_n46760_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103242
+.subckt and2_x1 i0=$abc$109383$new_n47004_ i1=$abc$109383$new_n46979_ q=$abc$109383$new_n47005_
+.subckt and21nor_x1 i0=$abc$109383$new_n43900_ i1=$abc$109383$new_n47005_ i2=$abc$109383$new_n46948_ nq=$abc$109383$new_n47006_
+.subckt or2_x1 i0=$abc$109383$new_n47006_ i1=$abc$109383$new_n46883_ q=$abc$109383$new_n47007_
+.subckt or21nand_x1 i0=$abc$109383$new_n47007_ i1=$abc$109383$new_n46882_ i2=$abc$109383$new_n46773_ nq=$abc$109383$new_n47008_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n47008_ i2=$abc$109383$new_n46760_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103242
 .subckt buf_x4 i=$abc$109383$new_n29202_ q=$abc$109383$new_n47010_
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[12] q=$abc$109383$new_n47011_
-.subckt a2_x2 i0=$abc$109383$new_n47011_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47012_
-.subckt a2_x2 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19663_ q=$abc$109383$new_n47013_
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[12] nq=$abc$109383$new_n47011_
+.subckt and2_x1 i0=$abc$109383$new_n47011_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47012_
+.subckt and2_x1 i0=$abc$109383$new_n19680_ i1=$abc$109383$new_n19663_ q=$abc$109383$new_n47013_
 .subckt inv_x0 i=soc.ram.ram[85][12] nq=$abc$109383$new_n47014_
 .subckt nand2_x0 i0=$abc$109383$new_n47014_ i1=$abc$109383$new_n45579_ nq=$abc$109383$new_n47015_
-.subckt ao22_x2 i0=soc.ram.ram[81][12] i1=$abc$109383$new_n43953_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n47016_
+.subckt and21nor_x1 i0=soc.ram.ram[81][12] i1=$abc$109383$new_n43953_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n47016_
 .subckt nand2_x0 i0=$abc$109383$new_n47016_ i1=$abc$109383$new_n47015_ nq=$abc$109383$new_n47017_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[80][12] i1=soc.ram.ram[84][12] q=$abc$109383$new_n47018_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[80][12] i1=soc.ram.ram[84][12] q=$abc$109383$new_n47018_
 .subckt nand2_x0 i0=$abc$109383$new_n47018_ i1=$abc$109383$new_n44008_ nq=$abc$109383$new_n47019_
 .subckt nand3_x0 i0=$abc$109383$new_n47019_ i1=$abc$109383$new_n47017_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n47020_
 .subckt inv_x0 i=soc.ram.ram[87][12] nq=$abc$109383$new_n47021_
 .subckt nand2_x0 i0=$abc$109383$new_n47021_ i1=$abc$109383$new_n43851_ nq=$abc$109383$new_n47022_
-.subckt ao22_x2 i0=soc.ram.ram[83][12] i1=$abc$109383$new_n44306_ i2=$abc$109383$new_n45247_ q=$abc$109383$new_n47023_
+.subckt and21nor_x1 i0=soc.ram.ram[83][12] i1=$abc$109383$new_n44306_ i2=$abc$109383$new_n45247_ nq=$abc$109383$new_n47023_
 .subckt nand2_x0 i0=$abc$109383$new_n47023_ i1=$abc$109383$new_n47022_ nq=$abc$109383$new_n47024_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[82][12] i1=soc.ram.ram[86][12] q=$abc$109383$new_n47025_
-.subckt a2_x2 i0=$abc$109383$new_n47025_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n47026_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[82][12] i1=soc.ram.ram[86][12] q=$abc$109383$new_n47025_
+.subckt and2_x1 i0=$abc$109383$new_n47025_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n47026_
 .subckt nor2_x0 i0=$abc$109383$new_n47026_ i1=$abc$109383$new_n43753_ nq=$abc$109383$new_n47027_
 .subckt nand2_x0 i0=$abc$109383$new_n47027_ i1=$abc$109383$new_n47024_ nq=$abc$109383$new_n47028_
-.subckt oa22_x2 i0=$abc$109383$new_n47028_ i1=$abc$109383$new_n47020_ i2=$abc$109383$new_n45244_ q=$abc$109383$new_n47029_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[90][12] i1=soc.ram.ram[94][12] q=$abc$109383$new_n47030_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[91][12] i1=soc.ram.ram[95][12] q=$abc$109383$new_n47031_
-.subckt mx2_x2 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47031_ i1=$abc$109383$new_n47030_ q=$abc$109383$new_n47032_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[88][12] i1=soc.ram.ram[92][12] q=$abc$109383$new_n47033_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[89][12] i1=soc.ram.ram[93][12] q=$abc$109383$new_n47034_
-.subckt mx2_x2 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47034_ i1=$abc$109383$new_n47033_ q=$abc$109383$new_n47035_
-.subckt mx2_x2 cmd=$abc$109383$new_n43808_ i0=$abc$109383$new_n47035_ i1=$abc$109383$new_n47032_ q=$abc$109383$new_n47036_
-.subckt o2_x2 i0=$abc$109383$new_n47036_ i1=$abc$109383$new_n44086_ q=$abc$109383$new_n47037_
+.subckt or21nand_x1 i0=$abc$109383$new_n47028_ i1=$abc$109383$new_n47020_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n47029_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[90][12] i1=soc.ram.ram[94][12] q=$abc$109383$new_n47030_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[91][12] i1=soc.ram.ram[95][12] q=$abc$109383$new_n47031_
+.subckt mux2_x1 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47031_ i1=$abc$109383$new_n47030_ q=$abc$109383$new_n47032_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[88][12] i1=soc.ram.ram[92][12] q=$abc$109383$new_n47033_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[89][12] i1=soc.ram.ram[93][12] q=$abc$109383$new_n47034_
+.subckt mux2_x1 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47034_ i1=$abc$109383$new_n47033_ q=$abc$109383$new_n47035_
+.subckt mux2_x1 cmd=$abc$109383$new_n43808_ i0=$abc$109383$new_n47035_ i1=$abc$109383$new_n47032_ q=$abc$109383$new_n47036_
+.subckt or2_x1 i0=$abc$109383$new_n47036_ i1=$abc$109383$new_n44086_ q=$abc$109383$new_n47037_
 .subckt nand3_x0 i0=$abc$109383$new_n47037_ i1=$abc$109383$new_n47029_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n47038_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[66][12] i1=soc.ram.ram[70][12] q=$abc$109383$new_n47039_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[66][12] i1=soc.ram.ram[70][12] q=$abc$109383$new_n47039_
 .subckt nand2_x0 i0=$abc$109383$new_n47039_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n47040_
-.subckt mx2_x2 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[67][12] i1=soc.ram.ram[71][12] q=$abc$109383$new_n47041_
+.subckt mux2_x1 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[67][12] i1=soc.ram.ram[71][12] q=$abc$109383$new_n47041_
 .subckt nand2_x0 i0=$abc$109383$new_n47041_ i1=$abc$109383$new_n43798_ nq=$abc$109383$new_n47042_
 .subckt nand3_x0 i0=$abc$109383$new_n47042_ i1=$abc$109383$new_n47040_ i2=$abc$109383$new_n43809_ nq=$abc$109383$new_n47043_
-.subckt mx2_x2 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[64][12] i1=soc.ram.ram[68][12] q=$abc$109383$new_n47044_
-.subckt mx2_x2 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[65][12] i1=soc.ram.ram[69][12] q=$abc$109383$new_n47045_
-.subckt mx2_x2 cmd=$abc$109383$new_n43594_ i0=$abc$109383$new_n47045_ i1=$abc$109383$new_n47044_ q=$abc$109383$new_n47046_
-.subckt o2_x2 i0=$abc$109383$new_n47046_ i1=$abc$109383$new_n45279_ q=$abc$109383$new_n47047_
-.subckt oa22_x2 i0=$abc$109383$new_n47047_ i1=$abc$109383$new_n47043_ i2=$abc$109383$new_n44410_ q=$abc$109383$new_n47048_
+.subckt mux2_x1 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[64][12] i1=soc.ram.ram[68][12] q=$abc$109383$new_n47044_
+.subckt mux2_x1 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[65][12] i1=soc.ram.ram[69][12] q=$abc$109383$new_n47045_
+.subckt mux2_x1 cmd=$abc$109383$new_n43594_ i0=$abc$109383$new_n47045_ i1=$abc$109383$new_n47044_ q=$abc$109383$new_n47046_
+.subckt or2_x1 i0=$abc$109383$new_n47046_ i1=$abc$109383$new_n45279_ q=$abc$109383$new_n47047_
+.subckt or21nand_x1 i0=$abc$109383$new_n47047_ i1=$abc$109383$new_n47043_ i2=$abc$109383$new_n44410_ nq=$abc$109383$new_n47048_
 .subckt buf_x4 i=$abc$109383$new_n43518_ q=$abc$109383$new_n47049_
 .subckt buf_x4 i=$abc$109383$new_n47049_ q=$abc$109383$new_n47050_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[72][12] i1=soc.ram.ram[76][12] q=$abc$109383$new_n47051_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[72][12] i1=soc.ram.ram[76][12] q=$abc$109383$new_n47051_
 .subckt nand2_x0 i0=$abc$109383$new_n47051_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n47052_
 .subckt inv_x0 i=soc.ram.ram[77][12] nq=$abc$109383$new_n47053_
 .subckt nand2_x0 i0=$abc$109383$new_n47053_ i1=$abc$109383$new_n46113_ nq=$abc$109383$new_n47054_
-.subckt ao22_x2 i0=soc.ram.ram[73][12] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n47055_
+.subckt and21nor_x1 i0=soc.ram.ram[73][12] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n47055_
 .subckt nand2_x0 i0=$abc$109383$new_n47055_ i1=$abc$109383$new_n47054_ nq=$abc$109383$new_n47056_
 .subckt nand3_x0 i0=$abc$109383$new_n47056_ i1=$abc$109383$new_n47052_ i2=$abc$109383$new_n44741_ nq=$abc$109383$new_n47057_
-.subckt mx2_x2 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[74][12] i1=soc.ram.ram[78][12] q=$abc$109383$new_n47058_
-.subckt oa22_x2 i0=$abc$109383$new_n43384_ i1=$abc$109383$new_n47058_ i2=$abc$109383$new_n44075_ q=$abc$109383$new_n47059_
-.subckt ao22_x2 i0=soc.ram.ram[75][12] i1=$abc$109383$new_n45233_ i2=$abc$109383$new_n44402_ q=$abc$109383$new_n47060_
+.subckt mux2_x1 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[74][12] i1=soc.ram.ram[78][12] q=$abc$109383$new_n47058_
+.subckt or21nand_x1 i0=$abc$109383$new_n43384_ i1=$abc$109383$new_n47058_ i2=$abc$109383$new_n44075_ nq=$abc$109383$new_n47059_
+.subckt and21nor_x1 i0=soc.ram.ram[75][12] i1=$abc$109383$new_n45233_ i2=$abc$109383$new_n44402_ nq=$abc$109383$new_n47060_
 .subckt inv_x0 i=soc.ram.ram[79][12] nq=$abc$109383$new_n47061_
 .subckt nand2_x0 i0=$abc$109383$new_n47061_ i1=$abc$109383$new_n43874_ nq=$abc$109383$new_n47062_
-.subckt oa22_x2 i0=$abc$109383$new_n47062_ i1=$abc$109383$new_n47060_ i2=$abc$109383$new_n47059_ q=$abc$109383$new_n47063_
-.subckt oa22_x2 i0=$abc$109383$new_n47063_ i1=$abc$109383$new_n47057_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n47064_
+.subckt or21nand_x1 i0=$abc$109383$new_n47062_ i1=$abc$109383$new_n47060_ i2=$abc$109383$new_n47059_ nq=$abc$109383$new_n47063_
+.subckt or21nand_x1 i0=$abc$109383$new_n47063_ i1=$abc$109383$new_n47057_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n47064_
 .subckt nand3_x0 i0=$abc$109383$new_n47064_ i1=$abc$109383$new_n47048_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n47065_
 .subckt nand3_x0 i0=$abc$109383$new_n47065_ i1=$abc$109383$new_n47038_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n47066_
-.subckt mx2_x2 cmd=$abc$109383$new_n44118_ i0=soc.ram.ram[96][12] i1=soc.ram.ram[100][12] q=$abc$109383$new_n47067_
-.subckt mx2_x2 cmd=$abc$109383$new_n44118_ i0=soc.ram.ram[97][12] i1=soc.ram.ram[101][12] q=$abc$109383$new_n47068_
-.subckt mx2_x2 cmd=$abc$109383$new_n44078_ i0=$abc$109383$new_n47068_ i1=$abc$109383$new_n47067_ q=$abc$109383$new_n47069_
+.subckt mux2_x1 cmd=$abc$109383$new_n44118_ i0=soc.ram.ram[96][12] i1=soc.ram.ram[100][12] q=$abc$109383$new_n47067_
+.subckt mux2_x1 cmd=$abc$109383$new_n44118_ i0=soc.ram.ram[97][12] i1=soc.ram.ram[101][12] q=$abc$109383$new_n47068_
+.subckt mux2_x1 cmd=$abc$109383$new_n44078_ i0=$abc$109383$new_n47068_ i1=$abc$109383$new_n47067_ q=$abc$109383$new_n47069_
 .subckt nand2_x0 i0=$abc$109383$new_n47069_ i1=$abc$109383$new_n43856_ nq=$abc$109383$new_n47070_
-.subckt mx2_x2 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[98][12] i1=soc.ram.ram[102][12] q=$abc$109383$new_n47071_
-.subckt o2_x2 i0=$abc$109383$new_n47071_ i1=$abc$109383$new_n44945_ q=$abc$109383$new_n47072_
-.subckt mx2_x2 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[99][12] i1=soc.ram.ram[103][12] q=$abc$109383$new_n47073_
-.subckt ao22_x2 i0=$abc$109383$new_n44150_ i1=$abc$109383$new_n47073_ i2=$abc$109383$new_n43842_ q=$abc$109383$new_n47074_
+.subckt mux2_x1 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[98][12] i1=soc.ram.ram[102][12] q=$abc$109383$new_n47071_
+.subckt or2_x1 i0=$abc$109383$new_n47071_ i1=$abc$109383$new_n44945_ q=$abc$109383$new_n47072_
+.subckt mux2_x1 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[99][12] i1=soc.ram.ram[103][12] q=$abc$109383$new_n47073_
+.subckt and21nor_x1 i0=$abc$109383$new_n44150_ i1=$abc$109383$new_n47073_ i2=$abc$109383$new_n43842_ nq=$abc$109383$new_n47074_
 .subckt nand2_x0 i0=$abc$109383$new_n47074_ i1=$abc$109383$new_n47072_ nq=$abc$109383$new_n47075_
 .subckt nand3_x0 i0=$abc$109383$new_n47075_ i1=$abc$109383$new_n47070_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n47076_
-.subckt mx2_x2 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[104][12] i1=soc.ram.ram[108][12] q=$abc$109383$new_n47077_
+.subckt mux2_x1 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[104][12] i1=soc.ram.ram[108][12] q=$abc$109383$new_n47077_
 .subckt nand2_x0 i0=$abc$109383$new_n47077_ i1=$abc$109383$new_n43942_ nq=$abc$109383$new_n47078_
 .subckt inv_x0 i=soc.ram.ram[109][12] nq=$abc$109383$new_n47079_
 .subckt nand2_x0 i0=$abc$109383$new_n47079_ i1=$abc$109383$new_n43851_ nq=$abc$109383$new_n47080_
-.subckt ao22_x2 i0=soc.ram.ram[105][12] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n47081_
+.subckt and21nor_x1 i0=soc.ram.ram[105][12] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n47081_
 .subckt nand2_x0 i0=$abc$109383$new_n47081_ i1=$abc$109383$new_n47080_ nq=$abc$109383$new_n47082_
 .subckt nand3_x0 i0=$abc$109383$new_n47082_ i1=$abc$109383$new_n47078_ i2=$abc$109383$new_n45015_ nq=$abc$109383$new_n47083_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[106][12] i1=soc.ram.ram[110][12] q=$abc$109383$new_n47084_
-.subckt oa22_x2 i0=$abc$109383$new_n43488_ i1=$abc$109383$new_n47084_ i2=$abc$109383$new_n44080_ q=$abc$109383$new_n47085_
-.subckt ao22_x2 i0=soc.ram.ram[107][12] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n47086_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[106][12] i1=soc.ram.ram[110][12] q=$abc$109383$new_n47084_
+.subckt or21nand_x1 i0=$abc$109383$new_n43488_ i1=$abc$109383$new_n47084_ i2=$abc$109383$new_n44080_ nq=$abc$109383$new_n47085_
+.subckt and21nor_x1 i0=soc.ram.ram[107][12] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n47086_
 .subckt inv_x0 i=soc.ram.ram[111][12] nq=$abc$109383$new_n47087_
 .subckt nand2_x0 i0=$abc$109383$new_n47087_ i1=$abc$109383$new_n44824_ nq=$abc$109383$new_n47088_
-.subckt oa22_x2 i0=$abc$109383$new_n47088_ i1=$abc$109383$new_n47086_ i2=$abc$109383$new_n47085_ q=$abc$109383$new_n47089_
-.subckt oa22_x2 i0=$abc$109383$new_n47089_ i1=$abc$109383$new_n47083_ i2=$abc$109383$new_n45211_ q=$abc$109383$new_n47090_
+.subckt or21nand_x1 i0=$abc$109383$new_n47088_ i1=$abc$109383$new_n47086_ i2=$abc$109383$new_n47085_ nq=$abc$109383$new_n47089_
+.subckt or21nand_x1 i0=$abc$109383$new_n47089_ i1=$abc$109383$new_n47083_ i2=$abc$109383$new_n45211_ nq=$abc$109383$new_n47090_
 .subckt nand3_x0 i0=$abc$109383$new_n47090_ i1=$abc$109383$new_n47076_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n47091_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[122][12] i1=soc.ram.ram[126][12] q=$abc$109383$new_n47092_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[123][12] i1=soc.ram.ram[127][12] q=$abc$109383$new_n47093_
-.subckt mx2_x2 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n47093_ i1=$abc$109383$new_n47092_ q=$abc$109383$new_n47094_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[120][12] i1=soc.ram.ram[124][12] q=$abc$109383$new_n47095_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[121][12] i1=soc.ram.ram[125][12] q=$abc$109383$new_n47096_
-.subckt mx2_x2 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n47096_ i1=$abc$109383$new_n47095_ q=$abc$109383$new_n47097_
-.subckt mx2_x2 cmd=$abc$109383$new_n43458_ i0=$abc$109383$new_n47097_ i1=$abc$109383$new_n47094_ q=$abc$109383$new_n47098_
-.subckt o2_x2 i0=$abc$109383$new_n47098_ i1=$abc$109383$new_n45070_ q=$abc$109383$new_n47099_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[122][12] i1=soc.ram.ram[126][12] q=$abc$109383$new_n47092_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[123][12] i1=soc.ram.ram[127][12] q=$abc$109383$new_n47093_
+.subckt mux2_x1 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n47093_ i1=$abc$109383$new_n47092_ q=$abc$109383$new_n47094_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[120][12] i1=soc.ram.ram[124][12] q=$abc$109383$new_n47095_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[121][12] i1=soc.ram.ram[125][12] q=$abc$109383$new_n47096_
+.subckt mux2_x1 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n47096_ i1=$abc$109383$new_n47095_ q=$abc$109383$new_n47097_
+.subckt mux2_x1 cmd=$abc$109383$new_n43458_ i0=$abc$109383$new_n47097_ i1=$abc$109383$new_n47094_ q=$abc$109383$new_n47098_
+.subckt or2_x1 i0=$abc$109383$new_n47098_ i1=$abc$109383$new_n45070_ q=$abc$109383$new_n47099_
 .subckt inv_x0 i=soc.ram.ram[117][12] nq=$abc$109383$new_n47100_
 .subckt nand2_x0 i0=$abc$109383$new_n47100_ i1=$abc$109383$new_n43851_ nq=$abc$109383$new_n47101_
-.subckt ao22_x2 i0=soc.ram.ram[113][12] i1=$abc$109383$new_n43343_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n47102_
+.subckt and21nor_x1 i0=soc.ram.ram[113][12] i1=$abc$109383$new_n43343_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n47102_
 .subckt nand2_x0 i0=$abc$109383$new_n47102_ i1=$abc$109383$new_n47101_ nq=$abc$109383$new_n47103_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[112][12] i1=soc.ram.ram[116][12] q=$abc$109383$new_n47104_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[112][12] i1=soc.ram.ram[116][12] q=$abc$109383$new_n47104_
 .subckt nand2_x0 i0=$abc$109383$new_n47104_ i1=$abc$109383$new_n43738_ nq=$abc$109383$new_n47105_
 .subckt nand3_x0 i0=$abc$109383$new_n47105_ i1=$abc$109383$new_n47103_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n47106_
 .subckt inv_x0 i=soc.ram.ram[119][12] nq=$abc$109383$new_n47107_
 .subckt nand2_x0 i0=$abc$109383$new_n47107_ i1=$abc$109383$new_n45219_ nq=$abc$109383$new_n47108_
-.subckt ao22_x2 i0=soc.ram.ram[115][12] i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n47109_
+.subckt and21nor_x1 i0=soc.ram.ram[115][12] i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n47109_
 .subckt nand2_x0 i0=$abc$109383$new_n47109_ i1=$abc$109383$new_n47108_ nq=$abc$109383$new_n47110_
-.subckt mx2_x2 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[114][12] i1=soc.ram.ram[118][12] q=$abc$109383$new_n47111_
-.subckt a2_x2 i0=$abc$109383$new_n47111_ i1=$abc$109383$new_n44103_ q=$abc$109383$new_n47112_
+.subckt mux2_x1 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[114][12] i1=soc.ram.ram[118][12] q=$abc$109383$new_n47111_
+.subckt and2_x1 i0=$abc$109383$new_n47111_ i1=$abc$109383$new_n44103_ q=$abc$109383$new_n47112_
 .subckt nor2_x0 i0=$abc$109383$new_n47112_ i1=$abc$109383$new_n43449_ nq=$abc$109383$new_n47113_
 .subckt nand2_x0 i0=$abc$109383$new_n47113_ i1=$abc$109383$new_n47110_ nq=$abc$109383$new_n47114_
-.subckt oa22_x2 i0=$abc$109383$new_n47114_ i1=$abc$109383$new_n47106_ i2=$abc$109383$new_n45244_ q=$abc$109383$new_n47115_
+.subckt or21nand_x1 i0=$abc$109383$new_n47114_ i1=$abc$109383$new_n47106_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n47115_
 .subckt nand3_x0 i0=$abc$109383$new_n47115_ i1=$abc$109383$new_n47099_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n47116_
 .subckt nand3_x0 i0=$abc$109383$new_n47116_ i1=$abc$109383$new_n47091_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n47117_
-.subckt a3_x2 i0=$abc$109383$new_n47117_ i1=$abc$109383$new_n47066_ i2=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n47118_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[2][12] i1=soc.ram.ram[6][12] q=$abc$109383$new_n47119_
-.subckt mx2_x2 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[3][12] i1=soc.ram.ram[7][12] q=$abc$109383$new_n47120_
-.subckt mx2_x2 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n47120_ i1=$abc$109383$new_n47119_ q=$abc$109383$new_n47121_
+.subckt and3_x1 i0=$abc$109383$new_n47117_ i1=$abc$109383$new_n47066_ i2=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n47118_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[2][12] i1=soc.ram.ram[6][12] q=$abc$109383$new_n47119_
+.subckt mux2_x1 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[3][12] i1=soc.ram.ram[7][12] q=$abc$109383$new_n47120_
+.subckt mux2_x1 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n47120_ i1=$abc$109383$new_n47119_ q=$abc$109383$new_n47121_
 .subckt nor2_x0 i0=$abc$109383$new_n47121_ i1=$abc$109383$new_n43569_ nq=$abc$109383$new_n47122_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[10][12] i1=soc.ram.ram[14][12] q=$abc$109383$new_n47123_
-.subckt a2_x2 i0=$abc$109383$new_n47123_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n47124_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[10][12] i1=soc.ram.ram[14][12] q=$abc$109383$new_n47123_
+.subckt and2_x1 i0=$abc$109383$new_n47123_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n47124_
 .subckt inv_x0 i=soc.ram.ram[15][12] nq=$abc$109383$new_n47125_
 .subckt nand2_x0 i0=$abc$109383$new_n47125_ i1=$abc$109383$new_n44137_ nq=$abc$109383$new_n47126_
-.subckt ao22_x2 i0=soc.ram.ram[11][12] i1=$abc$109383$new_n43817_ i2=$abc$109383$new_n43556_ q=$abc$109383$new_n47127_
-.subckt oa22_x2 i0=$abc$109383$new_n47127_ i1=$abc$109383$new_n47126_ i2=$abc$109383$new_n44161_ q=$abc$109383$new_n47128_
+.subckt and21nor_x1 i0=soc.ram.ram[11][12] i1=$abc$109383$new_n43817_ i2=$abc$109383$new_n43556_ nq=$abc$109383$new_n47127_
+.subckt or21nand_x1 i0=$abc$109383$new_n47127_ i1=$abc$109383$new_n47126_ i2=$abc$109383$new_n44161_ nq=$abc$109383$new_n47128_
 .subckt nor2_x0 i0=$abc$109383$new_n47128_ i1=$abc$109383$new_n47124_ nq=$abc$109383$new_n47129_
-.subckt ao22_x2 i0=$abc$109383$new_n47129_ i1=$abc$109383$new_n47122_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n47130_
+.subckt and21nor_x1 i0=$abc$109383$new_n47129_ i1=$abc$109383$new_n47122_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n47130_
 .subckt nand2_x0 i0=soc.ram.ram[23][12] i1=$abc$109383$new_n44240_ nq=$abc$109383$new_n47131_
 .subckt inv_x0 i=soc.ram.ram[31][12] nq=$abc$109383$new_n47132_
-.subckt ao22_x2 i0=$abc$109383$new_n47132_ i1=$abc$109383$new_n44161_ i2=$abc$109383$new_n45076_ q=$abc$109383$new_n47133_
+.subckt and21nor_x1 i0=$abc$109383$new_n47132_ i1=$abc$109383$new_n44161_ i2=$abc$109383$new_n45076_ nq=$abc$109383$new_n47133_
 .subckt nand2_x0 i0=$abc$109383$new_n47133_ i1=$abc$109383$new_n47131_ nq=$abc$109383$new_n47134_
-.subckt oa22_x2 i0=soc.ram.ram[27][12] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n43367_ q=$abc$109383$new_n47135_
-.subckt oa22_x2 i0=$abc$109383$new_n43431_ i1=soc.ram.ram[19][12] i2=$abc$109383$new_n47135_ q=$abc$109383$new_n47136_
-.subckt a2_x2 i0=$abc$109383$new_n47136_ i1=$abc$109383$new_n43517_ q=$abc$109383$new_n47137_
+.subckt or21nand_x1 i0=soc.ram.ram[27][12] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n43367_ nq=$abc$109383$new_n47135_
+.subckt or21nand_x1 i0=$abc$109383$new_n43431_ i1=soc.ram.ram[19][12] i2=$abc$109383$new_n47135_ nq=$abc$109383$new_n47136_
+.subckt and2_x1 i0=$abc$109383$new_n47136_ i1=$abc$109383$new_n43517_ q=$abc$109383$new_n47137_
 .subckt nand2_x0 i0=$abc$109383$new_n47137_ i1=$abc$109383$new_n47134_ nq=$abc$109383$new_n47138_
 .subckt nand2_x0 i0=soc.ram.ram[22][12] i1=$abc$109383$new_n43469_ nq=$abc$109383$new_n47139_
 .subckt inv_x0 i=soc.ram.ram[30][12] nq=$abc$109383$new_n47140_
-.subckt ao22_x2 i0=$abc$109383$new_n47140_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44423_ q=$abc$109383$new_n47141_
-.subckt a2_x2 i0=$abc$109383$new_n47141_ i1=$abc$109383$new_n47139_ q=$abc$109383$new_n47142_
-.subckt oa22_x2 i0=soc.ram.ram[26][12] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n43440_ q=$abc$109383$new_n47143_
-.subckt oa22_x2 i0=$abc$109383$new_n43390_ i1=soc.ram.ram[18][12] i2=$abc$109383$new_n47143_ q=$abc$109383$new_n47144_
+.subckt and21nor_x1 i0=$abc$109383$new_n47140_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44423_ nq=$abc$109383$new_n47141_
+.subckt and2_x1 i0=$abc$109383$new_n47141_ i1=$abc$109383$new_n47139_ q=$abc$109383$new_n47142_
+.subckt or21nand_x1 i0=soc.ram.ram[26][12] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n43440_ nq=$abc$109383$new_n47143_
+.subckt or21nand_x1 i0=$abc$109383$new_n43390_ i1=soc.ram.ram[18][12] i2=$abc$109383$new_n47143_ nq=$abc$109383$new_n47144_
 .subckt nand2_x0 i0=$abc$109383$new_n47144_ i1=$abc$109383$new_n43456_ nq=$abc$109383$new_n47145_
-.subckt ao22_x2 i0=$abc$109383$new_n47145_ i1=$abc$109383$new_n47142_ i2=$abc$109383$new_n43466_ q=$abc$109383$new_n47146_
-.subckt a2_x2 i0=$abc$109383$new_n47146_ i1=$abc$109383$new_n47138_ q=$abc$109383$new_n47147_
-.subckt ao22_x2 i0=$abc$109383$new_n47147_ i1=$abc$109383$new_n47130_ i2=$abc$109383$new_n45604_ q=$abc$109383$new_n47148_
-.subckt mx2_x2 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[28][12] i1=soc.ram.ram[29][12] q=$abc$109383$new_n47149_
-.subckt mx2_x2 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[24][12] i1=soc.ram.ram[25][12] q=$abc$109383$new_n47150_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=$abc$109383$new_n47150_ i1=$abc$109383$new_n47149_ q=$abc$109383$new_n47151_
+.subckt and21nor_x1 i0=$abc$109383$new_n47145_ i1=$abc$109383$new_n47142_ i2=$abc$109383$new_n43466_ nq=$abc$109383$new_n47146_
+.subckt and2_x1 i0=$abc$109383$new_n47146_ i1=$abc$109383$new_n47138_ q=$abc$109383$new_n47147_
+.subckt and21nor_x1 i0=$abc$109383$new_n47147_ i1=$abc$109383$new_n47130_ i2=$abc$109383$new_n45604_ nq=$abc$109383$new_n47148_
+.subckt mux2_x1 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[28][12] i1=soc.ram.ram[29][12] q=$abc$109383$new_n47149_
+.subckt mux2_x1 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[24][12] i1=soc.ram.ram[25][12] q=$abc$109383$new_n47150_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=$abc$109383$new_n47150_ i1=$abc$109383$new_n47149_ q=$abc$109383$new_n47151_
 .subckt nor2_x0 i0=$abc$109383$new_n47151_ i1=$abc$109383$new_n43470_ nq=$abc$109383$new_n47152_
-.subckt mx2_x2 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[20][12] i1=soc.ram.ram[21][12] q=$abc$109383$new_n47153_
-.subckt mx2_x2 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[16][12] i1=soc.ram.ram[17][12] q=$abc$109383$new_n47154_
-.subckt mx2_x2 cmd=$abc$109383$new_n43441_ i0=$abc$109383$new_n47154_ i1=$abc$109383$new_n47153_ q=$abc$109383$new_n47155_
+.subckt mux2_x1 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[20][12] i1=soc.ram.ram[21][12] q=$abc$109383$new_n47153_
+.subckt mux2_x1 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[16][12] i1=soc.ram.ram[17][12] q=$abc$109383$new_n47154_
+.subckt mux2_x1 cmd=$abc$109383$new_n43441_ i0=$abc$109383$new_n47154_ i1=$abc$109383$new_n47153_ q=$abc$109383$new_n47155_
 .subckt nor2_x0 i0=$abc$109383$new_n47155_ i1=$abc$109383$new_n43648_ nq=$abc$109383$new_n47156_
-.subckt ao22_x2 i0=$abc$109383$new_n47156_ i1=$abc$109383$new_n47152_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n47157_
-.subckt mx2_x2 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[0][12] i1=soc.ram.ram[4][12] q=$abc$109383$new_n47158_
-.subckt mx2_x2 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[1][12] i1=soc.ram.ram[5][12] q=$abc$109383$new_n47159_
-.subckt mx2_x2 cmd=$abc$109383$new_n43487_ i0=$abc$109383$new_n47159_ i1=$abc$109383$new_n47158_ q=$abc$109383$new_n47160_
+.subckt and21nor_x1 i0=$abc$109383$new_n47156_ i1=$abc$109383$new_n47152_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n47157_
+.subckt mux2_x1 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[0][12] i1=soc.ram.ram[4][12] q=$abc$109383$new_n47158_
+.subckt mux2_x1 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[1][12] i1=soc.ram.ram[5][12] q=$abc$109383$new_n47159_
+.subckt mux2_x1 cmd=$abc$109383$new_n43487_ i0=$abc$109383$new_n47159_ i1=$abc$109383$new_n47158_ q=$abc$109383$new_n47160_
 .subckt nor2_x0 i0=$abc$109383$new_n47160_ i1=$abc$109383$new_n43353_ nq=$abc$109383$new_n47161_
-.subckt mx2_x2 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[8][12] i1=soc.ram.ram[12][12] q=$abc$109383$new_n47162_
-.subckt a2_x2 i0=$abc$109383$new_n47162_ i1=$abc$109383$new_n43356_ q=$abc$109383$new_n47163_
+.subckt mux2_x1 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[8][12] i1=soc.ram.ram[12][12] q=$abc$109383$new_n47162_
+.subckt and2_x1 i0=$abc$109383$new_n47162_ i1=$abc$109383$new_n43356_ q=$abc$109383$new_n47163_
 .subckt inv_x0 i=soc.ram.ram[13][12] nq=$abc$109383$new_n47164_
 .subckt nand2_x0 i0=$abc$109383$new_n47164_ i1=$abc$109383$new_n43755_ nq=$abc$109383$new_n47165_
-.subckt ao22_x2 i0=soc.ram.ram[9][12] i1=$abc$109383$new_n43684_ i2=$abc$109383$new_n43393_ q=$abc$109383$new_n47166_
-.subckt oa22_x2 i0=$abc$109383$new_n47166_ i1=$abc$109383$new_n47165_ i2=$abc$109383$new_n43431_ q=$abc$109383$new_n47167_
+.subckt and21nor_x1 i0=soc.ram.ram[9][12] i1=$abc$109383$new_n43684_ i2=$abc$109383$new_n43393_ nq=$abc$109383$new_n47166_
+.subckt or21nand_x1 i0=$abc$109383$new_n47166_ i1=$abc$109383$new_n47165_ i2=$abc$109383$new_n43431_ nq=$abc$109383$new_n47167_
 .subckt nor2_x0 i0=$abc$109383$new_n47167_ i1=$abc$109383$new_n47163_ nq=$abc$109383$new_n47168_
-.subckt ao22_x2 i0=$abc$109383$new_n47168_ i1=$abc$109383$new_n47161_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n47169_
-.subckt ao22_x2 i0=$abc$109383$new_n47169_ i1=$abc$109383$new_n47157_ i2=$abc$109383$new_n45614_ q=$abc$109383$new_n47170_
-.subckt ao22_x2 i0=$abc$109383$new_n47170_ i1=$abc$109383$new_n47148_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n47171_
+.subckt and21nor_x1 i0=$abc$109383$new_n47168_ i1=$abc$109383$new_n47161_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n47169_
+.subckt and21nor_x1 i0=$abc$109383$new_n47169_ i1=$abc$109383$new_n47157_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n47170_
+.subckt and21nor_x1 i0=$abc$109383$new_n47170_ i1=$abc$109383$new_n47148_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n47171_
 .subckt inv_x0 i=soc.ram.ram[43][12] nq=$abc$109383$new_n47172_
 .subckt inv_x0 i=soc.ram.ram[47][12] nq=$abc$109383$new_n47173_
-.subckt mx2_x2 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n47173_ i1=$abc$109383$new_n47172_ q=$abc$109383$new_n47174_
+.subckt mux2_x1 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n47173_ i1=$abc$109383$new_n47172_ q=$abc$109383$new_n47174_
 .subckt inv_x0 i=soc.ram.ram[42][12] nq=$abc$109383$new_n47175_
 .subckt inv_x0 i=soc.ram.ram[46][12] nq=$abc$109383$new_n47176_
-.subckt mx2_x2 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n47176_ i1=$abc$109383$new_n47175_ q=$abc$109383$new_n47177_
-.subckt mx2_x2 cmd=$abc$109383$new_n43394_ i0=$abc$109383$new_n47177_ i1=$abc$109383$new_n47174_ q=$abc$109383$new_n47178_
-.subckt a2_x2 i0=$abc$109383$new_n47178_ i1=$abc$109383$new_n43580_ q=$abc$109383$new_n47179_
+.subckt mux2_x1 cmd=$abc$109383$new_n43364_ i0=$abc$109383$new_n47176_ i1=$abc$109383$new_n47175_ q=$abc$109383$new_n47177_
+.subckt mux2_x1 cmd=$abc$109383$new_n43394_ i0=$abc$109383$new_n47177_ i1=$abc$109383$new_n47174_ q=$abc$109383$new_n47178_
+.subckt and2_x1 i0=$abc$109383$new_n47178_ i1=$abc$109383$new_n43580_ q=$abc$109383$new_n47179_
 .subckt inv_x0 i=soc.ram.ram[41][12] nq=$abc$109383$new_n47180_
 .subckt inv_x0 i=soc.ram.ram[45][12] nq=$abc$109383$new_n47181_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n47181_ i1=$abc$109383$new_n47180_ q=$abc$109383$new_n47182_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n47181_ i1=$abc$109383$new_n47180_ q=$abc$109383$new_n47182_
 .subckt inv_x0 i=soc.ram.ram[40][12] nq=$abc$109383$new_n47183_
 .subckt inv_x0 i=soc.ram.ram[44][12] nq=$abc$109383$new_n47184_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n47184_ i1=$abc$109383$new_n47183_ q=$abc$109383$new_n47185_
-.subckt mx2_x2 cmd=$abc$109383$new_n43698_ i0=$abc$109383$new_n47185_ i1=$abc$109383$new_n47182_ q=$abc$109383$new_n47186_
-.subckt oa22_x2 i0=$abc$109383$new_n43543_ i1=$abc$109383$new_n47186_ i2=$abc$109383$new_n43391_ q=$abc$109383$new_n47187_
-.subckt o2_x2 i0=$abc$109383$new_n47187_ i1=$abc$109383$new_n47179_ q=$abc$109383$new_n47188_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[34][12] i1=soc.ram.ram[38][12] q=$abc$109383$new_n47189_
-.subckt a2_x2 i0=$abc$109383$new_n47189_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n47190_
-.subckt ao22_x2 i0=soc.ram.ram[35][12] i1=$abc$109383$new_n44163_ i2=$abc$109383$new_n43641_ q=$abc$109383$new_n47191_
-.subckt ao22_x2 i0=$abc$109383$new_n43365_ i1=soc.ram.ram[39][12] i2=$abc$109383$new_n47191_ q=$abc$109383$new_n47192_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n47184_ i1=$abc$109383$new_n47183_ q=$abc$109383$new_n47185_
+.subckt mux2_x1 cmd=$abc$109383$new_n43698_ i0=$abc$109383$new_n47185_ i1=$abc$109383$new_n47182_ q=$abc$109383$new_n47186_
+.subckt or21nand_x1 i0=$abc$109383$new_n43543_ i1=$abc$109383$new_n47186_ i2=$abc$109383$new_n43391_ nq=$abc$109383$new_n47187_
+.subckt or2_x1 i0=$abc$109383$new_n47187_ i1=$abc$109383$new_n47179_ q=$abc$109383$new_n47188_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[34][12] i1=soc.ram.ram[38][12] q=$abc$109383$new_n47189_
+.subckt and2_x1 i0=$abc$109383$new_n47189_ i1=$abc$109383$new_n43494_ q=$abc$109383$new_n47190_
+.subckt and21nor_x1 i0=soc.ram.ram[35][12] i1=$abc$109383$new_n44163_ i2=$abc$109383$new_n43641_ nq=$abc$109383$new_n47191_
+.subckt and21nor_x1 i0=$abc$109383$new_n43365_ i1=soc.ram.ram[39][12] i2=$abc$109383$new_n47191_ nq=$abc$109383$new_n47192_
 .subckt nor3_x0 i0=$abc$109383$new_n47192_ i1=$abc$109383$new_n47190_ i2=$abc$109383$new_n44061_ nq=$abc$109383$new_n47193_
 .subckt inv_x0 i=soc.ram.ram[32][12] nq=$abc$109383$new_n47194_
 .subckt inv_x0 i=soc.ram.ram[36][12] nq=$abc$109383$new_n47195_
-.subckt mx2_x2 cmd=$abc$109383$new_n43363_ i0=$abc$109383$new_n47195_ i1=$abc$109383$new_n47194_ q=$abc$109383$new_n47196_
+.subckt mux2_x1 cmd=$abc$109383$new_n43363_ i0=$abc$109383$new_n47195_ i1=$abc$109383$new_n47194_ q=$abc$109383$new_n47196_
 .subckt inv_x0 i=soc.ram.ram[33][12] nq=$abc$109383$new_n47197_
 .subckt inv_x0 i=soc.ram.ram[37][12] nq=$abc$109383$new_n47198_
-.subckt mx2_x2 cmd=$abc$109383$new_n43363_ i0=$abc$109383$new_n47198_ i1=$abc$109383$new_n47197_ q=$abc$109383$new_n47199_
-.subckt mx2_x2 cmd=$abc$109383$new_n43487_ i0=$abc$109383$new_n47199_ i1=$abc$109383$new_n47196_ q=$abc$109383$new_n47200_
-.subckt oa22_x2 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n47200_ i2=$abc$109383$new_n43524_ q=$abc$109383$new_n47201_
-.subckt ao22_x2 i0=$abc$109383$new_n47201_ i1=$abc$109383$new_n47193_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n47202_
-.subckt a2_x2 i0=$abc$109383$new_n47202_ i1=$abc$109383$new_n47188_ q=$abc$109383$new_n47203_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[58][12] i1=soc.ram.ram[62][12] q=$abc$109383$new_n47204_
-.subckt oa22_x2 i0=$abc$109383$new_n43356_ i1=$abc$109383$new_n47204_ i2=$abc$109383$new_n44060_ q=$abc$109383$new_n47205_
-.subckt ao22_x2 i0=soc.ram.ram[59][12] i1=$abc$109383$new_n44795_ i2=$abc$109383$new_n43961_ q=$abc$109383$new_n47206_
+.subckt mux2_x1 cmd=$abc$109383$new_n43363_ i0=$abc$109383$new_n47198_ i1=$abc$109383$new_n47197_ q=$abc$109383$new_n47199_
+.subckt mux2_x1 cmd=$abc$109383$new_n43487_ i0=$abc$109383$new_n47199_ i1=$abc$109383$new_n47196_ q=$abc$109383$new_n47200_
+.subckt or21nand_x1 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n47200_ i2=$abc$109383$new_n43524_ nq=$abc$109383$new_n47201_
+.subckt and21nor_x1 i0=$abc$109383$new_n47201_ i1=$abc$109383$new_n47193_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n47202_
+.subckt and2_x1 i0=$abc$109383$new_n47202_ i1=$abc$109383$new_n47188_ q=$abc$109383$new_n47203_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[58][12] i1=soc.ram.ram[62][12] q=$abc$109383$new_n47204_
+.subckt or21nand_x1 i0=$abc$109383$new_n43356_ i1=$abc$109383$new_n47204_ i2=$abc$109383$new_n44060_ nq=$abc$109383$new_n47205_
+.subckt and21nor_x1 i0=soc.ram.ram[59][12] i1=$abc$109383$new_n44795_ i2=$abc$109383$new_n43961_ nq=$abc$109383$new_n47206_
 .subckt inv_x0 i=soc.ram.ram[63][12] nq=$abc$109383$new_n47207_
 .subckt nand2_x0 i0=$abc$109383$new_n47207_ i1=$abc$109383$new_n45691_ nq=$abc$109383$new_n47208_
-.subckt oa22_x2 i0=$abc$109383$new_n47208_ i1=$abc$109383$new_n47206_ i2=$abc$109383$new_n47205_ q=$abc$109383$new_n47209_
-.subckt ao22_x2 i0=soc.ram.ram[57][12] i1=$abc$109383$new_n44418_ i2=$abc$109383$new_n44401_ q=$abc$109383$new_n47210_
-.subckt ao22_x2 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[61][12] i2=$abc$109383$new_n47210_ q=$abc$109383$new_n47211_
-.subckt mx2_x2 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[56][12] i1=soc.ram.ram[60][12] q=$abc$109383$new_n47212_
-.subckt oa22_x2 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n47212_ i2=$abc$109383$new_n43579_ q=$abc$109383$new_n47213_
-.subckt ao22_x2 i0=$abc$109383$new_n47213_ i1=$abc$109383$new_n47211_ i2=$abc$109383$new_n43569_ q=$abc$109383$new_n47214_
+.subckt or21nand_x1 i0=$abc$109383$new_n47208_ i1=$abc$109383$new_n47206_ i2=$abc$109383$new_n47205_ nq=$abc$109383$new_n47209_
+.subckt and21nor_x1 i0=soc.ram.ram[57][12] i1=$abc$109383$new_n44418_ i2=$abc$109383$new_n44401_ nq=$abc$109383$new_n47210_
+.subckt and21nor_x1 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[61][12] i2=$abc$109383$new_n47210_ nq=$abc$109383$new_n47211_
+.subckt mux2_x1 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[56][12] i1=soc.ram.ram[60][12] q=$abc$109383$new_n47212_
+.subckt or21nand_x1 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n47212_ i2=$abc$109383$new_n43579_ nq=$abc$109383$new_n47213_
+.subckt and21nor_x1 i0=$abc$109383$new_n47213_ i1=$abc$109383$new_n47211_ i2=$abc$109383$new_n43569_ nq=$abc$109383$new_n47214_
 .subckt nand2_x0 i0=$abc$109383$new_n47214_ i1=$abc$109383$new_n47209_ nq=$abc$109383$new_n47215_
-.subckt ao22_x2 i0=soc.ram.ram[51][12] i1=$abc$109383$new_n43755_ i2=$abc$109383$new_n43846_ q=$abc$109383$new_n47216_
-.subckt ao22_x2 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[55][12] i2=$abc$109383$new_n47216_ q=$abc$109383$new_n47217_
-.subckt o2_x2 i0=soc.ram.ram[50][12] i1=$abc$109383$new_n44186_ q=$abc$109383$new_n47218_
-.subckt ao22_x2 i0=soc.ram.ram[54][12] i1=$abc$109383$new_n43364_ i2=$abc$109383$new_n43333_ q=$abc$109383$new_n47219_
-.subckt oa22_x2 i0=$abc$109383$new_n47219_ i1=$abc$109383$new_n47218_ i2=$abc$109383$new_n43329_ q=$abc$109383$new_n47220_
+.subckt and21nor_x1 i0=soc.ram.ram[51][12] i1=$abc$109383$new_n43755_ i2=$abc$109383$new_n43846_ nq=$abc$109383$new_n47216_
+.subckt and21nor_x1 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[55][12] i2=$abc$109383$new_n47216_ nq=$abc$109383$new_n47217_
+.subckt or2_x1 i0=soc.ram.ram[50][12] i1=$abc$109383$new_n44186_ q=$abc$109383$new_n47218_
+.subckt and21nor_x1 i0=soc.ram.ram[54][12] i1=$abc$109383$new_n43364_ i2=$abc$109383$new_n43333_ nq=$abc$109383$new_n47219_
+.subckt or21nand_x1 i0=$abc$109383$new_n47219_ i1=$abc$109383$new_n47218_ i2=$abc$109383$new_n43329_ nq=$abc$109383$new_n47220_
 .subckt nor2_x0 i0=$abc$109383$new_n47220_ i1=$abc$109383$new_n47217_ nq=$abc$109383$new_n47221_
 .subckt inv_x0 i=soc.ram.ram[53][12] nq=$abc$109383$new_n47222_
 .subckt nand2_x0 i0=$abc$109383$new_n47222_ i1=$abc$109383$new_n43818_ nq=$abc$109383$new_n47223_
-.subckt ao22_x2 i0=soc.ram.ram[49][12] i1=$abc$109383$new_n43475_ i2=$abc$109383$new_n43641_ q=$abc$109383$new_n47224_
+.subckt and21nor_x1 i0=soc.ram.ram[49][12] i1=$abc$109383$new_n43475_ i2=$abc$109383$new_n43641_ nq=$abc$109383$new_n47224_
 .subckt nand2_x0 i0=$abc$109383$new_n47224_ i1=$abc$109383$new_n47223_ nq=$abc$109383$new_n47225_
-.subckt mx2_x2 cmd=$abc$109383$new_n43474_ i0=soc.ram.ram[48][12] i1=soc.ram.ram[52][12] q=$abc$109383$new_n47226_
+.subckt mux2_x1 cmd=$abc$109383$new_n43474_ i0=soc.ram.ram[48][12] i1=soc.ram.ram[52][12] q=$abc$109383$new_n47226_
 .subckt nand2_x0 i0=$abc$109383$new_n47226_ i1=$abc$109383$new_n43601_ nq=$abc$109383$new_n47227_
-.subckt a2_x2 i0=$abc$109383$new_n47227_ i1=$abc$109383$new_n43422_ q=$abc$109383$new_n47228_
-.subckt oa22_x2 i0=$abc$109383$new_n47228_ i1=$abc$109383$new_n47225_ i2=$abc$109383$new_n43524_ q=$abc$109383$new_n47229_
-.subckt ao22_x2 i0=$abc$109383$new_n47229_ i1=$abc$109383$new_n47221_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n47230_
-.subckt a2_x2 i0=$abc$109383$new_n47230_ i1=$abc$109383$new_n47215_ q=$abc$109383$new_n47231_
-.subckt ao22_x2 i0=$abc$109383$new_n47231_ i1=$abc$109383$new_n47203_ i2=$abc$109383$new_n43409_ q=$abc$109383$new_n47232_
+.subckt and2_x1 i0=$abc$109383$new_n47227_ i1=$abc$109383$new_n43422_ q=$abc$109383$new_n47228_
+.subckt or21nand_x1 i0=$abc$109383$new_n47228_ i1=$abc$109383$new_n47225_ i2=$abc$109383$new_n43524_ nq=$abc$109383$new_n47229_
+.subckt and21nor_x1 i0=$abc$109383$new_n47229_ i1=$abc$109383$new_n47221_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n47230_
+.subckt and2_x1 i0=$abc$109383$new_n47230_ i1=$abc$109383$new_n47215_ q=$abc$109383$new_n47231_
+.subckt and21nor_x1 i0=$abc$109383$new_n47231_ i1=$abc$109383$new_n47203_ i2=$abc$109383$new_n43409_ nq=$abc$109383$new_n47232_
 .subckt nor3_x0 i0=$abc$109383$new_n47232_ i1=$abc$109383$new_n47171_ i2=$abc$109383$new_n43586_ nq=$abc$109383$new_n47233_
-.subckt ao22_x2 i0=$abc$109383$new_n47233_ i1=$abc$109383$new_n47118_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n47234_
+.subckt and21nor_x1 i0=$abc$109383$new_n47233_ i1=$abc$109383$new_n47118_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n47234_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[12] nq=$abc$109383$new_n47235_
-.subckt o2_x2 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n47235_ q=$abc$109383$new_n47236_
-.subckt o3_x2 i0=$abc$109383$new_n47236_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ q=$abc$109383$new_n47237_
+.subckt or2_x1 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n47235_ q=$abc$109383$new_n47236_
+.subckt or3_x1 i0=$abc$109383$new_n47236_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ q=$abc$109383$new_n47237_
 .subckt buf_x4 i=$abc$109383$new_n19663_ q=$abc$109383$new_n47238_
 .subckt nand4_x0 i0=$abc$109383$new_n44875_ i1=$abc$109383$new_n44282_ i2=$abc$109383$new_n47238_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[12] nq=$abc$109383$new_n47239_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[12] nq=$abc$109383$new_n47240_
 .subckt nand3_x0 i0=$abc$109383$new_n28804_ i1=$abc$109383$new_n28801_ i2=soc.hyperram.sr[12] nq=$abc$109383$new_n47241_
-.subckt a2_x2 i0=$abc$109383$new_n47241_ i1=$abc$109383$new_n47240_ q=$abc$109383$new_n47242_
+.subckt and2_x1 i0=$abc$109383$new_n47241_ i1=$abc$109383$new_n47240_ q=$abc$109383$new_n47242_
 .subckt nand4_x0 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n28378_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[12] nq=$abc$109383$new_n47243_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[12] nq=$abc$109383$new_n47244_
 .subckt nor2_x0 i0=$abc$109383$new_n22004_ i1=$abc$109383$new_n47244_ nq=$abc$109383$new_n47245_
 .subckt nand4_x0 i0=$abc$109383$new_n47245_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n27638_ i3=$abc$109383$new_n28378_ nq=$abc$109383$new_n47246_
-.subckt a2_x2 i0=$abc$109383$new_n47246_ i1=$abc$109383$new_n47243_ q=$abc$109383$new_n47247_
+.subckt and2_x1 i0=$abc$109383$new_n47246_ i1=$abc$109383$new_n47243_ q=$abc$109383$new_n47247_
 .subckt nand4_x0 i0=$abc$109383$new_n47247_ i1=$abc$109383$new_n47242_ i2=$abc$109383$new_n47239_ i3=$abc$109383$new_n47237_ nq=$abc$109383$new_n47248_
-.subckt o2_x2 i0=$abc$109383$new_n47248_ i1=$abc$109383$new_n47234_ q=$abc$109383$new_n47249_
-.subckt ao22_x2 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n47249_ i2=$abc$109383$new_n47012_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103246
-.subckt mx2_x2 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[16][13] i1=soc.ram.ram[20][13] q=$abc$109383$new_n47251_
-.subckt mx2_x2 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[17][13] i1=soc.ram.ram[21][13] q=$abc$109383$new_n47252_
-.subckt mx2_x2 cmd=$abc$109383$new_n44008_ i0=$abc$109383$new_n47252_ i1=$abc$109383$new_n47251_ q=$abc$109383$new_n47253_
+.subckt or2_x1 i0=$abc$109383$new_n47248_ i1=$abc$109383$new_n47234_ q=$abc$109383$new_n47249_
+.subckt and21nor_x1 i0=$abc$109383$new_n43773_ i1=$abc$109383$new_n47249_ i2=$abc$109383$new_n47012_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103246
+.subckt mux2_x1 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[16][13] i1=soc.ram.ram[20][13] q=$abc$109383$new_n47251_
+.subckt mux2_x1 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[17][13] i1=soc.ram.ram[21][13] q=$abc$109383$new_n47252_
+.subckt mux2_x1 cmd=$abc$109383$new_n44008_ i0=$abc$109383$new_n47252_ i1=$abc$109383$new_n47251_ q=$abc$109383$new_n47253_
 .subckt nor2_x0 i0=$abc$109383$new_n47253_ i1=$abc$109383$new_n43949_ nq=$abc$109383$new_n47254_
-.subckt mx2_x2 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[18][13] i1=soc.ram.ram[22][13] q=$abc$109383$new_n47255_
-.subckt a2_x2 i0=$abc$109383$new_n47255_ i1=$abc$109383$new_n43821_ q=$abc$109383$new_n47256_
-.subckt ao22_x2 i0=soc.ram.ram[19][13] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n47257_
-.subckt ao22_x2 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[23][13] i2=$abc$109383$new_n47257_ q=$abc$109383$new_n47258_
+.subckt mux2_x1 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[18][13] i1=soc.ram.ram[22][13] q=$abc$109383$new_n47255_
+.subckt and2_x1 i0=$abc$109383$new_n47255_ i1=$abc$109383$new_n43821_ q=$abc$109383$new_n47256_
+.subckt and21nor_x1 i0=soc.ram.ram[19][13] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n47257_
+.subckt and21nor_x1 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[23][13] i2=$abc$109383$new_n47257_ nq=$abc$109383$new_n47258_
 .subckt nor3_x0 i0=$abc$109383$new_n47258_ i1=$abc$109383$new_n47256_ i2=$abc$109383$new_n44494_ nq=$abc$109383$new_n47259_
-.subckt o3_x2 i0=$abc$109383$new_n47259_ i1=$abc$109383$new_n47254_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n47260_
-.subckt mx2_x2 cmd=$abc$109383$new_n44818_ i0=soc.ram.ram[2][13] i1=soc.ram.ram[6][13] q=$abc$109383$new_n47261_
+.subckt or3_x1 i0=$abc$109383$new_n47259_ i1=$abc$109383$new_n47254_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n47260_
+.subckt mux2_x1 cmd=$abc$109383$new_n44818_ i0=soc.ram.ram[2][13] i1=soc.ram.ram[6][13] q=$abc$109383$new_n47261_
 .subckt nand2_x0 i0=$abc$109383$new_n47261_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n47262_
-.subckt mx2_x2 cmd=$abc$109383$new_n43826_ i0=soc.ram.ram[3][13] i1=soc.ram.ram[7][13] q=$abc$109383$new_n47263_
+.subckt mux2_x1 cmd=$abc$109383$new_n43826_ i0=soc.ram.ram[3][13] i1=soc.ram.ram[7][13] q=$abc$109383$new_n47263_
 .subckt nand2_x0 i0=$abc$109383$new_n47263_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n47264_
 .subckt nand3_x0 i0=$abc$109383$new_n47264_ i1=$abc$109383$new_n47262_ i2=$abc$109383$new_n44642_ nq=$abc$109383$new_n47265_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[0][13] i1=soc.ram.ram[4][13] q=$abc$109383$new_n47266_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[1][13] i1=soc.ram.ram[5][13] q=$abc$109383$new_n47267_
-.subckt mx2_x2 cmd=$abc$109383$new_n44830_ i0=$abc$109383$new_n47267_ i1=$abc$109383$new_n47266_ q=$abc$109383$new_n47268_
-.subckt o2_x2 i0=$abc$109383$new_n47268_ i1=$abc$109383$new_n46527_ q=$abc$109383$new_n47269_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[0][13] i1=soc.ram.ram[4][13] q=$abc$109383$new_n47266_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[1][13] i1=soc.ram.ram[5][13] q=$abc$109383$new_n47267_
+.subckt mux2_x1 cmd=$abc$109383$new_n44830_ i0=$abc$109383$new_n47267_ i1=$abc$109383$new_n47266_ q=$abc$109383$new_n47268_
+.subckt or2_x1 i0=$abc$109383$new_n47268_ i1=$abc$109383$new_n46527_ q=$abc$109383$new_n47269_
 .subckt nand3_x0 i0=$abc$109383$new_n47269_ i1=$abc$109383$new_n47265_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n47270_
 .subckt nand3_x0 i0=$abc$109383$new_n47270_ i1=$abc$109383$new_n47260_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n47271_
-.subckt mx2_x2 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[14][13] i1=soc.ram.ram[15][13] q=$abc$109383$new_n47272_
-.subckt mx2_x2 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[10][13] i1=soc.ram.ram[11][13] q=$abc$109383$new_n47273_
-.subckt mx2_x2 cmd=$abc$109383$new_n44848_ i0=$abc$109383$new_n47273_ i1=$abc$109383$new_n47272_ q=$abc$109383$new_n47274_
-.subckt ao22_x2 i0=$abc$109383$new_n45015_ i1=$abc$109383$new_n47274_ i2=$abc$109383$new_n44114_ q=$abc$109383$new_n47275_
-.subckt mx2_x2 cmd=$abc$109383$new_n43747_ i0=soc.ram.ram[12][13] i1=soc.ram.ram[13][13] q=$abc$109383$new_n47276_
-.subckt mx2_x2 cmd=$abc$109383$new_n43747_ i0=soc.ram.ram[8][13] i1=soc.ram.ram[9][13] q=$abc$109383$new_n47277_
-.subckt mx2_x2 cmd=$abc$109383$new_n45452_ i0=$abc$109383$new_n47277_ i1=$abc$109383$new_n47276_ q=$abc$109383$new_n47278_
-.subckt ao22_x2 i0=$abc$109383$new_n43843_ i1=$abc$109383$new_n47278_ i2=$abc$109383$new_n47275_ q=$abc$109383$new_n47279_
-.subckt mx2_x2 cmd=$abc$109383$new_n44848_ i0=soc.ram.ram[24][13] i1=soc.ram.ram[28][13] q=$abc$109383$new_n47280_
+.subckt mux2_x1 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[14][13] i1=soc.ram.ram[15][13] q=$abc$109383$new_n47272_
+.subckt mux2_x1 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[10][13] i1=soc.ram.ram[11][13] q=$abc$109383$new_n47273_
+.subckt mux2_x1 cmd=$abc$109383$new_n44848_ i0=$abc$109383$new_n47273_ i1=$abc$109383$new_n47272_ q=$abc$109383$new_n47274_
+.subckt and21nor_x1 i0=$abc$109383$new_n45015_ i1=$abc$109383$new_n47274_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n47275_
+.subckt mux2_x1 cmd=$abc$109383$new_n43747_ i0=soc.ram.ram[12][13] i1=soc.ram.ram[13][13] q=$abc$109383$new_n47276_
+.subckt mux2_x1 cmd=$abc$109383$new_n43747_ i0=soc.ram.ram[8][13] i1=soc.ram.ram[9][13] q=$abc$109383$new_n47277_
+.subckt mux2_x1 cmd=$abc$109383$new_n45452_ i0=$abc$109383$new_n47277_ i1=$abc$109383$new_n47276_ q=$abc$109383$new_n47278_
+.subckt and21nor_x1 i0=$abc$109383$new_n43843_ i1=$abc$109383$new_n47278_ i2=$abc$109383$new_n47275_ nq=$abc$109383$new_n47279_
+.subckt mux2_x1 cmd=$abc$109383$new_n44848_ i0=soc.ram.ram[24][13] i1=soc.ram.ram[28][13] q=$abc$109383$new_n47280_
 .subckt nand2_x0 i0=$abc$109383$new_n47280_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n47281_
 .subckt inv_x0 i=soc.ram.ram[29][13] nq=$abc$109383$new_n47282_
 .subckt nand2_x0 i0=$abc$109383$new_n47282_ i1=$abc$109383$new_n44451_ nq=$abc$109383$new_n47283_
-.subckt ao22_x2 i0=soc.ram.ram[25][13] i1=$abc$109383$new_n43926_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n47284_
+.subckt and21nor_x1 i0=soc.ram.ram[25][13] i1=$abc$109383$new_n43926_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n47284_
 .subckt nand2_x0 i0=$abc$109383$new_n47284_ i1=$abc$109383$new_n47283_ nq=$abc$109383$new_n47285_
 .subckt nand3_x0 i0=$abc$109383$new_n47285_ i1=$abc$109383$new_n47281_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n47286_
-.subckt ao22_x2 i0=soc.ram.ram[27][13] i1=$abc$109383$new_n44118_ i2=$abc$109383$new_n43847_ q=$abc$109383$new_n47287_
-.subckt ao22_x2 i0=$abc$109383$new_n44421_ i1=soc.ram.ram[31][13] i2=$abc$109383$new_n47287_ q=$abc$109383$new_n47288_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[26][13] i1=soc.ram.ram[30][13] q=$abc$109383$new_n47289_
-.subckt oa22_x2 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n47289_ i2=$abc$109383$new_n44391_ q=$abc$109383$new_n47290_
-.subckt ao22_x2 i0=$abc$109383$new_n47290_ i1=$abc$109383$new_n47288_ i2=$abc$109383$new_n43467_ q=$abc$109383$new_n47291_
-.subckt oa22_x2 i0=$abc$109383$new_n47291_ i1=$abc$109383$new_n47286_ i2=$abc$109383$new_n44693_ q=$abc$109383$new_n47292_
-.subckt ao22_x2 i0=$abc$109383$new_n47292_ i1=$abc$109383$new_n47279_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n47293_
-.subckt a2_x2 i0=$abc$109383$new_n47293_ i1=$abc$109383$new_n47271_ q=$abc$109383$new_n47294_
-.subckt mx2_x2 cmd=$abc$109383$new_n46428_ i0=soc.ram.ram[34][13] i1=soc.ram.ram[38][13] q=$abc$109383$new_n47295_
+.subckt and21nor_x1 i0=soc.ram.ram[27][13] i1=$abc$109383$new_n44118_ i2=$abc$109383$new_n43847_ nq=$abc$109383$new_n47287_
+.subckt and21nor_x1 i0=$abc$109383$new_n44421_ i1=soc.ram.ram[31][13] i2=$abc$109383$new_n47287_ nq=$abc$109383$new_n47288_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[26][13] i1=soc.ram.ram[30][13] q=$abc$109383$new_n47289_
+.subckt or21nand_x1 i0=$abc$109383$new_n44103_ i1=$abc$109383$new_n47289_ i2=$abc$109383$new_n44391_ nq=$abc$109383$new_n47290_
+.subckt and21nor_x1 i0=$abc$109383$new_n47290_ i1=$abc$109383$new_n47288_ i2=$abc$109383$new_n43467_ nq=$abc$109383$new_n47291_
+.subckt or21nand_x1 i0=$abc$109383$new_n47291_ i1=$abc$109383$new_n47286_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n47292_
+.subckt and21nor_x1 i0=$abc$109383$new_n47292_ i1=$abc$109383$new_n47279_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n47293_
+.subckt and2_x1 i0=$abc$109383$new_n47293_ i1=$abc$109383$new_n47271_ q=$abc$109383$new_n47294_
+.subckt mux2_x1 cmd=$abc$109383$new_n46428_ i0=soc.ram.ram[34][13] i1=soc.ram.ram[38][13] q=$abc$109383$new_n47295_
 .subckt nand2_x0 i0=$abc$109383$new_n47295_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n47296_
 .subckt inv_x0 i=soc.ram.ram[39][13] nq=$abc$109383$new_n47297_
 .subckt nand2_x0 i0=$abc$109383$new_n47297_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n47298_
-.subckt ao22_x2 i0=soc.ram.ram[35][13] i1=$abc$109383$new_n44587_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n47299_
+.subckt and21nor_x1 i0=soc.ram.ram[35][13] i1=$abc$109383$new_n44587_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n47299_
 .subckt nand2_x0 i0=$abc$109383$new_n47299_ i1=$abc$109383$new_n47298_ nq=$abc$109383$new_n47300_
 .subckt nand3_x0 i0=$abc$109383$new_n47300_ i1=$abc$109383$new_n47296_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n47301_
-.subckt mx2_x2 cmd=$abc$109383$new_n46386_ i0=soc.ram.ram[32][13] i1=soc.ram.ram[36][13] q=$abc$109383$new_n47302_
+.subckt mux2_x1 cmd=$abc$109383$new_n46386_ i0=soc.ram.ram[32][13] i1=soc.ram.ram[36][13] q=$abc$109383$new_n47302_
 .subckt nand2_x0 i0=$abc$109383$new_n47302_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n47303_
 .subckt inv_x0 i=soc.ram.ram[37][13] nq=$abc$109383$new_n47304_
 .subckt nand2_x0 i0=$abc$109383$new_n47304_ i1=$abc$109383$new_n43955_ nq=$abc$109383$new_n47305_
-.subckt ao22_x2 i0=soc.ram.ram[33][13] i1=$abc$109383$new_n44592_ i2=$abc$109383$new_n46175_ q=$abc$109383$new_n47306_
+.subckt and21nor_x1 i0=soc.ram.ram[33][13] i1=$abc$109383$new_n44592_ i2=$abc$109383$new_n46175_ nq=$abc$109383$new_n47306_
 .subckt nand2_x0 i0=$abc$109383$new_n47306_ i1=$abc$109383$new_n47305_ nq=$abc$109383$new_n47307_
 .subckt nand3_x0 i0=$abc$109383$new_n47307_ i1=$abc$109383$new_n47303_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n47308_
 .subckt nand3_x0 i0=$abc$109383$new_n47308_ i1=$abc$109383$new_n47301_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n47309_
-.subckt mx2_x2 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[48][13] i1=soc.ram.ram[52][13] q=$abc$109383$new_n47310_
-.subckt oa22_x2 i0=$abc$109383$new_n43883_ i1=$abc$109383$new_n47310_ i2=$abc$109383$new_n44789_ q=$abc$109383$new_n47311_
-.subckt ao22_x2 i0=soc.ram.ram[49][13] i1=$abc$109383$new_n44818_ i2=$abc$109383$new_n46175_ q=$abc$109383$new_n47312_
+.subckt mux2_x1 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[48][13] i1=soc.ram.ram[52][13] q=$abc$109383$new_n47310_
+.subckt or21nand_x1 i0=$abc$109383$new_n43883_ i1=$abc$109383$new_n47310_ i2=$abc$109383$new_n44789_ nq=$abc$109383$new_n47311_
+.subckt and21nor_x1 i0=soc.ram.ram[49][13] i1=$abc$109383$new_n44818_ i2=$abc$109383$new_n46175_ nq=$abc$109383$new_n47312_
 .subckt inv_x0 i=soc.ram.ram[53][13] nq=$abc$109383$new_n47313_
 .subckt nand2_x0 i0=$abc$109383$new_n47313_ i1=$abc$109383$new_n43830_ nq=$abc$109383$new_n47314_
-.subckt oa22_x2 i0=$abc$109383$new_n47314_ i1=$abc$109383$new_n47312_ i2=$abc$109383$new_n47311_ q=$abc$109383$new_n47315_
-.subckt ao22_x2 i0=soc.ram.ram[51][13] i1=$abc$109383$new_n43686_ i2=$abc$109383$new_n43913_ q=$abc$109383$new_n47316_
-.subckt ao22_x2 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[55][13] i2=$abc$109383$new_n47316_ q=$abc$109383$new_n47317_
-.subckt mx2_x2 cmd=$abc$109383$new_n43484_ i0=soc.ram.ram[50][13] i1=soc.ram.ram[54][13] q=$abc$109383$new_n47318_
-.subckt a2_x2 i0=$abc$109383$new_n47318_ i1=$abc$109383$new_n44150_ q=$abc$109383$new_n47319_
-.subckt o2_x2 i0=$abc$109383$new_n47319_ i1=$abc$109383$new_n47317_ q=$abc$109383$new_n47320_
-.subckt ao22_x2 i0=$abc$109383$new_n44494_ i1=$abc$109383$new_n47320_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n47321_
+.subckt or21nand_x1 i0=$abc$109383$new_n47314_ i1=$abc$109383$new_n47312_ i2=$abc$109383$new_n47311_ nq=$abc$109383$new_n47315_
+.subckt and21nor_x1 i0=soc.ram.ram[51][13] i1=$abc$109383$new_n43686_ i2=$abc$109383$new_n43913_ nq=$abc$109383$new_n47316_
+.subckt and21nor_x1 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[55][13] i2=$abc$109383$new_n47316_ nq=$abc$109383$new_n47317_
+.subckt mux2_x1 cmd=$abc$109383$new_n43484_ i0=soc.ram.ram[50][13] i1=soc.ram.ram[54][13] q=$abc$109383$new_n47318_
+.subckt and2_x1 i0=$abc$109383$new_n47318_ i1=$abc$109383$new_n44150_ q=$abc$109383$new_n47319_
+.subckt or2_x1 i0=$abc$109383$new_n47319_ i1=$abc$109383$new_n47317_ q=$abc$109383$new_n47320_
+.subckt and21nor_x1 i0=$abc$109383$new_n44494_ i1=$abc$109383$new_n47320_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n47321_
 .subckt nand2_x0 i0=$abc$109383$new_n47321_ i1=$abc$109383$new_n47315_ nq=$abc$109383$new_n47322_
 .subckt nand3_x0 i0=$abc$109383$new_n47322_ i1=$abc$109383$new_n47309_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n47323_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[42][13] i1=soc.ram.ram[46][13] q=$abc$109383$new_n47324_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[43][13] i1=soc.ram.ram[47][13] q=$abc$109383$new_n47325_
-.subckt mx2_x2 cmd=$abc$109383$new_n43456_ i0=$abc$109383$new_n47325_ i1=$abc$109383$new_n47324_ q=$abc$109383$new_n47326_
-.subckt o2_x2 i0=$abc$109383$new_n47326_ i1=$abc$109383$new_n43449_ q=$abc$109383$new_n47327_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[40][13] i1=soc.ram.ram[44][13] q=$abc$109383$new_n47328_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[41][13] i1=soc.ram.ram[45][13] q=$abc$109383$new_n47329_
-.subckt mx2_x2 cmd=$abc$109383$new_n43549_ i0=$abc$109383$new_n47329_ i1=$abc$109383$new_n47328_ q=$abc$109383$new_n47330_
-.subckt ao22_x2 i0=$abc$109383$new_n44212_ i1=$abc$109383$new_n47330_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n47331_
-.subckt a2_x2 i0=$abc$109383$new_n47331_ i1=$abc$109383$new_n47327_ q=$abc$109383$new_n47332_
-.subckt ao22_x2 i0=soc.ram.ram[57][13] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n47333_
-.subckt ao22_x2 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[61][13] i2=$abc$109383$new_n47333_ q=$abc$109383$new_n47334_
-.subckt mx2_x2 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[56][13] i1=soc.ram.ram[60][13] q=$abc$109383$new_n47335_
-.subckt oa22_x2 i0=$abc$109383$new_n43813_ i1=$abc$109383$new_n47335_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n47336_
-.subckt ao22_x2 i0=$abc$109383$new_n47336_ i1=$abc$109383$new_n47334_ i2=$abc$109383$new_n43729_ q=$abc$109383$new_n47337_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[58][13] i1=soc.ram.ram[62][13] q=$abc$109383$new_n47338_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[42][13] i1=soc.ram.ram[46][13] q=$abc$109383$new_n47324_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[43][13] i1=soc.ram.ram[47][13] q=$abc$109383$new_n47325_
+.subckt mux2_x1 cmd=$abc$109383$new_n43456_ i0=$abc$109383$new_n47325_ i1=$abc$109383$new_n47324_ q=$abc$109383$new_n47326_
+.subckt or2_x1 i0=$abc$109383$new_n47326_ i1=$abc$109383$new_n43449_ q=$abc$109383$new_n47327_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[40][13] i1=soc.ram.ram[44][13] q=$abc$109383$new_n47328_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[41][13] i1=soc.ram.ram[45][13] q=$abc$109383$new_n47329_
+.subckt mux2_x1 cmd=$abc$109383$new_n43549_ i0=$abc$109383$new_n47329_ i1=$abc$109383$new_n47328_ q=$abc$109383$new_n47330_
+.subckt and21nor_x1 i0=$abc$109383$new_n44212_ i1=$abc$109383$new_n47330_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n47331_
+.subckt and2_x1 i0=$abc$109383$new_n47331_ i1=$abc$109383$new_n47327_ q=$abc$109383$new_n47332_
+.subckt and21nor_x1 i0=soc.ram.ram[57][13] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n47333_
+.subckt and21nor_x1 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[61][13] i2=$abc$109383$new_n47333_ nq=$abc$109383$new_n47334_
+.subckt mux2_x1 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[56][13] i1=soc.ram.ram[60][13] q=$abc$109383$new_n47335_
+.subckt or21nand_x1 i0=$abc$109383$new_n43813_ i1=$abc$109383$new_n47335_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n47336_
+.subckt and21nor_x1 i0=$abc$109383$new_n47336_ i1=$abc$109383$new_n47334_ i2=$abc$109383$new_n43729_ nq=$abc$109383$new_n47337_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[58][13] i1=soc.ram.ram[62][13] q=$abc$109383$new_n47338_
 .subckt nand2_x0 i0=$abc$109383$new_n47338_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n47339_
 .subckt inv_x0 i=soc.ram.ram[63][13] nq=$abc$109383$new_n47340_
-.subckt a2_x2 i0=$abc$109383$new_n47340_ i1=$abc$109383$new_n44146_ q=$abc$109383$new_n47341_
-.subckt o2_x2 i0=soc.ram.ram[59][13] i1=$abc$109383$new_n44191_ q=$abc$109383$new_n47342_
+.subckt and2_x1 i0=$abc$109383$new_n47340_ i1=$abc$109383$new_n44146_ q=$abc$109383$new_n47341_
+.subckt or2_x1 i0=soc.ram.ram[59][13] i1=$abc$109383$new_n44191_ q=$abc$109383$new_n47342_
 .subckt nand2_x0 i0=$abc$109383$new_n47342_ i1=$abc$109383$new_n45455_ nq=$abc$109383$new_n47343_
-.subckt ao22_x2 i0=$abc$109383$new_n47343_ i1=$abc$109383$new_n47341_ i2=$abc$109383$new_n47339_ q=$abc$109383$new_n47344_
+.subckt and21nor_x1 i0=$abc$109383$new_n47343_ i1=$abc$109383$new_n47341_ i2=$abc$109383$new_n47339_ nq=$abc$109383$new_n47344_
 .subckt nand2_x0 i0=$abc$109383$new_n47344_ i1=$abc$109383$new_n46119_ nq=$abc$109383$new_n47345_
-.subckt oa22_x2 i0=$abc$109383$new_n47345_ i1=$abc$109383$new_n47337_ i2=$abc$109383$new_n47332_ q=$abc$109383$new_n47346_
-.subckt ao22_x2 i0=$abc$109383$new_n44087_ i1=$abc$109383$new_n47346_ i2=$abc$109383$new_n43900_ q=$abc$109383$new_n47347_
-.subckt a2_x2 i0=$abc$109383$new_n47347_ i1=$abc$109383$new_n47323_ q=$abc$109383$new_n47348_
-.subckt o3_x2 i0=$abc$109383$new_n47348_ i1=$abc$109383$new_n47294_ i2=$abc$109383$new_n44040_ q=$abc$109383$new_n47349_
-.subckt mx2_x2 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[90][13] i1=soc.ram.ram[94][13] q=$abc$109383$new_n47350_
+.subckt or21nand_x1 i0=$abc$109383$new_n47345_ i1=$abc$109383$new_n47337_ i2=$abc$109383$new_n47332_ nq=$abc$109383$new_n47346_
+.subckt and21nor_x1 i0=$abc$109383$new_n44087_ i1=$abc$109383$new_n47346_ i2=$abc$109383$new_n43900_ nq=$abc$109383$new_n47347_
+.subckt and2_x1 i0=$abc$109383$new_n47347_ i1=$abc$109383$new_n47323_ q=$abc$109383$new_n47348_
+.subckt or3_x1 i0=$abc$109383$new_n47348_ i1=$abc$109383$new_n47294_ i2=$abc$109383$new_n44040_ q=$abc$109383$new_n47349_
+.subckt mux2_x1 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[90][13] i1=soc.ram.ram[94][13] q=$abc$109383$new_n47350_
 .subckt nand2_x0 i0=$abc$109383$new_n47350_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n47351_
 .subckt inv_x0 i=soc.ram.ram[95][13] nq=$abc$109383$new_n47352_
-.subckt a2_x2 i0=$abc$109383$new_n47352_ i1=$abc$109383$new_n43830_ q=$abc$109383$new_n47353_
-.subckt o2_x2 i0=soc.ram.ram[91][13] i1=$abc$109383$new_n44600_ q=$abc$109383$new_n47354_
+.subckt and2_x1 i0=$abc$109383$new_n47352_ i1=$abc$109383$new_n43830_ q=$abc$109383$new_n47353_
+.subckt or2_x1 i0=soc.ram.ram[91][13] i1=$abc$109383$new_n44600_ q=$abc$109383$new_n47354_
 .subckt nand2_x0 i0=$abc$109383$new_n47354_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n47355_
-.subckt ao22_x2 i0=$abc$109383$new_n47355_ i1=$abc$109383$new_n47353_ i2=$abc$109383$new_n47351_ q=$abc$109383$new_n47356_
+.subckt and21nor_x1 i0=$abc$109383$new_n47355_ i1=$abc$109383$new_n47353_ i2=$abc$109383$new_n47351_ nq=$abc$109383$new_n47356_
 .subckt nand2_x0 i0=$abc$109383$new_n47356_ i1=$abc$109383$new_n43950_ nq=$abc$109383$new_n47357_
-.subckt ao22_x2 i0=soc.ram.ram[89][13] i1=$abc$109383$new_n45452_ i2=$abc$109383$new_n45405_ q=$abc$109383$new_n47358_
-.subckt ao22_x2 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[93][13] i2=$abc$109383$new_n47358_ q=$abc$109383$new_n47359_
-.subckt mx2_x2 cmd=$abc$109383$new_n46187_ i0=soc.ram.ram[88][13] i1=soc.ram.ram[92][13] q=$abc$109383$new_n47360_
-.subckt oa22_x2 i0=$abc$109383$new_n44031_ i1=$abc$109383$new_n47360_ i2=$abc$109383$new_n44030_ q=$abc$109383$new_n47361_
-.subckt ao22_x2 i0=$abc$109383$new_n47361_ i1=$abc$109383$new_n47359_ i2=$abc$109383$new_n43769_ q=$abc$109383$new_n47362_
+.subckt and21nor_x1 i0=soc.ram.ram[89][13] i1=$abc$109383$new_n45452_ i2=$abc$109383$new_n45405_ nq=$abc$109383$new_n47358_
+.subckt and21nor_x1 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[93][13] i2=$abc$109383$new_n47358_ nq=$abc$109383$new_n47359_
+.subckt mux2_x1 cmd=$abc$109383$new_n46187_ i0=soc.ram.ram[88][13] i1=soc.ram.ram[92][13] q=$abc$109383$new_n47360_
+.subckt or21nand_x1 i0=$abc$109383$new_n44031_ i1=$abc$109383$new_n47360_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n47361_
+.subckt and21nor_x1 i0=$abc$109383$new_n47361_ i1=$abc$109383$new_n47359_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n47362_
 .subckt nand2_x0 i0=$abc$109383$new_n47362_ i1=$abc$109383$new_n47357_ nq=$abc$109383$new_n47363_
-.subckt mx2_x2 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[82][13] i1=soc.ram.ram[86][13] q=$abc$109383$new_n47364_
-.subckt mx2_x2 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[83][13] i1=soc.ram.ram[87][13] q=$abc$109383$new_n47365_
-.subckt mx2_x2 cmd=$abc$109383$new_n45448_ i0=$abc$109383$new_n47365_ i1=$abc$109383$new_n47364_ q=$abc$109383$new_n47366_
+.subckt mux2_x1 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[82][13] i1=soc.ram.ram[86][13] q=$abc$109383$new_n47364_
+.subckt mux2_x1 cmd=$abc$109383$new_n44207_ i0=soc.ram.ram[83][13] i1=soc.ram.ram[87][13] q=$abc$109383$new_n47365_
+.subckt mux2_x1 cmd=$abc$109383$new_n45448_ i0=$abc$109383$new_n47365_ i1=$abc$109383$new_n47364_ q=$abc$109383$new_n47366_
 .subckt nor2_x0 i0=$abc$109383$new_n47366_ i1=$abc$109383$new_n43912_ nq=$abc$109383$new_n47367_
-.subckt mx2_x2 cmd=$abc$109383$new_n44405_ i0=soc.ram.ram[80][13] i1=soc.ram.ram[84][13] q=$abc$109383$new_n47368_
-.subckt a2_x2 i0=$abc$109383$new_n47368_ i1=$abc$109383$new_n44031_ q=$abc$109383$new_n47369_
-.subckt ao22_x2 i0=soc.ram.ram[81][13] i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n47370_
-.subckt ao22_x2 i0=$abc$109383$new_n43931_ i1=soc.ram.ram[85][13] i2=$abc$109383$new_n47370_ q=$abc$109383$new_n47371_
+.subckt mux2_x1 cmd=$abc$109383$new_n44405_ i0=soc.ram.ram[80][13] i1=soc.ram.ram[84][13] q=$abc$109383$new_n47368_
+.subckt and2_x1 i0=$abc$109383$new_n47368_ i1=$abc$109383$new_n44031_ q=$abc$109383$new_n47369_
+.subckt and21nor_x1 i0=soc.ram.ram[81][13] i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n47370_
+.subckt and21nor_x1 i0=$abc$109383$new_n43931_ i1=soc.ram.ram[85][13] i2=$abc$109383$new_n47370_ nq=$abc$109383$new_n47371_
 .subckt nor3_x0 i0=$abc$109383$new_n47371_ i1=$abc$109383$new_n47369_ i2=$abc$109383$new_n46527_ nq=$abc$109383$new_n47372_
-.subckt o3_x2 i0=$abc$109383$new_n47372_ i1=$abc$109383$new_n47367_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n47373_
-.subckt a3_x2 i0=$abc$109383$new_n47373_ i1=$abc$109383$new_n47363_ i2=$abc$109383$new_n43841_ q=$abc$109383$new_n47374_
-.subckt mx2_x2 cmd=$abc$109383$new_n43851_ i0=soc.ram.ram[74][13] i1=soc.ram.ram[78][13] q=$abc$109383$new_n47375_
+.subckt or3_x1 i0=$abc$109383$new_n47372_ i1=$abc$109383$new_n47367_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n47373_
+.subckt and3_x1 i0=$abc$109383$new_n47373_ i1=$abc$109383$new_n47363_ i2=$abc$109383$new_n43841_ q=$abc$109383$new_n47374_
+.subckt mux2_x1 cmd=$abc$109383$new_n43851_ i0=soc.ram.ram[74][13] i1=soc.ram.ram[78][13] q=$abc$109383$new_n47375_
 .subckt nand2_x0 i0=$abc$109383$new_n47375_ i1=$abc$109383$new_n43943_ nq=$abc$109383$new_n47376_
 .subckt inv_x0 i=soc.ram.ram[79][13] nq=$abc$109383$new_n47377_
-.subckt a2_x2 i0=$abc$109383$new_n47377_ i1=$abc$109383$new_n46323_ q=$abc$109383$new_n47378_
-.subckt o2_x2 i0=soc.ram.ram[75][13] i1=$abc$109383$new_n44924_ q=$abc$109383$new_n47379_
+.subckt and2_x1 i0=$abc$109383$new_n47377_ i1=$abc$109383$new_n46323_ q=$abc$109383$new_n47378_
+.subckt or2_x1 i0=soc.ram.ram[75][13] i1=$abc$109383$new_n44924_ q=$abc$109383$new_n47379_
 .subckt nand2_x0 i0=$abc$109383$new_n47379_ i1=$abc$109383$new_n44627_ nq=$abc$109383$new_n47380_
-.subckt ao22_x2 i0=$abc$109383$new_n47380_ i1=$abc$109383$new_n47378_ i2=$abc$109383$new_n47376_ q=$abc$109383$new_n47381_
+.subckt and21nor_x1 i0=$abc$109383$new_n47380_ i1=$abc$109383$new_n47378_ i2=$abc$109383$new_n47376_ nq=$abc$109383$new_n47381_
 .subckt nand2_x0 i0=$abc$109383$new_n47381_ i1=$abc$109383$new_n44642_ nq=$abc$109383$new_n47382_
-.subckt mx2_x2 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[72][13] i1=soc.ram.ram[76][13] q=$abc$109383$new_n47383_
-.subckt oa22_x2 i0=$abc$109383$new_n45448_ i1=$abc$109383$new_n47383_ i2=$abc$109383$new_n44905_ q=$abc$109383$new_n47384_
-.subckt ao22_x2 i0=soc.ram.ram[73][13] i1=$abc$109383$new_n44592_ i2=$abc$109383$new_n46175_ q=$abc$109383$new_n47385_
+.subckt mux2_x1 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[72][13] i1=soc.ram.ram[76][13] q=$abc$109383$new_n47383_
+.subckt or21nand_x1 i0=$abc$109383$new_n45448_ i1=$abc$109383$new_n47383_ i2=$abc$109383$new_n44905_ nq=$abc$109383$new_n47384_
+.subckt and21nor_x1 i0=soc.ram.ram[73][13] i1=$abc$109383$new_n44592_ i2=$abc$109383$new_n46175_ nq=$abc$109383$new_n47385_
 .subckt inv_x0 i=soc.ram.ram[77][13] nq=$abc$109383$new_n47386_
 .subckt nand2_x0 i0=$abc$109383$new_n47386_ i1=$abc$109383$new_n44927_ nq=$abc$109383$new_n47387_
-.subckt oa22_x2 i0=$abc$109383$new_n47387_ i1=$abc$109383$new_n47385_ i2=$abc$109383$new_n47384_ q=$abc$109383$new_n47388_
+.subckt or21nand_x1 i0=$abc$109383$new_n47387_ i1=$abc$109383$new_n47385_ i2=$abc$109383$new_n47384_ nq=$abc$109383$new_n47388_
 .subckt nand3_x0 i0=$abc$109383$new_n47388_ i1=$abc$109383$new_n47382_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n47389_
-.subckt mx2_x2 cmd=$abc$109383$new_n43829_ i0=soc.ram.ram[66][13] i1=soc.ram.ram[70][13] q=$abc$109383$new_n47390_
+.subckt mux2_x1 cmd=$abc$109383$new_n43829_ i0=soc.ram.ram[66][13] i1=soc.ram.ram[70][13] q=$abc$109383$new_n47390_
 .subckt nand2_x0 i0=$abc$109383$new_n47390_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n47391_
-.subckt mx2_x2 cmd=$abc$109383$new_n44809_ i0=soc.ram.ram[67][13] i1=soc.ram.ram[71][13] q=$abc$109383$new_n47392_
+.subckt mux2_x1 cmd=$abc$109383$new_n44809_ i0=soc.ram.ram[67][13] i1=soc.ram.ram[71][13] q=$abc$109383$new_n47392_
 .subckt nand2_x0 i0=$abc$109383$new_n47392_ i1=$abc$109383$new_n44725_ nq=$abc$109383$new_n47393_
 .subckt nand3_x0 i0=$abc$109383$new_n47393_ i1=$abc$109383$new_n47391_ i2=$abc$109383$new_n46527_ nq=$abc$109383$new_n47394_
-.subckt mx2_x2 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[64][13] i1=soc.ram.ram[68][13] q=$abc$109383$new_n47395_
-.subckt mx2_x2 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[65][13] i1=soc.ram.ram[69][13] q=$abc$109383$new_n47396_
-.subckt mx2_x2 cmd=$abc$109383$new_n43508_ i0=$abc$109383$new_n47396_ i1=$abc$109383$new_n47395_ q=$abc$109383$new_n47397_
-.subckt ao22_x2 i0=$abc$109383$new_n45320_ i1=$abc$109383$new_n47397_ i2=$abc$109383$new_n44449_ q=$abc$109383$new_n47398_
+.subckt mux2_x1 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[64][13] i1=soc.ram.ram[68][13] q=$abc$109383$new_n47395_
+.subckt mux2_x1 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[65][13] i1=soc.ram.ram[69][13] q=$abc$109383$new_n47396_
+.subckt mux2_x1 cmd=$abc$109383$new_n43508_ i0=$abc$109383$new_n47396_ i1=$abc$109383$new_n47395_ q=$abc$109383$new_n47397_
+.subckt and21nor_x1 i0=$abc$109383$new_n45320_ i1=$abc$109383$new_n47397_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n47398_
 .subckt nand2_x0 i0=$abc$109383$new_n47398_ i1=$abc$109383$new_n47394_ nq=$abc$109383$new_n47399_
-.subckt a2_x2 i0=$abc$109383$new_n47399_ i1=$abc$109383$new_n43413_ q=$abc$109383$new_n47400_
-.subckt oa22_x2 i0=$abc$109383$new_n47400_ i1=$abc$109383$new_n47389_ i2=$abc$109383$new_n43592_ q=$abc$109383$new_n47401_
-.subckt o2_x2 i0=$abc$109383$new_n47401_ i1=$abc$109383$new_n47374_ q=$abc$109383$new_n47402_
-.subckt mx2_x2 cmd=$abc$109383$new_n44613_ i0=soc.ram.ram[98][13] i1=soc.ram.ram[102][13] q=$abc$109383$new_n47403_
+.subckt and2_x1 i0=$abc$109383$new_n47399_ i1=$abc$109383$new_n43413_ q=$abc$109383$new_n47400_
+.subckt or21nand_x1 i0=$abc$109383$new_n47400_ i1=$abc$109383$new_n47389_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n47401_
+.subckt or2_x1 i0=$abc$109383$new_n47401_ i1=$abc$109383$new_n47374_ q=$abc$109383$new_n47402_
+.subckt mux2_x1 cmd=$abc$109383$new_n44613_ i0=soc.ram.ram[98][13] i1=soc.ram.ram[102][13] q=$abc$109383$new_n47403_
 .subckt nand2_x0 i0=$abc$109383$new_n47403_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n47404_
 .subckt buf_x4 i=$abc$109383$new_n43955_ q=$abc$109383$new_n47405_
 .subckt inv_x0 i=soc.ram.ram[103][13] nq=$abc$109383$new_n47406_
 .subckt nand2_x0 i0=$abc$109383$new_n47406_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n47407_
-.subckt ao22_x2 i0=soc.ram.ram[99][13] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n47408_
+.subckt and21nor_x1 i0=soc.ram.ram[99][13] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n47408_
 .subckt nand2_x0 i0=$abc$109383$new_n47408_ i1=$abc$109383$new_n47407_ nq=$abc$109383$new_n47409_
 .subckt nand3_x0 i0=$abc$109383$new_n47409_ i1=$abc$109383$new_n47404_ i2=$abc$109383$new_n43950_ nq=$abc$109383$new_n47410_
 .subckt buf_x4 i=$abc$109383$new_n44494_ q=$abc$109383$new_n47411_
-.subckt mx2_x2 cmd=$abc$109383$new_n44666_ i0=soc.ram.ram[96][13] i1=soc.ram.ram[100][13] q=$abc$109383$new_n47412_
+.subckt mux2_x1 cmd=$abc$109383$new_n44666_ i0=soc.ram.ram[96][13] i1=soc.ram.ram[100][13] q=$abc$109383$new_n47412_
 .subckt nand2_x0 i0=$abc$109383$new_n47412_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n47413_
 .subckt inv_x0 i=soc.ram.ram[101][13] nq=$abc$109383$new_n47414_
 .subckt nand2_x0 i0=$abc$109383$new_n47414_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n47415_
-.subckt ao22_x2 i0=soc.ram.ram[97][13] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n44603_ q=$abc$109383$new_n47416_
+.subckt and21nor_x1 i0=soc.ram.ram[97][13] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n44603_ nq=$abc$109383$new_n47416_
 .subckt nand2_x0 i0=$abc$109383$new_n47416_ i1=$abc$109383$new_n47415_ nq=$abc$109383$new_n47417_
 .subckt nand3_x0 i0=$abc$109383$new_n47417_ i1=$abc$109383$new_n47413_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n47418_
 .subckt nand3_x0 i0=$abc$109383$new_n47418_ i1=$abc$109383$new_n47410_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n47419_
 .subckt inv_x0 i=soc.ram.ram[109][13] nq=$abc$109383$new_n47420_
 .subckt nand2_x0 i0=$abc$109383$new_n47420_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n47421_
-.subckt ao22_x2 i0=soc.ram.ram[105][13] i1=$abc$109383$new_n43958_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n47422_
+.subckt and21nor_x1 i0=soc.ram.ram[105][13] i1=$abc$109383$new_n43958_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n47422_
 .subckt nand2_x0 i0=$abc$109383$new_n47422_ i1=$abc$109383$new_n47421_ nq=$abc$109383$new_n47423_
-.subckt mx2_x2 cmd=$abc$109383$new_n43852_ i0=soc.ram.ram[104][13] i1=soc.ram.ram[108][13] q=$abc$109383$new_n47424_
+.subckt mux2_x1 cmd=$abc$109383$new_n43852_ i0=soc.ram.ram[104][13] i1=soc.ram.ram[108][13] q=$abc$109383$new_n47424_
 .subckt nand2_x0 i0=$abc$109383$new_n47424_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n47425_
-.subckt a2_x2 i0=$abc$109383$new_n47425_ i1=$abc$109383$new_n47411_ q=$abc$109383$new_n47426_
+.subckt and2_x1 i0=$abc$109383$new_n47425_ i1=$abc$109383$new_n47411_ q=$abc$109383$new_n47426_
 .subckt nand2_x0 i0=$abc$109383$new_n47426_ i1=$abc$109383$new_n47423_ nq=$abc$109383$new_n47427_
-.subckt mx2_x2 cmd=$abc$109383$new_n43955_ i0=soc.ram.ram[106][13] i1=soc.ram.ram[110][13] q=$abc$109383$new_n47428_
+.subckt mux2_x1 cmd=$abc$109383$new_n43955_ i0=soc.ram.ram[106][13] i1=soc.ram.ram[110][13] q=$abc$109383$new_n47428_
 .subckt nand2_x0 i0=$abc$109383$new_n47428_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n47429_
 .subckt inv_x0 i=soc.ram.ram[111][13] nq=$abc$109383$new_n47430_
 .subckt nand2_x0 i0=$abc$109383$new_n47430_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n47431_
-.subckt ao22_x2 i0=soc.ram.ram[107][13] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n43964_ q=$abc$109383$new_n47432_
+.subckt and21nor_x1 i0=soc.ram.ram[107][13] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n43964_ nq=$abc$109383$new_n47432_
 .subckt nand2_x0 i0=$abc$109383$new_n47432_ i1=$abc$109383$new_n47431_ nq=$abc$109383$new_n47433_
 .subckt nand3_x0 i0=$abc$109383$new_n47433_ i1=$abc$109383$new_n47429_ i2=$abc$109383$new_n43950_ nq=$abc$109383$new_n47434_
 .subckt nand3_x0 i0=$abc$109383$new_n47434_ i1=$abc$109383$new_n47427_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n47435_
 .subckt nand3_x0 i0=$abc$109383$new_n47435_ i1=$abc$109383$new_n47419_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n47436_
 .subckt inv_x0 i=soc.ram.ram[119][13] nq=$abc$109383$new_n47437_
 .subckt nand2_x0 i0=$abc$109383$new_n47437_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n47438_
-.subckt ao22_x2 i0=soc.ram.ram[115][13] i1=$abc$109383$new_n43958_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n47439_
+.subckt and21nor_x1 i0=soc.ram.ram[115][13] i1=$abc$109383$new_n43958_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n47439_
 .subckt nand2_x0 i0=$abc$109383$new_n47439_ i1=$abc$109383$new_n47438_ nq=$abc$109383$new_n47440_
 .subckt inv_x0 i=soc.ram.ram[114][13] nq=$abc$109383$new_n47441_
 .subckt inv_x0 i=soc.ram.ram[118][13] nq=$abc$109383$new_n47442_
-.subckt mx2_x2 cmd=$abc$109383$new_n43806_ i0=$abc$109383$new_n47442_ i1=$abc$109383$new_n47441_ q=$abc$109383$new_n47443_
-.subckt ao22_x2 i0=$abc$109383$new_n44591_ i1=$abc$109383$new_n47443_ i2=$abc$109383$new_n43844_ q=$abc$109383$new_n47444_
+.subckt mux2_x1 cmd=$abc$109383$new_n43806_ i0=$abc$109383$new_n47442_ i1=$abc$109383$new_n47441_ q=$abc$109383$new_n47443_
+.subckt and21nor_x1 i0=$abc$109383$new_n44591_ i1=$abc$109383$new_n47443_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n47444_
 .subckt nand2_x0 i0=$abc$109383$new_n47444_ i1=$abc$109383$new_n47440_ nq=$abc$109383$new_n47445_
-.subckt mx2_x2 cmd=$abc$109383$new_n44613_ i0=soc.ram.ram[112][13] i1=soc.ram.ram[116][13] q=$abc$109383$new_n47446_
+.subckt mux2_x1 cmd=$abc$109383$new_n44613_ i0=soc.ram.ram[112][13] i1=soc.ram.ram[116][13] q=$abc$109383$new_n47446_
 .subckt nand2_x0 i0=$abc$109383$new_n47446_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n47447_
 .subckt inv_x0 i=soc.ram.ram[117][13] nq=$abc$109383$new_n47448_
 .subckt nand2_x0 i0=$abc$109383$new_n47448_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n47449_
-.subckt ao22_x2 i0=soc.ram.ram[113][13] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n47450_
+.subckt and21nor_x1 i0=soc.ram.ram[113][13] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n47450_
 .subckt nand2_x0 i0=$abc$109383$new_n47450_ i1=$abc$109383$new_n47449_ nq=$abc$109383$new_n47451_
 .subckt nand3_x0 i0=$abc$109383$new_n47451_ i1=$abc$109383$new_n47447_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n47452_
 .subckt nand3_x0 i0=$abc$109383$new_n47452_ i1=$abc$109383$new_n47445_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n47453_
-.subckt mx2_x2 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[120][13] i1=soc.ram.ram[124][13] q=$abc$109383$new_n47454_
+.subckt mux2_x1 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[120][13] i1=soc.ram.ram[124][13] q=$abc$109383$new_n47454_
 .subckt nand2_x0 i0=$abc$109383$new_n47454_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n47455_
 .subckt inv_x0 i=soc.ram.ram[125][13] nq=$abc$109383$new_n47456_
 .subckt nand2_x0 i0=$abc$109383$new_n47456_ i1=$abc$109383$new_n43986_ nq=$abc$109383$new_n47457_
-.subckt ao22_x2 i0=soc.ram.ram[121][13] i1=$abc$109383$new_n43852_ i2=$abc$109383$new_n44725_ q=$abc$109383$new_n47458_
+.subckt and21nor_x1 i0=soc.ram.ram[121][13] i1=$abc$109383$new_n43852_ i2=$abc$109383$new_n44725_ nq=$abc$109383$new_n47458_
 .subckt nand2_x0 i0=$abc$109383$new_n47458_ i1=$abc$109383$new_n47457_ nq=$abc$109383$new_n47459_
-.subckt a3_x2 i0=$abc$109383$new_n47459_ i1=$abc$109383$new_n47455_ i2=$abc$109383$new_n44657_ q=$abc$109383$new_n47460_
+.subckt and3_x1 i0=$abc$109383$new_n47459_ i1=$abc$109383$new_n47455_ i2=$abc$109383$new_n44657_ q=$abc$109383$new_n47460_
 .subckt inv_x0 i=soc.ram.ram[127][13] nq=$abc$109383$new_n47461_
 .subckt nand2_x0 i0=$abc$109383$new_n47461_ i1=$abc$109383$new_n43955_ nq=$abc$109383$new_n47462_
-.subckt ao22_x2 i0=soc.ram.ram[123][13] i1=$abc$109383$new_n44592_ i2=$abc$109383$new_n46175_ q=$abc$109383$new_n47463_
+.subckt and21nor_x1 i0=soc.ram.ram[123][13] i1=$abc$109383$new_n44592_ i2=$abc$109383$new_n46175_ nq=$abc$109383$new_n47463_
 .subckt nand2_x0 i0=$abc$109383$new_n47463_ i1=$abc$109383$new_n47462_ nq=$abc$109383$new_n47464_
-.subckt mx2_x2 cmd=$abc$109383$new_n45082_ i0=soc.ram.ram[122][13] i1=soc.ram.ram[126][13] q=$abc$109383$new_n47465_
+.subckt mux2_x1 cmd=$abc$109383$new_n45082_ i0=soc.ram.ram[122][13] i1=soc.ram.ram[126][13] q=$abc$109383$new_n47465_
 .subckt nand2_x0 i0=$abc$109383$new_n47465_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n47466_
-.subckt a2_x2 i0=$abc$109383$new_n47466_ i1=$abc$109383$new_n45428_ q=$abc$109383$new_n47467_
-.subckt oa22_x2 i0=$abc$109383$new_n47467_ i1=$abc$109383$new_n47464_ i2=$abc$109383$new_n43839_ q=$abc$109383$new_n47468_
-.subckt ao22_x2 i0=$abc$109383$new_n47468_ i1=$abc$109383$new_n47460_ i2=$abc$109383$new_n43841_ q=$abc$109383$new_n47469_
+.subckt and2_x1 i0=$abc$109383$new_n47466_ i1=$abc$109383$new_n45428_ q=$abc$109383$new_n47467_
+.subckt or21nand_x1 i0=$abc$109383$new_n47467_ i1=$abc$109383$new_n47464_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n47468_
+.subckt and21nor_x1 i0=$abc$109383$new_n47468_ i1=$abc$109383$new_n47460_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n47469_
 .subckt nand2_x0 i0=$abc$109383$new_n47469_ i1=$abc$109383$new_n47453_ nq=$abc$109383$new_n47470_
 .subckt nand3_x0 i0=$abc$109383$new_n47470_ i1=$abc$109383$new_n47436_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n47471_
 .subckt nand3_x0 i0=$abc$109383$new_n47471_ i1=$abc$109383$new_n47402_ i2=$abc$109383$new_n44040_ nq=$abc$109383$new_n47472_
@@ -32750,4851 +32750,4851 @@
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[13] nq=$abc$109383$new_n47476_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[13] nq=$abc$109383$new_n47477_
 .subckt inv_x0 i=soc.hyperram.sr[13] nq=$abc$109383$new_n47478_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n47478_ q=$abc$109383$new_n47479_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n47478_ q=$abc$109383$new_n47479_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[13] nq=$abc$109383$new_n47480_
 .subckt nor2_x0 i0=$abc$109383$new_n19692_ i1=$abc$109383$new_n47480_ nq=$abc$109383$new_n47481_
 .subckt nand4_x0 i0=$abc$109383$new_n47481_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n47482_
-.subckt a3_x2 i0=$abc$109383$new_n47482_ i1=$abc$109383$new_n47479_ i2=$abc$109383$new_n47477_ q=$abc$109383$new_n47483_
-.subckt a4_x2 i0=$abc$109383$new_n47483_ i1=$abc$109383$new_n47476_ i2=$abc$109383$new_n47475_ i3=$abc$109383$new_n47474_ q=$abc$109383$new_n47484_
+.subckt and3_x1 i0=$abc$109383$new_n47482_ i1=$abc$109383$new_n47479_ i2=$abc$109383$new_n47477_ q=$abc$109383$new_n47483_
+.subckt and4_x1 i0=$abc$109383$new_n47483_ i1=$abc$109383$new_n47476_ i2=$abc$109383$new_n47475_ i3=$abc$109383$new_n47474_ q=$abc$109383$new_n47484_
 .subckt nand3_x0 i0=$abc$109383$new_n47484_ i1=$abc$109383$new_n47473_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n47485_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[13] q=$abc$109383$new_n47486_
-.subckt a2_x2 i0=$abc$109383$new_n47486_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n47487_
-.subckt a2_x2 i0=$abc$109383$new_n47487_ i1=$abc$109383$new_n47485_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103250
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[14] q=$abc$109383$new_n47489_
-.subckt a2_x2 i0=$abc$109383$new_n47489_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47490_
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[13] nq=$abc$109383$new_n47486_
+.subckt and2_x1 i0=$abc$109383$new_n47486_ i1=$abc$109383$new_n28649_ q=$abc$109383$new_n47487_
+.subckt and2_x1 i0=$abc$109383$new_n47487_ i1=$abc$109383$new_n47485_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103250
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n44279_ i2=soc.cpu.minerva.loadstore.m_load_data[14] nq=$abc$109383$new_n47489_
+.subckt and2_x1 i0=$abc$109383$new_n47489_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47490_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[14] nq=$abc$109383$new_n47491_
 .subckt inv_x0 i=soc.hyperram.sr[14] nq=$abc$109383$new_n47492_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n47492_ q=$abc$109383$new_n47493_
-.subckt a2_x2 i0=$abc$109383$new_n47493_ i1=$abc$109383$new_n47491_ q=$abc$109383$new_n47494_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n47492_ q=$abc$109383$new_n47493_
+.subckt and2_x1 i0=$abc$109383$new_n47493_ i1=$abc$109383$new_n47491_ q=$abc$109383$new_n47494_
 .subckt nand3_x0 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n45471_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n47495_
 .subckt nand3_x0 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n47496_
-.subckt oa22_x2 i0=$abc$109383$new_n47496_ i1=$abc$109383$new_n47495_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n47497_
+.subckt or21nand_x1 i0=$abc$109383$new_n47496_ i1=$abc$109383$new_n47495_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n47497_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n47498_
-.subckt o2_x2 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n47498_ q=$abc$109383$new_n47499_
-.subckt o4_x2 i0=$abc$109383$new_n47499_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n47500_
+.subckt or2_x1 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n47498_ q=$abc$109383$new_n47499_
+.subckt or4_x1 i0=$abc$109383$new_n47499_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n47500_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n47501_
-.subckt ao22_x2 i0=$abc$109383$new_n47501_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n47500_ q=$abc$109383$new_n47502_
+.subckt and21nor_x1 i0=$abc$109383$new_n47501_ i1=$abc$109383$new_n43317_ i2=$abc$109383$new_n47500_ nq=$abc$109383$new_n47502_
 .subckt nand3_x0 i0=$abc$109383$new_n47502_ i1=$abc$109383$new_n47497_ i2=$abc$109383$new_n47494_ nq=$abc$109383$new_n47503_
-.subckt mx2_x2 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[16][14] i1=soc.ram.ram[20][14] q=$abc$109383$new_n47504_
-.subckt a2_x2 i0=$abc$109383$new_n47504_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n47505_
-.subckt mx2_x2 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[17][14] i1=soc.ram.ram[21][14] q=$abc$109383$new_n47506_
-.subckt oa22_x2 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n47506_ i2=$abc$109383$new_n43569_ q=$abc$109383$new_n47507_
-.subckt o2_x2 i0=$abc$109383$new_n47507_ i1=$abc$109383$new_n47505_ q=$abc$109383$new_n47508_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[24][14] i1=soc.ram.ram[28][14] q=$abc$109383$new_n47509_
+.subckt mux2_x1 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[16][14] i1=soc.ram.ram[20][14] q=$abc$109383$new_n47504_
+.subckt and2_x1 i0=$abc$109383$new_n47504_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n47505_
+.subckt mux2_x1 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[17][14] i1=soc.ram.ram[21][14] q=$abc$109383$new_n47506_
+.subckt or21nand_x1 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n47506_ i2=$abc$109383$new_n43569_ nq=$abc$109383$new_n47507_
+.subckt or2_x1 i0=$abc$109383$new_n47507_ i1=$abc$109383$new_n47505_ q=$abc$109383$new_n47508_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[24][14] i1=soc.ram.ram[28][14] q=$abc$109383$new_n47509_
 .subckt nand2_x0 i0=$abc$109383$new_n47509_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n47510_
 .subckt inv_x0 i=soc.ram.ram[29][14] nq=$abc$109383$new_n47511_
 .subckt nand2_x0 i0=$abc$109383$new_n47511_ i1=$abc$109383$new_n45674_ nq=$abc$109383$new_n47512_
-.subckt ao22_x2 i0=soc.ram.ram[25][14] i1=$abc$109383$new_n44026_ i2=$abc$109383$new_n44143_ q=$abc$109383$new_n47513_
+.subckt and21nor_x1 i0=soc.ram.ram[25][14] i1=$abc$109383$new_n44026_ i2=$abc$109383$new_n44143_ nq=$abc$109383$new_n47513_
 .subckt nand2_x0 i0=$abc$109383$new_n47513_ i1=$abc$109383$new_n47512_ nq=$abc$109383$new_n47514_
 .subckt nand3_x0 i0=$abc$109383$new_n47514_ i1=$abc$109383$new_n47510_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n47515_
-.subckt oa22_x2 i0=$abc$109383$new_n47515_ i1=$abc$109383$new_n47508_ i2=$abc$109383$new_n45428_ q=$abc$109383$new_n47516_
-.subckt mx2_x2 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[18][14] i1=soc.ram.ram[22][14] q=$abc$109383$new_n47517_
+.subckt or21nand_x1 i0=$abc$109383$new_n47515_ i1=$abc$109383$new_n47508_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n47516_
+.subckt mux2_x1 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[18][14] i1=soc.ram.ram[22][14] q=$abc$109383$new_n47517_
 .subckt nand2_x0 i0=$abc$109383$new_n47517_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n47518_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[19][14] i1=soc.ram.ram[23][14] q=$abc$109383$new_n47519_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[19][14] i1=soc.ram.ram[23][14] q=$abc$109383$new_n47519_
 .subckt nand2_x0 i0=$abc$109383$new_n47519_ i1=$abc$109383$new_n44945_ nq=$abc$109383$new_n47520_
 .subckt nand3_x0 i0=$abc$109383$new_n47520_ i1=$abc$109383$new_n47518_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n47521_
-.subckt mx2_x2 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[26][14] i1=soc.ram.ram[30][14] q=$abc$109383$new_n47522_
+.subckt mux2_x1 cmd=$abc$109383$new_n43513_ i0=soc.ram.ram[26][14] i1=soc.ram.ram[30][14] q=$abc$109383$new_n47522_
 .subckt nand2_x0 i0=$abc$109383$new_n47522_ i1=$abc$109383$new_n44485_ nq=$abc$109383$new_n47523_
-.subckt o2_x2 i0=soc.ram.ram[27][14] i1=$abc$109383$new_n44187_ q=$abc$109383$new_n47524_
+.subckt or2_x1 i0=soc.ram.ram[27][14] i1=$abc$109383$new_n44187_ q=$abc$109383$new_n47524_
 .subckt nand2_x0 i0=$abc$109383$new_n47524_ i1=$abc$109383$new_n44143_ nq=$abc$109383$new_n47525_
 .subckt inv_x0 i=soc.ram.ram[31][14] nq=$abc$109383$new_n47526_
-.subckt a2_x2 i0=$abc$109383$new_n47526_ i1=$abc$109383$new_n44191_ q=$abc$109383$new_n47527_
-.subckt ao22_x2 i0=$abc$109383$new_n47527_ i1=$abc$109383$new_n47525_ i2=$abc$109383$new_n47523_ q=$abc$109383$new_n47528_
+.subckt and2_x1 i0=$abc$109383$new_n47526_ i1=$abc$109383$new_n44191_ q=$abc$109383$new_n47527_
+.subckt and21nor_x1 i0=$abc$109383$new_n47527_ i1=$abc$109383$new_n47525_ i2=$abc$109383$new_n47523_ nq=$abc$109383$new_n47528_
 .subckt nand2_x0 i0=$abc$109383$new_n47528_ i1=$abc$109383$new_n45244_ nq=$abc$109383$new_n47529_
-.subckt oa22_x2 i0=$abc$109383$new_n47529_ i1=$abc$109383$new_n47521_ i2=$abc$109383$new_n45434_ q=$abc$109383$new_n47530_
+.subckt or21nand_x1 i0=$abc$109383$new_n47529_ i1=$abc$109383$new_n47521_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n47530_
 .subckt nand3_x0 i0=$abc$109383$new_n47530_ i1=$abc$109383$new_n47516_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n47531_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[10][14] i1=soc.ram.ram[14][14] q=$abc$109383$new_n47532_
-.subckt a2_x2 i0=$abc$109383$new_n47532_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n47533_
-.subckt mx2_x2 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[11][14] i1=soc.ram.ram[15][14] q=$abc$109383$new_n47534_
-.subckt oa22_x2 i0=$abc$109383$new_n45481_ i1=$abc$109383$new_n47534_ i2=$abc$109383$new_n43837_ q=$abc$109383$new_n47535_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[10][14] i1=soc.ram.ram[14][14] q=$abc$109383$new_n47532_
+.subckt and2_x1 i0=$abc$109383$new_n47532_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n47533_
+.subckt mux2_x1 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[11][14] i1=soc.ram.ram[15][14] q=$abc$109383$new_n47534_
+.subckt or21nand_x1 i0=$abc$109383$new_n45481_ i1=$abc$109383$new_n47534_ i2=$abc$109383$new_n43837_ nq=$abc$109383$new_n47535_
 .subckt nor2_x0 i0=$abc$109383$new_n47535_ i1=$abc$109383$new_n47533_ nq=$abc$109383$new_n47536_
 .subckt inv_x0 i=soc.ram.ram[2][14] nq=$abc$109383$new_n47537_
 .subckt inv_x0 i=soc.ram.ram[6][14] nq=$abc$109383$new_n47538_
-.subckt mx2_x2 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n47538_ i1=$abc$109383$new_n47537_ q=$abc$109383$new_n47539_
-.subckt ao22_x2 i0=$abc$109383$new_n44505_ i1=$abc$109383$new_n47539_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n47540_
+.subckt mux2_x1 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n47538_ i1=$abc$109383$new_n47537_ q=$abc$109383$new_n47539_
+.subckt and21nor_x1 i0=$abc$109383$new_n44505_ i1=$abc$109383$new_n47539_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n47540_
 .subckt inv_x0 i=soc.ram.ram[7][14] nq=$abc$109383$new_n47541_
 .subckt nand2_x0 i0=$abc$109383$new_n47541_ i1=$abc$109383$new_n44017_ nq=$abc$109383$new_n47542_
-.subckt ao22_x2 i0=soc.ram.ram[3][14] i1=$abc$109383$new_n43786_ i2=$abc$109383$new_n43791_ q=$abc$109383$new_n47543_
+.subckt and21nor_x1 i0=soc.ram.ram[3][14] i1=$abc$109383$new_n43786_ i2=$abc$109383$new_n43791_ nq=$abc$109383$new_n47543_
 .subckt nand2_x0 i0=$abc$109383$new_n47543_ i1=$abc$109383$new_n47542_ nq=$abc$109383$new_n47544_
-.subckt oa22_x2 i0=$abc$109383$new_n47544_ i1=$abc$109383$new_n47540_ i2=$abc$109383$new_n47536_ q=$abc$109383$new_n47545_
+.subckt or21nand_x1 i0=$abc$109383$new_n47544_ i1=$abc$109383$new_n47540_ i2=$abc$109383$new_n47536_ nq=$abc$109383$new_n47545_
 .subckt nand2_x0 i0=$abc$109383$new_n47545_ i1=$abc$109383$new_n46527_ nq=$abc$109383$new_n47546_
-.subckt mx2_x2 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[8][14] i1=soc.ram.ram[12][14] q=$abc$109383$new_n47547_
-.subckt a2_x2 i0=$abc$109383$new_n47547_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n47548_
-.subckt mx2_x2 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[9][14] i1=soc.ram.ram[13][14] q=$abc$109383$new_n47549_
-.subckt oa22_x2 i0=$abc$109383$new_n43913_ i1=$abc$109383$new_n47549_ i2=$abc$109383$new_n44162_ q=$abc$109383$new_n47550_
+.subckt mux2_x1 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[8][14] i1=soc.ram.ram[12][14] q=$abc$109383$new_n47547_
+.subckt and2_x1 i0=$abc$109383$new_n47547_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n47548_
+.subckt mux2_x1 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[9][14] i1=soc.ram.ram[13][14] q=$abc$109383$new_n47549_
+.subckt or21nand_x1 i0=$abc$109383$new_n43913_ i1=$abc$109383$new_n47549_ i2=$abc$109383$new_n44162_ nq=$abc$109383$new_n47550_
 .subckt nor2_x0 i0=$abc$109383$new_n47550_ i1=$abc$109383$new_n47548_ nq=$abc$109383$new_n47551_
 .subckt inv_x0 i=soc.ram.ram[0][14] nq=$abc$109383$new_n47552_
 .subckt inv_x0 i=soc.ram.ram[4][14] nq=$abc$109383$new_n47553_
-.subckt mx2_x2 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n47553_ i1=$abc$109383$new_n47552_ q=$abc$109383$new_n47554_
-.subckt ao22_x2 i0=$abc$109383$new_n43962_ i1=$abc$109383$new_n47554_ i2=$abc$109383$new_n44448_ q=$abc$109383$new_n47555_
+.subckt mux2_x1 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n47553_ i1=$abc$109383$new_n47552_ q=$abc$109383$new_n47554_
+.subckt and21nor_x1 i0=$abc$109383$new_n43962_ i1=$abc$109383$new_n47554_ i2=$abc$109383$new_n44448_ nq=$abc$109383$new_n47555_
 .subckt inv_x0 i=soc.ram.ram[5][14] nq=$abc$109383$new_n47556_
 .subckt nand2_x0 i0=$abc$109383$new_n47556_ i1=$abc$109383$new_n45674_ nq=$abc$109383$new_n47557_
-.subckt ao22_x2 i0=soc.ram.ram[1][14] i1=$abc$109383$new_n44207_ i2=$abc$109383$new_n43691_ q=$abc$109383$new_n47558_
+.subckt and21nor_x1 i0=soc.ram.ram[1][14] i1=$abc$109383$new_n44207_ i2=$abc$109383$new_n43691_ nq=$abc$109383$new_n47558_
 .subckt nand2_x0 i0=$abc$109383$new_n47558_ i1=$abc$109383$new_n47557_ nq=$abc$109383$new_n47559_
-.subckt oa22_x2 i0=$abc$109383$new_n47559_ i1=$abc$109383$new_n47555_ i2=$abc$109383$new_n47551_ q=$abc$109383$new_n47560_
+.subckt or21nand_x1 i0=$abc$109383$new_n47559_ i1=$abc$109383$new_n47555_ i2=$abc$109383$new_n47551_ nq=$abc$109383$new_n47560_
 .subckt nand2_x0 i0=$abc$109383$new_n47560_ i1=$abc$109383$new_n45016_ nq=$abc$109383$new_n47561_
 .subckt nand3_x0 i0=$abc$109383$new_n47561_ i1=$abc$109383$new_n47546_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n47562_
 .subckt nand3_x0 i0=$abc$109383$new_n47562_ i1=$abc$109383$new_n47531_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n47563_
-.subckt mx2_x2 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[58][14] i1=soc.ram.ram[62][14] q=$abc$109383$new_n47564_
-.subckt a2_x2 i0=$abc$109383$new_n47564_ i1=$abc$109383$new_n44837_ q=$abc$109383$new_n47565_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[59][14] i1=soc.ram.ram[63][14] q=$abc$109383$new_n47566_
-.subckt oa22_x2 i0=$abc$109383$new_n43691_ i1=$abc$109383$new_n47566_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n47567_
+.subckt mux2_x1 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[58][14] i1=soc.ram.ram[62][14] q=$abc$109383$new_n47564_
+.subckt and2_x1 i0=$abc$109383$new_n47564_ i1=$abc$109383$new_n44837_ q=$abc$109383$new_n47565_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[59][14] i1=soc.ram.ram[63][14] q=$abc$109383$new_n47566_
+.subckt or21nand_x1 i0=$abc$109383$new_n43691_ i1=$abc$109383$new_n47566_ i2=$abc$109383$new_n44523_ nq=$abc$109383$new_n47567_
 .subckt nor2_x0 i0=$abc$109383$new_n47567_ i1=$abc$109383$new_n47565_ nq=$abc$109383$new_n47568_
 .subckt inv_x0 i=soc.ram.ram[50][14] nq=$abc$109383$new_n47569_
 .subckt inv_x0 i=soc.ram.ram[54][14] nq=$abc$109383$new_n47570_
-.subckt mx2_x2 cmd=$abc$109383$new_n43561_ i0=$abc$109383$new_n47570_ i1=$abc$109383$new_n47569_ q=$abc$109383$new_n47571_
-.subckt ao22_x2 i0=$abc$109383$new_n43923_ i1=$abc$109383$new_n47571_ i2=$abc$109383$new_n44692_ q=$abc$109383$new_n47572_
+.subckt mux2_x1 cmd=$abc$109383$new_n43561_ i0=$abc$109383$new_n47570_ i1=$abc$109383$new_n47569_ q=$abc$109383$new_n47571_
+.subckt and21nor_x1 i0=$abc$109383$new_n43923_ i1=$abc$109383$new_n47571_ i2=$abc$109383$new_n44692_ nq=$abc$109383$new_n47572_
 .subckt inv_x0 i=soc.ram.ram[55][14] nq=$abc$109383$new_n47573_
 .subckt nand2_x0 i0=$abc$109383$new_n47573_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n47574_
-.subckt ao22_x2 i0=soc.ram.ram[51][14] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n44403_ q=$abc$109383$new_n47575_
+.subckt and21nor_x1 i0=soc.ram.ram[51][14] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n44403_ nq=$abc$109383$new_n47575_
 .subckt nand2_x0 i0=$abc$109383$new_n47575_ i1=$abc$109383$new_n47574_ nq=$abc$109383$new_n47576_
-.subckt oa22_x2 i0=$abc$109383$new_n47576_ i1=$abc$109383$new_n47572_ i2=$abc$109383$new_n47568_ q=$abc$109383$new_n47577_
+.subckt or21nand_x1 i0=$abc$109383$new_n47576_ i1=$abc$109383$new_n47572_ i2=$abc$109383$new_n47568_ nq=$abc$109383$new_n47577_
 .subckt nand2_x0 i0=$abc$109383$new_n47577_ i1=$abc$109383$new_n44959_ nq=$abc$109383$new_n47578_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[56][14] i1=soc.ram.ram[60][14] q=$abc$109383$new_n47579_
-.subckt a2_x2 i0=$abc$109383$new_n47579_ i1=$abc$109383$new_n46128_ q=$abc$109383$new_n47580_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[57][14] i1=soc.ram.ram[61][14] q=$abc$109383$new_n47581_
-.subckt oa22_x2 i0=$abc$109383$new_n44175_ i1=$abc$109383$new_n47581_ i2=$abc$109383$new_n43837_ q=$abc$109383$new_n47582_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[56][14] i1=soc.ram.ram[60][14] q=$abc$109383$new_n47579_
+.subckt and2_x1 i0=$abc$109383$new_n47579_ i1=$abc$109383$new_n46128_ q=$abc$109383$new_n47580_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[57][14] i1=soc.ram.ram[61][14] q=$abc$109383$new_n47581_
+.subckt or21nand_x1 i0=$abc$109383$new_n44175_ i1=$abc$109383$new_n47581_ i2=$abc$109383$new_n43837_ nq=$abc$109383$new_n47582_
 .subckt nor2_x0 i0=$abc$109383$new_n47582_ i1=$abc$109383$new_n47580_ nq=$abc$109383$new_n47583_
 .subckt inv_x0 i=soc.ram.ram[48][14] nq=$abc$109383$new_n47584_
 .subckt inv_x0 i=soc.ram.ram[52][14] nq=$abc$109383$new_n47585_
-.subckt mx2_x2 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n47585_ i1=$abc$109383$new_n47584_ q=$abc$109383$new_n47586_
-.subckt ao22_x2 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n47586_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n47587_
+.subckt mux2_x1 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n47585_ i1=$abc$109383$new_n47584_ q=$abc$109383$new_n47586_
+.subckt and21nor_x1 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n47586_ i2=$abc$109383$new_n43664_ nq=$abc$109383$new_n47587_
 .subckt inv_x0 i=soc.ram.ram[53][14] nq=$abc$109383$new_n47588_
 .subckt nand2_x0 i0=$abc$109383$new_n47588_ i1=$abc$109383$new_n44501_ nq=$abc$109383$new_n47589_
-.subckt ao22_x2 i0=soc.ram.ram[49][14] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n47590_
+.subckt and21nor_x1 i0=soc.ram.ram[49][14] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n47590_
 .subckt nand2_x0 i0=$abc$109383$new_n47590_ i1=$abc$109383$new_n47589_ nq=$abc$109383$new_n47591_
-.subckt oa22_x2 i0=$abc$109383$new_n47591_ i1=$abc$109383$new_n47587_ i2=$abc$109383$new_n47583_ q=$abc$109383$new_n47592_
+.subckt or21nand_x1 i0=$abc$109383$new_n47591_ i1=$abc$109383$new_n47587_ i2=$abc$109383$new_n47583_ nq=$abc$109383$new_n47592_
 .subckt nand2_x0 i0=$abc$109383$new_n47592_ i1=$abc$109383$new_n43991_ nq=$abc$109383$new_n47593_
 .subckt nand3_x0 i0=$abc$109383$new_n47593_ i1=$abc$109383$new_n47578_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n47594_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[34][14] i1=soc.ram.ram[38][14] q=$abc$109383$new_n47595_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[34][14] i1=soc.ram.ram[38][14] q=$abc$109383$new_n47595_
 .subckt nand2_x0 i0=$abc$109383$new_n47595_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n47596_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[35][14] i1=soc.ram.ram[39][14] q=$abc$109383$new_n47597_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[35][14] i1=soc.ram.ram[39][14] q=$abc$109383$new_n47597_
 .subckt nand2_x0 i0=$abc$109383$new_n47597_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n47598_
 .subckt nand3_x0 i0=$abc$109383$new_n47598_ i1=$abc$109383$new_n47596_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n47599_
-.subckt mx2_x2 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[42][14] i1=soc.ram.ram[46][14] q=$abc$109383$new_n47600_
+.subckt mux2_x1 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[42][14] i1=soc.ram.ram[46][14] q=$abc$109383$new_n47600_
 .subckt nand2_x0 i0=$abc$109383$new_n47600_ i1=$abc$109383$new_n44597_ nq=$abc$109383$new_n47601_
-.subckt o2_x2 i0=soc.ram.ram[43][14] i1=$abc$109383$new_n45609_ q=$abc$109383$new_n47602_
+.subckt or2_x1 i0=soc.ram.ram[43][14] i1=$abc$109383$new_n45609_ q=$abc$109383$new_n47602_
 .subckt nand2_x0 i0=$abc$109383$new_n47602_ i1=$abc$109383$new_n43962_ nq=$abc$109383$new_n47603_
 .subckt inv_x0 i=soc.ram.ram[47][14] nq=$abc$109383$new_n47604_
-.subckt a2_x2 i0=$abc$109383$new_n47604_ i1=$abc$109383$new_n45116_ q=$abc$109383$new_n47605_
-.subckt ao22_x2 i0=$abc$109383$new_n47605_ i1=$abc$109383$new_n47603_ i2=$abc$109383$new_n47601_ q=$abc$109383$new_n47606_
+.subckt and2_x1 i0=$abc$109383$new_n47604_ i1=$abc$109383$new_n45116_ q=$abc$109383$new_n47605_
+.subckt and21nor_x1 i0=$abc$109383$new_n47605_ i1=$abc$109383$new_n47603_ i2=$abc$109383$new_n47601_ nq=$abc$109383$new_n47606_
 .subckt nand2_x0 i0=$abc$109383$new_n47606_ i1=$abc$109383$new_n44499_ nq=$abc$109383$new_n47607_
-.subckt oa22_x2 i0=$abc$109383$new_n47607_ i1=$abc$109383$new_n47599_ i2=$abc$109383$new_n43856_ q=$abc$109383$new_n47608_
-.subckt mx2_x2 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[32][14] i1=soc.ram.ram[36][14] q=$abc$109383$new_n47609_
-.subckt a2_x2 i0=$abc$109383$new_n47609_ i1=$abc$109383$new_n44597_ q=$abc$109383$new_n47610_
-.subckt mx2_x2 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[33][14] i1=soc.ram.ram[37][14] q=$abc$109383$new_n47611_
-.subckt oa22_x2 i0=$abc$109383$new_n43913_ i1=$abc$109383$new_n47611_ i2=$abc$109383$new_n43896_ q=$abc$109383$new_n47612_
-.subckt o2_x2 i0=$abc$109383$new_n47612_ i1=$abc$109383$new_n47610_ q=$abc$109383$new_n47613_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[40][14] i1=soc.ram.ram[44][14] q=$abc$109383$new_n47614_
+.subckt or21nand_x1 i0=$abc$109383$new_n47607_ i1=$abc$109383$new_n47599_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n47608_
+.subckt mux2_x1 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[32][14] i1=soc.ram.ram[36][14] q=$abc$109383$new_n47609_
+.subckt and2_x1 i0=$abc$109383$new_n47609_ i1=$abc$109383$new_n44597_ q=$abc$109383$new_n47610_
+.subckt mux2_x1 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[33][14] i1=soc.ram.ram[37][14] q=$abc$109383$new_n47611_
+.subckt or21nand_x1 i0=$abc$109383$new_n43913_ i1=$abc$109383$new_n47611_ i2=$abc$109383$new_n43896_ nq=$abc$109383$new_n47612_
+.subckt or2_x1 i0=$abc$109383$new_n47612_ i1=$abc$109383$new_n47610_ q=$abc$109383$new_n47613_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[40][14] i1=soc.ram.ram[44][14] q=$abc$109383$new_n47614_
 .subckt nand2_x0 i0=$abc$109383$new_n47614_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n47615_
 .subckt inv_x0 i=soc.ram.ram[45][14] nq=$abc$109383$new_n47616_
 .subckt nand2_x0 i0=$abc$109383$new_n47616_ i1=$abc$109383$new_n43978_ nq=$abc$109383$new_n47617_
-.subckt ao22_x2 i0=soc.ram.ram[41][14] i1=$abc$109383$new_n43819_ i2=$abc$109383$new_n43416_ q=$abc$109383$new_n47618_
+.subckt and21nor_x1 i0=soc.ram.ram[41][14] i1=$abc$109383$new_n43819_ i2=$abc$109383$new_n43416_ nq=$abc$109383$new_n47618_
 .subckt nand2_x0 i0=$abc$109383$new_n47618_ i1=$abc$109383$new_n47617_ nq=$abc$109383$new_n47619_
 .subckt nand3_x0 i0=$abc$109383$new_n47619_ i1=$abc$109383$new_n47615_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n47620_
-.subckt oa22_x2 i0=$abc$109383$new_n47620_ i1=$abc$109383$new_n47613_ i2=$abc$109383$new_n44853_ q=$abc$109383$new_n47621_
+.subckt or21nand_x1 i0=$abc$109383$new_n47620_ i1=$abc$109383$new_n47613_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n47621_
 .subckt nand3_x0 i0=$abc$109383$new_n47621_ i1=$abc$109383$new_n47608_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n47622_
 .subckt nand3_x0 i0=$abc$109383$new_n47622_ i1=$abc$109383$new_n47594_ i2=$abc$109383$new_n43410_ nq=$abc$109383$new_n47623_
-.subckt oa22_x2 i0=$abc$109383$new_n47623_ i1=$abc$109383$new_n47563_ i2=$abc$109383$new_n44446_ q=$abc$109383$new_n47624_
-.subckt a2_x2 i0=$abc$109383$new_n47624_ i1=$abc$109383$new_n43323_ q=$abc$109383$new_n47625_
+.subckt or21nand_x1 i0=$abc$109383$new_n47623_ i1=$abc$109383$new_n47563_ i2=$abc$109383$new_n44446_ nq=$abc$109383$new_n47624_
+.subckt and2_x1 i0=$abc$109383$new_n47624_ i1=$abc$109383$new_n43323_ q=$abc$109383$new_n47625_
 .subckt inv_x0 i=soc.ram.ram[85][14] nq=$abc$109383$new_n47626_
 .subckt nand2_x0 i0=$abc$109383$new_n47626_ i1=$abc$109383$new_n44306_ nq=$abc$109383$new_n47627_
-.subckt ao22_x2 i0=soc.ram.ram[81][14] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n44142_ q=$abc$109383$new_n47628_
+.subckt and21nor_x1 i0=soc.ram.ram[81][14] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n44142_ nq=$abc$109383$new_n47628_
 .subckt nand2_x0 i0=$abc$109383$new_n47628_ i1=$abc$109383$new_n47627_ nq=$abc$109383$new_n47629_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[80][14] i1=soc.ram.ram[84][14] q=$abc$109383$new_n47630_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[80][14] i1=soc.ram.ram[84][14] q=$abc$109383$new_n47630_
 .subckt nand2_x0 i0=$abc$109383$new_n47630_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n47631_
-.subckt a3_x2 i0=$abc$109383$new_n47631_ i1=$abc$109383$new_n47629_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n47632_
+.subckt and3_x1 i0=$abc$109383$new_n47631_ i1=$abc$109383$new_n47629_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n47632_
 .subckt inv_x0 i=soc.ram.ram[87][14] nq=$abc$109383$new_n47633_
 .subckt nand2_x0 i0=$abc$109383$new_n47633_ i1=$abc$109383$new_n44751_ nq=$abc$109383$new_n47634_
-.subckt ao22_x2 i0=soc.ram.ram[83][14] i1=$abc$109383$new_n43613_ i2=$abc$109383$new_n43611_ q=$abc$109383$new_n47635_
+.subckt and21nor_x1 i0=soc.ram.ram[83][14] i1=$abc$109383$new_n43613_ i2=$abc$109383$new_n43611_ nq=$abc$109383$new_n47635_
 .subckt nand2_x0 i0=$abc$109383$new_n47635_ i1=$abc$109383$new_n47634_ nq=$abc$109383$new_n47636_
-.subckt mx2_x2 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[82][14] i1=soc.ram.ram[86][14] q=$abc$109383$new_n47637_
-.subckt a2_x2 i0=$abc$109383$new_n47637_ i1=$abc$109383$new_n43456_ q=$abc$109383$new_n47638_
+.subckt mux2_x1 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[82][14] i1=soc.ram.ram[86][14] q=$abc$109383$new_n47637_
+.subckt and2_x1 i0=$abc$109383$new_n47637_ i1=$abc$109383$new_n43456_ q=$abc$109383$new_n47638_
 .subckt nor2_x0 i0=$abc$109383$new_n47638_ i1=$abc$109383$new_n43330_ nq=$abc$109383$new_n47639_
-.subckt a2_x2 i0=$abc$109383$new_n47639_ i1=$abc$109383$new_n47636_ q=$abc$109383$new_n47640_
-.subckt ao22_x2 i0=$abc$109383$new_n47640_ i1=$abc$109383$new_n47632_ i2=$abc$109383$new_n43838_ q=$abc$109383$new_n47641_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[90][14] i1=soc.ram.ram[94][14] q=$abc$109383$new_n47642_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[91][14] i1=soc.ram.ram[95][14] q=$abc$109383$new_n47643_
-.subckt mx2_x2 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47643_ i1=$abc$109383$new_n47642_ q=$abc$109383$new_n47644_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[88][14] i1=soc.ram.ram[92][14] q=$abc$109383$new_n47645_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[89][14] i1=soc.ram.ram[93][14] q=$abc$109383$new_n47646_
-.subckt mx2_x2 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47646_ i1=$abc$109383$new_n47645_ q=$abc$109383$new_n47647_
-.subckt mx2_x2 cmd=$abc$109383$new_n43808_ i0=$abc$109383$new_n47647_ i1=$abc$109383$new_n47644_ q=$abc$109383$new_n47648_
+.subckt and2_x1 i0=$abc$109383$new_n47639_ i1=$abc$109383$new_n47636_ q=$abc$109383$new_n47640_
+.subckt and21nor_x1 i0=$abc$109383$new_n47640_ i1=$abc$109383$new_n47632_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n47641_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[90][14] i1=soc.ram.ram[94][14] q=$abc$109383$new_n47642_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[91][14] i1=soc.ram.ram[95][14] q=$abc$109383$new_n47643_
+.subckt mux2_x1 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47643_ i1=$abc$109383$new_n47642_ q=$abc$109383$new_n47644_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[88][14] i1=soc.ram.ram[92][14] q=$abc$109383$new_n47645_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[89][14] i1=soc.ram.ram[93][14] q=$abc$109383$new_n47646_
+.subckt mux2_x1 cmd=$abc$109383$new_n43356_ i0=$abc$109383$new_n47646_ i1=$abc$109383$new_n47645_ q=$abc$109383$new_n47647_
+.subckt mux2_x1 cmd=$abc$109383$new_n43808_ i0=$abc$109383$new_n47647_ i1=$abc$109383$new_n47644_ q=$abc$109383$new_n47648_
 .subckt nor2_x0 i0=$abc$109383$new_n47648_ i1=$abc$109383$new_n44086_ nq=$abc$109383$new_n47649_
-.subckt ao22_x2 i0=$abc$109383$new_n47649_ i1=$abc$109383$new_n47641_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n47650_
-.subckt mx2_x2 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[66][14] i1=soc.ram.ram[70][14] q=$abc$109383$new_n47651_
+.subckt and21nor_x1 i0=$abc$109383$new_n47649_ i1=$abc$109383$new_n47641_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n47650_
+.subckt mux2_x1 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[66][14] i1=soc.ram.ram[70][14] q=$abc$109383$new_n47651_
 .subckt nand2_x0 i0=$abc$109383$new_n47651_ i1=$abc$109383$new_n43508_ nq=$abc$109383$new_n47652_
-.subckt mx2_x2 cmd=$abc$109383$new_n44338_ i0=soc.ram.ram[67][14] i1=soc.ram.ram[71][14] q=$abc$109383$new_n47653_
+.subckt mux2_x1 cmd=$abc$109383$new_n44338_ i0=soc.ram.ram[67][14] i1=soc.ram.ram[71][14] q=$abc$109383$new_n47653_
 .subckt nand2_x0 i0=$abc$109383$new_n47653_ i1=$abc$109383$new_n43823_ nq=$abc$109383$new_n47654_
 .subckt nand3_x0 i0=$abc$109383$new_n47654_ i1=$abc$109383$new_n47652_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n47655_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[64][14] i1=soc.ram.ram[68][14] q=$abc$109383$new_n47656_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[65][14] i1=soc.ram.ram[69][14] q=$abc$109383$new_n47657_
-.subckt mx2_x2 cmd=$abc$109383$new_n43633_ i0=$abc$109383$new_n47657_ i1=$abc$109383$new_n47656_ q=$abc$109383$new_n47658_
-.subckt o2_x2 i0=$abc$109383$new_n47658_ i1=$abc$109383$new_n43458_ q=$abc$109383$new_n47659_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[64][14] i1=soc.ram.ram[68][14] q=$abc$109383$new_n47656_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[65][14] i1=soc.ram.ram[69][14] q=$abc$109383$new_n47657_
+.subckt mux2_x1 cmd=$abc$109383$new_n43633_ i0=$abc$109383$new_n47657_ i1=$abc$109383$new_n47656_ q=$abc$109383$new_n47658_
+.subckt or2_x1 i0=$abc$109383$new_n47658_ i1=$abc$109383$new_n43458_ q=$abc$109383$new_n47659_
 .subckt nand2_x0 i0=$abc$109383$new_n47659_ i1=$abc$109383$new_n47655_ nq=$abc$109383$new_n47660_
-.subckt a2_x2 i0=$abc$109383$new_n47660_ i1=$abc$109383$new_n44610_ q=$abc$109383$new_n47661_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[72][14] i1=soc.ram.ram[76][14] q=$abc$109383$new_n47662_
+.subckt and2_x1 i0=$abc$109383$new_n47660_ i1=$abc$109383$new_n44610_ q=$abc$109383$new_n47661_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[72][14] i1=soc.ram.ram[76][14] q=$abc$109383$new_n47662_
 .subckt nand2_x0 i0=$abc$109383$new_n47662_ i1=$abc$109383$new_n43737_ nq=$abc$109383$new_n47663_
 .subckt inv_x0 i=soc.ram.ram[77][14] nq=$abc$109383$new_n47664_
 .subckt nand2_x0 i0=$abc$109383$new_n47664_ i1=$abc$109383$new_n44093_ nq=$abc$109383$new_n47665_
-.subckt ao22_x2 i0=soc.ram.ram[73][14] i1=$abc$109383$new_n43558_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n47666_
+.subckt and21nor_x1 i0=soc.ram.ram[73][14] i1=$abc$109383$new_n43558_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n47666_
 .subckt nand2_x0 i0=$abc$109383$new_n47666_ i1=$abc$109383$new_n47665_ nq=$abc$109383$new_n47667_
-.subckt a3_x2 i0=$abc$109383$new_n47667_ i1=$abc$109383$new_n47663_ i2=$abc$109383$new_n43724_ q=$abc$109383$new_n47668_
-.subckt mx2_x2 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[74][14] i1=soc.ram.ram[78][14] q=$abc$109383$new_n47669_
+.subckt and3_x1 i0=$abc$109383$new_n47667_ i1=$abc$109383$new_n47663_ i2=$abc$109383$new_n43724_ q=$abc$109383$new_n47668_
+.subckt mux2_x1 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[74][14] i1=soc.ram.ram[78][14] q=$abc$109383$new_n47669_
 .subckt nand2_x0 i0=$abc$109383$new_n47669_ i1=$abc$109383$new_n43334_ nq=$abc$109383$new_n47670_
-.subckt o2_x2 i0=soc.ram.ram[75][14] i1=$abc$109383$new_n44163_ q=$abc$109383$new_n47671_
+.subckt or2_x1 i0=soc.ram.ram[75][14] i1=$abc$109383$new_n44163_ q=$abc$109383$new_n47671_
 .subckt nand2_x0 i0=$abc$109383$new_n47671_ i1=$abc$109383$new_n44053_ nq=$abc$109383$new_n47672_
 .subckt inv_x0 i=soc.ram.ram[79][14] nq=$abc$109383$new_n47673_
-.subckt a2_x2 i0=$abc$109383$new_n47673_ i1=$abc$109383$new_n43519_ q=$abc$109383$new_n47674_
-.subckt ao22_x2 i0=$abc$109383$new_n47674_ i1=$abc$109383$new_n47672_ i2=$abc$109383$new_n47670_ q=$abc$109383$new_n47675_
-.subckt a2_x2 i0=$abc$109383$new_n47675_ i1=$abc$109383$new_n46137_ q=$abc$109383$new_n47676_
-.subckt ao22_x2 i0=$abc$109383$new_n47676_ i1=$abc$109383$new_n47668_ i2=$abc$109383$new_n45393_ q=$abc$109383$new_n47677_
-.subckt ao22_x2 i0=$abc$109383$new_n47677_ i1=$abc$109383$new_n47661_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n47678_
-.subckt ao22_x2 i0=$abc$109383$new_n47678_ i1=$abc$109383$new_n47650_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n47679_
-.subckt mx2_x2 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[114][14] i1=soc.ram.ram[118][14] q=$abc$109383$new_n47680_
+.subckt and2_x1 i0=$abc$109383$new_n47673_ i1=$abc$109383$new_n43519_ q=$abc$109383$new_n47674_
+.subckt and21nor_x1 i0=$abc$109383$new_n47674_ i1=$abc$109383$new_n47672_ i2=$abc$109383$new_n47670_ nq=$abc$109383$new_n47675_
+.subckt and2_x1 i0=$abc$109383$new_n47675_ i1=$abc$109383$new_n46137_ q=$abc$109383$new_n47676_
+.subckt and21nor_x1 i0=$abc$109383$new_n47676_ i1=$abc$109383$new_n47668_ i2=$abc$109383$new_n45393_ nq=$abc$109383$new_n47677_
+.subckt and21nor_x1 i0=$abc$109383$new_n47677_ i1=$abc$109383$new_n47661_ i2=$abc$109383$new_n45028_ nq=$abc$109383$new_n47678_
+.subckt and21nor_x1 i0=$abc$109383$new_n47678_ i1=$abc$109383$new_n47650_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n47679_
+.subckt mux2_x1 cmd=$abc$109383$new_n45059_ i0=soc.ram.ram[114][14] i1=soc.ram.ram[118][14] q=$abc$109383$new_n47680_
 .subckt nand2_x0 i0=$abc$109383$new_n47680_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n47681_
-.subckt mx2_x2 cmd=$abc$109383$new_n45222_ i0=soc.ram.ram[115][14] i1=soc.ram.ram[119][14] q=$abc$109383$new_n47682_
+.subckt mux2_x1 cmd=$abc$109383$new_n45222_ i0=soc.ram.ram[115][14] i1=soc.ram.ram[119][14] q=$abc$109383$new_n47682_
 .subckt nand2_x0 i0=$abc$109383$new_n47682_ i1=$abc$109383$new_n43992_ nq=$abc$109383$new_n47683_
 .subckt nand3_x0 i0=$abc$109383$new_n47683_ i1=$abc$109383$new_n47681_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n47684_
-.subckt mx2_x2 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[112][14] i1=soc.ram.ram[116][14] q=$abc$109383$new_n47685_
-.subckt mx2_x2 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[113][14] i1=soc.ram.ram[117][14] q=$abc$109383$new_n47686_
-.subckt mx2_x2 cmd=$abc$109383$new_n43488_ i0=$abc$109383$new_n47686_ i1=$abc$109383$new_n47685_ q=$abc$109383$new_n47687_
-.subckt o2_x2 i0=$abc$109383$new_n47687_ i1=$abc$109383$new_n43507_ q=$abc$109383$new_n47688_
-.subckt oa22_x2 i0=$abc$109383$new_n47688_ i1=$abc$109383$new_n47684_ i2=$abc$109383$new_n44499_ q=$abc$109383$new_n47689_
-.subckt mx2_x2 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[120][14] i1=soc.ram.ram[124][14] q=$abc$109383$new_n47690_
+.subckt mux2_x1 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[112][14] i1=soc.ram.ram[116][14] q=$abc$109383$new_n47685_
+.subckt mux2_x1 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[113][14] i1=soc.ram.ram[117][14] q=$abc$109383$new_n47686_
+.subckt mux2_x1 cmd=$abc$109383$new_n43488_ i0=$abc$109383$new_n47686_ i1=$abc$109383$new_n47685_ q=$abc$109383$new_n47687_
+.subckt or2_x1 i0=$abc$109383$new_n47687_ i1=$abc$109383$new_n43507_ q=$abc$109383$new_n47688_
+.subckt or21nand_x1 i0=$abc$109383$new_n47688_ i1=$abc$109383$new_n47684_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n47689_
+.subckt mux2_x1 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[120][14] i1=soc.ram.ram[124][14] q=$abc$109383$new_n47690_
 .subckt nand2_x0 i0=$abc$109383$new_n47690_ i1=$abc$109383$new_n44830_ nq=$abc$109383$new_n47691_
 .subckt inv_x0 i=soc.ram.ram[125][14] nq=$abc$109383$new_n47692_
 .subckt nand2_x0 i0=$abc$109383$new_n47692_ i1=$abc$109383$new_n45579_ nq=$abc$109383$new_n47693_
-.subckt ao22_x2 i0=soc.ram.ram[121][14] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n47694_
+.subckt and21nor_x1 i0=soc.ram.ram[121][14] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n47694_
 .subckt nand2_x0 i0=$abc$109383$new_n47694_ i1=$abc$109383$new_n47693_ nq=$abc$109383$new_n47695_
 .subckt nand3_x0 i0=$abc$109383$new_n47695_ i1=$abc$109383$new_n47691_ i2=$abc$109383$new_n45015_ nq=$abc$109383$new_n47696_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[122][14] i1=soc.ram.ram[126][14] q=$abc$109383$new_n47697_
-.subckt oa22_x2 i0=$abc$109383$new_n44596_ i1=$abc$109383$new_n47697_ i2=$abc$109383$new_n43448_ q=$abc$109383$new_n47698_
-.subckt ao22_x2 i0=soc.ram.ram[123][14] i1=$abc$109383$new_n43801_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n47699_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[122][14] i1=soc.ram.ram[126][14] q=$abc$109383$new_n47697_
+.subckt or21nand_x1 i0=$abc$109383$new_n44596_ i1=$abc$109383$new_n47697_ i2=$abc$109383$new_n43448_ nq=$abc$109383$new_n47698_
+.subckt and21nor_x1 i0=soc.ram.ram[123][14] i1=$abc$109383$new_n43801_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n47699_
 .subckt inv_x0 i=soc.ram.ram[127][14] nq=$abc$109383$new_n47700_
 .subckt nand2_x0 i0=$abc$109383$new_n47700_ i1=$abc$109383$new_n44604_ nq=$abc$109383$new_n47701_
-.subckt oa22_x2 i0=$abc$109383$new_n47701_ i1=$abc$109383$new_n47699_ i2=$abc$109383$new_n47698_ q=$abc$109383$new_n47702_
-.subckt oa22_x2 i0=$abc$109383$new_n47702_ i1=$abc$109383$new_n47696_ i2=$abc$109383$new_n45211_ q=$abc$109383$new_n47703_
+.subckt or21nand_x1 i0=$abc$109383$new_n47701_ i1=$abc$109383$new_n47699_ i2=$abc$109383$new_n47698_ nq=$abc$109383$new_n47702_
+.subckt or21nand_x1 i0=$abc$109383$new_n47702_ i1=$abc$109383$new_n47696_ i2=$abc$109383$new_n45211_ nq=$abc$109383$new_n47703_
 .subckt nand3_x0 i0=$abc$109383$new_n47703_ i1=$abc$109383$new_n47689_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n47704_
-.subckt mx2_x2 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[106][14] i1=soc.ram.ram[110][14] q=$abc$109383$new_n47705_
+.subckt mux2_x1 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[106][14] i1=soc.ram.ram[110][14] q=$abc$109383$new_n47705_
 .subckt nand2_x0 i0=$abc$109383$new_n47705_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n47706_
 .subckt inv_x0 i=soc.ram.ram[111][14] nq=$abc$109383$new_n47707_
-.subckt a2_x2 i0=$abc$109383$new_n47707_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n47708_
-.subckt o2_x2 i0=soc.ram.ram[107][14] i1=$abc$109383$new_n43509_ q=$abc$109383$new_n47709_
+.subckt and2_x1 i0=$abc$109383$new_n47707_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n47708_
+.subckt or2_x1 i0=soc.ram.ram[107][14] i1=$abc$109383$new_n43509_ q=$abc$109383$new_n47709_
 .subckt nand2_x0 i0=$abc$109383$new_n47709_ i1=$abc$109383$new_n44064_ nq=$abc$109383$new_n47710_
-.subckt ao22_x2 i0=$abc$109383$new_n47710_ i1=$abc$109383$new_n47708_ i2=$abc$109383$new_n47706_ q=$abc$109383$new_n47711_
-.subckt mx2_x2 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[104][14] i1=soc.ram.ram[108][14] q=$abc$109383$new_n47712_
+.subckt and21nor_x1 i0=$abc$109383$new_n47710_ i1=$abc$109383$new_n47708_ i2=$abc$109383$new_n47706_ nq=$abc$109383$new_n47711_
+.subckt mux2_x1 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[104][14] i1=soc.ram.ram[108][14] q=$abc$109383$new_n47712_
 .subckt nand2_x0 i0=$abc$109383$new_n47712_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n47713_
-.subckt o2_x2 i0=soc.ram.ram[105][14] i1=$abc$109383$new_n44404_ q=$abc$109383$new_n47714_
+.subckt or2_x1 i0=soc.ram.ram[105][14] i1=$abc$109383$new_n44404_ q=$abc$109383$new_n47714_
 .subckt nand2_x0 i0=$abc$109383$new_n47714_ i1=$abc$109383$new_n45247_ nq=$abc$109383$new_n47715_
 .subckt inv_x0 i=soc.ram.ram[109][14] nq=$abc$109383$new_n47716_
-.subckt a2_x2 i0=$abc$109383$new_n47716_ i1=$abc$109383$new_n44237_ q=$abc$109383$new_n47717_
-.subckt ao22_x2 i0=$abc$109383$new_n47717_ i1=$abc$109383$new_n47715_ i2=$abc$109383$new_n47713_ q=$abc$109383$new_n47718_
-.subckt mx2_x2 cmd=$abc$109383$new_n43934_ i0=$abc$109383$new_n47718_ i1=$abc$109383$new_n47711_ q=$abc$109383$new_n47719_
+.subckt and2_x1 i0=$abc$109383$new_n47716_ i1=$abc$109383$new_n44237_ q=$abc$109383$new_n47717_
+.subckt and21nor_x1 i0=$abc$109383$new_n47717_ i1=$abc$109383$new_n47715_ i2=$abc$109383$new_n47713_ nq=$abc$109383$new_n47718_
+.subckt mux2_x1 cmd=$abc$109383$new_n43934_ i0=$abc$109383$new_n47718_ i1=$abc$109383$new_n47711_ q=$abc$109383$new_n47719_
 .subckt nand2_x0 i0=$abc$109383$new_n47719_ i1=$abc$109383$new_n44677_ nq=$abc$109383$new_n47720_
-.subckt mx2_x2 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[96][14] i1=soc.ram.ram[100][14] q=$abc$109383$new_n47721_
-.subckt mx2_x2 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[97][14] i1=soc.ram.ram[101][14] q=$abc$109383$new_n47722_
-.subckt mx2_x2 cmd=$abc$109383$new_n44150_ i0=$abc$109383$new_n47722_ i1=$abc$109383$new_n47721_ q=$abc$109383$new_n47723_
+.subckt mux2_x1 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[96][14] i1=soc.ram.ram[100][14] q=$abc$109383$new_n47721_
+.subckt mux2_x1 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[97][14] i1=soc.ram.ram[101][14] q=$abc$109383$new_n47722_
+.subckt mux2_x1 cmd=$abc$109383$new_n44150_ i0=$abc$109383$new_n47722_ i1=$abc$109383$new_n47721_ q=$abc$109383$new_n47723_
 .subckt nand2_x0 i0=$abc$109383$new_n47723_ i1=$abc$109383$new_n44494_ nq=$abc$109383$new_n47724_
-.subckt mx2_x2 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[98][14] i1=soc.ram.ram[102][14] q=$abc$109383$new_n47725_
-.subckt o2_x2 i0=$abc$109383$new_n47725_ i1=$abc$109383$new_n43987_ q=$abc$109383$new_n47726_
-.subckt mx2_x2 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[99][14] i1=soc.ram.ram[103][14] q=$abc$109383$new_n47727_
-.subckt ao22_x2 i0=$abc$109383$new_n44854_ i1=$abc$109383$new_n47727_ i2=$abc$109383$new_n43934_ q=$abc$109383$new_n47728_
+.subckt mux2_x1 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[98][14] i1=soc.ram.ram[102][14] q=$abc$109383$new_n47725_
+.subckt or2_x1 i0=$abc$109383$new_n47725_ i1=$abc$109383$new_n43987_ q=$abc$109383$new_n47726_
+.subckt mux2_x1 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[99][14] i1=soc.ram.ram[103][14] q=$abc$109383$new_n47727_
+.subckt and21nor_x1 i0=$abc$109383$new_n44854_ i1=$abc$109383$new_n47727_ i2=$abc$109383$new_n43934_ nq=$abc$109383$new_n47728_
 .subckt nand2_x0 i0=$abc$109383$new_n47728_ i1=$abc$109383$new_n47726_ nq=$abc$109383$new_n47729_
 .subckt nand3_x0 i0=$abc$109383$new_n47729_ i1=$abc$109383$new_n47724_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n47730_
 .subckt nand3_x0 i0=$abc$109383$new_n47730_ i1=$abc$109383$new_n47720_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n47731_
-.subckt a3_x2 i0=$abc$109383$new_n47731_ i1=$abc$109383$new_n47704_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n47732_
-.subckt o2_x2 i0=$abc$109383$new_n47732_ i1=$abc$109383$new_n47679_ q=$abc$109383$new_n47733_
+.subckt and3_x1 i0=$abc$109383$new_n47731_ i1=$abc$109383$new_n47704_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n47732_
+.subckt or2_x1 i0=$abc$109383$new_n47732_ i1=$abc$109383$new_n47679_ q=$abc$109383$new_n47733_
 .subckt nand2_x0 i0=$abc$109383$new_n47733_ i1=$abc$109383$new_n44040_ nq=$abc$109383$new_n47734_
-.subckt oa22_x2 i0=$abc$109383$new_n47734_ i1=$abc$109383$new_n47625_ i2=$abc$109383$new_n47503_ q=$abc$109383$new_n47735_
+.subckt or21nand_x1 i0=$abc$109383$new_n47734_ i1=$abc$109383$new_n47625_ i2=$abc$109383$new_n47503_ nq=$abc$109383$new_n47735_
 .subckt buf_x4 i=$abc$109383$new_n43282_ q=$abc$109383$new_n47736_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n47735_ i2=$abc$109383$new_n47490_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103254
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n47735_ i2=$abc$109383$new_n47490_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103254
 .subckt buf_x4 i=$abc$109383$new_n43281_ q=$abc$109383$new_n47738_
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[15] q=$abc$109383$new_n47739_
-.subckt a2_x2 i0=$abc$109383$new_n47739_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47740_
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[15] nq=$abc$109383$new_n47739_
+.subckt and2_x1 i0=$abc$109383$new_n47739_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47740_
 .subckt nand3_x0 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27594_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[15] nq=$abc$109383$new_n47741_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[15] nq=$abc$109383$new_n47742_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[15] nq=$abc$109383$new_n47743_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[15] nq=$abc$109383$new_n47744_
 .subckt inv_x0 i=soc.hyperram.sr[15] nq=$abc$109383$new_n47745_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n47745_ q=$abc$109383$new_n47746_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n47745_ q=$abc$109383$new_n47746_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[15] nq=$abc$109383$new_n47747_
 .subckt nor2_x0 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n47747_ nq=$abc$109383$new_n47748_
 .subckt nand4_x0 i0=$abc$109383$new_n47748_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n47749_
-.subckt a3_x2 i0=$abc$109383$new_n47749_ i1=$abc$109383$new_n47746_ i2=$abc$109383$new_n47744_ q=$abc$109383$new_n47750_
+.subckt and3_x1 i0=$abc$109383$new_n47749_ i1=$abc$109383$new_n47746_ i2=$abc$109383$new_n47744_ q=$abc$109383$new_n47750_
 .subckt nand4_x0 i0=$abc$109383$new_n47750_ i1=$abc$109383$new_n47743_ i2=$abc$109383$new_n47742_ i3=$abc$109383$new_n47741_ nq=$abc$109383$new_n47751_
-.subckt mx2_x2 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[81][15] i1=soc.ram.ram[85][15] q=$abc$109383$new_n47752_
-.subckt mx2_x2 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[80][15] i1=soc.ram.ram[84][15] q=$abc$109383$new_n47753_
-.subckt mx2_x2 cmd=$abc$109383$new_n44053_ i0=$abc$109383$new_n47753_ i1=$abc$109383$new_n47752_ q=$abc$109383$new_n47754_
+.subckt mux2_x1 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[81][15] i1=soc.ram.ram[85][15] q=$abc$109383$new_n47752_
+.subckt mux2_x1 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[80][15] i1=soc.ram.ram[84][15] q=$abc$109383$new_n47753_
+.subckt mux2_x1 cmd=$abc$109383$new_n44053_ i0=$abc$109383$new_n47753_ i1=$abc$109383$new_n47752_ q=$abc$109383$new_n47754_
 .subckt nor2_x0 i0=$abc$109383$new_n47754_ i1=$abc$109383$new_n43525_ nq=$abc$109383$new_n47755_
-.subckt mx2_x2 cmd=$abc$109383$new_n43742_ i0=soc.ram.ram[88][15] i1=soc.ram.ram[92][15] q=$abc$109383$new_n47756_
+.subckt mux2_x1 cmd=$abc$109383$new_n43742_ i0=soc.ram.ram[88][15] i1=soc.ram.ram[92][15] q=$abc$109383$new_n47756_
 .subckt nand2_x0 i0=$abc$109383$new_n47756_ i1=$abc$109383$new_n43634_ nq=$abc$109383$new_n47757_
-.subckt a2_x2 i0=$abc$109383$new_n47757_ i1=$abc$109383$new_n43648_ q=$abc$109383$new_n47758_
+.subckt and2_x1 i0=$abc$109383$new_n47757_ i1=$abc$109383$new_n43648_ q=$abc$109383$new_n47758_
 .subckt inv_x0 i=soc.ram.ram[93][15] nq=$abc$109383$new_n47759_
 .subckt nand2_x0 i0=$abc$109383$new_n47759_ i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n47760_
-.subckt ao22_x2 i0=soc.ram.ram[89][15] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n45093_ q=$abc$109383$new_n47761_
+.subckt and21nor_x1 i0=soc.ram.ram[89][15] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n45093_ nq=$abc$109383$new_n47761_
 .subckt nand2_x0 i0=$abc$109383$new_n47761_ i1=$abc$109383$new_n47760_ nq=$abc$109383$new_n47762_
-.subckt oa22_x2 i0=$abc$109383$new_n47762_ i1=$abc$109383$new_n47758_ i2=$abc$109383$new_n47755_ q=$abc$109383$new_n47763_
-.subckt o2_x2 i0=$abc$109383$new_n47763_ i1=$abc$109383$new_n44622_ q=$abc$109383$new_n47764_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[90][15] i1=soc.ram.ram[94][15] q=$abc$109383$new_n47765_
+.subckt or21nand_x1 i0=$abc$109383$new_n47762_ i1=$abc$109383$new_n47758_ i2=$abc$109383$new_n47755_ nq=$abc$109383$new_n47763_
+.subckt or2_x1 i0=$abc$109383$new_n47763_ i1=$abc$109383$new_n44622_ q=$abc$109383$new_n47764_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[90][15] i1=soc.ram.ram[94][15] q=$abc$109383$new_n47765_
 .subckt nand2_x0 i0=$abc$109383$new_n47765_ i1=$abc$109383$new_n43435_ nq=$abc$109383$new_n47766_
-.subckt o2_x2 i0=soc.ram.ram[91][15] i1=$abc$109383$new_n44338_ q=$abc$109383$new_n47767_
+.subckt or2_x1 i0=soc.ram.ram[91][15] i1=$abc$109383$new_n44338_ q=$abc$109383$new_n47767_
 .subckt nand2_x0 i0=$abc$109383$new_n47767_ i1=$abc$109383$new_n44214_ nq=$abc$109383$new_n47768_
 .subckt inv_x0 i=soc.ram.ram[95][15] nq=$abc$109383$new_n47769_
-.subckt a2_x2 i0=$abc$109383$new_n47769_ i1=$abc$109383$new_n44181_ q=$abc$109383$new_n47770_
-.subckt ao22_x2 i0=$abc$109383$new_n47770_ i1=$abc$109383$new_n47768_ i2=$abc$109383$new_n47766_ q=$abc$109383$new_n47771_
-.subckt a2_x2 i0=$abc$109383$new_n47771_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n47772_
+.subckt and2_x1 i0=$abc$109383$new_n47769_ i1=$abc$109383$new_n44181_ q=$abc$109383$new_n47770_
+.subckt and21nor_x1 i0=$abc$109383$new_n47770_ i1=$abc$109383$new_n47768_ i2=$abc$109383$new_n47766_ nq=$abc$109383$new_n47771_
+.subckt and2_x1 i0=$abc$109383$new_n47771_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n47772_
 .subckt inv_x0 i=soc.ram.ram[87][15] nq=$abc$109383$new_n47773_
 .subckt nand2_x0 i0=$abc$109383$new_n47773_ i1=$abc$109383$new_n43477_ nq=$abc$109383$new_n47774_
-.subckt ao22_x2 i0=soc.ram.ram[83][15] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n44044_ q=$abc$109383$new_n47775_
+.subckt and21nor_x1 i0=soc.ram.ram[83][15] i1=$abc$109383$new_n43484_ i2=$abc$109383$new_n44044_ nq=$abc$109383$new_n47775_
 .subckt nand2_x0 i0=$abc$109383$new_n47775_ i1=$abc$109383$new_n47774_ nq=$abc$109383$new_n47776_
-.subckt mx2_x2 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[82][15] i1=soc.ram.ram[86][15] q=$abc$109383$new_n47777_
+.subckt mux2_x1 cmd=$abc$109383$new_n43490_ i0=soc.ram.ram[82][15] i1=soc.ram.ram[86][15] q=$abc$109383$new_n47777_
 .subckt nand2_x0 i0=$abc$109383$new_n47777_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n47778_
 .subckt nand3_x0 i0=$abc$109383$new_n47778_ i1=$abc$109383$new_n47776_ i2=$abc$109383$new_n43664_ nq=$abc$109383$new_n47779_
 .subckt nand2_x0 i0=$abc$109383$new_n47779_ i1=$abc$109383$new_n43948_ nq=$abc$109383$new_n47780_
-.subckt ao22_x2 i0=$abc$109383$new_n47780_ i1=$abc$109383$new_n47772_ i2=$abc$109383$new_n43540_ q=$abc$109383$new_n47781_
-.subckt a2_x2 i0=$abc$109383$new_n47781_ i1=$abc$109383$new_n47764_ q=$abc$109383$new_n47782_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[72][15] i1=soc.ram.ram[76][15] q=$abc$109383$new_n47783_
+.subckt and21nor_x1 i0=$abc$109383$new_n47780_ i1=$abc$109383$new_n47772_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n47781_
+.subckt and2_x1 i0=$abc$109383$new_n47781_ i1=$abc$109383$new_n47764_ q=$abc$109383$new_n47782_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[72][15] i1=soc.ram.ram[76][15] q=$abc$109383$new_n47783_
 .subckt nand2_x0 i0=$abc$109383$new_n47783_ i1=$abc$109383$new_n44179_ nq=$abc$109383$new_n47784_
 .subckt inv_x0 i=soc.ram.ram[77][15] nq=$abc$109383$new_n47785_
-.subckt a2_x2 i0=$abc$109383$new_n47785_ i1=$abc$109383$new_n44098_ q=$abc$109383$new_n47786_
-.subckt o2_x2 i0=soc.ram.ram[73][15] i1=$abc$109383$new_n44186_ q=$abc$109383$new_n47787_
+.subckt and2_x1 i0=$abc$109383$new_n47785_ i1=$abc$109383$new_n44098_ q=$abc$109383$new_n47786_
+.subckt or2_x1 i0=soc.ram.ram[73][15] i1=$abc$109383$new_n44186_ q=$abc$109383$new_n47787_
 .subckt nand2_x0 i0=$abc$109383$new_n47787_ i1=$abc$109383$new_n43415_ nq=$abc$109383$new_n47788_
-.subckt ao22_x2 i0=$abc$109383$new_n47788_ i1=$abc$109383$new_n47786_ i2=$abc$109383$new_n47784_ q=$abc$109383$new_n47789_
-.subckt a2_x2 i0=$abc$109383$new_n47789_ i1=$abc$109383$new_n44390_ q=$abc$109383$new_n47790_
-.subckt mx2_x2 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[64][15] i1=soc.ram.ram[68][15] q=$abc$109383$new_n47791_
-.subckt a2_x2 i0=$abc$109383$new_n47791_ i1=$abc$109383$new_n43428_ q=$abc$109383$new_n47792_
-.subckt ao22_x2 i0=soc.ram.ram[65][15] i1=$abc$109383$new_n43527_ i2=$abc$109383$new_n43481_ q=$abc$109383$new_n47793_
-.subckt ao22_x2 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[69][15] i2=$abc$109383$new_n47793_ q=$abc$109383$new_n47794_
+.subckt and21nor_x1 i0=$abc$109383$new_n47788_ i1=$abc$109383$new_n47786_ i2=$abc$109383$new_n47784_ nq=$abc$109383$new_n47789_
+.subckt and2_x1 i0=$abc$109383$new_n47789_ i1=$abc$109383$new_n44390_ q=$abc$109383$new_n47790_
+.subckt mux2_x1 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[64][15] i1=soc.ram.ram[68][15] q=$abc$109383$new_n47791_
+.subckt and2_x1 i0=$abc$109383$new_n47791_ i1=$abc$109383$new_n43428_ q=$abc$109383$new_n47792_
+.subckt and21nor_x1 i0=soc.ram.ram[65][15] i1=$abc$109383$new_n43527_ i2=$abc$109383$new_n43481_ nq=$abc$109383$new_n47793_
+.subckt and21nor_x1 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[69][15] i2=$abc$109383$new_n47793_ nq=$abc$109383$new_n47794_
 .subckt nor3_x0 i0=$abc$109383$new_n47794_ i1=$abc$109383$new_n47792_ i2=$abc$109383$new_n44228_ nq=$abc$109383$new_n47795_
-.subckt ao22_x2 i0=$abc$109383$new_n47795_ i1=$abc$109383$new_n47790_ i2=$abc$109383$new_n43331_ q=$abc$109383$new_n47796_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[74][15] i1=soc.ram.ram[75][15] q=$abc$109383$new_n47797_
-.subckt a2_x2 i0=$abc$109383$new_n47797_ i1=$abc$109383$new_n43930_ q=$abc$109383$new_n47798_
-.subckt mx2_x2 cmd=$abc$109383$new_n43698_ i0=soc.ram.ram[78][15] i1=soc.ram.ram[79][15] q=$abc$109383$new_n47799_
-.subckt oa22_x2 i0=$abc$109383$new_n44118_ i1=$abc$109383$new_n47799_ i2=$abc$109383$new_n43391_ q=$abc$109383$new_n47800_
+.subckt and21nor_x1 i0=$abc$109383$new_n47795_ i1=$abc$109383$new_n47790_ i2=$abc$109383$new_n43331_ nq=$abc$109383$new_n47796_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[74][15] i1=soc.ram.ram[75][15] q=$abc$109383$new_n47797_
+.subckt and2_x1 i0=$abc$109383$new_n47797_ i1=$abc$109383$new_n43930_ q=$abc$109383$new_n47798_
+.subckt mux2_x1 cmd=$abc$109383$new_n43698_ i0=soc.ram.ram[78][15] i1=soc.ram.ram[79][15] q=$abc$109383$new_n47799_
+.subckt or21nand_x1 i0=$abc$109383$new_n44118_ i1=$abc$109383$new_n47799_ i2=$abc$109383$new_n43391_ nq=$abc$109383$new_n47800_
 .subckt nor2_x0 i0=$abc$109383$new_n47800_ i1=$abc$109383$new_n47798_ nq=$abc$109383$new_n47801_
-.subckt mx2_x2 cmd=$abc$109383$new_n43481_ i0=soc.ram.ram[66][15] i1=soc.ram.ram[67][15] q=$abc$109383$new_n47802_
-.subckt a2_x2 i0=$abc$109383$new_n47802_ i1=$abc$109383$new_n43702_ q=$abc$109383$new_n47803_
-.subckt mx2_x2 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[70][15] i1=soc.ram.ram[71][15] q=$abc$109383$new_n47804_
-.subckt oa22_x2 i0=$abc$109383$new_n45087_ i1=$abc$109383$new_n47804_ i2=$abc$109383$new_n43524_ q=$abc$109383$new_n47805_
+.subckt mux2_x1 cmd=$abc$109383$new_n43481_ i0=soc.ram.ram[66][15] i1=soc.ram.ram[67][15] q=$abc$109383$new_n47802_
+.subckt and2_x1 i0=$abc$109383$new_n47802_ i1=$abc$109383$new_n43702_ q=$abc$109383$new_n47803_
+.subckt mux2_x1 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[70][15] i1=soc.ram.ram[71][15] q=$abc$109383$new_n47804_
+.subckt or21nand_x1 i0=$abc$109383$new_n45087_ i1=$abc$109383$new_n47804_ i2=$abc$109383$new_n43524_ nq=$abc$109383$new_n47805_
 .subckt nor2_x0 i0=$abc$109383$new_n47805_ i1=$abc$109383$new_n47803_ nq=$abc$109383$new_n47806_
-.subckt ao22_x2 i0=$abc$109383$new_n47806_ i1=$abc$109383$new_n47801_ i2=$abc$109383$new_n43842_ q=$abc$109383$new_n47807_
-.subckt ao22_x2 i0=$abc$109383$new_n47807_ i1=$abc$109383$new_n47796_ i2=$abc$109383$new_n43326_ q=$abc$109383$new_n47808_
-.subckt ao22_x2 i0=$abc$109383$new_n47808_ i1=$abc$109383$new_n47782_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n47809_
-.subckt mx2_x2 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[97][15] i1=soc.ram.ram[101][15] q=$abc$109383$new_n47810_
-.subckt ao22_x2 i0=$abc$109383$new_n43355_ i1=$abc$109383$new_n47810_ i2=$abc$109383$new_n43542_ q=$abc$109383$new_n47811_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[96][15] i1=soc.ram.ram[100][15] q=$abc$109383$new_n47812_
-.subckt ao22_x2 i0=$abc$109383$new_n43546_ i1=$abc$109383$new_n47812_ i2=$abc$109383$new_n47811_ q=$abc$109383$new_n47813_
-.subckt mx2_x2 cmd=$abc$109383$new_n43336_ i0=soc.ram.ram[99][15] i1=soc.ram.ram[103][15] q=$abc$109383$new_n47814_
-.subckt ao22_x2 i0=$abc$109383$new_n43355_ i1=$abc$109383$new_n47814_ i2=$abc$109383$new_n43401_ q=$abc$109383$new_n47815_
-.subckt mx2_x2 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[98][15] i1=soc.ram.ram[102][15] q=$abc$109383$new_n47816_
-.subckt ao22_x2 i0=$abc$109383$new_n43377_ i1=$abc$109383$new_n47816_ i2=$abc$109383$new_n47815_ q=$abc$109383$new_n47817_
-.subckt o2_x2 i0=$abc$109383$new_n47817_ i1=$abc$109383$new_n47813_ q=$abc$109383$new_n47818_
-.subckt mx2_x2 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[105][15] i1=soc.ram.ram[109][15] q=$abc$109383$new_n47819_
-.subckt ao22_x2 i0=$abc$109383$new_n43355_ i1=$abc$109383$new_n47819_ i2=$abc$109383$new_n43542_ q=$abc$109383$new_n47820_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[104][15] i1=soc.ram.ram[108][15] q=$abc$109383$new_n47821_
-.subckt ao22_x2 i0=$abc$109383$new_n43546_ i1=$abc$109383$new_n47821_ i2=$abc$109383$new_n47820_ q=$abc$109383$new_n47822_
-.subckt mx2_x2 cmd=$abc$109383$new_n43417_ i0=soc.ram.ram[107][15] i1=soc.ram.ram[111][15] q=$abc$109383$new_n47823_
-.subckt o2_x2 i0=$abc$109383$new_n47823_ i1=$abc$109383$new_n43487_ q=$abc$109383$new_n47824_
-.subckt mx2_x2 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[106][15] i1=soc.ram.ram[110][15] q=$abc$109383$new_n47825_
-.subckt ao22_x2 i0=$abc$109383$new_n43361_ i1=$abc$109383$new_n47825_ i2=$abc$109383$new_n43563_ q=$abc$109383$new_n47826_
-.subckt a2_x2 i0=$abc$109383$new_n47826_ i1=$abc$109383$new_n47824_ q=$abc$109383$new_n47827_
-.subckt o2_x2 i0=$abc$109383$new_n47827_ i1=$abc$109383$new_n47822_ q=$abc$109383$new_n47828_
-.subckt mx2_x2 cmd=$abc$109383$new_n44523_ i0=$abc$109383$new_n47828_ i1=$abc$109383$new_n47818_ q=$abc$109383$new_n47829_
-.subckt o2_x2 i0=$abc$109383$new_n47829_ i1=$abc$109383$new_n44041_ q=$abc$109383$new_n47830_
-.subckt mx2_x2 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[121][15] i1=soc.ram.ram[125][15] q=$abc$109383$new_n47831_
-.subckt ao22_x2 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n47831_ i2=$abc$109383$new_n43329_ q=$abc$109383$new_n47832_
-.subckt mx2_x2 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[120][15] i1=soc.ram.ram[124][15] q=$abc$109383$new_n47833_
-.subckt ao22_x2 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n47833_ i2=$abc$109383$new_n47832_ q=$abc$109383$new_n47834_
-.subckt mx2_x2 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[123][15] i1=soc.ram.ram[127][15] q=$abc$109383$new_n47835_
-.subckt ao22_x2 i0=$abc$109383$new_n43427_ i1=$abc$109383$new_n47835_ i2=$abc$109383$new_n43579_ q=$abc$109383$new_n47836_
-.subckt mx2_x2 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[122][15] i1=soc.ram.ram[126][15] q=$abc$109383$new_n47837_
-.subckt ao22_x2 i0=$abc$109383$new_n43642_ i1=$abc$109383$new_n47837_ i2=$abc$109383$new_n47836_ q=$abc$109383$new_n47838_
-.subckt o3_x2 i0=$abc$109383$new_n47838_ i1=$abc$109383$new_n47834_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n47839_
+.subckt and21nor_x1 i0=$abc$109383$new_n47806_ i1=$abc$109383$new_n47801_ i2=$abc$109383$new_n43842_ nq=$abc$109383$new_n47807_
+.subckt and21nor_x1 i0=$abc$109383$new_n47807_ i1=$abc$109383$new_n47796_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n47808_
+.subckt and21nor_x1 i0=$abc$109383$new_n47808_ i1=$abc$109383$new_n47782_ i2=$abc$109383$new_n44444_ nq=$abc$109383$new_n47809_
+.subckt mux2_x1 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[97][15] i1=soc.ram.ram[101][15] q=$abc$109383$new_n47810_
+.subckt and21nor_x1 i0=$abc$109383$new_n43355_ i1=$abc$109383$new_n47810_ i2=$abc$109383$new_n43542_ nq=$abc$109383$new_n47811_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[96][15] i1=soc.ram.ram[100][15] q=$abc$109383$new_n47812_
+.subckt and21nor_x1 i0=$abc$109383$new_n43546_ i1=$abc$109383$new_n47812_ i2=$abc$109383$new_n47811_ nq=$abc$109383$new_n47813_
+.subckt mux2_x1 cmd=$abc$109383$new_n43336_ i0=soc.ram.ram[99][15] i1=soc.ram.ram[103][15] q=$abc$109383$new_n47814_
+.subckt and21nor_x1 i0=$abc$109383$new_n43355_ i1=$abc$109383$new_n47814_ i2=$abc$109383$new_n43401_ nq=$abc$109383$new_n47815_
+.subckt mux2_x1 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[98][15] i1=soc.ram.ram[102][15] q=$abc$109383$new_n47816_
+.subckt and21nor_x1 i0=$abc$109383$new_n43377_ i1=$abc$109383$new_n47816_ i2=$abc$109383$new_n47815_ nq=$abc$109383$new_n47817_
+.subckt or2_x1 i0=$abc$109383$new_n47817_ i1=$abc$109383$new_n47813_ q=$abc$109383$new_n47818_
+.subckt mux2_x1 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[105][15] i1=soc.ram.ram[109][15] q=$abc$109383$new_n47819_
+.subckt and21nor_x1 i0=$abc$109383$new_n43355_ i1=$abc$109383$new_n47819_ i2=$abc$109383$new_n43542_ nq=$abc$109383$new_n47820_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[104][15] i1=soc.ram.ram[108][15] q=$abc$109383$new_n47821_
+.subckt and21nor_x1 i0=$abc$109383$new_n43546_ i1=$abc$109383$new_n47821_ i2=$abc$109383$new_n47820_ nq=$abc$109383$new_n47822_
+.subckt mux2_x1 cmd=$abc$109383$new_n43417_ i0=soc.ram.ram[107][15] i1=soc.ram.ram[111][15] q=$abc$109383$new_n47823_
+.subckt or2_x1 i0=$abc$109383$new_n47823_ i1=$abc$109383$new_n43487_ q=$abc$109383$new_n47824_
+.subckt mux2_x1 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[106][15] i1=soc.ram.ram[110][15] q=$abc$109383$new_n47825_
+.subckt and21nor_x1 i0=$abc$109383$new_n43361_ i1=$abc$109383$new_n47825_ i2=$abc$109383$new_n43563_ nq=$abc$109383$new_n47826_
+.subckt and2_x1 i0=$abc$109383$new_n47826_ i1=$abc$109383$new_n47824_ q=$abc$109383$new_n47827_
+.subckt or2_x1 i0=$abc$109383$new_n47827_ i1=$abc$109383$new_n47822_ q=$abc$109383$new_n47828_
+.subckt mux2_x1 cmd=$abc$109383$new_n44523_ i0=$abc$109383$new_n47828_ i1=$abc$109383$new_n47818_ q=$abc$109383$new_n47829_
+.subckt or2_x1 i0=$abc$109383$new_n47829_ i1=$abc$109383$new_n44041_ q=$abc$109383$new_n47830_
+.subckt mux2_x1 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[121][15] i1=soc.ram.ram[125][15] q=$abc$109383$new_n47831_
+.subckt and21nor_x1 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n47831_ i2=$abc$109383$new_n43329_ nq=$abc$109383$new_n47832_
+.subckt mux2_x1 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[120][15] i1=soc.ram.ram[124][15] q=$abc$109383$new_n47833_
+.subckt and21nor_x1 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n47833_ i2=$abc$109383$new_n47832_ nq=$abc$109383$new_n47834_
+.subckt mux2_x1 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[123][15] i1=soc.ram.ram[127][15] q=$abc$109383$new_n47835_
+.subckt and21nor_x1 i0=$abc$109383$new_n43427_ i1=$abc$109383$new_n47835_ i2=$abc$109383$new_n43579_ nq=$abc$109383$new_n47836_
+.subckt mux2_x1 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[122][15] i1=soc.ram.ram[126][15] q=$abc$109383$new_n47837_
+.subckt and21nor_x1 i0=$abc$109383$new_n43642_ i1=$abc$109383$new_n47837_ i2=$abc$109383$new_n47836_ nq=$abc$109383$new_n47838_
+.subckt or3_x1 i0=$abc$109383$new_n47838_ i1=$abc$109383$new_n47834_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n47839_
 .subckt nand2_x0 i0=soc.ram.ram[113][15] i1=$abc$109383$new_n44043_ nq=$abc$109383$new_n47840_
 .subckt inv_x0 i=soc.ram.ram[117][15] nq=$abc$109383$new_n47841_
-.subckt ao22_x2 i0=$abc$109383$new_n47841_ i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n43416_ q=$abc$109383$new_n47842_
+.subckt and21nor_x1 i0=$abc$109383$new_n47841_ i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n43416_ nq=$abc$109383$new_n47842_
 .subckt nand2_x0 i0=$abc$109383$new_n47842_ i1=$abc$109383$new_n47840_ nq=$abc$109383$new_n47843_
-.subckt oa22_x2 i0=soc.ram.ram[116][15] i1=$abc$109383$new_n43952_ i2=$abc$109383$new_n43796_ q=$abc$109383$new_n47844_
-.subckt oa22_x2 i0=$abc$109383$new_n43561_ i1=soc.ram.ram[112][15] i2=$abc$109383$new_n47844_ q=$abc$109383$new_n47845_
-.subckt a2_x2 i0=$abc$109383$new_n47845_ i1=$abc$109383$new_n44115_ q=$abc$109383$new_n47846_
+.subckt or21nand_x1 i0=soc.ram.ram[116][15] i1=$abc$109383$new_n43952_ i2=$abc$109383$new_n43796_ nq=$abc$109383$new_n47844_
+.subckt or21nand_x1 i0=$abc$109383$new_n43561_ i1=soc.ram.ram[112][15] i2=$abc$109383$new_n47844_ nq=$abc$109383$new_n47845_
+.subckt and2_x1 i0=$abc$109383$new_n47845_ i1=$abc$109383$new_n44115_ q=$abc$109383$new_n47846_
 .subckt nand2_x0 i0=$abc$109383$new_n47846_ i1=$abc$109383$new_n47843_ nq=$abc$109383$new_n47847_
 .subckt nand2_x0 i0=soc.ram.ram[119][15] i1=$abc$109383$new_n45579_ nq=$abc$109383$new_n47848_
 .subckt inv_x0 i=soc.ram.ram[115][15] nq=$abc$109383$new_n47849_
-.subckt ao22_x2 i0=$abc$109383$new_n47849_ i1=$abc$109383$new_n43953_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n47850_
+.subckt and21nor_x1 i0=$abc$109383$new_n47849_ i1=$abc$109383$new_n43953_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n47850_
 .subckt nand2_x0 i0=$abc$109383$new_n47850_ i1=$abc$109383$new_n47848_ nq=$abc$109383$new_n47851_
-.subckt oa22_x2 i0=soc.ram.ram[118][15] i1=$abc$109383$new_n44137_ i2=$abc$109383$new_n43546_ q=$abc$109383$new_n47852_
-.subckt oa22_x2 i0=$abc$109383$new_n46495_ i1=soc.ram.ram[114][15] i2=$abc$109383$new_n47852_ q=$abc$109383$new_n47853_
-.subckt a2_x2 i0=$abc$109383$new_n47853_ i1=$abc$109383$new_n44212_ q=$abc$109383$new_n47854_
+.subckt or21nand_x1 i0=soc.ram.ram[118][15] i1=$abc$109383$new_n44137_ i2=$abc$109383$new_n43546_ nq=$abc$109383$new_n47852_
+.subckt or21nand_x1 i0=$abc$109383$new_n46495_ i1=soc.ram.ram[114][15] i2=$abc$109383$new_n47852_ nq=$abc$109383$new_n47853_
+.subckt and2_x1 i0=$abc$109383$new_n47853_ i1=$abc$109383$new_n44212_ q=$abc$109383$new_n47854_
 .subckt nand2_x0 i0=$abc$109383$new_n47854_ i1=$abc$109383$new_n47851_ nq=$abc$109383$new_n47855_
 .subckt nand3_x0 i0=$abc$109383$new_n47855_ i1=$abc$109383$new_n47847_ i2=$abc$109383$new_n44086_ nq=$abc$109383$new_n47856_
-.subckt a2_x2 i0=$abc$109383$new_n47856_ i1=$abc$109383$new_n47839_ q=$abc$109383$new_n47857_
-.subckt ao22_x2 i0=$abc$109383$new_n43921_ i1=$abc$109383$new_n47857_ i2=$abc$109383$new_n47830_ q=$abc$109383$new_n47858_
+.subckt and2_x1 i0=$abc$109383$new_n47856_ i1=$abc$109383$new_n47839_ q=$abc$109383$new_n47857_
+.subckt and21nor_x1 i0=$abc$109383$new_n43921_ i1=$abc$109383$new_n47857_ i2=$abc$109383$new_n47830_ nq=$abc$109383$new_n47858_
 .subckt nor2_x0 i0=$abc$109383$new_n47858_ i1=$abc$109383$new_n44739_ nq=$abc$109383$new_n47859_
-.subckt o3_x2 i0=$abc$109383$new_n47859_ i1=$abc$109383$new_n47809_ i2=$abc$109383$new_n46883_ q=$abc$109383$new_n47860_
-.subckt mx2_x2 cmd=$abc$109383$new_n44047_ i0=soc.ram.ram[2][15] i1=soc.ram.ram[3][15] q=$abc$109383$new_n47861_
-.subckt o2_x2 i0=$abc$109383$new_n47861_ i1=$abc$109383$new_n43965_ q=$abc$109383$new_n47862_
-.subckt mx2_x2 cmd=$abc$109383$new_n43796_ i0=soc.ram.ram[6][15] i1=soc.ram.ram[7][15] q=$abc$109383$new_n47863_
-.subckt ao22_x2 i0=$abc$109383$new_n47863_ i1=$abc$109383$new_n43805_ i2=$abc$109383$new_n43458_ q=$abc$109383$new_n47864_
+.subckt or3_x1 i0=$abc$109383$new_n47859_ i1=$abc$109383$new_n47809_ i2=$abc$109383$new_n46883_ q=$abc$109383$new_n47860_
+.subckt mux2_x1 cmd=$abc$109383$new_n44047_ i0=soc.ram.ram[2][15] i1=soc.ram.ram[3][15] q=$abc$109383$new_n47861_
+.subckt or2_x1 i0=$abc$109383$new_n47861_ i1=$abc$109383$new_n43965_ q=$abc$109383$new_n47862_
+.subckt mux2_x1 cmd=$abc$109383$new_n43796_ i0=soc.ram.ram[6][15] i1=soc.ram.ram[7][15] q=$abc$109383$new_n47863_
+.subckt and21nor_x1 i0=$abc$109383$new_n47863_ i1=$abc$109383$new_n43805_ i2=$abc$109383$new_n43458_ nq=$abc$109383$new_n47864_
 .subckt nand2_x0 i0=$abc$109383$new_n47864_ i1=$abc$109383$new_n47862_ nq=$abc$109383$new_n47865_
-.subckt mx2_x2 cmd=$abc$109383$new_n44053_ i0=soc.ram.ram[0][15] i1=soc.ram.ram[1][15] q=$abc$109383$new_n47866_
+.subckt mux2_x1 cmd=$abc$109383$new_n44053_ i0=soc.ram.ram[0][15] i1=soc.ram.ram[1][15] q=$abc$109383$new_n47866_
 .subckt nor2_x0 i0=$abc$109383$new_n47866_ i1=$abc$109383$new_n44234_ nq=$abc$109383$new_n47867_
 .subckt inv_x0 i=soc.ram.ram[4][15] nq=$abc$109383$new_n47868_
 .subckt inv_x0 i=soc.ram.ram[5][15] nq=$abc$109383$new_n47869_
-.subckt mx2_x2 cmd=$abc$109383$new_n43333_ i0=$abc$109383$new_n47869_ i1=$abc$109383$new_n47868_ q=$abc$109383$new_n47870_
-.subckt oa22_x2 i0=$abc$109383$new_n47870_ i1=$abc$109383$new_n44010_ i2=$abc$109383$new_n43564_ q=$abc$109383$new_n47871_
-.subckt ao22_x2 i0=$abc$109383$new_n47871_ i1=$abc$109383$new_n47867_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n47872_
-.subckt a2_x2 i0=$abc$109383$new_n47872_ i1=$abc$109383$new_n47865_ q=$abc$109383$new_n47873_
+.subckt mux2_x1 cmd=$abc$109383$new_n43333_ i0=$abc$109383$new_n47869_ i1=$abc$109383$new_n47868_ q=$abc$109383$new_n47870_
+.subckt or21nand_x1 i0=$abc$109383$new_n47870_ i1=$abc$109383$new_n44010_ i2=$abc$109383$new_n43564_ nq=$abc$109383$new_n47871_
+.subckt and21nor_x1 i0=$abc$109383$new_n47871_ i1=$abc$109383$new_n47867_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n47872_
+.subckt and2_x1 i0=$abc$109383$new_n47872_ i1=$abc$109383$new_n47865_ q=$abc$109383$new_n47873_
 .subckt nand2_x0 i0=soc.ram.ram[19][15] i1=$abc$109383$new_n44902_ nq=$abc$109383$new_n47874_
 .subckt inv_x0 i=soc.ram.ram[23][15] nq=$abc$109383$new_n47875_
-.subckt ao22_x2 i0=$abc$109383$new_n47875_ i1=$abc$109383$new_n44158_ i2=$abc$109383$new_n46934_ q=$abc$109383$new_n47876_
+.subckt and21nor_x1 i0=$abc$109383$new_n47875_ i1=$abc$109383$new_n44158_ i2=$abc$109383$new_n46934_ nq=$abc$109383$new_n47876_
 .subckt nand2_x0 i0=$abc$109383$new_n47876_ i1=$abc$109383$new_n47874_ nq=$abc$109383$new_n47877_
-.subckt oa22_x2 i0=soc.ram.ram[22][15] i1=$abc$109383$new_n44072_ i2=$abc$109383$new_n44401_ q=$abc$109383$new_n47878_
-.subckt oa22_x2 i0=$abc$109383$new_n44778_ i1=soc.ram.ram[18][15] i2=$abc$109383$new_n47878_ q=$abc$109383$new_n47879_
-.subckt a2_x2 i0=$abc$109383$new_n47879_ i1=$abc$109383$new_n43458_ q=$abc$109383$new_n47880_
+.subckt or21nand_x1 i0=soc.ram.ram[22][15] i1=$abc$109383$new_n44072_ i2=$abc$109383$new_n44401_ nq=$abc$109383$new_n47878_
+.subckt or21nand_x1 i0=$abc$109383$new_n44778_ i1=soc.ram.ram[18][15] i2=$abc$109383$new_n47878_ nq=$abc$109383$new_n47879_
+.subckt and2_x1 i0=$abc$109383$new_n47879_ i1=$abc$109383$new_n43458_ q=$abc$109383$new_n47880_
 .subckt nand2_x0 i0=$abc$109383$new_n47880_ i1=$abc$109383$new_n47877_ nq=$abc$109383$new_n47881_
 .subckt nand2_x0 i0=soc.ram.ram[17][15] i1=$abc$109383$new_n46495_ nq=$abc$109383$new_n47882_
 .subckt inv_x0 i=soc.ram.ram[21][15] nq=$abc$109383$new_n47883_
-.subckt ao22_x2 i0=$abc$109383$new_n47883_ i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n47884_
-.subckt a2_x2 i0=$abc$109383$new_n47884_ i1=$abc$109383$new_n47882_ q=$abc$109383$new_n47885_
-.subckt oa22_x2 i0=soc.ram.ram[20][15] i1=$abc$109383$new_n44163_ i2=$abc$109383$new_n43651_ q=$abc$109383$new_n47886_
-.subckt oa22_x2 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[16][15] i2=$abc$109383$new_n47886_ q=$abc$109383$new_n47887_
+.subckt and21nor_x1 i0=$abc$109383$new_n47883_ i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n47884_
+.subckt and2_x1 i0=$abc$109383$new_n47884_ i1=$abc$109383$new_n47882_ q=$abc$109383$new_n47885_
+.subckt or21nand_x1 i0=soc.ram.ram[20][15] i1=$abc$109383$new_n44163_ i2=$abc$109383$new_n43651_ nq=$abc$109383$new_n47886_
+.subckt or21nand_x1 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[16][15] i2=$abc$109383$new_n47886_ nq=$abc$109383$new_n47887_
 .subckt nand2_x0 i0=$abc$109383$new_n47887_ i1=$abc$109383$new_n44391_ nq=$abc$109383$new_n47888_
-.subckt ao22_x2 i0=$abc$109383$new_n47888_ i1=$abc$109383$new_n47885_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n47889_
-.subckt a2_x2 i0=$abc$109383$new_n47889_ i1=$abc$109383$new_n47881_ q=$abc$109383$new_n47890_
-.subckt ao22_x2 i0=$abc$109383$new_n47890_ i1=$abc$109383$new_n47873_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n47891_
-.subckt mx2_x2 cmd=$abc$109383$new_n43579_ i0=soc.ram.ram[48][15] i1=soc.ram.ram[50][15] q=$abc$109383$new_n47892_
-.subckt a2_x2 i0=$abc$109383$new_n47892_ i1=$abc$109383$new_n44421_ q=$abc$109383$new_n47893_
-.subckt mx2_x2 cmd=$abc$109383$new_n43563_ i0=soc.ram.ram[52][15] i1=soc.ram.ram[54][15] q=$abc$109383$new_n47894_
-.subckt oa22_x2 i0=$abc$109383$new_n47894_ i1=$abc$109383$new_n44093_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n47895_
+.subckt and21nor_x1 i0=$abc$109383$new_n47888_ i1=$abc$109383$new_n47885_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n47889_
+.subckt and2_x1 i0=$abc$109383$new_n47889_ i1=$abc$109383$new_n47881_ q=$abc$109383$new_n47890_
+.subckt and21nor_x1 i0=$abc$109383$new_n47890_ i1=$abc$109383$new_n47873_ i2=$abc$109383$new_n43780_ nq=$abc$109383$new_n47891_
+.subckt mux2_x1 cmd=$abc$109383$new_n43579_ i0=soc.ram.ram[48][15] i1=soc.ram.ram[50][15] q=$abc$109383$new_n47892_
+.subckt and2_x1 i0=$abc$109383$new_n47892_ i1=$abc$109383$new_n44421_ q=$abc$109383$new_n47893_
+.subckt mux2_x1 cmd=$abc$109383$new_n43563_ i0=soc.ram.ram[52][15] i1=soc.ram.ram[54][15] q=$abc$109383$new_n47894_
+.subckt or21nand_x1 i0=$abc$109383$new_n47894_ i1=$abc$109383$new_n44093_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n47895_
 .subckt nor2_x0 i0=$abc$109383$new_n47895_ i1=$abc$109383$new_n47893_ nq=$abc$109383$new_n47896_
-.subckt mx2_x2 cmd=$abc$109383$new_n43438_ i0=soc.ram.ram[49][15] i1=soc.ram.ram[51][15] q=$abc$109383$new_n47897_
-.subckt a2_x2 i0=$abc$109383$new_n47897_ i1=$abc$109383$new_n45157_ q=$abc$109383$new_n47898_
-.subckt mx2_x2 cmd=$abc$109383$new_n43563_ i0=soc.ram.ram[53][15] i1=soc.ram.ram[55][15] q=$abc$109383$new_n47899_
-.subckt oa22_x2 i0=$abc$109383$new_n47899_ i1=$abc$109383$new_n44010_ i2=$abc$109383$new_n44596_ q=$abc$109383$new_n47900_
+.subckt mux2_x1 cmd=$abc$109383$new_n43438_ i0=soc.ram.ram[49][15] i1=soc.ram.ram[51][15] q=$abc$109383$new_n47897_
+.subckt and2_x1 i0=$abc$109383$new_n47897_ i1=$abc$109383$new_n45157_ q=$abc$109383$new_n47898_
+.subckt mux2_x1 cmd=$abc$109383$new_n43563_ i0=soc.ram.ram[53][15] i1=soc.ram.ram[55][15] q=$abc$109383$new_n47899_
+.subckt or21nand_x1 i0=$abc$109383$new_n47899_ i1=$abc$109383$new_n44010_ i2=$abc$109383$new_n44596_ nq=$abc$109383$new_n47900_
 .subckt nor2_x0 i0=$abc$109383$new_n47900_ i1=$abc$109383$new_n47898_ nq=$abc$109383$new_n47901_
-.subckt ao22_x2 i0=$abc$109383$new_n47901_ i1=$abc$109383$new_n47896_ i2=$abc$109383$new_n43467_ q=$abc$109383$new_n47902_
-.subckt mx2_x2 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[33][15] i1=soc.ram.ram[37][15] q=$abc$109383$new_n47903_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[35][15] i1=soc.ram.ram[39][15] q=$abc$109383$new_n47904_
-.subckt mx2_x2 cmd=$abc$109383$new_n44060_ i0=$abc$109383$new_n47904_ i1=$abc$109383$new_n47903_ q=$abc$109383$new_n47905_
+.subckt and21nor_x1 i0=$abc$109383$new_n47901_ i1=$abc$109383$new_n47896_ i2=$abc$109383$new_n43467_ nq=$abc$109383$new_n47902_
+.subckt mux2_x1 cmd=$abc$109383$new_n43612_ i0=soc.ram.ram[33][15] i1=soc.ram.ram[37][15] q=$abc$109383$new_n47903_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[35][15] i1=soc.ram.ram[39][15] q=$abc$109383$new_n47904_
+.subckt mux2_x1 cmd=$abc$109383$new_n44060_ i0=$abc$109383$new_n47904_ i1=$abc$109383$new_n47903_ q=$abc$109383$new_n47905_
 .subckt nor2_x0 i0=$abc$109383$new_n47905_ i1=$abc$109383$new_n44180_ nq=$abc$109383$new_n47906_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[32][15] i1=soc.ram.ram[36][15] q=$abc$109383$new_n47907_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[34][15] i1=soc.ram.ram[38][15] q=$abc$109383$new_n47908_
-.subckt mx2_x2 cmd=$abc$109383$new_n43329_ i0=$abc$109383$new_n47908_ i1=$abc$109383$new_n47907_ q=$abc$109383$new_n47909_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[32][15] i1=soc.ram.ram[36][15] q=$abc$109383$new_n47907_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[34][15] i1=soc.ram.ram[38][15] q=$abc$109383$new_n47908_
+.subckt mux2_x1 cmd=$abc$109383$new_n43329_ i0=$abc$109383$new_n47908_ i1=$abc$109383$new_n47907_ q=$abc$109383$new_n47909_
 .subckt nor2_x0 i0=$abc$109383$new_n47909_ i1=$abc$109383$new_n45094_ nq=$abc$109383$new_n47910_
-.subckt ao22_x2 i0=$abc$109383$new_n47910_ i1=$abc$109383$new_n47906_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n47911_
-.subckt ao22_x2 i0=$abc$109383$new_n47911_ i1=$abc$109383$new_n47902_ i2=$abc$109383$new_n43409_ q=$abc$109383$new_n47912_
-.subckt ao22_x2 i0=$abc$109383$new_n47912_ i1=$abc$109383$new_n47891_ i2=$abc$109383$new_n44655_ q=$abc$109383$new_n47913_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[42][15] i1=soc.ram.ram[46][15] q=$abc$109383$new_n47914_
+.subckt and21nor_x1 i0=$abc$109383$new_n47910_ i1=$abc$109383$new_n47906_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n47911_
+.subckt and21nor_x1 i0=$abc$109383$new_n47911_ i1=$abc$109383$new_n47902_ i2=$abc$109383$new_n43409_ nq=$abc$109383$new_n47912_
+.subckt and21nor_x1 i0=$abc$109383$new_n47912_ i1=$abc$109383$new_n47891_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n47913_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[42][15] i1=soc.ram.ram[46][15] q=$abc$109383$new_n47914_
 .subckt nand2_x0 i0=$abc$109383$new_n47914_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n47915_
 .subckt inv_x0 i=soc.ram.ram[47][15] nq=$abc$109383$new_n47916_
 .subckt nand2_x0 i0=$abc$109383$new_n47916_ i1=$abc$109383$new_n43939_ nq=$abc$109383$new_n47917_
-.subckt ao22_x2 i0=soc.ram.ram[43][15] i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n47918_
+.subckt and21nor_x1 i0=soc.ram.ram[43][15] i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n47918_
 .subckt nand2_x0 i0=$abc$109383$new_n47918_ i1=$abc$109383$new_n47917_ nq=$abc$109383$new_n47919_
 .subckt nand3_x0 i0=$abc$109383$new_n47919_ i1=$abc$109383$new_n47915_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n47920_
 .subckt inv_x0 i=soc.ram.ram[45][15] nq=$abc$109383$new_n47921_
 .subckt nand2_x0 i0=$abc$109383$new_n47921_ i1=$abc$109383$new_n44501_ nq=$abc$109383$new_n47922_
-.subckt ao22_x2 i0=soc.ram.ram[41][15] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n47923_
+.subckt and21nor_x1 i0=soc.ram.ram[41][15] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n47923_
 .subckt nand2_x0 i0=$abc$109383$new_n47923_ i1=$abc$109383$new_n47922_ nq=$abc$109383$new_n47924_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[40][15] i1=soc.ram.ram[44][15] q=$abc$109383$new_n47925_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[40][15] i1=soc.ram.ram[44][15] q=$abc$109383$new_n47925_
 .subckt nand2_x0 i0=$abc$109383$new_n47925_ i1=$abc$109383$new_n46128_ nq=$abc$109383$new_n47926_
-.subckt a2_x2 i0=$abc$109383$new_n47926_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n47927_
+.subckt and2_x1 i0=$abc$109383$new_n47926_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n47927_
 .subckt nand2_x0 i0=$abc$109383$new_n47927_ i1=$abc$109383$new_n47924_ nq=$abc$109383$new_n47928_
 .subckt nand3_x0 i0=$abc$109383$new_n47928_ i1=$abc$109383$new_n47920_ i2=$abc$109383$new_n45028_ nq=$abc$109383$new_n47929_
 .subckt inv_x0 i=soc.ram.ram[61][15] nq=$abc$109383$new_n47930_
 .subckt nand2_x0 i0=$abc$109383$new_n47930_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n47931_
-.subckt ao22_x2 i0=soc.ram.ram[57][15] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n45455_ q=$abc$109383$new_n47932_
+.subckt and21nor_x1 i0=soc.ram.ram[57][15] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n45455_ nq=$abc$109383$new_n47932_
 .subckt nand2_x0 i0=$abc$109383$new_n47932_ i1=$abc$109383$new_n47931_ nq=$abc$109383$new_n47933_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[56][15] i1=soc.ram.ram[60][15] q=$abc$109383$new_n47934_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[56][15] i1=soc.ram.ram[60][15] q=$abc$109383$new_n47934_
 .subckt nand2_x0 i0=$abc$109383$new_n47934_ i1=$abc$109383$new_n44078_ nq=$abc$109383$new_n47935_
-.subckt a2_x2 i0=$abc$109383$new_n47935_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n47936_
+.subckt and2_x1 i0=$abc$109383$new_n47935_ i1=$abc$109383$new_n43753_ q=$abc$109383$new_n47936_
 .subckt nand2_x0 i0=$abc$109383$new_n47936_ i1=$abc$109383$new_n47933_ nq=$abc$109383$new_n47937_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[58][15] i1=soc.ram.ram[62][15] q=$abc$109383$new_n47938_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[58][15] i1=soc.ram.ram[62][15] q=$abc$109383$new_n47938_
 .subckt nand2_x0 i0=$abc$109383$new_n47938_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n47939_
 .subckt inv_x0 i=soc.ram.ram[63][15] nq=$abc$109383$new_n47940_
 .subckt nand2_x0 i0=$abc$109383$new_n47940_ i1=$abc$109383$new_n45117_ nq=$abc$109383$new_n47941_
-.subckt ao22_x2 i0=soc.ram.ram[59][15] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ q=$abc$109383$new_n47942_
+.subckt and21nor_x1 i0=soc.ram.ram[59][15] i1=$abc$109383$new_n45755_ i2=$abc$109383$new_n43872_ nq=$abc$109383$new_n47942_
 .subckt nand2_x0 i0=$abc$109383$new_n47942_ i1=$abc$109383$new_n47941_ nq=$abc$109383$new_n47943_
 .subckt nand3_x0 i0=$abc$109383$new_n47943_ i1=$abc$109383$new_n47939_ i2=$abc$109383$new_n45604_ nq=$abc$109383$new_n47944_
 .subckt nand3_x0 i0=$abc$109383$new_n47944_ i1=$abc$109383$new_n47937_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n47945_
 .subckt nand3_x0 i0=$abc$109383$new_n47945_ i1=$abc$109383$new_n47929_ i2=$abc$109383$new_n43409_ nq=$abc$109383$new_n47946_
-.subckt mx2_x2 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[26][15] i1=soc.ram.ram[30][15] q=$abc$109383$new_n47947_
+.subckt mux2_x1 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[26][15] i1=soc.ram.ram[30][15] q=$abc$109383$new_n47947_
 .subckt nand2_x0 i0=$abc$109383$new_n47947_ i1=$abc$109383$new_n45053_ nq=$abc$109383$new_n47948_
 .subckt nor2_x0 i0=soc.ram.ram[27][15] i1=$abc$109383$new_n43476_ nq=$abc$109383$new_n47949_
 .subckt inv_x0 i=soc.ram.ram[31][15] nq=$abc$109383$new_n47950_
-.subckt oa22_x2 i0=$abc$109383$new_n47950_ i1=$abc$109383$new_n43742_ i2=$abc$109383$new_n43601_ q=$abc$109383$new_n47951_
-.subckt ao22_x2 i0=$abc$109383$new_n47951_ i1=$abc$109383$new_n47949_ i2=$abc$109383$new_n43439_ q=$abc$109383$new_n47952_
+.subckt or21nand_x1 i0=$abc$109383$new_n47950_ i1=$abc$109383$new_n43742_ i2=$abc$109383$new_n43601_ nq=$abc$109383$new_n47951_
+.subckt and21nor_x1 i0=$abc$109383$new_n47951_ i1=$abc$109383$new_n47949_ i2=$abc$109383$new_n43439_ nq=$abc$109383$new_n47952_
 .subckt nand2_x0 i0=$abc$109383$new_n47952_ i1=$abc$109383$new_n47948_ nq=$abc$109383$new_n47953_
-.subckt ao22_x2 i0=soc.ram.ram[25][15] i1=$abc$109383$new_n43550_ i2=$abc$109383$new_n43629_ q=$abc$109383$new_n47954_
-.subckt ao22_x2 i0=$abc$109383$new_n43929_ i1=soc.ram.ram[29][15] i2=$abc$109383$new_n47954_ q=$abc$109383$new_n47955_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[24][15] i1=soc.ram.ram[28][15] q=$abc$109383$new_n47956_
-.subckt oa22_x2 i0=$abc$109383$new_n45550_ i1=$abc$109383$new_n47956_ i2=$abc$109383$new_n43579_ q=$abc$109383$new_n47957_
-.subckt ao22_x2 i0=$abc$109383$new_n47957_ i1=$abc$109383$new_n47955_ i2=$abc$109383$new_n43466_ q=$abc$109383$new_n47958_
-.subckt a2_x2 i0=$abc$109383$new_n47958_ i1=$abc$109383$new_n47953_ q=$abc$109383$new_n47959_
-.subckt mx2_x2 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[8][15] i1=soc.ram.ram[12][15] q=$abc$109383$new_n47960_
+.subckt and21nor_x1 i0=soc.ram.ram[25][15] i1=$abc$109383$new_n43550_ i2=$abc$109383$new_n43629_ nq=$abc$109383$new_n47954_
+.subckt and21nor_x1 i0=$abc$109383$new_n43929_ i1=soc.ram.ram[29][15] i2=$abc$109383$new_n47954_ nq=$abc$109383$new_n47955_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[24][15] i1=soc.ram.ram[28][15] q=$abc$109383$new_n47956_
+.subckt or21nand_x1 i0=$abc$109383$new_n45550_ i1=$abc$109383$new_n47956_ i2=$abc$109383$new_n43579_ nq=$abc$109383$new_n47957_
+.subckt and21nor_x1 i0=$abc$109383$new_n47957_ i1=$abc$109383$new_n47955_ i2=$abc$109383$new_n43466_ nq=$abc$109383$new_n47958_
+.subckt and2_x1 i0=$abc$109383$new_n47958_ i1=$abc$109383$new_n47953_ q=$abc$109383$new_n47959_
+.subckt mux2_x1 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[8][15] i1=soc.ram.ram[12][15] q=$abc$109383$new_n47960_
 .subckt nand2_x0 i0=$abc$109383$new_n47960_ i1=$abc$109383$new_n43902_ nq=$abc$109383$new_n47961_
-.subckt o2_x2 i0=soc.ram.ram[9][15] i1=$abc$109383$new_n44092_ q=$abc$109383$new_n47962_
+.subckt or2_x1 i0=soc.ram.ram[9][15] i1=$abc$109383$new_n44092_ q=$abc$109383$new_n47962_
 .subckt nand2_x0 i0=$abc$109383$new_n47962_ i1=$abc$109383$new_n43699_ nq=$abc$109383$new_n47963_
 .subckt inv_x0 i=soc.ram.ram[13][15] nq=$abc$109383$new_n47964_
-.subckt a2_x2 i0=$abc$109383$new_n47964_ i1=$abc$109383$new_n44167_ q=$abc$109383$new_n47965_
-.subckt ao22_x2 i0=$abc$109383$new_n47965_ i1=$abc$109383$new_n47963_ i2=$abc$109383$new_n47961_ q=$abc$109383$new_n47966_
+.subckt and2_x1 i0=$abc$109383$new_n47964_ i1=$abc$109383$new_n44167_ q=$abc$109383$new_n47965_
+.subckt and21nor_x1 i0=$abc$109383$new_n47965_ i1=$abc$109383$new_n47963_ i2=$abc$109383$new_n47961_ nq=$abc$109383$new_n47966_
 .subckt nand2_x0 i0=$abc$109383$new_n47966_ i1=$abc$109383$new_n44381_ nq=$abc$109383$new_n47967_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[10][15] i1=soc.ram.ram[14][15] q=$abc$109383$new_n47968_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[10][15] i1=soc.ram.ram[14][15] q=$abc$109383$new_n47968_
 .subckt nand2_x0 i0=$abc$109383$new_n47968_ i1=$abc$109383$new_n43508_ nq=$abc$109383$new_n47969_
 .subckt nor2_x0 i0=soc.ram.ram[11][15] i1=$abc$109383$new_n44419_ nq=$abc$109383$new_n47970_
 .subckt inv_x0 i=soc.ram.ram[15][15] nq=$abc$109383$new_n47971_
-.subckt oa22_x2 i0=$abc$109383$new_n47971_ i1=$abc$109383$new_n43976_ i2=$abc$109383$new_n43427_ q=$abc$109383$new_n47972_
-.subckt ao22_x2 i0=$abc$109383$new_n47972_ i1=$abc$109383$new_n47970_ i2=$abc$109383$new_n46137_ q=$abc$109383$new_n47973_
+.subckt or21nand_x1 i0=$abc$109383$new_n47971_ i1=$abc$109383$new_n43976_ i2=$abc$109383$new_n43427_ nq=$abc$109383$new_n47972_
+.subckt and21nor_x1 i0=$abc$109383$new_n47972_ i1=$abc$109383$new_n47970_ i2=$abc$109383$new_n46137_ nq=$abc$109383$new_n47973_
 .subckt nand2_x0 i0=$abc$109383$new_n47973_ i1=$abc$109383$new_n47969_ nq=$abc$109383$new_n47974_
-.subckt a2_x2 i0=$abc$109383$new_n47974_ i1=$abc$109383$new_n47967_ q=$abc$109383$new_n47975_
-.subckt oa22_x2 i0=$abc$109383$new_n43715_ i1=$abc$109383$new_n47975_ i2=$abc$109383$new_n47959_ q=$abc$109383$new_n47976_
-.subckt ao22_x2 i0=$abc$109383$new_n43409_ i1=$abc$109383$new_n47976_ i2=$abc$109383$new_n47946_ q=$abc$109383$new_n47977_
+.subckt and2_x1 i0=$abc$109383$new_n47974_ i1=$abc$109383$new_n47967_ q=$abc$109383$new_n47975_
+.subckt or21nand_x1 i0=$abc$109383$new_n43715_ i1=$abc$109383$new_n47975_ i2=$abc$109383$new_n47959_ nq=$abc$109383$new_n47976_
+.subckt and21nor_x1 i0=$abc$109383$new_n43409_ i1=$abc$109383$new_n47976_ i2=$abc$109383$new_n47946_ nq=$abc$109383$new_n47977_
 .subckt nor2_x0 i0=$abc$109383$new_n47977_ i1=$abc$109383$new_n44612_ nq=$abc$109383$new_n47978_
-.subckt o3_x2 i0=$abc$109383$new_n47978_ i1=$abc$109383$new_n47913_ i2=$abc$109383$new_n44446_ q=$abc$109383$new_n47979_
+.subckt or3_x1 i0=$abc$109383$new_n47978_ i1=$abc$109383$new_n47913_ i2=$abc$109383$new_n44446_ q=$abc$109383$new_n47979_
 .subckt nand2_x0 i0=$abc$109383$new_n47979_ i1=$abc$109383$new_n47860_ nq=$abc$109383$new_n47980_
-.subckt oa22_x2 i0=$abc$109383$new_n47013_ i1=$abc$109383$new_n47980_ i2=$abc$109383$new_n47751_ q=$abc$109383$new_n47981_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n47981_ i2=$abc$109383$new_n47740_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103258
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[16] q=$abc$109383$new_n47983_
-.subckt a2_x2 i0=$abc$109383$new_n47983_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47984_
+.subckt or21nand_x1 i0=$abc$109383$new_n47013_ i1=$abc$109383$new_n47980_ i2=$abc$109383$new_n47751_ nq=$abc$109383$new_n47981_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n47981_ i2=$abc$109383$new_n47740_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103258
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[16] nq=$abc$109383$new_n47983_
+.subckt and2_x1 i0=$abc$109383$new_n47983_ i1=$abc$109383$new_n45468_ q=$abc$109383$new_n47984_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n28379_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[16] nq=$abc$109383$new_n47985_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[16] nq=$abc$109383$new_n47986_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28542_ q=$abc$109383$new_n47987_
-.subckt a2_x2 i0=$abc$109383$new_n47987_ i1=$abc$109383$new_n47986_ q=$abc$109383$new_n47988_
-.subckt mx2_x2 cmd=$abc$109383$new_n22004_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[16] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[16] q=$abc$109383$new_n47989_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28542_ q=$abc$109383$new_n47987_
+.subckt and2_x1 i0=$abc$109383$new_n47987_ i1=$abc$109383$new_n47986_ q=$abc$109383$new_n47988_
+.subckt mux2_x1 cmd=$abc$109383$new_n22004_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[16] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[16] q=$abc$109383$new_n47989_
 .subckt nand3_x0 i0=$abc$109383$new_n47989_ i1=$abc$109383$new_n44265_ i2=$abc$109383$new_n27639_ nq=$abc$109383$new_n47990_
 .subckt nand3_x0 i0=$abc$109383$new_n20241_ i1=$abc$109383$new_n19690_ i2=soc.bridge.csr_bridge_1.wb__dat_r[16] nq=$abc$109383$new_n47991_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[16] nq=$abc$109383$new_n47992_
-.subckt o2_x2 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n47992_ q=$abc$109383$new_n47993_
-.subckt a2_x2 i0=$abc$109383$new_n47993_ i1=$abc$109383$new_n47991_ q=$abc$109383$new_n47994_
-.subckt o4_x2 i0=$abc$109383$new_n47994_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n47995_
+.subckt or2_x1 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n47992_ q=$abc$109383$new_n47993_
+.subckt and2_x1 i0=$abc$109383$new_n47993_ i1=$abc$109383$new_n47991_ q=$abc$109383$new_n47994_
+.subckt or4_x1 i0=$abc$109383$new_n47994_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n47995_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n29105_ nq=$abc$109383$new_n47996_
 .subckt nand3_x0 i0=$abc$109383$new_n47996_ i1=$abc$109383$new_n29090_ i2=$abc$109383$new_n29089_ nq=$abc$109383$new_n47997_
-.subckt a2_x2 i0=$abc$109383$new_n47997_ i1=$abc$109383$new_n47995_ q=$abc$109383$new_n47998_
+.subckt and2_x1 i0=$abc$109383$new_n47997_ i1=$abc$109383$new_n47995_ q=$abc$109383$new_n47998_
 .subckt nand4_x0 i0=$abc$109383$new_n47998_ i1=$abc$109383$new_n47990_ i2=$abc$109383$new_n47988_ i3=$abc$109383$new_n47985_ nq=$abc$109383$new_n47999_
 .subckt inv_x0 i=soc.ram.ram[117][16] nq=$abc$109383$new_n48000_
 .subckt nand2_x0 i0=$abc$109383$new_n48000_ i1=$abc$109383$new_n43826_ nq=$abc$109383$new_n48001_
-.subckt ao22_x2 i0=soc.ram.ram[113][16] i1=$abc$109383$new_n46187_ i2=$abc$109383$new_n43923_ q=$abc$109383$new_n48002_
+.subckt and21nor_x1 i0=soc.ram.ram[113][16] i1=$abc$109383$new_n46187_ i2=$abc$109383$new_n43923_ nq=$abc$109383$new_n48002_
 .subckt nand2_x0 i0=$abc$109383$new_n48002_ i1=$abc$109383$new_n48001_ nq=$abc$109383$new_n48003_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[112][16] i1=soc.ram.ram[116][16] q=$abc$109383$new_n48004_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[112][16] i1=soc.ram.ram[116][16] q=$abc$109383$new_n48004_
 .subckt nand2_x0 i0=$abc$109383$new_n48004_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n48005_
 .subckt nand3_x0 i0=$abc$109383$new_n48005_ i1=$abc$109383$new_n48003_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n48006_
 .subckt inv_x0 i=soc.ram.ram[119][16] nq=$abc$109383$new_n48007_
 .subckt nand2_x0 i0=$abc$109383$new_n48007_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n48008_
-.subckt ao22_x2 i0=soc.ram.ram[115][16] i1=$abc$109383$new_n44586_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n48009_
+.subckt and21nor_x1 i0=soc.ram.ram[115][16] i1=$abc$109383$new_n44586_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n48009_
 .subckt nand2_x0 i0=$abc$109383$new_n48009_ i1=$abc$109383$new_n48008_ nq=$abc$109383$new_n48010_
-.subckt mx2_x2 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[114][16] i1=soc.ram.ram[118][16] q=$abc$109383$new_n48011_
-.subckt a2_x2 i0=$abc$109383$new_n48011_ i1=$abc$109383$new_n44597_ q=$abc$109383$new_n48012_
+.subckt mux2_x1 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[114][16] i1=soc.ram.ram[118][16] q=$abc$109383$new_n48011_
+.subckt and2_x1 i0=$abc$109383$new_n48011_ i1=$abc$109383$new_n44597_ q=$abc$109383$new_n48012_
 .subckt nor2_x0 i0=$abc$109383$new_n48012_ i1=$abc$109383$new_n45614_ nq=$abc$109383$new_n48013_
 .subckt nand2_x0 i0=$abc$109383$new_n48013_ i1=$abc$109383$new_n48010_ nq=$abc$109383$new_n48014_
-.subckt oa22_x2 i0=$abc$109383$new_n48014_ i1=$abc$109383$new_n48006_ i2=$abc$109383$new_n44910_ q=$abc$109383$new_n48015_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[122][16] i1=soc.ram.ram[126][16] q=$abc$109383$new_n48016_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[123][16] i1=soc.ram.ram[127][16] q=$abc$109383$new_n48017_
-.subckt mx2_x2 cmd=$abc$109383$new_n44179_ i0=$abc$109383$new_n48017_ i1=$abc$109383$new_n48016_ q=$abc$109383$new_n48018_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[120][16] i1=soc.ram.ram[124][16] q=$abc$109383$new_n48019_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[121][16] i1=soc.ram.ram[125][16] q=$abc$109383$new_n48020_
-.subckt mx2_x2 cmd=$abc$109383$new_n44179_ i0=$abc$109383$new_n48020_ i1=$abc$109383$new_n48019_ q=$abc$109383$new_n48021_
-.subckt mx2_x2 cmd=$abc$109383$new_n44774_ i0=$abc$109383$new_n48021_ i1=$abc$109383$new_n48018_ q=$abc$109383$new_n48022_
-.subckt o2_x2 i0=$abc$109383$new_n48022_ i1=$abc$109383$new_n44693_ q=$abc$109383$new_n48023_
+.subckt or21nand_x1 i0=$abc$109383$new_n48014_ i1=$abc$109383$new_n48006_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n48015_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[122][16] i1=soc.ram.ram[126][16] q=$abc$109383$new_n48016_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[123][16] i1=soc.ram.ram[127][16] q=$abc$109383$new_n48017_
+.subckt mux2_x1 cmd=$abc$109383$new_n44179_ i0=$abc$109383$new_n48017_ i1=$abc$109383$new_n48016_ q=$abc$109383$new_n48018_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[120][16] i1=soc.ram.ram[124][16] q=$abc$109383$new_n48019_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[121][16] i1=soc.ram.ram[125][16] q=$abc$109383$new_n48020_
+.subckt mux2_x1 cmd=$abc$109383$new_n44179_ i0=$abc$109383$new_n48020_ i1=$abc$109383$new_n48019_ q=$abc$109383$new_n48021_
+.subckt mux2_x1 cmd=$abc$109383$new_n44774_ i0=$abc$109383$new_n48021_ i1=$abc$109383$new_n48018_ q=$abc$109383$new_n48022_
+.subckt or2_x1 i0=$abc$109383$new_n48022_ i1=$abc$109383$new_n44693_ q=$abc$109383$new_n48023_
 .subckt nand3_x0 i0=$abc$109383$new_n48023_ i1=$abc$109383$new_n48015_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n48024_
-.subckt mx2_x2 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[96][16] i1=soc.ram.ram[100][16] q=$abc$109383$new_n48025_
-.subckt mx2_x2 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[97][16] i1=soc.ram.ram[101][16] q=$abc$109383$new_n48026_
-.subckt mx2_x2 cmd=$abc$109383$new_n43980_ i0=$abc$109383$new_n48026_ i1=$abc$109383$new_n48025_ q=$abc$109383$new_n48027_
+.subckt mux2_x1 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[96][16] i1=soc.ram.ram[100][16] q=$abc$109383$new_n48025_
+.subckt mux2_x1 cmd=$abc$109383$new_n45116_ i0=soc.ram.ram[97][16] i1=soc.ram.ram[101][16] q=$abc$109383$new_n48026_
+.subckt mux2_x1 cmd=$abc$109383$new_n43980_ i0=$abc$109383$new_n48026_ i1=$abc$109383$new_n48025_ q=$abc$109383$new_n48027_
 .subckt nand2_x0 i0=$abc$109383$new_n48027_ i1=$abc$109383$new_n44742_ nq=$abc$109383$new_n48028_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[98][16] i1=soc.ram.ram[102][16] q=$abc$109383$new_n48029_
-.subckt o2_x2 i0=$abc$109383$new_n48029_ i1=$abc$109383$new_n45268_ q=$abc$109383$new_n48030_
-.subckt mx2_x2 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[99][16] i1=soc.ram.ram[103][16] q=$abc$109383$new_n48031_
-.subckt ao22_x2 i0=$abc$109383$new_n43942_ i1=$abc$109383$new_n48031_ i2=$abc$109383$new_n44789_ q=$abc$109383$new_n48032_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[98][16] i1=soc.ram.ram[102][16] q=$abc$109383$new_n48029_
+.subckt or2_x1 i0=$abc$109383$new_n48029_ i1=$abc$109383$new_n45268_ q=$abc$109383$new_n48030_
+.subckt mux2_x1 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[99][16] i1=soc.ram.ram[103][16] q=$abc$109383$new_n48031_
+.subckt and21nor_x1 i0=$abc$109383$new_n43942_ i1=$abc$109383$new_n48031_ i2=$abc$109383$new_n44789_ nq=$abc$109383$new_n48032_
 .subckt nand2_x0 i0=$abc$109383$new_n48032_ i1=$abc$109383$new_n48030_ nq=$abc$109383$new_n48033_
 .subckt nand3_x0 i0=$abc$109383$new_n48033_ i1=$abc$109383$new_n48028_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n48034_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[104][16] i1=soc.ram.ram[108][16] q=$abc$109383$new_n48035_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[104][16] i1=soc.ram.ram[108][16] q=$abc$109383$new_n48035_
 .subckt nand2_x0 i0=$abc$109383$new_n48035_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n48036_
 .subckt inv_x0 i=soc.ram.ram[109][16] nq=$abc$109383$new_n48037_
 .subckt nand2_x0 i0=$abc$109383$new_n48037_ i1=$abc$109383$new_n43954_ nq=$abc$109383$new_n48038_
-.subckt ao22_x2 i0=soc.ram.ram[105][16] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ q=$abc$109383$new_n48039_
+.subckt and21nor_x1 i0=soc.ram.ram[105][16] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ nq=$abc$109383$new_n48039_
 .subckt nand2_x0 i0=$abc$109383$new_n48039_ i1=$abc$109383$new_n48038_ nq=$abc$109383$new_n48040_
 .subckt nand3_x0 i0=$abc$109383$new_n48040_ i1=$abc$109383$new_n48036_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n48041_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[106][16] i1=soc.ram.ram[110][16] q=$abc$109383$new_n48042_
-.subckt oa22_x2 i0=$abc$109383$new_n43707_ i1=$abc$109383$new_n48042_ i2=$abc$109383$new_n43423_ q=$abc$109383$new_n48043_
-.subckt ao22_x2 i0=soc.ram.ram[107][16] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n48044_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[106][16] i1=soc.ram.ram[110][16] q=$abc$109383$new_n48042_
+.subckt or21nand_x1 i0=$abc$109383$new_n43707_ i1=$abc$109383$new_n48042_ i2=$abc$109383$new_n43423_ nq=$abc$109383$new_n48043_
+.subckt and21nor_x1 i0=soc.ram.ram[107][16] i1=$abc$109383$new_n44016_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n48044_
 .subckt inv_x0 i=soc.ram.ram[111][16] nq=$abc$109383$new_n48045_
 .subckt nand2_x0 i0=$abc$109383$new_n48045_ i1=$abc$109383$new_n46187_ nq=$abc$109383$new_n48046_
-.subckt oa22_x2 i0=$abc$109383$new_n48046_ i1=$abc$109383$new_n48044_ i2=$abc$109383$new_n48043_ q=$abc$109383$new_n48047_
-.subckt oa22_x2 i0=$abc$109383$new_n48047_ i1=$abc$109383$new_n48041_ i2=$abc$109383$new_n44484_ q=$abc$109383$new_n48048_
+.subckt or21nand_x1 i0=$abc$109383$new_n48046_ i1=$abc$109383$new_n48044_ i2=$abc$109383$new_n48043_ nq=$abc$109383$new_n48047_
+.subckt or21nand_x1 i0=$abc$109383$new_n48047_ i1=$abc$109383$new_n48041_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n48048_
 .subckt nand3_x0 i0=$abc$109383$new_n48048_ i1=$abc$109383$new_n48034_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n48049_
 .subckt nand3_x0 i0=$abc$109383$new_n48049_ i1=$abc$109383$new_n48024_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n48050_
 .subckt inv_x0 i=soc.ram.ram[85][16] nq=$abc$109383$new_n48051_
 .subckt nand2_x0 i0=$abc$109383$new_n48051_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n48052_
-.subckt ao22_x2 i0=soc.ram.ram[81][16] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43972_ q=$abc$109383$new_n48053_
+.subckt and21nor_x1 i0=soc.ram.ram[81][16] i1=$abc$109383$new_n43744_ i2=$abc$109383$new_n43972_ nq=$abc$109383$new_n48053_
 .subckt nand2_x0 i0=$abc$109383$new_n48053_ i1=$abc$109383$new_n48052_ nq=$abc$109383$new_n48054_
-.subckt mx2_x2 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[80][16] i1=soc.ram.ram[84][16] q=$abc$109383$new_n48055_
+.subckt mux2_x1 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[80][16] i1=soc.ram.ram[84][16] q=$abc$109383$new_n48055_
 .subckt nand2_x0 i0=$abc$109383$new_n48055_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n48056_
 .subckt nand3_x0 i0=$abc$109383$new_n48056_ i1=$abc$109383$new_n48054_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n48057_
-.subckt mx2_x2 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[82][16] i1=soc.ram.ram[86][16] q=$abc$109383$new_n48058_
+.subckt mux2_x1 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[82][16] i1=soc.ram.ram[86][16] q=$abc$109383$new_n48058_
 .subckt nand2_x0 i0=$abc$109383$new_n48058_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n48059_
 .subckt inv_x0 i=soc.ram.ram[87][16] nq=$abc$109383$new_n48060_
 .subckt nand2_x0 i0=$abc$109383$new_n48060_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n48061_
-.subckt ao22_x2 i0=soc.ram.ram[83][16] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n44403_ q=$abc$109383$new_n48062_
+.subckt and21nor_x1 i0=soc.ram.ram[83][16] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n44403_ nq=$abc$109383$new_n48062_
 .subckt nand2_x0 i0=$abc$109383$new_n48062_ i1=$abc$109383$new_n48061_ nq=$abc$109383$new_n48063_
 .subckt nand3_x0 i0=$abc$109383$new_n48063_ i1=$abc$109383$new_n48059_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n48064_
 .subckt nand3_x0 i0=$abc$109383$new_n48064_ i1=$abc$109383$new_n48057_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n48065_
-.subckt mx2_x2 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[90][16] i1=soc.ram.ram[94][16] q=$abc$109383$new_n48066_
+.subckt mux2_x1 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[90][16] i1=soc.ram.ram[94][16] q=$abc$109383$new_n48066_
 .subckt nand2_x0 i0=$abc$109383$new_n48066_ i1=$abc$109383$new_n44837_ nq=$abc$109383$new_n48067_
 .subckt inv_x0 i=soc.ram.ram[95][16] nq=$abc$109383$new_n48068_
-.subckt a2_x2 i0=$abc$109383$new_n48068_ i1=$abc$109383$new_n44824_ q=$abc$109383$new_n48069_
-.subckt o2_x2 i0=soc.ram.ram[91][16] i1=$abc$109383$new_n44215_ q=$abc$109383$new_n48070_
+.subckt and2_x1 i0=$abc$109383$new_n48068_ i1=$abc$109383$new_n44824_ q=$abc$109383$new_n48069_
+.subckt or2_x1 i0=soc.ram.ram[91][16] i1=$abc$109383$new_n44215_ q=$abc$109383$new_n48070_
 .subckt nand2_x0 i0=$abc$109383$new_n48070_ i1=$abc$109383$new_n44505_ nq=$abc$109383$new_n48071_
-.subckt ao22_x2 i0=$abc$109383$new_n48071_ i1=$abc$109383$new_n48069_ i2=$abc$109383$new_n48067_ q=$abc$109383$new_n48072_
+.subckt and21nor_x1 i0=$abc$109383$new_n48071_ i1=$abc$109383$new_n48069_ i2=$abc$109383$new_n48067_ nq=$abc$109383$new_n48072_
 .subckt nand2_x0 i0=$abc$109383$new_n48072_ i1=$abc$109383$new_n44853_ nq=$abc$109383$new_n48073_
-.subckt mx2_x2 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[88][16] i1=soc.ram.ram[92][16] q=$abc$109383$new_n48074_
-.subckt oa22_x2 i0=$abc$109383$new_n43941_ i1=$abc$109383$new_n48074_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n48075_
-.subckt ao22_x2 i0=soc.ram.ram[89][16] i1=$abc$109383$new_n44487_ i2=$abc$109383$new_n44143_ q=$abc$109383$new_n48076_
+.subckt mux2_x1 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[88][16] i1=soc.ram.ram[92][16] q=$abc$109383$new_n48074_
+.subckt or21nand_x1 i0=$abc$109383$new_n43941_ i1=$abc$109383$new_n48074_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n48075_
+.subckt and21nor_x1 i0=soc.ram.ram[89][16] i1=$abc$109383$new_n44487_ i2=$abc$109383$new_n44143_ nq=$abc$109383$new_n48076_
 .subckt inv_x0 i=soc.ram.ram[93][16] nq=$abc$109383$new_n48077_
 .subckt nand2_x0 i0=$abc$109383$new_n48077_ i1=$abc$109383$new_n45478_ nq=$abc$109383$new_n48078_
-.subckt oa22_x2 i0=$abc$109383$new_n48078_ i1=$abc$109383$new_n48076_ i2=$abc$109383$new_n48075_ q=$abc$109383$new_n48079_
+.subckt or21nand_x1 i0=$abc$109383$new_n48078_ i1=$abc$109383$new_n48076_ i2=$abc$109383$new_n48075_ nq=$abc$109383$new_n48079_
 .subckt nand3_x0 i0=$abc$109383$new_n48079_ i1=$abc$109383$new_n48073_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n48080_
 .subckt nand3_x0 i0=$abc$109383$new_n48080_ i1=$abc$109383$new_n48065_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n48081_
-.subckt mx2_x2 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[72][16] i1=soc.ram.ram[76][16] q=$abc$109383$new_n48082_
+.subckt mux2_x1 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[72][16] i1=soc.ram.ram[76][16] q=$abc$109383$new_n48082_
 .subckt nand2_x0 i0=$abc$109383$new_n48082_ i1=$abc$109383$new_n44122_ nq=$abc$109383$new_n48083_
 .subckt inv_x0 i=soc.ram.ram[77][16] nq=$abc$109383$new_n48084_
 .subckt nand2_x0 i0=$abc$109383$new_n48084_ i1=$abc$109383$new_n44848_ nq=$abc$109383$new_n48085_
-.subckt ao22_x2 i0=soc.ram.ram[73][16] i1=$abc$109383$new_n44187_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n48086_
+.subckt and21nor_x1 i0=soc.ram.ram[73][16] i1=$abc$109383$new_n44187_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n48086_
 .subckt nand2_x0 i0=$abc$109383$new_n48086_ i1=$abc$109383$new_n48085_ nq=$abc$109383$new_n48087_
 .subckt nand3_x0 i0=$abc$109383$new_n48087_ i1=$abc$109383$new_n48083_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n48088_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[74][16] i1=soc.ram.ram[78][16] q=$abc$109383$new_n48089_
-.subckt oa22_x2 i0=$abc$109383$new_n43356_ i1=$abc$109383$new_n48089_ i2=$abc$109383$new_n44060_ q=$abc$109383$new_n48090_
-.subckt ao22_x2 i0=soc.ram.ram[75][16] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43961_ q=$abc$109383$new_n48091_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[74][16] i1=soc.ram.ram[78][16] q=$abc$109383$new_n48089_
+.subckt or21nand_x1 i0=$abc$109383$new_n43356_ i1=$abc$109383$new_n48089_ i2=$abc$109383$new_n44060_ nq=$abc$109383$new_n48090_
+.subckt and21nor_x1 i0=soc.ram.ram[75][16] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43961_ nq=$abc$109383$new_n48091_
 .subckt inv_x0 i=soc.ram.ram[79][16] nq=$abc$109383$new_n48092_
 .subckt nand2_x0 i0=$abc$109383$new_n48092_ i1=$abc$109383$new_n45116_ nq=$abc$109383$new_n48093_
-.subckt oa22_x2 i0=$abc$109383$new_n48093_ i1=$abc$109383$new_n48091_ i2=$abc$109383$new_n48090_ q=$abc$109383$new_n48094_
-.subckt oa22_x2 i0=$abc$109383$new_n48094_ i1=$abc$109383$new_n48088_ i2=$abc$109383$new_n43471_ q=$abc$109383$new_n48095_
+.subckt or21nand_x1 i0=$abc$109383$new_n48093_ i1=$abc$109383$new_n48091_ i2=$abc$109383$new_n48090_ nq=$abc$109383$new_n48094_
+.subckt or21nand_x1 i0=$abc$109383$new_n48094_ i1=$abc$109383$new_n48088_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n48095_
 .subckt buf_x4 i=$abc$109383$new_n43512_ q=$abc$109383$new_n48096_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[66][16] i1=soc.ram.ram[70][16] q=$abc$109383$new_n48097_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[66][16] i1=soc.ram.ram[70][16] q=$abc$109383$new_n48097_
 .subckt nand2_x0 i0=$abc$109383$new_n48097_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n48098_
-.subckt mx2_x2 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[67][16] i1=soc.ram.ram[71][16] q=$abc$109383$new_n48099_
+.subckt mux2_x1 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[67][16] i1=soc.ram.ram[71][16] q=$abc$109383$new_n48099_
 .subckt nand2_x0 i0=$abc$109383$new_n48099_ i1=$abc$109383$new_n43791_ nq=$abc$109383$new_n48100_
 .subckt nand3_x0 i0=$abc$109383$new_n48100_ i1=$abc$109383$new_n48098_ i2=$abc$109383$new_n45427_ nq=$abc$109383$new_n48101_
-.subckt mx2_x2 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[64][16] i1=soc.ram.ram[68][16] q=$abc$109383$new_n48102_
-.subckt mx2_x2 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[65][16] i1=soc.ram.ram[69][16] q=$abc$109383$new_n48103_
-.subckt mx2_x2 cmd=$abc$109383$new_n43706_ i0=$abc$109383$new_n48103_ i1=$abc$109383$new_n48102_ q=$abc$109383$new_n48104_
-.subckt o2_x2 i0=$abc$109383$new_n48104_ i1=$abc$109383$new_n43947_ q=$abc$109383$new_n48105_
-.subckt oa22_x2 i0=$abc$109383$new_n48105_ i1=$abc$109383$new_n48101_ i2=$abc$109383$new_n45393_ q=$abc$109383$new_n48106_
-.subckt oa22_x2 i0=$abc$109383$new_n48106_ i1=$abc$109383$new_n48095_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n48107_
-.subckt a2_x2 i0=$abc$109383$new_n48107_ i1=$abc$109383$new_n48081_ q=$abc$109383$new_n48108_
-.subckt ao22_x2 i0=$abc$109383$new_n43410_ i1=$abc$109383$new_n48108_ i2=$abc$109383$new_n48050_ q=$abc$109383$new_n48109_
-.subckt ao22_x2 i0=$abc$109383$new_n46883_ i1=$abc$109383$new_n48109_ i2=$abc$109383$new_n43322_ q=$abc$109383$new_n48110_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[48][16] i1=soc.ram.ram[52][16] q=$abc$109383$new_n48111_
-.subckt a2_x2 i0=$abc$109383$new_n48111_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n48112_
-.subckt mx2_x2 cmd=$abc$109383$new_n44563_ i0=soc.ram.ram[49][16] i1=soc.ram.ram[53][16] q=$abc$109383$new_n48113_
-.subckt oa22_x2 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n48113_ i2=$abc$109383$new_n43569_ q=$abc$109383$new_n48114_
-.subckt o2_x2 i0=$abc$109383$new_n48114_ i1=$abc$109383$new_n48112_ q=$abc$109383$new_n48115_
-.subckt mx2_x2 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[56][16] i1=soc.ram.ram[60][16] q=$abc$109383$new_n48116_
+.subckt mux2_x1 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[64][16] i1=soc.ram.ram[68][16] q=$abc$109383$new_n48102_
+.subckt mux2_x1 cmd=$abc$109383$new_n43799_ i0=soc.ram.ram[65][16] i1=soc.ram.ram[69][16] q=$abc$109383$new_n48103_
+.subckt mux2_x1 cmd=$abc$109383$new_n43706_ i0=$abc$109383$new_n48103_ i1=$abc$109383$new_n48102_ q=$abc$109383$new_n48104_
+.subckt or2_x1 i0=$abc$109383$new_n48104_ i1=$abc$109383$new_n43947_ q=$abc$109383$new_n48105_
+.subckt or21nand_x1 i0=$abc$109383$new_n48105_ i1=$abc$109383$new_n48101_ i2=$abc$109383$new_n45393_ nq=$abc$109383$new_n48106_
+.subckt or21nand_x1 i0=$abc$109383$new_n48106_ i1=$abc$109383$new_n48095_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n48107_
+.subckt and2_x1 i0=$abc$109383$new_n48107_ i1=$abc$109383$new_n48081_ q=$abc$109383$new_n48108_
+.subckt and21nor_x1 i0=$abc$109383$new_n43410_ i1=$abc$109383$new_n48108_ i2=$abc$109383$new_n48050_ nq=$abc$109383$new_n48109_
+.subckt and21nor_x1 i0=$abc$109383$new_n46883_ i1=$abc$109383$new_n48109_ i2=$abc$109383$new_n43322_ nq=$abc$109383$new_n48110_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[48][16] i1=soc.ram.ram[52][16] q=$abc$109383$new_n48111_
+.subckt and2_x1 i0=$abc$109383$new_n48111_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n48112_
+.subckt mux2_x1 cmd=$abc$109383$new_n44563_ i0=soc.ram.ram[49][16] i1=soc.ram.ram[53][16] q=$abc$109383$new_n48113_
+.subckt or21nand_x1 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n48113_ i2=$abc$109383$new_n43569_ nq=$abc$109383$new_n48114_
+.subckt or2_x1 i0=$abc$109383$new_n48114_ i1=$abc$109383$new_n48112_ q=$abc$109383$new_n48115_
+.subckt mux2_x1 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[56][16] i1=soc.ram.ram[60][16] q=$abc$109383$new_n48116_
 .subckt nand2_x0 i0=$abc$109383$new_n48116_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n48117_
 .subckt inv_x0 i=soc.ram.ram[61][16] nq=$abc$109383$new_n48118_
 .subckt nand2_x0 i0=$abc$109383$new_n48118_ i1=$abc$109383$new_n45674_ nq=$abc$109383$new_n48119_
-.subckt ao22_x2 i0=soc.ram.ram[57][16] i1=$abc$109383$new_n44207_ i2=$abc$109383$new_n43691_ q=$abc$109383$new_n48120_
+.subckt and21nor_x1 i0=soc.ram.ram[57][16] i1=$abc$109383$new_n44207_ i2=$abc$109383$new_n43691_ nq=$abc$109383$new_n48120_
 .subckt nand2_x0 i0=$abc$109383$new_n48120_ i1=$abc$109383$new_n48119_ nq=$abc$109383$new_n48121_
 .subckt nand3_x0 i0=$abc$109383$new_n48121_ i1=$abc$109383$new_n48117_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n48122_
-.subckt oa22_x2 i0=$abc$109383$new_n48122_ i1=$abc$109383$new_n48115_ i2=$abc$109383$new_n44853_ q=$abc$109383$new_n48123_
-.subckt mx2_x2 cmd=$abc$109383$new_n45321_ i0=soc.ram.ram[50][16] i1=soc.ram.ram[54][16] q=$abc$109383$new_n48124_
+.subckt or21nand_x1 i0=$abc$109383$new_n48122_ i1=$abc$109383$new_n48115_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n48123_
+.subckt mux2_x1 cmd=$abc$109383$new_n45321_ i0=soc.ram.ram[50][16] i1=soc.ram.ram[54][16] q=$abc$109383$new_n48124_
 .subckt nand2_x0 i0=$abc$109383$new_n48124_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n48125_
-.subckt mx2_x2 cmd=$abc$109383$new_n45030_ i0=soc.ram.ram[51][16] i1=soc.ram.ram[55][16] q=$abc$109383$new_n48126_
+.subckt mux2_x1 cmd=$abc$109383$new_n45030_ i0=soc.ram.ram[51][16] i1=soc.ram.ram[55][16] q=$abc$109383$new_n48126_
 .subckt nand2_x0 i0=$abc$109383$new_n48126_ i1=$abc$109383$new_n44945_ nq=$abc$109383$new_n48127_
 .subckt nand3_x0 i0=$abc$109383$new_n48127_ i1=$abc$109383$new_n48125_ i2=$abc$109383$new_n44086_ nq=$abc$109383$new_n48128_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[58][16] i1=soc.ram.ram[62][16] q=$abc$109383$new_n48129_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[58][16] i1=soc.ram.ram[62][16] q=$abc$109383$new_n48129_
 .subckt nand2_x0 i0=$abc$109383$new_n48129_ i1=$abc$109383$new_n44485_ nq=$abc$109383$new_n48130_
-.subckt o2_x2 i0=soc.ram.ram[59][16] i1=$abc$109383$new_n47050_ q=$abc$109383$new_n48131_
+.subckt or2_x1 i0=soc.ram.ram[59][16] i1=$abc$109383$new_n47050_ q=$abc$109383$new_n48131_
 .subckt nand2_x0 i0=$abc$109383$new_n48131_ i1=$abc$109383$new_n44143_ nq=$abc$109383$new_n48132_
 .subckt inv_x0 i=soc.ram.ram[63][16] nq=$abc$109383$new_n48133_
-.subckt a2_x2 i0=$abc$109383$new_n48133_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n48134_
-.subckt ao22_x2 i0=$abc$109383$new_n48134_ i1=$abc$109383$new_n48132_ i2=$abc$109383$new_n48130_ q=$abc$109383$new_n48135_
+.subckt and2_x1 i0=$abc$109383$new_n48133_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n48134_
+.subckt and21nor_x1 i0=$abc$109383$new_n48134_ i1=$abc$109383$new_n48132_ i2=$abc$109383$new_n48130_ nq=$abc$109383$new_n48135_
 .subckt nand2_x0 i0=$abc$109383$new_n48135_ i1=$abc$109383$new_n45244_ nq=$abc$109383$new_n48136_
-.subckt oa22_x2 i0=$abc$109383$new_n48136_ i1=$abc$109383$new_n48128_ i2=$abc$109383$new_n44656_ q=$abc$109383$new_n48137_
+.subckt or21nand_x1 i0=$abc$109383$new_n48136_ i1=$abc$109383$new_n48128_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n48137_
 .subckt nand3_x0 i0=$abc$109383$new_n48137_ i1=$abc$109383$new_n48123_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n48138_
-.subckt mx2_x2 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[42][16] i1=soc.ram.ram[46][16] q=$abc$109383$new_n48139_
-.subckt a2_x2 i0=$abc$109383$new_n48139_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n48140_
-.subckt mx2_x2 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[43][16] i1=soc.ram.ram[47][16] q=$abc$109383$new_n48141_
-.subckt oa22_x2 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n48141_ i2=$abc$109383$new_n44162_ q=$abc$109383$new_n48142_
+.subckt mux2_x1 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[42][16] i1=soc.ram.ram[46][16] q=$abc$109383$new_n48139_
+.subckt and2_x1 i0=$abc$109383$new_n48139_ i1=$abc$109383$new_n44180_ q=$abc$109383$new_n48140_
+.subckt mux2_x1 cmd=$abc$109383$new_n43867_ i0=soc.ram.ram[43][16] i1=soc.ram.ram[47][16] q=$abc$109383$new_n48141_
+.subckt or21nand_x1 i0=$abc$109383$new_n45043_ i1=$abc$109383$new_n48141_ i2=$abc$109383$new_n44162_ nq=$abc$109383$new_n48142_
 .subckt nor2_x0 i0=$abc$109383$new_n48142_ i1=$abc$109383$new_n48140_ nq=$abc$109383$new_n48143_
 .subckt inv_x0 i=soc.ram.ram[34][16] nq=$abc$109383$new_n48144_
 .subckt inv_x0 i=soc.ram.ram[38][16] nq=$abc$109383$new_n48145_
-.subckt mx2_x2 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n48145_ i1=$abc$109383$new_n48144_ q=$abc$109383$new_n48146_
-.subckt ao22_x2 i0=$abc$109383$new_n45455_ i1=$abc$109383$new_n48146_ i2=$abc$109383$new_n44448_ q=$abc$109383$new_n48147_
+.subckt mux2_x1 cmd=$abc$109383$new_n44778_ i0=$abc$109383$new_n48145_ i1=$abc$109383$new_n48144_ q=$abc$109383$new_n48146_
+.subckt and21nor_x1 i0=$abc$109383$new_n45455_ i1=$abc$109383$new_n48146_ i2=$abc$109383$new_n44448_ nq=$abc$109383$new_n48147_
 .subckt inv_x0 i=soc.ram.ram[39][16] nq=$abc$109383$new_n48148_
 .subckt nand2_x0 i0=$abc$109383$new_n48148_ i1=$abc$109383$new_n43939_ nq=$abc$109383$new_n48149_
-.subckt ao22_x2 i0=soc.ram.ram[35][16] i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n48150_
+.subckt and21nor_x1 i0=soc.ram.ram[35][16] i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n48150_
 .subckt nand2_x0 i0=$abc$109383$new_n48150_ i1=$abc$109383$new_n48149_ nq=$abc$109383$new_n48151_
-.subckt oa22_x2 i0=$abc$109383$new_n48151_ i1=$abc$109383$new_n48147_ i2=$abc$109383$new_n48143_ q=$abc$109383$new_n48152_
+.subckt or21nand_x1 i0=$abc$109383$new_n48151_ i1=$abc$109383$new_n48147_ i2=$abc$109383$new_n48143_ nq=$abc$109383$new_n48152_
 .subckt nand2_x0 i0=$abc$109383$new_n48152_ i1=$abc$109383$new_n46527_ nq=$abc$109383$new_n48153_
-.subckt mx2_x2 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[40][16] i1=soc.ram.ram[44][16] q=$abc$109383$new_n48154_
-.subckt a2_x2 i0=$abc$109383$new_n48154_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n48155_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[41][16] i1=soc.ram.ram[45][16] q=$abc$109383$new_n48156_
-.subckt oa22_x2 i0=$abc$109383$new_n46934_ i1=$abc$109383$new_n48156_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n48157_
+.subckt mux2_x1 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[40][16] i1=soc.ram.ram[44][16] q=$abc$109383$new_n48154_
+.subckt and2_x1 i0=$abc$109383$new_n48154_ i1=$abc$109383$new_n43489_ q=$abc$109383$new_n48155_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[41][16] i1=soc.ram.ram[45][16] q=$abc$109383$new_n48156_
+.subckt or21nand_x1 i0=$abc$109383$new_n46934_ i1=$abc$109383$new_n48156_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n48157_
 .subckt nor2_x0 i0=$abc$109383$new_n48157_ i1=$abc$109383$new_n48155_ nq=$abc$109383$new_n48158_
 .subckt inv_x0 i=soc.ram.ram[32][16] nq=$abc$109383$new_n48159_
 .subckt inv_x0 i=soc.ram.ram[36][16] nq=$abc$109383$new_n48160_
-.subckt mx2_x2 cmd=$abc$109383$new_n43399_ i0=$abc$109383$new_n48160_ i1=$abc$109383$new_n48159_ q=$abc$109383$new_n48161_
-.subckt ao22_x2 i0=$abc$109383$new_n43791_ i1=$abc$109383$new_n48161_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n48162_
+.subckt mux2_x1 cmd=$abc$109383$new_n43399_ i0=$abc$109383$new_n48160_ i1=$abc$109383$new_n48159_ q=$abc$109383$new_n48161_
+.subckt and21nor_x1 i0=$abc$109383$new_n43791_ i1=$abc$109383$new_n48161_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n48162_
 .subckt inv_x0 i=soc.ram.ram[37][16] nq=$abc$109383$new_n48163_
 .subckt nand2_x0 i0=$abc$109383$new_n48163_ i1=$abc$109383$new_n43687_ nq=$abc$109383$new_n48164_
-.subckt ao22_x2 i0=soc.ram.ram[33][16] i1=$abc$109383$new_n43811_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n48165_
+.subckt and21nor_x1 i0=soc.ram.ram[33][16] i1=$abc$109383$new_n43811_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n48165_
 .subckt nand2_x0 i0=$abc$109383$new_n48165_ i1=$abc$109383$new_n48164_ nq=$abc$109383$new_n48166_
-.subckt oa22_x2 i0=$abc$109383$new_n48166_ i1=$abc$109383$new_n48162_ i2=$abc$109383$new_n48158_ q=$abc$109383$new_n48167_
+.subckt or21nand_x1 i0=$abc$109383$new_n48166_ i1=$abc$109383$new_n48162_ i2=$abc$109383$new_n48158_ nq=$abc$109383$new_n48167_
 .subckt nand2_x0 i0=$abc$109383$new_n48167_ i1=$abc$109383$new_n45016_ nq=$abc$109383$new_n48168_
 .subckt nand3_x0 i0=$abc$109383$new_n48168_ i1=$abc$109383$new_n48153_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n48169_
 .subckt nand3_x0 i0=$abc$109383$new_n48169_ i1=$abc$109383$new_n48138_ i2=$abc$109383$new_n43410_ nq=$abc$109383$new_n48170_
-.subckt mx2_x2 cmd=$abc$109383$new_n43996_ i0=soc.ram.ram[22][16] i1=soc.ram.ram[23][16] q=$abc$109383$new_n48171_
-.subckt a2_x2 i0=$abc$109383$new_n48171_ i1=$abc$109383$new_n44234_ q=$abc$109383$new_n48172_
-.subckt mx2_x2 cmd=$abc$109383$new_n43546_ i0=soc.ram.ram[18][16] i1=soc.ram.ram[19][16] q=$abc$109383$new_n48173_
-.subckt oa22_x2 i0=$abc$109383$new_n44158_ i1=$abc$109383$new_n48173_ i2=$abc$109383$new_n43648_ q=$abc$109383$new_n48174_
+.subckt mux2_x1 cmd=$abc$109383$new_n43996_ i0=soc.ram.ram[22][16] i1=soc.ram.ram[23][16] q=$abc$109383$new_n48171_
+.subckt and2_x1 i0=$abc$109383$new_n48171_ i1=$abc$109383$new_n44234_ q=$abc$109383$new_n48172_
+.subckt mux2_x1 cmd=$abc$109383$new_n43546_ i0=soc.ram.ram[18][16] i1=soc.ram.ram[19][16] q=$abc$109383$new_n48173_
+.subckt or21nand_x1 i0=$abc$109383$new_n44158_ i1=$abc$109383$new_n48173_ i2=$abc$109383$new_n43648_ nq=$abc$109383$new_n48174_
 .subckt nor2_x0 i0=$abc$109383$new_n48174_ i1=$abc$109383$new_n48172_ nq=$abc$109383$new_n48175_
-.subckt mx2_x2 cmd=$abc$109383$new_n45042_ i0=soc.ram.ram[26][16] i1=soc.ram.ram[27][16] q=$abc$109383$new_n48176_
-.subckt a2_x2 i0=$abc$109383$new_n48176_ i1=$abc$109383$new_n44412_ q=$abc$109383$new_n48177_
-.subckt mx2_x2 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[30][16] i1=soc.ram.ram[31][16] q=$abc$109383$new_n48178_
-.subckt oa22_x2 i0=$abc$109383$new_n43801_ i1=$abc$109383$new_n48178_ i2=$abc$109383$new_n43554_ q=$abc$109383$new_n48179_
+.subckt mux2_x1 cmd=$abc$109383$new_n45042_ i0=soc.ram.ram[26][16] i1=soc.ram.ram[27][16] q=$abc$109383$new_n48176_
+.subckt and2_x1 i0=$abc$109383$new_n48176_ i1=$abc$109383$new_n44412_ q=$abc$109383$new_n48177_
+.subckt mux2_x1 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[30][16] i1=soc.ram.ram[31][16] q=$abc$109383$new_n48178_
+.subckt or21nand_x1 i0=$abc$109383$new_n43801_ i1=$abc$109383$new_n48178_ i2=$abc$109383$new_n43554_ nq=$abc$109383$new_n48179_
 .subckt nor2_x0 i0=$abc$109383$new_n48179_ i1=$abc$109383$new_n48177_ nq=$abc$109383$new_n48180_
-.subckt ao22_x2 i0=$abc$109383$new_n48180_ i1=$abc$109383$new_n48175_ i2=$abc$109383$new_n44905_ q=$abc$109383$new_n48181_
-.subckt mx2_x2 cmd=$abc$109383$new_n45042_ i0=soc.ram.ram[16][16] i1=soc.ram.ram[17][16] q=$abc$109383$new_n48182_
-.subckt a2_x2 i0=$abc$109383$new_n48182_ i1=$abc$109383$new_n44412_ q=$abc$109383$new_n48183_
-.subckt mx2_x2 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[20][16] i1=soc.ram.ram[21][16] q=$abc$109383$new_n48184_
-.subckt oa22_x2 i0=$abc$109383$new_n43887_ i1=$abc$109383$new_n48184_ i2=$abc$109383$new_n43353_ q=$abc$109383$new_n48185_
+.subckt and21nor_x1 i0=$abc$109383$new_n48180_ i1=$abc$109383$new_n48175_ i2=$abc$109383$new_n44905_ nq=$abc$109383$new_n48181_
+.subckt mux2_x1 cmd=$abc$109383$new_n45042_ i0=soc.ram.ram[16][16] i1=soc.ram.ram[17][16] q=$abc$109383$new_n48182_
+.subckt and2_x1 i0=$abc$109383$new_n48182_ i1=$abc$109383$new_n44412_ q=$abc$109383$new_n48183_
+.subckt mux2_x1 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[20][16] i1=soc.ram.ram[21][16] q=$abc$109383$new_n48184_
+.subckt or21nand_x1 i0=$abc$109383$new_n43887_ i1=$abc$109383$new_n48184_ i2=$abc$109383$new_n43353_ nq=$abc$109383$new_n48185_
 .subckt nor2_x0 i0=$abc$109383$new_n48185_ i1=$abc$109383$new_n48183_ nq=$abc$109383$new_n48186_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[24][16] i1=soc.ram.ram[25][16] q=$abc$109383$new_n48187_
-.subckt a2_x2 i0=$abc$109383$new_n48187_ i1=$abc$109383$new_n44421_ q=$abc$109383$new_n48188_
-.subckt mx2_x2 cmd=$abc$109383$new_n43698_ i0=soc.ram.ram[28][16] i1=soc.ram.ram[29][16] q=$abc$109383$new_n48189_
-.subckt oa22_x2 i0=$abc$109383$new_n43925_ i1=$abc$109383$new_n48189_ i2=$abc$109383$new_n43391_ q=$abc$109383$new_n48190_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[24][16] i1=soc.ram.ram[25][16] q=$abc$109383$new_n48187_
+.subckt and2_x1 i0=$abc$109383$new_n48187_ i1=$abc$109383$new_n44421_ q=$abc$109383$new_n48188_
+.subckt mux2_x1 cmd=$abc$109383$new_n43698_ i0=soc.ram.ram[28][16] i1=soc.ram.ram[29][16] q=$abc$109383$new_n48189_
+.subckt or21nand_x1 i0=$abc$109383$new_n43925_ i1=$abc$109383$new_n48189_ i2=$abc$109383$new_n43391_ nq=$abc$109383$new_n48190_
 .subckt nor2_x0 i0=$abc$109383$new_n48190_ i1=$abc$109383$new_n48188_ nq=$abc$109383$new_n48191_
-.subckt ao22_x2 i0=$abc$109383$new_n48191_ i1=$abc$109383$new_n48186_ i2=$abc$109383$new_n43331_ q=$abc$109383$new_n48192_
-.subckt ao22_x2 i0=$abc$109383$new_n48192_ i1=$abc$109383$new_n48181_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n48193_
-.subckt mx2_x2 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[10][16] i1=soc.ram.ram[14][16] q=$abc$109383$new_n48194_
-.subckt a2_x2 i0=$abc$109383$new_n48194_ i1=$abc$109383$new_n44121_ q=$abc$109383$new_n48195_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[11][16] i1=soc.ram.ram[15][16] q=$abc$109383$new_n48196_
-.subckt oa22_x2 i0=$abc$109383$new_n43557_ i1=$abc$109383$new_n48196_ i2=$abc$109383$new_n43836_ q=$abc$109383$new_n48197_
+.subckt and21nor_x1 i0=$abc$109383$new_n48191_ i1=$abc$109383$new_n48186_ i2=$abc$109383$new_n43331_ nq=$abc$109383$new_n48192_
+.subckt and21nor_x1 i0=$abc$109383$new_n48192_ i1=$abc$109383$new_n48181_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n48193_
+.subckt mux2_x1 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[10][16] i1=soc.ram.ram[14][16] q=$abc$109383$new_n48194_
+.subckt and2_x1 i0=$abc$109383$new_n48194_ i1=$abc$109383$new_n44121_ q=$abc$109383$new_n48195_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[11][16] i1=soc.ram.ram[15][16] q=$abc$109383$new_n48196_
+.subckt or21nand_x1 i0=$abc$109383$new_n43557_ i1=$abc$109383$new_n48196_ i2=$abc$109383$new_n43836_ nq=$abc$109383$new_n48197_
 .subckt nor2_x0 i0=$abc$109383$new_n48197_ i1=$abc$109383$new_n48195_ nq=$abc$109383$new_n48198_
 .subckt inv_x0 i=soc.ram.ram[2][16] nq=$abc$109383$new_n48199_
 .subckt inv_x0 i=soc.ram.ram[6][16] nq=$abc$109383$new_n48200_
-.subckt mx2_x2 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n48200_ i1=$abc$109383$new_n48199_ q=$abc$109383$new_n48201_
-.subckt ao22_x2 i0=$abc$109383$new_n44504_ i1=$abc$109383$new_n48201_ i2=$abc$109383$new_n43432_ q=$abc$109383$new_n48202_
+.subckt mux2_x1 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n48200_ i1=$abc$109383$new_n48199_ q=$abc$109383$new_n48201_
+.subckt and21nor_x1 i0=$abc$109383$new_n44504_ i1=$abc$109383$new_n48201_ i2=$abc$109383$new_n43432_ nq=$abc$109383$new_n48202_
 .subckt inv_x0 i=soc.ram.ram[7][16] nq=$abc$109383$new_n48203_
 .subckt nand2_x0 i0=$abc$109383$new_n48203_ i1=$abc$109383$new_n43874_ nq=$abc$109383$new_n48204_
-.subckt ao22_x2 i0=soc.ram.ram[3][16] i1=$abc$109383$new_n43347_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n48205_
+.subckt and21nor_x1 i0=soc.ram.ram[3][16] i1=$abc$109383$new_n43347_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n48205_
 .subckt nand2_x0 i0=$abc$109383$new_n48205_ i1=$abc$109383$new_n48204_ nq=$abc$109383$new_n48206_
-.subckt oa22_x2 i0=$abc$109383$new_n48206_ i1=$abc$109383$new_n48202_ i2=$abc$109383$new_n48198_ q=$abc$109383$new_n48207_
-.subckt a2_x2 i0=$abc$109383$new_n48207_ i1=$abc$109383$new_n44789_ q=$abc$109383$new_n48208_
-.subckt mx2_x2 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[8][16] i1=soc.ram.ram[12][16] q=$abc$109383$new_n48209_
-.subckt a2_x2 i0=$abc$109383$new_n48209_ i1=$abc$109383$new_n43549_ q=$abc$109383$new_n48210_
-.subckt mx2_x2 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[9][16] i1=soc.ram.ram[13][16] q=$abc$109383$new_n48211_
-.subckt oa22_x2 i0=$abc$109383$new_n43394_ i1=$abc$109383$new_n48211_ i2=$abc$109383$new_n44161_ q=$abc$109383$new_n48212_
+.subckt or21nand_x1 i0=$abc$109383$new_n48206_ i1=$abc$109383$new_n48202_ i2=$abc$109383$new_n48198_ nq=$abc$109383$new_n48207_
+.subckt and2_x1 i0=$abc$109383$new_n48207_ i1=$abc$109383$new_n44789_ q=$abc$109383$new_n48208_
+.subckt mux2_x1 cmd=$abc$109383$new_n43639_ i0=soc.ram.ram[8][16] i1=soc.ram.ram[12][16] q=$abc$109383$new_n48209_
+.subckt and2_x1 i0=$abc$109383$new_n48209_ i1=$abc$109383$new_n43549_ q=$abc$109383$new_n48210_
+.subckt mux2_x1 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[9][16] i1=soc.ram.ram[13][16] q=$abc$109383$new_n48211_
+.subckt or21nand_x1 i0=$abc$109383$new_n43394_ i1=$abc$109383$new_n48211_ i2=$abc$109383$new_n44161_ nq=$abc$109383$new_n48212_
 .subckt nor2_x0 i0=$abc$109383$new_n48212_ i1=$abc$109383$new_n48210_ nq=$abc$109383$new_n48213_
 .subckt inv_x0 i=soc.ram.ram[0][16] nq=$abc$109383$new_n48214_
 .subckt inv_x0 i=soc.ram.ram[4][16] nq=$abc$109383$new_n48215_
-.subckt mx2_x2 cmd=$abc$109383$new_n43398_ i0=$abc$109383$new_n48215_ i1=$abc$109383$new_n48214_ q=$abc$109383$new_n48216_
-.subckt ao22_x2 i0=$abc$109383$new_n43690_ i1=$abc$109383$new_n48216_ i2=$abc$109383$new_n43391_ q=$abc$109383$new_n48217_
+.subckt mux2_x1 cmd=$abc$109383$new_n43398_ i0=$abc$109383$new_n48215_ i1=$abc$109383$new_n48214_ q=$abc$109383$new_n48216_
+.subckt and21nor_x1 i0=$abc$109383$new_n43690_ i1=$abc$109383$new_n48216_ i2=$abc$109383$new_n43391_ nq=$abc$109383$new_n48217_
 .subckt inv_x0 i=soc.ram.ram[5][16] nq=$abc$109383$new_n48218_
 .subckt nand2_x0 i0=$abc$109383$new_n48218_ i1=$abc$109383$new_n43977_ nq=$abc$109383$new_n48219_
-.subckt ao22_x2 i0=soc.ram.ram[1][16] i1=$abc$109383$new_n44025_ i2=$abc$109383$new_n43996_ q=$abc$109383$new_n48220_
+.subckt and21nor_x1 i0=soc.ram.ram[1][16] i1=$abc$109383$new_n44025_ i2=$abc$109383$new_n43996_ nq=$abc$109383$new_n48220_
 .subckt nand2_x0 i0=$abc$109383$new_n48220_ i1=$abc$109383$new_n48219_ nq=$abc$109383$new_n48221_
-.subckt oa22_x2 i0=$abc$109383$new_n48221_ i1=$abc$109383$new_n48217_ i2=$abc$109383$new_n48213_ q=$abc$109383$new_n48222_
-.subckt a2_x2 i0=$abc$109383$new_n48222_ i1=$abc$109383$new_n44741_ q=$abc$109383$new_n48223_
-.subckt ao22_x2 i0=$abc$109383$new_n48223_ i1=$abc$109383$new_n48208_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n48224_
+.subckt or21nand_x1 i0=$abc$109383$new_n48221_ i1=$abc$109383$new_n48217_ i2=$abc$109383$new_n48213_ nq=$abc$109383$new_n48222_
+.subckt and2_x1 i0=$abc$109383$new_n48222_ i1=$abc$109383$new_n44741_ q=$abc$109383$new_n48223_
+.subckt and21nor_x1 i0=$abc$109383$new_n48223_ i1=$abc$109383$new_n48208_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n48224_
 .subckt nor2_x0 i0=$abc$109383$new_n48224_ i1=$abc$109383$new_n48193_ nq=$abc$109383$new_n48225_
-.subckt ao22_x2 i0=$abc$109383$new_n43900_ i1=$abc$109383$new_n48225_ i2=$abc$109383$new_n48170_ q=$abc$109383$new_n48226_
-.subckt o2_x2 i0=$abc$109383$new_n48226_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n48227_
-.subckt oa22_x2 i0=$abc$109383$new_n48227_ i1=$abc$109383$new_n48110_ i2=$abc$109383$new_n47999_ q=$abc$109383$new_n48228_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n48228_ i2=$abc$109383$new_n47984_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103262
+.subckt and21nor_x1 i0=$abc$109383$new_n43900_ i1=$abc$109383$new_n48225_ i2=$abc$109383$new_n48170_ nq=$abc$109383$new_n48226_
+.subckt or2_x1 i0=$abc$109383$new_n48226_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n48227_
+.subckt or21nand_x1 i0=$abc$109383$new_n48227_ i1=$abc$109383$new_n48110_ i2=$abc$109383$new_n47999_ nq=$abc$109383$new_n48228_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n48228_ i2=$abc$109383$new_n47984_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103262
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n48230_
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[17] q=$abc$109383$new_n48231_
-.subckt a2_x2 i0=$abc$109383$new_n48231_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n48232_
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[17] nq=$abc$109383$new_n48231_
+.subckt and2_x1 i0=$abc$109383$new_n48231_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n48232_
 .subckt nand3_x0 i0=$abc$109383$new_n44269_ i1=$abc$109383$new_n44268_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n48233_
 .subckt nand3_x0 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n48234_
-.subckt oa22_x2 i0=$abc$109383$new_n48234_ i1=$abc$109383$new_n48233_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n48235_
+.subckt or21nand_x1 i0=$abc$109383$new_n48234_ i1=$abc$109383$new_n48233_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n48235_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n27640_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n48236_
 .subckt nand3_x0 i0=$abc$109383$new_n20241_ i1=$abc$109383$new_n20803_ i2=soc.bridge.csr_bridge_1.wb__dat_r[17] nq=$abc$109383$new_n48237_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n48238_
-.subckt o2_x2 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n48238_ q=$abc$109383$new_n48239_
-.subckt a2_x2 i0=$abc$109383$new_n48239_ i1=$abc$109383$new_n48237_ q=$abc$109383$new_n48240_
-.subckt o4_x2 i0=$abc$109383$new_n48240_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n48241_
+.subckt or2_x1 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n48238_ q=$abc$109383$new_n48239_
+.subckt and2_x1 i0=$abc$109383$new_n48239_ i1=$abc$109383$new_n48237_ q=$abc$109383$new_n48240_
+.subckt or4_x1 i0=$abc$109383$new_n48240_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n48241_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[17] nq=$abc$109383$new_n48242_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28569_ q=$abc$109383$new_n48243_
-.subckt a2_x2 i0=$abc$109383$new_n48243_ i1=$abc$109383$new_n48242_ q=$abc$109383$new_n48244_
-.subckt a2_x2 i0=$abc$109383$new_n48244_ i1=$abc$109383$new_n48241_ q=$abc$109383$new_n48245_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28569_ q=$abc$109383$new_n48243_
+.subckt and2_x1 i0=$abc$109383$new_n48243_ i1=$abc$109383$new_n48242_ q=$abc$109383$new_n48244_
+.subckt and2_x1 i0=$abc$109383$new_n48244_ i1=$abc$109383$new_n48241_ q=$abc$109383$new_n48245_
 .subckt nand3_x0 i0=$abc$109383$new_n48245_ i1=$abc$109383$new_n48236_ i2=$abc$109383$new_n48235_ nq=$abc$109383$new_n48246_
 .subckt nand2_x0 i0=soc.ram.ram[33][17] i1=$abc$109383$new_n43804_ nq=$abc$109383$new_n48247_
 .subckt nand2_x0 i0=soc.ram.ram[37][17] i1=$abc$109383$new_n43636_ nq=$abc$109383$new_n48248_
-.subckt a2_x2 i0=$abc$109383$new_n48248_ i1=$abc$109383$new_n43469_ q=$abc$109383$new_n48249_
-.subckt a2_x2 i0=$abc$109383$new_n48249_ i1=$abc$109383$new_n48247_ q=$abc$109383$new_n48250_
+.subckt and2_x1 i0=$abc$109383$new_n48248_ i1=$abc$109383$new_n43469_ q=$abc$109383$new_n48249_
+.subckt and2_x1 i0=$abc$109383$new_n48249_ i1=$abc$109383$new_n48247_ q=$abc$109383$new_n48250_
 .subckt nand2_x0 i0=soc.ram.ram[41][17] i1=$abc$109383$new_n44427_ nq=$abc$109383$new_n48251_
 .subckt inv_x0 i=soc.ram.ram[45][17] nq=$abc$109383$new_n48252_
-.subckt ao22_x2 i0=$abc$109383$new_n43398_ i1=$abc$109383$new_n48252_ i2=$abc$109383$new_n43352_ q=$abc$109383$new_n48253_
-.subckt a2_x2 i0=$abc$109383$new_n48253_ i1=$abc$109383$new_n48251_ q=$abc$109383$new_n48254_
-.subckt ao22_x2 i0=$abc$109383$new_n48254_ i1=$abc$109383$new_n48250_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n48255_
+.subckt and21nor_x1 i0=$abc$109383$new_n43398_ i1=$abc$109383$new_n48252_ i2=$abc$109383$new_n43352_ nq=$abc$109383$new_n48253_
+.subckt and2_x1 i0=$abc$109383$new_n48253_ i1=$abc$109383$new_n48251_ q=$abc$109383$new_n48254_
+.subckt and21nor_x1 i0=$abc$109383$new_n48254_ i1=$abc$109383$new_n48250_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n48255_
 .subckt nand2_x0 i0=soc.ram.ram[32][17] i1=$abc$109383$new_n43382_ nq=$abc$109383$new_n48256_
 .subckt nand2_x0 i0=soc.ram.ram[36][17] i1=$abc$109383$new_n43742_ nq=$abc$109383$new_n48257_
-.subckt a2_x2 i0=$abc$109383$new_n48257_ i1=$abc$109383$new_n43431_ q=$abc$109383$new_n48258_
-.subckt a2_x2 i0=$abc$109383$new_n48258_ i1=$abc$109383$new_n48256_ q=$abc$109383$new_n48259_
+.subckt and2_x1 i0=$abc$109383$new_n48257_ i1=$abc$109383$new_n43431_ q=$abc$109383$new_n48258_
+.subckt and2_x1 i0=$abc$109383$new_n48258_ i1=$abc$109383$new_n48256_ q=$abc$109383$new_n48259_
 .subckt nand2_x0 i0=soc.ram.ram[40][17] i1=$abc$109383$new_n43929_ nq=$abc$109383$new_n48260_
 .subckt inv_x0 i=soc.ram.ram[44][17] nq=$abc$109383$new_n48261_
-.subckt ao22_x2 i0=$abc$109383$new_n43529_ i1=$abc$109383$new_n48261_ i2=$abc$109383$new_n43352_ q=$abc$109383$new_n48262_
-.subckt a2_x2 i0=$abc$109383$new_n48262_ i1=$abc$109383$new_n48260_ q=$abc$109383$new_n48263_
-.subckt ao22_x2 i0=$abc$109383$new_n48263_ i1=$abc$109383$new_n48259_ i2=$abc$109383$new_n43941_ q=$abc$109383$new_n48264_
-.subckt ao22_x2 i0=$abc$109383$new_n48264_ i1=$abc$109383$new_n48255_ i2=$abc$109383$new_n43920_ q=$abc$109383$new_n48265_
+.subckt and21nor_x1 i0=$abc$109383$new_n43529_ i1=$abc$109383$new_n48261_ i2=$abc$109383$new_n43352_ nq=$abc$109383$new_n48262_
+.subckt and2_x1 i0=$abc$109383$new_n48262_ i1=$abc$109383$new_n48260_ q=$abc$109383$new_n48263_
+.subckt and21nor_x1 i0=$abc$109383$new_n48263_ i1=$abc$109383$new_n48259_ i2=$abc$109383$new_n43941_ nq=$abc$109383$new_n48264_
+.subckt and21nor_x1 i0=$abc$109383$new_n48264_ i1=$abc$109383$new_n48255_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n48265_
 .subckt nand2_x0 i0=soc.ram.ram[49][17] i1=$abc$109383$new_n44161_ nq=$abc$109383$new_n48266_
 .subckt inv_x0 i=soc.ram.ram[57][17] nq=$abc$109383$new_n48267_
-.subckt ao22_x2 i0=$abc$109383$new_n48267_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44535_ q=$abc$109383$new_n48268_
-.subckt a2_x2 i0=$abc$109383$new_n48268_ i1=$abc$109383$new_n48266_ q=$abc$109383$new_n48269_
+.subckt and21nor_x1 i0=$abc$109383$new_n48267_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44535_ nq=$abc$109383$new_n48268_
+.subckt and2_x1 i0=$abc$109383$new_n48268_ i1=$abc$109383$new_n48266_ q=$abc$109383$new_n48269_
 .subckt nand2_x0 i0=soc.ram.ram[53][17] i1=$abc$109383$new_n43469_ nq=$abc$109383$new_n48270_
 .subckt inv_x0 i=soc.ram.ram[61][17] nq=$abc$109383$new_n48271_
-.subckt ao22_x2 i0=$abc$109383$new_n48271_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44418_ q=$abc$109383$new_n48272_
-.subckt a2_x2 i0=$abc$109383$new_n48272_ i1=$abc$109383$new_n48270_ q=$abc$109383$new_n48273_
-.subckt ao22_x2 i0=$abc$109383$new_n48273_ i1=$abc$109383$new_n48269_ i2=$abc$109383$new_n46934_ q=$abc$109383$new_n48274_
+.subckt and21nor_x1 i0=$abc$109383$new_n48271_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44418_ nq=$abc$109383$new_n48272_
+.subckt and2_x1 i0=$abc$109383$new_n48272_ i1=$abc$109383$new_n48270_ q=$abc$109383$new_n48273_
+.subckt and21nor_x1 i0=$abc$109383$new_n48273_ i1=$abc$109383$new_n48269_ i2=$abc$109383$new_n46934_ nq=$abc$109383$new_n48274_
 .subckt nand2_x0 i0=soc.ram.ram[48][17] i1=$abc$109383$new_n43469_ nq=$abc$109383$new_n48275_
 .subckt inv_x0 i=soc.ram.ram[56][17] nq=$abc$109383$new_n48276_
-.subckt ao22_x2 i0=$abc$109383$new_n48276_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n43877_ q=$abc$109383$new_n48277_
-.subckt a2_x2 i0=$abc$109383$new_n48277_ i1=$abc$109383$new_n48275_ q=$abc$109383$new_n48278_
+.subckt and21nor_x1 i0=$abc$109383$new_n48276_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n43877_ nq=$abc$109383$new_n48277_
+.subckt and2_x1 i0=$abc$109383$new_n48277_ i1=$abc$109383$new_n48275_ q=$abc$109383$new_n48278_
 .subckt nand2_x0 i0=soc.ram.ram[52][17] i1=$abc$109383$new_n43431_ nq=$abc$109383$new_n48279_
 .subckt inv_x0 i=soc.ram.ram[60][17] nq=$abc$109383$new_n48280_
-.subckt ao22_x2 i0=$abc$109383$new_n48280_ i1=$abc$109383$new_n43389_ i2=$abc$109383$new_n44163_ q=$abc$109383$new_n48281_
-.subckt a2_x2 i0=$abc$109383$new_n48281_ i1=$abc$109383$new_n48279_ q=$abc$109383$new_n48282_
-.subckt ao22_x2 i0=$abc$109383$new_n48282_ i1=$abc$109383$new_n48278_ i2=$abc$109383$new_n43731_ q=$abc$109383$new_n48283_
-.subckt ao22_x2 i0=$abc$109383$new_n48283_ i1=$abc$109383$new_n48274_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n48284_
-.subckt ao22_x2 i0=$abc$109383$new_n48284_ i1=$abc$109383$new_n48265_ i2=$abc$109383$new_n43856_ q=$abc$109383$new_n48285_
-.subckt mx2_x2 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[35][17] i1=soc.ram.ram[39][17] q=$abc$109383$new_n48286_
-.subckt mx2_x2 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[34][17] i1=soc.ram.ram[38][17] q=$abc$109383$new_n48287_
-.subckt mx2_x2 cmd=$abc$109383$new_n44402_ i0=$abc$109383$new_n48287_ i1=$abc$109383$new_n48286_ q=$abc$109383$new_n48288_
-.subckt a2_x2 i0=$abc$109383$new_n48288_ i1=$abc$109383$new_n44448_ q=$abc$109383$new_n48289_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[43][17] i1=soc.ram.ram[47][17] q=$abc$109383$new_n48290_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[42][17] i1=soc.ram.ram[46][17] q=$abc$109383$new_n48291_
-.subckt mx2_x2 cmd=$abc$109383$new_n46814_ i0=$abc$109383$new_n48291_ i1=$abc$109383$new_n48290_ q=$abc$109383$new_n48292_
-.subckt oa22_x2 i0=$abc$109383$new_n43525_ i1=$abc$109383$new_n48292_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n48293_
+.subckt and21nor_x1 i0=$abc$109383$new_n48280_ i1=$abc$109383$new_n43389_ i2=$abc$109383$new_n44163_ nq=$abc$109383$new_n48281_
+.subckt and2_x1 i0=$abc$109383$new_n48281_ i1=$abc$109383$new_n48279_ q=$abc$109383$new_n48282_
+.subckt and21nor_x1 i0=$abc$109383$new_n48282_ i1=$abc$109383$new_n48278_ i2=$abc$109383$new_n43731_ nq=$abc$109383$new_n48283_
+.subckt and21nor_x1 i0=$abc$109383$new_n48283_ i1=$abc$109383$new_n48274_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n48284_
+.subckt and21nor_x1 i0=$abc$109383$new_n48284_ i1=$abc$109383$new_n48265_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n48285_
+.subckt mux2_x1 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[35][17] i1=soc.ram.ram[39][17] q=$abc$109383$new_n48286_
+.subckt mux2_x1 cmd=$abc$109383$new_n43627_ i0=soc.ram.ram[34][17] i1=soc.ram.ram[38][17] q=$abc$109383$new_n48287_
+.subckt mux2_x1 cmd=$abc$109383$new_n44402_ i0=$abc$109383$new_n48287_ i1=$abc$109383$new_n48286_ q=$abc$109383$new_n48288_
+.subckt and2_x1 i0=$abc$109383$new_n48288_ i1=$abc$109383$new_n44448_ q=$abc$109383$new_n48289_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[43][17] i1=soc.ram.ram[47][17] q=$abc$109383$new_n48290_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[42][17] i1=soc.ram.ram[46][17] q=$abc$109383$new_n48291_
+.subckt mux2_x1 cmd=$abc$109383$new_n46814_ i0=$abc$109383$new_n48291_ i1=$abc$109383$new_n48290_ q=$abc$109383$new_n48292_
+.subckt or21nand_x1 i0=$abc$109383$new_n43525_ i1=$abc$109383$new_n48292_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n48293_
 .subckt nor2_x0 i0=$abc$109383$new_n48293_ i1=$abc$109383$new_n48289_ nq=$abc$109383$new_n48294_
 .subckt nand2_x0 i0=soc.ram.ram[63][17] i1=$abc$109383$new_n44175_ nq=$abc$109383$new_n48295_
 .subckt inv_x0 i=soc.ram.ram[62][17] nq=$abc$109383$new_n48296_
-.subckt ao22_x2 i0=$abc$109383$new_n43611_ i1=$abc$109383$new_n48296_ i2=$abc$109383$new_n43484_ q=$abc$109383$new_n48297_
+.subckt and21nor_x1 i0=$abc$109383$new_n43611_ i1=$abc$109383$new_n48296_ i2=$abc$109383$new_n43484_ nq=$abc$109383$new_n48297_
 .subckt nand2_x0 i0=$abc$109383$new_n48297_ i1=$abc$109383$new_n48295_ nq=$abc$109383$new_n48298_
-.subckt a2_x2 i0=soc.ram.ram[59][17] i1=$abc$109383$new_n43362_ q=$abc$109383$new_n48299_
-.subckt oa22_x2 i0=$abc$109383$new_n43601_ i1=soc.ram.ram[58][17] i2=$abc$109383$new_n43742_ q=$abc$109383$new_n48300_
-.subckt ao22_x2 i0=$abc$109383$new_n48300_ i1=$abc$109383$new_n48299_ i2=$abc$109383$new_n43353_ q=$abc$109383$new_n48301_
+.subckt and2_x1 i0=soc.ram.ram[59][17] i1=$abc$109383$new_n43362_ q=$abc$109383$new_n48299_
+.subckt or21nand_x1 i0=$abc$109383$new_n43601_ i1=soc.ram.ram[58][17] i2=$abc$109383$new_n43742_ nq=$abc$109383$new_n48300_
+.subckt and21nor_x1 i0=$abc$109383$new_n48300_ i1=$abc$109383$new_n48299_ i2=$abc$109383$new_n43353_ nq=$abc$109383$new_n48301_
 .subckt nand2_x0 i0=$abc$109383$new_n48301_ i1=$abc$109383$new_n48298_ nq=$abc$109383$new_n48302_
 .subckt nand2_x0 i0=soc.ram.ram[55][17] i1=$abc$109383$new_n43996_ nq=$abc$109383$new_n48303_
 .subckt inv_x0 i=soc.ram.ram[54][17] nq=$abc$109383$new_n48304_
-.subckt ao22_x2 i0=$abc$109383$new_n43641_ i1=$abc$109383$new_n48304_ i2=$abc$109383$new_n43704_ q=$abc$109383$new_n48305_
-.subckt a2_x2 i0=$abc$109383$new_n48305_ i1=$abc$109383$new_n48303_ q=$abc$109383$new_n48306_
+.subckt and21nor_x1 i0=$abc$109383$new_n43641_ i1=$abc$109383$new_n48304_ i2=$abc$109383$new_n43704_ nq=$abc$109383$new_n48305_
+.subckt and2_x1 i0=$abc$109383$new_n48305_ i1=$abc$109383$new_n48303_ q=$abc$109383$new_n48306_
 .subckt nand2_x0 i0=soc.ram.ram[51][17] i1=$abc$109383$new_n43796_ nq=$abc$109383$new_n48307_
 .subckt inv_x0 i=soc.ram.ram[50][17] nq=$abc$109383$new_n48308_
-.subckt ao22_x2 i0=$abc$109383$new_n43393_ i1=$abc$109383$new_n48308_ i2=$abc$109383$new_n43529_ q=$abc$109383$new_n48309_
-.subckt oa22_x2 i0=$abc$109383$new_n48309_ i1=$abc$109383$new_n48307_ i2=$abc$109383$new_n43647_ q=$abc$109383$new_n48310_
-.subckt ao22_x2 i0=$abc$109383$new_n48310_ i1=$abc$109383$new_n48306_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n48311_
-.subckt a2_x2 i0=$abc$109383$new_n48311_ i1=$abc$109383$new_n48302_ q=$abc$109383$new_n48312_
-.subckt ao22_x2 i0=$abc$109383$new_n48312_ i1=$abc$109383$new_n48294_ i2=$abc$109383$new_n46119_ q=$abc$109383$new_n48313_
+.subckt and21nor_x1 i0=$abc$109383$new_n43393_ i1=$abc$109383$new_n48308_ i2=$abc$109383$new_n43529_ nq=$abc$109383$new_n48309_
+.subckt or21nand_x1 i0=$abc$109383$new_n48309_ i1=$abc$109383$new_n48307_ i2=$abc$109383$new_n43647_ nq=$abc$109383$new_n48310_
+.subckt and21nor_x1 i0=$abc$109383$new_n48310_ i1=$abc$109383$new_n48306_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n48311_
+.subckt and2_x1 i0=$abc$109383$new_n48311_ i1=$abc$109383$new_n48302_ q=$abc$109383$new_n48312_
+.subckt and21nor_x1 i0=$abc$109383$new_n48312_ i1=$abc$109383$new_n48294_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n48313_
 .subckt nor3_x0 i0=$abc$109383$new_n48313_ i1=$abc$109383$new_n48285_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n48314_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[17][17] i1=soc.ram.ram[21][17] q=$abc$109383$new_n48315_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[16][17] i1=soc.ram.ram[20][17] q=$abc$109383$new_n48316_
-.subckt mx2_x2 cmd=$abc$109383$new_n44044_ i0=$abc$109383$new_n48316_ i1=$abc$109383$new_n48315_ q=$abc$109383$new_n48317_
-.subckt o2_x2 i0=$abc$109383$new_n48317_ i1=$abc$109383$new_n43897_ q=$abc$109383$new_n48318_
-.subckt mx2_x2 cmd=$abc$109383$new_n43608_ i0=soc.ram.ram[25][17] i1=soc.ram.ram[29][17] q=$abc$109383$new_n48319_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[17][17] i1=soc.ram.ram[21][17] q=$abc$109383$new_n48315_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[16][17] i1=soc.ram.ram[20][17] q=$abc$109383$new_n48316_
+.subckt mux2_x1 cmd=$abc$109383$new_n44044_ i0=$abc$109383$new_n48316_ i1=$abc$109383$new_n48315_ q=$abc$109383$new_n48317_
+.subckt or2_x1 i0=$abc$109383$new_n48317_ i1=$abc$109383$new_n43897_ q=$abc$109383$new_n48318_
+.subckt mux2_x1 cmd=$abc$109383$new_n43608_ i0=soc.ram.ram[25][17] i1=soc.ram.ram[29][17] q=$abc$109383$new_n48319_
 .subckt nand2_x0 i0=$abc$109383$new_n48319_ i1=$abc$109383$new_n44945_ nq=$abc$109383$new_n48320_
-.subckt mx2_x2 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[24][17] i1=soc.ram.ram[28][17] q=$abc$109383$new_n48321_
+.subckt mux2_x1 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[24][17] i1=soc.ram.ram[28][17] q=$abc$109383$new_n48321_
 .subckt nand2_x0 i0=$abc$109383$new_n48321_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n48322_
 .subckt nand3_x0 i0=$abc$109383$new_n48322_ i1=$abc$109383$new_n48320_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n48323_
 .subckt nand3_x0 i0=$abc$109383$new_n48323_ i1=$abc$109383$new_n48318_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n48324_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[1][17] i1=soc.ram.ram[5][17] q=$abc$109383$new_n48325_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[0][17] i1=soc.ram.ram[4][17] q=$abc$109383$new_n48326_
-.subckt mx2_x2 cmd=$abc$109383$new_n43797_ i0=$abc$109383$new_n48326_ i1=$abc$109383$new_n48325_ q=$abc$109383$new_n48327_
-.subckt o2_x2 i0=$abc$109383$new_n48327_ i1=$abc$109383$new_n44410_ q=$abc$109383$new_n48328_
-.subckt mx2_x2 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[8][17] i1=soc.ram.ram[12][17] q=$abc$109383$new_n48329_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[1][17] i1=soc.ram.ram[5][17] q=$abc$109383$new_n48325_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[0][17] i1=soc.ram.ram[4][17] q=$abc$109383$new_n48326_
+.subckt mux2_x1 cmd=$abc$109383$new_n43797_ i0=$abc$109383$new_n48326_ i1=$abc$109383$new_n48325_ q=$abc$109383$new_n48327_
+.subckt or2_x1 i0=$abc$109383$new_n48327_ i1=$abc$109383$new_n44410_ q=$abc$109383$new_n48328_
+.subckt mux2_x1 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[8][17] i1=soc.ram.ram[12][17] q=$abc$109383$new_n48329_
 .subckt nand2_x0 i0=$abc$109383$new_n48329_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n48330_
-.subckt mx2_x2 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[9][17] i1=soc.ram.ram[13][17] q=$abc$109383$new_n48331_
+.subckt mux2_x1 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[9][17] i1=soc.ram.ram[13][17] q=$abc$109383$new_n48331_
 .subckt nand2_x0 i0=$abc$109383$new_n48331_ i1=$abc$109383$new_n45405_ nq=$abc$109383$new_n48332_
 .subckt nand3_x0 i0=$abc$109383$new_n48332_ i1=$abc$109383$new_n48330_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n48333_
 .subckt nand3_x0 i0=$abc$109383$new_n48333_ i1=$abc$109383$new_n48328_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n48334_
-.subckt a3_x2 i0=$abc$109383$new_n48334_ i1=$abc$109383$new_n48324_ i2=$abc$109383$new_n44494_ q=$abc$109383$new_n48335_
-.subckt mx2_x2 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[2][17] i1=soc.ram.ram[6][17] q=$abc$109383$new_n48336_
-.subckt a2_x2 i0=$abc$109383$new_n48336_ i1=$abc$109383$new_n43335_ q=$abc$109383$new_n48337_
-.subckt ao22_x2 i0=soc.ram.ram[3][17] i1=$abc$109383$new_n43558_ i2=$abc$109383$new_n44047_ q=$abc$109383$new_n48338_
-.subckt ao22_x2 i0=$abc$109383$new_n43878_ i1=soc.ram.ram[7][17] i2=$abc$109383$new_n48338_ q=$abc$109383$new_n48339_
-.subckt o3_x2 i0=$abc$109383$new_n48339_ i1=$abc$109383$new_n48337_ i2=$abc$109383$new_n43649_ q=$abc$109383$new_n48340_
-.subckt mx2_x2 cmd=$abc$109383$new_n44338_ i0=soc.ram.ram[10][17] i1=soc.ram.ram[14][17] q=$abc$109383$new_n48341_
-.subckt a2_x2 i0=$abc$109383$new_n48341_ i1=$abc$109383$new_n44097_ q=$abc$109383$new_n48342_
-.subckt o2_x2 i0=soc.ram.ram[11][17] i1=$abc$109383$new_n44795_ q=$abc$109383$new_n48343_
-.subckt ao22_x2 i0=soc.ram.ram[15][17] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n43362_ q=$abc$109383$new_n48344_
-.subckt oa22_x2 i0=$abc$109383$new_n48344_ i1=$abc$109383$new_n48343_ i2=$abc$109383$new_n43432_ q=$abc$109383$new_n48345_
-.subckt ao22_x2 i0=$abc$109383$new_n48345_ i1=$abc$109383$new_n48342_ i2=$abc$109383$new_n43920_ q=$abc$109383$new_n48346_
+.subckt and3_x1 i0=$abc$109383$new_n48334_ i1=$abc$109383$new_n48324_ i2=$abc$109383$new_n44494_ q=$abc$109383$new_n48335_
+.subckt mux2_x1 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[2][17] i1=soc.ram.ram[6][17] q=$abc$109383$new_n48336_
+.subckt and2_x1 i0=$abc$109383$new_n48336_ i1=$abc$109383$new_n43335_ q=$abc$109383$new_n48337_
+.subckt and21nor_x1 i0=soc.ram.ram[3][17] i1=$abc$109383$new_n43558_ i2=$abc$109383$new_n44047_ nq=$abc$109383$new_n48338_
+.subckt and21nor_x1 i0=$abc$109383$new_n43878_ i1=soc.ram.ram[7][17] i2=$abc$109383$new_n48338_ nq=$abc$109383$new_n48339_
+.subckt or3_x1 i0=$abc$109383$new_n48339_ i1=$abc$109383$new_n48337_ i2=$abc$109383$new_n43649_ q=$abc$109383$new_n48340_
+.subckt mux2_x1 cmd=$abc$109383$new_n44338_ i0=soc.ram.ram[10][17] i1=soc.ram.ram[14][17] q=$abc$109383$new_n48341_
+.subckt and2_x1 i0=$abc$109383$new_n48341_ i1=$abc$109383$new_n44097_ q=$abc$109383$new_n48342_
+.subckt or2_x1 i0=soc.ram.ram[11][17] i1=$abc$109383$new_n44795_ q=$abc$109383$new_n48343_
+.subckt and21nor_x1 i0=soc.ram.ram[15][17] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n43362_ nq=$abc$109383$new_n48344_
+.subckt or21nand_x1 i0=$abc$109383$new_n48344_ i1=$abc$109383$new_n48343_ i2=$abc$109383$new_n43432_ nq=$abc$109383$new_n48345_
+.subckt and21nor_x1 i0=$abc$109383$new_n48345_ i1=$abc$109383$new_n48342_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n48346_
 .subckt nand2_x0 i0=$abc$109383$new_n48346_ i1=$abc$109383$new_n48340_ nq=$abc$109383$new_n48347_
 .subckt inv_x0 i=soc.ram.ram[23][17] nq=$abc$109383$new_n48348_
 .subckt nand2_x0 i0=$abc$109383$new_n48348_ i1=$abc$109383$new_n43868_ nq=$abc$109383$new_n48349_
-.subckt ao22_x2 i0=soc.ram.ram[19][17] i1=$abc$109383$new_n44181_ i2=$abc$109383$new_n43699_ q=$abc$109383$new_n48350_
+.subckt and21nor_x1 i0=soc.ram.ram[19][17] i1=$abc$109383$new_n44181_ i2=$abc$109383$new_n43699_ nq=$abc$109383$new_n48350_
 .subckt nand2_x0 i0=$abc$109383$new_n48350_ i1=$abc$109383$new_n48349_ nq=$abc$109383$new_n48351_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[18][17] i1=soc.ram.ram[22][17] q=$abc$109383$new_n48352_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[18][17] i1=soc.ram.ram[22][17] q=$abc$109383$new_n48352_
 .subckt nand2_x0 i0=$abc$109383$new_n48352_ i1=$abc$109383$new_n44630_ nq=$abc$109383$new_n48353_
-.subckt a3_x2 i0=$abc$109383$new_n48353_ i1=$abc$109383$new_n48351_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n48354_
+.subckt and3_x1 i0=$abc$109383$new_n48353_ i1=$abc$109383$new_n48351_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n48354_
 .subckt inv_x0 i=soc.ram.ram[31][17] nq=$abc$109383$new_n48355_
 .subckt nand2_x0 i0=$abc$109383$new_n48355_ i1=$abc$109383$new_n45116_ nq=$abc$109383$new_n48356_
-.subckt ao22_x2 i0=soc.ram.ram[27][17] i1=$abc$109383$new_n43867_ i2=$abc$109383$new_n46814_ q=$abc$109383$new_n48357_
+.subckt and21nor_x1 i0=soc.ram.ram[27][17] i1=$abc$109383$new_n43867_ i2=$abc$109383$new_n46814_ nq=$abc$109383$new_n48357_
 .subckt nand2_x0 i0=$abc$109383$new_n48357_ i1=$abc$109383$new_n48356_ nq=$abc$109383$new_n48358_
-.subckt mx2_x2 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[26][17] i1=soc.ram.ram[30][17] q=$abc$109383$new_n48359_
+.subckt mux2_x1 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[26][17] i1=soc.ram.ram[30][17] q=$abc$109383$new_n48359_
 .subckt nand2_x0 i0=$abc$109383$new_n48359_ i1=$abc$109383$new_n43384_ nq=$abc$109383$new_n48360_
-.subckt a2_x2 i0=$abc$109383$new_n48360_ i1=$abc$109383$new_n43524_ q=$abc$109383$new_n48361_
-.subckt oa22_x2 i0=$abc$109383$new_n48361_ i1=$abc$109383$new_n48358_ i2=$abc$109383$new_n43324_ q=$abc$109383$new_n48362_
-.subckt ao22_x2 i0=$abc$109383$new_n48362_ i1=$abc$109383$new_n48354_ i2=$abc$109383$new_n44905_ q=$abc$109383$new_n48363_
-.subckt oa22_x2 i0=$abc$109383$new_n48363_ i1=$abc$109383$new_n48347_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n48364_
-.subckt o2_x2 i0=$abc$109383$new_n48364_ i1=$abc$109383$new_n48335_ q=$abc$109383$new_n48365_
+.subckt and2_x1 i0=$abc$109383$new_n48360_ i1=$abc$109383$new_n43524_ q=$abc$109383$new_n48361_
+.subckt or21nand_x1 i0=$abc$109383$new_n48361_ i1=$abc$109383$new_n48358_ i2=$abc$109383$new_n43324_ nq=$abc$109383$new_n48362_
+.subckt and21nor_x1 i0=$abc$109383$new_n48362_ i1=$abc$109383$new_n48354_ i2=$abc$109383$new_n44905_ nq=$abc$109383$new_n48363_
+.subckt or21nand_x1 i0=$abc$109383$new_n48363_ i1=$abc$109383$new_n48347_ i2=$abc$109383$new_n43464_ nq=$abc$109383$new_n48364_
+.subckt or2_x1 i0=$abc$109383$new_n48364_ i1=$abc$109383$new_n48335_ q=$abc$109383$new_n48365_
 .subckt nand2_x0 i0=$abc$109383$new_n48365_ i1=$abc$109383$new_n46883_ nq=$abc$109383$new_n48366_
-.subckt ao22_x2 i0=$abc$109383$new_n48366_ i1=$abc$109383$new_n48314_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n48367_
-.subckt mx2_x2 cmd=$abc$109383$new_n43337_ i0=soc.ram.ram[66][17] i1=soc.ram.ram[70][17] q=$abc$109383$new_n48368_
-.subckt mx2_x2 cmd=$abc$109383$new_n43337_ i0=soc.ram.ram[67][17] i1=soc.ram.ram[71][17] q=$abc$109383$new_n48369_
-.subckt mx2_x2 cmd=$abc$109383$new_n43633_ i0=$abc$109383$new_n48369_ i1=$abc$109383$new_n48368_ q=$abc$109383$new_n48370_
+.subckt and21nor_x1 i0=$abc$109383$new_n48366_ i1=$abc$109383$new_n48314_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n48367_
+.subckt mux2_x1 cmd=$abc$109383$new_n43337_ i0=soc.ram.ram[66][17] i1=soc.ram.ram[70][17] q=$abc$109383$new_n48368_
+.subckt mux2_x1 cmd=$abc$109383$new_n43337_ i0=soc.ram.ram[67][17] i1=soc.ram.ram[71][17] q=$abc$109383$new_n48369_
+.subckt mux2_x1 cmd=$abc$109383$new_n43633_ i0=$abc$109383$new_n48369_ i1=$abc$109383$new_n48368_ q=$abc$109383$new_n48370_
 .subckt nor2_x0 i0=$abc$109383$new_n48370_ i1=$abc$109383$new_n43525_ nq=$abc$109383$new_n48371_
-.subckt mx2_x2 cmd=$abc$109383$new_n43519_ i0=soc.ram.ram[74][17] i1=soc.ram.ram[78][17] q=$abc$109383$new_n48372_
+.subckt mux2_x1 cmd=$abc$109383$new_n43519_ i0=soc.ram.ram[74][17] i1=soc.ram.ram[78][17] q=$abc$109383$new_n48372_
 .subckt nand2_x0 i0=$abc$109383$new_n48372_ i1=$abc$109383$new_n43428_ nq=$abc$109383$new_n48373_
 .subckt inv_x0 i=soc.ram.ram[79][17] nq=$abc$109383$new_n48374_
-.subckt a2_x2 i0=$abc$109383$new_n48374_ i1=$abc$109383$new_n43419_ q=$abc$109383$new_n48375_
-.subckt o2_x2 i0=soc.ram.ram[75][17] i1=$abc$109383$new_n43886_ q=$abc$109383$new_n48376_
+.subckt and2_x1 i0=$abc$109383$new_n48374_ i1=$abc$109383$new_n43419_ q=$abc$109383$new_n48375_
+.subckt or2_x1 i0=soc.ram.ram[75][17] i1=$abc$109383$new_n43886_ q=$abc$109383$new_n48376_
 .subckt nand2_x0 i0=$abc$109383$new_n48376_ i1=$abc$109383$new_n43642_ nq=$abc$109383$new_n48377_
-.subckt ao22_x2 i0=$abc$109383$new_n48377_ i1=$abc$109383$new_n48375_ i2=$abc$109383$new_n48373_ q=$abc$109383$new_n48378_
-.subckt oa22_x2 i0=$abc$109383$new_n44390_ i1=$abc$109383$new_n48378_ i2=$abc$109383$new_n48371_ q=$abc$109383$new_n48379_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[64][17] i1=soc.ram.ram[68][17] q=$abc$109383$new_n48380_
-.subckt mx2_x2 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[65][17] i1=soc.ram.ram[69][17] q=$abc$109383$new_n48381_
-.subckt mx2_x2 cmd=$abc$109383$new_n43633_ i0=$abc$109383$new_n48381_ i1=$abc$109383$new_n48380_ q=$abc$109383$new_n48382_
+.subckt and21nor_x1 i0=$abc$109383$new_n48377_ i1=$abc$109383$new_n48375_ i2=$abc$109383$new_n48373_ nq=$abc$109383$new_n48378_
+.subckt or21nand_x1 i0=$abc$109383$new_n44390_ i1=$abc$109383$new_n48378_ i2=$abc$109383$new_n48371_ nq=$abc$109383$new_n48379_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[64][17] i1=soc.ram.ram[68][17] q=$abc$109383$new_n48380_
+.subckt mux2_x1 cmd=$abc$109383$new_n43936_ i0=soc.ram.ram[65][17] i1=soc.ram.ram[69][17] q=$abc$109383$new_n48381_
+.subckt mux2_x1 cmd=$abc$109383$new_n43633_ i0=$abc$109383$new_n48381_ i1=$abc$109383$new_n48380_ q=$abc$109383$new_n48382_
 .subckt nor2_x0 i0=$abc$109383$new_n48382_ i1=$abc$109383$new_n43525_ nq=$abc$109383$new_n48383_
-.subckt mx2_x2 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[72][17] i1=soc.ram.ram[76][17] q=$abc$109383$new_n48384_
-.subckt mx2_x2 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[73][17] i1=soc.ram.ram[77][17] q=$abc$109383$new_n48385_
-.subckt mx2_x2 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n48385_ i1=$abc$109383$new_n48384_ q=$abc$109383$new_n48386_
+.subckt mux2_x1 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[72][17] i1=soc.ram.ram[76][17] q=$abc$109383$new_n48384_
+.subckt mux2_x1 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[73][17] i1=soc.ram.ram[77][17] q=$abc$109383$new_n48385_
+.subckt mux2_x1 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n48385_ i1=$abc$109383$new_n48384_ q=$abc$109383$new_n48386_
 .subckt nor2_x0 i0=$abc$109383$new_n48386_ i1=$abc$109383$new_n44162_ nq=$abc$109383$new_n48387_
-.subckt o2_x2 i0=$abc$109383$new_n48387_ i1=$abc$109383$new_n48383_ q=$abc$109383$new_n48388_
-.subckt mx2_x2 cmd=$abc$109383$new_n43935_ i0=$abc$109383$new_n48388_ i1=$abc$109383$new_n48379_ q=$abc$109383$new_n48389_
-.subckt a2_x2 i0=$abc$109383$new_n48389_ i1=$abc$109383$new_n43922_ q=$abc$109383$new_n48390_
-.subckt mx2_x2 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[84][17] i1=soc.ram.ram[85][17] q=$abc$109383$new_n48391_
-.subckt mx2_x2 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[80][17] i1=soc.ram.ram[81][17] q=$abc$109383$new_n48392_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=$abc$109383$new_n48392_ i1=$abc$109383$new_n48391_ q=$abc$109383$new_n48393_
+.subckt or2_x1 i0=$abc$109383$new_n48387_ i1=$abc$109383$new_n48383_ q=$abc$109383$new_n48388_
+.subckt mux2_x1 cmd=$abc$109383$new_n43935_ i0=$abc$109383$new_n48388_ i1=$abc$109383$new_n48379_ q=$abc$109383$new_n48389_
+.subckt and2_x1 i0=$abc$109383$new_n48389_ i1=$abc$109383$new_n43922_ q=$abc$109383$new_n48390_
+.subckt mux2_x1 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[84][17] i1=soc.ram.ram[85][17] q=$abc$109383$new_n48391_
+.subckt mux2_x1 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[80][17] i1=soc.ram.ram[81][17] q=$abc$109383$new_n48392_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=$abc$109383$new_n48392_ i1=$abc$109383$new_n48391_ q=$abc$109383$new_n48393_
 .subckt nor2_x0 i0=$abc$109383$new_n48393_ i1=$abc$109383$new_n43896_ nq=$abc$109383$new_n48394_
-.subckt mx2_x2 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[92][17] i1=soc.ram.ram[93][17] q=$abc$109383$new_n48395_
-.subckt mx2_x2 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[88][17] i1=soc.ram.ram[89][17] q=$abc$109383$new_n48396_
-.subckt mx2_x2 cmd=$abc$109383$new_n43527_ i0=$abc$109383$new_n48396_ i1=$abc$109383$new_n48395_ q=$abc$109383$new_n48397_
+.subckt mux2_x1 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[92][17] i1=soc.ram.ram[93][17] q=$abc$109383$new_n48395_
+.subckt mux2_x1 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[88][17] i1=soc.ram.ram[89][17] q=$abc$109383$new_n48396_
+.subckt mux2_x1 cmd=$abc$109383$new_n43527_ i0=$abc$109383$new_n48396_ i1=$abc$109383$new_n48395_ q=$abc$109383$new_n48397_
 .subckt nor2_x0 i0=$abc$109383$new_n48397_ i1=$abc$109383$new_n44240_ nq=$abc$109383$new_n48398_
-.subckt o3_x2 i0=$abc$109383$new_n48398_ i1=$abc$109383$new_n48394_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n48399_
-.subckt mx2_x2 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[90][17] i1=soc.ram.ram[94][17] q=$abc$109383$new_n48400_
+.subckt or3_x1 i0=$abc$109383$new_n48398_ i1=$abc$109383$new_n48394_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n48399_
+.subckt mux2_x1 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[90][17] i1=soc.ram.ram[94][17] q=$abc$109383$new_n48400_
 .subckt nand2_x0 i0=$abc$109383$new_n48400_ i1=$abc$109383$new_n44596_ nq=$abc$109383$new_n48401_
 .subckt inv_x0 i=soc.ram.ram[95][17] nq=$abc$109383$new_n48402_
-.subckt a2_x2 i0=$abc$109383$new_n48402_ i1=$abc$109383$new_n43607_ q=$abc$109383$new_n48403_
-.subckt o2_x2 i0=soc.ram.ram[91][17] i1=$abc$109383$new_n44423_ q=$abc$109383$new_n48404_
+.subckt and2_x1 i0=$abc$109383$new_n48402_ i1=$abc$109383$new_n43607_ q=$abc$109383$new_n48403_
+.subckt or2_x1 i0=soc.ram.ram[91][17] i1=$abc$109383$new_n44423_ q=$abc$109383$new_n48404_
 .subckt nand2_x0 i0=$abc$109383$new_n48404_ i1=$abc$109383$new_n44047_ nq=$abc$109383$new_n48405_
-.subckt ao22_x2 i0=$abc$109383$new_n48405_ i1=$abc$109383$new_n48403_ i2=$abc$109383$new_n48401_ q=$abc$109383$new_n48406_
-.subckt a2_x2 i0=$abc$109383$new_n48406_ i1=$abc$109383$new_n43570_ q=$abc$109383$new_n48407_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[82][17] i1=soc.ram.ram[86][17] q=$abc$109383$new_n48408_
+.subckt and21nor_x1 i0=$abc$109383$new_n48405_ i1=$abc$109383$new_n48403_ i2=$abc$109383$new_n48401_ nq=$abc$109383$new_n48406_
+.subckt and2_x1 i0=$abc$109383$new_n48406_ i1=$abc$109383$new_n43570_ q=$abc$109383$new_n48407_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[82][17] i1=soc.ram.ram[86][17] q=$abc$109383$new_n48408_
 .subckt nand2_x0 i0=$abc$109383$new_n48408_ i1=$abc$109383$new_n46128_ nq=$abc$109383$new_n48409_
-.subckt ao22_x2 i0=soc.ram.ram[83][17] i1=$abc$109383$new_n43684_ i2=$abc$109383$new_n43545_ q=$abc$109383$new_n48410_
-.subckt ao22_x2 i0=$abc$109383$new_n43529_ i1=soc.ram.ram[87][17] i2=$abc$109383$new_n48410_ q=$abc$109383$new_n48411_
+.subckt and21nor_x1 i0=soc.ram.ram[83][17] i1=$abc$109383$new_n43684_ i2=$abc$109383$new_n43545_ nq=$abc$109383$new_n48410_
+.subckt and21nor_x1 i0=$abc$109383$new_n43529_ i1=soc.ram.ram[87][17] i2=$abc$109383$new_n48410_ nq=$abc$109383$new_n48411_
 .subckt nor2_x0 i0=$abc$109383$new_n48411_ i1=$abc$109383$new_n44390_ nq=$abc$109383$new_n48412_
-.subckt oa22_x2 i0=$abc$109383$new_n48412_ i1=$abc$109383$new_n48409_ i2=$abc$109383$new_n43753_ q=$abc$109383$new_n48413_
-.subckt ao22_x2 i0=$abc$109383$new_n48413_ i1=$abc$109383$new_n48407_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n48414_
-.subckt oa22_x2 i0=$abc$109383$new_n48414_ i1=$abc$109383$new_n48399_ i2=$abc$109383$new_n43865_ q=$abc$109383$new_n48415_
+.subckt or21nand_x1 i0=$abc$109383$new_n48412_ i1=$abc$109383$new_n48409_ i2=$abc$109383$new_n43753_ nq=$abc$109383$new_n48413_
+.subckt and21nor_x1 i0=$abc$109383$new_n48413_ i1=$abc$109383$new_n48407_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n48414_
+.subckt or21nand_x1 i0=$abc$109383$new_n48414_ i1=$abc$109383$new_n48399_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n48415_
 .subckt nor2_x0 i0=$abc$109383$new_n48415_ i1=$abc$109383$new_n48390_ nq=$abc$109383$new_n48416_
-.subckt mx2_x2 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[96][17] i1=soc.ram.ram[100][17] q=$abc$109383$new_n48417_
-.subckt mx2_x2 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[97][17] i1=soc.ram.ram[101][17] q=$abc$109383$new_n48418_
-.subckt mx2_x2 cmd=$abc$109383$new_n43731_ i0=$abc$109383$new_n48418_ i1=$abc$109383$new_n48417_ q=$abc$109383$new_n48419_
+.subckt mux2_x1 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[96][17] i1=soc.ram.ram[100][17] q=$abc$109383$new_n48417_
+.subckt mux2_x1 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[97][17] i1=soc.ram.ram[101][17] q=$abc$109383$new_n48418_
+.subckt mux2_x1 cmd=$abc$109383$new_n43731_ i0=$abc$109383$new_n48418_ i1=$abc$109383$new_n48417_ q=$abc$109383$new_n48419_
 .subckt nand2_x0 i0=$abc$109383$new_n48419_ i1=$abc$109383$new_n44610_ nq=$abc$109383$new_n48420_
-.subckt mx2_x2 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[104][17] i1=soc.ram.ram[108][17] q=$abc$109383$new_n48421_
+.subckt mux2_x1 cmd=$abc$109383$new_n43624_ i0=soc.ram.ram[104][17] i1=soc.ram.ram[108][17] q=$abc$109383$new_n48421_
 .subckt nand2_x0 i0=$abc$109383$new_n48421_ i1=$abc$109383$new_n43680_ nq=$abc$109383$new_n48422_
-.subckt o2_x2 i0=soc.ram.ram[105][17] i1=$abc$109383$new_n45087_ q=$abc$109383$new_n48423_
-.subckt ao22_x2 i0=soc.ram.ram[109][17] i1=$abc$109383$new_n43382_ i2=$abc$109383$new_n46814_ q=$abc$109383$new_n48424_
+.subckt or2_x1 i0=soc.ram.ram[105][17] i1=$abc$109383$new_n45087_ q=$abc$109383$new_n48423_
+.subckt and21nor_x1 i0=soc.ram.ram[109][17] i1=$abc$109383$new_n43382_ i2=$abc$109383$new_n46814_ nq=$abc$109383$new_n48424_
 .subckt nand2_x0 i0=$abc$109383$new_n48424_ i1=$abc$109383$new_n48423_ nq=$abc$109383$new_n48425_
-.subckt oa22_x2 i0=$abc$109383$new_n48425_ i1=$abc$109383$new_n48422_ i2=$abc$109383$new_n43712_ q=$abc$109383$new_n48426_
-.subckt oa22_x2 i0=$abc$109383$new_n48426_ i1=$abc$109383$new_n48420_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n48427_
+.subckt or21nand_x1 i0=$abc$109383$new_n48425_ i1=$abc$109383$new_n48422_ i2=$abc$109383$new_n43712_ nq=$abc$109383$new_n48426_
+.subckt or21nand_x1 i0=$abc$109383$new_n48426_ i1=$abc$109383$new_n48420_ i2=$abc$109383$new_n43843_ nq=$abc$109383$new_n48427_
 .subckt inv_x0 i=soc.ram.ram[103][17] nq=$abc$109383$new_n48428_
 .subckt nand2_x0 i0=$abc$109383$new_n48428_ i1=$abc$109383$new_n44927_ nq=$abc$109383$new_n48429_
-.subckt ao22_x2 i0=soc.ram.ram[99][17] i1=$abc$109383$new_n46386_ i2=$abc$109383$new_n43792_ q=$abc$109383$new_n48430_
+.subckt and21nor_x1 i0=soc.ram.ram[99][17] i1=$abc$109383$new_n46386_ i2=$abc$109383$new_n43792_ nq=$abc$109383$new_n48430_
 .subckt nand2_x0 i0=$abc$109383$new_n48430_ i1=$abc$109383$new_n48429_ nq=$abc$109383$new_n48431_
-.subckt mx2_x2 cmd=$abc$109383$new_n45117_ i0=soc.ram.ram[98][17] i1=soc.ram.ram[102][17] q=$abc$109383$new_n48432_
+.subckt mux2_x1 cmd=$abc$109383$new_n45117_ i0=soc.ram.ram[98][17] i1=soc.ram.ram[102][17] q=$abc$109383$new_n48432_
 .subckt nand2_x0 i0=$abc$109383$new_n48432_ i1=$abc$109383$new_n43943_ nq=$abc$109383$new_n48433_
 .subckt nand3_x0 i0=$abc$109383$new_n48433_ i1=$abc$109383$new_n48431_ i2=$abc$109383$new_n43839_ nq=$abc$109383$new_n48434_
-.subckt ao22_x2 i0=soc.ram.ram[107][17] i1=$abc$109383$new_n44207_ i2=$abc$109383$new_n43691_ q=$abc$109383$new_n48435_
-.subckt ao22_x2 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[111][17] i2=$abc$109383$new_n48435_ q=$abc$109383$new_n48436_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[106][17] i1=soc.ram.ram[110][17] q=$abc$109383$new_n48437_
-.subckt oa22_x2 i0=$abc$109383$new_n44122_ i1=$abc$109383$new_n48437_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n48438_
-.subckt ao22_x2 i0=$abc$109383$new_n48438_ i1=$abc$109383$new_n48436_ i2=$abc$109383$new_n45428_ q=$abc$109383$new_n48439_
+.subckt and21nor_x1 i0=soc.ram.ram[107][17] i1=$abc$109383$new_n44207_ i2=$abc$109383$new_n43691_ nq=$abc$109383$new_n48435_
+.subckt and21nor_x1 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[111][17] i2=$abc$109383$new_n48435_ nq=$abc$109383$new_n48436_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[106][17] i1=soc.ram.ram[110][17] q=$abc$109383$new_n48437_
+.subckt or21nand_x1 i0=$abc$109383$new_n44122_ i1=$abc$109383$new_n48437_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n48438_
+.subckt and21nor_x1 i0=$abc$109383$new_n48438_ i1=$abc$109383$new_n48436_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n48439_
 .subckt nand2_x0 i0=$abc$109383$new_n48439_ i1=$abc$109383$new_n48434_ nq=$abc$109383$new_n48440_
 .subckt nand3_x0 i0=$abc$109383$new_n48440_ i1=$abc$109383$new_n48427_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n48441_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[112][17] i1=soc.ram.ram[116][17] q=$abc$109383$new_n48442_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[113][17] i1=soc.ram.ram[117][17] q=$abc$109383$new_n48443_
-.subckt mx2_x2 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n48443_ i1=$abc$109383$new_n48442_ q=$abc$109383$new_n48444_
-.subckt o2_x2 i0=$abc$109383$new_n48444_ i1=$abc$109383$new_n43897_ q=$abc$109383$new_n48445_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[120][17] i1=soc.ram.ram[124][17] q=$abc$109383$new_n48446_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[112][17] i1=soc.ram.ram[116][17] q=$abc$109383$new_n48442_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[113][17] i1=soc.ram.ram[117][17] q=$abc$109383$new_n48443_
+.subckt mux2_x1 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n48443_ i1=$abc$109383$new_n48442_ q=$abc$109383$new_n48444_
+.subckt or2_x1 i0=$abc$109383$new_n48444_ i1=$abc$109383$new_n43897_ q=$abc$109383$new_n48445_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[120][17] i1=soc.ram.ram[124][17] q=$abc$109383$new_n48446_
 .subckt nand2_x0 i0=$abc$109383$new_n48446_ i1=$abc$109383$new_n43623_ nq=$abc$109383$new_n48447_
 .subckt inv_x0 i=soc.ram.ram[125][17] nq=$abc$109383$new_n48448_
 .subckt nand2_x0 i0=$abc$109383$new_n48448_ i1=$abc$109383$new_n45609_ nq=$abc$109383$new_n48449_
-.subckt ao22_x2 i0=soc.ram.ram[121][17] i1=$abc$109383$new_n43342_ i2=$abc$109383$new_n43362_ q=$abc$109383$new_n48450_
+.subckt and21nor_x1 i0=soc.ram.ram[121][17] i1=$abc$109383$new_n43342_ i2=$abc$109383$new_n43362_ nq=$abc$109383$new_n48450_
 .subckt nand2_x0 i0=$abc$109383$new_n48450_ i1=$abc$109383$new_n48449_ nq=$abc$109383$new_n48451_
 .subckt nand3_x0 i0=$abc$109383$new_n48451_ i1=$abc$109383$new_n48447_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n48452_
-.subckt a3_x2 i0=$abc$109383$new_n48452_ i1=$abc$109383$new_n48445_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n48453_
-.subckt mx2_x2 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[114][17] i1=soc.ram.ram[118][17] q=$abc$109383$new_n48454_
-.subckt a2_x2 i0=$abc$109383$new_n48454_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n48455_
-.subckt ao22_x2 i0=soc.ram.ram[115][17] i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43546_ q=$abc$109383$new_n48456_
-.subckt ao22_x2 i0=$abc$109383$new_n43804_ i1=soc.ram.ram[119][17] i2=$abc$109383$new_n48456_ q=$abc$109383$new_n48457_
-.subckt o3_x2 i0=$abc$109383$new_n48457_ i1=$abc$109383$new_n48455_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n48458_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[122][17] i1=soc.ram.ram[126][17] q=$abc$109383$new_n48459_
-.subckt a2_x2 i0=$abc$109383$new_n48459_ i1=$abc$109383$new_n43634_ q=$abc$109383$new_n48460_
-.subckt o2_x2 i0=soc.ram.ram[123][17] i1=$abc$109383$new_n44167_ q=$abc$109383$new_n48461_
-.subckt ao22_x2 i0=soc.ram.ram[127][17] i1=$abc$109383$new_n43877_ i2=$abc$109383$new_n43377_ q=$abc$109383$new_n48462_
-.subckt oa22_x2 i0=$abc$109383$new_n48462_ i1=$abc$109383$new_n48461_ i2=$abc$109383$new_n43391_ q=$abc$109383$new_n48463_
-.subckt ao22_x2 i0=$abc$109383$new_n48463_ i1=$abc$109383$new_n48460_ i2=$abc$109383$new_n45279_ q=$abc$109383$new_n48464_
-.subckt oa22_x2 i0=$abc$109383$new_n48464_ i1=$abc$109383$new_n48458_ i2=$abc$109383$new_n44114_ q=$abc$109383$new_n48465_
-.subckt ao22_x2 i0=$abc$109383$new_n48465_ i1=$abc$109383$new_n48453_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n48466_
-.subckt a2_x2 i0=$abc$109383$new_n48466_ i1=$abc$109383$new_n48441_ q=$abc$109383$new_n48467_
-.subckt o3_x2 i0=$abc$109383$new_n48467_ i1=$abc$109383$new_n48416_ i2=$abc$109383$new_n43591_ q=$abc$109383$new_n48468_
-.subckt oa22_x2 i0=$abc$109383$new_n48468_ i1=$abc$109383$new_n48367_ i2=$abc$109383$new_n48246_ q=$abc$109383$new_n48469_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n48469_ i2=$abc$109383$new_n48232_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103266
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[18] q=$abc$109383$new_n48471_
-.subckt a2_x2 i0=$abc$109383$new_n48471_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n48472_
-.subckt a3_x2 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n48473_
-.subckt a3_x2 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n48474_
-.subckt ao22_x2 i0=$abc$109383$new_n48474_ i1=$abc$109383$new_n48473_ i2=$abc$109383$new_n27594_ q=$abc$109383$new_n48475_
-.subckt mx2_x2 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[83][18] i1=soc.ram.ram[87][18] q=$abc$109383$new_n48476_
+.subckt and3_x1 i0=$abc$109383$new_n48452_ i1=$abc$109383$new_n48445_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n48453_
+.subckt mux2_x1 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[114][17] i1=soc.ram.ram[118][17] q=$abc$109383$new_n48454_
+.subckt and2_x1 i0=$abc$109383$new_n48454_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n48455_
+.subckt and21nor_x1 i0=soc.ram.ram[115][17] i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43546_ nq=$abc$109383$new_n48456_
+.subckt and21nor_x1 i0=$abc$109383$new_n43804_ i1=soc.ram.ram[119][17] i2=$abc$109383$new_n48456_ nq=$abc$109383$new_n48457_
+.subckt or3_x1 i0=$abc$109383$new_n48457_ i1=$abc$109383$new_n48455_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n48458_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[122][17] i1=soc.ram.ram[126][17] q=$abc$109383$new_n48459_
+.subckt and2_x1 i0=$abc$109383$new_n48459_ i1=$abc$109383$new_n43634_ q=$abc$109383$new_n48460_
+.subckt or2_x1 i0=soc.ram.ram[123][17] i1=$abc$109383$new_n44167_ q=$abc$109383$new_n48461_
+.subckt and21nor_x1 i0=soc.ram.ram[127][17] i1=$abc$109383$new_n43877_ i2=$abc$109383$new_n43377_ nq=$abc$109383$new_n48462_
+.subckt or21nand_x1 i0=$abc$109383$new_n48462_ i1=$abc$109383$new_n48461_ i2=$abc$109383$new_n43391_ nq=$abc$109383$new_n48463_
+.subckt and21nor_x1 i0=$abc$109383$new_n48463_ i1=$abc$109383$new_n48460_ i2=$abc$109383$new_n45279_ nq=$abc$109383$new_n48464_
+.subckt or21nand_x1 i0=$abc$109383$new_n48464_ i1=$abc$109383$new_n48458_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n48465_
+.subckt and21nor_x1 i0=$abc$109383$new_n48465_ i1=$abc$109383$new_n48453_ i2=$abc$109383$new_n45534_ nq=$abc$109383$new_n48466_
+.subckt and2_x1 i0=$abc$109383$new_n48466_ i1=$abc$109383$new_n48441_ q=$abc$109383$new_n48467_
+.subckt or3_x1 i0=$abc$109383$new_n48467_ i1=$abc$109383$new_n48416_ i2=$abc$109383$new_n43591_ q=$abc$109383$new_n48468_
+.subckt or21nand_x1 i0=$abc$109383$new_n48468_ i1=$abc$109383$new_n48367_ i2=$abc$109383$new_n48246_ nq=$abc$109383$new_n48469_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n48469_ i2=$abc$109383$new_n48232_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103266
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[18] nq=$abc$109383$new_n48471_
+.subckt and2_x1 i0=$abc$109383$new_n48471_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n48472_
+.subckt and3_x1 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n48473_
+.subckt and3_x1 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n48474_
+.subckt and21nor_x1 i0=$abc$109383$new_n48474_ i1=$abc$109383$new_n48473_ i2=$abc$109383$new_n27594_ nq=$abc$109383$new_n48475_
+.subckt mux2_x1 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[83][18] i1=soc.ram.ram[87][18] q=$abc$109383$new_n48476_
 .subckt nand2_x0 i0=$abc$109383$new_n48476_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n48477_
-.subckt mx2_x2 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[82][18] i1=soc.ram.ram[86][18] q=$abc$109383$new_n48478_
+.subckt mux2_x1 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[82][18] i1=soc.ram.ram[86][18] q=$abc$109383$new_n48478_
 .subckt nand2_x0 i0=$abc$109383$new_n48478_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n48479_
 .subckt nand3_x0 i0=$abc$109383$new_n48479_ i1=$abc$109383$new_n48477_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n48480_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[81][18] i1=soc.ram.ram[85][18] q=$abc$109383$new_n48481_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[80][18] i1=soc.ram.ram[84][18] q=$abc$109383$new_n48482_
-.subckt mx2_x2 cmd=$abc$109383$new_n44106_ i0=$abc$109383$new_n48482_ i1=$abc$109383$new_n48481_ q=$abc$109383$new_n48483_
-.subckt ao22_x2 i0=$abc$109383$new_n45427_ i1=$abc$109383$new_n48483_ i2=$abc$109383$new_n43471_ q=$abc$109383$new_n48484_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[81][18] i1=soc.ram.ram[85][18] q=$abc$109383$new_n48481_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[80][18] i1=soc.ram.ram[84][18] q=$abc$109383$new_n48482_
+.subckt mux2_x1 cmd=$abc$109383$new_n44106_ i0=$abc$109383$new_n48482_ i1=$abc$109383$new_n48481_ q=$abc$109383$new_n48483_
+.subckt and21nor_x1 i0=$abc$109383$new_n45427_ i1=$abc$109383$new_n48483_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n48484_
 .subckt nand2_x0 i0=$abc$109383$new_n48484_ i1=$abc$109383$new_n48480_ nq=$abc$109383$new_n48485_
 .subckt inv_x0 i=soc.ram.ram[95][18] nq=$abc$109383$new_n48486_
 .subckt nand2_x0 i0=$abc$109383$new_n48486_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n48487_
-.subckt ao22_x2 i0=soc.ram.ram[91][18] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n43823_ q=$abc$109383$new_n48488_
+.subckt and21nor_x1 i0=soc.ram.ram[91][18] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n43823_ nq=$abc$109383$new_n48488_
 .subckt nand2_x0 i0=$abc$109383$new_n48488_ i1=$abc$109383$new_n48487_ nq=$abc$109383$new_n48489_
-.subckt mx2_x2 cmd=$abc$109383$new_n45087_ i0=soc.ram.ram[90][18] i1=soc.ram.ram[94][18] q=$abc$109383$new_n48490_
+.subckt mux2_x1 cmd=$abc$109383$new_n45087_ i0=soc.ram.ram[90][18] i1=soc.ram.ram[94][18] q=$abc$109383$new_n48490_
 .subckt nand2_x0 i0=$abc$109383$new_n48490_ i1=$abc$109383$new_n44078_ nq=$abc$109383$new_n48491_
-.subckt a2_x2 i0=$abc$109383$new_n48491_ i1=$abc$109383$new_n44774_ q=$abc$109383$new_n48492_
+.subckt and2_x1 i0=$abc$109383$new_n48491_ i1=$abc$109383$new_n44774_ q=$abc$109383$new_n48492_
 .subckt nand2_x0 i0=$abc$109383$new_n48492_ i1=$abc$109383$new_n48489_ nq=$abc$109383$new_n48493_
-.subckt mx2_x2 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[88][18] i1=soc.ram.ram[92][18] q=$abc$109383$new_n48494_
+.subckt mux2_x1 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[88][18] i1=soc.ram.ram[92][18] q=$abc$109383$new_n48494_
 .subckt nand2_x0 i0=$abc$109383$new_n48494_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n48495_
 .subckt inv_x0 i=soc.ram.ram[93][18] nq=$abc$109383$new_n48496_
 .subckt nand2_x0 i0=$abc$109383$new_n48496_ i1=$abc$109383$new_n45579_ nq=$abc$109383$new_n48497_
-.subckt ao22_x2 i0=soc.ram.ram[89][18] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n48498_
+.subckt and21nor_x1 i0=soc.ram.ram[89][18] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n48498_
 .subckt nand2_x0 i0=$abc$109383$new_n48498_ i1=$abc$109383$new_n48497_ nq=$abc$109383$new_n48499_
 .subckt nand3_x0 i0=$abc$109383$new_n48499_ i1=$abc$109383$new_n48495_ i2=$abc$109383$new_n45629_ nq=$abc$109383$new_n48500_
 .subckt nand3_x0 i0=$abc$109383$new_n48500_ i1=$abc$109383$new_n48493_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n48501_
-.subckt oa22_x2 i0=$abc$109383$new_n48501_ i1=$abc$109383$new_n48485_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n48502_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[75][18] i1=soc.ram.ram[79][18] q=$abc$109383$new_n48503_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[74][18] i1=soc.ram.ram[78][18] q=$abc$109383$new_n48504_
-.subckt mx2_x2 cmd=$abc$109383$new_n43913_ i0=$abc$109383$new_n48504_ i1=$abc$109383$new_n48503_ q=$abc$109383$new_n48505_
-.subckt o2_x2 i0=$abc$109383$new_n48505_ i1=$abc$109383$new_n45629_ q=$abc$109383$new_n48506_
-.subckt mx2_x2 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[73][18] i1=soc.ram.ram[77][18] q=$abc$109383$new_n48507_
-.subckt mx2_x2 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[72][18] i1=soc.ram.ram[76][18] q=$abc$109383$new_n48508_
-.subckt mx2_x2 cmd=$abc$109383$new_n44091_ i0=$abc$109383$new_n48508_ i1=$abc$109383$new_n48507_ q=$abc$109383$new_n48509_
-.subckt ao22_x2 i0=$abc$109383$new_n44916_ i1=$abc$109383$new_n48509_ i2=$abc$109383$new_n43570_ q=$abc$109383$new_n48510_
+.subckt or21nand_x1 i0=$abc$109383$new_n48501_ i1=$abc$109383$new_n48485_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n48502_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[75][18] i1=soc.ram.ram[79][18] q=$abc$109383$new_n48503_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[74][18] i1=soc.ram.ram[78][18] q=$abc$109383$new_n48504_
+.subckt mux2_x1 cmd=$abc$109383$new_n43913_ i0=$abc$109383$new_n48504_ i1=$abc$109383$new_n48503_ q=$abc$109383$new_n48505_
+.subckt or2_x1 i0=$abc$109383$new_n48505_ i1=$abc$109383$new_n45629_ q=$abc$109383$new_n48506_
+.subckt mux2_x1 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[73][18] i1=soc.ram.ram[77][18] q=$abc$109383$new_n48507_
+.subckt mux2_x1 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[72][18] i1=soc.ram.ram[76][18] q=$abc$109383$new_n48508_
+.subckt mux2_x1 cmd=$abc$109383$new_n44091_ i0=$abc$109383$new_n48508_ i1=$abc$109383$new_n48507_ q=$abc$109383$new_n48509_
+.subckt and21nor_x1 i0=$abc$109383$new_n44916_ i1=$abc$109383$new_n48509_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n48510_
 .subckt nand2_x0 i0=$abc$109383$new_n48510_ i1=$abc$109383$new_n48506_ nq=$abc$109383$new_n48511_
-.subckt ao22_x2 i0=soc.ram.ram[67][18] i1=$abc$109383$new_n44351_ i2=$abc$109383$new_n43414_ q=$abc$109383$new_n48512_
-.subckt ao22_x2 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[71][18] i2=$abc$109383$new_n48512_ q=$abc$109383$new_n48513_
-.subckt mx2_x2 cmd=$abc$109383$new_n43886_ i0=soc.ram.ram[66][18] i1=soc.ram.ram[70][18] q=$abc$109383$new_n48514_
-.subckt oa22_x2 i0=$abc$109383$new_n43428_ i1=$abc$109383$new_n48514_ i2=$abc$109383$new_n48513_ q=$abc$109383$new_n48515_
-.subckt mx2_x2 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[64][18] i1=soc.ram.ram[68][18] q=$abc$109383$new_n48516_
+.subckt and21nor_x1 i0=soc.ram.ram[67][18] i1=$abc$109383$new_n44351_ i2=$abc$109383$new_n43414_ nq=$abc$109383$new_n48512_
+.subckt and21nor_x1 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[71][18] i2=$abc$109383$new_n48512_ nq=$abc$109383$new_n48513_
+.subckt mux2_x1 cmd=$abc$109383$new_n43886_ i0=soc.ram.ram[66][18] i1=soc.ram.ram[70][18] q=$abc$109383$new_n48514_
+.subckt or21nand_x1 i0=$abc$109383$new_n43428_ i1=$abc$109383$new_n48514_ i2=$abc$109383$new_n48513_ nq=$abc$109383$new_n48515_
+.subckt mux2_x1 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[64][18] i1=soc.ram.ram[68][18] q=$abc$109383$new_n48516_
 .subckt nand2_x0 i0=$abc$109383$new_n48516_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n48517_
 .subckt inv_x0 i=soc.ram.ram[69][18] nq=$abc$109383$new_n48518_
 .subckt nand2_x0 i0=$abc$109383$new_n48518_ i1=$abc$109383$new_n45321_ nq=$abc$109383$new_n48519_
-.subckt ao22_x2 i0=soc.ram.ram[65][18] i1=$abc$109383$new_n44066_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n48520_
+.subckt and21nor_x1 i0=soc.ram.ram[65][18] i1=$abc$109383$new_n44066_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n48520_
 .subckt nand2_x0 i0=$abc$109383$new_n48520_ i1=$abc$109383$new_n48519_ nq=$abc$109383$new_n48521_
 .subckt nand2_x0 i0=$abc$109383$new_n48521_ i1=$abc$109383$new_n48517_ nq=$abc$109383$new_n48522_
-.subckt mx2_x2 cmd=$abc$109383$new_n45279_ i0=$abc$109383$new_n48522_ i1=$abc$109383$new_n48515_ q=$abc$109383$new_n48523_
+.subckt mux2_x1 cmd=$abc$109383$new_n45279_ i0=$abc$109383$new_n48522_ i1=$abc$109383$new_n48515_ q=$abc$109383$new_n48523_
 .subckt nand2_x0 i0=$abc$109383$new_n48523_ i1=$abc$109383$new_n44654_ nq=$abc$109383$new_n48524_
-.subckt oa22_x2 i0=$abc$109383$new_n48524_ i1=$abc$109383$new_n48511_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n48525_
-.subckt a3_x2 i0=$abc$109383$new_n48525_ i1=$abc$109383$new_n48502_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n48526_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[121][18] i1=soc.ram.ram[125][18] q=$abc$109383$new_n48527_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[120][18] i1=soc.ram.ram[124][18] q=$abc$109383$new_n48528_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=$abc$109383$new_n48528_ i1=$abc$109383$new_n48527_ q=$abc$109383$new_n48529_
+.subckt or21nand_x1 i0=$abc$109383$new_n48524_ i1=$abc$109383$new_n48511_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n48525_
+.subckt and3_x1 i0=$abc$109383$new_n48525_ i1=$abc$109383$new_n48502_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n48526_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[121][18] i1=soc.ram.ram[125][18] q=$abc$109383$new_n48527_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[120][18] i1=soc.ram.ram[124][18] q=$abc$109383$new_n48528_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=$abc$109383$new_n48528_ i1=$abc$109383$new_n48527_ q=$abc$109383$new_n48529_
 .subckt nand2_x0 i0=$abc$109383$new_n48529_ i1=$abc$109383$new_n43569_ nq=$abc$109383$new_n48530_
-.subckt mx2_x2 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[113][18] i1=soc.ram.ram[117][18] q=$abc$109383$new_n48531_
-.subckt mx2_x2 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[112][18] i1=soc.ram.ram[116][18] q=$abc$109383$new_n48532_
-.subckt mx2_x2 cmd=$abc$109383$new_n44053_ i0=$abc$109383$new_n48532_ i1=$abc$109383$new_n48531_ q=$abc$109383$new_n48533_
+.subckt mux2_x1 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[113][18] i1=soc.ram.ram[117][18] q=$abc$109383$new_n48531_
+.subckt mux2_x1 cmd=$abc$109383$new_n43341_ i0=soc.ram.ram[112][18] i1=soc.ram.ram[116][18] q=$abc$109383$new_n48532_
+.subckt mux2_x1 cmd=$abc$109383$new_n44053_ i0=$abc$109383$new_n48532_ i1=$abc$109383$new_n48531_ q=$abc$109383$new_n48533_
 .subckt nand2_x0 i0=$abc$109383$new_n48533_ i1=$abc$109383$new_n43837_ nq=$abc$109383$new_n48534_
-.subckt a2_x2 i0=$abc$109383$new_n48534_ i1=$abc$109383$new_n48530_ q=$abc$109383$new_n48535_
-.subckt oa22_x2 i0=$abc$109383$new_n43473_ i1=$abc$109383$new_n48535_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n48536_
-.subckt mx2_x2 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[122][18] i1=soc.ram.ram[126][18] q=$abc$109383$new_n48537_
+.subckt and2_x1 i0=$abc$109383$new_n48534_ i1=$abc$109383$new_n48530_ q=$abc$109383$new_n48535_
+.subckt or21nand_x1 i0=$abc$109383$new_n43473_ i1=$abc$109383$new_n48535_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n48536_
+.subckt mux2_x1 cmd=$abc$109383$new_n43368_ i0=soc.ram.ram[122][18] i1=soc.ram.ram[126][18] q=$abc$109383$new_n48537_
 .subckt nand2_x0 i0=$abc$109383$new_n48537_ i1=$abc$109383$new_n43595_ nq=$abc$109383$new_n48538_
 .subckt inv_x0 i=soc.ram.ram[127][18] nq=$abc$109383$new_n48539_
 .subckt nand2_x0 i0=$abc$109383$new_n48539_ i1=$abc$109383$new_n44225_ nq=$abc$109383$new_n48540_
-.subckt ao22_x2 i0=soc.ram.ram[123][18] i1=$abc$109383$new_n44145_ i2=$abc$109383$new_n43871_ q=$abc$109383$new_n48541_
+.subckt and21nor_x1 i0=soc.ram.ram[123][18] i1=$abc$109383$new_n44145_ i2=$abc$109383$new_n43871_ nq=$abc$109383$new_n48541_
 .subckt nand2_x0 i0=$abc$109383$new_n48541_ i1=$abc$109383$new_n48540_ nq=$abc$109383$new_n48542_
-.subckt oa22_x2 i0=$abc$109383$new_n48542_ i1=$abc$109383$new_n48538_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n48543_
-.subckt mx2_x2 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[114][18] i1=soc.ram.ram[118][18] q=$abc$109383$new_n48544_
+.subckt or21nand_x1 i0=$abc$109383$new_n48542_ i1=$abc$109383$new_n48538_ i2=$abc$109383$new_n44523_ nq=$abc$109383$new_n48543_
+.subckt mux2_x1 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[114][18] i1=soc.ram.ram[118][18] q=$abc$109383$new_n48544_
 .subckt nand2_x0 i0=$abc$109383$new_n48544_ i1=$abc$109383$new_n44562_ nq=$abc$109383$new_n48545_
-.subckt o2_x2 i0=soc.ram.ram[115][18] i1=$abc$109383$new_n44118_ q=$abc$109383$new_n48546_
-.subckt ao22_x2 i0=soc.ram.ram[119][18] i1=$abc$109383$new_n43530_ i2=$abc$109383$new_n44142_ q=$abc$109383$new_n48547_
+.subckt or2_x1 i0=soc.ram.ram[115][18] i1=$abc$109383$new_n44118_ q=$abc$109383$new_n48546_
+.subckt and21nor_x1 i0=soc.ram.ram[119][18] i1=$abc$109383$new_n43530_ i2=$abc$109383$new_n44142_ nq=$abc$109383$new_n48547_
 .subckt nand2_x0 i0=$abc$109383$new_n48547_ i1=$abc$109383$new_n48546_ nq=$abc$109383$new_n48548_
-.subckt oa22_x2 i0=$abc$109383$new_n48548_ i1=$abc$109383$new_n48545_ i2=$abc$109383$new_n44390_ q=$abc$109383$new_n48549_
-.subckt a2_x2 i0=$abc$109383$new_n48549_ i1=$abc$109383$new_n48543_ q=$abc$109383$new_n48550_
-.subckt oa22_x2 i0=$abc$109383$new_n46119_ i1=$abc$109383$new_n48550_ i2=$abc$109383$new_n48536_ q=$abc$109383$new_n48551_
-.subckt o2_x2 i0=soc.ram.ram[105][18] i1=$abc$109383$new_n45076_ q=$abc$109383$new_n48552_
-.subckt ao22_x2 i0=soc.ram.ram[109][18] i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n48553_
+.subckt or21nand_x1 i0=$abc$109383$new_n48548_ i1=$abc$109383$new_n48545_ i2=$abc$109383$new_n44390_ nq=$abc$109383$new_n48549_
+.subckt and2_x1 i0=$abc$109383$new_n48549_ i1=$abc$109383$new_n48543_ q=$abc$109383$new_n48550_
+.subckt or21nand_x1 i0=$abc$109383$new_n46119_ i1=$abc$109383$new_n48550_ i2=$abc$109383$new_n48536_ nq=$abc$109383$new_n48551_
+.subckt or2_x1 i0=soc.ram.ram[105][18] i1=$abc$109383$new_n45076_ q=$abc$109383$new_n48552_
+.subckt and21nor_x1 i0=soc.ram.ram[109][18] i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n48553_
 .subckt nand2_x0 i0=$abc$109383$new_n48553_ i1=$abc$109383$new_n48552_ nq=$abc$109383$new_n48554_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[104][18] i1=soc.ram.ram[108][18] q=$abc$109383$new_n48555_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[104][18] i1=soc.ram.ram[108][18] q=$abc$109383$new_n48555_
 .subckt nand2_x0 i0=$abc$109383$new_n48555_ i1=$abc$109383$new_n43707_ nq=$abc$109383$new_n48556_
-.subckt oa22_x2 i0=$abc$109383$new_n48556_ i1=$abc$109383$new_n48554_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n48557_
-.subckt mx2_x2 cmd=$abc$109383$new_n43636_ i0=soc.ram.ram[96][18] i1=soc.ram.ram[100][18] q=$abc$109383$new_n48558_
+.subckt or21nand_x1 i0=$abc$109383$new_n48556_ i1=$abc$109383$new_n48554_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n48557_
+.subckt mux2_x1 cmd=$abc$109383$new_n43636_ i0=soc.ram.ram[96][18] i1=soc.ram.ram[100][18] q=$abc$109383$new_n48558_
 .subckt nand2_x0 i0=$abc$109383$new_n48558_ i1=$abc$109383$new_n43435_ nq=$abc$109383$new_n48559_
-.subckt o2_x2 i0=soc.ram.ram[97][18] i1=$abc$109383$new_n43509_ q=$abc$109383$new_n48560_
-.subckt ao22_x2 i0=soc.ram.ram[101][18] i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n45042_ q=$abc$109383$new_n48561_
+.subckt or2_x1 i0=soc.ram.ram[97][18] i1=$abc$109383$new_n43509_ q=$abc$109383$new_n48560_
+.subckt and21nor_x1 i0=soc.ram.ram[101][18] i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n45042_ nq=$abc$109383$new_n48561_
 .subckt nand2_x0 i0=$abc$109383$new_n48561_ i1=$abc$109383$new_n48560_ nq=$abc$109383$new_n48562_
-.subckt oa22_x2 i0=$abc$109383$new_n48562_ i1=$abc$109383$new_n48559_ i2=$abc$109383$new_n43569_ q=$abc$109383$new_n48563_
-.subckt a3_x2 i0=$abc$109383$new_n48563_ i1=$abc$109383$new_n48557_ i2=$abc$109383$new_n43473_ q=$abc$109383$new_n48564_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[99][18] i1=soc.ram.ram[103][18] q=$abc$109383$new_n48565_
-.subckt mx2_x2 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[98][18] i1=soc.ram.ram[102][18] q=$abc$109383$new_n48566_
-.subckt mx2_x2 cmd=$abc$109383$new_n43699_ i0=$abc$109383$new_n48566_ i1=$abc$109383$new_n48565_ q=$abc$109383$new_n48567_
+.subckt or21nand_x1 i0=$abc$109383$new_n48562_ i1=$abc$109383$new_n48559_ i2=$abc$109383$new_n43569_ nq=$abc$109383$new_n48563_
+.subckt and3_x1 i0=$abc$109383$new_n48563_ i1=$abc$109383$new_n48557_ i2=$abc$109383$new_n43473_ q=$abc$109383$new_n48564_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[99][18] i1=soc.ram.ram[103][18] q=$abc$109383$new_n48565_
+.subckt mux2_x1 cmd=$abc$109383$new_n43495_ i0=soc.ram.ram[98][18] i1=soc.ram.ram[102][18] q=$abc$109383$new_n48566_
+.subckt mux2_x1 cmd=$abc$109383$new_n43699_ i0=$abc$109383$new_n48566_ i1=$abc$109383$new_n48565_ q=$abc$109383$new_n48567_
 .subckt nand2_x0 i0=$abc$109383$new_n48567_ i1=$abc$109383$new_n44448_ nq=$abc$109383$new_n48568_
-.subckt o2_x2 i0=soc.ram.ram[107][18] i1=$abc$109383$new_n43513_ q=$abc$109383$new_n48569_
-.subckt ao22_x2 i0=soc.ram.ram[111][18] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n44053_ q=$abc$109383$new_n48570_
+.subckt or2_x1 i0=soc.ram.ram[107][18] i1=$abc$109383$new_n43513_ q=$abc$109383$new_n48569_
+.subckt and21nor_x1 i0=soc.ram.ram[111][18] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n44053_ nq=$abc$109383$new_n48570_
 .subckt nand2_x0 i0=$abc$109383$new_n48570_ i1=$abc$109383$new_n48569_ nq=$abc$109383$new_n48571_
-.subckt mx2_x2 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[106][18] i1=soc.ram.ram[110][18] q=$abc$109383$new_n48572_
+.subckt mux2_x1 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[106][18] i1=soc.ram.ram[110][18] q=$abc$109383$new_n48572_
 .subckt nand2_x0 i0=$abc$109383$new_n48572_ i1=$abc$109383$new_n43616_ nq=$abc$109383$new_n48573_
-.subckt oa22_x2 i0=$abc$109383$new_n48573_ i1=$abc$109383$new_n48571_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n48574_
+.subckt or21nand_x1 i0=$abc$109383$new_n48573_ i1=$abc$109383$new_n48571_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n48574_
 .subckt nand3_x0 i0=$abc$109383$new_n48574_ i1=$abc$109383$new_n48568_ i2=$abc$109383$new_n43842_ nq=$abc$109383$new_n48575_
 .subckt nand2_x0 i0=$abc$109383$new_n48575_ i1=$abc$109383$new_n43715_ nq=$abc$109383$new_n48576_
-.subckt ao22_x2 i0=$abc$109383$new_n48576_ i1=$abc$109383$new_n48564_ i2=$abc$109383$new_n43409_ q=$abc$109383$new_n48577_
-.subckt oa22_x2 i0=$abc$109383$new_n48577_ i1=$abc$109383$new_n48551_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n48578_
+.subckt and21nor_x1 i0=$abc$109383$new_n48576_ i1=$abc$109383$new_n48564_ i2=$abc$109383$new_n43409_ nq=$abc$109383$new_n48577_
+.subckt or21nand_x1 i0=$abc$109383$new_n48577_ i1=$abc$109383$new_n48551_ i2=$abc$109383$new_n43590_ nq=$abc$109383$new_n48578_
 .subckt nor2_x0 i0=$abc$109383$new_n48578_ i1=$abc$109383$new_n48526_ nq=$abc$109383$new_n48579_
-.subckt mx2_x2 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[10][18] i1=soc.ram.ram[14][18] q=$abc$109383$new_n48580_
+.subckt mux2_x1 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[10][18] i1=soc.ram.ram[14][18] q=$abc$109383$new_n48580_
 .subckt nand2_x0 i0=$abc$109383$new_n48580_ i1=$abc$109383$new_n43594_ nq=$abc$109383$new_n48581_
 .subckt inv_x0 i=soc.ram.ram[15][18] nq=$abc$109383$new_n48582_
-.subckt a2_x2 i0=$abc$109383$new_n48582_ i1=$abc$109383$new_n43742_ q=$abc$109383$new_n48583_
-.subckt o2_x2 i0=soc.ram.ram[11][18] i1=$abc$109383$new_n44351_ q=$abc$109383$new_n48584_
+.subckt and2_x1 i0=$abc$109383$new_n48582_ i1=$abc$109383$new_n43742_ q=$abc$109383$new_n48583_
+.subckt or2_x1 i0=soc.ram.ram[11][18] i1=$abc$109383$new_n44351_ q=$abc$109383$new_n48584_
 .subckt nand2_x0 i0=$abc$109383$new_n48584_ i1=$abc$109383$new_n45941_ nq=$abc$109383$new_n48585_
-.subckt ao22_x2 i0=$abc$109383$new_n48585_ i1=$abc$109383$new_n48583_ i2=$abc$109383$new_n48581_ q=$abc$109383$new_n48586_
-.subckt a2_x2 i0=$abc$109383$new_n48586_ i1=$abc$109383$new_n43896_ q=$abc$109383$new_n48587_
-.subckt mx2_x2 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[2][18] i1=soc.ram.ram[6][18] q=$abc$109383$new_n48588_
-.subckt a2_x2 i0=$abc$109383$new_n48588_ i1=$abc$109383$new_n43456_ q=$abc$109383$new_n48589_
-.subckt ao22_x2 i0=soc.ram.ram[3][18] i1=$abc$109383$new_n43346_ i2=$abc$109383$new_n43499_ q=$abc$109383$new_n48590_
-.subckt ao22_x2 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[7][18] i2=$abc$109383$new_n48590_ q=$abc$109383$new_n48591_
+.subckt and21nor_x1 i0=$abc$109383$new_n48585_ i1=$abc$109383$new_n48583_ i2=$abc$109383$new_n48581_ nq=$abc$109383$new_n48586_
+.subckt and2_x1 i0=$abc$109383$new_n48586_ i1=$abc$109383$new_n43896_ q=$abc$109383$new_n48587_
+.subckt mux2_x1 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[2][18] i1=soc.ram.ram[6][18] q=$abc$109383$new_n48588_
+.subckt and2_x1 i0=$abc$109383$new_n48588_ i1=$abc$109383$new_n43456_ q=$abc$109383$new_n48589_
+.subckt and21nor_x1 i0=soc.ram.ram[3][18] i1=$abc$109383$new_n43346_ i2=$abc$109383$new_n43499_ nq=$abc$109383$new_n48590_
+.subckt and21nor_x1 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[7][18] i2=$abc$109383$new_n48590_ nq=$abc$109383$new_n48591_
 .subckt nor3_x0 i0=$abc$109383$new_n48591_ i1=$abc$109383$new_n48589_ i2=$abc$109383$new_n43569_ nq=$abc$109383$new_n48592_
-.subckt ao22_x2 i0=$abc$109383$new_n48592_ i1=$abc$109383$new_n48587_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n48593_
+.subckt and21nor_x1 i0=$abc$109383$new_n48592_ i1=$abc$109383$new_n48587_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n48593_
 .subckt nand2_x0 i0=soc.ram.ram[23][18] i1=$abc$109383$new_n44162_ nq=$abc$109383$new_n48594_
 .subckt inv_x0 i=soc.ram.ram[31][18] nq=$abc$109383$new_n48595_
-.subckt ao22_x2 i0=$abc$109383$new_n48595_ i1=$abc$109383$new_n43711_ i2=$abc$109383$new_n44118_ q=$abc$109383$new_n48596_
+.subckt and21nor_x1 i0=$abc$109383$new_n48595_ i1=$abc$109383$new_n43711_ i2=$abc$109383$new_n44118_ nq=$abc$109383$new_n48596_
 .subckt nand2_x0 i0=$abc$109383$new_n48596_ i1=$abc$109383$new_n48594_ nq=$abc$109383$new_n48597_
-.subckt oa22_x2 i0=soc.ram.ram[27][18] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44351_ q=$abc$109383$new_n48598_
-.subckt oa22_x2 i0=$abc$109383$new_n43469_ i1=soc.ram.ram[19][18] i2=$abc$109383$new_n48598_ q=$abc$109383$new_n48599_
-.subckt a2_x2 i0=$abc$109383$new_n48599_ i1=$abc$109383$new_n43797_ q=$abc$109383$new_n48600_
+.subckt or21nand_x1 i0=soc.ram.ram[27][18] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44351_ nq=$abc$109383$new_n48598_
+.subckt or21nand_x1 i0=$abc$109383$new_n43469_ i1=soc.ram.ram[19][18] i2=$abc$109383$new_n48598_ nq=$abc$109383$new_n48599_
+.subckt and2_x1 i0=$abc$109383$new_n48599_ i1=$abc$109383$new_n43797_ q=$abc$109383$new_n48600_
 .subckt nand2_x0 i0=$abc$109383$new_n48600_ i1=$abc$109383$new_n48597_ nq=$abc$109383$new_n48601_
 .subckt nand2_x0 i0=soc.ram.ram[22][18] i1=$abc$109383$new_n44161_ nq=$abc$109383$new_n48602_
 .subckt inv_x0 i=soc.ram.ram[30][18] nq=$abc$109383$new_n48603_
-.subckt ao22_x2 i0=$abc$109383$new_n48603_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44072_ q=$abc$109383$new_n48604_
-.subckt a2_x2 i0=$abc$109383$new_n48604_ i1=$abc$109383$new_n48602_ q=$abc$109383$new_n48605_
-.subckt oa22_x2 i0=soc.ram.ram[26][18] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n43395_ q=$abc$109383$new_n48606_
-.subckt oa22_x2 i0=$abc$109383$new_n43431_ i1=soc.ram.ram[18][18] i2=$abc$109383$new_n48606_ q=$abc$109383$new_n48607_
+.subckt and21nor_x1 i0=$abc$109383$new_n48603_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n44072_ nq=$abc$109383$new_n48604_
+.subckt and2_x1 i0=$abc$109383$new_n48604_ i1=$abc$109383$new_n48602_ q=$abc$109383$new_n48605_
+.subckt or21nand_x1 i0=soc.ram.ram[26][18] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n43395_ nq=$abc$109383$new_n48606_
+.subckt or21nand_x1 i0=$abc$109383$new_n43431_ i1=soc.ram.ram[18][18] i2=$abc$109383$new_n48606_ nq=$abc$109383$new_n48607_
 .subckt nand2_x0 i0=$abc$109383$new_n48607_ i1=$abc$109383$new_n43902_ nq=$abc$109383$new_n48608_
-.subckt ao22_x2 i0=$abc$109383$new_n48608_ i1=$abc$109383$new_n48605_ i2=$abc$109383$new_n43466_ q=$abc$109383$new_n48609_
-.subckt a2_x2 i0=$abc$109383$new_n48609_ i1=$abc$109383$new_n48601_ q=$abc$109383$new_n48610_
-.subckt ao22_x2 i0=$abc$109383$new_n48610_ i1=$abc$109383$new_n48593_ i2=$abc$109383$new_n44622_ q=$abc$109383$new_n48611_
-.subckt mx2_x2 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[28][18] i1=soc.ram.ram[29][18] q=$abc$109383$new_n48612_
-.subckt mx2_x2 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[24][18] i1=soc.ram.ram[25][18] q=$abc$109383$new_n48613_
-.subckt mx2_x2 cmd=$abc$109383$new_n43607_ i0=$abc$109383$new_n48613_ i1=$abc$109383$new_n48612_ q=$abc$109383$new_n48614_
+.subckt and21nor_x1 i0=$abc$109383$new_n48608_ i1=$abc$109383$new_n48605_ i2=$abc$109383$new_n43466_ nq=$abc$109383$new_n48609_
+.subckt and2_x1 i0=$abc$109383$new_n48609_ i1=$abc$109383$new_n48601_ q=$abc$109383$new_n48610_
+.subckt and21nor_x1 i0=$abc$109383$new_n48610_ i1=$abc$109383$new_n48593_ i2=$abc$109383$new_n44622_ nq=$abc$109383$new_n48611_
+.subckt mux2_x1 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[28][18] i1=soc.ram.ram[29][18] q=$abc$109383$new_n48612_
+.subckt mux2_x1 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[24][18] i1=soc.ram.ram[25][18] q=$abc$109383$new_n48613_
+.subckt mux2_x1 cmd=$abc$109383$new_n43607_ i0=$abc$109383$new_n48613_ i1=$abc$109383$new_n48612_ q=$abc$109383$new_n48614_
 .subckt nor2_x0 i0=$abc$109383$new_n48614_ i1=$abc$109383$new_n43837_ nq=$abc$109383$new_n48615_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[20][18] i1=soc.ram.ram[21][18] q=$abc$109383$new_n48616_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[16][18] i1=soc.ram.ram[17][18] q=$abc$109383$new_n48617_
-.subckt mx2_x2 cmd=$abc$109383$new_n43636_ i0=$abc$109383$new_n48617_ i1=$abc$109383$new_n48616_ q=$abc$109383$new_n48618_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[20][18] i1=soc.ram.ram[21][18] q=$abc$109383$new_n48616_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[16][18] i1=soc.ram.ram[17][18] q=$abc$109383$new_n48617_
+.subckt mux2_x1 cmd=$abc$109383$new_n43636_ i0=$abc$109383$new_n48617_ i1=$abc$109383$new_n48616_ q=$abc$109383$new_n48618_
 .subckt nor2_x0 i0=$abc$109383$new_n48618_ i1=$abc$109383$new_n43896_ nq=$abc$109383$new_n48619_
-.subckt ao22_x2 i0=$abc$109383$new_n48619_ i1=$abc$109383$new_n48615_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n48620_
-.subckt mx2_x2 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[0][18] i1=soc.ram.ram[4][18] q=$abc$109383$new_n48621_
-.subckt a2_x2 i0=$abc$109383$new_n48621_ i1=$abc$109383$new_n43594_ q=$abc$109383$new_n48622_
-.subckt ao22_x2 i0=soc.ram.ram[1][18] i1=$abc$109383$new_n43418_ i2=$abc$109383$new_n43651_ q=$abc$109383$new_n48623_
-.subckt ao22_x2 i0=$abc$109383$new_n43560_ i1=soc.ram.ram[5][18] i2=$abc$109383$new_n48623_ q=$abc$109383$new_n48624_
+.subckt and21nor_x1 i0=$abc$109383$new_n48619_ i1=$abc$109383$new_n48615_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n48620_
+.subckt mux2_x1 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[0][18] i1=soc.ram.ram[4][18] q=$abc$109383$new_n48621_
+.subckt and2_x1 i0=$abc$109383$new_n48621_ i1=$abc$109383$new_n43594_ q=$abc$109383$new_n48622_
+.subckt and21nor_x1 i0=soc.ram.ram[1][18] i1=$abc$109383$new_n43418_ i2=$abc$109383$new_n43651_ nq=$abc$109383$new_n48623_
+.subckt and21nor_x1 i0=$abc$109383$new_n43560_ i1=soc.ram.ram[5][18] i2=$abc$109383$new_n48623_ nq=$abc$109383$new_n48624_
 .subckt nor3_x0 i0=$abc$109383$new_n48624_ i1=$abc$109383$new_n48622_ i2=$abc$109383$new_n43896_ nq=$abc$109383$new_n48625_
-.subckt mx2_x2 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[8][18] i1=soc.ram.ram[12][18] q=$abc$109383$new_n48626_
+.subckt mux2_x1 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[8][18] i1=soc.ram.ram[12][18] q=$abc$109383$new_n48626_
 .subckt nand2_x0 i0=$abc$109383$new_n48626_ i1=$abc$109383$new_n43427_ nq=$abc$109383$new_n48627_
 .subckt nor2_x0 i0=soc.ram.ram[9][18] i1=$abc$109383$new_n43755_ nq=$abc$109383$new_n48628_
 .subckt inv_x0 i=soc.ram.ram[13][18] nq=$abc$109383$new_n48629_
-.subckt oa22_x2 i0=$abc$109383$new_n48629_ i1=$abc$109383$new_n43337_ i2=$abc$109383$new_n43355_ q=$abc$109383$new_n48630_
-.subckt ao22_x2 i0=$abc$109383$new_n48630_ i1=$abc$109383$new_n48628_ i2=$abc$109383$new_n48627_ q=$abc$109383$new_n48631_
-.subckt a2_x2 i0=$abc$109383$new_n48631_ i1=$abc$109383$new_n43353_ q=$abc$109383$new_n48632_
-.subckt ao22_x2 i0=$abc$109383$new_n48632_ i1=$abc$109383$new_n48625_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n48633_
-.subckt ao22_x2 i0=$abc$109383$new_n48633_ i1=$abc$109383$new_n48620_ i2=$abc$109383$new_n43990_ q=$abc$109383$new_n48634_
-.subckt ao22_x2 i0=$abc$109383$new_n48634_ i1=$abc$109383$new_n48611_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n48635_
-.subckt o2_x2 i0=soc.ram.ram[51][18] i1=$abc$109383$new_n45285_ q=$abc$109383$new_n48636_
-.subckt ao22_x2 i0=soc.ram.ram[55][18] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n44214_ q=$abc$109383$new_n48637_
+.subckt or21nand_x1 i0=$abc$109383$new_n48629_ i1=$abc$109383$new_n43337_ i2=$abc$109383$new_n43355_ nq=$abc$109383$new_n48630_
+.subckt and21nor_x1 i0=$abc$109383$new_n48630_ i1=$abc$109383$new_n48628_ i2=$abc$109383$new_n48627_ nq=$abc$109383$new_n48631_
+.subckt and2_x1 i0=$abc$109383$new_n48631_ i1=$abc$109383$new_n43353_ q=$abc$109383$new_n48632_
+.subckt and21nor_x1 i0=$abc$109383$new_n48632_ i1=$abc$109383$new_n48625_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n48633_
+.subckt and21nor_x1 i0=$abc$109383$new_n48633_ i1=$abc$109383$new_n48620_ i2=$abc$109383$new_n43990_ nq=$abc$109383$new_n48634_
+.subckt and21nor_x1 i0=$abc$109383$new_n48634_ i1=$abc$109383$new_n48611_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n48635_
+.subckt or2_x1 i0=soc.ram.ram[51][18] i1=$abc$109383$new_n45285_ q=$abc$109383$new_n48636_
+.subckt and21nor_x1 i0=soc.ram.ram[55][18] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n44214_ nq=$abc$109383$new_n48637_
 .subckt nand2_x0 i0=$abc$109383$new_n48637_ i1=$abc$109383$new_n48636_ nq=$abc$109383$new_n48638_
 .subckt inv_x0 i=soc.ram.ram[54][18] nq=$abc$109383$new_n48639_
 .subckt nand2_x0 i0=$abc$109383$new_n48639_ i1=$abc$109383$new_n44848_ nq=$abc$109383$new_n48640_
-.subckt o2_x2 i0=soc.ram.ram[50][18] i1=$abc$109383$new_n44795_ q=$abc$109383$new_n48641_
-.subckt a2_x2 i0=$abc$109383$new_n48641_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n48642_
+.subckt or2_x1 i0=soc.ram.ram[50][18] i1=$abc$109383$new_n44795_ q=$abc$109383$new_n48641_
+.subckt and2_x1 i0=$abc$109383$new_n48641_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n48642_
 .subckt nand2_x0 i0=$abc$109383$new_n48642_ i1=$abc$109383$new_n48640_ nq=$abc$109383$new_n48643_
-.subckt oa22_x2 i0=$abc$109383$new_n48643_ i1=$abc$109383$new_n48638_ i2=$abc$109383$new_n43855_ q=$abc$109383$new_n48644_
+.subckt or21nand_x1 i0=$abc$109383$new_n48643_ i1=$abc$109383$new_n48638_ i2=$abc$109383$new_n43855_ nq=$abc$109383$new_n48644_
 .subckt inv_x0 i=soc.ram.ram[53][18] nq=$abc$109383$new_n48645_
 .subckt nand2_x0 i0=$abc$109383$new_n48645_ i1=$abc$109383$new_n45082_ nq=$abc$109383$new_n48646_
-.subckt ao22_x2 i0=soc.ram.ram[49][18] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n48647_
+.subckt and21nor_x1 i0=soc.ram.ram[49][18] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n48647_
 .subckt nand2_x0 i0=$abc$109383$new_n48647_ i1=$abc$109383$new_n48646_ nq=$abc$109383$new_n48648_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[48][18] i1=soc.ram.ram[52][18] q=$abc$109383$new_n48649_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[48][18] i1=soc.ram.ram[52][18] q=$abc$109383$new_n48649_
 .subckt nand2_x0 i0=$abc$109383$new_n48649_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n48650_
-.subckt oa22_x2 i0=$abc$109383$new_n48650_ i1=$abc$109383$new_n48648_ i2=$abc$109383$new_n45427_ q=$abc$109383$new_n48651_
+.subckt or21nand_x1 i0=$abc$109383$new_n48650_ i1=$abc$109383$new_n48648_ i2=$abc$109383$new_n45427_ nq=$abc$109383$new_n48651_
 .subckt nand3_x0 i0=$abc$109383$new_n48651_ i1=$abc$109383$new_n48644_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n48652_
 .subckt inv_x0 i=soc.ram.ram[63][18] nq=$abc$109383$new_n48653_
 .subckt nand2_x0 i0=$abc$109383$new_n48653_ i1=$abc$109383$new_n45082_ nq=$abc$109383$new_n48654_
-.subckt ao22_x2 i0=soc.ram.ram[59][18] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n48655_
+.subckt and21nor_x1 i0=soc.ram.ram[59][18] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n48655_
 .subckt nand2_x0 i0=$abc$109383$new_n48655_ i1=$abc$109383$new_n48654_ nq=$abc$109383$new_n48656_
-.subckt mx2_x2 cmd=$abc$109383$new_n43660_ i0=soc.ram.ram[58][18] i1=soc.ram.ram[62][18] q=$abc$109383$new_n48657_
+.subckt mux2_x1 cmd=$abc$109383$new_n43660_ i0=soc.ram.ram[58][18] i1=soc.ram.ram[62][18] q=$abc$109383$new_n48657_
 .subckt nand2_x0 i0=$abc$109383$new_n48657_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n48658_
-.subckt oa22_x2 i0=$abc$109383$new_n48658_ i1=$abc$109383$new_n48656_ i2=$abc$109383$new_n43449_ q=$abc$109383$new_n48659_
+.subckt or21nand_x1 i0=$abc$109383$new_n48658_ i1=$abc$109383$new_n48656_ i2=$abc$109383$new_n43449_ nq=$abc$109383$new_n48659_
 .subckt inv_x0 i=soc.ram.ram[61][18] nq=$abc$109383$new_n48660_
 .subckt nand2_x0 i0=$abc$109383$new_n48660_ i1=$abc$109383$new_n44848_ nq=$abc$109383$new_n48661_
-.subckt ao22_x2 i0=soc.ram.ram[57][18] i1=$abc$109383$new_n44187_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n48662_
+.subckt and21nor_x1 i0=soc.ram.ram[57][18] i1=$abc$109383$new_n44187_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n48662_
 .subckt nand2_x0 i0=$abc$109383$new_n48662_ i1=$abc$109383$new_n48661_ nq=$abc$109383$new_n48663_
-.subckt mx2_x2 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[56][18] i1=soc.ram.ram[60][18] q=$abc$109383$new_n48664_
+.subckt mux2_x1 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[56][18] i1=soc.ram.ram[60][18] q=$abc$109383$new_n48664_
 .subckt nand2_x0 i0=$abc$109383$new_n48664_ i1=$abc$109383$new_n44630_ nq=$abc$109383$new_n48665_
-.subckt oa22_x2 i0=$abc$109383$new_n48665_ i1=$abc$109383$new_n48663_ i2=$abc$109383$new_n43650_ q=$abc$109383$new_n48666_
+.subckt or21nand_x1 i0=$abc$109383$new_n48665_ i1=$abc$109383$new_n48663_ i2=$abc$109383$new_n43650_ nq=$abc$109383$new_n48666_
 .subckt nand3_x0 i0=$abc$109383$new_n48666_ i1=$abc$109383$new_n48659_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n48667_
 .subckt nand3_x0 i0=$abc$109383$new_n48667_ i1=$abc$109383$new_n48652_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n48668_
 .subckt inv_x0 i=soc.ram.ram[45][18] nq=$abc$109383$new_n48669_
 .subckt nand2_x0 i0=$abc$109383$new_n48669_ i1=$abc$109383$new_n44011_ nq=$abc$109383$new_n48670_
-.subckt ao22_x2 i0=soc.ram.ram[41][18] i1=$abc$109383$new_n45691_ i2=$abc$109383$new_n46934_ q=$abc$109383$new_n48671_
+.subckt and21nor_x1 i0=soc.ram.ram[41][18] i1=$abc$109383$new_n45691_ i2=$abc$109383$new_n46934_ nq=$abc$109383$new_n48671_
 .subckt nand2_x0 i0=$abc$109383$new_n48671_ i1=$abc$109383$new_n48670_ nq=$abc$109383$new_n48672_
-.subckt mx2_x2 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[40][18] i1=soc.ram.ram[44][18] q=$abc$109383$new_n48673_
+.subckt mux2_x1 cmd=$abc$109383$new_n44202_ i0=soc.ram.ram[40][18] i1=soc.ram.ram[44][18] q=$abc$109383$new_n48673_
 .subckt nand2_x0 i0=$abc$109383$new_n48673_ i1=$abc$109383$new_n44078_ nq=$abc$109383$new_n48674_
-.subckt oa22_x2 i0=$abc$109383$new_n48674_ i1=$abc$109383$new_n48672_ i2=$abc$109383$new_n46154_ q=$abc$109383$new_n48675_
+.subckt or21nand_x1 i0=$abc$109383$new_n48674_ i1=$abc$109383$new_n48672_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n48675_
 .subckt inv_x0 i=soc.ram.ram[47][18] nq=$abc$109383$new_n48676_
 .subckt nand2_x0 i0=$abc$109383$new_n48676_ i1=$abc$109383$new_n44088_ nq=$abc$109383$new_n48677_
-.subckt ao22_x2 i0=soc.ram.ram[43][18] i1=$abc$109383$new_n44859_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n48678_
+.subckt and21nor_x1 i0=soc.ram.ram[43][18] i1=$abc$109383$new_n44859_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n48678_
 .subckt nand2_x0 i0=$abc$109383$new_n48678_ i1=$abc$109383$new_n48677_ nq=$abc$109383$new_n48679_
-.subckt mx2_x2 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[42][18] i1=soc.ram.ram[46][18] q=$abc$109383$new_n48680_
+.subckt mux2_x1 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[42][18] i1=soc.ram.ram[46][18] q=$abc$109383$new_n48680_
 .subckt nand2_x0 i0=$abc$109383$new_n48680_ i1=$abc$109383$new_n44180_ nq=$abc$109383$new_n48681_
-.subckt oa22_x2 i0=$abc$109383$new_n48681_ i1=$abc$109383$new_n48679_ i2=$abc$109383$new_n43473_ q=$abc$109383$new_n48682_
+.subckt or21nand_x1 i0=$abc$109383$new_n48681_ i1=$abc$109383$new_n48679_ i2=$abc$109383$new_n43473_ nq=$abc$109383$new_n48682_
 .subckt nand3_x0 i0=$abc$109383$new_n48682_ i1=$abc$109383$new_n48675_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n48683_
-.subckt o2_x2 i0=soc.ram.ram[35][18] i1=$abc$109383$new_n44500_ q=$abc$109383$new_n48684_
-.subckt ao22_x2 i0=soc.ram.ram[39][18] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n44214_ q=$abc$109383$new_n48685_
+.subckt or2_x1 i0=soc.ram.ram[35][18] i1=$abc$109383$new_n44500_ q=$abc$109383$new_n48684_
+.subckt and21nor_x1 i0=soc.ram.ram[39][18] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n44214_ nq=$abc$109383$new_n48685_
 .subckt nand2_x0 i0=$abc$109383$new_n48685_ i1=$abc$109383$new_n48684_ nq=$abc$109383$new_n48686_
 .subckt inv_x0 i=soc.ram.ram[38][18] nq=$abc$109383$new_n48687_
 .subckt nand2_x0 i0=$abc$109383$new_n48687_ i1=$abc$109383$new_n44817_ nq=$abc$109383$new_n48688_
-.subckt o2_x2 i0=soc.ram.ram[34][18] i1=$abc$109383$new_n44181_ q=$abc$109383$new_n48689_
-.subckt a2_x2 i0=$abc$109383$new_n48689_ i1=$abc$109383$new_n43737_ q=$abc$109383$new_n48690_
+.subckt or2_x1 i0=soc.ram.ram[34][18] i1=$abc$109383$new_n44181_ q=$abc$109383$new_n48689_
+.subckt and2_x1 i0=$abc$109383$new_n48689_ i1=$abc$109383$new_n43737_ q=$abc$109383$new_n48690_
 .subckt nand2_x0 i0=$abc$109383$new_n48690_ i1=$abc$109383$new_n48688_ nq=$abc$109383$new_n48691_
-.subckt oa22_x2 i0=$abc$109383$new_n48691_ i1=$abc$109383$new_n48686_ i2=$abc$109383$new_n43473_ q=$abc$109383$new_n48692_
+.subckt or21nand_x1 i0=$abc$109383$new_n48691_ i1=$abc$109383$new_n48686_ i2=$abc$109383$new_n43473_ nq=$abc$109383$new_n48692_
 .subckt inv_x0 i=soc.ram.ram[37][18] nq=$abc$109383$new_n48693_
 .subckt nand2_x0 i0=$abc$109383$new_n48693_ i1=$abc$109383$new_n44586_ nq=$abc$109383$new_n48694_
-.subckt ao22_x2 i0=soc.ram.ram[33][18] i1=$abc$109383$new_n45609_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n48695_
+.subckt and21nor_x1 i0=soc.ram.ram[33][18] i1=$abc$109383$new_n45609_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n48695_
 .subckt nand2_x0 i0=$abc$109383$new_n48695_ i1=$abc$109383$new_n48694_ nq=$abc$109383$new_n48696_
-.subckt mx2_x2 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[32][18] i1=soc.ram.ram[36][18] q=$abc$109383$new_n48697_
+.subckt mux2_x1 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[32][18] i1=soc.ram.ram[36][18] q=$abc$109383$new_n48697_
 .subckt nand2_x0 i0=$abc$109383$new_n48697_ i1=$abc$109383$new_n43489_ nq=$abc$109383$new_n48698_
-.subckt oa22_x2 i0=$abc$109383$new_n48698_ i1=$abc$109383$new_n48696_ i2=$abc$109383$new_n45427_ q=$abc$109383$new_n48699_
+.subckt or21nand_x1 i0=$abc$109383$new_n48698_ i1=$abc$109383$new_n48696_ i2=$abc$109383$new_n45427_ nq=$abc$109383$new_n48699_
 .subckt nand3_x0 i0=$abc$109383$new_n48699_ i1=$abc$109383$new_n48692_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n48700_
 .subckt nand3_x0 i0=$abc$109383$new_n48700_ i1=$abc$109383$new_n48683_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n48701_
-.subckt a3_x2 i0=$abc$109383$new_n48701_ i1=$abc$109383$new_n48668_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n48702_
+.subckt and3_x1 i0=$abc$109383$new_n48701_ i1=$abc$109383$new_n48668_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n48702_
 .subckt nor3_x0 i0=$abc$109383$new_n48702_ i1=$abc$109383$new_n48635_ i2=$abc$109383$new_n43586_ nq=$abc$109383$new_n48703_
-.subckt ao22_x2 i0=$abc$109383$new_n48703_ i1=$abc$109383$new_n48579_ i2=$abc$109383$new_n43322_ q=$abc$109383$new_n48704_
+.subckt and21nor_x1 i0=$abc$109383$new_n48703_ i1=$abc$109383$new_n48579_ i2=$abc$109383$new_n43322_ nq=$abc$109383$new_n48704_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n44265_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[18] nq=$abc$109383$new_n48705_
 .subckt nand3_x0 i0=$abc$109383$new_n27466_ i1=$abc$109383$new_n23713_ i2=soc.bridge.csr_bridge_1.wb__dat_r[18] nq=$abc$109383$new_n48706_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[18] nq=$abc$109383$new_n48707_
-.subckt o2_x2 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n48707_ q=$abc$109383$new_n48708_
-.subckt a2_x2 i0=$abc$109383$new_n48708_ i1=$abc$109383$new_n48706_ q=$abc$109383$new_n48709_
-.subckt o4_x2 i0=$abc$109383$new_n48709_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n48710_
-.subckt a4_x2 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[18] q=$abc$109383$new_n48711_
+.subckt or2_x1 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n48707_ q=$abc$109383$new_n48708_
+.subckt and2_x1 i0=$abc$109383$new_n48708_ i1=$abc$109383$new_n48706_ q=$abc$109383$new_n48709_
+.subckt or4_x1 i0=$abc$109383$new_n48709_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n48710_
+.subckt and4_x1 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[18] q=$abc$109383$new_n48711_
 .subckt nor4_x0 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n28576_ nq=$abc$109383$new_n48712_
 .subckt nor2_x0 i0=$abc$109383$new_n48712_ i1=$abc$109383$new_n48711_ nq=$abc$109383$new_n48713_
 .subckt nand3_x0 i0=$abc$109383$new_n48713_ i1=$abc$109383$new_n48710_ i2=$abc$109383$new_n48705_ nq=$abc$109383$new_n48714_
-.subckt o3_x2 i0=$abc$109383$new_n48714_ i1=$abc$109383$new_n48704_ i2=$abc$109383$new_n48475_ q=$abc$109383$new_n48715_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n48715_ i2=$abc$109383$new_n48472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103270
+.subckt or3_x1 i0=$abc$109383$new_n48714_ i1=$abc$109383$new_n48704_ i2=$abc$109383$new_n48475_ q=$abc$109383$new_n48715_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n48715_ i2=$abc$109383$new_n48472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103270
 .subckt nand3_x0 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27561_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n48717_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n48718_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[19] nq=$abc$109383$new_n48719_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n28584_ q=$abc$109383$new_n48720_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n28584_ q=$abc$109383$new_n48720_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n48721_
 .subckt nor2_x0 i0=$abc$109383$new_n19692_ i1=$abc$109383$new_n48721_ nq=$abc$109383$new_n48722_
 .subckt nand4_x0 i0=$abc$109383$new_n48722_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n48723_
-.subckt a3_x2 i0=$abc$109383$new_n48723_ i1=$abc$109383$new_n48720_ i2=$abc$109383$new_n48719_ q=$abc$109383$new_n48724_
+.subckt and3_x1 i0=$abc$109383$new_n48723_ i1=$abc$109383$new_n48720_ i2=$abc$109383$new_n48719_ q=$abc$109383$new_n48724_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n48725_
-.subckt a4_x2 i0=$abc$109383$new_n48725_ i1=$abc$109383$new_n48724_ i2=$abc$109383$new_n48718_ i3=$abc$109383$new_n48717_ q=$abc$109383$new_n48726_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[98][19] i1=soc.ram.ram[102][19] q=$abc$109383$new_n48727_
-.subckt oa22_x2 i0=$abc$109383$new_n44599_ i1=$abc$109383$new_n48727_ i2=$abc$109383$new_n43912_ q=$abc$109383$new_n48728_
-.subckt ao22_x2 i0=soc.ram.ram[99][19] i1=$abc$109383$new_n43958_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n48729_
+.subckt and4_x1 i0=$abc$109383$new_n48725_ i1=$abc$109383$new_n48724_ i2=$abc$109383$new_n48718_ i3=$abc$109383$new_n48717_ q=$abc$109383$new_n48726_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[98][19] i1=soc.ram.ram[102][19] q=$abc$109383$new_n48727_
+.subckt or21nand_x1 i0=$abc$109383$new_n44599_ i1=$abc$109383$new_n48727_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n48728_
+.subckt and21nor_x1 i0=soc.ram.ram[99][19] i1=$abc$109383$new_n43958_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n48729_
 .subckt inv_x0 i=soc.ram.ram[103][19] nq=$abc$109383$new_n48730_
 .subckt nand2_x0 i0=$abc$109383$new_n48730_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n48731_
-.subckt oa22_x2 i0=$abc$109383$new_n48731_ i1=$abc$109383$new_n48729_ i2=$abc$109383$new_n48728_ q=$abc$109383$new_n48732_
-.subckt mx2_x2 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[96][19] i1=soc.ram.ram[100][19] q=$abc$109383$new_n48733_
+.subckt or21nand_x1 i0=$abc$109383$new_n48731_ i1=$abc$109383$new_n48729_ i2=$abc$109383$new_n48728_ nq=$abc$109383$new_n48732_
+.subckt mux2_x1 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[96][19] i1=soc.ram.ram[100][19] q=$abc$109383$new_n48733_
 .subckt nand2_x0 i0=$abc$109383$new_n48733_ i1=$abc$109383$new_n45053_ nq=$abc$109383$new_n48734_
 .subckt inv_x0 i=soc.ram.ram[101][19] nq=$abc$109383$new_n48735_
 .subckt nand2_x0 i0=$abc$109383$new_n48735_ i1=$abc$109383$new_n44306_ nq=$abc$109383$new_n48736_
-.subckt ao22_x2 i0=soc.ram.ram[97][19] i1=$abc$109383$new_n44066_ i2=$abc$109383$new_n44142_ q=$abc$109383$new_n48737_
+.subckt and21nor_x1 i0=soc.ram.ram[97][19] i1=$abc$109383$new_n44066_ i2=$abc$109383$new_n44142_ nq=$abc$109383$new_n48737_
 .subckt nand2_x0 i0=$abc$109383$new_n48737_ i1=$abc$109383$new_n48736_ nq=$abc$109383$new_n48738_
 .subckt nand3_x0 i0=$abc$109383$new_n48738_ i1=$abc$109383$new_n48734_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n48739_
 .subckt nand3_x0 i0=$abc$109383$new_n48739_ i1=$abc$109383$new_n48732_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n48740_
-.subckt mx2_x2 cmd=$abc$109383$new_n43908_ i0=soc.ram.ram[104][19] i1=soc.ram.ram[108][19] q=$abc$109383$new_n48741_
+.subckt mux2_x1 cmd=$abc$109383$new_n43908_ i0=soc.ram.ram[104][19] i1=soc.ram.ram[108][19] q=$abc$109383$new_n48741_
 .subckt nand2_x0 i0=$abc$109383$new_n48741_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n48742_
 .subckt inv_x0 i=soc.ram.ram[109][19] nq=$abc$109383$new_n48743_
 .subckt nand2_x0 i0=$abc$109383$new_n48743_ i1=$abc$109383$new_n43958_ nq=$abc$109383$new_n48744_
-.subckt ao22_x2 i0=soc.ram.ram[105][19] i1=$abc$109383$new_n44022_ i2=$abc$109383$new_n44946_ q=$abc$109383$new_n48745_
+.subckt and21nor_x1 i0=soc.ram.ram[105][19] i1=$abc$109383$new_n44022_ i2=$abc$109383$new_n44946_ nq=$abc$109383$new_n48745_
 .subckt nand2_x0 i0=$abc$109383$new_n48745_ i1=$abc$109383$new_n48744_ nq=$abc$109383$new_n48746_
-.subckt a3_x2 i0=$abc$109383$new_n48746_ i1=$abc$109383$new_n48742_ i2=$abc$109383$new_n47411_ q=$abc$109383$new_n48747_
+.subckt and3_x1 i0=$abc$109383$new_n48746_ i1=$abc$109383$new_n48742_ i2=$abc$109383$new_n47411_ q=$abc$109383$new_n48747_
 .subckt inv_x0 i=soc.ram.ram[111][19] nq=$abc$109383$new_n48748_
 .subckt nand2_x0 i0=$abc$109383$new_n48748_ i1=$abc$109383$new_n43967_ nq=$abc$109383$new_n48749_
-.subckt ao22_x2 i0=soc.ram.ram[107][19] i1=$abc$109383$new_n43908_ i2=$abc$109383$new_n44590_ q=$abc$109383$new_n48750_
+.subckt and21nor_x1 i0=soc.ram.ram[107][19] i1=$abc$109383$new_n43908_ i2=$abc$109383$new_n44590_ nq=$abc$109383$new_n48750_
 .subckt nand2_x0 i0=$abc$109383$new_n48750_ i1=$abc$109383$new_n48749_ nq=$abc$109383$new_n48751_
-.subckt mx2_x2 cmd=$abc$109383$new_n45478_ i0=soc.ram.ram[106][19] i1=soc.ram.ram[110][19] q=$abc$109383$new_n48752_
+.subckt mux2_x1 cmd=$abc$109383$new_n45478_ i0=soc.ram.ram[106][19] i1=soc.ram.ram[110][19] q=$abc$109383$new_n48752_
 .subckt nand2_x0 i0=$abc$109383$new_n48752_ i1=$abc$109383$new_n43943_ nq=$abc$109383$new_n48753_
-.subckt a2_x2 i0=$abc$109383$new_n48753_ i1=$abc$109383$new_n43935_ q=$abc$109383$new_n48754_
-.subckt oa22_x2 i0=$abc$109383$new_n48754_ i1=$abc$109383$new_n48751_ i2=$abc$109383$new_n44951_ q=$abc$109383$new_n48755_
-.subckt ao22_x2 i0=$abc$109383$new_n48755_ i1=$abc$109383$new_n48747_ i2=$abc$109383$new_n44585_ q=$abc$109383$new_n48756_
+.subckt and2_x1 i0=$abc$109383$new_n48753_ i1=$abc$109383$new_n43935_ q=$abc$109383$new_n48754_
+.subckt or21nand_x1 i0=$abc$109383$new_n48754_ i1=$abc$109383$new_n48751_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n48755_
+.subckt and21nor_x1 i0=$abc$109383$new_n48755_ i1=$abc$109383$new_n48747_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n48756_
 .subckt nand2_x0 i0=$abc$109383$new_n48756_ i1=$abc$109383$new_n48740_ nq=$abc$109383$new_n48757_
-.subckt mx2_x2 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[114][19] i1=soc.ram.ram[118][19] q=$abc$109383$new_n48758_
-.subckt oa22_x2 i0=$abc$109383$new_n44618_ i1=$abc$109383$new_n48758_ i2=$abc$109383$new_n43912_ q=$abc$109383$new_n48759_
-.subckt ao22_x2 i0=soc.ram.ram[115][19] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n48760_
+.subckt mux2_x1 cmd=$abc$109383$new_n43692_ i0=soc.ram.ram[114][19] i1=soc.ram.ram[118][19] q=$abc$109383$new_n48758_
+.subckt or21nand_x1 i0=$abc$109383$new_n44618_ i1=$abc$109383$new_n48758_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n48759_
+.subckt and21nor_x1 i0=soc.ram.ram[115][19] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n48760_
 .subckt inv_x0 i=soc.ram.ram[119][19] nq=$abc$109383$new_n48761_
 .subckt nand2_x0 i0=$abc$109383$new_n48761_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n48762_
-.subckt oa22_x2 i0=$abc$109383$new_n48762_ i1=$abc$109383$new_n48760_ i2=$abc$109383$new_n48759_ q=$abc$109383$new_n48763_
-.subckt mx2_x2 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[112][19] i1=soc.ram.ram[116][19] q=$abc$109383$new_n48764_
-.subckt oa22_x2 i0=$abc$109383$new_n44618_ i1=$abc$109383$new_n48764_ i2=$abc$109383$new_n44959_ q=$abc$109383$new_n48765_
-.subckt ao22_x2 i0=soc.ram.ram[113][19] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n48766_
+.subckt or21nand_x1 i0=$abc$109383$new_n48762_ i1=$abc$109383$new_n48760_ i2=$abc$109383$new_n48759_ nq=$abc$109383$new_n48763_
+.subckt mux2_x1 cmd=$abc$109383$new_n43558_ i0=soc.ram.ram[112][19] i1=soc.ram.ram[116][19] q=$abc$109383$new_n48764_
+.subckt or21nand_x1 i0=$abc$109383$new_n44618_ i1=$abc$109383$new_n48764_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n48765_
+.subckt and21nor_x1 i0=soc.ram.ram[113][19] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n48766_
 .subckt inv_x0 i=soc.ram.ram[117][19] nq=$abc$109383$new_n48767_
 .subckt nand2_x0 i0=$abc$109383$new_n48767_ i1=$abc$109383$new_n43958_ nq=$abc$109383$new_n48768_
-.subckt oa22_x2 i0=$abc$109383$new_n48768_ i1=$abc$109383$new_n48766_ i2=$abc$109383$new_n48765_ q=$abc$109383$new_n48769_
+.subckt or21nand_x1 i0=$abc$109383$new_n48768_ i1=$abc$109383$new_n48766_ i2=$abc$109383$new_n48765_ nq=$abc$109383$new_n48769_
 .subckt nand3_x0 i0=$abc$109383$new_n48769_ i1=$abc$109383$new_n48763_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n48770_
-.subckt mx2_x2 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[122][19] i1=soc.ram.ram[126][19] q=$abc$109383$new_n48771_
+.subckt mux2_x1 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[122][19] i1=soc.ram.ram[126][19] q=$abc$109383$new_n48771_
 .subckt nand2_x0 i0=$abc$109383$new_n48771_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n48772_
 .subckt nor2_x0 i0=soc.ram.ram[123][19] i1=$abc$109383$new_n43955_ nq=$abc$109383$new_n48773_
 .subckt inv_x0 i=soc.ram.ram[127][19] nq=$abc$109383$new_n48774_
-.subckt oa22_x2 i0=$abc$109383$new_n48774_ i1=$abc$109383$new_n44600_ i2=$abc$109383$new_n45402_ q=$abc$109383$new_n48775_
-.subckt ao22_x2 i0=$abc$109383$new_n48775_ i1=$abc$109383$new_n48773_ i2=$abc$109383$new_n48772_ q=$abc$109383$new_n48776_
-.subckt a2_x2 i0=$abc$109383$new_n48776_ i1=$abc$109383$new_n43844_ q=$abc$109383$new_n48777_
+.subckt or21nand_x1 i0=$abc$109383$new_n48774_ i1=$abc$109383$new_n44600_ i2=$abc$109383$new_n45402_ nq=$abc$109383$new_n48775_
+.subckt and21nor_x1 i0=$abc$109383$new_n48775_ i1=$abc$109383$new_n48773_ i2=$abc$109383$new_n48772_ nq=$abc$109383$new_n48776_
+.subckt and2_x1 i0=$abc$109383$new_n48776_ i1=$abc$109383$new_n43844_ q=$abc$109383$new_n48777_
 .subckt inv_x0 i=soc.ram.ram[125][19] nq=$abc$109383$new_n48778_
 .subckt nand2_x0 i0=$abc$109383$new_n48778_ i1=$abc$109383$new_n43967_ nq=$abc$109383$new_n48779_
-.subckt ao22_x2 i0=soc.ram.ram[121][19] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44590_ q=$abc$109383$new_n48780_
+.subckt and21nor_x1 i0=soc.ram.ram[121][19] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44590_ nq=$abc$109383$new_n48780_
 .subckt nand2_x0 i0=$abc$109383$new_n48780_ i1=$abc$109383$new_n48779_ nq=$abc$109383$new_n48781_
-.subckt mx2_x2 cmd=$abc$109383$new_n43907_ i0=soc.ram.ram[120][19] i1=soc.ram.ram[124][19] q=$abc$109383$new_n48782_
+.subckt mux2_x1 cmd=$abc$109383$new_n43907_ i0=soc.ram.ram[120][19] i1=soc.ram.ram[124][19] q=$abc$109383$new_n48782_
 .subckt nand2_x0 i0=$abc$109383$new_n48782_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n48783_
-.subckt a2_x2 i0=$abc$109383$new_n48783_ i1=$abc$109383$new_n44494_ q=$abc$109383$new_n48784_
-.subckt oa22_x2 i0=$abc$109383$new_n48784_ i1=$abc$109383$new_n48781_ i2=$abc$109383$new_n44087_ q=$abc$109383$new_n48785_
-.subckt ao22_x2 i0=$abc$109383$new_n48785_ i1=$abc$109383$new_n48777_ i2=$abc$109383$new_n43841_ q=$abc$109383$new_n48786_
+.subckt and2_x1 i0=$abc$109383$new_n48783_ i1=$abc$109383$new_n44494_ q=$abc$109383$new_n48784_
+.subckt or21nand_x1 i0=$abc$109383$new_n48784_ i1=$abc$109383$new_n48781_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n48785_
+.subckt and21nor_x1 i0=$abc$109383$new_n48785_ i1=$abc$109383$new_n48777_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n48786_
 .subckt nand2_x0 i0=$abc$109383$new_n48786_ i1=$abc$109383$new_n48770_ nq=$abc$109383$new_n48787_
 .subckt nand3_x0 i0=$abc$109383$new_n48787_ i1=$abc$109383$new_n48757_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n48788_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[90][19] i1=soc.ram.ram[94][19] q=$abc$109383$new_n48789_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[90][19] i1=soc.ram.ram[94][19] q=$abc$109383$new_n48789_
 .subckt nand2_x0 i0=$abc$109383$new_n48789_ i1=$abc$109383$new_n43941_ nq=$abc$109383$new_n48790_
 .subckt nor2_x0 i0=soc.ram.ram[91][19] i1=$abc$109383$new_n44808_ nq=$abc$109383$new_n48791_
 .subckt inv_x0 i=soc.ram.ram[95][19] nq=$abc$109383$new_n48792_
-.subckt oa22_x2 i0=$abc$109383$new_n48792_ i1=$abc$109383$new_n44025_ i2=$abc$109383$new_n43434_ q=$abc$109383$new_n48793_
-.subckt ao22_x2 i0=$abc$109383$new_n48793_ i1=$abc$109383$new_n48791_ i2=$abc$109383$new_n48790_ q=$abc$109383$new_n48794_
+.subckt or21nand_x1 i0=$abc$109383$new_n48792_ i1=$abc$109383$new_n44025_ i2=$abc$109383$new_n43434_ nq=$abc$109383$new_n48793_
+.subckt and21nor_x1 i0=$abc$109383$new_n48793_ i1=$abc$109383$new_n48791_ i2=$abc$109383$new_n48790_ nq=$abc$109383$new_n48794_
 .subckt nand2_x0 i0=$abc$109383$new_n48794_ i1=$abc$109383$new_n43842_ nq=$abc$109383$new_n48795_
-.subckt ao22_x2 i0=soc.ram.ram[89][19] i1=$abc$109383$new_n43396_ i2=$abc$109383$new_n43394_ q=$abc$109383$new_n48796_
-.subckt ao22_x2 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[93][19] i2=$abc$109383$new_n48796_ q=$abc$109383$new_n48797_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[88][19] i1=soc.ram.ram[92][19] q=$abc$109383$new_n48798_
-.subckt oa22_x2 i0=$abc$109383$new_n43384_ i1=$abc$109383$new_n48798_ i2=$abc$109383$new_n43564_ q=$abc$109383$new_n48799_
-.subckt ao22_x2 i0=$abc$109383$new_n48799_ i1=$abc$109383$new_n48797_ i2=$abc$109383$new_n44228_ q=$abc$109383$new_n48800_
-.subckt a2_x2 i0=$abc$109383$new_n48800_ i1=$abc$109383$new_n48795_ q=$abc$109383$new_n48801_
+.subckt and21nor_x1 i0=soc.ram.ram[89][19] i1=$abc$109383$new_n43396_ i2=$abc$109383$new_n43394_ nq=$abc$109383$new_n48796_
+.subckt and21nor_x1 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[93][19] i2=$abc$109383$new_n48796_ nq=$abc$109383$new_n48797_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[88][19] i1=soc.ram.ram[92][19] q=$abc$109383$new_n48798_
+.subckt or21nand_x1 i0=$abc$109383$new_n43384_ i1=$abc$109383$new_n48798_ i2=$abc$109383$new_n43564_ nq=$abc$109383$new_n48799_
+.subckt and21nor_x1 i0=$abc$109383$new_n48799_ i1=$abc$109383$new_n48797_ i2=$abc$109383$new_n44228_ nq=$abc$109383$new_n48800_
+.subckt and2_x1 i0=$abc$109383$new_n48800_ i1=$abc$109383$new_n48795_ q=$abc$109383$new_n48801_
 .subckt inv_x0 i=soc.ram.ram[85][19] nq=$abc$109383$new_n48802_
 .subckt nand2_x0 i0=$abc$109383$new_n48802_ i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n48803_
-.subckt ao22_x2 i0=soc.ram.ram[81][19] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n45093_ q=$abc$109383$new_n48804_
+.subckt and21nor_x1 i0=soc.ram.ram[81][19] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n45093_ nq=$abc$109383$new_n48804_
 .subckt nand2_x0 i0=$abc$109383$new_n48804_ i1=$abc$109383$new_n48803_ nq=$abc$109383$new_n48805_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[80][19] i1=soc.ram.ram[84][19] q=$abc$109383$new_n48806_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[80][19] i1=soc.ram.ram[84][19] q=$abc$109383$new_n48806_
 .subckt nand2_x0 i0=$abc$109383$new_n48806_ i1=$abc$109383$new_n43680_ nq=$abc$109383$new_n48807_
 .subckt nand3_x0 i0=$abc$109383$new_n48807_ i1=$abc$109383$new_n48805_ i2=$abc$109383$new_n44381_ nq=$abc$109383$new_n48808_
-.subckt mx2_x2 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[82][19] i1=soc.ram.ram[86][19] q=$abc$109383$new_n48809_
-.subckt a2_x2 i0=$abc$109383$new_n48809_ i1=$abc$109383$new_n43334_ q=$abc$109383$new_n48810_
-.subckt ao22_x2 i0=soc.ram.ram[83][19] i1=$abc$109383$new_n43474_ i2=$abc$109383$new_n43360_ q=$abc$109383$new_n48811_
-.subckt ao22_x2 i0=$abc$109383$new_n43364_ i1=soc.ram.ram[87][19] i2=$abc$109383$new_n48811_ q=$abc$109383$new_n48812_
-.subckt o2_x2 i0=$abc$109383$new_n48812_ i1=$abc$109383$new_n43723_ q=$abc$109383$new_n48813_
-.subckt ao22_x2 i0=$abc$109383$new_n48813_ i1=$abc$109383$new_n48810_ i2=$abc$109383$new_n44240_ q=$abc$109383$new_n48814_
-.subckt oa22_x2 i0=$abc$109383$new_n48814_ i1=$abc$109383$new_n48808_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n48815_
-.subckt o2_x2 i0=$abc$109383$new_n48815_ i1=$abc$109383$new_n48801_ q=$abc$109383$new_n48816_
-.subckt mx2_x2 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[76][19] i1=soc.ram.ram[77][19] q=$abc$109383$new_n48817_
-.subckt mx2_x2 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[72][19] i1=soc.ram.ram[73][19] q=$abc$109383$new_n48818_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=$abc$109383$new_n48818_ i1=$abc$109383$new_n48817_ q=$abc$109383$new_n48819_
-.subckt o2_x2 i0=$abc$109383$new_n48819_ i1=$abc$109383$new_n43948_ q=$abc$109383$new_n48820_
-.subckt mx2_x2 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[78][19] i1=soc.ram.ram[79][19] q=$abc$109383$new_n48821_
-.subckt mx2_x2 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[74][19] i1=soc.ram.ram[75][19] q=$abc$109383$new_n48822_
-.subckt mx2_x2 cmd=$abc$109383$new_n43887_ i0=$abc$109383$new_n48822_ i1=$abc$109383$new_n48821_ q=$abc$109383$new_n48823_
-.subckt ao22_x2 i0=$abc$109383$new_n43730_ i1=$abc$109383$new_n48823_ i2=$abc$109383$new_n43649_ q=$abc$109383$new_n48824_
+.subckt mux2_x1 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[82][19] i1=soc.ram.ram[86][19] q=$abc$109383$new_n48809_
+.subckt and2_x1 i0=$abc$109383$new_n48809_ i1=$abc$109383$new_n43334_ q=$abc$109383$new_n48810_
+.subckt and21nor_x1 i0=soc.ram.ram[83][19] i1=$abc$109383$new_n43474_ i2=$abc$109383$new_n43360_ nq=$abc$109383$new_n48811_
+.subckt and21nor_x1 i0=$abc$109383$new_n43364_ i1=soc.ram.ram[87][19] i2=$abc$109383$new_n48811_ nq=$abc$109383$new_n48812_
+.subckt or2_x1 i0=$abc$109383$new_n48812_ i1=$abc$109383$new_n43723_ q=$abc$109383$new_n48813_
+.subckt and21nor_x1 i0=$abc$109383$new_n48813_ i1=$abc$109383$new_n48810_ i2=$abc$109383$new_n44240_ nq=$abc$109383$new_n48814_
+.subckt or21nand_x1 i0=$abc$109383$new_n48814_ i1=$abc$109383$new_n48808_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n48815_
+.subckt or2_x1 i0=$abc$109383$new_n48815_ i1=$abc$109383$new_n48801_ q=$abc$109383$new_n48816_
+.subckt mux2_x1 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[76][19] i1=soc.ram.ram[77][19] q=$abc$109383$new_n48817_
+.subckt mux2_x1 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[72][19] i1=soc.ram.ram[73][19] q=$abc$109383$new_n48818_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=$abc$109383$new_n48818_ i1=$abc$109383$new_n48817_ q=$abc$109383$new_n48819_
+.subckt or2_x1 i0=$abc$109383$new_n48819_ i1=$abc$109383$new_n43948_ q=$abc$109383$new_n48820_
+.subckt mux2_x1 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[78][19] i1=soc.ram.ram[79][19] q=$abc$109383$new_n48821_
+.subckt mux2_x1 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[74][19] i1=soc.ram.ram[75][19] q=$abc$109383$new_n48822_
+.subckt mux2_x1 cmd=$abc$109383$new_n43887_ i0=$abc$109383$new_n48822_ i1=$abc$109383$new_n48821_ q=$abc$109383$new_n48823_
+.subckt and21nor_x1 i0=$abc$109383$new_n43730_ i1=$abc$109383$new_n48823_ i2=$abc$109383$new_n43649_ nq=$abc$109383$new_n48824_
 .subckt nand2_x0 i0=$abc$109383$new_n48824_ i1=$abc$109383$new_n48820_ nq=$abc$109383$new_n48825_
 .subckt inv_x0 i=soc.ram.ram[71][19] nq=$abc$109383$new_n48826_
 .subckt nand2_x0 i0=$abc$109383$new_n48826_ i1=$abc$109383$new_n44936_ nq=$abc$109383$new_n48827_
-.subckt ao22_x2 i0=soc.ram.ram[67][19] i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n48828_
+.subckt and21nor_x1 i0=soc.ram.ram[67][19] i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n48828_
 .subckt nand2_x0 i0=$abc$109383$new_n48828_ i1=$abc$109383$new_n48827_ nq=$abc$109383$new_n48829_
-.subckt mx2_x2 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[66][19] i1=soc.ram.ram[70][19] q=$abc$109383$new_n48830_
+.subckt mux2_x1 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[66][19] i1=soc.ram.ram[70][19] q=$abc$109383$new_n48830_
 .subckt nand2_x0 i0=$abc$109383$new_n48830_ i1=$abc$109383$new_n44150_ nq=$abc$109383$new_n48831_
-.subckt a2_x2 i0=$abc$109383$new_n48831_ i1=$abc$109383$new_n43507_ q=$abc$109383$new_n48832_
+.subckt and2_x1 i0=$abc$109383$new_n48831_ i1=$abc$109383$new_n43507_ q=$abc$109383$new_n48832_
 .subckt nand2_x0 i0=$abc$109383$new_n48832_ i1=$abc$109383$new_n48829_ nq=$abc$109383$new_n48833_
-.subckt ao22_x2 i0=soc.ram.ram[65][19] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n43690_ q=$abc$109383$new_n48834_
-.subckt ao22_x2 i0=$abc$109383$new_n44042_ i1=soc.ram.ram[69][19] i2=$abc$109383$new_n48834_ q=$abc$109383$new_n48835_
-.subckt mx2_x2 cmd=$abc$109383$new_n43742_ i0=soc.ram.ram[64][19] i1=soc.ram.ram[68][19] q=$abc$109383$new_n48836_
-.subckt oa22_x2 i0=$abc$109383$new_n43616_ i1=$abc$109383$new_n48836_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n48837_
-.subckt ao22_x2 i0=$abc$109383$new_n48837_ i1=$abc$109383$new_n48835_ i2=$abc$109383$new_n44692_ q=$abc$109383$new_n48838_
+.subckt and21nor_x1 i0=soc.ram.ram[65][19] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n43690_ nq=$abc$109383$new_n48834_
+.subckt and21nor_x1 i0=$abc$109383$new_n44042_ i1=soc.ram.ram[69][19] i2=$abc$109383$new_n48834_ nq=$abc$109383$new_n48835_
+.subckt mux2_x1 cmd=$abc$109383$new_n43742_ i0=soc.ram.ram[64][19] i1=soc.ram.ram[68][19] q=$abc$109383$new_n48836_
+.subckt or21nand_x1 i0=$abc$109383$new_n43616_ i1=$abc$109383$new_n48836_ i2=$abc$109383$new_n43506_ nq=$abc$109383$new_n48837_
+.subckt and21nor_x1 i0=$abc$109383$new_n48837_ i1=$abc$109383$new_n48835_ i2=$abc$109383$new_n44692_ nq=$abc$109383$new_n48838_
 .subckt nand2_x0 i0=$abc$109383$new_n48838_ i1=$abc$109383$new_n48833_ nq=$abc$109383$new_n48839_
 .subckt nand3_x0 i0=$abc$109383$new_n48839_ i1=$abc$109383$new_n48825_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n48840_
 .subckt nand3_x0 i0=$abc$109383$new_n48840_ i1=$abc$109383$new_n48816_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n48841_
 .subckt nand3_x0 i0=$abc$109383$new_n48841_ i1=$abc$109383$new_n48788_ i2=$abc$109383$new_n44040_ nq=$abc$109383$new_n48842_
-.subckt mx2_x2 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[48][19] i1=soc.ram.ram[52][19] q=$abc$109383$new_n48843_
+.subckt mux2_x1 cmd=$abc$109383$new_n43338_ i0=soc.ram.ram[48][19] i1=soc.ram.ram[52][19] q=$abc$109383$new_n48843_
 .subckt nand2_x0 i0=$abc$109383$new_n48843_ i1=$abc$109383$new_n43335_ nq=$abc$109383$new_n48844_
 .subckt inv_x0 i=soc.ram.ram[53][19] nq=$abc$109383$new_n48845_
 .subckt nand2_x0 i0=$abc$109383$new_n48845_ i1=$abc$109383$new_n44500_ nq=$abc$109383$new_n48846_
-.subckt ao22_x2 i0=soc.ram.ram[49][19] i1=$abc$109383$new_n44181_ i2=$abc$109383$new_n43699_ q=$abc$109383$new_n48847_
+.subckt and21nor_x1 i0=soc.ram.ram[49][19] i1=$abc$109383$new_n44181_ i2=$abc$109383$new_n43699_ nq=$abc$109383$new_n48847_
 .subckt nand2_x0 i0=$abc$109383$new_n48847_ i1=$abc$109383$new_n48846_ nq=$abc$109383$new_n48848_
-.subckt a3_x2 i0=$abc$109383$new_n48848_ i1=$abc$109383$new_n48844_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n48849_
-.subckt mx2_x2 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[50][19] i1=soc.ram.ram[54][19] q=$abc$109383$new_n48850_
-.subckt a2_x2 i0=$abc$109383$new_n48850_ i1=$abc$109383$new_n43707_ q=$abc$109383$new_n48851_
-.subckt ao22_x2 i0=soc.ram.ram[51][19] i1=$abc$109383$new_n43425_ i2=$abc$109383$new_n43481_ q=$abc$109383$new_n48852_
-.subckt ao22_x2 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[55][19] i2=$abc$109383$new_n48852_ q=$abc$109383$new_n48853_
+.subckt and3_x1 i0=$abc$109383$new_n48848_ i1=$abc$109383$new_n48844_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n48849_
+.subckt mux2_x1 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[50][19] i1=soc.ram.ram[54][19] q=$abc$109383$new_n48850_
+.subckt and2_x1 i0=$abc$109383$new_n48850_ i1=$abc$109383$new_n43707_ q=$abc$109383$new_n48851_
+.subckt and21nor_x1 i0=soc.ram.ram[51][19] i1=$abc$109383$new_n43425_ i2=$abc$109383$new_n43481_ nq=$abc$109383$new_n48852_
+.subckt and21nor_x1 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[55][19] i2=$abc$109383$new_n48852_ nq=$abc$109383$new_n48853_
 .subckt nor3_x0 i0=$abc$109383$new_n48853_ i1=$abc$109383$new_n48851_ i2=$abc$109383$new_n44381_ nq=$abc$109383$new_n48854_
-.subckt ao22_x2 i0=$abc$109383$new_n48854_ i1=$abc$109383$new_n48849_ i2=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n48855_
-.subckt o2_x2 i0=soc.ram.ram[19][19] i1=$abc$109383$new_n43599_ q=$abc$109383$new_n48856_
-.subckt ao22_x2 i0=soc.ram.ram[23][19] i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n43871_ q=$abc$109383$new_n48857_
+.subckt and21nor_x1 i0=$abc$109383$new_n48854_ i1=$abc$109383$new_n48849_ i2=$\soc.ram.ram$rdreg[0]$q[5] nq=$abc$109383$new_n48855_
+.subckt or2_x1 i0=soc.ram.ram[19][19] i1=$abc$109383$new_n43599_ q=$abc$109383$new_n48856_
+.subckt and21nor_x1 i0=soc.ram.ram[23][19] i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n43871_ nq=$abc$109383$new_n48857_
 .subckt nand2_x0 i0=$abc$109383$new_n48857_ i1=$abc$109383$new_n48856_ nq=$abc$109383$new_n48858_
 .subckt nor2_x0 i0=soc.ram.ram[18][19] i1=$abc$109383$new_n44555_ nq=$abc$109383$new_n48859_
 .subckt inv_x0 i=soc.ram.ram[22][19] nq=$abc$109383$new_n48860_
-.subckt oa22_x2 i0=$abc$109383$new_n48860_ i1=$abc$109383$new_n43441_ i2=$abc$109383$new_n43698_ q=$abc$109383$new_n48861_
-.subckt ao22_x2 i0=$abc$109383$new_n48861_ i1=$abc$109383$new_n48859_ i2=$abc$109383$new_n43439_ q=$abc$109383$new_n48862_
-.subckt a2_x2 i0=$abc$109383$new_n48862_ i1=$abc$109383$new_n48858_ q=$abc$109383$new_n48863_
+.subckt or21nand_x1 i0=$abc$109383$new_n48860_ i1=$abc$109383$new_n43441_ i2=$abc$109383$new_n43698_ nq=$abc$109383$new_n48861_
+.subckt and21nor_x1 i0=$abc$109383$new_n48861_ i1=$abc$109383$new_n48859_ i2=$abc$109383$new_n43439_ nq=$abc$109383$new_n48862_
+.subckt and2_x1 i0=$abc$109383$new_n48862_ i1=$abc$109383$new_n48858_ q=$abc$109383$new_n48863_
 .subckt inv_x0 i=soc.ram.ram[21][19] nq=$abc$109383$new_n48864_
 .subckt nand2_x0 i0=$abc$109383$new_n48864_ i1=$abc$109383$new_n44215_ nq=$abc$109383$new_n48865_
-.subckt ao22_x2 i0=soc.ram.ram[17][19] i1=$abc$109383$new_n43368_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n48866_
+.subckt and21nor_x1 i0=soc.ram.ram[17][19] i1=$abc$109383$new_n43368_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n48866_
 .subckt nand2_x0 i0=$abc$109383$new_n48866_ i1=$abc$109383$new_n48865_ nq=$abc$109383$new_n48867_
-.subckt mx2_x2 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[16][19] i1=soc.ram.ram[20][19] q=$abc$109383$new_n48868_
+.subckt mux2_x1 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[16][19] i1=soc.ram.ram[20][19] q=$abc$109383$new_n48868_
 .subckt nand2_x0 i0=$abc$109383$new_n48868_ i1=$abc$109383$new_n43488_ nq=$abc$109383$new_n48869_
-.subckt a2_x2 i0=$abc$109383$new_n48869_ i1=$abc$109383$new_n44080_ q=$abc$109383$new_n48870_
-.subckt a2_x2 i0=$abc$109383$new_n48870_ i1=$abc$109383$new_n48867_ q=$abc$109383$new_n48871_
-.subckt ao22_x2 i0=$abc$109383$new_n48871_ i1=$abc$109383$new_n48863_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n48872_
-.subckt ao22_x2 i0=$abc$109383$new_n48872_ i1=$abc$109383$new_n48855_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n48873_
-.subckt mx2_x2 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[4][19] i1=soc.ram.ram[5][19] q=$abc$109383$new_n48874_
-.subckt mx2_x2 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[0][19] i1=soc.ram.ram[1][19] q=$abc$109383$new_n48875_
-.subckt mx2_x2 cmd=$abc$109383$new_n43654_ i0=$abc$109383$new_n48875_ i1=$abc$109383$new_n48874_ q=$abc$109383$new_n48876_
+.subckt and2_x1 i0=$abc$109383$new_n48869_ i1=$abc$109383$new_n44080_ q=$abc$109383$new_n48870_
+.subckt and2_x1 i0=$abc$109383$new_n48870_ i1=$abc$109383$new_n48867_ q=$abc$109383$new_n48871_
+.subckt and21nor_x1 i0=$abc$109383$new_n48871_ i1=$abc$109383$new_n48863_ i2=$abc$109383$new_n43780_ nq=$abc$109383$new_n48872_
+.subckt and21nor_x1 i0=$abc$109383$new_n48872_ i1=$abc$109383$new_n48855_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n48873_
+.subckt mux2_x1 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[4][19] i1=soc.ram.ram[5][19] q=$abc$109383$new_n48874_
+.subckt mux2_x1 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[0][19] i1=soc.ram.ram[1][19] q=$abc$109383$new_n48875_
+.subckt mux2_x1 cmd=$abc$109383$new_n43654_ i0=$abc$109383$new_n48875_ i1=$abc$109383$new_n48874_ q=$abc$109383$new_n48876_
 .subckt nor2_x0 i0=$abc$109383$new_n48876_ i1=$abc$109383$new_n43650_ nq=$abc$109383$new_n48877_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[6][19] i1=soc.ram.ram[7][19] q=$abc$109383$new_n48878_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[2][19] i1=soc.ram.ram[3][19] q=$abc$109383$new_n48879_
-.subckt mx2_x2 cmd=$abc$109383$new_n43660_ i0=$abc$109383$new_n48879_ i1=$abc$109383$new_n48878_ q=$abc$109383$new_n48880_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[6][19] i1=soc.ram.ram[7][19] q=$abc$109383$new_n48878_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[2][19] i1=soc.ram.ram[3][19] q=$abc$109383$new_n48879_
+.subckt mux2_x1 cmd=$abc$109383$new_n43660_ i0=$abc$109383$new_n48879_ i1=$abc$109383$new_n48878_ q=$abc$109383$new_n48880_
 .subckt nor2_x0 i0=$abc$109383$new_n48880_ i1=$abc$109383$new_n43544_ nq=$abc$109383$new_n48881_
-.subckt ao22_x2 i0=$abc$109383$new_n48881_ i1=$abc$109383$new_n48877_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n48882_
-.subckt mx2_x2 cmd=$abc$109383$new_n43438_ i0=soc.ram.ram[36][19] i1=soc.ram.ram[38][19] q=$abc$109383$new_n48883_
-.subckt mx2_x2 cmd=$abc$109383$new_n43438_ i0=soc.ram.ram[32][19] i1=soc.ram.ram[34][19] q=$abc$109383$new_n48884_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=$abc$109383$new_n48884_ i1=$abc$109383$new_n48883_ q=$abc$109383$new_n48885_
-.subckt a2_x2 i0=$abc$109383$new_n48885_ i1=$abc$109383$new_n44150_ q=$abc$109383$new_n48886_
-.subckt mx2_x2 cmd=$abc$109383$new_n43401_ i0=soc.ram.ram[37][19] i1=soc.ram.ram[39][19] q=$abc$109383$new_n48887_
-.subckt mx2_x2 cmd=$abc$109383$new_n43401_ i0=soc.ram.ram[33][19] i1=soc.ram.ram[35][19] q=$abc$109383$new_n48888_
-.subckt mx2_x2 cmd=$abc$109383$new_n43490_ i0=$abc$109383$new_n48888_ i1=$abc$109383$new_n48887_ q=$abc$109383$new_n48889_
-.subckt oa22_x2 i0=$abc$109383$new_n43416_ i1=$abc$109383$new_n48889_ i2=$abc$109383$new_n43779_ q=$abc$109383$new_n48890_
+.subckt and21nor_x1 i0=$abc$109383$new_n48881_ i1=$abc$109383$new_n48877_ i2=$abc$109383$new_n43780_ nq=$abc$109383$new_n48882_
+.subckt mux2_x1 cmd=$abc$109383$new_n43438_ i0=soc.ram.ram[36][19] i1=soc.ram.ram[38][19] q=$abc$109383$new_n48883_
+.subckt mux2_x1 cmd=$abc$109383$new_n43438_ i0=soc.ram.ram[32][19] i1=soc.ram.ram[34][19] q=$abc$109383$new_n48884_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=$abc$109383$new_n48884_ i1=$abc$109383$new_n48883_ q=$abc$109383$new_n48885_
+.subckt and2_x1 i0=$abc$109383$new_n48885_ i1=$abc$109383$new_n44150_ q=$abc$109383$new_n48886_
+.subckt mux2_x1 cmd=$abc$109383$new_n43401_ i0=soc.ram.ram[37][19] i1=soc.ram.ram[39][19] q=$abc$109383$new_n48887_
+.subckt mux2_x1 cmd=$abc$109383$new_n43401_ i0=soc.ram.ram[33][19] i1=soc.ram.ram[35][19] q=$abc$109383$new_n48888_
+.subckt mux2_x1 cmd=$abc$109383$new_n43490_ i0=$abc$109383$new_n48888_ i1=$abc$109383$new_n48887_ q=$abc$109383$new_n48889_
+.subckt or21nand_x1 i0=$abc$109383$new_n43416_ i1=$abc$109383$new_n48889_ i2=$abc$109383$new_n43779_ nq=$abc$109383$new_n48890_
 .subckt nor2_x0 i0=$abc$109383$new_n48890_ i1=$abc$109383$new_n48886_ nq=$abc$109383$new_n48891_
-.subckt ao22_x2 i0=$abc$109383$new_n48891_ i1=$abc$109383$new_n48882_ i2=$abc$109383$new_n43326_ q=$abc$109383$new_n48892_
+.subckt and21nor_x1 i0=$abc$109383$new_n48891_ i1=$abc$109383$new_n48882_ i2=$abc$109383$new_n43326_ nq=$abc$109383$new_n48892_
 .subckt nor3_x0 i0=$abc$109383$new_n48892_ i1=$abc$109383$new_n48873_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n48893_
-.subckt mx2_x2 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[42][19] i1=soc.ram.ram[46][19] q=$abc$109383$new_n48894_
-.subckt a2_x2 i0=$abc$109383$new_n48894_ i1=$abc$109383$new_n44919_ q=$abc$109383$new_n48895_
-.subckt ao22_x2 i0=soc.ram.ram[43][19] i1=$abc$109383$new_n44808_ i2=$abc$109383$new_n44064_ q=$abc$109383$new_n48896_
-.subckt ao22_x2 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[47][19] i2=$abc$109383$new_n48896_ q=$abc$109383$new_n48897_
-.subckt o2_x2 i0=$abc$109383$new_n48897_ i1=$abc$109383$new_n43911_ q=$abc$109383$new_n48898_
-.subckt o2_x2 i0=$abc$109383$new_n48898_ i1=$abc$109383$new_n48895_ q=$abc$109383$new_n48899_
-.subckt mx2_x2 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[40][19] i1=soc.ram.ram[44][19] q=$abc$109383$new_n48900_
+.subckt mux2_x1 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[42][19] i1=soc.ram.ram[46][19] q=$abc$109383$new_n48894_
+.subckt and2_x1 i0=$abc$109383$new_n48894_ i1=$abc$109383$new_n44919_ q=$abc$109383$new_n48895_
+.subckt and21nor_x1 i0=soc.ram.ram[43][19] i1=$abc$109383$new_n44808_ i2=$abc$109383$new_n44064_ nq=$abc$109383$new_n48896_
+.subckt and21nor_x1 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[47][19] i2=$abc$109383$new_n48896_ nq=$abc$109383$new_n48897_
+.subckt or2_x1 i0=$abc$109383$new_n48897_ i1=$abc$109383$new_n43911_ q=$abc$109383$new_n48898_
+.subckt or2_x1 i0=$abc$109383$new_n48898_ i1=$abc$109383$new_n48895_ q=$abc$109383$new_n48899_
+.subckt mux2_x1 cmd=$abc$109383$new_n44418_ i0=soc.ram.ram[40][19] i1=soc.ram.ram[44][19] q=$abc$109383$new_n48900_
 .subckt nand2_x0 i0=$abc$109383$new_n48900_ i1=$abc$109383$new_n43428_ nq=$abc$109383$new_n48901_
 .subckt inv_x0 i=soc.ram.ram[45][19] nq=$abc$109383$new_n48902_
 .subckt nand2_x0 i0=$abc$109383$new_n48902_ i1=$abc$109383$new_n44202_ nq=$abc$109383$new_n48903_
-.subckt ao22_x2 i0=soc.ram.ram[41][19] i1=$abc$109383$new_n43527_ i2=$abc$109383$new_n43481_ q=$abc$109383$new_n48904_
+.subckt and21nor_x1 i0=soc.ram.ram[41][19] i1=$abc$109383$new_n43527_ i2=$abc$109383$new_n43481_ nq=$abc$109383$new_n48904_
 .subckt nand2_x0 i0=$abc$109383$new_n48904_ i1=$abc$109383$new_n48903_ nq=$abc$109383$new_n48905_
 .subckt nand3_x0 i0=$abc$109383$new_n48905_ i1=$abc$109383$new_n48901_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n48906_
 .subckt nand3_x0 i0=$abc$109383$new_n48906_ i1=$abc$109383$new_n48899_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n48907_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[58][19] i1=soc.ram.ram[62][19] q=$abc$109383$new_n48908_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[58][19] i1=soc.ram.ram[62][19] q=$abc$109383$new_n48908_
 .subckt nand2_x0 i0=$abc$109383$new_n48908_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n48909_
 .subckt nor2_x0 i0=soc.ram.ram[59][19] i1=$abc$109383$new_n44139_ nq=$abc$109383$new_n48910_
 .subckt inv_x0 i=soc.ram.ram[63][19] nq=$abc$109383$new_n48911_
-.subckt oa22_x2 i0=$abc$109383$new_n48911_ i1=$abc$109383$new_n43514_ i2=$abc$109383$new_n43335_ q=$abc$109383$new_n48912_
-.subckt ao22_x2 i0=$abc$109383$new_n48912_ i1=$abc$109383$new_n48910_ i2=$abc$109383$new_n48909_ q=$abc$109383$new_n48913_
-.subckt a2_x2 i0=$abc$109383$new_n48913_ i1=$abc$109383$new_n43843_ q=$abc$109383$new_n48914_
+.subckt or21nand_x1 i0=$abc$109383$new_n48911_ i1=$abc$109383$new_n43514_ i2=$abc$109383$new_n43335_ nq=$abc$109383$new_n48912_
+.subckt and21nor_x1 i0=$abc$109383$new_n48912_ i1=$abc$109383$new_n48910_ i2=$abc$109383$new_n48909_ nq=$abc$109383$new_n48913_
+.subckt and2_x1 i0=$abc$109383$new_n48913_ i1=$abc$109383$new_n43843_ q=$abc$109383$new_n48914_
 .subckt inv_x0 i=soc.ram.ram[61][19] nq=$abc$109383$new_n48915_
 .subckt nand2_x0 i0=$abc$109383$new_n48915_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n48916_
-.subckt ao22_x2 i0=soc.ram.ram[57][19] i1=$abc$109383$new_n45207_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n48917_
+.subckt and21nor_x1 i0=soc.ram.ram[57][19] i1=$abc$109383$new_n45207_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n48917_
 .subckt nand2_x0 i0=$abc$109383$new_n48917_ i1=$abc$109383$new_n48916_ nq=$abc$109383$new_n48918_
-.subckt mx2_x2 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[56][19] i1=soc.ram.ram[60][19] q=$abc$109383$new_n48919_
+.subckt mux2_x1 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[56][19] i1=soc.ram.ram[60][19] q=$abc$109383$new_n48919_
 .subckt nand2_x0 i0=$abc$109383$new_n48919_ i1=$abc$109383$new_n44837_ nq=$abc$109383$new_n48920_
-.subckt a2_x2 i0=$abc$109383$new_n48920_ i1=$abc$109383$new_n43473_ q=$abc$109383$new_n48921_
-.subckt oa22_x2 i0=$abc$109383$new_n48921_ i1=$abc$109383$new_n48918_ i2=$abc$109383$new_n44114_ q=$abc$109383$new_n48922_
-.subckt ao22_x2 i0=$abc$109383$new_n48922_ i1=$abc$109383$new_n48914_ i2=$abc$109383$new_n43865_ q=$abc$109383$new_n48923_
-.subckt a2_x2 i0=$abc$109383$new_n48923_ i1=$abc$109383$new_n48907_ q=$abc$109383$new_n48924_
-.subckt mx2_x2 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[8][19] i1=soc.ram.ram[12][19] q=$abc$109383$new_n48925_
-.subckt oa22_x2 i0=$abc$109383$new_n44008_ i1=$abc$109383$new_n48925_ i2=$abc$109383$new_n46154_ q=$abc$109383$new_n48926_
-.subckt ao22_x2 i0=soc.ram.ram[9][19] i1=$abc$109383$new_n43342_ i2=$abc$109383$new_n45042_ q=$abc$109383$new_n48927_
+.subckt and2_x1 i0=$abc$109383$new_n48920_ i1=$abc$109383$new_n43473_ q=$abc$109383$new_n48921_
+.subckt or21nand_x1 i0=$abc$109383$new_n48921_ i1=$abc$109383$new_n48918_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n48922_
+.subckt and21nor_x1 i0=$abc$109383$new_n48922_ i1=$abc$109383$new_n48914_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n48923_
+.subckt and2_x1 i0=$abc$109383$new_n48923_ i1=$abc$109383$new_n48907_ q=$abc$109383$new_n48924_
+.subckt mux2_x1 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[8][19] i1=soc.ram.ram[12][19] q=$abc$109383$new_n48925_
+.subckt or21nand_x1 i0=$abc$109383$new_n44008_ i1=$abc$109383$new_n48925_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n48926_
+.subckt and21nor_x1 i0=soc.ram.ram[9][19] i1=$abc$109383$new_n43342_ i2=$abc$109383$new_n45042_ nq=$abc$109383$new_n48927_
 .subckt inv_x0 i=soc.ram.ram[13][19] nq=$abc$109383$new_n48928_
 .subckt nand2_x0 i0=$abc$109383$new_n48928_ i1=$abc$109383$new_n44424_ nq=$abc$109383$new_n48929_
-.subckt oa22_x2 i0=$abc$109383$new_n48929_ i1=$abc$109383$new_n48927_ i2=$abc$109383$new_n48926_ q=$abc$109383$new_n48930_
-.subckt mx2_x2 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[10][19] i1=soc.ram.ram[14][19] q=$abc$109383$new_n48931_
+.subckt or21nand_x1 i0=$abc$109383$new_n48929_ i1=$abc$109383$new_n48927_ i2=$abc$109383$new_n48926_ nq=$abc$109383$new_n48930_
+.subckt mux2_x1 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[10][19] i1=soc.ram.ram[14][19] q=$abc$109383$new_n48931_
 .subckt nand2_x0 i0=$abc$109383$new_n48931_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n48932_
 .subckt nor2_x0 i0=soc.ram.ram[11][19] i1=$abc$109383$new_n43826_ nq=$abc$109383$new_n48933_
 .subckt inv_x0 i=soc.ram.ram[15][19] nq=$abc$109383$new_n48934_
-.subckt oa22_x2 i0=$abc$109383$new_n48934_ i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n43489_ q=$abc$109383$new_n48935_
-.subckt ao22_x2 i0=$abc$109383$new_n48935_ i1=$abc$109383$new_n48933_ i2=$abc$109383$new_n44622_ q=$abc$109383$new_n48936_
+.subckt or21nand_x1 i0=$abc$109383$new_n48934_ i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n43489_ nq=$abc$109383$new_n48935_
+.subckt and21nor_x1 i0=$abc$109383$new_n48935_ i1=$abc$109383$new_n48933_ i2=$abc$109383$new_n44622_ nq=$abc$109383$new_n48936_
 .subckt nand2_x0 i0=$abc$109383$new_n48936_ i1=$abc$109383$new_n48932_ nq=$abc$109383$new_n48937_
 .subckt nand3_x0 i0=$abc$109383$new_n48937_ i1=$abc$109383$new_n48930_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n48938_
-.subckt mx2_x2 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[26][19] i1=soc.ram.ram[30][19] q=$abc$109383$new_n48939_
+.subckt mux2_x1 cmd=$abc$109383$new_n44508_ i0=soc.ram.ram[26][19] i1=soc.ram.ram[30][19] q=$abc$109383$new_n48939_
 .subckt nand2_x0 i0=$abc$109383$new_n48939_ i1=$abc$109383$new_n43883_ nq=$abc$109383$new_n48940_
 .subckt nor2_x0 i0=soc.ram.ram[27][19] i1=$abc$109383$new_n45445_ nq=$abc$109383$new_n48941_
 .subckt inv_x0 i=soc.ram.ram[31][19] nq=$abc$109383$new_n48942_
-.subckt oa22_x2 i0=$abc$109383$new_n48942_ i1=$abc$109383$new_n44838_ i2=$abc$109383$new_n44121_ q=$abc$109383$new_n48943_
-.subckt ao22_x2 i0=$abc$109383$new_n48943_ i1=$abc$109383$new_n48941_ i2=$abc$109383$new_n44774_ q=$abc$109383$new_n48944_
-.subckt a2_x2 i0=$abc$109383$new_n48944_ i1=$abc$109383$new_n48940_ q=$abc$109383$new_n48945_
+.subckt or21nand_x1 i0=$abc$109383$new_n48942_ i1=$abc$109383$new_n44838_ i2=$abc$109383$new_n44121_ nq=$abc$109383$new_n48943_
+.subckt and21nor_x1 i0=$abc$109383$new_n48943_ i1=$abc$109383$new_n48941_ i2=$abc$109383$new_n44774_ nq=$abc$109383$new_n48944_
+.subckt and2_x1 i0=$abc$109383$new_n48944_ i1=$abc$109383$new_n48940_ q=$abc$109383$new_n48945_
 .subckt inv_x0 i=soc.ram.ram[29][19] nq=$abc$109383$new_n48946_
 .subckt nand2_x0 i0=$abc$109383$new_n48946_ i1=$abc$109383$new_n43802_ nq=$abc$109383$new_n48947_
-.subckt ao22_x2 i0=soc.ram.ram[25][19] i1=$abc$109383$new_n43938_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n48948_
+.subckt and21nor_x1 i0=soc.ram.ram[25][19] i1=$abc$109383$new_n43938_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n48948_
 .subckt nand2_x0 i0=$abc$109383$new_n48948_ i1=$abc$109383$new_n48947_ nq=$abc$109383$new_n48949_
-.subckt mx2_x2 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[24][19] i1=soc.ram.ram[28][19] q=$abc$109383$new_n48950_
+.subckt mux2_x1 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[24][19] i1=soc.ram.ram[28][19] q=$abc$109383$new_n48950_
 .subckt nand2_x0 i0=$abc$109383$new_n48950_ i1=$abc$109383$new_n43335_ nq=$abc$109383$new_n48951_
-.subckt a2_x2 i0=$abc$109383$new_n48951_ i1=$abc$109383$new_n44061_ q=$abc$109383$new_n48952_
-.subckt oa22_x2 i0=$abc$109383$new_n48952_ i1=$abc$109383$new_n48949_ i2=$abc$109383$new_n43920_ q=$abc$109383$new_n48953_
-.subckt ao22_x2 i0=$abc$109383$new_n48953_ i1=$abc$109383$new_n48945_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n48954_
-.subckt oa22_x2 i0=$abc$109383$new_n48954_ i1=$abc$109383$new_n48938_ i2=$abc$109383$new_n44655_ q=$abc$109383$new_n48955_
+.subckt and2_x1 i0=$abc$109383$new_n48951_ i1=$abc$109383$new_n44061_ q=$abc$109383$new_n48952_
+.subckt or21nand_x1 i0=$abc$109383$new_n48952_ i1=$abc$109383$new_n48949_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n48953_
+.subckt and21nor_x1 i0=$abc$109383$new_n48953_ i1=$abc$109383$new_n48945_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n48954_
+.subckt or21nand_x1 i0=$abc$109383$new_n48954_ i1=$abc$109383$new_n48938_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n48955_
 .subckt nor2_x0 i0=$abc$109383$new_n48955_ i1=$abc$109383$new_n48924_ nq=$abc$109383$new_n48956_
-.subckt o3_x2 i0=$abc$109383$new_n48956_ i1=$abc$109383$new_n48893_ i2=$abc$109383$new_n44040_ q=$abc$109383$new_n48957_
+.subckt or3_x1 i0=$abc$109383$new_n48956_ i1=$abc$109383$new_n48893_ i2=$abc$109383$new_n44040_ q=$abc$109383$new_n48957_
 .subckt nand3_x0 i0=$abc$109383$new_n48957_ i1=$abc$109383$new_n48842_ i2=$abc$109383$new_n43778_ nq=$abc$109383$new_n48958_
 .subckt nand3_x0 i0=$abc$109383$new_n48958_ i1=$abc$109383$new_n48726_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n48959_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n48960_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[19] q=$abc$109383$new_n48961_
-.subckt a2_x2 i0=$abc$109383$new_n48961_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n48962_
-.subckt a2_x2 i0=$abc$109383$new_n48962_ i1=$abc$109383$new_n48959_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103274
-.subckt mx2_x2 cmd=$abc$109383$new_n44613_ i0=soc.ram.ram[42][20] i1=soc.ram.ram[46][20] q=$abc$109383$new_n48964_
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[19] nq=$abc$109383$new_n48961_
+.subckt and2_x1 i0=$abc$109383$new_n48961_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n48962_
+.subckt and2_x1 i0=$abc$109383$new_n48962_ i1=$abc$109383$new_n48959_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103274
+.subckt mux2_x1 cmd=$abc$109383$new_n44613_ i0=soc.ram.ram[42][20] i1=soc.ram.ram[46][20] q=$abc$109383$new_n48964_
 .subckt nand2_x0 i0=$abc$109383$new_n48964_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n48965_
 .subckt inv_x0 i=soc.ram.ram[47][20] nq=$abc$109383$new_n48966_
 .subckt nand2_x0 i0=$abc$109383$new_n48966_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n48967_
-.subckt ao22_x2 i0=soc.ram.ram[43][20] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ q=$abc$109383$new_n48968_
+.subckt and21nor_x1 i0=soc.ram.ram[43][20] i1=$abc$109383$new_n43986_ i2=$abc$109383$new_n44591_ nq=$abc$109383$new_n48968_
 .subckt nand2_x0 i0=$abc$109383$new_n48968_ i1=$abc$109383$new_n48967_ nq=$abc$109383$new_n48969_
 .subckt nand3_x0 i0=$abc$109383$new_n48969_ i1=$abc$109383$new_n48965_ i2=$abc$109383$new_n43950_ nq=$abc$109383$new_n48970_
-.subckt ao22_x2 i0=soc.ram.ram[41][20] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n48971_
-.subckt ao22_x2 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[45][20] i2=$abc$109383$new_n48971_ q=$abc$109383$new_n48972_
-.subckt mx2_x2 cmd=$abc$109383$new_n43954_ i0=soc.ram.ram[40][20] i1=soc.ram.ram[44][20] q=$abc$109383$new_n48973_
-.subckt oa22_x2 i0=$abc$109383$new_n44892_ i1=$abc$109383$new_n48973_ i2=$abc$109383$new_n43949_ q=$abc$109383$new_n48974_
-.subckt ao22_x2 i0=$abc$109383$new_n48974_ i1=$abc$109383$new_n48972_ i2=$abc$109383$new_n44640_ q=$abc$109383$new_n48975_
+.subckt and21nor_x1 i0=soc.ram.ram[41][20] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n48971_
+.subckt and21nor_x1 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[45][20] i2=$abc$109383$new_n48971_ nq=$abc$109383$new_n48972_
+.subckt mux2_x1 cmd=$abc$109383$new_n43954_ i0=soc.ram.ram[40][20] i1=soc.ram.ram[44][20] q=$abc$109383$new_n48973_
+.subckt or21nand_x1 i0=$abc$109383$new_n44892_ i1=$abc$109383$new_n48973_ i2=$abc$109383$new_n43949_ nq=$abc$109383$new_n48974_
+.subckt and21nor_x1 i0=$abc$109383$new_n48974_ i1=$abc$109383$new_n48972_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n48975_
 .subckt nand2_x0 i0=$abc$109383$new_n48975_ i1=$abc$109383$new_n48970_ nq=$abc$109383$new_n48976_
-.subckt mx2_x2 cmd=$abc$109383$new_n44587_ i0=soc.ram.ram[34][20] i1=soc.ram.ram[38][20] q=$abc$109383$new_n48977_
+.subckt mux2_x1 cmd=$abc$109383$new_n44587_ i0=soc.ram.ram[34][20] i1=soc.ram.ram[38][20] q=$abc$109383$new_n48977_
 .subckt nand2_x0 i0=$abc$109383$new_n48977_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n48978_
-.subckt o2_x2 i0=soc.ram.ram[35][20] i1=$abc$109383$new_n43830_ q=$abc$109383$new_n48979_
+.subckt or2_x1 i0=soc.ram.ram[35][20] i1=$abc$109383$new_n43830_ q=$abc$109383$new_n48979_
 .subckt nand2_x0 i0=$abc$109383$new_n48979_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n48980_
 .subckt inv_x0 i=soc.ram.ram[39][20] nq=$abc$109383$new_n48981_
-.subckt a2_x2 i0=$abc$109383$new_n48981_ i1=$abc$109383$new_n44022_ q=$abc$109383$new_n48982_
-.subckt ao22_x2 i0=$abc$109383$new_n48982_ i1=$abc$109383$new_n48980_ i2=$abc$109383$new_n48978_ q=$abc$109383$new_n48983_
+.subckt and2_x1 i0=$abc$109383$new_n48981_ i1=$abc$109383$new_n44022_ q=$abc$109383$new_n48982_
+.subckt and21nor_x1 i0=$abc$109383$new_n48982_ i1=$abc$109383$new_n48980_ i2=$abc$109383$new_n48978_ nq=$abc$109383$new_n48983_
 .subckt nand2_x0 i0=$abc$109383$new_n48983_ i1=$abc$109383$new_n43950_ nq=$abc$109383$new_n48984_
-.subckt mx2_x2 cmd=$abc$109383$new_n43955_ i0=soc.ram.ram[32][20] i1=soc.ram.ram[36][20] q=$abc$109383$new_n48985_
+.subckt mux2_x1 cmd=$abc$109383$new_n43955_ i0=soc.ram.ram[32][20] i1=soc.ram.ram[36][20] q=$abc$109383$new_n48985_
 .subckt nand2_x0 i0=$abc$109383$new_n48985_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n48986_
 .subckt inv_x0 i=soc.ram.ram[37][20] nq=$abc$109383$new_n48987_
 .subckt nand2_x0 i0=$abc$109383$new_n48987_ i1=$abc$109383$new_n43958_ nq=$abc$109383$new_n48988_
-.subckt ao22_x2 i0=soc.ram.ram[33][20] i1=$abc$109383$new_n44666_ i2=$abc$109383$new_n43964_ q=$abc$109383$new_n48989_
+.subckt and21nor_x1 i0=soc.ram.ram[33][20] i1=$abc$109383$new_n44666_ i2=$abc$109383$new_n43964_ nq=$abc$109383$new_n48989_
 .subckt nand2_x0 i0=$abc$109383$new_n48989_ i1=$abc$109383$new_n48988_ nq=$abc$109383$new_n48990_
 .subckt nand3_x0 i0=$abc$109383$new_n48990_ i1=$abc$109383$new_n48986_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n48991_
 .subckt nand3_x0 i0=$abc$109383$new_n48991_ i1=$abc$109383$new_n48984_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n48992_
 .subckt nand3_x0 i0=$abc$109383$new_n48992_ i1=$abc$109383$new_n48976_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n48993_
-.subckt mx2_x2 cmd=$abc$109383$new_n44666_ i0=soc.ram.ram[56][20] i1=soc.ram.ram[60][20] q=$abc$109383$new_n48994_
+.subckt mux2_x1 cmd=$abc$109383$new_n44666_ i0=soc.ram.ram[56][20] i1=soc.ram.ram[60][20] q=$abc$109383$new_n48994_
 .subckt nand2_x0 i0=$abc$109383$new_n48994_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n48995_
 .subckt inv_x0 i=soc.ram.ram[61][20] nq=$abc$109383$new_n48996_
 .subckt nand2_x0 i0=$abc$109383$new_n48996_ i1=$abc$109383$new_n47405_ nq=$abc$109383$new_n48997_
-.subckt ao22_x2 i0=soc.ram.ram[57][20] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n44603_ q=$abc$109383$new_n48998_
+.subckt and21nor_x1 i0=soc.ram.ram[57][20] i1=$abc$109383$new_n43967_ i2=$abc$109383$new_n44603_ nq=$abc$109383$new_n48998_
 .subckt nand2_x0 i0=$abc$109383$new_n48998_ i1=$abc$109383$new_n48997_ nq=$abc$109383$new_n48999_
 .subckt nand3_x0 i0=$abc$109383$new_n48999_ i1=$abc$109383$new_n48995_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n49000_
-.subckt ao22_x2 i0=soc.ram.ram[59][20] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ q=$abc$109383$new_n49001_
-.subckt ao22_x2 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[63][20] i2=$abc$109383$new_n49001_ q=$abc$109383$new_n49002_
-.subckt mx2_x2 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[58][20] i1=soc.ram.ram[62][20] q=$abc$109383$new_n49003_
-.subckt oa22_x2 i0=$abc$109383$new_n43943_ i1=$abc$109383$new_n49003_ i2=$abc$109383$new_n45520_ q=$abc$109383$new_n49004_
-.subckt ao22_x2 i0=$abc$109383$new_n49004_ i1=$abc$109383$new_n49002_ i2=$abc$109383$new_n44640_ q=$abc$109383$new_n49005_
+.subckt and21nor_x1 i0=soc.ram.ram[59][20] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ nq=$abc$109383$new_n49001_
+.subckt and21nor_x1 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[63][20] i2=$abc$109383$new_n49001_ nq=$abc$109383$new_n49002_
+.subckt mux2_x1 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[58][20] i1=soc.ram.ram[62][20] q=$abc$109383$new_n49003_
+.subckt or21nand_x1 i0=$abc$109383$new_n43943_ i1=$abc$109383$new_n49003_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n49004_
+.subckt and21nor_x1 i0=$abc$109383$new_n49004_ i1=$abc$109383$new_n49002_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n49005_
 .subckt nand2_x0 i0=$abc$109383$new_n49005_ i1=$abc$109383$new_n49000_ nq=$abc$109383$new_n49006_
-.subckt mx2_x2 cmd=$abc$109383$new_n43927_ i0=soc.ram.ram[50][20] i1=soc.ram.ram[54][20] q=$abc$109383$new_n49007_
+.subckt mux2_x1 cmd=$abc$109383$new_n43927_ i0=soc.ram.ram[50][20] i1=soc.ram.ram[54][20] q=$abc$109383$new_n49007_
 .subckt nand2_x0 i0=$abc$109383$new_n49007_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n49008_
-.subckt o2_x2 i0=soc.ram.ram[51][20] i1=$abc$109383$new_n44927_ q=$abc$109383$new_n49009_
+.subckt or2_x1 i0=soc.ram.ram[51][20] i1=$abc$109383$new_n44927_ q=$abc$109383$new_n49009_
 .subckt nand2_x0 i0=$abc$109383$new_n49009_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n49010_
 .subckt inv_x0 i=soc.ram.ram[55][20] nq=$abc$109383$new_n49011_
-.subckt a2_x2 i0=$abc$109383$new_n49011_ i1=$abc$109383$new_n43955_ q=$abc$109383$new_n49012_
-.subckt ao22_x2 i0=$abc$109383$new_n49012_ i1=$abc$109383$new_n49010_ i2=$abc$109383$new_n49008_ q=$abc$109383$new_n49013_
+.subckt and2_x1 i0=$abc$109383$new_n49011_ i1=$abc$109383$new_n43955_ q=$abc$109383$new_n49012_
+.subckt and21nor_x1 i0=$abc$109383$new_n49012_ i1=$abc$109383$new_n49010_ i2=$abc$109383$new_n49008_ nq=$abc$109383$new_n49013_
 .subckt nand2_x0 i0=$abc$109383$new_n49013_ i1=$abc$109383$new_n43950_ nq=$abc$109383$new_n49014_
-.subckt ao22_x2 i0=soc.ram.ram[49][20] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n49015_
-.subckt ao22_x2 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[53][20] i2=$abc$109383$new_n49015_ q=$abc$109383$new_n49016_
-.subckt mx2_x2 cmd=$abc$109383$new_n43978_ i0=soc.ram.ram[48][20] i1=soc.ram.ram[52][20] q=$abc$109383$new_n49017_
-.subckt oa22_x2 i0=$abc$109383$new_n43981_ i1=$abc$109383$new_n49017_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n49018_
-.subckt ao22_x2 i0=$abc$109383$new_n49018_ i1=$abc$109383$new_n49016_ i2=$abc$109383$new_n44612_ q=$abc$109383$new_n49019_
+.subckt and21nor_x1 i0=soc.ram.ram[49][20] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n49015_
+.subckt and21nor_x1 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[53][20] i2=$abc$109383$new_n49015_ nq=$abc$109383$new_n49016_
+.subckt mux2_x1 cmd=$abc$109383$new_n43978_ i0=soc.ram.ram[48][20] i1=soc.ram.ram[52][20] q=$abc$109383$new_n49017_
+.subckt or21nand_x1 i0=$abc$109383$new_n43981_ i1=$abc$109383$new_n49017_ i2=$abc$109383$new_n43843_ nq=$abc$109383$new_n49018_
+.subckt and21nor_x1 i0=$abc$109383$new_n49018_ i1=$abc$109383$new_n49016_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n49019_
 .subckt nand2_x0 i0=$abc$109383$new_n49019_ i1=$abc$109383$new_n49014_ nq=$abc$109383$new_n49020_
 .subckt nand3_x0 i0=$abc$109383$new_n49020_ i1=$abc$109383$new_n49006_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n49021_
 .subckt nand3_x0 i0=$abc$109383$new_n49021_ i1=$abc$109383$new_n48993_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n49022_
-.subckt mx2_x2 cmd=$abc$109383$new_n43829_ i0=soc.ram.ram[10][20] i1=soc.ram.ram[14][20] q=$abc$109383$new_n49023_
+.subckt mux2_x1 cmd=$abc$109383$new_n43829_ i0=soc.ram.ram[10][20] i1=soc.ram.ram[14][20] q=$abc$109383$new_n49023_
 .subckt nand2_x0 i0=$abc$109383$new_n49023_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n49024_
 .subckt inv_x0 i=soc.ram.ram[15][20] nq=$abc$109383$new_n49025_
 .subckt nand2_x0 i0=$abc$109383$new_n49025_ i1=$abc$109383$new_n43830_ nq=$abc$109383$new_n49026_
-.subckt ao22_x2 i0=soc.ram.ram[11][20] i1=$abc$109383$new_n44704_ i2=$abc$109383$new_n45405_ q=$abc$109383$new_n49027_
+.subckt and21nor_x1 i0=soc.ram.ram[11][20] i1=$abc$109383$new_n44704_ i2=$abc$109383$new_n45405_ nq=$abc$109383$new_n49027_
 .subckt nand2_x0 i0=$abc$109383$new_n49027_ i1=$abc$109383$new_n49026_ nq=$abc$109383$new_n49028_
 .subckt nand3_x0 i0=$abc$109383$new_n49028_ i1=$abc$109383$new_n49024_ i2=$abc$109383$new_n46527_ nq=$abc$109383$new_n49029_
-.subckt ao22_x2 i0=soc.ram.ram[9][20] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ q=$abc$109383$new_n49030_
-.subckt ao22_x2 i0=$abc$109383$new_n44043_ i1=soc.ram.ram[13][20] i2=$abc$109383$new_n49030_ q=$abc$109383$new_n49031_
-.subckt mx2_x2 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[8][20] i1=soc.ram.ram[12][20] q=$abc$109383$new_n49032_
-.subckt oa22_x2 i0=$abc$109383$new_n44150_ i1=$abc$109383$new_n49032_ i2=$abc$109383$new_n43507_ q=$abc$109383$new_n49033_
-.subckt ao22_x2 i0=$abc$109383$new_n49033_ i1=$abc$109383$new_n49031_ i2=$abc$109383$new_n45394_ q=$abc$109383$new_n49034_
-.subckt a2_x2 i0=$abc$109383$new_n49034_ i1=$abc$109383$new_n49029_ q=$abc$109383$new_n49035_
-.subckt mx2_x2 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[3][20] i1=soc.ram.ram[7][20] q=$abc$109383$new_n49036_
-.subckt mx2_x2 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[2][20] i1=soc.ram.ram[6][20] q=$abc$109383$new_n49037_
-.subckt mx2_x2 cmd=$abc$109383$new_n44064_ i0=$abc$109383$new_n49037_ i1=$abc$109383$new_n49036_ q=$abc$109383$new_n49038_
-.subckt mx2_x2 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[1][20] i1=soc.ram.ram[5][20] q=$abc$109383$new_n49039_
-.subckt mx2_x2 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[0][20] i1=soc.ram.ram[4][20] q=$abc$109383$new_n49040_
-.subckt mx2_x2 cmd=$abc$109383$new_n44064_ i0=$abc$109383$new_n49040_ i1=$abc$109383$new_n49039_ q=$abc$109383$new_n49041_
-.subckt mx2_x2 cmd=$abc$109383$new_n43934_ i0=$abc$109383$new_n49041_ i1=$abc$109383$new_n49038_ q=$abc$109383$new_n49042_
-.subckt oa22_x2 i0=$abc$109383$new_n43472_ i1=$abc$109383$new_n49042_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n49043_
-.subckt o2_x2 i0=$abc$109383$new_n49043_ i1=$abc$109383$new_n49035_ q=$abc$109383$new_n49044_
-.subckt mx2_x2 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[24][20] i1=soc.ram.ram[28][20] q=$abc$109383$new_n49045_
+.subckt and21nor_x1 i0=soc.ram.ram[9][20] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43962_ nq=$abc$109383$new_n49030_
+.subckt and21nor_x1 i0=$abc$109383$new_n44043_ i1=soc.ram.ram[13][20] i2=$abc$109383$new_n49030_ nq=$abc$109383$new_n49031_
+.subckt mux2_x1 cmd=$abc$109383$new_n43887_ i0=soc.ram.ram[8][20] i1=soc.ram.ram[12][20] q=$abc$109383$new_n49032_
+.subckt or21nand_x1 i0=$abc$109383$new_n44150_ i1=$abc$109383$new_n49032_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n49033_
+.subckt and21nor_x1 i0=$abc$109383$new_n49033_ i1=$abc$109383$new_n49031_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n49034_
+.subckt and2_x1 i0=$abc$109383$new_n49034_ i1=$abc$109383$new_n49029_ q=$abc$109383$new_n49035_
+.subckt mux2_x1 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[3][20] i1=soc.ram.ram[7][20] q=$abc$109383$new_n49036_
+.subckt mux2_x1 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[2][20] i1=soc.ram.ram[6][20] q=$abc$109383$new_n49037_
+.subckt mux2_x1 cmd=$abc$109383$new_n44064_ i0=$abc$109383$new_n49037_ i1=$abc$109383$new_n49036_ q=$abc$109383$new_n49038_
+.subckt mux2_x1 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[1][20] i1=soc.ram.ram[5][20] q=$abc$109383$new_n49039_
+.subckt mux2_x1 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[0][20] i1=soc.ram.ram[4][20] q=$abc$109383$new_n49040_
+.subckt mux2_x1 cmd=$abc$109383$new_n44064_ i0=$abc$109383$new_n49040_ i1=$abc$109383$new_n49039_ q=$abc$109383$new_n49041_
+.subckt mux2_x1 cmd=$abc$109383$new_n43934_ i0=$abc$109383$new_n49041_ i1=$abc$109383$new_n49038_ q=$abc$109383$new_n49042_
+.subckt or21nand_x1 i0=$abc$109383$new_n43472_ i1=$abc$109383$new_n49042_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n49043_
+.subckt or2_x1 i0=$abc$109383$new_n49043_ i1=$abc$109383$new_n49035_ q=$abc$109383$new_n49044_
+.subckt mux2_x1 cmd=$abc$109383$new_n43874_ i0=soc.ram.ram[24][20] i1=soc.ram.ram[28][20] q=$abc$109383$new_n49045_
 .subckt nand2_x0 i0=$abc$109383$new_n49045_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n49046_
 .subckt nor2_x0 i0=soc.ram.ram[25][20] i1=$abc$109383$new_n44501_ nq=$abc$109383$new_n49047_
 .subckt inv_x0 i=soc.ram.ram[29][20] nq=$abc$109383$new_n49048_
-.subckt oa22_x2 i0=$abc$109383$new_n49048_ i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n44562_ q=$abc$109383$new_n49049_
-.subckt ao22_x2 i0=$abc$109383$new_n49049_ i1=$abc$109383$new_n49047_ i2=$abc$109383$new_n49046_ q=$abc$109383$new_n49050_
+.subckt or21nand_x1 i0=$abc$109383$new_n49048_ i1=$abc$109383$new_n44817_ i2=$abc$109383$new_n44562_ nq=$abc$109383$new_n49049_
+.subckt and21nor_x1 i0=$abc$109383$new_n49049_ i1=$abc$109383$new_n49047_ i2=$abc$109383$new_n49046_ nq=$abc$109383$new_n49050_
 .subckt nand2_x0 i0=$abc$109383$new_n49050_ i1=$abc$109383$new_n44742_ nq=$abc$109383$new_n49051_
-.subckt mx2_x2 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[26][20] i1=soc.ram.ram[30][20] q=$abc$109383$new_n49052_
-.subckt a2_x2 i0=$abc$109383$new_n49052_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n49053_
-.subckt ao22_x2 i0=soc.ram.ram[31][20] i1=$abc$109383$new_n43930_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n49054_
-.subckt o2_x2 i0=soc.ram.ram[27][20] i1=$abc$109383$new_n43819_ q=$abc$109383$new_n49055_
-.subckt oa22_x2 i0=$abc$109383$new_n49055_ i1=$abc$109383$new_n49054_ i2=$abc$109383$new_n49053_ q=$abc$109383$new_n49056_
-.subckt ao22_x2 i0=$abc$109383$new_n43679_ i1=$abc$109383$new_n49056_ i2=$abc$109383$new_n44767_ q=$abc$109383$new_n49057_
-.subckt a2_x2 i0=$abc$109383$new_n49057_ i1=$abc$109383$new_n49051_ q=$abc$109383$new_n49058_
-.subckt ao22_x2 i0=soc.ram.ram[19][20] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n49059_
-.subckt ao22_x2 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[23][20] i2=$abc$109383$new_n49059_ q=$abc$109383$new_n49060_
-.subckt mx2_x2 cmd=$abc$109383$new_n43654_ i0=soc.ram.ram[18][20] i1=soc.ram.ram[22][20] q=$abc$109383$new_n49061_
-.subckt a2_x2 i0=$abc$109383$new_n49061_ i1=$abc$109383$new_n44485_ q=$abc$109383$new_n49062_
-.subckt o3_x2 i0=$abc$109383$new_n49062_ i1=$abc$109383$new_n49060_ i2=$abc$109383$new_n43990_ q=$abc$109383$new_n49063_
-.subckt ao22_x2 i0=soc.ram.ram[17][20] i1=$abc$109383$new_n44508_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n49064_
-.subckt ao22_x2 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[21][20] i2=$abc$109383$new_n49064_ q=$abc$109383$new_n49065_
-.subckt mx2_x2 cmd=$abc$109383$new_n45087_ i0=soc.ram.ram[16][20] i1=soc.ram.ram[20][20] q=$abc$109383$new_n49066_
-.subckt oa22_x2 i0=$abc$109383$new_n44485_ i1=$abc$109383$new_n49066_ i2=$abc$109383$new_n43665_ q=$abc$109383$new_n49067_
-.subckt ao22_x2 i0=$abc$109383$new_n49067_ i1=$abc$109383$new_n49065_ i2=$abc$109383$new_n45070_ q=$abc$109383$new_n49068_
-.subckt a2_x2 i0=$abc$109383$new_n49068_ i1=$abc$109383$new_n49063_ q=$abc$109383$new_n49069_
-.subckt o2_x2 i0=$abc$109383$new_n49069_ i1=$abc$109383$new_n49058_ q=$abc$109383$new_n49070_
-.subckt ao22_x2 i0=$abc$109383$new_n44585_ i1=$abc$109383$new_n49070_ i2=$abc$109383$new_n49044_ q=$abc$109383$new_n49071_
+.subckt mux2_x1 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[26][20] i1=soc.ram.ram[30][20] q=$abc$109383$new_n49052_
+.subckt and2_x1 i0=$abc$109383$new_n49052_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n49053_
+.subckt and21nor_x1 i0=soc.ram.ram[31][20] i1=$abc$109383$new_n43930_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n49054_
+.subckt or2_x1 i0=soc.ram.ram[27][20] i1=$abc$109383$new_n43819_ q=$abc$109383$new_n49055_
+.subckt or21nand_x1 i0=$abc$109383$new_n49055_ i1=$abc$109383$new_n49054_ i2=$abc$109383$new_n49053_ nq=$abc$109383$new_n49056_
+.subckt and21nor_x1 i0=$abc$109383$new_n43679_ i1=$abc$109383$new_n49056_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n49057_
+.subckt and2_x1 i0=$abc$109383$new_n49057_ i1=$abc$109383$new_n49051_ q=$abc$109383$new_n49058_
+.subckt and21nor_x1 i0=soc.ram.ram[19][20] i1=$abc$109383$new_n43906_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n49059_
+.subckt and21nor_x1 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[23][20] i2=$abc$109383$new_n49059_ nq=$abc$109383$new_n49060_
+.subckt mux2_x1 cmd=$abc$109383$new_n43654_ i0=soc.ram.ram[18][20] i1=soc.ram.ram[22][20] q=$abc$109383$new_n49061_
+.subckt and2_x1 i0=$abc$109383$new_n49061_ i1=$abc$109383$new_n44485_ q=$abc$109383$new_n49062_
+.subckt or3_x1 i0=$abc$109383$new_n49062_ i1=$abc$109383$new_n49060_ i2=$abc$109383$new_n43990_ q=$abc$109383$new_n49063_
+.subckt and21nor_x1 i0=soc.ram.ram[17][20] i1=$abc$109383$new_n44508_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n49064_
+.subckt and21nor_x1 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[21][20] i2=$abc$109383$new_n49064_ nq=$abc$109383$new_n49065_
+.subckt mux2_x1 cmd=$abc$109383$new_n45087_ i0=soc.ram.ram[16][20] i1=soc.ram.ram[20][20] q=$abc$109383$new_n49066_
+.subckt or21nand_x1 i0=$abc$109383$new_n44485_ i1=$abc$109383$new_n49066_ i2=$abc$109383$new_n43665_ nq=$abc$109383$new_n49067_
+.subckt and21nor_x1 i0=$abc$109383$new_n49067_ i1=$abc$109383$new_n49065_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n49068_
+.subckt and2_x1 i0=$abc$109383$new_n49068_ i1=$abc$109383$new_n49063_ q=$abc$109383$new_n49069_
+.subckt or2_x1 i0=$abc$109383$new_n49069_ i1=$abc$109383$new_n49058_ q=$abc$109383$new_n49070_
+.subckt and21nor_x1 i0=$abc$109383$new_n44585_ i1=$abc$109383$new_n49070_ i2=$abc$109383$new_n49044_ nq=$abc$109383$new_n49071_
 .subckt nand2_x0 i0=$abc$109383$new_n49071_ i1=$abc$109383$new_n43782_ nq=$abc$109383$new_n49072_
 .subckt nand3_x0 i0=$abc$109383$new_n49072_ i1=$abc$109383$new_n49022_ i2=$abc$109383$new_n43591_ nq=$abc$109383$new_n49073_
-.subckt o2_x2 i0=soc.ram.ram[83][20] i1=$abc$109383$new_n44809_ q=$abc$109383$new_n49074_
-.subckt ao22_x2 i0=soc.ram.ram[87][20] i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n46696_ q=$abc$109383$new_n49075_
+.subckt or2_x1 i0=soc.ram.ram[83][20] i1=$abc$109383$new_n44809_ q=$abc$109383$new_n49074_
+.subckt and21nor_x1 i0=soc.ram.ram[87][20] i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n46696_ nq=$abc$109383$new_n49075_
 .subckt nand2_x0 i0=$abc$109383$new_n49075_ i1=$abc$109383$new_n49074_ nq=$abc$109383$new_n49076_
 .subckt nor2_x0 i0=soc.ram.ram[82][20] i1=$abc$109383$new_n43860_ nq=$abc$109383$new_n49077_
 .subckt inv_x0 i=soc.ram.ram[86][20] nq=$abc$109383$new_n49078_
-.subckt oa22_x2 i0=$abc$109383$new_n49078_ i1=$abc$109383$new_n45059_ i2=$abc$109383$new_n44106_ q=$abc$109383$new_n49079_
-.subckt ao22_x2 i0=$abc$109383$new_n49079_ i1=$abc$109383$new_n49077_ i2=$abc$109383$new_n46154_ q=$abc$109383$new_n49080_
-.subckt a2_x2 i0=$abc$109383$new_n49080_ i1=$abc$109383$new_n49076_ q=$abc$109383$new_n49081_
+.subckt or21nand_x1 i0=$abc$109383$new_n49078_ i1=$abc$109383$new_n45059_ i2=$abc$109383$new_n44106_ nq=$abc$109383$new_n49079_
+.subckt and21nor_x1 i0=$abc$109383$new_n49079_ i1=$abc$109383$new_n49077_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n49080_
+.subckt and2_x1 i0=$abc$109383$new_n49080_ i1=$abc$109383$new_n49076_ q=$abc$109383$new_n49081_
 .subckt inv_x0 i=soc.ram.ram[85][20] nq=$abc$109383$new_n49082_
 .subckt nand2_x0 i0=$abc$109383$new_n49082_ i1=$abc$109383$new_n45452_ nq=$abc$109383$new_n49083_
-.subckt ao22_x2 i0=soc.ram.ram[81][20] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n43823_ q=$abc$109383$new_n49084_
+.subckt and21nor_x1 i0=soc.ram.ram[81][20] i1=$abc$109383$new_n43825_ i2=$abc$109383$new_n43823_ nq=$abc$109383$new_n49084_
 .subckt nand2_x0 i0=$abc$109383$new_n49084_ i1=$abc$109383$new_n49083_ nq=$abc$109383$new_n49085_
-.subckt mx2_x2 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[80][20] i1=soc.ram.ram[84][20] q=$abc$109383$new_n49086_
+.subckt mux2_x1 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[80][20] i1=soc.ram.ram[84][20] q=$abc$109383$new_n49086_
 .subckt nand2_x0 i0=$abc$109383$new_n49086_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n49087_
-.subckt a2_x2 i0=$abc$109383$new_n49087_ i1=$abc$109383$new_n44155_ q=$abc$109383$new_n49088_
-.subckt a2_x2 i0=$abc$109383$new_n49088_ i1=$abc$109383$new_n49085_ q=$abc$109383$new_n49089_
-.subckt ao22_x2 i0=$abc$109383$new_n49089_ i1=$abc$109383$new_n49081_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n49090_
-.subckt mx2_x2 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[64][20] i1=soc.ram.ram[68][20] q=$abc$109383$new_n49091_
+.subckt and2_x1 i0=$abc$109383$new_n49087_ i1=$abc$109383$new_n44155_ q=$abc$109383$new_n49088_
+.subckt and2_x1 i0=$abc$109383$new_n49088_ i1=$abc$109383$new_n49085_ q=$abc$109383$new_n49089_
+.subckt and21nor_x1 i0=$abc$109383$new_n49089_ i1=$abc$109383$new_n49081_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n49090_
+.subckt mux2_x1 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[64][20] i1=soc.ram.ram[68][20] q=$abc$109383$new_n49091_
 .subckt nand2_x0 i0=$abc$109383$new_n49091_ i1=$abc$109383$new_n43903_ nq=$abc$109383$new_n49092_
-.subckt o2_x2 i0=soc.ram.ram[65][20] i1=$abc$109383$new_n44859_ q=$abc$109383$new_n49093_
+.subckt or2_x1 i0=soc.ram.ram[65][20] i1=$abc$109383$new_n44859_ q=$abc$109383$new_n49093_
 .subckt nand2_x0 i0=$abc$109383$new_n49093_ i1=$abc$109383$new_n44505_ nq=$abc$109383$new_n49094_
 .subckt inv_x0 i=soc.ram.ram[69][20] nq=$abc$109383$new_n49095_
-.subckt a2_x2 i0=$abc$109383$new_n49095_ i1=$abc$109383$new_n44225_ q=$abc$109383$new_n49096_
-.subckt ao22_x2 i0=$abc$109383$new_n49096_ i1=$abc$109383$new_n49094_ i2=$abc$109383$new_n49092_ q=$abc$109383$new_n49097_
-.subckt a2_x2 i0=$abc$109383$new_n49097_ i1=$abc$109383$new_n43990_ q=$abc$109383$new_n49098_
-.subckt o2_x2 i0=soc.ram.ram[67][20] i1=$abc$109383$new_n44586_ q=$abc$109383$new_n49099_
-.subckt ao22_x2 i0=soc.ram.ram[71][20] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n43691_ q=$abc$109383$new_n49100_
+.subckt and2_x1 i0=$abc$109383$new_n49095_ i1=$abc$109383$new_n44225_ q=$abc$109383$new_n49096_
+.subckt and21nor_x1 i0=$abc$109383$new_n49096_ i1=$abc$109383$new_n49094_ i2=$abc$109383$new_n49092_ nq=$abc$109383$new_n49097_
+.subckt and2_x1 i0=$abc$109383$new_n49097_ i1=$abc$109383$new_n43990_ q=$abc$109383$new_n49098_
+.subckt or2_x1 i0=soc.ram.ram[67][20] i1=$abc$109383$new_n44586_ q=$abc$109383$new_n49099_
+.subckt and21nor_x1 i0=soc.ram.ram[71][20] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n43691_ nq=$abc$109383$new_n49100_
 .subckt nand2_x0 i0=$abc$109383$new_n49100_ i1=$abc$109383$new_n49099_ nq=$abc$109383$new_n49101_
 .subckt nor2_x0 i0=soc.ram.ram[66][20] i1=$abc$109383$new_n45265_ nq=$abc$109383$new_n49102_
 .subckt inv_x0 i=soc.ram.ram[70][20] nq=$abc$109383$new_n49103_
-.subckt oa22_x2 i0=$abc$109383$new_n49103_ i1=$abc$109383$new_n47050_ i2=$abc$109383$new_n44504_ q=$abc$109383$new_n49104_
-.subckt ao22_x2 i0=$abc$109383$new_n49104_ i1=$abc$109383$new_n49102_ i2=$abc$109383$new_n43650_ q=$abc$109383$new_n49105_
-.subckt a2_x2 i0=$abc$109383$new_n49105_ i1=$abc$109383$new_n49101_ q=$abc$109383$new_n49106_
-.subckt ao22_x2 i0=$abc$109383$new_n49106_ i1=$abc$109383$new_n49098_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n49107_
-.subckt ao22_x2 i0=$abc$109383$new_n49107_ i1=$abc$109383$new_n49090_ i2=$abc$109383$new_n44612_ q=$abc$109383$new_n49108_
-.subckt mx2_x2 cmd=$abc$109383$new_n43743_ i0=soc.ram.ram[72][20] i1=soc.ram.ram[76][20] q=$abc$109383$new_n49109_
-.subckt oa22_x2 i0=$abc$109383$new_n46128_ i1=$abc$109383$new_n49109_ i2=$abc$109383$new_n45427_ q=$abc$109383$new_n49110_
-.subckt ao22_x2 i0=soc.ram.ram[73][20] i1=$abc$109383$new_n45117_ i2=$abc$109383$new_n43914_ q=$abc$109383$new_n49111_
+.subckt or21nand_x1 i0=$abc$109383$new_n49103_ i1=$abc$109383$new_n47050_ i2=$abc$109383$new_n44504_ nq=$abc$109383$new_n49104_
+.subckt and21nor_x1 i0=$abc$109383$new_n49104_ i1=$abc$109383$new_n49102_ i2=$abc$109383$new_n43650_ nq=$abc$109383$new_n49105_
+.subckt and2_x1 i0=$abc$109383$new_n49105_ i1=$abc$109383$new_n49101_ q=$abc$109383$new_n49106_
+.subckt and21nor_x1 i0=$abc$109383$new_n49106_ i1=$abc$109383$new_n49098_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n49107_
+.subckt and21nor_x1 i0=$abc$109383$new_n49107_ i1=$abc$109383$new_n49090_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n49108_
+.subckt mux2_x1 cmd=$abc$109383$new_n43743_ i0=soc.ram.ram[72][20] i1=soc.ram.ram[76][20] q=$abc$109383$new_n49109_
+.subckt or21nand_x1 i0=$abc$109383$new_n46128_ i1=$abc$109383$new_n49109_ i2=$abc$109383$new_n45427_ nq=$abc$109383$new_n49110_
+.subckt and21nor_x1 i0=soc.ram.ram[73][20] i1=$abc$109383$new_n45117_ i2=$abc$109383$new_n43914_ nq=$abc$109383$new_n49111_
 .subckt inv_x0 i=soc.ram.ram[77][20] nq=$abc$109383$new_n49112_
 .subckt nand2_x0 i0=$abc$109383$new_n49112_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n49113_
-.subckt oa22_x2 i0=$abc$109383$new_n49113_ i1=$abc$109383$new_n49111_ i2=$abc$109383$new_n49110_ q=$abc$109383$new_n49114_
-.subckt mx2_x2 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[74][20] i1=soc.ram.ram[78][20] q=$abc$109383$new_n49115_
+.subckt or21nand_x1 i0=$abc$109383$new_n49113_ i1=$abc$109383$new_n49111_ i2=$abc$109383$new_n49110_ nq=$abc$109383$new_n49114_
+.subckt mux2_x1 cmd=$abc$109383$new_n43939_ i0=soc.ram.ram[74][20] i1=soc.ram.ram[78][20] q=$abc$109383$new_n49115_
 .subckt nand2_x0 i0=$abc$109383$new_n49115_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n49116_
 .subckt nor2_x0 i0=soc.ram.ram[75][20] i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n49117_
 .subckt inv_x0 i=soc.ram.ram[79][20] nq=$abc$109383$new_n49118_
-.subckt oa22_x2 i0=$abc$109383$new_n49118_ i1=$abc$109383$new_n43965_ i2=$abc$109383$new_n44485_ q=$abc$109383$new_n49119_
-.subckt ao22_x2 i0=$abc$109383$new_n49119_ i1=$abc$109383$new_n49117_ i2=$abc$109383$new_n44030_ q=$abc$109383$new_n49120_
+.subckt or21nand_x1 i0=$abc$109383$new_n49118_ i1=$abc$109383$new_n43965_ i2=$abc$109383$new_n44485_ nq=$abc$109383$new_n49119_
+.subckt and21nor_x1 i0=$abc$109383$new_n49119_ i1=$abc$109383$new_n49117_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n49120_
 .subckt nand2_x0 i0=$abc$109383$new_n49120_ i1=$abc$109383$new_n49116_ nq=$abc$109383$new_n49121_
-.subckt a3_x2 i0=$abc$109383$new_n49121_ i1=$abc$109383$new_n49114_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n49122_
-.subckt mx2_x2 cmd=$abc$109383$new_n45219_ i0=soc.ram.ram[90][20] i1=soc.ram.ram[94][20] q=$abc$109383$new_n49123_
+.subckt and3_x1 i0=$abc$109383$new_n49121_ i1=$abc$109383$new_n49114_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n49122_
+.subckt mux2_x1 cmd=$abc$109383$new_n45219_ i0=soc.ram.ram[90][20] i1=soc.ram.ram[94][20] q=$abc$109383$new_n49123_
 .subckt nand2_x0 i0=$abc$109383$new_n49123_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n49124_
 .subckt nor2_x0 i0=soc.ram.ram[91][20] i1=$abc$109383$new_n44924_ nq=$abc$109383$new_n49125_
 .subckt inv_x0 i=soc.ram.ram[95][20] nq=$abc$109383$new_n49126_
-.subckt oa22_x2 i0=$abc$109383$new_n49126_ i1=$abc$109383$new_n44604_ i2=$abc$109383$new_n43335_ q=$abc$109383$new_n49127_
-.subckt ao22_x2 i0=$abc$109383$new_n49127_ i1=$abc$109383$new_n49125_ i2=$abc$109383$new_n44905_ q=$abc$109383$new_n49128_
+.subckt or21nand_x1 i0=$abc$109383$new_n49126_ i1=$abc$109383$new_n44604_ i2=$abc$109383$new_n43335_ nq=$abc$109383$new_n49127_
+.subckt and21nor_x1 i0=$abc$109383$new_n49127_ i1=$abc$109383$new_n49125_ i2=$abc$109383$new_n44905_ nq=$abc$109383$new_n49128_
 .subckt nand2_x0 i0=$abc$109383$new_n49128_ i1=$abc$109383$new_n49124_ nq=$abc$109383$new_n49129_
 .subckt inv_x0 i=soc.ram.ram[93][20] nq=$abc$109383$new_n49130_
 .subckt nand2_x0 i0=$abc$109383$new_n49130_ i1=$abc$109383$new_n43830_ nq=$abc$109383$new_n49131_
-.subckt ao22_x2 i0=soc.ram.ram[89][20] i1=$abc$109383$new_n44501_ i2=$abc$109383$new_n45405_ q=$abc$109383$new_n49132_
+.subckt and21nor_x1 i0=soc.ram.ram[89][20] i1=$abc$109383$new_n44501_ i2=$abc$109383$new_n45405_ nq=$abc$109383$new_n49132_
 .subckt nand2_x0 i0=$abc$109383$new_n49132_ i1=$abc$109383$new_n49131_ nq=$abc$109383$new_n49133_
-.subckt mx2_x2 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[88][20] i1=soc.ram.ram[92][20] q=$abc$109383$new_n49134_
+.subckt mux2_x1 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[88][20] i1=soc.ram.ram[92][20] q=$abc$109383$new_n49134_
 .subckt nand2_x0 i0=$abc$109383$new_n49134_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n49135_
-.subckt a2_x2 i0=$abc$109383$new_n49135_ i1=$abc$109383$new_n43911_ q=$abc$109383$new_n49136_
+.subckt and2_x1 i0=$abc$109383$new_n49135_ i1=$abc$109383$new_n43911_ q=$abc$109383$new_n49136_
 .subckt nand2_x0 i0=$abc$109383$new_n49136_ i1=$abc$109383$new_n49133_ nq=$abc$109383$new_n49137_
-.subckt a3_x2 i0=$abc$109383$new_n49137_ i1=$abc$109383$new_n49129_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n49138_
+.subckt and3_x1 i0=$abc$109383$new_n49137_ i1=$abc$109383$new_n49129_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n49138_
 .subckt nor3_x0 i0=$abc$109383$new_n49138_ i1=$abc$109383$new_n49122_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n49139_
-.subckt o3_x2 i0=$abc$109383$new_n49139_ i1=$abc$109383$new_n49108_ i2=$abc$109383$new_n43901_ q=$abc$109383$new_n49140_
-.subckt mx2_x2 cmd=$abc$109383$new_n43580_ i0=soc.ram.ram[120][20] i1=soc.ram.ram[122][20] q=$abc$109383$new_n49141_
-.subckt a2_x2 i0=$abc$109383$new_n49141_ i1=$abc$109383$new_n43931_ q=$abc$109383$new_n49142_
-.subckt mx2_x2 cmd=$abc$109383$new_n43564_ i0=soc.ram.ram[124][20] i1=soc.ram.ram[126][20] q=$abc$109383$new_n49143_
-.subckt oa22_x2 i0=$abc$109383$new_n49143_ i1=$abc$109383$new_n43829_ i2=$abc$109383$new_n44626_ q=$abc$109383$new_n49144_
+.subckt or3_x1 i0=$abc$109383$new_n49139_ i1=$abc$109383$new_n49108_ i2=$abc$109383$new_n43901_ q=$abc$109383$new_n49140_
+.subckt mux2_x1 cmd=$abc$109383$new_n43580_ i0=soc.ram.ram[120][20] i1=soc.ram.ram[122][20] q=$abc$109383$new_n49141_
+.subckt and2_x1 i0=$abc$109383$new_n49141_ i1=$abc$109383$new_n43931_ q=$abc$109383$new_n49142_
+.subckt mux2_x1 cmd=$abc$109383$new_n43564_ i0=soc.ram.ram[124][20] i1=soc.ram.ram[126][20] q=$abc$109383$new_n49143_
+.subckt or21nand_x1 i0=$abc$109383$new_n49143_ i1=$abc$109383$new_n43829_ i2=$abc$109383$new_n44626_ nq=$abc$109383$new_n49144_
 .subckt nor2_x0 i0=$abc$109383$new_n49144_ i1=$abc$109383$new_n49142_ nq=$abc$109383$new_n49145_
-.subckt mx2_x2 cmd=$abc$109383$new_n46137_ i0=soc.ram.ram[121][20] i1=soc.ram.ram[123][20] q=$abc$109383$new_n49146_
-.subckt a2_x2 i0=$abc$109383$new_n49146_ i1=$abc$109383$new_n43931_ q=$abc$109383$new_n49147_
-.subckt mx2_x2 cmd=$abc$109383$new_n43402_ i0=soc.ram.ram[125][20] i1=soc.ram.ram[127][20] q=$abc$109383$new_n49148_
-.subckt oa22_x2 i0=$abc$109383$new_n49148_ i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n43903_ q=$abc$109383$new_n49149_
+.subckt mux2_x1 cmd=$abc$109383$new_n46137_ i0=soc.ram.ram[121][20] i1=soc.ram.ram[123][20] q=$abc$109383$new_n49146_
+.subckt and2_x1 i0=$abc$109383$new_n49146_ i1=$abc$109383$new_n43931_ q=$abc$109383$new_n49147_
+.subckt mux2_x1 cmd=$abc$109383$new_n43402_ i0=soc.ram.ram[125][20] i1=soc.ram.ram[127][20] q=$abc$109383$new_n49148_
+.subckt or21nand_x1 i0=$abc$109383$new_n49148_ i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n43903_ nq=$abc$109383$new_n49149_
 .subckt nor2_x0 i0=$abc$109383$new_n49149_ i1=$abc$109383$new_n49147_ nq=$abc$109383$new_n49150_
-.subckt ao22_x2 i0=$abc$109383$new_n49150_ i1=$abc$109383$new_n49145_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n49151_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[105][20] i1=soc.ram.ram[109][20] q=$abc$109383$new_n49152_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[107][20] i1=soc.ram.ram[111][20] q=$abc$109383$new_n49153_
-.subckt mx2_x2 cmd=$abc$109383$new_n43544_ i0=$abc$109383$new_n49153_ i1=$abc$109383$new_n49152_ q=$abc$109383$new_n49154_
+.subckt and21nor_x1 i0=$abc$109383$new_n49150_ i1=$abc$109383$new_n49145_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n49151_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[105][20] i1=soc.ram.ram[109][20] q=$abc$109383$new_n49152_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[107][20] i1=soc.ram.ram[111][20] q=$abc$109383$new_n49153_
+.subckt mux2_x1 cmd=$abc$109383$new_n43544_ i0=$abc$109383$new_n49153_ i1=$abc$109383$new_n49152_ q=$abc$109383$new_n49154_
 .subckt nor2_x0 i0=$abc$109383$new_n49154_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n49155_
 .subckt inv_x0 i=soc.ram.ram[104][20] nq=$abc$109383$new_n49156_
 .subckt inv_x0 i=soc.ram.ram[108][20] nq=$abc$109383$new_n49157_
-.subckt mx2_x2 cmd=$abc$109383$new_n43702_ i0=$abc$109383$new_n49157_ i1=$abc$109383$new_n49156_ q=$abc$109383$new_n49158_
+.subckt mux2_x1 cmd=$abc$109383$new_n43702_ i0=$abc$109383$new_n49157_ i1=$abc$109383$new_n49156_ q=$abc$109383$new_n49158_
 .subckt inv_x0 i=soc.ram.ram[106][20] nq=$abc$109383$new_n49159_
 .subckt inv_x0 i=soc.ram.ram[110][20] nq=$abc$109383$new_n49160_
-.subckt mx2_x2 cmd=$abc$109383$new_n43702_ i0=$abc$109383$new_n49160_ i1=$abc$109383$new_n49159_ q=$abc$109383$new_n49161_
-.subckt mx2_x2 cmd=$abc$109383$new_n45519_ i0=$abc$109383$new_n49161_ i1=$abc$109383$new_n49158_ q=$abc$109383$new_n49162_
-.subckt oa22_x2 i0=$abc$109383$new_n43943_ i1=$abc$109383$new_n49162_ i2=$abc$109383$new_n49155_ q=$abc$109383$new_n49163_
-.subckt oa22_x2 i0=$abc$109383$new_n43413_ i1=$abc$109383$new_n49163_ i2=$abc$109383$new_n49151_ q=$abc$109383$new_n49164_
+.subckt mux2_x1 cmd=$abc$109383$new_n43702_ i0=$abc$109383$new_n49160_ i1=$abc$109383$new_n49159_ q=$abc$109383$new_n49161_
+.subckt mux2_x1 cmd=$abc$109383$new_n45519_ i0=$abc$109383$new_n49161_ i1=$abc$109383$new_n49158_ q=$abc$109383$new_n49162_
+.subckt or21nand_x1 i0=$abc$109383$new_n43943_ i1=$abc$109383$new_n49162_ i2=$abc$109383$new_n49155_ nq=$abc$109383$new_n49163_
+.subckt or21nand_x1 i0=$abc$109383$new_n43413_ i1=$abc$109383$new_n49163_ i2=$abc$109383$new_n49151_ nq=$abc$109383$new_n49164_
 .subckt nand2_x0 i0=$abc$109383$new_n49164_ i1=$abc$109383$new_n43899_ nq=$abc$109383$new_n49165_
 .subckt nand2_x0 i0=soc.ram.ram[99][20] i1=$abc$109383$new_n43932_ nq=$abc$109383$new_n49166_
 .subckt inv_x0 i=soc.ram.ram[103][20] nq=$abc$109383$new_n49167_
-.subckt ao22_x2 i0=$abc$109383$new_n49167_ i1=$abc$109383$new_n43806_ i2=$abc$109383$new_n44590_ q=$abc$109383$new_n49168_
+.subckt and21nor_x1 i0=$abc$109383$new_n49167_ i1=$abc$109383$new_n43806_ i2=$abc$109383$new_n44590_ nq=$abc$109383$new_n49168_
 .subckt nand2_x0 i0=$abc$109383$new_n49168_ i1=$abc$109383$new_n49166_ nq=$abc$109383$new_n49169_
-.subckt oa22_x2 i0=soc.ram.ram[102][20] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n49170_
-.subckt oa22_x2 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[98][20] i2=$abc$109383$new_n49170_ q=$abc$109383$new_n49171_
-.subckt a2_x2 i0=$abc$109383$new_n49171_ i1=$abc$109383$new_n43935_ q=$abc$109383$new_n49172_
+.subckt or21nand_x1 i0=soc.ram.ram[102][20] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n49170_
+.subckt or21nand_x1 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[98][20] i2=$abc$109383$new_n49170_ nq=$abc$109383$new_n49171_
+.subckt and2_x1 i0=$abc$109383$new_n49171_ i1=$abc$109383$new_n43935_ q=$abc$109383$new_n49172_
 .subckt nand2_x0 i0=$abc$109383$new_n49172_ i1=$abc$109383$new_n49169_ nq=$abc$109383$new_n49173_
 .subckt nand2_x0 i0=soc.ram.ram[97][20] i1=$abc$109383$new_n43806_ nq=$abc$109383$new_n49174_
 .subckt inv_x0 i=soc.ram.ram[101][20] nq=$abc$109383$new_n49175_
-.subckt ao22_x2 i0=$abc$109383$new_n49175_ i1=$abc$109383$new_n44902_ i2=$abc$109383$new_n44626_ q=$abc$109383$new_n49176_
-.subckt a2_x2 i0=$abc$109383$new_n49176_ i1=$abc$109383$new_n49174_ q=$abc$109383$new_n49177_
-.subckt oa22_x2 i0=soc.ram.ram[100][20] i1=$abc$109383$new_n43608_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n49178_
-.subckt oa22_x2 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[96][20] i2=$abc$109383$new_n49178_ q=$abc$109383$new_n49179_
+.subckt and21nor_x1 i0=$abc$109383$new_n49175_ i1=$abc$109383$new_n44902_ i2=$abc$109383$new_n44626_ nq=$abc$109383$new_n49176_
+.subckt and2_x1 i0=$abc$109383$new_n49176_ i1=$abc$109383$new_n49174_ q=$abc$109383$new_n49177_
+.subckt or21nand_x1 i0=soc.ram.ram[100][20] i1=$abc$109383$new_n43608_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n49178_
+.subckt or21nand_x1 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[96][20] i2=$abc$109383$new_n49178_ nq=$abc$109383$new_n49179_
 .subckt nand2_x0 i0=$abc$109383$new_n49179_ i1=$abc$109383$new_n44656_ nq=$abc$109383$new_n49180_
-.subckt ao22_x2 i0=$abc$109383$new_n49180_ i1=$abc$109383$new_n49177_ i2=$abc$109383$new_n43921_ q=$abc$109383$new_n49181_
+.subckt and21nor_x1 i0=$abc$109383$new_n49180_ i1=$abc$109383$new_n49177_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n49181_
 .subckt nand2_x0 i0=$abc$109383$new_n49181_ i1=$abc$109383$new_n49173_ nq=$abc$109383$new_n49182_
 .subckt nand2_x0 i0=soc.ram.ram[115][20] i1=$abc$109383$new_n43932_ nq=$abc$109383$new_n49183_
 .subckt inv_x0 i=soc.ram.ram[119][20] nq=$abc$109383$new_n49184_
-.subckt ao22_x2 i0=$abc$109383$new_n49184_ i1=$abc$109383$new_n43806_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n49185_
+.subckt and21nor_x1 i0=$abc$109383$new_n49184_ i1=$abc$109383$new_n43806_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n49185_
 .subckt nand2_x0 i0=$abc$109383$new_n49185_ i1=$abc$109383$new_n49183_ nq=$abc$109383$new_n49186_
-.subckt oa22_x2 i0=soc.ram.ram[118][20] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n44688_ q=$abc$109383$new_n49187_
-.subckt oa22_x2 i0=$abc$109383$new_n43931_ i1=soc.ram.ram[114][20] i2=$abc$109383$new_n49187_ q=$abc$109383$new_n49188_
-.subckt a2_x2 i0=$abc$109383$new_n49188_ i1=$abc$109383$new_n44917_ q=$abc$109383$new_n49189_
+.subckt or21nand_x1 i0=soc.ram.ram[118][20] i1=$abc$109383$new_n44450_ i2=$abc$109383$new_n44688_ nq=$abc$109383$new_n49187_
+.subckt or21nand_x1 i0=$abc$109383$new_n43931_ i1=soc.ram.ram[114][20] i2=$abc$109383$new_n49187_ nq=$abc$109383$new_n49188_
+.subckt and2_x1 i0=$abc$109383$new_n49188_ i1=$abc$109383$new_n44917_ q=$abc$109383$new_n49189_
 .subckt nand2_x0 i0=$abc$109383$new_n49189_ i1=$abc$109383$new_n49186_ nq=$abc$109383$new_n49190_
 .subckt nand2_x0 i0=soc.ram.ram[113][20] i1=$abc$109383$new_n43931_ nq=$abc$109383$new_n49191_
 .subckt inv_x0 i=soc.ram.ram[117][20] nq=$abc$109383$new_n49192_
-.subckt ao22_x2 i0=$abc$109383$new_n49192_ i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n46696_ q=$abc$109383$new_n49193_
-.subckt a2_x2 i0=$abc$109383$new_n49193_ i1=$abc$109383$new_n49191_ q=$abc$109383$new_n49194_
-.subckt oa22_x2 i0=soc.ram.ram[116][20] i1=$abc$109383$new_n44859_ i2=$abc$109383$new_n43482_ q=$abc$109383$new_n49195_
-.subckt oa22_x2 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[112][20] i2=$abc$109383$new_n49195_ q=$abc$109383$new_n49196_
+.subckt and21nor_x1 i0=$abc$109383$new_n49192_ i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n46696_ nq=$abc$109383$new_n49193_
+.subckt and2_x1 i0=$abc$109383$new_n49193_ i1=$abc$109383$new_n49191_ q=$abc$109383$new_n49194_
+.subckt or21nand_x1 i0=soc.ram.ram[116][20] i1=$abc$109383$new_n44859_ i2=$abc$109383$new_n43482_ nq=$abc$109383$new_n49195_
+.subckt or21nand_x1 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[112][20] i2=$abc$109383$new_n49195_ nq=$abc$109383$new_n49196_
 .subckt nand2_x0 i0=$abc$109383$new_n49196_ i1=$abc$109383$new_n43679_ nq=$abc$109383$new_n49197_
-.subckt ao22_x2 i0=$abc$109383$new_n49197_ i1=$abc$109383$new_n49194_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n49198_
+.subckt and21nor_x1 i0=$abc$109383$new_n49197_ i1=$abc$109383$new_n49194_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n49198_
 .subckt nand2_x0 i0=$abc$109383$new_n49198_ i1=$abc$109383$new_n49190_ nq=$abc$109383$new_n49199_
-.subckt oa22_x2 i0=$abc$109383$new_n49199_ i1=$abc$109383$new_n49182_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n49200_
+.subckt or21nand_x1 i0=$abc$109383$new_n49199_ i1=$abc$109383$new_n49182_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n49200_
 .subckt nand3_x0 i0=$abc$109383$new_n49200_ i1=$abc$109383$new_n49165_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n49201_
-.subckt a2_x2 i0=$abc$109383$new_n49201_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n49202_
+.subckt and2_x1 i0=$abc$109383$new_n49201_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n49202_
 .subckt nand2_x0 i0=$abc$109383$new_n49202_ i1=$abc$109383$new_n49140_ nq=$abc$109383$new_n49203_
 .subckt nand3_x0 i0=$abc$109383$new_n49203_ i1=$abc$109383$new_n49073_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n49204_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[20] nq=$abc$109383$new_n49205_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[20] nq=$abc$109383$new_n49206_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28591_ q=$abc$109383$new_n49207_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28591_ q=$abc$109383$new_n49207_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[20] nq=$abc$109383$new_n49208_
 .subckt nor2_x0 i0=$abc$109383$new_n19692_ i1=$abc$109383$new_n49208_ nq=$abc$109383$new_n49209_
 .subckt nand4_x0 i0=$abc$109383$new_n49209_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n49210_
-.subckt a3_x2 i0=$abc$109383$new_n49210_ i1=$abc$109383$new_n49207_ i2=$abc$109383$new_n49206_ q=$abc$109383$new_n49211_
+.subckt and3_x1 i0=$abc$109383$new_n49210_ i1=$abc$109383$new_n49207_ i2=$abc$109383$new_n49206_ q=$abc$109383$new_n49211_
 .subckt nand3_x0 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n45471_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[20] nq=$abc$109383$new_n49212_
 .subckt nand3_x0 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[20] nq=$abc$109383$new_n49213_
-.subckt oa22_x2 i0=$abc$109383$new_n49213_ i1=$abc$109383$new_n49212_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n49214_
-.subckt a3_x2 i0=$abc$109383$new_n49214_ i1=$abc$109383$new_n49211_ i2=$abc$109383$new_n49205_ q=$abc$109383$new_n49215_
+.subckt or21nand_x1 i0=$abc$109383$new_n49213_ i1=$abc$109383$new_n49212_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n49214_
+.subckt and3_x1 i0=$abc$109383$new_n49214_ i1=$abc$109383$new_n49211_ i2=$abc$109383$new_n49205_ q=$abc$109383$new_n49215_
 .subckt nand3_x0 i0=$abc$109383$new_n49215_ i1=$abc$109383$new_n49204_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n49216_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[20] q=$abc$109383$new_n49217_
-.subckt a2_x2 i0=$abc$109383$new_n49217_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n49218_
-.subckt a2_x2 i0=$abc$109383$new_n49218_ i1=$abc$109383$new_n49216_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103278
-.subckt mx2_x2 cmd=$abc$109383$new_n43906_ i0=soc.ram.ram[74][21] i1=soc.ram.ram[78][21] q=$abc$109383$new_n49220_
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[20] nq=$abc$109383$new_n49217_
+.subckt and2_x1 i0=$abc$109383$new_n49217_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n49218_
+.subckt and2_x1 i0=$abc$109383$new_n49218_ i1=$abc$109383$new_n49216_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103278
+.subckt mux2_x1 cmd=$abc$109383$new_n43906_ i0=soc.ram.ram[74][21] i1=soc.ram.ram[78][21] q=$abc$109383$new_n49220_
 .subckt nand2_x0 i0=$abc$109383$new_n49220_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n49221_
-.subckt o2_x2 i0=soc.ram.ram[75][21] i1=$abc$109383$new_n45274_ q=$abc$109383$new_n49222_
-.subckt ao22_x2 i0=soc.ram.ram[79][21] i1=$abc$109383$new_n44158_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n49223_
+.subckt or2_x1 i0=soc.ram.ram[75][21] i1=$abc$109383$new_n45274_ q=$abc$109383$new_n49222_
+.subckt and21nor_x1 i0=soc.ram.ram[79][21] i1=$abc$109383$new_n44158_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n49223_
 .subckt nand2_x0 i0=$abc$109383$new_n49223_ i1=$abc$109383$new_n49222_ nq=$abc$109383$new_n49224_
-.subckt oa22_x2 i0=$abc$109383$new_n49224_ i1=$abc$109383$new_n49221_ i2=$abc$109383$new_n43471_ q=$abc$109383$new_n49225_
-.subckt mx2_x2 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[66][21] i1=soc.ram.ram[70][21] q=$abc$109383$new_n49226_
-.subckt mx2_x2 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[67][21] i1=soc.ram.ram[71][21] q=$abc$109383$new_n49227_
-.subckt mx2_x2 cmd=$abc$109383$new_n44180_ i0=$abc$109383$new_n49227_ i1=$abc$109383$new_n49226_ q=$abc$109383$new_n49228_
+.subckt or21nand_x1 i0=$abc$109383$new_n49224_ i1=$abc$109383$new_n49221_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n49225_
+.subckt mux2_x1 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[66][21] i1=soc.ram.ram[70][21] q=$abc$109383$new_n49226_
+.subckt mux2_x1 cmd=$abc$109383$new_n44469_ i0=soc.ram.ram[67][21] i1=soc.ram.ram[71][21] q=$abc$109383$new_n49227_
+.subckt mux2_x1 cmd=$abc$109383$new_n44180_ i0=$abc$109383$new_n49227_ i1=$abc$109383$new_n49226_ q=$abc$109383$new_n49228_
 .subckt nand2_x0 i0=$abc$109383$new_n49228_ i1=$abc$109383$new_n44449_ nq=$abc$109383$new_n49229_
-.subckt a3_x2 i0=$abc$109383$new_n49229_ i1=$abc$109383$new_n49225_ i2=$abc$109383$new_n44641_ q=$abc$109383$new_n49230_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[72][21] i1=soc.ram.ram[76][21] q=$abc$109383$new_n49231_
+.subckt and3_x1 i0=$abc$109383$new_n49229_ i1=$abc$109383$new_n49225_ i2=$abc$109383$new_n44641_ q=$abc$109383$new_n49230_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[72][21] i1=soc.ram.ram[76][21] q=$abc$109383$new_n49231_
 .subckt nand2_x0 i0=$abc$109383$new_n49231_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n49232_
 .subckt inv_x0 i=soc.ram.ram[77][21] nq=$abc$109383$new_n49233_
 .subckt nand2_x0 i0=$abc$109383$new_n49233_ i1=$abc$109383$new_n45234_ nq=$abc$109383$new_n49234_
-.subckt ao22_x2 i0=soc.ram.ram[73][21] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n49235_
+.subckt and21nor_x1 i0=soc.ram.ram[73][21] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n49235_
 .subckt nand2_x0 i0=$abc$109383$new_n49235_ i1=$abc$109383$new_n49234_ nq=$abc$109383$new_n49236_
-.subckt oa22_x2 i0=$abc$109383$new_n49236_ i1=$abc$109383$new_n49232_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n49237_
-.subckt mx2_x2 cmd=$abc$109383$new_n43484_ i0=soc.ram.ram[64][21] i1=soc.ram.ram[68][21] q=$abc$109383$new_n49238_
+.subckt or21nand_x1 i0=$abc$109383$new_n49236_ i1=$abc$109383$new_n49232_ i2=$abc$109383$new_n43664_ nq=$abc$109383$new_n49237_
+.subckt mux2_x1 cmd=$abc$109383$new_n43484_ i0=soc.ram.ram[64][21] i1=soc.ram.ram[68][21] q=$abc$109383$new_n49238_
 .subckt nand2_x0 i0=$abc$109383$new_n49238_ i1=$abc$109383$new_n44008_ nq=$abc$109383$new_n49239_
 .subckt inv_x0 i=soc.ram.ram[69][21] nq=$abc$109383$new_n49240_
 .subckt nand2_x0 i0=$abc$109383$new_n49240_ i1=$abc$109383$new_n43965_ nq=$abc$109383$new_n49241_
-.subckt ao22_x2 i0=soc.ram.ram[65][21] i1=$abc$109383$new_n44215_ i2=$abc$109383$new_n44214_ q=$abc$109383$new_n49242_
+.subckt and21nor_x1 i0=soc.ram.ram[65][21] i1=$abc$109383$new_n44215_ i2=$abc$109383$new_n44214_ nq=$abc$109383$new_n49242_
 .subckt nand2_x0 i0=$abc$109383$new_n49242_ i1=$abc$109383$new_n49241_ nq=$abc$109383$new_n49243_
-.subckt oa22_x2 i0=$abc$109383$new_n49243_ i1=$abc$109383$new_n49239_ i2=$abc$109383$new_n43649_ q=$abc$109383$new_n49244_
-.subckt a3_x2 i0=$abc$109383$new_n49244_ i1=$abc$109383$new_n49237_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n49245_
+.subckt or21nand_x1 i0=$abc$109383$new_n49243_ i1=$abc$109383$new_n49239_ i2=$abc$109383$new_n43649_ nq=$abc$109383$new_n49244_
+.subckt and3_x1 i0=$abc$109383$new_n49244_ i1=$abc$109383$new_n49237_ i2=$abc$109383$new_n45441_ q=$abc$109383$new_n49245_
 .subckt nor3_x0 i0=$abc$109383$new_n49245_ i1=$abc$109383$new_n49230_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n49246_
-.subckt mx2_x2 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[80][21] i1=soc.ram.ram[84][21] q=$abc$109383$new_n49247_
+.subckt mux2_x1 cmd=$abc$109383$new_n44215_ i0=soc.ram.ram[80][21] i1=soc.ram.ram[84][21] q=$abc$109383$new_n49247_
 .subckt nand2_x0 i0=$abc$109383$new_n49247_ i1=$abc$109383$new_n43942_ nq=$abc$109383$new_n49248_
 .subckt inv_x0 i=soc.ram.ram[85][21] nq=$abc$109383$new_n49249_
 .subckt nand2_x0 i0=$abc$109383$new_n49249_ i1=$abc$109383$new_n43851_ nq=$abc$109383$new_n49250_
-.subckt ao22_x2 i0=soc.ram.ram[81][21] i1=$abc$109383$new_n43343_ i2=$abc$109383$new_n45247_ q=$abc$109383$new_n49251_
+.subckt and21nor_x1 i0=soc.ram.ram[81][21] i1=$abc$109383$new_n43343_ i2=$abc$109383$new_n45247_ nq=$abc$109383$new_n49251_
 .subckt nand2_x0 i0=$abc$109383$new_n49251_ i1=$abc$109383$new_n49250_ nq=$abc$109383$new_n49252_
 .subckt nand3_x0 i0=$abc$109383$new_n49252_ i1=$abc$109383$new_n49248_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n49253_
-.subckt ao22_x2 i0=soc.ram.ram[89][21] i1=$abc$109383$new_n44229_ i2=$abc$109383$new_n43611_ q=$abc$109383$new_n49254_
-.subckt ao22_x2 i0=$abc$109383$new_n43561_ i1=soc.ram.ram[93][21] i2=$abc$109383$new_n49254_ q=$abc$109383$new_n49255_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[88][21] i1=soc.ram.ram[92][21] q=$abc$109383$new_n49256_
-.subckt oa22_x2 i0=$abc$109383$new_n43902_ i1=$abc$109383$new_n49256_ i2=$abc$109383$new_n43554_ q=$abc$109383$new_n49257_
-.subckt ao22_x2 i0=$abc$109383$new_n49257_ i1=$abc$109383$new_n49255_ i2=$abc$109383$new_n43473_ q=$abc$109383$new_n49258_
-.subckt a2_x2 i0=$abc$109383$new_n49258_ i1=$abc$109383$new_n49253_ q=$abc$109383$new_n49259_
-.subckt mx2_x2 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[82][21] i1=soc.ram.ram[86][21] q=$abc$109383$new_n49260_
+.subckt and21nor_x1 i0=soc.ram.ram[89][21] i1=$abc$109383$new_n44229_ i2=$abc$109383$new_n43611_ nq=$abc$109383$new_n49254_
+.subckt and21nor_x1 i0=$abc$109383$new_n43561_ i1=soc.ram.ram[93][21] i2=$abc$109383$new_n49254_ nq=$abc$109383$new_n49255_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[88][21] i1=soc.ram.ram[92][21] q=$abc$109383$new_n49256_
+.subckt or21nand_x1 i0=$abc$109383$new_n43902_ i1=$abc$109383$new_n49256_ i2=$abc$109383$new_n43554_ nq=$abc$109383$new_n49257_
+.subckt and21nor_x1 i0=$abc$109383$new_n49257_ i1=$abc$109383$new_n49255_ i2=$abc$109383$new_n43473_ nq=$abc$109383$new_n49258_
+.subckt and2_x1 i0=$abc$109383$new_n49258_ i1=$abc$109383$new_n49253_ q=$abc$109383$new_n49259_
+.subckt mux2_x1 cmd=$abc$109383$new_n44424_ i0=soc.ram.ram[82][21] i1=soc.ram.ram[86][21] q=$abc$109383$new_n49260_
 .subckt nand2_x0 i0=$abc$109383$new_n49260_ i1=$abc$109383$new_n44837_ nq=$abc$109383$new_n49261_
 .subckt inv_x0 i=soc.ram.ram[87][21] nq=$abc$109383$new_n49262_
 .subckt nand2_x0 i0=$abc$109383$new_n49262_ i1=$abc$109383$new_n44188_ nq=$abc$109383$new_n49263_
-.subckt ao22_x2 i0=soc.ram.ram[83][21] i1=$abc$109383$new_n44191_ i2=$abc$109383$new_n43797_ q=$abc$109383$new_n49264_
+.subckt and21nor_x1 i0=soc.ram.ram[83][21] i1=$abc$109383$new_n44191_ i2=$abc$109383$new_n43797_ nq=$abc$109383$new_n49264_
 .subckt nand2_x0 i0=$abc$109383$new_n49264_ i1=$abc$109383$new_n49263_ nq=$abc$109383$new_n49265_
 .subckt nand3_x0 i0=$abc$109383$new_n49265_ i1=$abc$109383$new_n49261_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n49266_
-.subckt mx2_x2 cmd=$abc$109383$new_n43484_ i0=soc.ram.ram[90][21] i1=soc.ram.ram[94][21] q=$abc$109383$new_n49267_
+.subckt mux2_x1 cmd=$abc$109383$new_n43484_ i0=soc.ram.ram[90][21] i1=soc.ram.ram[94][21] q=$abc$109383$new_n49267_
 .subckt nand2_x0 i0=$abc$109383$new_n49267_ i1=$abc$109383$new_n44008_ nq=$abc$109383$new_n49268_
 .subckt inv_x0 i=soc.ram.ram[95][21] nq=$abc$109383$new_n49269_
 .subckt nand2_x0 i0=$abc$109383$new_n49269_ i1=$abc$109383$new_n43860_ nq=$abc$109383$new_n49270_
-.subckt ao22_x2 i0=soc.ram.ram[91][21] i1=$abc$109383$new_n44808_ i2=$abc$109383$new_n44064_ q=$abc$109383$new_n49271_
+.subckt and21nor_x1 i0=soc.ram.ram[91][21] i1=$abc$109383$new_n44808_ i2=$abc$109383$new_n44064_ nq=$abc$109383$new_n49271_
 .subckt nand2_x0 i0=$abc$109383$new_n49271_ i1=$abc$109383$new_n49270_ nq=$abc$109383$new_n49272_
 .subckt nand3_x0 i0=$abc$109383$new_n49272_ i1=$abc$109383$new_n49268_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n49273_
-.subckt a3_x2 i0=$abc$109383$new_n49273_ i1=$abc$109383$new_n49266_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n49274_
-.subckt ao22_x2 i0=$abc$109383$new_n49274_ i1=$abc$109383$new_n49259_ i2=$abc$109383$new_n44478_ q=$abc$109383$new_n49275_
+.subckt and3_x1 i0=$abc$109383$new_n49273_ i1=$abc$109383$new_n49266_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n49274_
+.subckt and21nor_x1 i0=$abc$109383$new_n49274_ i1=$abc$109383$new_n49259_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n49275_
 .subckt nor3_x0 i0=$abc$109383$new_n49275_ i1=$abc$109383$new_n49246_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n49276_
-.subckt mx2_x2 cmd=$abc$109383$new_n43556_ i0=soc.ram.ram[100][21] i1=soc.ram.ram[101][21] q=$abc$109383$new_n49277_
-.subckt mx2_x2 cmd=$abc$109383$new_n43556_ i0=soc.ram.ram[96][21] i1=soc.ram.ram[97][21] q=$abc$109383$new_n49278_
-.subckt mx2_x2 cmd=$abc$109383$new_n43654_ i0=$abc$109383$new_n49278_ i1=$abc$109383$new_n49277_ q=$abc$109383$new_n49279_
+.subckt mux2_x1 cmd=$abc$109383$new_n43556_ i0=soc.ram.ram[100][21] i1=soc.ram.ram[101][21] q=$abc$109383$new_n49277_
+.subckt mux2_x1 cmd=$abc$109383$new_n43556_ i0=soc.ram.ram[96][21] i1=soc.ram.ram[97][21] q=$abc$109383$new_n49278_
+.subckt mux2_x1 cmd=$abc$109383$new_n43654_ i0=$abc$109383$new_n49278_ i1=$abc$109383$new_n49277_ q=$abc$109383$new_n49279_
 .subckt nor2_x0 i0=$abc$109383$new_n49279_ i1=$abc$109383$new_n43767_ nq=$abc$109383$new_n49280_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[108][21] i1=soc.ram.ram[109][21] q=$abc$109383$new_n49281_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[104][21] i1=soc.ram.ram[105][21] q=$abc$109383$new_n49282_
-.subckt mx2_x2 cmd=$abc$109383$new_n43613_ i0=$abc$109383$new_n49282_ i1=$abc$109383$new_n49281_ q=$abc$109383$new_n49283_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[108][21] i1=soc.ram.ram[109][21] q=$abc$109383$new_n49281_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[104][21] i1=soc.ram.ram[105][21] q=$abc$109383$new_n49282_
+.subckt mux2_x1 cmd=$abc$109383$new_n43613_ i0=$abc$109383$new_n49282_ i1=$abc$109383$new_n49281_ q=$abc$109383$new_n49283_
 .subckt nor2_x0 i0=$abc$109383$new_n49283_ i1=$abc$109383$new_n43392_ nq=$abc$109383$new_n49284_
-.subckt o3_x2 i0=$abc$109383$new_n49284_ i1=$abc$109383$new_n49280_ i2=$abc$109383$new_n43948_ q=$abc$109383$new_n49285_
-.subckt ao22_x2 i0=soc.ram.ram[99][21] i1=$abc$109383$new_n43368_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n49286_
-.subckt ao22_x2 i0=$abc$109383$new_n43878_ i1=soc.ram.ram[103][21] i2=$abc$109383$new_n49286_ q=$abc$109383$new_n49287_
-.subckt mx2_x2 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[98][21] i1=soc.ram.ram[102][21] q=$abc$109383$new_n49288_
-.subckt a2_x2 i0=$abc$109383$new_n49288_ i1=$abc$109383$new_n43428_ q=$abc$109383$new_n49289_
-.subckt o3_x2 i0=$abc$109383$new_n49289_ i1=$abc$109383$new_n49287_ i2=$abc$109383$new_n44149_ q=$abc$109383$new_n49290_
-.subckt mx2_x2 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[106][21] i1=soc.ram.ram[110][21] q=$abc$109383$new_n49291_
-.subckt a2_x2 i0=$abc$109383$new_n49291_ i1=$abc$109383$new_n43434_ q=$abc$109383$new_n49292_
-.subckt ao22_x2 i0=soc.ram.ram[111][21] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n43394_ q=$abc$109383$new_n49293_
-.subckt o2_x2 i0=soc.ram.ram[107][21] i1=$abc$109383$new_n43607_ q=$abc$109383$new_n49294_
-.subckt oa22_x2 i0=$abc$109383$new_n49294_ i1=$abc$109383$new_n49293_ i2=$abc$109383$new_n49292_ q=$abc$109383$new_n49295_
-.subckt ao22_x2 i0=$abc$109383$new_n49295_ i1=$abc$109383$new_n45069_ i2=$abc$109383$new_n43507_ q=$abc$109383$new_n49296_
+.subckt or3_x1 i0=$abc$109383$new_n49284_ i1=$abc$109383$new_n49280_ i2=$abc$109383$new_n43948_ q=$abc$109383$new_n49285_
+.subckt and21nor_x1 i0=soc.ram.ram[99][21] i1=$abc$109383$new_n43368_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n49286_
+.subckt and21nor_x1 i0=$abc$109383$new_n43878_ i1=soc.ram.ram[103][21] i2=$abc$109383$new_n49286_ nq=$abc$109383$new_n49287_
+.subckt mux2_x1 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[98][21] i1=soc.ram.ram[102][21] q=$abc$109383$new_n49288_
+.subckt and2_x1 i0=$abc$109383$new_n49288_ i1=$abc$109383$new_n43428_ q=$abc$109383$new_n49289_
+.subckt or3_x1 i0=$abc$109383$new_n49289_ i1=$abc$109383$new_n49287_ i2=$abc$109383$new_n44149_ q=$abc$109383$new_n49290_
+.subckt mux2_x1 cmd=$abc$109383$new_n43573_ i0=soc.ram.ram[106][21] i1=soc.ram.ram[110][21] q=$abc$109383$new_n49291_
+.subckt and2_x1 i0=$abc$109383$new_n49291_ i1=$abc$109383$new_n43434_ q=$abc$109383$new_n49292_
+.subckt and21nor_x1 i0=soc.ram.ram[111][21] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n43394_ nq=$abc$109383$new_n49293_
+.subckt or2_x1 i0=soc.ram.ram[107][21] i1=$abc$109383$new_n43607_ q=$abc$109383$new_n49294_
+.subckt or21nand_x1 i0=$abc$109383$new_n49294_ i1=$abc$109383$new_n49293_ i2=$abc$109383$new_n49292_ nq=$abc$109383$new_n49295_
+.subckt and21nor_x1 i0=$abc$109383$new_n49295_ i1=$abc$109383$new_n45069_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n49296_
 .subckt nand2_x0 i0=$abc$109383$new_n49296_ i1=$abc$109383$new_n49290_ nq=$abc$109383$new_n49297_
-.subckt oa22_x2 i0=$abc$109383$new_n49297_ i1=$abc$109383$new_n49285_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n49298_
-.subckt ao22_x2 i0=soc.ram.ram[121][21] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n49299_
-.subckt ao22_x2 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[125][21] i2=$abc$109383$new_n49299_ q=$abc$109383$new_n49300_
-.subckt mx2_x2 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[120][21] i1=soc.ram.ram[124][21] q=$abc$109383$new_n49301_
-.subckt oa22_x2 i0=$abc$109383$new_n43813_ i1=$abc$109383$new_n49301_ i2=$abc$109383$new_n43837_ q=$abc$109383$new_n49302_
-.subckt o2_x2 i0=$abc$109383$new_n49302_ i1=$abc$109383$new_n49300_ q=$abc$109383$new_n49303_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[112][21] i1=soc.ram.ram[116][21] q=$abc$109383$new_n49304_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[113][21] i1=soc.ram.ram[117][21] q=$abc$109383$new_n49305_
-.subckt mx2_x2 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n49305_ i1=$abc$109383$new_n49304_ q=$abc$109383$new_n49306_
-.subckt ao22_x2 i0=$abc$109383$new_n49306_ i1=$abc$109383$new_n45393_ i2=$abc$109383$new_n45519_ q=$abc$109383$new_n49307_
+.subckt or21nand_x1 i0=$abc$109383$new_n49297_ i1=$abc$109383$new_n49285_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n49298_
+.subckt and21nor_x1 i0=soc.ram.ram[121][21] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n49299_
+.subckt and21nor_x1 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[125][21] i2=$abc$109383$new_n49299_ nq=$abc$109383$new_n49300_
+.subckt mux2_x1 cmd=$abc$109383$new_n43818_ i0=soc.ram.ram[120][21] i1=soc.ram.ram[124][21] q=$abc$109383$new_n49301_
+.subckt or21nand_x1 i0=$abc$109383$new_n43813_ i1=$abc$109383$new_n49301_ i2=$abc$109383$new_n43837_ nq=$abc$109383$new_n49302_
+.subckt or2_x1 i0=$abc$109383$new_n49302_ i1=$abc$109383$new_n49300_ q=$abc$109383$new_n49303_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[112][21] i1=soc.ram.ram[116][21] q=$abc$109383$new_n49304_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[113][21] i1=soc.ram.ram[117][21] q=$abc$109383$new_n49305_
+.subckt mux2_x1 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n49305_ i1=$abc$109383$new_n49304_ q=$abc$109383$new_n49306_
+.subckt and21nor_x1 i0=$abc$109383$new_n49306_ i1=$abc$109383$new_n45393_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n49307_
 .subckt nand2_x0 i0=$abc$109383$new_n49307_ i1=$abc$109383$new_n49303_ nq=$abc$109383$new_n49308_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[122][21] i1=soc.ram.ram[126][21] q=$abc$109383$new_n49309_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[123][21] i1=soc.ram.ram[127][21] q=$abc$109383$new_n49310_
-.subckt mx2_x2 cmd=$abc$109383$new_n44179_ i0=$abc$109383$new_n49310_ i1=$abc$109383$new_n49309_ q=$abc$109383$new_n49311_
-.subckt o2_x2 i0=$abc$109383$new_n49311_ i1=$abc$109383$new_n44692_ q=$abc$109383$new_n49312_
-.subckt mx2_x2 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[114][21] i1=soc.ram.ram[118][21] q=$abc$109383$new_n49313_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[122][21] i1=soc.ram.ram[126][21] q=$abc$109383$new_n49309_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[123][21] i1=soc.ram.ram[127][21] q=$abc$109383$new_n49310_
+.subckt mux2_x1 cmd=$abc$109383$new_n44179_ i0=$abc$109383$new_n49310_ i1=$abc$109383$new_n49309_ q=$abc$109383$new_n49311_
+.subckt or2_x1 i0=$abc$109383$new_n49311_ i1=$abc$109383$new_n44692_ q=$abc$109383$new_n49312_
+.subckt mux2_x1 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[114][21] i1=soc.ram.ram[118][21] q=$abc$109383$new_n49313_
 .subckt nand2_x0 i0=$abc$109383$new_n49313_ i1=$abc$109383$new_n43942_ nq=$abc$109383$new_n49314_
-.subckt mx2_x2 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[115][21] i1=soc.ram.ram[119][21] q=$abc$109383$new_n49315_
+.subckt mux2_x1 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[115][21] i1=soc.ram.ram[119][21] q=$abc$109383$new_n49315_
 .subckt nand2_x0 i0=$abc$109383$new_n49315_ i1=$abc$109383$new_n43914_ nq=$abc$109383$new_n49316_
 .subckt nand3_x0 i0=$abc$109383$new_n49316_ i1=$abc$109383$new_n49314_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n49317_
 .subckt nand3_x0 i0=$abc$109383$new_n49317_ i1=$abc$109383$new_n49312_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n49318_
-.subckt oa22_x2 i0=$abc$109383$new_n49318_ i1=$abc$109383$new_n49308_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n49319_
-.subckt a3_x2 i0=$abc$109383$new_n49319_ i1=$abc$109383$new_n49298_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n49320_
-.subckt o3_x2 i0=$abc$109383$new_n49320_ i1=$abc$109383$new_n49276_ i2=$abc$109383$new_n45475_ q=$abc$109383$new_n49321_
-.subckt mx2_x2 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[8][21] i1=soc.ram.ram[12][21] q=$abc$109383$new_n49322_
-.subckt oa22_x2 i0=$abc$109383$new_n43866_ i1=$abc$109383$new_n49322_ i2=$abc$109383$new_n44789_ q=$abc$109383$new_n49323_
-.subckt ao22_x2 i0=soc.ram.ram[9][21] i1=$abc$109383$new_n44818_ i2=$abc$109383$new_n45268_ q=$abc$109383$new_n49324_
+.subckt or21nand_x1 i0=$abc$109383$new_n49318_ i1=$abc$109383$new_n49308_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n49319_
+.subckt and3_x1 i0=$abc$109383$new_n49319_ i1=$abc$109383$new_n49298_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n49320_
+.subckt or3_x1 i0=$abc$109383$new_n49320_ i1=$abc$109383$new_n49276_ i2=$abc$109383$new_n45475_ q=$abc$109383$new_n49321_
+.subckt mux2_x1 cmd=$abc$109383$new_n44026_ i0=soc.ram.ram[8][21] i1=soc.ram.ram[12][21] q=$abc$109383$new_n49322_
+.subckt or21nand_x1 i0=$abc$109383$new_n43866_ i1=$abc$109383$new_n49322_ i2=$abc$109383$new_n44789_ nq=$abc$109383$new_n49323_
+.subckt and21nor_x1 i0=soc.ram.ram[9][21] i1=$abc$109383$new_n44818_ i2=$abc$109383$new_n45268_ nq=$abc$109383$new_n49324_
 .subckt inv_x0 i=soc.ram.ram[13][21] nq=$abc$109383$new_n49325_
 .subckt nand2_x0 i0=$abc$109383$new_n49325_ i1=$abc$109383$new_n43830_ nq=$abc$109383$new_n49326_
-.subckt oa22_x2 i0=$abc$109383$new_n49326_ i1=$abc$109383$new_n49324_ i2=$abc$109383$new_n49323_ q=$abc$109383$new_n49327_
-.subckt mx2_x2 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[10][21] i1=soc.ram.ram[14][21] q=$abc$109383$new_n49328_
-.subckt a2_x2 i0=$abc$109383$new_n49328_ i1=$abc$109383$new_n44823_ q=$abc$109383$new_n49329_
-.subckt o2_x2 i0=soc.ram.ram[11][21] i1=$abc$109383$new_n46187_ q=$abc$109383$new_n49330_
-.subckt ao22_x2 i0=soc.ram.ram[15][21] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n43416_ q=$abc$109383$new_n49331_
-.subckt oa22_x2 i0=$abc$109383$new_n49331_ i1=$abc$109383$new_n49330_ i2=$abc$109383$new_n45519_ q=$abc$109383$new_n49332_
-.subckt ao22_x2 i0=$abc$109383$new_n49332_ i1=$abc$109383$new_n49329_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n49333_
+.subckt or21nand_x1 i0=$abc$109383$new_n49326_ i1=$abc$109383$new_n49324_ i2=$abc$109383$new_n49323_ nq=$abc$109383$new_n49327_
+.subckt mux2_x1 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[10][21] i1=soc.ram.ram[14][21] q=$abc$109383$new_n49328_
+.subckt and2_x1 i0=$abc$109383$new_n49328_ i1=$abc$109383$new_n44823_ q=$abc$109383$new_n49329_
+.subckt or2_x1 i0=soc.ram.ram[11][21] i1=$abc$109383$new_n46187_ q=$abc$109383$new_n49330_
+.subckt and21nor_x1 i0=soc.ram.ram[15][21] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n43416_ nq=$abc$109383$new_n49331_
+.subckt or21nand_x1 i0=$abc$109383$new_n49331_ i1=$abc$109383$new_n49330_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n49332_
+.subckt and21nor_x1 i0=$abc$109383$new_n49332_ i1=$abc$109383$new_n49329_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n49333_
 .subckt nand2_x0 i0=$abc$109383$new_n49333_ i1=$abc$109383$new_n49327_ nq=$abc$109383$new_n49334_
-.subckt mx2_x2 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[24][21] i1=soc.ram.ram[28][21] q=$abc$109383$new_n49335_
+.subckt mux2_x1 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[24][21] i1=soc.ram.ram[28][21] q=$abc$109383$new_n49335_
 .subckt nand2_x0 i0=$abc$109383$new_n49335_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n49336_
 .subckt inv_x0 i=soc.ram.ram[29][21] nq=$abc$109383$new_n49337_
 .subckt nand2_x0 i0=$abc$109383$new_n49337_ i1=$abc$109383$new_n44022_ nq=$abc$109383$new_n49338_
-.subckt ao22_x2 i0=soc.ram.ram[25][21] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43963_ q=$abc$109383$new_n49339_
+.subckt and21nor_x1 i0=soc.ram.ram[25][21] i1=$abc$109383$new_n44930_ i2=$abc$109383$new_n43963_ nq=$abc$109383$new_n49339_
 .subckt nand2_x0 i0=$abc$109383$new_n49339_ i1=$abc$109383$new_n49338_ nq=$abc$109383$new_n49340_
 .subckt nand3_x0 i0=$abc$109383$new_n49340_ i1=$abc$109383$new_n49336_ i2=$abc$109383$new_n43991_ nq=$abc$109383$new_n49341_
 .subckt inv_x0 i=soc.ram.ram[31][21] nq=$abc$109383$new_n49342_
 .subckt nand2_x0 i0=$abc$109383$new_n49342_ i1=$abc$109383$new_n43955_ nq=$abc$109383$new_n49343_
-.subckt ao22_x2 i0=soc.ram.ram[27][21] i1=$abc$109383$new_n44451_ i2=$abc$109383$new_n45268_ q=$abc$109383$new_n49344_
+.subckt and21nor_x1 i0=soc.ram.ram[27][21] i1=$abc$109383$new_n44451_ i2=$abc$109383$new_n45268_ nq=$abc$109383$new_n49344_
 .subckt nand2_x0 i0=$abc$109383$new_n49344_ i1=$abc$109383$new_n49343_ nq=$abc$109383$new_n49345_
-.subckt mx2_x2 cmd=$abc$109383$new_n45234_ i0=soc.ram.ram[26][21] i1=soc.ram.ram[30][21] q=$abc$109383$new_n49346_
+.subckt mux2_x1 cmd=$abc$109383$new_n45234_ i0=soc.ram.ram[26][21] i1=soc.ram.ram[30][21] q=$abc$109383$new_n49346_
 .subckt nand2_x0 i0=$abc$109383$new_n49346_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n49347_
-.subckt a2_x2 i0=$abc$109383$new_n49347_ i1=$abc$109383$new_n44853_ q=$abc$109383$new_n49348_
+.subckt and2_x1 i0=$abc$109383$new_n49347_ i1=$abc$109383$new_n44853_ q=$abc$109383$new_n49348_
 .subckt nand2_x0 i0=$abc$109383$new_n49348_ i1=$abc$109383$new_n49345_ nq=$abc$109383$new_n49349_
 .subckt nand3_x0 i0=$abc$109383$new_n49349_ i1=$abc$109383$new_n49341_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n49350_
-.subckt oa22_x2 i0=$abc$109383$new_n49350_ i1=$abc$109383$new_n49334_ i2=$abc$109383$new_n44612_ q=$abc$109383$new_n49351_
+.subckt or21nand_x1 i0=$abc$109383$new_n49350_ i1=$abc$109383$new_n49334_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n49351_
 .subckt inv_x0 i=soc.ram.ram[5][21] nq=$abc$109383$new_n49352_
 .subckt nand2_x0 i0=$abc$109383$new_n49352_ i1=$abc$109383$new_n43927_ nq=$abc$109383$new_n49353_
-.subckt ao22_x2 i0=soc.ram.ram[1][21] i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44065_ q=$abc$109383$new_n49354_
+.subckt and21nor_x1 i0=soc.ram.ram[1][21] i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44065_ nq=$abc$109383$new_n49354_
 .subckt nand2_x0 i0=$abc$109383$new_n49354_ i1=$abc$109383$new_n49353_ nq=$abc$109383$new_n49355_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[0][21] i1=soc.ram.ram[4][21] q=$abc$109383$new_n49356_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[0][21] i1=soc.ram.ram[4][21] q=$abc$109383$new_n49356_
 .subckt nand2_x0 i0=$abc$109383$new_n49356_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n49357_
-.subckt a2_x2 i0=$abc$109383$new_n49357_ i1=$abc$109383$new_n45015_ q=$abc$109383$new_n49358_
-.subckt a2_x2 i0=$abc$109383$new_n49358_ i1=$abc$109383$new_n49355_ q=$abc$109383$new_n49359_
-.subckt o2_x2 i0=soc.ram.ram[3][21] i1=$abc$109383$new_n43802_ q=$abc$109383$new_n49360_
-.subckt ao22_x2 i0=soc.ram.ram[7][21] i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n49361_
+.subckt and2_x1 i0=$abc$109383$new_n49357_ i1=$abc$109383$new_n45015_ q=$abc$109383$new_n49358_
+.subckt and2_x1 i0=$abc$109383$new_n49358_ i1=$abc$109383$new_n49355_ q=$abc$109383$new_n49359_
+.subckt or2_x1 i0=soc.ram.ram[3][21] i1=$abc$109383$new_n43802_ q=$abc$109383$new_n49360_
+.subckt and21nor_x1 i0=soc.ram.ram[7][21] i1=$abc$109383$new_n46370_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n49361_
 .subckt nand2_x0 i0=$abc$109383$new_n49361_ i1=$abc$109383$new_n49360_ nq=$abc$109383$new_n49362_
 .subckt nor2_x0 i0=soc.ram.ram[2][21] i1=$abc$109383$new_n45870_ nq=$abc$109383$new_n49363_
 .subckt inv_x0 i=soc.ram.ram[6][21] nq=$abc$109383$new_n49364_
-.subckt oa22_x2 i0=$abc$109383$new_n49364_ i1=$abc$109383$new_n43925_ i2=$abc$109383$new_n45093_ q=$abc$109383$new_n49365_
-.subckt ao22_x2 i0=$abc$109383$new_n49365_ i1=$abc$109383$new_n49363_ i2=$abc$109383$new_n45279_ q=$abc$109383$new_n49366_
-.subckt oa22_x2 i0=$abc$109383$new_n49366_ i1=$abc$109383$new_n49362_ i2=$abc$109383$new_n43729_ q=$abc$109383$new_n49367_
-.subckt o2_x2 i0=$abc$109383$new_n49367_ i1=$abc$109383$new_n49359_ q=$abc$109383$new_n49368_
-.subckt mx2_x2 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[17][21] i1=soc.ram.ram[21][21] q=$abc$109383$new_n49369_
-.subckt mx2_x2 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[16][21] i1=soc.ram.ram[20][21] q=$abc$109383$new_n49370_
-.subckt mx2_x2 cmd=$abc$109383$new_n43798_ i0=$abc$109383$new_n49370_ i1=$abc$109383$new_n49369_ q=$abc$109383$new_n49371_
-.subckt o2_x2 i0=$abc$109383$new_n49371_ i1=$abc$109383$new_n43935_ q=$abc$109383$new_n49372_
-.subckt mx2_x2 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[18][21] i1=soc.ram.ram[22][21] q=$abc$109383$new_n49373_
-.subckt a2_x2 i0=$abc$109383$new_n49373_ i1=$abc$109383$new_n45448_ q=$abc$109383$new_n49374_
-.subckt ao22_x2 i0=soc.ram.ram[19][21] i1=$abc$109383$new_n45076_ i2=$abc$109383$new_n43961_ q=$abc$109383$new_n49375_
-.subckt ao22_x2 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[23][21] i2=$abc$109383$new_n49375_ q=$abc$109383$new_n49376_
-.subckt o2_x2 i0=$abc$109383$new_n49376_ i1=$abc$109383$new_n45519_ q=$abc$109383$new_n49377_
-.subckt ao22_x2 i0=$abc$109383$new_n49377_ i1=$abc$109383$new_n49374_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n49378_
+.subckt or21nand_x1 i0=$abc$109383$new_n49364_ i1=$abc$109383$new_n43925_ i2=$abc$109383$new_n45093_ nq=$abc$109383$new_n49365_
+.subckt and21nor_x1 i0=$abc$109383$new_n49365_ i1=$abc$109383$new_n49363_ i2=$abc$109383$new_n45279_ nq=$abc$109383$new_n49366_
+.subckt or21nand_x1 i0=$abc$109383$new_n49366_ i1=$abc$109383$new_n49362_ i2=$abc$109383$new_n43729_ nq=$abc$109383$new_n49367_
+.subckt or2_x1 i0=$abc$109383$new_n49367_ i1=$abc$109383$new_n49359_ q=$abc$109383$new_n49368_
+.subckt mux2_x1 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[17][21] i1=soc.ram.ram[21][21] q=$abc$109383$new_n49369_
+.subckt mux2_x1 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[16][21] i1=soc.ram.ram[20][21] q=$abc$109383$new_n49370_
+.subckt mux2_x1 cmd=$abc$109383$new_n43798_ i0=$abc$109383$new_n49370_ i1=$abc$109383$new_n49369_ q=$abc$109383$new_n49371_
+.subckt or2_x1 i0=$abc$109383$new_n49371_ i1=$abc$109383$new_n43935_ q=$abc$109383$new_n49372_
+.subckt mux2_x1 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[18][21] i1=soc.ram.ram[22][21] q=$abc$109383$new_n49373_
+.subckt and2_x1 i0=$abc$109383$new_n49373_ i1=$abc$109383$new_n45448_ q=$abc$109383$new_n49374_
+.subckt and21nor_x1 i0=soc.ram.ram[19][21] i1=$abc$109383$new_n45076_ i2=$abc$109383$new_n43961_ nq=$abc$109383$new_n49375_
+.subckt and21nor_x1 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[23][21] i2=$abc$109383$new_n49375_ nq=$abc$109383$new_n49376_
+.subckt or2_x1 i0=$abc$109383$new_n49376_ i1=$abc$109383$new_n45519_ q=$abc$109383$new_n49377_
+.subckt and21nor_x1 i0=$abc$109383$new_n49377_ i1=$abc$109383$new_n49374_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n49378_
 .subckt nand2_x0 i0=$abc$109383$new_n49378_ i1=$abc$109383$new_n49372_ nq=$abc$109383$new_n49379_
-.subckt oa22_x2 i0=$abc$109383$new_n49379_ i1=$abc$109383$new_n49368_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n49380_
+.subckt or21nand_x1 i0=$abc$109383$new_n49379_ i1=$abc$109383$new_n49368_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n49380_
 .subckt nand3_x0 i0=$abc$109383$new_n49380_ i1=$abc$109383$new_n49351_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n49381_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[56][21] i1=soc.ram.ram[60][21] q=$abc$109383$new_n49382_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[56][21] i1=soc.ram.ram[60][21] q=$abc$109383$new_n49382_
 .subckt nand2_x0 i0=$abc$109383$new_n49382_ i1=$abc$109383$new_n43707_ nq=$abc$109383$new_n49383_
-.subckt mx2_x2 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[57][21] i1=soc.ram.ram[61][21] q=$abc$109383$new_n49384_
+.subckt mux2_x1 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[57][21] i1=soc.ram.ram[61][21] q=$abc$109383$new_n49384_
 .subckt nand2_x0 i0=$abc$109383$new_n49384_ i1=$abc$109383$new_n44214_ nq=$abc$109383$new_n49385_
-.subckt a2_x2 i0=$abc$109383$new_n49385_ i1=$abc$109383$new_n49383_ q=$abc$109383$new_n49386_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[48][21] i1=soc.ram.ram[52][21] q=$abc$109383$new_n49387_
+.subckt and2_x1 i0=$abc$109383$new_n49385_ i1=$abc$109383$new_n49383_ q=$abc$109383$new_n49386_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[48][21] i1=soc.ram.ram[52][21] q=$abc$109383$new_n49387_
 .subckt nand2_x0 i0=$abc$109383$new_n49387_ i1=$abc$109383$new_n43707_ nq=$abc$109383$new_n49388_
-.subckt mx2_x2 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[49][21] i1=soc.ram.ram[53][21] q=$abc$109383$new_n49389_
+.subckt mux2_x1 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[49][21] i1=soc.ram.ram[53][21] q=$abc$109383$new_n49389_
 .subckt nand2_x0 i0=$abc$109383$new_n49389_ i1=$abc$109383$new_n44214_ nq=$abc$109383$new_n49390_
-.subckt a2_x2 i0=$abc$109383$new_n49390_ i1=$abc$109383$new_n49388_ q=$abc$109383$new_n49391_
-.subckt mx2_x2 cmd=$abc$109383$new_n44228_ i0=$abc$109383$new_n49391_ i1=$abc$109383$new_n49386_ q=$abc$109383$new_n49392_
-.subckt oa22_x2 i0=$abc$109383$new_n44812_ i1=$abc$109383$new_n49392_ i2=$abc$109383$new_n43412_ q=$abc$109383$new_n49393_
-.subckt ao22_x2 i0=soc.ram.ram[59][21] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n49394_
-.subckt ao22_x2 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[63][21] i2=$abc$109383$new_n49394_ q=$abc$109383$new_n49395_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[58][21] i1=soc.ram.ram[62][21] q=$abc$109383$new_n49396_
-.subckt a2_x2 i0=$abc$109383$new_n49396_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n49397_
-.subckt ao22_x2 i0=$abc$109383$new_n49397_ i1=$abc$109383$new_n49395_ i2=$abc$109383$new_n45335_ q=$abc$109383$new_n49398_
+.subckt and2_x1 i0=$abc$109383$new_n49390_ i1=$abc$109383$new_n49388_ q=$abc$109383$new_n49391_
+.subckt mux2_x1 cmd=$abc$109383$new_n44228_ i0=$abc$109383$new_n49391_ i1=$abc$109383$new_n49386_ q=$abc$109383$new_n49392_
+.subckt or21nand_x1 i0=$abc$109383$new_n44812_ i1=$abc$109383$new_n49392_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n49393_
+.subckt and21nor_x1 i0=soc.ram.ram[59][21] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n49394_
+.subckt and21nor_x1 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[63][21] i2=$abc$109383$new_n49394_ nq=$abc$109383$new_n49395_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[58][21] i1=soc.ram.ram[62][21] q=$abc$109383$new_n49396_
+.subckt and2_x1 i0=$abc$109383$new_n49396_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n49397_
+.subckt and21nor_x1 i0=$abc$109383$new_n49397_ i1=$abc$109383$new_n49395_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n49398_
 .subckt nor2_x0 i0=$abc$109383$new_n49398_ i1=$abc$109383$new_n45016_ nq=$abc$109383$new_n49399_
-.subckt o2_x2 i0=soc.ram.ram[51][21] i1=$abc$109383$new_n43915_ q=$abc$109383$new_n49400_
-.subckt ao22_x2 i0=soc.ram.ram[55][21] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n43923_ q=$abc$109383$new_n49401_
+.subckt or2_x1 i0=soc.ram.ram[51][21] i1=$abc$109383$new_n43915_ q=$abc$109383$new_n49400_
+.subckt and21nor_x1 i0=soc.ram.ram[55][21] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n43923_ nq=$abc$109383$new_n49401_
 .subckt nand2_x0 i0=$abc$109383$new_n49401_ i1=$abc$109383$new_n49400_ nq=$abc$109383$new_n49402_
 .subckt inv_x0 i=soc.ram.ram[54][21] nq=$abc$109383$new_n49403_
 .subckt nand2_x0 i0=$abc$109383$new_n49403_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n49404_
-.subckt o2_x2 i0=soc.ram.ram[50][21] i1=$abc$109383$new_n45285_ q=$abc$109383$new_n49405_
-.subckt a2_x2 i0=$abc$109383$new_n49405_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n49406_
+.subckt or2_x1 i0=soc.ram.ram[50][21] i1=$abc$109383$new_n45285_ q=$abc$109383$new_n49405_
+.subckt and2_x1 i0=$abc$109383$new_n49405_ i1=$abc$109383$new_n44122_ q=$abc$109383$new_n49406_
 .subckt nand2_x0 i0=$abc$109383$new_n49406_ i1=$abc$109383$new_n49404_ nq=$abc$109383$new_n49407_
-.subckt oa22_x2 i0=$abc$109383$new_n49407_ i1=$abc$109383$new_n49402_ i2=$abc$109383$new_n44499_ q=$abc$109383$new_n49408_
-.subckt oa22_x2 i0=$abc$109383$new_n49408_ i1=$abc$109383$new_n49399_ i2=$abc$109383$new_n49393_ q=$abc$109383$new_n49409_
-.subckt mx2_x2 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[40][21] i1=soc.ram.ram[44][21] q=$abc$109383$new_n49410_
-.subckt mx2_x2 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[41][21] i1=soc.ram.ram[45][21] q=$abc$109383$new_n49411_
-.subckt mx2_x2 cmd=$abc$109383$new_n45395_ i0=$abc$109383$new_n49411_ i1=$abc$109383$new_n49410_ q=$abc$109383$new_n49412_
+.subckt or21nand_x1 i0=$abc$109383$new_n49407_ i1=$abc$109383$new_n49402_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n49408_
+.subckt or21nand_x1 i0=$abc$109383$new_n49408_ i1=$abc$109383$new_n49399_ i2=$abc$109383$new_n49393_ nq=$abc$109383$new_n49409_
+.subckt mux2_x1 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[40][21] i1=soc.ram.ram[44][21] q=$abc$109383$new_n49410_
+.subckt mux2_x1 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[41][21] i1=soc.ram.ram[45][21] q=$abc$109383$new_n49411_
+.subckt mux2_x1 cmd=$abc$109383$new_n45395_ i0=$abc$109383$new_n49411_ i1=$abc$109383$new_n49410_ q=$abc$109383$new_n49412_
 .subckt nand2_x0 i0=$abc$109383$new_n49412_ i1=$abc$109383$new_n43769_ nq=$abc$109383$new_n49413_
-.subckt mx2_x2 cmd=$abc$109383$new_n44848_ i0=soc.ram.ram[32][21] i1=soc.ram.ram[36][21] q=$abc$109383$new_n49414_
+.subckt mux2_x1 cmd=$abc$109383$new_n44848_ i0=soc.ram.ram[32][21] i1=soc.ram.ram[36][21] q=$abc$109383$new_n49414_
 .subckt nor2_x0 i0=$abc$109383$new_n49414_ i1=$abc$109383$new_n43924_ nq=$abc$109383$new_n49415_
 .subckt inv_x0 i=soc.ram.ram[33][21] nq=$abc$109383$new_n49416_
 .subckt inv_x0 i=soc.ram.ram[37][21] nq=$abc$109383$new_n49417_
-.subckt mx2_x2 cmd=$abc$109383$new_n44042_ i0=$abc$109383$new_n49417_ i1=$abc$109383$new_n49416_ q=$abc$109383$new_n49418_
-.subckt oa22_x2 i0=$abc$109383$new_n43798_ i1=$abc$109383$new_n49418_ i2=$abc$109383$new_n45393_ q=$abc$109383$new_n49419_
-.subckt ao22_x2 i0=$abc$109383$new_n49419_ i1=$abc$109383$new_n49415_ i2=$abc$109383$new_n45520_ q=$abc$109383$new_n49420_
+.subckt mux2_x1 cmd=$abc$109383$new_n44042_ i0=$abc$109383$new_n49417_ i1=$abc$109383$new_n49416_ q=$abc$109383$new_n49418_
+.subckt or21nand_x1 i0=$abc$109383$new_n43798_ i1=$abc$109383$new_n49418_ i2=$abc$109383$new_n45393_ nq=$abc$109383$new_n49419_
+.subckt and21nor_x1 i0=$abc$109383$new_n49419_ i1=$abc$109383$new_n49415_ i2=$abc$109383$new_n45520_ nq=$abc$109383$new_n49420_
 .subckt nand2_x0 i0=$abc$109383$new_n49420_ i1=$abc$109383$new_n49413_ nq=$abc$109383$new_n49421_
-.subckt ao22_x2 i0=soc.ram.ram[43][21] i1=$abc$109383$new_n44469_ i2=$abc$109383$new_n43517_ q=$abc$109383$new_n49422_
-.subckt ao22_x2 i0=$abc$109383$new_n43930_ i1=soc.ram.ram[47][21] i2=$abc$109383$new_n49422_ q=$abc$109383$new_n49423_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[42][21] i1=soc.ram.ram[46][21] q=$abc$109383$new_n49424_
-.subckt a2_x2 i0=$abc$109383$new_n49424_ i1=$abc$109383$new_n44097_ q=$abc$109383$new_n49425_
-.subckt ao22_x2 i0=$abc$109383$new_n49425_ i1=$abc$109383$new_n49423_ i2=$abc$109383$new_n43570_ q=$abc$109383$new_n49426_
-.subckt ao22_x2 i0=soc.ram.ram[35][21] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43642_ q=$abc$109383$new_n49427_
-.subckt ao22_x2 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[39][21] i2=$abc$109383$new_n49427_ q=$abc$109383$new_n49428_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[34][21] i1=soc.ram.ram[38][21] q=$abc$109383$new_n49429_
-.subckt a2_x2 i0=$abc$109383$new_n49429_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n49430_
-.subckt ao22_x2 i0=$abc$109383$new_n49430_ i1=$abc$109383$new_n49428_ i2=$abc$109383$new_n44692_ q=$abc$109383$new_n49431_
-.subckt o3_x2 i0=$abc$109383$new_n49431_ i1=$abc$109383$new_n49426_ i2=$abc$109383$new_n44742_ q=$abc$109383$new_n49432_
+.subckt and21nor_x1 i0=soc.ram.ram[43][21] i1=$abc$109383$new_n44469_ i2=$abc$109383$new_n43517_ nq=$abc$109383$new_n49422_
+.subckt and21nor_x1 i0=$abc$109383$new_n43930_ i1=soc.ram.ram[47][21] i2=$abc$109383$new_n49422_ nq=$abc$109383$new_n49423_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[42][21] i1=soc.ram.ram[46][21] q=$abc$109383$new_n49424_
+.subckt and2_x1 i0=$abc$109383$new_n49424_ i1=$abc$109383$new_n44097_ q=$abc$109383$new_n49425_
+.subckt and21nor_x1 i0=$abc$109383$new_n49425_ i1=$abc$109383$new_n49423_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n49426_
+.subckt and21nor_x1 i0=soc.ram.ram[35][21] i1=$abc$109383$new_n44555_ i2=$abc$109383$new_n43642_ nq=$abc$109383$new_n49427_
+.subckt and21nor_x1 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[39][21] i2=$abc$109383$new_n49427_ nq=$abc$109383$new_n49428_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[34][21] i1=soc.ram.ram[38][21] q=$abc$109383$new_n49429_
+.subckt and2_x1 i0=$abc$109383$new_n49429_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n49430_
+.subckt and21nor_x1 i0=$abc$109383$new_n49430_ i1=$abc$109383$new_n49428_ i2=$abc$109383$new_n44692_ nq=$abc$109383$new_n49431_
+.subckt or3_x1 i0=$abc$109383$new_n49431_ i1=$abc$109383$new_n49426_ i2=$abc$109383$new_n44742_ q=$abc$109383$new_n49432_
 .subckt nand3_x0 i0=$abc$109383$new_n49432_ i1=$abc$109383$new_n49421_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n49433_
 .subckt nand3_x0 i0=$abc$109383$new_n49433_ i1=$abc$109383$new_n49409_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n49434_
-.subckt a2_x2 i0=$abc$109383$new_n49434_ i1=$abc$109383$new_n45475_ q=$abc$109383$new_n49435_
+.subckt and2_x1 i0=$abc$109383$new_n49434_ i1=$abc$109383$new_n45475_ q=$abc$109383$new_n49435_
 .subckt nand2_x0 i0=$abc$109383$new_n49435_ i1=$abc$109383$new_n49381_ nq=$abc$109383$new_n49436_
-.subckt oa22_x2 i0=$abc$109383$new_n49436_ i1=$abc$109383$new_n49321_ i2=$abc$109383$new_n44891_ q=$abc$109383$new_n49437_
+.subckt or21nand_x1 i0=$abc$109383$new_n49436_ i1=$abc$109383$new_n49321_ i2=$abc$109383$new_n44891_ nq=$abc$109383$new_n49437_
 .subckt nand3_x0 i0=$abc$109383$new_n27645_ i1=$abc$109383$new_n27594_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[21] nq=$abc$109383$new_n49438_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[21] nq=$abc$109383$new_n49439_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[21] nq=$abc$109383$new_n49440_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[21] nq=$abc$109383$new_n49441_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28598_ q=$abc$109383$new_n49442_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n43312_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28598_ q=$abc$109383$new_n49442_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[21] nq=$abc$109383$new_n49443_
 .subckt nor2_x0 i0=$abc$109383$new_n19692_ i1=$abc$109383$new_n49443_ nq=$abc$109383$new_n49444_
 .subckt nand4_x0 i0=$abc$109383$new_n49444_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n49445_
-.subckt a3_x2 i0=$abc$109383$new_n49445_ i1=$abc$109383$new_n49442_ i2=$abc$109383$new_n49441_ q=$abc$109383$new_n49446_
-.subckt a4_x2 i0=$abc$109383$new_n49446_ i1=$abc$109383$new_n49440_ i2=$abc$109383$new_n49439_ i3=$abc$109383$new_n49438_ q=$abc$109383$new_n49447_
+.subckt and3_x1 i0=$abc$109383$new_n49445_ i1=$abc$109383$new_n49442_ i2=$abc$109383$new_n49441_ q=$abc$109383$new_n49446_
+.subckt and4_x1 i0=$abc$109383$new_n49446_ i1=$abc$109383$new_n49440_ i2=$abc$109383$new_n49439_ i3=$abc$109383$new_n49438_ q=$abc$109383$new_n49447_
 .subckt nand3_x0 i0=$abc$109383$new_n49447_ i1=$abc$109383$new_n49437_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n49448_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[21] q=$abc$109383$new_n49449_
-.subckt a2_x2 i0=$abc$109383$new_n49449_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n49450_
-.subckt a2_x2 i0=$abc$109383$new_n49450_ i1=$abc$109383$new_n49448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103282
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[22] q=$abc$109383$new_n49452_
-.subckt a2_x2 i0=$abc$109383$new_n49452_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n49453_
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[21] nq=$abc$109383$new_n49449_
+.subckt and2_x1 i0=$abc$109383$new_n49449_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n49450_
+.subckt and2_x1 i0=$abc$109383$new_n49450_ i1=$abc$109383$new_n49448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103282
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[22] nq=$abc$109383$new_n49452_
+.subckt and2_x1 i0=$abc$109383$new_n49452_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n49453_
 .subckt nand3_x0 i0=$abc$109383$new_n44265_ i1=$abc$109383$new_n44268_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n49454_
 .subckt nand3_x0 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n49455_
-.subckt oa22_x2 i0=$abc$109383$new_n49455_ i1=$abc$109383$new_n49454_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n49456_
+.subckt or21nand_x1 i0=$abc$109383$new_n49455_ i1=$abc$109383$new_n49454_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n49456_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n49457_
-.subckt o2_x2 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n49457_ q=$abc$109383$new_n49458_
-.subckt o4_x2 i0=$abc$109383$new_n49458_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n49459_
+.subckt or2_x1 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n49457_ q=$abc$109383$new_n49458_
+.subckt or4_x1 i0=$abc$109383$new_n49458_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n49459_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n44265_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n49460_
 .subckt nand4_x0 i0=$abc$109383$new_n14915_ i1=$abc$109383$new_n14906_ i2=$abc$109383$new_n14897_ i3=soc.decoder.data_bus__dat_r[22] nq=$abc$109383$new_n49461_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28605_ q=$abc$109383$new_n49462_
-.subckt a2_x2 i0=$abc$109383$new_n49462_ i1=$abc$109383$new_n49461_ q=$abc$109383$new_n49463_
-.subckt a3_x2 i0=$abc$109383$new_n49463_ i1=$abc$109383$new_n49460_ i2=$abc$109383$new_n49459_ q=$abc$109383$new_n49464_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28605_ q=$abc$109383$new_n49462_
+.subckt and2_x1 i0=$abc$109383$new_n49462_ i1=$abc$109383$new_n49461_ q=$abc$109383$new_n49463_
+.subckt and3_x1 i0=$abc$109383$new_n49463_ i1=$abc$109383$new_n49460_ i2=$abc$109383$new_n49459_ q=$abc$109383$new_n49464_
 .subckt nand2_x0 i0=$abc$109383$new_n49464_ i1=$abc$109383$new_n49456_ nq=$abc$109383$new_n49465_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[42][22] i1=soc.ram.ram[46][22] q=$abc$109383$new_n49466_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[42][22] i1=soc.ram.ram[46][22] q=$abc$109383$new_n49466_
 .subckt nand2_x0 i0=$abc$109383$new_n49466_ i1=$abc$109383$new_n44630_ nq=$abc$109383$new_n49467_
 .subckt inv_x0 i=soc.ram.ram[47][22] nq=$abc$109383$new_n49468_
 .subckt nand2_x0 i0=$abc$109383$new_n49468_ i1=$abc$109383$new_n43819_ nq=$abc$109383$new_n49469_
-.subckt ao22_x2 i0=soc.ram.ram[43][22] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n45093_ q=$abc$109383$new_n49470_
+.subckt and21nor_x1 i0=soc.ram.ram[43][22] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n45093_ nq=$abc$109383$new_n49470_
 .subckt nand2_x0 i0=$abc$109383$new_n49470_ i1=$abc$109383$new_n49469_ nq=$abc$109383$new_n49471_
 .subckt nand3_x0 i0=$abc$109383$new_n49471_ i1=$abc$109383$new_n49467_ i2=$abc$109383$new_n44774_ nq=$abc$109383$new_n49472_
-.subckt ao22_x2 i0=soc.ram.ram[41][22] i1=$abc$109383$new_n43441_ i2=$abc$109383$new_n43846_ q=$abc$109383$new_n49473_
-.subckt ao22_x2 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[45][22] i2=$abc$109383$new_n49473_ q=$abc$109383$new_n49474_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[40][22] i1=soc.ram.ram[44][22] q=$abc$109383$new_n49475_
-.subckt oa22_x2 i0=$abc$109383$new_n43434_ i1=$abc$109383$new_n49475_ i2=$abc$109383$new_n43579_ q=$abc$109383$new_n49476_
-.subckt ao22_x2 i0=$abc$109383$new_n49476_ i1=$abc$109383$new_n49474_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n49477_
-.subckt a2_x2 i0=$abc$109383$new_n49477_ i1=$abc$109383$new_n49472_ q=$abc$109383$new_n49478_
-.subckt mx2_x2 cmd=$abc$109383$new_n43607_ i0=soc.ram.ram[56][22] i1=soc.ram.ram[60][22] q=$abc$109383$new_n49479_
+.subckt and21nor_x1 i0=soc.ram.ram[41][22] i1=$abc$109383$new_n43441_ i2=$abc$109383$new_n43846_ nq=$abc$109383$new_n49473_
+.subckt and21nor_x1 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[45][22] i2=$abc$109383$new_n49473_ nq=$abc$109383$new_n49474_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[40][22] i1=soc.ram.ram[44][22] q=$abc$109383$new_n49475_
+.subckt or21nand_x1 i0=$abc$109383$new_n43434_ i1=$abc$109383$new_n49475_ i2=$abc$109383$new_n43579_ nq=$abc$109383$new_n49476_
+.subckt and21nor_x1 i0=$abc$109383$new_n49476_ i1=$abc$109383$new_n49474_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n49477_
+.subckt and2_x1 i0=$abc$109383$new_n49477_ i1=$abc$109383$new_n49472_ q=$abc$109383$new_n49478_
+.subckt mux2_x1 cmd=$abc$109383$new_n43607_ i0=soc.ram.ram[56][22] i1=soc.ram.ram[60][22] q=$abc$109383$new_n49479_
 .subckt nand2_x0 i0=$abc$109383$new_n49479_ i1=$abc$109383$new_n43335_ nq=$abc$109383$new_n49480_
 .subckt inv_x0 i=soc.ram.ram[61][22] nq=$abc$109383$new_n49481_
 .subckt nand2_x0 i0=$abc$109383$new_n49481_ i1=$abc$109383$new_n43608_ nq=$abc$109383$new_n49482_
-.subckt ao22_x2 i0=soc.ram.ram[57][22] i1=$abc$109383$new_n43419_ i2=$abc$109383$new_n43415_ q=$abc$109383$new_n49483_
+.subckt and21nor_x1 i0=soc.ram.ram[57][22] i1=$abc$109383$new_n43419_ i2=$abc$109383$new_n43415_ nq=$abc$109383$new_n49483_
 .subckt nand2_x0 i0=$abc$109383$new_n49483_ i1=$abc$109383$new_n49482_ nq=$abc$109383$new_n49484_
 .subckt nand3_x0 i0=$abc$109383$new_n49484_ i1=$abc$109383$new_n49480_ i2=$abc$109383$new_n43544_ nq=$abc$109383$new_n49485_
-.subckt ao22_x2 i0=soc.ram.ram[59][22] i1=$abc$109383$new_n43495_ i2=$abc$109383$new_n43698_ q=$abc$109383$new_n49486_
-.subckt ao22_x2 i0=$abc$109383$new_n43365_ i1=soc.ram.ram[63][22] i2=$abc$109383$new_n49486_ q=$abc$109383$new_n49487_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[58][22] i1=soc.ram.ram[62][22] q=$abc$109383$new_n49488_
-.subckt oa22_x2 i0=$abc$109383$new_n43706_ i1=$abc$109383$new_n49488_ i2=$abc$109383$new_n43723_ q=$abc$109383$new_n49489_
-.subckt ao22_x2 i0=$abc$109383$new_n49489_ i1=$abc$109383$new_n49487_ i2=$abc$109383$new_n43466_ q=$abc$109383$new_n49490_
-.subckt a2_x2 i0=$abc$109383$new_n49490_ i1=$abc$109383$new_n49485_ q=$abc$109383$new_n49491_
-.subckt o3_x2 i0=$abc$109383$new_n49491_ i1=$abc$109383$new_n49478_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n49492_
-.subckt mx2_x2 cmd=$abc$109383$new_n43337_ i0=soc.ram.ram[8][22] i1=soc.ram.ram[12][22] q=$abc$109383$new_n49493_
-.subckt oa22_x2 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n49493_ i2=$abc$109383$new_n43579_ q=$abc$109383$new_n49494_
-.subckt ao22_x2 i0=soc.ram.ram[9][22] i1=$abc$109383$new_n44563_ i2=$abc$109383$new_n44047_ q=$abc$109383$new_n49495_
+.subckt and21nor_x1 i0=soc.ram.ram[59][22] i1=$abc$109383$new_n43495_ i2=$abc$109383$new_n43698_ nq=$abc$109383$new_n49486_
+.subckt and21nor_x1 i0=$abc$109383$new_n43365_ i1=soc.ram.ram[63][22] i2=$abc$109383$new_n49486_ nq=$abc$109383$new_n49487_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[58][22] i1=soc.ram.ram[62][22] q=$abc$109383$new_n49488_
+.subckt or21nand_x1 i0=$abc$109383$new_n43706_ i1=$abc$109383$new_n49488_ i2=$abc$109383$new_n43723_ nq=$abc$109383$new_n49489_
+.subckt and21nor_x1 i0=$abc$109383$new_n49489_ i1=$abc$109383$new_n49487_ i2=$abc$109383$new_n43466_ nq=$abc$109383$new_n49490_
+.subckt and2_x1 i0=$abc$109383$new_n49490_ i1=$abc$109383$new_n49485_ q=$abc$109383$new_n49491_
+.subckt or3_x1 i0=$abc$109383$new_n49491_ i1=$abc$109383$new_n49478_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n49492_
+.subckt mux2_x1 cmd=$abc$109383$new_n43337_ i0=soc.ram.ram[8][22] i1=soc.ram.ram[12][22] q=$abc$109383$new_n49493_
+.subckt or21nand_x1 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n49493_ i2=$abc$109383$new_n43579_ nq=$abc$109383$new_n49494_
+.subckt and21nor_x1 i0=soc.ram.ram[9][22] i1=$abc$109383$new_n44563_ i2=$abc$109383$new_n44047_ nq=$abc$109383$new_n49495_
 .subckt inv_x0 i=soc.ram.ram[13][22] nq=$abc$109383$new_n49496_
 .subckt nand2_x0 i0=$abc$109383$new_n49496_ i1=$abc$109383$new_n44237_ nq=$abc$109383$new_n49497_
-.subckt oa22_x2 i0=$abc$109383$new_n49497_ i1=$abc$109383$new_n49495_ i2=$abc$109383$new_n49494_ q=$abc$109383$new_n49498_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[10][22] i1=soc.ram.ram[14][22] q=$abc$109383$new_n49499_
+.subckt or21nand_x1 i0=$abc$109383$new_n49497_ i1=$abc$109383$new_n49495_ i2=$abc$109383$new_n49494_ nq=$abc$109383$new_n49498_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[10][22] i1=soc.ram.ram[14][22] q=$abc$109383$new_n49499_
 .subckt nand2_x0 i0=$abc$109383$new_n49499_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n49500_
 .subckt nor2_x0 i0=soc.ram.ram[11][22] i1=$abc$109383$new_n44424_ nq=$abc$109383$new_n49501_
 .subckt inv_x0 i=soc.ram.ram[15][22] nq=$abc$109383$new_n49502_
-.subckt oa22_x2 i0=$abc$109383$new_n49502_ i1=$abc$109383$new_n43704_ i2=$abc$109383$new_n43427_ q=$abc$109383$new_n49503_
-.subckt ao22_x2 i0=$abc$109383$new_n49503_ i1=$abc$109383$new_n49501_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n49504_
+.subckt or21nand_x1 i0=$abc$109383$new_n49502_ i1=$abc$109383$new_n43704_ i2=$abc$109383$new_n43427_ nq=$abc$109383$new_n49503_
+.subckt and21nor_x1 i0=$abc$109383$new_n49503_ i1=$abc$109383$new_n49501_ i2=$abc$109383$new_n43506_ nq=$abc$109383$new_n49504_
 .subckt nand2_x0 i0=$abc$109383$new_n49504_ i1=$abc$109383$new_n49500_ nq=$abc$109383$new_n49505_
 .subckt nand3_x0 i0=$abc$109383$new_n49505_ i1=$abc$109383$new_n49498_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n49506_
-.subckt mx2_x2 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[26][22] i1=soc.ram.ram[30][22] q=$abc$109383$new_n49507_
+.subckt mux2_x1 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[26][22] i1=soc.ram.ram[30][22] q=$abc$109383$new_n49507_
 .subckt nand2_x0 i0=$abc$109383$new_n49507_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n49508_
 .subckt nor2_x0 i0=soc.ram.ram[27][22] i1=$abc$109383$new_n46113_ nq=$abc$109383$new_n49509_
 .subckt inv_x0 i=soc.ram.ram[31][22] nq=$abc$109383$new_n49510_
-.subckt oa22_x2 i0=$abc$109383$new_n49510_ i1=$abc$109383$new_n45691_ i2=$abc$109383$new_n44836_ q=$abc$109383$new_n49511_
-.subckt ao22_x2 i0=$abc$109383$new_n49511_ i1=$abc$109383$new_n49509_ i2=$abc$109383$new_n46154_ q=$abc$109383$new_n49512_
-.subckt a2_x2 i0=$abc$109383$new_n49512_ i1=$abc$109383$new_n49508_ q=$abc$109383$new_n49513_
+.subckt or21nand_x1 i0=$abc$109383$new_n49510_ i1=$abc$109383$new_n45691_ i2=$abc$109383$new_n44836_ nq=$abc$109383$new_n49511_
+.subckt and21nor_x1 i0=$abc$109383$new_n49511_ i1=$abc$109383$new_n49509_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n49512_
+.subckt and2_x1 i0=$abc$109383$new_n49512_ i1=$abc$109383$new_n49508_ q=$abc$109383$new_n49513_
 .subckt inv_x0 i=soc.ram.ram[29][22] nq=$abc$109383$new_n49514_
 .subckt nand2_x0 i0=$abc$109383$new_n49514_ i1=$abc$109383$new_n43829_ nq=$abc$109383$new_n49515_
-.subckt ao22_x2 i0=soc.ram.ram[25][22] i1=$abc$109383$new_n43573_ i2=$abc$109383$new_n43361_ q=$abc$109383$new_n49516_
+.subckt and21nor_x1 i0=soc.ram.ram[25][22] i1=$abc$109383$new_n43573_ i2=$abc$109383$new_n43361_ nq=$abc$109383$new_n49516_
 .subckt nand2_x0 i0=$abc$109383$new_n49516_ i1=$abc$109383$new_n49515_ nq=$abc$109383$new_n49517_
-.subckt mx2_x2 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[24][22] i1=soc.ram.ram[28][22] q=$abc$109383$new_n49518_
+.subckt mux2_x1 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[24][22] i1=soc.ram.ram[28][22] q=$abc$109383$new_n49518_
 .subckt nand2_x0 i0=$abc$109383$new_n49518_ i1=$abc$109383$new_n45053_ nq=$abc$109383$new_n49519_
-.subckt a2_x2 i0=$abc$109383$new_n49519_ i1=$abc$109383$new_n43372_ q=$abc$109383$new_n49520_
-.subckt oa22_x2 i0=$abc$109383$new_n49520_ i1=$abc$109383$new_n49517_ i2=$abc$109383$new_n43715_ q=$abc$109383$new_n49521_
-.subckt ao22_x2 i0=$abc$109383$new_n49521_ i1=$abc$109383$new_n49513_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n49522_
+.subckt and2_x1 i0=$abc$109383$new_n49519_ i1=$abc$109383$new_n43372_ q=$abc$109383$new_n49520_
+.subckt or21nand_x1 i0=$abc$109383$new_n49520_ i1=$abc$109383$new_n49517_ i2=$abc$109383$new_n43715_ nq=$abc$109383$new_n49521_
+.subckt and21nor_x1 i0=$abc$109383$new_n49521_ i1=$abc$109383$new_n49513_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n49522_
 .subckt nand2_x0 i0=$abc$109383$new_n49522_ i1=$abc$109383$new_n49506_ nq=$abc$109383$new_n49523_
-.subckt a2_x2 i0=$abc$109383$new_n49523_ i1=$abc$109383$new_n44640_ q=$abc$109383$new_n49524_
-.subckt a2_x2 i0=$abc$109383$new_n49524_ i1=$abc$109383$new_n49492_ q=$abc$109383$new_n49525_
-.subckt mx2_x2 cmd=$abc$109383$new_n43796_ i0=soc.ram.ram[32][22] i1=soc.ram.ram[33][22] q=$abc$109383$new_n49526_
-.subckt o2_x2 i0=$abc$109383$new_n49526_ i1=$abc$109383$new_n43786_ q=$abc$109383$new_n49527_
-.subckt mx2_x2 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[36][22] i1=soc.ram.ram[37][22] q=$abc$109383$new_n49528_
-.subckt ao22_x2 i0=$abc$109383$new_n49528_ i1=$abc$109383$new_n43702_ i2=$abc$109383$new_n44391_ q=$abc$109383$new_n49529_
+.subckt and2_x1 i0=$abc$109383$new_n49523_ i1=$abc$109383$new_n44640_ q=$abc$109383$new_n49524_
+.subckt and2_x1 i0=$abc$109383$new_n49524_ i1=$abc$109383$new_n49492_ q=$abc$109383$new_n49525_
+.subckt mux2_x1 cmd=$abc$109383$new_n43796_ i0=soc.ram.ram[32][22] i1=soc.ram.ram[33][22] q=$abc$109383$new_n49526_
+.subckt or2_x1 i0=$abc$109383$new_n49526_ i1=$abc$109383$new_n43786_ q=$abc$109383$new_n49527_
+.subckt mux2_x1 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[36][22] i1=soc.ram.ram[37][22] q=$abc$109383$new_n49528_
+.subckt and21nor_x1 i0=$abc$109383$new_n49528_ i1=$abc$109383$new_n43702_ i2=$abc$109383$new_n44391_ nq=$abc$109383$new_n49529_
 .subckt nand2_x0 i0=$abc$109383$new_n49529_ i1=$abc$109383$new_n49527_ nq=$abc$109383$new_n49530_
-.subckt mx2_x2 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[34][22] i1=soc.ram.ram[35][22] q=$abc$109383$new_n49531_
-.subckt o2_x2 i0=$abc$109383$new_n49531_ i1=$abc$109383$new_n44500_ q=$abc$109383$new_n49532_
-.subckt mx2_x2 cmd=$abc$109383$new_n43641_ i0=soc.ram.ram[38][22] i1=soc.ram.ram[39][22] q=$abc$109383$new_n49533_
-.subckt ao22_x2 i0=$abc$109383$new_n49533_ i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n46137_ q=$abc$109383$new_n49534_
+.subckt mux2_x1 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[34][22] i1=soc.ram.ram[35][22] q=$abc$109383$new_n49531_
+.subckt or2_x1 i0=$abc$109383$new_n49531_ i1=$abc$109383$new_n44500_ q=$abc$109383$new_n49532_
+.subckt mux2_x1 cmd=$abc$109383$new_n43641_ i0=soc.ram.ram[38][22] i1=soc.ram.ram[39][22] q=$abc$109383$new_n49533_
+.subckt and21nor_x1 i0=$abc$109383$new_n49533_ i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n46137_ nq=$abc$109383$new_n49534_
 .subckt nand2_x0 i0=$abc$109383$new_n49534_ i1=$abc$109383$new_n49532_ nq=$abc$109383$new_n49535_
 .subckt nand3_x0 i0=$abc$109383$new_n49535_ i1=$abc$109383$new_n49530_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n49536_
-.subckt mx2_x2 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[50][22] i1=soc.ram.ram[54][22] q=$abc$109383$new_n49537_
-.subckt o2_x2 i0=$abc$109383$new_n49537_ i1=$abc$109383$new_n44001_ q=$abc$109383$new_n49538_
-.subckt mx2_x2 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[51][22] i1=soc.ram.ram[55][22] q=$abc$109383$new_n49539_
-.subckt ao22_x2 i0=$abc$109383$new_n45053_ i1=$abc$109383$new_n49539_ i2=$abc$109383$new_n43650_ q=$abc$109383$new_n49540_
+.subckt mux2_x1 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[50][22] i1=soc.ram.ram[54][22] q=$abc$109383$new_n49537_
+.subckt or2_x1 i0=$abc$109383$new_n49537_ i1=$abc$109383$new_n44001_ q=$abc$109383$new_n49538_
+.subckt mux2_x1 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[51][22] i1=soc.ram.ram[55][22] q=$abc$109383$new_n49539_
+.subckt and21nor_x1 i0=$abc$109383$new_n45053_ i1=$abc$109383$new_n49539_ i2=$abc$109383$new_n43650_ nq=$abc$109383$new_n49540_
 .subckt nand2_x0 i0=$abc$109383$new_n49540_ i1=$abc$109383$new_n49538_ nq=$abc$109383$new_n49541_
-.subckt mx2_x2 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[48][22] i1=soc.ram.ram[52][22] q=$abc$109383$new_n49542_
+.subckt mux2_x1 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[48][22] i1=soc.ram.ram[52][22] q=$abc$109383$new_n49542_
 .subckt nand2_x0 i0=$abc$109383$new_n49542_ i1=$abc$109383$new_n43489_ nq=$abc$109383$new_n49543_
-.subckt o2_x2 i0=soc.ram.ram[49][22] i1=$abc$109383$new_n44838_ q=$abc$109383$new_n49544_
-.subckt ao22_x2 i0=soc.ram.ram[53][22] i1=$abc$109383$new_n43399_ i2=$abc$109383$new_n44504_ q=$abc$109383$new_n49545_
+.subckt or2_x1 i0=soc.ram.ram[49][22] i1=$abc$109383$new_n44838_ q=$abc$109383$new_n49544_
+.subckt and21nor_x1 i0=soc.ram.ram[53][22] i1=$abc$109383$new_n43399_ i2=$abc$109383$new_n44504_ nq=$abc$109383$new_n49545_
 .subckt nand2_x0 i0=$abc$109383$new_n49545_ i1=$abc$109383$new_n49544_ nq=$abc$109383$new_n49546_
-.subckt oa22_x2 i0=$abc$109383$new_n49546_ i1=$abc$109383$new_n49543_ i2=$abc$109383$new_n45279_ q=$abc$109383$new_n49547_
+.subckt or21nand_x1 i0=$abc$109383$new_n49546_ i1=$abc$109383$new_n49543_ i2=$abc$109383$new_n45279_ nq=$abc$109383$new_n49547_
 .subckt nand3_x0 i0=$abc$109383$new_n49547_ i1=$abc$109383$new_n49541_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n49548_
-.subckt oa22_x2 i0=$abc$109383$new_n49548_ i1=$abc$109383$new_n49536_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n49549_
+.subckt or21nand_x1 i0=$abc$109383$new_n49548_ i1=$abc$109383$new_n49536_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n49549_
 .subckt inv_x0 i=soc.ram.ram[5][22] nq=$abc$109383$new_n49550_
 .subckt nand2_x0 i0=$abc$109383$new_n49550_ i1=$abc$109383$new_n45668_ nq=$abc$109383$new_n49551_
-.subckt ao22_x2 i0=soc.ram.ram[1][22] i1=$abc$109383$new_n44469_ i2=$abc$109383$new_n43517_ q=$abc$109383$new_n49552_
+.subckt and21nor_x1 i0=soc.ram.ram[1][22] i1=$abc$109383$new_n44469_ i2=$abc$109383$new_n43517_ nq=$abc$109383$new_n49552_
 .subckt nand2_x0 i0=$abc$109383$new_n49552_ i1=$abc$109383$new_n49551_ nq=$abc$109383$new_n49553_
-.subckt mx2_x2 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[0][22] i1=soc.ram.ram[4][22] q=$abc$109383$new_n49554_
+.subckt mux2_x1 cmd=$abc$109383$new_n43441_ i0=soc.ram.ram[0][22] i1=soc.ram.ram[4][22] q=$abc$109383$new_n49554_
 .subckt nand2_x0 i0=$abc$109383$new_n49554_ i1=$abc$109383$new_n43707_ nq=$abc$109383$new_n49555_
-.subckt a2_x2 i0=$abc$109383$new_n49555_ i1=$abc$109383$new_n43724_ q=$abc$109383$new_n49556_
+.subckt and2_x1 i0=$abc$109383$new_n49555_ i1=$abc$109383$new_n43724_ q=$abc$109383$new_n49556_
 .subckt nand2_x0 i0=$abc$109383$new_n49556_ i1=$abc$109383$new_n49553_ nq=$abc$109383$new_n49557_
-.subckt ao22_x2 i0=soc.ram.ram[3][22] i1=$abc$109383$new_n44423_ i2=$abc$109383$new_n44401_ q=$abc$109383$new_n49558_
-.subckt ao22_x2 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[7][22] i2=$abc$109383$new_n49558_ q=$abc$109383$new_n49559_
-.subckt o2_x2 i0=soc.ram.ram[2][22] i1=$abc$109383$new_n43519_ q=$abc$109383$new_n49560_
-.subckt ao22_x2 i0=soc.ram.ram[6][22] i1=$abc$109383$new_n43364_ i2=$abc$109383$new_n43333_ q=$abc$109383$new_n49561_
-.subckt oa22_x2 i0=$abc$109383$new_n49561_ i1=$abc$109383$new_n49560_ i2=$abc$109383$new_n43723_ q=$abc$109383$new_n49562_
-.subckt ao22_x2 i0=$abc$109383$new_n49562_ i1=$abc$109383$new_n49559_ i2=$abc$109383$new_n43324_ q=$abc$109383$new_n49563_
-.subckt a2_x2 i0=$abc$109383$new_n49563_ i1=$abc$109383$new_n49557_ q=$abc$109383$new_n49564_
-.subckt o2_x2 i0=soc.ram.ram[19][22] i1=$abc$109383$new_n44187_ q=$abc$109383$new_n49565_
-.subckt ao22_x2 i0=soc.ram.ram[23][22] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n43642_ q=$abc$109383$new_n49566_
+.subckt and21nor_x1 i0=soc.ram.ram[3][22] i1=$abc$109383$new_n44423_ i2=$abc$109383$new_n44401_ nq=$abc$109383$new_n49558_
+.subckt and21nor_x1 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[7][22] i2=$abc$109383$new_n49558_ nq=$abc$109383$new_n49559_
+.subckt or2_x1 i0=soc.ram.ram[2][22] i1=$abc$109383$new_n43519_ q=$abc$109383$new_n49560_
+.subckt and21nor_x1 i0=soc.ram.ram[6][22] i1=$abc$109383$new_n43364_ i2=$abc$109383$new_n43333_ nq=$abc$109383$new_n49561_
+.subckt or21nand_x1 i0=$abc$109383$new_n49561_ i1=$abc$109383$new_n49560_ i2=$abc$109383$new_n43723_ nq=$abc$109383$new_n49562_
+.subckt and21nor_x1 i0=$abc$109383$new_n49562_ i1=$abc$109383$new_n49559_ i2=$abc$109383$new_n43324_ nq=$abc$109383$new_n49563_
+.subckt and2_x1 i0=$abc$109383$new_n49563_ i1=$abc$109383$new_n49557_ q=$abc$109383$new_n49564_
+.subckt or2_x1 i0=soc.ram.ram[19][22] i1=$abc$109383$new_n44187_ q=$abc$109383$new_n49565_
+.subckt and21nor_x1 i0=soc.ram.ram[23][22] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n43642_ nq=$abc$109383$new_n49566_
 .subckt nand2_x0 i0=$abc$109383$new_n49566_ i1=$abc$109383$new_n49565_ nq=$abc$109383$new_n49567_
 .subckt nor2_x0 i0=soc.ram.ram[18][22] i1=$abc$109383$new_n44434_ nq=$abc$109383$new_n49568_
 .subckt inv_x0 i=soc.ram.ram[22][22] nq=$abc$109383$new_n49569_
-.subckt oa22_x2 i0=$abc$109383$new_n49569_ i1=$abc$109383$new_n43627_ i2=$abc$109383$new_n43641_ q=$abc$109383$new_n49570_
-.subckt ao22_x2 i0=$abc$109383$new_n49570_ i1=$abc$109383$new_n49568_ i2=$abc$109383$new_n43439_ q=$abc$109383$new_n49571_
+.subckt or21nand_x1 i0=$abc$109383$new_n49569_ i1=$abc$109383$new_n43627_ i2=$abc$109383$new_n43641_ nq=$abc$109383$new_n49570_
+.subckt and21nor_x1 i0=$abc$109383$new_n49570_ i1=$abc$109383$new_n49568_ i2=$abc$109383$new_n43439_ nq=$abc$109383$new_n49571_
 .subckt nand2_x0 i0=$abc$109383$new_n49571_ i1=$abc$109383$new_n49567_ nq=$abc$109383$new_n49572_
-.subckt ao22_x2 i0=soc.ram.ram[17][22] i1=$abc$109383$new_n43346_ i2=$abc$109383$new_n43499_ q=$abc$109383$new_n49573_
-.subckt ao22_x2 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[21][22] i2=$abc$109383$new_n49573_ q=$abc$109383$new_n49574_
-.subckt mx2_x2 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[16][22] i1=soc.ram.ram[20][22] q=$abc$109383$new_n49575_
-.subckt oa22_x2 i0=$abc$109383$new_n43601_ i1=$abc$109383$new_n49575_ i2=$abc$109383$new_n43438_ q=$abc$109383$new_n49576_
-.subckt ao22_x2 i0=$abc$109383$new_n49576_ i1=$abc$109383$new_n49574_ i2=$abc$109383$new_n43466_ q=$abc$109383$new_n49577_
-.subckt oa22_x2 i0=$abc$109383$new_n49577_ i1=$abc$109383$new_n49572_ i2=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n49578_
-.subckt ao22_x2 i0=$abc$109383$new_n49578_ i1=$abc$109383$new_n49564_ i2=$abc$109383$new_n44087_ q=$abc$109383$new_n49579_
-.subckt oa22_x2 i0=$abc$109383$new_n49579_ i1=$abc$109383$new_n49549_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n49580_
-.subckt ao22_x2 i0=$abc$109383$new_n49580_ i1=$abc$109383$new_n49525_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n49581_
-.subckt mx2_x2 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[81][22] i1=soc.ram.ram[85][22] q=$abc$109383$new_n49582_
-.subckt mx2_x2 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[80][22] i1=soc.ram.ram[84][22] q=$abc$109383$new_n49583_
-.subckt mx2_x2 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n49583_ i1=$abc$109383$new_n49582_ q=$abc$109383$new_n49584_
+.subckt and21nor_x1 i0=soc.ram.ram[17][22] i1=$abc$109383$new_n43346_ i2=$abc$109383$new_n43499_ nq=$abc$109383$new_n49573_
+.subckt and21nor_x1 i0=$abc$109383$new_n43502_ i1=soc.ram.ram[21][22] i2=$abc$109383$new_n49573_ nq=$abc$109383$new_n49574_
+.subckt mux2_x1 cmd=$abc$109383$new_n43424_ i0=soc.ram.ram[16][22] i1=soc.ram.ram[20][22] q=$abc$109383$new_n49575_
+.subckt or21nand_x1 i0=$abc$109383$new_n43601_ i1=$abc$109383$new_n49575_ i2=$abc$109383$new_n43438_ nq=$abc$109383$new_n49576_
+.subckt and21nor_x1 i0=$abc$109383$new_n49576_ i1=$abc$109383$new_n49574_ i2=$abc$109383$new_n43466_ nq=$abc$109383$new_n49577_
+.subckt or21nand_x1 i0=$abc$109383$new_n49577_ i1=$abc$109383$new_n49572_ i2=$\soc.ram.ram$rdreg[0]$q[5] nq=$abc$109383$new_n49578_
+.subckt and21nor_x1 i0=$abc$109383$new_n49578_ i1=$abc$109383$new_n49564_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n49579_
+.subckt or21nand_x1 i0=$abc$109383$new_n49579_ i1=$abc$109383$new_n49549_ i2=$abc$109383$new_n43586_ nq=$abc$109383$new_n49580_
+.subckt and21nor_x1 i0=$abc$109383$new_n49580_ i1=$abc$109383$new_n49525_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n49581_
+.subckt mux2_x1 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[81][22] i1=soc.ram.ram[85][22] q=$abc$109383$new_n49582_
+.subckt mux2_x1 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[80][22] i1=soc.ram.ram[84][22] q=$abc$109383$new_n49583_
+.subckt mux2_x1 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n49583_ i1=$abc$109383$new_n49582_ q=$abc$109383$new_n49584_
 .subckt nor2_x0 i0=$abc$109383$new_n49584_ i1=$abc$109383$new_n46137_ nq=$abc$109383$new_n49585_
-.subckt mx2_x2 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[83][22] i1=soc.ram.ram[87][22] q=$abc$109383$new_n49586_
-.subckt mx2_x2 cmd=$abc$109383$new_n43474_ i0=soc.ram.ram[82][22] i1=soc.ram.ram[86][22] q=$abc$109383$new_n49587_
-.subckt mx2_x2 cmd=$abc$109383$new_n43641_ i0=$abc$109383$new_n49587_ i1=$abc$109383$new_n49586_ q=$abc$109383$new_n49588_
+.subckt mux2_x1 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[83][22] i1=soc.ram.ram[87][22] q=$abc$109383$new_n49586_
+.subckt mux2_x1 cmd=$abc$109383$new_n43474_ i0=soc.ram.ram[82][22] i1=soc.ram.ram[86][22] q=$abc$109383$new_n49587_
+.subckt mux2_x1 cmd=$abc$109383$new_n43641_ i0=$abc$109383$new_n49587_ i1=$abc$109383$new_n49586_ q=$abc$109383$new_n49588_
 .subckt nor2_x0 i0=$abc$109383$new_n49588_ i1=$abc$109383$new_n43448_ nq=$abc$109383$new_n49589_
-.subckt o3_x2 i0=$abc$109383$new_n49589_ i1=$abc$109383$new_n49585_ i2=$abc$109383$new_n43899_ q=$abc$109383$new_n49590_
+.subckt or3_x1 i0=$abc$109383$new_n49589_ i1=$abc$109383$new_n49585_ i2=$abc$109383$new_n43899_ q=$abc$109383$new_n49590_
 .subckt buf_x4 i=$abc$109383$new_n43345_ q=$abc$109383$new_n49591_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[88][22] i1=soc.ram.ram[92][22] q=$abc$109383$new_n49592_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[88][22] i1=soc.ram.ram[92][22] q=$abc$109383$new_n49592_
 .subckt nand2_x0 i0=$abc$109383$new_n49592_ i1=$abc$109383$new_n43494_ nq=$abc$109383$new_n49593_
 .subckt inv_x0 i=soc.ram.ram[93][22] nq=$abc$109383$new_n49594_
 .subckt nand2_x0 i0=$abc$109383$new_n49594_ i1=$abc$109383$new_n43654_ nq=$abc$109383$new_n49595_
-.subckt ao22_x2 i0=soc.ram.ram[89][22] i1=$abc$109383$new_n43755_ i2=$abc$109383$new_n43846_ q=$abc$109383$new_n49596_
+.subckt and21nor_x1 i0=soc.ram.ram[89][22] i1=$abc$109383$new_n43755_ i2=$abc$109383$new_n43846_ nq=$abc$109383$new_n49596_
 .subckt nand2_x0 i0=$abc$109383$new_n49596_ i1=$abc$109383$new_n49595_ nq=$abc$109383$new_n49597_
 .subckt nand3_x0 i0=$abc$109383$new_n49597_ i1=$abc$109383$new_n49593_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n49598_
-.subckt mx2_x2 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[90][22] i1=soc.ram.ram[94][22] q=$abc$109383$new_n49599_
-.subckt oa22_x2 i0=$abc$109383$new_n44009_ i1=$abc$109383$new_n49599_ i2=$abc$109383$new_n44494_ q=$abc$109383$new_n49600_
-.subckt ao22_x2 i0=soc.ram.ram[91][22] i1=$abc$109383$new_n44022_ i2=$abc$109383$new_n44946_ q=$abc$109383$new_n49601_
+.subckt mux2_x1 cmd=$abc$109383$new_n43379_ i0=soc.ram.ram[90][22] i1=soc.ram.ram[94][22] q=$abc$109383$new_n49599_
+.subckt or21nand_x1 i0=$abc$109383$new_n44009_ i1=$abc$109383$new_n49599_ i2=$abc$109383$new_n44494_ nq=$abc$109383$new_n49600_
+.subckt and21nor_x1 i0=soc.ram.ram[91][22] i1=$abc$109383$new_n44022_ i2=$abc$109383$new_n44946_ nq=$abc$109383$new_n49601_
 .subckt inv_x0 i=soc.ram.ram[95][22] nq=$abc$109383$new_n49602_
 .subckt nand2_x0 i0=$abc$109383$new_n49602_ i1=$abc$109383$new_n43967_ nq=$abc$109383$new_n49603_
-.subckt oa22_x2 i0=$abc$109383$new_n49603_ i1=$abc$109383$new_n49601_ i2=$abc$109383$new_n49600_ q=$abc$109383$new_n49604_
+.subckt or21nand_x1 i0=$abc$109383$new_n49603_ i1=$abc$109383$new_n49601_ i2=$abc$109383$new_n49600_ nq=$abc$109383$new_n49604_
 .subckt nand3_x0 i0=$abc$109383$new_n49604_ i1=$abc$109383$new_n49598_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n49605_
 .subckt nand3_x0 i0=$abc$109383$new_n49605_ i1=$abc$109383$new_n49590_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n49606_
-.subckt mx2_x2 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[72][22] i1=soc.ram.ram[73][22] q=$abc$109383$new_n49607_
-.subckt a2_x2 i0=$abc$109383$new_n49607_ i1=$abc$109383$new_n43530_ q=$abc$109383$new_n49608_
-.subckt mx2_x2 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[76][22] i1=soc.ram.ram[77][22] q=$abc$109383$new_n49609_
-.subckt oa22_x2 i0=$abc$109383$new_n49609_ i1=$abc$109383$new_n43937_ i2=$abc$109383$new_n43438_ q=$abc$109383$new_n49610_
-.subckt o2_x2 i0=$abc$109383$new_n49610_ i1=$abc$109383$new_n49608_ q=$abc$109383$new_n49611_
-.subckt mx2_x2 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[74][22] i1=soc.ram.ram[75][22] q=$abc$109383$new_n49612_
-.subckt a2_x2 i0=$abc$109383$new_n49612_ i1=$abc$109383$new_n43399_ q=$abc$109383$new_n49613_
-.subckt mx2_x2 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[78][22] i1=soc.ram.ram[79][22] q=$abc$109383$new_n49614_
-.subckt oa22_x2 i0=$abc$109383$new_n49614_ i1=$abc$109383$new_n44563_ i2=$abc$109383$new_n43723_ q=$abc$109383$new_n49615_
-.subckt ao22_x2 i0=$abc$109383$new_n49615_ i1=$abc$109383$new_n49613_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n49616_
+.subckt mux2_x1 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[72][22] i1=soc.ram.ram[73][22] q=$abc$109383$new_n49607_
+.subckt and2_x1 i0=$abc$109383$new_n49607_ i1=$abc$109383$new_n43530_ q=$abc$109383$new_n49608_
+.subckt mux2_x1 cmd=$abc$109383$new_n43376_ i0=soc.ram.ram[76][22] i1=soc.ram.ram[77][22] q=$abc$109383$new_n49609_
+.subckt or21nand_x1 i0=$abc$109383$new_n49609_ i1=$abc$109383$new_n43937_ i2=$abc$109383$new_n43438_ nq=$abc$109383$new_n49610_
+.subckt or2_x1 i0=$abc$109383$new_n49610_ i1=$abc$109383$new_n49608_ q=$abc$109383$new_n49611_
+.subckt mux2_x1 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[74][22] i1=soc.ram.ram[75][22] q=$abc$109383$new_n49612_
+.subckt and2_x1 i0=$abc$109383$new_n49612_ i1=$abc$109383$new_n43399_ q=$abc$109383$new_n49613_
+.subckt mux2_x1 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[78][22] i1=soc.ram.ram[79][22] q=$abc$109383$new_n49614_
+.subckt or21nand_x1 i0=$abc$109383$new_n49614_ i1=$abc$109383$new_n44563_ i2=$abc$109383$new_n43723_ nq=$abc$109383$new_n49615_
+.subckt and21nor_x1 i0=$abc$109383$new_n49615_ i1=$abc$109383$new_n49613_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n49616_
 .subckt nand2_x0 i0=$abc$109383$new_n49616_ i1=$abc$109383$new_n49611_ nq=$abc$109383$new_n49617_
 .subckt inv_x0 i=soc.ram.ram[71][22] nq=$abc$109383$new_n49618_
 .subckt nand2_x0 i0=$abc$109383$new_n49618_ i1=$abc$109383$new_n43818_ nq=$abc$109383$new_n49619_
-.subckt ao22_x2 i0=soc.ram.ram[67][22] i1=$abc$109383$new_n43475_ i2=$abc$109383$new_n43499_ q=$abc$109383$new_n49620_
+.subckt and21nor_x1 i0=soc.ram.ram[67][22] i1=$abc$109383$new_n43475_ i2=$abc$109383$new_n43499_ nq=$abc$109383$new_n49620_
 .subckt nand2_x0 i0=$abc$109383$new_n49620_ i1=$abc$109383$new_n49619_ nq=$abc$109383$new_n49621_
-.subckt mx2_x2 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[66][22] i1=soc.ram.ram[70][22] q=$abc$109383$new_n49622_
+.subckt mux2_x1 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[66][22] i1=soc.ram.ram[70][22] q=$abc$109383$new_n49622_
 .subckt nand2_x0 i0=$abc$109383$new_n49622_ i1=$abc$109383$new_n43706_ nq=$abc$109383$new_n49623_
-.subckt a2_x2 i0=$abc$109383$new_n49623_ i1=$abc$109383$new_n43579_ q=$abc$109383$new_n49624_
+.subckt and2_x1 i0=$abc$109383$new_n49623_ i1=$abc$109383$new_n43579_ q=$abc$109383$new_n49624_
 .subckt nand2_x0 i0=$abc$109383$new_n49624_ i1=$abc$109383$new_n49621_ nq=$abc$109383$new_n49625_
-.subckt mx2_x2 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[64][22] i1=soc.ram.ram[68][22] q=$abc$109383$new_n49626_
-.subckt oa22_x2 i0=$abc$109383$new_n44919_ i1=$abc$109383$new_n49626_ i2=$abc$109383$new_n44641_ q=$abc$109383$new_n49627_
-.subckt ao22_x2 i0=soc.ram.ram[65][22] i1=$abc$109383$new_n43830_ i2=$abc$109383$new_n44725_ q=$abc$109383$new_n49628_
+.subckt mux2_x1 cmd=$abc$109383$new_n43345_ i0=soc.ram.ram[64][22] i1=soc.ram.ram[68][22] q=$abc$109383$new_n49626_
+.subckt or21nand_x1 i0=$abc$109383$new_n44919_ i1=$abc$109383$new_n49626_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n49627_
+.subckt and21nor_x1 i0=soc.ram.ram[65][22] i1=$abc$109383$new_n43830_ i2=$abc$109383$new_n44725_ nq=$abc$109383$new_n49628_
 .subckt inv_x0 i=soc.ram.ram[69][22] nq=$abc$109383$new_n49629_
 .subckt nand2_x0 i0=$abc$109383$new_n49629_ i1=$abc$109383$new_n43967_ nq=$abc$109383$new_n49630_
-.subckt oa22_x2 i0=$abc$109383$new_n49630_ i1=$abc$109383$new_n49628_ i2=$abc$109383$new_n49627_ q=$abc$109383$new_n49631_
+.subckt or21nand_x1 i0=$abc$109383$new_n49630_ i1=$abc$109383$new_n49628_ i2=$abc$109383$new_n49627_ nq=$abc$109383$new_n49631_
 .subckt nand3_x0 i0=$abc$109383$new_n49631_ i1=$abc$109383$new_n49625_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n49632_
 .subckt nand3_x0 i0=$abc$109383$new_n49632_ i1=$abc$109383$new_n49617_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n49633_
 .subckt nand3_x0 i0=$abc$109383$new_n49633_ i1=$abc$109383$new_n49606_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n49634_
-.subckt mx2_x2 cmd=$abc$109383$new_n44660_ i0=soc.ram.ram[106][22] i1=soc.ram.ram[110][22] q=$abc$109383$new_n49635_
+.subckt mux2_x1 cmd=$abc$109383$new_n44660_ i0=soc.ram.ram[106][22] i1=soc.ram.ram[110][22] q=$abc$109383$new_n49635_
 .subckt nand2_x0 i0=$abc$109383$new_n49635_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n49636_
 .subckt nor2_x0 i0=soc.ram.ram[107][22] i1=$abc$109383$new_n43986_ nq=$abc$109383$new_n49637_
 .subckt inv_x0 i=soc.ram.ram[111][22] nq=$abc$109383$new_n49638_
-.subckt oa22_x2 i0=$abc$109383$new_n49638_ i1=$abc$109383$new_n44927_ i2=$abc$109383$new_n44009_ q=$abc$109383$new_n49639_
-.subckt ao22_x2 i0=$abc$109383$new_n49639_ i1=$abc$109383$new_n49637_ i2=$abc$109383$new_n49636_ q=$abc$109383$new_n49640_
+.subckt or21nand_x1 i0=$abc$109383$new_n49638_ i1=$abc$109383$new_n44927_ i2=$abc$109383$new_n44009_ nq=$abc$109383$new_n49639_
+.subckt and21nor_x1 i0=$abc$109383$new_n49639_ i1=$abc$109383$new_n49637_ i2=$abc$109383$new_n49636_ nq=$abc$109383$new_n49640_
 .subckt nand2_x0 i0=$abc$109383$new_n49640_ i1=$abc$109383$new_n43950_ nq=$abc$109383$new_n49641_
-.subckt ao22_x2 i0=soc.ram.ram[105][22] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ q=$abc$109383$new_n49642_
-.subckt ao22_x2 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[109][22] i2=$abc$109383$new_n49642_ q=$abc$109383$new_n49643_
-.subckt mx2_x2 cmd=$abc$109383$new_n45674_ i0=soc.ram.ram[104][22] i1=soc.ram.ram[108][22] q=$abc$109383$new_n49644_
-.subckt oa22_x2 i0=$abc$109383$new_n43981_ i1=$abc$109383$new_n49644_ i2=$abc$109383$new_n43843_ q=$abc$109383$new_n49645_
-.subckt ao22_x2 i0=$abc$109383$new_n49645_ i1=$abc$109383$new_n49643_ i2=$abc$109383$new_n44640_ q=$abc$109383$new_n49646_
+.subckt and21nor_x1 i0=soc.ram.ram[105][22] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ nq=$abc$109383$new_n49642_
+.subckt and21nor_x1 i0=$abc$109383$new_n43932_ i1=soc.ram.ram[109][22] i2=$abc$109383$new_n49642_ nq=$abc$109383$new_n49643_
+.subckt mux2_x1 cmd=$abc$109383$new_n45674_ i0=soc.ram.ram[104][22] i1=soc.ram.ram[108][22] q=$abc$109383$new_n49644_
+.subckt or21nand_x1 i0=$abc$109383$new_n43981_ i1=$abc$109383$new_n49644_ i2=$abc$109383$new_n43843_ nq=$abc$109383$new_n49645_
+.subckt and21nor_x1 i0=$abc$109383$new_n49645_ i1=$abc$109383$new_n49643_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n49646_
 .subckt nand2_x0 i0=$abc$109383$new_n49646_ i1=$abc$109383$new_n49641_ nq=$abc$109383$new_n49647_
-.subckt mx2_x2 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[97][22] i1=soc.ram.ram[101][22] q=$abc$109383$new_n49648_
-.subckt mx2_x2 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[96][22] i1=soc.ram.ram[100][22] q=$abc$109383$new_n49649_
-.subckt mx2_x2 cmd=$abc$109383$new_n43611_ i0=$abc$109383$new_n49649_ i1=$abc$109383$new_n49648_ q=$abc$109383$new_n49650_
-.subckt mx2_x2 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[99][22] i1=soc.ram.ram[103][22] q=$abc$109383$new_n49651_
-.subckt mx2_x2 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[98][22] i1=soc.ram.ram[102][22] q=$abc$109383$new_n49652_
-.subckt mx2_x2 cmd=$abc$109383$new_n46814_ i0=$abc$109383$new_n49652_ i1=$abc$109383$new_n49651_ q=$abc$109383$new_n49653_
-.subckt mx2_x2 cmd=$abc$109383$new_n45520_ i0=$abc$109383$new_n49653_ i1=$abc$109383$new_n49650_ q=$abc$109383$new_n49654_
+.subckt mux2_x1 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[97][22] i1=soc.ram.ram[101][22] q=$abc$109383$new_n49648_
+.subckt mux2_x1 cmd=$abc$109383$new_n43512_ i0=soc.ram.ram[96][22] i1=soc.ram.ram[100][22] q=$abc$109383$new_n49649_
+.subckt mux2_x1 cmd=$abc$109383$new_n43611_ i0=$abc$109383$new_n49649_ i1=$abc$109383$new_n49648_ q=$abc$109383$new_n49650_
+.subckt mux2_x1 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[99][22] i1=soc.ram.ram[103][22] q=$abc$109383$new_n49651_
+.subckt mux2_x1 cmd=$abc$109383$new_n43533_ i0=soc.ram.ram[98][22] i1=soc.ram.ram[102][22] q=$abc$109383$new_n49652_
+.subckt mux2_x1 cmd=$abc$109383$new_n46814_ i0=$abc$109383$new_n49652_ i1=$abc$109383$new_n49651_ q=$abc$109383$new_n49653_
+.subckt mux2_x1 cmd=$abc$109383$new_n45520_ i0=$abc$109383$new_n49653_ i1=$abc$109383$new_n49650_ q=$abc$109383$new_n49654_
 .subckt nand2_x0 i0=$abc$109383$new_n49654_ i1=$abc$109383$new_n44612_ nq=$abc$109383$new_n49655_
-.subckt a2_x2 i0=$abc$109383$new_n49655_ i1=$abc$109383$new_n44585_ q=$abc$109383$new_n49656_
+.subckt and2_x1 i0=$abc$109383$new_n49655_ i1=$abc$109383$new_n44585_ q=$abc$109383$new_n49656_
 .subckt nand2_x0 i0=$abc$109383$new_n49656_ i1=$abc$109383$new_n49647_ nq=$abc$109383$new_n49657_
-.subckt ao22_x2 i0=soc.ram.ram[115][22] i1=$abc$109383$new_n43635_ i2=$abc$109383$new_n43393_ q=$abc$109383$new_n49658_
-.subckt ao22_x2 i0=$abc$109383$new_n43398_ i1=soc.ram.ram[119][22] i2=$abc$109383$new_n49658_ q=$abc$109383$new_n49659_
-.subckt mx2_x2 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[114][22] i1=soc.ram.ram[118][22] q=$abc$109383$new_n49660_
-.subckt oa22_x2 i0=$abc$109383$new_n43594_ i1=$abc$109383$new_n49660_ i2=$abc$109383$new_n49659_ q=$abc$109383$new_n49661_
-.subckt o2_x2 i0=$abc$109383$new_n49661_ i1=$abc$109383$new_n44742_ q=$abc$109383$new_n49662_
-.subckt mx2_x2 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[112][22] i1=soc.ram.ram[116][22] q=$abc$109383$new_n49663_
+.subckt and21nor_x1 i0=soc.ram.ram[115][22] i1=$abc$109383$new_n43635_ i2=$abc$109383$new_n43393_ nq=$abc$109383$new_n49658_
+.subckt and21nor_x1 i0=$abc$109383$new_n43398_ i1=soc.ram.ram[119][22] i2=$abc$109383$new_n49658_ nq=$abc$109383$new_n49659_
+.subckt mux2_x1 cmd=$abc$109383$new_n43346_ i0=soc.ram.ram[114][22] i1=soc.ram.ram[118][22] q=$abc$109383$new_n49660_
+.subckt or21nand_x1 i0=$abc$109383$new_n43594_ i1=$abc$109383$new_n49660_ i2=$abc$109383$new_n49659_ nq=$abc$109383$new_n49661_
+.subckt or2_x1 i0=$abc$109383$new_n49661_ i1=$abc$109383$new_n44742_ q=$abc$109383$new_n49662_
+.subckt mux2_x1 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[112][22] i1=soc.ram.ram[116][22] q=$abc$109383$new_n49663_
 .subckt nand2_x0 i0=$abc$109383$new_n49663_ i1=$abc$109383$new_n44596_ nq=$abc$109383$new_n49664_
 .subckt inv_x0 i=soc.ram.ram[117][22] nq=$abc$109383$new_n49665_
 .subckt nand2_x0 i0=$abc$109383$new_n49665_ i1=$abc$109383$new_n43660_ nq=$abc$109383$new_n49666_
-.subckt ao22_x2 i0=soc.ram.ram[113][22] i1=$abc$109383$new_n43519_ i2=$abc$109383$new_n43443_ q=$abc$109383$new_n49667_
+.subckt and21nor_x1 i0=soc.ram.ram[113][22] i1=$abc$109383$new_n43519_ i2=$abc$109383$new_n43443_ nq=$abc$109383$new_n49667_
 .subckt nand2_x0 i0=$abc$109383$new_n49667_ i1=$abc$109383$new_n49666_ nq=$abc$109383$new_n49668_
 .subckt nand3_x0 i0=$abc$109383$new_n49668_ i1=$abc$109383$new_n49664_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n49669_
-.subckt a3_x2 i0=$abc$109383$new_n49669_ i1=$abc$109383$new_n49662_ i2=$abc$109383$new_n44951_ q=$abc$109383$new_n49670_
-.subckt mx2_x2 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[122][22] i1=soc.ram.ram[126][22] q=$abc$109383$new_n49671_
+.subckt and3_x1 i0=$abc$109383$new_n49669_ i1=$abc$109383$new_n49662_ i2=$abc$109383$new_n44951_ q=$abc$109383$new_n49670_
+.subckt mux2_x1 cmd=$abc$109383$new_n45668_ i0=soc.ram.ram[122][22] i1=soc.ram.ram[126][22] q=$abc$109383$new_n49671_
 .subckt nand2_x0 i0=$abc$109383$new_n49671_ i1=$abc$109383$new_n44031_ nq=$abc$109383$new_n49672_
 .subckt nor2_x0 i0=soc.ram.ram[123][22] i1=$abc$109383$new_n44605_ nq=$abc$109383$new_n49673_
 .subckt inv_x0 i=soc.ram.ram[127][22] nq=$abc$109383$new_n49674_
-.subckt oa22_x2 i0=$abc$109383$new_n49674_ i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43508_ q=$abc$109383$new_n49675_
-.subckt ao22_x2 i0=$abc$109383$new_n49675_ i1=$abc$109383$new_n49673_ i2=$abc$109383$new_n49672_ q=$abc$109383$new_n49676_
+.subckt or21nand_x1 i0=$abc$109383$new_n49674_ i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43508_ nq=$abc$109383$new_n49675_
+.subckt and21nor_x1 i0=$abc$109383$new_n49675_ i1=$abc$109383$new_n49673_ i2=$abc$109383$new_n49672_ nq=$abc$109383$new_n49676_
 .subckt nand2_x0 i0=$abc$109383$new_n49676_ i1=$abc$109383$new_n44959_ nq=$abc$109383$new_n49677_
-.subckt ao22_x2 i0=soc.ram.ram[121][22] i1=$abc$109383$new_n43868_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n49678_
-.subckt ao22_x2 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[125][22] i2=$abc$109383$new_n49678_ q=$abc$109383$new_n49679_
-.subckt mx2_x2 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[120][22] i1=soc.ram.ram[124][22] q=$abc$109383$new_n49680_
-.subckt oa22_x2 i0=$abc$109383$new_n44597_ i1=$abc$109383$new_n49680_ i2=$abc$109383$new_n45279_ q=$abc$109383$new_n49681_
-.subckt ao22_x2 i0=$abc$109383$new_n49681_ i1=$abc$109383$new_n49679_ i2=$abc$109383$new_n44767_ q=$abc$109383$new_n49682_
-.subckt oa22_x2 i0=$abc$109383$new_n49682_ i1=$abc$109383$new_n49677_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n49683_
-.subckt o2_x2 i0=$abc$109383$new_n49683_ i1=$abc$109383$new_n49670_ q=$abc$109383$new_n49684_
+.subckt and21nor_x1 i0=soc.ram.ram[121][22] i1=$abc$109383$new_n43868_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n49678_
+.subckt and21nor_x1 i0=$abc$109383$new_n44902_ i1=soc.ram.ram[125][22] i2=$abc$109383$new_n49678_ nq=$abc$109383$new_n49679_
+.subckt mux2_x1 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[120][22] i1=soc.ram.ram[124][22] q=$abc$109383$new_n49680_
+.subckt or21nand_x1 i0=$abc$109383$new_n44597_ i1=$abc$109383$new_n49680_ i2=$abc$109383$new_n45279_ nq=$abc$109383$new_n49681_
+.subckt and21nor_x1 i0=$abc$109383$new_n49681_ i1=$abc$109383$new_n49679_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n49682_
+.subckt or21nand_x1 i0=$abc$109383$new_n49682_ i1=$abc$109383$new_n49677_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n49683_
+.subckt or2_x1 i0=$abc$109383$new_n49683_ i1=$abc$109383$new_n49670_ q=$abc$109383$new_n49684_
 .subckt nand3_x0 i0=$abc$109383$new_n49684_ i1=$abc$109383$new_n49657_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n49685_
 .subckt nand3_x0 i0=$abc$109383$new_n49685_ i1=$abc$109383$new_n49634_ i2=$abc$109383$new_n44040_ nq=$abc$109383$new_n49686_
-.subckt oa22_x2 i0=$abc$109383$new_n49686_ i1=$abc$109383$new_n49581_ i2=$abc$109383$new_n49465_ q=$abc$109383$new_n49687_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n49687_ i2=$abc$109383$new_n49453_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103286
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[23] q=$abc$109383$new_n49689_
-.subckt a2_x2 i0=$abc$109383$new_n49689_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n49690_
-.subckt mx2_x2 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[82][23] i1=soc.ram.ram[86][23] q=$abc$109383$new_n49691_
+.subckt or21nand_x1 i0=$abc$109383$new_n49686_ i1=$abc$109383$new_n49581_ i2=$abc$109383$new_n49465_ nq=$abc$109383$new_n49687_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n49687_ i2=$abc$109383$new_n49453_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103286
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[23] nq=$abc$109383$new_n49689_
+.subckt and2_x1 i0=$abc$109383$new_n49689_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n49690_
+.subckt mux2_x1 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[82][23] i1=soc.ram.ram[86][23] q=$abc$109383$new_n49691_
 .subckt nand2_x0 i0=$abc$109383$new_n49691_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n49692_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[83][23] i1=soc.ram.ram[87][23] q=$abc$109383$new_n49693_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[83][23] i1=soc.ram.ram[87][23] q=$abc$109383$new_n49693_
 .subckt nand2_x0 i0=$abc$109383$new_n49693_ i1=$abc$109383$new_n44065_ nq=$abc$109383$new_n49694_
 .subckt nand3_x0 i0=$abc$109383$new_n49694_ i1=$abc$109383$new_n49692_ i2=$abc$109383$new_n44789_ nq=$abc$109383$new_n49695_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[80][23] i1=soc.ram.ram[84][23] q=$abc$109383$new_n49696_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[80][23] i1=soc.ram.ram[84][23] q=$abc$109383$new_n49696_
 .subckt nand2_x0 i0=$abc$109383$new_n49696_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n49697_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[81][23] i1=soc.ram.ram[85][23] q=$abc$109383$new_n49698_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[81][23] i1=soc.ram.ram[85][23] q=$abc$109383$new_n49698_
 .subckt nand2_x0 i0=$abc$109383$new_n49698_ i1=$abc$109383$new_n44001_ nq=$abc$109383$new_n49699_
 .subckt nand3_x0 i0=$abc$109383$new_n49699_ i1=$abc$109383$new_n49697_ i2=$abc$109383$new_n43331_ nq=$abc$109383$new_n49700_
 .subckt nand3_x0 i0=$abc$109383$new_n49700_ i1=$abc$109383$new_n49695_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n49701_
-.subckt mx2_x2 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[90][23] i1=soc.ram.ram[94][23] q=$abc$109383$new_n49702_
+.subckt mux2_x1 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[90][23] i1=soc.ram.ram[94][23] q=$abc$109383$new_n49702_
 .subckt nand2_x0 i0=$abc$109383$new_n49702_ i1=$abc$109383$new_n43335_ nq=$abc$109383$new_n49703_
-.subckt o2_x2 i0=soc.ram.ram[91][23] i1=$abc$109383$new_n44555_ q=$abc$109383$new_n49704_
+.subckt or2_x1 i0=soc.ram.ram[91][23] i1=$abc$109383$new_n44555_ q=$abc$109383$new_n49704_
 .subckt nand2_x0 i0=$abc$109383$new_n49704_ i1=$abc$109383$new_n46934_ nq=$abc$109383$new_n49705_
 .subckt inv_x0 i=soc.ram.ram[95][23] nq=$abc$109383$new_n49706_
-.subckt a2_x2 i0=$abc$109383$new_n49706_ i1=$abc$109383$new_n45081_ q=$abc$109383$new_n49707_
-.subckt ao22_x2 i0=$abc$109383$new_n49707_ i1=$abc$109383$new_n49705_ i2=$abc$109383$new_n49703_ q=$abc$109383$new_n49708_
+.subckt and2_x1 i0=$abc$109383$new_n49706_ i1=$abc$109383$new_n45081_ q=$abc$109383$new_n49707_
+.subckt and21nor_x1 i0=$abc$109383$new_n49707_ i1=$abc$109383$new_n49705_ i2=$abc$109383$new_n49703_ nq=$abc$109383$new_n49708_
 .subckt nand2_x0 i0=$abc$109383$new_n49708_ i1=$abc$109383$new_n43948_ nq=$abc$109383$new_n49709_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[88][23] i1=soc.ram.ram[92][23] q=$abc$109383$new_n49710_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[88][23] i1=soc.ram.ram[92][23] q=$abc$109383$new_n49710_
 .subckt nand2_x0 i0=$abc$109383$new_n49710_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n49711_
 .subckt inv_x0 i=soc.ram.ram[93][23] nq=$abc$109383$new_n49712_
 .subckt nand2_x0 i0=$abc$109383$new_n49712_ i1=$abc$109383$new_n45207_ nq=$abc$109383$new_n49713_
-.subckt ao22_x2 i0=soc.ram.ram[89][23] i1=$abc$109383$new_n43801_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n49714_
+.subckt and21nor_x1 i0=soc.ram.ram[89][23] i1=$abc$109383$new_n43801_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n49714_
 .subckt nand2_x0 i0=$abc$109383$new_n49714_ i1=$abc$109383$new_n49713_ nq=$abc$109383$new_n49715_
 .subckt nand3_x0 i0=$abc$109383$new_n49715_ i1=$abc$109383$new_n49711_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n49716_
 .subckt nand3_x0 i0=$abc$109383$new_n49716_ i1=$abc$109383$new_n49709_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n49717_
-.subckt oa22_x2 i0=$abc$109383$new_n49717_ i1=$abc$109383$new_n49701_ i2=$abc$109383$new_n43412_ q=$abc$109383$new_n49718_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[74][23] i1=soc.ram.ram[78][23] q=$abc$109383$new_n49719_
+.subckt or21nand_x1 i0=$abc$109383$new_n49717_ i1=$abc$109383$new_n49701_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n49718_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[74][23] i1=soc.ram.ram[78][23] q=$abc$109383$new_n49719_
 .subckt nand2_x0 i0=$abc$109383$new_n49719_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n49720_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[75][23] i1=soc.ram.ram[79][23] q=$abc$109383$new_n49721_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[75][23] i1=soc.ram.ram[79][23] q=$abc$109383$new_n49721_
 .subckt nand2_x0 i0=$abc$109383$new_n49721_ i1=$abc$109383$new_n44001_ nq=$abc$109383$new_n49722_
 .subckt nand3_x0 i0=$abc$109383$new_n49722_ i1=$abc$109383$new_n49720_ i2=$abc$109383$new_n43809_ nq=$abc$109383$new_n49723_
-.subckt mx2_x2 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[72][23] i1=soc.ram.ram[76][23] q=$abc$109383$new_n49724_
+.subckt mux2_x1 cmd=$abc$109383$new_n44237_ i0=soc.ram.ram[72][23] i1=soc.ram.ram[76][23] q=$abc$109383$new_n49724_
 .subckt nand2_x0 i0=$abc$109383$new_n49724_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n49725_
-.subckt mx2_x2 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[73][23] i1=soc.ram.ram[77][23] q=$abc$109383$new_n49726_
+.subckt mux2_x1 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[73][23] i1=soc.ram.ram[77][23] q=$abc$109383$new_n49726_
 .subckt nand2_x0 i0=$abc$109383$new_n49726_ i1=$abc$109383$new_n43890_ nq=$abc$109383$new_n49727_
 .subckt nand3_x0 i0=$abc$109383$new_n49727_ i1=$abc$109383$new_n49725_ i2=$abc$109383$new_n44741_ nq=$abc$109383$new_n49728_
 .subckt nand3_x0 i0=$abc$109383$new_n49728_ i1=$abc$109383$new_n49723_ i2=$abc$109383$new_n44499_ nq=$abc$109383$new_n49729_
 .subckt inv_x0 i=soc.ram.ram[69][23] nq=$abc$109383$new_n49730_
 .subckt nand2_x0 i0=$abc$109383$new_n49730_ i1=$abc$109383$new_n43926_ nq=$abc$109383$new_n49731_
-.subckt ao22_x2 i0=soc.ram.ram[65][23] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n49732_
+.subckt and21nor_x1 i0=soc.ram.ram[65][23] i1=$abc$109383$new_n45222_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n49732_
 .subckt nand2_x0 i0=$abc$109383$new_n49732_ i1=$abc$109383$new_n49731_ nq=$abc$109383$new_n49733_
-.subckt mx2_x2 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[64][23] i1=soc.ram.ram[68][23] q=$abc$109383$new_n49734_
+.subckt mux2_x1 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[64][23] i1=soc.ram.ram[68][23] q=$abc$109383$new_n49734_
 .subckt nand2_x0 i0=$abc$109383$new_n49734_ i1=$abc$109383$new_n46128_ nq=$abc$109383$new_n49735_
 .subckt nand3_x0 i0=$abc$109383$new_n49735_ i1=$abc$109383$new_n49733_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n49736_
 .subckt inv_x0 i=soc.ram.ram[71][23] nq=$abc$109383$new_n49737_
 .subckt nand2_x0 i0=$abc$109383$new_n49737_ i1=$abc$109383$new_n45207_ nq=$abc$109383$new_n49738_
-.subckt ao22_x2 i0=soc.ram.ram[67][23] i1=$abc$109383$new_n43887_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n49739_
+.subckt and21nor_x1 i0=soc.ram.ram[67][23] i1=$abc$109383$new_n43887_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n49739_
 .subckt nand2_x0 i0=$abc$109383$new_n49739_ i1=$abc$109383$new_n49738_ nq=$abc$109383$new_n49740_
-.subckt mx2_x2 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[66][23] i1=soc.ram.ram[70][23] q=$abc$109383$new_n49741_
+.subckt mux2_x1 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[66][23] i1=soc.ram.ram[70][23] q=$abc$109383$new_n49741_
 .subckt nand2_x0 i0=$abc$109383$new_n49741_ i1=$abc$109383$new_n44122_ nq=$abc$109383$new_n49742_
 .subckt nand3_x0 i0=$abc$109383$new_n49742_ i1=$abc$109383$new_n49740_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n49743_
 .subckt nand3_x0 i0=$abc$109383$new_n49743_ i1=$abc$109383$new_n49736_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n49744_
-.subckt oa22_x2 i0=$abc$109383$new_n49744_ i1=$abc$109383$new_n49729_ i2=$abc$109383$new_n43540_ q=$abc$109383$new_n49745_
+.subckt or21nand_x1 i0=$abc$109383$new_n49744_ i1=$abc$109383$new_n49729_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n49745_
 .subckt nand3_x0 i0=$abc$109383$new_n49745_ i1=$abc$109383$new_n49718_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n49746_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[122][23] i1=soc.ram.ram[126][23] q=$abc$109383$new_n49747_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[123][23] i1=soc.ram.ram[127][23] q=$abc$109383$new_n49748_
-.subckt mx2_x2 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n49748_ i1=$abc$109383$new_n49747_ q=$abc$109383$new_n49749_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[120][23] i1=soc.ram.ram[124][23] q=$abc$109383$new_n49750_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[121][23] i1=soc.ram.ram[125][23] q=$abc$109383$new_n49751_
-.subckt mx2_x2 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n49751_ i1=$abc$109383$new_n49750_ q=$abc$109383$new_n49752_
-.subckt mx2_x2 cmd=$abc$109383$new_n44096_ i0=$abc$109383$new_n49752_ i1=$abc$109383$new_n49749_ q=$abc$109383$new_n49753_
-.subckt o2_x2 i0=$abc$109383$new_n49753_ i1=$abc$109383$new_n44484_ q=$abc$109383$new_n49754_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[122][23] i1=soc.ram.ram[126][23] q=$abc$109383$new_n49747_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[123][23] i1=soc.ram.ram[127][23] q=$abc$109383$new_n49748_
+.subckt mux2_x1 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n49748_ i1=$abc$109383$new_n49747_ q=$abc$109383$new_n49749_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[120][23] i1=soc.ram.ram[124][23] q=$abc$109383$new_n49750_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[121][23] i1=soc.ram.ram[125][23] q=$abc$109383$new_n49751_
+.subckt mux2_x1 cmd=$abc$109383$new_n44426_ i0=$abc$109383$new_n49751_ i1=$abc$109383$new_n49750_ q=$abc$109383$new_n49752_
+.subckt mux2_x1 cmd=$abc$109383$new_n44096_ i0=$abc$109383$new_n49752_ i1=$abc$109383$new_n49749_ q=$abc$109383$new_n49753_
+.subckt or2_x1 i0=$abc$109383$new_n49753_ i1=$abc$109383$new_n44484_ q=$abc$109383$new_n49754_
 .subckt inv_x0 i=soc.ram.ram[117][23] nq=$abc$109383$new_n49755_
 .subckt nand2_x0 i0=$abc$109383$new_n49755_ i1=$abc$109383$new_n43915_ nq=$abc$109383$new_n49756_
-.subckt ao22_x2 i0=soc.ram.ram[113][23] i1=$abc$109383$new_n45306_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n49757_
+.subckt and21nor_x1 i0=soc.ram.ram[113][23] i1=$abc$109383$new_n45306_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n49757_
 .subckt nand2_x0 i0=$abc$109383$new_n49757_ i1=$abc$109383$new_n49756_ nq=$abc$109383$new_n49758_
-.subckt mx2_x2 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[112][23] i1=soc.ram.ram[116][23] q=$abc$109383$new_n49759_
+.subckt mux2_x1 cmd=$abc$109383$new_n44838_ i0=soc.ram.ram[112][23] i1=soc.ram.ram[116][23] q=$abc$109383$new_n49759_
 .subckt nand2_x0 i0=$abc$109383$new_n49759_ i1=$abc$109383$new_n44015_ nq=$abc$109383$new_n49760_
 .subckt nand3_x0 i0=$abc$109383$new_n49760_ i1=$abc$109383$new_n49758_ i2=$abc$109383$new_n45015_ nq=$abc$109383$new_n49761_
 .subckt inv_x0 i=soc.ram.ram[119][23] nq=$abc$109383$new_n49762_
 .subckt nand2_x0 i0=$abc$109383$new_n49762_ i1=$abc$109383$new_n45579_ nq=$abc$109383$new_n49763_
-.subckt ao22_x2 i0=soc.ram.ram[115][23] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n49764_
+.subckt and21nor_x1 i0=soc.ram.ram[115][23] i1=$abc$109383$new_n44431_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n49764_
 .subckt nand2_x0 i0=$abc$109383$new_n49764_ i1=$abc$109383$new_n49763_ nq=$abc$109383$new_n49765_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[114][23] i1=soc.ram.ram[118][23] q=$abc$109383$new_n49766_
-.subckt a2_x2 i0=$abc$109383$new_n49766_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n49767_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[114][23] i1=soc.ram.ram[118][23] q=$abc$109383$new_n49766_
+.subckt and2_x1 i0=$abc$109383$new_n49766_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n49767_
 .subckt nor2_x0 i0=$abc$109383$new_n49767_ i1=$abc$109383$new_n43855_ nq=$abc$109383$new_n49768_
 .subckt nand2_x0 i0=$abc$109383$new_n49768_ i1=$abc$109383$new_n49765_ nq=$abc$109383$new_n49769_
-.subckt oa22_x2 i0=$abc$109383$new_n49769_ i1=$abc$109383$new_n49761_ i2=$abc$109383$new_n45335_ q=$abc$109383$new_n49770_
+.subckt or21nand_x1 i0=$abc$109383$new_n49769_ i1=$abc$109383$new_n49761_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n49770_
 .subckt nand3_x0 i0=$abc$109383$new_n49770_ i1=$abc$109383$new_n49754_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n49771_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[106][23] i1=soc.ram.ram[107][23] q=$abc$109383$new_n49772_
-.subckt a2_x2 i0=$abc$109383$new_n49772_ i1=$abc$109383$new_n43702_ q=$abc$109383$new_n49773_
-.subckt mx2_x2 cmd=$abc$109383$new_n43556_ i0=soc.ram.ram[110][23] i1=soc.ram.ram[111][23] q=$abc$109383$new_n49774_
-.subckt oa22_x2 i0=$abc$109383$new_n49774_ i1=$abc$109383$new_n44118_ i2=$abc$109383$new_n44075_ q=$abc$109383$new_n49775_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[106][23] i1=soc.ram.ram[107][23] q=$abc$109383$new_n49772_
+.subckt and2_x1 i0=$abc$109383$new_n49772_ i1=$abc$109383$new_n43702_ q=$abc$109383$new_n49773_
+.subckt mux2_x1 cmd=$abc$109383$new_n43556_ i0=soc.ram.ram[110][23] i1=soc.ram.ram[111][23] q=$abc$109383$new_n49774_
+.subckt or21nand_x1 i0=$abc$109383$new_n49774_ i1=$abc$109383$new_n44118_ i2=$abc$109383$new_n44075_ nq=$abc$109383$new_n49775_
 .subckt nor2_x0 i0=$abc$109383$new_n49775_ i1=$abc$109383$new_n49773_ nq=$abc$109383$new_n49776_
-.subckt mx2_x2 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[104][23] i1=soc.ram.ram[105][23] q=$abc$109383$new_n49777_
-.subckt a2_x2 i0=$abc$109383$new_n49777_ i1=$abc$109383$new_n43561_ q=$abc$109383$new_n49778_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[108][23] i1=soc.ram.ram[109][23] q=$abc$109383$new_n49779_
-.subckt oa22_x2 i0=$abc$109383$new_n49779_ i1=$abc$109383$new_n43476_ i2=$abc$109383$new_n43402_ q=$abc$109383$new_n49780_
+.subckt mux2_x1 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[104][23] i1=soc.ram.ram[105][23] q=$abc$109383$new_n49777_
+.subckt and2_x1 i0=$abc$109383$new_n49777_ i1=$abc$109383$new_n43561_ q=$abc$109383$new_n49778_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[108][23] i1=soc.ram.ram[109][23] q=$abc$109383$new_n49779_
+.subckt or21nand_x1 i0=$abc$109383$new_n49779_ i1=$abc$109383$new_n43476_ i2=$abc$109383$new_n43402_ nq=$abc$109383$new_n49780_
 .subckt nor2_x0 i0=$abc$109383$new_n49780_ i1=$abc$109383$new_n49778_ nq=$abc$109383$new_n49781_
-.subckt ao22_x2 i0=$abc$109383$new_n49781_ i1=$abc$109383$new_n49776_ i2=$abc$109383$new_n44149_ q=$abc$109383$new_n49782_
-.subckt mx2_x2 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[96][23] i1=soc.ram.ram[97][23] q=$abc$109383$new_n49783_
-.subckt a2_x2 i0=$abc$109383$new_n49783_ i1=$abc$109383$new_n43561_ q=$abc$109383$new_n49784_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[100][23] i1=soc.ram.ram[101][23] q=$abc$109383$new_n49785_
-.subckt oa22_x2 i0=$abc$109383$new_n49785_ i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43402_ q=$abc$109383$new_n49786_
+.subckt and21nor_x1 i0=$abc$109383$new_n49781_ i1=$abc$109383$new_n49776_ i2=$abc$109383$new_n44149_ nq=$abc$109383$new_n49782_
+.subckt mux2_x1 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[96][23] i1=soc.ram.ram[97][23] q=$abc$109383$new_n49783_
+.subckt and2_x1 i0=$abc$109383$new_n49783_ i1=$abc$109383$new_n43561_ q=$abc$109383$new_n49784_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[100][23] i1=soc.ram.ram[101][23] q=$abc$109383$new_n49785_
+.subckt or21nand_x1 i0=$abc$109383$new_n49785_ i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43402_ nq=$abc$109383$new_n49786_
 .subckt nor2_x0 i0=$abc$109383$new_n49786_ i1=$abc$109383$new_n49784_ nq=$abc$109383$new_n49787_
-.subckt mx2_x2 cmd=$abc$109383$new_n43499_ i0=soc.ram.ram[102][23] i1=soc.ram.ram[103][23] q=$abc$109383$new_n49788_
-.subckt a2_x2 i0=$abc$109383$new_n49788_ i1=$abc$109383$new_n44424_ q=$abc$109383$new_n49789_
-.subckt mx2_x2 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[98][23] i1=soc.ram.ram[99][23] q=$abc$109383$new_n49790_
-.subckt oa22_x2 i0=$abc$109383$new_n49790_ i1=$abc$109383$new_n43530_ i2=$abc$109383$new_n43329_ q=$abc$109383$new_n49791_
+.subckt mux2_x1 cmd=$abc$109383$new_n43499_ i0=soc.ram.ram[102][23] i1=soc.ram.ram[103][23] q=$abc$109383$new_n49788_
+.subckt and2_x1 i0=$abc$109383$new_n49788_ i1=$abc$109383$new_n44424_ q=$abc$109383$new_n49789_
+.subckt mux2_x1 cmd=$abc$109383$new_n43545_ i0=soc.ram.ram[98][23] i1=soc.ram.ram[99][23] q=$abc$109383$new_n49790_
+.subckt or21nand_x1 i0=$abc$109383$new_n49790_ i1=$abc$109383$new_n43530_ i2=$abc$109383$new_n43329_ nq=$abc$109383$new_n49791_
 .subckt nor2_x0 i0=$abc$109383$new_n49791_ i1=$abc$109383$new_n49789_ nq=$abc$109383$new_n49792_
-.subckt ao22_x2 i0=$abc$109383$new_n49792_ i1=$abc$109383$new_n49787_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n49793_
-.subckt o3_x2 i0=$abc$109383$new_n49793_ i1=$abc$109383$new_n49782_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n49794_
+.subckt and21nor_x1 i0=$abc$109383$new_n49792_ i1=$abc$109383$new_n49787_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n49793_
+.subckt or3_x1 i0=$abc$109383$new_n49793_ i1=$abc$109383$new_n49782_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n49794_
 .subckt nand3_x0 i0=$abc$109383$new_n49794_ i1=$abc$109383$new_n49771_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n49795_
-.subckt a3_x2 i0=$abc$109383$new_n49795_ i1=$abc$109383$new_n49746_ i2=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n49796_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[26][23] i1=soc.ram.ram[30][23] q=$abc$109383$new_n49797_
+.subckt and3_x1 i0=$abc$109383$new_n49795_ i1=$abc$109383$new_n49746_ i2=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n49796_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[26][23] i1=soc.ram.ram[30][23] q=$abc$109383$new_n49797_
 .subckt nand2_x0 i0=$abc$109383$new_n49797_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n49798_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[27][23] i1=soc.ram.ram[31][23] q=$abc$109383$new_n49799_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[27][23] i1=soc.ram.ram[31][23] q=$abc$109383$new_n49799_
 .subckt nand2_x0 i0=$abc$109383$new_n49799_ i1=$abc$109383$new_n44626_ nq=$abc$109383$new_n49800_
 .subckt nand3_x0 i0=$abc$109383$new_n49800_ i1=$abc$109383$new_n49798_ i2=$abc$109383$new_n43948_ nq=$abc$109383$new_n49801_
-.subckt mx2_x2 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[24][23] i1=soc.ram.ram[28][23] q=$abc$109383$new_n49802_
+.subckt mux2_x1 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[24][23] i1=soc.ram.ram[28][23] q=$abc$109383$new_n49802_
 .subckt nand2_x0 i0=$abc$109383$new_n49802_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n49803_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[25][23] i1=soc.ram.ram[29][23] q=$abc$109383$new_n49804_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[25][23] i1=soc.ram.ram[29][23] q=$abc$109383$new_n49804_
 .subckt nand2_x0 i0=$abc$109383$new_n49804_ i1=$abc$109383$new_n43923_ nq=$abc$109383$new_n49805_
 .subckt nand3_x0 i0=$abc$109383$new_n49805_ i1=$abc$109383$new_n49803_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n49806_
 .subckt nand3_x0 i0=$abc$109383$new_n49806_ i1=$abc$109383$new_n49801_ i2=$abc$109383$new_n45335_ nq=$abc$109383$new_n49807_
 .subckt inv_x0 i=soc.ram.ram[23][23] nq=$abc$109383$new_n49808_
 .subckt nand2_x0 i0=$abc$109383$new_n49808_ i1=$abc$109383$new_n45207_ nq=$abc$109383$new_n49809_
-.subckt ao22_x2 i0=soc.ram.ram[19][23] i1=$abc$109383$new_n43801_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n49810_
+.subckt and21nor_x1 i0=soc.ram.ram[19][23] i1=$abc$109383$new_n43801_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n49810_
 .subckt nand2_x0 i0=$abc$109383$new_n49810_ i1=$abc$109383$new_n49809_ nq=$abc$109383$new_n49811_
-.subckt mx2_x2 cmd=$abc$109383$new_n43700_ i0=soc.ram.ram[18][23] i1=soc.ram.ram[22][23] q=$abc$109383$new_n49812_
+.subckt mux2_x1 cmd=$abc$109383$new_n43700_ i0=soc.ram.ram[18][23] i1=soc.ram.ram[22][23] q=$abc$109383$new_n49812_
 .subckt nand2_x0 i0=$abc$109383$new_n49812_ i1=$abc$109383$new_n44122_ nq=$abc$109383$new_n49813_
 .subckt nand3_x0 i0=$abc$109383$new_n49813_ i1=$abc$109383$new_n49811_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n49814_
 .subckt inv_x0 i=soc.ram.ram[21][23] nq=$abc$109383$new_n49815_
 .subckt nand2_x0 i0=$abc$109383$new_n49815_ i1=$abc$109383$new_n44405_ nq=$abc$109383$new_n49816_
-.subckt ao22_x2 i0=soc.ram.ram[17][23] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n49817_
+.subckt and21nor_x1 i0=soc.ram.ram[17][23] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n49817_
 .subckt nand2_x0 i0=$abc$109383$new_n49817_ i1=$abc$109383$new_n49816_ nq=$abc$109383$new_n49818_
-.subckt mx2_x2 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[16][23] i1=soc.ram.ram[20][23] q=$abc$109383$new_n49819_
+.subckt mux2_x1 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[16][23] i1=soc.ram.ram[20][23] q=$abc$109383$new_n49819_
 .subckt nand2_x0 i0=$abc$109383$new_n49819_ i1=$abc$109383$new_n43508_ nq=$abc$109383$new_n49820_
 .subckt nand3_x0 i0=$abc$109383$new_n49820_ i1=$abc$109383$new_n49818_ i2=$abc$109383$new_n43473_ nq=$abc$109383$new_n49821_
 .subckt nand3_x0 i0=$abc$109383$new_n49821_ i1=$abc$109383$new_n49814_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n49822_
-.subckt oa22_x2 i0=$abc$109383$new_n49822_ i1=$abc$109383$new_n49807_ i2=$abc$109383$new_n44114_ q=$abc$109383$new_n49823_
-.subckt mx2_x2 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[10][23] i1=soc.ram.ram[14][23] q=$abc$109383$new_n49824_
+.subckt or21nand_x1 i0=$abc$109383$new_n49822_ i1=$abc$109383$new_n49807_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n49823_
+.subckt mux2_x1 cmd=$abc$109383$new_n45160_ i0=soc.ram.ram[10][23] i1=soc.ram.ram[14][23] q=$abc$109383$new_n49824_
 .subckt nand2_x0 i0=$abc$109383$new_n49824_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n49825_
-.subckt mx2_x2 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[11][23] i1=soc.ram.ram[15][23] q=$abc$109383$new_n49826_
+.subckt mux2_x1 cmd=$abc$109383$new_n44404_ i0=soc.ram.ram[11][23] i1=soc.ram.ram[15][23] q=$abc$109383$new_n49826_
 .subckt nand2_x0 i0=$abc$109383$new_n49826_ i1=$abc$109383$new_n43923_ nq=$abc$109383$new_n49827_
 .subckt nand3_x0 i0=$abc$109383$new_n49827_ i1=$abc$109383$new_n49825_ i2=$abc$109383$new_n43934_ nq=$abc$109383$new_n49828_
-.subckt mx2_x2 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[8][23] i1=soc.ram.ram[12][23] q=$abc$109383$new_n49829_
+.subckt mux2_x1 cmd=$abc$109383$new_n45825_ i0=soc.ram.ram[8][23] i1=soc.ram.ram[12][23] q=$abc$109383$new_n49829_
 .subckt nand2_x0 i0=$abc$109383$new_n49829_ i1=$abc$109383$new_n46128_ nq=$abc$109383$new_n49830_
-.subckt mx2_x2 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[9][23] i1=soc.ram.ram[13][23] q=$abc$109383$new_n49831_
+.subckt mux2_x1 cmd=$abc$109383$new_n44181_ i0=soc.ram.ram[9][23] i1=soc.ram.ram[13][23] q=$abc$109383$new_n49831_
 .subckt nand2_x0 i0=$abc$109383$new_n49831_ i1=$abc$109383$new_n46696_ nq=$abc$109383$new_n49832_
 .subckt nand3_x0 i0=$abc$109383$new_n49832_ i1=$abc$109383$new_n49830_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n49833_
 .subckt nand3_x0 i0=$abc$109383$new_n49833_ i1=$abc$109383$new_n49828_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n49834_
 .subckt inv_x0 i=soc.ram.ram[7][23] nq=$abc$109383$new_n49835_
 .subckt nand2_x0 i0=$abc$109383$new_n49835_ i1=$abc$109383$new_n44405_ nq=$abc$109383$new_n49836_
-.subckt ao22_x2 i0=soc.ram.ram[3][23] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n49837_
+.subckt and21nor_x1 i0=soc.ram.ram[3][23] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n49837_
 .subckt nand2_x0 i0=$abc$109383$new_n49837_ i1=$abc$109383$new_n49836_ nq=$abc$109383$new_n49838_
-.subckt mx2_x2 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[2][23] i1=soc.ram.ram[6][23] q=$abc$109383$new_n49839_
+.subckt mux2_x1 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[2][23] i1=soc.ram.ram[6][23] q=$abc$109383$new_n49839_
 .subckt nand2_x0 i0=$abc$109383$new_n49839_ i1=$abc$109383$new_n43508_ nq=$abc$109383$new_n49840_
 .subckt nand3_x0 i0=$abc$109383$new_n49840_ i1=$abc$109383$new_n49838_ i2=$abc$109383$new_n44916_ nq=$abc$109383$new_n49841_
 .subckt inv_x0 i=soc.ram.ram[5][23] nq=$abc$109383$new_n49842_
 .subckt nand2_x0 i0=$abc$109383$new_n49842_ i1=$abc$109383$new_n44450_ nq=$abc$109383$new_n49843_
-.subckt ao22_x2 i0=soc.ram.ram[1][23] i1=$abc$109383$new_n43925_ i2=$abc$109383$new_n43847_ q=$abc$109383$new_n49844_
+.subckt and21nor_x1 i0=soc.ram.ram[1][23] i1=$abc$109383$new_n43925_ i2=$abc$109383$new_n43847_ nq=$abc$109383$new_n49844_
 .subckt nand2_x0 i0=$abc$109383$new_n49844_ i1=$abc$109383$new_n49843_ nq=$abc$109383$new_n49845_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[0][23] i1=soc.ram.ram[4][23] q=$abc$109383$new_n49846_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[0][23] i1=soc.ram.ram[4][23] q=$abc$109383$new_n49846_
 .subckt nand2_x0 i0=$abc$109383$new_n49846_ i1=$abc$109383$new_n44485_ nq=$abc$109383$new_n49847_
 .subckt nand3_x0 i0=$abc$109383$new_n49847_ i1=$abc$109383$new_n49845_ i2=$abc$109383$new_n43855_ nq=$abc$109383$new_n49848_
 .subckt nand3_x0 i0=$abc$109383$new_n49848_ i1=$abc$109383$new_n49841_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n49849_
-.subckt oa22_x2 i0=$abc$109383$new_n49849_ i1=$abc$109383$new_n49834_ i2=$abc$109383$new_n43540_ q=$abc$109383$new_n49850_
+.subckt or21nand_x1 i0=$abc$109383$new_n49849_ i1=$abc$109383$new_n49834_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n49850_
 .subckt nand3_x0 i0=$abc$109383$new_n49850_ i1=$abc$109383$new_n49823_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n49851_
-.subckt o2_x2 i0=soc.ram.ram[59][23] i1=$abc$109383$new_n43925_ q=$abc$109383$new_n49852_
-.subckt ao22_x2 i0=soc.ram.ram[63][23] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n49853_
+.subckt or2_x1 i0=soc.ram.ram[59][23] i1=$abc$109383$new_n43925_ q=$abc$109383$new_n49852_
+.subckt and21nor_x1 i0=soc.ram.ram[63][23] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n49853_
 .subckt nand2_x0 i0=$abc$109383$new_n49853_ i1=$abc$109383$new_n49852_ nq=$abc$109383$new_n49854_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[58][23] i1=soc.ram.ram[62][23] q=$abc$109383$new_n49855_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[58][23] i1=soc.ram.ram[62][23] q=$abc$109383$new_n49855_
 .subckt nand2_x0 i0=$abc$109383$new_n49855_ i1=$abc$109383$new_n43623_ nq=$abc$109383$new_n49856_
-.subckt oa22_x2 i0=$abc$109383$new_n49856_ i1=$abc$109383$new_n49854_ i2=$abc$109383$new_n43712_ q=$abc$109383$new_n49857_
-.subckt mx2_x2 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[50][23] i1=soc.ram.ram[54][23] q=$abc$109383$new_n49858_
-.subckt mx2_x2 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[51][23] i1=soc.ram.ram[55][23] q=$abc$109383$new_n49859_
-.subckt mx2_x2 cmd=$abc$109383$new_n43731_ i0=$abc$109383$new_n49859_ i1=$abc$109383$new_n49858_ q=$abc$109383$new_n49860_
+.subckt or21nand_x1 i0=$abc$109383$new_n49856_ i1=$abc$109383$new_n49854_ i2=$abc$109383$new_n43712_ nq=$abc$109383$new_n49857_
+.subckt mux2_x1 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[50][23] i1=soc.ram.ram[54][23] q=$abc$109383$new_n49858_
+.subckt mux2_x1 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[51][23] i1=soc.ram.ram[55][23] q=$abc$109383$new_n49859_
+.subckt mux2_x1 cmd=$abc$109383$new_n43731_ i0=$abc$109383$new_n49859_ i1=$abc$109383$new_n49858_ q=$abc$109383$new_n49860_
 .subckt nand2_x0 i0=$abc$109383$new_n49860_ i1=$abc$109383$new_n44610_ nq=$abc$109383$new_n49861_
-.subckt a3_x2 i0=$abc$109383$new_n49861_ i1=$abc$109383$new_n49857_ i2=$abc$109383$new_n43934_ q=$abc$109383$new_n49862_
-.subckt mx2_x2 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[49][23] i1=soc.ram.ram[53][23] q=$abc$109383$new_n49863_
-.subckt ao22_x2 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n49863_ i2=$abc$109383$new_n43836_ q=$abc$109383$new_n49864_
-.subckt mx2_x2 cmd=$abc$109383$new_n43742_ i0=soc.ram.ram[48][23] i1=soc.ram.ram[52][23] q=$abc$109383$new_n49865_
-.subckt ao22_x2 i0=$abc$109383$new_n44402_ i1=$abc$109383$new_n49865_ i2=$abc$109383$new_n49864_ q=$abc$109383$new_n49866_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[57][23] i1=soc.ram.ram[61][23] q=$abc$109383$new_n49867_
-.subckt ao22_x2 i0=$abc$109383$new_n43706_ i1=$abc$109383$new_n49867_ i2=$abc$109383$new_n43647_ q=$abc$109383$new_n49868_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[56][23] i1=soc.ram.ram[60][23] q=$abc$109383$new_n49869_
-.subckt ao22_x2 i0=$abc$109383$new_n45093_ i1=$abc$109383$new_n49869_ i2=$abc$109383$new_n49868_ q=$abc$109383$new_n49870_
+.subckt and3_x1 i0=$abc$109383$new_n49861_ i1=$abc$109383$new_n49857_ i2=$abc$109383$new_n43934_ q=$abc$109383$new_n49862_
+.subckt mux2_x1 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[49][23] i1=soc.ram.ram[53][23] q=$abc$109383$new_n49863_
+.subckt and21nor_x1 i0=$abc$109383$new_n43633_ i1=$abc$109383$new_n49863_ i2=$abc$109383$new_n43836_ nq=$abc$109383$new_n49864_
+.subckt mux2_x1 cmd=$abc$109383$new_n43742_ i0=soc.ram.ram[48][23] i1=soc.ram.ram[52][23] q=$abc$109383$new_n49865_
+.subckt and21nor_x1 i0=$abc$109383$new_n44402_ i1=$abc$109383$new_n49865_ i2=$abc$109383$new_n49864_ nq=$abc$109383$new_n49866_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[57][23] i1=soc.ram.ram[61][23] q=$abc$109383$new_n49867_
+.subckt and21nor_x1 i0=$abc$109383$new_n43706_ i1=$abc$109383$new_n49867_ i2=$abc$109383$new_n43647_ nq=$abc$109383$new_n49868_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[56][23] i1=soc.ram.ram[60][23] q=$abc$109383$new_n49869_
+.subckt and21nor_x1 i0=$abc$109383$new_n45093_ i1=$abc$109383$new_n49869_ i2=$abc$109383$new_n49868_ nq=$abc$109383$new_n49870_
 .subckt nor2_x0 i0=$abc$109383$new_n49870_ i1=$abc$109383$new_n49866_ nq=$abc$109383$new_n49871_
-.subckt oa22_x2 i0=$abc$109383$new_n43753_ i1=$abc$109383$new_n49871_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n49872_
-.subckt o2_x2 i0=$abc$109383$new_n49872_ i1=$abc$109383$new_n49862_ q=$abc$109383$new_n49873_
-.subckt o2_x2 i0=soc.ram.ram[41][23] i1=$abc$109383$new_n45825_ q=$abc$109383$new_n49874_
-.subckt ao22_x2 i0=soc.ram.ram[45][23] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n49875_
-.subckt a2_x2 i0=$abc$109383$new_n49875_ i1=$abc$109383$new_n49874_ q=$abc$109383$new_n49876_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[40][23] i1=soc.ram.ram[44][23] q=$abc$109383$new_n49877_
-.subckt a2_x2 i0=$abc$109383$new_n49877_ i1=$abc$109383$new_n43634_ q=$abc$109383$new_n49878_
-.subckt ao22_x2 i0=$abc$109383$new_n49878_ i1=$abc$109383$new_n49876_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n49879_
-.subckt mx2_x2 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[32][23] i1=soc.ram.ram[36][23] q=$abc$109383$new_n49880_
-.subckt mx2_x2 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[33][23] i1=soc.ram.ram[37][23] q=$abc$109383$new_n49881_
-.subckt mx2_x2 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n49881_ i1=$abc$109383$new_n49880_ q=$abc$109383$new_n49882_
-.subckt oa22_x2 i0=$abc$109383$new_n49882_ i1=$abc$109383$new_n45069_ i2=$abc$109383$new_n44212_ q=$abc$109383$new_n49883_
-.subckt o2_x2 i0=$abc$109383$new_n49883_ i1=$abc$109383$new_n49879_ q=$abc$109383$new_n49884_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[35][23] i1=soc.ram.ram[39][23] q=$abc$109383$new_n49885_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[34][23] i1=soc.ram.ram[38][23] q=$abc$109383$new_n49886_
-.subckt mx2_x2 cmd=$abc$109383$new_n44143_ i0=$abc$109383$new_n49886_ i1=$abc$109383$new_n49885_ q=$abc$109383$new_n49887_
+.subckt or21nand_x1 i0=$abc$109383$new_n43753_ i1=$abc$109383$new_n49871_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n49872_
+.subckt or2_x1 i0=$abc$109383$new_n49872_ i1=$abc$109383$new_n49862_ q=$abc$109383$new_n49873_
+.subckt or2_x1 i0=soc.ram.ram[41][23] i1=$abc$109383$new_n45825_ q=$abc$109383$new_n49874_
+.subckt and21nor_x1 i0=soc.ram.ram[45][23] i1=$abc$109383$new_n43804_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n49875_
+.subckt and2_x1 i0=$abc$109383$new_n49875_ i1=$abc$109383$new_n49874_ q=$abc$109383$new_n49876_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=soc.ram.ram[40][23] i1=soc.ram.ram[44][23] q=$abc$109383$new_n49877_
+.subckt and2_x1 i0=$abc$109383$new_n49877_ i1=$abc$109383$new_n43634_ q=$abc$109383$new_n49878_
+.subckt and21nor_x1 i0=$abc$109383$new_n49878_ i1=$abc$109383$new_n49876_ i2=$abc$109383$new_n43354_ nq=$abc$109383$new_n49879_
+.subckt mux2_x1 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[32][23] i1=soc.ram.ram[36][23] q=$abc$109383$new_n49880_
+.subckt mux2_x1 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[33][23] i1=soc.ram.ram[37][23] q=$abc$109383$new_n49881_
+.subckt mux2_x1 cmd=$abc$109383$new_n43334_ i0=$abc$109383$new_n49881_ i1=$abc$109383$new_n49880_ q=$abc$109383$new_n49882_
+.subckt or21nand_x1 i0=$abc$109383$new_n49882_ i1=$abc$109383$new_n45069_ i2=$abc$109383$new_n44212_ nq=$abc$109383$new_n49883_
+.subckt or2_x1 i0=$abc$109383$new_n49883_ i1=$abc$109383$new_n49879_ q=$abc$109383$new_n49884_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[35][23] i1=soc.ram.ram[39][23] q=$abc$109383$new_n49885_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[34][23] i1=soc.ram.ram[38][23] q=$abc$109383$new_n49886_
+.subckt mux2_x1 cmd=$abc$109383$new_n44143_ i0=$abc$109383$new_n49886_ i1=$abc$109383$new_n49885_ q=$abc$109383$new_n49887_
 .subckt nand2_x0 i0=$abc$109383$new_n49887_ i1=$abc$109383$new_n44086_ nq=$abc$109383$new_n49888_
-.subckt o2_x2 i0=soc.ram.ram[43][23] i1=$abc$109383$new_n45306_ q=$abc$109383$new_n49889_
-.subckt ao22_x2 i0=soc.ram.ram[47][23] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n43797_ q=$abc$109383$new_n49890_
+.subckt or2_x1 i0=soc.ram.ram[43][23] i1=$abc$109383$new_n45306_ q=$abc$109383$new_n49889_
+.subckt and21nor_x1 i0=soc.ram.ram[47][23] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n43797_ nq=$abc$109383$new_n49890_
 .subckt nand2_x0 i0=$abc$109383$new_n49890_ i1=$abc$109383$new_n49889_ nq=$abc$109383$new_n49891_
-.subckt mx2_x2 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[42][23] i1=soc.ram.ram[46][23] q=$abc$109383$new_n49892_
+.subckt mux2_x1 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[42][23] i1=soc.ram.ram[46][23] q=$abc$109383$new_n49892_
 .subckt nand2_x0 i0=$abc$109383$new_n49892_ i1=$abc$109383$new_n44597_ nq=$abc$109383$new_n49893_
-.subckt oa22_x2 i0=$abc$109383$new_n49893_ i1=$abc$109383$new_n49891_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n49894_
+.subckt or21nand_x1 i0=$abc$109383$new_n49893_ i1=$abc$109383$new_n49891_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n49894_
 .subckt nand3_x0 i0=$abc$109383$new_n49894_ i1=$abc$109383$new_n49888_ i2=$abc$109383$new_n44917_ nq=$abc$109383$new_n49895_
 .subckt nand3_x0 i0=$abc$109383$new_n49895_ i1=$abc$109383$new_n49884_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n49896_
 .subckt nand3_x0 i0=$abc$109383$new_n49896_ i1=$abc$109383$new_n49873_ i2=$abc$109383$new_n45534_ nq=$abc$109383$new_n49897_
-.subckt a3_x2 i0=$abc$109383$new_n49897_ i1=$abc$109383$new_n49851_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n49898_
-.subckt ao22_x2 i0=$abc$109383$new_n49898_ i1=$abc$109383$new_n49796_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n49899_
+.subckt and3_x1 i0=$abc$109383$new_n49897_ i1=$abc$109383$new_n49851_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n49898_
+.subckt and21nor_x1 i0=$abc$109383$new_n49898_ i1=$abc$109383$new_n49796_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n49899_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[23] nq=$abc$109383$new_n49900_
-.subckt o2_x2 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n49900_ q=$abc$109383$new_n49901_
-.subckt o3_x2 i0=$abc$109383$new_n49901_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ q=$abc$109383$new_n49902_
+.subckt or2_x1 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n49900_ q=$abc$109383$new_n49901_
+.subckt or3_x1 i0=$abc$109383$new_n49901_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ q=$abc$109383$new_n49902_
 .subckt nand4_x0 i0=$abc$109383$new_n44875_ i1=$abc$109383$new_n44282_ i2=$abc$109383$new_n47238_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[23] nq=$abc$109383$new_n49903_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[23] nq=$abc$109383$new_n49904_
 .subckt nand3_x0 i0=$abc$109383$new_n28804_ i1=$abc$109383$new_n28801_ i2=soc.hyperram.sr[23] nq=$abc$109383$new_n49905_
-.subckt a2_x2 i0=$abc$109383$new_n49905_ i1=$abc$109383$new_n49904_ q=$abc$109383$new_n49906_
+.subckt and2_x1 i0=$abc$109383$new_n49905_ i1=$abc$109383$new_n49904_ q=$abc$109383$new_n49906_
 .subckt nand4_x0 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n28378_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[23] nq=$abc$109383$new_n49907_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[23] nq=$abc$109383$new_n49908_
 .subckt nor2_x0 i0=$abc$109383$new_n22004_ i1=$abc$109383$new_n49908_ nq=$abc$109383$new_n49909_
 .subckt nand4_x0 i0=$abc$109383$new_n49909_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n27638_ i3=$abc$109383$new_n28378_ nq=$abc$109383$new_n49910_
-.subckt a2_x2 i0=$abc$109383$new_n49910_ i1=$abc$109383$new_n49907_ q=$abc$109383$new_n49911_
+.subckt and2_x1 i0=$abc$109383$new_n49910_ i1=$abc$109383$new_n49907_ q=$abc$109383$new_n49911_
 .subckt nand4_x0 i0=$abc$109383$new_n49911_ i1=$abc$109383$new_n49906_ i2=$abc$109383$new_n49903_ i3=$abc$109383$new_n49902_ nq=$abc$109383$new_n49912_
-.subckt o2_x2 i0=$abc$109383$new_n49912_ i1=$abc$109383$new_n49899_ q=$abc$109383$new_n49913_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n49913_ i2=$abc$109383$new_n49690_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103290
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[24] q=$abc$109383$new_n49915_
-.subckt a2_x2 i0=$abc$109383$new_n49915_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n49916_
+.subckt or2_x1 i0=$abc$109383$new_n49912_ i1=$abc$109383$new_n49899_ q=$abc$109383$new_n49913_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n49913_ i2=$abc$109383$new_n49690_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103290
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[24] nq=$abc$109383$new_n49915_
+.subckt and2_x1 i0=$abc$109383$new_n49915_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n49916_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[24] nq=$abc$109383$new_n49917_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[24] nq=$abc$109383$new_n49918_
 .subckt nand3_x0 i0=$abc$109383$new_n20241_ i1=$abc$109383$new_n20803_ i2=soc.bridge.csr_bridge_1.wb__dat_r[24] nq=$abc$109383$new_n49919_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[24] nq=$abc$109383$new_n49920_
-.subckt o2_x2 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n49920_ q=$abc$109383$new_n49921_
+.subckt or2_x1 i0=$abc$109383$new_n19690_ i1=$abc$109383$new_n49920_ q=$abc$109383$new_n49921_
 .subckt nand2_x0 i0=$abc$109383$new_n49921_ i1=$abc$109383$new_n49919_ nq=$abc$109383$new_n49922_
 .subckt nand4_x0 i0=$abc$109383$new_n49922_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n49923_
-.subckt o4_x2 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28619_ q=$abc$109383$new_n49924_
-.subckt a3_x2 i0=$abc$109383$new_n49924_ i1=$abc$109383$new_n49923_ i2=$abc$109383$new_n49918_ q=$abc$109383$new_n49925_
-.subckt mx2_x2 cmd=$abc$109383$new_n22004_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[24] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[24] q=$abc$109383$new_n49926_
+.subckt or4_x1 i0=$abc$109383$new_n43315_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n43311_ i3=$abc$109383$new_n28619_ q=$abc$109383$new_n49924_
+.subckt and3_x1 i0=$abc$109383$new_n49924_ i1=$abc$109383$new_n49923_ i2=$abc$109383$new_n49918_ q=$abc$109383$new_n49925_
+.subckt mux2_x1 cmd=$abc$109383$new_n22004_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[24] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[24] q=$abc$109383$new_n49926_
 .subckt nand2_x0 i0=$abc$109383$new_n49926_ i1=$abc$109383$new_n27646_ nq=$abc$109383$new_n49927_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[24] nq=$abc$109383$new_n49928_
 .subckt nand4_x0 i0=$abc$109383$new_n49928_ i1=$abc$109383$new_n49927_ i2=$abc$109383$new_n49925_ i3=$abc$109383$new_n49917_ nq=$abc$109383$new_n49929_
-.subckt mx2_x2 cmd=$abc$109383$new_n45674_ i0=soc.ram.ram[114][24] i1=soc.ram.ram[118][24] q=$abc$109383$new_n49930_
+.subckt mux2_x1 cmd=$abc$109383$new_n45674_ i0=soc.ram.ram[114][24] i1=soc.ram.ram[118][24] q=$abc$109383$new_n49930_
 .subckt nand2_x0 i0=$abc$109383$new_n49930_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n49931_
-.subckt o2_x2 i0=soc.ram.ram[115][24] i1=$abc$109383$new_n44605_ q=$abc$109383$new_n49932_
+.subckt or2_x1 i0=soc.ram.ram[115][24] i1=$abc$109383$new_n44605_ q=$abc$109383$new_n49932_
 .subckt nand2_x0 i0=$abc$109383$new_n49932_ i1=$abc$109383$new_n44725_ nq=$abc$109383$new_n49933_
 .subckt inv_x0 i=soc.ram.ram[119][24] nq=$abc$109383$new_n49934_
-.subckt a2_x2 i0=$abc$109383$new_n49934_ i1=$abc$109383$new_n43966_ q=$abc$109383$new_n49935_
-.subckt ao22_x2 i0=$abc$109383$new_n49935_ i1=$abc$109383$new_n49933_ i2=$abc$109383$new_n49931_ q=$abc$109383$new_n49936_
+.subckt and2_x1 i0=$abc$109383$new_n49934_ i1=$abc$109383$new_n43966_ q=$abc$109383$new_n49935_
+.subckt and21nor_x1 i0=$abc$109383$new_n49935_ i1=$abc$109383$new_n49933_ i2=$abc$109383$new_n49931_ nq=$abc$109383$new_n49936_
 .subckt nand2_x0 i0=$abc$109383$new_n49936_ i1=$abc$109383$new_n43844_ nq=$abc$109383$new_n49937_
 .subckt inv_x0 i=soc.ram.ram[117][24] nq=$abc$109383$new_n49938_
 .subckt nand2_x0 i0=$abc$109383$new_n49938_ i1=$abc$109383$new_n43958_ nq=$abc$109383$new_n49939_
-.subckt ao22_x2 i0=soc.ram.ram[113][24] i1=$abc$109383$new_n44927_ i2=$abc$109383$new_n44725_ q=$abc$109383$new_n49940_
+.subckt and21nor_x1 i0=soc.ram.ram[113][24] i1=$abc$109383$new_n44927_ i2=$abc$109383$new_n44725_ nq=$abc$109383$new_n49940_
 .subckt nand2_x0 i0=$abc$109383$new_n49940_ i1=$abc$109383$new_n49939_ nq=$abc$109383$new_n49941_
-.subckt mx2_x2 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[112][24] i1=soc.ram.ram[116][24] q=$abc$109383$new_n49942_
+.subckt mux2_x1 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[112][24] i1=soc.ram.ram[116][24] q=$abc$109383$new_n49942_
 .subckt nand2_x0 i0=$abc$109383$new_n49942_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n49943_
-.subckt a2_x2 i0=$abc$109383$new_n49943_ i1=$abc$109383$new_n45016_ q=$abc$109383$new_n49944_
+.subckt and2_x1 i0=$abc$109383$new_n49943_ i1=$abc$109383$new_n45016_ q=$abc$109383$new_n49944_
 .subckt nand2_x0 i0=$abc$109383$new_n49944_ i1=$abc$109383$new_n49941_ nq=$abc$109383$new_n49945_
 .subckt nand3_x0 i0=$abc$109383$new_n49945_ i1=$abc$109383$new_n49937_ i2=$abc$109383$new_n43840_ nq=$abc$109383$new_n49946_
 .subckt inv_x0 i=soc.ram.ram[125][24] nq=$abc$109383$new_n49947_
 .subckt nand2_x0 i0=$abc$109383$new_n49947_ i1=$abc$109383$new_n43958_ nq=$abc$109383$new_n49948_
-.subckt ao22_x2 i0=soc.ram.ram[121][24] i1=$abc$109383$new_n44927_ i2=$abc$109383$new_n44725_ q=$abc$109383$new_n49949_
+.subckt and21nor_x1 i0=soc.ram.ram[121][24] i1=$abc$109383$new_n44927_ i2=$abc$109383$new_n44725_ nq=$abc$109383$new_n49949_
 .subckt nand2_x0 i0=$abc$109383$new_n49949_ i1=$abc$109383$new_n49948_ nq=$abc$109383$new_n49950_
-.subckt mx2_x2 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[120][24] i1=soc.ram.ram[124][24] q=$abc$109383$new_n49951_
+.subckt mux2_x1 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[120][24] i1=soc.ram.ram[124][24] q=$abc$109383$new_n49951_
 .subckt nand2_x0 i0=$abc$109383$new_n49951_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n49952_
-.subckt a2_x2 i0=$abc$109383$new_n49952_ i1=$abc$109383$new_n45016_ q=$abc$109383$new_n49953_
+.subckt and2_x1 i0=$abc$109383$new_n49952_ i1=$abc$109383$new_n45016_ q=$abc$109383$new_n49953_
 .subckt nand2_x0 i0=$abc$109383$new_n49953_ i1=$abc$109383$new_n49950_ nq=$abc$109383$new_n49954_
-.subckt mx2_x2 cmd=$abc$109383$new_n46323_ i0=soc.ram.ram[122][24] i1=soc.ram.ram[126][24] q=$abc$109383$new_n49955_
+.subckt mux2_x1 cmd=$abc$109383$new_n46323_ i0=soc.ram.ram[122][24] i1=soc.ram.ram[126][24] q=$abc$109383$new_n49955_
 .subckt nand2_x0 i0=$abc$109383$new_n49955_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n49956_
 .subckt inv_x0 i=soc.ram.ram[127][24] nq=$abc$109383$new_n49957_
 .subckt nand2_x0 i0=$abc$109383$new_n49957_ i1=$abc$109383$new_n43967_ nq=$abc$109383$new_n49958_
-.subckt ao22_x2 i0=soc.ram.ram[123][24] i1=$abc$109383$new_n43908_ i2=$abc$109383$new_n44590_ q=$abc$109383$new_n49959_
+.subckt and21nor_x1 i0=soc.ram.ram[123][24] i1=$abc$109383$new_n43908_ i2=$abc$109383$new_n44590_ nq=$abc$109383$new_n49959_
 .subckt nand2_x0 i0=$abc$109383$new_n49959_ i1=$abc$109383$new_n49958_ nq=$abc$109383$new_n49960_
 .subckt nand3_x0 i0=$abc$109383$new_n49960_ i1=$abc$109383$new_n49956_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n49961_
 .subckt nand3_x0 i0=$abc$109383$new_n49961_ i1=$abc$109383$new_n49954_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n49962_
 .subckt nand3_x0 i0=$abc$109383$new_n49962_ i1=$abc$109383$new_n49946_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n49963_
 .subckt inv_x0 i=soc.ram.ram[109][24] nq=$abc$109383$new_n49964_
 .subckt nand2_x0 i0=$abc$109383$new_n49964_ i1=$abc$109383$new_n43958_ nq=$abc$109383$new_n49965_
-.subckt ao22_x2 i0=soc.ram.ram[105][24] i1=$abc$109383$new_n44022_ i2=$abc$109383$new_n44946_ q=$abc$109383$new_n49966_
+.subckt and21nor_x1 i0=soc.ram.ram[105][24] i1=$abc$109383$new_n44022_ i2=$abc$109383$new_n44946_ nq=$abc$109383$new_n49966_
 .subckt nand2_x0 i0=$abc$109383$new_n49966_ i1=$abc$109383$new_n49965_ nq=$abc$109383$new_n49967_
-.subckt mx2_x2 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[104][24] i1=soc.ram.ram[108][24] q=$abc$109383$new_n49968_
+.subckt mux2_x1 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[104][24] i1=soc.ram.ram[108][24] q=$abc$109383$new_n49968_
 .subckt nand2_x0 i0=$abc$109383$new_n49968_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n49969_
-.subckt a2_x2 i0=$abc$109383$new_n49969_ i1=$abc$109383$new_n43991_ q=$abc$109383$new_n49970_
+.subckt and2_x1 i0=$abc$109383$new_n49969_ i1=$abc$109383$new_n43991_ q=$abc$109383$new_n49970_
 .subckt nand2_x0 i0=$abc$109383$new_n49970_ i1=$abc$109383$new_n49967_ nq=$abc$109383$new_n49971_
-.subckt mx2_x2 cmd=$abc$109383$new_n44660_ i0=soc.ram.ram[106][24] i1=soc.ram.ram[110][24] q=$abc$109383$new_n49972_
+.subckt mux2_x1 cmd=$abc$109383$new_n44660_ i0=soc.ram.ram[106][24] i1=soc.ram.ram[110][24] q=$abc$109383$new_n49972_
 .subckt nand2_x0 i0=$abc$109383$new_n49972_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n49973_
 .subckt inv_x0 i=soc.ram.ram[111][24] nq=$abc$109383$new_n49974_
 .subckt nand2_x0 i0=$abc$109383$new_n49974_ i1=$abc$109383$new_n43986_ nq=$abc$109383$new_n49975_
-.subckt ao22_x2 i0=soc.ram.ram[107][24] i1=$abc$109383$new_n43852_ i2=$abc$109383$new_n44725_ q=$abc$109383$new_n49976_
+.subckt and21nor_x1 i0=soc.ram.ram[107][24] i1=$abc$109383$new_n43852_ i2=$abc$109383$new_n44725_ nq=$abc$109383$new_n49976_
 .subckt nand2_x0 i0=$abc$109383$new_n49976_ i1=$abc$109383$new_n49975_ nq=$abc$109383$new_n49977_
 .subckt nand3_x0 i0=$abc$109383$new_n49977_ i1=$abc$109383$new_n49973_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n49978_
 .subckt nand3_x0 i0=$abc$109383$new_n49978_ i1=$abc$109383$new_n49971_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n49979_
-.subckt mx2_x2 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[99][24] i1=soc.ram.ram[103][24] q=$abc$109383$new_n49980_
+.subckt mux2_x1 cmd=$abc$109383$new_n45322_ i0=soc.ram.ram[99][24] i1=soc.ram.ram[103][24] q=$abc$109383$new_n49980_
 .subckt nand2_x0 i0=$abc$109383$new_n49980_ i1=$abc$109383$new_n44946_ nq=$abc$109383$new_n49981_
-.subckt mx2_x2 cmd=$abc$109383$new_n44139_ i0=soc.ram.ram[98][24] i1=soc.ram.ram[102][24] q=$abc$109383$new_n49982_
+.subckt mux2_x1 cmd=$abc$109383$new_n44139_ i0=soc.ram.ram[98][24] i1=soc.ram.ram[102][24] q=$abc$109383$new_n49982_
 .subckt nand2_x0 i0=$abc$109383$new_n49982_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n49983_
 .subckt nand3_x0 i0=$abc$109383$new_n49983_ i1=$abc$109383$new_n49981_ i2=$abc$109383$new_n44959_ nq=$abc$109383$new_n49984_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[97][24] i1=soc.ram.ram[101][24] q=$abc$109383$new_n49985_
-.subckt mx2_x2 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[96][24] i1=soc.ram.ram[100][24] q=$abc$109383$new_n49986_
-.subckt mx2_x2 cmd=$abc$109383$new_n43972_ i0=$abc$109383$new_n49986_ i1=$abc$109383$new_n49985_ q=$abc$109383$new_n49987_
-.subckt o2_x2 i0=$abc$109383$new_n49987_ i1=$abc$109383$new_n43843_ q=$abc$109383$new_n49988_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[97][24] i1=soc.ram.ram[101][24] q=$abc$109383$new_n49985_
+.subckt mux2_x1 cmd=$abc$109383$new_n43739_ i0=soc.ram.ram[96][24] i1=soc.ram.ram[100][24] q=$abc$109383$new_n49986_
+.subckt mux2_x1 cmd=$abc$109383$new_n43972_ i0=$abc$109383$new_n49986_ i1=$abc$109383$new_n49985_ q=$abc$109383$new_n49987_
+.subckt or2_x1 i0=$abc$109383$new_n49987_ i1=$abc$109383$new_n43843_ q=$abc$109383$new_n49988_
 .subckt nand3_x0 i0=$abc$109383$new_n49988_ i1=$abc$109383$new_n49984_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n49989_
-.subckt a2_x2 i0=$abc$109383$new_n49989_ i1=$abc$109383$new_n43327_ q=$abc$109383$new_n49990_
+.subckt and2_x1 i0=$abc$109383$new_n49989_ i1=$abc$109383$new_n43327_ q=$abc$109383$new_n49990_
 .subckt nand2_x0 i0=$abc$109383$new_n49990_ i1=$abc$109383$new_n49979_ nq=$abc$109383$new_n49991_
 .subckt nand3_x0 i0=$abc$109383$new_n49991_ i1=$abc$109383$new_n49963_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n49992_
 .subckt inv_x0 i=soc.ram.ram[81][24] nq=$abc$109383$new_n49993_
 .subckt inv_x0 i=soc.ram.ram[85][24] nq=$abc$109383$new_n49994_
-.subckt mx2_x2 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n49994_ i1=$abc$109383$new_n49993_ q=$abc$109383$new_n49995_
+.subckt mux2_x1 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n49994_ i1=$abc$109383$new_n49993_ q=$abc$109383$new_n49995_
 .subckt inv_x0 i=soc.ram.ram[83][24] nq=$abc$109383$new_n49996_
 .subckt inv_x0 i=soc.ram.ram[87][24] nq=$abc$109383$new_n49997_
-.subckt mx2_x2 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n49997_ i1=$abc$109383$new_n49996_ q=$abc$109383$new_n49998_
-.subckt mx2_x2 cmd=$abc$109383$new_n43449_ i0=$abc$109383$new_n49998_ i1=$abc$109383$new_n49995_ q=$abc$109383$new_n49999_
+.subckt mux2_x1 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n49997_ i1=$abc$109383$new_n49996_ q=$abc$109383$new_n49998_
+.subckt mux2_x1 cmd=$abc$109383$new_n43449_ i0=$abc$109383$new_n49998_ i1=$abc$109383$new_n49995_ q=$abc$109383$new_n49999_
 .subckt inv_x0 i=soc.ram.ram[80][24] nq=$abc$109383$new_n50000_
 .subckt inv_x0 i=soc.ram.ram[84][24] nq=$abc$109383$new_n50001_
-.subckt mx2_x2 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n50001_ i1=$abc$109383$new_n50000_ q=$abc$109383$new_n50002_
+.subckt mux2_x1 cmd=$abc$109383$new_n46495_ i0=$abc$109383$new_n50001_ i1=$abc$109383$new_n50000_ q=$abc$109383$new_n50002_
 .subckt inv_x0 i=soc.ram.ram[82][24] nq=$abc$109383$new_n50003_
 .subckt inv_x0 i=soc.ram.ram[86][24] nq=$abc$109383$new_n50004_
-.subckt mx2_x2 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n50004_ i1=$abc$109383$new_n50003_ q=$abc$109383$new_n50005_
-.subckt mx2_x2 cmd=$abc$109383$new_n43449_ i0=$abc$109383$new_n50005_ i1=$abc$109383$new_n50002_ q=$abc$109383$new_n50006_
-.subckt mx2_x2 cmd=$abc$109383$new_n44590_ i0=$abc$109383$new_n50006_ i1=$abc$109383$new_n49999_ q=$abc$109383$new_n50007_
-.subckt o2_x2 i0=$abc$109383$new_n50007_ i1=$abc$109383$new_n44640_ q=$abc$109383$new_n50008_
-.subckt mx2_x2 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[90][24] i1=soc.ram.ram[94][24] q=$abc$109383$new_n50009_
+.subckt mux2_x1 cmd=$abc$109383$new_n43878_ i0=$abc$109383$new_n50004_ i1=$abc$109383$new_n50003_ q=$abc$109383$new_n50005_
+.subckt mux2_x1 cmd=$abc$109383$new_n43449_ i0=$abc$109383$new_n50005_ i1=$abc$109383$new_n50002_ q=$abc$109383$new_n50006_
+.subckt mux2_x1 cmd=$abc$109383$new_n44590_ i0=$abc$109383$new_n50006_ i1=$abc$109383$new_n49999_ q=$abc$109383$new_n50007_
+.subckt or2_x1 i0=$abc$109383$new_n50007_ i1=$abc$109383$new_n44640_ q=$abc$109383$new_n50008_
+.subckt mux2_x1 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[90][24] i1=soc.ram.ram[94][24] q=$abc$109383$new_n50009_
 .subckt nand2_x0 i0=$abc$109383$new_n50009_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n50010_
 .subckt nor2_x0 i0=soc.ram.ram[91][24] i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n50011_
 .subckt inv_x0 i=soc.ram.ram[95][24] nq=$abc$109383$new_n50012_
-.subckt oa22_x2 i0=$abc$109383$new_n50012_ i1=$abc$109383$new_n44088_ i2=$abc$109383$new_n44456_ q=$abc$109383$new_n50013_
-.subckt ao22_x2 i0=$abc$109383$new_n50013_ i1=$abc$109383$new_n50011_ i2=$abc$109383$new_n50010_ q=$abc$109383$new_n50014_
-.subckt a2_x2 i0=$abc$109383$new_n50014_ i1=$abc$109383$new_n43949_ q=$abc$109383$new_n50015_
+.subckt or21nand_x1 i0=$abc$109383$new_n50012_ i1=$abc$109383$new_n44088_ i2=$abc$109383$new_n44456_ nq=$abc$109383$new_n50013_
+.subckt and21nor_x1 i0=$abc$109383$new_n50013_ i1=$abc$109383$new_n50011_ i2=$abc$109383$new_n50010_ nq=$abc$109383$new_n50014_
+.subckt and2_x1 i0=$abc$109383$new_n50014_ i1=$abc$109383$new_n43949_ q=$abc$109383$new_n50015_
 .subckt inv_x0 i=soc.ram.ram[93][24] nq=$abc$109383$new_n50016_
 .subckt nand2_x0 i0=$abc$109383$new_n50016_ i1=$abc$109383$new_n44660_ nq=$abc$109383$new_n50017_
-.subckt ao22_x2 i0=soc.ram.ram[89][24] i1=$abc$109383$new_n45579_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n50018_
+.subckt and21nor_x1 i0=soc.ram.ram[89][24] i1=$abc$109383$new_n45579_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n50018_
 .subckt nand2_x0 i0=$abc$109383$new_n50018_ i1=$abc$109383$new_n50017_ nq=$abc$109383$new_n50019_
-.subckt mx2_x2 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[88][24] i1=soc.ram.ram[92][24] q=$abc$109383$new_n50020_
+.subckt mux2_x1 cmd=$abc$109383$new_n43748_ i0=soc.ram.ram[88][24] i1=soc.ram.ram[92][24] q=$abc$109383$new_n50020_
 .subckt nand2_x0 i0=$abc$109383$new_n50020_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n50021_
-.subckt a2_x2 i0=$abc$109383$new_n50021_ i1=$abc$109383$new_n43331_ q=$abc$109383$new_n50022_
-.subckt oa22_x2 i0=$abc$109383$new_n50022_ i1=$abc$109383$new_n50019_ i2=$abc$109383$new_n44654_ q=$abc$109383$new_n50023_
-.subckt ao22_x2 i0=$abc$109383$new_n50023_ i1=$abc$109383$new_n50015_ i2=$abc$109383$new_n46418_ q=$abc$109383$new_n50024_
+.subckt and2_x1 i0=$abc$109383$new_n50021_ i1=$abc$109383$new_n43331_ q=$abc$109383$new_n50022_
+.subckt or21nand_x1 i0=$abc$109383$new_n50022_ i1=$abc$109383$new_n50019_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n50023_
+.subckt and21nor_x1 i0=$abc$109383$new_n50023_ i1=$abc$109383$new_n50015_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n50024_
 .subckt nand2_x0 i0=$abc$109383$new_n50024_ i1=$abc$109383$new_n50008_ nq=$abc$109383$new_n50025_
-.subckt mx2_x2 cmd=$abc$109383$new_n43641_ i0=soc.ram.ram[76][24] i1=soc.ram.ram[77][24] q=$abc$109383$new_n50026_
-.subckt mx2_x2 cmd=$abc$109383$new_n43641_ i0=soc.ram.ram[72][24] i1=soc.ram.ram[73][24] q=$abc$109383$new_n50027_
-.subckt mx2_x2 cmd=$abc$109383$new_n43484_ i0=$abc$109383$new_n50027_ i1=$abc$109383$new_n50026_ q=$abc$109383$new_n50028_
-.subckt o2_x2 i0=$abc$109383$new_n50028_ i1=$abc$109383$new_n46154_ q=$abc$109383$new_n50029_
-.subckt mx2_x2 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[78][24] i1=soc.ram.ram[79][24] q=$abc$109383$new_n50030_
-.subckt mx2_x2 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[74][24] i1=soc.ram.ram[75][24] q=$abc$109383$new_n50031_
-.subckt mx2_x2 cmd=$abc$109383$new_n43906_ i0=$abc$109383$new_n50031_ i1=$abc$109383$new_n50030_ q=$abc$109383$new_n50032_
-.subckt ao22_x2 i0=$abc$109383$new_n44381_ i1=$abc$109383$new_n50032_ i2=$abc$109383$new_n45393_ q=$abc$109383$new_n50033_
-.subckt a2_x2 i0=$abc$109383$new_n50033_ i1=$abc$109383$new_n50029_ q=$abc$109383$new_n50034_
+.subckt mux2_x1 cmd=$abc$109383$new_n43641_ i0=soc.ram.ram[76][24] i1=soc.ram.ram[77][24] q=$abc$109383$new_n50026_
+.subckt mux2_x1 cmd=$abc$109383$new_n43641_ i0=soc.ram.ram[72][24] i1=soc.ram.ram[73][24] q=$abc$109383$new_n50027_
+.subckt mux2_x1 cmd=$abc$109383$new_n43484_ i0=$abc$109383$new_n50027_ i1=$abc$109383$new_n50026_ q=$abc$109383$new_n50028_
+.subckt or2_x1 i0=$abc$109383$new_n50028_ i1=$abc$109383$new_n46154_ q=$abc$109383$new_n50029_
+.subckt mux2_x1 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[78][24] i1=soc.ram.ram[79][24] q=$abc$109383$new_n50030_
+.subckt mux2_x1 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[74][24] i1=soc.ram.ram[75][24] q=$abc$109383$new_n50031_
+.subckt mux2_x1 cmd=$abc$109383$new_n43906_ i0=$abc$109383$new_n50031_ i1=$abc$109383$new_n50030_ q=$abc$109383$new_n50032_
+.subckt and21nor_x1 i0=$abc$109383$new_n44381_ i1=$abc$109383$new_n50032_ i2=$abc$109383$new_n45393_ nq=$abc$109383$new_n50033_
+.subckt and2_x1 i0=$abc$109383$new_n50033_ i1=$abc$109383$new_n50029_ q=$abc$109383$new_n50034_
 .subckt inv_x0 i=soc.ram.ram[71][24] nq=$abc$109383$new_n50035_
 .subckt nand2_x0 i0=$abc$109383$new_n50035_ i1=$abc$109383$new_n43908_ nq=$abc$109383$new_n50036_
-.subckt ao22_x2 i0=soc.ram.ram[67][24] i1=$abc$109383$new_n44139_ i2=$abc$109383$new_n45599_ q=$abc$109383$new_n50037_
+.subckt and21nor_x1 i0=soc.ram.ram[67][24] i1=$abc$109383$new_n44139_ i2=$abc$109383$new_n45599_ nq=$abc$109383$new_n50037_
 .subckt nand2_x0 i0=$abc$109383$new_n50037_ i1=$abc$109383$new_n50036_ nq=$abc$109383$new_n50038_
-.subckt mx2_x2 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[66][24] i1=soc.ram.ram[70][24] q=$abc$109383$new_n50039_
+.subckt mux2_x1 cmd=$abc$109383$new_n44316_ i0=soc.ram.ram[66][24] i1=soc.ram.ram[70][24] q=$abc$109383$new_n50039_
 .subckt nand2_x0 i0=$abc$109383$new_n50039_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n50040_
-.subckt a2_x2 i0=$abc$109383$new_n50040_ i1=$abc$109383$new_n45604_ q=$abc$109383$new_n50041_
+.subckt and2_x1 i0=$abc$109383$new_n50040_ i1=$abc$109383$new_n45604_ q=$abc$109383$new_n50041_
 .subckt nand2_x0 i0=$abc$109383$new_n50041_ i1=$abc$109383$new_n50038_ nq=$abc$109383$new_n50042_
-.subckt ao22_x2 i0=soc.ram.ram[65][24] i1=$abc$109383$new_n43887_ i2=$abc$109383$new_n44368_ q=$abc$109383$new_n50043_
-.subckt ao22_x2 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[69][24] i2=$abc$109383$new_n50043_ q=$abc$109383$new_n50044_
-.subckt mx2_x2 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[64][24] i1=soc.ram.ram[68][24] q=$abc$109383$new_n50045_
-.subckt oa22_x2 i0=$abc$109383$new_n43335_ i1=$abc$109383$new_n50045_ i2=$abc$109383$new_n43808_ q=$abc$109383$new_n50046_
-.subckt ao22_x2 i0=$abc$109383$new_n50046_ i1=$abc$109383$new_n50044_ i2=$abc$109383$new_n44479_ q=$abc$109383$new_n50047_
-.subckt oa22_x2 i0=$abc$109383$new_n50047_ i1=$abc$109383$new_n50042_ i2=$abc$109383$new_n50034_ q=$abc$109383$new_n50048_
-.subckt ao22_x2 i0=$abc$109383$new_n46418_ i1=$abc$109383$new_n50048_ i2=$abc$109383$new_n44739_ q=$abc$109383$new_n50049_
+.subckt and21nor_x1 i0=soc.ram.ram[65][24] i1=$abc$109383$new_n43887_ i2=$abc$109383$new_n44368_ nq=$abc$109383$new_n50043_
+.subckt and21nor_x1 i0=$abc$109383$new_n43805_ i1=soc.ram.ram[69][24] i2=$abc$109383$new_n50043_ nq=$abc$109383$new_n50044_
+.subckt mux2_x1 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[64][24] i1=soc.ram.ram[68][24] q=$abc$109383$new_n50045_
+.subckt or21nand_x1 i0=$abc$109383$new_n43335_ i1=$abc$109383$new_n50045_ i2=$abc$109383$new_n43808_ nq=$abc$109383$new_n50046_
+.subckt and21nor_x1 i0=$abc$109383$new_n50046_ i1=$abc$109383$new_n50044_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n50047_
+.subckt or21nand_x1 i0=$abc$109383$new_n50047_ i1=$abc$109383$new_n50042_ i2=$abc$109383$new_n50034_ nq=$abc$109383$new_n50048_
+.subckt and21nor_x1 i0=$abc$109383$new_n46418_ i1=$abc$109383$new_n50048_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n50049_
 .subckt nand2_x0 i0=$abc$109383$new_n50049_ i1=$abc$109383$new_n50025_ nq=$abc$109383$new_n50050_
 .subckt nand3_x0 i0=$abc$109383$new_n50050_ i1=$abc$109383$new_n49992_ i2=$abc$109383$new_n44040_ nq=$abc$109383$new_n50051_
-.subckt a2_x2 i0=$abc$109383$new_n50051_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n50052_
-.subckt mx2_x2 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[33][24] i1=soc.ram.ram[37][24] q=$abc$109383$new_n50053_
-.subckt mx2_x2 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[32][24] i1=soc.ram.ram[36][24] q=$abc$109383$new_n50054_
-.subckt mx2_x2 cmd=$abc$109383$new_n43847_ i0=$abc$109383$new_n50054_ i1=$abc$109383$new_n50053_ q=$abc$109383$new_n50055_
-.subckt ao22_x2 i0=$abc$109383$new_n43650_ i1=$abc$109383$new_n50055_ i2=$abc$109383$new_n43920_ q=$abc$109383$new_n50056_
-.subckt mx2_x2 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[35][24] i1=soc.ram.ram[39][24] q=$abc$109383$new_n50057_
-.subckt mx2_x2 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[34][24] i1=soc.ram.ram[38][24] q=$abc$109383$new_n50058_
-.subckt mx2_x2 cmd=$abc$109383$new_n43791_ i0=$abc$109383$new_n50058_ i1=$abc$109383$new_n50057_ q=$abc$109383$new_n50059_
-.subckt ao22_x2 i0=$abc$109383$new_n45629_ i1=$abc$109383$new_n50059_ i2=$abc$109383$new_n50056_ q=$abc$109383$new_n50060_
+.subckt and2_x1 i0=$abc$109383$new_n50051_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n50052_
+.subckt mux2_x1 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[33][24] i1=soc.ram.ram[37][24] q=$abc$109383$new_n50053_
+.subckt mux2_x1 cmd=$abc$109383$new_n43755_ i0=soc.ram.ram[32][24] i1=soc.ram.ram[36][24] q=$abc$109383$new_n50054_
+.subckt mux2_x1 cmd=$abc$109383$new_n43847_ i0=$abc$109383$new_n50054_ i1=$abc$109383$new_n50053_ q=$abc$109383$new_n50055_
+.subckt and21nor_x1 i0=$abc$109383$new_n43650_ i1=$abc$109383$new_n50055_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n50056_
+.subckt mux2_x1 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[35][24] i1=soc.ram.ram[39][24] q=$abc$109383$new_n50057_
+.subckt mux2_x1 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[34][24] i1=soc.ram.ram[38][24] q=$abc$109383$new_n50058_
+.subckt mux2_x1 cmd=$abc$109383$new_n43791_ i0=$abc$109383$new_n50058_ i1=$abc$109383$new_n50057_ q=$abc$109383$new_n50059_
+.subckt and21nor_x1 i0=$abc$109383$new_n45629_ i1=$abc$109383$new_n50059_ i2=$abc$109383$new_n50056_ nq=$abc$109383$new_n50060_
 .subckt inv_x0 i=soc.ram.ram[53][24] nq=$abc$109383$new_n50061_
 .subckt nand2_x0 i0=$abc$109383$new_n50061_ i1=$abc$109383$new_n43852_ nq=$abc$109383$new_n50062_
-.subckt ao22_x2 i0=soc.ram.ram[49][24] i1=$abc$109383$new_n45322_ i2=$abc$109383$new_n44945_ q=$abc$109383$new_n50063_
+.subckt and21nor_x1 i0=soc.ram.ram[49][24] i1=$abc$109383$new_n45322_ i2=$abc$109383$new_n44945_ nq=$abc$109383$new_n50063_
 .subckt nand2_x0 i0=$abc$109383$new_n50063_ i1=$abc$109383$new_n50062_ nq=$abc$109383$new_n50064_
-.subckt mx2_x2 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[48][24] i1=soc.ram.ram[52][24] q=$abc$109383$new_n50065_
+.subckt mux2_x1 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[48][24] i1=soc.ram.ram[52][24] q=$abc$109383$new_n50065_
 .subckt nand2_x0 i0=$abc$109383$new_n50065_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n50066_
 .subckt nand3_x0 i0=$abc$109383$new_n50066_ i1=$abc$109383$new_n50064_ i2=$abc$109383$new_n44742_ nq=$abc$109383$new_n50067_
-.subckt mx2_x2 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[50][24] i1=soc.ram.ram[54][24] q=$abc$109383$new_n50068_
-.subckt a2_x2 i0=$abc$109383$new_n50068_ i1=$abc$109383$new_n43738_ q=$abc$109383$new_n50069_
-.subckt ao22_x2 i0=soc.ram.ram[51][24] i1=$abc$109383$new_n43342_ i2=$abc$109383$new_n43362_ q=$abc$109383$new_n50070_
-.subckt ao22_x2 i0=$abc$109383$new_n44778_ i1=soc.ram.ram[55][24] i2=$abc$109383$new_n50070_ q=$abc$109383$new_n50071_
-.subckt o2_x2 i0=$abc$109383$new_n50071_ i1=$abc$109383$new_n43730_ q=$abc$109383$new_n50072_
-.subckt ao22_x2 i0=$abc$109383$new_n50072_ i1=$abc$109383$new_n50069_ i2=$abc$109383$new_n43540_ q=$abc$109383$new_n50073_
-.subckt oa22_x2 i0=$abc$109383$new_n50073_ i1=$abc$109383$new_n50067_ i2=$abc$109383$new_n50060_ q=$abc$109383$new_n50074_
-.subckt mx2_x2 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[6][24] i1=soc.ram.ram[7][24] q=$abc$109383$new_n50075_
-.subckt mx2_x2 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[2][24] i1=soc.ram.ram[3][24] q=$abc$109383$new_n50076_
-.subckt mx2_x2 cmd=$abc$109383$new_n45609_ i0=$abc$109383$new_n50076_ i1=$abc$109383$new_n50075_ q=$abc$109383$new_n50077_
-.subckt ao22_x2 i0=$abc$109383$new_n43730_ i1=$abc$109383$new_n50077_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n50078_
-.subckt mx2_x2 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[4][24] i1=soc.ram.ram[5][24] q=$abc$109383$new_n50079_
-.subckt mx2_x2 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[0][24] i1=soc.ram.ram[1][24] q=$abc$109383$new_n50080_
-.subckt mx2_x2 cmd=$abc$109383$new_n45445_ i0=$abc$109383$new_n50080_ i1=$abc$109383$new_n50079_ q=$abc$109383$new_n50081_
-.subckt ao22_x2 i0=$abc$109383$new_n44905_ i1=$abc$109383$new_n50081_ i2=$abc$109383$new_n50078_ q=$abc$109383$new_n50082_
-.subckt mx2_x2 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[16][24] i1=soc.ram.ram[20][24] q=$abc$109383$new_n50083_
-.subckt oa22_x2 i0=$abc$109383$new_n43903_ i1=$abc$109383$new_n50083_ i2=$abc$109383$new_n44774_ q=$abc$109383$new_n50084_
-.subckt ao22_x2 i0=soc.ram.ram[17][24] i1=$abc$109383$new_n45579_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n50085_
+.subckt mux2_x1 cmd=$abc$109383$new_n44859_ i0=soc.ram.ram[50][24] i1=soc.ram.ram[54][24] q=$abc$109383$new_n50068_
+.subckt and2_x1 i0=$abc$109383$new_n50068_ i1=$abc$109383$new_n43738_ q=$abc$109383$new_n50069_
+.subckt and21nor_x1 i0=soc.ram.ram[51][24] i1=$abc$109383$new_n43342_ i2=$abc$109383$new_n43362_ nq=$abc$109383$new_n50070_
+.subckt and21nor_x1 i0=$abc$109383$new_n44778_ i1=soc.ram.ram[55][24] i2=$abc$109383$new_n50070_ nq=$abc$109383$new_n50071_
+.subckt or2_x1 i0=$abc$109383$new_n50071_ i1=$abc$109383$new_n43730_ q=$abc$109383$new_n50072_
+.subckt and21nor_x1 i0=$abc$109383$new_n50072_ i1=$abc$109383$new_n50069_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n50073_
+.subckt or21nand_x1 i0=$abc$109383$new_n50073_ i1=$abc$109383$new_n50067_ i2=$abc$109383$new_n50060_ nq=$abc$109383$new_n50074_
+.subckt mux2_x1 cmd=$abc$109383$new_n43443_ i0=soc.ram.ram[6][24] i1=soc.ram.ram[7][24] q=$abc$109383$new_n50075_
+.subckt mux2_x1 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[2][24] i1=soc.ram.ram[3][24] q=$abc$109383$new_n50076_
+.subckt mux2_x1 cmd=$abc$109383$new_n45609_ i0=$abc$109383$new_n50076_ i1=$abc$109383$new_n50075_ q=$abc$109383$new_n50077_
+.subckt and21nor_x1 i0=$abc$109383$new_n43730_ i1=$abc$109383$new_n50077_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n50078_
+.subckt mux2_x1 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[4][24] i1=soc.ram.ram[5][24] q=$abc$109383$new_n50079_
+.subckt mux2_x1 cmd=$abc$109383$new_n43871_ i0=soc.ram.ram[0][24] i1=soc.ram.ram[1][24] q=$abc$109383$new_n50080_
+.subckt mux2_x1 cmd=$abc$109383$new_n45445_ i0=$abc$109383$new_n50080_ i1=$abc$109383$new_n50079_ q=$abc$109383$new_n50081_
+.subckt and21nor_x1 i0=$abc$109383$new_n44905_ i1=$abc$109383$new_n50081_ i2=$abc$109383$new_n50078_ nq=$abc$109383$new_n50082_
+.subckt mux2_x1 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[16][24] i1=soc.ram.ram[20][24] q=$abc$109383$new_n50083_
+.subckt or21nand_x1 i0=$abc$109383$new_n43903_ i1=$abc$109383$new_n50083_ i2=$abc$109383$new_n44774_ nq=$abc$109383$new_n50084_
+.subckt and21nor_x1 i0=soc.ram.ram[17][24] i1=$abc$109383$new_n45579_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n50085_
 .subckt inv_x0 i=soc.ram.ram[21][24] nq=$abc$109383$new_n50086_
 .subckt nand2_x0 i0=$abc$109383$new_n50086_ i1=$abc$109383$new_n44451_ nq=$abc$109383$new_n50087_
-.subckt oa22_x2 i0=$abc$109383$new_n50087_ i1=$abc$109383$new_n50085_ i2=$abc$109383$new_n50084_ q=$abc$109383$new_n50088_
-.subckt ao22_x2 i0=soc.ram.ram[19][24] i1=$abc$109383$new_n44225_ i2=$abc$109383$new_n43913_ q=$abc$109383$new_n50089_
-.subckt ao22_x2 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[23][24] i2=$abc$109383$new_n50089_ q=$abc$109383$new_n50090_
-.subckt o2_x2 i0=soc.ram.ram[18][24] i1=$abc$109383$new_n43977_ q=$abc$109383$new_n50091_
-.subckt ao22_x2 i0=soc.ram.ram[22][24] i1=$abc$109383$new_n44778_ i2=$abc$109383$new_n43902_ q=$abc$109383$new_n50092_
-.subckt oa22_x2 i0=$abc$109383$new_n50092_ i1=$abc$109383$new_n50091_ i2=$abc$109383$new_n43372_ q=$abc$109383$new_n50093_
-.subckt ao22_x2 i0=$abc$109383$new_n50093_ i1=$abc$109383$new_n50090_ i2=$abc$109383$new_n43540_ q=$abc$109383$new_n50094_
-.subckt oa22_x2 i0=$abc$109383$new_n50094_ i1=$abc$109383$new_n50088_ i2=$abc$109383$new_n50082_ q=$abc$109383$new_n50095_
-.subckt mx2_x2 cmd=$abc$109383$new_n43410_ i0=$abc$109383$new_n50095_ i1=$abc$109383$new_n50074_ q=$abc$109383$new_n50096_
+.subckt or21nand_x1 i0=$abc$109383$new_n50087_ i1=$abc$109383$new_n50085_ i2=$abc$109383$new_n50084_ nq=$abc$109383$new_n50088_
+.subckt and21nor_x1 i0=soc.ram.ram[19][24] i1=$abc$109383$new_n44225_ i2=$abc$109383$new_n43913_ nq=$abc$109383$new_n50089_
+.subckt and21nor_x1 i0=$abc$109383$new_n46370_ i1=soc.ram.ram[23][24] i2=$abc$109383$new_n50089_ nq=$abc$109383$new_n50090_
+.subckt or2_x1 i0=soc.ram.ram[18][24] i1=$abc$109383$new_n43977_ q=$abc$109383$new_n50091_
+.subckt and21nor_x1 i0=soc.ram.ram[22][24] i1=$abc$109383$new_n44778_ i2=$abc$109383$new_n43902_ nq=$abc$109383$new_n50092_
+.subckt or21nand_x1 i0=$abc$109383$new_n50092_ i1=$abc$109383$new_n50091_ i2=$abc$109383$new_n43372_ nq=$abc$109383$new_n50093_
+.subckt and21nor_x1 i0=$abc$109383$new_n50093_ i1=$abc$109383$new_n50090_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n50094_
+.subckt or21nand_x1 i0=$abc$109383$new_n50094_ i1=$abc$109383$new_n50088_ i2=$abc$109383$new_n50082_ nq=$abc$109383$new_n50095_
+.subckt mux2_x1 cmd=$abc$109383$new_n43410_ i0=$abc$109383$new_n50095_ i1=$abc$109383$new_n50074_ q=$abc$109383$new_n50096_
 .subckt nand2_x0 i0=$abc$109383$new_n50096_ i1=$abc$109383$new_n43840_ nq=$abc$109383$new_n50097_
-.subckt mx2_x2 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[8][24] i1=soc.ram.ram[12][24] q=$abc$109383$new_n50098_
-.subckt oa22_x2 i0=$abc$109383$new_n44918_ i1=$abc$109383$new_n50098_ i2=$abc$109383$new_n43507_ q=$abc$109383$new_n50099_
-.subckt ao22_x2 i0=soc.ram.ram[9][24] i1=$abc$109383$new_n43687_ i2=$abc$109383$new_n43992_ q=$abc$109383$new_n50100_
+.subckt mux2_x1 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[8][24] i1=soc.ram.ram[12][24] q=$abc$109383$new_n50098_
+.subckt or21nand_x1 i0=$abc$109383$new_n44918_ i1=$abc$109383$new_n50098_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n50099_
+.subckt and21nor_x1 i0=soc.ram.ram[9][24] i1=$abc$109383$new_n43687_ i2=$abc$109383$new_n43992_ nq=$abc$109383$new_n50100_
 .subckt inv_x0 i=soc.ram.ram[13][24] nq=$abc$109383$new_n50101_
 .subckt nand2_x0 i0=$abc$109383$new_n50101_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n50102_
-.subckt oa22_x2 i0=$abc$109383$new_n50102_ i1=$abc$109383$new_n50100_ i2=$abc$109383$new_n50099_ q=$abc$109383$new_n50103_
-.subckt mx2_x2 cmd=$abc$109383$new_n43978_ i0=soc.ram.ram[10][24] i1=soc.ram.ram[14][24] q=$abc$109383$new_n50104_
+.subckt or21nand_x1 i0=$abc$109383$new_n50102_ i1=$abc$109383$new_n50100_ i2=$abc$109383$new_n50099_ nq=$abc$109383$new_n50103_
+.subckt mux2_x1 cmd=$abc$109383$new_n43978_ i0=soc.ram.ram[10][24] i1=soc.ram.ram[14][24] q=$abc$109383$new_n50104_
 .subckt nand2_x0 i0=$abc$109383$new_n50104_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n50105_
 .subckt nor2_x0 i0=soc.ram.ram[11][24] i1=$abc$109383$new_n44936_ nq=$abc$109383$new_n50106_
 .subckt inv_x0 i=soc.ram.ram[15][24] nq=$abc$109383$new_n50107_
-.subckt oa22_x2 i0=$abc$109383$new_n50107_ i1=$abc$109383$new_n45082_ i2=$abc$109383$new_n44630_ q=$abc$109383$new_n50108_
-.subckt ao22_x2 i0=$abc$109383$new_n50108_ i1=$abc$109383$new_n50106_ i2=$abc$109383$new_n45320_ q=$abc$109383$new_n50109_
+.subckt or21nand_x1 i0=$abc$109383$new_n50107_ i1=$abc$109383$new_n45082_ i2=$abc$109383$new_n44630_ nq=$abc$109383$new_n50108_
+.subckt and21nor_x1 i0=$abc$109383$new_n50108_ i1=$abc$109383$new_n50106_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n50109_
 .subckt nand2_x0 i0=$abc$109383$new_n50109_ i1=$abc$109383$new_n50105_ nq=$abc$109383$new_n50110_
 .subckt nand3_x0 i0=$abc$109383$new_n50110_ i1=$abc$109383$new_n50103_ i2=$abc$109383$new_n43413_ nq=$abc$109383$new_n50111_
-.subckt mx2_x2 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[26][24] i1=soc.ram.ram[30][24] q=$abc$109383$new_n50112_
-.subckt oa22_x2 i0=$abc$109383$new_n43634_ i1=$abc$109383$new_n50112_ i2=$abc$109383$new_n43724_ q=$abc$109383$new_n50113_
-.subckt ao22_x2 i0=soc.ram.ram[31][24] i1=$abc$109383$new_n44421_ i2=$abc$109383$new_n44944_ q=$abc$109383$new_n50114_
-.subckt o2_x2 i0=soc.ram.ram[27][24] i1=$abc$109383$new_n44207_ q=$abc$109383$new_n50115_
-.subckt oa22_x2 i0=$abc$109383$new_n50115_ i1=$abc$109383$new_n50114_ i2=$abc$109383$new_n50113_ q=$abc$109383$new_n50116_
-.subckt ao22_x2 i0=soc.ram.ram[25][24] i1=$abc$109383$new_n44202_ i2=$abc$109383$new_n43630_ q=$abc$109383$new_n50117_
-.subckt ao22_x2 i0=$abc$109383$new_n45157_ i1=soc.ram.ram[29][24] i2=$abc$109383$new_n50117_ q=$abc$109383$new_n50118_
-.subckt mx2_x2 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[24][24] i1=soc.ram.ram[28][24] q=$abc$109383$new_n50119_
-.subckt oa22_x2 i0=$abc$109383$new_n43737_ i1=$abc$109383$new_n50119_ i2=$abc$109383$new_n46137_ q=$abc$109383$new_n50120_
-.subckt ao22_x2 i0=$abc$109383$new_n50120_ i1=$abc$109383$new_n50118_ i2=$abc$109383$new_n43467_ q=$abc$109383$new_n50121_
-.subckt a2_x2 i0=$abc$109383$new_n50121_ i1=$abc$109383$new_n50116_ q=$abc$109383$new_n50122_
+.subckt mux2_x1 cmd=$abc$109383$new_n43937_ i0=soc.ram.ram[26][24] i1=soc.ram.ram[30][24] q=$abc$109383$new_n50112_
+.subckt or21nand_x1 i0=$abc$109383$new_n43634_ i1=$abc$109383$new_n50112_ i2=$abc$109383$new_n43724_ nq=$abc$109383$new_n50113_
+.subckt and21nor_x1 i0=soc.ram.ram[31][24] i1=$abc$109383$new_n44421_ i2=$abc$109383$new_n44944_ nq=$abc$109383$new_n50114_
+.subckt or2_x1 i0=soc.ram.ram[27][24] i1=$abc$109383$new_n44207_ q=$abc$109383$new_n50115_
+.subckt or21nand_x1 i0=$abc$109383$new_n50115_ i1=$abc$109383$new_n50114_ i2=$abc$109383$new_n50113_ nq=$abc$109383$new_n50116_
+.subckt and21nor_x1 i0=soc.ram.ram[25][24] i1=$abc$109383$new_n44202_ i2=$abc$109383$new_n43630_ nq=$abc$109383$new_n50117_
+.subckt and21nor_x1 i0=$abc$109383$new_n45157_ i1=soc.ram.ram[29][24] i2=$abc$109383$new_n50117_ nq=$abc$109383$new_n50118_
+.subckt mux2_x1 cmd=$abc$109383$new_n43396_ i0=soc.ram.ram[24][24] i1=soc.ram.ram[28][24] q=$abc$109383$new_n50119_
+.subckt or21nand_x1 i0=$abc$109383$new_n43737_ i1=$abc$109383$new_n50119_ i2=$abc$109383$new_n46137_ nq=$abc$109383$new_n50120_
+.subckt and21nor_x1 i0=$abc$109383$new_n50120_ i1=$abc$109383$new_n50118_ i2=$abc$109383$new_n43467_ nq=$abc$109383$new_n50121_
+.subckt and2_x1 i0=$abc$109383$new_n50121_ i1=$abc$109383$new_n50116_ q=$abc$109383$new_n50122_
 .subckt nor2_x0 i0=$abc$109383$new_n50122_ i1=$abc$109383$new_n43464_ nq=$abc$109383$new_n50123_
-.subckt oa22_x2 i0=$abc$109383$new_n50123_ i1=$abc$109383$new_n50111_ i2=$abc$109383$new_n44951_ q=$abc$109383$new_n50124_
-.subckt mx2_x2 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[56][24] i1=soc.ram.ram[60][24] q=$abc$109383$new_n50125_
+.subckt or21nand_x1 i0=$abc$109383$new_n50123_ i1=$abc$109383$new_n50111_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n50124_
+.subckt mux2_x1 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[56][24] i1=soc.ram.ram[60][24] q=$abc$109383$new_n50125_
 .subckt nand2_x0 i0=$abc$109383$new_n50125_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n50126_
 .subckt inv_x0 i=soc.ram.ram[61][24] nq=$abc$109383$new_n50127_
 .subckt nand2_x0 i0=$abc$109383$new_n50127_ i1=$abc$109383$new_n44022_ nq=$abc$109383$new_n50128_
-.subckt ao22_x2 i0=soc.ram.ram[57][24] i1=$abc$109383$new_n44027_ i2=$abc$109383$new_n43963_ q=$abc$109383$new_n50129_
+.subckt and21nor_x1 i0=soc.ram.ram[57][24] i1=$abc$109383$new_n44027_ i2=$abc$109383$new_n43963_ nq=$abc$109383$new_n50129_
 .subckt nand2_x0 i0=$abc$109383$new_n50129_ i1=$abc$109383$new_n50128_ nq=$abc$109383$new_n50130_
 .subckt nand3_x0 i0=$abc$109383$new_n50130_ i1=$abc$109383$new_n50126_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n50131_
-.subckt ao22_x2 i0=soc.ram.ram[59][24] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ q=$abc$109383$new_n50132_
-.subckt ao22_x2 i0=$abc$109383$new_n43931_ i1=soc.ram.ram[63][24] i2=$abc$109383$new_n50132_ q=$abc$109383$new_n50133_
-.subckt mx2_x2 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[58][24] i1=soc.ram.ram[62][24] q=$abc$109383$new_n50134_
-.subckt oa22_x2 i0=$abc$109383$new_n44008_ i1=$abc$109383$new_n50134_ i2=$abc$109383$new_n44155_ q=$abc$109383$new_n50135_
-.subckt ao22_x2 i0=$abc$109383$new_n50135_ i1=$abc$109383$new_n50133_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n50136_
-.subckt a2_x2 i0=$abc$109383$new_n50136_ i1=$abc$109383$new_n50131_ q=$abc$109383$new_n50137_
+.subckt and21nor_x1 i0=soc.ram.ram[59][24] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ nq=$abc$109383$new_n50132_
+.subckt and21nor_x1 i0=$abc$109383$new_n43931_ i1=soc.ram.ram[63][24] i2=$abc$109383$new_n50132_ nq=$abc$109383$new_n50133_
+.subckt mux2_x1 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[58][24] i1=soc.ram.ram[62][24] q=$abc$109383$new_n50134_
+.subckt or21nand_x1 i0=$abc$109383$new_n44008_ i1=$abc$109383$new_n50134_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n50135_
+.subckt and21nor_x1 i0=$abc$109383$new_n50135_ i1=$abc$109383$new_n50133_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n50136_
+.subckt and2_x1 i0=$abc$109383$new_n50136_ i1=$abc$109383$new_n50131_ q=$abc$109383$new_n50137_
 .subckt nor2_x0 i0=$abc$109383$new_n50137_ i1=$abc$109383$new_n44007_ nq=$abc$109383$new_n50138_
-.subckt mx2_x2 cmd=$abc$109383$new_n43908_ i0=soc.ram.ram[42][24] i1=soc.ram.ram[46][24] q=$abc$109383$new_n50139_
+.subckt mux2_x1 cmd=$abc$109383$new_n43908_ i0=soc.ram.ram[42][24] i1=soc.ram.ram[46][24] q=$abc$109383$new_n50139_
 .subckt nand2_x0 i0=$abc$109383$new_n50139_ i1=$abc$109383$new_n43951_ nq=$abc$109383$new_n50140_
 .subckt inv_x0 i=soc.ram.ram[47][24] nq=$abc$109383$new_n50141_
 .subckt nand2_x0 i0=$abc$109383$new_n50141_ i1=$abc$109383$new_n43986_ nq=$abc$109383$new_n50142_
-.subckt ao22_x2 i0=soc.ram.ram[43][24] i1=$abc$109383$new_n43830_ i2=$abc$109383$new_n44725_ q=$abc$109383$new_n50143_
+.subckt and21nor_x1 i0=soc.ram.ram[43][24] i1=$abc$109383$new_n43830_ i2=$abc$109383$new_n44725_ nq=$abc$109383$new_n50143_
 .subckt nand2_x0 i0=$abc$109383$new_n50143_ i1=$abc$109383$new_n50142_ nq=$abc$109383$new_n50144_
 .subckt nand3_x0 i0=$abc$109383$new_n50144_ i1=$abc$109383$new_n50140_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n50145_
-.subckt ao22_x2 i0=soc.ram.ram[41][24] i1=$abc$109383$new_n45674_ i2=$abc$109383$new_n45599_ q=$abc$109383$new_n50146_
-.subckt ao22_x2 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[45][24] i2=$abc$109383$new_n50146_ q=$abc$109383$new_n50147_
-.subckt mx2_x2 cmd=$abc$109383$new_n43477_ i0=soc.ram.ram[40][24] i1=soc.ram.ram[44][24] q=$abc$109383$new_n50148_
-.subckt oa22_x2 i0=$abc$109383$new_n45395_ i1=$abc$109383$new_n50148_ i2=$abc$109383$new_n45320_ q=$abc$109383$new_n50149_
-.subckt ao22_x2 i0=$abc$109383$new_n50149_ i1=$abc$109383$new_n50147_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n50150_
+.subckt and21nor_x1 i0=soc.ram.ram[41][24] i1=$abc$109383$new_n45674_ i2=$abc$109383$new_n45599_ nq=$abc$109383$new_n50146_
+.subckt and21nor_x1 i0=$abc$109383$new_n43806_ i1=soc.ram.ram[45][24] i2=$abc$109383$new_n50146_ nq=$abc$109383$new_n50147_
+.subckt mux2_x1 cmd=$abc$109383$new_n43477_ i0=soc.ram.ram[40][24] i1=soc.ram.ram[44][24] q=$abc$109383$new_n50148_
+.subckt or21nand_x1 i0=$abc$109383$new_n45395_ i1=$abc$109383$new_n50148_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n50149_
+.subckt and21nor_x1 i0=$abc$109383$new_n50149_ i1=$abc$109383$new_n50147_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n50150_
 .subckt nand2_x0 i0=$abc$109383$new_n50150_ i1=$abc$109383$new_n50145_ nq=$abc$109383$new_n50151_
-.subckt oa22_x2 i0=$abc$109383$new_n50151_ i1=$abc$109383$new_n50138_ i2=$abc$109383$new_n50124_ q=$abc$109383$new_n50152_
+.subckt or21nand_x1 i0=$abc$109383$new_n50151_ i1=$abc$109383$new_n50138_ i2=$abc$109383$new_n50124_ nq=$abc$109383$new_n50152_
 .subckt nand3_x0 i0=$abc$109383$new_n50152_ i1=$abc$109383$new_n50097_ i2=$abc$109383$new_n43591_ nq=$abc$109383$new_n50153_
-.subckt oa22_x2 i0=$abc$109383$new_n50153_ i1=$abc$109383$new_n50052_ i2=$abc$109383$new_n49929_ q=$abc$109383$new_n50154_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n50154_ i2=$abc$109383$new_n49916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103294
-.subckt oa22_x2 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[25] q=$abc$109383$new_n50156_
-.subckt a2_x2 i0=$abc$109383$new_n50156_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n50157_
-.subckt mx2_x2 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[80][25] i1=soc.ram.ram[84][25] q=$abc$109383$new_n50158_
-.subckt a2_x2 i0=$abc$109383$new_n50158_ i1=$abc$109383$new_n45316_ q=$abc$109383$new_n50159_
-.subckt mx2_x2 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[81][25] i1=soc.ram.ram[85][25] q=$abc$109383$new_n50160_
-.subckt oa22_x2 i0=$abc$109383$new_n44626_ i1=$abc$109383$new_n50160_ i2=$abc$109383$new_n44149_ q=$abc$109383$new_n50161_
+.subckt or21nand_x1 i0=$abc$109383$new_n50153_ i1=$abc$109383$new_n50052_ i2=$abc$109383$new_n49929_ nq=$abc$109383$new_n50154_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n50154_ i2=$abc$109383$new_n49916_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103294
+.subckt or21nand_x1 i0=$abc$109383$new_n47010_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[25] nq=$abc$109383$new_n50156_
+.subckt and2_x1 i0=$abc$109383$new_n50156_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n50157_
+.subckt mux2_x1 cmd=$abc$109383$new_n44156_ i0=soc.ram.ram[80][25] i1=soc.ram.ram[84][25] q=$abc$109383$new_n50158_
+.subckt and2_x1 i0=$abc$109383$new_n50158_ i1=$abc$109383$new_n45316_ q=$abc$109383$new_n50159_
+.subckt mux2_x1 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[81][25] i1=soc.ram.ram[85][25] q=$abc$109383$new_n50160_
+.subckt or21nand_x1 i0=$abc$109383$new_n44626_ i1=$abc$109383$new_n50160_ i2=$abc$109383$new_n44149_ nq=$abc$109383$new_n50161_
 .subckt nor2_x0 i0=$abc$109383$new_n50161_ i1=$abc$109383$new_n50159_ nq=$abc$109383$new_n50162_
-.subckt mx2_x2 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[88][25] i1=soc.ram.ram[92][25] q=$abc$109383$new_n50163_
+.subckt mux2_x1 cmd=$abc$109383$new_n44431_ i0=soc.ram.ram[88][25] i1=soc.ram.ram[92][25] q=$abc$109383$new_n50163_
 .subckt nand2_x0 i0=$abc$109383$new_n50163_ i1=$abc$109383$new_n45448_ nq=$abc$109383$new_n50164_
-.subckt o2_x2 i0=soc.ram.ram[89][25] i1=$abc$109383$new_n44405_ q=$abc$109383$new_n50165_
+.subckt or2_x1 i0=soc.ram.ram[89][25] i1=$abc$109383$new_n44405_ q=$abc$109383$new_n50165_
 .subckt nand2_x0 i0=$abc$109383$new_n50165_ i1=$abc$109383$new_n43998_ nq=$abc$109383$new_n50166_
 .subckt inv_x0 i=soc.ram.ram[93][25] nq=$abc$109383$new_n50167_
-.subckt a2_x2 i0=$abc$109383$new_n50167_ i1=$abc$109383$new_n44088_ q=$abc$109383$new_n50168_
-.subckt ao22_x2 i0=$abc$109383$new_n50168_ i1=$abc$109383$new_n50166_ i2=$abc$109383$new_n50164_ q=$abc$109383$new_n50169_
-.subckt oa22_x2 i0=$abc$109383$new_n45394_ i1=$abc$109383$new_n50169_ i2=$abc$109383$new_n50162_ q=$abc$109383$new_n50170_
+.subckt and2_x1 i0=$abc$109383$new_n50167_ i1=$abc$109383$new_n44088_ q=$abc$109383$new_n50168_
+.subckt and21nor_x1 i0=$abc$109383$new_n50168_ i1=$abc$109383$new_n50166_ i2=$abc$109383$new_n50164_ nq=$abc$109383$new_n50169_
+.subckt or21nand_x1 i0=$abc$109383$new_n45394_ i1=$abc$109383$new_n50169_ i2=$abc$109383$new_n50162_ nq=$abc$109383$new_n50170_
 .subckt nand2_x0 i0=$abc$109383$new_n50170_ i1=$abc$109383$new_n47411_ nq=$abc$109383$new_n50171_
-.subckt mx2_x2 cmd=$abc$109383$new_n43860_ i0=soc.ram.ram[82][25] i1=soc.ram.ram[86][25] q=$abc$109383$new_n50172_
+.subckt mux2_x1 cmd=$abc$109383$new_n43860_ i0=soc.ram.ram[82][25] i1=soc.ram.ram[86][25] q=$abc$109383$new_n50172_
 .subckt nand2_x0 i0=$abc$109383$new_n50172_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n50173_
-.subckt mx2_x2 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[83][25] i1=soc.ram.ram[87][25] q=$abc$109383$new_n50174_
+.subckt mux2_x1 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[83][25] i1=soc.ram.ram[87][25] q=$abc$109383$new_n50174_
 .subckt nand2_x0 i0=$abc$109383$new_n50174_ i1=$abc$109383$new_n44590_ nq=$abc$109383$new_n50175_
 .subckt nand3_x0 i0=$abc$109383$new_n50175_ i1=$abc$109383$new_n50173_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n50176_
-.subckt mx2_x2 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[90][25] i1=soc.ram.ram[94][25] q=$abc$109383$new_n50177_
+.subckt mux2_x1 cmd=$abc$109383$new_n44093_ i0=soc.ram.ram[90][25] i1=soc.ram.ram[94][25] q=$abc$109383$new_n50177_
 .subckt nand2_x0 i0=$abc$109383$new_n50177_ i1=$abc$109383$new_n44830_ nq=$abc$109383$new_n50178_
 .subckt inv_x0 i=soc.ram.ram[95][25] nq=$abc$109383$new_n50179_
-.subckt a2_x2 i0=$abc$109383$new_n50179_ i1=$abc$109383$new_n44586_ q=$abc$109383$new_n50180_
-.subckt o2_x2 i0=soc.ram.ram[91][25] i1=$abc$109383$new_n45321_ q=$abc$109383$new_n50181_
+.subckt and2_x1 i0=$abc$109383$new_n50179_ i1=$abc$109383$new_n44586_ q=$abc$109383$new_n50180_
+.subckt or2_x1 i0=soc.ram.ram[91][25] i1=$abc$109383$new_n45321_ q=$abc$109383$new_n50181_
 .subckt nand2_x0 i0=$abc$109383$new_n50181_ i1=$abc$109383$new_n43890_ nq=$abc$109383$new_n50182_
-.subckt ao22_x2 i0=$abc$109383$new_n50182_ i1=$abc$109383$new_n50180_ i2=$abc$109383$new_n50178_ q=$abc$109383$new_n50183_
+.subckt and21nor_x1 i0=$abc$109383$new_n50182_ i1=$abc$109383$new_n50180_ i2=$abc$109383$new_n50178_ nq=$abc$109383$new_n50183_
 .subckt nand2_x0 i0=$abc$109383$new_n50183_ i1=$abc$109383$new_n45394_ nq=$abc$109383$new_n50184_
-.subckt oa22_x2 i0=$abc$109383$new_n50184_ i1=$abc$109383$new_n50176_ i2=$abc$109383$new_n45016_ q=$abc$109383$new_n50185_
+.subckt or21nand_x1 i0=$abc$109383$new_n50184_ i1=$abc$109383$new_n50176_ i2=$abc$109383$new_n45016_ nq=$abc$109383$new_n50185_
 .subckt nand3_x0 i0=$abc$109383$new_n50185_ i1=$abc$109383$new_n50171_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n50186_
-.subckt mx2_x2 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[74][25] i1=soc.ram.ram[78][25] q=$abc$109383$new_n50187_
-.subckt a2_x2 i0=$abc$109383$new_n50187_ i1=$abc$109383$new_n43681_ q=$abc$109383$new_n50188_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[75][25] i1=soc.ram.ram[79][25] q=$abc$109383$new_n50189_
-.subckt oa22_x2 i0=$abc$109383$new_n46112_ i1=$abc$109383$new_n50189_ i2=$abc$109383$new_n43433_ q=$abc$109383$new_n50190_
+.subckt mux2_x1 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[74][25] i1=soc.ram.ram[78][25] q=$abc$109383$new_n50187_
+.subckt and2_x1 i0=$abc$109383$new_n50187_ i1=$abc$109383$new_n43681_ q=$abc$109383$new_n50188_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[75][25] i1=soc.ram.ram[79][25] q=$abc$109383$new_n50189_
+.subckt or21nand_x1 i0=$abc$109383$new_n46112_ i1=$abc$109383$new_n50189_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n50190_
 .subckt nor2_x0 i0=$abc$109383$new_n50190_ i1=$abc$109383$new_n50188_ nq=$abc$109383$new_n50191_
 .subckt inv_x0 i=soc.ram.ram[66][25] nq=$abc$109383$new_n50192_
 .subckt inv_x0 i=soc.ram.ram[70][25] nq=$abc$109383$new_n50193_
-.subckt mx2_x2 cmd=$abc$109383$new_n44421_ i0=$abc$109383$new_n50193_ i1=$abc$109383$new_n50192_ q=$abc$109383$new_n50194_
-.subckt ao22_x2 i0=$abc$109383$new_n45599_ i1=$abc$109383$new_n50194_ i2=$abc$109383$new_n44479_ q=$abc$109383$new_n50195_
+.subckt mux2_x1 cmd=$abc$109383$new_n44421_ i0=$abc$109383$new_n50193_ i1=$abc$109383$new_n50192_ q=$abc$109383$new_n50194_
+.subckt and21nor_x1 i0=$abc$109383$new_n45599_ i1=$abc$109383$new_n50194_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n50195_
 .subckt inv_x0 i=soc.ram.ram[71][25] nq=$abc$109383$new_n50196_
 .subckt nand2_x0 i0=$abc$109383$new_n50196_ i1=$abc$109383$new_n43861_ nq=$abc$109383$new_n50197_
-.subckt ao22_x2 i0=soc.ram.ram[67][25] i1=$abc$109383$new_n45117_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n50198_
+.subckt and21nor_x1 i0=soc.ram.ram[67][25] i1=$abc$109383$new_n45117_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n50198_
 .subckt nand2_x0 i0=$abc$109383$new_n50198_ i1=$abc$109383$new_n50197_ nq=$abc$109383$new_n50199_
-.subckt oa22_x2 i0=$abc$109383$new_n50199_ i1=$abc$109383$new_n50195_ i2=$abc$109383$new_n50191_ q=$abc$109383$new_n50200_
+.subckt or21nand_x1 i0=$abc$109383$new_n50199_ i1=$abc$109383$new_n50195_ i2=$abc$109383$new_n50191_ nq=$abc$109383$new_n50200_
 .subckt nand2_x0 i0=$abc$109383$new_n50200_ i1=$abc$109383$new_n44642_ nq=$abc$109383$new_n50201_
-.subckt mx2_x2 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[72][25] i1=soc.ram.ram[76][25] q=$abc$109383$new_n50202_
-.subckt a2_x2 i0=$abc$109383$new_n50202_ i1=$abc$109383$new_n45630_ q=$abc$109383$new_n50203_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[73][25] i1=soc.ram.ram[77][25] q=$abc$109383$new_n50204_
-.subckt oa22_x2 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n50204_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n50205_
+.subckt mux2_x1 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[72][25] i1=soc.ram.ram[76][25] q=$abc$109383$new_n50202_
+.subckt and2_x1 i0=$abc$109383$new_n50202_ i1=$abc$109383$new_n45630_ q=$abc$109383$new_n50203_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[73][25] i1=soc.ram.ram[77][25] q=$abc$109383$new_n50204_
+.subckt or21nand_x1 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n50204_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n50205_
 .subckt nor2_x0 i0=$abc$109383$new_n50205_ i1=$abc$109383$new_n50203_ nq=$abc$109383$new_n50206_
 .subckt inv_x0 i=soc.ram.ram[64][25] nq=$abc$109383$new_n50207_
 .subckt inv_x0 i=soc.ram.ram[68][25] nq=$abc$109383$new_n50208_
-.subckt mx2_x2 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n50208_ i1=$abc$109383$new_n50207_ q=$abc$109383$new_n50209_
-.subckt ao22_x2 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n50209_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n50210_
+.subckt mux2_x1 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n50208_ i1=$abc$109383$new_n50207_ q=$abc$109383$new_n50209_
+.subckt and21nor_x1 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n50209_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n50210_
 .subckt inv_x0 i=soc.ram.ram[69][25] nq=$abc$109383$new_n50211_
 .subckt nand2_x0 i0=$abc$109383$new_n50211_ i1=$abc$109383$new_n44587_ nq=$abc$109383$new_n50212_
-.subckt ao22_x2 i0=soc.ram.ram[65][25] i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44065_ q=$abc$109383$new_n50213_
+.subckt and21nor_x1 i0=soc.ram.ram[65][25] i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44065_ nq=$abc$109383$new_n50213_
 .subckt nand2_x0 i0=$abc$109383$new_n50213_ i1=$abc$109383$new_n50212_ nq=$abc$109383$new_n50214_
-.subckt oa22_x2 i0=$abc$109383$new_n50214_ i1=$abc$109383$new_n50210_ i2=$abc$109383$new_n50206_ q=$abc$109383$new_n50215_
+.subckt or21nand_x1 i0=$abc$109383$new_n50214_ i1=$abc$109383$new_n50210_ i2=$abc$109383$new_n50206_ nq=$abc$109383$new_n50215_
 .subckt nand2_x0 i0=$abc$109383$new_n50215_ i1=$abc$109383$new_n43857_ nq=$abc$109383$new_n50216_
 .subckt nand3_x0 i0=$abc$109383$new_n50216_ i1=$abc$109383$new_n50201_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n50217_
 .subckt nand3_x0 i0=$abc$109383$new_n50217_ i1=$abc$109383$new_n50186_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n50218_
-.subckt mx2_x2 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[106][25] i1=soc.ram.ram[110][25] q=$abc$109383$new_n50219_
-.subckt a2_x2 i0=$abc$109383$new_n50219_ i1=$abc$109383$new_n43681_ q=$abc$109383$new_n50220_
-.subckt mx2_x2 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[107][25] i1=soc.ram.ram[111][25] q=$abc$109383$new_n50221_
-.subckt oa22_x2 i0=$abc$109383$new_n46112_ i1=$abc$109383$new_n50221_ i2=$abc$109383$new_n44448_ q=$abc$109383$new_n50222_
+.subckt mux2_x1 cmd=$abc$109383$new_n44176_ i0=soc.ram.ram[106][25] i1=soc.ram.ram[110][25] q=$abc$109383$new_n50219_
+.subckt and2_x1 i0=$abc$109383$new_n50219_ i1=$abc$109383$new_n43681_ q=$abc$109383$new_n50220_
+.subckt mux2_x1 cmd=$abc$109383$new_n45888_ i0=soc.ram.ram[107][25] i1=soc.ram.ram[111][25] q=$abc$109383$new_n50221_
+.subckt or21nand_x1 i0=$abc$109383$new_n46112_ i1=$abc$109383$new_n50221_ i2=$abc$109383$new_n44448_ nq=$abc$109383$new_n50222_
 .subckt nor2_x0 i0=$abc$109383$new_n50222_ i1=$abc$109383$new_n50220_ nq=$abc$109383$new_n50223_
 .subckt inv_x0 i=soc.ram.ram[98][25] nq=$abc$109383$new_n50224_
 .subckt inv_x0 i=soc.ram.ram[102][25] nq=$abc$109383$new_n50225_
-.subckt mx2_x2 cmd=$abc$109383$new_n44421_ i0=$abc$109383$new_n50225_ i1=$abc$109383$new_n50224_ q=$abc$109383$new_n50226_
-.subckt ao22_x2 i0=$abc$109383$new_n45599_ i1=$abc$109383$new_n50226_ i2=$abc$109383$new_n44479_ q=$abc$109383$new_n50227_
+.subckt mux2_x1 cmd=$abc$109383$new_n44421_ i0=$abc$109383$new_n50225_ i1=$abc$109383$new_n50224_ q=$abc$109383$new_n50226_
+.subckt and21nor_x1 i0=$abc$109383$new_n45599_ i1=$abc$109383$new_n50226_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n50227_
 .subckt inv_x0 i=soc.ram.ram[103][25] nq=$abc$109383$new_n50228_
 .subckt nand2_x0 i0=$abc$109383$new_n50228_ i1=$abc$109383$new_n43861_ nq=$abc$109383$new_n50229_
-.subckt ao22_x2 i0=soc.ram.ram[99][25] i1=$abc$109383$new_n45579_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n50230_
+.subckt and21nor_x1 i0=soc.ram.ram[99][25] i1=$abc$109383$new_n45579_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n50230_
 .subckt nand2_x0 i0=$abc$109383$new_n50230_ i1=$abc$109383$new_n50229_ nq=$abc$109383$new_n50231_
-.subckt oa22_x2 i0=$abc$109383$new_n50231_ i1=$abc$109383$new_n50227_ i2=$abc$109383$new_n50223_ q=$abc$109383$new_n50232_
+.subckt or21nand_x1 i0=$abc$109383$new_n50231_ i1=$abc$109383$new_n50227_ i2=$abc$109383$new_n50223_ nq=$abc$109383$new_n50232_
 .subckt nand2_x0 i0=$abc$109383$new_n50232_ i1=$abc$109383$new_n44642_ nq=$abc$109383$new_n50233_
-.subckt mx2_x2 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[104][25] i1=soc.ram.ram[108][25] q=$abc$109383$new_n50234_
-.subckt a2_x2 i0=$abc$109383$new_n50234_ i1=$abc$109383$new_n45630_ q=$abc$109383$new_n50235_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[105][25] i1=soc.ram.ram[109][25] q=$abc$109383$new_n50236_
-.subckt oa22_x2 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n50236_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n50237_
+.subckt mux2_x1 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[104][25] i1=soc.ram.ram[108][25] q=$abc$109383$new_n50234_
+.subckt and2_x1 i0=$abc$109383$new_n50234_ i1=$abc$109383$new_n45630_ q=$abc$109383$new_n50235_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[105][25] i1=soc.ram.ram[109][25] q=$abc$109383$new_n50236_
+.subckt or21nand_x1 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n50236_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n50237_
 .subckt nor2_x0 i0=$abc$109383$new_n50237_ i1=$abc$109383$new_n50235_ nq=$abc$109383$new_n50238_
 .subckt inv_x0 i=soc.ram.ram[96][25] nq=$abc$109383$new_n50239_
 .subckt inv_x0 i=soc.ram.ram[100][25] nq=$abc$109383$new_n50240_
-.subckt mx2_x2 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n50240_ i1=$abc$109383$new_n50239_ q=$abc$109383$new_n50241_
-.subckt ao22_x2 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n50241_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n50242_
+.subckt mux2_x1 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n50240_ i1=$abc$109383$new_n50239_ q=$abc$109383$new_n50241_
+.subckt and21nor_x1 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n50241_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n50242_
 .subckt inv_x0 i=soc.ram.ram[101][25] nq=$abc$109383$new_n50243_
 .subckt nand2_x0 i0=$abc$109383$new_n50243_ i1=$abc$109383$new_n44587_ nq=$abc$109383$new_n50244_
-.subckt ao22_x2 i0=soc.ram.ram[97][25] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44065_ q=$abc$109383$new_n50245_
+.subckt and21nor_x1 i0=soc.ram.ram[97][25] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44065_ nq=$abc$109383$new_n50245_
 .subckt nand2_x0 i0=$abc$109383$new_n50245_ i1=$abc$109383$new_n50244_ nq=$abc$109383$new_n50246_
-.subckt oa22_x2 i0=$abc$109383$new_n50246_ i1=$abc$109383$new_n50242_ i2=$abc$109383$new_n50238_ q=$abc$109383$new_n50247_
+.subckt or21nand_x1 i0=$abc$109383$new_n50246_ i1=$abc$109383$new_n50242_ i2=$abc$109383$new_n50238_ nq=$abc$109383$new_n50247_
 .subckt nand2_x0 i0=$abc$109383$new_n50247_ i1=$abc$109383$new_n43857_ nq=$abc$109383$new_n50248_
 .subckt nand3_x0 i0=$abc$109383$new_n50248_ i1=$abc$109383$new_n50233_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n50249_
-.subckt mx2_x2 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[122][25] i1=soc.ram.ram[126][25] q=$abc$109383$new_n50250_
-.subckt a2_x2 i0=$abc$109383$new_n50250_ i1=$abc$109383$new_n45630_ q=$abc$109383$new_n50251_
-.subckt mx2_x2 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[123][25] i1=soc.ram.ram[127][25] q=$abc$109383$new_n50252_
-.subckt oa22_x2 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n50252_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n50253_
+.subckt mux2_x1 cmd=$abc$109383$new_n44306_ i0=soc.ram.ram[122][25] i1=soc.ram.ram[126][25] q=$abc$109383$new_n50250_
+.subckt and2_x1 i0=$abc$109383$new_n50250_ i1=$abc$109383$new_n45630_ q=$abc$109383$new_n50251_
+.subckt mux2_x1 cmd=$abc$109383$new_n47050_ i0=soc.ram.ram[123][25] i1=soc.ram.ram[127][25] q=$abc$109383$new_n50252_
+.subckt or21nand_x1 i0=$abc$109383$new_n46696_ i1=$abc$109383$new_n50252_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n50253_
 .subckt nor2_x0 i0=$abc$109383$new_n50253_ i1=$abc$109383$new_n50251_ nq=$abc$109383$new_n50254_
 .subckt inv_x0 i=soc.ram.ram[114][25] nq=$abc$109383$new_n50255_
 .subckt inv_x0 i=soc.ram.ram[118][25] nq=$abc$109383$new_n50256_
-.subckt mx2_x2 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n50256_ i1=$abc$109383$new_n50255_ q=$abc$109383$new_n50257_
-.subckt ao22_x2 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n50257_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n50258_
+.subckt mux2_x1 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n50256_ i1=$abc$109383$new_n50255_ q=$abc$109383$new_n50257_
+.subckt and21nor_x1 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n50257_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n50258_
 .subckt inv_x0 i=soc.ram.ram[119][25] nq=$abc$109383$new_n50259_
 .subckt nand2_x0 i0=$abc$109383$new_n50259_ i1=$abc$109383$new_n44587_ nq=$abc$109383$new_n50260_
-.subckt ao22_x2 i0=soc.ram.ram[115][25] i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44065_ q=$abc$109383$new_n50261_
+.subckt and21nor_x1 i0=soc.ram.ram[115][25] i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44065_ nq=$abc$109383$new_n50261_
 .subckt nand2_x0 i0=$abc$109383$new_n50261_ i1=$abc$109383$new_n50260_ nq=$abc$109383$new_n50262_
-.subckt oa22_x2 i0=$abc$109383$new_n50262_ i1=$abc$109383$new_n50258_ i2=$abc$109383$new_n50254_ q=$abc$109383$new_n50263_
+.subckt or21nand_x1 i0=$abc$109383$new_n50262_ i1=$abc$109383$new_n50258_ i2=$abc$109383$new_n50254_ nq=$abc$109383$new_n50263_
 .subckt nand2_x0 i0=$abc$109383$new_n50263_ i1=$abc$109383$new_n44642_ nq=$abc$109383$new_n50264_
-.subckt mx2_x2 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[120][25] i1=soc.ram.ram[124][25] q=$abc$109383$new_n50265_
-.subckt a2_x2 i0=$abc$109383$new_n50265_ i1=$abc$109383$new_n43942_ q=$abc$109383$new_n50266_
-.subckt mx2_x2 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[121][25] i1=soc.ram.ram[125][25] q=$abc$109383$new_n50267_
-.subckt oa22_x2 i0=$abc$109383$new_n45444_ i1=$abc$109383$new_n50267_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n50268_
+.subckt mux2_x1 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[120][25] i1=soc.ram.ram[124][25] q=$abc$109383$new_n50265_
+.subckt and2_x1 i0=$abc$109383$new_n50265_ i1=$abc$109383$new_n43942_ q=$abc$109383$new_n50266_
+.subckt mux2_x1 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[121][25] i1=soc.ram.ram[125][25] q=$abc$109383$new_n50267_
+.subckt or21nand_x1 i0=$abc$109383$new_n45444_ i1=$abc$109383$new_n50267_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n50268_
 .subckt nor2_x0 i0=$abc$109383$new_n50268_ i1=$abc$109383$new_n50266_ nq=$abc$109383$new_n50269_
 .subckt inv_x0 i=soc.ram.ram[112][25] nq=$abc$109383$new_n50270_
 .subckt inv_x0 i=soc.ram.ram[116][25] nq=$abc$109383$new_n50271_
-.subckt mx2_x2 cmd=$abc$109383$new_n45157_ i0=$abc$109383$new_n50271_ i1=$abc$109383$new_n50270_ q=$abc$109383$new_n50272_
-.subckt ao22_x2 i0=$abc$109383$new_n44065_ i1=$abc$109383$new_n50272_ i2=$abc$109383$new_n43838_ q=$abc$109383$new_n50273_
+.subckt mux2_x1 cmd=$abc$109383$new_n45157_ i0=$abc$109383$new_n50271_ i1=$abc$109383$new_n50270_ q=$abc$109383$new_n50272_
+.subckt and21nor_x1 i0=$abc$109383$new_n44065_ i1=$abc$109383$new_n50272_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n50273_
 .subckt inv_x0 i=soc.ram.ram[117][25] nq=$abc$109383$new_n50274_
 .subckt nand2_x0 i0=$abc$109383$new_n50274_ i1=$abc$109383$new_n44592_ nq=$abc$109383$new_n50275_
-.subckt ao22_x2 i0=soc.ram.ram[113][25] i1=$abc$109383$new_n44011_ i2=$abc$109383$new_n44626_ q=$abc$109383$new_n50276_
+.subckt and21nor_x1 i0=soc.ram.ram[113][25] i1=$abc$109383$new_n44011_ i2=$abc$109383$new_n44626_ nq=$abc$109383$new_n50276_
 .subckt nand2_x0 i0=$abc$109383$new_n50276_ i1=$abc$109383$new_n50275_ nq=$abc$109383$new_n50277_
-.subckt oa22_x2 i0=$abc$109383$new_n50277_ i1=$abc$109383$new_n50273_ i2=$abc$109383$new_n50269_ q=$abc$109383$new_n50278_
+.subckt or21nand_x1 i0=$abc$109383$new_n50277_ i1=$abc$109383$new_n50273_ i2=$abc$109383$new_n50269_ nq=$abc$109383$new_n50278_
 .subckt nand2_x0 i0=$abc$109383$new_n50278_ i1=$abc$109383$new_n44657_ nq=$abc$109383$new_n50279_
 .subckt nand3_x0 i0=$abc$109383$new_n50279_ i1=$abc$109383$new_n50264_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n50280_
 .subckt nand3_x0 i0=$abc$109383$new_n50280_ i1=$abc$109383$new_n50249_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n50281_
 .subckt nand3_x0 i0=$abc$109383$new_n50281_ i1=$abc$109383$new_n50218_ i2=$abc$109383$new_n43587_ nq=$abc$109383$new_n50282_
 .subckt inv_x0 i=soc.ram.ram[53][25] nq=$abc$109383$new_n50283_
 .subckt nand2_x0 i0=$abc$109383$new_n50283_ i1=$abc$109383$new_n43744_ nq=$abc$109383$new_n50284_
-.subckt ao22_x2 i0=soc.ram.ram[49][25] i1=$abc$109383$new_n43748_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n50285_
+.subckt and21nor_x1 i0=soc.ram.ram[49][25] i1=$abc$109383$new_n43748_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n50285_
 .subckt nand2_x0 i0=$abc$109383$new_n50285_ i1=$abc$109383$new_n50284_ nq=$abc$109383$new_n50286_
-.subckt mx2_x2 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[48][25] i1=soc.ram.ram[52][25] q=$abc$109383$new_n50287_
+.subckt mux2_x1 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[48][25] i1=soc.ram.ram[52][25] q=$abc$109383$new_n50287_
 .subckt nand2_x0 i0=$abc$109383$new_n50287_ i1=$abc$109383$new_n46128_ nq=$abc$109383$new_n50288_
 .subckt nand3_x0 i0=$abc$109383$new_n50288_ i1=$abc$109383$new_n50286_ i2=$abc$109383$new_n44741_ nq=$abc$109383$new_n50289_
 .subckt inv_x0 i=soc.ram.ram[55][25] nq=$abc$109383$new_n50290_
 .subckt nand2_x0 i0=$abc$109383$new_n50290_ i1=$abc$109383$new_n46113_ nq=$abc$109383$new_n50291_
-.subckt ao22_x2 i0=soc.ram.ram[51][25] i1=$abc$109383$new_n44093_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n50292_
+.subckt and21nor_x1 i0=soc.ram.ram[51][25] i1=$abc$109383$new_n44093_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n50292_
 .subckt nand2_x0 i0=$abc$109383$new_n50292_ i1=$abc$109383$new_n50291_ nq=$abc$109383$new_n50293_
-.subckt mx2_x2 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[50][25] i1=soc.ram.ram[54][25] q=$abc$109383$new_n50294_
-.subckt a2_x2 i0=$abc$109383$new_n50294_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n50295_
+.subckt mux2_x1 cmd=$abc$109383$new_n43800_ i0=soc.ram.ram[50][25] i1=soc.ram.ram[54][25] q=$abc$109383$new_n50294_
+.subckt and2_x1 i0=$abc$109383$new_n50294_ i1=$abc$109383$new_n43731_ q=$abc$109383$new_n50295_
 .subckt nor2_x0 i0=$abc$109383$new_n50295_ i1=$abc$109383$new_n44381_ nq=$abc$109383$new_n50296_
 .subckt nand2_x0 i0=$abc$109383$new_n50296_ i1=$abc$109383$new_n50293_ nq=$abc$109383$new_n50297_
-.subckt oa22_x2 i0=$abc$109383$new_n50297_ i1=$abc$109383$new_n50289_ i2=$abc$109383$new_n43715_ q=$abc$109383$new_n50298_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[32][25] i1=soc.ram.ram[33][25] q=$abc$109383$new_n50299_
-.subckt a2_x2 i0=$abc$109383$new_n50299_ i1=$abc$109383$new_n44158_ q=$abc$109383$new_n50300_
-.subckt mx2_x2 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[36][25] i1=soc.ram.ram[37][25] q=$abc$109383$new_n50301_
-.subckt oa22_x2 i0=$abc$109383$new_n50301_ i1=$abc$109383$new_n44424_ i2=$abc$109383$new_n43564_ q=$abc$109383$new_n50302_
-.subckt o2_x2 i0=$abc$109383$new_n50302_ i1=$abc$109383$new_n50300_ q=$abc$109383$new_n50303_
-.subckt mx2_x2 cmd=$abc$109383$new_n44401_ i0=soc.ram.ram[38][25] i1=soc.ram.ram[39][25] q=$abc$109383$new_n50304_
-.subckt a2_x2 i0=$abc$109383$new_n50304_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n50305_
-.subckt mx2_x2 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[34][25] i1=soc.ram.ram[35][25] q=$abc$109383$new_n50306_
-.subckt oa22_x2 i0=$abc$109383$new_n50306_ i1=$abc$109383$new_n43399_ i2=$abc$109383$new_n43371_ q=$abc$109383$new_n50307_
-.subckt o2_x2 i0=$abc$109383$new_n50307_ i1=$abc$109383$new_n50305_ q=$abc$109383$new_n50308_
-.subckt oa22_x2 i0=$abc$109383$new_n50308_ i1=$abc$109383$new_n50303_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n50309_
-.subckt oa22_x2 i0=$abc$109383$new_n50309_ i1=$abc$109383$new_n50298_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n50310_
-.subckt mx2_x2 cmd=$abc$109383$new_n43654_ i0=soc.ram.ram[0][25] i1=soc.ram.ram[4][25] q=$abc$109383$new_n50311_
+.subckt or21nand_x1 i0=$abc$109383$new_n50297_ i1=$abc$109383$new_n50289_ i2=$abc$109383$new_n43715_ nq=$abc$109383$new_n50298_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[32][25] i1=soc.ram.ram[33][25] q=$abc$109383$new_n50299_
+.subckt and2_x1 i0=$abc$109383$new_n50299_ i1=$abc$109383$new_n44158_ q=$abc$109383$new_n50300_
+.subckt mux2_x1 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[36][25] i1=soc.ram.ram[37][25] q=$abc$109383$new_n50301_
+.subckt or21nand_x1 i0=$abc$109383$new_n50301_ i1=$abc$109383$new_n44424_ i2=$abc$109383$new_n43564_ nq=$abc$109383$new_n50302_
+.subckt or2_x1 i0=$abc$109383$new_n50302_ i1=$abc$109383$new_n50300_ q=$abc$109383$new_n50303_
+.subckt mux2_x1 cmd=$abc$109383$new_n44401_ i0=soc.ram.ram[38][25] i1=soc.ram.ram[39][25] q=$abc$109383$new_n50304_
+.subckt and2_x1 i0=$abc$109383$new_n50304_ i1=$abc$109383$new_n43801_ q=$abc$109383$new_n50305_
+.subckt mux2_x1 cmd=$abc$109383$new_n44334_ i0=soc.ram.ram[34][25] i1=soc.ram.ram[35][25] q=$abc$109383$new_n50306_
+.subckt or21nand_x1 i0=$abc$109383$new_n50306_ i1=$abc$109383$new_n43399_ i2=$abc$109383$new_n43371_ nq=$abc$109383$new_n50307_
+.subckt or2_x1 i0=$abc$109383$new_n50307_ i1=$abc$109383$new_n50305_ q=$abc$109383$new_n50308_
+.subckt or21nand_x1 i0=$abc$109383$new_n50308_ i1=$abc$109383$new_n50303_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n50309_
+.subckt or21nand_x1 i0=$abc$109383$new_n50309_ i1=$abc$109383$new_n50298_ i2=$abc$109383$new_n43780_ nq=$abc$109383$new_n50310_
+.subckt mux2_x1 cmd=$abc$109383$new_n43654_ i0=soc.ram.ram[0][25] i1=soc.ram.ram[4][25] q=$abc$109383$new_n50311_
 .subckt nand2_x0 i0=$abc$109383$new_n50311_ i1=$abc$109383$new_n44122_ nq=$abc$109383$new_n50312_
 .subckt inv_x0 i=soc.ram.ram[5][25] nq=$abc$109383$new_n50313_
 .subckt nand2_x0 i0=$abc$109383$new_n50313_ i1=$abc$109383$new_n44604_ nq=$abc$109383$new_n50314_
-.subckt ao22_x2 i0=soc.ram.ram[1][25] i1=$abc$109383$new_n45233_ i2=$abc$109383$new_n44402_ q=$abc$109383$new_n50315_
+.subckt and21nor_x1 i0=soc.ram.ram[1][25] i1=$abc$109383$new_n45233_ i2=$abc$109383$new_n44402_ nq=$abc$109383$new_n50315_
 .subckt nand2_x0 i0=$abc$109383$new_n50315_ i1=$abc$109383$new_n50314_ nq=$abc$109383$new_n50316_
-.subckt oa22_x2 i0=$abc$109383$new_n50316_ i1=$abc$109383$new_n50312_ i2=$abc$109383$new_n44774_ q=$abc$109383$new_n50317_
-.subckt ao22_x2 i0=soc.ram.ram[3][25] i1=$abc$109383$new_n43976_ i2=$abc$109383$new_n45941_ q=$abc$109383$new_n50318_
-.subckt ao22_x2 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[7][25] i2=$abc$109383$new_n50318_ q=$abc$109383$new_n50319_
-.subckt mx2_x2 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[2][25] i1=soc.ram.ram[6][25] q=$abc$109383$new_n50320_
-.subckt oa22_x2 i0=$abc$109383$new_n44562_ i1=$abc$109383$new_n50320_ i2=$abc$109383$new_n50319_ q=$abc$109383$new_n50321_
+.subckt or21nand_x1 i0=$abc$109383$new_n50316_ i1=$abc$109383$new_n50312_ i2=$abc$109383$new_n44774_ nq=$abc$109383$new_n50317_
+.subckt and21nor_x1 i0=soc.ram.ram[3][25] i1=$abc$109383$new_n43976_ i2=$abc$109383$new_n45941_ nq=$abc$109383$new_n50318_
+.subckt and21nor_x1 i0=$abc$109383$new_n43399_ i1=soc.ram.ram[7][25] i2=$abc$109383$new_n50318_ nq=$abc$109383$new_n50319_
+.subckt mux2_x1 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[2][25] i1=soc.ram.ram[6][25] q=$abc$109383$new_n50320_
+.subckt or21nand_x1 i0=$abc$109383$new_n44562_ i1=$abc$109383$new_n50320_ i2=$abc$109383$new_n50319_ nq=$abc$109383$new_n50321_
 .subckt nand2_x0 i0=$abc$109383$new_n50321_ i1=$abc$109383$new_n44905_ nq=$abc$109383$new_n50322_
 .subckt nand3_x0 i0=$abc$109383$new_n50322_ i1=$abc$109383$new_n50317_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n50323_
-.subckt mx2_x2 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[17][25] i1=soc.ram.ram[21][25] q=$abc$109383$new_n50324_
-.subckt mx2_x2 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[16][25] i1=soc.ram.ram[20][25] q=$abc$109383$new_n50325_
-.subckt mx2_x2 cmd=$abc$109383$new_n46934_ i0=$abc$109383$new_n50325_ i1=$abc$109383$new_n50324_ q=$abc$109383$new_n50326_
+.subckt mux2_x1 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[17][25] i1=soc.ram.ram[21][25] q=$abc$109383$new_n50324_
+.subckt mux2_x1 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[16][25] i1=soc.ram.ram[20][25] q=$abc$109383$new_n50325_
+.subckt mux2_x1 cmd=$abc$109383$new_n46934_ i0=$abc$109383$new_n50325_ i1=$abc$109383$new_n50324_ q=$abc$109383$new_n50326_
 .subckt nand2_x0 i0=$abc$109383$new_n50326_ i1=$abc$109383$new_n45614_ nq=$abc$109383$new_n50327_
-.subckt mx2_x2 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[19][25] i1=soc.ram.ram[23][25] q=$abc$109383$new_n50328_
-.subckt mx2_x2 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[18][25] i1=soc.ram.ram[22][25] q=$abc$109383$new_n50329_
-.subckt mx2_x2 cmd=$abc$109383$new_n43747_ i0=$abc$109383$new_n50329_ i1=$abc$109383$new_n50328_ q=$abc$109383$new_n50330_
+.subckt mux2_x1 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[19][25] i1=soc.ram.ram[23][25] q=$abc$109383$new_n50328_
+.subckt mux2_x1 cmd=$abc$109383$new_n43685_ i0=soc.ram.ram[18][25] i1=soc.ram.ram[22][25] q=$abc$109383$new_n50329_
+.subckt mux2_x1 cmd=$abc$109383$new_n43747_ i0=$abc$109383$new_n50329_ i1=$abc$109383$new_n50328_ q=$abc$109383$new_n50330_
 .subckt nand2_x0 i0=$abc$109383$new_n50330_ i1=$abc$109383$new_n43809_ nq=$abc$109383$new_n50331_
 .subckt nand3_x0 i0=$abc$109383$new_n50331_ i1=$abc$109383$new_n50327_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n50332_
-.subckt oa22_x2 i0=$abc$109383$new_n50332_ i1=$abc$109383$new_n50323_ i2=$abc$109383$new_n43409_ q=$abc$109383$new_n50333_
-.subckt oa22_x2 i0=$abc$109383$new_n50333_ i1=$abc$109383$new_n50310_ i2=$abc$109383$new_n43769_ q=$abc$109383$new_n50334_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[58][25] i1=soc.ram.ram[62][25] q=$abc$109383$new_n50335_
-.subckt mx2_x2 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[59][25] i1=soc.ram.ram[63][25] q=$abc$109383$new_n50336_
-.subckt mx2_x2 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n50336_ i1=$abc$109383$new_n50335_ q=$abc$109383$new_n50337_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[56][25] i1=soc.ram.ram[60][25] q=$abc$109383$new_n50338_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[57][25] i1=soc.ram.ram[61][25] q=$abc$109383$new_n50339_
-.subckt mx2_x2 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n50339_ i1=$abc$109383$new_n50338_ q=$abc$109383$new_n50340_
-.subckt mx2_x2 cmd=$abc$109383$new_n46137_ i0=$abc$109383$new_n50340_ i1=$abc$109383$new_n50337_ q=$abc$109383$new_n50341_
-.subckt o2_x2 i0=$abc$109383$new_n50341_ i1=$abc$109383$new_n43715_ q=$abc$109383$new_n50342_
-.subckt mx2_x2 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[42][25] i1=soc.ram.ram[43][25] q=$abc$109383$new_n50343_
-.subckt a2_x2 i0=$abc$109383$new_n50343_ i1=$abc$109383$new_n44042_ q=$abc$109383$new_n50344_
-.subckt mx2_x2 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[46][25] i1=soc.ram.ram[47][25] q=$abc$109383$new_n50345_
-.subckt oa22_x2 i0=$abc$109383$new_n50345_ i1=$abc$109383$new_n45081_ i2=$abc$109383$new_n43371_ q=$abc$109383$new_n50346_
-.subckt o2_x2 i0=$abc$109383$new_n50346_ i1=$abc$109383$new_n50344_ q=$abc$109383$new_n50347_
-.subckt mx2_x2 cmd=$abc$109383$new_n43698_ i0=soc.ram.ram[40][25] i1=soc.ram.ram[41][25] q=$abc$109383$new_n50348_
-.subckt a2_x2 i0=$abc$109383$new_n50348_ i1=$abc$109383$new_n46495_ q=$abc$109383$new_n50349_
-.subckt mx2_x2 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[44][25] i1=soc.ram.ram[45][25] q=$abc$109383$new_n50350_
-.subckt oa22_x2 i0=$abc$109383$new_n50350_ i1=$abc$109383$new_n43509_ i2=$abc$109383$new_n43532_ q=$abc$109383$new_n50351_
-.subckt o2_x2 i0=$abc$109383$new_n50351_ i1=$abc$109383$new_n50349_ q=$abc$109383$new_n50352_
-.subckt oa22_x2 i0=$abc$109383$new_n50352_ i1=$abc$109383$new_n50347_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n50353_
-.subckt oa22_x2 i0=$abc$109383$new_n50353_ i1=$abc$109383$new_n50342_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n50354_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[9][25] i1=soc.ram.ram[13][25] q=$abc$109383$new_n50355_
-.subckt mx2_x2 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[8][25] i1=soc.ram.ram[12][25] q=$abc$109383$new_n50356_
-.subckt mx2_x2 cmd=$abc$109383$new_n45043_ i0=$abc$109383$new_n50356_ i1=$abc$109383$new_n50355_ q=$abc$109383$new_n50357_
+.subckt or21nand_x1 i0=$abc$109383$new_n50332_ i1=$abc$109383$new_n50323_ i2=$abc$109383$new_n43409_ nq=$abc$109383$new_n50333_
+.subckt or21nand_x1 i0=$abc$109383$new_n50333_ i1=$abc$109383$new_n50310_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n50334_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[58][25] i1=soc.ram.ram[62][25] q=$abc$109383$new_n50335_
+.subckt mux2_x1 cmd=$abc$109383$new_n43395_ i0=soc.ram.ram[59][25] i1=soc.ram.ram[63][25] q=$abc$109383$new_n50336_
+.subckt mux2_x1 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n50336_ i1=$abc$109383$new_n50335_ q=$abc$109383$new_n50337_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[56][25] i1=soc.ram.ram[60][25] q=$abc$109383$new_n50338_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[57][25] i1=soc.ram.ram[61][25] q=$abc$109383$new_n50339_
+.subckt mux2_x1 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n50339_ i1=$abc$109383$new_n50338_ q=$abc$109383$new_n50340_
+.subckt mux2_x1 cmd=$abc$109383$new_n46137_ i0=$abc$109383$new_n50340_ i1=$abc$109383$new_n50337_ q=$abc$109383$new_n50341_
+.subckt or2_x1 i0=$abc$109383$new_n50341_ i1=$abc$109383$new_n43715_ q=$abc$109383$new_n50342_
+.subckt mux2_x1 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[42][25] i1=soc.ram.ram[43][25] q=$abc$109383$new_n50343_
+.subckt and2_x1 i0=$abc$109383$new_n50343_ i1=$abc$109383$new_n44042_ q=$abc$109383$new_n50344_
+.subckt mux2_x1 cmd=$abc$109383$new_n43361_ i0=soc.ram.ram[46][25] i1=soc.ram.ram[47][25] q=$abc$109383$new_n50345_
+.subckt or21nand_x1 i0=$abc$109383$new_n50345_ i1=$abc$109383$new_n45081_ i2=$abc$109383$new_n43371_ nq=$abc$109383$new_n50346_
+.subckt or2_x1 i0=$abc$109383$new_n50346_ i1=$abc$109383$new_n50344_ q=$abc$109383$new_n50347_
+.subckt mux2_x1 cmd=$abc$109383$new_n43698_ i0=soc.ram.ram[40][25] i1=soc.ram.ram[41][25] q=$abc$109383$new_n50348_
+.subckt and2_x1 i0=$abc$109383$new_n50348_ i1=$abc$109383$new_n46495_ q=$abc$109383$new_n50349_
+.subckt mux2_x1 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[44][25] i1=soc.ram.ram[45][25] q=$abc$109383$new_n50350_
+.subckt or21nand_x1 i0=$abc$109383$new_n50350_ i1=$abc$109383$new_n43509_ i2=$abc$109383$new_n43532_ nq=$abc$109383$new_n50351_
+.subckt or2_x1 i0=$abc$109383$new_n50351_ i1=$abc$109383$new_n50349_ q=$abc$109383$new_n50352_
+.subckt or21nand_x1 i0=$abc$109383$new_n50352_ i1=$abc$109383$new_n50347_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n50353_
+.subckt or21nand_x1 i0=$abc$109383$new_n50353_ i1=$abc$109383$new_n50342_ i2=$abc$109383$new_n43780_ nq=$abc$109383$new_n50354_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[9][25] i1=soc.ram.ram[13][25] q=$abc$109383$new_n50355_
+.subckt mux2_x1 cmd=$abc$109383$new_n43952_ i0=soc.ram.ram[8][25] i1=soc.ram.ram[12][25] q=$abc$109383$new_n50356_
+.subckt mux2_x1 cmd=$abc$109383$new_n45043_ i0=$abc$109383$new_n50356_ i1=$abc$109383$new_n50355_ q=$abc$109383$new_n50357_
 .subckt nand2_x0 i0=$abc$109383$new_n50357_ i1=$abc$109383$new_n45015_ nq=$abc$109383$new_n50358_
-.subckt mx2_x2 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[11][25] i1=soc.ram.ram[15][25] q=$abc$109383$new_n50359_
-.subckt mx2_x2 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[10][25] i1=soc.ram.ram[14][25] q=$abc$109383$new_n50360_
-.subckt mx2_x2 cmd=$abc$109383$new_n46934_ i0=$abc$109383$new_n50360_ i1=$abc$109383$new_n50359_ q=$abc$109383$new_n50361_
+.subckt mux2_x1 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[11][25] i1=soc.ram.ram[15][25] q=$abc$109383$new_n50359_
+.subckt mux2_x1 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[10][25] i1=soc.ram.ram[14][25] q=$abc$109383$new_n50360_
+.subckt mux2_x1 cmd=$abc$109383$new_n46934_ i0=$abc$109383$new_n50360_ i1=$abc$109383$new_n50359_ q=$abc$109383$new_n50361_
 .subckt nand2_x0 i0=$abc$109383$new_n50361_ i1=$abc$109383$new_n44789_ nq=$abc$109383$new_n50362_
 .subckt nand3_x0 i0=$abc$109383$new_n50362_ i1=$abc$109383$new_n50358_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n50363_
 .subckt nand2_x0 i0=soc.ram.ram[29][25] i1=$abc$109383$new_n44807_ nq=$abc$109383$new_n50364_
 .subckt inv_x0 i=soc.ram.ram[28][25] nq=$abc$109383$new_n50365_
-.subckt ao22_x2 i0=$abc$109383$new_n46934_ i1=$abc$109383$new_n50365_ i2=$abc$109383$new_n43825_ q=$abc$109383$new_n50366_
+.subckt and21nor_x1 i0=$abc$109383$new_n46934_ i1=$abc$109383$new_n50365_ i2=$abc$109383$new_n43825_ nq=$abc$109383$new_n50366_
 .subckt nand2_x0 i0=$abc$109383$new_n50366_ i1=$abc$109383$new_n50364_ nq=$abc$109383$new_n50367_
-.subckt a2_x2 i0=soc.ram.ram[25][25] i1=$abc$109383$new_n44044_ q=$abc$109383$new_n50368_
-.subckt oa22_x2 i0=$abc$109383$new_n44426_ i1=soc.ram.ram[24][25] i2=$abc$109383$new_n44164_ q=$abc$109383$new_n50369_
-.subckt ao22_x2 i0=$abc$109383$new_n50369_ i1=$abc$109383$new_n50368_ i2=$abc$109383$new_n43544_ q=$abc$109383$new_n50370_
+.subckt and2_x1 i0=soc.ram.ram[25][25] i1=$abc$109383$new_n44044_ q=$abc$109383$new_n50368_
+.subckt or21nand_x1 i0=$abc$109383$new_n44426_ i1=soc.ram.ram[24][25] i2=$abc$109383$new_n44164_ nq=$abc$109383$new_n50369_
+.subckt and21nor_x1 i0=$abc$109383$new_n50369_ i1=$abc$109383$new_n50368_ i2=$abc$109383$new_n43544_ nq=$abc$109383$new_n50370_
 .subckt nand2_x0 i0=$abc$109383$new_n50370_ i1=$abc$109383$new_n50367_ nq=$abc$109383$new_n50371_
 .subckt nand2_x0 i0=soc.ram.ram[31][25] i1=$abc$109383$new_n44044_ nq=$abc$109383$new_n50372_
 .subckt inv_x0 i=soc.ram.ram[30][25] nq=$abc$109383$new_n50373_
-.subckt ao22_x2 i0=$abc$109383$new_n43394_ i1=$abc$109383$new_n50373_ i2=$abc$109383$new_n44795_ q=$abc$109383$new_n50374_
-.subckt a2_x2 i0=$abc$109383$new_n50374_ i1=$abc$109383$new_n50372_ q=$abc$109383$new_n50375_
+.subckt and21nor_x1 i0=$abc$109383$new_n43394_ i1=$abc$109383$new_n50373_ i2=$abc$109383$new_n44795_ nq=$abc$109383$new_n50374_
+.subckt and2_x1 i0=$abc$109383$new_n50374_ i1=$abc$109383$new_n50372_ q=$abc$109383$new_n50375_
 .subckt nand2_x0 i0=soc.ram.ram[27][25] i1=$abc$109383$new_n43642_ nq=$abc$109383$new_n50376_
 .subckt inv_x0 i=soc.ram.ram[26][25] nq=$abc$109383$new_n50377_
-.subckt ao22_x2 i0=$abc$109383$new_n43499_ i1=$abc$109383$new_n50377_ i2=$abc$109383$new_n43560_ q=$abc$109383$new_n50378_
-.subckt oa22_x2 i0=$abc$109383$new_n50378_ i1=$abc$109383$new_n50376_ i2=$abc$109383$new_n43543_ q=$abc$109383$new_n50379_
-.subckt ao22_x2 i0=$abc$109383$new_n50379_ i1=$abc$109383$new_n50375_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n50380_
+.subckt and21nor_x1 i0=$abc$109383$new_n43499_ i1=$abc$109383$new_n50377_ i2=$abc$109383$new_n43560_ nq=$abc$109383$new_n50378_
+.subckt or21nand_x1 i0=$abc$109383$new_n50378_ i1=$abc$109383$new_n50376_ i2=$abc$109383$new_n43543_ nq=$abc$109383$new_n50379_
+.subckt and21nor_x1 i0=$abc$109383$new_n50379_ i1=$abc$109383$new_n50375_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n50380_
 .subckt nand2_x0 i0=$abc$109383$new_n50380_ i1=$abc$109383$new_n50371_ nq=$abc$109383$new_n50381_
-.subckt oa22_x2 i0=$abc$109383$new_n50381_ i1=$abc$109383$new_n50363_ i2=$abc$109383$new_n43409_ q=$abc$109383$new_n50382_
-.subckt oa22_x2 i0=$abc$109383$new_n50382_ i1=$abc$109383$new_n50354_ i2=$abc$109383$new_n44087_ q=$abc$109383$new_n50383_
+.subckt or21nand_x1 i0=$abc$109383$new_n50381_ i1=$abc$109383$new_n50363_ i2=$abc$109383$new_n43409_ nq=$abc$109383$new_n50382_
+.subckt or21nand_x1 i0=$abc$109383$new_n50382_ i1=$abc$109383$new_n50354_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n50383_
 .subckt nand3_x0 i0=$abc$109383$new_n50383_ i1=$abc$109383$new_n50334_ i2=$abc$109383$new_n45475_ nq=$abc$109383$new_n50384_
-.subckt oa22_x2 i0=$abc$109383$new_n50384_ i1=$abc$109383$new_n50282_ i2=$abc$109383$new_n44583_ q=$abc$109383$new_n50385_
+.subckt or21nand_x1 i0=$abc$109383$new_n50384_ i1=$abc$109383$new_n50282_ i2=$abc$109383$new_n44583_ nq=$abc$109383$new_n50385_
 .subckt nand3_x0 i0=$abc$109383$new_n27466_ i1=$abc$109383$new_n19691_ i2=soc.bridge.csr_bridge_1.wb__dat_r[25] nq=$abc$109383$new_n50386_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[25] nq=$abc$109383$new_n50387_
-.subckt o2_x2 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n50387_ q=$abc$109383$new_n50388_
-.subckt a2_x2 i0=$abc$109383$new_n50388_ i1=$abc$109383$new_n50386_ q=$abc$109383$new_n50389_
-.subckt o3_x2 i0=$abc$109383$new_n50389_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n50390_
+.subckt or2_x1 i0=$abc$109383$new_n20803_ i1=$abc$109383$new_n50387_ q=$abc$109383$new_n50388_
+.subckt and2_x1 i0=$abc$109383$new_n50388_ i1=$abc$109383$new_n50386_ q=$abc$109383$new_n50389_
+.subckt or3_x1 i0=$abc$109383$new_n50389_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n50390_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n44268_ i2=$abc$109383$new_n19664_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[25] nq=$abc$109383$new_n50391_
 .subckt nand4_x0 i0=$abc$109383$new_n43299_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[25] nq=$abc$109383$new_n50392_
 .subckt nand3_x0 i0=$abc$109383$new_n28804_ i1=$abc$109383$new_n28801_ i2=soc.hyperram.sr[25] nq=$abc$109383$new_n50393_
-.subckt a2_x2 i0=$abc$109383$new_n50393_ i1=$abc$109383$new_n50392_ q=$abc$109383$new_n50394_
+.subckt and2_x1 i0=$abc$109383$new_n50393_ i1=$abc$109383$new_n50392_ q=$abc$109383$new_n50394_
 .subckt buf_x4 i=$abc$109383$new_n19663_ q=$abc$109383$new_n50395_
 .subckt buf_x4 i=$abc$109383$new_n28380_ q=$abc$109383$new_n50396_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[25] nq=$abc$109383$new_n50397_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[25] nq=$abc$109383$new_n50398_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n50398_ nq=$abc$109383$new_n50399_
 .subckt nand4_x0 i0=$abc$109383$new_n50399_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n45471_ i3=$abc$109383$new_n47238_ nq=$abc$109383$new_n50400_
-.subckt a2_x2 i0=$abc$109383$new_n50400_ i1=$abc$109383$new_n50397_ q=$abc$109383$new_n50401_
-.subckt a4_x2 i0=$abc$109383$new_n50401_ i1=$abc$109383$new_n50394_ i2=$abc$109383$new_n50391_ i3=$abc$109383$new_n50390_ q=$abc$109383$new_n50402_
+.subckt and2_x1 i0=$abc$109383$new_n50400_ i1=$abc$109383$new_n50397_ q=$abc$109383$new_n50401_
+.subckt and4_x1 i0=$abc$109383$new_n50401_ i1=$abc$109383$new_n50394_ i2=$abc$109383$new_n50391_ i3=$abc$109383$new_n50390_ q=$abc$109383$new_n50402_
 .subckt nand2_x0 i0=$abc$109383$new_n50402_ i1=$abc$109383$new_n50385_ nq=$abc$109383$new_n50403_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n50403_ i2=$abc$109383$new_n50157_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103298
-.subckt mx2_x2 cmd=$abc$109383$new_n44587_ i0=soc.ram.ram[26][26] i1=soc.ram.ram[30][26] q=$abc$109383$new_n50405_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n50403_ i2=$abc$109383$new_n50157_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103298
+.subckt mux2_x1 cmd=$abc$109383$new_n44587_ i0=soc.ram.ram[26][26] i1=soc.ram.ram[30][26] q=$abc$109383$new_n50405_
 .subckt nand2_x0 i0=$abc$109383$new_n50405_ i1=$abc$109383$new_n43905_ nq=$abc$109383$new_n50406_
-.subckt mx2_x2 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[27][26] i1=soc.ram.ram[31][26] q=$abc$109383$new_n50407_
+.subckt mux2_x1 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[27][26] i1=soc.ram.ram[31][26] q=$abc$109383$new_n50407_
 .subckt nand2_x0 i0=$abc$109383$new_n50407_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n50408_
 .subckt nand3_x0 i0=$abc$109383$new_n50408_ i1=$abc$109383$new_n50406_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n50409_
-.subckt mx2_x2 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[24][26] i1=soc.ram.ram[28][26] q=$abc$109383$new_n50410_
+.subckt mux2_x1 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[24][26] i1=soc.ram.ram[28][26] q=$abc$109383$new_n50410_
 .subckt nand2_x0 i0=$abc$109383$new_n50410_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n50411_
-.subckt mx2_x2 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[25][26] i1=soc.ram.ram[29][26] q=$abc$109383$new_n50412_
+.subckt mux2_x1 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[25][26] i1=soc.ram.ram[29][26] q=$abc$109383$new_n50412_
 .subckt nand2_x0 i0=$abc$109383$new_n50412_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n50413_
 .subckt nand3_x0 i0=$abc$109383$new_n50413_ i1=$abc$109383$new_n50411_ i2=$abc$109383$new_n43857_ nq=$abc$109383$new_n50414_
 .subckt nand3_x0 i0=$abc$109383$new_n50414_ i1=$abc$109383$new_n50409_ i2=$abc$109383$new_n43899_ nq=$abc$109383$new_n50415_
 .subckt inv_x0 i=soc.ram.ram[21][26] nq=$abc$109383$new_n50416_
 .subckt nand2_x0 i0=$abc$109383$new_n50416_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n50417_
-.subckt ao22_x2 i0=soc.ram.ram[17][26] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n50418_
+.subckt and21nor_x1 i0=soc.ram.ram[17][26] i1=$abc$109383$new_n43861_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n50418_
 .subckt nand2_x0 i0=$abc$109383$new_n50418_ i1=$abc$109383$new_n50417_ nq=$abc$109383$new_n50419_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[16][26] i1=soc.ram.ram[20][26] q=$abc$109383$new_n50420_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[16][26] i1=soc.ram.ram[20][26] q=$abc$109383$new_n50420_
 .subckt nand2_x0 i0=$abc$109383$new_n50420_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n50421_
 .subckt nand3_x0 i0=$abc$109383$new_n50421_ i1=$abc$109383$new_n50419_ i2=$abc$109383$new_n43857_ nq=$abc$109383$new_n50422_
 .subckt inv_x0 i=soc.ram.ram[23][26] nq=$abc$109383$new_n50423_
 .subckt nand2_x0 i0=$abc$109383$new_n50423_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n50424_
-.subckt ao22_x2 i0=soc.ram.ram[19][26] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n50425_
+.subckt and21nor_x1 i0=soc.ram.ram[19][26] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n50425_
 .subckt nand2_x0 i0=$abc$109383$new_n50425_ i1=$abc$109383$new_n50424_ nq=$abc$109383$new_n50426_
-.subckt mx2_x2 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[18][26] i1=soc.ram.ram[22][26] q=$abc$109383$new_n50427_
+.subckt mux2_x1 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[18][26] i1=soc.ram.ram[22][26] q=$abc$109383$new_n50427_
 .subckt nand2_x0 i0=$abc$109383$new_n50427_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n50428_
 .subckt nand3_x0 i0=$abc$109383$new_n50428_ i1=$abc$109383$new_n50426_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n50429_
 .subckt nand3_x0 i0=$abc$109383$new_n50429_ i1=$abc$109383$new_n50422_ i2=$abc$109383$new_n44612_ nq=$abc$109383$new_n50430_
-.subckt oa22_x2 i0=$abc$109383$new_n50430_ i1=$abc$109383$new_n50415_ i2=$abc$109383$new_n44585_ q=$abc$109383$new_n50431_
-.subckt mx2_x2 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[10][26] i1=soc.ram.ram[14][26] q=$abc$109383$new_n50432_
+.subckt or21nand_x1 i0=$abc$109383$new_n50430_ i1=$abc$109383$new_n50415_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n50431_
+.subckt mux2_x1 cmd=$abc$109383$new_n44592_ i0=soc.ram.ram[10][26] i1=soc.ram.ram[14][26] q=$abc$109383$new_n50432_
 .subckt nand2_x0 i0=$abc$109383$new_n50432_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n50433_
-.subckt mx2_x2 cmd=$abc$109383$new_n44451_ i0=soc.ram.ram[11][26] i1=soc.ram.ram[15][26] q=$abc$109383$new_n50434_
+.subckt mux2_x1 cmd=$abc$109383$new_n44451_ i0=soc.ram.ram[11][26] i1=soc.ram.ram[15][26] q=$abc$109383$new_n50434_
 .subckt nand2_x0 i0=$abc$109383$new_n50434_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n50435_
 .subckt nand3_x0 i0=$abc$109383$new_n50435_ i1=$abc$109383$new_n50433_ i2=$abc$109383$new_n44642_ nq=$abc$109383$new_n50436_
-.subckt mx2_x2 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[8][26] i1=soc.ram.ram[12][26] q=$abc$109383$new_n50437_
+.subckt mux2_x1 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[8][26] i1=soc.ram.ram[12][26] q=$abc$109383$new_n50437_
 .subckt nand2_x0 i0=$abc$109383$new_n50437_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n50438_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[9][26] i1=soc.ram.ram[13][26] q=$abc$109383$new_n50439_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[9][26] i1=soc.ram.ram[13][26] q=$abc$109383$new_n50439_
 .subckt nand2_x0 i0=$abc$109383$new_n50439_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n50440_
 .subckt nand3_x0 i0=$abc$109383$new_n50440_ i1=$abc$109383$new_n50438_ i2=$abc$109383$new_n43857_ nq=$abc$109383$new_n50441_
 .subckt nand3_x0 i0=$abc$109383$new_n50441_ i1=$abc$109383$new_n50436_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n50442_
 .subckt inv_x0 i=soc.ram.ram[7][26] nq=$abc$109383$new_n50443_
 .subckt nand2_x0 i0=$abc$109383$new_n50443_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n50444_
-.subckt ao22_x2 i0=soc.ram.ram[3][26] i1=$abc$109383$new_n44660_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n50445_
+.subckt and21nor_x1 i0=soc.ram.ram[3][26] i1=$abc$109383$new_n44660_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n50445_
 .subckt nand2_x0 i0=$abc$109383$new_n50445_ i1=$abc$109383$new_n50444_ nq=$abc$109383$new_n50446_
-.subckt mx2_x2 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[2][26] i1=soc.ram.ram[6][26] q=$abc$109383$new_n50447_
+.subckt mux2_x1 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[2][26] i1=soc.ram.ram[6][26] q=$abc$109383$new_n50447_
 .subckt nand2_x0 i0=$abc$109383$new_n50447_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n50448_
 .subckt nand3_x0 i0=$abc$109383$new_n50448_ i1=$abc$109383$new_n50446_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n50449_
 .subckt inv_x0 i=soc.ram.ram[5][26] nq=$abc$109383$new_n50450_
 .subckt nand2_x0 i0=$abc$109383$new_n50450_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n50451_
-.subckt ao22_x2 i0=soc.ram.ram[1][26] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n50452_
+.subckt and21nor_x1 i0=soc.ram.ram[1][26] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n50452_
 .subckt nand2_x0 i0=$abc$109383$new_n50452_ i1=$abc$109383$new_n50451_ nq=$abc$109383$new_n50453_
-.subckt mx2_x2 cmd=$abc$109383$new_n44501_ i0=soc.ram.ram[0][26] i1=soc.ram.ram[4][26] q=$abc$109383$new_n50454_
+.subckt mux2_x1 cmd=$abc$109383$new_n44501_ i0=soc.ram.ram[0][26] i1=soc.ram.ram[4][26] q=$abc$109383$new_n50454_
 .subckt nand2_x0 i0=$abc$109383$new_n50454_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n50455_
 .subckt nand3_x0 i0=$abc$109383$new_n50455_ i1=$abc$109383$new_n50453_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n50456_
 .subckt nand3_x0 i0=$abc$109383$new_n50456_ i1=$abc$109383$new_n50449_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n50457_
-.subckt oa22_x2 i0=$abc$109383$new_n50457_ i1=$abc$109383$new_n50442_ i2=$abc$109383$new_n43841_ q=$abc$109383$new_n50458_
+.subckt or21nand_x1 i0=$abc$109383$new_n50457_ i1=$abc$109383$new_n50442_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n50458_
 .subckt nand3_x0 i0=$abc$109383$new_n50458_ i1=$abc$109383$new_n50431_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n50459_
-.subckt mx2_x2 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[42][26] i1=soc.ram.ram[46][26] q=$abc$109383$new_n50460_
+.subckt mux2_x1 cmd=$abc$109383$new_n44600_ i0=soc.ram.ram[42][26] i1=soc.ram.ram[46][26] q=$abc$109383$new_n50460_
 .subckt nand2_x0 i0=$abc$109383$new_n50460_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n50461_
-.subckt mx2_x2 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[43][26] i1=soc.ram.ram[47][26] q=$abc$109383$new_n50462_
+.subckt mux2_x1 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[43][26] i1=soc.ram.ram[47][26] q=$abc$109383$new_n50462_
 .subckt nand2_x0 i0=$abc$109383$new_n50462_ i1=$abc$109383$new_n44603_ nq=$abc$109383$new_n50463_
 .subckt nand3_x0 i0=$abc$109383$new_n50463_ i1=$abc$109383$new_n50461_ i2=$abc$109383$new_n44642_ nq=$abc$109383$new_n50464_
-.subckt mx2_x2 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[40][26] i1=soc.ram.ram[44][26] q=$abc$109383$new_n50465_
+.subckt mux2_x1 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[40][26] i1=soc.ram.ram[44][26] q=$abc$109383$new_n50465_
 .subckt nand2_x0 i0=$abc$109383$new_n50465_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n50466_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[41][26] i1=soc.ram.ram[45][26] q=$abc$109383$new_n50467_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[41][26] i1=soc.ram.ram[45][26] q=$abc$109383$new_n50467_
 .subckt nand2_x0 i0=$abc$109383$new_n50467_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n50468_
 .subckt nand3_x0 i0=$abc$109383$new_n50468_ i1=$abc$109383$new_n50466_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n50469_
 .subckt nand3_x0 i0=$abc$109383$new_n50469_ i1=$abc$109383$new_n50464_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n50470_
 .subckt inv_x0 i=soc.ram.ram[37][26] nq=$abc$109383$new_n50471_
 .subckt nand2_x0 i0=$abc$109383$new_n50471_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n50472_
-.subckt ao22_x2 i0=soc.ram.ram[33][26] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ q=$abc$109383$new_n50473_
+.subckt and21nor_x1 i0=soc.ram.ram[33][26] i1=$abc$109383$new_n43927_ i2=$abc$109383$new_n43924_ nq=$abc$109383$new_n50473_
 .subckt nand2_x0 i0=$abc$109383$new_n50473_ i1=$abc$109383$new_n50472_ nq=$abc$109383$new_n50474_
-.subckt mx2_x2 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[32][26] i1=soc.ram.ram[36][26] q=$abc$109383$new_n50475_
+.subckt mux2_x1 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[32][26] i1=soc.ram.ram[36][26] q=$abc$109383$new_n50475_
 .subckt nand2_x0 i0=$abc$109383$new_n50475_ i1=$abc$109383$new_n44632_ nq=$abc$109383$new_n50476_
 .subckt nand3_x0 i0=$abc$109383$new_n50476_ i1=$abc$109383$new_n50474_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n50477_
 .subckt inv_x0 i=soc.ram.ram[39][26] nq=$abc$109383$new_n50478_
 .subckt nand2_x0 i0=$abc$109383$new_n50478_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n50479_
-.subckt ao22_x2 i0=soc.ram.ram[35][26] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n50480_
+.subckt and21nor_x1 i0=soc.ram.ram[35][26] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n50480_
 .subckt nand2_x0 i0=$abc$109383$new_n50480_ i1=$abc$109383$new_n50479_ nq=$abc$109383$new_n50481_
-.subckt mx2_x2 cmd=$abc$109383$new_n45452_ i0=soc.ram.ram[34][26] i1=soc.ram.ram[38][26] q=$abc$109383$new_n50482_
+.subckt mux2_x1 cmd=$abc$109383$new_n45452_ i0=soc.ram.ram[34][26] i1=soc.ram.ram[38][26] q=$abc$109383$new_n50482_
 .subckt nand2_x0 i0=$abc$109383$new_n50482_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n50483_
 .subckt nand3_x0 i0=$abc$109383$new_n50483_ i1=$abc$109383$new_n50481_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n50484_
 .subckt nand3_x0 i0=$abc$109383$new_n50484_ i1=$abc$109383$new_n50477_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n50485_
-.subckt oa22_x2 i0=$abc$109383$new_n50485_ i1=$abc$109383$new_n50470_ i2=$abc$109383$new_n43971_ q=$abc$109383$new_n50486_
-.subckt mx2_x2 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[58][26] i1=soc.ram.ram[62][26] q=$abc$109383$new_n50487_
+.subckt or21nand_x1 i0=$abc$109383$new_n50485_ i1=$abc$109383$new_n50470_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n50486_
+.subckt mux2_x1 cmd=$abc$109383$new_n44605_ i0=soc.ram.ram[58][26] i1=soc.ram.ram[62][26] q=$abc$109383$new_n50487_
 .subckt nand2_x0 i0=$abc$109383$new_n50487_ i1=$abc$109383$new_n44599_ nq=$abc$109383$new_n50488_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[59][26] i1=soc.ram.ram[63][26] q=$abc$109383$new_n50489_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[59][26] i1=soc.ram.ram[63][26] q=$abc$109383$new_n50489_
 .subckt nand2_x0 i0=$abc$109383$new_n50489_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n50490_
 .subckt nand3_x0 i0=$abc$109383$new_n50490_ i1=$abc$109383$new_n50488_ i2=$abc$109383$new_n44642_ nq=$abc$109383$new_n50491_
-.subckt mx2_x2 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[56][26] i1=soc.ram.ram[60][26] q=$abc$109383$new_n50492_
+.subckt mux2_x1 cmd=$abc$109383$new_n44027_ i0=soc.ram.ram[56][26] i1=soc.ram.ram[60][26] q=$abc$109383$new_n50492_
 .subckt nand2_x0 i0=$abc$109383$new_n50492_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n50493_
-.subckt mx2_x2 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[57][26] i1=soc.ram.ram[61][26] q=$abc$109383$new_n50494_
+.subckt mux2_x1 cmd=$abc$109383$new_n44936_ i0=soc.ram.ram[57][26] i1=soc.ram.ram[61][26] q=$abc$109383$new_n50494_
 .subckt nand2_x0 i0=$abc$109383$new_n50494_ i1=$abc$109383$new_n43964_ nq=$abc$109383$new_n50495_
 .subckt nand3_x0 i0=$abc$109383$new_n50495_ i1=$abc$109383$new_n50493_ i2=$abc$109383$new_n44657_ nq=$abc$109383$new_n50496_
 .subckt nand3_x0 i0=$abc$109383$new_n50496_ i1=$abc$109383$new_n50491_ i2=$abc$109383$new_n44640_ nq=$abc$109383$new_n50497_
 .subckt inv_x0 i=soc.ram.ram[55][26] nq=$abc$109383$new_n50498_
 .subckt nand2_x0 i0=$abc$109383$new_n50498_ i1=$abc$109383$new_n44666_ nq=$abc$109383$new_n50499_
-.subckt ao22_x2 i0=soc.ram.ram[51][26] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ q=$abc$109383$new_n50500_
+.subckt and21nor_x1 i0=soc.ram.ram[51][26] i1=$abc$109383$new_n43966_ i2=$abc$109383$new_n43973_ nq=$abc$109383$new_n50500_
 .subckt nand2_x0 i0=$abc$109383$new_n50500_ i1=$abc$109383$new_n50499_ nq=$abc$109383$new_n50501_
-.subckt mx2_x2 cmd=$abc$109383$new_n44501_ i0=soc.ram.ram[50][26] i1=soc.ram.ram[54][26] q=$abc$109383$new_n50502_
+.subckt mux2_x1 cmd=$abc$109383$new_n44501_ i0=soc.ram.ram[50][26] i1=soc.ram.ram[54][26] q=$abc$109383$new_n50502_
 .subckt nand2_x0 i0=$abc$109383$new_n50502_ i1=$abc$109383$new_n44703_ nq=$abc$109383$new_n50503_
 .subckt nand3_x0 i0=$abc$109383$new_n50503_ i1=$abc$109383$new_n50501_ i2=$abc$109383$new_n44623_ nq=$abc$109383$new_n50504_
 .subckt inv_x0 i=soc.ram.ram[53][26] nq=$abc$109383$new_n50505_
 .subckt nand2_x0 i0=$abc$109383$new_n50505_ i1=$abc$109383$new_n43955_ nq=$abc$109383$new_n50506_
-.subckt ao22_x2 i0=soc.ram.ram[49][26] i1=$abc$109383$new_n44600_ i2=$abc$109383$new_n46175_ q=$abc$109383$new_n50507_
+.subckt and21nor_x1 i0=soc.ram.ram[49][26] i1=$abc$109383$new_n44600_ i2=$abc$109383$new_n46175_ nq=$abc$109383$new_n50507_
 .subckt nand2_x0 i0=$abc$109383$new_n50507_ i1=$abc$109383$new_n50506_ nq=$abc$109383$new_n50508_
-.subckt mx2_x2 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[48][26] i1=soc.ram.ram[52][26] q=$abc$109383$new_n50509_
+.subckt mux2_x1 cmd=$abc$109383$new_n44017_ i0=soc.ram.ram[48][26] i1=soc.ram.ram[52][26] q=$abc$109383$new_n50509_
 .subckt nand2_x0 i0=$abc$109383$new_n50509_ i1=$abc$109383$new_n44731_ nq=$abc$109383$new_n50510_
 .subckt nand3_x0 i0=$abc$109383$new_n50510_ i1=$abc$109383$new_n50508_ i2=$abc$109383$new_n43912_ nq=$abc$109383$new_n50511_
 .subckt nand3_x0 i0=$abc$109383$new_n50511_ i1=$abc$109383$new_n50504_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n50512_
-.subckt oa22_x2 i0=$abc$109383$new_n50512_ i1=$abc$109383$new_n50497_ i2=$abc$109383$new_n43922_ q=$abc$109383$new_n50513_
+.subckt or21nand_x1 i0=$abc$109383$new_n50512_ i1=$abc$109383$new_n50497_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n50513_
 .subckt nand3_x0 i0=$abc$109383$new_n50513_ i1=$abc$109383$new_n50486_ i2=$abc$109383$new_n43901_ nq=$abc$109383$new_n50514_
 .subckt nand3_x0 i0=$abc$109383$new_n50514_ i1=$abc$109383$new_n50459_ i2=$abc$109383$new_n43591_ nq=$abc$109383$new_n50515_
-.subckt mx2_x2 cmd=$abc$109383$new_n44402_ i0=soc.ram.ram[90][26] i1=soc.ram.ram[91][26] q=$abc$109383$new_n50516_
-.subckt a2_x2 i0=$abc$109383$new_n50516_ i1=$abc$109383$new_n44043_ q=$abc$109383$new_n50517_
-.subckt mx2_x2 cmd=$abc$109383$new_n45042_ i0=soc.ram.ram[94][26] i1=soc.ram.ram[95][26] q=$abc$109383$new_n50518_
-.subckt oa22_x2 i0=$abc$109383$new_n50518_ i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n50519_
+.subckt mux2_x1 cmd=$abc$109383$new_n44402_ i0=soc.ram.ram[90][26] i1=soc.ram.ram[91][26] q=$abc$109383$new_n50516_
+.subckt and2_x1 i0=$abc$109383$new_n50516_ i1=$abc$109383$new_n44043_ q=$abc$109383$new_n50517_
+.subckt mux2_x1 cmd=$abc$109383$new_n45042_ i0=soc.ram.ram[94][26] i1=soc.ram.ram[95][26] q=$abc$109383$new_n50518_
+.subckt or21nand_x1 i0=$abc$109383$new_n50518_ i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n43375_ nq=$abc$109383$new_n50519_
 .subckt nor2_x0 i0=$abc$109383$new_n50519_ i1=$abc$109383$new_n50517_ nq=$abc$109383$new_n50520_
-.subckt mx2_x2 cmd=$abc$109383$new_n45093_ i0=soc.ram.ram[88][26] i1=soc.ram.ram[89][26] q=$abc$109383$new_n50521_
-.subckt a2_x2 i0=$abc$109383$new_n50521_ i1=$abc$109383$new_n44902_ q=$abc$109383$new_n50522_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[92][26] i1=soc.ram.ram[93][26] q=$abc$109383$new_n50523_
-.subckt oa22_x2 i0=$abc$109383$new_n50523_ i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43808_ q=$abc$109383$new_n50524_
+.subckt mux2_x1 cmd=$abc$109383$new_n45093_ i0=soc.ram.ram[88][26] i1=soc.ram.ram[89][26] q=$abc$109383$new_n50521_
+.subckt and2_x1 i0=$abc$109383$new_n50521_ i1=$abc$109383$new_n44902_ q=$abc$109383$new_n50522_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[92][26] i1=soc.ram.ram[93][26] q=$abc$109383$new_n50523_
+.subckt or21nand_x1 i0=$abc$109383$new_n50523_ i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43808_ nq=$abc$109383$new_n50524_
 .subckt nor2_x0 i0=$abc$109383$new_n50524_ i1=$abc$109383$new_n50522_ nq=$abc$109383$new_n50525_
-.subckt ao22_x2 i0=$abc$109383$new_n50525_ i1=$abc$109383$new_n50520_ i2=$abc$109383$new_n43768_ q=$abc$109383$new_n50526_
-.subckt mx2_x2 cmd=$abc$109383$new_n45093_ i0=soc.ram.ram[80][26] i1=soc.ram.ram[81][26] q=$abc$109383$new_n50527_
-.subckt a2_x2 i0=$abc$109383$new_n50527_ i1=$abc$109383$new_n44902_ q=$abc$109383$new_n50528_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[84][26] i1=soc.ram.ram[85][26] q=$abc$109383$new_n50529_
-.subckt oa22_x2 i0=$abc$109383$new_n50529_ i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n50530_
+.subckt and21nor_x1 i0=$abc$109383$new_n50525_ i1=$abc$109383$new_n50520_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n50526_
+.subckt mux2_x1 cmd=$abc$109383$new_n45093_ i0=soc.ram.ram[80][26] i1=soc.ram.ram[81][26] q=$abc$109383$new_n50527_
+.subckt and2_x1 i0=$abc$109383$new_n50527_ i1=$abc$109383$new_n44902_ q=$abc$109383$new_n50528_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[84][26] i1=soc.ram.ram[85][26] q=$abc$109383$new_n50529_
+.subckt or21nand_x1 i0=$abc$109383$new_n50529_ i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n50530_
 .subckt nor2_x0 i0=$abc$109383$new_n50530_ i1=$abc$109383$new_n50528_ nq=$abc$109383$new_n50531_
-.subckt mx2_x2 cmd=$abc$109383$new_n43690_ i0=soc.ram.ram[86][26] i1=soc.ram.ram[87][26] q=$abc$109383$new_n50532_
-.subckt a2_x2 i0=$abc$109383$new_n50532_ i1=$abc$109383$new_n45082_ q=$abc$109383$new_n50533_
-.subckt mx2_x2 cmd=$abc$109383$new_n43481_ i0=soc.ram.ram[82][26] i1=soc.ram.ram[83][26] q=$abc$109383$new_n50534_
-.subckt oa22_x2 i0=$abc$109383$new_n50534_ i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44391_ q=$abc$109383$new_n50535_
+.subckt mux2_x1 cmd=$abc$109383$new_n43690_ i0=soc.ram.ram[86][26] i1=soc.ram.ram[87][26] q=$abc$109383$new_n50532_
+.subckt and2_x1 i0=$abc$109383$new_n50532_ i1=$abc$109383$new_n45082_ q=$abc$109383$new_n50533_
+.subckt mux2_x1 cmd=$abc$109383$new_n43481_ i0=soc.ram.ram[82][26] i1=soc.ram.ram[83][26] q=$abc$109383$new_n50534_
+.subckt or21nand_x1 i0=$abc$109383$new_n50534_ i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44391_ nq=$abc$109383$new_n50535_
 .subckt nor2_x0 i0=$abc$109383$new_n50535_ i1=$abc$109383$new_n50533_ nq=$abc$109383$new_n50536_
-.subckt ao22_x2 i0=$abc$109383$new_n50536_ i1=$abc$109383$new_n50531_ i2=$abc$109383$new_n44086_ q=$abc$109383$new_n50537_
-.subckt ao22_x2 i0=$abc$109383$new_n50537_ i1=$abc$109383$new_n50526_ i2=$abc$109383$new_n43541_ q=$abc$109383$new_n50538_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[74][26] i1=soc.ram.ram[78][26] q=$abc$109383$new_n50539_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[75][26] i1=soc.ram.ram[79][26] q=$abc$109383$new_n50540_
-.subckt mx2_x2 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n50540_ i1=$abc$109383$new_n50539_ q=$abc$109383$new_n50541_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[72][26] i1=soc.ram.ram[76][26] q=$abc$109383$new_n50542_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[73][26] i1=soc.ram.ram[77][26] q=$abc$109383$new_n50543_
-.subckt mx2_x2 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n50543_ i1=$abc$109383$new_n50542_ q=$abc$109383$new_n50544_
-.subckt mx2_x2 cmd=$abc$109383$new_n44774_ i0=$abc$109383$new_n50544_ i1=$abc$109383$new_n50541_ q=$abc$109383$new_n50545_
+.subckt and21nor_x1 i0=$abc$109383$new_n50536_ i1=$abc$109383$new_n50531_ i2=$abc$109383$new_n44086_ nq=$abc$109383$new_n50537_
+.subckt and21nor_x1 i0=$abc$109383$new_n50537_ i1=$abc$109383$new_n50526_ i2=$abc$109383$new_n43541_ nq=$abc$109383$new_n50538_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[74][26] i1=soc.ram.ram[78][26] q=$abc$109383$new_n50539_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[75][26] i1=soc.ram.ram[79][26] q=$abc$109383$new_n50540_
+.subckt mux2_x1 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n50540_ i1=$abc$109383$new_n50539_ q=$abc$109383$new_n50541_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[72][26] i1=soc.ram.ram[76][26] q=$abc$109383$new_n50542_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[73][26] i1=soc.ram.ram[77][26] q=$abc$109383$new_n50543_
+.subckt mux2_x1 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n50543_ i1=$abc$109383$new_n50542_ q=$abc$109383$new_n50544_
+.subckt mux2_x1 cmd=$abc$109383$new_n44774_ i0=$abc$109383$new_n50544_ i1=$abc$109383$new_n50541_ q=$abc$109383$new_n50545_
 .subckt nor2_x0 i0=$abc$109383$new_n50545_ i1=$abc$109383$new_n44693_ nq=$abc$109383$new_n50546_
 .subckt inv_x0 i=soc.ram.ram[69][26] nq=$abc$109383$new_n50547_
 .subckt nand2_x0 i0=$abc$109383$new_n50547_ i1=$abc$109383$new_n44824_ nq=$abc$109383$new_n50548_
-.subckt ao22_x2 i0=soc.ram.ram[65][26] i1=$abc$109383$new_n45081_ i2=$abc$109383$new_n43444_ q=$abc$109383$new_n50549_
+.subckt and21nor_x1 i0=soc.ram.ram[65][26] i1=$abc$109383$new_n45081_ i2=$abc$109383$new_n43444_ nq=$abc$109383$new_n50549_
 .subckt nand2_x0 i0=$abc$109383$new_n50549_ i1=$abc$109383$new_n50548_ nq=$abc$109383$new_n50550_
-.subckt mx2_x2 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[64][26] i1=soc.ram.ram[68][26] q=$abc$109383$new_n50551_
+.subckt mux2_x1 cmd=$abc$109383$new_n44434_ i0=soc.ram.ram[64][26] i1=soc.ram.ram[68][26] q=$abc$109383$new_n50551_
 .subckt nand2_x0 i0=$abc$109383$new_n50551_ i1=$abc$109383$new_n43508_ nq=$abc$109383$new_n50552_
-.subckt a3_x2 i0=$abc$109383$new_n50552_ i1=$abc$109383$new_n50550_ i2=$abc$109383$new_n43544_ q=$abc$109383$new_n50553_
+.subckt and3_x1 i0=$abc$109383$new_n50552_ i1=$abc$109383$new_n50550_ i2=$abc$109383$new_n43544_ q=$abc$109383$new_n50553_
 .subckt inv_x0 i=soc.ram.ram[71][26] nq=$abc$109383$new_n50554_
 .subckt nand2_x0 i0=$abc$109383$new_n50554_ i1=$abc$109383$new_n44156_ nq=$abc$109383$new_n50555_
-.subckt ao22_x2 i0=soc.ram.ram[67][26] i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n44504_ q=$abc$109383$new_n50556_
+.subckt and21nor_x1 i0=soc.ram.ram[67][26] i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n44504_ nq=$abc$109383$new_n50556_
 .subckt nand2_x0 i0=$abc$109383$new_n50556_ i1=$abc$109383$new_n50555_ nq=$abc$109383$new_n50557_
-.subckt mx2_x2 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[66][26] i1=soc.ram.ram[70][26] q=$abc$109383$new_n50558_
-.subckt a2_x2 i0=$abc$109383$new_n50558_ i1=$abc$109383$new_n44179_ q=$abc$109383$new_n50559_
+.subckt mux2_x1 cmd=$abc$109383$new_n45546_ i0=soc.ram.ram[66][26] i1=soc.ram.ram[70][26] q=$abc$109383$new_n50558_
+.subckt and2_x1 i0=$abc$109383$new_n50558_ i1=$abc$109383$new_n44179_ q=$abc$109383$new_n50559_
 .subckt nor2_x0 i0=$abc$109383$new_n50559_ i1=$abc$109383$new_n43375_ nq=$abc$109383$new_n50560_
-.subckt a2_x2 i0=$abc$109383$new_n50560_ i1=$abc$109383$new_n50557_ q=$abc$109383$new_n50561_
-.subckt ao22_x2 i0=$abc$109383$new_n50561_ i1=$abc$109383$new_n50553_ i2=$abc$109383$new_n45211_ q=$abc$109383$new_n50562_
-.subckt ao22_x2 i0=$abc$109383$new_n50562_ i1=$abc$109383$new_n50546_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n50563_
-.subckt ao22_x2 i0=$abc$109383$new_n50563_ i1=$abc$109383$new_n50538_ i2=$abc$109383$new_n44007_ q=$abc$109383$new_n50564_
-.subckt o2_x2 i0=soc.ram.ram[105][26] i1=$abc$109383$new_n44138_ q=$abc$109383$new_n50565_
-.subckt ao22_x2 i0=soc.ram.ram[109][26] i1=$abc$109383$new_n46495_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n50566_
+.subckt and2_x1 i0=$abc$109383$new_n50560_ i1=$abc$109383$new_n50557_ q=$abc$109383$new_n50561_
+.subckt and21nor_x1 i0=$abc$109383$new_n50561_ i1=$abc$109383$new_n50553_ i2=$abc$109383$new_n45211_ nq=$abc$109383$new_n50562_
+.subckt and21nor_x1 i0=$abc$109383$new_n50562_ i1=$abc$109383$new_n50546_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n50563_
+.subckt and21nor_x1 i0=$abc$109383$new_n50563_ i1=$abc$109383$new_n50538_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n50564_
+.subckt or2_x1 i0=soc.ram.ram[105][26] i1=$abc$109383$new_n44138_ q=$abc$109383$new_n50565_
+.subckt and21nor_x1 i0=soc.ram.ram[109][26] i1=$abc$109383$new_n46495_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n50566_
 .subckt nand2_x0 i0=$abc$109383$new_n50566_ i1=$abc$109383$new_n50565_ nq=$abc$109383$new_n50567_
-.subckt mx2_x2 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[104][26] i1=soc.ram.ram[108][26] q=$abc$109383$new_n50568_
+.subckt mux2_x1 cmd=$abc$109383$new_n44229_ i0=soc.ram.ram[104][26] i1=soc.ram.ram[108][26] q=$abc$109383$new_n50568_
 .subckt nand2_x0 i0=$abc$109383$new_n50568_ i1=$abc$109383$new_n44485_ nq=$abc$109383$new_n50569_
-.subckt oa22_x2 i0=$abc$109383$new_n50569_ i1=$abc$109383$new_n50567_ i2=$abc$109383$new_n44448_ q=$abc$109383$new_n50570_
-.subckt o2_x2 i0=soc.ram.ram[97][26] i1=$abc$109383$new_n43977_ q=$abc$109383$new_n50571_
-.subckt ao22_x2 i0=soc.ram.ram[101][26] i1=$abc$109383$new_n43878_ i2=$abc$109383$new_n43847_ q=$abc$109383$new_n50572_
+.subckt or21nand_x1 i0=$abc$109383$new_n50569_ i1=$abc$109383$new_n50567_ i2=$abc$109383$new_n44448_ nq=$abc$109383$new_n50570_
+.subckt or2_x1 i0=soc.ram.ram[97][26] i1=$abc$109383$new_n43977_ q=$abc$109383$new_n50571_
+.subckt and21nor_x1 i0=soc.ram.ram[101][26] i1=$abc$109383$new_n43878_ i2=$abc$109383$new_n43847_ nq=$abc$109383$new_n50572_
 .subckt nand2_x0 i0=$abc$109383$new_n50572_ i1=$abc$109383$new_n50571_ nq=$abc$109383$new_n50573_
-.subckt mx2_x2 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[96][26] i1=soc.ram.ram[100][26] q=$abc$109383$new_n50574_
+.subckt mux2_x1 cmd=$abc$109383$new_n44025_ i0=soc.ram.ram[96][26] i1=soc.ram.ram[100][26] q=$abc$109383$new_n50574_
 .subckt nand2_x0 i0=$abc$109383$new_n50574_ i1=$abc$109383$new_n45053_ nq=$abc$109383$new_n50575_
-.subckt oa22_x2 i0=$abc$109383$new_n50575_ i1=$abc$109383$new_n50573_ i2=$abc$109383$new_n43767_ q=$abc$109383$new_n50576_
+.subckt or21nand_x1 i0=$abc$109383$new_n50575_ i1=$abc$109383$new_n50573_ i2=$abc$109383$new_n43767_ nq=$abc$109383$new_n50576_
 .subckt nand2_x0 i0=$abc$109383$new_n50576_ i1=$abc$109383$new_n50570_ nq=$abc$109383$new_n50577_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[107][26] i1=soc.ram.ram[111][26] q=$abc$109383$new_n50578_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[106][26] i1=soc.ram.ram[110][26] q=$abc$109383$new_n50579_
-.subckt mx2_x2 cmd=$abc$109383$new_n44504_ i0=$abc$109383$new_n50579_ i1=$abc$109383$new_n50578_ q=$abc$109383$new_n50580_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[99][26] i1=soc.ram.ram[103][26] q=$abc$109383$new_n50581_
-.subckt mx2_x2 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[98][26] i1=soc.ram.ram[102][26] q=$abc$109383$new_n50582_
-.subckt mx2_x2 cmd=$abc$109383$new_n44504_ i0=$abc$109383$new_n50582_ i1=$abc$109383$new_n50581_ q=$abc$109383$new_n50583_
-.subckt mx2_x2 cmd=$abc$109383$new_n43767_ i0=$abc$109383$new_n50583_ i1=$abc$109383$new_n50580_ q=$abc$109383$new_n50584_
-.subckt mx2_x2 cmd=$abc$109383$new_n45434_ i0=$abc$109383$new_n50584_ i1=$abc$109383$new_n50577_ q=$abc$109383$new_n50585_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[107][26] i1=soc.ram.ram[111][26] q=$abc$109383$new_n50578_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[106][26] i1=soc.ram.ram[110][26] q=$abc$109383$new_n50579_
+.subckt mux2_x1 cmd=$abc$109383$new_n44504_ i0=$abc$109383$new_n50579_ i1=$abc$109383$new_n50578_ q=$abc$109383$new_n50580_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[99][26] i1=soc.ram.ram[103][26] q=$abc$109383$new_n50581_
+.subckt mux2_x1 cmd=$abc$109383$new_n43617_ i0=soc.ram.ram[98][26] i1=soc.ram.ram[102][26] q=$abc$109383$new_n50582_
+.subckt mux2_x1 cmd=$abc$109383$new_n44504_ i0=$abc$109383$new_n50582_ i1=$abc$109383$new_n50581_ q=$abc$109383$new_n50583_
+.subckt mux2_x1 cmd=$abc$109383$new_n43767_ i0=$abc$109383$new_n50583_ i1=$abc$109383$new_n50580_ q=$abc$109383$new_n50584_
+.subckt mux2_x1 cmd=$abc$109383$new_n45434_ i0=$abc$109383$new_n50584_ i1=$abc$109383$new_n50577_ q=$abc$109383$new_n50585_
 .subckt nand2_x0 i0=$abc$109383$new_n50585_ i1=$abc$109383$new_n43327_ nq=$abc$109383$new_n50586_
-.subckt ao22_x2 i0=soc.ram.ram[115][26] i1=$abc$109383$new_n44066_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n50587_
-.subckt ao22_x2 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[119][26] i2=$abc$109383$new_n50587_ q=$abc$109383$new_n50588_
-.subckt mx2_x2 cmd=$abc$109383$new_n43607_ i0=soc.ram.ram[114][26] i1=soc.ram.ram[118][26] q=$abc$109383$new_n50589_
-.subckt a2_x2 i0=$abc$109383$new_n50589_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n50590_
-.subckt ao22_x2 i0=$abc$109383$new_n50590_ i1=$abc$109383$new_n50588_ i2=$abc$109383$new_n44692_ q=$abc$109383$new_n50591_
-.subckt ao22_x2 i0=soc.ram.ram[123][26] i1=$abc$109383$new_n43818_ i2=$abc$109383$new_n46814_ q=$abc$109383$new_n50592_
-.subckt ao22_x2 i0=$abc$109383$new_n46495_ i1=soc.ram.ram[127][26] i2=$abc$109383$new_n50592_ q=$abc$109383$new_n50593_
-.subckt mx2_x2 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[122][26] i1=soc.ram.ram[126][26] q=$abc$109383$new_n50594_
-.subckt a2_x2 i0=$abc$109383$new_n50594_ i1=$abc$109383$new_n43737_ q=$abc$109383$new_n50595_
-.subckt ao22_x2 i0=$abc$109383$new_n50595_ i1=$abc$109383$new_n50593_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n50596_
+.subckt and21nor_x1 i0=soc.ram.ram[115][26] i1=$abc$109383$new_n44066_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n50587_
+.subckt and21nor_x1 i0=$abc$109383$new_n44158_ i1=soc.ram.ram[119][26] i2=$abc$109383$new_n50587_ nq=$abc$109383$new_n50588_
+.subckt mux2_x1 cmd=$abc$109383$new_n43607_ i0=soc.ram.ram[114][26] i1=soc.ram.ram[118][26] q=$abc$109383$new_n50589_
+.subckt and2_x1 i0=$abc$109383$new_n50589_ i1=$abc$109383$new_n43623_ q=$abc$109383$new_n50590_
+.subckt and21nor_x1 i0=$abc$109383$new_n50590_ i1=$abc$109383$new_n50588_ i2=$abc$109383$new_n44692_ nq=$abc$109383$new_n50591_
+.subckt and21nor_x1 i0=soc.ram.ram[123][26] i1=$abc$109383$new_n43818_ i2=$abc$109383$new_n46814_ nq=$abc$109383$new_n50592_
+.subckt and21nor_x1 i0=$abc$109383$new_n46495_ i1=soc.ram.ram[127][26] i2=$abc$109383$new_n50592_ nq=$abc$109383$new_n50593_
+.subckt mux2_x1 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[122][26] i1=soc.ram.ram[126][26] q=$abc$109383$new_n50594_
+.subckt and2_x1 i0=$abc$109383$new_n50594_ i1=$abc$109383$new_n43737_ q=$abc$109383$new_n50595_
+.subckt and21nor_x1 i0=$abc$109383$new_n50595_ i1=$abc$109383$new_n50593_ i2=$abc$109383$new_n43354_ nq=$abc$109383$new_n50596_
 .subckt nor3_x0 i0=$abc$109383$new_n50596_ i1=$abc$109383$new_n50591_ i2=$abc$109383$new_n43856_ nq=$abc$109383$new_n50597_
 .subckt inv_x0 i=soc.ram.ram[125][26] nq=$abc$109383$new_n50598_
 .subckt nand2_x0 i0=$abc$109383$new_n50598_ i1=$abc$109383$new_n43953_ nq=$abc$109383$new_n50599_
-.subckt ao22_x2 i0=soc.ram.ram[121][26] i1=$abc$109383$new_n43347_ i2=$abc$109383$new_n44377_ q=$abc$109383$new_n50600_
+.subckt and21nor_x1 i0=soc.ram.ram[121][26] i1=$abc$109383$new_n43347_ i2=$abc$109383$new_n44377_ nq=$abc$109383$new_n50600_
 .subckt nand2_x0 i0=$abc$109383$new_n50600_ i1=$abc$109383$new_n50599_ nq=$abc$109383$new_n50601_
-.subckt mx2_x2 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[120][26] i1=soc.ram.ram[124][26] q=$abc$109383$new_n50602_
+.subckt mux2_x1 cmd=$abc$109383$new_n43976_ i0=soc.ram.ram[120][26] i1=soc.ram.ram[124][26] q=$abc$109383$new_n50602_
 .subckt nand2_x0 i0=$abc$109383$new_n50602_ i1=$abc$109383$new_n43435_ nq=$abc$109383$new_n50603_
-.subckt oa22_x2 i0=$abc$109383$new_n50603_ i1=$abc$109383$new_n50601_ i2=$abc$109383$new_n43712_ q=$abc$109383$new_n50604_
+.subckt or21nand_x1 i0=$abc$109383$new_n50603_ i1=$abc$109383$new_n50601_ i2=$abc$109383$new_n43712_ nq=$abc$109383$new_n50604_
 .subckt inv_x0 i=soc.ram.ram[112][26] nq=$abc$109383$new_n50605_
 .subckt inv_x0 i=soc.ram.ram[116][26] nq=$abc$109383$new_n50606_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n50606_ i1=$abc$109383$new_n50605_ q=$abc$109383$new_n50607_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n50606_ i1=$abc$109383$new_n50605_ q=$abc$109383$new_n50607_
 .subckt inv_x0 i=soc.ram.ram[113][26] nq=$abc$109383$new_n50608_
 .subckt inv_x0 i=soc.ram.ram[117][26] nq=$abc$109383$new_n50609_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n50609_ i1=$abc$109383$new_n50608_ q=$abc$109383$new_n50610_
-.subckt mx2_x2 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n50610_ i1=$abc$109383$new_n50607_ q=$abc$109383$new_n50611_
-.subckt ao22_x2 i0=$abc$109383$new_n50611_ i1=$abc$109383$new_n43569_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n50612_
-.subckt oa22_x2 i0=$abc$109383$new_n50612_ i1=$abc$109383$new_n50604_ i2=$abc$109383$new_n43920_ q=$abc$109383$new_n50613_
-.subckt ao22_x2 i0=$abc$109383$new_n50613_ i1=$abc$109383$new_n50597_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n50614_
-.subckt oa22_x2 i0=$abc$109383$new_n50614_ i1=$abc$109383$new_n50586_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n50615_
-.subckt o2_x2 i0=$abc$109383$new_n50615_ i1=$abc$109383$new_n50564_ q=$abc$109383$new_n50616_
-.subckt oa22_x2 i0=$abc$109383$new_n50616_ i1=$abc$109383$new_n50515_ i2=$abc$109383$new_n44583_ q=$abc$109383$new_n50617_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n50609_ i1=$abc$109383$new_n50608_ q=$abc$109383$new_n50610_
+.subckt mux2_x1 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n50610_ i1=$abc$109383$new_n50607_ q=$abc$109383$new_n50611_
+.subckt and21nor_x1 i0=$abc$109383$new_n50611_ i1=$abc$109383$new_n43569_ i2=$abc$109383$new_n43375_ nq=$abc$109383$new_n50612_
+.subckt or21nand_x1 i0=$abc$109383$new_n50612_ i1=$abc$109383$new_n50604_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n50613_
+.subckt and21nor_x1 i0=$abc$109383$new_n50613_ i1=$abc$109383$new_n50597_ i2=$abc$109383$new_n43464_ nq=$abc$109383$new_n50614_
+.subckt or21nand_x1 i0=$abc$109383$new_n50614_ i1=$abc$109383$new_n50586_ i2=$abc$109383$new_n43590_ nq=$abc$109383$new_n50615_
+.subckt or2_x1 i0=$abc$109383$new_n50615_ i1=$abc$109383$new_n50564_ q=$abc$109383$new_n50616_
+.subckt or21nand_x1 i0=$abc$109383$new_n50616_ i1=$abc$109383$new_n50515_ i2=$abc$109383$new_n44583_ nq=$abc$109383$new_n50617_
 .subckt nand3_x0 i0=$abc$109383$new_n28240_ i1=$abc$109383$new_n28238_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[26] nq=$abc$109383$new_n50618_
 .subckt nand3_x0 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27561_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[26] nq=$abc$109383$new_n50619_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[26] nq=$abc$109383$new_n50620_
 .subckt nand4_x0 i0=$abc$109383$new_n20712_ i1=$abc$109383$new_n20711_ i2=$abc$109383$new_n20710_ i3=soc.decoder.data_bus__dat_r[26] nq=$abc$109383$new_n50621_
-.subckt o4_x2 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n28633_ q=$abc$109383$new_n50622_
+.subckt or4_x1 i0=$abc$109383$new_n44255_ i1=$abc$109383$new_n44254_ i2=$abc$109383$new_n44253_ i3=$abc$109383$new_n28633_ q=$abc$109383$new_n50622_
 .subckt nand3_x0 i0=$abc$109383$new_n27560_ i1=$abc$109383$new_n19692_ i2=soc.bridge.csr_bridge_1.wb__dat_r[26] nq=$abc$109383$new_n50623_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[26] nq=$abc$109383$new_n50624_
-.subckt o2_x2 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n50624_ q=$abc$109383$new_n50625_
+.subckt or2_x1 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n50624_ q=$abc$109383$new_n50625_
 .subckt nand2_x0 i0=$abc$109383$new_n50625_ i1=$abc$109383$new_n50623_ nq=$abc$109383$new_n50626_
 .subckt nand4_x0 i0=$abc$109383$new_n50626_ i1=$abc$109383$new_n45179_ i2=$abc$109383$new_n45178_ i3=$abc$109383$new_n45177_ nq=$abc$109383$new_n50627_
-.subckt a3_x2 i0=$abc$109383$new_n50627_ i1=$abc$109383$new_n50622_ i2=$abc$109383$new_n50621_ q=$abc$109383$new_n50628_
-.subckt a4_x2 i0=$abc$109383$new_n50628_ i1=$abc$109383$new_n50620_ i2=$abc$109383$new_n50619_ i3=$abc$109383$new_n50618_ q=$abc$109383$new_n50629_
+.subckt and3_x1 i0=$abc$109383$new_n50627_ i1=$abc$109383$new_n50622_ i2=$abc$109383$new_n50621_ q=$abc$109383$new_n50628_
+.subckt and4_x1 i0=$abc$109383$new_n50628_ i1=$abc$109383$new_n50620_ i2=$abc$109383$new_n50619_ i3=$abc$109383$new_n50618_ q=$abc$109383$new_n50629_
 .subckt nand3_x0 i0=$abc$109383$new_n50629_ i1=$abc$109383$new_n50617_ i2=$abc$109383$new_n43776_ nq=$abc$109383$new_n50630_
-.subckt oa22_x2 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[26] q=$abc$109383$new_n50631_
-.subckt a2_x2 i0=$abc$109383$new_n50631_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n50632_
-.subckt a2_x2 i0=$abc$109383$new_n50632_ i1=$abc$109383$new_n50630_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103302
-.subckt oa22_x2 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[27] q=$abc$109383$new_n50634_
-.subckt a2_x2 i0=$abc$109383$new_n50634_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n50635_
+.subckt or21nand_x1 i0=$abc$109383$new_n44275_ i1=$abc$109383$new_n43289_ i2=soc.cpu.minerva.loadstore.m_load_data[26] nq=$abc$109383$new_n50631_
+.subckt and2_x1 i0=$abc$109383$new_n50631_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n50632_
+.subckt and2_x1 i0=$abc$109383$new_n50632_ i1=$abc$109383$new_n50630_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103302
+.subckt or21nand_x1 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[27] nq=$abc$109383$new_n50634_
+.subckt and2_x1 i0=$abc$109383$new_n50634_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n50635_
 .subckt nand3_x0 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n45471_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[27] nq=$abc$109383$new_n50636_
 .subckt nand3_x0 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[27] nq=$abc$109383$new_n50637_
-.subckt oa22_x2 i0=$abc$109383$new_n50637_ i1=$abc$109383$new_n50636_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n50638_
+.subckt or21nand_x1 i0=$abc$109383$new_n50637_ i1=$abc$109383$new_n50636_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n50638_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[27] nq=$abc$109383$new_n50639_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n43305_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n28650_ q=$abc$109383$new_n50640_
-.subckt a2_x2 i0=$abc$109383$new_n50640_ i1=$abc$109383$new_n50639_ q=$abc$109383$new_n50641_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n43305_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n28650_ q=$abc$109383$new_n50640_
+.subckt and2_x1 i0=$abc$109383$new_n50640_ i1=$abc$109383$new_n50639_ q=$abc$109383$new_n50641_
 .subckt nand3_x0 i0=$abc$109383$new_n28184_ i1=$abc$109383$new_n44283_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[27] nq=$abc$109383$new_n50642_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[27] nq=$abc$109383$new_n50643_
-.subckt o2_x2 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n50643_ q=$abc$109383$new_n50644_
-.subckt o4_x2 i0=$abc$109383$new_n50644_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n50645_
-.subckt a3_x2 i0=$abc$109383$new_n50645_ i1=$abc$109383$new_n50642_ i2=$abc$109383$new_n50641_ q=$abc$109383$new_n50646_
+.subckt or2_x1 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n50643_ q=$abc$109383$new_n50644_
+.subckt or4_x1 i0=$abc$109383$new_n50644_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n50645_
+.subckt and3_x1 i0=$abc$109383$new_n50645_ i1=$abc$109383$new_n50642_ i2=$abc$109383$new_n50641_ q=$abc$109383$new_n50646_
 .subckt nand2_x0 i0=$abc$109383$new_n50646_ i1=$abc$109383$new_n50638_ nq=$abc$109383$new_n50647_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[90][27] i1=soc.ram.ram[94][27] q=$abc$109383$new_n50648_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[82][27] i1=soc.ram.ram[86][27] q=$abc$109383$new_n50649_
-.subckt mx2_x2 cmd=$abc$109383$new_n43524_ i0=$abc$109383$new_n50649_ i1=$abc$109383$new_n50648_ q=$abc$109383$new_n50650_
-.subckt a2_x2 i0=$abc$109383$new_n50650_ i1=$abc$109383$new_n44630_ q=$abc$109383$new_n50651_
-.subckt mx2_x2 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[91][27] i1=soc.ram.ram[95][27] q=$abc$109383$new_n50652_
-.subckt mx2_x2 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[83][27] i1=soc.ram.ram[87][27] q=$abc$109383$new_n50653_
-.subckt mx2_x2 cmd=$abc$109383$new_n43647_ i0=$abc$109383$new_n50653_ i1=$abc$109383$new_n50652_ q=$abc$109383$new_n50654_
-.subckt oa22_x2 i0=$abc$109383$new_n44214_ i1=$abc$109383$new_n50654_ i2=$abc$109383$new_n43324_ q=$abc$109383$new_n50655_
-.subckt o2_x2 i0=$abc$109383$new_n50655_ i1=$abc$109383$new_n50651_ q=$abc$109383$new_n50656_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[90][27] i1=soc.ram.ram[94][27] q=$abc$109383$new_n50648_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[82][27] i1=soc.ram.ram[86][27] q=$abc$109383$new_n50649_
+.subckt mux2_x1 cmd=$abc$109383$new_n43524_ i0=$abc$109383$new_n50649_ i1=$abc$109383$new_n50648_ q=$abc$109383$new_n50650_
+.subckt and2_x1 i0=$abc$109383$new_n50650_ i1=$abc$109383$new_n44630_ q=$abc$109383$new_n50651_
+.subckt mux2_x1 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[91][27] i1=soc.ram.ram[95][27] q=$abc$109383$new_n50652_
+.subckt mux2_x1 cmd=$abc$109383$new_n43684_ i0=soc.ram.ram[83][27] i1=soc.ram.ram[87][27] q=$abc$109383$new_n50653_
+.subckt mux2_x1 cmd=$abc$109383$new_n43647_ i0=$abc$109383$new_n50653_ i1=$abc$109383$new_n50652_ q=$abc$109383$new_n50654_
+.subckt or21nand_x1 i0=$abc$109383$new_n44214_ i1=$abc$109383$new_n50654_ i2=$abc$109383$new_n43324_ nq=$abc$109383$new_n50655_
+.subckt or2_x1 i0=$abc$109383$new_n50655_ i1=$abc$109383$new_n50651_ q=$abc$109383$new_n50656_
 .subckt nand2_x0 i0=soc.ram.ram[71][27] i1=$abc$109383$new_n44692_ nq=$abc$109383$new_n50657_
 .subckt inv_x0 i=soc.ram.ram[79][27] nq=$abc$109383$new_n50658_
-.subckt ao22_x2 i0=$abc$109383$new_n50658_ i1=$abc$109383$new_n43837_ i2=$abc$109383$new_n43477_ q=$abc$109383$new_n50659_
+.subckt and21nor_x1 i0=$abc$109383$new_n50658_ i1=$abc$109383$new_n43837_ i2=$abc$109383$new_n43477_ nq=$abc$109383$new_n50659_
 .subckt nand2_x0 i0=$abc$109383$new_n50659_ i1=$abc$109383$new_n50657_ nq=$abc$109383$new_n50660_
-.subckt oa22_x2 i0=soc.ram.ram[75][27] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43873_ q=$abc$109383$new_n50661_
-.subckt oa22_x2 i0=$abc$109383$new_n43554_ i1=soc.ram.ram[67][27] i2=$abc$109383$new_n50661_ q=$abc$109383$new_n50662_
-.subckt a2_x2 i0=$abc$109383$new_n50662_ i1=$abc$109383$new_n46112_ q=$abc$109383$new_n50663_
+.subckt or21nand_x1 i0=soc.ram.ram[75][27] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43873_ nq=$abc$109383$new_n50661_
+.subckt or21nand_x1 i0=$abc$109383$new_n43554_ i1=soc.ram.ram[67][27] i2=$abc$109383$new_n50661_ nq=$abc$109383$new_n50662_
+.subckt and2_x1 i0=$abc$109383$new_n50662_ i1=$abc$109383$new_n46112_ q=$abc$109383$new_n50663_
 .subckt nand2_x0 i0=$abc$109383$new_n50663_ i1=$abc$109383$new_n50660_ nq=$abc$109383$new_n50664_
 .subckt nand2_x0 i0=soc.ram.ram[70][27] i1=$abc$109383$new_n43432_ nq=$abc$109383$new_n50665_
 .subckt inv_x0 i=soc.ram.ram[78][27] nq=$abc$109383$new_n50666_
-.subckt ao22_x2 i0=$abc$109383$new_n50666_ i1=$abc$109383$new_n43836_ i2=$abc$109383$new_n44164_ q=$abc$109383$new_n50667_
-.subckt a2_x2 i0=$abc$109383$new_n50667_ i1=$abc$109383$new_n50665_ q=$abc$109383$new_n50668_
-.subckt oa22_x2 i0=soc.ram.ram[74][27] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44423_ q=$abc$109383$new_n50669_
-.subckt oa22_x2 i0=$abc$109383$new_n43836_ i1=soc.ram.ram[66][27] i2=$abc$109383$new_n50669_ q=$abc$109383$new_n50670_
+.subckt and21nor_x1 i0=$abc$109383$new_n50666_ i1=$abc$109383$new_n43836_ i2=$abc$109383$new_n44164_ nq=$abc$109383$new_n50667_
+.subckt and2_x1 i0=$abc$109383$new_n50667_ i1=$abc$109383$new_n50665_ q=$abc$109383$new_n50668_
+.subckt or21nand_x1 i0=soc.ram.ram[74][27] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44423_ nq=$abc$109383$new_n50669_
+.subckt or21nand_x1 i0=$abc$109383$new_n43836_ i1=soc.ram.ram[66][27] i2=$abc$109383$new_n50669_ nq=$abc$109383$new_n50670_
 .subckt nand2_x0 i0=$abc$109383$new_n50670_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n50671_
-.subckt ao22_x2 i0=$abc$109383$new_n50671_ i1=$abc$109383$new_n50668_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n50672_
+.subckt and21nor_x1 i0=$abc$109383$new_n50671_ i1=$abc$109383$new_n50668_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n50672_
 .subckt nand2_x0 i0=$abc$109383$new_n50672_ i1=$abc$109383$new_n50664_ nq=$abc$109383$new_n50673_
-.subckt a3_x2 i0=$abc$109383$new_n50673_ i1=$abc$109383$new_n50656_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n50674_
-.subckt mx2_x2 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[80][27] i1=soc.ram.ram[84][27] q=$abc$109383$new_n50675_
+.subckt and3_x1 i0=$abc$109383$new_n50673_ i1=$abc$109383$new_n50656_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n50674_
+.subckt mux2_x1 cmd=$abc$109383$new_n43342_ i0=soc.ram.ram[80][27] i1=soc.ram.ram[84][27] q=$abc$109383$new_n50675_
 .subckt nand2_x0 i0=$abc$109383$new_n50675_ i1=$abc$109383$new_n43335_ nq=$abc$109383$new_n50676_
 .subckt inv_x0 i=soc.ram.ram[85][27] nq=$abc$109383$new_n50677_
 .subckt nand2_x0 i0=$abc$109383$new_n50677_ i1=$abc$109383$new_n44225_ nq=$abc$109383$new_n50678_
-.subckt ao22_x2 i0=soc.ram.ram[81][27] i1=$abc$109383$new_n44145_ i2=$abc$109383$new_n43871_ q=$abc$109383$new_n50679_
+.subckt and21nor_x1 i0=soc.ram.ram[81][27] i1=$abc$109383$new_n44145_ i2=$abc$109383$new_n43871_ nq=$abc$109383$new_n50679_
 .subckt nand2_x0 i0=$abc$109383$new_n50679_ i1=$abc$109383$new_n50678_ nq=$abc$109383$new_n50680_
 .subckt nand3_x0 i0=$abc$109383$new_n50680_ i1=$abc$109383$new_n50676_ i2=$abc$109383$new_n43392_ nq=$abc$109383$new_n50681_
 .subckt inv_x0 i=soc.ram.ram[93][27] nq=$abc$109383$new_n50682_
 .subckt nand2_x0 i0=$abc$109383$new_n50682_ i1=$abc$109383$new_n44508_ nq=$abc$109383$new_n50683_
-.subckt ao22_x2 i0=soc.ram.ram[89][27] i1=$abc$109383$new_n44338_ i2=$abc$109383$new_n43690_ q=$abc$109383$new_n50684_
+.subckt and21nor_x1 i0=soc.ram.ram[89][27] i1=$abc$109383$new_n44338_ i2=$abc$109383$new_n43690_ nq=$abc$109383$new_n50684_
 .subckt nand2_x0 i0=$abc$109383$new_n50684_ i1=$abc$109383$new_n50683_ nq=$abc$109383$new_n50685_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[88][27] i1=soc.ram.ram[92][27] q=$abc$109383$new_n50686_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[88][27] i1=soc.ram.ram[92][27] q=$abc$109383$new_n50686_
 .subckt nand2_x0 i0=$abc$109383$new_n50686_ i1=$abc$109383$new_n44596_ nq=$abc$109383$new_n50687_
-.subckt a2_x2 i0=$abc$109383$new_n50687_ i1=$abc$109383$new_n43353_ q=$abc$109383$new_n50688_
+.subckt and2_x1 i0=$abc$109383$new_n50687_ i1=$abc$109383$new_n43353_ q=$abc$109383$new_n50688_
 .subckt nand2_x0 i0=$abc$109383$new_n50688_ i1=$abc$109383$new_n50685_ nq=$abc$109383$new_n50689_
-.subckt oa22_x2 i0=$abc$109383$new_n50689_ i1=$abc$109383$new_n50681_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n50690_
-.subckt oa22_x2 i0=soc.ram.ram[72][27] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n43385_ q=$abc$109383$new_n50691_
-.subckt oa22_x2 i0=$abc$109383$new_n44161_ i1=soc.ram.ram[64][27] i2=$abc$109383$new_n50691_ q=$abc$109383$new_n50692_
+.subckt or21nand_x1 i0=$abc$109383$new_n50689_ i1=$abc$109383$new_n50681_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n50690_
+.subckt or21nand_x1 i0=soc.ram.ram[72][27] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n43385_ nq=$abc$109383$new_n50691_
+.subckt or21nand_x1 i0=$abc$109383$new_n44161_ i1=soc.ram.ram[64][27] i2=$abc$109383$new_n50691_ nq=$abc$109383$new_n50692_
 .subckt nand2_x0 i0=soc.ram.ram[68][27] i1=$abc$109383$new_n43711_ nq=$abc$109383$new_n50693_
 .subckt inv_x0 i=soc.ram.ram[76][27] nq=$abc$109383$new_n50694_
-.subckt ao22_x2 i0=$abc$109383$new_n50694_ i1=$abc$109383$new_n43431_ i2=$abc$109383$new_n43685_ q=$abc$109383$new_n50695_
+.subckt and21nor_x1 i0=$abc$109383$new_n50694_ i1=$abc$109383$new_n43431_ i2=$abc$109383$new_n43685_ nq=$abc$109383$new_n50695_
 .subckt nand2_x0 i0=$abc$109383$new_n50695_ i1=$abc$109383$new_n50693_ nq=$abc$109383$new_n50696_
-.subckt oa22_x2 i0=$abc$109383$new_n50696_ i1=$abc$109383$new_n50692_ i2=$abc$109383$new_n44091_ q=$abc$109383$new_n50697_
-.subckt oa22_x2 i0=soc.ram.ram[73][27] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n44144_ q=$abc$109383$new_n50698_
-.subckt oa22_x2 i0=$abc$109383$new_n43431_ i1=soc.ram.ram[65][27] i2=$abc$109383$new_n50698_ q=$abc$109383$new_n50699_
+.subckt or21nand_x1 i0=$abc$109383$new_n50696_ i1=$abc$109383$new_n50692_ i2=$abc$109383$new_n44091_ nq=$abc$109383$new_n50697_
+.subckt or21nand_x1 i0=soc.ram.ram[73][27] i1=$\soc.ram.ram$rdreg[0]$q[3] i2=$abc$109383$new_n44144_ nq=$abc$109383$new_n50698_
+.subckt or21nand_x1 i0=$abc$109383$new_n43431_ i1=soc.ram.ram[65][27] i2=$abc$109383$new_n50698_ nq=$abc$109383$new_n50699_
 .subckt nand2_x0 i0=soc.ram.ram[69][27] i1=$abc$109383$new_n43836_ nq=$abc$109383$new_n50700_
 .subckt inv_x0 i=soc.ram.ram[77][27] nq=$abc$109383$new_n50701_
-.subckt ao22_x2 i0=$abc$109383$new_n50701_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n43425_ q=$abc$109383$new_n50702_
+.subckt and21nor_x1 i0=$abc$109383$new_n50701_ i1=$abc$109383$new_n43390_ i2=$abc$109383$new_n43425_ nq=$abc$109383$new_n50702_
 .subckt nand2_x0 i0=$abc$109383$new_n50702_ i1=$abc$109383$new_n50700_ nq=$abc$109383$new_n50703_
-.subckt oa22_x2 i0=$abc$109383$new_n50703_ i1=$abc$109383$new_n50699_ i2=$abc$109383$new_n44836_ q=$abc$109383$new_n50704_
-.subckt oa22_x2 i0=$abc$109383$new_n50704_ i1=$abc$109383$new_n50697_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n50705_
-.subckt a3_x2 i0=$abc$109383$new_n50705_ i1=$abc$109383$new_n50690_ i2=$abc$109383$new_n43990_ q=$abc$109383$new_n50706_
-.subckt o2_x2 i0=$abc$109383$new_n50706_ i1=$abc$109383$new_n50674_ q=$abc$109383$new_n50707_
+.subckt or21nand_x1 i0=$abc$109383$new_n50703_ i1=$abc$109383$new_n50699_ i2=$abc$109383$new_n44836_ nq=$abc$109383$new_n50704_
+.subckt or21nand_x1 i0=$abc$109383$new_n50704_ i1=$abc$109383$new_n50697_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n50705_
+.subckt and3_x1 i0=$abc$109383$new_n50705_ i1=$abc$109383$new_n50690_ i2=$abc$109383$new_n43990_ q=$abc$109383$new_n50706_
+.subckt or2_x1 i0=$abc$109383$new_n50706_ i1=$abc$109383$new_n50674_ q=$abc$109383$new_n50707_
 .subckt inv_x0 i=soc.ram.ram[105][27] nq=$abc$109383$new_n50708_
 .subckt inv_x0 i=soc.ram.ram[109][27] nq=$abc$109383$new_n50709_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50709_ i1=$abc$109383$new_n50708_ q=$abc$109383$new_n50710_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50709_ i1=$abc$109383$new_n50708_ q=$abc$109383$new_n50710_
 .subckt inv_x0 i=soc.ram.ram[104][27] nq=$abc$109383$new_n50711_
 .subckt inv_x0 i=soc.ram.ram[108][27] nq=$abc$109383$new_n50712_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50712_ i1=$abc$109383$new_n50711_ q=$abc$109383$new_n50713_
-.subckt mx2_x2 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n50713_ i1=$abc$109383$new_n50710_ q=$abc$109383$new_n50714_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50712_ i1=$abc$109383$new_n50711_ q=$abc$109383$new_n50713_
+.subckt mux2_x1 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n50713_ i1=$abc$109383$new_n50710_ q=$abc$109383$new_n50714_
 .subckt inv_x0 i=soc.ram.ram[107][27] nq=$abc$109383$new_n50715_
 .subckt inv_x0 i=soc.ram.ram[111][27] nq=$abc$109383$new_n50716_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50716_ i1=$abc$109383$new_n50715_ q=$abc$109383$new_n50717_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50716_ i1=$abc$109383$new_n50715_ q=$abc$109383$new_n50717_
 .subckt inv_x0 i=soc.ram.ram[106][27] nq=$abc$109383$new_n50718_
 .subckt inv_x0 i=soc.ram.ram[110][27] nq=$abc$109383$new_n50719_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50719_ i1=$abc$109383$new_n50718_ q=$abc$109383$new_n50720_
-.subckt mx2_x2 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n50720_ i1=$abc$109383$new_n50717_ q=$abc$109383$new_n50721_
-.subckt mx2_x2 cmd=$abc$109383$new_n43448_ i0=$abc$109383$new_n50721_ i1=$abc$109383$new_n50714_ q=$abc$109383$new_n50722_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n50719_ i1=$abc$109383$new_n50718_ q=$abc$109383$new_n50720_
+.subckt mux2_x1 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n50720_ i1=$abc$109383$new_n50717_ q=$abc$109383$new_n50721_
+.subckt mux2_x1 cmd=$abc$109383$new_n43448_ i0=$abc$109383$new_n50721_ i1=$abc$109383$new_n50714_ q=$abc$109383$new_n50722_
 .subckt nand2_x0 i0=$abc$109383$new_n50722_ i1=$abc$109383$new_n43649_ nq=$abc$109383$new_n50723_
-.subckt mx2_x2 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[98][27] i1=soc.ram.ram[102][27] q=$abc$109383$new_n50724_
-.subckt mx2_x2 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[99][27] i1=soc.ram.ram[103][27] q=$abc$109383$new_n50725_
-.subckt mx2_x2 cmd=$abc$109383$new_n43487_ i0=$abc$109383$new_n50725_ i1=$abc$109383$new_n50724_ q=$abc$109383$new_n50726_
-.subckt a2_x2 i0=$abc$109383$new_n50726_ i1=$abc$109383$new_n43564_ q=$abc$109383$new_n50727_
-.subckt mx2_x2 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[97][27] i1=soc.ram.ram[101][27] q=$abc$109383$new_n50728_
-.subckt mx2_x2 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[96][27] i1=soc.ram.ram[100][27] q=$abc$109383$new_n50729_
-.subckt mx2_x2 cmd=$abc$109383$new_n45042_ i0=$abc$109383$new_n50729_ i1=$abc$109383$new_n50728_ q=$abc$109383$new_n50730_
-.subckt oa22_x2 i0=$abc$109383$new_n43330_ i1=$abc$109383$new_n50730_ i2=$abc$109383$new_n50727_ q=$abc$109383$new_n50731_
-.subckt ao22_x2 i0=$abc$109383$new_n45393_ i1=$abc$109383$new_n50731_ i2=$abc$109383$new_n50723_ q=$abc$109383$new_n50732_
-.subckt mx2_x2 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[114][27] i1=soc.ram.ram[118][27] q=$abc$109383$new_n50733_
-.subckt mx2_x2 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[115][27] i1=soc.ram.ram[119][27] q=$abc$109383$new_n50734_
-.subckt mx2_x2 cmd=$abc$109383$new_n44596_ i0=$abc$109383$new_n50734_ i1=$abc$109383$new_n50733_ q=$abc$109383$new_n50735_
+.subckt mux2_x1 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[98][27] i1=soc.ram.ram[102][27] q=$abc$109383$new_n50724_
+.subckt mux2_x1 cmd=$abc$109383$new_n43518_ i0=soc.ram.ram[99][27] i1=soc.ram.ram[103][27] q=$abc$109383$new_n50725_
+.subckt mux2_x1 cmd=$abc$109383$new_n43487_ i0=$abc$109383$new_n50725_ i1=$abc$109383$new_n50724_ q=$abc$109383$new_n50726_
+.subckt and2_x1 i0=$abc$109383$new_n50726_ i1=$abc$109383$new_n43564_ q=$abc$109383$new_n50727_
+.subckt mux2_x1 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[97][27] i1=soc.ram.ram[101][27] q=$abc$109383$new_n50728_
+.subckt mux2_x1 cmd=$abc$109383$new_n43367_ i0=soc.ram.ram[96][27] i1=soc.ram.ram[100][27] q=$abc$109383$new_n50729_
+.subckt mux2_x1 cmd=$abc$109383$new_n45042_ i0=$abc$109383$new_n50729_ i1=$abc$109383$new_n50728_ q=$abc$109383$new_n50730_
+.subckt or21nand_x1 i0=$abc$109383$new_n43330_ i1=$abc$109383$new_n50730_ i2=$abc$109383$new_n50727_ nq=$abc$109383$new_n50731_
+.subckt and21nor_x1 i0=$abc$109383$new_n45393_ i1=$abc$109383$new_n50731_ i2=$abc$109383$new_n50723_ nq=$abc$109383$new_n50732_
+.subckt mux2_x1 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[114][27] i1=soc.ram.ram[118][27] q=$abc$109383$new_n50733_
+.subckt mux2_x1 cmd=$abc$109383$new_n43598_ i0=soc.ram.ram[115][27] i1=soc.ram.ram[119][27] q=$abc$109383$new_n50734_
+.subckt mux2_x1 cmd=$abc$109383$new_n44596_ i0=$abc$109383$new_n50734_ i1=$abc$109383$new_n50733_ q=$abc$109383$new_n50735_
 .subckt nand2_x0 i0=$abc$109383$new_n50735_ i1=$abc$109383$new_n45427_ nq=$abc$109383$new_n50736_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[112][27] i1=soc.ram.ram[116][27] q=$abc$109383$new_n50737_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[113][27] i1=soc.ram.ram[117][27] q=$abc$109383$new_n50738_
-.subckt mx2_x2 cmd=$abc$109383$new_n43549_ i0=$abc$109383$new_n50738_ i1=$abc$109383$new_n50737_ q=$abc$109383$new_n50739_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[112][27] i1=soc.ram.ram[116][27] q=$abc$109383$new_n50737_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[113][27] i1=soc.ram.ram[117][27] q=$abc$109383$new_n50738_
+.subckt mux2_x1 cmd=$abc$109383$new_n43549_ i0=$abc$109383$new_n50738_ i1=$abc$109383$new_n50737_ q=$abc$109383$new_n50739_
 .subckt nand2_x0 i0=$abc$109383$new_n50739_ i1=$abc$109383$new_n43449_ nq=$abc$109383$new_n50740_
 .subckt nand3_x0 i0=$abc$109383$new_n50740_ i1=$abc$109383$new_n50736_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n50741_
 .subckt inv_x0 i=soc.ram.ram[125][27] nq=$abc$109383$new_n50742_
 .subckt nand2_x0 i0=$abc$109383$new_n50742_ i1=$abc$109383$new_n43977_ nq=$abc$109383$new_n50743_
-.subckt ao22_x2 i0=soc.ram.ram[121][27] i1=$abc$109383$new_n43692_ i2=$abc$109383$new_n43996_ q=$abc$109383$new_n50744_
+.subckt and21nor_x1 i0=soc.ram.ram[121][27] i1=$abc$109383$new_n43692_ i2=$abc$109383$new_n43996_ nq=$abc$109383$new_n50744_
 .subckt nand2_x0 i0=$abc$109383$new_n50744_ i1=$abc$109383$new_n50743_ nq=$abc$109383$new_n50745_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[120][27] i1=soc.ram.ram[124][27] q=$abc$109383$new_n50746_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[120][27] i1=soc.ram.ram[124][27] q=$abc$109383$new_n50746_
 .subckt nand2_x0 i0=$abc$109383$new_n50746_ i1=$abc$109383$new_n43634_ nq=$abc$109383$new_n50747_
-.subckt oa22_x2 i0=$abc$109383$new_n50747_ i1=$abc$109383$new_n50745_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n50748_
+.subckt or21nand_x1 i0=$abc$109383$new_n50747_ i1=$abc$109383$new_n50745_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n50748_
 .subckt inv_x0 i=soc.ram.ram[127][27] nq=$abc$109383$new_n50749_
 .subckt nand2_x0 i0=$abc$109383$new_n50749_ i1=$abc$109383$new_n45222_ nq=$abc$109383$new_n50750_
-.subckt ao22_x2 i0=soc.ram.ram[123][27] i1=$abc$109383$new_n43873_ i2=$abc$109383$new_n44047_ q=$abc$109383$new_n50751_
+.subckt and21nor_x1 i0=soc.ram.ram[123][27] i1=$abc$109383$new_n43873_ i2=$abc$109383$new_n44047_ nq=$abc$109383$new_n50751_
 .subckt nand2_x0 i0=$abc$109383$new_n50751_ i1=$abc$109383$new_n50750_ nq=$abc$109383$new_n50752_
-.subckt mx2_x2 cmd=$abc$109383$new_n44186_ i0=soc.ram.ram[122][27] i1=soc.ram.ram[126][27] q=$abc$109383$new_n50753_
+.subckt mux2_x1 cmd=$abc$109383$new_n44186_ i0=soc.ram.ram[122][27] i1=soc.ram.ram[126][27] q=$abc$109383$new_n50753_
 .subckt nand2_x0 i0=$abc$109383$new_n50753_ i1=$abc$109383$new_n43707_ nq=$abc$109383$new_n50754_
-.subckt oa22_x2 i0=$abc$109383$new_n50754_ i1=$abc$109383$new_n50752_ i2=$abc$109383$new_n44391_ q=$abc$109383$new_n50755_
+.subckt or21nand_x1 i0=$abc$109383$new_n50754_ i1=$abc$109383$new_n50752_ i2=$abc$109383$new_n44391_ nq=$abc$109383$new_n50755_
 .subckt nand3_x0 i0=$abc$109383$new_n50755_ i1=$abc$109383$new_n50748_ i2=$abc$109383$new_n43570_ nq=$abc$109383$new_n50756_
-.subckt a2_x2 i0=$abc$109383$new_n50756_ i1=$abc$109383$new_n50741_ q=$abc$109383$new_n50757_
-.subckt mx2_x2 cmd=$abc$109383$new_n45028_ i0=$abc$109383$new_n50757_ i1=$abc$109383$new_n50732_ q=$abc$109383$new_n50758_
-.subckt mx2_x2 cmd=$abc$109383$new_n44444_ i0=$abc$109383$new_n50758_ i1=$abc$109383$new_n50707_ q=$abc$109383$new_n50759_
-.subckt ao22_x2 i0=$abc$109383$new_n46883_ i1=$abc$109383$new_n50759_ i2=$abc$109383$new_n43322_ q=$abc$109383$new_n50760_
-.subckt mx2_x2 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[50][27] i1=soc.ram.ram[54][27] q=$abc$109383$new_n50761_
+.subckt and2_x1 i0=$abc$109383$new_n50756_ i1=$abc$109383$new_n50741_ q=$abc$109383$new_n50757_
+.subckt mux2_x1 cmd=$abc$109383$new_n45028_ i0=$abc$109383$new_n50757_ i1=$abc$109383$new_n50732_ q=$abc$109383$new_n50758_
+.subckt mux2_x1 cmd=$abc$109383$new_n44444_ i0=$abc$109383$new_n50758_ i1=$abc$109383$new_n50707_ q=$abc$109383$new_n50759_
+.subckt and21nor_x1 i0=$abc$109383$new_n46883_ i1=$abc$109383$new_n50759_ i2=$abc$109383$new_n43322_ nq=$abc$109383$new_n50760_
+.subckt mux2_x1 cmd=$abc$109383$new_n44824_ i0=soc.ram.ram[50][27] i1=soc.ram.ram[54][27] q=$abc$109383$new_n50761_
 .subckt nand2_x0 i0=$abc$109383$new_n50761_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n50762_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[51][27] i1=soc.ram.ram[55][27] q=$abc$109383$new_n50763_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[51][27] i1=soc.ram.ram[55][27] q=$abc$109383$new_n50763_
 .subckt nand2_x0 i0=$abc$109383$new_n50763_ i1=$abc$109383$new_n43963_ nq=$abc$109383$new_n50764_
 .subckt nand3_x0 i0=$abc$109383$new_n50764_ i1=$abc$109383$new_n50762_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n50765_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[48][27] i1=soc.ram.ram[52][27] q=$abc$109383$new_n50766_
-.subckt mx2_x2 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[49][27] i1=soc.ram.ram[53][27] q=$abc$109383$new_n50767_
-.subckt mx2_x2 cmd=$abc$109383$new_n43737_ i0=$abc$109383$new_n50767_ i1=$abc$109383$new_n50766_ q=$abc$109383$new_n50768_
-.subckt ao22_x2 i0=$abc$109383$new_n44916_ i1=$abc$109383$new_n50768_ i2=$abc$109383$new_n43838_ q=$abc$109383$new_n50769_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[48][27] i1=soc.ram.ram[52][27] q=$abc$109383$new_n50766_
+.subckt mux2_x1 cmd=$abc$109383$new_n44092_ i0=soc.ram.ram[49][27] i1=soc.ram.ram[53][27] q=$abc$109383$new_n50767_
+.subckt mux2_x1 cmd=$abc$109383$new_n43737_ i0=$abc$109383$new_n50767_ i1=$abc$109383$new_n50766_ q=$abc$109383$new_n50768_
+.subckt and21nor_x1 i0=$abc$109383$new_n44916_ i1=$abc$109383$new_n50768_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n50769_
 .subckt nand2_x0 i0=$abc$109383$new_n50769_ i1=$abc$109383$new_n50765_ nq=$abc$109383$new_n50770_
-.subckt mx2_x2 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[56][27] i1=soc.ram.ram[60][27] q=$abc$109383$new_n50771_
+.subckt mux2_x1 cmd=$abc$109383$new_n44751_ i0=soc.ram.ram[56][27] i1=soc.ram.ram[60][27] q=$abc$109383$new_n50771_
 .subckt nand2_x0 i0=$abc$109383$new_n50771_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n50772_
 .subckt inv_x0 i=soc.ram.ram[61][27] nq=$abc$109383$new_n50773_
 .subckt nand2_x0 i0=$abc$109383$new_n50773_ i1=$abc$109383$new_n45674_ nq=$abc$109383$new_n50774_
-.subckt ao22_x2 i0=soc.ram.ram[57][27] i1=$abc$109383$new_n44156_ i2=$abc$109383$new_n43691_ q=$abc$109383$new_n50775_
+.subckt and21nor_x1 i0=soc.ram.ram[57][27] i1=$abc$109383$new_n44156_ i2=$abc$109383$new_n43691_ nq=$abc$109383$new_n50775_
 .subckt nand2_x0 i0=$abc$109383$new_n50775_ i1=$abc$109383$new_n50774_ nq=$abc$109383$new_n50776_
 .subckt nand3_x0 i0=$abc$109383$new_n50776_ i1=$abc$109383$new_n50772_ i2=$abc$109383$new_n43679_ nq=$abc$109383$new_n50777_
-.subckt mx2_x2 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[58][27] i1=soc.ram.ram[62][27] q=$abc$109383$new_n50778_
-.subckt oa22_x2 i0=$abc$109383$new_n44836_ i1=$abc$109383$new_n50778_ i2=$abc$109383$new_n43423_ q=$abc$109383$new_n50779_
-.subckt ao22_x2 i0=soc.ram.ram[59][27] i1=$abc$109383$new_n43938_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n50780_
+.subckt mux2_x1 cmd=$abc$109383$new_n43602_ i0=soc.ram.ram[58][27] i1=soc.ram.ram[62][27] q=$abc$109383$new_n50778_
+.subckt or21nand_x1 i0=$abc$109383$new_n44836_ i1=$abc$109383$new_n50778_ i2=$abc$109383$new_n43423_ nq=$abc$109383$new_n50779_
+.subckt and21nor_x1 i0=soc.ram.ram[59][27] i1=$abc$109383$new_n43938_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n50780_
 .subckt inv_x0 i=soc.ram.ram[63][27] nq=$abc$109383$new_n50781_
 .subckt nand2_x0 i0=$abc$109383$new_n50781_ i1=$abc$109383$new_n44586_ nq=$abc$109383$new_n50782_
-.subckt oa22_x2 i0=$abc$109383$new_n50782_ i1=$abc$109383$new_n50780_ i2=$abc$109383$new_n50779_ q=$abc$109383$new_n50783_
+.subckt or21nand_x1 i0=$abc$109383$new_n50782_ i1=$abc$109383$new_n50780_ i2=$abc$109383$new_n50779_ nq=$abc$109383$new_n50783_
 .subckt nand3_x0 i0=$abc$109383$new_n50783_ i1=$abc$109383$new_n50777_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n50784_
-.subckt oa22_x2 i0=$abc$109383$new_n50784_ i1=$abc$109383$new_n50770_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n50785_
-.subckt mx2_x2 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[42][27] i1=soc.ram.ram[46][27] q=$abc$109383$new_n50786_
-.subckt mx2_x2 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[43][27] i1=soc.ram.ram[47][27] q=$abc$109383$new_n50787_
-.subckt mx2_x2 cmd=$abc$109383$new_n43634_ i0=$abc$109383$new_n50787_ i1=$abc$109383$new_n50786_ q=$abc$109383$new_n50788_
-.subckt o2_x2 i0=$abc$109383$new_n50788_ i1=$abc$109383$new_n45614_ q=$abc$109383$new_n50789_
-.subckt mx2_x2 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[40][27] i1=soc.ram.ram[44][27] q=$abc$109383$new_n50790_
-.subckt mx2_x2 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[41][27] i1=soc.ram.ram[45][27] q=$abc$109383$new_n50791_
-.subckt mx2_x2 cmd=$abc$109383$new_n44836_ i0=$abc$109383$new_n50791_ i1=$abc$109383$new_n50790_ q=$abc$109383$new_n50792_
-.subckt ao22_x2 i0=$abc$109383$new_n45427_ i1=$abc$109383$new_n50792_ i2=$abc$109383$new_n43897_ q=$abc$109383$new_n50793_
+.subckt or21nand_x1 i0=$abc$109383$new_n50784_ i1=$abc$109383$new_n50770_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n50785_
+.subckt mux2_x1 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[42][27] i1=soc.ram.ram[46][27] q=$abc$109383$new_n50786_
+.subckt mux2_x1 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[43][27] i1=soc.ram.ram[47][27] q=$abc$109383$new_n50787_
+.subckt mux2_x1 cmd=$abc$109383$new_n43634_ i0=$abc$109383$new_n50787_ i1=$abc$109383$new_n50786_ q=$abc$109383$new_n50788_
+.subckt or2_x1 i0=$abc$109383$new_n50788_ i1=$abc$109383$new_n45614_ q=$abc$109383$new_n50789_
+.subckt mux2_x1 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[40][27] i1=soc.ram.ram[44][27] q=$abc$109383$new_n50790_
+.subckt mux2_x1 cmd=$abc$109383$new_n43425_ i0=soc.ram.ram[41][27] i1=soc.ram.ram[45][27] q=$abc$109383$new_n50791_
+.subckt mux2_x1 cmd=$abc$109383$new_n44836_ i0=$abc$109383$new_n50791_ i1=$abc$109383$new_n50790_ q=$abc$109383$new_n50792_
+.subckt and21nor_x1 i0=$abc$109383$new_n45427_ i1=$abc$109383$new_n50792_ i2=$abc$109383$new_n43897_ nq=$abc$109383$new_n50793_
 .subckt nand2_x0 i0=$abc$109383$new_n50793_ i1=$abc$109383$new_n50789_ nq=$abc$109383$new_n50794_
 .subckt inv_x0 i=soc.ram.ram[39][27] nq=$abc$109383$new_n50795_
 .subckt nand2_x0 i0=$abc$109383$new_n50795_ i1=$abc$109383$new_n45322_ nq=$abc$109383$new_n50796_
-.subckt ao22_x2 i0=soc.ram.ram[35][27] i1=$abc$109383$new_n44604_ i2=$abc$109383$new_n43962_ q=$abc$109383$new_n50797_
+.subckt and21nor_x1 i0=soc.ram.ram[35][27] i1=$abc$109383$new_n44604_ i2=$abc$109383$new_n43962_ nq=$abc$109383$new_n50797_
 .subckt nand2_x0 i0=$abc$109383$new_n50797_ i1=$abc$109383$new_n50796_ nq=$abc$109383$new_n50798_
-.subckt mx2_x2 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[34][27] i1=soc.ram.ram[38][27] q=$abc$109383$new_n50799_
-.subckt a2_x2 i0=$abc$109383$new_n50799_ i1=$abc$109383$new_n44562_ q=$abc$109383$new_n50800_
+.subckt mux2_x1 cmd=$abc$109383$new_n44066_ i0=soc.ram.ram[34][27] i1=soc.ram.ram[38][27] q=$abc$109383$new_n50799_
+.subckt and2_x1 i0=$abc$109383$new_n50799_ i1=$abc$109383$new_n44562_ q=$abc$109383$new_n50800_
 .subckt nor2_x0 i0=$abc$109383$new_n50800_ i1=$abc$109383$new_n44741_ nq=$abc$109383$new_n50801_
 .subckt nand2_x0 i0=$abc$109383$new_n50801_ i1=$abc$109383$new_n50798_ nq=$abc$109383$new_n50802_
 .subckt inv_x0 i=soc.ram.ram[37][27] nq=$abc$109383$new_n50803_
 .subckt nand2_x0 i0=$abc$109383$new_n50803_ i1=$abc$109383$new_n43829_ nq=$abc$109383$new_n50804_
-.subckt ao22_x2 i0=soc.ram.ram[33][27] i1=$abc$109383$new_n44176_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n50805_
+.subckt and21nor_x1 i0=soc.ram.ram[33][27] i1=$abc$109383$new_n44176_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n50805_
 .subckt nand2_x0 i0=$abc$109383$new_n50805_ i1=$abc$109383$new_n50804_ nq=$abc$109383$new_n50806_
-.subckt mx2_x2 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[32][27] i1=soc.ram.ram[36][27] q=$abc$109383$new_n50807_
+.subckt mux2_x1 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[32][27] i1=soc.ram.ram[36][27] q=$abc$109383$new_n50807_
 .subckt nand2_x0 i0=$abc$109383$new_n50807_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n50808_
 .subckt nand3_x0 i0=$abc$109383$new_n50808_ i1=$abc$109383$new_n50806_ i2=$abc$109383$new_n45015_ nq=$abc$109383$new_n50809_
 .subckt nand3_x0 i0=$abc$109383$new_n50809_ i1=$abc$109383$new_n50802_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n50810_
-.subckt oa22_x2 i0=$abc$109383$new_n50810_ i1=$abc$109383$new_n50794_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n50811_
+.subckt or21nand_x1 i0=$abc$109383$new_n50810_ i1=$abc$109383$new_n50794_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n50811_
 .subckt nand3_x0 i0=$abc$109383$new_n50811_ i1=$abc$109383$new_n50785_ i2=$abc$109383$new_n43900_ nq=$abc$109383$new_n50812_
-.subckt mx2_x2 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[26][27] i1=soc.ram.ram[30][27] q=$abc$109383$new_n50813_
-.subckt a2_x2 i0=$abc$109383$new_n50813_ i1=$abc$109383$new_n43616_ q=$abc$109383$new_n50814_
-.subckt mx2_x2 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[27][27] i1=soc.ram.ram[31][27] q=$abc$109383$new_n50815_
-.subckt oa22_x2 i0=$abc$109383$new_n43996_ i1=$abc$109383$new_n50815_ i2=$abc$109383$new_n43836_ q=$abc$109383$new_n50816_
+.subckt mux2_x1 cmd=$abc$109383$new_n43527_ i0=soc.ram.ram[26][27] i1=soc.ram.ram[30][27] q=$abc$109383$new_n50813_
+.subckt and2_x1 i0=$abc$109383$new_n50813_ i1=$abc$109383$new_n43616_ q=$abc$109383$new_n50814_
+.subckt mux2_x1 cmd=$abc$109383$new_n44351_ i0=soc.ram.ram[27][27] i1=soc.ram.ram[31][27] q=$abc$109383$new_n50815_
+.subckt or21nand_x1 i0=$abc$109383$new_n43996_ i1=$abc$109383$new_n50815_ i2=$abc$109383$new_n43836_ nq=$abc$109383$new_n50816_
 .subckt nor2_x0 i0=$abc$109383$new_n50816_ i1=$abc$109383$new_n50814_ nq=$abc$109383$new_n50817_
 .subckt inv_x0 i=soc.ram.ram[18][27] nq=$abc$109383$new_n50818_
 .subckt inv_x0 i=soc.ram.ram[22][27] nq=$abc$109383$new_n50819_
-.subckt mx2_x2 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n50819_ i1=$abc$109383$new_n50818_ q=$abc$109383$new_n50820_
-.subckt ao22_x2 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n50820_ i2=$abc$109383$new_n43432_ q=$abc$109383$new_n50821_
+.subckt mux2_x1 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n50819_ i1=$abc$109383$new_n50818_ q=$abc$109383$new_n50820_
+.subckt and21nor_x1 i0=$abc$109383$new_n43444_ i1=$abc$109383$new_n50820_ i2=$abc$109383$new_n43432_ nq=$abc$109383$new_n50821_
 .subckt inv_x0 i=soc.ram.ram[23][27] nq=$abc$109383$new_n50822_
 .subckt nand2_x0 i0=$abc$109383$new_n50822_ i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n50823_
-.subckt ao22_x2 i0=soc.ram.ram[19][27] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ q=$abc$109383$new_n50824_
+.subckt and21nor_x1 i0=soc.ram.ram[19][27] i1=$abc$109383$new_n43700_ i2=$abc$109383$new_n43699_ nq=$abc$109383$new_n50824_
 .subckt nand2_x0 i0=$abc$109383$new_n50824_ i1=$abc$109383$new_n50823_ nq=$abc$109383$new_n50825_
-.subckt oa22_x2 i0=$abc$109383$new_n50825_ i1=$abc$109383$new_n50821_ i2=$abc$109383$new_n50817_ q=$abc$109383$new_n50826_
+.subckt or21nand_x1 i0=$abc$109383$new_n50825_ i1=$abc$109383$new_n50821_ i2=$abc$109383$new_n50817_ nq=$abc$109383$new_n50826_
 .subckt nand2_x0 i0=$abc$109383$new_n50826_ i1=$abc$109383$new_n45320_ nq=$abc$109383$new_n50827_
-.subckt mx2_x2 cmd=$abc$109383$new_n44423_ i0=soc.ram.ram[24][27] i1=soc.ram.ram[28][27] q=$abc$109383$new_n50828_
-.subckt a2_x2 i0=$abc$109383$new_n50828_ i1=$abc$109383$new_n44596_ q=$abc$109383$new_n50829_
-.subckt mx2_x2 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[25][27] i1=soc.ram.ram[29][27] q=$abc$109383$new_n50830_
-.subckt oa22_x2 i0=$abc$109383$new_n43362_ i1=$abc$109383$new_n50830_ i2=$abc$109383$new_n44161_ q=$abc$109383$new_n50831_
+.subckt mux2_x1 cmd=$abc$109383$new_n44423_ i0=soc.ram.ram[24][27] i1=soc.ram.ram[28][27] q=$abc$109383$new_n50828_
+.subckt and2_x1 i0=$abc$109383$new_n50828_ i1=$abc$109383$new_n44596_ q=$abc$109383$new_n50829_
+.subckt mux2_x1 cmd=$abc$109383$new_n43817_ i0=soc.ram.ram[25][27] i1=soc.ram.ram[29][27] q=$abc$109383$new_n50830_
+.subckt or21nand_x1 i0=$abc$109383$new_n43362_ i1=$abc$109383$new_n50830_ i2=$abc$109383$new_n44161_ nq=$abc$109383$new_n50831_
 .subckt nor2_x0 i0=$abc$109383$new_n50831_ i1=$abc$109383$new_n50829_ nq=$abc$109383$new_n50832_
 .subckt inv_x0 i=soc.ram.ram[16][27] nq=$abc$109383$new_n50833_
 .subckt inv_x0 i=soc.ram.ram[20][27] nq=$abc$109383$new_n50834_
-.subckt mx2_x2 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n50834_ i1=$abc$109383$new_n50833_ q=$abc$109383$new_n50835_
-.subckt ao22_x2 i0=$abc$109383$new_n43961_ i1=$abc$109383$new_n50835_ i2=$abc$109383$new_n43554_ q=$abc$109383$new_n50836_
+.subckt mux2_x1 cmd=$abc$109383$new_n43877_ i0=$abc$109383$new_n50834_ i1=$abc$109383$new_n50833_ q=$abc$109383$new_n50835_
+.subckt and21nor_x1 i0=$abc$109383$new_n43961_ i1=$abc$109383$new_n50835_ i2=$abc$109383$new_n43554_ nq=$abc$109383$new_n50836_
 .subckt inv_x0 i=soc.ram.ram[21][27] nq=$abc$109383$new_n50837_
 .subckt nand2_x0 i0=$abc$109383$new_n50837_ i1=$abc$109383$new_n44508_ nq=$abc$109383$new_n50838_
-.subckt ao22_x2 i0=soc.ram.ram[17][27] i1=$abc$109383$new_n44338_ i2=$abc$109383$new_n43690_ q=$abc$109383$new_n50839_
+.subckt and21nor_x1 i0=soc.ram.ram[17][27] i1=$abc$109383$new_n44338_ i2=$abc$109383$new_n43690_ nq=$abc$109383$new_n50839_
 .subckt nand2_x0 i0=$abc$109383$new_n50839_ i1=$abc$109383$new_n50838_ nq=$abc$109383$new_n50840_
-.subckt oa22_x2 i0=$abc$109383$new_n50840_ i1=$abc$109383$new_n50836_ i2=$abc$109383$new_n50832_ q=$abc$109383$new_n50841_
+.subckt or21nand_x1 i0=$abc$109383$new_n50840_ i1=$abc$109383$new_n50836_ i2=$abc$109383$new_n50832_ nq=$abc$109383$new_n50841_
 .subckt nand2_x0 i0=$abc$109383$new_n50841_ i1=$abc$109383$new_n45629_ nq=$abc$109383$new_n50842_
-.subckt oa22_x2 i0=$abc$109383$new_n50842_ i1=$abc$109383$new_n50827_ i2=$abc$109383$new_n43412_ q=$abc$109383$new_n50843_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[10][27] i1=soc.ram.ram[14][27] q=$abc$109383$new_n50844_
-.subckt a2_x2 i0=$abc$109383$new_n50844_ i1=$abc$109383$new_n44836_ q=$abc$109383$new_n50845_
-.subckt mx2_x2 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[11][27] i1=soc.ram.ram[15][27] q=$abc$109383$new_n50846_
-.subckt oa22_x2 i0=$abc$109383$new_n43611_ i1=$abc$109383$new_n50846_ i2=$abc$109383$new_n43711_ q=$abc$109383$new_n50847_
+.subckt or21nand_x1 i0=$abc$109383$new_n50842_ i1=$abc$109383$new_n50827_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n50843_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[10][27] i1=soc.ram.ram[14][27] q=$abc$109383$new_n50844_
+.subckt and2_x1 i0=$abc$109383$new_n50844_ i1=$abc$109383$new_n44836_ q=$abc$109383$new_n50845_
+.subckt mux2_x1 cmd=$abc$109383$new_n43403_ i0=soc.ram.ram[11][27] i1=soc.ram.ram[15][27] q=$abc$109383$new_n50846_
+.subckt or21nand_x1 i0=$abc$109383$new_n43611_ i1=$abc$109383$new_n50846_ i2=$abc$109383$new_n43711_ nq=$abc$109383$new_n50847_
 .subckt nor2_x0 i0=$abc$109383$new_n50847_ i1=$abc$109383$new_n50845_ nq=$abc$109383$new_n50848_
 .subckt inv_x0 i=soc.ram.ram[2][27] nq=$abc$109383$new_n50849_
 .subckt inv_x0 i=soc.ram.ram[6][27] nq=$abc$109383$new_n50850_
-.subckt mx2_x2 cmd=$abc$109383$new_n43560_ i0=$abc$109383$new_n50850_ i1=$abc$109383$new_n50849_ q=$abc$109383$new_n50851_
-.subckt ao22_x2 i0=$abc$109383$new_n43847_ i1=$abc$109383$new_n50851_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n50852_
+.subckt mux2_x1 cmd=$abc$109383$new_n43560_ i0=$abc$109383$new_n50850_ i1=$abc$109383$new_n50849_ q=$abc$109383$new_n50851_
+.subckt and21nor_x1 i0=$abc$109383$new_n43847_ i1=$abc$109383$new_n50851_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n50852_
 .subckt inv_x0 i=soc.ram.ram[7][27] nq=$abc$109383$new_n50853_
 .subckt nand2_x0 i0=$abc$109383$new_n50853_ i1=$abc$109383$new_n46926_ nq=$abc$109383$new_n50854_
-.subckt ao22_x2 i0=soc.ram.ram[3][27] i1=$abc$109383$new_n44404_ i2=$abc$109383$new_n43630_ q=$abc$109383$new_n50855_
+.subckt and21nor_x1 i0=soc.ram.ram[3][27] i1=$abc$109383$new_n44404_ i2=$abc$109383$new_n43630_ nq=$abc$109383$new_n50855_
 .subckt nand2_x0 i0=$abc$109383$new_n50855_ i1=$abc$109383$new_n50854_ nq=$abc$109383$new_n50856_
-.subckt oa22_x2 i0=$abc$109383$new_n50856_ i1=$abc$109383$new_n50852_ i2=$abc$109383$new_n50848_ q=$abc$109383$new_n50857_
+.subckt or21nand_x1 i0=$abc$109383$new_n50856_ i1=$abc$109383$new_n50852_ i2=$abc$109383$new_n50848_ nq=$abc$109383$new_n50857_
 .subckt nand2_x0 i0=$abc$109383$new_n50857_ i1=$abc$109383$new_n44622_ nq=$abc$109383$new_n50858_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[8][27] i1=soc.ram.ram[12][27] q=$abc$109383$new_n50859_
-.subckt a2_x2 i0=$abc$109383$new_n50859_ i1=$abc$109383$new_n43902_ q=$abc$109383$new_n50860_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[9][27] i1=soc.ram.ram[13][27] q=$abc$109383$new_n50861_
-.subckt oa22_x2 i0=$abc$109383$new_n44047_ i1=$abc$109383$new_n50861_ i2=$abc$109383$new_n43836_ q=$abc$109383$new_n50862_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[8][27] i1=soc.ram.ram[12][27] q=$abc$109383$new_n50859_
+.subckt and2_x1 i0=$abc$109383$new_n50859_ i1=$abc$109383$new_n43902_ q=$abc$109383$new_n50860_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[9][27] i1=soc.ram.ram[13][27] q=$abc$109383$new_n50861_
+.subckt or21nand_x1 i0=$abc$109383$new_n44047_ i1=$abc$109383$new_n50861_ i2=$abc$109383$new_n43836_ nq=$abc$109383$new_n50862_
 .subckt nor2_x0 i0=$abc$109383$new_n50862_ i1=$abc$109383$new_n50860_ nq=$abc$109383$new_n50863_
 .subckt inv_x0 i=soc.ram.ram[0][27] nq=$abc$109383$new_n50864_
 .subckt inv_x0 i=soc.ram.ram[4][27] nq=$abc$109383$new_n50865_
-.subckt mx2_x2 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n50865_ i1=$abc$109383$new_n50864_ q=$abc$109383$new_n50866_
-.subckt ao22_x2 i0=$abc$109383$new_n44504_ i1=$abc$109383$new_n50866_ i2=$abc$109383$new_n43432_ q=$abc$109383$new_n50867_
+.subckt mux2_x1 cmd=$abc$109383$new_n44535_ i0=$abc$109383$new_n50865_ i1=$abc$109383$new_n50864_ q=$abc$109383$new_n50866_
+.subckt and21nor_x1 i0=$abc$109383$new_n44504_ i1=$abc$109383$new_n50866_ i2=$abc$109383$new_n43432_ nq=$abc$109383$new_n50867_
 .subckt inv_x0 i=soc.ram.ram[5][27] nq=$abc$109383$new_n50868_
 .subckt nand2_x0 i0=$abc$109383$new_n50868_ i1=$abc$109383$new_n44316_ nq=$abc$109383$new_n50869_
-.subckt ao22_x2 i0=soc.ram.ram[1][27] i1=$abc$109383$new_n43509_ i2=$abc$109383$new_n43642_ q=$abc$109383$new_n50870_
+.subckt and21nor_x1 i0=soc.ram.ram[1][27] i1=$abc$109383$new_n43509_ i2=$abc$109383$new_n43642_ nq=$abc$109383$new_n50870_
 .subckt nand2_x0 i0=$abc$109383$new_n50870_ i1=$abc$109383$new_n50869_ nq=$abc$109383$new_n50871_
-.subckt oa22_x2 i0=$abc$109383$new_n50871_ i1=$abc$109383$new_n50867_ i2=$abc$109383$new_n50863_ q=$abc$109383$new_n50872_
+.subckt or21nand_x1 i0=$abc$109383$new_n50871_ i1=$abc$109383$new_n50867_ i2=$abc$109383$new_n50863_ nq=$abc$109383$new_n50872_
 .subckt nand2_x0 i0=$abc$109383$new_n50872_ i1=$abc$109383$new_n43990_ nq=$abc$109383$new_n50873_
-.subckt oa22_x2 i0=$abc$109383$new_n50873_ i1=$abc$109383$new_n50858_ i2=$abc$109383$new_n44041_ q=$abc$109383$new_n50874_
-.subckt a2_x2 i0=$abc$109383$new_n50874_ i1=$abc$109383$new_n50843_ q=$abc$109383$new_n50875_
-.subckt ao22_x2 i0=$abc$109383$new_n43900_ i1=$abc$109383$new_n50875_ i2=$abc$109383$new_n50812_ q=$abc$109383$new_n50876_
-.subckt o2_x2 i0=$abc$109383$new_n50876_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n50877_
-.subckt oa22_x2 i0=$abc$109383$new_n50877_ i1=$abc$109383$new_n50760_ i2=$abc$109383$new_n50647_ q=$abc$109383$new_n50878_
-.subckt ao22_x2 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n50878_ i2=$abc$109383$new_n50635_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103306
-.subckt oa22_x2 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[28] q=$abc$109383$new_n50880_
-.subckt a2_x2 i0=$abc$109383$new_n50880_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n50881_
+.subckt or21nand_x1 i0=$abc$109383$new_n50873_ i1=$abc$109383$new_n50858_ i2=$abc$109383$new_n44041_ nq=$abc$109383$new_n50874_
+.subckt and2_x1 i0=$abc$109383$new_n50874_ i1=$abc$109383$new_n50843_ q=$abc$109383$new_n50875_
+.subckt and21nor_x1 i0=$abc$109383$new_n43900_ i1=$abc$109383$new_n50875_ i2=$abc$109383$new_n50812_ nq=$abc$109383$new_n50876_
+.subckt or2_x1 i0=$abc$109383$new_n50876_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n50877_
+.subckt or21nand_x1 i0=$abc$109383$new_n50877_ i1=$abc$109383$new_n50760_ i2=$abc$109383$new_n50647_ nq=$abc$109383$new_n50878_
+.subckt and21nor_x1 i0=$abc$109383$new_n47736_ i1=$abc$109383$new_n50878_ i2=$abc$109383$new_n50635_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103306
+.subckt or21nand_x1 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n47738_ i2=soc.cpu.minerva.loadstore.m_load_data[28] nq=$abc$109383$new_n50880_
+.subckt and2_x1 i0=$abc$109383$new_n50880_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n50881_
 .subckt nand3_x0 i0=$abc$109383$new_n27646_ i1=$abc$109383$new_n27561_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n50882_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n50883_
 .subckt nand4_x0 i0=$abc$109383$new_n14915_ i1=$abc$109383$new_n14906_ i2=$abc$109383$new_n14897_ i3=soc.decoder.data_bus__dat_r[28] nq=$abc$109383$new_n50884_
 .subckt inv_x0 i=soc.hyperram.sr[28] nq=$abc$109383$new_n50885_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n50885_ q=$abc$109383$new_n50886_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n50885_ q=$abc$109383$new_n50886_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n50887_
 .subckt nor2_x0 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n50887_ nq=$abc$109383$new_n50888_
 .subckt nand4_x0 i0=$abc$109383$new_n50888_ i1=$abc$109383$new_n21963_ i2=$abc$109383$new_n21961_ i3=$abc$109383$new_n21959_ nq=$abc$109383$new_n50889_
-.subckt a3_x2 i0=$abc$109383$new_n50889_ i1=$abc$109383$new_n50886_ i2=$abc$109383$new_n50884_ q=$abc$109383$new_n50890_
+.subckt and3_x1 i0=$abc$109383$new_n50889_ i1=$abc$109383$new_n50886_ i2=$abc$109383$new_n50884_ q=$abc$109383$new_n50890_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n50891_
-.subckt ao22_x2 i0=$abc$109383$new_n50891_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n50890_ q=$abc$109383$new_n50892_
+.subckt and21nor_x1 i0=$abc$109383$new_n50891_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n50890_ nq=$abc$109383$new_n50892_
 .subckt nand3_x0 i0=$abc$109383$new_n50892_ i1=$abc$109383$new_n50883_ i2=$abc$109383$new_n50882_ nq=$abc$109383$new_n50893_
-.subckt o2_x2 i0=soc.ram.ram[83][28] i1=$abc$109383$new_n45234_ q=$abc$109383$new_n50894_
-.subckt ao22_x2 i0=soc.ram.ram[87][28] i1=$abc$109383$new_n44421_ i2=$abc$109383$new_n43416_ q=$abc$109383$new_n50895_
+.subckt or2_x1 i0=soc.ram.ram[83][28] i1=$abc$109383$new_n45234_ q=$abc$109383$new_n50894_
+.subckt and21nor_x1 i0=soc.ram.ram[87][28] i1=$abc$109383$new_n44421_ i2=$abc$109383$new_n43416_ nq=$abc$109383$new_n50895_
 .subckt nand2_x0 i0=$abc$109383$new_n50895_ i1=$abc$109383$new_n50894_ nq=$abc$109383$new_n50896_
 .subckt nor2_x0 i0=soc.ram.ram[82][28] i1=$abc$109383$new_n45668_ nq=$abc$109383$new_n50897_
 .subckt inv_x0 i=soc.ram.ram[86][28] nq=$abc$109383$new_n50898_
-.subckt oa22_x2 i0=$abc$109383$new_n50898_ i1=$abc$109383$new_n44419_ i2=$abc$109383$new_n43961_ q=$abc$109383$new_n50899_
-.subckt ao22_x2 i0=$abc$109383$new_n50899_ i1=$abc$109383$new_n50897_ i2=$abc$109383$new_n43665_ q=$abc$109383$new_n50900_
-.subckt a2_x2 i0=$abc$109383$new_n50900_ i1=$abc$109383$new_n50896_ q=$abc$109383$new_n50901_
+.subckt or21nand_x1 i0=$abc$109383$new_n50898_ i1=$abc$109383$new_n44419_ i2=$abc$109383$new_n43961_ nq=$abc$109383$new_n50899_
+.subckt and21nor_x1 i0=$abc$109383$new_n50899_ i1=$abc$109383$new_n50897_ i2=$abc$109383$new_n43665_ nq=$abc$109383$new_n50900_
+.subckt and2_x1 i0=$abc$109383$new_n50900_ i1=$abc$109383$new_n50896_ q=$abc$109383$new_n50901_
 .subckt inv_x0 i=soc.ram.ram[85][28] nq=$abc$109383$new_n50902_
 .subckt nand2_x0 i0=$abc$109383$new_n50902_ i1=$abc$109383$new_n45478_ nq=$abc$109383$new_n50903_
-.subckt ao22_x2 i0=soc.ram.ram[81][28] i1=$abc$109383$new_n44508_ i2=$abc$109383$new_n45043_ q=$abc$109383$new_n50904_
+.subckt and21nor_x1 i0=soc.ram.ram[81][28] i1=$abc$109383$new_n44508_ i2=$abc$109383$new_n45043_ nq=$abc$109383$new_n50904_
 .subckt nand2_x0 i0=$abc$109383$new_n50904_ i1=$abc$109383$new_n50903_ nq=$abc$109383$new_n50905_
-.subckt mx2_x2 cmd=$abc$109383$new_n43660_ i0=soc.ram.ram[80][28] i1=soc.ram.ram[84][28] q=$abc$109383$new_n50906_
+.subckt mux2_x1 cmd=$abc$109383$new_n43660_ i0=soc.ram.ram[80][28] i1=soc.ram.ram[84][28] q=$abc$109383$new_n50906_
 .subckt nand2_x0 i0=$abc$109383$new_n50906_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n50907_
-.subckt a2_x2 i0=$abc$109383$new_n50907_ i1=$abc$109383$new_n44115_ q=$abc$109383$new_n50908_
-.subckt a2_x2 i0=$abc$109383$new_n50908_ i1=$abc$109383$new_n50905_ q=$abc$109383$new_n50909_
-.subckt ao22_x2 i0=$abc$109383$new_n50909_ i1=$abc$109383$new_n50901_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n50910_
-.subckt mx2_x2 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[64][28] i1=soc.ram.ram[68][28] q=$abc$109383$new_n50911_
+.subckt and2_x1 i0=$abc$109383$new_n50907_ i1=$abc$109383$new_n44115_ q=$abc$109383$new_n50908_
+.subckt and2_x1 i0=$abc$109383$new_n50908_ i1=$abc$109383$new_n50905_ q=$abc$109383$new_n50909_
+.subckt and21nor_x1 i0=$abc$109383$new_n50909_ i1=$abc$109383$new_n50901_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n50910_
+.subckt mux2_x1 cmd=$abc$109383$new_n43873_ i0=soc.ram.ram[64][28] i1=soc.ram.ram[68][28] q=$abc$109383$new_n50911_
 .subckt nand2_x0 i0=$abc$109383$new_n50911_ i1=$abc$109383$new_n44097_ nq=$abc$109383$new_n50912_
-.subckt o2_x2 i0=soc.ram.ram[65][28] i1=$abc$109383$new_n45825_ q=$abc$109383$new_n50913_
+.subckt or2_x1 i0=soc.ram.ram[65][28] i1=$abc$109383$new_n45825_ q=$abc$109383$new_n50913_
 .subckt nand2_x0 i0=$abc$109383$new_n50913_ i1=$abc$109383$new_n45247_ nq=$abc$109383$new_n50914_
 .subckt inv_x0 i=soc.ram.ram[69][28] nq=$abc$109383$new_n50915_
-.subckt a2_x2 i0=$abc$109383$new_n50915_ i1=$abc$109383$new_n43925_ q=$abc$109383$new_n50916_
-.subckt ao22_x2 i0=$abc$109383$new_n50916_ i1=$abc$109383$new_n50914_ i2=$abc$109383$new_n50912_ q=$abc$109383$new_n50917_
-.subckt a2_x2 i0=$abc$109383$new_n50917_ i1=$abc$109383$new_n44741_ q=$abc$109383$new_n50918_
-.subckt o2_x2 i0=soc.ram.ram[67][28] i1=$abc$109383$new_n43819_ q=$abc$109383$new_n50919_
-.subckt ao22_x2 i0=soc.ram.ram[71][28] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n43747_ q=$abc$109383$new_n50920_
+.subckt and2_x1 i0=$abc$109383$new_n50915_ i1=$abc$109383$new_n43925_ q=$abc$109383$new_n50916_
+.subckt and21nor_x1 i0=$abc$109383$new_n50916_ i1=$abc$109383$new_n50914_ i2=$abc$109383$new_n50912_ nq=$abc$109383$new_n50917_
+.subckt and2_x1 i0=$abc$109383$new_n50917_ i1=$abc$109383$new_n44741_ q=$abc$109383$new_n50918_
+.subckt or2_x1 i0=soc.ram.ram[67][28] i1=$abc$109383$new_n43819_ q=$abc$109383$new_n50919_
+.subckt and21nor_x1 i0=soc.ram.ram[71][28] i1=$abc$109383$new_n44042_ i2=$abc$109383$new_n43747_ nq=$abc$109383$new_n50920_
 .subckt nand2_x0 i0=$abc$109383$new_n50920_ i1=$abc$109383$new_n50919_ nq=$abc$109383$new_n50921_
 .subckt nor2_x0 i0=soc.ram.ram[66][28] i1=$abc$109383$new_n44751_ nq=$abc$109383$new_n50922_
 .subckt inv_x0 i=soc.ram.ram[70][28] nq=$abc$109383$new_n50923_
-.subckt oa22_x2 i0=$abc$109383$new_n50923_ i1=$abc$109383$new_n48096_ i2=$abc$109383$new_n43557_ q=$abc$109383$new_n50924_
-.subckt ao22_x2 i0=$abc$109383$new_n50924_ i1=$abc$109383$new_n50922_ i2=$abc$109383$new_n43808_ q=$abc$109383$new_n50925_
-.subckt a2_x2 i0=$abc$109383$new_n50925_ i1=$abc$109383$new_n50921_ q=$abc$109383$new_n50926_
-.subckt ao22_x2 i0=$abc$109383$new_n50926_ i1=$abc$109383$new_n50918_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n50927_
-.subckt ao22_x2 i0=$abc$109383$new_n50927_ i1=$abc$109383$new_n50910_ i2=$abc$109383$new_n44951_ q=$abc$109383$new_n50928_
-.subckt mx2_x2 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[72][28] i1=soc.ram.ram[76][28] q=$abc$109383$new_n50929_
-.subckt oa22_x2 i0=$abc$109383$new_n45053_ i1=$abc$109383$new_n50929_ i2=$abc$109383$new_n44212_ q=$abc$109383$new_n50930_
-.subckt ao22_x2 i0=soc.ram.ram[73][28] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n50931_
+.subckt or21nand_x1 i0=$abc$109383$new_n50923_ i1=$abc$109383$new_n48096_ i2=$abc$109383$new_n43557_ nq=$abc$109383$new_n50924_
+.subckt and21nor_x1 i0=$abc$109383$new_n50924_ i1=$abc$109383$new_n50922_ i2=$abc$109383$new_n43808_ nq=$abc$109383$new_n50925_
+.subckt and2_x1 i0=$abc$109383$new_n50925_ i1=$abc$109383$new_n50921_ q=$abc$109383$new_n50926_
+.subckt and21nor_x1 i0=$abc$109383$new_n50926_ i1=$abc$109383$new_n50918_ i2=$abc$109383$new_n45028_ nq=$abc$109383$new_n50927_
+.subckt and21nor_x1 i0=$abc$109383$new_n50927_ i1=$abc$109383$new_n50910_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n50928_
+.subckt mux2_x1 cmd=$abc$109383$new_n45076_ i0=soc.ram.ram[72][28] i1=soc.ram.ram[76][28] q=$abc$109383$new_n50929_
+.subckt or21nand_x1 i0=$abc$109383$new_n45053_ i1=$abc$109383$new_n50929_ i2=$abc$109383$new_n44212_ nq=$abc$109383$new_n50930_
+.subckt and21nor_x1 i0=soc.ram.ram[73][28] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n50931_
 .subckt inv_x0 i=soc.ram.ram[77][28] nq=$abc$109383$new_n50932_
 .subckt nand2_x0 i0=$abc$109383$new_n50932_ i1=$abc$109383$new_n45322_ nq=$abc$109383$new_n50933_
-.subckt oa22_x2 i0=$abc$109383$new_n50933_ i1=$abc$109383$new_n50931_ i2=$abc$109383$new_n50930_ q=$abc$109383$new_n50934_
-.subckt mx2_x2 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[74][28] i1=soc.ram.ram[78][28] q=$abc$109383$new_n50935_
+.subckt or21nand_x1 i0=$abc$109383$new_n50933_ i1=$abc$109383$new_n50931_ i2=$abc$109383$new_n50930_ nq=$abc$109383$new_n50934_
+.subckt mux2_x1 cmd=$abc$109383$new_n44011_ i0=soc.ram.ram[74][28] i1=soc.ram.ram[78][28] q=$abc$109383$new_n50935_
 .subckt nand2_x0 i0=$abc$109383$new_n50935_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n50936_
 .subckt nor2_x0 i0=soc.ram.ram[75][28] i1=$abc$109383$new_n45674_ nq=$abc$109383$new_n50937_
 .subckt inv_x0 i=soc.ram.ram[79][28] nq=$abc$109383$new_n50938_
-.subckt oa22_x2 i0=$abc$109383$new_n50938_ i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n43813_ q=$abc$109383$new_n50939_
-.subckt ao22_x2 i0=$abc$109383$new_n50939_ i1=$abc$109383$new_n50937_ i2=$abc$109383$new_n44789_ q=$abc$109383$new_n50940_
+.subckt or21nand_x1 i0=$abc$109383$new_n50938_ i1=$abc$109383$new_n46926_ i2=$abc$109383$new_n43813_ nq=$abc$109383$new_n50939_
+.subckt and21nor_x1 i0=$abc$109383$new_n50939_ i1=$abc$109383$new_n50937_ i2=$abc$109383$new_n44789_ nq=$abc$109383$new_n50940_
 .subckt nand2_x0 i0=$abc$109383$new_n50940_ i1=$abc$109383$new_n50936_ nq=$abc$109383$new_n50941_
-.subckt a3_x2 i0=$abc$109383$new_n50941_ i1=$abc$109383$new_n50934_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n50942_
-.subckt mx2_x2 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[90][28] i1=soc.ram.ram[94][28] q=$abc$109383$new_n50943_
+.subckt and3_x1 i0=$abc$109383$new_n50941_ i1=$abc$109383$new_n50934_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n50942_
+.subckt mux2_x1 cmd=$abc$109383$new_n44817_ i0=soc.ram.ram[90][28] i1=soc.ram.ram[94][28] q=$abc$109383$new_n50943_
 .subckt nand2_x0 i0=$abc$109383$new_n50943_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n50944_
 .subckt nor2_x0 i0=soc.ram.ram[91][28] i1=$abc$109383$new_n43907_ nq=$abc$109383$new_n50945_
 .subckt inv_x0 i=soc.ram.ram[95][28] nq=$abc$109383$new_n50946_
-.subckt oa22_x2 i0=$abc$109383$new_n50946_ i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n43731_ q=$abc$109383$new_n50947_
-.subckt ao22_x2 i0=$abc$109383$new_n50947_ i1=$abc$109383$new_n50945_ i2=$abc$109383$new_n43842_ q=$abc$109383$new_n50948_
+.subckt or21nand_x1 i0=$abc$109383$new_n50946_ i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n43731_ nq=$abc$109383$new_n50947_
+.subckt and21nor_x1 i0=$abc$109383$new_n50947_ i1=$abc$109383$new_n50945_ i2=$abc$109383$new_n43842_ nq=$abc$109383$new_n50948_
 .subckt nand2_x0 i0=$abc$109383$new_n50948_ i1=$abc$109383$new_n50944_ nq=$abc$109383$new_n50949_
 .subckt inv_x0 i=soc.ram.ram[93][28] nq=$abc$109383$new_n50950_
 .subckt nand2_x0 i0=$abc$109383$new_n50950_ i1=$abc$109383$new_n44660_ nq=$abc$109383$new_n50951_
-.subckt ao22_x2 i0=soc.ram.ram[89][28] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n50952_
+.subckt and21nor_x1 i0=soc.ram.ram[89][28] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n50952_
 .subckt nand2_x0 i0=$abc$109383$new_n50952_ i1=$abc$109383$new_n50951_ nq=$abc$109383$new_n50953_
-.subckt mx2_x2 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[88][28] i1=soc.ram.ram[92][28] q=$abc$109383$new_n50954_
+.subckt mux2_x1 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[88][28] i1=soc.ram.ram[92][28] q=$abc$109383$new_n50954_
 .subckt nand2_x0 i0=$abc$109383$new_n50954_ i1=$abc$109383$new_n43821_ nq=$abc$109383$new_n50955_
-.subckt a2_x2 i0=$abc$109383$new_n50955_ i1=$abc$109383$new_n43331_ q=$abc$109383$new_n50956_
+.subckt and2_x1 i0=$abc$109383$new_n50955_ i1=$abc$109383$new_n43331_ q=$abc$109383$new_n50956_
 .subckt nand2_x0 i0=$abc$109383$new_n50956_ i1=$abc$109383$new_n50953_ nq=$abc$109383$new_n50957_
-.subckt a3_x2 i0=$abc$109383$new_n50957_ i1=$abc$109383$new_n50949_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n50958_
+.subckt and3_x1 i0=$abc$109383$new_n50957_ i1=$abc$109383$new_n50949_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n50958_
 .subckt nor3_x0 i0=$abc$109383$new_n50958_ i1=$abc$109383$new_n50942_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n50959_
 .subckt nor3_x0 i0=$abc$109383$new_n50959_ i1=$abc$109383$new_n50928_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n50960_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[96][28] i1=soc.ram.ram[100][28] q=$abc$109383$new_n50961_
-.subckt a2_x2 i0=$abc$109383$new_n50961_ i1=$abc$109383$new_n43707_ q=$abc$109383$new_n50962_
-.subckt ao22_x2 i0=soc.ram.ram[97][28] i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43546_ q=$abc$109383$new_n50963_
-.subckt ao22_x2 i0=$abc$109383$new_n43804_ i1=soc.ram.ram[101][28] i2=$abc$109383$new_n50963_ q=$abc$109383$new_n50964_
-.subckt ao22_x2 i0=$abc$109383$new_n50964_ i1=$abc$109383$new_n50962_ i2=$abc$109383$new_n44115_ q=$abc$109383$new_n50965_
-.subckt mx2_x2 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[98][28] i1=soc.ram.ram[102][28] q=$abc$109383$new_n50966_
-.subckt a2_x2 i0=$abc$109383$new_n50966_ i1=$abc$109383$new_n43902_ q=$abc$109383$new_n50967_
-.subckt ao22_x2 i0=soc.ram.ram[99][28] i1=$abc$109383$new_n43627_ i2=$abc$109383$new_n43377_ q=$abc$109383$new_n50968_
-.subckt ao22_x2 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[103][28] i2=$abc$109383$new_n50968_ q=$abc$109383$new_n50969_
-.subckt ao22_x2 i0=$abc$109383$new_n50969_ i1=$abc$109383$new_n50967_ i2=$abc$109383$new_n44096_ q=$abc$109383$new_n50970_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[96][28] i1=soc.ram.ram[100][28] q=$abc$109383$new_n50961_
+.subckt and2_x1 i0=$abc$109383$new_n50961_ i1=$abc$109383$new_n43707_ q=$abc$109383$new_n50962_
+.subckt and21nor_x1 i0=soc.ram.ram[97][28] i1=$abc$109383$new_n43886_ i2=$abc$109383$new_n43546_ nq=$abc$109383$new_n50963_
+.subckt and21nor_x1 i0=$abc$109383$new_n43804_ i1=soc.ram.ram[101][28] i2=$abc$109383$new_n50963_ nq=$abc$109383$new_n50964_
+.subckt and21nor_x1 i0=$abc$109383$new_n50964_ i1=$abc$109383$new_n50962_ i2=$abc$109383$new_n44115_ nq=$abc$109383$new_n50965_
+.subckt mux2_x1 cmd=$abc$109383$new_n43380_ i0=soc.ram.ram[98][28] i1=soc.ram.ram[102][28] q=$abc$109383$new_n50966_
+.subckt and2_x1 i0=$abc$109383$new_n50966_ i1=$abc$109383$new_n43902_ q=$abc$109383$new_n50967_
+.subckt and21nor_x1 i0=soc.ram.ram[99][28] i1=$abc$109383$new_n43627_ i2=$abc$109383$new_n43377_ nq=$abc$109383$new_n50968_
+.subckt and21nor_x1 i0=$abc$109383$new_n43382_ i1=soc.ram.ram[103][28] i2=$abc$109383$new_n50968_ nq=$abc$109383$new_n50969_
+.subckt and21nor_x1 i0=$abc$109383$new_n50969_ i1=$abc$109383$new_n50967_ i2=$abc$109383$new_n44096_ nq=$abc$109383$new_n50970_
 .subckt nor3_x0 i0=$abc$109383$new_n50970_ i1=$abc$109383$new_n50965_ i2=$abc$109383$new_n43729_ nq=$abc$109383$new_n50971_
 .subckt nand2_x0 i0=soc.ram.ram[117][28] i1=$abc$109383$new_n43372_ nq=$abc$109383$new_n50972_
 .subckt inv_x0 i=soc.ram.ram[119][28] nq=$abc$109383$new_n50973_
-.subckt ao22_x2 i0=$abc$109383$new_n43543_ i1=$abc$109383$new_n50973_ i2=$abc$109383$new_n43748_ q=$abc$109383$new_n50974_
+.subckt and21nor_x1 i0=$abc$109383$new_n43543_ i1=$abc$109383$new_n50973_ i2=$abc$109383$new_n43748_ nq=$abc$109383$new_n50974_
 .subckt nand2_x0 i0=$abc$109383$new_n50974_ i1=$abc$109383$new_n50972_ nq=$abc$109383$new_n50975_
-.subckt oa22_x2 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[115][28] i2=$abc$109383$new_n44423_ q=$abc$109383$new_n50976_
-.subckt oa22_x2 i0=$abc$109383$new_n44060_ i1=soc.ram.ram[113][28] i2=$abc$109383$new_n50976_ q=$abc$109383$new_n50977_
-.subckt a2_x2 i0=$abc$109383$new_n50977_ i1=$abc$109383$new_n45247_ q=$abc$109383$new_n50978_
+.subckt or21nand_x1 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[115][28] i2=$abc$109383$new_n44423_ nq=$abc$109383$new_n50976_
+.subckt or21nand_x1 i0=$abc$109383$new_n44060_ i1=soc.ram.ram[113][28] i2=$abc$109383$new_n50976_ nq=$abc$109383$new_n50977_
+.subckt and2_x1 i0=$abc$109383$new_n50977_ i1=$abc$109383$new_n45247_ q=$abc$109383$new_n50978_
 .subckt nand2_x0 i0=$abc$109383$new_n50978_ i1=$abc$109383$new_n50975_ nq=$abc$109383$new_n50979_
 .subckt nand2_x0 i0=soc.ram.ram[116][28] i1=$abc$109383$new_n44075_ nq=$abc$109383$new_n50980_
 .subckt inv_x0 i=soc.ram.ram[118][28] nq=$abc$109383$new_n50981_
-.subckt ao22_x2 i0=$abc$109383$new_n43422_ i1=$abc$109383$new_n50981_ i2=$abc$109383$new_n43624_ q=$abc$109383$new_n50982_
-.subckt a2_x2 i0=$abc$109383$new_n50982_ i1=$abc$109383$new_n50980_ q=$abc$109383$new_n50983_
-.subckt oa22_x2 i0=$\soc.ram.ram$rdreg[0]$q[1] i1=soc.ram.ram[114][28] i2=$abc$109383$new_n43533_ q=$abc$109383$new_n50984_
-.subckt oa22_x2 i0=$abc$109383$new_n43422_ i1=soc.ram.ram[112][28] i2=$abc$109383$new_n50984_ q=$abc$109383$new_n50985_
+.subckt and21nor_x1 i0=$abc$109383$new_n43422_ i1=$abc$109383$new_n50981_ i2=$abc$109383$new_n43624_ nq=$abc$109383$new_n50982_
+.subckt and2_x1 i0=$abc$109383$new_n50982_ i1=$abc$109383$new_n50980_ q=$abc$109383$new_n50983_
+.subckt or21nand_x1 i0=$\soc.ram.ram$rdreg[0]$q[1] i1=soc.ram.ram[114][28] i2=$abc$109383$new_n43533_ nq=$abc$109383$new_n50984_
+.subckt or21nand_x1 i0=$abc$109383$new_n43422_ i1=soc.ram.ram[112][28] i2=$abc$109383$new_n50984_ nq=$abc$109383$new_n50985_
 .subckt nand2_x0 i0=$abc$109383$new_n50985_ i1=$abc$109383$new_n43634_ nq=$abc$109383$new_n50986_
-.subckt ao22_x2 i0=$abc$109383$new_n50986_ i1=$abc$109383$new_n50983_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n50987_
-.subckt a2_x2 i0=$abc$109383$new_n50987_ i1=$abc$109383$new_n50979_ q=$abc$109383$new_n50988_
-.subckt ao22_x2 i0=$abc$109383$new_n50988_ i1=$abc$109383$new_n50971_ i2=$abc$109383$new_n44654_ q=$abc$109383$new_n50989_
-.subckt mx2_x2 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[124][28] i1=soc.ram.ram[125][28] q=$abc$109383$new_n50990_
-.subckt mx2_x2 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[120][28] i1=soc.ram.ram[121][28] q=$abc$109383$new_n50991_
-.subckt mx2_x2 cmd=$abc$109383$new_n43873_ i0=$abc$109383$new_n50991_ i1=$abc$109383$new_n50990_ q=$abc$109383$new_n50992_
-.subckt a2_x2 i0=$abc$109383$new_n50992_ i1=$abc$109383$new_n44391_ q=$abc$109383$new_n50993_
-.subckt mx2_x2 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[126][28] i1=soc.ram.ram[127][28] q=$abc$109383$new_n50994_
-.subckt mx2_x2 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[122][28] i1=soc.ram.ram[123][28] q=$abc$109383$new_n50995_
-.subckt mx2_x2 cmd=$abc$109383$new_n44186_ i0=$abc$109383$new_n50995_ i1=$abc$109383$new_n50994_ q=$abc$109383$new_n50996_
-.subckt oa22_x2 i0=$abc$109383$new_n43564_ i1=$abc$109383$new_n50996_ i2=$abc$109383$new_n43324_ q=$abc$109383$new_n50997_
-.subckt o2_x2 i0=$abc$109383$new_n50997_ i1=$abc$109383$new_n50993_ q=$abc$109383$new_n50998_
+.subckt and21nor_x1 i0=$abc$109383$new_n50986_ i1=$abc$109383$new_n50983_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n50987_
+.subckt and2_x1 i0=$abc$109383$new_n50987_ i1=$abc$109383$new_n50979_ q=$abc$109383$new_n50988_
+.subckt and21nor_x1 i0=$abc$109383$new_n50988_ i1=$abc$109383$new_n50971_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n50989_
+.subckt mux2_x1 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[124][28] i1=soc.ram.ram[125][28] q=$abc$109383$new_n50990_
+.subckt mux2_x1 cmd=$abc$109383$new_n43393_ i0=soc.ram.ram[120][28] i1=soc.ram.ram[121][28] q=$abc$109383$new_n50991_
+.subckt mux2_x1 cmd=$abc$109383$new_n43873_ i0=$abc$109383$new_n50991_ i1=$abc$109383$new_n50990_ q=$abc$109383$new_n50992_
+.subckt and2_x1 i0=$abc$109383$new_n50992_ i1=$abc$109383$new_n44391_ q=$abc$109383$new_n50993_
+.subckt mux2_x1 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[126][28] i1=soc.ram.ram[127][28] q=$abc$109383$new_n50994_
+.subckt mux2_x1 cmd=$abc$109383$new_n43498_ i0=soc.ram.ram[122][28] i1=soc.ram.ram[123][28] q=$abc$109383$new_n50995_
+.subckt mux2_x1 cmd=$abc$109383$new_n44186_ i0=$abc$109383$new_n50995_ i1=$abc$109383$new_n50994_ q=$abc$109383$new_n50996_
+.subckt or21nand_x1 i0=$abc$109383$new_n43564_ i1=$abc$109383$new_n50996_ i2=$abc$109383$new_n43324_ nq=$abc$109383$new_n50997_
+.subckt or2_x1 i0=$abc$109383$new_n50997_ i1=$abc$109383$new_n50993_ q=$abc$109383$new_n50998_
 .subckt nand2_x0 i0=soc.ram.ram[111][28] i1=$abc$109383$new_n43786_ nq=$abc$109383$new_n50999_
 .subckt inv_x0 i=soc.ram.ram[107][28] nq=$abc$109383$new_n51000_
-.subckt ao22_x2 i0=$abc$109383$new_n51000_ i1=$abc$109383$new_n43599_ i2=$abc$109383$new_n43444_ q=$abc$109383$new_n51001_
+.subckt and21nor_x1 i0=$abc$109383$new_n51000_ i1=$abc$109383$new_n43599_ i2=$abc$109383$new_n43444_ nq=$abc$109383$new_n51001_
 .subckt nand2_x0 i0=$abc$109383$new_n51001_ i1=$abc$109383$new_n50999_ nq=$abc$109383$new_n51002_
-.subckt oa22_x2 i0=soc.ram.ram[110][28] i1=$abc$109383$new_n44423_ i2=$abc$109383$new_n43499_ q=$abc$109383$new_n51003_
-.subckt oa22_x2 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[106][28] i2=$abc$109383$new_n51003_ q=$abc$109383$new_n51004_
-.subckt a2_x2 i0=$abc$109383$new_n51004_ i1=$abc$109383$new_n43580_ q=$abc$109383$new_n51005_
-.subckt a2_x2 i0=$abc$109383$new_n51005_ i1=$abc$109383$new_n51002_ q=$abc$109383$new_n51006_
+.subckt or21nand_x1 i0=soc.ram.ram[110][28] i1=$abc$109383$new_n44423_ i2=$abc$109383$new_n43499_ nq=$abc$109383$new_n51003_
+.subckt or21nand_x1 i0=$abc$109383$new_n43530_ i1=soc.ram.ram[106][28] i2=$abc$109383$new_n51003_ nq=$abc$109383$new_n51004_
+.subckt and2_x1 i0=$abc$109383$new_n51004_ i1=$abc$109383$new_n43580_ q=$abc$109383$new_n51005_
+.subckt and2_x1 i0=$abc$109383$new_n51005_ i1=$abc$109383$new_n51002_ q=$abc$109383$new_n51006_
 .subckt nand2_x0 i0=soc.ram.ram[105][28] i1=$abc$109383$new_n43702_ nq=$abc$109383$new_n51007_
 .subckt inv_x0 i=soc.ram.ram[109][28] nq=$abc$109383$new_n51008_
-.subckt ao22_x2 i0=$abc$109383$new_n51008_ i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n43871_ q=$abc$109383$new_n51009_
+.subckt and21nor_x1 i0=$abc$109383$new_n51008_ i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n43871_ nq=$abc$109383$new_n51009_
 .subckt nand2_x0 i0=$abc$109383$new_n51009_ i1=$abc$109383$new_n51007_ nq=$abc$109383$new_n51010_
-.subckt oa22_x2 i0=soc.ram.ram[108][28] i1=$abc$109383$new_n43341_ i2=$abc$109383$new_n43480_ q=$abc$109383$new_n51011_
-.subckt oa22_x2 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[104][28] i2=$abc$109383$new_n51011_ q=$abc$109383$new_n51012_
-.subckt a2_x2 i0=$abc$109383$new_n51012_ i1=$abc$109383$new_n43543_ q=$abc$109383$new_n51013_
-.subckt oa22_x2 i0=$abc$109383$new_n51013_ i1=$abc$109383$new_n51010_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n51014_
-.subckt ao22_x2 i0=$abc$109383$new_n51014_ i1=$abc$109383$new_n51006_ i2=$abc$109383$new_n50998_ q=$abc$109383$new_n51015_
+.subckt or21nand_x1 i0=soc.ram.ram[108][28] i1=$abc$109383$new_n43341_ i2=$abc$109383$new_n43480_ nq=$abc$109383$new_n51011_
+.subckt or21nand_x1 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[104][28] i2=$abc$109383$new_n51011_ nq=$abc$109383$new_n51012_
+.subckt and2_x1 i0=$abc$109383$new_n51012_ i1=$abc$109383$new_n43543_ q=$abc$109383$new_n51013_
+.subckt or21nand_x1 i0=$abc$109383$new_n51013_ i1=$abc$109383$new_n51010_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n51014_
+.subckt and21nor_x1 i0=$abc$109383$new_n51014_ i1=$abc$109383$new_n51006_ i2=$abc$109383$new_n50998_ nq=$abc$109383$new_n51015_
 .subckt nor2_x0 i0=$abc$109383$new_n51015_ i1=$abc$109383$new_n44611_ nq=$abc$109383$new_n51016_
 .subckt nor3_x0 i0=$abc$109383$new_n51016_ i1=$abc$109383$new_n50989_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n51017_
-.subckt o2_x2 i0=$abc$109383$new_n51017_ i1=$abc$109383$new_n43590_ q=$abc$109383$new_n51018_
-.subckt ao22_x2 i0=$abc$109383$new_n51018_ i1=$abc$109383$new_n50960_ i2=$abc$109383$new_n43778_ q=$abc$109383$new_n51019_
+.subckt or2_x1 i0=$abc$109383$new_n51017_ i1=$abc$109383$new_n43590_ q=$abc$109383$new_n51018_
+.subckt and21nor_x1 i0=$abc$109383$new_n51018_ i1=$abc$109383$new_n50960_ i2=$abc$109383$new_n43778_ nq=$abc$109383$new_n51019_
 .subckt inv_x0 i=soc.ram.ram[54][28] nq=$abc$109383$new_n51020_
 .subckt nand2_x0 i0=$abc$109383$new_n51020_ i1=$abc$109383$new_n44022_ nq=$abc$109383$new_n51021_
-.subckt o2_x2 i0=soc.ram.ram[50][28] i1=$abc$109383$new_n44139_ q=$abc$109383$new_n51022_
-.subckt a2_x2 i0=$abc$109383$new_n51022_ i1=$abc$109383$new_n44031_ q=$abc$109383$new_n51023_
+.subckt or2_x1 i0=soc.ram.ram[50][28] i1=$abc$109383$new_n44139_ q=$abc$109383$new_n51022_
+.subckt and2_x1 i0=$abc$109383$new_n51022_ i1=$abc$109383$new_n44031_ q=$abc$109383$new_n51023_
 .subckt nand2_x0 i0=$abc$109383$new_n51023_ i1=$abc$109383$new_n51021_ nq=$abc$109383$new_n51024_
-.subckt o2_x2 i0=soc.ram.ram[51][28] i1=$abc$109383$new_n44600_ q=$abc$109383$new_n51025_
-.subckt ao22_x2 i0=soc.ram.ram[55][28] i1=$abc$109383$new_n43931_ i2=$abc$109383$new_n45405_ q=$abc$109383$new_n51026_
+.subckt or2_x1 i0=soc.ram.ram[51][28] i1=$abc$109383$new_n44600_ q=$abc$109383$new_n51025_
+.subckt and21nor_x1 i0=soc.ram.ram[55][28] i1=$abc$109383$new_n43931_ i2=$abc$109383$new_n45405_ nq=$abc$109383$new_n51026_
 .subckt nand2_x0 i0=$abc$109383$new_n51026_ i1=$abc$109383$new_n51025_ nq=$abc$109383$new_n51027_
-.subckt oa22_x2 i0=$abc$109383$new_n51027_ i1=$abc$109383$new_n51024_ i2=$abc$109383$new_n43898_ q=$abc$109383$new_n51028_
-.subckt mx2_x2 cmd=$abc$109383$new_n43829_ i0=soc.ram.ram[58][28] i1=soc.ram.ram[62][28] q=$abc$109383$new_n51029_
+.subckt or21nand_x1 i0=$abc$109383$new_n51027_ i1=$abc$109383$new_n51024_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n51028_
+.subckt mux2_x1 cmd=$abc$109383$new_n43829_ i0=soc.ram.ram[58][28] i1=soc.ram.ram[62][28] q=$abc$109383$new_n51029_
 .subckt nand2_x0 i0=$abc$109383$new_n51029_ i1=$abc$109383$new_n44892_ nq=$abc$109383$new_n51030_
 .subckt inv_x0 i=soc.ram.ram[63][28] nq=$abc$109383$new_n51031_
 .subckt nand2_x0 i0=$abc$109383$new_n51031_ i1=$abc$109383$new_n43852_ nq=$abc$109383$new_n51032_
-.subckt ao22_x2 i0=soc.ram.ram[59][28] i1=$abc$109383$new_n44017_ i2=$abc$109383$new_n43998_ q=$abc$109383$new_n51033_
+.subckt and21nor_x1 i0=soc.ram.ram[59][28] i1=$abc$109383$new_n44017_ i2=$abc$109383$new_n43998_ nq=$abc$109383$new_n51033_
 .subckt nand2_x0 i0=$abc$109383$new_n51033_ i1=$abc$109383$new_n51032_ nq=$abc$109383$new_n51034_
-.subckt oa22_x2 i0=$abc$109383$new_n51034_ i1=$abc$109383$new_n51030_ i2=$abc$109383$new_n44611_ q=$abc$109383$new_n51035_
+.subckt or21nand_x1 i0=$abc$109383$new_n51034_ i1=$abc$109383$new_n51030_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n51035_
 .subckt nand3_x0 i0=$abc$109383$new_n51035_ i1=$abc$109383$new_n51028_ i2=$abc$109383$new_n43950_ nq=$abc$109383$new_n51036_
-.subckt mx2_x2 cmd=$abc$109383$new_n46113_ i0=soc.ram.ram[49][28] i1=soc.ram.ram[53][28] q=$abc$109383$new_n51037_
-.subckt mx2_x2 cmd=$abc$109383$new_n46113_ i0=soc.ram.ram[48][28] i1=soc.ram.ram[52][28] q=$abc$109383$new_n51038_
-.subckt mx2_x2 cmd=$abc$109383$new_n43924_ i0=$abc$109383$new_n51038_ i1=$abc$109383$new_n51037_ q=$abc$109383$new_n51039_
+.subckt mux2_x1 cmd=$abc$109383$new_n46113_ i0=soc.ram.ram[49][28] i1=soc.ram.ram[53][28] q=$abc$109383$new_n51037_
+.subckt mux2_x1 cmd=$abc$109383$new_n46113_ i0=soc.ram.ram[48][28] i1=soc.ram.ram[52][28] q=$abc$109383$new_n51038_
+.subckt mux2_x1 cmd=$abc$109383$new_n43924_ i0=$abc$109383$new_n51038_ i1=$abc$109383$new_n51037_ q=$abc$109383$new_n51039_
 .subckt nand2_x0 i0=$abc$109383$new_n51039_ i1=$abc$109383$new_n44655_ nq=$abc$109383$new_n51040_
-.subckt mx2_x2 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[57][28] i1=soc.ram.ram[61][28] q=$abc$109383$new_n51041_
-.subckt mx2_x2 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[56][28] i1=soc.ram.ram[60][28] q=$abc$109383$new_n51042_
-.subckt mx2_x2 cmd=$abc$109383$new_n46175_ i0=$abc$109383$new_n51042_ i1=$abc$109383$new_n51041_ q=$abc$109383$new_n51043_
+.subckt mux2_x1 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[57][28] i1=soc.ram.ram[61][28] q=$abc$109383$new_n51041_
+.subckt mux2_x1 cmd=$abc$109383$new_n45207_ i0=soc.ram.ram[56][28] i1=soc.ram.ram[60][28] q=$abc$109383$new_n51042_
+.subckt mux2_x1 cmd=$abc$109383$new_n46175_ i0=$abc$109383$new_n51042_ i1=$abc$109383$new_n51041_ q=$abc$109383$new_n51043_
 .subckt nand2_x0 i0=$abc$109383$new_n51043_ i1=$abc$109383$new_n43769_ nq=$abc$109383$new_n51044_
 .subckt nand3_x0 i0=$abc$109383$new_n51044_ i1=$abc$109383$new_n51040_ i2=$abc$109383$new_n47411_ nq=$abc$109383$new_n51045_
 .subckt nand3_x0 i0=$abc$109383$new_n51045_ i1=$abc$109383$new_n51036_ i2=$abc$109383$new_n43841_ nq=$abc$109383$new_n51046_
-.subckt mx2_x2 cmd=$abc$109383$new_n45579_ i0=soc.ram.ram[42][28] i1=soc.ram.ram[46][28] q=$abc$109383$new_n51047_
+.subckt mux2_x1 cmd=$abc$109383$new_n45579_ i0=soc.ram.ram[42][28] i1=soc.ram.ram[46][28] q=$abc$109383$new_n51047_
 .subckt nand2_x0 i0=$abc$109383$new_n51047_ i1=$abc$109383$new_n43943_ nq=$abc$109383$new_n51048_
 .subckt inv_x0 i=soc.ram.ram[47][28] nq=$abc$109383$new_n51049_
 .subckt nand2_x0 i0=$abc$109383$new_n51049_ i1=$abc$109383$new_n43908_ nq=$abc$109383$new_n51050_
-.subckt ao22_x2 i0=soc.ram.ram[43][28] i1=$abc$109383$new_n45674_ i2=$abc$109383$new_n45599_ q=$abc$109383$new_n51051_
+.subckt and21nor_x1 i0=soc.ram.ram[43][28] i1=$abc$109383$new_n45674_ i2=$abc$109383$new_n45599_ nq=$abc$109383$new_n51051_
 .subckt nand2_x0 i0=$abc$109383$new_n51051_ i1=$abc$109383$new_n51050_ nq=$abc$109383$new_n51052_
-.subckt oa22_x2 i0=$abc$109383$new_n51052_ i1=$abc$109383$new_n51048_ i2=$abc$109383$new_n44611_ q=$abc$109383$new_n51053_
-.subckt mx2_x2 cmd=$abc$109383$new_n45219_ i0=soc.ram.ram[34][28] i1=soc.ram.ram[38][28] q=$abc$109383$new_n51054_
+.subckt or21nand_x1 i0=$abc$109383$new_n51052_ i1=$abc$109383$new_n51048_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n51053_
+.subckt mux2_x1 cmd=$abc$109383$new_n45219_ i0=soc.ram.ram[34][28] i1=soc.ram.ram[38][28] q=$abc$109383$new_n51054_
 .subckt nand2_x0 i0=$abc$109383$new_n51054_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n51055_
-.subckt o2_x2 i0=soc.ram.ram[35][28] i1=$abc$109383$new_n44634_ q=$abc$109383$new_n51056_
-.subckt ao22_x2 i0=soc.ram.ram[39][28] i1=$abc$109383$new_n44043_ i2=$abc$109383$new_n43992_ q=$abc$109383$new_n51057_
+.subckt or2_x1 i0=soc.ram.ram[35][28] i1=$abc$109383$new_n44634_ q=$abc$109383$new_n51056_
+.subckt and21nor_x1 i0=soc.ram.ram[39][28] i1=$abc$109383$new_n44043_ i2=$abc$109383$new_n43992_ nq=$abc$109383$new_n51057_
 .subckt nand2_x0 i0=$abc$109383$new_n51057_ i1=$abc$109383$new_n51056_ nq=$abc$109383$new_n51058_
-.subckt oa22_x2 i0=$abc$109383$new_n51058_ i1=$abc$109383$new_n51055_ i2=$abc$109383$new_n45298_ q=$abc$109383$new_n51059_
+.subckt or21nand_x1 i0=$abc$109383$new_n51058_ i1=$abc$109383$new_n51055_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n51059_
 .subckt nand3_x0 i0=$abc$109383$new_n51059_ i1=$abc$109383$new_n51053_ i2=$abc$109383$new_n43844_ nq=$abc$109383$new_n51060_
-.subckt mx2_x2 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[33][28] i1=soc.ram.ram[37][28] q=$abc$109383$new_n51061_
-.subckt mx2_x2 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[32][28] i1=soc.ram.ram[36][28] q=$abc$109383$new_n51062_
-.subckt mx2_x2 cmd=$abc$109383$new_n43924_ i0=$abc$109383$new_n51062_ i1=$abc$109383$new_n51061_ q=$abc$109383$new_n51063_
+.subckt mux2_x1 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[33][28] i1=soc.ram.ram[37][28] q=$abc$109383$new_n51061_
+.subckt mux2_x1 cmd=$abc$109383$new_n43965_ i0=soc.ram.ram[32][28] i1=soc.ram.ram[36][28] q=$abc$109383$new_n51062_
+.subckt mux2_x1 cmd=$abc$109383$new_n43924_ i0=$abc$109383$new_n51062_ i1=$abc$109383$new_n51061_ q=$abc$109383$new_n51063_
 .subckt nand2_x0 i0=$abc$109383$new_n51063_ i1=$abc$109383$new_n44951_ nq=$abc$109383$new_n51064_
-.subckt mx2_x2 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[41][28] i1=soc.ram.ram[45][28] q=$abc$109383$new_n51065_
-.subckt mx2_x2 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[40][28] i1=soc.ram.ram[44][28] q=$abc$109383$new_n51066_
-.subckt mx2_x2 cmd=$abc$109383$new_n43992_ i0=$abc$109383$new_n51066_ i1=$abc$109383$new_n51065_ q=$abc$109383$new_n51067_
+.subckt mux2_x1 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[41][28] i1=soc.ram.ram[45][28] q=$abc$109383$new_n51065_
+.subckt mux2_x1 cmd=$abc$109383$new_n43938_ i0=soc.ram.ram[40][28] i1=soc.ram.ram[44][28] q=$abc$109383$new_n51066_
+.subckt mux2_x1 cmd=$abc$109383$new_n43992_ i0=$abc$109383$new_n51066_ i1=$abc$109383$new_n51065_ q=$abc$109383$new_n51067_
 .subckt nand2_x0 i0=$abc$109383$new_n51067_ i1=$abc$109383$new_n43898_ nq=$abc$109383$new_n51068_
-.subckt a2_x2 i0=$abc$109383$new_n51068_ i1=$abc$109383$new_n45016_ q=$abc$109383$new_n51069_
+.subckt and2_x1 i0=$abc$109383$new_n51068_ i1=$abc$109383$new_n45016_ q=$abc$109383$new_n51069_
 .subckt nand2_x0 i0=$abc$109383$new_n51069_ i1=$abc$109383$new_n51064_ nq=$abc$109383$new_n51070_
 .subckt nand3_x0 i0=$abc$109383$new_n51070_ i1=$abc$109383$new_n51060_ i2=$abc$109383$new_n44585_ nq=$abc$109383$new_n51071_
-.subckt oa22_x2 i0=$abc$109383$new_n51071_ i1=$abc$109383$new_n51046_ i2=$abc$109383$new_n43782_ q=$abc$109383$new_n51072_
-.subckt mx2_x2 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[26][28] i1=soc.ram.ram[30][28] q=$abc$109383$new_n51073_
+.subckt or21nand_x1 i0=$abc$109383$new_n51071_ i1=$abc$109383$new_n51046_ i2=$abc$109383$new_n43782_ nq=$abc$109383$new_n51072_
+.subckt mux2_x1 cmd=$abc$109383$new_n44634_ i0=soc.ram.ram[26][28] i1=soc.ram.ram[30][28] q=$abc$109383$new_n51073_
 .subckt nand2_x0 i0=$abc$109383$new_n51073_ i1=$abc$109383$new_n44618_ nq=$abc$109383$new_n51074_
 .subckt nor2_x0 i0=soc.ram.ram[27][28] i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n51075_
 .subckt inv_x0 i=soc.ram.ram[31][28] nq=$abc$109383$new_n51076_
-.subckt oa22_x2 i0=$abc$109383$new_n51076_ i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44078_ q=$abc$109383$new_n51077_
-.subckt ao22_x2 i0=$abc$109383$new_n51077_ i1=$abc$109383$new_n51075_ i2=$abc$109383$new_n45428_ q=$abc$109383$new_n51078_
+.subckt or21nand_x1 i0=$abc$109383$new_n51076_ i1=$abc$109383$new_n45478_ i2=$abc$109383$new_n44078_ nq=$abc$109383$new_n51077_
+.subckt and21nor_x1 i0=$abc$109383$new_n51077_ i1=$abc$109383$new_n51075_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n51078_
 .subckt nand2_x0 i0=$abc$109383$new_n51078_ i1=$abc$109383$new_n51074_ nq=$abc$109383$new_n51079_
-.subckt ao22_x2 i0=soc.ram.ram[25][28] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n43823_ q=$abc$109383$new_n51080_
-.subckt ao22_x2 i0=$abc$109383$new_n44043_ i1=soc.ram.ram[29][28] i2=$abc$109383$new_n51080_ q=$abc$109383$new_n51081_
-.subckt mx2_x2 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[24][28] i1=soc.ram.ram[28][28] q=$abc$109383$new_n51082_
-.subckt oa22_x2 i0=$abc$109383$new_n44837_ i1=$abc$109383$new_n51082_ i2=$abc$109383$new_n43507_ q=$abc$109383$new_n51083_
-.subckt ao22_x2 i0=$abc$109383$new_n51083_ i1=$abc$109383$new_n51081_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n51084_
+.subckt and21nor_x1 i0=soc.ram.ram[25][28] i1=$abc$109383$new_n45265_ i2=$abc$109383$new_n43823_ nq=$abc$109383$new_n51080_
+.subckt and21nor_x1 i0=$abc$109383$new_n44043_ i1=soc.ram.ram[29][28] i2=$abc$109383$new_n51080_ nq=$abc$109383$new_n51081_
+.subckt mux2_x1 cmd=$abc$109383$new_n44073_ i0=soc.ram.ram[24][28] i1=soc.ram.ram[28][28] q=$abc$109383$new_n51082_
+.subckt or21nand_x1 i0=$abc$109383$new_n44837_ i1=$abc$109383$new_n51082_ i2=$abc$109383$new_n43507_ nq=$abc$109383$new_n51083_
+.subckt and21nor_x1 i0=$abc$109383$new_n51083_ i1=$abc$109383$new_n51081_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n51084_
 .subckt nand2_x0 i0=$abc$109383$new_n51084_ i1=$abc$109383$new_n51079_ nq=$abc$109383$new_n51085_
 .subckt inv_x0 i=soc.ram.ram[13][28] nq=$abc$109383$new_n51086_
 .subckt nand2_x0 i0=$abc$109383$new_n51086_ i1=$abc$109383$new_n44613_ nq=$abc$109383$new_n51087_
-.subckt ao22_x2 i0=soc.ram.ram[9][28] i1=$abc$109383$new_n44660_ i2=$abc$109383$new_n44627_ q=$abc$109383$new_n51088_
+.subckt and21nor_x1 i0=soc.ram.ram[9][28] i1=$abc$109383$new_n44660_ i2=$abc$109383$new_n44627_ nq=$abc$109383$new_n51088_
 .subckt nand2_x0 i0=$abc$109383$new_n51088_ i1=$abc$109383$new_n51087_ nq=$abc$109383$new_n51089_
-.subckt mx2_x2 cmd=$abc$109383$new_n43907_ i0=soc.ram.ram[8][28] i1=soc.ram.ram[12][28] q=$abc$109383$new_n51090_
+.subckt mux2_x1 cmd=$abc$109383$new_n43907_ i0=soc.ram.ram[8][28] i1=soc.ram.ram[12][28] q=$abc$109383$new_n51090_
 .subckt nand2_x0 i0=$abc$109383$new_n51090_ i1=$abc$109383$new_n43981_ nq=$abc$109383$new_n51091_
-.subckt a2_x2 i0=$abc$109383$new_n51091_ i1=$abc$109383$new_n45520_ q=$abc$109383$new_n51092_
+.subckt and2_x1 i0=$abc$109383$new_n51091_ i1=$abc$109383$new_n45520_ q=$abc$109383$new_n51092_
 .subckt nand2_x0 i0=$abc$109383$new_n51092_ i1=$abc$109383$new_n51089_ nq=$abc$109383$new_n51093_
-.subckt mx2_x2 cmd=$abc$109383$new_n44604_ i0=soc.ram.ram[10][28] i1=soc.ram.ram[14][28] q=$abc$109383$new_n51094_
-.subckt a2_x2 i0=$abc$109383$new_n51094_ i1=$abc$109383$new_n45402_ q=$abc$109383$new_n51095_
-.subckt o2_x2 i0=soc.ram.ram[11][28] i1=$abc$109383$new_n43477_ q=$abc$109383$new_n51096_
-.subckt ao22_x2 i0=soc.ram.ram[15][28] i1=$abc$109383$new_n43930_ i2=$abc$109383$new_n45247_ q=$abc$109383$new_n51097_
-.subckt oa22_x2 i0=$abc$109383$new_n51097_ i1=$abc$109383$new_n51096_ i2=$abc$109383$new_n44155_ q=$abc$109383$new_n51098_
-.subckt ao22_x2 i0=$abc$109383$new_n51098_ i1=$abc$109383$new_n51095_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n51099_
+.subckt mux2_x1 cmd=$abc$109383$new_n44604_ i0=soc.ram.ram[10][28] i1=soc.ram.ram[14][28] q=$abc$109383$new_n51094_
+.subckt and2_x1 i0=$abc$109383$new_n51094_ i1=$abc$109383$new_n45402_ q=$abc$109383$new_n51095_
+.subckt or2_x1 i0=soc.ram.ram[11][28] i1=$abc$109383$new_n43477_ q=$abc$109383$new_n51096_
+.subckt and21nor_x1 i0=soc.ram.ram[15][28] i1=$abc$109383$new_n43930_ i2=$abc$109383$new_n45247_ nq=$abc$109383$new_n51097_
+.subckt or21nand_x1 i0=$abc$109383$new_n51097_ i1=$abc$109383$new_n51096_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n51098_
+.subckt and21nor_x1 i0=$abc$109383$new_n51098_ i1=$abc$109383$new_n51095_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n51099_
 .subckt nand2_x0 i0=$abc$109383$new_n51099_ i1=$abc$109383$new_n51093_ nq=$abc$109383$new_n51100_
-.subckt a3_x2 i0=$abc$109383$new_n51100_ i1=$abc$109383$new_n51085_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n51101_
-.subckt mx2_x2 cmd=$abc$109383$new_n44044_ i0=soc.ram.ram[0][28] i1=soc.ram.ram[1][28] q=$abc$109383$new_n51102_
-.subckt o2_x2 i0=$abc$109383$new_n51102_ i1=$abc$109383$new_n44208_ q=$abc$109383$new_n51103_
-.subckt mx2_x2 cmd=$abc$109383$new_n45093_ i0=soc.ram.ram[4][28] i1=soc.ram.ram[5][28] q=$abc$109383$new_n51104_
-.subckt ao22_x2 i0=$abc$109383$new_n51104_ i1=$abc$109383$new_n44043_ i2=$abc$109383$new_n44155_ q=$abc$109383$new_n51105_
+.subckt and3_x1 i0=$abc$109383$new_n51100_ i1=$abc$109383$new_n51085_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n51101_
+.subckt mux2_x1 cmd=$abc$109383$new_n44044_ i0=soc.ram.ram[0][28] i1=soc.ram.ram[1][28] q=$abc$109383$new_n51102_
+.subckt or2_x1 i0=$abc$109383$new_n51102_ i1=$abc$109383$new_n44208_ q=$abc$109383$new_n51103_
+.subckt mux2_x1 cmd=$abc$109383$new_n45093_ i0=soc.ram.ram[4][28] i1=soc.ram.ram[5][28] q=$abc$109383$new_n51104_
+.subckt and21nor_x1 i0=$abc$109383$new_n51104_ i1=$abc$109383$new_n44043_ i2=$abc$109383$new_n44155_ nq=$abc$109383$new_n51105_
 .subckt nand2_x0 i0=$abc$109383$new_n51105_ i1=$abc$109383$new_n51103_ nq=$abc$109383$new_n51106_
-.subckt mx2_x2 cmd=$abc$109383$new_n43444_ i0=soc.ram.ram[2][28] i1=soc.ram.ram[3][28] q=$abc$109383$new_n51107_
-.subckt o2_x2 i0=$abc$109383$new_n51107_ i1=$abc$109383$new_n44139_ q=$abc$109383$new_n51108_
-.subckt mx2_x2 cmd=$abc$109383$new_n43690_ i0=soc.ram.ram[6][28] i1=soc.ram.ram[7][28] q=$abc$109383$new_n51109_
-.subckt ao22_x2 i0=$abc$109383$new_n51109_ i1=$abc$109383$new_n44902_ i2=$abc$109383$new_n45427_ q=$abc$109383$new_n51110_
+.subckt mux2_x1 cmd=$abc$109383$new_n43444_ i0=soc.ram.ram[2][28] i1=soc.ram.ram[3][28] q=$abc$109383$new_n51107_
+.subckt or2_x1 i0=$abc$109383$new_n51107_ i1=$abc$109383$new_n44139_ q=$abc$109383$new_n51108_
+.subckt mux2_x1 cmd=$abc$109383$new_n43690_ i0=soc.ram.ram[6][28] i1=soc.ram.ram[7][28] q=$abc$109383$new_n51109_
+.subckt and21nor_x1 i0=$abc$109383$new_n51109_ i1=$abc$109383$new_n44902_ i2=$abc$109383$new_n45427_ nq=$abc$109383$new_n51110_
 .subckt nand2_x0 i0=$abc$109383$new_n51110_ i1=$abc$109383$new_n51108_ nq=$abc$109383$new_n51111_
-.subckt oa22_x2 i0=$abc$109383$new_n51111_ i1=$abc$109383$new_n51106_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n51112_
-.subckt o2_x2 i0=soc.ram.ram[19][28] i1=$abc$109383$new_n45265_ q=$abc$109383$new_n51113_
-.subckt ao22_x2 i0=soc.ram.ram[23][28] i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n45481_ q=$abc$109383$new_n51114_
+.subckt or21nand_x1 i0=$abc$109383$new_n51111_ i1=$abc$109383$new_n51106_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n51112_
+.subckt or2_x1 i0=soc.ram.ram[19][28] i1=$abc$109383$new_n45265_ q=$abc$109383$new_n51113_
+.subckt and21nor_x1 i0=soc.ram.ram[23][28] i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n45481_ nq=$abc$109383$new_n51114_
 .subckt nand2_x0 i0=$abc$109383$new_n51114_ i1=$abc$109383$new_n51113_ nq=$abc$109383$new_n51115_
 .subckt nor2_x0 i0=soc.ram.ram[18][28] i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n51116_
 .subckt inv_x0 i=soc.ram.ram[22][28] nq=$abc$109383$new_n51117_
-.subckt oa22_x2 i0=$abc$109383$new_n51117_ i1=$abc$109383$new_n44202_ i2=$abc$109383$new_n43690_ q=$abc$109383$new_n51118_
-.subckt ao22_x2 i0=$abc$109383$new_n51118_ i1=$abc$109383$new_n51116_ i2=$abc$109383$new_n44212_ q=$abc$109383$new_n51119_
-.subckt a2_x2 i0=$abc$109383$new_n51119_ i1=$abc$109383$new_n51115_ q=$abc$109383$new_n51120_
+.subckt or21nand_x1 i0=$abc$109383$new_n51117_ i1=$abc$109383$new_n44202_ i2=$abc$109383$new_n43690_ nq=$abc$109383$new_n51118_
+.subckt and21nor_x1 i0=$abc$109383$new_n51118_ i1=$abc$109383$new_n51116_ i2=$abc$109383$new_n44212_ nq=$abc$109383$new_n51119_
+.subckt and2_x1 i0=$abc$109383$new_n51119_ i1=$abc$109383$new_n51115_ q=$abc$109383$new_n51120_
 .subckt inv_x0 i=soc.ram.ram[21][28] nq=$abc$109383$new_n51121_
 .subckt nand2_x0 i0=$abc$109383$new_n51121_ i1=$abc$109383$new_n44405_ nq=$abc$109383$new_n51122_
-.subckt ao22_x2 i0=soc.ram.ram[17][28] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ q=$abc$109383$new_n51123_
+.subckt and21nor_x1 i0=soc.ram.ram[17][28] i1=$abc$109383$new_n43743_ i2=$abc$109383$new_n43889_ nq=$abc$109383$new_n51123_
 .subckt nand2_x0 i0=$abc$109383$new_n51123_ i1=$abc$109383$new_n51122_ nq=$abc$109383$new_n51124_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[16][28] i1=soc.ram.ram[20][28] q=$abc$109383$new_n51125_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[16][28] i1=soc.ram.ram[20][28] q=$abc$109383$new_n51125_
 .subckt nand2_x0 i0=$abc$109383$new_n51125_ i1=$abc$109383$new_n43634_ nq=$abc$109383$new_n51126_
-.subckt a2_x2 i0=$abc$109383$new_n51126_ i1=$abc$109383$new_n43724_ q=$abc$109383$new_n51127_
-.subckt oa22_x2 i0=$abc$109383$new_n51127_ i1=$abc$109383$new_n51124_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n51128_
-.subckt ao22_x2 i0=$abc$109383$new_n51128_ i1=$abc$109383$new_n51120_ i2=$abc$109383$new_n44654_ q=$abc$109383$new_n51129_
-.subckt oa22_x2 i0=$abc$109383$new_n51129_ i1=$abc$109383$new_n51112_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n51130_
-.subckt ao22_x2 i0=$abc$109383$new_n51130_ i1=$abc$109383$new_n51101_ i2=$abc$109383$new_n45475_ q=$abc$109383$new_n51131_
+.subckt and2_x1 i0=$abc$109383$new_n51126_ i1=$abc$109383$new_n43724_ q=$abc$109383$new_n51127_
+.subckt or21nand_x1 i0=$abc$109383$new_n51127_ i1=$abc$109383$new_n51124_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n51128_
+.subckt and21nor_x1 i0=$abc$109383$new_n51128_ i1=$abc$109383$new_n51120_ i2=$abc$109383$new_n44654_ nq=$abc$109383$new_n51129_
+.subckt or21nand_x1 i0=$abc$109383$new_n51129_ i1=$abc$109383$new_n51112_ i2=$abc$109383$new_n45534_ nq=$abc$109383$new_n51130_
+.subckt and21nor_x1 i0=$abc$109383$new_n51130_ i1=$abc$109383$new_n51101_ i2=$abc$109383$new_n45475_ nq=$abc$109383$new_n51131_
 .subckt nand2_x0 i0=$abc$109383$new_n51131_ i1=$abc$109383$new_n51072_ nq=$abc$109383$new_n51132_
-.subckt oa22_x2 i0=$abc$109383$new_n51132_ i1=$abc$109383$new_n51019_ i2=$abc$109383$new_n50893_ q=$abc$109383$new_n51133_
-.subckt ao22_x2 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51133_ i2=$abc$109383$new_n50881_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103310
-.subckt oa22_x2 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n43281_ i2=soc.cpu.minerva.loadstore.m_load_data[29] q=$abc$109383$new_n51135_
-.subckt a2_x2 i0=$abc$109383$new_n51135_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n51136_
+.subckt or21nand_x1 i0=$abc$109383$new_n51132_ i1=$abc$109383$new_n51019_ i2=$abc$109383$new_n50893_ nq=$abc$109383$new_n51133_
+.subckt and21nor_x1 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51133_ i2=$abc$109383$new_n50881_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103310
+.subckt or21nand_x1 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n43281_ i2=soc.cpu.minerva.loadstore.m_load_data[29] nq=$abc$109383$new_n51135_
+.subckt and2_x1 i0=$abc$109383$new_n51135_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n51136_
 .subckt nand3_x0 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n45471_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[29] nq=$abc$109383$new_n51137_
 .subckt nand3_x0 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[29] nq=$abc$109383$new_n51138_
-.subckt oa22_x2 i0=$abc$109383$new_n51138_ i1=$abc$109383$new_n51137_ i2=$abc$109383$new_n27565_ q=$abc$109383$new_n51139_
+.subckt or21nand_x1 i0=$abc$109383$new_n51138_ i1=$abc$109383$new_n51137_ i2=$abc$109383$new_n27565_ nq=$abc$109383$new_n51139_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[29] nq=$abc$109383$new_n51140_
 .subckt inv_x0 i=soc.hyperram.sr[29] nq=$abc$109383$new_n51141_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n51141_ q=$abc$109383$new_n51142_
-.subckt a2_x2 i0=$abc$109383$new_n51142_ i1=$abc$109383$new_n51140_ q=$abc$109383$new_n51143_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n21997_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n51141_ q=$abc$109383$new_n51142_
+.subckt and2_x1 i0=$abc$109383$new_n51142_ i1=$abc$109383$new_n51140_ q=$abc$109383$new_n51143_
 .subckt nand3_x0 i0=$abc$109383$new_n28184_ i1=$abc$109383$new_n44283_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[29] nq=$abc$109383$new_n51144_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[29] nq=$abc$109383$new_n51145_
-.subckt o2_x2 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n51145_ q=$abc$109383$new_n51146_
-.subckt o4_x2 i0=$abc$109383$new_n51146_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n51147_
-.subckt a3_x2 i0=$abc$109383$new_n51147_ i1=$abc$109383$new_n51144_ i2=$abc$109383$new_n51143_ q=$abc$109383$new_n51148_
+.subckt or2_x1 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n51145_ q=$abc$109383$new_n51146_
+.subckt or4_x1 i0=$abc$109383$new_n51146_ i1=$abc$109383$new_n22000_ i2=$abc$109383$new_n43305_ i3=$abc$109383$new_n21995_ q=$abc$109383$new_n51147_
+.subckt and3_x1 i0=$abc$109383$new_n51147_ i1=$abc$109383$new_n51144_ i2=$abc$109383$new_n51143_ q=$abc$109383$new_n51148_
 .subckt nand2_x0 i0=$abc$109383$new_n51148_ i1=$abc$109383$new_n51139_ nq=$abc$109383$new_n51149_
-.subckt mx2_x2 cmd=$abc$109383$new_n43786_ i0=soc.ram.ram[122][29] i1=soc.ram.ram[126][29] q=$abc$109383$new_n51150_
+.subckt mux2_x1 cmd=$abc$109383$new_n43786_ i0=soc.ram.ram[122][29] i1=soc.ram.ram[126][29] q=$abc$109383$new_n51150_
 .subckt nand2_x0 i0=$abc$109383$new_n51150_ i1=$abc$109383$new_n44823_ nq=$abc$109383$new_n51151_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[123][29] i1=soc.ram.ram[127][29] q=$abc$109383$new_n51152_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[123][29] i1=soc.ram.ram[127][29] q=$abc$109383$new_n51152_
 .subckt nand2_x0 i0=$abc$109383$new_n51152_ i1=$abc$109383$new_n43824_ nq=$abc$109383$new_n51153_
 .subckt nand3_x0 i0=$abc$109383$new_n51153_ i1=$abc$109383$new_n51151_ i2=$abc$109383$new_n44853_ nq=$abc$109383$new_n51154_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[120][29] i1=soc.ram.ram[124][29] q=$abc$109383$new_n51155_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[120][29] i1=soc.ram.ram[124][29] q=$abc$109383$new_n51155_
 .subckt nand2_x0 i0=$abc$109383$new_n51155_ i1=$abc$109383$new_n45395_ nq=$abc$109383$new_n51156_
-.subckt mx2_x2 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[121][29] i1=soc.ram.ram[125][29] q=$abc$109383$new_n51157_
+.subckt mux2_x1 cmd=$abc$109383$new_n45285_ i0=soc.ram.ram[121][29] i1=soc.ram.ram[125][29] q=$abc$109383$new_n51157_
 .subckt nand2_x0 i0=$abc$109383$new_n51157_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n51158_
 .subckt nand3_x0 i0=$abc$109383$new_n51158_ i1=$abc$109383$new_n51156_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n51159_
 .subckt nand3_x0 i0=$abc$109383$new_n51159_ i1=$abc$109383$new_n51154_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n51160_
 .subckt inv_x0 i=soc.ram.ram[117][29] nq=$abc$109383$new_n51161_
 .subckt nand2_x0 i0=$abc$109383$new_n51161_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n51162_
-.subckt ao22_x2 i0=soc.ram.ram[113][29] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n51163_
+.subckt and21nor_x1 i0=soc.ram.ram[113][29] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n51163_
 .subckt nand2_x0 i0=$abc$109383$new_n51163_ i1=$abc$109383$new_n51162_ nq=$abc$109383$new_n51164_
-.subckt mx2_x2 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[112][29] i1=soc.ram.ram[116][29] q=$abc$109383$new_n51165_
+.subckt mux2_x1 cmd=$abc$109383$new_n45406_ i0=soc.ram.ram[112][29] i1=soc.ram.ram[116][29] q=$abc$109383$new_n51165_
 .subckt nand2_x0 i0=$abc$109383$new_n51165_ i1=$abc$109383$new_n45316_ nq=$abc$109383$new_n51166_
 .subckt nand3_x0 i0=$abc$109383$new_n51166_ i1=$abc$109383$new_n51164_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n51167_
 .subckt inv_x0 i=soc.ram.ram[119][29] nq=$abc$109383$new_n51168_
 .subckt nand2_x0 i0=$abc$109383$new_n51168_ i1=$abc$109383$new_n43954_ nq=$abc$109383$new_n51169_
-.subckt ao22_x2 i0=soc.ram.ram[115][29] i1=$abc$109383$new_n45870_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n51170_
+.subckt and21nor_x1 i0=soc.ram.ram[115][29] i1=$abc$109383$new_n45870_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n51170_
 .subckt nand2_x0 i0=$abc$109383$new_n51170_ i1=$abc$109383$new_n51169_ nq=$abc$109383$new_n51171_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[114][29] i1=soc.ram.ram[118][29] q=$abc$109383$new_n51172_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[114][29] i1=soc.ram.ram[118][29] q=$abc$109383$new_n51172_
 .subckt nand2_x0 i0=$abc$109383$new_n51172_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n51173_
 .subckt nand3_x0 i0=$abc$109383$new_n51173_ i1=$abc$109383$new_n51171_ i2=$abc$109383$new_n45320_ nq=$abc$109383$new_n51174_
 .subckt nand3_x0 i0=$abc$109383$new_n51174_ i1=$abc$109383$new_n51167_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n51175_
-.subckt oa22_x2 i0=$abc$109383$new_n51175_ i1=$abc$109383$new_n51160_ i2=$abc$109383$new_n46109_ q=$abc$109383$new_n51176_
-.subckt mx2_x2 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[106][29] i1=soc.ram.ram[110][29] q=$abc$109383$new_n51177_
+.subckt or21nand_x1 i0=$abc$109383$new_n51175_ i1=$abc$109383$new_n51160_ i2=$abc$109383$new_n46109_ nq=$abc$109383$new_n51176_
+.subckt mux2_x1 cmd=$abc$109383$new_n43693_ i0=soc.ram.ram[106][29] i1=soc.ram.ram[110][29] q=$abc$109383$new_n51177_
 .subckt nand2_x0 i0=$abc$109383$new_n51177_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n51178_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[107][29] i1=soc.ram.ram[111][29] q=$abc$109383$new_n51179_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[107][29] i1=soc.ram.ram[111][29] q=$abc$109383$new_n51179_
 .subckt nand2_x0 i0=$abc$109383$new_n51179_ i1=$abc$109383$new_n43987_ nq=$abc$109383$new_n51180_
 .subckt nand3_x0 i0=$abc$109383$new_n51180_ i1=$abc$109383$new_n51178_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n51181_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[104][29] i1=soc.ram.ram[108][29] q=$abc$109383$new_n51182_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[104][29] i1=soc.ram.ram[108][29] q=$abc$109383$new_n51182_
 .subckt nand2_x0 i0=$abc$109383$new_n51182_ i1=$abc$109383$new_n44702_ nq=$abc$109383$new_n51183_
-.subckt mx2_x2 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[105][29] i1=soc.ram.ram[109][29] q=$abc$109383$new_n51184_
+.subckt mux2_x1 cmd=$abc$109383$new_n43343_ i0=soc.ram.ram[105][29] i1=soc.ram.ram[109][29] q=$abc$109383$new_n51184_
 .subckt nand2_x0 i0=$abc$109383$new_n51184_ i1=$abc$109383$new_n45405_ nq=$abc$109383$new_n51185_
 .subckt nand3_x0 i0=$abc$109383$new_n51185_ i1=$abc$109383$new_n51183_ i2=$abc$109383$new_n44812_ nq=$abc$109383$new_n51186_
 .subckt nand3_x0 i0=$abc$109383$new_n51186_ i1=$abc$109383$new_n51181_ i2=$abc$109383$new_n45394_ nq=$abc$109383$new_n51187_
 .subckt inv_x0 i=soc.ram.ram[101][29] nq=$abc$109383$new_n51188_
 .subckt nand2_x0 i0=$abc$109383$new_n51188_ i1=$abc$109383$new_n43954_ nq=$abc$109383$new_n51189_
-.subckt ao22_x2 i0=soc.ram.ram[97][29] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n51190_
+.subckt and21nor_x1 i0=soc.ram.ram[97][29] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n51190_
 .subckt nand2_x0 i0=$abc$109383$new_n51190_ i1=$abc$109383$new_n51189_ nq=$abc$109383$new_n51191_
-.subckt mx2_x2 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[96][29] i1=soc.ram.ram[100][29] q=$abc$109383$new_n51192_
+.subckt mux2_x1 cmd=$abc$109383$new_n43686_ i0=soc.ram.ram[96][29] i1=soc.ram.ram[100][29] q=$abc$109383$new_n51192_
 .subckt nand2_x0 i0=$abc$109383$new_n51192_ i1=$abc$109383$new_n43814_ nq=$abc$109383$new_n51193_
 .subckt nand3_x0 i0=$abc$109383$new_n51193_ i1=$abc$109383$new_n51191_ i2=$abc$109383$new_n43911_ nq=$abc$109383$new_n51194_
 .subckt inv_x0 i=soc.ram.ram[103][29] nq=$abc$109383$new_n51195_
 .subckt nand2_x0 i0=$abc$109383$new_n51195_ i1=$abc$109383$new_n44139_ nq=$abc$109383$new_n51196_
-.subckt ao22_x2 i0=soc.ram.ram[99][29] i1=$abc$109383$new_n44146_ i2=$abc$109383$new_n44143_ q=$abc$109383$new_n51197_
+.subckt and21nor_x1 i0=soc.ram.ram[99][29] i1=$abc$109383$new_n44146_ i2=$abc$109383$new_n44143_ nq=$abc$109383$new_n51197_
 .subckt nand2_x0 i0=$abc$109383$new_n51197_ i1=$abc$109383$new_n51196_ nq=$abc$109383$new_n51198_
-.subckt mx2_x2 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[98][29] i1=soc.ram.ram[102][29] q=$abc$109383$new_n51199_
+.subckt mux2_x1 cmd=$abc$109383$new_n43828_ i0=soc.ram.ram[98][29] i1=soc.ram.ram[102][29] q=$abc$109383$new_n51199_
 .subckt nand2_x0 i0=$abc$109383$new_n51199_ i1=$abc$109383$new_n45630_ nq=$abc$109383$new_n51200_
 .subckt nand3_x0 i0=$abc$109383$new_n51200_ i1=$abc$109383$new_n51198_ i2=$abc$109383$new_n44213_ nq=$abc$109383$new_n51201_
 .subckt nand3_x0 i0=$abc$109383$new_n51201_ i1=$abc$109383$new_n51194_ i2=$abc$109383$new_n44449_ nq=$abc$109383$new_n51202_
-.subckt oa22_x2 i0=$abc$109383$new_n51202_ i1=$abc$109383$new_n51187_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n51203_
+.subckt or21nand_x1 i0=$abc$109383$new_n51202_ i1=$abc$109383$new_n51187_ i2=$abc$109383$new_n43593_ nq=$abc$109383$new_n51203_
 .subckt nand3_x0 i0=$abc$109383$new_n51203_ i1=$abc$109383$new_n51176_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n51204_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[84][29] i1=soc.ram.ram[85][29] q=$abc$109383$new_n51205_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[80][29] i1=soc.ram.ram[81][29] q=$abc$109383$new_n51206_
-.subckt mx2_x2 cmd=$abc$109383$new_n45942_ i0=$abc$109383$new_n51206_ i1=$abc$109383$new_n51205_ q=$abc$109383$new_n51207_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[82][29] i1=soc.ram.ram[83][29] q=$abc$109383$new_n51208_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[86][29] i1=soc.ram.ram[87][29] q=$abc$109383$new_n51209_
-.subckt mx2_x2 cmd=$abc$109383$new_n43502_ i0=$abc$109383$new_n51209_ i1=$abc$109383$new_n51208_ q=$abc$109383$new_n51210_
-.subckt mx2_x2 cmd=$abc$109383$new_n43423_ i0=$abc$109383$new_n51210_ i1=$abc$109383$new_n51207_ q=$abc$109383$new_n51211_
-.subckt a2_x2 i0=$abc$109383$new_n51211_ i1=$abc$109383$new_n44692_ q=$abc$109383$new_n51212_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[92][29] i1=soc.ram.ram[93][29] q=$abc$109383$new_n51213_
-.subckt mx2_x2 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[88][29] i1=soc.ram.ram[89][29] q=$abc$109383$new_n51214_
-.subckt mx2_x2 cmd=$abc$109383$new_n43976_ i0=$abc$109383$new_n51214_ i1=$abc$109383$new_n51213_ q=$abc$109383$new_n51215_
-.subckt o2_x2 i0=$abc$109383$new_n51215_ i1=$abc$109383$new_n43947_ q=$abc$109383$new_n51216_
-.subckt mx2_x2 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[94][29] i1=soc.ram.ram[95][29] q=$abc$109383$new_n51217_
-.subckt mx2_x2 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[90][29] i1=soc.ram.ram[91][29] q=$abc$109383$new_n51218_
-.subckt mx2_x2 cmd=$abc$109383$new_n43937_ i0=$abc$109383$new_n51218_ i1=$abc$109383$new_n51217_ q=$abc$109383$new_n51219_
-.subckt ao22_x2 i0=$abc$109383$new_n43423_ i1=$abc$109383$new_n51219_ i2=$abc$109383$new_n43896_ q=$abc$109383$new_n51220_
-.subckt a2_x2 i0=$abc$109383$new_n51220_ i1=$abc$109383$new_n51216_ q=$abc$109383$new_n51221_
-.subckt o3_x2 i0=$abc$109383$new_n51221_ i1=$abc$109383$new_n51212_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n51222_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[75][29] i1=soc.ram.ram[79][29] q=$abc$109383$new_n51223_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[74][29] i1=soc.ram.ram[78][29] q=$abc$109383$new_n51224_
-.subckt mx2_x2 cmd=$abc$109383$new_n43416_ i0=$abc$109383$new_n51224_ i1=$abc$109383$new_n51223_ q=$abc$109383$new_n51225_
-.subckt o2_x2 i0=$abc$109383$new_n51225_ i1=$abc$109383$new_n44812_ q=$abc$109383$new_n51226_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[73][29] i1=soc.ram.ram[77][29] q=$abc$109383$new_n51227_
-.subckt mx2_x2 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[72][29] i1=soc.ram.ram[76][29] q=$abc$109383$new_n51228_
-.subckt mx2_x2 cmd=$abc$109383$new_n45247_ i0=$abc$109383$new_n51228_ i1=$abc$109383$new_n51227_ q=$abc$109383$new_n51229_
-.subckt ao22_x2 i0=$abc$109383$new_n43934_ i1=$abc$109383$new_n51229_ i2=$abc$109383$new_n45244_ q=$abc$109383$new_n51230_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[84][29] i1=soc.ram.ram[85][29] q=$abc$109383$new_n51205_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[80][29] i1=soc.ram.ram[81][29] q=$abc$109383$new_n51206_
+.subckt mux2_x1 cmd=$abc$109383$new_n45942_ i0=$abc$109383$new_n51206_ i1=$abc$109383$new_n51205_ q=$abc$109383$new_n51207_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[82][29] i1=soc.ram.ram[83][29] q=$abc$109383$new_n51208_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[86][29] i1=soc.ram.ram[87][29] q=$abc$109383$new_n51209_
+.subckt mux2_x1 cmd=$abc$109383$new_n43502_ i0=$abc$109383$new_n51209_ i1=$abc$109383$new_n51208_ q=$abc$109383$new_n51210_
+.subckt mux2_x1 cmd=$abc$109383$new_n43423_ i0=$abc$109383$new_n51210_ i1=$abc$109383$new_n51207_ q=$abc$109383$new_n51211_
+.subckt and2_x1 i0=$abc$109383$new_n51211_ i1=$abc$109383$new_n44692_ q=$abc$109383$new_n51212_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[92][29] i1=soc.ram.ram[93][29] q=$abc$109383$new_n51213_
+.subckt mux2_x1 cmd=$abc$109383$new_n43845_ i0=soc.ram.ram[88][29] i1=soc.ram.ram[89][29] q=$abc$109383$new_n51214_
+.subckt mux2_x1 cmd=$abc$109383$new_n43976_ i0=$abc$109383$new_n51214_ i1=$abc$109383$new_n51213_ q=$abc$109383$new_n51215_
+.subckt or2_x1 i0=$abc$109383$new_n51215_ i1=$abc$109383$new_n43947_ q=$abc$109383$new_n51216_
+.subckt mux2_x1 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[94][29] i1=soc.ram.ram[95][29] q=$abc$109383$new_n51217_
+.subckt mux2_x1 cmd=$abc$109383$new_n43480_ i0=soc.ram.ram[90][29] i1=soc.ram.ram[91][29] q=$abc$109383$new_n51218_
+.subckt mux2_x1 cmd=$abc$109383$new_n43937_ i0=$abc$109383$new_n51218_ i1=$abc$109383$new_n51217_ q=$abc$109383$new_n51219_
+.subckt and21nor_x1 i0=$abc$109383$new_n43423_ i1=$abc$109383$new_n51219_ i2=$abc$109383$new_n43896_ nq=$abc$109383$new_n51220_
+.subckt and2_x1 i0=$abc$109383$new_n51220_ i1=$abc$109383$new_n51216_ q=$abc$109383$new_n51221_
+.subckt or3_x1 i0=$abc$109383$new_n51221_ i1=$abc$109383$new_n51212_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n51222_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[75][29] i1=soc.ram.ram[79][29] q=$abc$109383$new_n51223_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[74][29] i1=soc.ram.ram[78][29] q=$abc$109383$new_n51224_
+.subckt mux2_x1 cmd=$abc$109383$new_n43416_ i0=$abc$109383$new_n51224_ i1=$abc$109383$new_n51223_ q=$abc$109383$new_n51225_
+.subckt or2_x1 i0=$abc$109383$new_n51225_ i1=$abc$109383$new_n44812_ q=$abc$109383$new_n51226_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[73][29] i1=soc.ram.ram[77][29] q=$abc$109383$new_n51227_
+.subckt mux2_x1 cmd=$abc$109383$new_n44098_ i0=soc.ram.ram[72][29] i1=soc.ram.ram[76][29] q=$abc$109383$new_n51228_
+.subckt mux2_x1 cmd=$abc$109383$new_n45247_ i0=$abc$109383$new_n51228_ i1=$abc$109383$new_n51227_ q=$abc$109383$new_n51229_
+.subckt and21nor_x1 i0=$abc$109383$new_n43934_ i1=$abc$109383$new_n51229_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n51230_
 .subckt nand2_x0 i0=$abc$109383$new_n51230_ i1=$abc$109383$new_n51226_ nq=$abc$109383$new_n51231_
-.subckt mx2_x2 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[66][29] i1=soc.ram.ram[70][29] q=$abc$109383$new_n51232_
+.subckt mux2_x1 cmd=$abc$109383$new_n45870_ i0=soc.ram.ram[66][29] i1=soc.ram.ram[70][29] q=$abc$109383$new_n51232_
 .subckt nand2_x0 i0=$abc$109383$new_n51232_ i1=$abc$109383$new_n44598_ nq=$abc$109383$new_n51233_
 .subckt inv_x0 i=soc.ram.ram[71][29] nq=$abc$109383$new_n51234_
 .subckt nand2_x0 i0=$abc$109383$new_n51234_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n51235_
-.subckt ao22_x2 i0=soc.ram.ram[67][29] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43923_ q=$abc$109383$new_n51236_
+.subckt and21nor_x1 i0=soc.ram.ram[67][29] i1=$abc$109383$new_n44188_ i2=$abc$109383$new_n43923_ nq=$abc$109383$new_n51236_
 .subckt nand2_x0 i0=$abc$109383$new_n51236_ i1=$abc$109383$new_n51235_ nq=$abc$109383$new_n51237_
 .subckt nand3_x0 i0=$abc$109383$new_n51237_ i1=$abc$109383$new_n51233_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n51238_
-.subckt mx2_x2 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[64][29] i1=soc.ram.ram[68][29] q=$abc$109383$new_n51239_
+.subckt mux2_x1 cmd=$abc$109383$new_n46926_ i0=soc.ram.ram[64][29] i1=soc.ram.ram[68][29] q=$abc$109383$new_n51239_
 .subckt nand2_x0 i0=$abc$109383$new_n51239_ i1=$abc$109383$new_n44457_ nq=$abc$109383$new_n51240_
 .subckt inv_x0 i=soc.ram.ram[69][29] nq=$abc$109383$new_n51241_
 .subckt nand2_x0 i0=$abc$109383$new_n51241_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n51242_
-.subckt ao22_x2 i0=soc.ram.ram[65][29] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ q=$abc$109383$new_n51243_
+.subckt and21nor_x1 i0=soc.ram.ram[65][29] i1=$abc$109383$new_n45234_ i2=$abc$109383$new_n45232_ nq=$abc$109383$new_n51243_
 .subckt nand2_x0 i0=$abc$109383$new_n51243_ i1=$abc$109383$new_n51242_ nq=$abc$109383$new_n51244_
 .subckt nand3_x0 i0=$abc$109383$new_n51244_ i1=$abc$109383$new_n51240_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n51245_
 .subckt nand3_x0 i0=$abc$109383$new_n51245_ i1=$abc$109383$new_n51238_ i2=$abc$109383$new_n43472_ nq=$abc$109383$new_n51246_
 .subckt nand3_x0 i0=$abc$109383$new_n51246_ i1=$abc$109383$new_n51231_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n51247_
-.subckt a2_x2 i0=$abc$109383$new_n51247_ i1=$abc$109383$new_n51222_ q=$abc$109383$new_n51248_
-.subckt ao22_x2 i0=$abc$109383$new_n43410_ i1=$abc$109383$new_n51248_ i2=$abc$109383$new_n51204_ q=$abc$109383$new_n51249_
-.subckt ao22_x2 i0=$abc$109383$new_n46883_ i1=$abc$109383$new_n51249_ i2=$abc$109383$new_n43778_ q=$abc$109383$new_n51250_
+.subckt and2_x1 i0=$abc$109383$new_n51247_ i1=$abc$109383$new_n51222_ q=$abc$109383$new_n51248_
+.subckt and21nor_x1 i0=$abc$109383$new_n43410_ i1=$abc$109383$new_n51248_ i2=$abc$109383$new_n51204_ nq=$abc$109383$new_n51249_
+.subckt and21nor_x1 i0=$abc$109383$new_n46883_ i1=$abc$109383$new_n51249_ i2=$abc$109383$new_n43778_ nq=$abc$109383$new_n51250_
 .subckt inv_x0 i=soc.ram.ram[23][29] nq=$abc$109383$new_n51251_
 .subckt nand2_x0 i0=$abc$109383$new_n51251_ i1=$abc$109383$new_n43826_ nq=$abc$109383$new_n51252_
-.subckt ao22_x2 i0=soc.ram.ram[19][29] i1=$abc$109383$new_n46187_ i2=$abc$109383$new_n43923_ q=$abc$109383$new_n51253_
+.subckt and21nor_x1 i0=soc.ram.ram[19][29] i1=$abc$109383$new_n46187_ i2=$abc$109383$new_n43923_ nq=$abc$109383$new_n51253_
 .subckt nand2_x0 i0=$abc$109383$new_n51253_ i1=$abc$109383$new_n51252_ nq=$abc$109383$new_n51254_
-.subckt mx2_x2 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[18][29] i1=soc.ram.ram[22][29] q=$abc$109383$new_n51255_
+.subckt mux2_x1 cmd=$abc$109383$new_n45274_ i0=soc.ram.ram[18][29] i1=soc.ram.ram[22][29] q=$abc$109383$new_n51255_
 .subckt nand2_x0 i0=$abc$109383$new_n51255_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n51256_
 .subckt nand3_x0 i0=$abc$109383$new_n51256_ i1=$abc$109383$new_n51254_ i2=$abc$109383$new_n44484_ nq=$abc$109383$new_n51257_
-.subckt ao22_x2 i0=soc.ram.ram[27][29] i1=$abc$109383$new_n44469_ i2=$abc$109383$new_n43517_ q=$abc$109383$new_n51258_
-.subckt ao22_x2 i0=$abc$109383$new_n43930_ i1=soc.ram.ram[31][29] i2=$abc$109383$new_n51258_ q=$abc$109383$new_n51259_
-.subckt mx2_x2 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[26][29] i1=soc.ram.ram[30][29] q=$abc$109383$new_n51260_
-.subckt oa22_x2 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n51260_ i2=$abc$109383$new_n43470_ q=$abc$109383$new_n51261_
-.subckt ao22_x2 i0=$abc$109383$new_n51261_ i1=$abc$109383$new_n51259_ i2=$abc$109383$new_n43948_ q=$abc$109383$new_n51262_
+.subckt and21nor_x1 i0=soc.ram.ram[27][29] i1=$abc$109383$new_n44469_ i2=$abc$109383$new_n43517_ nq=$abc$109383$new_n51258_
+.subckt and21nor_x1 i0=$abc$109383$new_n43930_ i1=soc.ram.ram[31][29] i2=$abc$109383$new_n51258_ nq=$abc$109383$new_n51259_
+.subckt mux2_x1 cmd=$abc$109383$new_n44167_ i0=soc.ram.ram[26][29] i1=soc.ram.ram[30][29] q=$abc$109383$new_n51260_
+.subckt or21nand_x1 i0=$abc$109383$new_n43759_ i1=$abc$109383$new_n51260_ i2=$abc$109383$new_n43470_ nq=$abc$109383$new_n51261_
+.subckt and21nor_x1 i0=$abc$109383$new_n51261_ i1=$abc$109383$new_n51259_ i2=$abc$109383$new_n43948_ nq=$abc$109383$new_n51262_
 .subckt nand2_x0 i0=$abc$109383$new_n51262_ i1=$abc$109383$new_n51257_ nq=$abc$109383$new_n51263_
-.subckt mx2_x2 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[28][29] i1=soc.ram.ram[29][29] q=$abc$109383$new_n51264_
-.subckt mx2_x2 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[24][29] i1=soc.ram.ram[25][29] q=$abc$109383$new_n51265_
-.subckt mx2_x2 cmd=$abc$109383$new_n45087_ i0=$abc$109383$new_n51265_ i1=$abc$109383$new_n51264_ q=$abc$109383$new_n51266_
+.subckt mux2_x1 cmd=$abc$109383$new_n43414_ i0=soc.ram.ram[28][29] i1=soc.ram.ram[29][29] q=$abc$109383$new_n51264_
+.subckt mux2_x1 cmd=$abc$109383$new_n43651_ i0=soc.ram.ram[24][29] i1=soc.ram.ram[25][29] q=$abc$109383$new_n51265_
+.subckt mux2_x1 cmd=$abc$109383$new_n45087_ i0=$abc$109383$new_n51265_ i1=$abc$109383$new_n51264_ q=$abc$109383$new_n51266_
 .subckt nor2_x0 i0=$abc$109383$new_n51266_ i1=$abc$109383$new_n44448_ nq=$abc$109383$new_n51267_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[20][29] i1=soc.ram.ram[21][29] q=$abc$109383$new_n51268_
-.subckt mx2_x2 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[16][29] i1=soc.ram.ram[17][29] q=$abc$109383$new_n51269_
-.subckt mx2_x2 cmd=$abc$109383$new_n43660_ i0=$abc$109383$new_n51269_ i1=$abc$109383$new_n51268_ q=$abc$109383$new_n51270_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[20][29] i1=soc.ram.ram[21][29] q=$abc$109383$new_n51268_
+.subckt mux2_x1 cmd=$abc$109383$new_n43657_ i0=soc.ram.ram[16][29] i1=soc.ram.ram[17][29] q=$abc$109383$new_n51269_
+.subckt mux2_x1 cmd=$abc$109383$new_n43660_ i0=$abc$109383$new_n51269_ i1=$abc$109383$new_n51268_ q=$abc$109383$new_n51270_
 .subckt nor2_x0 i0=$abc$109383$new_n51270_ i1=$abc$109383$new_n44228_ nq=$abc$109383$new_n51271_
-.subckt o3_x2 i0=$abc$109383$new_n51271_ i1=$abc$109383$new_n51267_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n51272_
-.subckt oa22_x2 i0=$abc$109383$new_n51272_ i1=$abc$109383$new_n51263_ i2=$abc$109383$new_n45507_ q=$abc$109383$new_n51273_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[10][29] i1=soc.ram.ram[14][29] q=$abc$109383$new_n51274_
-.subckt mx2_x2 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[11][29] i1=soc.ram.ram[15][29] q=$abc$109383$new_n51275_
-.subckt mx2_x2 cmd=$abc$109383$new_n43428_ i0=$abc$109383$new_n51275_ i1=$abc$109383$new_n51274_ q=$abc$109383$new_n51276_
-.subckt o2_x2 i0=$abc$109383$new_n51276_ i1=$abc$109383$new_n44610_ q=$abc$109383$new_n51277_
-.subckt mx2_x2 cmd=$abc$109383$new_n45030_ i0=soc.ram.ram[2][29] i1=soc.ram.ram[6][29] q=$abc$109383$new_n51278_
+.subckt or3_x1 i0=$abc$109383$new_n51271_ i1=$abc$109383$new_n51267_ i2=$abc$109383$new_n43809_ q=$abc$109383$new_n51272_
+.subckt or21nand_x1 i0=$abc$109383$new_n51272_ i1=$abc$109383$new_n51263_ i2=$abc$109383$new_n45507_ nq=$abc$109383$new_n51273_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[10][29] i1=soc.ram.ram[14][29] q=$abc$109383$new_n51274_
+.subckt mux2_x1 cmd=$abc$109383$new_n43670_ i0=soc.ram.ram[11][29] i1=soc.ram.ram[15][29] q=$abc$109383$new_n51275_
+.subckt mux2_x1 cmd=$abc$109383$new_n43428_ i0=$abc$109383$new_n51275_ i1=$abc$109383$new_n51274_ q=$abc$109383$new_n51276_
+.subckt or2_x1 i0=$abc$109383$new_n51276_ i1=$abc$109383$new_n44610_ q=$abc$109383$new_n51277_
+.subckt mux2_x1 cmd=$abc$109383$new_n45030_ i0=soc.ram.ram[2][29] i1=soc.ram.ram[6][29] q=$abc$109383$new_n51278_
 .subckt nand2_x0 i0=$abc$109383$new_n51278_ i1=$abc$109383$new_n43866_ nq=$abc$109383$new_n51279_
-.subckt mx2_x2 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[3][29] i1=soc.ram.ram[7][29] q=$abc$109383$new_n51280_
+.subckt mux2_x1 cmd=$abc$109383$new_n45691_ i0=soc.ram.ram[3][29] i1=soc.ram.ram[7][29] q=$abc$109383$new_n51280_
 .subckt nand2_x0 i0=$abc$109383$new_n51280_ i1=$abc$109383$new_n45599_ nq=$abc$109383$new_n51281_
 .subckt nand3_x0 i0=$abc$109383$new_n51281_ i1=$abc$109383$new_n51279_ i2=$abc$109383$new_n45211_ nq=$abc$109383$new_n51282_
 .subckt nand3_x0 i0=$abc$109383$new_n51282_ i1=$abc$109383$new_n51277_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n51283_
-.subckt mx2_x2 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[0][29] i1=soc.ram.ram[4][29] q=$abc$109383$new_n51284_
-.subckt mx2_x2 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[1][29] i1=soc.ram.ram[5][29] q=$abc$109383$new_n51285_
-.subckt mx2_x2 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n51285_ i1=$abc$109383$new_n51284_ q=$abc$109383$new_n51286_
-.subckt o2_x2 i0=$abc$109383$new_n51286_ i1=$abc$109383$new_n45393_ q=$abc$109383$new_n51287_
+.subckt mux2_x1 cmd=$abc$109383$new_n45138_ i0=soc.ram.ram[0][29] i1=soc.ram.ram[4][29] q=$abc$109383$new_n51284_
+.subckt mux2_x1 cmd=$abc$109383$new_n47049_ i0=soc.ram.ram[1][29] i1=soc.ram.ram[5][29] q=$abc$109383$new_n51285_
+.subckt mux2_x1 cmd=$abc$109383$new_n44121_ i0=$abc$109383$new_n51285_ i1=$abc$109383$new_n51284_ q=$abc$109383$new_n51286_
+.subckt or2_x1 i0=$abc$109383$new_n51286_ i1=$abc$109383$new_n45393_ q=$abc$109383$new_n51287_
 .subckt inv_x0 i=soc.ram.ram[13][29] nq=$abc$109383$new_n51288_
 .subckt nand2_x0 i0=$abc$109383$new_n51288_ i1=$abc$109383$new_n43829_ nq=$abc$109383$new_n51289_
-.subckt ao22_x2 i0=soc.ram.ram[9][29] i1=$abc$109383$new_n44176_ i2=$abc$109383$new_n44175_ q=$abc$109383$new_n51290_
+.subckt and21nor_x1 i0=soc.ram.ram[9][29] i1=$abc$109383$new_n44176_ i2=$abc$109383$new_n44175_ nq=$abc$109383$new_n51290_
 .subckt nand2_x0 i0=$abc$109383$new_n51290_ i1=$abc$109383$new_n51289_ nq=$abc$109383$new_n51291_
-.subckt mx2_x2 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[8][29] i1=soc.ram.ram[12][29] q=$abc$109383$new_n51292_
+.subckt mux2_x1 cmd=$abc$109383$new_n45609_ i0=soc.ram.ram[8][29] i1=soc.ram.ram[12][29] q=$abc$109383$new_n51292_
 .subckt nand2_x0 i0=$abc$109383$new_n51292_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n51293_
 .subckt nand3_x0 i0=$abc$109383$new_n51293_ i1=$abc$109383$new_n51291_ i2=$abc$109383$new_n44410_ nq=$abc$109383$new_n51294_
 .subckt nand3_x0 i0=$abc$109383$new_n51294_ i1=$abc$109383$new_n51287_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n51295_
-.subckt oa22_x2 i0=$abc$109383$new_n51295_ i1=$abc$109383$new_n51283_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n51296_
+.subckt or21nand_x1 i0=$abc$109383$new_n51295_ i1=$abc$109383$new_n51283_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n51296_
 .subckt nand3_x0 i0=$abc$109383$new_n51296_ i1=$abc$109383$new_n51273_ i2=$abc$109383$new_n44444_ nq=$abc$109383$new_n51297_
 .subckt inv_x0 i=soc.ram.ram[41][29] nq=$abc$109383$new_n51298_
 .subckt inv_x0 i=soc.ram.ram[45][29] nq=$abc$109383$new_n51299_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n51299_ i1=$abc$109383$new_n51298_ q=$abc$109383$new_n51300_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n51299_ i1=$abc$109383$new_n51298_ q=$abc$109383$new_n51300_
 .subckt inv_x0 i=soc.ram.ram[40][29] nq=$abc$109383$new_n51301_
 .subckt inv_x0 i=soc.ram.ram[44][29] nq=$abc$109383$new_n51302_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n51302_ i1=$abc$109383$new_n51301_ q=$abc$109383$new_n51303_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=$abc$109383$new_n51303_ i1=$abc$109383$new_n51300_ q=$abc$109383$new_n51304_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n51302_ i1=$abc$109383$new_n51301_ q=$abc$109383$new_n51303_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=$abc$109383$new_n51303_ i1=$abc$109383$new_n51300_ q=$abc$109383$new_n51304_
 .subckt inv_x0 i=soc.ram.ram[42][29] nq=$abc$109383$new_n51305_
 .subckt inv_x0 i=soc.ram.ram[46][29] nq=$abc$109383$new_n51306_
-.subckt mx2_x2 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n51306_ i1=$abc$109383$new_n51305_ q=$abc$109383$new_n51307_
+.subckt mux2_x1 cmd=$abc$109383$new_n43501_ i0=$abc$109383$new_n51306_ i1=$abc$109383$new_n51305_ q=$abc$109383$new_n51307_
 .subckt inv_x0 i=soc.ram.ram[43][29] nq=$abc$109383$new_n51308_
 .subckt inv_x0 i=soc.ram.ram[47][29] nq=$abc$109383$new_n51309_
-.subckt mx2_x2 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n51309_ i1=$abc$109383$new_n51308_ q=$abc$109383$new_n51310_
-.subckt mx2_x2 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n51310_ i1=$abc$109383$new_n51307_ q=$abc$109383$new_n51311_
-.subckt mx2_x2 cmd=$abc$109383$new_n43423_ i0=$abc$109383$new_n51311_ i1=$abc$109383$new_n51304_ q=$abc$109383$new_n51312_
+.subckt mux2_x1 cmd=$abc$109383$new_n43876_ i0=$abc$109383$new_n51309_ i1=$abc$109383$new_n51308_ q=$abc$109383$new_n51310_
+.subckt mux2_x1 cmd=$abc$109383$new_n43427_ i0=$abc$109383$new_n51310_ i1=$abc$109383$new_n51307_ q=$abc$109383$new_n51311_
+.subckt mux2_x1 cmd=$abc$109383$new_n43423_ i0=$abc$109383$new_n51311_ i1=$abc$109383$new_n51304_ q=$abc$109383$new_n51312_
 .subckt nand2_x0 i0=$abc$109383$new_n51312_ i1=$abc$109383$new_n43897_ nq=$abc$109383$new_n51313_
-.subckt mx2_x2 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[35][29] i1=soc.ram.ram[39][29] q=$abc$109383$new_n51314_
-.subckt mx2_x2 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[34][29] i1=soc.ram.ram[38][29] q=$abc$109383$new_n51315_
-.subckt mx2_x2 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n51315_ i1=$abc$109383$new_n51314_ q=$abc$109383$new_n51316_
-.subckt a2_x2 i0=$abc$109383$new_n51316_ i1=$abc$109383$new_n43439_ q=$abc$109383$new_n51317_
-.subckt mx2_x2 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[33][29] i1=soc.ram.ram[37][29] q=$abc$109383$new_n51318_
-.subckt mx2_x2 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[32][29] i1=soc.ram.ram[36][29] q=$abc$109383$new_n51319_
-.subckt mx2_x2 cmd=$abc$109383$new_n46814_ i0=$abc$109383$new_n51319_ i1=$abc$109383$new_n51318_ q=$abc$109383$new_n51320_
-.subckt oa22_x2 i0=$abc$109383$new_n44061_ i1=$abc$109383$new_n51320_ i2=$abc$109383$new_n51317_ q=$abc$109383$new_n51321_
-.subckt ao22_x2 i0=$abc$109383$new_n43649_ i1=$abc$109383$new_n51321_ i2=$abc$109383$new_n51313_ q=$abc$109383$new_n51322_
-.subckt o2_x2 i0=soc.ram.ram[51][29] i1=$abc$109383$new_n43599_ q=$abc$109383$new_n51323_
-.subckt ao22_x2 i0=soc.ram.ram[55][29] i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n43415_ q=$abc$109383$new_n51324_
+.subckt mux2_x1 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[35][29] i1=soc.ram.ram[39][29] q=$abc$109383$new_n51314_
+.subckt mux2_x1 cmd=$abc$109383$new_n43440_ i0=soc.ram.ram[34][29] i1=soc.ram.ram[38][29] q=$abc$109383$new_n51315_
+.subckt mux2_x1 cmd=$abc$109383$new_n44401_ i0=$abc$109383$new_n51315_ i1=$abc$109383$new_n51314_ q=$abc$109383$new_n51316_
+.subckt and2_x1 i0=$abc$109383$new_n51316_ i1=$abc$109383$new_n43439_ q=$abc$109383$new_n51317_
+.subckt mux2_x1 cmd=$abc$109383$new_n43418_ i0=soc.ram.ram[33][29] i1=soc.ram.ram[37][29] q=$abc$109383$new_n51318_
+.subckt mux2_x1 cmd=$abc$109383$new_n44144_ i0=soc.ram.ram[32][29] i1=soc.ram.ram[36][29] q=$abc$109383$new_n51319_
+.subckt mux2_x1 cmd=$abc$109383$new_n46814_ i0=$abc$109383$new_n51319_ i1=$abc$109383$new_n51318_ q=$abc$109383$new_n51320_
+.subckt or21nand_x1 i0=$abc$109383$new_n44061_ i1=$abc$109383$new_n51320_ i2=$abc$109383$new_n51317_ nq=$abc$109383$new_n51321_
+.subckt and21nor_x1 i0=$abc$109383$new_n43649_ i1=$abc$109383$new_n51321_ i2=$abc$109383$new_n51313_ nq=$abc$109383$new_n51322_
+.subckt or2_x1 i0=soc.ram.ram[51][29] i1=$abc$109383$new_n43599_ q=$abc$109383$new_n51323_
+.subckt and21nor_x1 i0=soc.ram.ram[55][29] i1=$abc$109383$new_n44427_ i2=$abc$109383$new_n43415_ nq=$abc$109383$new_n51324_
 .subckt nand2_x0 i0=$abc$109383$new_n51324_ i1=$abc$109383$new_n51323_ nq=$abc$109383$new_n51325_
 .subckt inv_x0 i=soc.ram.ram[54][29] nq=$abc$109383$new_n51326_
 .subckt nand2_x0 i0=$abc$109383$new_n51326_ i1=$abc$109383$new_n44215_ nq=$abc$109383$new_n51327_
-.subckt o2_x2 i0=soc.ram.ram[50][29] i1=$abc$109383$new_n43886_ q=$abc$109383$new_n51328_
-.subckt a2_x2 i0=$abc$109383$new_n51328_ i1=$abc$109383$new_n43594_ q=$abc$109383$new_n51329_
+.subckt or2_x1 i0=soc.ram.ram[50][29] i1=$abc$109383$new_n43886_ q=$abc$109383$new_n51328_
+.subckt and2_x1 i0=$abc$109383$new_n51328_ i1=$abc$109383$new_n43594_ q=$abc$109383$new_n51329_
 .subckt nand2_x0 i0=$abc$109383$new_n51329_ i1=$abc$109383$new_n51327_ nq=$abc$109383$new_n51330_
-.subckt oa22_x2 i0=$abc$109383$new_n51330_ i1=$abc$109383$new_n51325_ i2=$abc$109383$new_n43330_ q=$abc$109383$new_n51331_
+.subckt or21nand_x1 i0=$abc$109383$new_n51330_ i1=$abc$109383$new_n51325_ i2=$abc$109383$new_n43330_ nq=$abc$109383$new_n51331_
 .subckt inv_x0 i=soc.ram.ram[53][29] nq=$abc$109383$new_n51332_
 .subckt nand2_x0 i0=$abc$109383$new_n51332_ i1=$abc$109383$new_n45116_ nq=$abc$109383$new_n51333_
-.subckt ao22_x2 i0=soc.ram.ram[49][29] i1=$abc$109383$new_n43867_ i2=$abc$109383$new_n46814_ q=$abc$109383$new_n51334_
+.subckt and21nor_x1 i0=soc.ram.ram[49][29] i1=$abc$109383$new_n43867_ i2=$abc$109383$new_n46814_ nq=$abc$109383$new_n51334_
 .subckt nand2_x0 i0=$abc$109383$new_n51334_ i1=$abc$109383$new_n51333_ nq=$abc$109383$new_n51335_
-.subckt mx2_x2 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[48][29] i1=soc.ram.ram[52][29] q=$abc$109383$new_n51336_
+.subckt mux2_x1 cmd=$abc$109383$new_n43483_ i0=soc.ram.ram[48][29] i1=soc.ram.ram[52][29] q=$abc$109383$new_n51336_
 .subckt nand2_x0 i0=$abc$109383$new_n51336_ i1=$abc$109383$new_n43737_ nq=$abc$109383$new_n51337_
-.subckt oa22_x2 i0=$abc$109383$new_n51337_ i1=$abc$109383$new_n51335_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n51338_
+.subckt or21nand_x1 i0=$abc$109383$new_n51337_ i1=$abc$109383$new_n51335_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n51338_
 .subckt nand3_x0 i0=$abc$109383$new_n51338_ i1=$abc$109383$new_n51331_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n51339_
 .subckt inv_x0 i=soc.ram.ram[61][29] nq=$abc$109383$new_n51340_
 .subckt nand2_x0 i0=$abc$109383$new_n51340_ i1=$abc$109383$new_n45321_ nq=$abc$109383$new_n51341_
-.subckt ao22_x2 i0=soc.ram.ram[57][29] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n44142_ q=$abc$109383$new_n51342_
+.subckt and21nor_x1 i0=soc.ram.ram[57][29] i1=$abc$109383$new_n43490_ i2=$abc$109383$new_n44142_ nq=$abc$109383$new_n51342_
 .subckt nand2_x0 i0=$abc$109383$new_n51342_ i1=$abc$109383$new_n51341_ nq=$abc$109383$new_n51343_
-.subckt mx2_x2 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[56][29] i1=soc.ram.ram[60][29] q=$abc$109383$new_n51344_
+.subckt mux2_x1 cmd=$abc$109383$new_n43704_ i0=soc.ram.ram[56][29] i1=soc.ram.ram[60][29] q=$abc$109383$new_n51344_
 .subckt nand2_x0 i0=$abc$109383$new_n51344_ i1=$abc$109383$new_n43941_ nq=$abc$109383$new_n51345_
-.subckt oa22_x2 i0=$abc$109383$new_n51345_ i1=$abc$109383$new_n51343_ i2=$abc$109383$new_n43458_ q=$abc$109383$new_n51346_
+.subckt or21nand_x1 i0=$abc$109383$new_n51345_ i1=$abc$109383$new_n51343_ i2=$abc$109383$new_n43458_ nq=$abc$109383$new_n51346_
 .subckt inv_x0 i=soc.ram.ram[63][29] nq=$abc$109383$new_n51347_
 .subckt nand2_x0 i0=$abc$109383$new_n51347_ i1=$abc$109383$new_n43608_ nq=$abc$109383$new_n51348_
-.subckt ao22_x2 i0=soc.ram.ram[59][29] i1=$abc$109383$new_n43419_ i2=$abc$109383$new_n43415_ q=$abc$109383$new_n51349_
+.subckt and21nor_x1 i0=soc.ram.ram[59][29] i1=$abc$109383$new_n43419_ i2=$abc$109383$new_n43415_ nq=$abc$109383$new_n51349_
 .subckt nand2_x0 i0=$abc$109383$new_n51349_ i1=$abc$109383$new_n51348_ nq=$abc$109383$new_n51350_
-.subckt mx2_x2 cmd=$abc$109383$new_n43886_ i0=soc.ram.ram[58][29] i1=soc.ram.ram[62][29] q=$abc$109383$new_n51351_
+.subckt mux2_x1 cmd=$abc$109383$new_n43886_ i0=soc.ram.ram[58][29] i1=soc.ram.ram[62][29] q=$abc$109383$new_n51351_
 .subckt nand2_x0 i0=$abc$109383$new_n51351_ i1=$abc$109383$new_n43759_ nq=$abc$109383$new_n51352_
-.subckt oa22_x2 i0=$abc$109383$new_n51352_ i1=$abc$109383$new_n51350_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n51353_
+.subckt or21nand_x1 i0=$abc$109383$new_n51352_ i1=$abc$109383$new_n51350_ i2=$abc$109383$new_n44061_ nq=$abc$109383$new_n51353_
 .subckt nand3_x0 i0=$abc$109383$new_n51353_ i1=$abc$109383$new_n51346_ i2=$abc$109383$new_n44410_ nq=$abc$109383$new_n51354_
-.subckt a2_x2 i0=$abc$109383$new_n51354_ i1=$abc$109383$new_n51339_ q=$abc$109383$new_n51355_
-.subckt mx2_x2 cmd=$abc$109383$new_n43326_ i0=$abc$109383$new_n51355_ i1=$abc$109383$new_n51322_ q=$abc$109383$new_n51356_
-.subckt ao22_x2 i0=$abc$109383$new_n44444_ i1=$abc$109383$new_n51356_ i2=$abc$109383$new_n51297_ q=$abc$109383$new_n51357_
-.subckt o2_x2 i0=$abc$109383$new_n51357_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n51358_
-.subckt oa22_x2 i0=$abc$109383$new_n51358_ i1=$abc$109383$new_n51250_ i2=$abc$109383$new_n51149_ q=$abc$109383$new_n51359_
-.subckt ao22_x2 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51359_ i2=$abc$109383$new_n51136_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103314
-.subckt oa22_x2 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n43281_ i2=soc.cpu.minerva.loadstore.m_load_data[30] q=$abc$109383$new_n51361_
-.subckt a2_x2 i0=$abc$109383$new_n51361_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n51362_
+.subckt and2_x1 i0=$abc$109383$new_n51354_ i1=$abc$109383$new_n51339_ q=$abc$109383$new_n51355_
+.subckt mux2_x1 cmd=$abc$109383$new_n43326_ i0=$abc$109383$new_n51355_ i1=$abc$109383$new_n51322_ q=$abc$109383$new_n51356_
+.subckt and21nor_x1 i0=$abc$109383$new_n44444_ i1=$abc$109383$new_n51356_ i2=$abc$109383$new_n51297_ nq=$abc$109383$new_n51357_
+.subckt or2_x1 i0=$abc$109383$new_n51357_ i1=$abc$109383$new_n43587_ q=$abc$109383$new_n51358_
+.subckt or21nand_x1 i0=$abc$109383$new_n51358_ i1=$abc$109383$new_n51250_ i2=$abc$109383$new_n51149_ nq=$abc$109383$new_n51359_
+.subckt and21nor_x1 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51359_ i2=$abc$109383$new_n51136_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103314
+.subckt or21nand_x1 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n43281_ i2=soc.cpu.minerva.loadstore.m_load_data[30] nq=$abc$109383$new_n51361_
+.subckt and2_x1 i0=$abc$109383$new_n51361_ i1=$abc$109383$new_n48230_ q=$abc$109383$new_n51362_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n46236_ i2=$abc$109383$new_n46235_ i3=soc.decoder.data_bus__dat_r[30] nq=$abc$109383$new_n51363_
 .subckt inv_x0 i=soc.hyperram.sr[30] nq=$abc$109383$new_n51364_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n43305_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n51364_ q=$abc$109383$new_n51365_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n43305_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n51364_ q=$abc$109383$new_n51365_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n51366_
 .subckt nor2_x0 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n51366_ nq=$abc$109383$new_n51367_
 .subckt nand4_x0 i0=$abc$109383$new_n51367_ i1=$abc$109383$new_n21963_ i2=$abc$109383$new_n21961_ i3=$abc$109383$new_n21959_ nq=$abc$109383$new_n51368_
-.subckt a3_x2 i0=$abc$109383$new_n51368_ i1=$abc$109383$new_n51365_ i2=$abc$109383$new_n51363_ q=$abc$109383$new_n51369_
+.subckt and3_x1 i0=$abc$109383$new_n51368_ i1=$abc$109383$new_n51365_ i2=$abc$109383$new_n51363_ q=$abc$109383$new_n51369_
 .subckt inv_x0 i=soc.rom.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n51370_
-.subckt ao22_x2 i0=$abc$109383$new_n51370_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n51369_ q=$abc$109383$new_n51371_
+.subckt and21nor_x1 i0=$abc$109383$new_n51370_ i1=$abc$109383$new_n45198_ i2=$abc$109383$new_n51369_ nq=$abc$109383$new_n51371_
 .subckt nand2_x0 i0=$abc$109383$new_n45171_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n51372_
 .subckt nand2_x0 i0=$abc$109383$new_n27645_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n51373_
-.subckt ao22_x2 i0=$abc$109383$new_n27565_ i1=$abc$109383$new_n51373_ i2=$abc$109383$new_n51372_ q=$abc$109383$new_n51374_
+.subckt and21nor_x1 i0=$abc$109383$new_n27565_ i1=$abc$109383$new_n51373_ i2=$abc$109383$new_n51372_ nq=$abc$109383$new_n51374_
 .subckt nand2_x0 i0=$abc$109383$new_n51374_ i1=$abc$109383$new_n51371_ nq=$abc$109383$new_n51375_
 .subckt inv_x0 i=soc.ram.ram[23][30] nq=$abc$109383$new_n51376_
 .subckt nand2_x0 i0=$abc$109383$new_n51376_ i1=$abc$109383$new_n43852_ nq=$abc$109383$new_n51377_
-.subckt ao22_x2 i0=soc.ram.ram[19][30] i1=$abc$109383$new_n44924_ i2=$abc$109383$new_n43998_ q=$abc$109383$new_n51378_
+.subckt and21nor_x1 i0=soc.ram.ram[19][30] i1=$abc$109383$new_n44924_ i2=$abc$109383$new_n43998_ nq=$abc$109383$new_n51378_
 .subckt nand2_x0 i0=$abc$109383$new_n51378_ i1=$abc$109383$new_n51377_ nq=$abc$109383$new_n51379_
-.subckt mx2_x2 cmd=$abc$109383$new_n43860_ i0=soc.ram.ram[18][30] i1=soc.ram.ram[22][30] q=$abc$109383$new_n51380_
+.subckt mux2_x1 cmd=$abc$109383$new_n43860_ i0=soc.ram.ram[18][30] i1=soc.ram.ram[22][30] q=$abc$109383$new_n51380_
 .subckt nand2_x0 i0=$abc$109383$new_n51380_ i1=$abc$109383$new_n44009_ nq=$abc$109383$new_n51381_
 .subckt nand3_x0 i0=$abc$109383$new_n51381_ i1=$abc$109383$new_n51379_ i2=$abc$109383$new_n44611_ nq=$abc$109383$new_n51382_
-.subckt ao22_x2 i0=soc.ram.ram[27][30] i1=$abc$109383$new_n44751_ i2=$abc$109383$new_n45043_ q=$abc$109383$new_n51383_
-.subckt ao22_x2 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[31][30] i2=$abc$109383$new_n51383_ q=$abc$109383$new_n51384_
-.subckt mx2_x2 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[26][30] i1=soc.ram.ram[30][30] q=$abc$109383$new_n51385_
-.subckt oa22_x2 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n51385_ i2=$abc$109383$new_n43392_ q=$abc$109383$new_n51386_
-.subckt ao22_x2 i0=$abc$109383$new_n51386_ i1=$abc$109383$new_n51384_ i2=$abc$109383$new_n44622_ q=$abc$109383$new_n51387_
+.subckt and21nor_x1 i0=soc.ram.ram[27][30] i1=$abc$109383$new_n44751_ i2=$abc$109383$new_n45043_ nq=$abc$109383$new_n51383_
+.subckt and21nor_x1 i0=$abc$109383$new_n43879_ i1=soc.ram.ram[31][30] i2=$abc$109383$new_n51383_ nq=$abc$109383$new_n51384_
+.subckt mux2_x1 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[26][30] i1=soc.ram.ram[30][30] q=$abc$109383$new_n51385_
+.subckt or21nand_x1 i0=$abc$109383$new_n44204_ i1=$abc$109383$new_n51385_ i2=$abc$109383$new_n43392_ nq=$abc$109383$new_n51386_
+.subckt and21nor_x1 i0=$abc$109383$new_n51386_ i1=$abc$109383$new_n51384_ i2=$abc$109383$new_n44622_ nq=$abc$109383$new_n51387_
 .subckt nand2_x0 i0=$abc$109383$new_n51387_ i1=$abc$109383$new_n51382_ nq=$abc$109383$new_n51388_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[28][30] i1=soc.ram.ram[29][30] q=$abc$109383$new_n51389_
-.subckt mx2_x2 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[24][30] i1=soc.ram.ram[25][30] q=$abc$109383$new_n51390_
-.subckt mx2_x2 cmd=$abc$109383$new_n43977_ i0=$abc$109383$new_n51390_ i1=$abc$109383$new_n51389_ q=$abc$109383$new_n51391_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[28][30] i1=soc.ram.ram[29][30] q=$abc$109383$new_n51389_
+.subckt mux2_x1 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[24][30] i1=soc.ram.ram[25][30] q=$abc$109383$new_n51390_
+.subckt mux2_x1 cmd=$abc$109383$new_n43977_ i0=$abc$109383$new_n51390_ i1=$abc$109383$new_n51389_ q=$abc$109383$new_n51391_
 .subckt nor2_x0 i0=$abc$109383$new_n51391_ i1=$abc$109383$new_n43838_ nq=$abc$109383$new_n51392_
-.subckt mx2_x2 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[20][30] i1=soc.ram.ram[21][30] q=$abc$109383$new_n51393_
-.subckt mx2_x2 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[16][30] i1=soc.ram.ram[17][30] q=$abc$109383$new_n51394_
-.subckt mx2_x2 cmd=$abc$109383$new_n44838_ i0=$abc$109383$new_n51394_ i1=$abc$109383$new_n51393_ q=$abc$109383$new_n51395_
+.subckt mux2_x1 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[20][30] i1=soc.ram.ram[21][30] q=$abc$109383$new_n51393_
+.subckt mux2_x1 cmd=$abc$109383$new_n43629_ i0=soc.ram.ram[16][30] i1=soc.ram.ram[17][30] q=$abc$109383$new_n51394_
+.subckt mux2_x1 cmd=$abc$109383$new_n44838_ i0=$abc$109383$new_n51394_ i1=$abc$109383$new_n51393_ q=$abc$109383$new_n51395_
 .subckt nor2_x0 i0=$abc$109383$new_n51395_ i1=$abc$109383$new_n43649_ nq=$abc$109383$new_n51396_
-.subckt o3_x2 i0=$abc$109383$new_n51396_ i1=$abc$109383$new_n51392_ i2=$abc$109383$new_n45280_ q=$abc$109383$new_n51397_
-.subckt oa22_x2 i0=$abc$109383$new_n51397_ i1=$abc$109383$new_n51388_ i2=$abc$109383$new_n44740_ q=$abc$109383$new_n51398_
-.subckt mx2_x2 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[10][30] i1=soc.ram.ram[14][30] q=$abc$109383$new_n51399_
-.subckt mx2_x2 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[11][30] i1=soc.ram.ram[15][30] q=$abc$109383$new_n51400_
-.subckt mx2_x2 cmd=$abc$109383$new_n43595_ i0=$abc$109383$new_n51400_ i1=$abc$109383$new_n51399_ q=$abc$109383$new_n51401_
-.subckt o2_x2 i0=$abc$109383$new_n51401_ i1=$abc$109383$new_n45070_ q=$abc$109383$new_n51402_
-.subckt mx2_x2 cmd=$abc$109383$new_n44405_ i0=soc.ram.ram[2][30] i1=soc.ram.ram[6][30] q=$abc$109383$new_n51403_
+.subckt or3_x1 i0=$abc$109383$new_n51396_ i1=$abc$109383$new_n51392_ i2=$abc$109383$new_n45280_ q=$abc$109383$new_n51397_
+.subckt or21nand_x1 i0=$abc$109383$new_n51397_ i1=$abc$109383$new_n51388_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n51398_
+.subckt mux2_x1 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[10][30] i1=soc.ram.ram[14][30] q=$abc$109383$new_n51399_
+.subckt mux2_x1 cmd=$abc$109383$new_n44145_ i0=soc.ram.ram[11][30] i1=soc.ram.ram[15][30] q=$abc$109383$new_n51400_
+.subckt mux2_x1 cmd=$abc$109383$new_n43595_ i0=$abc$109383$new_n51400_ i1=$abc$109383$new_n51399_ q=$abc$109383$new_n51401_
+.subckt or2_x1 i0=$abc$109383$new_n51401_ i1=$abc$109383$new_n45070_ q=$abc$109383$new_n51402_
+.subckt mux2_x1 cmd=$abc$109383$new_n44405_ i0=soc.ram.ram[2][30] i1=soc.ram.ram[6][30] q=$abc$109383$new_n51403_
 .subckt nand2_x0 i0=$abc$109383$new_n51403_ i1=$abc$109383$new_n43904_ nq=$abc$109383$new_n51404_
-.subckt mx2_x2 cmd=$abc$109383$new_n44234_ i0=soc.ram.ram[3][30] i1=soc.ram.ram[7][30] q=$abc$109383$new_n51405_
+.subckt mux2_x1 cmd=$abc$109383$new_n44234_ i0=soc.ram.ram[3][30] i1=soc.ram.ram[7][30] q=$abc$109383$new_n51405_
 .subckt nand2_x0 i0=$abc$109383$new_n51405_ i1=$abc$109383$new_n46175_ nq=$abc$109383$new_n51406_
 .subckt nand3_x0 i0=$abc$109383$new_n51406_ i1=$abc$109383$new_n51404_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n51407_
 .subckt nand3_x0 i0=$abc$109383$new_n51407_ i1=$abc$109383$new_n51402_ i2=$abc$109383$new_n46527_ nq=$abc$109383$new_n51408_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[0][30] i1=soc.ram.ram[4][30] q=$abc$109383$new_n51409_
-.subckt mx2_x2 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[1][30] i1=soc.ram.ram[5][30] q=$abc$109383$new_n51410_
-.subckt mx2_x2 cmd=$abc$109383$new_n43813_ i0=$abc$109383$new_n51410_ i1=$abc$109383$new_n51409_ q=$abc$109383$new_n51411_
-.subckt o2_x2 i0=$abc$109383$new_n51411_ i1=$abc$109383$new_n45244_ q=$abc$109383$new_n51412_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[0][30] i1=soc.ram.ram[4][30] q=$abc$109383$new_n51409_
+.subckt mux2_x1 cmd=$abc$109383$new_n43574_ i0=soc.ram.ram[1][30] i1=soc.ram.ram[5][30] q=$abc$109383$new_n51410_
+.subckt mux2_x1 cmd=$abc$109383$new_n43813_ i0=$abc$109383$new_n51410_ i1=$abc$109383$new_n51409_ q=$abc$109383$new_n51411_
+.subckt or2_x1 i0=$abc$109383$new_n51411_ i1=$abc$109383$new_n45244_ q=$abc$109383$new_n51412_
 .subckt inv_x0 i=soc.ram.ram[13][30] nq=$abc$109383$new_n51413_
 .subckt nand2_x0 i0=$abc$109383$new_n51413_ i1=$abc$109383$new_n44605_ nq=$abc$109383$new_n51414_
-.subckt ao22_x2 i0=soc.ram.ram[9][30] i1=$abc$109383$new_n44088_ i2=$abc$109383$new_n46112_ q=$abc$109383$new_n51415_
+.subckt and21nor_x1 i0=soc.ram.ram[9][30] i1=$abc$109383$new_n44088_ i2=$abc$109383$new_n46112_ nq=$abc$109383$new_n51415_
 .subckt nand2_x0 i0=$abc$109383$new_n51415_ i1=$abc$109383$new_n51414_ nq=$abc$109383$new_n51416_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[8][30] i1=soc.ram.ram[12][30] q=$abc$109383$new_n51417_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[8][30] i1=soc.ram.ram[12][30] q=$abc$109383$new_n51417_
 .subckt nand2_x0 i0=$abc$109383$new_n51417_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n51418_
 .subckt nand3_x0 i0=$abc$109383$new_n51418_ i1=$abc$109383$new_n51416_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n51419_
 .subckt nand3_x0 i0=$abc$109383$new_n51419_ i1=$abc$109383$new_n51412_ i2=$abc$109383$new_n44742_ nq=$abc$109383$new_n51420_
-.subckt oa22_x2 i0=$abc$109383$new_n51420_ i1=$abc$109383$new_n51408_ i2=$abc$109383$new_n43783_ q=$abc$109383$new_n51421_
+.subckt or21nand_x1 i0=$abc$109383$new_n51420_ i1=$abc$109383$new_n51408_ i2=$abc$109383$new_n43783_ nq=$abc$109383$new_n51421_
 .subckt nand3_x0 i0=$abc$109383$new_n51421_ i1=$abc$109383$new_n51398_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n51422_
-.subckt mx2_x2 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[50][30] i1=soc.ram.ram[54][30] q=$abc$109383$new_n51423_
-.subckt mx2_x2 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[51][30] i1=soc.ram.ram[55][30] q=$abc$109383$new_n51424_
-.subckt mx2_x2 cmd=$abc$109383$new_n45316_ i0=$abc$109383$new_n51424_ i1=$abc$109383$new_n51423_ q=$abc$109383$new_n51425_
+.subckt mux2_x1 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[50][30] i1=soc.ram.ram[54][30] q=$abc$109383$new_n51423_
+.subckt mux2_x1 cmd=$abc$109383$new_n43811_ i0=soc.ram.ram[51][30] i1=soc.ram.ram[55][30] q=$abc$109383$new_n51424_
+.subckt mux2_x1 cmd=$abc$109383$new_n45316_ i0=$abc$109383$new_n51424_ i1=$abc$109383$new_n51423_ q=$abc$109383$new_n51425_
 .subckt nand2_x0 i0=$abc$109383$new_n51425_ i1=$abc$109383$new_n44959_ nq=$abc$109383$new_n51426_
-.subckt mx2_x2 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[48][30] i1=soc.ram.ram[52][30] q=$abc$109383$new_n51427_
-.subckt mx2_x2 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[49][30] i1=soc.ram.ram[53][30] q=$abc$109383$new_n51428_
-.subckt mx2_x2 cmd=$abc$109383$new_n43814_ i0=$abc$109383$new_n51428_ i1=$abc$109383$new_n51427_ q=$abc$109383$new_n51429_
+.subckt mux2_x1 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[48][30] i1=soc.ram.ram[52][30] q=$abc$109383$new_n51427_
+.subckt mux2_x1 cmd=$abc$109383$new_n45755_ i0=soc.ram.ram[49][30] i1=soc.ram.ram[53][30] q=$abc$109383$new_n51428_
+.subckt mux2_x1 cmd=$abc$109383$new_n43814_ i0=$abc$109383$new_n51428_ i1=$abc$109383$new_n51427_ q=$abc$109383$new_n51429_
 .subckt nand2_x0 i0=$abc$109383$new_n51429_ i1=$abc$109383$new_n43991_ nq=$abc$109383$new_n51430_
 .subckt nand3_x0 i0=$abc$109383$new_n51430_ i1=$abc$109383$new_n51426_ i2=$abc$109383$new_n44951_ nq=$abc$109383$new_n51431_
 .subckt inv_x0 i=soc.ram.ram[63][30] nq=$abc$109383$new_n51432_
 .subckt nand2_x0 i0=$abc$109383$new_n51432_ i1=$abc$109383$new_n44592_ nq=$abc$109383$new_n51433_
-.subckt ao22_x2 i0=soc.ram.ram[59][30] i1=$abc$109383$new_n44011_ i2=$abc$109383$new_n44626_ q=$abc$109383$new_n51434_
+.subckt and21nor_x1 i0=soc.ram.ram[59][30] i1=$abc$109383$new_n44011_ i2=$abc$109383$new_n44626_ nq=$abc$109383$new_n51434_
 .subckt nand2_x0 i0=$abc$109383$new_n51434_ i1=$abc$109383$new_n51433_ nq=$abc$109383$new_n51435_
-.subckt mx2_x2 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[58][30] i1=soc.ram.ram[62][30] q=$abc$109383$new_n51436_
+.subckt mux2_x1 cmd=$abc$109383$new_n44487_ i0=soc.ram.ram[58][30] i1=soc.ram.ram[62][30] q=$abc$109383$new_n51436_
 .subckt nand2_x0 i0=$abc$109383$new_n51436_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n51437_
-.subckt oa22_x2 i0=$abc$109383$new_n51437_ i1=$abc$109383$new_n51435_ i2=$abc$109383$new_n45434_ q=$abc$109383$new_n51438_
+.subckt or21nand_x1 i0=$abc$109383$new_n51437_ i1=$abc$109383$new_n51435_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n51438_
 .subckt inv_x0 i=soc.ram.ram[61][30] nq=$abc$109383$new_n51439_
 .subckt nand2_x0 i0=$abc$109383$new_n51439_ i1=$abc$109383$new_n44451_ nq=$abc$109383$new_n51440_
-.subckt ao22_x2 i0=soc.ram.ram[57][30] i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n46112_ q=$abc$109383$new_n51441_
+.subckt and21nor_x1 i0=soc.ram.ram[57][30] i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n46112_ nq=$abc$109383$new_n51441_
 .subckt nand2_x0 i0=$abc$109383$new_n51441_ i1=$abc$109383$new_n51440_ nq=$abc$109383$new_n51442_
-.subckt mx2_x2 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[56][30] i1=soc.ram.ram[60][30] q=$abc$109383$new_n51443_
+.subckt mux2_x1 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[56][30] i1=soc.ram.ram[60][30] q=$abc$109383$new_n51443_
 .subckt nand2_x0 i0=$abc$109383$new_n51443_ i1=$abc$109383$new_n45402_ nq=$abc$109383$new_n51444_
-.subckt oa22_x2 i0=$abc$109383$new_n51444_ i1=$abc$109383$new_n51442_ i2=$abc$109383$new_n44622_ q=$abc$109383$new_n51445_
+.subckt or21nand_x1 i0=$abc$109383$new_n51444_ i1=$abc$109383$new_n51442_ i2=$abc$109383$new_n44622_ nq=$abc$109383$new_n51445_
 .subckt nand3_x0 i0=$abc$109383$new_n51445_ i1=$abc$109383$new_n51438_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n51446_
 .subckt nand3_x0 i0=$abc$109383$new_n51446_ i1=$abc$109383$new_n51431_ i2=$abc$109383$new_n46418_ nq=$abc$109383$new_n51447_
 .subckt inv_x0 i=soc.ram.ram[45][30] nq=$abc$109383$new_n51448_
 .subckt nand2_x0 i0=$abc$109383$new_n51448_ i1=$abc$109383$new_n44592_ nq=$abc$109383$new_n51449_
-.subckt ao22_x2 i0=soc.ram.ram[41][30] i1=$abc$109383$new_n44011_ i2=$abc$109383$new_n44626_ q=$abc$109383$new_n51450_
+.subckt and21nor_x1 i0=soc.ram.ram[41][30] i1=$abc$109383$new_n44011_ i2=$abc$109383$new_n44626_ nq=$abc$109383$new_n51450_
 .subckt nand2_x0 i0=$abc$109383$new_n51450_ i1=$abc$109383$new_n51449_ nq=$abc$109383$new_n51451_
-.subckt mx2_x2 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[40][30] i1=soc.ram.ram[44][30] q=$abc$109383$new_n51452_
+.subckt mux2_x1 cmd=$abc$109383$new_n44146_ i0=soc.ram.ram[40][30] i1=soc.ram.ram[44][30] q=$abc$109383$new_n51452_
 .subckt nand2_x0 i0=$abc$109383$new_n51452_ i1=$abc$109383$new_n44486_ nq=$abc$109383$new_n51453_
-.subckt oa22_x2 i0=$abc$109383$new_n51453_ i1=$abc$109383$new_n51451_ i2=$abc$109383$new_n46119_ q=$abc$109383$new_n51454_
+.subckt or21nand_x1 i0=$abc$109383$new_n51453_ i1=$abc$109383$new_n51451_ i2=$abc$109383$new_n46119_ nq=$abc$109383$new_n51454_
 .subckt inv_x0 i=soc.ram.ram[47][30] nq=$abc$109383$new_n51455_
 .subckt nand2_x0 i0=$abc$109383$new_n51455_ i1=$abc$109383$new_n44451_ nq=$abc$109383$new_n51456_
-.subckt ao22_x2 i0=soc.ram.ram[43][30] i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n46112_ q=$abc$109383$new_n51457_
+.subckt and21nor_x1 i0=soc.ram.ram[43][30] i1=$abc$109383$new_n46113_ i2=$abc$109383$new_n46112_ nq=$abc$109383$new_n51457_
 .subckt nand2_x0 i0=$abc$109383$new_n51457_ i1=$abc$109383$new_n51456_ nq=$abc$109383$new_n51458_
-.subckt mx2_x2 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[42][30] i1=soc.ram.ram[46][30] q=$abc$109383$new_n51459_
+.subckt mux2_x1 cmd=$abc$109383$new_n43819_ i0=soc.ram.ram[42][30] i1=soc.ram.ram[46][30] q=$abc$109383$new_n51459_
 .subckt nand2_x0 i0=$abc$109383$new_n51459_ i1=$abc$109383$new_n44631_ nq=$abc$109383$new_n51460_
-.subckt oa22_x2 i0=$abc$109383$new_n51460_ i1=$abc$109383$new_n51458_ i2=$abc$109383$new_n45401_ q=$abc$109383$new_n51461_
+.subckt or21nand_x1 i0=$abc$109383$new_n51460_ i1=$abc$109383$new_n51458_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n51461_
 .subckt nand3_x0 i0=$abc$109383$new_n51461_ i1=$abc$109383$new_n51454_ i2=$abc$109383$new_n43769_ nq=$abc$109383$new_n51462_
-.subckt o2_x2 i0=soc.ram.ram[35][30] i1=$abc$109383$new_n43978_ q=$abc$109383$new_n51463_
-.subckt ao22_x2 i0=soc.ram.ram[39][30] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n46112_ q=$abc$109383$new_n51464_
+.subckt or2_x1 i0=soc.ram.ram[35][30] i1=$abc$109383$new_n43978_ q=$abc$109383$new_n51463_
+.subckt and21nor_x1 i0=soc.ram.ram[39][30] i1=$abc$109383$new_n43879_ i2=$abc$109383$new_n46112_ nq=$abc$109383$new_n51464_
 .subckt nand2_x0 i0=$abc$109383$new_n51464_ i1=$abc$109383$new_n51463_ nq=$abc$109383$new_n51465_
 .subckt inv_x0 i=soc.ram.ram[38][30] nq=$abc$109383$new_n51466_
 .subckt nand2_x0 i0=$abc$109383$new_n51466_ i1=$abc$109383$new_n46386_ nq=$abc$109383$new_n51467_
-.subckt o2_x2 i0=soc.ram.ram[34][30] i1=$abc$109383$new_n43819_ q=$abc$109383$new_n51468_
-.subckt a2_x2 i0=$abc$109383$new_n51468_ i1=$abc$109383$new_n44078_ q=$abc$109383$new_n51469_
+.subckt or2_x1 i0=soc.ram.ram[34][30] i1=$abc$109383$new_n43819_ q=$abc$109383$new_n51468_
+.subckt and2_x1 i0=$abc$109383$new_n51468_ i1=$abc$109383$new_n44078_ q=$abc$109383$new_n51469_
 .subckt nand2_x0 i0=$abc$109383$new_n51469_ i1=$abc$109383$new_n51467_ nq=$abc$109383$new_n51470_
-.subckt oa22_x2 i0=$abc$109383$new_n51470_ i1=$abc$109383$new_n51465_ i2=$abc$109383$new_n45401_ q=$abc$109383$new_n51471_
+.subckt or21nand_x1 i0=$abc$109383$new_n51470_ i1=$abc$109383$new_n51465_ i2=$abc$109383$new_n45401_ nq=$abc$109383$new_n51471_
 .subckt inv_x0 i=soc.ram.ram[37][30] nq=$abc$109383$new_n51472_
 .subckt nand2_x0 i0=$abc$109383$new_n51472_ i1=$abc$109383$new_n46428_ nq=$abc$109383$new_n51473_
-.subckt ao22_x2 i0=soc.ram.ram[33][30] i1=$abc$109383$new_n45207_ i2=$abc$109383$new_n43848_ q=$abc$109383$new_n51474_
+.subckt and21nor_x1 i0=soc.ram.ram[33][30] i1=$abc$109383$new_n45207_ i2=$abc$109383$new_n43848_ nq=$abc$109383$new_n51474_
 .subckt nand2_x0 i0=$abc$109383$new_n51474_ i1=$abc$109383$new_n51473_ nq=$abc$109383$new_n51475_
-.subckt mx2_x2 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[32][30] i1=soc.ram.ram[36][30] q=$abc$109383$new_n51476_
+.subckt mux2_x1 cmd=$abc$109383$new_n43953_ i0=soc.ram.ram[32][30] i1=soc.ram.ram[36][30] q=$abc$109383$new_n51476_
 .subckt nand2_x0 i0=$abc$109383$new_n51476_ i1=$abc$109383$new_n45659_ nq=$abc$109383$new_n51477_
-.subckt oa22_x2 i0=$abc$109383$new_n51477_ i1=$abc$109383$new_n51475_ i2=$abc$109383$new_n45137_ q=$abc$109383$new_n51478_
+.subckt or21nand_x1 i0=$abc$109383$new_n51477_ i1=$abc$109383$new_n51475_ i2=$abc$109383$new_n45137_ nq=$abc$109383$new_n51478_
 .subckt nand3_x0 i0=$abc$109383$new_n51478_ i1=$abc$109383$new_n51471_ i2=$abc$109383$new_n44087_ nq=$abc$109383$new_n51479_
 .subckt nand3_x0 i0=$abc$109383$new_n51479_ i1=$abc$109383$new_n51462_ i2=$abc$109383$new_n43327_ nq=$abc$109383$new_n51480_
 .subckt nand3_x0 i0=$abc$109383$new_n51480_ i1=$abc$109383$new_n51447_ i2=$abc$109383$new_n43592_ nq=$abc$109383$new_n51481_
-.subckt oa22_x2 i0=$abc$109383$new_n51481_ i1=$abc$109383$new_n51422_ i2=$abc$109383$new_n44446_ q=$abc$109383$new_n51482_
-.subckt a2_x2 i0=$abc$109383$new_n51482_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n51483_
-.subckt mx2_x2 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[80][30] i1=soc.ram.ram[84][30] q=$abc$109383$new_n51484_
-.subckt mx2_x2 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[81][30] i1=soc.ram.ram[85][30] q=$abc$109383$new_n51485_
-.subckt mx2_x2 cmd=$abc$109383$new_n44630_ i0=$abc$109383$new_n51485_ i1=$abc$109383$new_n51484_ q=$abc$109383$new_n51486_
+.subckt or21nand_x1 i0=$abc$109383$new_n51481_ i1=$abc$109383$new_n51422_ i2=$abc$109383$new_n44446_ nq=$abc$109383$new_n51482_
+.subckt and2_x1 i0=$abc$109383$new_n51482_ i1=$abc$109383$new_n43778_ q=$abc$109383$new_n51483_
+.subckt mux2_x1 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[80][30] i1=soc.ram.ram[84][30] q=$abc$109383$new_n51484_
+.subckt mux2_x1 cmd=$abc$109383$new_n43347_ i0=soc.ram.ram[81][30] i1=soc.ram.ram[85][30] q=$abc$109383$new_n51485_
+.subckt mux2_x1 cmd=$abc$109383$new_n44630_ i0=$abc$109383$new_n51485_ i1=$abc$109383$new_n51484_ q=$abc$109383$new_n51486_
 .subckt nand2_x0 i0=$abc$109383$new_n51486_ i1=$abc$109383$new_n45401_ nq=$abc$109383$new_n51487_
-.subckt mx2_x2 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[82][30] i1=soc.ram.ram[86][30] q=$abc$109383$new_n51488_
-.subckt o2_x2 i0=$abc$109383$new_n51488_ i1=$abc$109383$new_n44001_ q=$abc$109383$new_n51489_
-.subckt mx2_x2 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[83][30] i1=soc.ram.ram[87][30] q=$abc$109383$new_n51490_
-.subckt ao22_x2 i0=$abc$109383$new_n45053_ i1=$abc$109383$new_n51490_ i2=$abc$109383$new_n43650_ q=$abc$109383$new_n51491_
+.subckt mux2_x1 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[82][30] i1=soc.ram.ram[86][30] q=$abc$109383$new_n51488_
+.subckt or2_x1 i0=$abc$109383$new_n51488_ i1=$abc$109383$new_n44001_ q=$abc$109383$new_n51489_
+.subckt mux2_x1 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[83][30] i1=soc.ram.ram[87][30] q=$abc$109383$new_n51490_
+.subckt and21nor_x1 i0=$abc$109383$new_n45053_ i1=$abc$109383$new_n51490_ i2=$abc$109383$new_n43650_ nq=$abc$109383$new_n51491_
 .subckt nand2_x0 i0=$abc$109383$new_n51491_ i1=$abc$109383$new_n51489_ nq=$abc$109383$new_n51492_
-.subckt oa22_x2 i0=$abc$109383$new_n51492_ i1=$abc$109383$new_n51487_ i2=$abc$109383$new_n44767_ q=$abc$109383$new_n51493_
-.subckt mx2_x2 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[88][30] i1=soc.ram.ram[92][30] q=$abc$109383$new_n51494_
+.subckt or21nand_x1 i0=$abc$109383$new_n51492_ i1=$abc$109383$new_n51487_ i2=$abc$109383$new_n44767_ nq=$abc$109383$new_n51493_
+.subckt mux2_x1 cmd=$abc$109383$new_n44191_ i0=soc.ram.ram[88][30] i1=soc.ram.ram[92][30] q=$abc$109383$new_n51494_
 .subckt nand2_x0 i0=$abc$109383$new_n51494_ i1=$abc$109383$new_n43980_ nq=$abc$109383$new_n51495_
-.subckt o2_x2 i0=soc.ram.ram[89][30] i1=$abc$109383$new_n44633_ q=$abc$109383$new_n51496_
+.subckt or2_x1 i0=soc.ram.ram[89][30] i1=$abc$109383$new_n44633_ q=$abc$109383$new_n51496_
 .subckt nand2_x0 i0=$abc$109383$new_n51496_ i1=$abc$109383$new_n44001_ nq=$abc$109383$new_n51497_
 .subckt inv_x0 i=soc.ram.ram[93][30] nq=$abc$109383$new_n51498_
-.subckt a2_x2 i0=$abc$109383$new_n51498_ i1=$abc$109383$new_n44604_ q=$abc$109383$new_n51499_
-.subckt ao22_x2 i0=$abc$109383$new_n51499_ i1=$abc$109383$new_n51497_ i2=$abc$109383$new_n51495_ q=$abc$109383$new_n51500_
+.subckt and2_x1 i0=$abc$109383$new_n51498_ i1=$abc$109383$new_n44604_ q=$abc$109383$new_n51499_
+.subckt and21nor_x1 i0=$abc$109383$new_n51499_ i1=$abc$109383$new_n51497_ i2=$abc$109383$new_n51495_ nq=$abc$109383$new_n51500_
 .subckt nand2_x0 i0=$abc$109383$new_n51500_ i1=$abc$109383$new_n44494_ nq=$abc$109383$new_n51501_
-.subckt mx2_x2 cmd=$abc$109383$new_n43743_ i0=soc.ram.ram[90][30] i1=soc.ram.ram[94][30] q=$abc$109383$new_n51502_
+.subckt mux2_x1 cmd=$abc$109383$new_n43743_ i0=soc.ram.ram[90][30] i1=soc.ram.ram[94][30] q=$abc$109383$new_n51502_
 .subckt nand2_x0 i0=$abc$109383$new_n51502_ i1=$abc$109383$new_n44008_ nq=$abc$109383$new_n51503_
 .subckt inv_x0 i=soc.ram.ram[95][30] nq=$abc$109383$new_n51504_
-.subckt a2_x2 i0=$abc$109383$new_n51504_ i1=$abc$109383$new_n44234_ q=$abc$109383$new_n51505_
-.subckt o2_x2 i0=soc.ram.ram[91][30] i1=$abc$109383$new_n45059_ q=$abc$109383$new_n51506_
+.subckt and2_x1 i0=$abc$109383$new_n51504_ i1=$abc$109383$new_n44234_ q=$abc$109383$new_n51505_
+.subckt or2_x1 i0=soc.ram.ram[91][30] i1=$abc$109383$new_n45059_ q=$abc$109383$new_n51506_
 .subckt nand2_x0 i0=$abc$109383$new_n51506_ i1=$abc$109383$new_n46696_ nq=$abc$109383$new_n51507_
-.subckt ao22_x2 i0=$abc$109383$new_n51507_ i1=$abc$109383$new_n51505_ i2=$abc$109383$new_n51503_ q=$abc$109383$new_n51508_
+.subckt and21nor_x1 i0=$abc$109383$new_n51507_ i1=$abc$109383$new_n51505_ i2=$abc$109383$new_n51503_ nq=$abc$109383$new_n51508_
 .subckt nand2_x0 i0=$abc$109383$new_n51508_ i1=$abc$109383$new_n44641_ nq=$abc$109383$new_n51509_
 .subckt nand3_x0 i0=$abc$109383$new_n51509_ i1=$abc$109383$new_n51501_ i2=$abc$109383$new_n43898_ nq=$abc$109383$new_n51510_
-.subckt oa22_x2 i0=$abc$109383$new_n51510_ i1=$abc$109383$new_n51493_ i2=$abc$109383$new_n44584_ q=$abc$109383$new_n51511_
-.subckt mx2_x2 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[74][30] i1=soc.ram.ram[78][30] q=$abc$109383$new_n51512_
-.subckt a2_x2 i0=$abc$109383$new_n51512_ i1=$abc$109383$new_n44830_ q=$abc$109383$new_n51513_
-.subckt mx2_x2 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[75][30] i1=soc.ram.ram[79][30] q=$abc$109383$new_n51514_
-.subckt oa22_x2 i0=$abc$109383$new_n45232_ i1=$abc$109383$new_n51514_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n51515_
+.subckt or21nand_x1 i0=$abc$109383$new_n51510_ i1=$abc$109383$new_n51493_ i2=$abc$109383$new_n44584_ nq=$abc$109383$new_n51511_
+.subckt mux2_x1 cmd=$abc$109383$new_n44138_ i0=soc.ram.ram[74][30] i1=soc.ram.ram[78][30] q=$abc$109383$new_n51512_
+.subckt and2_x1 i0=$abc$109383$new_n51512_ i1=$abc$109383$new_n44830_ q=$abc$109383$new_n51513_
+.subckt mux2_x1 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[75][30] i1=soc.ram.ram[79][30] q=$abc$109383$new_n51514_
+.subckt or21nand_x1 i0=$abc$109383$new_n45232_ i1=$abc$109383$new_n51514_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n51515_
 .subckt nor2_x0 i0=$abc$109383$new_n51515_ i1=$abc$109383$new_n51513_ nq=$abc$109383$new_n51516_
 .subckt inv_x0 i=soc.ram.ram[66][30] nq=$abc$109383$new_n51517_
 .subckt inv_x0 i=soc.ram.ram[70][30] nq=$abc$109383$new_n51518_
-.subckt mx2_x2 cmd=$abc$109383$new_n45157_ i0=$abc$109383$new_n51518_ i1=$abc$109383$new_n51517_ q=$abc$109383$new_n51519_
-.subckt ao22_x2 i0=$abc$109383$new_n44807_ i1=$abc$109383$new_n51519_ i2=$abc$109383$new_n43838_ q=$abc$109383$new_n51520_
+.subckt mux2_x1 cmd=$abc$109383$new_n45157_ i0=$abc$109383$new_n51518_ i1=$abc$109383$new_n51517_ q=$abc$109383$new_n51519_
+.subckt and21nor_x1 i0=$abc$109383$new_n44807_ i1=$abc$109383$new_n51519_ i2=$abc$109383$new_n43838_ nq=$abc$109383$new_n51520_
 .subckt inv_x0 i=soc.ram.ram[71][30] nq=$abc$109383$new_n51521_
 .subckt nand2_x0 i0=$abc$109383$new_n51521_ i1=$abc$109383$new_n46323_ nq=$abc$109383$new_n51522_
-.subckt ao22_x2 i0=soc.ram.ram[67][30] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ q=$abc$109383$new_n51523_
+.subckt and21nor_x1 i0=soc.ram.ram[67][30] i1=$abc$109383$new_n43907_ i2=$abc$109383$new_n43798_ nq=$abc$109383$new_n51523_
 .subckt nand2_x0 i0=$abc$109383$new_n51523_ i1=$abc$109383$new_n51522_ nq=$abc$109383$new_n51524_
-.subckt oa22_x2 i0=$abc$109383$new_n51524_ i1=$abc$109383$new_n51520_ i2=$abc$109383$new_n51516_ q=$abc$109383$new_n51525_
+.subckt or21nand_x1 i0=$abc$109383$new_n51524_ i1=$abc$109383$new_n51520_ i2=$abc$109383$new_n51516_ nq=$abc$109383$new_n51525_
 .subckt nand2_x0 i0=$abc$109383$new_n51525_ i1=$abc$109383$new_n44623_ nq=$abc$109383$new_n51526_
-.subckt mx2_x2 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[72][30] i1=soc.ram.ram[76][30] q=$abc$109383$new_n51527_
-.subckt a2_x2 i0=$abc$109383$new_n51527_ i1=$abc$109383$new_n43980_ q=$abc$109383$new_n51528_
-.subckt mx2_x2 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[73][30] i1=soc.ram.ram[77][30] q=$abc$109383$new_n51529_
-.subckt oa22_x2 i0=$abc$109383$new_n44505_ i1=$abc$109383$new_n51529_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n51530_
+.subckt mux2_x1 cmd=$abc$109383$new_n43977_ i0=soc.ram.ram[72][30] i1=soc.ram.ram[76][30] q=$abc$109383$new_n51527_
+.subckt and2_x1 i0=$abc$109383$new_n51527_ i1=$abc$109383$new_n43980_ q=$abc$109383$new_n51528_
+.subckt mux2_x1 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[73][30] i1=soc.ram.ram[77][30] q=$abc$109383$new_n51529_
+.subckt or21nand_x1 i0=$abc$109383$new_n44505_ i1=$abc$109383$new_n51529_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n51530_
 .subckt nor2_x0 i0=$abc$109383$new_n51530_ i1=$abc$109383$new_n51528_ nq=$abc$109383$new_n51531_
 .subckt inv_x0 i=soc.ram.ram[64][30] nq=$abc$109383$new_n51532_
 .subckt inv_x0 i=soc.ram.ram[68][30] nq=$abc$109383$new_n51533_
-.subckt mx2_x2 cmd=$abc$109383$new_n43702_ i0=$abc$109383$new_n51533_ i1=$abc$109383$new_n51532_ q=$abc$109383$new_n51534_
-.subckt ao22_x2 i0=$abc$109383$new_n44065_ i1=$abc$109383$new_n51534_ i2=$abc$109383$new_n44610_ q=$abc$109383$new_n51535_
+.subckt mux2_x1 cmd=$abc$109383$new_n43702_ i0=$abc$109383$new_n51533_ i1=$abc$109383$new_n51532_ q=$abc$109383$new_n51534_
+.subckt and21nor_x1 i0=$abc$109383$new_n44065_ i1=$abc$109383$new_n51534_ i2=$abc$109383$new_n44610_ nq=$abc$109383$new_n51535_
 .subckt inv_x0 i=soc.ram.ram[69][30] nq=$abc$109383$new_n51536_
 .subckt nand2_x0 i0=$abc$109383$new_n51536_ i1=$abc$109383$new_n44818_ nq=$abc$109383$new_n51537_
-.subckt ao22_x2 i0=soc.ram.ram[65][30] i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43890_ q=$abc$109383$new_n51538_
+.subckt and21nor_x1 i0=soc.ram.ram[65][30] i1=$abc$109383$new_n43860_ i2=$abc$109383$new_n43890_ nq=$abc$109383$new_n51538_
 .subckt nand2_x0 i0=$abc$109383$new_n51538_ i1=$abc$109383$new_n51537_ nq=$abc$109383$new_n51539_
-.subckt oa22_x2 i0=$abc$109383$new_n51539_ i1=$abc$109383$new_n51535_ i2=$abc$109383$new_n51531_ q=$abc$109383$new_n51540_
+.subckt or21nand_x1 i0=$abc$109383$new_n51539_ i1=$abc$109383$new_n51535_ i2=$abc$109383$new_n51531_ nq=$abc$109383$new_n51540_
 .subckt nand2_x0 i0=$abc$109383$new_n51540_ i1=$abc$109383$new_n44657_ nq=$abc$109383$new_n51541_
 .subckt nand3_x0 i0=$abc$109383$new_n51541_ i1=$abc$109383$new_n51526_ i2=$abc$109383$new_n43922_ nq=$abc$109383$new_n51542_
 .subckt nand3_x0 i0=$abc$109383$new_n51542_ i1=$abc$109383$new_n51511_ i2=$abc$109383$new_n44007_ nq=$abc$109383$new_n51543_
-.subckt mx2_x2 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[122][30] i1=soc.ram.ram[126][30] q=$abc$109383$new_n51544_
-.subckt a2_x2 i0=$abc$109383$new_n51544_ i1=$abc$109383$new_n43814_ q=$abc$109383$new_n51545_
-.subckt mx2_x2 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[123][30] i1=soc.ram.ram[127][30] q=$abc$109383$new_n51546_
-.subckt oa22_x2 i0=$abc$109383$new_n43923_ i1=$abc$109383$new_n51546_ i2=$abc$109383$new_n44448_ q=$abc$109383$new_n51547_
+.subckt mux2_x1 cmd=$abc$109383$new_n45306_ i0=soc.ram.ram[122][30] i1=soc.ram.ram[126][30] q=$abc$109383$new_n51544_
+.subckt and2_x1 i0=$abc$109383$new_n51544_ i1=$abc$109383$new_n43814_ q=$abc$109383$new_n51545_
+.subckt mux2_x1 cmd=$abc$109383$new_n44010_ i0=soc.ram.ram[123][30] i1=soc.ram.ram[127][30] q=$abc$109383$new_n51546_
+.subckt or21nand_x1 i0=$abc$109383$new_n43923_ i1=$abc$109383$new_n51546_ i2=$abc$109383$new_n44448_ nq=$abc$109383$new_n51547_
 .subckt nor2_x0 i0=$abc$109383$new_n51547_ i1=$abc$109383$new_n51545_ nq=$abc$109383$new_n51548_
 .subckt inv_x0 i=soc.ram.ram[114][30] nq=$abc$109383$new_n51549_
 .subckt inv_x0 i=soc.ram.ram[118][30] nq=$abc$109383$new_n51550_
-.subckt mx2_x2 cmd=$abc$109383$new_n44421_ i0=$abc$109383$new_n51550_ i1=$abc$109383$new_n51549_ q=$abc$109383$new_n51551_
-.subckt ao22_x2 i0=$abc$109383$new_n43992_ i1=$abc$109383$new_n51551_ i2=$abc$109383$new_n44479_ q=$abc$109383$new_n51552_
+.subckt mux2_x1 cmd=$abc$109383$new_n44421_ i0=$abc$109383$new_n51550_ i1=$abc$109383$new_n51549_ q=$abc$109383$new_n51551_
+.subckt and21nor_x1 i0=$abc$109383$new_n43992_ i1=$abc$109383$new_n51551_ i2=$abc$109383$new_n44479_ nq=$abc$109383$new_n51552_
 .subckt inv_x0 i=soc.ram.ram[119][30] nq=$abc$109383$new_n51553_
 .subckt nand2_x0 i0=$abc$109383$new_n51553_ i1=$abc$109383$new_n44660_ nq=$abc$109383$new_n51554_
-.subckt ao22_x2 i0=soc.ram.ram[115][30] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ q=$abc$109383$new_n51555_
+.subckt and21nor_x1 i0=soc.ram.ram[115][30] i1=$abc$109383$new_n44809_ i2=$abc$109383$new_n44807_ nq=$abc$109383$new_n51555_
 .subckt nand2_x0 i0=$abc$109383$new_n51555_ i1=$abc$109383$new_n51554_ nq=$abc$109383$new_n51556_
-.subckt oa22_x2 i0=$abc$109383$new_n51556_ i1=$abc$109383$new_n51552_ i2=$abc$109383$new_n51548_ q=$abc$109383$new_n51557_
+.subckt or21nand_x1 i0=$abc$109383$new_n51556_ i1=$abc$109383$new_n51552_ i2=$abc$109383$new_n51548_ nq=$abc$109383$new_n51557_
 .subckt nand2_x0 i0=$abc$109383$new_n51557_ i1=$abc$109383$new_n44642_ nq=$abc$109383$new_n51558_
-.subckt mx2_x2 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[120][30] i1=soc.ram.ram[124][30] q=$abc$109383$new_n51559_
-.subckt a2_x2 i0=$abc$109383$new_n51559_ i1=$abc$109383$new_n44830_ q=$abc$109383$new_n51560_
-.subckt mx2_x2 cmd=$abc$109383$new_n43925_ i0=soc.ram.ram[121][30] i1=soc.ram.ram[125][30] q=$abc$109383$new_n51561_
-.subckt oa22_x2 i0=$abc$109383$new_n45232_ i1=$abc$109383$new_n51561_ i2=$abc$109383$new_n43555_ q=$abc$109383$new_n51562_
+.subckt mux2_x1 cmd=$abc$109383$new_n44016_ i0=soc.ram.ram[120][30] i1=soc.ram.ram[124][30] q=$abc$109383$new_n51559_
+.subckt and2_x1 i0=$abc$109383$new_n51559_ i1=$abc$109383$new_n44830_ q=$abc$109383$new_n51560_
+.subckt mux2_x1 cmd=$abc$109383$new_n43925_ i0=soc.ram.ram[121][30] i1=soc.ram.ram[125][30] q=$abc$109383$new_n51561_
+.subckt or21nand_x1 i0=$abc$109383$new_n45232_ i1=$abc$109383$new_n51561_ i2=$abc$109383$new_n43555_ nq=$abc$109383$new_n51562_
 .subckt nor2_x0 i0=$abc$109383$new_n51562_ i1=$abc$109383$new_n51560_ nq=$abc$109383$new_n51563_
 .subckt inv_x0 i=soc.ram.ram[112][30] nq=$abc$109383$new_n51564_
 .subckt inv_x0 i=soc.ram.ram[116][30] nq=$abc$109383$new_n51565_
-.subckt mx2_x2 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n51565_ i1=$abc$109383$new_n51564_ q=$abc$109383$new_n51566_
-.subckt ao22_x2 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n51566_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n51567_
+.subckt mux2_x1 cmd=$abc$109383$new_n43930_ i0=$abc$109383$new_n51565_ i1=$abc$109383$new_n51564_ q=$abc$109383$new_n51566_
+.subckt and21nor_x1 i0=$abc$109383$new_n43914_ i1=$abc$109383$new_n51566_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n51567_
 .subckt inv_x0 i=soc.ram.ram[117][30] nq=$abc$109383$new_n51568_
 .subckt nand2_x0 i0=$abc$109383$new_n51568_ i1=$abc$109383$new_n43966_ nq=$abc$109383$new_n51569_
-.subckt ao22_x2 i0=soc.ram.ram[113][30] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44001_ q=$abc$109383$new_n51570_
+.subckt and21nor_x1 i0=soc.ram.ram[113][30] i1=$abc$109383$new_n45219_ i2=$abc$109383$new_n44001_ nq=$abc$109383$new_n51570_
 .subckt nand2_x0 i0=$abc$109383$new_n51570_ i1=$abc$109383$new_n51569_ nq=$abc$109383$new_n51571_
-.subckt oa22_x2 i0=$abc$109383$new_n51571_ i1=$abc$109383$new_n51567_ i2=$abc$109383$new_n51563_ q=$abc$109383$new_n51572_
+.subckt or21nand_x1 i0=$abc$109383$new_n51571_ i1=$abc$109383$new_n51567_ i2=$abc$109383$new_n51563_ nq=$abc$109383$new_n51572_
 .subckt nand2_x0 i0=$abc$109383$new_n51572_ i1=$abc$109383$new_n43857_ nq=$abc$109383$new_n51573_
 .subckt nand3_x0 i0=$abc$109383$new_n51573_ i1=$abc$109383$new_n51558_ i2=$abc$109383$new_n43971_ nq=$abc$109383$new_n51574_
-.subckt mx2_x2 cmd=$abc$109383$new_n44142_ i0=soc.ram.ram[102][30] i1=soc.ram.ram[103][30] q=$abc$109383$new_n51575_
-.subckt a2_x2 i0=$abc$109383$new_n51575_ i1=$abc$109383$new_n45207_ q=$abc$109383$new_n51576_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[98][30] i1=soc.ram.ram[99][30] q=$abc$109383$new_n51577_
-.subckt oa22_x2 i0=$abc$109383$new_n45157_ i1=$abc$109383$new_n51577_ i2=$abc$109383$new_n43648_ q=$abc$109383$new_n51578_
-.subckt o2_x2 i0=$abc$109383$new_n51578_ i1=$abc$109383$new_n51576_ q=$abc$109383$new_n51579_
-.subckt mx2_x2 cmd=$abc$109383$new_n46814_ i0=soc.ram.ram[106][30] i1=soc.ram.ram[107][30] q=$abc$109383$new_n51580_
-.subckt a2_x2 i0=$abc$109383$new_n51580_ i1=$abc$109383$new_n43805_ q=$abc$109383$new_n51581_
-.subckt mx2_x2 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[110][30] i1=soc.ram.ram[111][30] q=$abc$109383$new_n51582_
-.subckt oa22_x2 i0=$abc$109383$new_n43748_ i1=$abc$109383$new_n51582_ i2=$abc$109383$new_n43432_ q=$abc$109383$new_n51583_
-.subckt o2_x2 i0=$abc$109383$new_n51583_ i1=$abc$109383$new_n51581_ q=$abc$109383$new_n51584_
-.subckt oa22_x2 i0=$abc$109383$new_n51584_ i1=$abc$109383$new_n51579_ i2=$abc$109383$new_n44656_ q=$abc$109383$new_n51585_
-.subckt mx2_x2 cmd=$abc$109383$new_n43415_ i0=soc.ram.ram[96][30] i1=soc.ram.ram[97][30] q=$abc$109383$new_n51586_
-.subckt a2_x2 i0=$abc$109383$new_n51586_ i1=$abc$109383$new_n46370_ q=$abc$109383$new_n51587_
-.subckt mx2_x2 cmd=$abc$109383$new_n43796_ i0=soc.ram.ram[100][30] i1=soc.ram.ram[101][30] q=$abc$109383$new_n51588_
-.subckt oa22_x2 i0=$abc$109383$new_n45059_ i1=$abc$109383$new_n51588_ i2=$abc$109383$new_n43648_ q=$abc$109383$new_n51589_
-.subckt o2_x2 i0=$abc$109383$new_n51589_ i1=$abc$109383$new_n51587_ q=$abc$109383$new_n51590_
-.subckt mx2_x2 cmd=$abc$109383$new_n43557_ i0=soc.ram.ram[104][30] i1=soc.ram.ram[105][30] q=$abc$109383$new_n51591_
-.subckt a2_x2 i0=$abc$109383$new_n51591_ i1=$abc$109383$new_n43805_ q=$abc$109383$new_n51592_
-.subckt mx2_x2 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[108][30] i1=soc.ram.ram[109][30] q=$abc$109383$new_n51593_
-.subckt oa22_x2 i0=$abc$109383$new_n44073_ i1=$abc$109383$new_n51593_ i2=$abc$109383$new_n43432_ q=$abc$109383$new_n51594_
-.subckt o2_x2 i0=$abc$109383$new_n51594_ i1=$abc$109383$new_n51592_ q=$abc$109383$new_n51595_
-.subckt oa22_x2 i0=$abc$109383$new_n51595_ i1=$abc$109383$new_n51590_ i2=$abc$109383$new_n44030_ q=$abc$109383$new_n51596_
+.subckt mux2_x1 cmd=$abc$109383$new_n44142_ i0=soc.ram.ram[102][30] i1=soc.ram.ram[103][30] q=$abc$109383$new_n51575_
+.subckt and2_x1 i0=$abc$109383$new_n51575_ i1=$abc$109383$new_n45207_ q=$abc$109383$new_n51576_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[98][30] i1=soc.ram.ram[99][30] q=$abc$109383$new_n51577_
+.subckt or21nand_x1 i0=$abc$109383$new_n45157_ i1=$abc$109383$new_n51577_ i2=$abc$109383$new_n43648_ nq=$abc$109383$new_n51578_
+.subckt or2_x1 i0=$abc$109383$new_n51578_ i1=$abc$109383$new_n51576_ q=$abc$109383$new_n51579_
+.subckt mux2_x1 cmd=$abc$109383$new_n46814_ i0=soc.ram.ram[106][30] i1=soc.ram.ram[107][30] q=$abc$109383$new_n51580_
+.subckt and2_x1 i0=$abc$109383$new_n51580_ i1=$abc$109383$new_n43805_ q=$abc$109383$new_n51581_
+.subckt mux2_x1 cmd=$abc$109383$new_n43718_ i0=soc.ram.ram[110][30] i1=soc.ram.ram[111][30] q=$abc$109383$new_n51582_
+.subckt or21nand_x1 i0=$abc$109383$new_n43748_ i1=$abc$109383$new_n51582_ i2=$abc$109383$new_n43432_ nq=$abc$109383$new_n51583_
+.subckt or2_x1 i0=$abc$109383$new_n51583_ i1=$abc$109383$new_n51581_ q=$abc$109383$new_n51584_
+.subckt or21nand_x1 i0=$abc$109383$new_n51584_ i1=$abc$109383$new_n51579_ i2=$abc$109383$new_n44656_ nq=$abc$109383$new_n51585_
+.subckt mux2_x1 cmd=$abc$109383$new_n43415_ i0=soc.ram.ram[96][30] i1=soc.ram.ram[97][30] q=$abc$109383$new_n51586_
+.subckt and2_x1 i0=$abc$109383$new_n51586_ i1=$abc$109383$new_n46370_ q=$abc$109383$new_n51587_
+.subckt mux2_x1 cmd=$abc$109383$new_n43796_ i0=soc.ram.ram[100][30] i1=soc.ram.ram[101][30] q=$abc$109383$new_n51588_
+.subckt or21nand_x1 i0=$abc$109383$new_n45059_ i1=$abc$109383$new_n51588_ i2=$abc$109383$new_n43648_ nq=$abc$109383$new_n51589_
+.subckt or2_x1 i0=$abc$109383$new_n51589_ i1=$abc$109383$new_n51587_ q=$abc$109383$new_n51590_
+.subckt mux2_x1 cmd=$abc$109383$new_n43557_ i0=soc.ram.ram[104][30] i1=soc.ram.ram[105][30] q=$abc$109383$new_n51591_
+.subckt and2_x1 i0=$abc$109383$new_n51591_ i1=$abc$109383$new_n43805_ q=$abc$109383$new_n51592_
+.subckt mux2_x1 cmd=$abc$109383$new_n43846_ i0=soc.ram.ram[108][30] i1=soc.ram.ram[109][30] q=$abc$109383$new_n51593_
+.subckt or21nand_x1 i0=$abc$109383$new_n44073_ i1=$abc$109383$new_n51593_ i2=$abc$109383$new_n43432_ nq=$abc$109383$new_n51594_
+.subckt or2_x1 i0=$abc$109383$new_n51594_ i1=$abc$109383$new_n51592_ q=$abc$109383$new_n51595_
+.subckt or21nand_x1 i0=$abc$109383$new_n51595_ i1=$abc$109383$new_n51590_ i2=$abc$109383$new_n44030_ nq=$abc$109383$new_n51596_
 .subckt nand3_x0 i0=$abc$109383$new_n51596_ i1=$abc$109383$new_n51585_ i2=$abc$109383$new_n44740_ nq=$abc$109383$new_n51597_
-.subckt a2_x2 i0=$abc$109383$new_n51597_ i1=$abc$109383$new_n43865_ q=$abc$109383$new_n51598_
+.subckt and2_x1 i0=$abc$109383$new_n51597_ i1=$abc$109383$new_n43865_ q=$abc$109383$new_n51598_
 .subckt nand2_x0 i0=$abc$109383$new_n51598_ i1=$abc$109383$new_n51574_ nq=$abc$109383$new_n51599_
-.subckt oa22_x2 i0=$abc$109383$new_n51599_ i1=$abc$109383$new_n51543_ i2=$abc$109383$new_n43591_ q=$abc$109383$new_n51600_
-.subckt oa22_x2 i0=$abc$109383$new_n51600_ i1=$abc$109383$new_n51483_ i2=$abc$109383$new_n51375_ q=$abc$109383$new_n51601_
-.subckt ao22_x2 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51601_ i2=$abc$109383$new_n51362_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103318
+.subckt or21nand_x1 i0=$abc$109383$new_n51599_ i1=$abc$109383$new_n51543_ i2=$abc$109383$new_n43591_ nq=$abc$109383$new_n51600_
+.subckt or21nand_x1 i0=$abc$109383$new_n51600_ i1=$abc$109383$new_n51483_ i2=$abc$109383$new_n51375_ nq=$abc$109383$new_n51601_
+.subckt and21nor_x1 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51601_ i2=$abc$109383$new_n51362_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103318
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n51603_
-.subckt oa22_x2 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n43281_ i2=soc.cpu.minerva.loadstore.m_load_data[31] q=$abc$109383$new_n51604_
-.subckt a2_x2 i0=$abc$109383$new_n51604_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n51605_
-.subckt a3_x2 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n51606_
-.subckt a3_x2 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n51607_
-.subckt ao22_x2 i0=$abc$109383$new_n51607_ i1=$abc$109383$new_n51606_ i2=$abc$109383$new_n27594_ q=$abc$109383$new_n51608_
-.subckt mx2_x2 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[18][31] i1=soc.ram.ram[22][31] q=$abc$109383$new_n51609_
-.subckt mx2_x2 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[19][31] i1=soc.ram.ram[23][31] q=$abc$109383$new_n51610_
-.subckt mx2_x2 cmd=$abc$109383$new_n43494_ i0=$abc$109383$new_n51610_ i1=$abc$109383$new_n51609_ q=$abc$109383$new_n51611_
+.subckt or21nand_x1 i0=$abc$109383$new_n29202_ i1=$abc$109383$new_n43281_ i2=soc.cpu.minerva.loadstore.m_load_data[31] nq=$abc$109383$new_n51604_
+.subckt and2_x1 i0=$abc$109383$new_n51604_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n51605_
+.subckt and3_x1 i0=$abc$109383$new_n44283_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n51606_
+.subckt and3_x1 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n51607_
+.subckt and21nor_x1 i0=$abc$109383$new_n51607_ i1=$abc$109383$new_n51606_ i2=$abc$109383$new_n27594_ nq=$abc$109383$new_n51608_
+.subckt mux2_x1 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[18][31] i1=soc.ram.ram[22][31] q=$abc$109383$new_n51609_
+.subckt mux2_x1 cmd=$abc$109383$new_n43475_ i0=soc.ram.ram[19][31] i1=soc.ram.ram[23][31] q=$abc$109383$new_n51610_
+.subckt mux2_x1 cmd=$abc$109383$new_n43494_ i0=$abc$109383$new_n51610_ i1=$abc$109383$new_n51609_ q=$abc$109383$new_n51611_
 .subckt nor2_x0 i0=$abc$109383$new_n51611_ i1=$abc$109383$new_n43354_ nq=$abc$109383$new_n51612_
-.subckt mx2_x2 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[26][31] i1=soc.ram.ram[30][31] q=$abc$109383$new_n51613_
+.subckt mux2_x1 cmd=$abc$109383$new_n44137_ i0=soc.ram.ram[26][31] i1=soc.ram.ram[30][31] q=$abc$109383$new_n51613_
 .subckt nand2_x0 i0=$abc$109383$new_n51613_ i1=$abc$109383$new_n43813_ nq=$abc$109383$new_n51614_
 .subckt inv_x0 i=soc.ram.ram[31][31] nq=$abc$109383$new_n51615_
-.subckt a2_x2 i0=$abc$109383$new_n51615_ i1=$abc$109383$new_n44187_ q=$abc$109383$new_n51616_
-.subckt o2_x2 i0=soc.ram.ram[27][31] i1=$abc$109383$new_n44145_ q=$abc$109383$new_n51617_
+.subckt and2_x1 i0=$abc$109383$new_n51615_ i1=$abc$109383$new_n44187_ q=$abc$109383$new_n51616_
+.subckt or2_x1 i0=soc.ram.ram[27][31] i1=$abc$109383$new_n44145_ q=$abc$109383$new_n51617_
 .subckt nand2_x0 i0=$abc$109383$new_n51617_ i1=$abc$109383$new_n44368_ nq=$abc$109383$new_n51618_
-.subckt ao22_x2 i0=$abc$109383$new_n51618_ i1=$abc$109383$new_n51616_ i2=$abc$109383$new_n51614_ q=$abc$109383$new_n51619_
-.subckt oa22_x2 i0=$abc$109383$new_n45393_ i1=$abc$109383$new_n51619_ i2=$abc$109383$new_n51612_ q=$abc$109383$new_n51620_
+.subckt and21nor_x1 i0=$abc$109383$new_n51618_ i1=$abc$109383$new_n51616_ i2=$abc$109383$new_n51614_ nq=$abc$109383$new_n51619_
+.subckt or21nand_x1 i0=$abc$109383$new_n45393_ i1=$abc$109383$new_n51619_ i2=$abc$109383$new_n51612_ nq=$abc$109383$new_n51620_
 .subckt nand2_x0 i0=$abc$109383$new_n51620_ i1=$abc$109383$new_n44917_ nq=$abc$109383$new_n51621_
-.subckt mx2_x2 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[24][31] i1=soc.ram.ram[28][31] q=$abc$109383$new_n51622_
-.subckt mx2_x2 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[25][31] i1=soc.ram.ram[29][31] q=$abc$109383$new_n51623_
-.subckt mx2_x2 cmd=$abc$109383$new_n43494_ i0=$abc$109383$new_n51623_ i1=$abc$109383$new_n51622_ q=$abc$109383$new_n51624_
-.subckt o2_x2 i0=$abc$109383$new_n51624_ i1=$abc$109383$new_n43433_ q=$abc$109383$new_n51625_
-.subckt mx2_x2 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[16][31] i1=soc.ram.ram[20][31] q=$abc$109383$new_n51626_
+.subckt mux2_x1 cmd=$abc$109383$new_n45566_ i0=soc.ram.ram[24][31] i1=soc.ram.ram[28][31] q=$abc$109383$new_n51622_
+.subckt mux2_x1 cmd=$abc$109383$new_n44163_ i0=soc.ram.ram[25][31] i1=soc.ram.ram[29][31] q=$abc$109383$new_n51623_
+.subckt mux2_x1 cmd=$abc$109383$new_n43494_ i0=$abc$109383$new_n51623_ i1=$abc$109383$new_n51622_ q=$abc$109383$new_n51624_
+.subckt or2_x1 i0=$abc$109383$new_n51624_ i1=$abc$109383$new_n43433_ q=$abc$109383$new_n51625_
+.subckt mux2_x1 cmd=$abc$109383$new_n44419_ i0=soc.ram.ram[16][31] i1=soc.ram.ram[20][31] q=$abc$109383$new_n51626_
 .subckt nand2_x0 i0=$abc$109383$new_n51626_ i1=$abc$109383$new_n44837_ nq=$abc$109383$new_n51627_
-.subckt mx2_x2 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[17][31] i1=soc.ram.ram[21][31] q=$abc$109383$new_n51628_
+.subckt mux2_x1 cmd=$abc$109383$new_n45081_ i0=soc.ram.ram[17][31] i1=soc.ram.ram[21][31] q=$abc$109383$new_n51628_
 .subckt nand2_x0 i0=$abc$109383$new_n51628_ i1=$abc$109383$new_n46112_ nq=$abc$109383$new_n51629_
 .subckt nand3_x0 i0=$abc$109383$new_n51629_ i1=$abc$109383$new_n51627_ i2=$abc$109383$new_n43471_ nq=$abc$109383$new_n51630_
-.subckt oa22_x2 i0=$abc$109383$new_n51630_ i1=$abc$109383$new_n51625_ i2=$abc$109383$new_n45604_ q=$abc$109383$new_n51631_
-.subckt a3_x2 i0=$abc$109383$new_n51631_ i1=$abc$109383$new_n51621_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n51632_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[9][31] i1=soc.ram.ram[13][31] q=$abc$109383$new_n51633_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[8][31] i1=soc.ram.ram[12][31] q=$abc$109383$new_n51634_
-.subckt mx2_x2 cmd=$abc$109383$new_n43796_ i0=$abc$109383$new_n51634_ i1=$abc$109383$new_n51633_ q=$abc$109383$new_n51635_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[0][31] i1=soc.ram.ram[4][31] q=$abc$109383$new_n51636_
-.subckt mx2_x2 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[1][31] i1=soc.ram.ram[5][31] q=$abc$109383$new_n51637_
-.subckt mx2_x2 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n51637_ i1=$abc$109383$new_n51636_ q=$abc$109383$new_n51638_
-.subckt mx2_x2 cmd=$abc$109383$new_n43648_ i0=$abc$109383$new_n51638_ i1=$abc$109383$new_n51635_ q=$abc$109383$new_n51639_
-.subckt o2_x2 i0=$abc$109383$new_n51639_ i1=$abc$109383$new_n44905_ q=$abc$109383$new_n51640_
-.subckt oa22_x2 i0=soc.ram.ram[11][31] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43602_ q=$abc$109383$new_n51641_
-.subckt oa22_x2 i0=$abc$109383$new_n43391_ i1=soc.ram.ram[3][31] i2=$abc$109383$new_n51641_ q=$abc$109383$new_n51642_
+.subckt or21nand_x1 i0=$abc$109383$new_n51630_ i1=$abc$109383$new_n51625_ i2=$abc$109383$new_n45604_ nq=$abc$109383$new_n51631_
+.subckt and3_x1 i0=$abc$109383$new_n51631_ i1=$abc$109383$new_n51621_ i2=$abc$109383$new_n43593_ q=$abc$109383$new_n51632_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[9][31] i1=soc.ram.ram[13][31] q=$abc$109383$new_n51633_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[8][31] i1=soc.ram.ram[12][31] q=$abc$109383$new_n51634_
+.subckt mux2_x1 cmd=$abc$109383$new_n43796_ i0=$abc$109383$new_n51634_ i1=$abc$109383$new_n51633_ q=$abc$109383$new_n51635_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[0][31] i1=soc.ram.ram[4][31] q=$abc$109383$new_n51636_
+.subckt mux2_x1 cmd=$abc$109383$new_n43635_ i0=soc.ram.ram[1][31] i1=soc.ram.ram[5][31] q=$abc$109383$new_n51637_
+.subckt mux2_x1 cmd=$abc$109383$new_n45550_ i0=$abc$109383$new_n51637_ i1=$abc$109383$new_n51636_ q=$abc$109383$new_n51638_
+.subckt mux2_x1 cmd=$abc$109383$new_n43648_ i0=$abc$109383$new_n51638_ i1=$abc$109383$new_n51635_ q=$abc$109383$new_n51639_
+.subckt or2_x1 i0=$abc$109383$new_n51639_ i1=$abc$109383$new_n44905_ q=$abc$109383$new_n51640_
+.subckt or21nand_x1 i0=soc.ram.ram[11][31] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43602_ nq=$abc$109383$new_n51641_
+.subckt or21nand_x1 i0=$abc$109383$new_n43391_ i1=soc.ram.ram[3][31] i2=$abc$109383$new_n51641_ nq=$abc$109383$new_n51642_
 .subckt nand2_x0 i0=soc.ram.ram[7][31] i1=$abc$109383$new_n44240_ nq=$abc$109383$new_n51643_
 .subckt inv_x0 i=soc.ram.ram[15][31] nq=$abc$109383$new_n51644_
-.subckt ao22_x2 i0=$abc$109383$new_n51644_ i1=$abc$109383$new_n44161_ i2=$abc$109383$new_n45076_ q=$abc$109383$new_n51645_
+.subckt and21nor_x1 i0=$abc$109383$new_n51644_ i1=$abc$109383$new_n44161_ i2=$abc$109383$new_n45076_ nq=$abc$109383$new_n51645_
 .subckt nand2_x0 i0=$abc$109383$new_n51645_ i1=$abc$109383$new_n51643_ nq=$abc$109383$new_n51646_
-.subckt oa22_x2 i0=$abc$109383$new_n51646_ i1=$abc$109383$new_n51642_ i2=$abc$109383$new_n44204_ q=$abc$109383$new_n51647_
-.subckt oa22_x2 i0=soc.ram.ram[10][31] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44186_ q=$abc$109383$new_n51648_
-.subckt oa22_x2 i0=$abc$109383$new_n43711_ i1=soc.ram.ram[2][31] i2=$abc$109383$new_n51648_ q=$abc$109383$new_n51649_
+.subckt or21nand_x1 i0=$abc$109383$new_n51646_ i1=$abc$109383$new_n51642_ i2=$abc$109383$new_n44204_ nq=$abc$109383$new_n51647_
+.subckt or21nand_x1 i0=soc.ram.ram[10][31] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44186_ nq=$abc$109383$new_n51648_
+.subckt or21nand_x1 i0=$abc$109383$new_n43711_ i1=soc.ram.ram[2][31] i2=$abc$109383$new_n51648_ nq=$abc$109383$new_n51649_
 .subckt nand2_x0 i0=soc.ram.ram[6][31] i1=$abc$109383$new_n43554_ nq=$abc$109383$new_n51650_
 .subckt inv_x0 i=soc.ram.ram[14][31] nq=$abc$109383$new_n51651_
-.subckt ao22_x2 i0=$abc$109383$new_n51651_ i1=$abc$109383$new_n43469_ i2=$abc$109383$new_n43613_ q=$abc$109383$new_n51652_
+.subckt and21nor_x1 i0=$abc$109383$new_n51651_ i1=$abc$109383$new_n43469_ i2=$abc$109383$new_n43613_ nq=$abc$109383$new_n51652_
 .subckt nand2_x0 i0=$abc$109383$new_n51652_ i1=$abc$109383$new_n51650_ nq=$abc$109383$new_n51653_
-.subckt oa22_x2 i0=$abc$109383$new_n51653_ i1=$abc$109383$new_n51649_ i2=$abc$109383$new_n43416_ q=$abc$109383$new_n51654_
-.subckt oa22_x2 i0=$abc$109383$new_n51654_ i1=$abc$109383$new_n51647_ i2=$abc$109383$new_n43331_ q=$abc$109383$new_n51655_
-.subckt a3_x2 i0=$abc$109383$new_n51655_ i1=$abc$109383$new_n51640_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n51656_
+.subckt or21nand_x1 i0=$abc$109383$new_n51653_ i1=$abc$109383$new_n51649_ i2=$abc$109383$new_n43416_ nq=$abc$109383$new_n51654_
+.subckt or21nand_x1 i0=$abc$109383$new_n51654_ i1=$abc$109383$new_n51647_ i2=$abc$109383$new_n43331_ nq=$abc$109383$new_n51655_
+.subckt and3_x1 i0=$abc$109383$new_n51655_ i1=$abc$109383$new_n51640_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n51656_
 .subckt nor3_x0 i0=$abc$109383$new_n51656_ i1=$abc$109383$new_n51632_ i2=$abc$109383$new_n43900_ nq=$abc$109383$new_n51657_
-.subckt o2_x2 i0=soc.ram.ram[51][31] i1=$abc$109383$new_n43786_ q=$abc$109383$new_n51658_
-.subckt ao22_x2 i0=soc.ram.ram[55][31] i1=$abc$109383$new_n43702_ i2=$abc$109383$new_n43913_ q=$abc$109383$new_n51659_
+.subckt or2_x1 i0=soc.ram.ram[51][31] i1=$abc$109383$new_n43786_ q=$abc$109383$new_n51658_
+.subckt and21nor_x1 i0=soc.ram.ram[55][31] i1=$abc$109383$new_n43702_ i2=$abc$109383$new_n43913_ nq=$abc$109383$new_n51659_
 .subckt nand2_x0 i0=$abc$109383$new_n51659_ i1=$abc$109383$new_n51658_ nq=$abc$109383$new_n51660_
 .subckt inv_x0 i=soc.ram.ram[54][31] nq=$abc$109383$new_n51661_
 .subckt nand2_x0 i0=$abc$109383$new_n51661_ i1=$abc$109383$new_n43965_ nq=$abc$109383$new_n51662_
-.subckt o2_x2 i0=soc.ram.ram[50][31] i1=$abc$109383$new_n43599_ q=$abc$109383$new_n51663_
-.subckt a2_x2 i0=$abc$109383$new_n51663_ i1=$abc$109383$new_n44103_ q=$abc$109383$new_n51664_
+.subckt or2_x1 i0=soc.ram.ram[50][31] i1=$abc$109383$new_n43599_ q=$abc$109383$new_n51663_
+.subckt and2_x1 i0=$abc$109383$new_n51663_ i1=$abc$109383$new_n44103_ q=$abc$109383$new_n51664_
 .subckt nand2_x0 i0=$abc$109383$new_n51664_ i1=$abc$109383$new_n51662_ nq=$abc$109383$new_n51665_
-.subckt oa22_x2 i0=$abc$109383$new_n51665_ i1=$abc$109383$new_n51660_ i2=$abc$109383$new_n45519_ q=$abc$109383$new_n51666_
+.subckt or21nand_x1 i0=$abc$109383$new_n51665_ i1=$abc$109383$new_n51660_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n51666_
 .subckt inv_x0 i=soc.ram.ram[53][31] nq=$abc$109383$new_n51667_
 .subckt nand2_x0 i0=$abc$109383$new_n51667_ i1=$abc$109383$new_n43744_ nq=$abc$109383$new_n51668_
-.subckt ao22_x2 i0=soc.ram.ram[49][31] i1=$abc$109383$new_n44808_ i2=$abc$109383$new_n44064_ q=$abc$109383$new_n51669_
+.subckt and21nor_x1 i0=soc.ram.ram[49][31] i1=$abc$109383$new_n44808_ i2=$abc$109383$new_n44064_ nq=$abc$109383$new_n51669_
 .subckt nand2_x0 i0=$abc$109383$new_n51669_ i1=$abc$109383$new_n51668_ nq=$abc$109383$new_n51670_
-.subckt mx2_x2 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[48][31] i1=soc.ram.ram[52][31] q=$abc$109383$new_n51671_
+.subckt mux2_x1 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[48][31] i1=soc.ram.ram[52][31] q=$abc$109383$new_n51671_
 .subckt nand2_x0 i0=$abc$109383$new_n51671_ i1=$abc$109383$new_n43903_ nq=$abc$109383$new_n51672_
-.subckt oa22_x2 i0=$abc$109383$new_n51672_ i1=$abc$109383$new_n51670_ i2=$abc$109383$new_n44916_ q=$abc$109383$new_n51673_
+.subckt or21nand_x1 i0=$abc$109383$new_n51672_ i1=$abc$109383$new_n51670_ i2=$abc$109383$new_n44916_ nq=$abc$109383$new_n51673_
 .subckt nand3_x0 i0=$abc$109383$new_n51673_ i1=$abc$109383$new_n51666_ i2=$abc$109383$new_n45311_ nq=$abc$109383$new_n51674_
 .subckt inv_x0 i=soc.ram.ram[61][31] nq=$abc$109383$new_n51675_
 .subckt nand2_x0 i0=$abc$109383$new_n51675_ i1=$abc$109383$new_n43744_ nq=$abc$109383$new_n51676_
-.subckt ao22_x2 i0=soc.ram.ram[57][31] i1=$abc$109383$new_n43828_ i2=$abc$109383$new_n44064_ q=$abc$109383$new_n51677_
+.subckt and21nor_x1 i0=soc.ram.ram[57][31] i1=$abc$109383$new_n43828_ i2=$abc$109383$new_n44064_ nq=$abc$109383$new_n51677_
 .subckt nand2_x0 i0=$abc$109383$new_n51677_ i1=$abc$109383$new_n51676_ nq=$abc$109383$new_n51678_
-.subckt mx2_x2 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[56][31] i1=soc.ram.ram[60][31] q=$abc$109383$new_n51679_
+.subckt mux2_x1 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[56][31] i1=soc.ram.ram[60][31] q=$abc$109383$new_n51679_
 .subckt nand2_x0 i0=$abc$109383$new_n51679_ i1=$abc$109383$new_n43903_ nq=$abc$109383$new_n51680_
-.subckt oa22_x2 i0=$abc$109383$new_n51680_ i1=$abc$109383$new_n51678_ i2=$abc$109383$new_n44916_ q=$abc$109383$new_n51681_
+.subckt or21nand_x1 i0=$abc$109383$new_n51680_ i1=$abc$109383$new_n51678_ i2=$abc$109383$new_n44916_ nq=$abc$109383$new_n51681_
 .subckt inv_x0 i=soc.ram.ram[63][31] nq=$abc$109383$new_n51682_
 .subckt nand2_x0 i0=$abc$109383$new_n51682_ i1=$abc$109383$new_n46187_ nq=$abc$109383$new_n51683_
-.subckt ao22_x2 i0=soc.ram.ram[59][31] i1=$abc$109383$new_n44073_ i2=$abc$109383$new_n43797_ q=$abc$109383$new_n51684_
+.subckt and21nor_x1 i0=soc.ram.ram[59][31] i1=$abc$109383$new_n44073_ i2=$abc$109383$new_n43797_ nq=$abc$109383$new_n51684_
 .subckt nand2_x0 i0=$abc$109383$new_n51684_ i1=$abc$109383$new_n51683_ nq=$abc$109383$new_n51685_
-.subckt mx2_x2 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[58][31] i1=soc.ram.ram[62][31] q=$abc$109383$new_n51686_
+.subckt mux2_x1 cmd=$abc$109383$new_n44555_ i0=soc.ram.ram[58][31] i1=soc.ram.ram[62][31] q=$abc$109383$new_n51686_
 .subckt nand2_x0 i0=$abc$109383$new_n51686_ i1=$abc$109383$new_n44597_ nq=$abc$109383$new_n51687_
-.subckt oa22_x2 i0=$abc$109383$new_n51687_ i1=$abc$109383$new_n51685_ i2=$abc$109383$new_n43855_ q=$abc$109383$new_n51688_
+.subckt or21nand_x1 i0=$abc$109383$new_n51687_ i1=$abc$109383$new_n51685_ i2=$abc$109383$new_n43855_ nq=$abc$109383$new_n51688_
 .subckt nand3_x0 i0=$abc$109383$new_n51688_ i1=$abc$109383$new_n51681_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n51689_
 .subckt nand3_x0 i0=$abc$109383$new_n51689_ i1=$abc$109383$new_n51674_ i2=$abc$109383$new_n44478_ nq=$abc$109383$new_n51690_
 .subckt inv_x0 i=soc.ram.ram[47][31] nq=$abc$109383$new_n51691_
 .subckt nand2_x0 i0=$abc$109383$new_n51691_ i1=$abc$109383$new_n44809_ nq=$abc$109383$new_n51692_
-.subckt ao22_x2 i0=soc.ram.ram[43][31] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ q=$abc$109383$new_n51693_
+.subckt and21nor_x1 i0=soc.ram.ram[43][31] i1=$abc$109383$new_n45321_ i2=$abc$109383$new_n43997_ nq=$abc$109383$new_n51693_
 .subckt nand2_x0 i0=$abc$109383$new_n51693_ i1=$abc$109383$new_n51692_ nq=$abc$109383$new_n51694_
-.subckt mx2_x2 cmd=$abc$109383$new_n43925_ i0=soc.ram.ram[42][31] i1=soc.ram.ram[46][31] q=$abc$109383$new_n51695_
+.subckt mux2_x1 cmd=$abc$109383$new_n43925_ i0=soc.ram.ram[42][31] i1=soc.ram.ram[46][31] q=$abc$109383$new_n51695_
 .subckt nand2_x0 i0=$abc$109383$new_n51695_ i1=$abc$109383$new_n44854_ nq=$abc$109383$new_n51696_
-.subckt oa22_x2 i0=$abc$109383$new_n51696_ i1=$abc$109383$new_n51694_ i2=$abc$109383$new_n44741_ q=$abc$109383$new_n51697_
+.subckt or21nand_x1 i0=$abc$109383$new_n51696_ i1=$abc$109383$new_n51694_ i2=$abc$109383$new_n44741_ nq=$abc$109383$new_n51697_
 .subckt inv_x0 i=soc.ram.ram[45][31] nq=$abc$109383$new_n51698_
 .subckt nand2_x0 i0=$abc$109383$new_n51698_ i1=$abc$109383$new_n45219_ nq=$abc$109383$new_n51699_
-.subckt ao22_x2 i0=soc.ram.ram[41][31] i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n51700_
+.subckt and21nor_x1 i0=soc.ram.ram[41][31] i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n51700_
 .subckt nand2_x0 i0=$abc$109383$new_n51700_ i1=$abc$109383$new_n51699_ nq=$abc$109383$new_n51701_
-.subckt mx2_x2 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[40][31] i1=soc.ram.ram[44][31] q=$abc$109383$new_n51702_
+.subckt mux2_x1 cmd=$abc$109383$new_n43520_ i0=soc.ram.ram[40][31] i1=soc.ram.ram[44][31] q=$abc$109383$new_n51702_
 .subckt nand2_x0 i0=$abc$109383$new_n51702_ i1=$abc$109383$new_n44150_ nq=$abc$109383$new_n51703_
-.subckt oa22_x2 i0=$abc$109383$new_n51703_ i1=$abc$109383$new_n51701_ i2=$abc$109383$new_n43842_ q=$abc$109383$new_n51704_
+.subckt or21nand_x1 i0=$abc$109383$new_n51703_ i1=$abc$109383$new_n51701_ i2=$abc$109383$new_n43842_ nq=$abc$109383$new_n51704_
 .subckt nand3_x0 i0=$abc$109383$new_n51704_ i1=$abc$109383$new_n51697_ i2=$abc$109383$new_n45298_ nq=$abc$109383$new_n51705_
-.subckt o2_x2 i0=soc.ram.ram[35][31] i1=$abc$109383$new_n43514_ q=$abc$109383$new_n51706_
-.subckt ao22_x2 i0=soc.ram.ram[39][31] i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n51707_
+.subckt or2_x1 i0=soc.ram.ram[35][31] i1=$abc$109383$new_n43514_ q=$abc$109383$new_n51706_
+.subckt and21nor_x1 i0=soc.ram.ram[39][31] i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n51707_
 .subckt nand2_x0 i0=$abc$109383$new_n51707_ i1=$abc$109383$new_n51706_ nq=$abc$109383$new_n51708_
 .subckt inv_x0 i=soc.ram.ram[38][31] nq=$abc$109383$new_n51709_
 .subckt nand2_x0 i0=$abc$109383$new_n51709_ i1=$abc$109383$new_n44088_ nq=$abc$109383$new_n51710_
-.subckt o2_x2 i0=soc.ram.ram[34][31] i1=$abc$109383$new_n43520_ q=$abc$109383$new_n51711_
-.subckt a2_x2 i0=$abc$109383$new_n51711_ i1=$abc$109383$new_n43941_ q=$abc$109383$new_n51712_
+.subckt or2_x1 i0=soc.ram.ram[34][31] i1=$abc$109383$new_n43520_ q=$abc$109383$new_n51711_
+.subckt and2_x1 i0=$abc$109383$new_n51711_ i1=$abc$109383$new_n43941_ q=$abc$109383$new_n51712_
 .subckt nand2_x0 i0=$abc$109383$new_n51712_ i1=$abc$109383$new_n51710_ nq=$abc$109383$new_n51713_
-.subckt oa22_x2 i0=$abc$109383$new_n51713_ i1=$abc$109383$new_n51708_ i2=$abc$109383$new_n45519_ q=$abc$109383$new_n51714_
+.subckt or21nand_x1 i0=$abc$109383$new_n51713_ i1=$abc$109383$new_n51708_ i2=$abc$109383$new_n45519_ nq=$abc$109383$new_n51714_
 .subckt inv_x0 i=soc.ram.ram[37][31] nq=$abc$109383$new_n51715_
 .subckt nand2_x0 i0=$abc$109383$new_n51715_ i1=$abc$109383$new_n43860_ nq=$abc$109383$new_n51716_
-.subckt ao22_x2 i0=soc.ram.ram[33][31] i1=$abc$109383$new_n45691_ i2=$abc$109383$new_n44064_ q=$abc$109383$new_n51717_
+.subckt and21nor_x1 i0=soc.ram.ram[33][31] i1=$abc$109383$new_n45691_ i2=$abc$109383$new_n44064_ nq=$abc$109383$new_n51717_
 .subckt nand2_x0 i0=$abc$109383$new_n51717_ i1=$abc$109383$new_n51716_ nq=$abc$109383$new_n51718_
-.subckt mx2_x2 cmd=$abc$109383$new_n45087_ i0=soc.ram.ram[32][31] i1=soc.ram.ram[36][31] q=$abc$109383$new_n51719_
+.subckt mux2_x1 cmd=$abc$109383$new_n45087_ i0=soc.ram.ram[32][31] i1=soc.ram.ram[36][31] q=$abc$109383$new_n51719_
 .subckt nand2_x0 i0=$abc$109383$new_n51719_ i1=$abc$109383$new_n44078_ nq=$abc$109383$new_n51720_
-.subckt oa22_x2 i0=$abc$109383$new_n51720_ i1=$abc$109383$new_n51718_ i2=$abc$109383$new_n46154_ q=$abc$109383$new_n51721_
+.subckt or21nand_x1 i0=$abc$109383$new_n51720_ i1=$abc$109383$new_n51718_ i2=$abc$109383$new_n46154_ nq=$abc$109383$new_n51721_
 .subckt nand3_x0 i0=$abc$109383$new_n51721_ i1=$abc$109383$new_n51714_ i2=$abc$109383$new_n44693_ nq=$abc$109383$new_n51722_
 .subckt nand3_x0 i0=$abc$109383$new_n51722_ i1=$abc$109383$new_n51705_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n51723_
-.subckt a3_x2 i0=$abc$109383$new_n51723_ i1=$abc$109383$new_n51690_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n51724_
+.subckt and3_x1 i0=$abc$109383$new_n51723_ i1=$abc$109383$new_n51690_ i2=$abc$109383$new_n43464_ q=$abc$109383$new_n51724_
 .subckt nor3_x0 i0=$abc$109383$new_n51724_ i1=$abc$109383$new_n51657_ i2=$abc$109383$new_n43586_ nq=$abc$109383$new_n51725_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[91][31] i1=soc.ram.ram[95][31] q=$abc$109383$new_n51726_
-.subckt mx2_x2 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[90][31] i1=soc.ram.ram[94][31] q=$abc$109383$new_n51727_
-.subckt mx2_x2 cmd=$abc$109383$new_n43996_ i0=$abc$109383$new_n51727_ i1=$abc$109383$new_n51726_ q=$abc$109383$new_n51728_
-.subckt o2_x2 i0=$abc$109383$new_n51728_ i1=$abc$109383$new_n44115_ q=$abc$109383$new_n51729_
-.subckt mx2_x2 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[89][31] i1=soc.ram.ram[93][31] q=$abc$109383$new_n51730_
-.subckt mx2_x2 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[88][31] i1=soc.ram.ram[92][31] q=$abc$109383$new_n51731_
-.subckt mx2_x2 cmd=$abc$109383$new_n43415_ i0=$abc$109383$new_n51731_ i1=$abc$109383$new_n51730_ q=$abc$109383$new_n51732_
-.subckt ao22_x2 i0=$abc$109383$new_n43808_ i1=$abc$109383$new_n51732_ i2=$abc$109383$new_n44228_ q=$abc$109383$new_n51733_
-.subckt a2_x2 i0=$abc$109383$new_n51733_ i1=$abc$109383$new_n51729_ q=$abc$109383$new_n51734_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[80][31] i1=soc.ram.ram[84][31] q=$abc$109383$new_n51735_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[91][31] i1=soc.ram.ram[95][31] q=$abc$109383$new_n51726_
+.subckt mux2_x1 cmd=$abc$109383$new_n44571_ i0=soc.ram.ram[90][31] i1=soc.ram.ram[94][31] q=$abc$109383$new_n51727_
+.subckt mux2_x1 cmd=$abc$109383$new_n43996_ i0=$abc$109383$new_n51727_ i1=$abc$109383$new_n51726_ q=$abc$109383$new_n51728_
+.subckt or2_x1 i0=$abc$109383$new_n51728_ i1=$abc$109383$new_n44115_ q=$abc$109383$new_n51729_
+.subckt mux2_x1 cmd=$abc$109383$new_n49591_ i0=soc.ram.ram[89][31] i1=soc.ram.ram[93][31] q=$abc$109383$new_n51730_
+.subckt mux2_x1 cmd=$abc$109383$new_n44337_ i0=soc.ram.ram[88][31] i1=soc.ram.ram[92][31] q=$abc$109383$new_n51731_
+.subckt mux2_x1 cmd=$abc$109383$new_n43415_ i0=$abc$109383$new_n51731_ i1=$abc$109383$new_n51730_ q=$abc$109383$new_n51732_
+.subckt and21nor_x1 i0=$abc$109383$new_n43808_ i1=$abc$109383$new_n51732_ i2=$abc$109383$new_n44228_ nq=$abc$109383$new_n51733_
+.subckt and2_x1 i0=$abc$109383$new_n51733_ i1=$abc$109383$new_n51729_ q=$abc$109383$new_n51734_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[80][31] i1=soc.ram.ram[84][31] q=$abc$109383$new_n51735_
 .subckt nand2_x0 i0=$abc$109383$new_n51735_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n51736_
 .subckt inv_x0 i=soc.ram.ram[85][31] nq=$abc$109383$new_n51737_
 .subckt nand2_x0 i0=$abc$109383$new_n51737_ i1=$abc$109383$new_n46926_ nq=$abc$109383$new_n51738_
-.subckt ao22_x2 i0=soc.ram.ram[81][31] i1=$abc$109383$new_n45081_ i2=$abc$109383$new_n43630_ q=$abc$109383$new_n51739_
+.subckt and21nor_x1 i0=soc.ram.ram[81][31] i1=$abc$109383$new_n45081_ i2=$abc$109383$new_n43630_ nq=$abc$109383$new_n51739_
 .subckt nand2_x0 i0=$abc$109383$new_n51739_ i1=$abc$109383$new_n51738_ nq=$abc$109383$new_n51740_
 .subckt nand3_x0 i0=$abc$109383$new_n51740_ i1=$abc$109383$new_n51736_ i2=$abc$109383$new_n43753_ nq=$abc$109383$new_n51741_
 .subckt inv_x0 i=soc.ram.ram[87][31] nq=$abc$109383$new_n51742_
 .subckt nand2_x0 i0=$abc$109383$new_n51742_ i1=$abc$109383$new_n46187_ nq=$abc$109383$new_n51743_
-.subckt ao22_x2 i0=soc.ram.ram[83][31] i1=$abc$109383$new_n44191_ i2=$abc$109383$new_n43797_ q=$abc$109383$new_n51744_
+.subckt and21nor_x1 i0=soc.ram.ram[83][31] i1=$abc$109383$new_n44191_ i2=$abc$109383$new_n43797_ nq=$abc$109383$new_n51744_
 .subckt nand2_x0 i0=$abc$109383$new_n51744_ i1=$abc$109383$new_n51743_ nq=$abc$109383$new_n51745_
-.subckt mx2_x2 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[82][31] i1=soc.ram.ram[86][31] q=$abc$109383$new_n51746_
-.subckt a2_x2 i0=$abc$109383$new_n51746_ i1=$abc$109383$new_n44836_ q=$abc$109383$new_n51747_
+.subckt mux2_x1 cmd=$abc$109383$new_n44072_ i0=soc.ram.ram[82][31] i1=soc.ram.ram[86][31] q=$abc$109383$new_n51746_
+.subckt and2_x1 i0=$abc$109383$new_n51746_ i1=$abc$109383$new_n44836_ q=$abc$109383$new_n51747_
 .subckt nor2_x0 i0=$abc$109383$new_n51747_ i1=$abc$109383$new_n44115_ nq=$abc$109383$new_n51748_
 .subckt nand2_x0 i0=$abc$109383$new_n51748_ i1=$abc$109383$new_n51745_ nq=$abc$109383$new_n51749_
-.subckt a3_x2 i0=$abc$109383$new_n51749_ i1=$abc$109383$new_n51741_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n51750_
-.subckt ao22_x2 i0=$abc$109383$new_n51750_ i1=$abc$109383$new_n51734_ i2=$abc$109383$new_n43882_ q=$abc$109383$new_n51751_
-.subckt mx2_x2 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[67][31] i1=soc.ram.ram[71][31] q=$abc$109383$new_n51752_
+.subckt and3_x1 i0=$abc$109383$new_n51749_ i1=$abc$109383$new_n51741_ i2=$abc$109383$new_n43664_ q=$abc$109383$new_n51750_
+.subckt and21nor_x1 i0=$abc$109383$new_n51750_ i1=$abc$109383$new_n51734_ i2=$abc$109383$new_n43882_ nq=$abc$109383$new_n51751_
+.subckt mux2_x1 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[67][31] i1=soc.ram.ram[71][31] q=$abc$109383$new_n51752_
 .subckt nand2_x0 i0=$abc$109383$new_n51752_ i1=$abc$109383$new_n45232_ nq=$abc$109383$new_n51753_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[66][31] i1=soc.ram.ram[70][31] q=$abc$109383$new_n51754_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[66][31] i1=soc.ram.ram[70][31] q=$abc$109383$new_n51754_
 .subckt nand2_x0 i0=$abc$109383$new_n51754_ i1=$abc$109383$new_n44456_ nq=$abc$109383$new_n51755_
 .subckt nand3_x0 i0=$abc$109383$new_n51755_ i1=$abc$109383$new_n51753_ i2=$abc$109383$new_n44916_ nq=$abc$109383$new_n51756_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[65][31] i1=soc.ram.ram[69][31] q=$abc$109383$new_n51757_
-.subckt mx2_x2 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[64][31] i1=soc.ram.ram[68][31] q=$abc$109383$new_n51758_
-.subckt mx2_x2 cmd=$abc$109383$new_n45042_ i0=$abc$109383$new_n51758_ i1=$abc$109383$new_n51757_ q=$abc$109383$new_n51759_
-.subckt ao22_x2 i0=$abc$109383$new_n43580_ i1=$abc$109383$new_n51759_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n51760_
-.subckt a2_x2 i0=$abc$109383$new_n51760_ i1=$abc$109383$new_n51756_ q=$abc$109383$new_n51761_
-.subckt mx2_x2 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[72][31] i1=soc.ram.ram[76][31] q=$abc$109383$new_n51762_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[65][31] i1=soc.ram.ram[69][31] q=$abc$109383$new_n51757_
+.subckt mux2_x1 cmd=$abc$109383$new_n43357_ i0=soc.ram.ram[64][31] i1=soc.ram.ram[68][31] q=$abc$109383$new_n51758_
+.subckt mux2_x1 cmd=$abc$109383$new_n45042_ i0=$abc$109383$new_n51758_ i1=$abc$109383$new_n51757_ q=$abc$109383$new_n51759_
+.subckt and21nor_x1 i0=$abc$109383$new_n43580_ i1=$abc$109383$new_n51759_ i2=$abc$109383$new_n44523_ nq=$abc$109383$new_n51760_
+.subckt and2_x1 i0=$abc$109383$new_n51760_ i1=$abc$109383$new_n51756_ q=$abc$109383$new_n51761_
+.subckt mux2_x1 cmd=$abc$109383$new_n43419_ i0=soc.ram.ram[72][31] i1=soc.ram.ram[76][31] q=$abc$109383$new_n51762_
 .subckt nand2_x0 i0=$abc$109383$new_n51762_ i1=$abc$109383$new_n44630_ nq=$abc$109383$new_n51763_
 .subckt inv_x0 i=soc.ram.ram[77][31] nq=$abc$109383$new_n51764_
 .subckt nand2_x0 i0=$abc$109383$new_n51764_ i1=$abc$109383$new_n43811_ nq=$abc$109383$new_n51765_
-.subckt ao22_x2 i0=soc.ram.ram[73][31] i1=$abc$109383$new_n43654_ i2=$abc$109383$new_n45093_ q=$abc$109383$new_n51766_
+.subckt and21nor_x1 i0=soc.ram.ram[73][31] i1=$abc$109383$new_n43654_ i2=$abc$109383$new_n45093_ nq=$abc$109383$new_n51766_
 .subckt nand2_x0 i0=$abc$109383$new_n51766_ i1=$abc$109383$new_n51765_ nq=$abc$109383$new_n51767_
 .subckt nand3_x0 i0=$abc$109383$new_n51767_ i1=$abc$109383$new_n51763_ i2=$abc$109383$new_n43449_ nq=$abc$109383$new_n51768_
-.subckt ao22_x2 i0=soc.ram.ram[75][31] i1=$abc$109383$new_n43441_ i2=$abc$109383$new_n43846_ q=$abc$109383$new_n51769_
-.subckt ao22_x2 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[79][31] i2=$abc$109383$new_n51769_ q=$abc$109383$new_n51770_
-.subckt mx2_x2 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[74][31] i1=soc.ram.ram[78][31] q=$abc$109383$new_n51771_
-.subckt oa22_x2 i0=$abc$109383$new_n43434_ i1=$abc$109383$new_n51771_ i2=$abc$109383$new_n43329_ q=$abc$109383$new_n51772_
-.subckt ao22_x2 i0=$abc$109383$new_n51772_ i1=$abc$109383$new_n51770_ i2=$abc$109383$new_n43525_ q=$abc$109383$new_n51773_
-.subckt a2_x2 i0=$abc$109383$new_n51773_ i1=$abc$109383$new_n51768_ q=$abc$109383$new_n51774_
-.subckt ao22_x2 i0=$abc$109383$new_n51774_ i1=$abc$109383$new_n51761_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n51775_
+.subckt and21nor_x1 i0=soc.ram.ram[75][31] i1=$abc$109383$new_n43441_ i2=$abc$109383$new_n43846_ nq=$abc$109383$new_n51769_
+.subckt and21nor_x1 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[79][31] i2=$abc$109383$new_n51769_ nq=$abc$109383$new_n51770_
+.subckt mux2_x1 cmd=$abc$109383$new_n45959_ i0=soc.ram.ram[74][31] i1=soc.ram.ram[78][31] q=$abc$109383$new_n51771_
+.subckt or21nand_x1 i0=$abc$109383$new_n43434_ i1=$abc$109383$new_n51771_ i2=$abc$109383$new_n43329_ nq=$abc$109383$new_n51772_
+.subckt and21nor_x1 i0=$abc$109383$new_n51772_ i1=$abc$109383$new_n51770_ i2=$abc$109383$new_n43525_ nq=$abc$109383$new_n51773_
+.subckt and2_x1 i0=$abc$109383$new_n51773_ i1=$abc$109383$new_n51768_ q=$abc$109383$new_n51774_
+.subckt and21nor_x1 i0=$abc$109383$new_n51774_ i1=$abc$109383$new_n51761_ i2=$abc$109383$new_n45028_ nq=$abc$109383$new_n51775_
 .subckt nor3_x0 i0=$abc$109383$new_n51775_ i1=$abc$109383$new_n51751_ i2=$abc$109383$new_n43900_ nq=$abc$109383$new_n51776_
 .subckt inv_x0 i=soc.ram.ram[111][31] nq=$abc$109383$new_n51777_
 .subckt nand2_x0 i0=$abc$109383$new_n51777_ i1=$abc$109383$new_n44208_ nq=$abc$109383$new_n51778_
-.subckt ao22_x2 i0=soc.ram.ram[107][31] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ q=$abc$109383$new_n51779_
+.subckt and21nor_x1 i0=soc.ram.ram[107][31] i1=$abc$109383$new_n44848_ i2=$abc$109383$new_n44847_ nq=$abc$109383$new_n51779_
 .subckt nand2_x0 i0=$abc$109383$new_n51779_ i1=$abc$109383$new_n51778_ nq=$abc$109383$new_n51780_
-.subckt mx2_x2 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[106][31] i1=soc.ram.ram[110][31] q=$abc$109383$new_n51781_
+.subckt mux2_x1 cmd=$abc$109383$new_n43599_ i0=soc.ram.ram[106][31] i1=soc.ram.ram[110][31] q=$abc$109383$new_n51781_
 .subckt nand2_x0 i0=$abc$109383$new_n51781_ i1=$abc$109383$new_n44150_ nq=$abc$109383$new_n51782_
-.subckt a2_x2 i0=$abc$109383$new_n51782_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n51783_
+.subckt and2_x1 i0=$abc$109383$new_n51782_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n51783_
 .subckt nand2_x0 i0=$abc$109383$new_n51783_ i1=$abc$109383$new_n51780_ nq=$abc$109383$new_n51784_
 .subckt inv_x0 i=soc.ram.ram[103][31] nq=$abc$109383$new_n51785_
 .subckt nand2_x0 i0=$abc$109383$new_n51785_ i1=$abc$109383$new_n43954_ nq=$abc$109383$new_n51786_
-.subckt ao22_x2 i0=soc.ram.ram[99][31] i1=$abc$109383$new_n45870_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n51787_
+.subckt and21nor_x1 i0=soc.ram.ram[99][31] i1=$abc$109383$new_n45870_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n51787_
 .subckt nand2_x0 i0=$abc$109383$new_n51787_ i1=$abc$109383$new_n51786_ nq=$abc$109383$new_n51788_
 .subckt inv_x0 i=soc.ram.ram[102][31] nq=$abc$109383$new_n51789_
-.subckt a2_x2 i0=$abc$109383$new_n51789_ i1=$abc$109383$new_n45059_ q=$abc$109383$new_n51790_
-.subckt o2_x2 i0=soc.ram.ram[98][31] i1=$abc$109383$new_n44404_ q=$abc$109383$new_n51791_
+.subckt and2_x1 i0=$abc$109383$new_n51789_ i1=$abc$109383$new_n45059_ q=$abc$109383$new_n51790_
+.subckt or2_x1 i0=soc.ram.ram[98][31] i1=$abc$109383$new_n44404_ q=$abc$109383$new_n51791_
 .subckt nand2_x0 i0=$abc$109383$new_n51791_ i1=$abc$109383$new_n43813_ nq=$abc$109383$new_n51792_
-.subckt ao22_x2 i0=$abc$109383$new_n51792_ i1=$abc$109383$new_n51790_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n51793_
+.subckt and21nor_x1 i0=$abc$109383$new_n51792_ i1=$abc$109383$new_n51790_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n51793_
 .subckt nand2_x0 i0=$abc$109383$new_n51793_ i1=$abc$109383$new_n51788_ nq=$abc$109383$new_n51794_
 .subckt nand3_x0 i0=$abc$109383$new_n51794_ i1=$abc$109383$new_n51784_ i2=$abc$109383$new_n45428_ nq=$abc$109383$new_n51795_
 .subckt inv_x0 i=soc.ram.ram[109][31] nq=$abc$109383$new_n51796_
 .subckt nand2_x0 i0=$abc$109383$new_n51796_ i1=$abc$109383$new_n43954_ nq=$abc$109383$new_n51797_
-.subckt ao22_x2 i0=soc.ram.ram[105][31] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n45094_ q=$abc$109383$new_n51798_
+.subckt and21nor_x1 i0=soc.ram.ram[105][31] i1=$abc$109383$new_n45155_ i2=$abc$109383$new_n45094_ nq=$abc$109383$new_n51798_
 .subckt nand2_x0 i0=$abc$109383$new_n51798_ i1=$abc$109383$new_n51797_ nq=$abc$109383$new_n51799_
-.subckt mx2_x2 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[104][31] i1=soc.ram.ram[108][31] q=$abc$109383$new_n51800_
+.subckt mux2_x1 cmd=$abc$109383$new_n44164_ i0=soc.ram.ram[104][31] i1=soc.ram.ram[108][31] q=$abc$109383$new_n51800_
 .subckt nand2_x0 i0=$abc$109383$new_n51800_ i1=$abc$109383$new_n43903_ nq=$abc$109383$new_n51801_
-.subckt a2_x2 i0=$abc$109383$new_n51801_ i1=$abc$109383$new_n43354_ q=$abc$109383$new_n51802_
+.subckt and2_x1 i0=$abc$109383$new_n51801_ i1=$abc$109383$new_n43354_ q=$abc$109383$new_n51802_
 .subckt nand2_x0 i0=$abc$109383$new_n51802_ i1=$abc$109383$new_n51799_ nq=$abc$109383$new_n51803_
-.subckt o2_x2 i0=soc.ram.ram[97][31] i1=$abc$109383$new_n46187_ q=$abc$109383$new_n51804_
-.subckt ao22_x2 i0=soc.ram.ram[101][31] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44143_ q=$abc$109383$new_n51805_
+.subckt or2_x1 i0=soc.ram.ram[97][31] i1=$abc$109383$new_n46187_ q=$abc$109383$new_n51804_
+.subckt and21nor_x1 i0=soc.ram.ram[101][31] i1=$abc$109383$new_n44412_ i2=$abc$109383$new_n44143_ nq=$abc$109383$new_n51805_
 .subckt nand2_x0 i0=$abc$109383$new_n51805_ i1=$abc$109383$new_n51804_ nq=$abc$109383$new_n51806_
-.subckt mx2_x2 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[96][31] i1=soc.ram.ram[100][31] q=$abc$109383$new_n51807_
-.subckt a2_x2 i0=$abc$109383$new_n51807_ i1=$abc$109383$new_n43595_ q=$abc$109383$new_n51808_
+.subckt mux2_x1 cmd=$abc$109383$new_n43613_ i0=soc.ram.ram[96][31] i1=soc.ram.ram[100][31] q=$abc$109383$new_n51807_
+.subckt and2_x1 i0=$abc$109383$new_n51807_ i1=$abc$109383$new_n43595_ q=$abc$109383$new_n51808_
 .subckt nor2_x0 i0=$abc$109383$new_n51808_ i1=$abc$109383$new_n43649_ nq=$abc$109383$new_n51809_
 .subckt nand2_x0 i0=$abc$109383$new_n51809_ i1=$abc$109383$new_n51806_ nq=$abc$109383$new_n51810_
 .subckt nand3_x0 i0=$abc$109383$new_n51810_ i1=$abc$109383$new_n51803_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n51811_
 .subckt nand3_x0 i0=$abc$109383$new_n51811_ i1=$abc$109383$new_n51795_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n51812_
 .subckt inv_x0 i=soc.ram.ram[127][31] nq=$abc$109383$new_n51813_
 .subckt nand2_x0 i0=$abc$109383$new_n51813_ i1=$abc$109383$new_n44634_ nq=$abc$109383$new_n51814_
-.subckt ao22_x2 i0=soc.ram.ram[123][31] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ q=$abc$109383$new_n51815_
+.subckt and21nor_x1 i0=soc.ram.ram[123][31] i1=$abc$109383$new_n45445_ i2=$abc$109383$new_n45444_ nq=$abc$109383$new_n51815_
 .subckt nand2_x0 i0=$abc$109383$new_n51815_ i1=$abc$109383$new_n51814_ nq=$abc$109383$new_n51816_
-.subckt mx2_x2 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[122][31] i1=soc.ram.ram[126][31] q=$abc$109383$new_n51817_
+.subckt mux2_x1 cmd=$abc$109383$new_n45233_ i0=soc.ram.ram[122][31] i1=soc.ram.ram[126][31] q=$abc$109383$new_n51817_
 .subckt nand2_x0 i0=$abc$109383$new_n51817_ i1=$abc$109383$new_n44918_ nq=$abc$109383$new_n51818_
-.subckt a2_x2 i0=$abc$109383$new_n51818_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n51819_
+.subckt and2_x1 i0=$abc$109383$new_n51818_ i1=$abc$109383$new_n44149_ q=$abc$109383$new_n51819_
 .subckt nand2_x0 i0=$abc$109383$new_n51819_ i1=$abc$109383$new_n51816_ nq=$abc$109383$new_n51820_
-.subckt o2_x2 i0=soc.ram.ram[115][31] i1=$abc$109383$new_n46187_ q=$abc$109383$new_n51821_
-.subckt ao22_x2 i0=soc.ram.ram[119][31] i1=$abc$109383$new_n43805_ i2=$abc$109383$new_n45073_ q=$abc$109383$new_n51822_
+.subckt or2_x1 i0=soc.ram.ram[115][31] i1=$abc$109383$new_n46187_ q=$abc$109383$new_n51821_
+.subckt and21nor_x1 i0=soc.ram.ram[119][31] i1=$abc$109383$new_n43805_ i2=$abc$109383$new_n45073_ nq=$abc$109383$new_n51822_
 .subckt nand2_x0 i0=$abc$109383$new_n51822_ i1=$abc$109383$new_n51821_ nq=$abc$109383$new_n51823_
 .subckt inv_x0 i=soc.ram.ram[118][31] nq=$abc$109383$new_n51824_
 .subckt nand2_x0 i0=$abc$109383$new_n51824_ i1=$abc$109383$new_n43978_ nq=$abc$109383$new_n51825_
-.subckt o2_x2 i0=soc.ram.ram[114][31] i1=$abc$109383$new_n44808_ q=$abc$109383$new_n51826_
-.subckt a2_x2 i0=$abc$109383$new_n51826_ i1=$abc$109383$new_n44630_ q=$abc$109383$new_n51827_
+.subckt or2_x1 i0=soc.ram.ram[114][31] i1=$abc$109383$new_n44808_ q=$abc$109383$new_n51826_
+.subckt and2_x1 i0=$abc$109383$new_n51826_ i1=$abc$109383$new_n44630_ q=$abc$109383$new_n51827_
 .subckt nand2_x0 i0=$abc$109383$new_n51827_ i1=$abc$109383$new_n51825_ nq=$abc$109383$new_n51828_
 .subckt nand3_x0 i0=$abc$109383$new_n51828_ i1=$abc$109383$new_n51823_ i2=$abc$109383$new_n45211_ nq=$abc$109383$new_n51829_
 .subckt nand3_x0 i0=$abc$109383$new_n51829_ i1=$abc$109383$new_n51820_ i2=$abc$109383$new_n44641_ nq=$abc$109383$new_n51830_
-.subckt mx2_x2 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[120][31] i1=soc.ram.ram[124][31] q=$abc$109383$new_n51831_
+.subckt mux2_x1 cmd=$abc$109383$new_n43476_ i0=soc.ram.ram[120][31] i1=soc.ram.ram[124][31] q=$abc$109383$new_n51831_
 .subckt nand2_x0 i0=$abc$109383$new_n51831_ i1=$abc$109383$new_n43903_ nq=$abc$109383$new_n51832_
-.subckt mx2_x2 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[121][31] i1=soc.ram.ram[125][31] q=$abc$109383$new_n51833_
+.subckt mux2_x1 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[121][31] i1=soc.ram.ram[125][31] q=$abc$109383$new_n51833_
 .subckt nand2_x0 i0=$abc$109383$new_n51833_ i1=$abc$109383$new_n44403_ nq=$abc$109383$new_n51834_
 .subckt nand3_x0 i0=$abc$109383$new_n51834_ i1=$abc$109383$new_n51832_ i2=$abc$109383$new_n45393_ nq=$abc$109383$new_n51835_
-.subckt mx2_x2 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[112][31] i1=soc.ram.ram[116][31] q=$abc$109383$new_n51836_
+.subckt mux2_x1 cmd=$abc$109383$new_n44795_ i0=soc.ram.ram[112][31] i1=soc.ram.ram[116][31] q=$abc$109383$new_n51836_
 .subckt nand2_x0 i0=$abc$109383$new_n51836_ i1=$abc$109383$new_n44597_ nq=$abc$109383$new_n51837_
-.subckt mx2_x2 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[113][31] i1=soc.ram.ram[117][31] q=$abc$109383$new_n51838_
+.subckt mux2_x1 cmd=$abc$109383$new_n48096_ i0=soc.ram.ram[113][31] i1=soc.ram.ram[117][31] q=$abc$109383$new_n51838_
 .subckt nand2_x0 i0=$abc$109383$new_n51838_ i1=$abc$109383$new_n44505_ nq=$abc$109383$new_n51839_
 .subckt nand3_x0 i0=$abc$109383$new_n51839_ i1=$abc$109383$new_n51837_ i2=$abc$109383$new_n43433_ nq=$abc$109383$new_n51840_
 .subckt nand3_x0 i0=$abc$109383$new_n51840_ i1=$abc$109383$new_n51835_ i2=$abc$109383$new_n45614_ nq=$abc$109383$new_n51841_
-.subckt a2_x2 i0=$abc$109383$new_n51841_ i1=$abc$109383$new_n43729_ q=$abc$109383$new_n51842_
+.subckt and2_x1 i0=$abc$109383$new_n51841_ i1=$abc$109383$new_n43729_ q=$abc$109383$new_n51842_
 .subckt nand2_x0 i0=$abc$109383$new_n51842_ i1=$abc$109383$new_n51830_ nq=$abc$109383$new_n51843_
 .subckt nand2_x0 i0=$abc$109383$new_n51843_ i1=$abc$109383$new_n51812_ nq=$abc$109383$new_n51844_
-.subckt a2_x2 i0=$abc$109383$new_n51844_ i1=$abc$109383$new_n43464_ q=$abc$109383$new_n51845_
+.subckt and2_x1 i0=$abc$109383$new_n51844_ i1=$abc$109383$new_n43464_ q=$abc$109383$new_n51845_
 .subckt nor3_x0 i0=$abc$109383$new_n51845_ i1=$abc$109383$new_n51776_ i2=$abc$109383$new_n45475_ nq=$abc$109383$new_n51846_
-.subckt ao22_x2 i0=$abc$109383$new_n51846_ i1=$abc$109383$new_n51725_ i2=$abc$109383$new_n43322_ q=$abc$109383$new_n51847_
+.subckt and21nor_x1 i0=$abc$109383$new_n51846_ i1=$abc$109383$new_n51725_ i2=$abc$109383$new_n43322_ nq=$abc$109383$new_n51847_
 .subckt inv_x0 i=soc.bridge.csr_bridge_0.wb__dat_r[31] nq=$abc$109383$new_n51848_
-.subckt o2_x2 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n51848_ q=$abc$109383$new_n51849_
-.subckt o4_x2 i0=$abc$109383$new_n51849_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43312_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n51850_
+.subckt or2_x1 i0=$abc$109383$new_n23713_ i1=$abc$109383$new_n51848_ q=$abc$109383$new_n51849_
+.subckt or4_x1 i0=$abc$109383$new_n51849_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n43312_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n51850_
 .subckt nand4_x0 i0=$abc$109383$new_n46237_ i1=$abc$109383$new_n43298_ i2=$abc$109383$new_n43297_ i3=soc.decoder.data_bus__dat_r[31] nq=$abc$109383$new_n51851_
 .subckt inv_x0 i=soc.hyperram.sr[31] nq=$abc$109383$new_n51852_
-.subckt o4_x2 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n51852_ q=$abc$109383$new_n51853_
-.subckt a2_x2 i0=$abc$109383$new_n51853_ i1=$abc$109383$new_n51851_ q=$abc$109383$new_n51854_
+.subckt or4_x1 i0=$abc$109383$new_n43314_ i1=$abc$109383$new_n45976_ i2=$abc$109383$new_n43310_ i3=$abc$109383$new_n51852_ q=$abc$109383$new_n51853_
+.subckt and2_x1 i0=$abc$109383$new_n51853_ i1=$abc$109383$new_n51851_ q=$abc$109383$new_n51854_
 .subckt nand3_x0 i0=$abc$109383$new_n28184_ i1=$abc$109383$new_n44265_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[31] nq=$abc$109383$new_n51855_
 .subckt nand3_x0 i0=$abc$109383$new_n51855_ i1=$abc$109383$new_n51854_ i2=$abc$109383$new_n51850_ nq=$abc$109383$new_n51856_
-.subckt o3_x2 i0=$abc$109383$new_n51856_ i1=$abc$109383$new_n51847_ i2=$abc$109383$new_n51608_ q=$abc$109383$new_n51857_
-.subckt ao22_x2 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51857_ i2=$abc$109383$new_n51605_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103322
-.subckt xr2_x1 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n29396_ q=$abc$109383$new_n51859_
+.subckt or3_x1 i0=$abc$109383$new_n51856_ i1=$abc$109383$new_n51847_ i2=$abc$109383$new_n51608_ q=$abc$109383$new_n51857_
+.subckt and21nor_x1 i0=$abc$109383$new_n43282_ i1=$abc$109383$new_n51857_ i2=$abc$109383$new_n51605_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103322
+.subckt xor2_x0 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n29396_ q=$abc$109383$new_n51859_
 .subckt nand2_x0 i0=$abc$109383$new_n29381_ i1=$abc$109383$new_n29451_ nq=$abc$109383$new_n51860_
-.subckt xr2_x1 i0=$abc$109383$new_n29380_ i1=$abc$109383$new_n29451_ q=$abc$109383$new_n51861_
-.subckt oa22_x2 i0=$abc$109383$new_n29757_ i1=$abc$109383$new_n29317_ i2=$abc$109383$new_n51861_ q=$abc$109383$new_n51862_
+.subckt xor2_x0 i0=$abc$109383$new_n29380_ i1=$abc$109383$new_n29451_ q=$abc$109383$new_n51861_
+.subckt or21nand_x1 i0=$abc$109383$new_n29757_ i1=$abc$109383$new_n29317_ i2=$abc$109383$new_n51861_ nq=$abc$109383$new_n51862_
 .subckt nand2_x0 i0=$abc$109383$new_n51862_ i1=$abc$109383$new_n51860_ nq=$abc$109383$new_n51863_
 .subckt nor2_x0 i0=$abc$109383$new_n29385_ i1=$abc$109383$new_n29451_ nq=$abc$109383$new_n51864_
-.subckt oa22_x2 i0=$abc$109383$new_n30299_ i1=$abc$109383$new_n30337_ i2=$abc$109383$new_n51864_ q=$abc$109383$new_n51865_
+.subckt or21nand_x1 i0=$abc$109383$new_n30299_ i1=$abc$109383$new_n30337_ i2=$abc$109383$new_n51864_ nq=$abc$109383$new_n51865_
 .subckt buf_x4 i=soc.cpu.minerva.adder.x_sub q=$abc$109383$new_n51866_
-.subckt mx2_x2 cmd=$abc$109383$new_n51866_ i0=$abc$109383$new_n51865_ i1=$abc$109383$new_n51863_ q=$abc$109383$new_n51867_
-.subckt nxr2_x1 i0=$abc$109383$new_n51867_ i1=$abc$109383$new_n51859_ nq=$abc$109383$new_n51868_
+.subckt mux2_x1 cmd=$abc$109383$new_n51866_ i0=$abc$109383$new_n51865_ i1=$abc$109383$new_n51863_ q=$abc$109383$new_n51867_
+.subckt nexor2_x0 i0=$abc$109383$new_n51867_ i1=$abc$109383$new_n51859_ nq=$abc$109383$new_n51868_
 .subckt nand3_x0 i0=$abc$109383$new_n43284_ i1=$abc$109383$new_n15258_ i2=$abc$109383$new_n29192_ nq=$abc$109383$new_n51869_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n51870_
-.subckt mx2_x2 cmd=$abc$109383$new_n51870_ i0=$abc$109383$new_n51868_ i1=soc.cpu.minerva.loadstore.dbus__adr[0] q=$abc$109383$new_n51871_
-.subckt a2_x2 i0=$abc$109383$new_n51871_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103326
-.subckt xr2_x1 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n29421_ q=$abc$109383$new_n51873_
-.subckt a2_x2 i0=$abc$109383$new_n29262_ i1=$abc$109383$new_n29395_ q=$abc$109383$new_n51874_
-.subckt nxr2_x1 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n29395_ nq=$abc$109383$new_n51875_
-.subckt oa22_x2 i0=$abc$109383$new_n51875_ i1=$abc$109383$new_n51863_ i2=$abc$109383$new_n51874_ q=$abc$109383$new_n51876_
+.subckt mux2_x1 cmd=$abc$109383$new_n51870_ i0=$abc$109383$new_n51868_ i1=soc.cpu.minerva.loadstore.dbus__adr[0] q=$abc$109383$new_n51871_
+.subckt and2_x1 i0=$abc$109383$new_n51871_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103326
+.subckt xor2_x0 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n29421_ q=$abc$109383$new_n51873_
+.subckt and2_x1 i0=$abc$109383$new_n29262_ i1=$abc$109383$new_n29395_ q=$abc$109383$new_n51874_
+.subckt nexor2_x0 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n29395_ nq=$abc$109383$new_n51875_
+.subckt or21nand_x1 i0=$abc$109383$new_n51875_ i1=$abc$109383$new_n51863_ i2=$abc$109383$new_n51874_ nq=$abc$109383$new_n51876_
 .subckt nor2_x0 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n29396_ nq=$abc$109383$new_n51877_
-.subckt oa22_x2 i0=$abc$109383$new_n30353_ i1=$abc$109383$new_n51865_ i2=$abc$109383$new_n51877_ q=$abc$109383$new_n51878_
-.subckt mx2_x2 cmd=$abc$109383$new_n51866_ i0=$abc$109383$new_n51878_ i1=$abc$109383$new_n51876_ q=$abc$109383$new_n51879_
-.subckt nxr2_x1 i0=$abc$109383$new_n51879_ i1=$abc$109383$new_n51873_ nq=$abc$109383$new_n51880_
-.subckt mx2_x2 cmd=$abc$109383$new_n51870_ i0=$abc$109383$new_n51880_ i1=soc.cpu.minerva.loadstore.dbus__adr[1] q=$abc$109383$new_n51881_
-.subckt a2_x2 i0=$abc$109383$new_n51881_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103330
-.subckt xr2_x1 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n51883_
-.subckt a2_x2 i0=$abc$109383$new_n29248_ i1=$abc$109383$new_n29420_ q=$abc$109383$new_n51884_
+.subckt or21nand_x1 i0=$abc$109383$new_n30353_ i1=$abc$109383$new_n51865_ i2=$abc$109383$new_n51877_ nq=$abc$109383$new_n51878_
+.subckt mux2_x1 cmd=$abc$109383$new_n51866_ i0=$abc$109383$new_n51878_ i1=$abc$109383$new_n51876_ q=$abc$109383$new_n51879_
+.subckt nexor2_x0 i0=$abc$109383$new_n51879_ i1=$abc$109383$new_n51873_ nq=$abc$109383$new_n51880_
+.subckt mux2_x1 cmd=$abc$109383$new_n51870_ i0=$abc$109383$new_n51880_ i1=soc.cpu.minerva.loadstore.dbus__adr[1] q=$abc$109383$new_n51881_
+.subckt and2_x1 i0=$abc$109383$new_n51881_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103330
+.subckt xor2_x0 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n51883_
+.subckt and2_x1 i0=$abc$109383$new_n29248_ i1=$abc$109383$new_n29420_ q=$abc$109383$new_n51884_
 .subckt nand2_x0 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n29746_ nq=$abc$109383$new_n51885_
-.subckt oa22_x2 i0=$abc$109383$new_n51876_ i1=$abc$109383$new_n51885_ i2=$abc$109383$new_n51884_ q=$abc$109383$new_n51886_
-.subckt o2_x2 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n29420_ q=$abc$109383$new_n51887_
-.subckt o2_x2 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29395_ q=$abc$109383$new_n51888_
-.subckt o2_x2 i0=$abc$109383$new_n29380_ i1=$abc$109383$new_n29451_ q=$abc$109383$new_n51889_
-.subckt a2_x2 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29474_ q=$abc$109383$new_n51890_
-.subckt ao22_x2 i0=$abc$109383$new_n51890_ i1=$abc$109383$new_n30314_ i2=$abc$109383$new_n51889_ q=$abc$109383$new_n51891_
-.subckt a2_x2 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29395_ q=$abc$109383$new_n51892_
-.subckt ao22_x2 i0=$abc$109383$new_n51892_ i1=$abc$109383$new_n51891_ i2=$abc$109383$new_n51888_ q=$abc$109383$new_n51893_
+.subckt or21nand_x1 i0=$abc$109383$new_n51876_ i1=$abc$109383$new_n51885_ i2=$abc$109383$new_n51884_ nq=$abc$109383$new_n51886_
+.subckt or2_x1 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n29420_ q=$abc$109383$new_n51887_
+.subckt or2_x1 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29395_ q=$abc$109383$new_n51888_
+.subckt or2_x1 i0=$abc$109383$new_n29380_ i1=$abc$109383$new_n29451_ q=$abc$109383$new_n51889_
+.subckt and2_x1 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29474_ q=$abc$109383$new_n51890_
+.subckt and21nor_x1 i0=$abc$109383$new_n51890_ i1=$abc$109383$new_n30314_ i2=$abc$109383$new_n51889_ nq=$abc$109383$new_n51891_
+.subckt and2_x1 i0=$abc$109383$new_n29261_ i1=$abc$109383$new_n29395_ q=$abc$109383$new_n51892_
+.subckt and21nor_x1 i0=$abc$109383$new_n51892_ i1=$abc$109383$new_n51891_ i2=$abc$109383$new_n51888_ nq=$abc$109383$new_n51893_
 .subckt nand2_x0 i0=$abc$109383$new_n51893_ i1=$abc$109383$new_n51887_ nq=$abc$109383$new_n51894_
-.subckt a2_x2 i0=$abc$109383$new_n51894_ i1=$abc$109383$new_n30519_ q=$abc$109383$new_n51895_
+.subckt and2_x1 i0=$abc$109383$new_n51894_ i1=$abc$109383$new_n30519_ q=$abc$109383$new_n51895_
 .subckt buf_x4 i=$abc$109383$new_n51866_ q=$abc$109383$new_n51896_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51895_ i1=$abc$109383$new_n51886_ q=$abc$109383$new_n51897_
-.subckt nxr2_x1 i0=$abc$109383$new_n51897_ i1=$abc$109383$new_n51883_ nq=$abc$109383$new_n51898_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51895_ i1=$abc$109383$new_n51886_ q=$abc$109383$new_n51897_
+.subckt nexor2_x0 i0=$abc$109383$new_n51897_ i1=$abc$109383$new_n51883_ nq=$abc$109383$new_n51898_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n51899_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n51898_ i1=soc.cpu.minerva.loadstore.dbus__adr[2] q=$abc$109383$new_n51900_
-.subckt a2_x2 i0=$abc$109383$new_n51900_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103334
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[3] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51902_
-.subckt xr2_x1 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n51903_
-.subckt a2_x2 i0=$abc$109383$new_n29238_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n51904_
-.subckt nxr2_x1 i0=$abc$109383$new_n29237_ i1=$abc$109383$new_n29274_ nq=$abc$109383$new_n51905_
-.subckt oa22_x2 i0=$abc$109383$new_n51905_ i1=$abc$109383$new_n51886_ i2=$abc$109383$new_n51904_ q=$abc$109383$new_n51906_
-.subckt o2_x2 i0=$abc$109383$new_n29237_ i1=$abc$109383$new_n29274_ q=$abc$109383$new_n51907_
-.subckt ao22_x2 i0=$abc$109383$new_n30452_ i1=$abc$109383$new_n51893_ i2=$abc$109383$new_n51887_ q=$abc$109383$new_n51908_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n51898_ i1=soc.cpu.minerva.loadstore.dbus__adr[2] q=$abc$109383$new_n51900_
+.subckt and2_x1 i0=$abc$109383$new_n51900_ i1=$abc$109383$new_n43238_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103334
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[3] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51902_
+.subckt xor2_x0 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n51903_
+.subckt and2_x1 i0=$abc$109383$new_n29238_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n51904_
+.subckt nexor2_x0 i0=$abc$109383$new_n29237_ i1=$abc$109383$new_n29274_ nq=$abc$109383$new_n51905_
+.subckt or21nand_x1 i0=$abc$109383$new_n51905_ i1=$abc$109383$new_n51886_ i2=$abc$109383$new_n51904_ nq=$abc$109383$new_n51906_
+.subckt or2_x1 i0=$abc$109383$new_n29237_ i1=$abc$109383$new_n29274_ q=$abc$109383$new_n51907_
+.subckt and21nor_x1 i0=$abc$109383$new_n30452_ i1=$abc$109383$new_n51893_ i2=$abc$109383$new_n51887_ nq=$abc$109383$new_n51908_
 .subckt nand2_x0 i0=$abc$109383$new_n51908_ i1=$abc$109383$new_n51907_ nq=$abc$109383$new_n51909_
-.subckt a2_x2 i0=$abc$109383$new_n51909_ i1=$abc$109383$new_n30676_ q=$abc$109383$new_n51910_
+.subckt and2_x1 i0=$abc$109383$new_n51909_ i1=$abc$109383$new_n30676_ q=$abc$109383$new_n51910_
 .subckt buf_x4 i=$abc$109383$new_n51866_ q=$abc$109383$new_n51911_
-.subckt mx2_x2 cmd=$abc$109383$new_n51911_ i0=$abc$109383$new_n51910_ i1=$abc$109383$new_n51906_ q=$abc$109383$new_n51912_
-.subckt nxr2_x1 i0=$abc$109383$new_n51912_ i1=$abc$109383$new_n51903_ nq=$abc$109383$new_n51913_
+.subckt mux2_x1 cmd=$abc$109383$new_n51911_ i0=$abc$109383$new_n51910_ i1=$abc$109383$new_n51906_ q=$abc$109383$new_n51912_
+.subckt nexor2_x0 i0=$abc$109383$new_n51912_ i1=$abc$109383$new_n51903_ nq=$abc$109383$new_n51913_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n51914_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51913_ i2=$abc$109383$new_n51902_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103338
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[4] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51916_
-.subckt xr2_x1 i0=$abc$109383$new_n36592_ i1=$abc$109383$new_n29331_ q=$abc$109383$new_n51917_
-.subckt a2_x2 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n51918_
-.subckt nxr2_x1 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29298_ nq=$abc$109383$new_n51919_
-.subckt oa22_x2 i0=$abc$109383$new_n51919_ i1=$abc$109383$new_n51906_ i2=$abc$109383$new_n51918_ q=$abc$109383$new_n51920_
-.subckt a2_x2 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29297_ q=$abc$109383$new_n51921_
-.subckt o2_x2 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n51922_
-.subckt ao22_x2 i0=$abc$109383$new_n30607_ i1=$abc$109383$new_n51908_ i2=$abc$109383$new_n51907_ q=$abc$109383$new_n51923_
-.subckt a2_x2 i0=$abc$109383$new_n51923_ i1=$abc$109383$new_n51922_ q=$abc$109383$new_n51924_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51913_ i2=$abc$109383$new_n51902_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103338
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[4] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51916_
+.subckt xor2_x0 i0=$abc$109383$new_n36592_ i1=$abc$109383$new_n29331_ q=$abc$109383$new_n51917_
+.subckt and2_x1 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n51918_
+.subckt nexor2_x0 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29298_ nq=$abc$109383$new_n51919_
+.subckt or21nand_x1 i0=$abc$109383$new_n51919_ i1=$abc$109383$new_n51906_ i2=$abc$109383$new_n51918_ nq=$abc$109383$new_n51920_
+.subckt and2_x1 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29297_ q=$abc$109383$new_n51921_
+.subckt or2_x1 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n51922_
+.subckt and21nor_x1 i0=$abc$109383$new_n30607_ i1=$abc$109383$new_n51908_ i2=$abc$109383$new_n51907_ nq=$abc$109383$new_n51923_
+.subckt and2_x1 i0=$abc$109383$new_n51923_ i1=$abc$109383$new_n51922_ q=$abc$109383$new_n51924_
 .subckt nor2_x0 i0=$abc$109383$new_n51924_ i1=$abc$109383$new_n51921_ nq=$abc$109383$new_n51925_
-.subckt mx2_x2 cmd=$abc$109383$new_n51911_ i0=$abc$109383$new_n51925_ i1=$abc$109383$new_n51920_ q=$abc$109383$new_n51926_
-.subckt nxr2_x1 i0=$abc$109383$new_n51926_ i1=$abc$109383$new_n51917_ nq=$abc$109383$new_n51927_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51927_ i2=$abc$109383$new_n51916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103342
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[5] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51929_
-.subckt xr2_x1 i0=$abc$109383$new_n37587_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n51930_
+.subckt mux2_x1 cmd=$abc$109383$new_n51911_ i0=$abc$109383$new_n51925_ i1=$abc$109383$new_n51920_ q=$abc$109383$new_n51926_
+.subckt nexor2_x0 i0=$abc$109383$new_n51926_ i1=$abc$109383$new_n51917_ nq=$abc$109383$new_n51927_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51927_ i2=$abc$109383$new_n51916_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103342
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[5] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51929_
+.subckt xor2_x0 i0=$abc$109383$new_n37587_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n51930_
 .subckt nand2_x0 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n29298_ nq=$abc$109383$new_n51931_
 .subckt nand3_x0 i0=$abc$109383$new_n51919_ i1=$abc$109383$new_n29238_ i2=$abc$109383$new_n29274_ nq=$abc$109383$new_n51932_
-.subckt a2_x2 i0=$abc$109383$new_n51932_ i1=$abc$109383$new_n51931_ q=$abc$109383$new_n51933_
+.subckt and2_x1 i0=$abc$109383$new_n51932_ i1=$abc$109383$new_n51931_ q=$abc$109383$new_n51933_
 .subckt nand3_x0 i0=$abc$109383$new_n51919_ i1=$abc$109383$new_n51886_ i2=$abc$109383$new_n51905_ nq=$abc$109383$new_n51934_
-.subckt oa22_x2 i0=$abc$109383$new_n51934_ i1=$abc$109383$new_n51933_ i2=$abc$109383$new_n51917_ q=$abc$109383$new_n51935_
+.subckt or21nand_x1 i0=$abc$109383$new_n51934_ i1=$abc$109383$new_n51933_ i2=$abc$109383$new_n51917_ nq=$abc$109383$new_n51935_
 .subckt inv_x1 i=$abc$109383$new_n36592_ nq=$abc$109383$new_n51936_
 .subckt nand2_x0 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n29332_ nq=$abc$109383$new_n51937_
 .subckt nand2_x0 i0=$abc$109383$new_n51937_ i1=$abc$109383$new_n51935_ nq=$abc$109383$new_n51938_
-.subckt ao22_x2 i0=$abc$109383$new_n51921_ i1=$abc$109383$new_n51923_ i2=$abc$109383$new_n51922_ q=$abc$109383$new_n51939_
-.subckt a2_x2 i0=$abc$109383$new_n51939_ i1=$abc$109383$new_n51917_ q=$abc$109383$new_n51940_
+.subckt and21nor_x1 i0=$abc$109383$new_n51921_ i1=$abc$109383$new_n51923_ i2=$abc$109383$new_n51922_ nq=$abc$109383$new_n51939_
+.subckt and2_x1 i0=$abc$109383$new_n51939_ i1=$abc$109383$new_n51917_ q=$abc$109383$new_n51940_
 .subckt nor2_x0 i0=$abc$109383$new_n51940_ i1=$abc$109383$new_n31015_ nq=$abc$109383$new_n51941_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51941_ i1=$abc$109383$new_n51938_ q=$abc$109383$new_n51942_
-.subckt nxr2_x1 i0=$abc$109383$new_n51942_ i1=$abc$109383$new_n51930_ nq=$abc$109383$new_n51943_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51943_ i2=$abc$109383$new_n51929_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103346
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[6] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51945_
-.subckt xr2_x1 i0=$abc$109383$new_n37588_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n51946_
-.subckt o2_x2 i0=$abc$109383$new_n37587_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n51947_
-.subckt oa22_x2 i0=$abc$109383$new_n51939_ i1=$abc$109383$new_n51917_ i2=$abc$109383$new_n31015_ q=$abc$109383$new_n51948_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51941_ i1=$abc$109383$new_n51938_ q=$abc$109383$new_n51942_
+.subckt nexor2_x0 i0=$abc$109383$new_n51942_ i1=$abc$109383$new_n51930_ nq=$abc$109383$new_n51943_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51943_ i2=$abc$109383$new_n51929_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103346
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[6] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51945_
+.subckt xor2_x0 i0=$abc$109383$new_n37588_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n51946_
+.subckt or2_x1 i0=$abc$109383$new_n37587_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n51947_
+.subckt or21nand_x1 i0=$abc$109383$new_n51939_ i1=$abc$109383$new_n51917_ i2=$abc$109383$new_n31015_ nq=$abc$109383$new_n51948_
 .subckt nand2_x0 i0=$abc$109383$new_n51948_ i1=$abc$109383$new_n51947_ nq=$abc$109383$new_n51949_
-.subckt a2_x2 i0=$abc$109383$new_n51949_ i1=$abc$109383$new_n31426_ q=$abc$109383$new_n51950_
+.subckt and2_x1 i0=$abc$109383$new_n51949_ i1=$abc$109383$new_n31426_ q=$abc$109383$new_n51950_
 .subckt inv_x1 i=$abc$109383$new_n37587_ nq=$abc$109383$new_n51951_
-.subckt a2_x2 i0=$abc$109383$new_n51951_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n51952_
-.subckt a2_x2 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n29332_ q=$abc$109383$new_n51953_
-.subckt nxr2_x1 i0=$abc$109383$new_n37587_ i1=$abc$109383$new_n29354_ nq=$abc$109383$new_n51954_
-.subckt oa22_x2 i0=$abc$109383$new_n51954_ i1=$abc$109383$new_n51953_ i2=$abc$109383$new_n51952_ q=$abc$109383$new_n51955_
-.subckt nxr2_x1 i0=$abc$109383$new_n36592_ i1=$abc$109383$new_n29331_ nq=$abc$109383$new_n51956_
+.subckt and2_x1 i0=$abc$109383$new_n51951_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n51952_
+.subckt and2_x1 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n29332_ q=$abc$109383$new_n51953_
+.subckt nexor2_x0 i0=$abc$109383$new_n37587_ i1=$abc$109383$new_n29354_ nq=$abc$109383$new_n51954_
+.subckt or21nand_x1 i0=$abc$109383$new_n51954_ i1=$abc$109383$new_n51953_ i2=$abc$109383$new_n51952_ nq=$abc$109383$new_n51955_
+.subckt nexor2_x0 i0=$abc$109383$new_n36592_ i1=$abc$109383$new_n29331_ nq=$abc$109383$new_n51956_
 .subckt nand2_x0 i0=$abc$109383$new_n51932_ i1=$abc$109383$new_n51931_ nq=$abc$109383$new_n51957_
-.subckt a3_x2 i0=$abc$109383$new_n51919_ i1=$abc$109383$new_n51886_ i2=$abc$109383$new_n51905_ q=$abc$109383$new_n51958_
-.subckt ao22_x2 i0=$abc$109383$new_n51958_ i1=$abc$109383$new_n51957_ i2=$abc$109383$new_n51956_ q=$abc$109383$new_n51959_
-.subckt oa22_x2 i0=$abc$109383$new_n51954_ i1=$abc$109383$new_n51959_ i2=$abc$109383$new_n51955_ q=$abc$109383$new_n51960_
+.subckt and3_x1 i0=$abc$109383$new_n51919_ i1=$abc$109383$new_n51886_ i2=$abc$109383$new_n51905_ q=$abc$109383$new_n51958_
+.subckt and21nor_x1 i0=$abc$109383$new_n51958_ i1=$abc$109383$new_n51957_ i2=$abc$109383$new_n51956_ nq=$abc$109383$new_n51959_
+.subckt or21nand_x1 i0=$abc$109383$new_n51954_ i1=$abc$109383$new_n51959_ i2=$abc$109383$new_n51955_ nq=$abc$109383$new_n51960_
 .subckt inv_x1 i=soc.cpu.minerva.adder.x_sub nq=$abc$109383$new_n51961_
 .subckt buf_x4 i=$abc$109383$new_n51961_ q=$abc$109383$new_n51962_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n51960_ i1=$abc$109383$new_n51950_ q=$abc$109383$new_n51963_
-.subckt nxr2_x1 i0=$abc$109383$new_n51963_ i1=$abc$109383$new_n51946_ nq=$abc$109383$new_n51964_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51964_ i2=$abc$109383$new_n51945_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103350
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[7] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51966_
-.subckt xr2_x1 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n51967_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n51960_ i1=$abc$109383$new_n51950_ q=$abc$109383$new_n51963_
+.subckt nexor2_x0 i0=$abc$109383$new_n51963_ i1=$abc$109383$new_n51946_ nq=$abc$109383$new_n51964_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51964_ i2=$abc$109383$new_n51945_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103350
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[7] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51966_
+.subckt xor2_x0 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n51967_
 .subckt inv_x1 i=$abc$109383$new_n37588_ nq=$abc$109383$new_n51968_
-.subckt a2_x2 i0=$abc$109383$new_n51968_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n51969_
-.subckt nxr2_x1 i0=$abc$109383$new_n37588_ i1=$abc$109383$new_n29510_ nq=$abc$109383$new_n51970_
-.subckt oa22_x2 i0=$abc$109383$new_n51970_ i1=$abc$109383$new_n51960_ i2=$abc$109383$new_n51969_ q=$abc$109383$new_n51971_
-.subckt ao22_x2 i0=$abc$109383$new_n31288_ i1=$abc$109383$new_n51948_ i2=$abc$109383$new_n51947_ q=$abc$109383$new_n51972_
+.subckt and2_x1 i0=$abc$109383$new_n51968_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n51969_
+.subckt nexor2_x0 i0=$abc$109383$new_n37588_ i1=$abc$109383$new_n29510_ nq=$abc$109383$new_n51970_
+.subckt or21nand_x1 i0=$abc$109383$new_n51970_ i1=$abc$109383$new_n51960_ i2=$abc$109383$new_n51969_ nq=$abc$109383$new_n51971_
+.subckt and21nor_x1 i0=$abc$109383$new_n31288_ i1=$abc$109383$new_n51948_ i2=$abc$109383$new_n51947_ nq=$abc$109383$new_n51972_
 .subckt nand2_x0 i0=$abc$109383$new_n51972_ i1=$abc$109383$new_n51946_ nq=$abc$109383$new_n51973_
-.subckt a2_x2 i0=$abc$109383$new_n51973_ i1=$abc$109383$new_n31583_ q=$abc$109383$new_n51974_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51974_ i1=$abc$109383$new_n51971_ q=$abc$109383$new_n51975_
-.subckt nxr2_x1 i0=$abc$109383$new_n51975_ i1=$abc$109383$new_n51967_ nq=$abc$109383$new_n51976_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51976_ i2=$abc$109383$new_n51966_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103354
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[8] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51978_
-.subckt xr2_x1 i0=$abc$109383$new_n38513_ i1=$abc$109383$new_n29557_ q=$abc$109383$new_n51979_
-.subckt o2_x2 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n51980_
+.subckt and2_x1 i0=$abc$109383$new_n51973_ i1=$abc$109383$new_n31583_ q=$abc$109383$new_n51974_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51974_ i1=$abc$109383$new_n51971_ q=$abc$109383$new_n51975_
+.subckt nexor2_x0 i0=$abc$109383$new_n51975_ i1=$abc$109383$new_n51967_ nq=$abc$109383$new_n51976_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51976_ i2=$abc$109383$new_n51966_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103354
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[8] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51978_
+.subckt xor2_x0 i0=$abc$109383$new_n38513_ i1=$abc$109383$new_n29557_ q=$abc$109383$new_n51979_
+.subckt or2_x1 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n51980_
 .subckt nand2_x0 i0=$abc$109383$new_n32111_ i1=$abc$109383$new_n31583_ nq=$abc$109383$new_n51981_
-.subckt oa22_x2 i0=$abc$109383$new_n51946_ i1=$abc$109383$new_n51972_ i2=$abc$109383$new_n51981_ q=$abc$109383$new_n51982_
+.subckt or21nand_x1 i0=$abc$109383$new_n51946_ i1=$abc$109383$new_n51972_ i2=$abc$109383$new_n51981_ nq=$abc$109383$new_n51982_
 .subckt nand2_x0 i0=$abc$109383$new_n51982_ i1=$abc$109383$new_n51980_ nq=$abc$109383$new_n51983_
 .subckt nand2_x0 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29720_ nq=$abc$109383$new_n51984_
 .subckt inv_x1 i=$abc$109383$new_n38535_ nq=$abc$109383$new_n51985_
-.subckt a2_x2 i0=$abc$109383$new_n51985_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n51986_
-.subckt ao22_x2 i0=$abc$109383$new_n51971_ i1=$abc$109383$new_n51986_ i2=$abc$109383$new_n51984_ q=$abc$109383$new_n51987_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n51987_ i1=$abc$109383$new_n51983_ q=$abc$109383$new_n51988_
-.subckt nxr2_x1 i0=$abc$109383$new_n51988_ i1=$abc$109383$new_n51979_ nq=$abc$109383$new_n51989_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51989_ i2=$abc$109383$new_n51978_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103358
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[9] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n51991_
-.subckt xr2_x1 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n51992_
+.subckt and2_x1 i0=$abc$109383$new_n51985_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n51986_
+.subckt and21nor_x1 i0=$abc$109383$new_n51971_ i1=$abc$109383$new_n51986_ i2=$abc$109383$new_n51984_ nq=$abc$109383$new_n51987_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n51987_ i1=$abc$109383$new_n51983_ q=$abc$109383$new_n51988_
+.subckt nexor2_x0 i0=$abc$109383$new_n51988_ i1=$abc$109383$new_n51979_ nq=$abc$109383$new_n51989_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n51989_ i2=$abc$109383$new_n51978_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103358
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[9] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n51991_
+.subckt xor2_x0 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n51992_
 .subckt inv_x1 i=$abc$109383$new_n38513_ nq=$abc$109383$new_n51993_
-.subckt a2_x2 i0=$abc$109383$new_n51993_ i1=$abc$109383$new_n29558_ q=$abc$109383$new_n51994_
-.subckt nxr2_x1 i0=$abc$109383$new_n38513_ i1=$abc$109383$new_n29558_ nq=$abc$109383$new_n51995_
-.subckt oa22_x2 i0=$abc$109383$new_n51995_ i1=$abc$109383$new_n51987_ i2=$abc$109383$new_n51994_ q=$abc$109383$new_n51996_
-.subckt a3_x2 i0=$abc$109383$new_n51982_ i1=$abc$109383$new_n51979_ i2=$abc$109383$new_n51980_ q=$abc$109383$new_n51997_
+.subckt and2_x1 i0=$abc$109383$new_n51993_ i1=$abc$109383$new_n29558_ q=$abc$109383$new_n51994_
+.subckt nexor2_x0 i0=$abc$109383$new_n38513_ i1=$abc$109383$new_n29558_ nq=$abc$109383$new_n51995_
+.subckt or21nand_x1 i0=$abc$109383$new_n51995_ i1=$abc$109383$new_n51987_ i2=$abc$109383$new_n51994_ nq=$abc$109383$new_n51996_
+.subckt and3_x1 i0=$abc$109383$new_n51982_ i1=$abc$109383$new_n51979_ i2=$abc$109383$new_n51980_ q=$abc$109383$new_n51997_
 .subckt nor2_x0 i0=$abc$109383$new_n51997_ i1=$abc$109383$new_n32363_ nq=$abc$109383$new_n51998_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51998_ i1=$abc$109383$new_n51996_ q=$abc$109383$new_n51999_
-.subckt nxr2_x1 i0=$abc$109383$new_n51999_ i1=$abc$109383$new_n51992_ nq=$abc$109383$new_n52000_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52000_ i2=$abc$109383$new_n51991_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103362
-.subckt ao22_x2 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[10] i2=$abc$109383$new_n41472_ q=$abc$109383$new_n52002_
-.subckt nxr2_x1 i0=$abc$109383$new_n38874_ i1=$abc$109383$new_n29608_ nq=$abc$109383$new_n52003_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n51998_ i1=$abc$109383$new_n51996_ q=$abc$109383$new_n51999_
+.subckt nexor2_x0 i0=$abc$109383$new_n51999_ i1=$abc$109383$new_n51992_ nq=$abc$109383$new_n52000_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52000_ i2=$abc$109383$new_n51991_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103362
+.subckt and21nor_x1 i0=$abc$109383$new_n43287_ i1=soc.cpu.minerva.loadstore.dbus__adr[10] i2=$abc$109383$new_n41472_ nq=$abc$109383$new_n52002_
+.subckt nexor2_x0 i0=$abc$109383$new_n38874_ i1=$abc$109383$new_n29608_ nq=$abc$109383$new_n52003_
 .subckt nand2_x0 i0=$abc$109383$new_n38881_ i1=$abc$109383$new_n29582_ nq=$abc$109383$new_n52004_
-.subckt nxr2_x1 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n29582_ nq=$abc$109383$new_n52005_
+.subckt nexor2_x0 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n29582_ nq=$abc$109383$new_n52005_
 .subckt nand3_x0 i0=$abc$109383$new_n52005_ i1=$abc$109383$new_n51993_ i2=$abc$109383$new_n29558_ nq=$abc$109383$new_n52006_
-.subckt a2_x2 i0=$abc$109383$new_n52006_ i1=$abc$109383$new_n52004_ q=$abc$109383$new_n52007_
-.subckt a2_x2 i0=$abc$109383$new_n52005_ i1=$abc$109383$new_n51995_ q=$abc$109383$new_n52008_
+.subckt and2_x1 i0=$abc$109383$new_n52006_ i1=$abc$109383$new_n52004_ q=$abc$109383$new_n52007_
+.subckt and2_x1 i0=$abc$109383$new_n52005_ i1=$abc$109383$new_n51995_ q=$abc$109383$new_n52008_
 .subckt nand2_x0 i0=$abc$109383$new_n52008_ i1=$abc$109383$new_n51987_ nq=$abc$109383$new_n52009_
-.subckt a2_x2 i0=$abc$109383$new_n52009_ i1=$abc$109383$new_n52007_ q=$abc$109383$new_n52010_
-.subckt o2_x2 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n52011_
+.subckt and2_x1 i0=$abc$109383$new_n52009_ i1=$abc$109383$new_n52007_ q=$abc$109383$new_n52010_
+.subckt or2_x1 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n52011_
 .subckt nand2_x0 i0=$abc$109383$new_n32792_ i1=$abc$109383$new_n32531_ nq=$abc$109383$new_n52012_
-.subckt ao22_x2 i0=$abc$109383$new_n52012_ i1=$abc$109383$new_n51997_ i2=$abc$109383$new_n52011_ q=$abc$109383$new_n52013_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52013_ i1=$abc$109383$new_n52010_ q=$abc$109383$new_n52014_
-.subckt nxr2_x1 i0=$abc$109383$new_n52014_ i1=$abc$109383$new_n52003_ nq=$abc$109383$new_n52015_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52015_ i2=$abc$109383$new_n52002_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103366
+.subckt and21nor_x1 i0=$abc$109383$new_n52012_ i1=$abc$109383$new_n51997_ i2=$abc$109383$new_n52011_ nq=$abc$109383$new_n52013_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52013_ i1=$abc$109383$new_n52010_ q=$abc$109383$new_n52014_
+.subckt nexor2_x0 i0=$abc$109383$new_n52014_ i1=$abc$109383$new_n52003_ nq=$abc$109383$new_n52015_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52015_ i2=$abc$109383$new_n52002_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103366
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n52017_
 .subckt buf_x4 i=$abc$109383$new_n43285_ q=$abc$109383$new_n52018_
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[11] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52019_
-.subckt xr2_x1 i0=$abc$109383$new_n39378_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n52020_
-.subckt xr2_x1 i0=$abc$109383$new_n38874_ i1=$abc$109383$new_n29608_ q=$abc$109383$new_n52021_
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[11] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52019_
+.subckt xor2_x0 i0=$abc$109383$new_n39378_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n52020_
+.subckt xor2_x0 i0=$abc$109383$new_n38874_ i1=$abc$109383$new_n29608_ q=$abc$109383$new_n52021_
 .subckt nand2_x0 i0=$abc$109383$new_n52013_ i1=$abc$109383$new_n52021_ nq=$abc$109383$new_n52022_
-.subckt a2_x2 i0=$abc$109383$new_n52022_ i1=$abc$109383$new_n33515_ q=$abc$109383$new_n52023_
-.subckt oa22_x2 i0=$abc$109383$new_n52009_ i1=$abc$109383$new_n52007_ i2=$abc$109383$new_n52021_ q=$abc$109383$new_n52024_
+.subckt and2_x1 i0=$abc$109383$new_n52022_ i1=$abc$109383$new_n33515_ q=$abc$109383$new_n52023_
+.subckt or21nand_x1 i0=$abc$109383$new_n52009_ i1=$abc$109383$new_n52007_ i2=$abc$109383$new_n52021_ nq=$abc$109383$new_n52024_
 .subckt inv_x2 i=$abc$109383$new_n38874_ nq=$abc$109383$new_n52025_
 .subckt nand2_x0 i0=$abc$109383$new_n52025_ i1=$abc$109383$new_n29608_ nq=$abc$109383$new_n52026_
 .subckt nand2_x0 i0=$abc$109383$new_n52026_ i1=$abc$109383$new_n52024_ nq=$abc$109383$new_n52027_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52027_ i1=$abc$109383$new_n52023_ q=$abc$109383$new_n52028_
-.subckt nxr2_x1 i0=$abc$109383$new_n52028_ i1=$abc$109383$new_n52020_ nq=$abc$109383$new_n52029_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52029_ i2=$abc$109383$new_n52019_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103370
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[12] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52031_
-.subckt xr2_x1 i0=$abc$109383$new_n39379_ i1=$abc$109383$new_n29655_ q=$abc$109383$new_n52032_
-.subckt o2_x2 i0=$abc$109383$new_n39378_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n52033_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52027_ i1=$abc$109383$new_n52023_ q=$abc$109383$new_n52028_
+.subckt nexor2_x0 i0=$abc$109383$new_n52028_ i1=$abc$109383$new_n52020_ nq=$abc$109383$new_n52029_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52029_ i2=$abc$109383$new_n52019_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103370
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[12] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52031_
+.subckt xor2_x0 i0=$abc$109383$new_n39379_ i1=$abc$109383$new_n29655_ q=$abc$109383$new_n52032_
+.subckt or2_x1 i0=$abc$109383$new_n39378_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n52033_
 .subckt nand2_x0 i0=$abc$109383$new_n34050_ i1=$abc$109383$new_n33515_ nq=$abc$109383$new_n52034_
-.subckt oa22_x2 i0=$abc$109383$new_n52021_ i1=$abc$109383$new_n52013_ i2=$abc$109383$new_n52034_ q=$abc$109383$new_n52035_
+.subckt or21nand_x1 i0=$abc$109383$new_n52021_ i1=$abc$109383$new_n52013_ i2=$abc$109383$new_n52034_ nq=$abc$109383$new_n52035_
 .subckt nand2_x0 i0=$abc$109383$new_n52035_ i1=$abc$109383$new_n52033_ nq=$abc$109383$new_n52036_
 .subckt inv_x1 i=$abc$109383$new_n39378_ nq=$abc$109383$new_n52037_
 .subckt nand2_x0 i0=$abc$109383$new_n52037_ i1=$abc$109383$new_n29632_ nq=$abc$109383$new_n52038_
-.subckt nxr2_x1 i0=$abc$109383$new_n39378_ i1=$abc$109383$new_n29632_ nq=$abc$109383$new_n52039_
+.subckt nexor2_x0 i0=$abc$109383$new_n39378_ i1=$abc$109383$new_n29632_ nq=$abc$109383$new_n52039_
 .subckt nand3_x0 i0=$abc$109383$new_n52039_ i1=$abc$109383$new_n52025_ i2=$abc$109383$new_n29608_ nq=$abc$109383$new_n52040_
 .subckt nand2_x0 i0=$abc$109383$new_n52040_ i1=$abc$109383$new_n52038_ nq=$abc$109383$new_n52041_
 .subckt nand2_x0 i0=$abc$109383$new_n52006_ i1=$abc$109383$new_n52004_ nq=$abc$109383$new_n52042_
-.subckt a2_x2 i0=$abc$109383$new_n52008_ i1=$abc$109383$new_n51987_ q=$abc$109383$new_n52043_
-.subckt ao22_x2 i0=$abc$109383$new_n52043_ i1=$abc$109383$new_n52042_ i2=$abc$109383$new_n52003_ q=$abc$109383$new_n52044_
-.subckt oa22_x2 i0=$abc$109383$new_n52039_ i1=$abc$109383$new_n52044_ i2=$abc$109383$new_n52041_ q=$abc$109383$new_n52045_
-.subckt mx2_x2 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52045_ i1=$abc$109383$new_n52036_ q=$abc$109383$new_n52046_
-.subckt nxr2_x1 i0=$abc$109383$new_n52046_ i1=$abc$109383$new_n52032_ nq=$abc$109383$new_n52047_
-.subckt ao22_x2 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52047_ i2=$abc$109383$new_n52031_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103374
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[13] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52049_
-.subckt nxr2_x1 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ nq=$abc$109383$new_n52050_
+.subckt and2_x1 i0=$abc$109383$new_n52008_ i1=$abc$109383$new_n51987_ q=$abc$109383$new_n52043_
+.subckt and21nor_x1 i0=$abc$109383$new_n52043_ i1=$abc$109383$new_n52042_ i2=$abc$109383$new_n52003_ nq=$abc$109383$new_n52044_
+.subckt or21nand_x1 i0=$abc$109383$new_n52039_ i1=$abc$109383$new_n52044_ i2=$abc$109383$new_n52041_ nq=$abc$109383$new_n52045_
+.subckt mux2_x1 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52045_ i1=$abc$109383$new_n52036_ q=$abc$109383$new_n52046_
+.subckt nexor2_x0 i0=$abc$109383$new_n52046_ i1=$abc$109383$new_n52032_ nq=$abc$109383$new_n52047_
+.subckt and21nor_x1 i0=$abc$109383$new_n51914_ i1=$abc$109383$new_n52047_ i2=$abc$109383$new_n52031_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103374
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[13] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52049_
+.subckt nexor2_x0 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ nq=$abc$109383$new_n52050_
 .subckt nand3_x0 i0=$abc$109383$new_n52035_ i1=$abc$109383$new_n52032_ i2=$abc$109383$new_n52033_ nq=$abc$109383$new_n52051_
 .subckt nand2_x0 i0=$abc$109383$new_n52051_ i1=$abc$109383$new_n34340_ nq=$abc$109383$new_n52052_
 .subckt inv_x0 i=$abc$109383$new_n39379_ nq=$abc$109383$new_n52053_
 .subckt buf_x4 i=$abc$109383$new_n52053_ q=$abc$109383$new_n52054_
 .subckt nand2_x0 i0=$abc$109383$new_n52054_ i1=$abc$109383$new_n29655_ nq=$abc$109383$new_n52055_
-.subckt a2_x2 i0=$abc$109383$new_n52040_ i1=$abc$109383$new_n52038_ q=$abc$109383$new_n52056_
-.subckt ao22_x2 i0=$abc$109383$new_n52020_ i1=$abc$109383$new_n52024_ i2=$abc$109383$new_n52056_ q=$abc$109383$new_n52057_
-.subckt ao22_x2 i0=$abc$109383$new_n52032_ i1=$abc$109383$new_n52057_ i2=$abc$109383$new_n52055_ q=$abc$109383$new_n52058_
-.subckt mx2_x2 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52058_ i1=$abc$109383$new_n52052_ q=$abc$109383$new_n52059_
-.subckt nxr2_x1 i0=$abc$109383$new_n52059_ i1=$abc$109383$new_n52050_ nq=$abc$109383$new_n52060_
+.subckt and2_x1 i0=$abc$109383$new_n52040_ i1=$abc$109383$new_n52038_ q=$abc$109383$new_n52056_
+.subckt and21nor_x1 i0=$abc$109383$new_n52020_ i1=$abc$109383$new_n52024_ i2=$abc$109383$new_n52056_ nq=$abc$109383$new_n52057_
+.subckt and21nor_x1 i0=$abc$109383$new_n52032_ i1=$abc$109383$new_n52057_ i2=$abc$109383$new_n52055_ nq=$abc$109383$new_n52058_
+.subckt mux2_x1 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52058_ i1=$abc$109383$new_n52052_ q=$abc$109383$new_n52059_
+.subckt nexor2_x0 i0=$abc$109383$new_n52059_ i1=$abc$109383$new_n52050_ nq=$abc$109383$new_n52060_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n52061_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52060_ i2=$abc$109383$new_n52049_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103378
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[14] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52063_
-.subckt xr2_x1 i0=$abc$109383$new_n40201_ i1=$abc$109383$new_n29687_ q=$abc$109383$new_n52064_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52060_ i2=$abc$109383$new_n52049_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103378
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[14] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52063_
+.subckt xor2_x0 i0=$abc$109383$new_n40201_ i1=$abc$109383$new_n29687_ q=$abc$109383$new_n52064_
 .subckt nor2_x0 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ nq=$abc$109383$new_n52065_
-.subckt a2_x2 i0=$abc$109383$new_n35300_ i1=$abc$109383$new_n34340_ q=$abc$109383$new_n52066_
-.subckt oa22_x2 i0=$abc$109383$new_n52066_ i1=$abc$109383$new_n52051_ i2=$abc$109383$new_n52065_ q=$abc$109383$new_n52067_
-.subckt nxr2_x1 i0=$abc$109383$new_n39379_ i1=$abc$109383$new_n29655_ nq=$abc$109383$new_n52068_
-.subckt a2_x2 i0=$abc$109383$new_n52050_ i1=$abc$109383$new_n52068_ q=$abc$109383$new_n52069_
+.subckt and2_x1 i0=$abc$109383$new_n35300_ i1=$abc$109383$new_n34340_ q=$abc$109383$new_n52066_
+.subckt or21nand_x1 i0=$abc$109383$new_n52066_ i1=$abc$109383$new_n52051_ i2=$abc$109383$new_n52065_ nq=$abc$109383$new_n52067_
+.subckt nexor2_x0 i0=$abc$109383$new_n39379_ i1=$abc$109383$new_n29655_ nq=$abc$109383$new_n52068_
+.subckt and2_x1 i0=$abc$109383$new_n52050_ i1=$abc$109383$new_n52068_ q=$abc$109383$new_n52069_
 .subckt nand3_x0 i0=$abc$109383$new_n52069_ i1=$abc$109383$new_n52044_ i2=$abc$109383$new_n52039_ nq=$abc$109383$new_n52070_
 .subckt nand2_x0 i0=$abc$109383$new_n52050_ i1=$abc$109383$new_n52068_ nq=$abc$109383$new_n52071_
-.subckt oa22_x2 i0=$abc$109383$new_n52038_ i1=$abc$109383$new_n52040_ i2=$abc$109383$new_n52071_ q=$abc$109383$new_n52072_
+.subckt or21nand_x1 i0=$abc$109383$new_n52038_ i1=$abc$109383$new_n52040_ i2=$abc$109383$new_n52071_ nq=$abc$109383$new_n52072_
 .subckt nand3_x0 i0=$abc$109383$new_n52050_ i1=$abc$109383$new_n52053_ i2=$abc$109383$new_n29655_ nq=$abc$109383$new_n52073_
 .subckt inv_x2 i=$abc$109383$new_n39957_ nq=$abc$109383$new_n52074_
 .subckt nand2_x0 i0=$abc$109383$new_n52074_ i1=$abc$109383$new_n29676_ nq=$abc$109383$new_n52075_
-.subckt a2_x2 i0=$abc$109383$new_n52075_ i1=$abc$109383$new_n52073_ q=$abc$109383$new_n52076_
-.subckt a2_x2 i0=$abc$109383$new_n52076_ i1=$abc$109383$new_n52072_ q=$abc$109383$new_n52077_
+.subckt and2_x1 i0=$abc$109383$new_n52075_ i1=$abc$109383$new_n52073_ q=$abc$109383$new_n52076_
+.subckt and2_x1 i0=$abc$109383$new_n52076_ i1=$abc$109383$new_n52072_ q=$abc$109383$new_n52077_
 .subckt nand2_x0 i0=$abc$109383$new_n52077_ i1=$abc$109383$new_n52070_ nq=$abc$109383$new_n52078_
-.subckt mx2_x2 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52078_ i1=$abc$109383$new_n52067_ q=$abc$109383$new_n52079_
-.subckt nxr2_x1 i0=$abc$109383$new_n52079_ i1=$abc$109383$new_n52064_ nq=$abc$109383$new_n52080_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52080_ i2=$abc$109383$new_n52063_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103382
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[15] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52082_
-.subckt nxr2_x1 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n29663_ nq=$abc$109383$new_n52083_
-.subckt oa22_x2 i0=$abc$109383$new_n29688_ i1=$abc$109383$new_n40201_ i2=$abc$109383$new_n51866_ q=$abc$109383$new_n52084_
-.subckt o2_x2 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n52085_
-.subckt a3_x2 i0=$abc$109383$new_n52035_ i1=$abc$109383$new_n52032_ i2=$abc$109383$new_n52033_ q=$abc$109383$new_n52086_
+.subckt mux2_x1 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52078_ i1=$abc$109383$new_n52067_ q=$abc$109383$new_n52079_
+.subckt nexor2_x0 i0=$abc$109383$new_n52079_ i1=$abc$109383$new_n52064_ nq=$abc$109383$new_n52080_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52080_ i2=$abc$109383$new_n52063_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103382
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[15] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52082_
+.subckt nexor2_x0 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n29663_ nq=$abc$109383$new_n52083_
+.subckt or21nand_x1 i0=$abc$109383$new_n29688_ i1=$abc$109383$new_n40201_ i2=$abc$109383$new_n51866_ nq=$abc$109383$new_n52084_
+.subckt or2_x1 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n52085_
+.subckt and3_x1 i0=$abc$109383$new_n52035_ i1=$abc$109383$new_n52032_ i2=$abc$109383$new_n52033_ q=$abc$109383$new_n52086_
 .subckt nand2_x0 i0=$abc$109383$new_n35300_ i1=$abc$109383$new_n34340_ nq=$abc$109383$new_n52087_
-.subckt ao22_x2 i0=$abc$109383$new_n52087_ i1=$abc$109383$new_n52086_ i2=$abc$109383$new_n52085_ q=$abc$109383$new_n52088_
-.subckt oa22_x2 i0=$abc$109383$new_n52064_ i1=$abc$109383$new_n52088_ i2=$abc$109383$new_n52084_ q=$abc$109383$new_n52089_
-.subckt nxr2_x1 i0=$abc$109383$new_n40201_ i1=$abc$109383$new_n29688_ nq=$abc$109383$new_n52090_
-.subckt a3_x2 i0=$abc$109383$new_n52069_ i1=$abc$109383$new_n52044_ i2=$abc$109383$new_n52039_ q=$abc$109383$new_n52091_
+.subckt and21nor_x1 i0=$abc$109383$new_n52087_ i1=$abc$109383$new_n52086_ i2=$abc$109383$new_n52085_ nq=$abc$109383$new_n52088_
+.subckt or21nand_x1 i0=$abc$109383$new_n52064_ i1=$abc$109383$new_n52088_ i2=$abc$109383$new_n52084_ nq=$abc$109383$new_n52089_
+.subckt nexor2_x0 i0=$abc$109383$new_n40201_ i1=$abc$109383$new_n29688_ nq=$abc$109383$new_n52090_
+.subckt and3_x1 i0=$abc$109383$new_n52069_ i1=$abc$109383$new_n52044_ i2=$abc$109383$new_n52039_ q=$abc$109383$new_n52091_
 .subckt nand2_x0 i0=$abc$109383$new_n52076_ i1=$abc$109383$new_n52072_ nq=$abc$109383$new_n52092_
-.subckt ao22_x2 i0=$abc$109383$new_n52092_ i1=$abc$109383$new_n52091_ i2=$abc$109383$new_n52090_ q=$abc$109383$new_n52093_
+.subckt and21nor_x1 i0=$abc$109383$new_n52092_ i1=$abc$109383$new_n52091_ i2=$abc$109383$new_n52090_ nq=$abc$109383$new_n52093_
 .subckt inv_x1 i=$abc$109383$new_n40201_ nq=$abc$109383$new_n52094_
-.subckt a2_x2 i0=$abc$109383$new_n52094_ i1=$abc$109383$new_n29688_ q=$abc$109383$new_n52095_
+.subckt and2_x1 i0=$abc$109383$new_n52094_ i1=$abc$109383$new_n29688_ q=$abc$109383$new_n52095_
 .subckt nor2_x0 i0=$abc$109383$new_n52095_ i1=$abc$109383$new_n52093_ nq=$abc$109383$new_n52096_
-.subckt ao22_x2 i0=$abc$109383$new_n51962_ i1=$abc$109383$new_n52096_ i2=$abc$109383$new_n52089_ q=$abc$109383$new_n52097_
-.subckt nxr2_x1 i0=$abc$109383$new_n52097_ i1=$abc$109383$new_n52083_ nq=$abc$109383$new_n52098_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52098_ i2=$abc$109383$new_n52082_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103386
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[16] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52100_
-.subckt xr2_x1 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n29642_ q=$abc$109383$new_n52101_
-.subckt o2_x2 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n52102_
+.subckt and21nor_x1 i0=$abc$109383$new_n51962_ i1=$abc$109383$new_n52096_ i2=$abc$109383$new_n52089_ nq=$abc$109383$new_n52097_
+.subckt nexor2_x0 i0=$abc$109383$new_n52097_ i1=$abc$109383$new_n52083_ nq=$abc$109383$new_n52098_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52098_ i2=$abc$109383$new_n52082_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103386
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[16] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52100_
+.subckt xor2_x0 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n29642_ q=$abc$109383$new_n52101_
+.subckt or2_x1 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n52102_
 .subckt nand2_x0 i0=$abc$109383$new_n36357_ i1=$abc$109383$new_n35971_ nq=$abc$109383$new_n52103_
-.subckt oa22_x2 i0=$abc$109383$new_n52064_ i1=$abc$109383$new_n52088_ i2=$abc$109383$new_n52103_ q=$abc$109383$new_n52104_
+.subckt or21nand_x1 i0=$abc$109383$new_n52064_ i1=$abc$109383$new_n52088_ i2=$abc$109383$new_n52103_ nq=$abc$109383$new_n52104_
 .subckt nand2_x0 i0=$abc$109383$new_n52104_ i1=$abc$109383$new_n52102_ nq=$abc$109383$new_n52105_
 .subckt nand2_x0 i0=$abc$109383$new_n40464_ i1=$abc$109383$new_n29664_ nq=$abc$109383$new_n52106_
 .subckt nand3_x0 i0=$abc$109383$new_n52083_ i1=$abc$109383$new_n52094_ i2=$abc$109383$new_n29688_ nq=$abc$109383$new_n52107_
 .subckt nand2_x0 i0=$abc$109383$new_n52107_ i1=$abc$109383$new_n52106_ nq=$abc$109383$new_n52108_
-.subckt oa22_x2 i0=$abc$109383$new_n52083_ i1=$abc$109383$new_n52093_ i2=$abc$109383$new_n52108_ q=$abc$109383$new_n52109_
-.subckt mx2_x2 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52109_ i1=$abc$109383$new_n52105_ q=$abc$109383$new_n52110_
-.subckt nxr2_x1 i0=$abc$109383$new_n52110_ i1=$abc$109383$new_n52101_ nq=$abc$109383$new_n52111_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52111_ i2=$abc$109383$new_n52100_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103390
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[17] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52113_
-.subckt nxr2_x1 i0=$abc$109383$new_n41118_ i1=$abc$109383$new_n29619_ nq=$abc$109383$new_n52114_
+.subckt or21nand_x1 i0=$abc$109383$new_n52083_ i1=$abc$109383$new_n52093_ i2=$abc$109383$new_n52108_ nq=$abc$109383$new_n52109_
+.subckt mux2_x1 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52109_ i1=$abc$109383$new_n52105_ q=$abc$109383$new_n52110_
+.subckt nexor2_x0 i0=$abc$109383$new_n52110_ i1=$abc$109383$new_n52101_ nq=$abc$109383$new_n52111_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52111_ i2=$abc$109383$new_n52100_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103390
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[17] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52113_
+.subckt nexor2_x0 i0=$abc$109383$new_n41118_ i1=$abc$109383$new_n29619_ nq=$abc$109383$new_n52114_
 .subckt inv_x2 i=$abc$109383$new_n40910_ nq=$abc$109383$new_n52115_
-.subckt a2_x2 i0=$abc$109383$new_n52115_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n52116_
-.subckt nxr2_x1 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n29642_ nq=$abc$109383$new_n52117_
-.subckt oa22_x2 i0=$abc$109383$new_n52117_ i1=$abc$109383$new_n52109_ i2=$abc$109383$new_n52116_ q=$abc$109383$new_n52118_
+.subckt and2_x1 i0=$abc$109383$new_n52115_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n52116_
+.subckt nexor2_x0 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n29642_ nq=$abc$109383$new_n52117_
+.subckt or21nand_x1 i0=$abc$109383$new_n52117_ i1=$abc$109383$new_n52109_ i2=$abc$109383$new_n52116_ nq=$abc$109383$new_n52118_
 .subckt nand2_x0 i0=$abc$109383$new_n52118_ i1=$abc$109383$new_n51911_ nq=$abc$109383$new_n52119_
-.subckt o2_x2 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n52120_
+.subckt or2_x1 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n52120_
 .subckt nand3_x0 i0=$abc$109383$new_n52104_ i1=$abc$109383$new_n52120_ i2=$abc$109383$new_n52102_ nq=$abc$109383$new_n52121_
-.subckt a2_x2 i0=$abc$109383$new_n37373_ i1=$abc$109383$new_n51961_ q=$abc$109383$new_n52122_
+.subckt and2_x1 i0=$abc$109383$new_n37373_ i1=$abc$109383$new_n51961_ q=$abc$109383$new_n52122_
 .subckt nand2_x0 i0=$abc$109383$new_n52122_ i1=$abc$109383$new_n52121_ nq=$abc$109383$new_n52123_
-.subckt a2_x2 i0=$abc$109383$new_n52123_ i1=$abc$109383$new_n52119_ q=$abc$109383$new_n52124_
-.subckt nxr2_x1 i0=$abc$109383$new_n52124_ i1=$abc$109383$new_n52114_ nq=$abc$109383$new_n52125_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52125_ i2=$abc$109383$new_n52113_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103394
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[18] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52127_
-.subckt xr2_x1 i0=$abc$109383$new_n41119_ i1=$abc$109383$new_n29593_ q=$abc$109383$new_n52128_
+.subckt and2_x1 i0=$abc$109383$new_n52123_ i1=$abc$109383$new_n52119_ q=$abc$109383$new_n52124_
+.subckt nexor2_x0 i0=$abc$109383$new_n52124_ i1=$abc$109383$new_n52114_ nq=$abc$109383$new_n52125_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52125_ i2=$abc$109383$new_n52113_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103394
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[18] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52127_
+.subckt xor2_x0 i0=$abc$109383$new_n41119_ i1=$abc$109383$new_n29593_ q=$abc$109383$new_n52128_
 .subckt nand3_x0 i0=$abc$109383$new_n52114_ i1=$abc$109383$new_n52115_ i2=$abc$109383$new_n29643_ nq=$abc$109383$new_n52129_
 .subckt inv_x1 i=$abc$109383$new_n41118_ nq=$abc$109383$new_n52130_
 .subckt nand2_x0 i0=$abc$109383$new_n52130_ i1=$abc$109383$new_n29620_ nq=$abc$109383$new_n52131_
 .subckt nand2_x0 i0=$abc$109383$new_n52131_ i1=$abc$109383$new_n52129_ nq=$abc$109383$new_n52132_
-.subckt a2_x2 i0=$abc$109383$new_n52114_ i1=$abc$109383$new_n52117_ q=$abc$109383$new_n52133_
-.subckt oa22_x2 i0=$abc$109383$new_n52109_ i1=$abc$109383$new_n52133_ i2=$abc$109383$new_n52132_ q=$abc$109383$new_n52134_
+.subckt and2_x1 i0=$abc$109383$new_n52114_ i1=$abc$109383$new_n52117_ q=$abc$109383$new_n52133_
+.subckt or21nand_x1 i0=$abc$109383$new_n52109_ i1=$abc$109383$new_n52133_ i2=$abc$109383$new_n52132_ nq=$abc$109383$new_n52134_
 .subckt nor2_x0 i0=$abc$109383$new_n41118_ i1=$abc$109383$new_n29620_ nq=$abc$109383$new_n52135_
-.subckt oa22_x2 i0=$abc$109383$new_n37373_ i1=$abc$109383$new_n38000_ i2=$abc$109383$new_n52135_ q=$abc$109383$new_n52136_
-.subckt xr2_x1 i0=$abc$109383$new_n41118_ i1=$abc$109383$new_n29619_ q=$abc$109383$new_n52137_
+.subckt or21nand_x1 i0=$abc$109383$new_n37373_ i1=$abc$109383$new_n38000_ i2=$abc$109383$new_n52135_ nq=$abc$109383$new_n52136_
+.subckt xor2_x0 i0=$abc$109383$new_n41118_ i1=$abc$109383$new_n29619_ q=$abc$109383$new_n52137_
 .subckt nand2_x0 i0=$abc$109383$new_n52137_ i1=$abc$109383$new_n52101_ nq=$abc$109383$new_n52138_
-.subckt ao22_x2 i0=$abc$109383$new_n52105_ i1=$abc$109383$new_n52138_ i2=$abc$109383$new_n52136_ q=$abc$109383$new_n52139_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52139_ i1=$abc$109383$new_n52134_ q=$abc$109383$new_n52140_
-.subckt nxr2_x1 i0=$abc$109383$new_n52140_ i1=$abc$109383$new_n52128_ nq=$abc$109383$new_n52141_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52141_ i2=$abc$109383$new_n52127_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103398
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[19] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52143_
-.subckt nxr2_x1 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29569_ nq=$abc$109383$new_n52144_
+.subckt and21nor_x1 i0=$abc$109383$new_n52105_ i1=$abc$109383$new_n52138_ i2=$abc$109383$new_n52136_ nq=$abc$109383$new_n52139_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52139_ i1=$abc$109383$new_n52134_ q=$abc$109383$new_n52140_
+.subckt nexor2_x0 i0=$abc$109383$new_n52140_ i1=$abc$109383$new_n52128_ nq=$abc$109383$new_n52141_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52141_ i2=$abc$109383$new_n52127_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103398
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[19] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52143_
+.subckt nexor2_x0 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29569_ nq=$abc$109383$new_n52144_
 .subckt inv_x1 i=$abc$109383$new_n41119_ nq=$abc$109383$new_n52145_
-.subckt a2_x2 i0=$abc$109383$new_n52145_ i1=$abc$109383$new_n29594_ q=$abc$109383$new_n52146_
-.subckt nxr2_x1 i0=$abc$109383$new_n41119_ i1=$abc$109383$new_n29593_ nq=$abc$109383$new_n52147_
-.subckt oa22_x2 i0=$abc$109383$new_n52147_ i1=$abc$109383$new_n52134_ i2=$abc$109383$new_n52146_ q=$abc$109383$new_n52148_
+.subckt and2_x1 i0=$abc$109383$new_n52145_ i1=$abc$109383$new_n29594_ q=$abc$109383$new_n52146_
+.subckt nexor2_x0 i0=$abc$109383$new_n41119_ i1=$abc$109383$new_n29593_ nq=$abc$109383$new_n52147_
+.subckt or21nand_x1 i0=$abc$109383$new_n52147_ i1=$abc$109383$new_n52134_ i2=$abc$109383$new_n52146_ nq=$abc$109383$new_n52148_
 .subckt nand2_x0 i0=$abc$109383$new_n52148_ i1=$abc$109383$new_n51896_ nq=$abc$109383$new_n52149_
 .subckt nor2_x0 i0=$abc$109383$new_n41119_ i1=$abc$109383$new_n29594_ nq=$abc$109383$new_n52150_
 .subckt nor2_x0 i0=$abc$109383$new_n52139_ i1=$abc$109383$new_n52150_ nq=$abc$109383$new_n52151_
-.subckt oa22_x2 i0=$abc$109383$new_n29594_ i1=$abc$109383$new_n41119_ i2=$abc$109383$new_n51866_ q=$abc$109383$new_n52152_
-.subckt ao22_x2 i0=$abc$109383$new_n52152_ i1=$abc$109383$new_n52151_ i2=$abc$109383$new_n52149_ q=$abc$109383$new_n52153_
-.subckt nxr2_x1 i0=$abc$109383$new_n52153_ i1=$abc$109383$new_n52144_ nq=$abc$109383$new_n52154_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52154_ i2=$abc$109383$new_n52143_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103402
-.subckt ao22_x2 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[20] i2=$abc$109383$new_n52017_ q=$abc$109383$new_n52156_
+.subckt or21nand_x1 i0=$abc$109383$new_n29594_ i1=$abc$109383$new_n41119_ i2=$abc$109383$new_n51866_ nq=$abc$109383$new_n52152_
+.subckt and21nor_x1 i0=$abc$109383$new_n52152_ i1=$abc$109383$new_n52151_ i2=$abc$109383$new_n52149_ nq=$abc$109383$new_n52153_
+.subckt nexor2_x0 i0=$abc$109383$new_n52153_ i1=$abc$109383$new_n52144_ nq=$abc$109383$new_n52154_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52154_ i2=$abc$109383$new_n52143_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103402
+.subckt and21nor_x1 i0=$abc$109383$new_n52018_ i1=soc.cpu.minerva.loadstore.dbus__adr[20] i2=$abc$109383$new_n52017_ nq=$abc$109383$new_n52156_
 .subckt buf_x4 i=$abc$109383$new_n41382_ q=$abc$109383$new_n52157_
-.subckt xr2_x1 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n29544_ q=$abc$109383$new_n52158_
+.subckt xor2_x0 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n29544_ q=$abc$109383$new_n52158_
 .subckt nand2_x0 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n29570_ nq=$abc$109383$new_n52159_
 .subckt nand3_x0 i0=$abc$109383$new_n52144_ i1=$abc$109383$new_n52145_ i2=$abc$109383$new_n29593_ nq=$abc$109383$new_n52160_
-.subckt a2_x2 i0=$abc$109383$new_n52160_ i1=$abc$109383$new_n52159_ q=$abc$109383$new_n52161_
+.subckt and2_x1 i0=$abc$109383$new_n52160_ i1=$abc$109383$new_n52159_ q=$abc$109383$new_n52161_
 .subckt nand3_x0 i0=$abc$109383$new_n52144_ i1=$abc$109383$new_n52134_ i2=$abc$109383$new_n52147_ nq=$abc$109383$new_n52162_
 .subckt nand2_x0 i0=$abc$109383$new_n52162_ i1=$abc$109383$new_n52161_ nq=$abc$109383$new_n52163_
 .subckt nor2_x0 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29570_ nq=$abc$109383$new_n52164_
-.subckt oa22_x2 i0=$abc$109383$new_n38366_ i1=$abc$109383$new_n39215_ i2=$abc$109383$new_n52164_ q=$abc$109383$new_n52165_
-.subckt xr2_x1 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29570_ q=$abc$109383$new_n52166_
+.subckt or21nand_x1 i0=$abc$109383$new_n38366_ i1=$abc$109383$new_n39215_ i2=$abc$109383$new_n52164_ nq=$abc$109383$new_n52165_
+.subckt xor2_x0 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29570_ q=$abc$109383$new_n52166_
 .subckt nand2_x0 i0=$abc$109383$new_n52166_ i1=$abc$109383$new_n52128_ nq=$abc$109383$new_n52167_
-.subckt ao22_x2 i0=$abc$109383$new_n52139_ i1=$abc$109383$new_n52167_ i2=$abc$109383$new_n52165_ q=$abc$109383$new_n52168_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52168_ i1=$abc$109383$new_n52163_ q=$abc$109383$new_n52169_
-.subckt nxr2_x1 i0=$abc$109383$new_n52169_ i1=$abc$109383$new_n52158_ nq=$abc$109383$new_n52170_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52170_ i2=$abc$109383$new_n52156_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103406
+.subckt and21nor_x1 i0=$abc$109383$new_n52139_ i1=$abc$109383$new_n52167_ i2=$abc$109383$new_n52165_ nq=$abc$109383$new_n52168_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52168_ i1=$abc$109383$new_n52163_ q=$abc$109383$new_n52169_
+.subckt nexor2_x0 i0=$abc$109383$new_n52169_ i1=$abc$109383$new_n52158_ nq=$abc$109383$new_n52170_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52170_ i2=$abc$109383$new_n52156_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103406
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n52172_
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[21] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52173_
-.subckt nxr2_x1 i0=$abc$109383$new_n41734_ i1=$abc$109383$new_n29521_ nq=$abc$109383$new_n52174_
-.subckt oa22_x2 i0=$abc$109383$new_n52162_ i1=$abc$109383$new_n52161_ i2=$abc$109383$new_n52158_ q=$abc$109383$new_n52175_
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[21] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52173_
+.subckt nexor2_x0 i0=$abc$109383$new_n41734_ i1=$abc$109383$new_n29521_ nq=$abc$109383$new_n52174_
+.subckt or21nand_x1 i0=$abc$109383$new_n52162_ i1=$abc$109383$new_n52161_ i2=$abc$109383$new_n52158_ nq=$abc$109383$new_n52175_
 .subckt inv_x1 i=$abc$109383$new_n52157_ nq=$abc$109383$new_n52176_
 .subckt nand2_x0 i0=$abc$109383$new_n52176_ i1=$abc$109383$new_n29544_ nq=$abc$109383$new_n52177_
-.subckt oa22_x2 i0=$abc$109383$new_n52177_ i1=$abc$109383$new_n52175_ i2=$abc$109383$new_n51961_ q=$abc$109383$new_n52178_
+.subckt or21nand_x1 i0=$abc$109383$new_n52177_ i1=$abc$109383$new_n52175_ i2=$abc$109383$new_n51961_ nq=$abc$109383$new_n52178_
 .subckt nor2_x0 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n29544_ nq=$abc$109383$new_n52179_
 .subckt nor2_x0 i0=$abc$109383$new_n52168_ i1=$abc$109383$new_n52179_ nq=$abc$109383$new_n52180_
-.subckt oa22_x2 i0=$abc$109383$new_n29544_ i1=$abc$109383$new_n52157_ i2=$abc$109383$new_n51866_ q=$abc$109383$new_n52181_
-.subckt ao22_x2 i0=$abc$109383$new_n52181_ i1=$abc$109383$new_n52180_ i2=$abc$109383$new_n52178_ q=$abc$109383$new_n52182_
-.subckt nxr2_x1 i0=$abc$109383$new_n52182_ i1=$abc$109383$new_n52174_ nq=$abc$109383$new_n52183_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52183_ i2=$abc$109383$new_n52173_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103410
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[22] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52185_
-.subckt nxr2_x1 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29364_ nq=$abc$109383$new_n52186_
-.subckt nxr2_x1 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n29543_ nq=$abc$109383$new_n52187_
-.subckt a4_x2 i0=$abc$109383$new_n52174_ i1=$abc$109383$new_n52187_ i2=$abc$109383$new_n52144_ i3=$abc$109383$new_n52147_ q=$abc$109383$new_n52188_
-.subckt a4_x2 i0=$abc$109383$new_n52114_ i1=$abc$109383$new_n52117_ i2=$abc$109383$new_n52083_ i3=$abc$109383$new_n52090_ q=$abc$109383$new_n52189_
-.subckt a2_x2 i0=$abc$109383$new_n52189_ i1=$abc$109383$new_n52188_ q=$abc$109383$new_n52190_
-.subckt ao22_x2 i0=$abc$109383$new_n52091_ i1=$abc$109383$new_n52092_ i2=$abc$109383$new_n52190_ q=$abc$109383$new_n52191_
+.subckt or21nand_x1 i0=$abc$109383$new_n29544_ i1=$abc$109383$new_n52157_ i2=$abc$109383$new_n51866_ nq=$abc$109383$new_n52181_
+.subckt and21nor_x1 i0=$abc$109383$new_n52181_ i1=$abc$109383$new_n52180_ i2=$abc$109383$new_n52178_ nq=$abc$109383$new_n52182_
+.subckt nexor2_x0 i0=$abc$109383$new_n52182_ i1=$abc$109383$new_n52174_ nq=$abc$109383$new_n52183_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52183_ i2=$abc$109383$new_n52173_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103410
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[22] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52185_
+.subckt nexor2_x0 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29364_ nq=$abc$109383$new_n52186_
+.subckt nexor2_x0 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n29543_ nq=$abc$109383$new_n52187_
+.subckt and4_x1 i0=$abc$109383$new_n52174_ i1=$abc$109383$new_n52187_ i2=$abc$109383$new_n52144_ i3=$abc$109383$new_n52147_ q=$abc$109383$new_n52188_
+.subckt and4_x1 i0=$abc$109383$new_n52114_ i1=$abc$109383$new_n52117_ i2=$abc$109383$new_n52083_ i3=$abc$109383$new_n52090_ q=$abc$109383$new_n52189_
+.subckt and2_x1 i0=$abc$109383$new_n52189_ i1=$abc$109383$new_n52188_ q=$abc$109383$new_n52190_
+.subckt and21nor_x1 i0=$abc$109383$new_n52091_ i1=$abc$109383$new_n52092_ i2=$abc$109383$new_n52190_ nq=$abc$109383$new_n52191_
 .subckt nand4_x0 i0=$abc$109383$new_n52174_ i1=$abc$109383$new_n52187_ i2=$abc$109383$new_n52144_ i3=$abc$109383$new_n52147_ nq=$abc$109383$new_n52192_
 .subckt nand2_x0 i0=$abc$109383$new_n52114_ i1=$abc$109383$new_n52117_ nq=$abc$109383$new_n52193_
-.subckt oa22_x2 i0=$abc$109383$new_n52106_ i1=$abc$109383$new_n52107_ i2=$abc$109383$new_n52193_ q=$abc$109383$new_n52194_
-.subckt a2_x2 i0=$abc$109383$new_n52131_ i1=$abc$109383$new_n52129_ q=$abc$109383$new_n52195_
-.subckt oa22_x2 i0=$abc$109383$new_n52195_ i1=$abc$109383$new_n52194_ i2=$abc$109383$new_n52192_ q=$abc$109383$new_n52196_
+.subckt or21nand_x1 i0=$abc$109383$new_n52106_ i1=$abc$109383$new_n52107_ i2=$abc$109383$new_n52193_ nq=$abc$109383$new_n52194_
+.subckt and2_x1 i0=$abc$109383$new_n52131_ i1=$abc$109383$new_n52129_ q=$abc$109383$new_n52195_
+.subckt or21nand_x1 i0=$abc$109383$new_n52195_ i1=$abc$109383$new_n52194_ i2=$abc$109383$new_n52192_ nq=$abc$109383$new_n52196_
 .subckt nand2_x0 i0=$abc$109383$new_n52174_ i1=$abc$109383$new_n52187_ nq=$abc$109383$new_n52197_
-.subckt oa22_x2 i0=$abc$109383$new_n52159_ i1=$abc$109383$new_n52160_ i2=$abc$109383$new_n52197_ q=$abc$109383$new_n52198_
+.subckt or21nand_x1 i0=$abc$109383$new_n52159_ i1=$abc$109383$new_n52160_ i2=$abc$109383$new_n52197_ nq=$abc$109383$new_n52198_
 .subckt nand3_x0 i0=$abc$109383$new_n52174_ i1=$abc$109383$new_n52176_ i2=$abc$109383$new_n29544_ nq=$abc$109383$new_n52199_
 .subckt nand2_x0 i0=$abc$109383$new_n41767_ i1=$abc$109383$new_n29521_ nq=$abc$109383$new_n52200_
-.subckt a2_x2 i0=$abc$109383$new_n52200_ i1=$abc$109383$new_n52199_ q=$abc$109383$new_n52201_
-.subckt a2_x2 i0=$abc$109383$new_n52201_ i1=$abc$109383$new_n52198_ q=$abc$109383$new_n52202_
+.subckt and2_x1 i0=$abc$109383$new_n52200_ i1=$abc$109383$new_n52199_ q=$abc$109383$new_n52201_
+.subckt and2_x1 i0=$abc$109383$new_n52201_ i1=$abc$109383$new_n52198_ q=$abc$109383$new_n52202_
 .subckt nand2_x0 i0=$abc$109383$new_n52202_ i1=$abc$109383$new_n52196_ nq=$abc$109383$new_n52203_
 .subckt nor2_x0 i0=$abc$109383$new_n52203_ i1=$abc$109383$new_n52191_ nq=$abc$109383$new_n52204_
-.subckt xr2_x1 i0=$abc$109383$new_n41734_ i1=$abc$109383$new_n29521_ q=$abc$109383$new_n52205_
+.subckt xor2_x0 i0=$abc$109383$new_n41734_ i1=$abc$109383$new_n29521_ q=$abc$109383$new_n52205_
 .subckt nand2_x0 i0=$abc$109383$new_n52205_ i1=$abc$109383$new_n52158_ nq=$abc$109383$new_n52206_
-.subckt a2_x2 i0=$abc$109383$new_n41119_ i1=$abc$109383$new_n29593_ q=$abc$109383$new_n52207_
-.subckt o2_x2 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29569_ q=$abc$109383$new_n52208_
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+.subckt or2_x1 i0=$abc$109383$new_n41737_ i1=$abc$109383$new_n29569_ q=$abc$109383$new_n52208_
 .subckt nand2_x0 i0=$abc$109383$new_n52208_ i1=$abc$109383$new_n52207_ nq=$abc$109383$new_n52209_
-.subckt oa22_x2 i0=$abc$109383$new_n39215_ i1=$abc$109383$new_n52209_ i2=$abc$109383$new_n52206_ q=$abc$109383$new_n52210_
+.subckt or21nand_x1 i0=$abc$109383$new_n39215_ i1=$abc$109383$new_n52209_ i2=$abc$109383$new_n52206_ nq=$abc$109383$new_n52210_
 .subckt nor2_x0 i0=$abc$109383$new_n41734_ i1=$abc$109383$new_n29521_ nq=$abc$109383$new_n52211_
-.subckt ao22_x2 i0=$abc$109383$new_n39755_ i1=$abc$109383$new_n52211_ i2=$abc$109383$new_n40019_ q=$abc$109383$new_n52212_
+.subckt and21nor_x1 i0=$abc$109383$new_n39755_ i1=$abc$109383$new_n52211_ i2=$abc$109383$new_n40019_ nq=$abc$109383$new_n52212_
 .subckt nand2_x0 i0=$abc$109383$new_n52212_ i1=$abc$109383$new_n52210_ nq=$abc$109383$new_n52213_
-.subckt a2_x2 i0=$abc$109383$new_n52205_ i1=$abc$109383$new_n52158_ q=$abc$109383$new_n52214_
+.subckt and2_x1 i0=$abc$109383$new_n52205_ i1=$abc$109383$new_n52158_ q=$abc$109383$new_n52214_
 .subckt nor2_x0 i0=$abc$109383$new_n52167_ i1=$abc$109383$new_n52139_ nq=$abc$109383$new_n52215_
-.subckt oa22_x2 i0=$abc$109383$new_n52215_ i1=$abc$109383$new_n52214_ i2=$abc$109383$new_n52213_ q=$abc$109383$new_n52216_
-.subckt mx2_x2 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52216_ i1=$abc$109383$new_n52204_ q=$abc$109383$new_n52217_
-.subckt nxr2_x1 i0=$abc$109383$new_n52217_ i1=$abc$109383$new_n52186_ nq=$abc$109383$new_n52218_
-.subckt ao22_x2 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52218_ i2=$abc$109383$new_n52185_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103414
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[23] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52220_
-.subckt nxr2_x1 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29342_ nq=$abc$109383$new_n52221_
-.subckt oa22_x2 i0=$abc$109383$new_n29365_ i1=$abc$109383$new_n42125_ i2=$abc$109383$new_n51866_ q=$abc$109383$new_n52222_
-.subckt o2_x2 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29364_ q=$abc$109383$new_n52223_
-.subckt oa22_x2 i0=$abc$109383$new_n52223_ i1=$abc$109383$new_n52216_ i2=$abc$109383$new_n52222_ q=$abc$109383$new_n52224_
-.subckt ao22_x2 i0=$abc$109383$new_n52203_ i1=$abc$109383$new_n52191_ i2=$abc$109383$new_n52186_ q=$abc$109383$new_n52225_
+.subckt or21nand_x1 i0=$abc$109383$new_n52215_ i1=$abc$109383$new_n52214_ i2=$abc$109383$new_n52213_ nq=$abc$109383$new_n52216_
+.subckt mux2_x1 cmd=$abc$109383$new_n51896_ i0=$abc$109383$new_n52216_ i1=$abc$109383$new_n52204_ q=$abc$109383$new_n52217_
+.subckt nexor2_x0 i0=$abc$109383$new_n52217_ i1=$abc$109383$new_n52186_ nq=$abc$109383$new_n52218_
+.subckt and21nor_x1 i0=$abc$109383$new_n52061_ i1=$abc$109383$new_n52218_ i2=$abc$109383$new_n52185_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103414
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[23] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52220_
+.subckt nexor2_x0 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29342_ nq=$abc$109383$new_n52221_
+.subckt or21nand_x1 i0=$abc$109383$new_n29365_ i1=$abc$109383$new_n42125_ i2=$abc$109383$new_n51866_ nq=$abc$109383$new_n52222_
+.subckt or2_x1 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29364_ q=$abc$109383$new_n52223_
+.subckt or21nand_x1 i0=$abc$109383$new_n52223_ i1=$abc$109383$new_n52216_ i2=$abc$109383$new_n52222_ nq=$abc$109383$new_n52224_
+.subckt and21nor_x1 i0=$abc$109383$new_n52203_ i1=$abc$109383$new_n52191_ i2=$abc$109383$new_n52186_ nq=$abc$109383$new_n52225_
 .subckt inv_x1 i=$abc$109383$new_n42125_ nq=$abc$109383$new_n52226_
-.subckt a2_x2 i0=$abc$109383$new_n52226_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n52227_
-.subckt o2_x2 i0=$abc$109383$new_n52227_ i1=$abc$109383$new_n52225_ q=$abc$109383$new_n52228_
+.subckt and2_x1 i0=$abc$109383$new_n52226_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n52227_
+.subckt or2_x1 i0=$abc$109383$new_n52227_ i1=$abc$109383$new_n52225_ q=$abc$109383$new_n52228_
 .subckt nand2_x0 i0=$abc$109383$new_n52228_ i1=$abc$109383$new_n51911_ nq=$abc$109383$new_n52229_
-.subckt a2_x2 i0=$abc$109383$new_n52229_ i1=$abc$109383$new_n52224_ q=$abc$109383$new_n52230_
-.subckt nxr2_x1 i0=$abc$109383$new_n52230_ i1=$abc$109383$new_n52221_ nq=$abc$109383$new_n52231_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52231_ i2=$abc$109383$new_n52220_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103418
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[24] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52233_
-.subckt nxr2_x1 i0=$abc$109383$new_n42100_ i1=$abc$109383$new_n29308_ nq=$abc$109383$new_n52234_
-.subckt o2_x2 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n52235_
-.subckt oa22_x2 i0=$abc$109383$new_n52216_ i1=$abc$109383$new_n52223_ i2=$abc$109383$new_n40548_ q=$abc$109383$new_n52236_
-.subckt oa22_x2 i0=$abc$109383$new_n52236_ i1=$abc$109383$new_n52235_ i2=$abc$109383$new_n40988_ q=$abc$109383$new_n52237_
+.subckt and2_x1 i0=$abc$109383$new_n52229_ i1=$abc$109383$new_n52224_ q=$abc$109383$new_n52230_
+.subckt nexor2_x0 i0=$abc$109383$new_n52230_ i1=$abc$109383$new_n52221_ nq=$abc$109383$new_n52231_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52231_ i2=$abc$109383$new_n52220_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103418
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[24] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52233_
+.subckt nexor2_x0 i0=$abc$109383$new_n42100_ i1=$abc$109383$new_n29308_ nq=$abc$109383$new_n52234_
+.subckt or2_x1 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n52235_
+.subckt or21nand_x1 i0=$abc$109383$new_n52216_ i1=$abc$109383$new_n52223_ i2=$abc$109383$new_n40548_ nq=$abc$109383$new_n52236_
+.subckt or21nand_x1 i0=$abc$109383$new_n52236_ i1=$abc$109383$new_n52235_ i2=$abc$109383$new_n40988_ nq=$abc$109383$new_n52237_
 .subckt inv_x1 i=$abc$109383$new_n42267_ nq=$abc$109383$new_n52238_
 .subckt nand2_x0 i0=$abc$109383$new_n52238_ i1=$abc$109383$new_n29342_ nq=$abc$109383$new_n52239_
 .subckt nand3_x0 i0=$abc$109383$new_n52221_ i1=$abc$109383$new_n52226_ i2=$abc$109383$new_n29365_ nq=$abc$109383$new_n52240_
-.subckt a2_x2 i0=$abc$109383$new_n52240_ i1=$abc$109383$new_n52239_ q=$abc$109383$new_n52241_
+.subckt and2_x1 i0=$abc$109383$new_n52240_ i1=$abc$109383$new_n52239_ q=$abc$109383$new_n52241_
 .subckt nand2_x0 i0=$abc$109383$new_n52225_ i1=$abc$109383$new_n52221_ nq=$abc$109383$new_n52242_
-.subckt a2_x2 i0=$abc$109383$new_n52242_ i1=$abc$109383$new_n52241_ q=$abc$109383$new_n52243_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52243_ i1=$abc$109383$new_n52237_ q=$abc$109383$new_n52244_
-.subckt nxr2_x1 i0=$abc$109383$new_n52244_ i1=$abc$109383$new_n52234_ nq=$abc$109383$new_n52245_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52245_ i2=$abc$109383$new_n52233_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103422
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[25] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52247_
-.subckt nxr2_x1 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ nq=$abc$109383$new_n52248_
+.subckt and2_x1 i0=$abc$109383$new_n52242_ i1=$abc$109383$new_n52241_ q=$abc$109383$new_n52243_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52243_ i1=$abc$109383$new_n52237_ q=$abc$109383$new_n52244_
+.subckt nexor2_x0 i0=$abc$109383$new_n52244_ i1=$abc$109383$new_n52234_ nq=$abc$109383$new_n52245_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52245_ i2=$abc$109383$new_n52233_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103422
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[25] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52247_
+.subckt nexor2_x0 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ nq=$abc$109383$new_n52248_
 .subckt buf_x4 i=$abc$109383$new_n42100_ q=$abc$109383$new_n52249_
 .subckt inv_x1 i=$abc$109383$new_n52249_ nq=$abc$109383$new_n52250_
-.subckt a2_x2 i0=$abc$109383$new_n52250_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n52251_
+.subckt and2_x1 i0=$abc$109383$new_n52250_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n52251_
 .subckt nand2_x0 i0=$abc$109383$new_n52240_ i1=$abc$109383$new_n52239_ nq=$abc$109383$new_n52252_
-.subckt oa22_x2 i0=$abc$109383$new_n52221_ i1=$abc$109383$new_n52225_ i2=$abc$109383$new_n52252_ q=$abc$109383$new_n52253_
-.subckt oa22_x2 i0=$abc$109383$new_n52234_ i1=$abc$109383$new_n52253_ i2=$abc$109383$new_n52251_ q=$abc$109383$new_n52254_
+.subckt or21nand_x1 i0=$abc$109383$new_n52221_ i1=$abc$109383$new_n52225_ i2=$abc$109383$new_n52252_ nq=$abc$109383$new_n52253_
+.subckt or21nand_x1 i0=$abc$109383$new_n52234_ i1=$abc$109383$new_n52253_ i2=$abc$109383$new_n52251_ nq=$abc$109383$new_n52254_
 .subckt nand2_x0 i0=$abc$109383$new_n52254_ i1=$abc$109383$new_n51911_ nq=$abc$109383$new_n52255_
-.subckt oa22_x2 i0=$abc$109383$new_n29309_ i1=$abc$109383$new_n52249_ i2=$abc$109383$new_n51866_ q=$abc$109383$new_n52256_
-.subckt o2_x2 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n52257_
-.subckt oa22_x2 i0=$abc$109383$new_n52257_ i1=$abc$109383$new_n52237_ i2=$abc$109383$new_n52256_ q=$abc$109383$new_n52258_
-.subckt a2_x2 i0=$abc$109383$new_n52258_ i1=$abc$109383$new_n52255_ q=$abc$109383$new_n52259_
-.subckt nxr2_x1 i0=$abc$109383$new_n52259_ i1=$abc$109383$new_n52248_ nq=$abc$109383$new_n52260_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52260_ i2=$abc$109383$new_n52247_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103426
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[26] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52262_
-.subckt xr2_x1 i0=$abc$109383$new_n42738_ i1=$abc$109383$new_n29432_ q=$abc$109383$new_n52263_
+.subckt or21nand_x1 i0=$abc$109383$new_n29309_ i1=$abc$109383$new_n52249_ i2=$abc$109383$new_n51866_ nq=$abc$109383$new_n52256_
+.subckt or2_x1 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n52257_
+.subckt or21nand_x1 i0=$abc$109383$new_n52257_ i1=$abc$109383$new_n52237_ i2=$abc$109383$new_n52256_ nq=$abc$109383$new_n52258_
+.subckt and2_x1 i0=$abc$109383$new_n52258_ i1=$abc$109383$new_n52255_ q=$abc$109383$new_n52259_
+.subckt nexor2_x0 i0=$abc$109383$new_n52259_ i1=$abc$109383$new_n52248_ nq=$abc$109383$new_n52260_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52260_ i2=$abc$109383$new_n52247_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103426
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[26] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52262_
+.subckt xor2_x0 i0=$abc$109383$new_n42738_ i1=$abc$109383$new_n29432_ q=$abc$109383$new_n52263_
 .subckt nor2_x0 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ nq=$abc$109383$new_n52264_
-.subckt a2_x2 i0=$abc$109383$new_n41973_ i1=$abc$109383$new_n41421_ q=$abc$109383$new_n52265_
-.subckt xr2_x1 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n52266_
+.subckt and2_x1 i0=$abc$109383$new_n41973_ i1=$abc$109383$new_n41421_ q=$abc$109383$new_n52265_
+.subckt xor2_x0 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n52266_
 .subckt nand2_x0 i0=$abc$109383$new_n52237_ i1=$abc$109383$new_n52266_ nq=$abc$109383$new_n52267_
-.subckt oa22_x2 i0=$abc$109383$new_n52267_ i1=$abc$109383$new_n52265_ i2=$abc$109383$new_n52264_ q=$abc$109383$new_n52268_
+.subckt or21nand_x1 i0=$abc$109383$new_n52267_ i1=$abc$109383$new_n52265_ i2=$abc$109383$new_n52264_ nq=$abc$109383$new_n52268_
 .subckt nand3_x0 i0=$abc$109383$new_n52248_ i1=$abc$109383$new_n52250_ i2=$abc$109383$new_n29309_ nq=$abc$109383$new_n52269_
 .subckt inv_x1 i=$abc$109383$new_n42583_ nq=$abc$109383$new_n52270_
 .subckt nand2_x0 i0=$abc$109383$new_n52270_ i1=$abc$109383$new_n29285_ nq=$abc$109383$new_n52271_
 .subckt nand2_x0 i0=$abc$109383$new_n52271_ i1=$abc$109383$new_n52269_ nq=$abc$109383$new_n52272_
-.subckt a2_x2 i0=$abc$109383$new_n52248_ i1=$abc$109383$new_n52234_ q=$abc$109383$new_n52273_
-.subckt oa22_x2 i0=$abc$109383$new_n52253_ i1=$abc$109383$new_n52273_ i2=$abc$109383$new_n52272_ q=$abc$109383$new_n52274_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52274_ i1=$abc$109383$new_n52268_ q=$abc$109383$new_n52275_
-.subckt nxr2_x1 i0=$abc$109383$new_n52275_ i1=$abc$109383$new_n52263_ nq=$abc$109383$new_n52276_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52276_ i2=$abc$109383$new_n52262_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103430
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[27] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52278_
-.subckt nxr2_x1 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29406_ nq=$abc$109383$new_n52279_
-.subckt a2_x2 i0=$abc$109383$new_n52271_ i1=$abc$109383$new_n52269_ q=$abc$109383$new_n52280_
+.subckt and2_x1 i0=$abc$109383$new_n52248_ i1=$abc$109383$new_n52234_ q=$abc$109383$new_n52273_
+.subckt or21nand_x1 i0=$abc$109383$new_n52253_ i1=$abc$109383$new_n52273_ i2=$abc$109383$new_n52272_ nq=$abc$109383$new_n52274_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52274_ i1=$abc$109383$new_n52268_ q=$abc$109383$new_n52275_
+.subckt nexor2_x0 i0=$abc$109383$new_n52275_ i1=$abc$109383$new_n52263_ nq=$abc$109383$new_n52276_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52276_ i2=$abc$109383$new_n52262_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103430
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[27] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52278_
+.subckt nexor2_x0 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29406_ nq=$abc$109383$new_n52279_
+.subckt and2_x1 i0=$abc$109383$new_n52271_ i1=$abc$109383$new_n52269_ q=$abc$109383$new_n52280_
 .subckt nand2_x0 i0=$abc$109383$new_n52273_ i1=$abc$109383$new_n52253_ nq=$abc$109383$new_n52281_
-.subckt oa22_x2 i0=$abc$109383$new_n52281_ i1=$abc$109383$new_n52280_ i2=$abc$109383$new_n52263_ q=$abc$109383$new_n52282_
+.subckt or21nand_x1 i0=$abc$109383$new_n52281_ i1=$abc$109383$new_n52280_ i2=$abc$109383$new_n52263_ nq=$abc$109383$new_n52282_
 .subckt inv_x1 i=$abc$109383$new_n42738_ nq=$abc$109383$new_n52283_
 .subckt nand2_x0 i0=$abc$109383$new_n52283_ i1=$abc$109383$new_n29433_ nq=$abc$109383$new_n52284_
-.subckt oa22_x2 i0=$abc$109383$new_n52284_ i1=$abc$109383$new_n52282_ i2=$abc$109383$new_n51961_ q=$abc$109383$new_n52285_
-.subckt oa22_x2 i0=$abc$109383$new_n29433_ i1=$abc$109383$new_n42738_ i2=$abc$109383$new_n51866_ q=$abc$109383$new_n52286_
-.subckt o2_x2 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n52287_
-.subckt a2_x2 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n29308_ q=$abc$109383$new_n52288_
-.subckt ao22_x2 i0=$abc$109383$new_n52288_ i1=$abc$109383$new_n41813_ i2=$abc$109383$new_n52287_ q=$abc$109383$new_n52289_
-.subckt xr2_x1 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n52290_
-.subckt a2_x2 i0=$abc$109383$new_n52290_ i1=$abc$109383$new_n52266_ q=$abc$109383$new_n52291_
-.subckt oa22_x2 i0=$abc$109383$new_n52237_ i1=$abc$109383$new_n52291_ i2=$abc$109383$new_n52289_ q=$abc$109383$new_n52292_
-.subckt o2_x2 i0=$abc$109383$new_n42738_ i1=$abc$109383$new_n29433_ q=$abc$109383$new_n52293_
-.subckt oa22_x2 i0=$abc$109383$new_n52293_ i1=$abc$109383$new_n52292_ i2=$abc$109383$new_n52286_ q=$abc$109383$new_n52294_
-.subckt a2_x2 i0=$abc$109383$new_n52294_ i1=$abc$109383$new_n52285_ q=$abc$109383$new_n52295_
-.subckt nxr2_x1 i0=$abc$109383$new_n52295_ i1=$abc$109383$new_n52279_ nq=$abc$109383$new_n52296_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52296_ i2=$abc$109383$new_n52278_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103434
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[28] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52298_
-.subckt nxr2_x1 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29463_ nq=$abc$109383$new_n52299_
-.subckt o2_x2 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n52300_
+.subckt or21nand_x1 i0=$abc$109383$new_n52284_ i1=$abc$109383$new_n52282_ i2=$abc$109383$new_n51961_ nq=$abc$109383$new_n52285_
+.subckt or21nand_x1 i0=$abc$109383$new_n29433_ i1=$abc$109383$new_n42738_ i2=$abc$109383$new_n51866_ nq=$abc$109383$new_n52286_
+.subckt or2_x1 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n52287_
+.subckt and2_x1 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n29308_ q=$abc$109383$new_n52288_
+.subckt and21nor_x1 i0=$abc$109383$new_n52288_ i1=$abc$109383$new_n41813_ i2=$abc$109383$new_n52287_ nq=$abc$109383$new_n52289_
+.subckt xor2_x0 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n52290_
+.subckt and2_x1 i0=$abc$109383$new_n52290_ i1=$abc$109383$new_n52266_ q=$abc$109383$new_n52291_
+.subckt or21nand_x1 i0=$abc$109383$new_n52237_ i1=$abc$109383$new_n52291_ i2=$abc$109383$new_n52289_ nq=$abc$109383$new_n52292_
+.subckt or2_x1 i0=$abc$109383$new_n42738_ i1=$abc$109383$new_n29433_ q=$abc$109383$new_n52293_
+.subckt or21nand_x1 i0=$abc$109383$new_n52293_ i1=$abc$109383$new_n52292_ i2=$abc$109383$new_n52286_ nq=$abc$109383$new_n52294_
+.subckt and2_x1 i0=$abc$109383$new_n52294_ i1=$abc$109383$new_n52285_ q=$abc$109383$new_n52295_
+.subckt nexor2_x0 i0=$abc$109383$new_n52295_ i1=$abc$109383$new_n52279_ nq=$abc$109383$new_n52296_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52296_ i2=$abc$109383$new_n52278_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103434
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[28] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52298_
+.subckt nexor2_x0 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29463_ nq=$abc$109383$new_n52299_
+.subckt or2_x1 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n52300_
 .subckt nand2_x0 i0=$abc$109383$new_n42475_ i1=$abc$109383$new_n42299_ nq=$abc$109383$new_n52301_
-.subckt oa22_x2 i0=$abc$109383$new_n52263_ i1=$abc$109383$new_n52292_ i2=$abc$109383$new_n52301_ q=$abc$109383$new_n52302_
-.subckt a2_x2 i0=$abc$109383$new_n52302_ i1=$abc$109383$new_n52300_ q=$abc$109383$new_n52303_
+.subckt or21nand_x1 i0=$abc$109383$new_n52263_ i1=$abc$109383$new_n52292_ i2=$abc$109383$new_n52301_ nq=$abc$109383$new_n52302_
+.subckt and2_x1 i0=$abc$109383$new_n52302_ i1=$abc$109383$new_n52300_ q=$abc$109383$new_n52303_
 .subckt nand2_x0 i0=$abc$109383$new_n42764_ i1=$abc$109383$new_n29406_ nq=$abc$109383$new_n52304_
 .subckt nand3_x0 i0=$abc$109383$new_n52279_ i1=$abc$109383$new_n52283_ i2=$abc$109383$new_n29432_ nq=$abc$109383$new_n52305_
-.subckt a2_x2 i0=$abc$109383$new_n52305_ i1=$abc$109383$new_n52304_ q=$abc$109383$new_n52306_
-.subckt xr2_x1 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n52307_
-.subckt ao22_x2 i0=$abc$109383$new_n52307_ i1=$abc$109383$new_n52282_ i2=$abc$109383$new_n52306_ q=$abc$109383$new_n52308_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52308_ i1=$abc$109383$new_n52303_ q=$abc$109383$new_n52309_
-.subckt nxr2_x1 i0=$abc$109383$new_n52309_ i1=$abc$109383$new_n52299_ nq=$abc$109383$new_n52310_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52310_ i2=$abc$109383$new_n52298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103438
-.subckt ao22_x2 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[29] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52312_
-.subckt nxr2_x1 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29490_ nq=$abc$109383$new_n52313_
-.subckt o2_x2 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n52314_
+.subckt and2_x1 i0=$abc$109383$new_n52305_ i1=$abc$109383$new_n52304_ q=$abc$109383$new_n52306_
+.subckt xor2_x0 i0=$abc$109383$new_n42591_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n52307_
+.subckt and21nor_x1 i0=$abc$109383$new_n52307_ i1=$abc$109383$new_n52282_ i2=$abc$109383$new_n52306_ nq=$abc$109383$new_n52308_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52308_ i1=$abc$109383$new_n52303_ q=$abc$109383$new_n52309_
+.subckt nexor2_x0 i0=$abc$109383$new_n52309_ i1=$abc$109383$new_n52299_ nq=$abc$109383$new_n52310_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52310_ i2=$abc$109383$new_n52298_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103438
+.subckt and21nor_x1 i0=$abc$109383$new_n43286_ i1=soc.cpu.minerva.loadstore.dbus__adr[29] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52312_
+.subckt nexor2_x0 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29490_ nq=$abc$109383$new_n52313_
+.subckt or2_x1 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n52314_
 .subckt nand3_x0 i0=$abc$109383$new_n52302_ i1=$abc$109383$new_n52314_ i2=$abc$109383$new_n52300_ nq=$abc$109383$new_n52315_
 .subckt nand2_x0 i0=$abc$109383$new_n52315_ i1=$abc$109383$new_n42887_ nq=$abc$109383$new_n52316_
 .subckt inv_x1 i=$abc$109383$new_n42891_ nq=$abc$109383$new_n52317_
 .subckt nand2_x0 i0=$abc$109383$new_n52317_ i1=$abc$109383$new_n29463_ nq=$abc$109383$new_n52318_
-.subckt xr2_x1 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n52319_
-.subckt ao22_x2 i0=$abc$109383$new_n52319_ i1=$abc$109383$new_n52308_ i2=$abc$109383$new_n52318_ q=$abc$109383$new_n52320_
-.subckt mx2_x2 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52320_ i1=$abc$109383$new_n52316_ q=$abc$109383$new_n52321_
-.subckt nxr2_x1 i0=$abc$109383$new_n52321_ i1=$abc$109383$new_n52313_ nq=$abc$109383$new_n52322_
-.subckt ao22_x2 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52322_ i2=$abc$109383$new_n52312_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103442
+.subckt xor2_x0 i0=$abc$109383$new_n42891_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n52319_
+.subckt and21nor_x1 i0=$abc$109383$new_n52319_ i1=$abc$109383$new_n52308_ i2=$abc$109383$new_n52318_ nq=$abc$109383$new_n52320_
+.subckt mux2_x1 cmd=$abc$109383$new_n51962_ i0=$abc$109383$new_n52320_ i1=$abc$109383$new_n52316_ q=$abc$109383$new_n52321_
+.subckt nexor2_x0 i0=$abc$109383$new_n52321_ i1=$abc$109383$new_n52313_ nq=$abc$109383$new_n52322_
+.subckt and21nor_x1 i0=$abc$109383$new_n51870_ i1=$abc$109383$new_n52322_ i2=$abc$109383$new_n52312_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103442
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n52324_
 .subckt buf_x4 i=soc.cpu.minerva.payload__instruction$34[14] q=$abc$109383$new_n52325_
 .subckt buf_x4 i=$abc$109383$new_n52325_ q=$abc$109383$new_n52326_
@@ -37610,880 +37610,880 @@
 .subckt nand3_x0 i0=$abc$109383$new_n52335_ i1=$abc$109383$new_n52331_ i2=$abc$109383$new_n52328_ nq=$abc$109383$new_n52336_
 .subckt inv_x0 i=$abc$109383$new_n52329_ nq=$abc$109383$new_n52337_
 .subckt buf_x4 i=$abc$109383$new_n52337_ q=$abc$109383$new_n52338_
-.subckt nxr2_x1 i0=$abc$109383$new_n29439_ i1=$abc$109383$new_n29475_ nq=$abc$109383$new_n52339_
-.subckt a2_x2 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29757_ q=$abc$109383$new_n52340_
-.subckt mx2_x2 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52340_ i1=$abc$109383$new_n51890_ q=$abc$109383$new_n52341_
-.subckt nxr2_x1 i0=$abc$109383$new_n52341_ i1=$abc$109383$new_n51861_ nq=$abc$109383$new_n52342_
+.subckt nexor2_x0 i0=$abc$109383$new_n29439_ i1=$abc$109383$new_n29475_ nq=$abc$109383$new_n52339_
+.subckt and2_x1 i0=$abc$109383$new_n29317_ i1=$abc$109383$new_n29757_ q=$abc$109383$new_n52340_
+.subckt mux2_x1 cmd=$abc$109383$new_n51961_ i0=$abc$109383$new_n52340_ i1=$abc$109383$new_n51890_ q=$abc$109383$new_n52341_
+.subckt nexor2_x0 i0=$abc$109383$new_n52341_ i1=$abc$109383$new_n51861_ nq=$abc$109383$new_n52342_
 .subckt buf_x4 i=$abc$109383$new_n52342_ q=$abc$109383$new_n52343_
 .subckt nand3_x0 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52339_ i2=$abc$109383$new_n52338_ nq=$abc$109383$new_n52344_
 .subckt nand2_x0 i0=$abc$109383$new_n52344_ i1=$abc$109383$new_n52336_ nq=$abc$109383$new_n52345_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52345_ i1=soc.cpu.minerva.loadstore.dbus__sel[0] q=$abc$109383$new_n52346_
-.subckt a2_x2 i0=$abc$109383$new_n52346_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103446
-.subckt a3_x2 i0=$abc$109383$new_n52335_ i1=$abc$109383$new_n52330_ i2=$abc$109383$new_n52327_ q=$abc$109383$new_n52348_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52345_ i1=soc.cpu.minerva.loadstore.dbus__sel[0] q=$abc$109383$new_n52346_
+.subckt and2_x1 i0=$abc$109383$new_n52346_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103446
+.subckt and3_x1 i0=$abc$109383$new_n52335_ i1=$abc$109383$new_n52330_ i2=$abc$109383$new_n52327_ q=$abc$109383$new_n52348_
 .subckt buf_x4 i=$abc$109383$new_n52332_ q=$abc$109383$new_n52349_
-.subckt xr2_x1 i0=$abc$109383$new_n29439_ i1=$abc$109383$new_n29475_ q=$abc$109383$new_n52350_
-.subckt ao22_x2 i0=$abc$109383$new_n52350_ i1=$abc$109383$new_n52349_ i2=$abc$109383$new_n52338_ q=$abc$109383$new_n52351_
-.subckt oa22_x2 i0=$abc$109383$new_n52351_ i1=$abc$109383$new_n52343_ i2=$abc$109383$new_n52348_ q=$abc$109383$new_n52352_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52352_ i1=soc.cpu.minerva.loadstore.dbus__sel[1] q=$abc$109383$new_n52353_
-.subckt a2_x2 i0=$abc$109383$new_n52353_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103450
-.subckt a3_x2 i0=$abc$109383$new_n52350_ i1=$abc$109383$new_n52349_ i2=$abc$109383$new_n52337_ q=$abc$109383$new_n52355_
-.subckt nxr2_x1 i0=$abc$109383$new_n29385_ i1=$abc$109383$new_n29451_ nq=$abc$109383$new_n52356_
-.subckt nxr2_x1 i0=$abc$109383$new_n52341_ i1=$abc$109383$new_n52356_ nq=$abc$109383$new_n52357_
-.subckt mx2_x2 cmd=$abc$109383$new_n52357_ i0=$abc$109383$new_n52355_ i1=$abc$109383$new_n52339_ q=$abc$109383$new_n52358_
-.subckt oa22_x2 i0=$abc$109383$new_n52338_ i1=$abc$109383$new_n52358_ i2=$abc$109383$new_n52348_ q=$abc$109383$new_n52359_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52359_ i1=soc.cpu.minerva.loadstore.dbus__sel[2] q=$abc$109383$new_n52360_
-.subckt a2_x2 i0=$abc$109383$new_n52360_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103454
+.subckt xor2_x0 i0=$abc$109383$new_n29439_ i1=$abc$109383$new_n29475_ q=$abc$109383$new_n52350_
+.subckt and21nor_x1 i0=$abc$109383$new_n52350_ i1=$abc$109383$new_n52349_ i2=$abc$109383$new_n52338_ nq=$abc$109383$new_n52351_
+.subckt or21nand_x1 i0=$abc$109383$new_n52351_ i1=$abc$109383$new_n52343_ i2=$abc$109383$new_n52348_ nq=$abc$109383$new_n52352_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52352_ i1=soc.cpu.minerva.loadstore.dbus__sel[1] q=$abc$109383$new_n52353_
+.subckt and2_x1 i0=$abc$109383$new_n52353_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103450
+.subckt and3_x1 i0=$abc$109383$new_n52350_ i1=$abc$109383$new_n52349_ i2=$abc$109383$new_n52337_ q=$abc$109383$new_n52355_
+.subckt nexor2_x0 i0=$abc$109383$new_n29385_ i1=$abc$109383$new_n29451_ nq=$abc$109383$new_n52356_
+.subckt nexor2_x0 i0=$abc$109383$new_n52341_ i1=$abc$109383$new_n52356_ nq=$abc$109383$new_n52357_
+.subckt mux2_x1 cmd=$abc$109383$new_n52357_ i0=$abc$109383$new_n52355_ i1=$abc$109383$new_n52339_ q=$abc$109383$new_n52358_
+.subckt or21nand_x1 i0=$abc$109383$new_n52338_ i1=$abc$109383$new_n52358_ i2=$abc$109383$new_n52348_ nq=$abc$109383$new_n52359_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52359_ i1=soc.cpu.minerva.loadstore.dbus__sel[2] q=$abc$109383$new_n52360_
+.subckt and2_x1 i0=$abc$109383$new_n52360_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103454
 .subckt buf_x4 i=$abc$109383$new_n52357_ q=$abc$109383$new_n52362_
-.subckt oa22_x2 i0=$abc$109383$new_n52351_ i1=$abc$109383$new_n52362_ i2=$abc$109383$new_n52348_ q=$abc$109383$new_n52363_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52363_ i1=soc.cpu.minerva.loadstore.dbus__sel[3] q=$abc$109383$new_n52364_
-.subckt a2_x2 i0=$abc$109383$new_n52364_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103458
+.subckt or21nand_x1 i0=$abc$109383$new_n52351_ i1=$abc$109383$new_n52362_ i2=$abc$109383$new_n52348_ nq=$abc$109383$new_n52363_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52363_ i1=soc.cpu.minerva.loadstore.dbus__sel[3] q=$abc$109383$new_n52364_
+.subckt and2_x1 i0=$abc$109383$new_n52364_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103458
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n52366_
-.subckt a4_x2 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n52366_ i2=soc.cpu.minerva.payload__store$51 i3=$abc$109383$new_n29193_ q=$abc$109383$new_n52367_
-.subckt oa22_x2 i0=soc.cpu.minerva.loadstore.dbus__we i1=$abc$109383$new_n51870_ i2=$abc$109383$new_n52367_ q=$abc$109383$new_n52368_
-.subckt a2_x2 i0=$abc$109383$new_n52368_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103462
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[0] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52370_
+.subckt and4_x1 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n52366_ i2=soc.cpu.minerva.payload__store$51 i3=$abc$109383$new_n29193_ q=$abc$109383$new_n52367_
+.subckt or21nand_x1 i0=soc.cpu.minerva.loadstore.dbus__we i1=$abc$109383$new_n51870_ i2=$abc$109383$new_n52367_ nq=$abc$109383$new_n52368_
+.subckt and2_x1 i0=$abc$109383$new_n52368_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103462
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[0] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52370_
 .subckt nor2_x0 i0=$abc$109383$new_n52329_ i1=$abc$109383$new_n52325_ nq=$abc$109383$new_n52371_
 .subckt buf_x4 i=$abc$109383$new_n52371_ q=$abc$109383$new_n52372_
-.subckt oa22_x2 i0=$abc$109383$new_n52332_ i1=$abc$109383$new_n52372_ i2=$abc$109383$new_n52339_ q=$abc$109383$new_n52373_
+.subckt or21nand_x1 i0=$abc$109383$new_n52332_ i1=$abc$109383$new_n52372_ i2=$abc$109383$new_n52339_ nq=$abc$109383$new_n52373_
 .subckt buf_x4 i=$abc$109383$new_n52372_ q=$abc$109383$new_n52374_
-.subckt a2_x2 i0=$abc$109383$new_n52374_ i1=soc.cpu.minerva.payload__store_operand$46[0] q=$abc$109383$new_n52375_
-.subckt a2_x2 i0=$abc$109383$new_n52375_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52376_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52376_ i2=$abc$109383$new_n52370_ q=$abc$109383$new_n52377_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52377_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[0] q=$abc$109383$new_n52378_
-.subckt a2_x2 i0=$abc$109383$new_n52378_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103466
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[1] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52380_
+.subckt and2_x1 i0=$abc$109383$new_n52374_ i1=soc.cpu.minerva.payload__store_operand$46[0] q=$abc$109383$new_n52375_
+.subckt and2_x1 i0=$abc$109383$new_n52375_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52376_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52376_ i2=$abc$109383$new_n52370_ nq=$abc$109383$new_n52377_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52377_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[0] q=$abc$109383$new_n52378_
+.subckt and2_x1 i0=$abc$109383$new_n52378_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103466
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[1] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52380_
 .subckt buf_x4 i=$abc$109383$new_n52372_ q=$abc$109383$new_n52381_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[1] q=$abc$109383$new_n52382_
-.subckt a2_x2 i0=$abc$109383$new_n52382_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52383_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52383_ i2=$abc$109383$new_n52380_ q=$abc$109383$new_n52384_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52384_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[1] q=$abc$109383$new_n52385_
-.subckt a2_x2 i0=$abc$109383$new_n52385_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103470
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[2] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52387_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[2] q=$abc$109383$new_n52388_
-.subckt a2_x2 i0=$abc$109383$new_n52388_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52389_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52389_ i2=$abc$109383$new_n52387_ q=$abc$109383$new_n52390_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52390_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[2] q=$abc$109383$new_n52391_
-.subckt a2_x2 i0=$abc$109383$new_n52391_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103474
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[3] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52393_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[3] q=$abc$109383$new_n52394_
-.subckt a2_x2 i0=$abc$109383$new_n52394_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52395_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52395_ i2=$abc$109383$new_n52393_ q=$abc$109383$new_n52396_
-.subckt mx2_x2 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52396_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[3] q=$abc$109383$new_n52397_
-.subckt a2_x2 i0=$abc$109383$new_n52397_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103478
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[1] q=$abc$109383$new_n52382_
+.subckt and2_x1 i0=$abc$109383$new_n52382_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52383_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52383_ i2=$abc$109383$new_n52380_ nq=$abc$109383$new_n52384_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52384_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[1] q=$abc$109383$new_n52385_
+.subckt and2_x1 i0=$abc$109383$new_n52385_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103470
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[2] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52387_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[2] q=$abc$109383$new_n52388_
+.subckt and2_x1 i0=$abc$109383$new_n52388_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52389_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52389_ i2=$abc$109383$new_n52387_ nq=$abc$109383$new_n52390_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52390_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[2] q=$abc$109383$new_n52391_
+.subckt and2_x1 i0=$abc$109383$new_n52391_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103474
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[3] i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52393_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[3] q=$abc$109383$new_n52394_
+.subckt and2_x1 i0=$abc$109383$new_n52394_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52395_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52395_ i2=$abc$109383$new_n52393_ nq=$abc$109383$new_n52396_
+.subckt mux2_x1 cmd=$abc$109383$new_n51899_ i0=$abc$109383$new_n52396_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[3] q=$abc$109383$new_n52397_
+.subckt and2_x1 i0=$abc$109383$new_n52397_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103478
 .subckt buf_x4 i=$abc$109383$new_n52334_ q=$abc$109383$new_n52399_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[4] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52400_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[4] q=$abc$109383$new_n52401_
-.subckt a2_x2 i0=$abc$109383$new_n52401_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52402_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52402_ i2=$abc$109383$new_n52400_ q=$abc$109383$new_n52403_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[4] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52400_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[4] q=$abc$109383$new_n52401_
+.subckt and2_x1 i0=$abc$109383$new_n52401_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52402_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52402_ i2=$abc$109383$new_n52400_ nq=$abc$109383$new_n52403_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n52404_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52403_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[4] q=$abc$109383$new_n52405_
-.subckt a2_x2 i0=$abc$109383$new_n52405_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103482
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52403_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[4] q=$abc$109383$new_n52405_
+.subckt and2_x1 i0=$abc$109383$new_n52405_ i1=$abc$109383$new_n52324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103482
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n52407_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[5] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52408_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[5] q=$abc$109383$new_n52409_
-.subckt a2_x2 i0=$abc$109383$new_n52409_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52410_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52410_ i2=$abc$109383$new_n52408_ q=$abc$109383$new_n52411_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52411_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[5] q=$abc$109383$new_n52412_
-.subckt a2_x2 i0=$abc$109383$new_n52412_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103486
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[5] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52408_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[5] q=$abc$109383$new_n52409_
+.subckt and2_x1 i0=$abc$109383$new_n52409_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52410_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52410_ i2=$abc$109383$new_n52408_ nq=$abc$109383$new_n52411_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52411_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[5] q=$abc$109383$new_n52412_
+.subckt and2_x1 i0=$abc$109383$new_n52412_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103486
 .subckt buf_x4 i=$abc$109383$new_n52329_ q=$abc$109383$new_n52414_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[6] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52415_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[6] q=$abc$109383$new_n52416_
-.subckt a2_x2 i0=$abc$109383$new_n52416_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52417_
-.subckt oa22_x2 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52417_ i2=$abc$109383$new_n52415_ q=$abc$109383$new_n52418_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52418_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[6] q=$abc$109383$new_n52419_
-.subckt a2_x2 i0=$abc$109383$new_n52419_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103490
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[7] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52421_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[7] q=$abc$109383$new_n52422_
-.subckt a2_x2 i0=$abc$109383$new_n52422_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52423_
-.subckt oa22_x2 i0=$abc$109383$new_n52342_ i1=$abc$109383$new_n52423_ i2=$abc$109383$new_n52421_ q=$abc$109383$new_n52424_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52424_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[7] q=$abc$109383$new_n52425_
-.subckt a2_x2 i0=$abc$109383$new_n52425_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103494
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[8] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52427_
-.subckt a3_x2 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[8] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52428_
-.subckt o2_x2 i0=$abc$109383$new_n52329_ i1=$abc$109383$new_n52325_ q=$abc$109383$new_n52429_
-.subckt ao22_x2 i0=$abc$109383$new_n52333_ i1=$abc$109383$new_n52429_ i2=$abc$109383$new_n52350_ q=$abc$109383$new_n52430_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[6] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52415_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[6] q=$abc$109383$new_n52416_
+.subckt and2_x1 i0=$abc$109383$new_n52416_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52417_
+.subckt or21nand_x1 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52417_ i2=$abc$109383$new_n52415_ nq=$abc$109383$new_n52418_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52418_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[6] q=$abc$109383$new_n52419_
+.subckt and2_x1 i0=$abc$109383$new_n52419_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103490
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[7] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52421_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[7] q=$abc$109383$new_n52422_
+.subckt and2_x1 i0=$abc$109383$new_n52422_ i1=$abc$109383$new_n52373_ q=$abc$109383$new_n52423_
+.subckt or21nand_x1 i0=$abc$109383$new_n52342_ i1=$abc$109383$new_n52423_ i2=$abc$109383$new_n52421_ nq=$abc$109383$new_n52424_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52424_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[7] q=$abc$109383$new_n52425_
+.subckt and2_x1 i0=$abc$109383$new_n52425_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103494
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[8] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52328_ q=$abc$109383$new_n52427_
+.subckt and3_x1 i0=$abc$109383$new_n52381_ i1=soc.cpu.minerva.payload__store_operand$46[8] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52428_
+.subckt or2_x1 i0=$abc$109383$new_n52329_ i1=$abc$109383$new_n52325_ q=$abc$109383$new_n52429_
+.subckt and21nor_x1 i0=$abc$109383$new_n52333_ i1=$abc$109383$new_n52429_ i2=$abc$109383$new_n52350_ nq=$abc$109383$new_n52430_
 .subckt buf_x4 i=$abc$109383$new_n52430_ q=$abc$109383$new_n52431_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[0] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52428_ q=$abc$109383$new_n52432_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=$abc$109383$new_n52342_ q=$abc$109383$new_n52433_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52432_ i2=$abc$109383$new_n52427_ q=$abc$109383$new_n52434_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52434_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[8] q=$abc$109383$new_n52435_
-.subckt a2_x2 i0=$abc$109383$new_n52435_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103498
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[0] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52428_ nq=$abc$109383$new_n52432_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=$abc$109383$new_n52342_ q=$abc$109383$new_n52433_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52432_ i2=$abc$109383$new_n52427_ nq=$abc$109383$new_n52434_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52434_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[8] q=$abc$109383$new_n52435_
+.subckt and2_x1 i0=$abc$109383$new_n52435_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103498
 .subckt buf_x4 i=$abc$109383$new_n52327_ q=$abc$109383$new_n52437_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[9] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52438_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[9] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52439_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[1] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52439_ q=$abc$109383$new_n52440_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52440_ i2=$abc$109383$new_n52438_ q=$abc$109383$new_n52441_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52441_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[9] q=$abc$109383$new_n52442_
-.subckt a2_x2 i0=$abc$109383$new_n52442_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103502
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[10] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52444_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[10] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52445_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[2] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52445_ q=$abc$109383$new_n52446_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52446_ i2=$abc$109383$new_n52444_ q=$abc$109383$new_n52447_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52447_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[10] q=$abc$109383$new_n52448_
-.subckt a2_x2 i0=$abc$109383$new_n52448_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103506
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[11] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52450_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[11] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52451_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[3] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52451_ q=$abc$109383$new_n52452_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52452_ i2=$abc$109383$new_n52450_ q=$abc$109383$new_n52453_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52453_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[11] q=$abc$109383$new_n52454_
-.subckt a2_x2 i0=$abc$109383$new_n52454_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103510
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[12] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52456_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[12] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52457_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[4] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52457_ q=$abc$109383$new_n52458_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52458_ i2=$abc$109383$new_n52456_ q=$abc$109383$new_n52459_
-.subckt mx2_x2 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52459_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[12] q=$abc$109383$new_n52460_
-.subckt a2_x2 i0=$abc$109383$new_n52460_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103514
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[13] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52462_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[13] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52463_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[5] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52463_ q=$abc$109383$new_n52464_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52464_ i2=$abc$109383$new_n52462_ q=$abc$109383$new_n52465_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[9] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52438_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[9] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52439_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[1] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52439_ nq=$abc$109383$new_n52440_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52440_ i2=$abc$109383$new_n52438_ nq=$abc$109383$new_n52441_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52441_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[9] q=$abc$109383$new_n52442_
+.subckt and2_x1 i0=$abc$109383$new_n52442_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103502
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[10] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52444_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[10] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52445_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[2] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52445_ nq=$abc$109383$new_n52446_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52446_ i2=$abc$109383$new_n52444_ nq=$abc$109383$new_n52447_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52447_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[10] q=$abc$109383$new_n52448_
+.subckt and2_x1 i0=$abc$109383$new_n52448_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103506
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[11] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52450_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[11] i2=$abc$109383$new_n52349_ q=$abc$109383$new_n52451_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[3] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52451_ nq=$abc$109383$new_n52452_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52452_ i2=$abc$109383$new_n52450_ nq=$abc$109383$new_n52453_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52453_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[11] q=$abc$109383$new_n52454_
+.subckt and2_x1 i0=$abc$109383$new_n52454_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103510
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[12] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52456_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[12] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52457_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[4] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52457_ nq=$abc$109383$new_n52458_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52458_ i2=$abc$109383$new_n52456_ nq=$abc$109383$new_n52459_
+.subckt mux2_x1 cmd=$abc$109383$new_n52404_ i0=$abc$109383$new_n52459_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[12] q=$abc$109383$new_n52460_
+.subckt and2_x1 i0=$abc$109383$new_n52460_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103514
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[13] i1=$abc$109383$new_n52399_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52462_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[13] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52463_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[5] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52463_ nq=$abc$109383$new_n52464_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52464_ i2=$abc$109383$new_n52462_ nq=$abc$109383$new_n52465_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n52466_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52465_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[13] q=$abc$109383$new_n52467_
-.subckt a2_x2 i0=$abc$109383$new_n52467_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103518
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52465_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[13] q=$abc$109383$new_n52467_
+.subckt and2_x1 i0=$abc$109383$new_n52467_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103518
 .subckt buf_x4 i=$abc$109383$new_n52334_ q=$abc$109383$new_n52469_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[14] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52470_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[14] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52471_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[6] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52471_ q=$abc$109383$new_n52472_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52472_ i2=$abc$109383$new_n52470_ q=$abc$109383$new_n52473_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52473_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[14] q=$abc$109383$new_n52474_
-.subckt a2_x2 i0=$abc$109383$new_n52474_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103522
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[14] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52470_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[14] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52471_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[6] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52471_ nq=$abc$109383$new_n52472_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52472_ i2=$abc$109383$new_n52470_ nq=$abc$109383$new_n52473_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52473_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[14] q=$abc$109383$new_n52474_
+.subckt and2_x1 i0=$abc$109383$new_n52474_ i1=$abc$109383$new_n52407_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103522
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n52476_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[15] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52477_
-.subckt a3_x2 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[15] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52478_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__store_operand$46[7] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52478_ q=$abc$109383$new_n52479_
-.subckt oa22_x2 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52479_ i2=$abc$109383$new_n52477_ q=$abc$109383$new_n52480_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52480_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[15] q=$abc$109383$new_n52481_
-.subckt a2_x2 i0=$abc$109383$new_n52481_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103526
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[15] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52414_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52477_
+.subckt and3_x1 i0=$abc$109383$new_n52372_ i1=soc.cpu.minerva.payload__store_operand$46[15] i2=$abc$109383$new_n52332_ q=$abc$109383$new_n52478_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__store_operand$46[7] i1=$abc$109383$new_n52431_ i2=$abc$109383$new_n52478_ nq=$abc$109383$new_n52479_
+.subckt or21nand_x1 i0=$abc$109383$new_n52433_ i1=$abc$109383$new_n52479_ i2=$abc$109383$new_n52477_ nq=$abc$109383$new_n52480_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52480_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[15] q=$abc$109383$new_n52481_
+.subckt and2_x1 i0=$abc$109383$new_n52481_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103526
 .subckt buf_x4 i=$abc$109383$new_n52329_ q=$abc$109383$new_n52483_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[16] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52484_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52376_ i2=$abc$109383$new_n52484_ q=$abc$109383$new_n52485_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52485_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[16] q=$abc$109383$new_n52486_
-.subckt a2_x2 i0=$abc$109383$new_n52486_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103530
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[17] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52488_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52383_ i2=$abc$109383$new_n52488_ q=$abc$109383$new_n52489_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52489_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[17] q=$abc$109383$new_n52490_
-.subckt a2_x2 i0=$abc$109383$new_n52490_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103534
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[18] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52492_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52389_ i2=$abc$109383$new_n52492_ q=$abc$109383$new_n52493_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52493_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[18] q=$abc$109383$new_n52494_
-.subckt a2_x2 i0=$abc$109383$new_n52494_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103538
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[16] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52484_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52376_ i2=$abc$109383$new_n52484_ nq=$abc$109383$new_n52485_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52485_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[16] q=$abc$109383$new_n52486_
+.subckt and2_x1 i0=$abc$109383$new_n52486_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103530
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[17] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52488_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52383_ i2=$abc$109383$new_n52488_ nq=$abc$109383$new_n52489_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52489_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[17] q=$abc$109383$new_n52490_
+.subckt and2_x1 i0=$abc$109383$new_n52490_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103534
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[18] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52437_ q=$abc$109383$new_n52492_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52389_ i2=$abc$109383$new_n52492_ nq=$abc$109383$new_n52493_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52493_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[18] q=$abc$109383$new_n52494_
+.subckt and2_x1 i0=$abc$109383$new_n52494_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103538
 .subckt buf_x4 i=$abc$109383$new_n52327_ q=$abc$109383$new_n52496_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[19] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52497_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52395_ i2=$abc$109383$new_n52497_ q=$abc$109383$new_n52498_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52498_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[19] q=$abc$109383$new_n52499_
-.subckt a2_x2 i0=$abc$109383$new_n52499_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103542
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[20] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52501_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52402_ i2=$abc$109383$new_n52501_ q=$abc$109383$new_n52502_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52502_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[20] q=$abc$109383$new_n52503_
-.subckt a2_x2 i0=$abc$109383$new_n52503_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103546
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[21] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52505_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52410_ i2=$abc$109383$new_n52505_ q=$abc$109383$new_n52506_
-.subckt mx2_x2 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52506_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[21] q=$abc$109383$new_n52507_
-.subckt a2_x2 i0=$abc$109383$new_n52507_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103550
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[22] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52509_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52417_ i2=$abc$109383$new_n52509_ q=$abc$109383$new_n52510_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[19] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52497_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52395_ i2=$abc$109383$new_n52497_ nq=$abc$109383$new_n52498_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52498_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[19] q=$abc$109383$new_n52499_
+.subckt and2_x1 i0=$abc$109383$new_n52499_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103542
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[20] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52501_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52402_ i2=$abc$109383$new_n52501_ nq=$abc$109383$new_n52502_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52502_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[20] q=$abc$109383$new_n52503_
+.subckt and2_x1 i0=$abc$109383$new_n52503_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103546
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[21] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52505_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52410_ i2=$abc$109383$new_n52505_ nq=$abc$109383$new_n52506_
+.subckt mux2_x1 cmd=$abc$109383$new_n52466_ i0=$abc$109383$new_n52506_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[21] q=$abc$109383$new_n52507_
+.subckt and2_x1 i0=$abc$109383$new_n52507_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103550
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[22] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52509_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52417_ i2=$abc$109383$new_n52509_ nq=$abc$109383$new_n52510_
 .subckt buf_x4 i=$abc$109383$new_n51869_ q=$abc$109383$new_n52511_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52510_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[22] q=$abc$109383$new_n52512_
-.subckt a2_x2 i0=$abc$109383$new_n52512_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103554
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[23] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52514_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52423_ i2=$abc$109383$new_n52514_ q=$abc$109383$new_n52515_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52515_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[23] q=$abc$109383$new_n52516_
-.subckt a2_x2 i0=$abc$109383$new_n52516_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103558
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52510_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[22] q=$abc$109383$new_n52512_
+.subckt and2_x1 i0=$abc$109383$new_n52512_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103554
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[23] i1=$abc$109383$new_n52469_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52514_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n52423_ i2=$abc$109383$new_n52514_ nq=$abc$109383$new_n52515_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52515_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[23] q=$abc$109383$new_n52516_
+.subckt and2_x1 i0=$abc$109383$new_n52516_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103558
 .subckt buf_x4 i=$abc$109383$new_n52334_ q=$abc$109383$new_n52518_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[24] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52519_
-.subckt a2_x2 i0=$abc$109383$new_n52381_ i1=$abc$109383$new_n52357_ q=$abc$109383$new_n52520_
-.subckt oa22_x2 i0=$abc$109383$new_n52432_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52519_ q=$abc$109383$new_n52521_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52521_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[24] q=$abc$109383$new_n52522_
-.subckt a2_x2 i0=$abc$109383$new_n52522_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103562
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[24] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52519_
+.subckt and2_x1 i0=$abc$109383$new_n52381_ i1=$abc$109383$new_n52357_ q=$abc$109383$new_n52520_
+.subckt or21nand_x1 i0=$abc$109383$new_n52432_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52519_ nq=$abc$109383$new_n52521_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52521_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[24] q=$abc$109383$new_n52522_
+.subckt and2_x1 i0=$abc$109383$new_n52522_ i1=$abc$109383$new_n52476_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103562
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n52524_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[25] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52525_
-.subckt oa22_x2 i0=$abc$109383$new_n52440_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52525_ q=$abc$109383$new_n52526_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52526_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[25] q=$abc$109383$new_n52527_
-.subckt a2_x2 i0=$abc$109383$new_n52527_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103566
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[26] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52529_
-.subckt oa22_x2 i0=$abc$109383$new_n52446_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52529_ q=$abc$109383$new_n52530_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52530_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[26] q=$abc$109383$new_n52531_
-.subckt a2_x2 i0=$abc$109383$new_n52531_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103570
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[27] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52533_
-.subckt oa22_x2 i0=$abc$109383$new_n52452_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52533_ q=$abc$109383$new_n52534_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52534_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[27] q=$abc$109383$new_n52535_
-.subckt a2_x2 i0=$abc$109383$new_n52535_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103574
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[28] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52537_
-.subckt oa22_x2 i0=$abc$109383$new_n52458_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52537_ q=$abc$109383$new_n52538_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52538_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[28] q=$abc$109383$new_n52539_
-.subckt a2_x2 i0=$abc$109383$new_n52539_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103578
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[29] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52327_ q=$abc$109383$new_n52541_
-.subckt oa22_x2 i0=$abc$109383$new_n52464_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52541_ q=$abc$109383$new_n52542_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52542_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[29] q=$abc$109383$new_n52543_
-.subckt a2_x2 i0=$abc$109383$new_n52543_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103582
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[30] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52327_ q=$abc$109383$new_n52545_
-.subckt oa22_x2 i0=$abc$109383$new_n52472_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52545_ q=$abc$109383$new_n52546_
-.subckt mx2_x2 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52546_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[30] q=$abc$109383$new_n52547_
-.subckt a2_x2 i0=$abc$109383$new_n52547_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103586
-.subckt a4_x2 i0=soc.cpu.minerva.payload__store_operand$46[31] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52327_ q=$abc$109383$new_n52549_
-.subckt oa22_x2 i0=$abc$109383$new_n52479_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52549_ q=$abc$109383$new_n52550_
-.subckt mx2_x2 cmd=$abc$109383$new_n51869_ i0=$abc$109383$new_n52550_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[31] q=$abc$109383$new_n52551_
-.subckt a2_x2 i0=$abc$109383$new_n52551_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103590
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[25] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52483_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52525_
+.subckt or21nand_x1 i0=$abc$109383$new_n52440_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52525_ nq=$abc$109383$new_n52526_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52526_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[25] q=$abc$109383$new_n52527_
+.subckt and2_x1 i0=$abc$109383$new_n52527_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103566
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[26] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52529_
+.subckt or21nand_x1 i0=$abc$109383$new_n52446_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52529_ nq=$abc$109383$new_n52530_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52530_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[26] q=$abc$109383$new_n52531_
+.subckt and2_x1 i0=$abc$109383$new_n52531_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103570
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[27] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52533_
+.subckt or21nand_x1 i0=$abc$109383$new_n52452_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52533_ nq=$abc$109383$new_n52534_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52534_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[27] q=$abc$109383$new_n52535_
+.subckt and2_x1 i0=$abc$109383$new_n52535_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103574
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[28] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52496_ q=$abc$109383$new_n52537_
+.subckt or21nand_x1 i0=$abc$109383$new_n52458_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52537_ nq=$abc$109383$new_n52538_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52538_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[28] q=$abc$109383$new_n52539_
+.subckt and2_x1 i0=$abc$109383$new_n52539_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103578
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[29] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52327_ q=$abc$109383$new_n52541_
+.subckt or21nand_x1 i0=$abc$109383$new_n52464_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52541_ nq=$abc$109383$new_n52542_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52542_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[29] q=$abc$109383$new_n52543_
+.subckt and2_x1 i0=$abc$109383$new_n52543_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103582
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[30] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52327_ q=$abc$109383$new_n52545_
+.subckt or21nand_x1 i0=$abc$109383$new_n52472_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52545_ nq=$abc$109383$new_n52546_
+.subckt mux2_x1 cmd=$abc$109383$new_n52511_ i0=$abc$109383$new_n52546_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[30] q=$abc$109383$new_n52547_
+.subckt and2_x1 i0=$abc$109383$new_n52547_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103586
+.subckt and4_x1 i0=soc.cpu.minerva.payload__store_operand$46[31] i1=$abc$109383$new_n52518_ i2=$abc$109383$new_n52330_ i3=$abc$109383$new_n52327_ q=$abc$109383$new_n52549_
+.subckt or21nand_x1 i0=$abc$109383$new_n52479_ i1=$abc$109383$new_n52520_ i2=$abc$109383$new_n52549_ nq=$abc$109383$new_n52550_
+.subckt mux2_x1 cmd=$abc$109383$new_n51869_ i0=$abc$109383$new_n52550_ i1=soc.cpu.minerva.loadstore.dbus__dat_w[31] q=$abc$109383$new_n52551_
+.subckt and2_x1 i0=$abc$109383$new_n52551_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103590
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n52553_
 .subckt nor2_x0 i0=$abc$109383$new_n43289_ i1=$abc$109383$new_n28910_ nq=$abc$109383$new_n52554_
-.subckt ao22_x2 i0=$abc$109383$new_n52554_ i1=$abc$109383$new_n43287_ i2=$abc$109383$new_n52553_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103592
-.subckt ao22_x2 i0=$abc$109383$new_n20311_ i1=$abc$109383$new_n19864_ i2=$abc$109383$new_n52553_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103594
-.subckt a3_x2 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[1] i2=$abc$109383$new_n19873_ q=$abc$109383$new_n52557_
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 .subckt nand2_x0 i0=$abc$109383$new_n19931_ i1=$abc$109383$new_n19842_ nq=$abc$109383$new_n52563_
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 .subckt nor2_x0 i0=$abc$109383$new_n52568_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103600
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 .subckt nand2_x0 i0=$abc$109383$new_n52572_ i1=$abc$109383$new_n19849_ nq=$abc$109383$new_n52573_
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 .subckt nand3_x0 i0=$abc$109383$new_n19930_ i1=$abc$109383$new_n19966_ i2=$abc$109383$new_n19926_ nq=$abc$109383$new_n52575_
 .subckt nand2_x0 i0=$abc$109383$new_n52575_ i1=$abc$109383$new_n19842_ nq=$abc$109383$new_n52576_
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 .subckt nor2_x0 i0=$abc$109383$new_n52577_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103604
 .subckt buf_x4 i=$abc$109383$new_n19842_ q=$abc$109383$new_n52579_
 .subckt nand2_x0 i0=$abc$109383$new_n19984_ i1=$abc$109383$new_n52579_ nq=$abc$109383$new_n52580_
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 .subckt nor2_x0 i0=$abc$109383$new_n52585_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103606
 .subckt buf_x4 i=$abc$109383$new_n27421_ q=$abc$109383$new_n52587_
 .subckt nor3_x0 i0=$abc$109383$new_n20007_ i1=$abc$109383$new_n19994_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103608
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+.subckt and2_x1 i0=$abc$109383$new_n20111_ i1=$abc$109383$new_n19920_ q=$abc$109383$new_n52624_
+.subckt or2_x1 i0=$abc$109383$new_n20118_ i1=$abc$109383$new_n20117_ q=$abc$109383$new_n52625_
+.subckt and21nor_x1 i0=$abc$109383$new_n52625_ i1=$abc$109383$new_n52590_ i2=$abc$109383$new_n52579_ nq=$abc$109383$new_n52626_
+.subckt and21nor_x1 i0=$abc$109383$new_n52626_ i1=$abc$109383$new_n52624_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103624
+.subckt and2_x1 i0=$abc$109383$new_n20133_ i1=$abc$109383$new_n52524_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103626
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n52629_
-.subckt a2_x2 i0=$abc$109383$new_n20140_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103628
-.subckt a2_x2 i0=$abc$109383$new_n20146_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103630
-.subckt a2_x2 i0=$abc$109383$new_n20152_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103632
-.subckt a2_x2 i0=$abc$109383$new_n20159_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103634
-.subckt a2_x2 i0=$abc$109383$new_n20165_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103636
-.subckt a2_x2 i0=$abc$109383$new_n20171_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103638
-.subckt a2_x2 i0=$abc$109383$new_n20177_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103640
-.subckt a2_x2 i0=$abc$109383$new_n20183_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103642
-.subckt a2_x2 i0=$abc$109383$new_n20189_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103644
-.subckt a2_x2 i0=$abc$109383$new_n20195_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103646
+.subckt and2_x1 i0=$abc$109383$new_n20140_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103628
+.subckt and2_x1 i0=$abc$109383$new_n20146_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103630
+.subckt and2_x1 i0=$abc$109383$new_n20152_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103632
+.subckt and2_x1 i0=$abc$109383$new_n20159_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103634
+.subckt and2_x1 i0=$abc$109383$new_n20165_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103636
+.subckt and2_x1 i0=$abc$109383$new_n20171_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103638
+.subckt and2_x1 i0=$abc$109383$new_n20177_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103640
+.subckt and2_x1 i0=$abc$109383$new_n20183_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103642
+.subckt and2_x1 i0=$abc$109383$new_n20189_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103644
+.subckt and2_x1 i0=$abc$109383$new_n20195_ i1=$abc$109383$new_n52629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103646
 .subckt buf_x4 i=$abc$109383$new_n29187_ q=$abc$109383$new_n52640_
-.subckt a2_x2 i0=$abc$109383$new_n20201_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103648
-.subckt a2_x2 i0=$abc$109383$new_n20207_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103650
-.subckt a2_x2 i0=$abc$109383$new_n20213_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103652
-.subckt a2_x2 i0=$abc$109383$new_n20219_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103654
-.subckt a2_x2 i0=$abc$109383$new_n20225_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103656
-.subckt a3_x2 i0=$abc$109383$new_n19838_ i1=$abc$109383$new_n19836_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103658
+.subckt and2_x1 i0=$abc$109383$new_n20201_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103648
+.subckt and2_x1 i0=$abc$109383$new_n20207_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103650
+.subckt and2_x1 i0=$abc$109383$new_n20213_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103652
+.subckt and2_x1 i0=$abc$109383$new_n20219_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103654
+.subckt and2_x1 i0=$abc$109383$new_n20225_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103656
+.subckt and3_x1 i0=$abc$109383$new_n19838_ i1=$abc$109383$new_n19836_ i2=$abc$109383$new_n30133_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103658
 .subckt nand3_x0 i0=$abc$109383$new_n19683_ i1=$abc$109383$new_n29036_ i2=$abc$109383$new_n27891_ nq=$abc$109383$new_n52647_
 .subckt nor3_x0 i0=$abc$109383$new_n52647_ i1=$abc$109383$new_n28119_ i2=$abc$109383$new_n19688_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103916
-.subckt a2_x2 i0=$abc$109383$new_n15259_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n52649_
+.subckt and2_x1 i0=$abc$109383$new_n15259_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n52649_
 .subckt buf_x4 i=$abc$109383$new_n15341_ q=$abc$109383$new_n52650_
 .subckt buf_x4 i=$abc$109383$new_n52650_ q=$abc$109383$new_n52651_
-.subckt a3_x2 i0=$abc$109383$new_n15330_ i1=$abc$109383$new_n15294_ i2=$abc$109383$new_n15329_ q=$abc$109383$new_n52652_
+.subckt and3_x1 i0=$abc$109383$new_n15330_ i1=$abc$109383$new_n15294_ i2=$abc$109383$new_n15329_ q=$abc$109383$new_n52652_
 .subckt nand2_x0 i0=$abc$109383$new_n30273_ i1=$abc$109383$new_n30289_ nq=$abc$109383$new_n52653_
 .subckt nand4_x0 i0=$abc$109383$new_n52653_ i1=$abc$109383$new_n52652_ i2=$abc$109383$new_n52651_ i3=$abc$109383$new_n15293_ nq=$abc$109383$new_n52654_
 .subckt nand2_x0 i0=$abc$109383$new_n52654_ i1=$abc$109383$new_n15410_ nq=$abc$109383$new_n52655_
-.subckt a2_x2 i0=$abc$109383$new_n52655_ i1=$abc$109383$new_n15333_ q=$abc$109383$new_n52656_
+.subckt and2_x1 i0=$abc$109383$new_n52655_ i1=$abc$109383$new_n15333_ q=$abc$109383$new_n52656_
 .subckt nand3_x0 i0=$abc$109383$new_n52656_ i1=$abc$109383$new_n52649_ i2=soc.cpu.minerva.f.valid$1 nq=$abc$109383$new_n52657_
 .subckt buf_x4 i=$abc$109383$new_n52657_ q=$abc$109383$new_n52658_
-.subckt a3_x2 i0=$abc$109383$new_n15252_ i1=$abc$109383$new_n15250_ i2=$abc$109383$new_n15248_ q=$abc$109383$new_n52659_
-.subckt ao22_x2 i0=$abc$109383$new_n15256_ i1=$abc$109383$new_n52659_ i2=soc.cpu.minerva.a.valid q=$abc$109383$new_n52660_
-.subckt a2_x2 i0=$abc$109383$new_n52660_ i1=$abc$109383$new_n15259_ q=$abc$109383$new_n52661_
+.subckt and3_x1 i0=$abc$109383$new_n15252_ i1=$abc$109383$new_n15250_ i2=$abc$109383$new_n15248_ q=$abc$109383$new_n52659_
+.subckt and21nor_x1 i0=$abc$109383$new_n15256_ i1=$abc$109383$new_n52659_ i2=soc.cpu.minerva.a.valid nq=$abc$109383$new_n52660_
+.subckt and2_x1 i0=$abc$109383$new_n52660_ i1=$abc$109383$new_n15259_ q=$abc$109383$new_n52661_
 .subckt nand2_x0 i0=$abc$109383$new_n43279_ i1=$abc$109383$new_n14775_ nq=$abc$109383$new_n52662_
-.subckt a3_x2 i0=$abc$109383$new_n52662_ i1=$abc$109383$new_n52661_ i2=$abc$109383$new_n52658_ q=$abc$109383$new_n52663_
+.subckt and3_x1 i0=$abc$109383$new_n52662_ i1=$abc$109383$new_n52661_ i2=$abc$109383$new_n52658_ q=$abc$109383$new_n52663_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__cyc nq=$abc$109383$new_n52664_
-.subckt ao22_x2 i0=$abc$109383$new_n52664_ i1=$abc$109383$new_n52663_ i2=soc.cpu.minerva.fetch.ibus__stb q=$abc$109383$new_n52665_
+.subckt and21nor_x1 i0=$abc$109383$new_n52664_ i1=$abc$109383$new_n52663_ i2=soc.cpu.minerva.fetch.ibus__stb nq=$abc$109383$new_n52665_
 .subckt buf_x4 i=$abc$109383$new_n30141_ q=$abc$109383$new_n52666_
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n52667_
-.subckt oa22_x2 i0=$abc$109383$new_n52667_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n52665_ q=$abc$109383$new_n52668_
-.subckt a2_x2 i0=$abc$109383$new_n52668_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103920
+.subckt or21nand_x1 i0=$abc$109383$new_n52667_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n52665_ nq=$abc$109383$new_n52668_
+.subckt and2_x1 i0=$abc$109383$new_n52668_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103920
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[0] nq=$abc$109383$new_n52670_
-.subckt ao22_x2 i0=$abc$109383$new_n43677_ i1=$abc$109383$new_n43646_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n52671_
-.subckt oa22_x2 i0=$abc$109383$new_n43763_ i1=$abc$109383$new_n43761_ i2=$abc$109383$new_n43767_ q=$abc$109383$new_n52672_
+.subckt and21nor_x1 i0=$abc$109383$new_n43677_ i1=$abc$109383$new_n43646_ i2=$abc$109383$new_n44444_ nq=$abc$109383$new_n52671_
+.subckt or21nand_x1 i0=$abc$109383$new_n43763_ i1=$abc$109383$new_n43761_ i2=$abc$109383$new_n43767_ nq=$abc$109383$new_n52672_
 .subckt nor2_x0 i0=$abc$109383$new_n52672_ i1=$abc$109383$new_n43758_ nq=$abc$109383$new_n52673_
 .subckt nand2_x0 i0=soc.ram.ram[127][0] i1=$abc$109383$new_n44403_ nq=$abc$109383$new_n52674_
 .subckt inv_x0 i=soc.ram.ram[126][0] nq=$abc$109383$new_n52675_
-.subckt ao22_x2 i0=$abc$109383$new_n43517_ i1=$abc$109383$new_n52675_ i2=$abc$109383$new_n45030_ q=$abc$109383$new_n52676_
+.subckt and21nor_x1 i0=$abc$109383$new_n43517_ i1=$abc$109383$new_n52675_ i2=$abc$109383$new_n45030_ nq=$abc$109383$new_n52676_
 .subckt nand2_x0 i0=$abc$109383$new_n52676_ i1=$abc$109383$new_n52674_ nq=$abc$109383$new_n52677_
-.subckt a2_x2 i0=soc.ram.ram[123][0] i1=$abc$109383$new_n44377_ q=$abc$109383$new_n52678_
-.subckt oa22_x2 i0=$abc$109383$new_n45550_ i1=soc.ram.ram[122][0] i2=$abc$109383$new_n43574_ q=$abc$109383$new_n52679_
-.subckt ao22_x2 i0=$abc$109383$new_n52679_ i1=$abc$109383$new_n52678_ i2=$abc$109383$new_n43947_ q=$abc$109383$new_n52680_
+.subckt and2_x1 i0=soc.ram.ram[123][0] i1=$abc$109383$new_n44377_ q=$abc$109383$new_n52678_
+.subckt or21nand_x1 i0=$abc$109383$new_n45550_ i1=soc.ram.ram[122][0] i2=$abc$109383$new_n43574_ nq=$abc$109383$new_n52679_
+.subckt and21nor_x1 i0=$abc$109383$new_n52679_ i1=$abc$109383$new_n52678_ i2=$abc$109383$new_n43947_ nq=$abc$109383$new_n52680_
 .subckt nand2_x0 i0=$abc$109383$new_n52680_ i1=$abc$109383$new_n52677_ nq=$abc$109383$new_n52681_
 .subckt nand2_x0 i0=soc.ram.ram[125][0] i1=$abc$109383$new_n43630_ nq=$abc$109383$new_n52682_
 .subckt inv_x0 i=soc.ram.ram[124][0] nq=$abc$109383$new_n52683_
-.subckt ao22_x2 i0=$abc$109383$new_n43481_ i1=$abc$109383$new_n52683_ i2=$abc$109383$new_n43692_ q=$abc$109383$new_n52684_
-.subckt a2_x2 i0=$abc$109383$new_n52684_ i1=$abc$109383$new_n52682_ q=$abc$109383$new_n52685_
+.subckt and21nor_x1 i0=$abc$109383$new_n43481_ i1=$abc$109383$new_n52683_ i2=$abc$109383$new_n43692_ nq=$abc$109383$new_n52684_
+.subckt and2_x1 i0=$abc$109383$new_n52684_ i1=$abc$109383$new_n52682_ q=$abc$109383$new_n52685_
 .subckt nand2_x0 i0=soc.ram.ram[121][0] i1=$abc$109383$new_n46814_ nq=$abc$109383$new_n52686_
 .subckt inv_x0 i=soc.ram.ram[120][0] nq=$abc$109383$new_n52687_
-.subckt ao22_x2 i0=$abc$109383$new_n43556_ i1=$abc$109383$new_n52687_ i2=$abc$109383$new_n43877_ q=$abc$109383$new_n52688_
-.subckt oa22_x2 i0=$abc$109383$new_n52688_ i1=$abc$109383$new_n52686_ i2=$abc$109383$new_n43402_ q=$abc$109383$new_n52689_
-.subckt ao22_x2 i0=$abc$109383$new_n52689_ i1=$abc$109383$new_n52685_ i2=$abc$109383$new_n44390_ q=$abc$109383$new_n52690_
-.subckt a2_x2 i0=$abc$109383$new_n52690_ i1=$abc$109383$new_n52681_ q=$abc$109383$new_n52691_
-.subckt ao22_x2 i0=$abc$109383$new_n52691_ i1=$abc$109383$new_n52673_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n52692_
-.subckt mx2_x2 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[98][0] i1=soc.ram.ram[99][0] q=$abc$109383$new_n52693_
-.subckt o2_x2 i0=$abc$109383$new_n52693_ i1=$abc$109383$new_n45265_ q=$abc$109383$new_n52694_
-.subckt mx2_x2 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[102][0] i1=soc.ram.ram[103][0] q=$abc$109383$new_n52695_
-.subckt ao22_x2 i0=$abc$109383$new_n52695_ i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n43580_ q=$abc$109383$new_n52696_
+.subckt and21nor_x1 i0=$abc$109383$new_n43556_ i1=$abc$109383$new_n52687_ i2=$abc$109383$new_n43877_ nq=$abc$109383$new_n52688_
+.subckt or21nand_x1 i0=$abc$109383$new_n52688_ i1=$abc$109383$new_n52686_ i2=$abc$109383$new_n43402_ nq=$abc$109383$new_n52689_
+.subckt and21nor_x1 i0=$abc$109383$new_n52689_ i1=$abc$109383$new_n52685_ i2=$abc$109383$new_n44390_ nq=$abc$109383$new_n52690_
+.subckt and2_x1 i0=$abc$109383$new_n52690_ i1=$abc$109383$new_n52681_ q=$abc$109383$new_n52691_
+.subckt and21nor_x1 i0=$abc$109383$new_n52691_ i1=$abc$109383$new_n52673_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n52692_
+.subckt mux2_x1 cmd=$abc$109383$new_n45941_ i0=soc.ram.ram[98][0] i1=soc.ram.ram[99][0] q=$abc$109383$new_n52693_
+.subckt or2_x1 i0=$abc$109383$new_n52693_ i1=$abc$109383$new_n45265_ q=$abc$109383$new_n52694_
+.subckt mux2_x1 cmd=$abc$109383$new_n43377_ i0=soc.ram.ram[102][0] i1=soc.ram.ram[103][0] q=$abc$109383$new_n52695_
+.subckt and21nor_x1 i0=$abc$109383$new_n52695_ i1=$abc$109383$new_n45157_ i2=$abc$109383$new_n43580_ nq=$abc$109383$new_n52696_
 .subckt nand2_x0 i0=$abc$109383$new_n52696_ i1=$abc$109383$new_n52694_ nq=$abc$109383$new_n52697_
-.subckt mx2_x2 cmd=$abc$109383$new_n43481_ i0=soc.ram.ram[96][0] i1=soc.ram.ram[97][0] q=$abc$109383$new_n52698_
+.subckt mux2_x1 cmd=$abc$109383$new_n43481_ i0=soc.ram.ram[96][0] i1=soc.ram.ram[97][0] q=$abc$109383$new_n52698_
 .subckt nor2_x0 i0=$abc$109383$new_n52698_ i1=$abc$109383$new_n44633_ nq=$abc$109383$new_n52699_
 .subckt inv_x0 i=soc.ram.ram[100][0] nq=$abc$109383$new_n52700_
-.subckt mx2_x2 cmd=$abc$109383$new_n43355_ i0=$abc$109383$new_n43745_ i1=$abc$109383$new_n52700_ q=$abc$109383$new_n52701_
-.subckt oa22_x2 i0=$abc$109383$new_n52701_ i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n43402_ q=$abc$109383$new_n52702_
-.subckt ao22_x2 i0=$abc$109383$new_n52702_ i1=$abc$109383$new_n52699_ i2=$abc$109383$new_n44523_ q=$abc$109383$new_n52703_
-.subckt a2_x2 i0=$abc$109383$new_n52703_ i1=$abc$109383$new_n52697_ q=$abc$109383$new_n52704_
+.subckt mux2_x1 cmd=$abc$109383$new_n43355_ i0=$abc$109383$new_n43745_ i1=$abc$109383$new_n52700_ q=$abc$109383$new_n52701_
+.subckt or21nand_x1 i0=$abc$109383$new_n52701_ i1=$abc$109383$new_n45087_ i2=$abc$109383$new_n43402_ nq=$abc$109383$new_n52702_
+.subckt and21nor_x1 i0=$abc$109383$new_n52702_ i1=$abc$109383$new_n52699_ i2=$abc$109383$new_n44523_ nq=$abc$109383$new_n52703_
+.subckt and2_x1 i0=$abc$109383$new_n52703_ i1=$abc$109383$new_n52697_ q=$abc$109383$new_n52704_
 .subckt nand2_x0 i0=$abc$109383$new_n43719_ i1=$abc$109383$new_n43730_ nq=$abc$109383$new_n52705_
 .subckt nand2_x0 i0=$abc$109383$new_n43722_ i1=$abc$109383$new_n45427_ nq=$abc$109383$new_n52706_
-.subckt a3_x2 i0=$abc$109383$new_n52706_ i1=$abc$109383$new_n52705_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n52707_
-.subckt ao22_x2 i0=$abc$109383$new_n52707_ i1=$abc$109383$new_n52704_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n52708_
-.subckt ao22_x2 i0=$abc$109383$new_n52708_ i1=$abc$109383$new_n52692_ i2=$abc$109383$new_n43865_ q=$abc$109383$new_n52709_
+.subckt and3_x1 i0=$abc$109383$new_n52706_ i1=$abc$109383$new_n52705_ i2=$abc$109383$new_n43354_ q=$abc$109383$new_n52707_
+.subckt and21nor_x1 i0=$abc$109383$new_n52707_ i1=$abc$109383$new_n52704_ i2=$abc$109383$new_n45028_ nq=$abc$109383$new_n52708_
+.subckt and21nor_x1 i0=$abc$109383$new_n52708_ i1=$abc$109383$new_n52692_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n52709_
 .subckt nor3_x0 i0=$abc$109383$new_n52709_ i1=$abc$109383$new_n52671_ i2=$abc$109383$new_n46883_ nq=$abc$109383$new_n52710_
-.subckt a2_x2 i0=$abc$109383$new_n43446_ i1=$abc$109383$new_n43430_ q=$abc$109383$new_n52711_
-.subckt a2_x2 i0=$abc$109383$new_n43459_ i1=$abc$109383$new_n43453_ q=$abc$109383$new_n52712_
-.subckt ao22_x2 i0=$abc$109383$new_n52712_ i1=$abc$109383$new_n52711_ i2=$abc$109383$new_n43795_ q=$abc$109383$new_n52713_
-.subckt ao22_x2 i0=$abc$109383$new_n43407_ i1=$abc$109383$new_n43374_ i2=$abc$109383$new_n43468_ q=$abc$109383$new_n52714_
+.subckt and2_x1 i0=$abc$109383$new_n43446_ i1=$abc$109383$new_n43430_ q=$abc$109383$new_n52711_
+.subckt and2_x1 i0=$abc$109383$new_n43459_ i1=$abc$109383$new_n43453_ q=$abc$109383$new_n52712_
+.subckt and21nor_x1 i0=$abc$109383$new_n52712_ i1=$abc$109383$new_n52711_ i2=$abc$109383$new_n43795_ nq=$abc$109383$new_n52713_
+.subckt and21nor_x1 i0=$abc$109383$new_n43407_ i1=$abc$109383$new_n43374_ i2=$abc$109383$new_n43468_ nq=$abc$109383$new_n52714_
 .subckt nor3_x0 i0=$abc$109383$new_n52714_ i1=$abc$109383$new_n52713_ i2=$abc$109383$new_n44739_ nq=$abc$109383$new_n52715_
-.subckt ao22_x2 i0=$abc$109383$new_n43582_ i1=$abc$109383$new_n43568_ i2=$abc$109383$new_n43921_ q=$abc$109383$new_n52716_
-.subckt a3_x2 i0=$abc$109383$new_n43504_ i1=$abc$109383$new_n43493_ i2=$abc$109383$new_n44610_ q=$abc$109383$new_n52717_
-.subckt a2_x2 i0=$abc$109383$new_n43536_ i1=$abc$109383$new_n43523_ q=$abc$109383$new_n52718_
-.subckt ao22_x2 i0=$abc$109383$new_n52718_ i1=$abc$109383$new_n52717_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n52719_
+.subckt and21nor_x1 i0=$abc$109383$new_n43582_ i1=$abc$109383$new_n43568_ i2=$abc$109383$new_n43921_ nq=$abc$109383$new_n52716_
+.subckt and3_x1 i0=$abc$109383$new_n43504_ i1=$abc$109383$new_n43493_ i2=$abc$109383$new_n44610_ q=$abc$109383$new_n52717_
+.subckt and2_x1 i0=$abc$109383$new_n43536_ i1=$abc$109383$new_n43523_ q=$abc$109383$new_n52718_
+.subckt and21nor_x1 i0=$abc$109383$new_n52718_ i1=$abc$109383$new_n52717_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n52719_
 .subckt nor3_x0 i0=$abc$109383$new_n52719_ i1=$abc$109383$new_n52716_ i2=$abc$109383$new_n43410_ nq=$abc$109383$new_n52720_
 .subckt nor3_x0 i0=$abc$109383$new_n52720_ i1=$abc$109383$new_n52715_ i2=$abc$109383$new_n44446_ nq=$abc$109383$new_n52721_
-.subckt ao22_x2 i0=$abc$109383$new_n52721_ i1=$abc$109383$new_n52710_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n52722_
+.subckt and21nor_x1 i0=$abc$109383$new_n52721_ i1=$abc$109383$new_n52710_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n52722_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n27639_ i2=$abc$109383$new_n28379_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[0] nq=$abc$109383$new_n52723_
-.subckt o3_x2 i0=$abc$109383$new_n43304_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52724_
+.subckt or3_x1 i0=$abc$109383$new_n43304_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52724_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[0] nq=$abc$109383$new_n52725_
-.subckt a2_x2 i0=$abc$109383$new_n52725_ i1=$abc$109383$new_n43300_ q=$abc$109383$new_n52726_
+.subckt and2_x1 i0=$abc$109383$new_n52725_ i1=$abc$109383$new_n43300_ q=$abc$109383$new_n52726_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[0] nq=$abc$109383$new_n52727_
 .subckt nand4_x0 i0=$abc$109383$new_n43292_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n45471_ i3=$abc$109383$new_n47238_ nq=$abc$109383$new_n52728_
-.subckt a2_x2 i0=$abc$109383$new_n52728_ i1=$abc$109383$new_n52727_ q=$abc$109383$new_n52729_
+.subckt and2_x1 i0=$abc$109383$new_n52728_ i1=$abc$109383$new_n52727_ q=$abc$109383$new_n52729_
 .subckt nand4_x0 i0=$abc$109383$new_n52729_ i1=$abc$109383$new_n52726_ i2=$abc$109383$new_n52724_ i3=$abc$109383$new_n52723_ nq=$abc$109383$new_n52730_
 .subckt nor2_x0 i0=$abc$109383$new_n52730_ i1=$abc$109383$new_n52722_ nq=$abc$109383$new_n52731_
 .subckt buf_x4 i=$abc$109383$new_n52657_ q=$abc$109383$new_n52732_
 .subckt nand3_x0 i0=$abc$109383$new_n52662_ i1=$abc$109383$new_n52661_ i2=$abc$109383$new_n52732_ nq=$abc$109383$new_n52733_
 .subckt nand2_x0 i0=$abc$109383$new_n52733_ i1=soc.cpu.minerva.fetch.ibus__cyc nq=$abc$109383$new_n52734_
 .subckt buf_x4 i=$abc$109383$new_n52734_ q=$abc$109383$new_n52735_
-.subckt mx2_x2 cmd=$abc$109383$new_n52735_ i0=$abc$109383$new_n52731_ i1=$abc$109383$new_n52670_ q=$abc$109383$new_n52736_
+.subckt mux2_x1 cmd=$abc$109383$new_n52735_ i0=$abc$109383$new_n52731_ i1=$abc$109383$new_n52670_ q=$abc$109383$new_n52736_
 .subckt nor2_x0 i0=$abc$109383$new_n52736_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103924
-.subckt a2_x2 i0=$abc$109383$new_n52733_ i1=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n52738_
+.subckt and2_x1 i0=$abc$109383$new_n52733_ i1=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n52738_
 .subckt buf_x4 i=$abc$109383$new_n52738_ q=$abc$109383$new_n52739_
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[1] i2=$abc$109383$new_n52172_ q=$abc$109383$new_n52740_
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[1] i2=$abc$109383$new_n52172_ nq=$abc$109383$new_n52740_
 .subckt buf_x4 i=$abc$109383$new_n52734_ q=$abc$109383$new_n52741_
 .subckt buf_x4 i=$abc$109383$new_n52741_ q=$abc$109383$new_n52742_
 .subckt nand2_x0 i0=$abc$109383$new_n44273_ i1=$abc$109383$new_n44250_ nq=$abc$109383$new_n52743_
-.subckt ao22_x2 i0=$abc$109383$new_n52743_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52740_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103928
+.subckt and21nor_x1 i0=$abc$109383$new_n52743_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52740_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103928
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n52745_
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[2] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52746_
-.subckt ao22_x2 i0=$abc$109383$new_n44581_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52746_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103932
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[2] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52746_
+.subckt and21nor_x1 i0=$abc$109383$new_n44581_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52746_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103932
 .subckt nand3_x0 i0=$abc$109383$new_n52739_ i1=$abc$109383$new_n44886_ i2=$abc$109383$new_n44869_ nq=$abc$109383$new_n52748_
 .subckt buf_x4 i=$abc$109383$new_n52733_ q=$abc$109383$new_n52749_
 .subckt buf_x4 i=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n52750_
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[3] q=$abc$109383$new_n52751_
-.subckt a2_x2 i0=$abc$109383$new_n52751_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n52752_
-.subckt a2_x2 i0=$abc$109383$new_n52752_ i1=$abc$109383$new_n52748_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103936
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[4] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52754_
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[3] nq=$abc$109383$new_n52751_
+.subckt and2_x1 i0=$abc$109383$new_n52751_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n52752_
+.subckt and2_x1 i0=$abc$109383$new_n52752_ i1=$abc$109383$new_n52748_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103936
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[4] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52754_
 .subckt nand2_x0 i0=$abc$109383$new_n45184_ i1=$abc$109383$new_n45168_ nq=$abc$109383$new_n52755_
-.subckt ao22_x2 i0=$abc$109383$new_n52755_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52754_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103940
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[5] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52757_
-.subckt ao22_x2 i0=$abc$109383$new_n45466_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52757_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103944
+.subckt and21nor_x1 i0=$abc$109383$new_n52755_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52754_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103940
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[5] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52757_
+.subckt and21nor_x1 i0=$abc$109383$new_n45466_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52757_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103944
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[6] nq=$abc$109383$new_n52759_
-.subckt ao22_x2 i0=$abc$109383$new_n45714_ i1=$abc$109383$new_n45591_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n52760_
-.subckt o3_x2 i0=$abc$109383$new_n45721_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52761_
+.subckt and21nor_x1 i0=$abc$109383$new_n45714_ i1=$abc$109383$new_n45591_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n52760_
+.subckt or3_x1 i0=$abc$109383$new_n45721_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52761_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n29107_ i2=$abc$109383$new_n28379_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6] nq=$abc$109383$new_n52762_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[6] nq=$abc$109383$new_n52763_
-.subckt a2_x2 i0=$abc$109383$new_n52763_ i1=$abc$109383$new_n45716_ q=$abc$109383$new_n52764_
+.subckt and2_x1 i0=$abc$109383$new_n52763_ i1=$abc$109383$new_n45716_ q=$abc$109383$new_n52764_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[6] nq=$abc$109383$new_n52765_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[6] nq=$abc$109383$new_n52766_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n52766_ nq=$abc$109383$new_n52767_
 .subckt nand4_x0 i0=$abc$109383$new_n52767_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n44282_ i3=$abc$109383$new_n47238_ nq=$abc$109383$new_n52768_
-.subckt a2_x2 i0=$abc$109383$new_n52768_ i1=$abc$109383$new_n52765_ q=$abc$109383$new_n52769_
+.subckt and2_x1 i0=$abc$109383$new_n52768_ i1=$abc$109383$new_n52765_ q=$abc$109383$new_n52769_
 .subckt nand4_x0 i0=$abc$109383$new_n52769_ i1=$abc$109383$new_n52764_ i2=$abc$109383$new_n52762_ i3=$abc$109383$new_n52761_ nq=$abc$109383$new_n52770_
 .subckt nor2_x0 i0=$abc$109383$new_n52770_ i1=$abc$109383$new_n52760_ nq=$abc$109383$new_n52771_
-.subckt mx2_x2 cmd=$abc$109383$new_n52735_ i0=$abc$109383$new_n52771_ i1=$abc$109383$new_n52759_ q=$abc$109383$new_n52772_
+.subckt mux2_x1 cmd=$abc$109383$new_n52735_ i0=$abc$109383$new_n52771_ i1=$abc$109383$new_n52759_ q=$abc$109383$new_n52772_
 .subckt nor2_x0 i0=$abc$109383$new_n52772_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103948
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[7] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52774_
-.subckt ao22_x2 i0=$abc$109383$new_n45982_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103952
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[7] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52774_
+.subckt and21nor_x1 i0=$abc$109383$new_n45982_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103952
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[8] nq=$abc$109383$new_n52776_
-.subckt a3_x2 i0=$abc$109383$new_n46229_ i1=$abc$109383$new_n46172_ i2=$abc$109383$new_n45475_ q=$abc$109383$new_n52777_
+.subckt and3_x1 i0=$abc$109383$new_n46229_ i1=$abc$109383$new_n46172_ i2=$abc$109383$new_n45475_ q=$abc$109383$new_n52777_
 .subckt nor3_x0 i0=$abc$109383$new_n46106_ i1=$abc$109383$new_n46055_ i2=$abc$109383$new_n45475_ nq=$abc$109383$new_n52778_
-.subckt ao22_x2 i0=$abc$109383$new_n52778_ i1=$abc$109383$new_n52777_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n52779_
-.subckt a2_x2 i0=$abc$109383$new_n45990_ i1=$abc$109383$new_n45988_ q=$abc$109383$new_n52780_
-.subckt o3_x2 i0=$abc$109383$new_n52780_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52781_
+.subckt and21nor_x1 i0=$abc$109383$new_n52778_ i1=$abc$109383$new_n52777_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n52779_
+.subckt and2_x1 i0=$abc$109383$new_n45990_ i1=$abc$109383$new_n45988_ q=$abc$109383$new_n52780_
+.subckt or3_x1 i0=$abc$109383$new_n52780_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52781_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n29107_ i2=$abc$109383$new_n28379_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[8] nq=$abc$109383$new_n52782_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[8] nq=$abc$109383$new_n52783_
-.subckt a2_x2 i0=$abc$109383$new_n52783_ i1=$abc$109383$new_n45987_ q=$abc$109383$new_n52784_
+.subckt and2_x1 i0=$abc$109383$new_n52783_ i1=$abc$109383$new_n45987_ q=$abc$109383$new_n52784_
 .subckt nand4_x0 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[8] nq=$abc$109383$new_n52785_
-.subckt mx2_x2 cmd=$abc$109383$new_n22004_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[8] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[8] q=$abc$109383$new_n52786_
+.subckt mux2_x1 cmd=$abc$109383$new_n22004_ i0=soc.timer.bridge.csr_bridge_0.wb__dat_r[8] i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[8] q=$abc$109383$new_n52786_
 .subckt nand4_x0 i0=$abc$109383$new_n52786_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n44282_ i3=$abc$109383$new_n47238_ nq=$abc$109383$new_n52787_
-.subckt a2_x2 i0=$abc$109383$new_n52787_ i1=$abc$109383$new_n52785_ q=$abc$109383$new_n52788_
+.subckt and2_x1 i0=$abc$109383$new_n52787_ i1=$abc$109383$new_n52785_ q=$abc$109383$new_n52788_
 .subckt nand4_x0 i0=$abc$109383$new_n52788_ i1=$abc$109383$new_n52784_ i2=$abc$109383$new_n52782_ i3=$abc$109383$new_n52781_ nq=$abc$109383$new_n52789_
 .subckt nor2_x0 i0=$abc$109383$new_n52789_ i1=$abc$109383$new_n52779_ nq=$abc$109383$new_n52790_
-.subckt mx2_x2 cmd=$abc$109383$new_n52735_ i0=$abc$109383$new_n52790_ i1=$abc$109383$new_n52776_ q=$abc$109383$new_n52791_
+.subckt mux2_x1 cmd=$abc$109383$new_n52735_ i0=$abc$109383$new_n52790_ i1=$abc$109383$new_n52776_ q=$abc$109383$new_n52791_
 .subckt nor2_x0 i0=$abc$109383$new_n52791_ i1=$abc$109383$new_n29221_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103956
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[9] nq=$abc$109383$new_n52793_
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=$abc$109383$new_n52793_ q=$abc$109383$new_n52794_
-.subckt a2_x2 i0=$abc$109383$new_n46241_ i1=$abc$109383$new_n46239_ q=$abc$109383$new_n52795_
-.subckt o3_x2 i0=$abc$109383$new_n52795_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52796_
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=$abc$109383$new_n52793_ nq=$abc$109383$new_n52794_
+.subckt and2_x1 i0=$abc$109383$new_n46241_ i1=$abc$109383$new_n46239_ q=$abc$109383$new_n52795_
+.subckt or3_x1 i0=$abc$109383$new_n52795_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52796_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n44268_ i2=$abc$109383$new_n19664_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n52797_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[9] nq=$abc$109383$new_n52798_
-.subckt a2_x2 i0=$abc$109383$new_n52798_ i1=$abc$109383$new_n46238_ q=$abc$109383$new_n52799_
+.subckt and2_x1 i0=$abc$109383$new_n52798_ i1=$abc$109383$new_n46238_ q=$abc$109383$new_n52799_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n52800_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n52800_ nq=$abc$109383$new_n52801_
 .subckt nand4_x0 i0=$abc$109383$new_n52801_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n45471_ i3=$abc$109383$new_n19664_ nq=$abc$109383$new_n52802_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n47238_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[9] nq=$abc$109383$new_n52803_
-.subckt a2_x2 i0=$abc$109383$new_n52803_ i1=$abc$109383$new_n52802_ q=$abc$109383$new_n52804_
-.subckt a4_x2 i0=$abc$109383$new_n52804_ i1=$abc$109383$new_n52799_ i2=$abc$109383$new_n52797_ i3=$abc$109383$new_n52796_ q=$abc$109383$new_n52805_
+.subckt and2_x1 i0=$abc$109383$new_n52803_ i1=$abc$109383$new_n52802_ q=$abc$109383$new_n52804_
+.subckt and4_x1 i0=$abc$109383$new_n52804_ i1=$abc$109383$new_n52799_ i2=$abc$109383$new_n52797_ i3=$abc$109383$new_n52796_ q=$abc$109383$new_n52805_
 .subckt nand3_x0 i0=$abc$109383$new_n46360_ i1=$abc$109383$new_n46304_ i2=$abc$109383$new_n46883_ nq=$abc$109383$new_n52806_
 .subckt nand3_x0 i0=$abc$109383$new_n46486_ i1=$abc$109383$new_n46417_ i2=$abc$109383$new_n43587_ nq=$abc$109383$new_n52807_
-.subckt oa22_x2 i0=$abc$109383$new_n52807_ i1=$abc$109383$new_n52806_ i2=$abc$109383$new_n44583_ q=$abc$109383$new_n52808_
-.subckt oa22_x2 i0=$abc$109383$new_n52808_ i1=$abc$109383$new_n52805_ i2=$abc$109383$new_n52741_ q=$abc$109383$new_n52809_
+.subckt or21nand_x1 i0=$abc$109383$new_n52807_ i1=$abc$109383$new_n52806_ i2=$abc$109383$new_n44583_ nq=$abc$109383$new_n52808_
+.subckt or21nand_x1 i0=$abc$109383$new_n52808_ i1=$abc$109383$new_n52805_ i2=$abc$109383$new_n52741_ nq=$abc$109383$new_n52809_
 .subckt nand2_x0 i0=$abc$109383$new_n52809_ i1=$abc$109383$new_n52794_ nq=$abc$109383$new_n52810_
-.subckt a2_x2 i0=$abc$109383$new_n52810_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103960
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[10] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52812_
-.subckt ao22_x2 i0=$abc$109383$new_n46757_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52812_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103964
-.subckt ao22_x2 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[11] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52814_
-.subckt ao22_x2 i0=$abc$109383$new_n47008_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52814_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103968
-.subckt mx2_x2 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n47249_ i1=soc.cpu.minerva.fetch.ibus_rdata[12] q=$abc$109383$new_n52816_
-.subckt a2_x2 i0=$abc$109383$new_n52816_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103972
+.subckt and2_x1 i0=$abc$109383$new_n52810_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103960
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[10] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52812_
+.subckt and21nor_x1 i0=$abc$109383$new_n46757_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52812_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103964
+.subckt and21nor_x1 i0=$abc$109383$new_n52739_ i1=soc.cpu.minerva.fetch.ibus_rdata[11] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52814_
+.subckt and21nor_x1 i0=$abc$109383$new_n47008_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52814_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103968
+.subckt mux2_x1 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n47249_ i1=soc.cpu.minerva.fetch.ibus_rdata[12] q=$abc$109383$new_n52816_
+.subckt and2_x1 i0=$abc$109383$new_n52816_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103972
 .subckt nand3_x0 i0=$abc$109383$new_n52739_ i1=$abc$109383$new_n47484_ i2=$abc$109383$new_n47473_ nq=$abc$109383$new_n52818_
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[13] q=$abc$109383$new_n52819_
-.subckt a2_x2 i0=$abc$109383$new_n52819_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n52820_
-.subckt a2_x2 i0=$abc$109383$new_n52820_ i1=$abc$109383$new_n52818_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103976
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[13] nq=$abc$109383$new_n52819_
+.subckt and2_x1 i0=$abc$109383$new_n52819_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n52820_
+.subckt and2_x1 i0=$abc$109383$new_n52820_ i1=$abc$109383$new_n52818_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103976
 .subckt buf_x4 i=$abc$109383$new_n29220_ q=$abc$109383$new_n52822_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[14] nq=$abc$109383$new_n52823_
 .subckt nor3_x0 i0=$abc$109383$new_n47732_ i1=$abc$109383$new_n47679_ i2=$abc$109383$new_n46883_ nq=$abc$109383$new_n52824_
-.subckt a3_x2 i0=$abc$109383$new_n47623_ i1=$abc$109383$new_n47563_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n52825_
-.subckt ao22_x2 i0=$abc$109383$new_n52825_ i1=$abc$109383$new_n52824_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n52826_
-.subckt o3_x2 i0=$abc$109383$new_n47499_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52827_
+.subckt and3_x1 i0=$abc$109383$new_n47623_ i1=$abc$109383$new_n47563_ i2=$abc$109383$new_n43590_ q=$abc$109383$new_n52825_
+.subckt and21nor_x1 i0=$abc$109383$new_n52825_ i1=$abc$109383$new_n52824_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n52826_
+.subckt or3_x1 i0=$abc$109383$new_n47499_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52827_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n29107_ i2=$abc$109383$new_n28379_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n52828_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[14] nq=$abc$109383$new_n52829_
-.subckt a2_x2 i0=$abc$109383$new_n52829_ i1=$abc$109383$new_n47491_ q=$abc$109383$new_n52830_
+.subckt and2_x1 i0=$abc$109383$new_n52829_ i1=$abc$109383$new_n47491_ q=$abc$109383$new_n52830_
 .subckt nand4_x0 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n52831_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[14] nq=$abc$109383$new_n52832_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n52832_ nq=$abc$109383$new_n52833_
 .subckt nand4_x0 i0=$abc$109383$new_n52833_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n44282_ i3=$abc$109383$new_n47238_ nq=$abc$109383$new_n52834_
-.subckt a2_x2 i0=$abc$109383$new_n52834_ i1=$abc$109383$new_n52831_ q=$abc$109383$new_n52835_
+.subckt and2_x1 i0=$abc$109383$new_n52834_ i1=$abc$109383$new_n52831_ q=$abc$109383$new_n52835_
 .subckt nand4_x0 i0=$abc$109383$new_n52835_ i1=$abc$109383$new_n52830_ i2=$abc$109383$new_n52828_ i3=$abc$109383$new_n52827_ nq=$abc$109383$new_n52836_
 .subckt nor2_x0 i0=$abc$109383$new_n52836_ i1=$abc$109383$new_n52826_ nq=$abc$109383$new_n52837_
-.subckt mx2_x2 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n52837_ i1=$abc$109383$new_n52823_ q=$abc$109383$new_n52838_
+.subckt mux2_x1 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n52837_ i1=$abc$109383$new_n52823_ q=$abc$109383$new_n52838_
 .subckt nor2_x0 i0=$abc$109383$new_n52838_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103980
-.subckt ao22_x2 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[15] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n52840_
-.subckt ao22_x2 i0=$abc$109383$new_n47981_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52840_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103984
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[16] q=$abc$109383$new_n52842_
-.subckt a2_x2 i0=$abc$109383$new_n52842_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n52843_
-.subckt ao22_x2 i0=$abc$109383$new_n48228_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52843_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103988
-.subckt a2_x2 i0=$abc$109383$new_n48363_ i1=$abc$109383$new_n48347_ q=$abc$109383$new_n52845_
-.subckt ao22_x2 i0=$abc$109383$new_n52845_ i1=$abc$109383$new_n48335_ i2=$abc$109383$new_n44444_ q=$abc$109383$new_n52846_
-.subckt ao22_x2 i0=$abc$109383$new_n48313_ i1=$abc$109383$new_n48285_ i2=$abc$109383$new_n43865_ q=$abc$109383$new_n52847_
+.subckt and21nor_x1 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[15] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n52840_
+.subckt and21nor_x1 i0=$abc$109383$new_n47981_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52840_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103984
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[16] nq=$abc$109383$new_n52842_
+.subckt and2_x1 i0=$abc$109383$new_n52842_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n52843_
+.subckt and21nor_x1 i0=$abc$109383$new_n48228_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52843_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103988
+.subckt and2_x1 i0=$abc$109383$new_n48363_ i1=$abc$109383$new_n48347_ q=$abc$109383$new_n52845_
+.subckt and21nor_x1 i0=$abc$109383$new_n52845_ i1=$abc$109383$new_n48335_ i2=$abc$109383$new_n44444_ nq=$abc$109383$new_n52846_
+.subckt and21nor_x1 i0=$abc$109383$new_n48313_ i1=$abc$109383$new_n48285_ i2=$abc$109383$new_n43865_ nq=$abc$109383$new_n52847_
 .subckt nor3_x0 i0=$abc$109383$new_n52847_ i1=$abc$109383$new_n52846_ i2=$abc$109383$new_n44446_ nq=$abc$109383$new_n52848_
 .subckt nand2_x0 i0=$abc$109383$new_n48379_ i1=$abc$109383$new_n44114_ nq=$abc$109383$new_n52849_
 .subckt nand2_x0 i0=$abc$109383$new_n48406_ i1=$abc$109383$new_n43767_ nq=$abc$109383$new_n52850_
-.subckt a2_x2 i0=$abc$109383$new_n48408_ i1=$abc$109383$new_n43434_ q=$abc$109383$new_n52851_
-.subckt o3_x2 i0=$abc$109383$new_n48411_ i1=$abc$109383$new_n52851_ i2=$abc$109383$new_n43353_ q=$abc$109383$new_n52852_
-.subckt oa22_x2 i0=$abc$109383$new_n52852_ i1=$abc$109383$new_n52850_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n52853_
-.subckt oa22_x2 i0=$abc$109383$new_n52853_ i1=$abc$109383$new_n52849_ i2=$abc$109383$new_n45434_ q=$abc$109383$new_n52854_
-.subckt ao22_x2 i0=$abc$109383$new_n48387_ i1=$abc$109383$new_n48383_ i2=$abc$109383$new_n43411_ q=$abc$109383$new_n52855_
-.subckt ao22_x2 i0=$abc$109383$new_n48398_ i1=$abc$109383$new_n48394_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n52856_
-.subckt o2_x2 i0=$abc$109383$new_n52856_ i1=$abc$109383$new_n52855_ q=$abc$109383$new_n52857_
+.subckt and2_x1 i0=$abc$109383$new_n48408_ i1=$abc$109383$new_n43434_ q=$abc$109383$new_n52851_
+.subckt or3_x1 i0=$abc$109383$new_n48411_ i1=$abc$109383$new_n52851_ i2=$abc$109383$new_n43353_ q=$abc$109383$new_n52852_
+.subckt or21nand_x1 i0=$abc$109383$new_n52852_ i1=$abc$109383$new_n52850_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n52853_
+.subckt or21nand_x1 i0=$abc$109383$new_n52853_ i1=$abc$109383$new_n52849_ i2=$abc$109383$new_n45434_ nq=$abc$109383$new_n52854_
+.subckt and21nor_x1 i0=$abc$109383$new_n48387_ i1=$abc$109383$new_n48383_ i2=$abc$109383$new_n43411_ nq=$abc$109383$new_n52855_
+.subckt and21nor_x1 i0=$abc$109383$new_n48398_ i1=$abc$109383$new_n48394_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n52856_
+.subckt or2_x1 i0=$abc$109383$new_n52856_ i1=$abc$109383$new_n52855_ q=$abc$109383$new_n52857_
 .subckt nand2_x0 i0=$abc$109383$new_n52857_ i1=$abc$109383$new_n44742_ nq=$abc$109383$new_n52858_
-.subckt oa22_x2 i0=$abc$109383$new_n52858_ i1=$abc$109383$new_n52854_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n52859_
+.subckt or21nand_x1 i0=$abc$109383$new_n52858_ i1=$abc$109383$new_n52854_ i2=$abc$109383$new_n45534_ nq=$abc$109383$new_n52859_
 .subckt nand2_x0 i0=soc.ram.ram[103][17] i1=$abc$109383$new_n44610_ nq=$abc$109383$new_n52860_
 .subckt inv_x0 i=soc.ram.ram[111][17] nq=$abc$109383$new_n52861_
-.subckt ao22_x2 i0=$abc$109383$new_n52861_ i1=$abc$109383$new_n43712_ i2=$abc$109383$new_n44188_ q=$abc$109383$new_n52862_
+.subckt and21nor_x1 i0=$abc$109383$new_n52861_ i1=$abc$109383$new_n43712_ i2=$abc$109383$new_n44188_ nq=$abc$109383$new_n52862_
 .subckt nand2_x0 i0=$abc$109383$new_n52862_ i1=$abc$109383$new_n52860_ nq=$abc$109383$new_n52863_
-.subckt oa22_x2 i0=soc.ram.ram[107][17] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43419_ q=$abc$109383$new_n52864_
-.subckt oa22_x2 i0=$abc$109383$new_n44240_ i1=soc.ram.ram[99][17] i2=$abc$109383$new_n52864_ q=$abc$109383$new_n52865_
-.subckt a2_x2 i0=$abc$109383$new_n52865_ i1=$abc$109383$new_n44626_ q=$abc$109383$new_n52866_
+.subckt or21nand_x1 i0=soc.ram.ram[107][17] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43419_ nq=$abc$109383$new_n52864_
+.subckt or21nand_x1 i0=$abc$109383$new_n44240_ i1=soc.ram.ram[99][17] i2=$abc$109383$new_n52864_ nq=$abc$109383$new_n52865_
+.subckt and2_x1 i0=$abc$109383$new_n52865_ i1=$abc$109383$new_n44626_ q=$abc$109383$new_n52866_
 .subckt nand2_x0 i0=$abc$109383$new_n52866_ i1=$abc$109383$new_n52863_ nq=$abc$109383$new_n52867_
 .subckt nand2_x0 i0=soc.ram.ram[102][17] i1=$abc$109383$new_n44240_ nq=$abc$109383$new_n52868_
 .subckt inv_x0 i=soc.ram.ram[110][17] nq=$abc$109383$new_n52869_
-.subckt ao22_x2 i0=$abc$109383$new_n52869_ i1=$abc$109383$new_n43711_ i2=$abc$109383$new_n45233_ q=$abc$109383$new_n52870_
-.subckt a2_x2 i0=$abc$109383$new_n52870_ i1=$abc$109383$new_n52868_ q=$abc$109383$new_n52871_
-.subckt oa22_x2 i0=soc.ram.ram[106][17] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44186_ q=$abc$109383$new_n52872_
-.subckt oa22_x2 i0=$abc$109383$new_n43711_ i1=soc.ram.ram[98][17] i2=$abc$109383$new_n52872_ q=$abc$109383$new_n52873_
+.subckt and21nor_x1 i0=$abc$109383$new_n52869_ i1=$abc$109383$new_n43711_ i2=$abc$109383$new_n45233_ nq=$abc$109383$new_n52870_
+.subckt and2_x1 i0=$abc$109383$new_n52870_ i1=$abc$109383$new_n52868_ q=$abc$109383$new_n52871_
+.subckt or21nand_x1 i0=soc.ram.ram[106][17] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n44186_ nq=$abc$109383$new_n52872_
+.subckt or21nand_x1 i0=$abc$109383$new_n43711_ i1=soc.ram.ram[98][17] i2=$abc$109383$new_n52872_ nq=$abc$109383$new_n52873_
 .subckt nand2_x0 i0=$abc$109383$new_n52873_ i1=$abc$109383$new_n44204_ nq=$abc$109383$new_n52874_
-.subckt ao22_x2 i0=$abc$109383$new_n52874_ i1=$abc$109383$new_n52871_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n52875_
+.subckt and21nor_x1 i0=$abc$109383$new_n52874_ i1=$abc$109383$new_n52871_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n52875_
 .subckt nand2_x0 i0=$abc$109383$new_n52875_ i1=$abc$109383$new_n52867_ nq=$abc$109383$new_n52876_
 .subckt nand2_x0 i0=soc.ram.ram[118][17] i1=$abc$109383$new_n44692_ nq=$abc$109383$new_n52877_
 .subckt inv_x0 i=soc.ram.ram[126][17] nq=$abc$109383$new_n52878_
-.subckt ao22_x2 i0=$abc$109383$new_n52878_ i1=$abc$109383$new_n44162_ i2=$abc$109383$new_n44234_ q=$abc$109383$new_n52879_
+.subckt and21nor_x1 i0=$abc$109383$new_n52878_ i1=$abc$109383$new_n44162_ i2=$abc$109383$new_n44234_ nq=$abc$109383$new_n52879_
 .subckt nand2_x0 i0=$abc$109383$new_n52879_ i1=$abc$109383$new_n52877_ nq=$abc$109383$new_n52880_
-.subckt oa22_x2 i0=soc.ram.ram[122][17] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43368_ q=$abc$109383$new_n52881_
-.subckt oa22_x2 i0=$abc$109383$new_n43554_ i1=soc.ram.ram[114][17] i2=$abc$109383$new_n52881_ q=$abc$109383$new_n52882_
-.subckt a2_x2 i0=$abc$109383$new_n52882_ i1=$abc$109383$new_n43903_ q=$abc$109383$new_n52883_
+.subckt or21nand_x1 i0=soc.ram.ram[122][17] i1=$abc$109383$new_n43647_ i2=$abc$109383$new_n43368_ nq=$abc$109383$new_n52881_
+.subckt or21nand_x1 i0=$abc$109383$new_n43554_ i1=soc.ram.ram[114][17] i2=$abc$109383$new_n52881_ nq=$abc$109383$new_n52882_
+.subckt and2_x1 i0=$abc$109383$new_n52882_ i1=$abc$109383$new_n43903_ q=$abc$109383$new_n52883_
 .subckt nand2_x0 i0=$abc$109383$new_n52883_ i1=$abc$109383$new_n52880_ nq=$abc$109383$new_n52884_
 .subckt nand2_x0 i0=soc.ram.ram[119][17] i1=$abc$109383$new_n43554_ nq=$abc$109383$new_n52885_
 .subckt inv_x0 i=soc.ram.ram[127][17] nq=$abc$109383$new_n52886_
-.subckt ao22_x2 i0=$abc$109383$new_n52886_ i1=$abc$109383$new_n43836_ i2=$abc$109383$new_n44181_ q=$abc$109383$new_n52887_
-.subckt a2_x2 i0=$abc$109383$new_n52887_ i1=$abc$109383$new_n52885_ q=$abc$109383$new_n52888_
-.subckt oa22_x2 i0=soc.ram.ram[123][17] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n43598_ q=$abc$109383$new_n52889_
-.subckt oa22_x2 i0=$abc$109383$new_n43836_ i1=soc.ram.ram[115][17] i2=$abc$109383$new_n52889_ q=$abc$109383$new_n52890_
+.subckt and21nor_x1 i0=$abc$109383$new_n52886_ i1=$abc$109383$new_n43836_ i2=$abc$109383$new_n44181_ nq=$abc$109383$new_n52887_
+.subckt and2_x1 i0=$abc$109383$new_n52887_ i1=$abc$109383$new_n52885_ q=$abc$109383$new_n52888_
+.subckt or21nand_x1 i0=soc.ram.ram[123][17] i1=$abc$109383$new_n43352_ i2=$abc$109383$new_n43598_ nq=$abc$109383$new_n52889_
+.subckt or21nand_x1 i0=$abc$109383$new_n43836_ i1=soc.ram.ram[115][17] i2=$abc$109383$new_n52889_ nq=$abc$109383$new_n52890_
 .subckt nand2_x0 i0=$abc$109383$new_n52890_ i1=$abc$109383$new_n43416_ nq=$abc$109383$new_n52891_
-.subckt ao22_x2 i0=$abc$109383$new_n52891_ i1=$abc$109383$new_n52888_ i2=$abc$109383$new_n43697_ q=$abc$109383$new_n52892_
+.subckt and21nor_x1 i0=$abc$109383$new_n52891_ i1=$abc$109383$new_n52888_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n52892_
 .subckt nand2_x0 i0=$abc$109383$new_n52892_ i1=$abc$109383$new_n52884_ nq=$abc$109383$new_n52893_
-.subckt oa22_x2 i0=$abc$109383$new_n52893_ i1=$abc$109383$new_n52876_ i2=$abc$109383$new_n44794_ q=$abc$109383$new_n52894_
+.subckt or21nand_x1 i0=$abc$109383$new_n52893_ i1=$abc$109383$new_n52876_ i2=$abc$109383$new_n44794_ nq=$abc$109383$new_n52894_
 .subckt nand3_x0 i0=$abc$109383$new_n48426_ i1=$abc$109383$new_n48420_ i2=$abc$109383$new_n44114_ nq=$abc$109383$new_n52895_
 .subckt nand2_x0 i0=$abc$109383$new_n48444_ i1=$abc$109383$new_n43471_ nq=$abc$109383$new_n52896_
-.subckt oa22_x2 i0=$abc$109383$new_n48451_ i1=$abc$109383$new_n48447_ i2=$abc$109383$new_n43712_ q=$abc$109383$new_n52897_
+.subckt or21nand_x1 i0=$abc$109383$new_n48451_ i1=$abc$109383$new_n48447_ i2=$abc$109383$new_n43712_ nq=$abc$109383$new_n52897_
 .subckt nand3_x0 i0=$abc$109383$new_n52897_ i1=$abc$109383$new_n52896_ i2=$abc$109383$new_n43729_ nq=$abc$109383$new_n52898_
-.subckt oa22_x2 i0=$abc$109383$new_n52898_ i1=$abc$109383$new_n52895_ i2=$abc$109383$new_n45280_ q=$abc$109383$new_n52899_
-.subckt oa22_x2 i0=$abc$109383$new_n52899_ i1=$abc$109383$new_n52894_ i2=$abc$109383$new_n43781_ q=$abc$109383$new_n52900_
-.subckt a3_x2 i0=$abc$109383$new_n52900_ i1=$abc$109383$new_n52859_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n52901_
-.subckt ao22_x2 i0=$abc$109383$new_n52901_ i1=$abc$109383$new_n52848_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n52902_
-.subckt o3_x2 i0=$abc$109383$new_n48240_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52903_
+.subckt or21nand_x1 i0=$abc$109383$new_n52898_ i1=$abc$109383$new_n52895_ i2=$abc$109383$new_n45280_ nq=$abc$109383$new_n52899_
+.subckt or21nand_x1 i0=$abc$109383$new_n52899_ i1=$abc$109383$new_n52894_ i2=$abc$109383$new_n43781_ nq=$abc$109383$new_n52900_
+.subckt and3_x1 i0=$abc$109383$new_n52900_ i1=$abc$109383$new_n52859_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n52901_
+.subckt and21nor_x1 i0=$abc$109383$new_n52901_ i1=$abc$109383$new_n52848_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n52902_
+.subckt or3_x1 i0=$abc$109383$new_n48240_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n52903_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n29107_ i2=$abc$109383$new_n19664_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n52904_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[17] nq=$abc$109383$new_n52905_
-.subckt a2_x2 i0=$abc$109383$new_n52905_ i1=$abc$109383$new_n48242_ q=$abc$109383$new_n52906_
+.subckt and2_x1 i0=$abc$109383$new_n52905_ i1=$abc$109383$new_n48242_ q=$abc$109383$new_n52906_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n52907_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n52907_ nq=$abc$109383$new_n52908_
 .subckt nand4_x0 i0=$abc$109383$new_n52908_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n44282_ i3=$abc$109383$new_n50395_ nq=$abc$109383$new_n52909_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[17] nq=$abc$109383$new_n52910_
-.subckt a2_x2 i0=$abc$109383$new_n52910_ i1=$abc$109383$new_n52909_ q=$abc$109383$new_n52911_
+.subckt and2_x1 i0=$abc$109383$new_n52910_ i1=$abc$109383$new_n52909_ q=$abc$109383$new_n52911_
 .subckt nand4_x0 i0=$abc$109383$new_n52911_ i1=$abc$109383$new_n52906_ i2=$abc$109383$new_n52904_ i3=$abc$109383$new_n52903_ nq=$abc$109383$new_n52912_
 .subckt nor2_x0 i0=$abc$109383$new_n52912_ i1=$abc$109383$new_n52902_ nq=$abc$109383$new_n52913_
-.subckt mx2_x2 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n52913_ i1=$abc$109383$new_n15525_ q=$abc$109383$new_n52914_
+.subckt mux2_x1 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n52913_ i1=$abc$109383$new_n15525_ q=$abc$109383$new_n52914_
 .subckt nor2_x0 i0=$abc$109383$new_n52914_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103992
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[18] q=$abc$109383$new_n52916_
-.subckt a2_x2 i0=$abc$109383$new_n52916_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n52917_
-.subckt ao22_x2 i0=$abc$109383$new_n48715_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52917_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$103996
-.subckt ao22_x2 i0=$abc$109383$new_n48892_ i1=$abc$109383$new_n48873_ i2=$abc$109383$new_n44655_ q=$abc$109383$new_n52919_
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[18] nq=$abc$109383$new_n52916_
+.subckt and2_x1 i0=$abc$109383$new_n52916_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n52917_
+.subckt and21nor_x1 i0=$abc$109383$new_n48715_ i1=$abc$109383$new_n52742_ i2=$abc$109383$new_n52917_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$103996
+.subckt and21nor_x1 i0=$abc$109383$new_n48892_ i1=$abc$109383$new_n48873_ i2=$abc$109383$new_n44655_ nq=$abc$109383$new_n52919_
 .subckt nand2_x0 i0=soc.ram.ram[31][19] i1=$abc$109383$new_n45219_ nq=$abc$109383$new_n52920_
 .subckt inv_x0 i=soc.ram.ram[27][19] nq=$abc$109383$new_n52921_
-.subckt ao22_x2 i0=$abc$109383$new_n52921_ i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n44750_ q=$abc$109383$new_n52922_
+.subckt and21nor_x1 i0=$abc$109383$new_n52921_ i1=$abc$109383$new_n45030_ i2=$abc$109383$new_n44750_ nq=$abc$109383$new_n52922_
 .subckt nand2_x0 i0=$abc$109383$new_n52922_ i1=$abc$109383$new_n52920_ nq=$abc$109383$new_n52923_
-.subckt oa22_x2 i0=soc.ram.ram[30][19] i1=$abc$109383$new_n45942_ i2=$abc$109383$new_n43846_ q=$abc$109383$new_n52924_
-.subckt oa22_x2 i0=$abc$109383$new_n43878_ i1=soc.ram.ram[26][19] i2=$abc$109383$new_n52924_ q=$abc$109383$new_n52925_
-.subckt a2_x2 i0=$abc$109383$new_n52925_ i1=$abc$109383$new_n44096_ q=$abc$109383$new_n52926_
+.subckt or21nand_x1 i0=soc.ram.ram[30][19] i1=$abc$109383$new_n45942_ i2=$abc$109383$new_n43846_ nq=$abc$109383$new_n52924_
+.subckt or21nand_x1 i0=$abc$109383$new_n43878_ i1=soc.ram.ram[26][19] i2=$abc$109383$new_n52924_ nq=$abc$109383$new_n52925_
+.subckt and2_x1 i0=$abc$109383$new_n52925_ i1=$abc$109383$new_n44096_ q=$abc$109383$new_n52926_
 .subckt nand2_x0 i0=$abc$109383$new_n52926_ i1=$abc$109383$new_n52923_ nq=$abc$109383$new_n52927_
 .subckt nand2_x0 i0=soc.ram.ram[25][19] i1=$abc$109383$new_n43561_ nq=$abc$109383$new_n52928_
-.subckt ao22_x2 i0=$abc$109383$new_n48946_ i1=$abc$109383$new_n43382_ i2=$abc$109383$new_n43996_ q=$abc$109383$new_n52929_
-.subckt a2_x2 i0=$abc$109383$new_n52929_ i1=$abc$109383$new_n52928_ q=$abc$109383$new_n52930_
-.subckt oa22_x2 i0=soc.ram.ram[28][19] i1=$abc$109383$new_n43550_ i2=$abc$109383$new_n43414_ q=$abc$109383$new_n52931_
-.subckt oa22_x2 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[24][19] i2=$abc$109383$new_n52931_ q=$abc$109383$new_n52932_
+.subckt and21nor_x1 i0=$abc$109383$new_n48946_ i1=$abc$109383$new_n43382_ i2=$abc$109383$new_n43996_ nq=$abc$109383$new_n52929_
+.subckt and2_x1 i0=$abc$109383$new_n52929_ i1=$abc$109383$new_n52928_ q=$abc$109383$new_n52930_
+.subckt or21nand_x1 i0=soc.ram.ram[28][19] i1=$abc$109383$new_n43550_ i2=$abc$109383$new_n43414_ nq=$abc$109383$new_n52931_
+.subckt or21nand_x1 i0=$abc$109383$new_n44427_ i1=soc.ram.ram[24][19] i2=$abc$109383$new_n52931_ nq=$abc$109383$new_n52932_
 .subckt nand2_x0 i0=$abc$109383$new_n52932_ i1=$abc$109383$new_n43330_ nq=$abc$109383$new_n52933_
-.subckt ao22_x2 i0=$abc$109383$new_n52933_ i1=$abc$109383$new_n52930_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n52934_
-.subckt a2_x2 i0=$abc$109383$new_n52934_ i1=$abc$109383$new_n52927_ q=$abc$109383$new_n52935_
+.subckt and21nor_x1 i0=$abc$109383$new_n52933_ i1=$abc$109383$new_n52930_ i2=$abc$109383$new_n43780_ nq=$abc$109383$new_n52934_
+.subckt and2_x1 i0=$abc$109383$new_n52934_ i1=$abc$109383$new_n52927_ q=$abc$109383$new_n52935_
 .subckt nand2_x0 i0=soc.ram.ram[60][19] i1=$abc$109383$new_n44115_ nq=$abc$109383$new_n52936_
 .subckt inv_x0 i=soc.ram.ram[62][19] nq=$abc$109383$new_n52937_
-.subckt ao22_x2 i0=$abc$109383$new_n44080_ i1=$abc$109383$new_n52937_ i2=$abc$109383$new_n43608_ q=$abc$109383$new_n52938_
+.subckt and21nor_x1 i0=$abc$109383$new_n44080_ i1=$abc$109383$new_n52937_ i2=$abc$109383$new_n43608_ nq=$abc$109383$new_n52938_
 .subckt nand2_x0 i0=$abc$109383$new_n52938_ i1=$abc$109383$new_n52936_ nq=$abc$109383$new_n52939_
-.subckt oa22_x2 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[58][19] i2=$abc$109383$new_n44186_ q=$abc$109383$new_n52940_
-.subckt oa22_x2 i0=$abc$109383$new_n43371_ i1=soc.ram.ram[56][19] i2=$abc$109383$new_n52940_ q=$abc$109383$new_n52941_
-.subckt a2_x2 i0=$abc$109383$new_n52941_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n52942_
+.subckt or21nand_x1 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[58][19] i2=$abc$109383$new_n44186_ nq=$abc$109383$new_n52940_
+.subckt or21nand_x1 i0=$abc$109383$new_n43371_ i1=soc.ram.ram[56][19] i2=$abc$109383$new_n52940_ nq=$abc$109383$new_n52941_
+.subckt and2_x1 i0=$abc$109383$new_n52941_ i1=$abc$109383$new_n43680_ q=$abc$109383$new_n52942_
 .subckt nand2_x0 i0=$abc$109383$new_n52942_ i1=$abc$109383$new_n52939_ nq=$abc$109383$new_n52943_
 .subckt nand2_x0 i0=soc.ram.ram[61][19] i1=$abc$109383$new_n43543_ nq=$abc$109383$new_n52944_
-.subckt ao22_x2 i0=$abc$109383$new_n43422_ i1=$abc$109383$new_n48911_ i2=$abc$109383$new_n43692_ q=$abc$109383$new_n52945_
-.subckt a2_x2 i0=$abc$109383$new_n52945_ i1=$abc$109383$new_n52944_ q=$abc$109383$new_n52946_
-.subckt oa22_x2 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[59][19] i2=$abc$109383$new_n49591_ q=$abc$109383$new_n52947_
-.subckt oa22_x2 i0=$abc$109383$new_n43723_ i1=soc.ram.ram[57][19] i2=$abc$109383$new_n52947_ q=$abc$109383$new_n52948_
+.subckt and21nor_x1 i0=$abc$109383$new_n43422_ i1=$abc$109383$new_n48911_ i2=$abc$109383$new_n43692_ nq=$abc$109383$new_n52945_
+.subckt and2_x1 i0=$abc$109383$new_n52945_ i1=$abc$109383$new_n52944_ q=$abc$109383$new_n52946_
+.subckt or21nand_x1 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[59][19] i2=$abc$109383$new_n49591_ nq=$abc$109383$new_n52947_
+.subckt or21nand_x1 i0=$abc$109383$new_n43723_ i1=soc.ram.ram[57][19] i2=$abc$109383$new_n52947_ nq=$abc$109383$new_n52948_
 .subckt nand2_x0 i0=$abc$109383$new_n52948_ i1=$abc$109383$new_n46934_ nq=$abc$109383$new_n52949_
-.subckt ao22_x2 i0=$abc$109383$new_n52949_ i1=$abc$109383$new_n52946_ i2=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n52950_
-.subckt a2_x2 i0=$abc$109383$new_n52950_ i1=$abc$109383$new_n52943_ q=$abc$109383$new_n52951_
-.subckt ao22_x2 i0=$abc$109383$new_n52951_ i1=$abc$109383$new_n52935_ i2=$abc$109383$new_n45761_ q=$abc$109383$new_n52952_
-.subckt a2_x2 i0=$abc$109383$new_n48925_ i1=$abc$109383$new_n44426_ q=$abc$109383$new_n52953_
-.subckt oa22_x2 i0=$abc$109383$new_n48929_ i1=$abc$109383$new_n48927_ i2=$abc$109383$new_n52953_ q=$abc$109383$new_n52954_
+.subckt and21nor_x1 i0=$abc$109383$new_n52949_ i1=$abc$109383$new_n52946_ i2=$\soc.ram.ram$rdreg[0]$q[5] nq=$abc$109383$new_n52950_
+.subckt and2_x1 i0=$abc$109383$new_n52950_ i1=$abc$109383$new_n52943_ q=$abc$109383$new_n52951_
+.subckt and21nor_x1 i0=$abc$109383$new_n52951_ i1=$abc$109383$new_n52935_ i2=$abc$109383$new_n45761_ nq=$abc$109383$new_n52952_
+.subckt and2_x1 i0=$abc$109383$new_n48925_ i1=$abc$109383$new_n44426_ q=$abc$109383$new_n52953_
+.subckt or21nand_x1 i0=$abc$109383$new_n48929_ i1=$abc$109383$new_n48927_ i2=$abc$109383$new_n52953_ nq=$abc$109383$new_n52954_
 .subckt nand2_x0 i0=$abc$109383$new_n52954_ i1=$abc$109383$new_n43855_ nq=$abc$109383$new_n52955_
-.subckt o2_x2 i0=soc.ram.ram[10][19] i1=$abc$109383$new_n43699_ q=$abc$109383$new_n52956_
-.subckt ao22_x2 i0=$abc$109383$new_n43434_ i1=soc.ram.ram[11][19] i2=$abc$109383$new_n43804_ q=$abc$109383$new_n52957_
+.subckt or2_x1 i0=soc.ram.ram[10][19] i1=$abc$109383$new_n43699_ q=$abc$109383$new_n52956_
+.subckt and21nor_x1 i0=$abc$109383$new_n43434_ i1=soc.ram.ram[11][19] i2=$abc$109383$new_n43804_ nq=$abc$109383$new_n52957_
 .subckt nand2_x0 i0=$abc$109383$new_n52957_ i1=$abc$109383$new_n52956_ nq=$abc$109383$new_n52958_
-.subckt o2_x2 i0=soc.ram.ram[14][19] i1=$abc$109383$new_n43611_ q=$abc$109383$new_n52959_
-.subckt ao22_x2 i0=$abc$109383$new_n43706_ i1=soc.ram.ram[15][19] i2=$abc$109383$new_n44229_ q=$abc$109383$new_n52960_
+.subckt or2_x1 i0=soc.ram.ram[14][19] i1=$abc$109383$new_n43611_ q=$abc$109383$new_n52959_
+.subckt and21nor_x1 i0=$abc$109383$new_n43706_ i1=soc.ram.ram[15][19] i2=$abc$109383$new_n44229_ nq=$abc$109383$new_n52960_
 .subckt nand2_x0 i0=$abc$109383$new_n52960_ i1=$abc$109383$new_n52959_ nq=$abc$109383$new_n52961_
-.subckt oa22_x2 i0=$abc$109383$new_n52961_ i1=$abc$109383$new_n52958_ i2=$abc$109383$new_n44061_ q=$abc$109383$new_n52962_
-.subckt a3_x2 i0=$abc$109383$new_n52962_ i1=$abc$109383$new_n52955_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n52963_
-.subckt oa22_x2 i0=$abc$109383$new_n48905_ i1=$abc$109383$new_n48901_ i2=$abc$109383$new_n46137_ q=$abc$109383$new_n52964_
+.subckt or21nand_x1 i0=$abc$109383$new_n52961_ i1=$abc$109383$new_n52958_ i2=$abc$109383$new_n44061_ nq=$abc$109383$new_n52962_
+.subckt and3_x1 i0=$abc$109383$new_n52962_ i1=$abc$109383$new_n52955_ i2=$abc$109383$new_n43780_ q=$abc$109383$new_n52963_
+.subckt or21nand_x1 i0=$abc$109383$new_n48905_ i1=$abc$109383$new_n48901_ i2=$abc$109383$new_n46137_ nq=$abc$109383$new_n52964_
 .subckt nand2_x0 i0=$abc$109383$new_n48894_ i1=$abc$109383$new_n44103_ nq=$abc$109383$new_n52965_
-.subckt o2_x2 i0=soc.ram.ram[43][19] i1=$abc$109383$new_n44338_ q=$abc$109383$new_n52966_
-.subckt ao22_x2 i0=soc.ram.ram[47][19] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n44053_ q=$abc$109383$new_n52967_
+.subckt or2_x1 i0=soc.ram.ram[43][19] i1=$abc$109383$new_n44338_ q=$abc$109383$new_n52966_
+.subckt and21nor_x1 i0=soc.ram.ram[47][19] i1=$abc$109383$new_n43365_ i2=$abc$109383$new_n44053_ nq=$abc$109383$new_n52967_
 .subckt nand2_x0 i0=$abc$109383$new_n52967_ i1=$abc$109383$new_n52966_ nq=$abc$109383$new_n52968_
-.subckt oa22_x2 i0=$abc$109383$new_n52968_ i1=$abc$109383$new_n52965_ i2=$abc$109383$new_n43330_ q=$abc$109383$new_n52969_
-.subckt a3_x2 i0=$abc$109383$new_n52969_ i1=$abc$109383$new_n52964_ i2=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n52970_
-.subckt ao22_x2 i0=$abc$109383$new_n52970_ i1=$abc$109383$new_n52963_ i2=$abc$109383$new_n45028_ q=$abc$109383$new_n52971_
-.subckt ao22_x2 i0=$abc$109383$new_n52971_ i1=$abc$109383$new_n52952_ i2=$abc$109383$new_n44911_ q=$abc$109383$new_n52972_
+.subckt or21nand_x1 i0=$abc$109383$new_n52968_ i1=$abc$109383$new_n52965_ i2=$abc$109383$new_n43330_ nq=$abc$109383$new_n52969_
+.subckt and3_x1 i0=$abc$109383$new_n52969_ i1=$abc$109383$new_n52964_ i2=$\soc.ram.ram$rdreg[0]$q[5] q=$abc$109383$new_n52970_
+.subckt and21nor_x1 i0=$abc$109383$new_n52970_ i1=$abc$109383$new_n52963_ i2=$abc$109383$new_n45028_ nq=$abc$109383$new_n52971_
+.subckt and21nor_x1 i0=$abc$109383$new_n52971_ i1=$abc$109383$new_n52952_ i2=$abc$109383$new_n44911_ nq=$abc$109383$new_n52972_
 .subckt nor3_x0 i0=$abc$109383$new_n52972_ i1=$abc$109383$new_n52919_ i2=$abc$109383$new_n44446_ nq=$abc$109383$new_n52973_
-.subckt oa22_x2 i0=$abc$109383$new_n48840_ i1=$abc$109383$new_n48816_ i2=$abc$109383$new_n45534_ q=$abc$109383$new_n52974_
-.subckt o2_x2 i0=$abc$109383$new_n48727_ i1=$abc$109383$new_n43890_ q=$abc$109383$new_n52975_
-.subckt mx2_x2 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[99][19] i1=soc.ram.ram[103][19] q=$abc$109383$new_n52976_
-.subckt ao22_x2 i0=$abc$109383$new_n43595_ i1=$abc$109383$new_n52976_ i2=$abc$109383$new_n43665_ q=$abc$109383$new_n52977_
+.subckt or21nand_x1 i0=$abc$109383$new_n48840_ i1=$abc$109383$new_n48816_ i2=$abc$109383$new_n45534_ nq=$abc$109383$new_n52974_
+.subckt or2_x1 i0=$abc$109383$new_n48727_ i1=$abc$109383$new_n43890_ q=$abc$109383$new_n52975_
+.subckt mux2_x1 cmd=$abc$109383$new_n43509_ i0=soc.ram.ram[99][19] i1=soc.ram.ram[103][19] q=$abc$109383$new_n52976_
+.subckt and21nor_x1 i0=$abc$109383$new_n43595_ i1=$abc$109383$new_n52976_ i2=$abc$109383$new_n43665_ nq=$abc$109383$new_n52977_
 .subckt nand2_x0 i0=$abc$109383$new_n52977_ i1=$abc$109383$new_n52975_ nq=$abc$109383$new_n52978_
-.subckt oa22_x2 i0=$abc$109383$new_n48738_ i1=$abc$109383$new_n48734_ i2=$abc$109383$new_n45279_ q=$abc$109383$new_n52979_
+.subckt or21nand_x1 i0=$abc$109383$new_n48738_ i1=$abc$109383$new_n48734_ i2=$abc$109383$new_n45279_ nq=$abc$109383$new_n52979_
 .subckt nand3_x0 i0=$abc$109383$new_n52979_ i1=$abc$109383$new_n52978_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n52980_
-.subckt o2_x2 i0=$abc$109383$new_n48758_ i1=$abc$109383$new_n46696_ q=$abc$109383$new_n52981_
-.subckt mx2_x2 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[115][19] i1=soc.ram.ram[119][19] q=$abc$109383$new_n52982_
-.subckt ao22_x2 i0=$abc$109383$new_n43813_ i1=$abc$109383$new_n52982_ i2=$abc$109383$new_n44096_ q=$abc$109383$new_n52983_
+.subckt or2_x1 i0=$abc$109383$new_n48758_ i1=$abc$109383$new_n46696_ q=$abc$109383$new_n52981_
+.subckt mux2_x1 cmd=$abc$109383$new_n43810_ i0=soc.ram.ram[115][19] i1=soc.ram.ram[119][19] q=$abc$109383$new_n52982_
+.subckt and21nor_x1 i0=$abc$109383$new_n43813_ i1=$abc$109383$new_n52982_ i2=$abc$109383$new_n44096_ nq=$abc$109383$new_n52983_
 .subckt nand2_x0 i0=$abc$109383$new_n52983_ i1=$abc$109383$new_n52981_ nq=$abc$109383$new_n52984_
-.subckt o2_x2 i0=$abc$109383$new_n48764_ i1=$abc$109383$new_n44847_ q=$abc$109383$new_n52985_
-.subckt mx2_x2 cmd=$abc$109383$new_n44563_ i0=soc.ram.ram[113][19] i1=soc.ram.ram[117][19] q=$abc$109383$new_n52986_
-.subckt ao22_x2 i0=$abc$109383$new_n43941_ i1=$abc$109383$new_n52986_ i2=$abc$109383$new_n43375_ q=$abc$109383$new_n52987_
+.subckt or2_x1 i0=$abc$109383$new_n48764_ i1=$abc$109383$new_n44847_ q=$abc$109383$new_n52985_
+.subckt mux2_x1 cmd=$abc$109383$new_n44563_ i0=soc.ram.ram[113][19] i1=soc.ram.ram[117][19] q=$abc$109383$new_n52986_
+.subckt and21nor_x1 i0=$abc$109383$new_n43941_ i1=$abc$109383$new_n52986_ i2=$abc$109383$new_n43375_ nq=$abc$109383$new_n52987_
 .subckt nand2_x0 i0=$abc$109383$new_n52987_ i1=$abc$109383$new_n52985_ nq=$abc$109383$new_n52988_
 .subckt nand3_x0 i0=$abc$109383$new_n52988_ i1=$abc$109383$new_n52984_ i2=$abc$109383$new_n43540_ nq=$abc$109383$new_n52989_
-.subckt oa22_x2 i0=$abc$109383$new_n52989_ i1=$abc$109383$new_n52980_ i2=$abc$109383$new_n44910_ q=$abc$109383$new_n52990_
-.subckt oa22_x2 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[123][19] i2=$abc$109383$new_n43639_ q=$abc$109383$new_n52991_
-.subckt oa22_x2 i0=$abc$109383$new_n43329_ i1=soc.ram.ram[121][19] i2=$abc$109383$new_n52991_ q=$abc$109383$new_n52992_
+.subckt or21nand_x1 i0=$abc$109383$new_n52989_ i1=$abc$109383$new_n52980_ i2=$abc$109383$new_n44910_ nq=$abc$109383$new_n52990_
+.subckt or21nand_x1 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[123][19] i2=$abc$109383$new_n43639_ nq=$abc$109383$new_n52991_
+.subckt or21nand_x1 i0=$abc$109383$new_n43329_ i1=soc.ram.ram[121][19] i2=$abc$109383$new_n52991_ nq=$abc$109383$new_n52992_
 .subckt nand2_x0 i0=soc.ram.ram[125][19] i1=$abc$109383$new_n44080_ nq=$abc$109383$new_n52993_
-.subckt ao22_x2 i0=$abc$109383$new_n43422_ i1=$abc$109383$new_n48774_ i2=$abc$109383$new_n43607_ q=$abc$109383$new_n52994_
+.subckt and21nor_x1 i0=$abc$109383$new_n43422_ i1=$abc$109383$new_n48774_ i2=$abc$109383$new_n43607_ nq=$abc$109383$new_n52994_
 .subckt nand2_x0 i0=$abc$109383$new_n52994_ i1=$abc$109383$new_n52993_ nq=$abc$109383$new_n52995_
-.subckt oa22_x2 i0=$abc$109383$new_n52995_ i1=$abc$109383$new_n52992_ i2=$abc$109383$new_n43623_ q=$abc$109383$new_n52996_
-.subckt oa22_x2 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[122][19] i2=$abc$109383$new_n44351_ q=$abc$109383$new_n52997_
-.subckt oa22_x2 i0=$abc$109383$new_n43723_ i1=soc.ram.ram[120][19] i2=$abc$109383$new_n52997_ q=$abc$109383$new_n52998_
+.subckt or21nand_x1 i0=$abc$109383$new_n52995_ i1=$abc$109383$new_n52992_ i2=$abc$109383$new_n43623_ nq=$abc$109383$new_n52996_
+.subckt or21nand_x1 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[122][19] i2=$abc$109383$new_n44351_ nq=$abc$109383$new_n52997_
+.subckt or21nand_x1 i0=$abc$109383$new_n43723_ i1=soc.ram.ram[120][19] i2=$abc$109383$new_n52997_ nq=$abc$109383$new_n52998_
 .subckt nand2_x0 i0=soc.ram.ram[124][19] i1=$abc$109383$new_n44075_ nq=$abc$109383$new_n52999_
 .subckt inv_x0 i=soc.ram.ram[126][19] nq=$abc$109383$new_n53000_
-.subckt ao22_x2 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n53000_ i2=$abc$109383$new_n43636_ q=$abc$109383$new_n53001_
+.subckt and21nor_x1 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n53000_ i2=$abc$109383$new_n43636_ nq=$abc$109383$new_n53001_
 .subckt nand2_x0 i0=$abc$109383$new_n53001_ i1=$abc$109383$new_n52999_ nq=$abc$109383$new_n53002_
-.subckt oa22_x2 i0=$abc$109383$new_n53002_ i1=$abc$109383$new_n52998_ i2=$abc$109383$new_n44214_ q=$abc$109383$new_n53003_
-.subckt oa22_x2 i0=$abc$109383$new_n53003_ i1=$abc$109383$new_n52996_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n53004_
-.subckt oa22_x2 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[107][19] i2=$abc$109383$new_n44351_ q=$abc$109383$new_n53005_
-.subckt oa22_x2 i0=$abc$109383$new_n43723_ i1=soc.ram.ram[105][19] i2=$abc$109383$new_n53005_ q=$abc$109383$new_n53006_
+.subckt or21nand_x1 i0=$abc$109383$new_n53002_ i1=$abc$109383$new_n52998_ i2=$abc$109383$new_n44214_ nq=$abc$109383$new_n53003_
+.subckt or21nand_x1 i0=$abc$109383$new_n53003_ i1=$abc$109383$new_n52996_ i2=$abc$109383$new_n43325_ nq=$abc$109383$new_n53004_
+.subckt or21nand_x1 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[107][19] i2=$abc$109383$new_n44351_ nq=$abc$109383$new_n53005_
+.subckt or21nand_x1 i0=$abc$109383$new_n43723_ i1=soc.ram.ram[105][19] i2=$abc$109383$new_n53005_ nq=$abc$109383$new_n53006_
 .subckt nand2_x0 i0=soc.ram.ram[109][19] i1=$abc$109383$new_n43371_ nq=$abc$109383$new_n53007_
-.subckt ao22_x2 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n48748_ i2=$abc$109383$new_n43636_ q=$abc$109383$new_n53008_
+.subckt and21nor_x1 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n48748_ i2=$abc$109383$new_n43636_ nq=$abc$109383$new_n53008_
 .subckt nand2_x0 i0=$abc$109383$new_n53008_ i1=$abc$109383$new_n53007_ nq=$abc$109383$new_n53009_
-.subckt oa22_x2 i0=$abc$109383$new_n53009_ i1=$abc$109383$new_n53006_ i2=$abc$109383$new_n43634_ q=$abc$109383$new_n53010_
-.subckt oa22_x2 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[106][19] i2=$abc$109383$new_n43533_ q=$abc$109383$new_n53011_
-.subckt oa22_x2 i0=$abc$109383$new_n43422_ i1=soc.ram.ram[104][19] i2=$abc$109383$new_n53011_ q=$abc$109383$new_n53012_
+.subckt or21nand_x1 i0=$abc$109383$new_n53009_ i1=$abc$109383$new_n53006_ i2=$abc$109383$new_n43634_ nq=$abc$109383$new_n53010_
+.subckt or21nand_x1 i0=$abc$109383$new_n43401_ i1=soc.ram.ram[106][19] i2=$abc$109383$new_n43533_ nq=$abc$109383$new_n53011_
+.subckt or21nand_x1 i0=$abc$109383$new_n43422_ i1=soc.ram.ram[104][19] i2=$abc$109383$new_n53011_ nq=$abc$109383$new_n53012_
 .subckt nand2_x0 i0=soc.ram.ram[108][19] i1=$abc$109383$new_n44060_ nq=$abc$109383$new_n53013_
 .subckt inv_x0 i=soc.ram.ram[110][19] nq=$abc$109383$new_n53014_
-.subckt ao22_x2 i0=$abc$109383$new_n43328_ i1=$abc$109383$new_n53014_ i2=$abc$109383$new_n43670_ q=$abc$109383$new_n53015_
+.subckt and21nor_x1 i0=$abc$109383$new_n43328_ i1=$abc$109383$new_n53014_ i2=$abc$109383$new_n43670_ nq=$abc$109383$new_n53015_
 .subckt nand2_x0 i0=$abc$109383$new_n53015_ i1=$abc$109383$new_n53013_ nq=$abc$109383$new_n53016_
-.subckt oa22_x2 i0=$abc$109383$new_n53016_ i1=$abc$109383$new_n53012_ i2=$abc$109383$new_n44044_ q=$abc$109383$new_n53017_
-.subckt oa22_x2 i0=$abc$109383$new_n53017_ i1=$abc$109383$new_n53010_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n53018_
-.subckt oa22_x2 i0=$abc$109383$new_n53018_ i1=$abc$109383$new_n53004_ i2=$abc$109383$new_n45070_ q=$abc$109383$new_n53019_
-.subckt oa22_x2 i0=$abc$109383$new_n53019_ i1=$abc$109383$new_n52990_ i2=$abc$109383$new_n44006_ q=$abc$109383$new_n53020_
-.subckt a3_x2 i0=$abc$109383$new_n53020_ i1=$abc$109383$new_n52974_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n53021_
-.subckt ao22_x2 i0=$abc$109383$new_n53021_ i1=$abc$109383$new_n52973_ i2=$abc$109383$new_n47013_ q=$abc$109383$new_n53022_
+.subckt or21nand_x1 i0=$abc$109383$new_n53016_ i1=$abc$109383$new_n53012_ i2=$abc$109383$new_n44044_ nq=$abc$109383$new_n53017_
+.subckt or21nand_x1 i0=$abc$109383$new_n53017_ i1=$abc$109383$new_n53010_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n53018_
+.subckt or21nand_x1 i0=$abc$109383$new_n53018_ i1=$abc$109383$new_n53004_ i2=$abc$109383$new_n45070_ nq=$abc$109383$new_n53019_
+.subckt or21nand_x1 i0=$abc$109383$new_n53019_ i1=$abc$109383$new_n52990_ i2=$abc$109383$new_n44006_ nq=$abc$109383$new_n53020_
+.subckt and3_x1 i0=$abc$109383$new_n53020_ i1=$abc$109383$new_n52974_ i2=$abc$109383$new_n43586_ q=$abc$109383$new_n53021_
+.subckt and21nor_x1 i0=$abc$109383$new_n53021_ i1=$abc$109383$new_n52973_ i2=$abc$109383$new_n47013_ nq=$abc$109383$new_n53022_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n27639_ i2=$abc$109383$new_n28379_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n53023_
-.subckt o2_x2 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n48721_ q=$abc$109383$new_n53024_
-.subckt o3_x2 i0=$abc$109383$new_n53024_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n53025_
+.subckt or2_x1 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n48721_ q=$abc$109383$new_n53024_
+.subckt or3_x1 i0=$abc$109383$new_n53024_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n53025_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[19] nq=$abc$109383$new_n53026_
-.subckt a2_x2 i0=$abc$109383$new_n53026_ i1=$abc$109383$new_n48719_ q=$abc$109383$new_n53027_
+.subckt and2_x1 i0=$abc$109383$new_n53026_ i1=$abc$109383$new_n48719_ q=$abc$109383$new_n53027_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n53028_
 .subckt nor2_x0 i0=$abc$109383$new_n22004_ i1=$abc$109383$new_n53028_ nq=$abc$109383$new_n53029_
 .subckt nand4_x0 i0=$abc$109383$new_n53029_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n44282_ i3=$abc$109383$new_n50395_ nq=$abc$109383$new_n53030_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n50396_ i2=$abc$109383$new_n50395_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[19] nq=$abc$109383$new_n53031_
-.subckt a2_x2 i0=$abc$109383$new_n53031_ i1=$abc$109383$new_n53030_ q=$abc$109383$new_n53032_
+.subckt and2_x1 i0=$abc$109383$new_n53031_ i1=$abc$109383$new_n53030_ q=$abc$109383$new_n53032_
 .subckt nand4_x0 i0=$abc$109383$new_n53032_ i1=$abc$109383$new_n53027_ i2=$abc$109383$new_n53025_ i3=$abc$109383$new_n53023_ nq=$abc$109383$new_n53033_
 .subckt nor2_x0 i0=$abc$109383$new_n53033_ i1=$abc$109383$new_n53022_ nq=$abc$109383$new_n53034_
-.subckt mx2_x2 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n53034_ i1=$abc$109383$new_n15513_ q=$abc$109383$new_n53035_
+.subckt mux2_x1 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n53034_ i1=$abc$109383$new_n15513_ q=$abc$109383$new_n53035_
 .subckt nor2_x0 i0=$abc$109383$new_n53035_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104000
-.subckt ao22_x2 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[20] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n53037_
+.subckt and21nor_x1 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[20] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n53037_
 .subckt nand2_x0 i0=$abc$109383$new_n49215_ i1=$abc$109383$new_n49204_ nq=$abc$109383$new_n53038_
-.subckt ao22_x2 i0=$abc$109383$new_n53038_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53037_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104004
-.subckt ao22_x2 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[21] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n53040_
+.subckt and21nor_x1 i0=$abc$109383$new_n53038_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53037_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104004
+.subckt and21nor_x1 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[21] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n53040_
 .subckt nand2_x0 i0=$abc$109383$new_n49447_ i1=$abc$109383$new_n49437_ nq=$abc$109383$new_n53041_
-.subckt ao22_x2 i0=$abc$109383$new_n53041_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53040_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104008
+.subckt and21nor_x1 i0=$abc$109383$new_n53041_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53040_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104008
 .subckt nand4_x0 i0=$abc$109383$new_n44875_ i1=$abc$109383$new_n45471_ i2=$abc$109383$new_n19664_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n53043_
-.subckt o3_x2 i0=$abc$109383$new_n49458_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ q=$abc$109383$new_n53044_
+.subckt or3_x1 i0=$abc$109383$new_n49458_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ q=$abc$109383$new_n53044_
 .subckt nand3_x0 i0=$abc$109383$new_n28804_ i1=$abc$109383$new_n28801_ i2=soc.hyperram.sr[22] nq=$abc$109383$new_n53045_
-.subckt a2_x2 i0=$abc$109383$new_n53045_ i1=$abc$109383$new_n49461_ q=$abc$109383$new_n53046_
+.subckt and2_x1 i0=$abc$109383$new_n53045_ i1=$abc$109383$new_n49461_ q=$abc$109383$new_n53046_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n53047_
 .subckt nor2_x0 i0=$abc$109383$new_n22004_ i1=$abc$109383$new_n53047_ nq=$abc$109383$new_n53048_
 .subckt nand4_x0 i0=$abc$109383$new_n53048_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n27492_ i3=$abc$109383$new_n28378_ nq=$abc$109383$new_n53049_
 .subckt nand4_x0 i0=$abc$109383$new_n28127_ i1=$abc$109383$new_n28380_ i2=$abc$109383$new_n28378_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[22] nq=$abc$109383$new_n53050_
-.subckt a2_x2 i0=$abc$109383$new_n53050_ i1=$abc$109383$new_n53049_ q=$abc$109383$new_n53051_
+.subckt and2_x1 i0=$abc$109383$new_n53050_ i1=$abc$109383$new_n53049_ q=$abc$109383$new_n53051_
 .subckt nand4_x0 i0=$abc$109383$new_n53051_ i1=$abc$109383$new_n53046_ i2=$abc$109383$new_n53044_ i3=$abc$109383$new_n53043_ nq=$abc$109383$new_n53052_
-.subckt a3_x2 i0=$abc$109383$new_n49597_ i1=$abc$109383$new_n49593_ i2=$abc$109383$new_n43448_ q=$abc$109383$new_n53053_
+.subckt and3_x1 i0=$abc$109383$new_n49597_ i1=$abc$109383$new_n49593_ i2=$abc$109383$new_n43448_ q=$abc$109383$new_n53053_
 .subckt nand2_x0 i0=$abc$109383$new_n49599_ i1=$abc$109383$new_n45550_ nq=$abc$109383$new_n53054_
-.subckt o2_x2 i0=soc.ram.ram[91][22] i1=$abc$109383$new_n43817_ q=$abc$109383$new_n53055_
+.subckt or2_x1 i0=soc.ram.ram[91][22] i1=$abc$109383$new_n43817_ q=$abc$109383$new_n53055_
 .subckt nand2_x0 i0=$abc$109383$new_n53055_ i1=$abc$109383$new_n43718_ nq=$abc$109383$new_n53056_
-.subckt a2_x2 i0=$abc$109383$new_n49602_ i1=$abc$109383$new_n43512_ q=$abc$109383$new_n53057_
-.subckt ao22_x2 i0=$abc$109383$new_n53057_ i1=$abc$109383$new_n53056_ i2=$abc$109383$new_n53054_ q=$abc$109383$new_n53058_
-.subckt a2_x2 i0=$abc$109383$new_n53058_ i1=$abc$109383$new_n43439_ q=$abc$109383$new_n53059_
-.subckt ao22_x2 i0=$abc$109383$new_n53059_ i1=$abc$109383$new_n53053_ i2=$abc$109383$new_n43539_ q=$abc$109383$new_n53060_
+.subckt and2_x1 i0=$abc$109383$new_n49602_ i1=$abc$109383$new_n43512_ q=$abc$109383$new_n53057_
+.subckt and21nor_x1 i0=$abc$109383$new_n53057_ i1=$abc$109383$new_n53056_ i2=$abc$109383$new_n53054_ nq=$abc$109383$new_n53058_
+.subckt and2_x1 i0=$abc$109383$new_n53058_ i1=$abc$109383$new_n43439_ q=$abc$109383$new_n53059_
+.subckt and21nor_x1 i0=$abc$109383$new_n53059_ i1=$abc$109383$new_n53053_ i2=$abc$109383$new_n43539_ nq=$abc$109383$new_n53060_
 .subckt nor2_x0 i0=$abc$109383$new_n49615_ i1=$abc$109383$new_n49613_ nq=$abc$109383$new_n53061_
 .subckt nor2_x0 i0=$abc$109383$new_n49610_ i1=$abc$109383$new_n49608_ nq=$abc$109383$new_n53062_
-.subckt ao22_x2 i0=$abc$109383$new_n53062_ i1=$abc$109383$new_n53061_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n53063_
-.subckt ao22_x2 i0=$abc$109383$new_n53063_ i1=$abc$109383$new_n53060_ i2=$abc$109383$new_n45244_ q=$abc$109383$new_n53064_
-.subckt ao22_x2 i0=$abc$109383$new_n49589_ i1=$abc$109383$new_n49585_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n53065_
-.subckt a2_x2 i0=$abc$109383$new_n49624_ i1=$abc$109383$new_n49621_ q=$abc$109383$new_n53066_
+.subckt and21nor_x1 i0=$abc$109383$new_n53062_ i1=$abc$109383$new_n53061_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n53063_
+.subckt and21nor_x1 i0=$abc$109383$new_n53063_ i1=$abc$109383$new_n53060_ i2=$abc$109383$new_n45244_ nq=$abc$109383$new_n53064_
+.subckt and21nor_x1 i0=$abc$109383$new_n49589_ i1=$abc$109383$new_n49585_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n53065_
+.subckt and2_x1 i0=$abc$109383$new_n49624_ i1=$abc$109383$new_n49621_ q=$abc$109383$new_n53066_
 .subckt nand2_x0 i0=$abc$109383$new_n49626_ i1=$abc$109383$new_n43601_ nq=$abc$109383$new_n53067_
-.subckt o2_x2 i0=soc.ram.ram[65][22] i1=$abc$109383$new_n43684_ q=$abc$109383$new_n53068_
+.subckt or2_x1 i0=soc.ram.ram[65][22] i1=$abc$109383$new_n43684_ q=$abc$109383$new_n53068_
 .subckt nand2_x0 i0=$abc$109383$new_n53068_ i1=$abc$109383$new_n43499_ nq=$abc$109383$new_n53069_
-.subckt a2_x2 i0=$abc$109383$new_n49629_ i1=$abc$109383$new_n43337_ q=$abc$109383$new_n53070_
-.subckt ao22_x2 i0=$abc$109383$new_n53070_ i1=$abc$109383$new_n53069_ i2=$abc$109383$new_n53067_ q=$abc$109383$new_n53071_
-.subckt a2_x2 i0=$abc$109383$new_n53071_ i1=$abc$109383$new_n43371_ q=$abc$109383$new_n53072_
-.subckt ao22_x2 i0=$abc$109383$new_n53072_ i1=$abc$109383$new_n53066_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n53073_
-.subckt ao22_x2 i0=$abc$109383$new_n53073_ i1=$abc$109383$new_n53065_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n53074_
-.subckt ao22_x2 i0=$abc$109383$new_n53074_ i1=$abc$109383$new_n53064_ i2=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n53075_
-.subckt a2_x2 i0=$abc$109383$new_n49577_ i1=$abc$109383$new_n49572_ q=$abc$109383$new_n53076_
+.subckt and2_x1 i0=$abc$109383$new_n49629_ i1=$abc$109383$new_n43337_ q=$abc$109383$new_n53070_
+.subckt and21nor_x1 i0=$abc$109383$new_n53070_ i1=$abc$109383$new_n53069_ i2=$abc$109383$new_n53067_ nq=$abc$109383$new_n53071_
+.subckt and2_x1 i0=$abc$109383$new_n53071_ i1=$abc$109383$new_n43371_ q=$abc$109383$new_n53072_
+.subckt and21nor_x1 i0=$abc$109383$new_n53072_ i1=$abc$109383$new_n53066_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n53073_
+.subckt and21nor_x1 i0=$abc$109383$new_n53073_ i1=$abc$109383$new_n53065_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n53074_
+.subckt and21nor_x1 i0=$abc$109383$new_n53074_ i1=$abc$109383$new_n53064_ i2=$\soc.ram.ram$rdreg[0]$q[6] nq=$abc$109383$new_n53075_
+.subckt and2_x1 i0=$abc$109383$new_n49577_ i1=$abc$109383$new_n49572_ q=$abc$109383$new_n53076_
 .subckt nor3_x0 i0=$abc$109383$new_n53076_ i1=$abc$109383$new_n49564_ i2=$abc$109383$new_n43768_ nq=$abc$109383$new_n53077_
-.subckt a3_x2 i0=$abc$109383$new_n49505_ i1=$abc$109383$new_n49498_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n53078_
-.subckt oa22_x2 i0=$abc$109383$new_n43706_ i1=$abc$109383$new_n49507_ i2=$abc$109383$new_n43723_ q=$abc$109383$new_n53079_
-.subckt ao22_x2 i0=soc.ram.ram[31][22] i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n45042_ q=$abc$109383$new_n53080_
-.subckt o2_x2 i0=soc.ram.ram[27][22] i1=$abc$109383$new_n43867_ q=$abc$109383$new_n53081_
-.subckt oa22_x2 i0=$abc$109383$new_n53081_ i1=$abc$109383$new_n53080_ i2=$abc$109383$new_n53079_ q=$abc$109383$new_n53082_
-.subckt ao22_x2 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[29][22] i2=$abc$109383$new_n49516_ q=$abc$109383$new_n53083_
-.subckt oa22_x2 i0=$abc$109383$new_n43487_ i1=$abc$109383$new_n49518_ i2=$abc$109383$new_n43438_ q=$abc$109383$new_n53084_
-.subckt ao22_x2 i0=$abc$109383$new_n53084_ i1=$abc$109383$new_n53083_ i2=$abc$109383$new_n43466_ q=$abc$109383$new_n53085_
-.subckt oa22_x2 i0=$abc$109383$new_n53085_ i1=$abc$109383$new_n53082_ i2=$abc$109383$new_n45069_ q=$abc$109383$new_n53086_
+.subckt and3_x1 i0=$abc$109383$new_n49505_ i1=$abc$109383$new_n49498_ i2=$abc$109383$new_n43325_ q=$abc$109383$new_n53078_
+.subckt or21nand_x1 i0=$abc$109383$new_n43706_ i1=$abc$109383$new_n49507_ i2=$abc$109383$new_n43723_ nq=$abc$109383$new_n53079_
+.subckt and21nor_x1 i0=soc.ram.ram[31][22] i1=$abc$109383$new_n43929_ i2=$abc$109383$new_n45042_ nq=$abc$109383$new_n53080_
+.subckt or2_x1 i0=soc.ram.ram[27][22] i1=$abc$109383$new_n43867_ q=$abc$109383$new_n53081_
+.subckt or21nand_x1 i0=$abc$109383$new_n53081_ i1=$abc$109383$new_n53080_ i2=$abc$109383$new_n53079_ nq=$abc$109383$new_n53082_
+.subckt and21nor_x1 i0=$abc$109383$new_n44535_ i1=soc.ram.ram[29][22] i2=$abc$109383$new_n49516_ nq=$abc$109383$new_n53083_
+.subckt or21nand_x1 i0=$abc$109383$new_n43487_ i1=$abc$109383$new_n49518_ i2=$abc$109383$new_n43438_ nq=$abc$109383$new_n53084_
+.subckt and21nor_x1 i0=$abc$109383$new_n53084_ i1=$abc$109383$new_n53083_ i2=$abc$109383$new_n43466_ nq=$abc$109383$new_n53085_
+.subckt or21nand_x1 i0=$abc$109383$new_n53085_ i1=$abc$109383$new_n53082_ i2=$abc$109383$new_n45069_ nq=$abc$109383$new_n53086_
 .subckt nor2_x0 i0=$abc$109383$new_n53086_ i1=$abc$109383$new_n53078_ nq=$abc$109383$new_n53087_
-.subckt ao22_x2 i0=$abc$109383$new_n53087_ i1=$abc$109383$new_n53077_ i2=$abc$109383$new_n43589_ q=$abc$109383$new_n53088_
+.subckt and21nor_x1 i0=$abc$109383$new_n53087_ i1=$abc$109383$new_n53077_ i2=$abc$109383$new_n43589_ nq=$abc$109383$new_n53088_
 .subckt nor3_x0 i0=$abc$109383$new_n53088_ i1=$abc$109383$new_n53075_ i2=$abc$109383$new_n43465_ nq=$abc$109383$new_n53089_
-.subckt oa22_x2 i0=$abc$109383$new_n49547_ i1=$abc$109383$new_n49541_ i2=$abc$109383$new_n43412_ q=$abc$109383$new_n53090_
-.subckt oa22_x2 i0=$abc$109383$new_n49535_ i1=$abc$109383$new_n49530_ i2=$abc$109383$new_n43467_ q=$abc$109383$new_n53091_
-.subckt a2_x2 i0=$abc$109383$new_n53091_ i1=$abc$109383$new_n44654_ q=$abc$109383$new_n53092_
+.subckt or21nand_x1 i0=$abc$109383$new_n49547_ i1=$abc$109383$new_n49541_ i2=$abc$109383$new_n43412_ nq=$abc$109383$new_n53090_
+.subckt or21nand_x1 i0=$abc$109383$new_n49535_ i1=$abc$109383$new_n49530_ i2=$abc$109383$new_n43467_ nq=$abc$109383$new_n53091_
+.subckt and2_x1 i0=$abc$109383$new_n53091_ i1=$abc$109383$new_n44654_ q=$abc$109383$new_n53092_
 .subckt nand2_x0 i0=$abc$109383$new_n53092_ i1=$abc$109383$new_n53090_ nq=$abc$109383$new_n53093_
-.subckt o3_x2 i0=$abc$109383$new_n49491_ i1=$abc$109383$new_n49478_ i2=$abc$109383$new_n44449_ q=$abc$109383$new_n53094_
-.subckt oa22_x2 i0=$abc$109383$new_n53094_ i1=$abc$109383$new_n53093_ i2=$\soc.ram.ram$rdreg[0]$q[6] q=$abc$109383$new_n53095_
+.subckt or3_x1 i0=$abc$109383$new_n49491_ i1=$abc$109383$new_n49478_ i2=$abc$109383$new_n44449_ q=$abc$109383$new_n53094_
+.subckt or21nand_x1 i0=$abc$109383$new_n53094_ i1=$abc$109383$new_n53093_ i2=$\soc.ram.ram$rdreg[0]$q[6] nq=$abc$109383$new_n53095_
 .subckt nand2_x0 i0=soc.ram.ram[111][22] i1=$abc$109383$new_n45444_ nq=$abc$109383$new_n53096_
 .subckt inv_x0 i=soc.ram.ram[110][22] nq=$abc$109383$new_n53097_
-.subckt ao22_x2 i0=$abc$109383$new_n43517_ i1=$abc$109383$new_n53097_ i2=$abc$109383$new_n43608_ q=$abc$109383$new_n53098_
+.subckt and21nor_x1 i0=$abc$109383$new_n43517_ i1=$abc$109383$new_n53097_ i2=$abc$109383$new_n43608_ nq=$abc$109383$new_n53098_
 .subckt nand2_x0 i0=$abc$109383$new_n53098_ i1=$abc$109383$new_n53096_ nq=$abc$109383$new_n53099_
-.subckt a2_x2 i0=soc.ram.ram[107][22] i1=$abc$109383$new_n44142_ q=$abc$109383$new_n53100_
-.subckt oa22_x2 i0=$abc$109383$new_n45550_ i1=soc.ram.ram[106][22] i2=$abc$109383$new_n43952_ q=$abc$109383$new_n53101_
-.subckt ao22_x2 i0=$abc$109383$new_n53101_ i1=$abc$109383$new_n53100_ i2=$abc$109383$new_n43580_ q=$abc$109383$new_n53102_
+.subckt and2_x1 i0=soc.ram.ram[107][22] i1=$abc$109383$new_n44142_ q=$abc$109383$new_n53100_
+.subckt or21nand_x1 i0=$abc$109383$new_n45550_ i1=soc.ram.ram[106][22] i2=$abc$109383$new_n43952_ nq=$abc$109383$new_n53101_
+.subckt and21nor_x1 i0=$abc$109383$new_n53101_ i1=$abc$109383$new_n53100_ i2=$abc$109383$new_n43580_ nq=$abc$109383$new_n53102_
 .subckt nand2_x0 i0=$abc$109383$new_n53102_ i1=$abc$109383$new_n53099_ nq=$abc$109383$new_n53103_
 .subckt nand2_x0 i0=soc.ram.ram[109][22] i1=$abc$109383$new_n44142_ nq=$abc$109383$new_n53104_
 .subckt inv_x0 i=soc.ram.ram[108][22] nq=$abc$109383$new_n53105_
-.subckt ao22_x2 i0=$abc$109383$new_n43443_ i1=$abc$109383$new_n53105_ i2=$abc$109383$new_n43338_ q=$abc$109383$new_n53106_
-.subckt a2_x2 i0=$abc$109383$new_n53106_ i1=$abc$109383$new_n53104_ q=$abc$109383$new_n53107_
+.subckt and21nor_x1 i0=$abc$109383$new_n43443_ i1=$abc$109383$new_n53105_ i2=$abc$109383$new_n43338_ nq=$abc$109383$new_n53106_
+.subckt and2_x1 i0=$abc$109383$new_n53106_ i1=$abc$109383$new_n53104_ q=$abc$109383$new_n53107_
 .subckt nand2_x0 i0=soc.ram.ram[105][22] i1=$abc$109383$new_n44053_ nq=$abc$109383$new_n53108_
 .subckt inv_x0 i=soc.ram.ram[104][22] nq=$abc$109383$new_n53109_
-.subckt ao22_x2 i0=$abc$109383$new_n44334_ i1=$abc$109383$new_n53109_ i2=$abc$109383$new_n43398_ q=$abc$109383$new_n53110_
-.subckt oa22_x2 i0=$abc$109383$new_n53110_ i1=$abc$109383$new_n53108_ i2=$abc$109383$new_n43532_ q=$abc$109383$new_n53111_
-.subckt ao22_x2 i0=$abc$109383$new_n53111_ i1=$abc$109383$new_n53107_ i2=$abc$109383$new_n43714_ q=$abc$109383$new_n53112_
+.subckt and21nor_x1 i0=$abc$109383$new_n44334_ i1=$abc$109383$new_n53109_ i2=$abc$109383$new_n43398_ nq=$abc$109383$new_n53110_
+.subckt or21nand_x1 i0=$abc$109383$new_n53110_ i1=$abc$109383$new_n53108_ i2=$abc$109383$new_n43532_ nq=$abc$109383$new_n53111_
+.subckt and21nor_x1 i0=$abc$109383$new_n53111_ i1=$abc$109383$new_n53107_ i2=$abc$109383$new_n43714_ nq=$abc$109383$new_n53112_
 .subckt nand2_x0 i0=$abc$109383$new_n53112_ i1=$abc$109383$new_n53103_ nq=$abc$109383$new_n53113_
 .subckt nand2_x0 i0=soc.ram.ram[124][22] i1=$abc$109383$new_n43372_ nq=$abc$109383$new_n53114_
 .subckt inv_x0 i=soc.ram.ram[126][22] nq=$abc$109383$new_n53115_
-.subckt ao22_x2 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n53115_ i2=$abc$109383$new_n44859_ q=$abc$109383$new_n53116_
+.subckt and21nor_x1 i0=$abc$109383$new_n44075_ i1=$abc$109383$new_n53115_ i2=$abc$109383$new_n44859_ nq=$abc$109383$new_n53116_
 .subckt nand2_x0 i0=$abc$109383$new_n53116_ i1=$abc$109383$new_n53114_ nq=$abc$109383$new_n53117_
-.subckt oa22_x2 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[122][22] i2=$abc$109383$new_n43598_ q=$abc$109383$new_n53118_
-.subckt oa22_x2 i0=$abc$109383$new_n44060_ i1=soc.ram.ram[120][22] i2=$abc$109383$new_n53118_ q=$abc$109383$new_n53119_
-.subckt a2_x2 i0=$abc$109383$new_n53119_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n53120_
+.subckt or21nand_x1 i0=$abc$109383$new_n43563_ i1=soc.ram.ram[122][22] i2=$abc$109383$new_n43598_ nq=$abc$109383$new_n53118_
+.subckt or21nand_x1 i0=$abc$109383$new_n44060_ i1=soc.ram.ram[120][22] i2=$abc$109383$new_n53118_ nq=$abc$109383$new_n53119_
+.subckt and2_x1 i0=$abc$109383$new_n53119_ i1=$abc$109383$new_n43435_ q=$abc$109383$new_n53120_
 .subckt nand2_x0 i0=$abc$109383$new_n53120_ i1=$abc$109383$new_n53117_ nq=$abc$109383$new_n53121_
 .subckt nand2_x0 i0=soc.ram.ram[125][22] i1=$abc$109383$new_n44060_ nq=$abc$109383$new_n53122_
-.subckt ao22_x2 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n49674_ i2=$abc$109383$new_n44092_ q=$abc$109383$new_n53123_
-.subckt a2_x2 i0=$abc$109383$new_n53123_ i1=$abc$109383$new_n53122_ q=$abc$109383$new_n53124_
-.subckt oa22_x2 i0=$\soc.ram.ram$rdreg[0]$q[1] i1=soc.ram.ram[123][22] i2=$abc$109383$new_n43337_ q=$abc$109383$new_n53125_
-.subckt oa22_x2 i0=$abc$109383$new_n43422_ i1=soc.ram.ram[121][22] i2=$abc$109383$new_n53125_ q=$abc$109383$new_n53126_
+.subckt and21nor_x1 i0=$abc$109383$new_n43542_ i1=$abc$109383$new_n49674_ i2=$abc$109383$new_n44092_ nq=$abc$109383$new_n53123_
+.subckt and2_x1 i0=$abc$109383$new_n53123_ i1=$abc$109383$new_n53122_ q=$abc$109383$new_n53124_
+.subckt or21nand_x1 i0=$\soc.ram.ram$rdreg[0]$q[1] i1=soc.ram.ram[123][22] i2=$abc$109383$new_n43337_ nq=$abc$109383$new_n53125_
+.subckt or21nand_x1 i0=$abc$109383$new_n43422_ i1=soc.ram.ram[121][22] i2=$abc$109383$new_n53125_ nq=$abc$109383$new_n53126_
 .subckt nand2_x0 i0=$abc$109383$new_n53126_ i1=$abc$109383$new_n43847_ nq=$abc$109383$new_n53127_
-.subckt ao22_x2 i0=$abc$109383$new_n53127_ i1=$abc$109383$new_n53124_ i2=$abc$109383$new_n43728_ q=$abc$109383$new_n53128_
+.subckt and21nor_x1 i0=$abc$109383$new_n53127_ i1=$abc$109383$new_n53124_ i2=$abc$109383$new_n43728_ nq=$abc$109383$new_n53128_
 .subckt nand2_x0 i0=$abc$109383$new_n53128_ i1=$abc$109383$new_n53121_ nq=$abc$109383$new_n53129_
-.subckt oa22_x2 i0=$abc$109383$new_n53129_ i1=$abc$109383$new_n53113_ i2=$abc$109383$new_n43713_ q=$abc$109383$new_n53130_
+.subckt or21nand_x1 i0=$abc$109383$new_n53129_ i1=$abc$109383$new_n53113_ i2=$abc$109383$new_n43713_ nq=$abc$109383$new_n53130_
 .subckt nand2_x0 i0=$abc$109383$new_n49650_ i1=$abc$109383$new_n43730_ nq=$abc$109383$new_n53131_
 .subckt nand2_x0 i0=$abc$109383$new_n49653_ i1=$abc$109383$new_n43665_ nq=$abc$109383$new_n53132_
 .subckt nand3_x0 i0=$abc$109383$new_n53132_ i1=$abc$109383$new_n53131_ i2=$abc$109383$new_n43920_ nq=$abc$109383$new_n53133_
-.subckt oa22_x2 i0=$abc$109383$new_n49668_ i1=$abc$109383$new_n49664_ i2=$abc$109383$new_n43506_ q=$abc$109383$new_n53134_
+.subckt or21nand_x1 i0=$abc$109383$new_n49668_ i1=$abc$109383$new_n49664_ i2=$abc$109383$new_n43506_ nq=$abc$109383$new_n53134_
 .subckt nand2_x0 i0=$abc$109383$new_n49661_ i1=$abc$109383$new_n44212_ nq=$abc$109383$new_n53135_
 .subckt nand3_x0 i0=$abc$109383$new_n53135_ i1=$abc$109383$new_n53134_ i2=$abc$109383$new_n43697_ nq=$abc$109383$new_n53136_
-.subckt oa22_x2 i0=$abc$109383$new_n53136_ i1=$abc$109383$new_n53133_ i2=$abc$109383$new_n43897_ q=$abc$109383$new_n53137_
-.subckt oa22_x2 i0=$abc$109383$new_n53137_ i1=$abc$109383$new_n53130_ i2=$abc$109383$new_n43589_ q=$abc$109383$new_n53138_
-.subckt a2_x2 i0=$abc$109383$new_n53138_ i1=$abc$109383$new_n43865_ q=$abc$109383$new_n53139_
-.subckt oa22_x2 i0=$abc$109383$new_n53139_ i1=$abc$109383$new_n53095_ i2=$abc$109383$new_n53089_ q=$abc$109383$new_n53140_
-.subckt oa22_x2 i0=$abc$109383$new_n47013_ i1=$abc$109383$new_n53140_ i2=$abc$109383$new_n53052_ q=$abc$109383$new_n53141_
-.subckt mx2_x2 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n53141_ i1=soc.cpu.minerva.fetch.ibus_rdata[22] q=$abc$109383$new_n53142_
-.subckt a2_x2 i0=$abc$109383$new_n53142_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104012
-.subckt mx2_x2 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n49913_ i1=soc.cpu.minerva.fetch.ibus_rdata[23] q=$abc$109383$new_n53144_
-.subckt a2_x2 i0=$abc$109383$new_n53144_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104016
-.subckt ao22_x2 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[24] i2=$abc$109383$new_n52745_ q=$abc$109383$new_n53146_
-.subckt a2_x2 i0=$abc$109383$new_n50051_ i1=$abc$109383$new_n43323_ q=$abc$109383$new_n53147_
+.subckt or21nand_x1 i0=$abc$109383$new_n53136_ i1=$abc$109383$new_n53133_ i2=$abc$109383$new_n43897_ nq=$abc$109383$new_n53137_
+.subckt or21nand_x1 i0=$abc$109383$new_n53137_ i1=$abc$109383$new_n53130_ i2=$abc$109383$new_n43589_ nq=$abc$109383$new_n53138_
+.subckt and2_x1 i0=$abc$109383$new_n53138_ i1=$abc$109383$new_n43865_ q=$abc$109383$new_n53139_
+.subckt or21nand_x1 i0=$abc$109383$new_n53139_ i1=$abc$109383$new_n53095_ i2=$abc$109383$new_n53089_ nq=$abc$109383$new_n53140_
+.subckt or21nand_x1 i0=$abc$109383$new_n47013_ i1=$abc$109383$new_n53140_ i2=$abc$109383$new_n53052_ nq=$abc$109383$new_n53141_
+.subckt mux2_x1 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n53141_ i1=soc.cpu.minerva.fetch.ibus_rdata[22] q=$abc$109383$new_n53142_
+.subckt and2_x1 i0=$abc$109383$new_n53142_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104012
+.subckt mux2_x1 cmd=$abc$109383$new_n52741_ i0=$abc$109383$new_n49913_ i1=soc.cpu.minerva.fetch.ibus_rdata[23] q=$abc$109383$new_n53144_
+.subckt and2_x1 i0=$abc$109383$new_n53144_ i1=$abc$109383$new_n52640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104016
+.subckt and21nor_x1 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[24] i2=$abc$109383$new_n52745_ nq=$abc$109383$new_n53146_
+.subckt and2_x1 i0=$abc$109383$new_n50051_ i1=$abc$109383$new_n43323_ q=$abc$109383$new_n53147_
 .subckt nand2_x0 i0=$abc$109383$new_n53147_ i1=$abc$109383$new_n50153_ nq=$abc$109383$new_n53148_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n27640_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[24] nq=$abc$109383$new_n53149_
 .subckt nand3_x0 i0=$abc$109383$new_n49926_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n44268_ nq=$abc$109383$new_n53150_
-.subckt a2_x2 i0=$abc$109383$new_n49921_ i1=$abc$109383$new_n49919_ q=$abc$109383$new_n53151_
-.subckt o4_x2 i0=$abc$109383$new_n53151_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n53152_
+.subckt and2_x1 i0=$abc$109383$new_n49921_ i1=$abc$109383$new_n49919_ q=$abc$109383$new_n53151_
+.subckt or4_x1 i0=$abc$109383$new_n53151_ i1=$abc$109383$new_n44259_ i2=$abc$109383$new_n45976_ i3=$abc$109383$new_n44258_ q=$abc$109383$new_n53152_
 .subckt nand4_x0 i0=$abc$109383$new_n29090_ i1=$abc$109383$new_n29089_ i2=$abc$109383$new_n27560_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[24] nq=$abc$109383$new_n53153_
-.subckt a4_x2 i0=$abc$109383$new_n53153_ i1=$abc$109383$new_n53152_ i2=$abc$109383$new_n53150_ i3=$abc$109383$new_n49918_ q=$abc$109383$new_n53154_
-.subckt a3_x2 i0=$abc$109383$new_n53154_ i1=$abc$109383$new_n53149_ i2=$abc$109383$new_n49924_ q=$abc$109383$new_n53155_
+.subckt and4_x1 i0=$abc$109383$new_n53153_ i1=$abc$109383$new_n53152_ i2=$abc$109383$new_n53150_ i3=$abc$109383$new_n49918_ q=$abc$109383$new_n53154_
+.subckt and3_x1 i0=$abc$109383$new_n53154_ i1=$abc$109383$new_n53149_ i2=$abc$109383$new_n49924_ q=$abc$109383$new_n53155_
 .subckt nand2_x0 i0=$abc$109383$new_n53155_ i1=$abc$109383$new_n53148_ nq=$abc$109383$new_n53156_
-.subckt ao22_x2 i0=$abc$109383$new_n53156_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53146_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104020
+.subckt and21nor_x1 i0=$abc$109383$new_n53156_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53146_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104020
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n53158_
 .subckt buf_x4 i=$abc$109383$new_n53158_ q=$abc$109383$new_n53159_
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[25] nq=$abc$109383$new_n53160_
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=$abc$109383$new_n53160_ q=$abc$109383$new_n53161_
-.subckt oa22_x2 i0=$abc$109383$new_n50385_ i1=$abc$109383$new_n50402_ i2=$abc$109383$new_n52741_ q=$abc$109383$new_n53162_
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=$abc$109383$new_n53160_ nq=$abc$109383$new_n53161_
+.subckt or21nand_x1 i0=$abc$109383$new_n50385_ i1=$abc$109383$new_n50402_ i2=$abc$109383$new_n52741_ nq=$abc$109383$new_n53162_
 .subckt nand2_x0 i0=$abc$109383$new_n53162_ i1=$abc$109383$new_n53161_ nq=$abc$109383$new_n53163_
-.subckt a2_x2 i0=$abc$109383$new_n53163_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104024
+.subckt and2_x1 i0=$abc$109383$new_n53163_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104024
 .subckt nand3_x0 i0=$abc$109383$new_n52739_ i1=$abc$109383$new_n50629_ i2=$abc$109383$new_n50617_ nq=$abc$109383$new_n53165_
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[26] q=$abc$109383$new_n53166_
-.subckt a2_x2 i0=$abc$109383$new_n53166_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n53167_
-.subckt a2_x2 i0=$abc$109383$new_n53167_ i1=$abc$109383$new_n53165_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104028
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[27] q=$abc$109383$new_n53169_
-.subckt a2_x2 i0=$abc$109383$new_n53169_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n53170_
-.subckt ao22_x2 i0=$abc$109383$new_n50878_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53170_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104032
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[26] nq=$abc$109383$new_n53166_
+.subckt and2_x1 i0=$abc$109383$new_n53166_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n53167_
+.subckt and2_x1 i0=$abc$109383$new_n53167_ i1=$abc$109383$new_n53165_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104028
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[27] nq=$abc$109383$new_n53169_
+.subckt and2_x1 i0=$abc$109383$new_n53169_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n53170_
+.subckt and21nor_x1 i0=$abc$109383$new_n50878_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53170_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104032
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n53172_
-.subckt ao22_x2 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[28] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n53173_
-.subckt o2_x2 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n50887_ q=$abc$109383$new_n53174_
-.subckt ao22_x2 i0=$abc$109383$new_n43306_ i1=$abc$109383$new_n53174_ i2=$abc$109383$new_n50886_ q=$abc$109383$new_n53175_
+.subckt and21nor_x1 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[28] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n53173_
+.subckt or2_x1 i0=$abc$109383$new_n44290_ i1=$abc$109383$new_n50887_ q=$abc$109383$new_n53174_
+.subckt and21nor_x1 i0=$abc$109383$new_n43306_ i1=$abc$109383$new_n53174_ i2=$abc$109383$new_n50886_ nq=$abc$109383$new_n53175_
 .subckt nand3_x0 i0=$abc$109383$new_n28388_ i1=$abc$109383$new_n27640_ i2=soc.rom.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n53176_
 .subckt nand3_x0 i0=$abc$109383$new_n27494_ i1=$abc$109383$new_n27638_ i2=soc.timer.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n53177_
 .subckt nand3_x0 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n44285_ i2=soc.gpio.bridge.csr_bridge_0.wb__dat_r[28] nq=$abc$109383$new_n53178_
-.subckt oa22_x2 i0=$abc$109383$new_n53178_ i1=$abc$109383$new_n53177_ i2=$abc$109383$new_n28563_ q=$abc$109383$new_n53179_
+.subckt or21nand_x1 i0=$abc$109383$new_n53178_ i1=$abc$109383$new_n53177_ i2=$abc$109383$new_n28563_ nq=$abc$109383$new_n53179_
 .subckt nand4_x0 i0=$abc$109383$new_n53179_ i1=$abc$109383$new_n53176_ i2=$abc$109383$new_n53175_ i3=$abc$109383$new_n50884_ nq=$abc$109383$new_n53180_
-.subckt ao22_x2 i0=$abc$109383$new_n51018_ i1=$abc$109383$new_n50960_ i2=$abc$109383$new_n43323_ q=$abc$109383$new_n53181_
-.subckt oa22_x2 i0=$abc$109383$new_n51132_ i1=$abc$109383$new_n53181_ i2=$abc$109383$new_n53180_ q=$abc$109383$new_n53182_
-.subckt ao22_x2 i0=$abc$109383$new_n53182_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53173_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104036
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[29] q=$abc$109383$new_n53184_
-.subckt a2_x2 i0=$abc$109383$new_n53184_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n53185_
-.subckt ao22_x2 i0=$abc$109383$new_n51359_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53185_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104040
+.subckt and21nor_x1 i0=$abc$109383$new_n51018_ i1=$abc$109383$new_n50960_ i2=$abc$109383$new_n43323_ nq=$abc$109383$new_n53181_
+.subckt or21nand_x1 i0=$abc$109383$new_n51132_ i1=$abc$109383$new_n53181_ i2=$abc$109383$new_n53180_ nq=$abc$109383$new_n53182_
+.subckt and21nor_x1 i0=$abc$109383$new_n53182_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53173_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104036
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=soc.cpu.minerva.fetch.ibus_rdata[29] nq=$abc$109383$new_n53184_
+.subckt and2_x1 i0=$abc$109383$new_n53184_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n53185_
+.subckt and21nor_x1 i0=$abc$109383$new_n51359_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53185_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104040
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus_rdata[30] nq=$abc$109383$new_n53187_
-.subckt oa22_x2 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=$abc$109383$new_n53187_ q=$abc$109383$new_n53188_
+.subckt or21nand_x1 i0=$abc$109383$new_n52750_ i1=$abc$109383$new_n52749_ i2=$abc$109383$new_n53187_ nq=$abc$109383$new_n53188_
 .subckt nand4_x0 i0=$abc$109383$new_n44876_ i1=$abc$109383$new_n44268_ i2=$abc$109383$new_n19664_ i3=soc.gpio.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n53189_
-.subckt o2_x2 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n51366_ q=$abc$109383$new_n53190_
-.subckt o3_x2 i0=$abc$109383$new_n53190_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n53191_
+.subckt or2_x1 i0=$abc$109383$new_n19691_ i1=$abc$109383$new_n51366_ q=$abc$109383$new_n53190_
+.subckt or3_x1 i0=$abc$109383$new_n53190_ i1=$abc$109383$new_n44871_ i2=$abc$109383$new_n44870_ q=$abc$109383$new_n53191_
 .subckt nand3_x0 i0=$abc$109383$new_n28805_ i1=$abc$109383$new_n28802_ i2=soc.hyperram.sr[30] nq=$abc$109383$new_n53192_
-.subckt a2_x2 i0=$abc$109383$new_n53192_ i1=$abc$109383$new_n51363_ q=$abc$109383$new_n53193_
+.subckt and2_x1 i0=$abc$109383$new_n53192_ i1=$abc$109383$new_n51363_ q=$abc$109383$new_n53193_
 .subckt inv_x0 i=soc.timer.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n53194_
 .subckt nor2_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n53194_ nq=$abc$109383$new_n53195_
 .subckt nand4_x0 i0=$abc$109383$new_n53195_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n45471_ i3=$abc$109383$new_n47238_ nq=$abc$109383$new_n53196_
 .subckt nand4_x0 i0=$abc$109383$new_n28382_ i1=$abc$109383$new_n28381_ i2=$abc$109383$new_n47238_ i3=soc.rom.bridge.csr_bridge_0.wb__dat_r[30] nq=$abc$109383$new_n53197_
-.subckt a2_x2 i0=$abc$109383$new_n53197_ i1=$abc$109383$new_n53196_ q=$abc$109383$new_n53198_
-.subckt a4_x2 i0=$abc$109383$new_n53198_ i1=$abc$109383$new_n53193_ i2=$abc$109383$new_n53191_ i3=$abc$109383$new_n53189_ q=$abc$109383$new_n53199_
+.subckt and2_x1 i0=$abc$109383$new_n53197_ i1=$abc$109383$new_n53196_ q=$abc$109383$new_n53198_
+.subckt and4_x1 i0=$abc$109383$new_n53198_ i1=$abc$109383$new_n53193_ i2=$abc$109383$new_n53191_ i3=$abc$109383$new_n53189_ q=$abc$109383$new_n53199_
 .subckt nand3_x0 i0=$abc$109383$new_n51481_ i1=$abc$109383$new_n51422_ i2=$abc$109383$new_n46883_ nq=$abc$109383$new_n53200_
 .subckt nand3_x0 i0=$abc$109383$new_n51599_ i1=$abc$109383$new_n51543_ i2=$abc$109383$new_n43587_ nq=$abc$109383$new_n53201_
-.subckt oa22_x2 i0=$abc$109383$new_n53201_ i1=$abc$109383$new_n53200_ i2=$abc$109383$new_n44583_ q=$abc$109383$new_n53202_
-.subckt oa22_x2 i0=$abc$109383$new_n53202_ i1=$abc$109383$new_n53199_ i2=$abc$109383$new_n52741_ q=$abc$109383$new_n53203_
+.subckt or21nand_x1 i0=$abc$109383$new_n53201_ i1=$abc$109383$new_n53200_ i2=$abc$109383$new_n44583_ nq=$abc$109383$new_n53202_
+.subckt or21nand_x1 i0=$abc$109383$new_n53202_ i1=$abc$109383$new_n53199_ i2=$abc$109383$new_n52741_ nq=$abc$109383$new_n53203_
 .subckt nand2_x0 i0=$abc$109383$new_n53203_ i1=$abc$109383$new_n53188_ nq=$abc$109383$new_n53204_
-.subckt a2_x2 i0=$abc$109383$new_n53204_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104044
-.subckt ao22_x2 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[31] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n53206_
-.subckt ao22_x2 i0=$abc$109383$new_n51857_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53206_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104048
+.subckt and2_x1 i0=$abc$109383$new_n53204_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104044
+.subckt and21nor_x1 i0=$abc$109383$new_n52738_ i1=soc.cpu.minerva.fetch.ibus_rdata[31] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n53206_
+.subckt and21nor_x1 i0=$abc$109383$new_n51857_ i1=$abc$109383$new_n52735_ i2=$abc$109383$new_n53206_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104048
 .subckt buf_x4 i=$abc$109383$new_n30265_ q=$abc$109383$new_n53208_
 .subckt buf_x4 i=$abc$109383$new_n15553_ q=$abc$109383$new_n53209_
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n53210_
-.subckt oa22_x2 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n53208_ i2=$abc$109383$new_n20235_ q=$abc$109383$new_n53211_
-.subckt a2_x2 i0=$abc$109383$new_n15253_ i1=$abc$109383$new_n28911_ q=$abc$109383$new_n53212_
+.subckt or21nand_x1 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n53208_ i2=$abc$109383$new_n20235_ nq=$abc$109383$new_n53211_
+.subckt and2_x1 i0=$abc$109383$new_n15253_ i1=$abc$109383$new_n28911_ q=$abc$109383$new_n53212_
 .subckt buf_x4 i=$abc$109383$new_n53212_ q=$abc$109383$new_n53213_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[0] nq=$abc$109383$new_n53214_
 .subckt buf_x4 i=soc.cpu.minerva.payload__mret$118 q=$abc$109383$new_n53215_
@@ -38494,97 +38494,97 @@
 .subckt buf_x4 i=$abc$109383$new_n15249_ q=$abc$109383$new_n53220_
 .subckt buf_x4 i=soc.cpu.minerva.payload__branch_taken q=$abc$109383$new_n53221_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[2] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53222_
-.subckt oa22_x2 i0=$abc$109383$new_n53222_ i1=$abc$109383$new_n53219_ i2=$abc$109383$new_n53216_ q=$abc$109383$new_n53223_
+.subckt or21nand_x1 i0=$abc$109383$new_n53222_ i1=$abc$109383$new_n53219_ i2=$abc$109383$new_n53216_ nq=$abc$109383$new_n53223_
 .subckt buf_x4 i=$abc$109383$new_n53215_ q=$abc$109383$new_n53224_
 .subckt nand2_x0 i0=soc.cpu.minerva.exception.mepc__r__base[0] i1=$abc$109383$new_n53224_ nq=$abc$109383$new_n53225_
-.subckt a2_x2 i0=$abc$109383$new_n53225_ i1=$abc$109383$new_n53223_ q=$abc$109383$new_n53226_
+.subckt and2_x1 i0=$abc$109383$new_n53225_ i1=$abc$109383$new_n53223_ q=$abc$109383$new_n53226_
 .subckt nand3_x0 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ nq=$abc$109383$new_n53227_
 .subckt buf_x4 i=$abc$109383$new_n53227_ q=$abc$109383$new_n53228_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53226_ i1=$abc$109383$new_n53214_ q=$abc$109383$new_n53229_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53226_ i1=$abc$109383$new_n53214_ q=$abc$109383$new_n53229_
 .subckt nand2_x0 i0=$abc$109383$new_n53229_ i1=$abc$109383$new_n53213_ nq=$abc$109383$new_n53230_
 .subckt buf_x4 i=$abc$109383$new_n15259_ q=$abc$109383$new_n53231_
-.subckt nxr2_x1 i0=$abc$109383$new_n15400_ i1=soc.cpu.minerva.payload__pc$27[2] nq=$abc$109383$new_n53232_
-.subckt a4_x2 i0=$abc$109383$new_n53232_ i1=$abc$109383$new_n52656_ i2=$abc$109383$new_n52649_ i3=soc.cpu.minerva.f.valid$1 q=$abc$109383$new_n53233_
+.subckt nexor2_x0 i0=$abc$109383$new_n15400_ i1=soc.cpu.minerva.payload__pc$27[2] nq=$abc$109383$new_n53232_
+.subckt and4_x1 i0=$abc$109383$new_n53232_ i1=$abc$109383$new_n52656_ i2=$abc$109383$new_n52649_ i3=soc.cpu.minerva.f.valid$1 q=$abc$109383$new_n53233_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[2] nq=$abc$109383$new_n53234_
-.subckt a2_x2 i0=$abc$109383$new_n52732_ i1=$abc$109383$new_n53234_ q=$abc$109383$new_n53235_
-.subckt ao22_x2 i0=$abc$109383$new_n53235_ i1=$abc$109383$new_n53233_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53236_
+.subckt and2_x1 i0=$abc$109383$new_n52732_ i1=$abc$109383$new_n53234_ q=$abc$109383$new_n53235_
+.subckt and21nor_x1 i0=$abc$109383$new_n53235_ i1=$abc$109383$new_n53233_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53236_
 .subckt buf_x4 i=$abc$109383$new_n15255_ q=$abc$109383$new_n53237_
 .subckt buf_x4 i=soc.cpu.minerva.payload__fence_i q=$abc$109383$new_n53238_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=soc.cpu.minerva.payload__pc$27[2] i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53239_
 .subckt nand2_x0 i0=$abc$109383$new_n53239_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53240_
-.subckt ao22_x2 i0=$abc$109383$new_n53240_ i1=$abc$109383$new_n53236_ i2=$abc$109383$new_n53230_ q=$abc$109383$new_n53241_
+.subckt and21nor_x1 i0=$abc$109383$new_n53240_ i1=$abc$109383$new_n53236_ i2=$abc$109383$new_n53230_ nq=$abc$109383$new_n53241_
 .subckt nand3_x0 i0=$abc$109383$new_n53241_ i1=$abc$109383$new_n30156_ i2=$abc$109383$new_n34794_ nq=$abc$109383$new_n53242_
-.subckt a2_x2 i0=$abc$109383$new_n53242_ i1=$abc$109383$new_n53211_ q=$abc$109383$new_n53243_
+.subckt and2_x1 i0=$abc$109383$new_n53242_ i1=$abc$109383$new_n53211_ q=$abc$109383$new_n53243_
 .subckt nor2_x0 i0=$abc$109383$new_n53243_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104052
-.subckt oa22_x2 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n53208_ i2=$abc$109383$new_n20882_ q=$abc$109383$new_n53245_
+.subckt or21nand_x1 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n53208_ i2=$abc$109383$new_n20882_ nq=$abc$109383$new_n53245_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[1] nq=$abc$109383$new_n53246_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mepc__r__base[1] nq=$abc$109383$new_n53247_
 .subckt buf_x4 i=soc.cpu.minerva.payload__branch_predict_taken$110 q=$abc$109383$new_n53248_
 .subckt buf_x4 i=$abc$109383$new_n15251_ q=$abc$109383$new_n53249_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[3] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53250_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[3] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53251_
-.subckt a2_x2 i0=$abc$109383$new_n53251_ i1=$abc$109383$new_n53250_ q=$abc$109383$new_n53252_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53252_ i1=$abc$109383$new_n53247_ q=$abc$109383$new_n53253_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53253_ i1=$abc$109383$new_n53246_ q=$abc$109383$new_n53254_
+.subckt and2_x1 i0=$abc$109383$new_n53251_ i1=$abc$109383$new_n53250_ q=$abc$109383$new_n53252_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53252_ i1=$abc$109383$new_n53247_ q=$abc$109383$new_n53253_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53253_ i1=$abc$109383$new_n53246_ q=$abc$109383$new_n53254_
 .subckt nor2_x0 i0=$abc$109383$new_n53254_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53255_
 .subckt buf_x4 i=$abc$109383$new_n15255_ q=$abc$109383$new_n53256_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n30145_ i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53257_
-.subckt a2_x2 i0=$abc$109383$new_n53257_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53258_
-.subckt a3_x2 i0=$abc$109383$new_n52656_ i1=$abc$109383$new_n52649_ i2=soc.cpu.minerva.f.valid$1 q=$abc$109383$new_n53259_
+.subckt and2_x1 i0=$abc$109383$new_n53257_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53258_
+.subckt and3_x1 i0=$abc$109383$new_n52656_ i1=$abc$109383$new_n52649_ i2=soc.cpu.minerva.f.valid$1 q=$abc$109383$new_n53259_
 .subckt buf_x4 i=$abc$109383$new_n53259_ q=$abc$109383$new_n53260_
-.subckt a4_x2 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[9] i2=$abc$109383$new_n15264_ i3=soc.cpu.minerva.payload__instruction$28[5] q=$abc$109383$new_n53261_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[2] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n53261_ q=$abc$109383$new_n53262_
+.subckt and4_x1 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[9] i2=$abc$109383$new_n15264_ i3=soc.cpu.minerva.payload__instruction$28[5] q=$abc$109383$new_n53261_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[2] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n53261_ nq=$abc$109383$new_n53262_
 .subckt nand2_x0 i0=$abc$109383$new_n53262_ i1=soc.cpu.minerva.payload__pc$27[2] nq=$abc$109383$new_n53263_
-.subckt nxr2_x1 i0=$abc$109383$new_n15339_ i1=soc.cpu.minerva.payload__pc$27[3] nq=$abc$109383$new_n53264_
-.subckt nxr2_x1 i0=$abc$109383$new_n53264_ i1=$abc$109383$new_n53263_ nq=$abc$109383$new_n53265_
+.subckt nexor2_x0 i0=$abc$109383$new_n15339_ i1=soc.cpu.minerva.payload__pc$27[3] nq=$abc$109383$new_n53264_
+.subckt nexor2_x0 i0=$abc$109383$new_n53264_ i1=$abc$109383$new_n53263_ nq=$abc$109383$new_n53265_
 .subckt nand2_x0 i0=$abc$109383$new_n53265_ i1=$abc$109383$new_n53260_ nq=$abc$109383$new_n53266_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__pc$25[3] i1=soc.cpu.minerva.payload__pc$25[2] nq=$abc$109383$new_n53267_
-.subckt ao22_x2 i0=$abc$109383$new_n53267_ i1=$abc$109383$new_n53260_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53268_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__pc$25[3] i1=soc.cpu.minerva.payload__pc$25[2] nq=$abc$109383$new_n53267_
+.subckt and21nor_x1 i0=$abc$109383$new_n53267_ i1=$abc$109383$new_n53260_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53268_
 .subckt nand2_x0 i0=$abc$109383$new_n53268_ i1=$abc$109383$new_n53266_ nq=$abc$109383$new_n53269_
-.subckt oa22_x2 i0=$abc$109383$new_n53269_ i1=$abc$109383$new_n53258_ i2=$abc$109383$new_n53255_ q=$abc$109383$new_n53270_
+.subckt or21nand_x1 i0=$abc$109383$new_n53269_ i1=$abc$109383$new_n53258_ i2=$abc$109383$new_n53255_ nq=$abc$109383$new_n53270_
 .subckt nand3_x0 i0=$abc$109383$new_n53270_ i1=$abc$109383$new_n30156_ i2=$abc$109383$new_n34794_ nq=$abc$109383$new_n53271_
-.subckt a2_x2 i0=$abc$109383$new_n53271_ i1=$abc$109383$new_n53245_ q=$abc$109383$new_n53272_
+.subckt and2_x1 i0=$abc$109383$new_n53271_ i1=$abc$109383$new_n53245_ q=$abc$109383$new_n53272_
 .subckt nor2_x0 i0=$abc$109383$new_n53272_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104056
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[2] q=$abc$109383$new_n53274_
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[2] nq=$abc$109383$new_n53274_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[2] nq=$abc$109383$new_n53275_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mepc__r__base[2] nq=$abc$109383$new_n53276_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[4] i1=$abc$109383$new_n15251_ i2=soc.cpu.minerva.payload__branch_predict_taken$110 nq=$abc$109383$new_n53277_
 .subckt buf_x4 i=$abc$109383$new_n15249_ q=$abc$109383$new_n53278_
 .subckt buf_x4 i=soc.cpu.minerva.payload__branch_taken q=$abc$109383$new_n53279_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[4] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53280_
-.subckt a2_x2 i0=$abc$109383$new_n53280_ i1=$abc$109383$new_n53277_ q=$abc$109383$new_n53281_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53281_ i1=$abc$109383$new_n53276_ q=$abc$109383$new_n53282_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53282_ i1=$abc$109383$new_n53275_ q=$abc$109383$new_n53283_
+.subckt and2_x1 i0=$abc$109383$new_n53280_ i1=$abc$109383$new_n53277_ q=$abc$109383$new_n53281_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53281_ i1=$abc$109383$new_n53276_ q=$abc$109383$new_n53282_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53282_ i1=$abc$109383$new_n53275_ q=$abc$109383$new_n53283_
 .subckt nor2_x0 i0=$abc$109383$new_n53283_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53284_
 .subckt nand4_x0 i0=$abc$109383$new_n15258_ i1=$abc$109383$new_n30154_ i2=soc.cpu.minerva.payload__fence_i i3=$abc$109383$new_n29192_ nq=$abc$109383$new_n53285_
-.subckt a2_x2 i0=$abc$109383$new_n53285_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53286_
-.subckt a3_x2 i0=$abc$109383$new_n15258_ i1=soc.cpu.minerva.payload__fence_i i2=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n53287_
+.subckt and2_x1 i0=$abc$109383$new_n53285_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53286_
+.subckt and3_x1 i0=$abc$109383$new_n15258_ i1=soc.cpu.minerva.payload__fence_i i2=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n53287_
 .subckt buf_x4 i=$abc$109383$new_n53287_ q=$abc$109383$new_n53288_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[4] nq=$abc$109383$new_n53289_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__pc$25[3] i1=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n53290_
-.subckt nxr2_x1 i0=$abc$109383$new_n53290_ i1=$abc$109383$new_n53289_ nq=$abc$109383$new_n53291_
-.subckt oa22_x2 i0=$abc$109383$new_n53291_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53292_
-.subckt a4_x2 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[10] i2=$abc$109383$new_n15264_ i3=soc.cpu.minerva.payload__instruction$28[5] q=$abc$109383$new_n53293_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[3] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n53293_ q=$abc$109383$new_n53294_
-.subckt a2_x2 i0=$abc$109383$new_n53294_ i1=soc.cpu.minerva.payload__pc$27[3] q=$abc$109383$new_n53295_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__pc$25[3] i1=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n53290_
+.subckt nexor2_x0 i0=$abc$109383$new_n53290_ i1=$abc$109383$new_n53289_ nq=$abc$109383$new_n53291_
+.subckt or21nand_x1 i0=$abc$109383$new_n53291_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53292_
+.subckt and4_x1 i0=$abc$109383$new_n15273_ i1=soc.cpu.minerva.payload__instruction$28[10] i2=$abc$109383$new_n15264_ i3=soc.cpu.minerva.payload__instruction$28[5] q=$abc$109383$new_n53293_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[3] i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n53293_ nq=$abc$109383$new_n53294_
+.subckt and2_x1 i0=$abc$109383$new_n53294_ i1=soc.cpu.minerva.payload__pc$27[3] q=$abc$109383$new_n53295_
 .subckt nand2_x0 i0=$abc$109383$new_n15339_ i1=$abc$109383$new_n30145_ nq=$abc$109383$new_n53296_
-.subckt a2_x2 i0=$abc$109383$new_n53262_ i1=soc.cpu.minerva.payload__pc$27[2] q=$abc$109383$new_n53297_
-.subckt oa22_x2 i0=$abc$109383$new_n53297_ i1=$abc$109383$new_n53296_ i2=$abc$109383$new_n53295_ q=$abc$109383$new_n53298_
-.subckt nxr2_x1 i0=$abc$109383$new_n15319_ i1=soc.cpu.minerva.payload__pc$27[4] nq=$abc$109383$new_n53299_
-.subckt nxr2_x1 i0=$abc$109383$new_n53299_ i1=$abc$109383$new_n53298_ nq=$abc$109383$new_n53300_
+.subckt and2_x1 i0=$abc$109383$new_n53262_ i1=soc.cpu.minerva.payload__pc$27[2] q=$abc$109383$new_n53297_
+.subckt or21nand_x1 i0=$abc$109383$new_n53297_ i1=$abc$109383$new_n53296_ i2=$abc$109383$new_n53295_ nq=$abc$109383$new_n53298_
+.subckt nexor2_x0 i0=$abc$109383$new_n15319_ i1=soc.cpu.minerva.payload__pc$27[4] nq=$abc$109383$new_n53299_
+.subckt nexor2_x0 i0=$abc$109383$new_n53299_ i1=$abc$109383$new_n53298_ nq=$abc$109383$new_n53300_
 .subckt nor2_x0 i0=$abc$109383$new_n53300_ i1=$abc$109383$new_n52732_ nq=$abc$109383$new_n53301_
-.subckt ao22_x2 i0=$abc$109383$new_n53301_ i1=$abc$109383$new_n53292_ i2=$abc$109383$new_n53286_ q=$abc$109383$new_n53302_
-.subckt o2_x2 i0=$abc$109383$new_n53302_ i1=$abc$109383$new_n53284_ q=$abc$109383$new_n53303_
-.subckt a3_x2 i0=$abc$109383$new_n53303_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n53304_
-.subckt ao22_x2 i0=$abc$109383$new_n53304_ i1=$abc$109383$new_n53274_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104060
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[3] q=$abc$109383$new_n53306_
+.subckt and21nor_x1 i0=$abc$109383$new_n53301_ i1=$abc$109383$new_n53292_ i2=$abc$109383$new_n53286_ nq=$abc$109383$new_n53302_
+.subckt or2_x1 i0=$abc$109383$new_n53302_ i1=$abc$109383$new_n53284_ q=$abc$109383$new_n53303_
+.subckt and3_x1 i0=$abc$109383$new_n53303_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n53304_
+.subckt and21nor_x1 i0=$abc$109383$new_n53304_ i1=$abc$109383$new_n53274_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104060
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[3] nq=$abc$109383$new_n53306_
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n53307_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[5] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53308_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[5] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53309_
 .subckt nand2_x0 i0=$abc$109383$new_n53309_ i1=$abc$109383$new_n53308_ nq=$abc$109383$new_n53310_
-.subckt mx2_x2 cmd=$abc$109383$new_n53224_ i0=$abc$109383$new_n53310_ i1=soc.cpu.minerva.exception.mepc__r__base[3] q=$abc$109383$new_n53311_
+.subckt mux2_x1 cmd=$abc$109383$new_n53224_ i0=$abc$109383$new_n53310_ i1=soc.cpu.minerva.exception.mepc__r__base[3] q=$abc$109383$new_n53311_
 .subckt buf_x4 i=$abc$109383$new_n53227_ q=$abc$109383$new_n53312_
-.subckt mx2_x2 cmd=$abc$109383$new_n53312_ i0=$abc$109383$new_n53311_ i1=soc.cpu.minerva.exception.mtvec__r__base[3] q=$abc$109383$new_n53313_
+.subckt mux2_x1 cmd=$abc$109383$new_n53312_ i0=$abc$109383$new_n53311_ i1=soc.cpu.minerva.exception.mtvec__r__base[3] q=$abc$109383$new_n53313_
 .subckt nand2_x0 i0=$abc$109383$new_n53313_ i1=$abc$109383$new_n53213_ nq=$abc$109383$new_n53314_
 .subckt buf_x4 i=$abc$109383$new_n29192_ q=$abc$109383$new_n53315_
 .subckt buf_x4 i=soc.cpu.minerva.payload__fence_i q=$abc$109383$new_n53316_
@@ -38592,64 +38592,64 @@
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n30159_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53318_
 .subckt nand2_x0 i0=$abc$109383$new_n53318_ i1=$abc$109383$new_n53256_ nq=$abc$109383$new_n53319_
 .subckt buf_x4 i=$abc$109383$new_n53259_ q=$abc$109383$new_n53320_
-.subckt a3_x2 i0=soc.cpu.minerva.payload__pc$25[4] i1=soc.cpu.minerva.payload__pc$25[3] i2=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n53321_
-.subckt nxr2_x1 i0=$abc$109383$new_n53321_ i1=soc.cpu.minerva.payload__pc$25[5] nq=$abc$109383$new_n53322_
-.subckt ao22_x2 i0=$abc$109383$new_n53322_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53323_
-.subckt a2_x2 i0=$abc$109383$new_n15313_ i1=soc.cpu.minerva.payload__pc$27[4] q=$abc$109383$new_n53324_
+.subckt and3_x1 i0=soc.cpu.minerva.payload__pc$25[4] i1=soc.cpu.minerva.payload__pc$25[3] i2=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n53321_
+.subckt nexor2_x0 i0=$abc$109383$new_n53321_ i1=soc.cpu.minerva.payload__pc$25[5] nq=$abc$109383$new_n53322_
+.subckt and21nor_x1 i0=$abc$109383$new_n53322_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53323_
+.subckt and2_x1 i0=$abc$109383$new_n15313_ i1=soc.cpu.minerva.payload__pc$27[4] q=$abc$109383$new_n53324_
 .subckt nand2_x0 i0=$abc$109383$new_n15319_ i1=$abc$109383$new_n30154_ nq=$abc$109383$new_n53325_
-.subckt oa22_x2 i0=$abc$109383$new_n53298_ i1=$abc$109383$new_n53325_ i2=$abc$109383$new_n53324_ q=$abc$109383$new_n53326_
-.subckt nxr2_x1 i0=$abc$109383$new_n15459_ i1=$abc$109383$new_n30159_ nq=$abc$109383$new_n53327_
-.subckt nxr2_x1 i0=$abc$109383$new_n53327_ i1=$abc$109383$new_n53326_ nq=$abc$109383$new_n53328_
-.subckt o2_x2 i0=$abc$109383$new_n53328_ i1=$abc$109383$new_n52732_ q=$abc$109383$new_n53329_
-.subckt oa22_x2 i0=$abc$109383$new_n53329_ i1=$abc$109383$new_n53323_ i2=$abc$109383$new_n53319_ q=$abc$109383$new_n53330_
+.subckt or21nand_x1 i0=$abc$109383$new_n53298_ i1=$abc$109383$new_n53325_ i2=$abc$109383$new_n53324_ nq=$abc$109383$new_n53326_
+.subckt nexor2_x0 i0=$abc$109383$new_n15459_ i1=$abc$109383$new_n30159_ nq=$abc$109383$new_n53327_
+.subckt nexor2_x0 i0=$abc$109383$new_n53327_ i1=$abc$109383$new_n53326_ nq=$abc$109383$new_n53328_
+.subckt or2_x1 i0=$abc$109383$new_n53328_ i1=$abc$109383$new_n52732_ q=$abc$109383$new_n53329_
+.subckt or21nand_x1 i0=$abc$109383$new_n53329_ i1=$abc$109383$new_n53323_ i2=$abc$109383$new_n53319_ nq=$abc$109383$new_n53330_
 .subckt nand2_x0 i0=$abc$109383$new_n53330_ i1=$abc$109383$new_n53314_ nq=$abc$109383$new_n53331_
-.subckt a3_x2 i0=$abc$109383$new_n53331_ i1=$abc$109383$new_n53307_ i2=$abc$109383$new_n40103_ q=$abc$109383$new_n53332_
-.subckt ao22_x2 i0=$abc$109383$new_n53332_ i1=$abc$109383$new_n53306_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104064
+.subckt and3_x1 i0=$abc$109383$new_n53331_ i1=$abc$109383$new_n53307_ i2=$abc$109383$new_n40103_ q=$abc$109383$new_n53332_
+.subckt and21nor_x1 i0=$abc$109383$new_n53332_ i1=$abc$109383$new_n53306_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104064
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[6] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53334_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[6] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53335_
 .subckt nand2_x0 i0=$abc$109383$new_n53335_ i1=$abc$109383$new_n53334_ nq=$abc$109383$new_n53336_
-.subckt mx2_x2 cmd=$abc$109383$new_n53224_ i0=$abc$109383$new_n53336_ i1=soc.cpu.minerva.exception.mepc__r__base[4] q=$abc$109383$new_n53337_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53337_ i1=soc.cpu.minerva.exception.mtvec__r__base[4] q=$abc$109383$new_n53338_
+.subckt mux2_x1 cmd=$abc$109383$new_n53224_ i0=$abc$109383$new_n53336_ i1=soc.cpu.minerva.exception.mepc__r__base[4] q=$abc$109383$new_n53337_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53337_ i1=soc.cpu.minerva.exception.mtvec__r__base[4] q=$abc$109383$new_n53338_
 .subckt nand2_x0 i0=$abc$109383$new_n53338_ i1=$abc$109383$new_n53213_ nq=$abc$109383$new_n53339_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n30163_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53340_
 .subckt nand2_x0 i0=$abc$109383$new_n53340_ i1=$abc$109383$new_n53256_ nq=$abc$109383$new_n53341_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__pc$25[5] i1=soc.cpu.minerva.payload__pc$25[4] i2=soc.cpu.minerva.payload__pc$25[3] i3=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n53342_
-.subckt nxr2_x1 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[6] nq=$abc$109383$new_n53343_
-.subckt ao22_x2 i0=$abc$109383$new_n53343_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53344_
-.subckt nxr2_x1 i0=$abc$109383$new_n15307_ i1=soc.cpu.minerva.payload__pc$27[6] nq=$abc$109383$new_n53345_
-.subckt oa22_x2 i0=$abc$109383$new_n15321_ i1=$abc$109383$new_n15283_ i2=soc.cpu.minerva.payload__pc$27[5] q=$abc$109383$new_n53346_
-.subckt a3_x2 i0=$abc$109383$new_n15283_ i1=soc.cpu.minerva.payload__pc$27[5] i2=soc.cpu.minerva.csrf_rp__addr[5] q=$abc$109383$new_n53347_
-.subckt ao22_x2 i0=$abc$109383$new_n53326_ i1=$abc$109383$new_n53347_ i2=$abc$109383$new_n53346_ q=$abc$109383$new_n53348_
-.subckt nxr2_x1 i0=$abc$109383$new_n53348_ i1=$abc$109383$new_n53345_ nq=$abc$109383$new_n53349_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__pc$25[5] i1=soc.cpu.minerva.payload__pc$25[4] i2=soc.cpu.minerva.payload__pc$25[3] i3=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n53342_
+.subckt nexor2_x0 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[6] nq=$abc$109383$new_n53343_
+.subckt and21nor_x1 i0=$abc$109383$new_n53343_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53344_
+.subckt nexor2_x0 i0=$abc$109383$new_n15307_ i1=soc.cpu.minerva.payload__pc$27[6] nq=$abc$109383$new_n53345_
+.subckt or21nand_x1 i0=$abc$109383$new_n15321_ i1=$abc$109383$new_n15283_ i2=soc.cpu.minerva.payload__pc$27[5] nq=$abc$109383$new_n53346_
+.subckt and3_x1 i0=$abc$109383$new_n15283_ i1=soc.cpu.minerva.payload__pc$27[5] i2=soc.cpu.minerva.csrf_rp__addr[5] q=$abc$109383$new_n53347_
+.subckt and21nor_x1 i0=$abc$109383$new_n53326_ i1=$abc$109383$new_n53347_ i2=$abc$109383$new_n53346_ nq=$abc$109383$new_n53348_
+.subckt nexor2_x0 i0=$abc$109383$new_n53348_ i1=$abc$109383$new_n53345_ nq=$abc$109383$new_n53349_
 .subckt nand2_x0 i0=$abc$109383$new_n53349_ i1=$abc$109383$new_n53260_ nq=$abc$109383$new_n53350_
-.subckt oa22_x2 i0=$abc$109383$new_n53350_ i1=$abc$109383$new_n53344_ i2=$abc$109383$new_n53341_ q=$abc$109383$new_n53351_
+.subckt or21nand_x1 i0=$abc$109383$new_n53350_ i1=$abc$109383$new_n53344_ i2=$abc$109383$new_n53341_ nq=$abc$109383$new_n53351_
 .subckt nand2_x0 i0=$abc$109383$new_n53351_ i1=$abc$109383$new_n53339_ nq=$abc$109383$new_n53352_
 .subckt buf_x4 i=$abc$109383$new_n15514_ q=$abc$109383$new_n53353_
 .subckt buf_x4 i=$abc$109383$new_n53353_ q=$abc$109383$new_n53354_
-.subckt mx2_x2 cmd=$abc$109383$new_n53354_ i0=$abc$109383$new_n53352_ i1=soc.cpu.minerva.fetch.ibus__adr[4] q=$abc$109383$new_n53355_
-.subckt a2_x2 i0=$abc$109383$new_n53355_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104068
+.subckt mux2_x1 cmd=$abc$109383$new_n53354_ i0=$abc$109383$new_n53352_ i1=soc.cpu.minerva.fetch.ibus__adr[4] q=$abc$109383$new_n53355_
+.subckt and2_x1 i0=$abc$109383$new_n53355_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104068
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[7] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53357_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[7] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53358_
 .subckt nand2_x0 i0=$abc$109383$new_n53358_ i1=$abc$109383$new_n53357_ nq=$abc$109383$new_n53359_
-.subckt mx2_x2 cmd=$abc$109383$new_n53224_ i0=$abc$109383$new_n53359_ i1=soc.cpu.minerva.exception.mepc__r__base[5] q=$abc$109383$new_n53360_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53360_ i1=soc.cpu.minerva.exception.mtvec__r__base[5] q=$abc$109383$new_n53361_
+.subckt mux2_x1 cmd=$abc$109383$new_n53224_ i0=$abc$109383$new_n53359_ i1=soc.cpu.minerva.exception.mepc__r__base[5] q=$abc$109383$new_n53360_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53360_ i1=soc.cpu.minerva.exception.mtvec__r__base[5] q=$abc$109383$new_n53361_
 .subckt nand2_x0 i0=$abc$109383$new_n53361_ i1=$abc$109383$new_n53213_ nq=$abc$109383$new_n53362_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n30167_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53363_
 .subckt nand2_x0 i0=$abc$109383$new_n53363_ i1=$abc$109383$new_n53256_ nq=$abc$109383$new_n53364_
-.subckt a2_x2 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n53365_
-.subckt nxr2_x1 i0=$abc$109383$new_n53365_ i1=soc.cpu.minerva.payload__pc$25[7] nq=$abc$109383$new_n53366_
-.subckt ao22_x2 i0=$abc$109383$new_n53366_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53367_
-.subckt a3_x2 i0=$abc$109383$new_n15283_ i1=soc.cpu.minerva.payload__pc$27[6] i2=soc.cpu.minerva.csrf_rp__addr[6] q=$abc$109383$new_n53368_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[6] i1=$abc$109383$new_n15283_ i2=soc.cpu.minerva.payload__pc$27[6] q=$abc$109383$new_n53369_
-.subckt oa22_x2 i0=$abc$109383$new_n53369_ i1=$abc$109383$new_n53348_ i2=$abc$109383$new_n53368_ q=$abc$109383$new_n53370_
-.subckt nxr2_x1 i0=$abc$109383$new_n15305_ i1=soc.cpu.minerva.payload__pc$27[7] nq=$abc$109383$new_n53371_
-.subckt nxr2_x1 i0=$abc$109383$new_n53371_ i1=$abc$109383$new_n53370_ nq=$abc$109383$new_n53372_
+.subckt and2_x1 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n53365_
+.subckt nexor2_x0 i0=$abc$109383$new_n53365_ i1=soc.cpu.minerva.payload__pc$25[7] nq=$abc$109383$new_n53366_
+.subckt and21nor_x1 i0=$abc$109383$new_n53366_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53367_
+.subckt and3_x1 i0=$abc$109383$new_n15283_ i1=soc.cpu.minerva.payload__pc$27[6] i2=soc.cpu.minerva.csrf_rp__addr[6] q=$abc$109383$new_n53368_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[6] i1=$abc$109383$new_n15283_ i2=soc.cpu.minerva.payload__pc$27[6] nq=$abc$109383$new_n53369_
+.subckt or21nand_x1 i0=$abc$109383$new_n53369_ i1=$abc$109383$new_n53348_ i2=$abc$109383$new_n53368_ nq=$abc$109383$new_n53370_
+.subckt nexor2_x0 i0=$abc$109383$new_n15305_ i1=soc.cpu.minerva.payload__pc$27[7] nq=$abc$109383$new_n53371_
+.subckt nexor2_x0 i0=$abc$109383$new_n53371_ i1=$abc$109383$new_n53370_ nq=$abc$109383$new_n53372_
 .subckt nand2_x0 i0=$abc$109383$new_n53372_ i1=$abc$109383$new_n53260_ nq=$abc$109383$new_n53373_
-.subckt oa22_x2 i0=$abc$109383$new_n53373_ i1=$abc$109383$new_n53367_ i2=$abc$109383$new_n53364_ q=$abc$109383$new_n53374_
+.subckt or21nand_x1 i0=$abc$109383$new_n53373_ i1=$abc$109383$new_n53367_ i2=$abc$109383$new_n53364_ nq=$abc$109383$new_n53374_
 .subckt nand2_x0 i0=$abc$109383$new_n53374_ i1=$abc$109383$new_n53362_ nq=$abc$109383$new_n53375_
 .subckt buf_x4 i=$abc$109383$new_n53353_ q=$abc$109383$new_n53376_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53375_ i1=soc.cpu.minerva.fetch.ibus__adr[5] q=$abc$109383$new_n53377_
-.subckt a2_x2 i0=$abc$109383$new_n53377_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104072
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53375_ i1=soc.cpu.minerva.fetch.ibus__adr[5] q=$abc$109383$new_n53377_
+.subckt and2_x1 i0=$abc$109383$new_n53377_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104072
 .subckt buf_x4 i=$abc$109383$new_n53212_ q=$abc$109383$new_n53379_
 .subckt buf_x4 i=soc.cpu.minerva.payload__branch_predict_taken$110 q=$abc$109383$new_n53380_
 .subckt buf_x4 i=$abc$109383$new_n15251_ q=$abc$109383$new_n53381_
@@ -38659,1744 +38659,1744 @@
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[8] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53385_
 .subckt nand2_x0 i0=$abc$109383$new_n53385_ i1=$abc$109383$new_n53382_ nq=$abc$109383$new_n53386_
 .subckt buf_x4 i=soc.cpu.minerva.payload__mret$118 q=$abc$109383$new_n53387_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53386_ i1=soc.cpu.minerva.exception.mepc__r__base[6] q=$abc$109383$new_n53388_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53386_ i1=soc.cpu.minerva.exception.mepc__r__base[6] q=$abc$109383$new_n53388_
 .subckt buf_x4 i=$abc$109383$new_n53227_ q=$abc$109383$new_n53389_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53388_ i1=soc.cpu.minerva.exception.mtvec__r__base[6] q=$abc$109383$new_n53390_
-.subckt a2_x2 i0=$abc$109383$new_n53390_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53391_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53388_ i1=soc.cpu.minerva.exception.mtvec__r__base[6] q=$abc$109383$new_n53390_
+.subckt and2_x1 i0=$abc$109383$new_n53390_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53391_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[8] nq=$abc$109383$new_n53392_
-.subckt a3_x2 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[7] i2=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n53393_
-.subckt nxr2_x1 i0=$abc$109383$new_n53393_ i1=$abc$109383$new_n53392_ nq=$abc$109383$new_n53394_
-.subckt oa22_x2 i0=$abc$109383$new_n53394_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53395_
-.subckt a3_x2 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[7] i2=soc.cpu.minerva.csrf_rp__addr[7] q=$abc$109383$new_n53396_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[7] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[7] q=$abc$109383$new_n53397_
-.subckt oa22_x2 i0=$abc$109383$new_n53370_ i1=$abc$109383$new_n53397_ i2=$abc$109383$new_n53396_ q=$abc$109383$new_n53398_
-.subckt nxr2_x1 i0=$abc$109383$new_n15393_ i1=soc.cpu.minerva.payload__pc$27[8] nq=$abc$109383$new_n53399_
-.subckt nxr2_x1 i0=$abc$109383$new_n53399_ i1=$abc$109383$new_n53398_ nq=$abc$109383$new_n53400_
-.subckt oa22_x2 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53400_ i2=$abc$109383$new_n53395_ q=$abc$109383$new_n53401_
+.subckt and3_x1 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[7] i2=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n53393_
+.subckt nexor2_x0 i0=$abc$109383$new_n53393_ i1=$abc$109383$new_n53392_ nq=$abc$109383$new_n53394_
+.subckt or21nand_x1 i0=$abc$109383$new_n53394_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53395_
+.subckt and3_x1 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[7] i2=soc.cpu.minerva.csrf_rp__addr[7] q=$abc$109383$new_n53396_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[7] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[7] nq=$abc$109383$new_n53397_
+.subckt or21nand_x1 i0=$abc$109383$new_n53370_ i1=$abc$109383$new_n53397_ i2=$abc$109383$new_n53396_ nq=$abc$109383$new_n53398_
+.subckt nexor2_x0 i0=$abc$109383$new_n15393_ i1=soc.cpu.minerva.payload__pc$27[8] nq=$abc$109383$new_n53399_
+.subckt nexor2_x0 i0=$abc$109383$new_n53399_ i1=$abc$109383$new_n53398_ nq=$abc$109383$new_n53400_
+.subckt or21nand_x1 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53400_ i2=$abc$109383$new_n53395_ nq=$abc$109383$new_n53401_
 .subckt buf_x4 i=$abc$109383$new_n15255_ q=$abc$109383$new_n53402_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n30171_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53403_
-.subckt a2_x2 i0=$abc$109383$new_n53403_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53404_
-.subckt oa22_x2 i0=$abc$109383$new_n53404_ i1=$abc$109383$new_n53401_ i2=$abc$109383$new_n53391_ q=$abc$109383$new_n53405_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53405_ i1=soc.cpu.minerva.fetch.ibus__adr[6] q=$abc$109383$new_n53406_
-.subckt a2_x2 i0=$abc$109383$new_n53406_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104076
+.subckt and2_x1 i0=$abc$109383$new_n53403_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53404_
+.subckt or21nand_x1 i0=$abc$109383$new_n53404_ i1=$abc$109383$new_n53401_ i2=$abc$109383$new_n53391_ nq=$abc$109383$new_n53405_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53405_ i1=soc.cpu.minerva.fetch.ibus__adr[6] q=$abc$109383$new_n53406_
+.subckt and2_x1 i0=$abc$109383$new_n53406_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104076
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[9] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53408_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[9] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53409_
 .subckt nand2_x0 i0=$abc$109383$new_n53409_ i1=$abc$109383$new_n53408_ nq=$abc$109383$new_n53410_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53410_ i1=soc.cpu.minerva.exception.mepc__r__base[7] q=$abc$109383$new_n53411_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53411_ i1=soc.cpu.minerva.exception.mtvec__r__base[7] q=$abc$109383$new_n53412_
-.subckt a2_x2 i0=$abc$109383$new_n53412_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53413_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53410_ i1=soc.cpu.minerva.exception.mepc__r__base[7] q=$abc$109383$new_n53411_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53411_ i1=soc.cpu.minerva.exception.mtvec__r__base[7] q=$abc$109383$new_n53412_
+.subckt and2_x1 i0=$abc$109383$new_n53412_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53413_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[9] nq=$abc$109383$new_n53414_
-.subckt a4_x2 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[8] i2=soc.cpu.minerva.payload__pc$25[7] i3=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n53415_
-.subckt nxr2_x1 i0=$abc$109383$new_n53415_ i1=$abc$109383$new_n53414_ nq=$abc$109383$new_n53416_
-.subckt oa22_x2 i0=$abc$109383$new_n53416_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53417_
-.subckt a3_x2 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[8] i2=soc.cpu.minerva.csrf_rp__addr[8] q=$abc$109383$new_n53418_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[8] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[8] q=$abc$109383$new_n53419_
-.subckt oa22_x2 i0=$abc$109383$new_n53398_ i1=$abc$109383$new_n53419_ i2=$abc$109383$new_n53418_ q=$abc$109383$new_n53420_
-.subckt nxr2_x1 i0=$abc$109383$new_n15286_ i1=soc.cpu.minerva.payload__pc$27[9] nq=$abc$109383$new_n53421_
-.subckt nxr2_x1 i0=$abc$109383$new_n53421_ i1=$abc$109383$new_n53420_ nq=$abc$109383$new_n53422_
-.subckt oa22_x2 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53422_ i2=$abc$109383$new_n53417_ q=$abc$109383$new_n53423_
+.subckt and4_x1 i0=$abc$109383$new_n53342_ i1=soc.cpu.minerva.payload__pc$25[8] i2=soc.cpu.minerva.payload__pc$25[7] i3=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n53415_
+.subckt nexor2_x0 i0=$abc$109383$new_n53415_ i1=$abc$109383$new_n53414_ nq=$abc$109383$new_n53416_
+.subckt or21nand_x1 i0=$abc$109383$new_n53416_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53417_
+.subckt and3_x1 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[8] i2=soc.cpu.minerva.csrf_rp__addr[8] q=$abc$109383$new_n53418_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[8] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[8] nq=$abc$109383$new_n53419_
+.subckt or21nand_x1 i0=$abc$109383$new_n53398_ i1=$abc$109383$new_n53419_ i2=$abc$109383$new_n53418_ nq=$abc$109383$new_n53420_
+.subckt nexor2_x0 i0=$abc$109383$new_n15286_ i1=soc.cpu.minerva.payload__pc$27[9] nq=$abc$109383$new_n53421_
+.subckt nexor2_x0 i0=$abc$109383$new_n53421_ i1=$abc$109383$new_n53420_ nq=$abc$109383$new_n53422_
+.subckt or21nand_x1 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53422_ i2=$abc$109383$new_n53417_ nq=$abc$109383$new_n53423_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n30176_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53424_
-.subckt a2_x2 i0=$abc$109383$new_n53424_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53425_
-.subckt oa22_x2 i0=$abc$109383$new_n53425_ i1=$abc$109383$new_n53423_ i2=$abc$109383$new_n53413_ q=$abc$109383$new_n53426_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53426_ i1=soc.cpu.minerva.fetch.ibus__adr[7] q=$abc$109383$new_n53427_
-.subckt a2_x2 i0=$abc$109383$new_n53427_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104080
+.subckt and2_x1 i0=$abc$109383$new_n53424_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53425_
+.subckt or21nand_x1 i0=$abc$109383$new_n53425_ i1=$abc$109383$new_n53423_ i2=$abc$109383$new_n53413_ nq=$abc$109383$new_n53426_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53426_ i1=soc.cpu.minerva.fetch.ibus__adr[7] q=$abc$109383$new_n53427_
+.subckt and2_x1 i0=$abc$109383$new_n53427_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104080
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[10] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53429_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[10] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53430_
 .subckt nand2_x0 i0=$abc$109383$new_n53430_ i1=$abc$109383$new_n53429_ nq=$abc$109383$new_n53431_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53431_ i1=soc.cpu.minerva.exception.mepc__r__base[8] q=$abc$109383$new_n53432_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53432_ i1=soc.cpu.minerva.exception.mtvec__r__base[8] q=$abc$109383$new_n53433_
-.subckt a2_x2 i0=$abc$109383$new_n53433_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53434_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53431_ i1=soc.cpu.minerva.exception.mepc__r__base[8] q=$abc$109383$new_n53432_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53432_ i1=soc.cpu.minerva.exception.mtvec__r__base[8] q=$abc$109383$new_n53433_
+.subckt and2_x1 i0=$abc$109383$new_n53433_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53434_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[10] nq=$abc$109383$new_n53435_
-.subckt a2_x2 i0=$abc$109383$new_n53415_ i1=soc.cpu.minerva.payload__pc$25[9] q=$abc$109383$new_n53436_
-.subckt nxr2_x1 i0=$abc$109383$new_n53436_ i1=$abc$109383$new_n53435_ nq=$abc$109383$new_n53437_
-.subckt oa22_x2 i0=$abc$109383$new_n53437_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53438_
-.subckt nxr2_x1 i0=$abc$109383$new_n15395_ i1=soc.cpu.minerva.payload__pc$27[10] nq=$abc$109383$new_n53439_
-.subckt a3_x2 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[9] i2=soc.cpu.minerva.csrf_rp__addr[9] q=$abc$109383$new_n53440_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[9] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[9] q=$abc$109383$new_n53441_
-.subckt oa22_x2 i0=$abc$109383$new_n53420_ i1=$abc$109383$new_n53441_ i2=$abc$109383$new_n53440_ q=$abc$109383$new_n53442_
-.subckt nxr2_x1 i0=$abc$109383$new_n53442_ i1=$abc$109383$new_n53439_ nq=$abc$109383$new_n53443_
-.subckt oa22_x2 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53443_ i2=$abc$109383$new_n53438_ q=$abc$109383$new_n53444_
+.subckt and2_x1 i0=$abc$109383$new_n53415_ i1=soc.cpu.minerva.payload__pc$25[9] q=$abc$109383$new_n53436_
+.subckt nexor2_x0 i0=$abc$109383$new_n53436_ i1=$abc$109383$new_n53435_ nq=$abc$109383$new_n53437_
+.subckt or21nand_x1 i0=$abc$109383$new_n53437_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53438_
+.subckt nexor2_x0 i0=$abc$109383$new_n15395_ i1=soc.cpu.minerva.payload__pc$27[10] nq=$abc$109383$new_n53439_
+.subckt and3_x1 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[9] i2=soc.cpu.minerva.csrf_rp__addr[9] q=$abc$109383$new_n53440_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[9] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[9] nq=$abc$109383$new_n53441_
+.subckt or21nand_x1 i0=$abc$109383$new_n53420_ i1=$abc$109383$new_n53441_ i2=$abc$109383$new_n53440_ nq=$abc$109383$new_n53442_
+.subckt nexor2_x0 i0=$abc$109383$new_n53442_ i1=$abc$109383$new_n53439_ nq=$abc$109383$new_n53443_
+.subckt or21nand_x1 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53443_ i2=$abc$109383$new_n53438_ nq=$abc$109383$new_n53444_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n30180_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53445_
-.subckt a2_x2 i0=$abc$109383$new_n53445_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53446_
-.subckt oa22_x2 i0=$abc$109383$new_n53446_ i1=$abc$109383$new_n53444_ i2=$abc$109383$new_n53434_ q=$abc$109383$new_n53447_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53447_ i1=soc.cpu.minerva.fetch.ibus__adr[8] q=$abc$109383$new_n53448_
-.subckt a2_x2 i0=$abc$109383$new_n53448_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104084
+.subckt and2_x1 i0=$abc$109383$new_n53445_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53446_
+.subckt or21nand_x1 i0=$abc$109383$new_n53446_ i1=$abc$109383$new_n53444_ i2=$abc$109383$new_n53434_ nq=$abc$109383$new_n53447_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53447_ i1=soc.cpu.minerva.fetch.ibus__adr[8] q=$abc$109383$new_n53448_
+.subckt and2_x1 i0=$abc$109383$new_n53448_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104084
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[11] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53450_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[11] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53451_
 .subckt nand2_x0 i0=$abc$109383$new_n53451_ i1=$abc$109383$new_n53450_ nq=$abc$109383$new_n53452_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53452_ i1=soc.cpu.minerva.exception.mepc__r__base[9] q=$abc$109383$new_n53453_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53453_ i1=soc.cpu.minerva.exception.mtvec__r__base[9] q=$abc$109383$new_n53454_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53452_ i1=soc.cpu.minerva.exception.mepc__r__base[9] q=$abc$109383$new_n53453_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53453_ i1=soc.cpu.minerva.exception.mtvec__r__base[9] q=$abc$109383$new_n53454_
 .subckt nand2_x0 i0=$abc$109383$new_n53454_ i1=$abc$109383$new_n53213_ nq=$abc$109383$new_n53455_
-.subckt a3_x2 i0=$abc$109383$new_n53415_ i1=soc.cpu.minerva.payload__pc$25[10] i2=soc.cpu.minerva.payload__pc$25[9] q=$abc$109383$new_n53456_
-.subckt nxr2_x1 i0=$abc$109383$new_n53456_ i1=soc.cpu.minerva.payload__pc$25[11] nq=$abc$109383$new_n53457_
-.subckt ao22_x2 i0=$abc$109383$new_n53457_ i1=$abc$109383$new_n53259_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53458_
-.subckt a3_x2 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[10] i2=soc.cpu.minerva.csrf_rp__addr[10] q=$abc$109383$new_n53459_
-.subckt oa22_x2 i0=soc.cpu.minerva.csrf_rp__addr[10] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[10] q=$abc$109383$new_n53460_
-.subckt oa22_x2 i0=$abc$109383$new_n53460_ i1=$abc$109383$new_n53442_ i2=$abc$109383$new_n53459_ q=$abc$109383$new_n53461_
-.subckt nxr2_x1 i0=$abc$109383$new_n15303_ i1=soc.cpu.minerva.payload__pc$27[11] nq=$abc$109383$new_n53462_
-.subckt nxr2_x1 i0=$abc$109383$new_n53462_ i1=$abc$109383$new_n53461_ nq=$abc$109383$new_n53463_
-.subckt ao22_x2 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53463_ i2=$abc$109383$new_n53458_ q=$abc$109383$new_n53464_
+.subckt and3_x1 i0=$abc$109383$new_n53415_ i1=soc.cpu.minerva.payload__pc$25[10] i2=soc.cpu.minerva.payload__pc$25[9] q=$abc$109383$new_n53456_
+.subckt nexor2_x0 i0=$abc$109383$new_n53456_ i1=soc.cpu.minerva.payload__pc$25[11] nq=$abc$109383$new_n53457_
+.subckt and21nor_x1 i0=$abc$109383$new_n53457_ i1=$abc$109383$new_n53259_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53458_
+.subckt and3_x1 i0=$abc$109383$new_n15284_ i1=soc.cpu.minerva.payload__pc$27[10] i2=soc.cpu.minerva.csrf_rp__addr[10] q=$abc$109383$new_n53459_
+.subckt or21nand_x1 i0=soc.cpu.minerva.csrf_rp__addr[10] i1=$abc$109383$new_n15284_ i2=soc.cpu.minerva.payload__pc$27[10] nq=$abc$109383$new_n53460_
+.subckt or21nand_x1 i0=$abc$109383$new_n53460_ i1=$abc$109383$new_n53442_ i2=$abc$109383$new_n53459_ nq=$abc$109383$new_n53461_
+.subckt nexor2_x0 i0=$abc$109383$new_n15303_ i1=soc.cpu.minerva.payload__pc$27[11] nq=$abc$109383$new_n53462_
+.subckt nexor2_x0 i0=$abc$109383$new_n53462_ i1=$abc$109383$new_n53461_ nq=$abc$109383$new_n53463_
+.subckt and21nor_x1 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53463_ i2=$abc$109383$new_n53458_ nq=$abc$109383$new_n53464_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n30184_ i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53465_
 .subckt nand2_x0 i0=$abc$109383$new_n53465_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53466_
-.subckt ao22_x2 i0=$abc$109383$new_n53466_ i1=$abc$109383$new_n53464_ i2=$abc$109383$new_n53455_ q=$abc$109383$new_n53467_
-.subckt mx2_x2 cmd=$abc$109383$new_n53354_ i0=$abc$109383$new_n53467_ i1=$abc$109383$new_n14794_ q=$abc$109383$new_n53468_
+.subckt and21nor_x1 i0=$abc$109383$new_n53466_ i1=$abc$109383$new_n53464_ i2=$abc$109383$new_n53455_ nq=$abc$109383$new_n53467_
+.subckt mux2_x1 cmd=$abc$109383$new_n53354_ i0=$abc$109383$new_n53467_ i1=$abc$109383$new_n14794_ q=$abc$109383$new_n53468_
 .subckt nor2_x0 i0=$abc$109383$new_n53468_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104088
 .subckt inv_x0 i=soc.cpu.minerva.fetch.ibus__adr[10] nq=$abc$109383$new_n53470_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[12] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53471_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[12] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53472_
 .subckt nand2_x0 i0=$abc$109383$new_n53472_ i1=$abc$109383$new_n53471_ nq=$abc$109383$new_n53473_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53473_ i1=soc.cpu.minerva.exception.mepc__r__base[10] q=$abc$109383$new_n53474_
-.subckt mx2_x2 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53474_ i1=soc.cpu.minerva.exception.mtvec__r__base[10] q=$abc$109383$new_n53475_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53473_ i1=soc.cpu.minerva.exception.mepc__r__base[10] q=$abc$109383$new_n53474_
+.subckt mux2_x1 cmd=$abc$109383$new_n53228_ i0=$abc$109383$new_n53474_ i1=soc.cpu.minerva.exception.mtvec__r__base[10] q=$abc$109383$new_n53475_
 .subckt nand2_x0 i0=$abc$109383$new_n53475_ i1=$abc$109383$new_n53213_ nq=$abc$109383$new_n53476_
-.subckt a4_x2 i0=$abc$109383$new_n53415_ i1=soc.cpu.minerva.payload__pc$25[11] i2=soc.cpu.minerva.payload__pc$25[10] i3=soc.cpu.minerva.payload__pc$25[9] q=$abc$109383$new_n53477_
-.subckt nxr2_x1 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[12] nq=$abc$109383$new_n53478_
-.subckt ao22_x2 i0=$abc$109383$new_n53478_ i1=$abc$109383$new_n53259_ i2=$abc$109383$new_n15259_ q=$abc$109383$new_n53479_
+.subckt and4_x1 i0=$abc$109383$new_n53415_ i1=soc.cpu.minerva.payload__pc$25[11] i2=soc.cpu.minerva.payload__pc$25[10] i3=soc.cpu.minerva.payload__pc$25[9] q=$abc$109383$new_n53477_
+.subckt nexor2_x0 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[12] nq=$abc$109383$new_n53478_
+.subckt and21nor_x1 i0=$abc$109383$new_n53478_ i1=$abc$109383$new_n53259_ i2=$abc$109383$new_n15259_ nq=$abc$109383$new_n53479_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[12] nq=$abc$109383$new_n53480_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[12] q=$abc$109383$new_n53481_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53481_ q=$abc$109383$new_n53482_
-.subckt nxr2_x1 i0=$abc$109383$new_n53482_ i1=$abc$109383$new_n53480_ nq=$abc$109383$new_n53483_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[12] nq=$abc$109383$new_n53481_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53481_ nq=$abc$109383$new_n53482_
+.subckt nexor2_x0 i0=$abc$109383$new_n53482_ i1=$abc$109383$new_n53480_ nq=$abc$109383$new_n53483_
 .subckt nand3_x0 i0=$abc$109383$new_n15301_ i1=$abc$109383$new_n15299_ i2=$abc$109383$new_n15290_ nq=$abc$109383$new_n53484_
-.subckt a2_x2 i0=$abc$109383$new_n53484_ i1=soc.cpu.minerva.payload__pc$27[11] q=$abc$109383$new_n53485_
+.subckt and2_x1 i0=$abc$109383$new_n53484_ i1=soc.cpu.minerva.payload__pc$27[11] q=$abc$109383$new_n53485_
 .subckt nand4_x0 i0=$abc$109383$new_n15301_ i1=$abc$109383$new_n15299_ i2=$abc$109383$new_n15290_ i3=$abc$109383$new_n30184_ nq=$abc$109383$new_n53486_
-.subckt oa22_x2 i0=$abc$109383$new_n53461_ i1=$abc$109383$new_n53486_ i2=$abc$109383$new_n53485_ q=$abc$109383$new_n53487_
-.subckt nxr2_x1 i0=$abc$109383$new_n53487_ i1=$abc$109383$new_n53483_ nq=$abc$109383$new_n53488_
-.subckt ao22_x2 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53488_ i2=$abc$109383$new_n53479_ q=$abc$109383$new_n53489_
+.subckt or21nand_x1 i0=$abc$109383$new_n53461_ i1=$abc$109383$new_n53486_ i2=$abc$109383$new_n53485_ nq=$abc$109383$new_n53487_
+.subckt nexor2_x0 i0=$abc$109383$new_n53487_ i1=$abc$109383$new_n53483_ nq=$abc$109383$new_n53488_
+.subckt and21nor_x1 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53488_ i2=$abc$109383$new_n53479_ nq=$abc$109383$new_n53489_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n53480_ i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53490_
 .subckt nand2_x0 i0=$abc$109383$new_n53490_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53491_
-.subckt ao22_x2 i0=$abc$109383$new_n53491_ i1=$abc$109383$new_n53489_ i2=$abc$109383$new_n53476_ q=$abc$109383$new_n53492_
-.subckt mx2_x2 cmd=$abc$109383$new_n53354_ i0=$abc$109383$new_n53492_ i1=$abc$109383$new_n53470_ q=$abc$109383$new_n53493_
+.subckt and21nor_x1 i0=$abc$109383$new_n53491_ i1=$abc$109383$new_n53489_ i2=$abc$109383$new_n53476_ nq=$abc$109383$new_n53492_
+.subckt mux2_x1 cmd=$abc$109383$new_n53354_ i0=$abc$109383$new_n53492_ i1=$abc$109383$new_n53470_ q=$abc$109383$new_n53493_
 .subckt nor2_x0 i0=$abc$109383$new_n53493_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104092
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[13] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53495_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[13] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53496_
 .subckt nand2_x0 i0=$abc$109383$new_n53496_ i1=$abc$109383$new_n53495_ nq=$abc$109383$new_n53497_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53497_ i1=soc.cpu.minerva.exception.mepc__r__base[11] q=$abc$109383$new_n53498_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53498_ i1=soc.cpu.minerva.exception.mtvec__r__base[11] q=$abc$109383$new_n53499_
-.subckt a2_x2 i0=$abc$109383$new_n53499_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53500_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53497_ i1=soc.cpu.minerva.exception.mepc__r__base[11] q=$abc$109383$new_n53498_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53498_ i1=soc.cpu.minerva.exception.mtvec__r__base[11] q=$abc$109383$new_n53499_
+.subckt and2_x1 i0=$abc$109383$new_n53499_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53500_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[13] nq=$abc$109383$new_n53501_
-.subckt a2_x2 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[12] q=$abc$109383$new_n53502_
-.subckt nxr2_x1 i0=$abc$109383$new_n53502_ i1=$abc$109383$new_n53501_ nq=$abc$109383$new_n53503_
-.subckt oa22_x2 i0=$abc$109383$new_n53503_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53504_
-.subckt a2_x2 i0=$abc$109383$new_n53482_ i1=soc.cpu.minerva.payload__pc$27[12] q=$abc$109383$new_n53505_
+.subckt and2_x1 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[12] q=$abc$109383$new_n53502_
+.subckt nexor2_x0 i0=$abc$109383$new_n53502_ i1=$abc$109383$new_n53501_ nq=$abc$109383$new_n53503_
+.subckt or21nand_x1 i0=$abc$109383$new_n53503_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53504_
+.subckt and2_x1 i0=$abc$109383$new_n53482_ i1=soc.cpu.minerva.payload__pc$27[12] q=$abc$109383$new_n53505_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$28[12] nq=$abc$109383$new_n53506_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15267_ i2=$abc$109383$new_n53506_ q=$abc$109383$new_n53507_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15267_ i2=$abc$109383$new_n53506_ nq=$abc$109383$new_n53507_
 .subckt nand4_x0 i0=$abc$109383$new_n53507_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53480_ nq=$abc$109383$new_n53508_
-.subckt oa22_x2 i0=$abc$109383$new_n53508_ i1=$abc$109383$new_n53487_ i2=$abc$109383$new_n53505_ q=$abc$109383$new_n53509_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[13] q=$abc$109383$new_n53510_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53510_ q=$abc$109383$new_n53511_
-.subckt nxr2_x1 i0=$abc$109383$new_n53511_ i1=soc.cpu.minerva.payload__pc$27[13] nq=$abc$109383$new_n53512_
-.subckt nxr2_x1 i0=$abc$109383$new_n53512_ i1=$abc$109383$new_n53509_ nq=$abc$109383$new_n53513_
-.subckt oa22_x2 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53513_ i2=$abc$109383$new_n53504_ q=$abc$109383$new_n53514_
+.subckt or21nand_x1 i0=$abc$109383$new_n53508_ i1=$abc$109383$new_n53487_ i2=$abc$109383$new_n53505_ nq=$abc$109383$new_n53509_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[13] nq=$abc$109383$new_n53510_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53510_ nq=$abc$109383$new_n53511_
+.subckt nexor2_x0 i0=$abc$109383$new_n53511_ i1=soc.cpu.minerva.payload__pc$27[13] nq=$abc$109383$new_n53512_
+.subckt nexor2_x0 i0=$abc$109383$new_n53512_ i1=$abc$109383$new_n53509_ nq=$abc$109383$new_n53513_
+.subckt or21nand_x1 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53513_ i2=$abc$109383$new_n53504_ nq=$abc$109383$new_n53514_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[13] nq=$abc$109383$new_n53515_
 .subckt nand4_x0 i0=$abc$109383$new_n15258_ i1=$abc$109383$new_n53515_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n29192_ nq=$abc$109383$new_n53516_
-.subckt a2_x2 i0=$abc$109383$new_n53516_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53517_
-.subckt oa22_x2 i0=$abc$109383$new_n53517_ i1=$abc$109383$new_n53514_ i2=$abc$109383$new_n53500_ q=$abc$109383$new_n53518_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53518_ i1=soc.cpu.minerva.fetch.ibus__adr[11] q=$abc$109383$new_n53519_
-.subckt a2_x2 i0=$abc$109383$new_n53519_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104096
+.subckt and2_x1 i0=$abc$109383$new_n53516_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53517_
+.subckt or21nand_x1 i0=$abc$109383$new_n53517_ i1=$abc$109383$new_n53514_ i2=$abc$109383$new_n53500_ nq=$abc$109383$new_n53518_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53518_ i1=soc.cpu.minerva.fetch.ibus__adr[11] q=$abc$109383$new_n53519_
+.subckt and2_x1 i0=$abc$109383$new_n53519_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104096
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[14] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53521_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[14] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53522_
 .subckt nand2_x0 i0=$abc$109383$new_n53522_ i1=$abc$109383$new_n53521_ nq=$abc$109383$new_n53523_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53523_ i1=soc.cpu.minerva.exception.mepc__r__base[12] q=$abc$109383$new_n53524_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53524_ i1=soc.cpu.minerva.exception.mtvec__r__base[12] q=$abc$109383$new_n53525_
-.subckt a2_x2 i0=$abc$109383$new_n53525_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53526_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53523_ i1=soc.cpu.minerva.exception.mepc__r__base[12] q=$abc$109383$new_n53524_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53524_ i1=soc.cpu.minerva.exception.mtvec__r__base[12] q=$abc$109383$new_n53525_
+.subckt and2_x1 i0=$abc$109383$new_n53525_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53526_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[14] nq=$abc$109383$new_n53527_
-.subckt a3_x2 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[13] i2=soc.cpu.minerva.payload__pc$25[12] q=$abc$109383$new_n53528_
-.subckt nxr2_x1 i0=$abc$109383$new_n53528_ i1=$abc$109383$new_n53527_ nq=$abc$109383$new_n53529_
-.subckt oa22_x2 i0=$abc$109383$new_n53529_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53530_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[14] q=$abc$109383$new_n53531_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53531_ q=$abc$109383$new_n53532_
-.subckt nxr2_x1 i0=$abc$109383$new_n53532_ i1=soc.cpu.minerva.payload__pc$27[14] nq=$abc$109383$new_n53533_
-.subckt a2_x2 i0=$abc$109383$new_n53511_ i1=soc.cpu.minerva.payload__pc$27[13] q=$abc$109383$new_n53534_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n30290_ q=$abc$109383$new_n53535_
+.subckt and3_x1 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[13] i2=soc.cpu.minerva.payload__pc$25[12] q=$abc$109383$new_n53528_
+.subckt nexor2_x0 i0=$abc$109383$new_n53528_ i1=$abc$109383$new_n53527_ nq=$abc$109383$new_n53529_
+.subckt or21nand_x1 i0=$abc$109383$new_n53529_ i1=$abc$109383$new_n52732_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53530_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[14] nq=$abc$109383$new_n53531_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53531_ nq=$abc$109383$new_n53532_
+.subckt nexor2_x0 i0=$abc$109383$new_n53532_ i1=soc.cpu.minerva.payload__pc$27[14] nq=$abc$109383$new_n53533_
+.subckt and2_x1 i0=$abc$109383$new_n53511_ i1=soc.cpu.minerva.payload__pc$27[13] q=$abc$109383$new_n53534_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n30290_ nq=$abc$109383$new_n53535_
 .subckt nand4_x0 i0=$abc$109383$new_n53535_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53515_ nq=$abc$109383$new_n53536_
-.subckt oa22_x2 i0=$abc$109383$new_n53509_ i1=$abc$109383$new_n53536_ i2=$abc$109383$new_n53534_ q=$abc$109383$new_n53537_
-.subckt nxr2_x1 i0=$abc$109383$new_n53537_ i1=$abc$109383$new_n53533_ nq=$abc$109383$new_n53538_
-.subckt oa22_x2 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53538_ i2=$abc$109383$new_n53530_ q=$abc$109383$new_n53539_
+.subckt or21nand_x1 i0=$abc$109383$new_n53509_ i1=$abc$109383$new_n53536_ i2=$abc$109383$new_n53534_ nq=$abc$109383$new_n53537_
+.subckt nexor2_x0 i0=$abc$109383$new_n53537_ i1=$abc$109383$new_n53533_ nq=$abc$109383$new_n53538_
+.subckt or21nand_x1 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n53538_ i2=$abc$109383$new_n53530_ nq=$abc$109383$new_n53539_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[14] nq=$abc$109383$new_n53540_
 .subckt nand4_x0 i0=$abc$109383$new_n15258_ i1=$abc$109383$new_n53540_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n29192_ nq=$abc$109383$new_n53541_
-.subckt a2_x2 i0=$abc$109383$new_n53541_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53542_
-.subckt oa22_x2 i0=$abc$109383$new_n53542_ i1=$abc$109383$new_n53539_ i2=$abc$109383$new_n53526_ q=$abc$109383$new_n53543_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53543_ i1=soc.cpu.minerva.fetch.ibus__adr[12] q=$abc$109383$new_n53544_
-.subckt a2_x2 i0=$abc$109383$new_n53544_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104100
+.subckt and2_x1 i0=$abc$109383$new_n53541_ i1=$abc$109383$new_n15255_ q=$abc$109383$new_n53542_
+.subckt or21nand_x1 i0=$abc$109383$new_n53542_ i1=$abc$109383$new_n53539_ i2=$abc$109383$new_n53526_ nq=$abc$109383$new_n53543_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53543_ i1=soc.cpu.minerva.fetch.ibus__adr[12] q=$abc$109383$new_n53544_
+.subckt and2_x1 i0=$abc$109383$new_n53544_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104100
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[15] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53546_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[15] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53547_
 .subckt nand2_x0 i0=$abc$109383$new_n53547_ i1=$abc$109383$new_n53546_ nq=$abc$109383$new_n53548_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53548_ i1=soc.cpu.minerva.exception.mepc__r__base[13] q=$abc$109383$new_n53549_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53549_ i1=soc.cpu.minerva.exception.mtvec__r__base[13] q=$abc$109383$new_n53550_
-.subckt a2_x2 i0=$abc$109383$new_n53550_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53551_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53548_ i1=soc.cpu.minerva.exception.mepc__r__base[13] q=$abc$109383$new_n53549_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53549_ i1=soc.cpu.minerva.exception.mtvec__r__base[13] q=$abc$109383$new_n53550_
+.subckt and2_x1 i0=$abc$109383$new_n53550_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53551_
 .subckt buf_x4 i=soc.cpu.minerva.payload__fence_i q=$abc$109383$new_n53552_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[15] nq=$abc$109383$new_n53553_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n53553_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53554_
-.subckt a2_x2 i0=$abc$109383$new_n53554_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53555_
+.subckt and2_x1 i0=$abc$109383$new_n53554_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53555_
 .subckt buf_x4 i=$abc$109383$new_n53287_ q=$abc$109383$new_n53556_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[15] nq=$abc$109383$new_n53557_
-.subckt a4_x2 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[14] i2=soc.cpu.minerva.payload__pc$25[13] i3=soc.cpu.minerva.payload__pc$25[12] q=$abc$109383$new_n53558_
-.subckt nxr2_x1 i0=$abc$109383$new_n53558_ i1=$abc$109383$new_n53557_ nq=$abc$109383$new_n53559_
-.subckt oa22_x2 i0=$abc$109383$new_n53559_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53560_
-.subckt a2_x2 i0=$abc$109383$new_n53532_ i1=soc.cpu.minerva.payload__pc$27[14] q=$abc$109383$new_n53561_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n30289_ q=$abc$109383$new_n53562_
+.subckt and4_x1 i0=$abc$109383$new_n53477_ i1=soc.cpu.minerva.payload__pc$25[14] i2=soc.cpu.minerva.payload__pc$25[13] i3=soc.cpu.minerva.payload__pc$25[12] q=$abc$109383$new_n53558_
+.subckt nexor2_x0 i0=$abc$109383$new_n53558_ i1=$abc$109383$new_n53557_ nq=$abc$109383$new_n53559_
+.subckt or21nand_x1 i0=$abc$109383$new_n53559_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53560_
+.subckt and2_x1 i0=$abc$109383$new_n53532_ i1=soc.cpu.minerva.payload__pc$27[14] q=$abc$109383$new_n53561_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n30289_ nq=$abc$109383$new_n53562_
 .subckt nand4_x0 i0=$abc$109383$new_n53562_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53540_ nq=$abc$109383$new_n53563_
-.subckt oa22_x2 i0=$abc$109383$new_n53563_ i1=$abc$109383$new_n53537_ i2=$abc$109383$new_n53561_ q=$abc$109383$new_n53564_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[15] q=$abc$109383$new_n53565_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53565_ q=$abc$109383$new_n53566_
-.subckt nxr2_x1 i0=$abc$109383$new_n53566_ i1=soc.cpu.minerva.payload__pc$27[15] nq=$abc$109383$new_n53567_
-.subckt nxr2_x1 i0=$abc$109383$new_n53567_ i1=$abc$109383$new_n53564_ nq=$abc$109383$new_n53568_
-.subckt oa22_x2 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53568_ i2=$abc$109383$new_n53560_ q=$abc$109383$new_n53569_
-.subckt oa22_x2 i0=$abc$109383$new_n53569_ i1=$abc$109383$new_n53555_ i2=$abc$109383$new_n53551_ q=$abc$109383$new_n53570_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53570_ i1=soc.cpu.minerva.fetch.ibus__adr[13] q=$abc$109383$new_n53571_
-.subckt a2_x2 i0=$abc$109383$new_n53571_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104104
+.subckt or21nand_x1 i0=$abc$109383$new_n53563_ i1=$abc$109383$new_n53537_ i2=$abc$109383$new_n53561_ nq=$abc$109383$new_n53564_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[15] nq=$abc$109383$new_n53565_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53565_ nq=$abc$109383$new_n53566_
+.subckt nexor2_x0 i0=$abc$109383$new_n53566_ i1=soc.cpu.minerva.payload__pc$27[15] nq=$abc$109383$new_n53567_
+.subckt nexor2_x0 i0=$abc$109383$new_n53567_ i1=$abc$109383$new_n53564_ nq=$abc$109383$new_n53568_
+.subckt or21nand_x1 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53568_ i2=$abc$109383$new_n53560_ nq=$abc$109383$new_n53569_
+.subckt or21nand_x1 i0=$abc$109383$new_n53569_ i1=$abc$109383$new_n53555_ i2=$abc$109383$new_n53551_ nq=$abc$109383$new_n53570_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53570_ i1=soc.cpu.minerva.fetch.ibus__adr[13] q=$abc$109383$new_n53571_
+.subckt and2_x1 i0=$abc$109383$new_n53571_ i1=$abc$109383$new_n53159_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104104
 .subckt buf_x4 i=$abc$109383$new_n53158_ q=$abc$109383$new_n53573_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[16] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53574_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[16] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53575_
 .subckt nand2_x0 i0=$abc$109383$new_n53575_ i1=$abc$109383$new_n53574_ nq=$abc$109383$new_n53576_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53576_ i1=soc.cpu.minerva.exception.mepc__r__base[14] q=$abc$109383$new_n53577_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53577_ i1=soc.cpu.minerva.exception.mtvec__r__base[14] q=$abc$109383$new_n53578_
-.subckt a2_x2 i0=$abc$109383$new_n53578_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53579_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53576_ i1=soc.cpu.minerva.exception.mepc__r__base[14] q=$abc$109383$new_n53577_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53577_ i1=soc.cpu.minerva.exception.mtvec__r__base[14] q=$abc$109383$new_n53578_
+.subckt and2_x1 i0=$abc$109383$new_n53578_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53579_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[16] nq=$abc$109383$new_n53580_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n53580_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53581_
-.subckt a2_x2 i0=$abc$109383$new_n53581_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53582_
+.subckt and2_x1 i0=$abc$109383$new_n53581_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53582_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[16] nq=$abc$109383$new_n53583_
-.subckt a2_x2 i0=$abc$109383$new_n53558_ i1=soc.cpu.minerva.payload__pc$25[15] q=$abc$109383$new_n53584_
-.subckt nxr2_x1 i0=$abc$109383$new_n53584_ i1=$abc$109383$new_n53583_ nq=$abc$109383$new_n53585_
-.subckt oa22_x2 i0=$abc$109383$new_n53585_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53586_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[16] q=$abc$109383$new_n53587_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53587_ q=$abc$109383$new_n53588_
-.subckt nxr2_x1 i0=$abc$109383$new_n53588_ i1=soc.cpu.minerva.payload__pc$27[16] nq=$abc$109383$new_n53589_
-.subckt a2_x2 i0=$abc$109383$new_n53566_ i1=soc.cpu.minerva.payload__pc$27[15] q=$abc$109383$new_n53590_
+.subckt and2_x1 i0=$abc$109383$new_n53558_ i1=soc.cpu.minerva.payload__pc$25[15] q=$abc$109383$new_n53584_
+.subckt nexor2_x0 i0=$abc$109383$new_n53584_ i1=$abc$109383$new_n53583_ nq=$abc$109383$new_n53585_
+.subckt or21nand_x1 i0=$abc$109383$new_n53585_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53586_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[16] nq=$abc$109383$new_n53587_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53587_ nq=$abc$109383$new_n53588_
+.subckt nexor2_x0 i0=$abc$109383$new_n53588_ i1=soc.cpu.minerva.payload__pc$27[16] nq=$abc$109383$new_n53589_
+.subckt and2_x1 i0=$abc$109383$new_n53566_ i1=soc.cpu.minerva.payload__pc$27[15] q=$abc$109383$new_n53590_
 .subckt nand4_x0 i0=$abc$109383$new_n15348_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53553_ nq=$abc$109383$new_n53591_
-.subckt oa22_x2 i0=$abc$109383$new_n53564_ i1=$abc$109383$new_n53591_ i2=$abc$109383$new_n53590_ q=$abc$109383$new_n53592_
-.subckt nxr2_x1 i0=$abc$109383$new_n53592_ i1=$abc$109383$new_n53589_ nq=$abc$109383$new_n53593_
-.subckt oa22_x2 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53593_ i2=$abc$109383$new_n53586_ q=$abc$109383$new_n53594_
-.subckt oa22_x2 i0=$abc$109383$new_n53594_ i1=$abc$109383$new_n53582_ i2=$abc$109383$new_n53579_ q=$abc$109383$new_n53595_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53595_ i1=soc.cpu.minerva.fetch.ibus__adr[14] q=$abc$109383$new_n53596_
-.subckt a2_x2 i0=$abc$109383$new_n53596_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104108
+.subckt or21nand_x1 i0=$abc$109383$new_n53564_ i1=$abc$109383$new_n53591_ i2=$abc$109383$new_n53590_ nq=$abc$109383$new_n53592_
+.subckt nexor2_x0 i0=$abc$109383$new_n53592_ i1=$abc$109383$new_n53589_ nq=$abc$109383$new_n53593_
+.subckt or21nand_x1 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53593_ i2=$abc$109383$new_n53586_ nq=$abc$109383$new_n53594_
+.subckt or21nand_x1 i0=$abc$109383$new_n53594_ i1=$abc$109383$new_n53582_ i2=$abc$109383$new_n53579_ nq=$abc$109383$new_n53595_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53595_ i1=soc.cpu.minerva.fetch.ibus__adr[14] q=$abc$109383$new_n53596_
+.subckt and2_x1 i0=$abc$109383$new_n53596_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104108
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[17] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53598_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[17] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53599_
 .subckt nand2_x0 i0=$abc$109383$new_n53599_ i1=$abc$109383$new_n53598_ nq=$abc$109383$new_n53600_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53600_ i1=soc.cpu.minerva.exception.mepc__r__base[15] q=$abc$109383$new_n53601_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53601_ i1=soc.cpu.minerva.exception.mtvec__r__base[15] q=$abc$109383$new_n53602_
-.subckt a2_x2 i0=$abc$109383$new_n53602_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53603_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53600_ i1=soc.cpu.minerva.exception.mepc__r__base[15] q=$abc$109383$new_n53601_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53601_ i1=soc.cpu.minerva.exception.mtvec__r__base[15] q=$abc$109383$new_n53602_
+.subckt and2_x1 i0=$abc$109383$new_n53602_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53603_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[17] nq=$abc$109383$new_n53604_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n53604_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53605_
-.subckt a2_x2 i0=$abc$109383$new_n53605_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53606_
+.subckt and2_x1 i0=$abc$109383$new_n53605_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53606_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[17] nq=$abc$109383$new_n53607_
-.subckt a3_x2 i0=$abc$109383$new_n53558_ i1=soc.cpu.minerva.payload__pc$25[16] i2=soc.cpu.minerva.payload__pc$25[15] q=$abc$109383$new_n53608_
-.subckt nxr2_x1 i0=$abc$109383$new_n53608_ i1=$abc$109383$new_n53607_ nq=$abc$109383$new_n53609_
-.subckt oa22_x2 i0=$abc$109383$new_n53609_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53610_
-.subckt a2_x2 i0=$abc$109383$new_n53588_ i1=soc.cpu.minerva.payload__pc$27[16] q=$abc$109383$new_n53611_
+.subckt and3_x1 i0=$abc$109383$new_n53558_ i1=soc.cpu.minerva.payload__pc$25[16] i2=soc.cpu.minerva.payload__pc$25[15] q=$abc$109383$new_n53608_
+.subckt nexor2_x0 i0=$abc$109383$new_n53608_ i1=$abc$109383$new_n53607_ nq=$abc$109383$new_n53609_
+.subckt or21nand_x1 i0=$abc$109383$new_n53609_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53610_
+.subckt and2_x1 i0=$abc$109383$new_n53588_ i1=soc.cpu.minerva.payload__pc$27[16] q=$abc$109383$new_n53611_
 .subckt nand4_x0 i0=$abc$109383$new_n15375_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53580_ nq=$abc$109383$new_n53612_
-.subckt oa22_x2 i0=$abc$109383$new_n53612_ i1=$abc$109383$new_n53592_ i2=$abc$109383$new_n53611_ q=$abc$109383$new_n53613_
-.subckt nxr2_x1 i0=$abc$109383$new_n15363_ i1=soc.cpu.minerva.payload__pc$27[17] nq=$abc$109383$new_n53614_
-.subckt nxr2_x1 i0=$abc$109383$new_n53614_ i1=$abc$109383$new_n53613_ nq=$abc$109383$new_n53615_
-.subckt oa22_x2 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53615_ i2=$abc$109383$new_n53610_ q=$abc$109383$new_n53616_
-.subckt oa22_x2 i0=$abc$109383$new_n53616_ i1=$abc$109383$new_n53606_ i2=$abc$109383$new_n53603_ q=$abc$109383$new_n53617_
-.subckt mx2_x2 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53617_ i1=soc.cpu.minerva.fetch.ibus__adr[15] q=$abc$109383$new_n53618_
-.subckt a2_x2 i0=$abc$109383$new_n53618_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104112
+.subckt or21nand_x1 i0=$abc$109383$new_n53612_ i1=$abc$109383$new_n53592_ i2=$abc$109383$new_n53611_ nq=$abc$109383$new_n53613_
+.subckt nexor2_x0 i0=$abc$109383$new_n15363_ i1=soc.cpu.minerva.payload__pc$27[17] nq=$abc$109383$new_n53614_
+.subckt nexor2_x0 i0=$abc$109383$new_n53614_ i1=$abc$109383$new_n53613_ nq=$abc$109383$new_n53615_
+.subckt or21nand_x1 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53615_ i2=$abc$109383$new_n53610_ nq=$abc$109383$new_n53616_
+.subckt or21nand_x1 i0=$abc$109383$new_n53616_ i1=$abc$109383$new_n53606_ i2=$abc$109383$new_n53603_ nq=$abc$109383$new_n53617_
+.subckt mux2_x1 cmd=$abc$109383$new_n53376_ i0=$abc$109383$new_n53617_ i1=soc.cpu.minerva.fetch.ibus__adr[15] q=$abc$109383$new_n53618_
+.subckt and2_x1 i0=$abc$109383$new_n53618_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104112
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[18] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53620_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[18] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53621_
 .subckt nand2_x0 i0=$abc$109383$new_n53621_ i1=$abc$109383$new_n53620_ nq=$abc$109383$new_n53622_
-.subckt mx2_x2 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53622_ i1=soc.cpu.minerva.exception.mepc__r__base[16] q=$abc$109383$new_n53623_
-.subckt mx2_x2 cmd=$abc$109383$new_n53227_ i0=$abc$109383$new_n53623_ i1=soc.cpu.minerva.exception.mtvec__r__base[16] q=$abc$109383$new_n53624_
-.subckt a2_x2 i0=$abc$109383$new_n53624_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53625_
+.subckt mux2_x1 cmd=$abc$109383$new_n53215_ i0=$abc$109383$new_n53622_ i1=soc.cpu.minerva.exception.mepc__r__base[16] q=$abc$109383$new_n53623_
+.subckt mux2_x1 cmd=$abc$109383$new_n53227_ i0=$abc$109383$new_n53623_ i1=soc.cpu.minerva.exception.mtvec__r__base[16] q=$abc$109383$new_n53624_
+.subckt and2_x1 i0=$abc$109383$new_n53624_ i1=$abc$109383$new_n53212_ q=$abc$109383$new_n53625_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[18] nq=$abc$109383$new_n53626_
 .subckt nand4_x0 i0=$abc$109383$new_n53317_ i1=$abc$109383$new_n53626_ i2=$abc$109383$new_n53316_ i3=$abc$109383$new_n53315_ nq=$abc$109383$new_n53627_
-.subckt a2_x2 i0=$abc$109383$new_n53627_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53628_
+.subckt and2_x1 i0=$abc$109383$new_n53627_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53628_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[18] nq=$abc$109383$new_n53629_
-.subckt a4_x2 i0=$abc$109383$new_n53558_ i1=soc.cpu.minerva.payload__pc$25[17] i2=soc.cpu.minerva.payload__pc$25[16] i3=soc.cpu.minerva.payload__pc$25[15] q=$abc$109383$new_n53630_
-.subckt nxr2_x1 i0=$abc$109383$new_n53630_ i1=$abc$109383$new_n53629_ nq=$abc$109383$new_n53631_
-.subckt oa22_x2 i0=$abc$109383$new_n53631_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53287_ q=$abc$109383$new_n53632_
-.subckt a3_x2 i0=$abc$109383$new_n15282_ i1=$abc$109383$new_n15280_ i2=$abc$109383$new_n15271_ q=$abc$109383$new_n53633_
-.subckt ao22_x2 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n53633_ i2=$abc$109383$new_n15374_ q=$abc$109383$new_n53634_
-.subckt nxr2_x1 i0=$abc$109383$new_n53634_ i1=$abc$109383$new_n53626_ nq=$abc$109383$new_n53635_
-.subckt a2_x2 i0=$abc$109383$new_n15363_ i1=soc.cpu.minerva.payload__pc$27[17] q=$abc$109383$new_n53636_
-.subckt oa22_x2 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15524_ q=$abc$109383$new_n53637_
+.subckt and4_x1 i0=$abc$109383$new_n53558_ i1=soc.cpu.minerva.payload__pc$25[17] i2=soc.cpu.minerva.payload__pc$25[16] i3=soc.cpu.minerva.payload__pc$25[15] q=$abc$109383$new_n53630_
+.subckt nexor2_x0 i0=$abc$109383$new_n53630_ i1=$abc$109383$new_n53629_ nq=$abc$109383$new_n53631_
+.subckt or21nand_x1 i0=$abc$109383$new_n53631_ i1=$abc$109383$new_n52657_ i2=$abc$109383$new_n53287_ nq=$abc$109383$new_n53632_
+.subckt and3_x1 i0=$abc$109383$new_n15282_ i1=$abc$109383$new_n15280_ i2=$abc$109383$new_n15271_ q=$abc$109383$new_n53633_
+.subckt and21nor_x1 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n53633_ i2=$abc$109383$new_n15374_ nq=$abc$109383$new_n53634_
+.subckt nexor2_x0 i0=$abc$109383$new_n53634_ i1=$abc$109383$new_n53626_ nq=$abc$109383$new_n53635_
+.subckt and2_x1 i0=$abc$109383$new_n15363_ i1=soc.cpu.minerva.payload__pc$27[17] q=$abc$109383$new_n53636_
+.subckt or21nand_x1 i0=$abc$109383$new_n15347_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15524_ nq=$abc$109383$new_n53637_
 .subckt nand4_x0 i0=$abc$109383$new_n53637_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53604_ nq=$abc$109383$new_n53638_
-.subckt oa22_x2 i0=$abc$109383$new_n53613_ i1=$abc$109383$new_n53638_ i2=$abc$109383$new_n53636_ q=$abc$109383$new_n53639_
-.subckt nxr2_x1 i0=$abc$109383$new_n53639_ i1=$abc$109383$new_n53635_ nq=$abc$109383$new_n53640_
-.subckt oa22_x2 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53640_ i2=$abc$109383$new_n53632_ q=$abc$109383$new_n53641_
-.subckt oa22_x2 i0=$abc$109383$new_n53641_ i1=$abc$109383$new_n53628_ i2=$abc$109383$new_n53625_ q=$abc$109383$new_n53642_
+.subckt or21nand_x1 i0=$abc$109383$new_n53613_ i1=$abc$109383$new_n53638_ i2=$abc$109383$new_n53636_ nq=$abc$109383$new_n53639_
+.subckt nexor2_x0 i0=$abc$109383$new_n53639_ i1=$abc$109383$new_n53635_ nq=$abc$109383$new_n53640_
+.subckt or21nand_x1 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53640_ i2=$abc$109383$new_n53632_ nq=$abc$109383$new_n53641_
+.subckt or21nand_x1 i0=$abc$109383$new_n53641_ i1=$abc$109383$new_n53628_ i2=$abc$109383$new_n53625_ nq=$abc$109383$new_n53642_
 .subckt buf_x4 i=$abc$109383$new_n53353_ q=$abc$109383$new_n53643_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53642_ i1=soc.cpu.minerva.fetch.ibus__adr[16] q=$abc$109383$new_n53644_
-.subckt a2_x2 i0=$abc$109383$new_n53644_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104116
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[17] q=$abc$109383$new_n53646_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53642_ i1=soc.cpu.minerva.fetch.ibus__adr[16] q=$abc$109383$new_n53644_
+.subckt and2_x1 i0=$abc$109383$new_n53644_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104116
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[17] nq=$abc$109383$new_n53646_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[19] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53647_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[19] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53648_
-.subckt oa22_x2 i0=$abc$109383$new_n53648_ i1=$abc$109383$new_n53647_ i2=$abc$109383$new_n53216_ q=$abc$109383$new_n53649_
+.subckt or21nand_x1 i0=$abc$109383$new_n53648_ i1=$abc$109383$new_n53647_ i2=$abc$109383$new_n53216_ nq=$abc$109383$new_n53649_
 .subckt nand2_x0 i0=soc.cpu.minerva.exception.mepc__r__base[17] i1=$abc$109383$new_n53224_ nq=$abc$109383$new_n53650_
-.subckt oa22_x2 i0=$abc$109383$new_n53650_ i1=$abc$109383$new_n53649_ i2=$abc$109383$new_n53228_ q=$abc$109383$new_n53651_
+.subckt or21nand_x1 i0=$abc$109383$new_n53650_ i1=$abc$109383$new_n53649_ i2=$abc$109383$new_n53228_ nq=$abc$109383$new_n53651_
 .subckt nand2_x0 i0=$abc$109383$new_n53312_ i1=soc.cpu.minerva.exception.mtvec__r__base[17] nq=$abc$109383$new_n53652_
 .subckt nand4_x0 i0=$abc$109383$new_n53652_ i1=$abc$109383$new_n53651_ i2=$abc$109383$new_n15253_ i3=$abc$109383$new_n28911_ nq=$abc$109383$new_n53653_
-.subckt a3_x2 i0=$abc$109383$new_n53653_ i1=$abc$109383$new_n30188_ i2=$abc$109383$new_n29769_ q=$abc$109383$new_n53654_
+.subckt and3_x1 i0=$abc$109383$new_n53653_ i1=$abc$109383$new_n30188_ i2=$abc$109383$new_n29769_ q=$abc$109383$new_n53654_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=soc.cpu.minerva.payload__pc$27[19] i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53655_
 .subckt nand2_x0 i0=$abc$109383$new_n53655_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53656_
 .subckt buf_x4 i=$abc$109383$new_n53259_ q=$abc$109383$new_n53657_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[19] nq=$abc$109383$new_n53658_
-.subckt a2_x2 i0=$abc$109383$new_n53630_ i1=soc.cpu.minerva.payload__pc$25[18] q=$abc$109383$new_n53659_
-.subckt nxr2_x1 i0=$abc$109383$new_n53659_ i1=$abc$109383$new_n53658_ nq=$abc$109383$new_n53660_
-.subckt ao22_x2 i0=$abc$109383$new_n53660_ i1=$abc$109383$new_n53657_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53661_
-.subckt ao22_x2 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[18] q=$abc$109383$new_n53662_
-.subckt oa22_x2 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53662_ q=$abc$109383$new_n53663_
+.subckt and2_x1 i0=$abc$109383$new_n53630_ i1=soc.cpu.minerva.payload__pc$25[18] q=$abc$109383$new_n53659_
+.subckt nexor2_x0 i0=$abc$109383$new_n53659_ i1=$abc$109383$new_n53658_ nq=$abc$109383$new_n53660_
+.subckt and21nor_x1 i0=$abc$109383$new_n53660_ i1=$abc$109383$new_n53657_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53661_
+.subckt and21nor_x1 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15297_ i2=soc.cpu.minerva.payload__instruction$28[18] nq=$abc$109383$new_n53662_
+.subckt or21nand_x1 i0=$abc$109383$new_n15341_ i1=$abc$109383$new_n15360_ i2=$abc$109383$new_n53662_ nq=$abc$109383$new_n53663_
 .subckt nand2_x0 i0=$abc$109383$new_n53663_ i1=soc.cpu.minerva.payload__pc$27[18] nq=$abc$109383$new_n53664_
-.subckt nxr2_x1 i0=$abc$109383$new_n53634_ i1=soc.cpu.minerva.payload__pc$27[18] nq=$abc$109383$new_n53665_
+.subckt nexor2_x0 i0=$abc$109383$new_n53634_ i1=soc.cpu.minerva.payload__pc$27[18] nq=$abc$109383$new_n53665_
 .subckt nand2_x0 i0=$abc$109383$new_n53639_ i1=$abc$109383$new_n53665_ nq=$abc$109383$new_n53666_
-.subckt a2_x2 i0=$abc$109383$new_n53666_ i1=$abc$109383$new_n53664_ q=$abc$109383$new_n53667_
-.subckt oa22_x2 i0=$abc$109383$new_n15364_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15512_ q=$abc$109383$new_n53668_
+.subckt and2_x1 i0=$abc$109383$new_n53666_ i1=$abc$109383$new_n53664_ q=$abc$109383$new_n53667_
+.subckt or21nand_x1 i0=$abc$109383$new_n15364_ i1=$abc$109383$new_n15344_ i2=$abc$109383$new_n15512_ nq=$abc$109383$new_n53668_
 .subckt buf_x4 i=$abc$109383$new_n15289_ q=$abc$109383$new_n53669_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n53633_ i2=$abc$109383$new_n53668_ q=$abc$109383$new_n53670_
-.subckt nxr2_x1 i0=$abc$109383$new_n53670_ i1=soc.cpu.minerva.payload__pc$27[19] nq=$abc$109383$new_n53671_
-.subckt nxr2_x1 i0=$abc$109383$new_n53671_ i1=$abc$109383$new_n53667_ nq=$abc$109383$new_n53672_
-.subckt ao22_x2 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53672_ i2=$abc$109383$new_n53661_ q=$abc$109383$new_n53673_
-.subckt ao22_x2 i0=$abc$109383$new_n53673_ i1=$abc$109383$new_n53656_ i2=$abc$109383$new_n53654_ q=$abc$109383$new_n53674_
-.subckt ao22_x2 i0=$abc$109383$new_n53674_ i1=$abc$109383$new_n53646_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104120
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n53633_ i2=$abc$109383$new_n53668_ nq=$abc$109383$new_n53670_
+.subckt nexor2_x0 i0=$abc$109383$new_n53670_ i1=soc.cpu.minerva.payload__pc$27[19] nq=$abc$109383$new_n53671_
+.subckt nexor2_x0 i0=$abc$109383$new_n53671_ i1=$abc$109383$new_n53667_ nq=$abc$109383$new_n53672_
+.subckt and21nor_x1 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53672_ i2=$abc$109383$new_n53661_ nq=$abc$109383$new_n53673_
+.subckt and21nor_x1 i0=$abc$109383$new_n53673_ i1=$abc$109383$new_n53656_ i2=$abc$109383$new_n53654_ nq=$abc$109383$new_n53674_
+.subckt and21nor_x1 i0=$abc$109383$new_n53674_ i1=$abc$109383$new_n53646_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104120
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[20] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53676_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[20] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53677_
 .subckt nand2_x0 i0=$abc$109383$new_n53677_ i1=$abc$109383$new_n53676_ nq=$abc$109383$new_n53678_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53678_ i1=soc.cpu.minerva.exception.mepc__r__base[18] q=$abc$109383$new_n53679_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53678_ i1=soc.cpu.minerva.exception.mepc__r__base[18] q=$abc$109383$new_n53679_
 .subckt buf_x4 i=$abc$109383$new_n53227_ q=$abc$109383$new_n53680_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53679_ i1=soc.cpu.minerva.exception.mtvec__r__base[18] q=$abc$109383$new_n53681_
-.subckt a2_x2 i0=$abc$109383$new_n53681_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53682_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53679_ i1=soc.cpu.minerva.exception.mtvec__r__base[18] q=$abc$109383$new_n53681_
+.subckt and2_x1 i0=$abc$109383$new_n53681_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53682_
 .subckt buf_x4 i=$abc$109383$new_n29192_ q=$abc$109383$new_n53683_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[20] nq=$abc$109383$new_n53684_
 .subckt buf_x4 i=$abc$109383$new_n15258_ q=$abc$109383$new_n53685_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53684_ i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53686_
-.subckt a2_x2 i0=$abc$109383$new_n53686_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53687_
+.subckt and2_x1 i0=$abc$109383$new_n53686_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53687_
 .subckt buf_x4 i=$abc$109383$new_n52657_ q=$abc$109383$new_n53688_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[20] nq=$abc$109383$new_n53689_
-.subckt a3_x2 i0=$abc$109383$new_n53630_ i1=soc.cpu.minerva.payload__pc$25[19] i2=soc.cpu.minerva.payload__pc$25[18] q=$abc$109383$new_n53690_
-.subckt nxr2_x1 i0=$abc$109383$new_n53690_ i1=$abc$109383$new_n53689_ nq=$abc$109383$new_n53691_
-.subckt oa22_x2 i0=$abc$109383$new_n53691_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53692_
+.subckt and3_x1 i0=$abc$109383$new_n53630_ i1=soc.cpu.minerva.payload__pc$25[19] i2=soc.cpu.minerva.payload__pc$25[18] q=$abc$109383$new_n53690_
+.subckt nexor2_x0 i0=$abc$109383$new_n53690_ i1=$abc$109383$new_n53689_ nq=$abc$109383$new_n53691_
+.subckt or21nand_x1 i0=$abc$109383$new_n53691_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53692_
 .subckt nand2_x0 i0=$abc$109383$new_n15358_ i1=$abc$109383$new_n15425_ nq=$abc$109383$new_n53693_
-.subckt ao22_x2 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15387_ i2=$abc$109383$new_n53693_ q=$abc$109383$new_n53694_
-.subckt nxr2_x1 i0=$abc$109383$new_n53694_ i1=$abc$109383$new_n53684_ nq=$abc$109383$new_n53695_
+.subckt and21nor_x1 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15387_ i2=$abc$109383$new_n53693_ nq=$abc$109383$new_n53694_
+.subckt nexor2_x0 i0=$abc$109383$new_n53694_ i1=$abc$109383$new_n53684_ nq=$abc$109383$new_n53695_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[19] nq=$abc$109383$new_n53696_
 .subckt nand4_x0 i0=$abc$109383$new_n53668_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53696_ nq=$abc$109383$new_n53697_
 .subckt nand2_x0 i0=$abc$109383$new_n15361_ i1=soc.cpu.minerva.payload__pc$27[19] nq=$abc$109383$new_n53698_
 .subckt nand3_x0 i0=$abc$109383$new_n53698_ i1=$abc$109383$new_n53666_ i2=$abc$109383$new_n53664_ nq=$abc$109383$new_n53699_
-.subckt a2_x2 i0=$abc$109383$new_n53699_ i1=$abc$109383$new_n53697_ q=$abc$109383$new_n53700_
-.subckt nxr2_x1 i0=$abc$109383$new_n53700_ i1=$abc$109383$new_n53695_ nq=$abc$109383$new_n53701_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53701_ i2=$abc$109383$new_n53692_ q=$abc$109383$new_n53702_
-.subckt oa22_x2 i0=$abc$109383$new_n53702_ i1=$abc$109383$new_n53687_ i2=$abc$109383$new_n53682_ q=$abc$109383$new_n53703_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53703_ i1=soc.cpu.minerva.fetch.ibus__adr[18] q=$abc$109383$new_n53704_
-.subckt a2_x2 i0=$abc$109383$new_n53704_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104124
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[19] q=$abc$109383$new_n53706_
+.subckt and2_x1 i0=$abc$109383$new_n53699_ i1=$abc$109383$new_n53697_ q=$abc$109383$new_n53700_
+.subckt nexor2_x0 i0=$abc$109383$new_n53700_ i1=$abc$109383$new_n53695_ nq=$abc$109383$new_n53701_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53701_ i2=$abc$109383$new_n53692_ nq=$abc$109383$new_n53702_
+.subckt or21nand_x1 i0=$abc$109383$new_n53702_ i1=$abc$109383$new_n53687_ i2=$abc$109383$new_n53682_ nq=$abc$109383$new_n53703_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53703_ i1=soc.cpu.minerva.fetch.ibus__adr[18] q=$abc$109383$new_n53704_
+.subckt and2_x1 i0=$abc$109383$new_n53704_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104124
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[19] nq=$abc$109383$new_n53706_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[21] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53707_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[21] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53708_
-.subckt oa22_x2 i0=$abc$109383$new_n53708_ i1=$abc$109383$new_n53707_ i2=$abc$109383$new_n53224_ q=$abc$109383$new_n53709_
+.subckt or21nand_x1 i0=$abc$109383$new_n53708_ i1=$abc$109383$new_n53707_ i2=$abc$109383$new_n53224_ nq=$abc$109383$new_n53709_
 .subckt nand2_x0 i0=soc.cpu.minerva.exception.mepc__r__base[19] i1=$abc$109383$new_n53224_ nq=$abc$109383$new_n53710_
-.subckt oa22_x2 i0=$abc$109383$new_n53710_ i1=$abc$109383$new_n53709_ i2=$abc$109383$new_n53228_ q=$abc$109383$new_n53711_
+.subckt or21nand_x1 i0=$abc$109383$new_n53710_ i1=$abc$109383$new_n53709_ i2=$abc$109383$new_n53228_ nq=$abc$109383$new_n53711_
 .subckt nand2_x0 i0=$abc$109383$new_n53312_ i1=soc.cpu.minerva.exception.mtvec__r__base[19] nq=$abc$109383$new_n53712_
 .subckt nand4_x0 i0=$abc$109383$new_n53712_ i1=$abc$109383$new_n53711_ i2=$abc$109383$new_n15253_ i3=$abc$109383$new_n28911_ nq=$abc$109383$new_n53713_
-.subckt a3_x2 i0=$abc$109383$new_n53713_ i1=$abc$109383$new_n30141_ i2=$abc$109383$new_n29996_ q=$abc$109383$new_n53714_
+.subckt and3_x1 i0=$abc$109383$new_n53713_ i1=$abc$109383$new_n30141_ i2=$abc$109383$new_n29996_ q=$abc$109383$new_n53714_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=soc.cpu.minerva.payload__pc$27[21] i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53715_
 .subckt nand2_x0 i0=$abc$109383$new_n53715_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53716_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[21] nq=$abc$109383$new_n53717_
-.subckt a4_x2 i0=$abc$109383$new_n53630_ i1=soc.cpu.minerva.payload__pc$25[20] i2=soc.cpu.minerva.payload__pc$25[19] i3=soc.cpu.minerva.payload__pc$25[18] q=$abc$109383$new_n53718_
-.subckt nxr2_x1 i0=$abc$109383$new_n53718_ i1=$abc$109383$new_n53717_ nq=$abc$109383$new_n53719_
-.subckt ao22_x2 i0=$abc$109383$new_n53719_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53720_
-.subckt a2_x2 i0=$abc$109383$new_n15385_ i1=$abc$109383$new_n15425_ q=$abc$109383$new_n53721_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15285_ i2=$abc$109383$new_n53721_ q=$abc$109383$new_n53722_
-.subckt a2_x2 i0=$abc$109383$new_n53722_ i1=soc.cpu.minerva.payload__pc$27[20] q=$abc$109383$new_n53723_
-.subckt nxr2_x1 i0=$abc$109383$new_n53694_ i1=soc.cpu.minerva.payload__pc$27[20] nq=$abc$109383$new_n53724_
-.subckt a2_x2 i0=$abc$109383$new_n53639_ i1=$abc$109383$new_n53665_ q=$abc$109383$new_n53725_
-.subckt a2_x2 i0=$abc$109383$new_n53663_ i1=soc.cpu.minerva.payload__pc$27[18] q=$abc$109383$new_n53726_
-.subckt ao22_x2 i0=$abc$109383$new_n53726_ i1=$abc$109383$new_n53725_ i2=$abc$109383$new_n53697_ q=$abc$109383$new_n53727_
-.subckt a2_x2 i0=$abc$109383$new_n15361_ i1=soc.cpu.minerva.payload__pc$27[19] q=$abc$109383$new_n53728_
-.subckt ao22_x2 i0=$abc$109383$new_n53728_ i1=$abc$109383$new_n53727_ i2=$abc$109383$new_n53724_ q=$abc$109383$new_n53729_
+.subckt and4_x1 i0=$abc$109383$new_n53630_ i1=soc.cpu.minerva.payload__pc$25[20] i2=soc.cpu.minerva.payload__pc$25[19] i3=soc.cpu.minerva.payload__pc$25[18] q=$abc$109383$new_n53718_
+.subckt nexor2_x0 i0=$abc$109383$new_n53718_ i1=$abc$109383$new_n53717_ nq=$abc$109383$new_n53719_
+.subckt and21nor_x1 i0=$abc$109383$new_n53719_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53720_
+.subckt and2_x1 i0=$abc$109383$new_n15385_ i1=$abc$109383$new_n15425_ q=$abc$109383$new_n53721_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15285_ i2=$abc$109383$new_n53721_ nq=$abc$109383$new_n53722_
+.subckt and2_x1 i0=$abc$109383$new_n53722_ i1=soc.cpu.minerva.payload__pc$27[20] q=$abc$109383$new_n53723_
+.subckt nexor2_x0 i0=$abc$109383$new_n53694_ i1=soc.cpu.minerva.payload__pc$27[20] nq=$abc$109383$new_n53724_
+.subckt and2_x1 i0=$abc$109383$new_n53639_ i1=$abc$109383$new_n53665_ q=$abc$109383$new_n53725_
+.subckt and2_x1 i0=$abc$109383$new_n53663_ i1=soc.cpu.minerva.payload__pc$27[18] q=$abc$109383$new_n53726_
+.subckt and21nor_x1 i0=$abc$109383$new_n53726_ i1=$abc$109383$new_n53725_ i2=$abc$109383$new_n53697_ nq=$abc$109383$new_n53727_
+.subckt and2_x1 i0=$abc$109383$new_n15361_ i1=soc.cpu.minerva.payload__pc$27[19] q=$abc$109383$new_n53728_
+.subckt and21nor_x1 i0=$abc$109383$new_n53728_ i1=$abc$109383$new_n53727_ i2=$abc$109383$new_n53724_ nq=$abc$109383$new_n53729_
 .subckt nor2_x0 i0=$abc$109383$new_n53729_ i1=$abc$109383$new_n53723_ nq=$abc$109383$new_n53730_
 .subckt nand2_x0 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[1] nq=$abc$109383$new_n53731_
-.subckt ao22_x2 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53731_ q=$abc$109383$new_n53732_
-.subckt nxr2_x1 i0=$abc$109383$new_n53732_ i1=soc.cpu.minerva.payload__pc$27[21] nq=$abc$109383$new_n53733_
-.subckt nxr2_x1 i0=$abc$109383$new_n53733_ i1=$abc$109383$new_n53730_ nq=$abc$109383$new_n53734_
-.subckt ao22_x2 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53734_ i2=$abc$109383$new_n53720_ q=$abc$109383$new_n53735_
-.subckt ao22_x2 i0=$abc$109383$new_n53735_ i1=$abc$109383$new_n53716_ i2=$abc$109383$new_n53714_ q=$abc$109383$new_n53736_
-.subckt ao22_x2 i0=$abc$109383$new_n53736_ i1=$abc$109383$new_n53706_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104128
+.subckt and21nor_x1 i0=$abc$109383$new_n15289_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53731_ nq=$abc$109383$new_n53732_
+.subckt nexor2_x0 i0=$abc$109383$new_n53732_ i1=soc.cpu.minerva.payload__pc$27[21] nq=$abc$109383$new_n53733_
+.subckt nexor2_x0 i0=$abc$109383$new_n53733_ i1=$abc$109383$new_n53730_ nq=$abc$109383$new_n53734_
+.subckt and21nor_x1 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n53734_ i2=$abc$109383$new_n53720_ nq=$abc$109383$new_n53735_
+.subckt and21nor_x1 i0=$abc$109383$new_n53735_ i1=$abc$109383$new_n53716_ i2=$abc$109383$new_n53714_ nq=$abc$109383$new_n53736_
+.subckt and21nor_x1 i0=$abc$109383$new_n53736_ i1=$abc$109383$new_n53706_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104128
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[22] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53738_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[22] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53739_
 .subckt nand2_x0 i0=$abc$109383$new_n53739_ i1=$abc$109383$new_n53738_ nq=$abc$109383$new_n53740_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53740_ i1=soc.cpu.minerva.exception.mepc__r__base[20] q=$abc$109383$new_n53741_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53741_ i1=soc.cpu.minerva.exception.mtvec__r__base[20] q=$abc$109383$new_n53742_
-.subckt a2_x2 i0=$abc$109383$new_n53742_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53743_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53740_ i1=soc.cpu.minerva.exception.mepc__r__base[20] q=$abc$109383$new_n53741_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53741_ i1=soc.cpu.minerva.exception.mtvec__r__base[20] q=$abc$109383$new_n53742_
+.subckt and2_x1 i0=$abc$109383$new_n53742_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53743_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[22] nq=$abc$109383$new_n53744_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53744_ i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53745_
-.subckt a2_x2 i0=$abc$109383$new_n53745_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53746_
+.subckt and2_x1 i0=$abc$109383$new_n53745_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53746_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[22] nq=$abc$109383$new_n53747_
-.subckt a2_x2 i0=$abc$109383$new_n53718_ i1=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n53748_
-.subckt nxr2_x1 i0=$abc$109383$new_n53748_ i1=$abc$109383$new_n53747_ nq=$abc$109383$new_n53749_
-.subckt oa22_x2 i0=$abc$109383$new_n53749_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53750_
+.subckt and2_x1 i0=$abc$109383$new_n53718_ i1=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n53748_
+.subckt nexor2_x0 i0=$abc$109383$new_n53748_ i1=$abc$109383$new_n53747_ nq=$abc$109383$new_n53749_
+.subckt or21nand_x1 i0=$abc$109383$new_n53749_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53750_
 .subckt nand2_x0 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[2] nq=$abc$109383$new_n53751_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53751_ q=$abc$109383$new_n53752_
-.subckt nxr2_x1 i0=$abc$109383$new_n53752_ i1=$abc$109383$new_n53744_ nq=$abc$109383$new_n53753_
-.subckt a2_x2 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[1] q=$abc$109383$new_n53754_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53754_ q=$abc$109383$new_n53755_
-.subckt a2_x2 i0=$abc$109383$new_n53755_ i1=soc.cpu.minerva.payload__pc$27[21] q=$abc$109383$new_n53756_
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53751_ nq=$abc$109383$new_n53752_
+.subckt nexor2_x0 i0=$abc$109383$new_n53752_ i1=$abc$109383$new_n53744_ nq=$abc$109383$new_n53753_
+.subckt and2_x1 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[1] q=$abc$109383$new_n53754_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53754_ nq=$abc$109383$new_n53755_
+.subckt and2_x1 i0=$abc$109383$new_n53755_ i1=soc.cpu.minerva.payload__pc$27[21] q=$abc$109383$new_n53756_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[21] nq=$abc$109383$new_n53757_
 .subckt nand2_x0 i0=$abc$109383$new_n53732_ i1=$abc$109383$new_n53757_ nq=$abc$109383$new_n53758_
-.subckt ao22_x2 i0=$abc$109383$new_n53723_ i1=$abc$109383$new_n53729_ i2=$abc$109383$new_n53758_ q=$abc$109383$new_n53759_
-.subckt o2_x2 i0=$abc$109383$new_n53759_ i1=$abc$109383$new_n53756_ q=$abc$109383$new_n53760_
-.subckt nxr2_x1 i0=$abc$109383$new_n53760_ i1=$abc$109383$new_n53753_ nq=$abc$109383$new_n53761_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53761_ i2=$abc$109383$new_n53750_ q=$abc$109383$new_n53762_
-.subckt oa22_x2 i0=$abc$109383$new_n53762_ i1=$abc$109383$new_n53746_ i2=$abc$109383$new_n53743_ q=$abc$109383$new_n53763_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53763_ i1=soc.cpu.minerva.fetch.ibus__adr[20] q=$abc$109383$new_n53764_
-.subckt a2_x2 i0=$abc$109383$new_n53764_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104132
+.subckt and21nor_x1 i0=$abc$109383$new_n53723_ i1=$abc$109383$new_n53729_ i2=$abc$109383$new_n53758_ nq=$abc$109383$new_n53759_
+.subckt or2_x1 i0=$abc$109383$new_n53759_ i1=$abc$109383$new_n53756_ q=$abc$109383$new_n53760_
+.subckt nexor2_x0 i0=$abc$109383$new_n53760_ i1=$abc$109383$new_n53753_ nq=$abc$109383$new_n53761_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53761_ i2=$abc$109383$new_n53750_ nq=$abc$109383$new_n53762_
+.subckt or21nand_x1 i0=$abc$109383$new_n53762_ i1=$abc$109383$new_n53746_ i2=$abc$109383$new_n53743_ nq=$abc$109383$new_n53763_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53763_ i1=soc.cpu.minerva.fetch.ibus__adr[20] q=$abc$109383$new_n53764_
+.subckt and2_x1 i0=$abc$109383$new_n53764_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104132
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[23] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53766_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[23] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53767_
 .subckt nand2_x0 i0=$abc$109383$new_n53767_ i1=$abc$109383$new_n53766_ nq=$abc$109383$new_n53768_
-.subckt mx2_x2 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53768_ i1=soc.cpu.minerva.exception.mepc__r__base[21] q=$abc$109383$new_n53769_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53769_ i1=soc.cpu.minerva.exception.mtvec__r__base[21] q=$abc$109383$new_n53770_
-.subckt a2_x2 i0=$abc$109383$new_n53770_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53771_
+.subckt mux2_x1 cmd=$abc$109383$new_n53216_ i0=$abc$109383$new_n53768_ i1=soc.cpu.minerva.exception.mepc__r__base[21] q=$abc$109383$new_n53769_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53769_ i1=soc.cpu.minerva.exception.mtvec__r__base[21] q=$abc$109383$new_n53770_
+.subckt and2_x1 i0=$abc$109383$new_n53770_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53771_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[23] nq=$abc$109383$new_n53772_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53772_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53773_
-.subckt a2_x2 i0=$abc$109383$new_n53773_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53774_
+.subckt and2_x1 i0=$abc$109383$new_n53773_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53774_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[23] nq=$abc$109383$new_n53775_
-.subckt a3_x2 i0=$abc$109383$new_n53718_ i1=soc.cpu.minerva.payload__pc$25[22] i2=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n53776_
-.subckt nxr2_x1 i0=$abc$109383$new_n53776_ i1=$abc$109383$new_n53775_ nq=$abc$109383$new_n53777_
-.subckt oa22_x2 i0=$abc$109383$new_n53777_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n53778_
-.subckt a2_x2 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[2] q=$abc$109383$new_n53779_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53779_ q=$abc$109383$new_n53780_
-.subckt a2_x2 i0=$abc$109383$new_n53780_ i1=soc.cpu.minerva.payload__pc$27[22] q=$abc$109383$new_n53781_
-.subckt nxr2_x1 i0=$abc$109383$new_n53752_ i1=soc.cpu.minerva.payload__pc$27[22] nq=$abc$109383$new_n53782_
-.subckt ao22_x2 i0=$abc$109383$new_n53756_ i1=$abc$109383$new_n53759_ i2=$abc$109383$new_n53782_ q=$abc$109383$new_n53783_
+.subckt and3_x1 i0=$abc$109383$new_n53718_ i1=soc.cpu.minerva.payload__pc$25[22] i2=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n53776_
+.subckt nexor2_x0 i0=$abc$109383$new_n53776_ i1=$abc$109383$new_n53775_ nq=$abc$109383$new_n53777_
+.subckt or21nand_x1 i0=$abc$109383$new_n53777_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n53778_
+.subckt and2_x1 i0=$abc$109383$new_n15385_ i1=soc.cpu.minerva.csrf_rp__addr[2] q=$abc$109383$new_n53779_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53779_ nq=$abc$109383$new_n53780_
+.subckt and2_x1 i0=$abc$109383$new_n53780_ i1=soc.cpu.minerva.payload__pc$27[22] q=$abc$109383$new_n53781_
+.subckt nexor2_x0 i0=$abc$109383$new_n53752_ i1=soc.cpu.minerva.payload__pc$27[22] nq=$abc$109383$new_n53782_
+.subckt and21nor_x1 i0=$abc$109383$new_n53756_ i1=$abc$109383$new_n53759_ i2=$abc$109383$new_n53782_ nq=$abc$109383$new_n53783_
 .subckt nor2_x0 i0=$abc$109383$new_n53783_ i1=$abc$109383$new_n53781_ nq=$abc$109383$new_n53784_
-.subckt nxr2_x1 i0=$abc$109383$new_n15388_ i1=soc.cpu.minerva.payload__pc$27[23] nq=$abc$109383$new_n53785_
-.subckt nxr2_x1 i0=$abc$109383$new_n53785_ i1=$abc$109383$new_n53784_ nq=$abc$109383$new_n53786_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53786_ i2=$abc$109383$new_n53778_ q=$abc$109383$new_n53787_
-.subckt oa22_x2 i0=$abc$109383$new_n53787_ i1=$abc$109383$new_n53774_ i2=$abc$109383$new_n53771_ q=$abc$109383$new_n53788_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53788_ i1=soc.cpu.minerva.fetch.ibus__adr[21] q=$abc$109383$new_n53789_
-.subckt a2_x2 i0=$abc$109383$new_n53789_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104136
+.subckt nexor2_x0 i0=$abc$109383$new_n15388_ i1=soc.cpu.minerva.payload__pc$27[23] nq=$abc$109383$new_n53785_
+.subckt nexor2_x0 i0=$abc$109383$new_n53785_ i1=$abc$109383$new_n53784_ nq=$abc$109383$new_n53786_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53786_ i2=$abc$109383$new_n53778_ nq=$abc$109383$new_n53787_
+.subckt or21nand_x1 i0=$abc$109383$new_n53787_ i1=$abc$109383$new_n53774_ i2=$abc$109383$new_n53771_ nq=$abc$109383$new_n53788_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53788_ i1=soc.cpu.minerva.fetch.ibus__adr[21] q=$abc$109383$new_n53789_
+.subckt and2_x1 i0=$abc$109383$new_n53789_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104136
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[24] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53791_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[24] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53792_
 .subckt nand2_x0 i0=$abc$109383$new_n53792_ i1=$abc$109383$new_n53791_ nq=$abc$109383$new_n53793_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53793_ i1=soc.cpu.minerva.exception.mepc__r__base[22] q=$abc$109383$new_n53794_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53794_ i1=soc.cpu.minerva.exception.mtvec__r__base[22] q=$abc$109383$new_n53795_
-.subckt a2_x2 i0=$abc$109383$new_n53795_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53796_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53793_ i1=soc.cpu.minerva.exception.mepc__r__base[22] q=$abc$109383$new_n53794_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53794_ i1=soc.cpu.minerva.exception.mtvec__r__base[22] q=$abc$109383$new_n53795_
+.subckt and2_x1 i0=$abc$109383$new_n53795_ i1=$abc$109383$new_n53213_ q=$abc$109383$new_n53796_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[24] nq=$abc$109383$new_n53797_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53797_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53798_
-.subckt a2_x2 i0=$abc$109383$new_n53798_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53799_
+.subckt and2_x1 i0=$abc$109383$new_n53798_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53799_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[24] nq=$abc$109383$new_n53800_
-.subckt a4_x2 i0=$abc$109383$new_n53718_ i1=soc.cpu.minerva.payload__pc$25[23] i2=soc.cpu.minerva.payload__pc$25[22] i3=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n53801_
-.subckt nxr2_x1 i0=$abc$109383$new_n53801_ i1=$abc$109383$new_n53800_ nq=$abc$109383$new_n53802_
-.subckt oa22_x2 i0=$abc$109383$new_n53802_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53803_
+.subckt and4_x1 i0=$abc$109383$new_n53718_ i1=soc.cpu.minerva.payload__pc$25[23] i2=soc.cpu.minerva.payload__pc$25[22] i3=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n53801_
+.subckt nexor2_x0 i0=$abc$109383$new_n53801_ i1=$abc$109383$new_n53800_ nq=$abc$109383$new_n53802_
+.subckt or21nand_x1 i0=$abc$109383$new_n53802_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53803_
 .subckt nand2_x0 i0=$abc$109383$new_n15385_ i1=$abc$109383$new_n15495_ nq=$abc$109383$new_n53804_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53804_ q=$abc$109383$new_n53805_
-.subckt nxr2_x1 i0=$abc$109383$new_n53805_ i1=$abc$109383$new_n53797_ nq=$abc$109383$new_n53806_
-.subckt a2_x2 i0=$abc$109383$new_n15385_ i1=$abc$109383$new_n15384_ q=$abc$109383$new_n53807_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53807_ q=$abc$109383$new_n53808_
-.subckt a2_x2 i0=$abc$109383$new_n53808_ i1=soc.cpu.minerva.payload__pc$27[23] q=$abc$109383$new_n53809_
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53804_ nq=$abc$109383$new_n53805_
+.subckt nexor2_x0 i0=$abc$109383$new_n53805_ i1=$abc$109383$new_n53797_ nq=$abc$109383$new_n53806_
+.subckt and2_x1 i0=$abc$109383$new_n15385_ i1=$abc$109383$new_n15384_ q=$abc$109383$new_n53807_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53807_ nq=$abc$109383$new_n53808_
+.subckt and2_x1 i0=$abc$109383$new_n53808_ i1=soc.cpu.minerva.payload__pc$27[23] q=$abc$109383$new_n53809_
 .subckt nand2_x0 i0=$abc$109383$new_n15388_ i1=$abc$109383$new_n53772_ nq=$abc$109383$new_n53810_
-.subckt ao22_x2 i0=$abc$109383$new_n53781_ i1=$abc$109383$new_n53783_ i2=$abc$109383$new_n53810_ q=$abc$109383$new_n53811_
-.subckt o2_x2 i0=$abc$109383$new_n53811_ i1=$abc$109383$new_n53809_ q=$abc$109383$new_n53812_
-.subckt nxr2_x1 i0=$abc$109383$new_n53812_ i1=$abc$109383$new_n53806_ nq=$abc$109383$new_n53813_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53813_ i2=$abc$109383$new_n53803_ q=$abc$109383$new_n53814_
-.subckt oa22_x2 i0=$abc$109383$new_n53814_ i1=$abc$109383$new_n53799_ i2=$abc$109383$new_n53796_ q=$abc$109383$new_n53815_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53815_ i1=soc.cpu.minerva.fetch.ibus__adr[22] q=$abc$109383$new_n53816_
-.subckt a2_x2 i0=$abc$109383$new_n53816_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104140
+.subckt and21nor_x1 i0=$abc$109383$new_n53781_ i1=$abc$109383$new_n53783_ i2=$abc$109383$new_n53810_ nq=$abc$109383$new_n53811_
+.subckt or2_x1 i0=$abc$109383$new_n53811_ i1=$abc$109383$new_n53809_ q=$abc$109383$new_n53812_
+.subckt nexor2_x0 i0=$abc$109383$new_n53812_ i1=$abc$109383$new_n53806_ nq=$abc$109383$new_n53813_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53813_ i2=$abc$109383$new_n53803_ nq=$abc$109383$new_n53814_
+.subckt or21nand_x1 i0=$abc$109383$new_n53814_ i1=$abc$109383$new_n53799_ i2=$abc$109383$new_n53796_ nq=$abc$109383$new_n53815_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53815_ i1=soc.cpu.minerva.fetch.ibus__adr[22] q=$abc$109383$new_n53816_
+.subckt and2_x1 i0=$abc$109383$new_n53816_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104140
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[25] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53818_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[25] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53819_
 .subckt nand2_x0 i0=$abc$109383$new_n53819_ i1=$abc$109383$new_n53818_ nq=$abc$109383$new_n53820_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53820_ i1=soc.cpu.minerva.exception.mepc__r__base[23] q=$abc$109383$new_n53821_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53821_ i1=soc.cpu.minerva.exception.mtvec__r__base[23] q=$abc$109383$new_n53822_
-.subckt a2_x2 i0=$abc$109383$new_n53822_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53823_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53820_ i1=soc.cpu.minerva.exception.mepc__r__base[23] q=$abc$109383$new_n53821_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53821_ i1=soc.cpu.minerva.exception.mtvec__r__base[23] q=$abc$109383$new_n53822_
+.subckt and2_x1 i0=$abc$109383$new_n53822_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53823_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[25] nq=$abc$109383$new_n53824_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53824_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53825_
-.subckt a2_x2 i0=$abc$109383$new_n53825_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53826_
+.subckt and2_x1 i0=$abc$109383$new_n53825_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53826_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[25] nq=$abc$109383$new_n53827_
-.subckt a2_x2 i0=$abc$109383$new_n53801_ i1=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n53828_
-.subckt nxr2_x1 i0=$abc$109383$new_n53828_ i1=$abc$109383$new_n53827_ nq=$abc$109383$new_n53829_
-.subckt oa22_x2 i0=$abc$109383$new_n53829_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53830_
+.subckt and2_x1 i0=$abc$109383$new_n53801_ i1=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n53828_
+.subckt nexor2_x0 i0=$abc$109383$new_n53828_ i1=$abc$109383$new_n53827_ nq=$abc$109383$new_n53829_
+.subckt or21nand_x1 i0=$abc$109383$new_n53829_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53830_
 .subckt buf_x4 i=$abc$109383$new_n15385_ q=$abc$109383$new_n53831_
-.subckt a2_x2 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15495_ q=$abc$109383$new_n53832_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53832_ q=$abc$109383$new_n53833_
-.subckt a2_x2 i0=$abc$109383$new_n53833_ i1=soc.cpu.minerva.payload__pc$27[24] q=$abc$109383$new_n53834_
-.subckt nxr2_x1 i0=$abc$109383$new_n53805_ i1=soc.cpu.minerva.payload__pc$27[24] nq=$abc$109383$new_n53835_
-.subckt ao22_x2 i0=$abc$109383$new_n53809_ i1=$abc$109383$new_n53811_ i2=$abc$109383$new_n53835_ q=$abc$109383$new_n53836_
+.subckt and2_x1 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15495_ q=$abc$109383$new_n53832_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53832_ nq=$abc$109383$new_n53833_
+.subckt and2_x1 i0=$abc$109383$new_n53833_ i1=soc.cpu.minerva.payload__pc$27[24] q=$abc$109383$new_n53834_
+.subckt nexor2_x0 i0=$abc$109383$new_n53805_ i1=soc.cpu.minerva.payload__pc$27[24] nq=$abc$109383$new_n53835_
+.subckt and21nor_x1 i0=$abc$109383$new_n53809_ i1=$abc$109383$new_n53811_ i2=$abc$109383$new_n53835_ nq=$abc$109383$new_n53836_
 .subckt nor2_x0 i0=$abc$109383$new_n53836_ i1=$abc$109383$new_n53834_ nq=$abc$109383$new_n53837_
 .subckt nand2_x0 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15321_ nq=$abc$109383$new_n53838_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53838_ q=$abc$109383$new_n53839_
-.subckt nxr2_x1 i0=$abc$109383$new_n53839_ i1=soc.cpu.minerva.payload__pc$27[25] nq=$abc$109383$new_n53840_
-.subckt nxr2_x1 i0=$abc$109383$new_n53840_ i1=$abc$109383$new_n53837_ nq=$abc$109383$new_n53841_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53841_ i2=$abc$109383$new_n53830_ q=$abc$109383$new_n53842_
-.subckt oa22_x2 i0=$abc$109383$new_n53842_ i1=$abc$109383$new_n53826_ i2=$abc$109383$new_n53823_ q=$abc$109383$new_n53843_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53843_ i1=soc.cpu.minerva.fetch.ibus__adr[23] q=$abc$109383$new_n53844_
-.subckt a2_x2 i0=$abc$109383$new_n53844_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104144
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53838_ nq=$abc$109383$new_n53839_
+.subckt nexor2_x0 i0=$abc$109383$new_n53839_ i1=soc.cpu.minerva.payload__pc$27[25] nq=$abc$109383$new_n53840_
+.subckt nexor2_x0 i0=$abc$109383$new_n53840_ i1=$abc$109383$new_n53837_ nq=$abc$109383$new_n53841_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53841_ i2=$abc$109383$new_n53830_ nq=$abc$109383$new_n53842_
+.subckt or21nand_x1 i0=$abc$109383$new_n53842_ i1=$abc$109383$new_n53826_ i2=$abc$109383$new_n53823_ nq=$abc$109383$new_n53843_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53843_ i1=soc.cpu.minerva.fetch.ibus__adr[23] q=$abc$109383$new_n53844_
+.subckt and2_x1 i0=$abc$109383$new_n53844_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104144
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[26] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53846_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[26] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53847_
 .subckt nand2_x0 i0=$abc$109383$new_n53847_ i1=$abc$109383$new_n53846_ nq=$abc$109383$new_n53848_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53848_ i1=soc.cpu.minerva.exception.mepc__r__base[24] q=$abc$109383$new_n53849_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53849_ i1=soc.cpu.minerva.exception.mtvec__r__base[24] q=$abc$109383$new_n53850_
-.subckt a2_x2 i0=$abc$109383$new_n53850_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53851_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53848_ i1=soc.cpu.minerva.exception.mepc__r__base[24] q=$abc$109383$new_n53849_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53849_ i1=soc.cpu.minerva.exception.mtvec__r__base[24] q=$abc$109383$new_n53850_
+.subckt and2_x1 i0=$abc$109383$new_n53850_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53851_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[26] nq=$abc$109383$new_n53852_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53852_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53853_
-.subckt a2_x2 i0=$abc$109383$new_n53853_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53854_
+.subckt and2_x1 i0=$abc$109383$new_n53853_ i1=$abc$109383$new_n53256_ q=$abc$109383$new_n53854_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[26] nq=$abc$109383$new_n53855_
-.subckt a3_x2 i0=$abc$109383$new_n53801_ i1=soc.cpu.minerva.payload__pc$25[25] i2=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n53856_
-.subckt nxr2_x1 i0=$abc$109383$new_n53856_ i1=$abc$109383$new_n53855_ nq=$abc$109383$new_n53857_
-.subckt oa22_x2 i0=$abc$109383$new_n53857_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53858_
+.subckt and3_x1 i0=$abc$109383$new_n53801_ i1=soc.cpu.minerva.payload__pc$25[25] i2=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n53856_
+.subckt nexor2_x0 i0=$abc$109383$new_n53856_ i1=$abc$109383$new_n53855_ nq=$abc$109383$new_n53857_
+.subckt or21nand_x1 i0=$abc$109383$new_n53857_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53858_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[6] q=$abc$109383$new_n53859_
 .subckt nand2_x0 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n53859_ nq=$abc$109383$new_n53860_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53860_ q=$abc$109383$new_n53861_
-.subckt nxr2_x1 i0=$abc$109383$new_n53861_ i1=$abc$109383$new_n53852_ nq=$abc$109383$new_n53862_
-.subckt a2_x2 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15321_ q=$abc$109383$new_n53863_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53863_ q=$abc$109383$new_n53864_
-.subckt a2_x2 i0=$abc$109383$new_n53864_ i1=soc.cpu.minerva.payload__pc$27[25] q=$abc$109383$new_n53865_
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53860_ nq=$abc$109383$new_n53861_
+.subckt nexor2_x0 i0=$abc$109383$new_n53861_ i1=$abc$109383$new_n53852_ nq=$abc$109383$new_n53862_
+.subckt and2_x1 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15321_ q=$abc$109383$new_n53863_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53863_ nq=$abc$109383$new_n53864_
+.subckt and2_x1 i0=$abc$109383$new_n53864_ i1=soc.cpu.minerva.payload__pc$27[25] q=$abc$109383$new_n53865_
 .subckt nand2_x0 i0=$abc$109383$new_n53839_ i1=$abc$109383$new_n53824_ nq=$abc$109383$new_n53866_
-.subckt ao22_x2 i0=$abc$109383$new_n53834_ i1=$abc$109383$new_n53836_ i2=$abc$109383$new_n53866_ q=$abc$109383$new_n53867_
-.subckt o2_x2 i0=$abc$109383$new_n53867_ i1=$abc$109383$new_n53865_ q=$abc$109383$new_n53868_
-.subckt nxr2_x1 i0=$abc$109383$new_n53868_ i1=$abc$109383$new_n53862_ nq=$abc$109383$new_n53869_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53869_ i2=$abc$109383$new_n53858_ q=$abc$109383$new_n53870_
-.subckt oa22_x2 i0=$abc$109383$new_n53870_ i1=$abc$109383$new_n53854_ i2=$abc$109383$new_n53851_ q=$abc$109383$new_n53871_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53871_ i1=soc.cpu.minerva.fetch.ibus__adr[24] q=$abc$109383$new_n53872_
-.subckt a2_x2 i0=$abc$109383$new_n53872_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104148
+.subckt and21nor_x1 i0=$abc$109383$new_n53834_ i1=$abc$109383$new_n53836_ i2=$abc$109383$new_n53866_ nq=$abc$109383$new_n53867_
+.subckt or2_x1 i0=$abc$109383$new_n53867_ i1=$abc$109383$new_n53865_ q=$abc$109383$new_n53868_
+.subckt nexor2_x0 i0=$abc$109383$new_n53868_ i1=$abc$109383$new_n53862_ nq=$abc$109383$new_n53869_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53869_ i2=$abc$109383$new_n53858_ nq=$abc$109383$new_n53870_
+.subckt or21nand_x1 i0=$abc$109383$new_n53870_ i1=$abc$109383$new_n53854_ i2=$abc$109383$new_n53851_ nq=$abc$109383$new_n53871_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53871_ i1=soc.cpu.minerva.fetch.ibus__adr[24] q=$abc$109383$new_n53872_
+.subckt and2_x1 i0=$abc$109383$new_n53872_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104148
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[27] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53874_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[27] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53875_
 .subckt nand2_x0 i0=$abc$109383$new_n53875_ i1=$abc$109383$new_n53874_ nq=$abc$109383$new_n53876_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53876_ i1=soc.cpu.minerva.exception.mepc__r__base[25] q=$abc$109383$new_n53877_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53877_ i1=soc.cpu.minerva.exception.mtvec__r__base[25] q=$abc$109383$new_n53878_
-.subckt a2_x2 i0=$abc$109383$new_n53878_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53879_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53876_ i1=soc.cpu.minerva.exception.mepc__r__base[25] q=$abc$109383$new_n53877_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53877_ i1=soc.cpu.minerva.exception.mtvec__r__base[25] q=$abc$109383$new_n53878_
+.subckt and2_x1 i0=$abc$109383$new_n53878_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53879_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[27] nq=$abc$109383$new_n53880_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53880_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53881_
-.subckt a2_x2 i0=$abc$109383$new_n53881_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53882_
+.subckt and2_x1 i0=$abc$109383$new_n53881_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53882_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[27] nq=$abc$109383$new_n53883_
-.subckt a4_x2 i0=$abc$109383$new_n53801_ i1=soc.cpu.minerva.payload__pc$25[26] i2=soc.cpu.minerva.payload__pc$25[25] i3=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n53884_
-.subckt nxr2_x1 i0=$abc$109383$new_n53884_ i1=$abc$109383$new_n53883_ nq=$abc$109383$new_n53885_
-.subckt oa22_x2 i0=$abc$109383$new_n53885_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53886_
-.subckt a2_x2 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n53859_ q=$abc$109383$new_n53887_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53887_ q=$abc$109383$new_n53888_
-.subckt a2_x2 i0=$abc$109383$new_n53888_ i1=soc.cpu.minerva.payload__pc$27[26] q=$abc$109383$new_n53889_
-.subckt nxr2_x1 i0=$abc$109383$new_n53861_ i1=soc.cpu.minerva.payload__pc$27[26] nq=$abc$109383$new_n53890_
-.subckt ao22_x2 i0=$abc$109383$new_n53865_ i1=$abc$109383$new_n53867_ i2=$abc$109383$new_n53890_ q=$abc$109383$new_n53891_
+.subckt and4_x1 i0=$abc$109383$new_n53801_ i1=soc.cpu.minerva.payload__pc$25[26] i2=soc.cpu.minerva.payload__pc$25[25] i3=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n53884_
+.subckt nexor2_x0 i0=$abc$109383$new_n53884_ i1=$abc$109383$new_n53883_ nq=$abc$109383$new_n53885_
+.subckt or21nand_x1 i0=$abc$109383$new_n53885_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53886_
+.subckt and2_x1 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n53859_ q=$abc$109383$new_n53887_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n15323_ i2=$abc$109383$new_n53887_ nq=$abc$109383$new_n53888_
+.subckt and2_x1 i0=$abc$109383$new_n53888_ i1=soc.cpu.minerva.payload__pc$27[26] q=$abc$109383$new_n53889_
+.subckt nexor2_x0 i0=$abc$109383$new_n53861_ i1=soc.cpu.minerva.payload__pc$27[26] nq=$abc$109383$new_n53890_
+.subckt and21nor_x1 i0=$abc$109383$new_n53865_ i1=$abc$109383$new_n53867_ i2=$abc$109383$new_n53890_ nq=$abc$109383$new_n53891_
 .subckt nor2_x0 i0=$abc$109383$new_n53891_ i1=$abc$109383$new_n53889_ nq=$abc$109383$new_n53892_
 .subckt nand2_x0 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15467_ nq=$abc$109383$new_n53893_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53893_ q=$abc$109383$new_n53894_
-.subckt nxr2_x1 i0=$abc$109383$new_n53894_ i1=soc.cpu.minerva.payload__pc$27[27] nq=$abc$109383$new_n53895_
-.subckt nxr2_x1 i0=$abc$109383$new_n53895_ i1=$abc$109383$new_n53892_ nq=$abc$109383$new_n53896_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53896_ i2=$abc$109383$new_n53886_ q=$abc$109383$new_n53897_
-.subckt oa22_x2 i0=$abc$109383$new_n53897_ i1=$abc$109383$new_n53882_ i2=$abc$109383$new_n53879_ q=$abc$109383$new_n53898_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53898_ i1=soc.cpu.minerva.fetch.ibus__adr[25] q=$abc$109383$new_n53899_
-.subckt a2_x2 i0=$abc$109383$new_n53899_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104152
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53893_ nq=$abc$109383$new_n53894_
+.subckt nexor2_x0 i0=$abc$109383$new_n53894_ i1=soc.cpu.minerva.payload__pc$27[27] nq=$abc$109383$new_n53895_
+.subckt nexor2_x0 i0=$abc$109383$new_n53895_ i1=$abc$109383$new_n53892_ nq=$abc$109383$new_n53896_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53896_ i2=$abc$109383$new_n53886_ nq=$abc$109383$new_n53897_
+.subckt or21nand_x1 i0=$abc$109383$new_n53897_ i1=$abc$109383$new_n53882_ i2=$abc$109383$new_n53879_ nq=$abc$109383$new_n53898_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53898_ i1=soc.cpu.minerva.fetch.ibus__adr[25] q=$abc$109383$new_n53899_
+.subckt and2_x1 i0=$abc$109383$new_n53899_ i1=$abc$109383$new_n53573_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104152
 .subckt buf_x4 i=$abc$109383$new_n53158_ q=$abc$109383$new_n53901_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[28] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53902_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[28] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53903_
 .subckt nand2_x0 i0=$abc$109383$new_n53903_ i1=$abc$109383$new_n53902_ nq=$abc$109383$new_n53904_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53904_ i1=soc.cpu.minerva.exception.mepc__r__base[26] q=$abc$109383$new_n53905_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53905_ i1=soc.cpu.minerva.exception.mtvec__r__base[26] q=$abc$109383$new_n53906_
-.subckt a2_x2 i0=$abc$109383$new_n53906_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53907_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53904_ i1=soc.cpu.minerva.exception.mepc__r__base[26] q=$abc$109383$new_n53905_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53905_ i1=soc.cpu.minerva.exception.mtvec__r__base[26] q=$abc$109383$new_n53906_
+.subckt and2_x1 i0=$abc$109383$new_n53906_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53907_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[28] nq=$abc$109383$new_n53908_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53908_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53909_
-.subckt a2_x2 i0=$abc$109383$new_n53909_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53910_
+.subckt and2_x1 i0=$abc$109383$new_n53909_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53910_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[28] nq=$abc$109383$new_n53911_
-.subckt a2_x2 i0=$abc$109383$new_n53884_ i1=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n53912_
-.subckt nxr2_x1 i0=$abc$109383$new_n53912_ i1=$abc$109383$new_n53911_ nq=$abc$109383$new_n53913_
-.subckt oa22_x2 i0=$abc$109383$new_n53913_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53914_
+.subckt and2_x1 i0=$abc$109383$new_n53884_ i1=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n53912_
+.subckt nexor2_x0 i0=$abc$109383$new_n53912_ i1=$abc$109383$new_n53911_ nq=$abc$109383$new_n53913_
+.subckt or21nand_x1 i0=$abc$109383$new_n53913_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53914_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[8] q=$abc$109383$new_n53915_
 .subckt nand2_x0 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n53915_ nq=$abc$109383$new_n53916_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53916_ q=$abc$109383$new_n53917_
-.subckt nxr2_x1 i0=$abc$109383$new_n53917_ i1=$abc$109383$new_n53908_ nq=$abc$109383$new_n53918_
-.subckt a2_x2 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15467_ q=$abc$109383$new_n53919_
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53916_ nq=$abc$109383$new_n53917_
+.subckt nexor2_x0 i0=$abc$109383$new_n53917_ i1=$abc$109383$new_n53908_ nq=$abc$109383$new_n53918_
+.subckt and2_x1 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n15467_ q=$abc$109383$new_n53919_
 .subckt buf_x4 i=$abc$109383$new_n15323_ q=$abc$109383$new_n53920_
-.subckt oa22_x2 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n53919_ q=$abc$109383$new_n53921_
-.subckt a2_x2 i0=$abc$109383$new_n53921_ i1=soc.cpu.minerva.payload__pc$27[27] q=$abc$109383$new_n53922_
+.subckt or21nand_x1 i0=$abc$109383$new_n52650_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n53919_ nq=$abc$109383$new_n53921_
+.subckt and2_x1 i0=$abc$109383$new_n53921_ i1=soc.cpu.minerva.payload__pc$27[27] q=$abc$109383$new_n53922_
 .subckt nand2_x0 i0=$abc$109383$new_n53894_ i1=$abc$109383$new_n53880_ nq=$abc$109383$new_n53923_
-.subckt ao22_x2 i0=$abc$109383$new_n53889_ i1=$abc$109383$new_n53891_ i2=$abc$109383$new_n53923_ q=$abc$109383$new_n53924_
-.subckt o2_x2 i0=$abc$109383$new_n53924_ i1=$abc$109383$new_n53922_ q=$abc$109383$new_n53925_
-.subckt nxr2_x1 i0=$abc$109383$new_n53925_ i1=$abc$109383$new_n53918_ nq=$abc$109383$new_n53926_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53926_ i2=$abc$109383$new_n53914_ q=$abc$109383$new_n53927_
-.subckt oa22_x2 i0=$abc$109383$new_n53927_ i1=$abc$109383$new_n53910_ i2=$abc$109383$new_n53907_ q=$abc$109383$new_n53928_
-.subckt mx2_x2 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53928_ i1=soc.cpu.minerva.fetch.ibus__adr[26] q=$abc$109383$new_n53929_
-.subckt a2_x2 i0=$abc$109383$new_n53929_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104156
+.subckt and21nor_x1 i0=$abc$109383$new_n53889_ i1=$abc$109383$new_n53891_ i2=$abc$109383$new_n53923_ nq=$abc$109383$new_n53924_
+.subckt or2_x1 i0=$abc$109383$new_n53924_ i1=$abc$109383$new_n53922_ q=$abc$109383$new_n53925_
+.subckt nexor2_x0 i0=$abc$109383$new_n53925_ i1=$abc$109383$new_n53918_ nq=$abc$109383$new_n53926_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53926_ i2=$abc$109383$new_n53914_ nq=$abc$109383$new_n53927_
+.subckt or21nand_x1 i0=$abc$109383$new_n53927_ i1=$abc$109383$new_n53910_ i2=$abc$109383$new_n53907_ nq=$abc$109383$new_n53928_
+.subckt mux2_x1 cmd=$abc$109383$new_n53643_ i0=$abc$109383$new_n53928_ i1=soc.cpu.minerva.fetch.ibus__adr[26] q=$abc$109383$new_n53929_
+.subckt and2_x1 i0=$abc$109383$new_n53929_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104156
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[29] i1=$abc$109383$new_n53249_ i2=$abc$109383$new_n53248_ nq=$abc$109383$new_n53931_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[29] i1=$abc$109383$new_n53279_ i2=$abc$109383$new_n53278_ nq=$abc$109383$new_n53932_
 .subckt nand2_x0 i0=$abc$109383$new_n53932_ i1=$abc$109383$new_n53931_ nq=$abc$109383$new_n53933_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53933_ i1=soc.cpu.minerva.exception.mepc__r__base[27] q=$abc$109383$new_n53934_
-.subckt mx2_x2 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53934_ i1=soc.cpu.minerva.exception.mtvec__r__base[27] q=$abc$109383$new_n53935_
-.subckt a2_x2 i0=$abc$109383$new_n53935_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53936_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53933_ i1=soc.cpu.minerva.exception.mepc__r__base[27] q=$abc$109383$new_n53934_
+.subckt mux2_x1 cmd=$abc$109383$new_n53680_ i0=$abc$109383$new_n53934_ i1=soc.cpu.minerva.exception.mtvec__r__base[27] q=$abc$109383$new_n53935_
+.subckt and2_x1 i0=$abc$109383$new_n53935_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53936_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[29] nq=$abc$109383$new_n53937_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53937_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53938_
-.subckt a2_x2 i0=$abc$109383$new_n53938_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53939_
+.subckt and2_x1 i0=$abc$109383$new_n53938_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53939_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[29] nq=$abc$109383$new_n53940_
-.subckt a3_x2 i0=$abc$109383$new_n53884_ i1=soc.cpu.minerva.payload__pc$25[28] i2=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n53941_
-.subckt nxr2_x1 i0=$abc$109383$new_n53941_ i1=$abc$109383$new_n53940_ nq=$abc$109383$new_n53942_
-.subckt oa22_x2 i0=$abc$109383$new_n53942_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53943_
-.subckt a2_x2 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n53915_ q=$abc$109383$new_n53944_
-.subckt oa22_x2 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n53944_ q=$abc$109383$new_n53945_
-.subckt a2_x2 i0=$abc$109383$new_n53945_ i1=soc.cpu.minerva.payload__pc$27[28] q=$abc$109383$new_n53946_
-.subckt nxr2_x1 i0=$abc$109383$new_n53917_ i1=soc.cpu.minerva.payload__pc$27[28] nq=$abc$109383$new_n53947_
-.subckt ao22_x2 i0=$abc$109383$new_n53922_ i1=$abc$109383$new_n53924_ i2=$abc$109383$new_n53947_ q=$abc$109383$new_n53948_
+.subckt and3_x1 i0=$abc$109383$new_n53884_ i1=soc.cpu.minerva.payload__pc$25[28] i2=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n53941_
+.subckt nexor2_x0 i0=$abc$109383$new_n53941_ i1=$abc$109383$new_n53940_ nq=$abc$109383$new_n53942_
+.subckt or21nand_x1 i0=$abc$109383$new_n53942_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53943_
+.subckt and2_x1 i0=$abc$109383$new_n53831_ i1=$abc$109383$new_n53915_ q=$abc$109383$new_n53944_
+.subckt or21nand_x1 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n53944_ nq=$abc$109383$new_n53945_
+.subckt and2_x1 i0=$abc$109383$new_n53945_ i1=soc.cpu.minerva.payload__pc$27[28] q=$abc$109383$new_n53946_
+.subckt nexor2_x0 i0=$abc$109383$new_n53917_ i1=soc.cpu.minerva.payload__pc$27[28] nq=$abc$109383$new_n53947_
+.subckt and21nor_x1 i0=$abc$109383$new_n53922_ i1=$abc$109383$new_n53924_ i2=$abc$109383$new_n53947_ nq=$abc$109383$new_n53948_
 .subckt nor2_x0 i0=$abc$109383$new_n53948_ i1=$abc$109383$new_n53946_ nq=$abc$109383$new_n53949_
-.subckt nxr2_x1 i0=$abc$109383$new_n15391_ i1=soc.cpu.minerva.payload__pc$27[29] nq=$abc$109383$new_n53950_
-.subckt nxr2_x1 i0=$abc$109383$new_n53950_ i1=$abc$109383$new_n53949_ nq=$abc$109383$new_n53951_
-.subckt oa22_x2 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53951_ i2=$abc$109383$new_n53943_ q=$abc$109383$new_n53952_
-.subckt oa22_x2 i0=$abc$109383$new_n53952_ i1=$abc$109383$new_n53939_ i2=$abc$109383$new_n53936_ q=$abc$109383$new_n53953_
+.subckt nexor2_x0 i0=$abc$109383$new_n15391_ i1=soc.cpu.minerva.payload__pc$27[29] nq=$abc$109383$new_n53950_
+.subckt nexor2_x0 i0=$abc$109383$new_n53950_ i1=$abc$109383$new_n53949_ nq=$abc$109383$new_n53951_
+.subckt or21nand_x1 i0=$abc$109383$new_n53657_ i1=$abc$109383$new_n53951_ i2=$abc$109383$new_n53943_ nq=$abc$109383$new_n53952_
+.subckt or21nand_x1 i0=$abc$109383$new_n53952_ i1=$abc$109383$new_n53939_ i2=$abc$109383$new_n53936_ nq=$abc$109383$new_n53953_
 .subckt buf_x4 i=$abc$109383$new_n15514_ q=$abc$109383$new_n53954_
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53953_ i1=soc.cpu.minerva.fetch.ibus__adr[27] q=$abc$109383$new_n53955_
-.subckt a2_x2 i0=$abc$109383$new_n53955_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104160
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53953_ i1=soc.cpu.minerva.fetch.ibus__adr[27] q=$abc$109383$new_n53955_
+.subckt and2_x1 i0=$abc$109383$new_n53955_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104160
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[30] i1=$abc$109383$new_n53381_ i2=$abc$109383$new_n53380_ nq=$abc$109383$new_n53957_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[30] i1=$abc$109383$new_n53384_ i2=$abc$109383$new_n53383_ nq=$abc$109383$new_n53958_
 .subckt nand2_x0 i0=$abc$109383$new_n53958_ i1=$abc$109383$new_n53957_ nq=$abc$109383$new_n53959_
-.subckt mx2_x2 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53959_ i1=soc.cpu.minerva.exception.mepc__r__base[28] q=$abc$109383$new_n53960_
-.subckt mx2_x2 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53960_ i1=soc.cpu.minerva.exception.mtvec__r__base[28] q=$abc$109383$new_n53961_
-.subckt a2_x2 i0=$abc$109383$new_n53961_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53962_
+.subckt mux2_x1 cmd=$abc$109383$new_n53387_ i0=$abc$109383$new_n53959_ i1=soc.cpu.minerva.exception.mepc__r__base[28] q=$abc$109383$new_n53960_
+.subckt mux2_x1 cmd=$abc$109383$new_n53389_ i0=$abc$109383$new_n53960_ i1=soc.cpu.minerva.exception.mtvec__r__base[28] q=$abc$109383$new_n53961_
+.subckt and2_x1 i0=$abc$109383$new_n53961_ i1=$abc$109383$new_n53379_ q=$abc$109383$new_n53962_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$27[30] nq=$abc$109383$new_n53963_
 .subckt nand4_x0 i0=$abc$109383$new_n53685_ i1=$abc$109383$new_n53963_ i2=$abc$109383$new_n53552_ i3=$abc$109383$new_n53683_ nq=$abc$109383$new_n53964_
-.subckt a2_x2 i0=$abc$109383$new_n53964_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53965_
+.subckt and2_x1 i0=$abc$109383$new_n53964_ i1=$abc$109383$new_n53402_ q=$abc$109383$new_n53965_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[30] nq=$abc$109383$new_n53966_
-.subckt a4_x2 i0=$abc$109383$new_n53884_ i1=soc.cpu.minerva.payload__pc$25[29] i2=soc.cpu.minerva.payload__pc$25[28] i3=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n53967_
-.subckt nxr2_x1 i0=$abc$109383$new_n53967_ i1=$abc$109383$new_n53966_ nq=$abc$109383$new_n53968_
-.subckt oa22_x2 i0=$abc$109383$new_n53968_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ q=$abc$109383$new_n53969_
+.subckt and4_x1 i0=$abc$109383$new_n53884_ i1=soc.cpu.minerva.payload__pc$25[29] i2=soc.cpu.minerva.payload__pc$25[28] i3=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n53967_
+.subckt nexor2_x0 i0=$abc$109383$new_n53967_ i1=$abc$109383$new_n53966_ nq=$abc$109383$new_n53968_
+.subckt or21nand_x1 i0=$abc$109383$new_n53968_ i1=$abc$109383$new_n53688_ i2=$abc$109383$new_n53556_ nq=$abc$109383$new_n53969_
 .subckt buf_x4 i=$abc$109383$new_n53831_ q=$abc$109383$new_n53970_
 .subckt nand2_x0 i0=$abc$109383$new_n53970_ i1=soc.cpu.minerva.csrf_rp__addr[10] nq=$abc$109383$new_n53971_
-.subckt ao22_x2 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53971_ q=$abc$109383$new_n53972_
-.subckt nxr2_x1 i0=$abc$109383$new_n53972_ i1=$abc$109383$new_n53963_ nq=$abc$109383$new_n53973_
-.subckt a2_x2 i0=$abc$109383$new_n53970_ i1=$abc$109383$new_n15263_ q=$abc$109383$new_n53974_
-.subckt oa22_x2 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n53974_ q=$abc$109383$new_n53975_
-.subckt a2_x2 i0=$abc$109383$new_n53975_ i1=soc.cpu.minerva.payload__pc$27[29] q=$abc$109383$new_n53976_
+.subckt and21nor_x1 i0=$abc$109383$new_n53669_ i1=$abc$109383$new_n15390_ i2=$abc$109383$new_n53971_ nq=$abc$109383$new_n53972_
+.subckt nexor2_x0 i0=$abc$109383$new_n53972_ i1=$abc$109383$new_n53963_ nq=$abc$109383$new_n53973_
+.subckt and2_x1 i0=$abc$109383$new_n53970_ i1=$abc$109383$new_n15263_ q=$abc$109383$new_n53974_
+.subckt or21nand_x1 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n53974_ nq=$abc$109383$new_n53975_
+.subckt and2_x1 i0=$abc$109383$new_n53975_ i1=soc.cpu.minerva.payload__pc$27[29] q=$abc$109383$new_n53976_
 .subckt nand2_x0 i0=$abc$109383$new_n15391_ i1=$abc$109383$new_n53937_ nq=$abc$109383$new_n53977_
-.subckt ao22_x2 i0=$abc$109383$new_n53946_ i1=$abc$109383$new_n53948_ i2=$abc$109383$new_n53977_ q=$abc$109383$new_n53978_
-.subckt o2_x2 i0=$abc$109383$new_n53978_ i1=$abc$109383$new_n53976_ q=$abc$109383$new_n53979_
-.subckt nxr2_x1 i0=$abc$109383$new_n53979_ i1=$abc$109383$new_n53973_ nq=$abc$109383$new_n53980_
-.subckt oa22_x2 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53980_ i2=$abc$109383$new_n53969_ q=$abc$109383$new_n53981_
-.subckt oa22_x2 i0=$abc$109383$new_n53981_ i1=$abc$109383$new_n53965_ i2=$abc$109383$new_n53962_ q=$abc$109383$new_n53982_
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53982_ i1=soc.cpu.minerva.fetch.ibus__adr[28] q=$abc$109383$new_n53983_
-.subckt a2_x2 i0=$abc$109383$new_n53983_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104164
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[29] q=$abc$109383$new_n53985_
+.subckt and21nor_x1 i0=$abc$109383$new_n53946_ i1=$abc$109383$new_n53948_ i2=$abc$109383$new_n53977_ nq=$abc$109383$new_n53978_
+.subckt or2_x1 i0=$abc$109383$new_n53978_ i1=$abc$109383$new_n53976_ q=$abc$109383$new_n53979_
+.subckt nexor2_x0 i0=$abc$109383$new_n53979_ i1=$abc$109383$new_n53973_ nq=$abc$109383$new_n53980_
+.subckt or21nand_x1 i0=$abc$109383$new_n53320_ i1=$abc$109383$new_n53980_ i2=$abc$109383$new_n53969_ nq=$abc$109383$new_n53981_
+.subckt or21nand_x1 i0=$abc$109383$new_n53981_ i1=$abc$109383$new_n53965_ i2=$abc$109383$new_n53962_ nq=$abc$109383$new_n53982_
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53982_ i1=soc.cpu.minerva.fetch.ibus__adr[28] q=$abc$109383$new_n53983_
+.subckt and2_x1 i0=$abc$109383$new_n53983_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104164
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n30036_ i2=soc.cpu.minerva.fetch.ibus__adr[29] nq=$abc$109383$new_n53985_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[31] i1=$abc$109383$new_n53218_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n53986_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__branch_target$109[31] i1=$abc$109383$new_n53221_ i2=$abc$109383$new_n53220_ nq=$abc$109383$new_n53987_
-.subckt oa22_x2 i0=$abc$109383$new_n53987_ i1=$abc$109383$new_n53986_ i2=$abc$109383$new_n53216_ q=$abc$109383$new_n53988_
+.subckt or21nand_x1 i0=$abc$109383$new_n53987_ i1=$abc$109383$new_n53986_ i2=$abc$109383$new_n53216_ nq=$abc$109383$new_n53988_
 .subckt nand2_x0 i0=soc.cpu.minerva.exception.mepc__r__base[29] i1=$abc$109383$new_n53224_ nq=$abc$109383$new_n53989_
-.subckt oa22_x2 i0=$abc$109383$new_n53989_ i1=$abc$109383$new_n53988_ i2=$abc$109383$new_n53228_ q=$abc$109383$new_n53990_
+.subckt or21nand_x1 i0=$abc$109383$new_n53989_ i1=$abc$109383$new_n53988_ i2=$abc$109383$new_n53228_ nq=$abc$109383$new_n53990_
 .subckt nand2_x0 i0=$abc$109383$new_n53312_ i1=soc.cpu.minerva.exception.mtvec__r__base[29] nq=$abc$109383$new_n53991_
 .subckt nand4_x0 i0=$abc$109383$new_n53991_ i1=$abc$109383$new_n53990_ i2=$abc$109383$new_n15253_ i3=$abc$109383$new_n28911_ nq=$abc$109383$new_n53992_
-.subckt a3_x2 i0=$abc$109383$new_n53992_ i1=$abc$109383$new_n30141_ i2=$abc$109383$new_n29996_ q=$abc$109383$new_n53993_
+.subckt and3_x1 i0=$abc$109383$new_n53992_ i1=$abc$109383$new_n30141_ i2=$abc$109383$new_n29996_ q=$abc$109383$new_n53993_
 .subckt nand4_x0 i0=$abc$109383$new_n29197_ i1=soc.cpu.minerva.payload__pc$27[31] i2=$abc$109383$new_n53238_ i3=$abc$109383$new_n29193_ nq=$abc$109383$new_n53994_
 .subckt nand2_x0 i0=$abc$109383$new_n53994_ i1=$abc$109383$new_n53237_ nq=$abc$109383$new_n53995_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[31] nq=$abc$109383$new_n53996_
-.subckt a2_x2 i0=$abc$109383$new_n53967_ i1=soc.cpu.minerva.payload__pc$25[30] q=$abc$109383$new_n53997_
-.subckt nxr2_x1 i0=$abc$109383$new_n53997_ i1=$abc$109383$new_n53996_ nq=$abc$109383$new_n53998_
-.subckt ao22_x2 i0=$abc$109383$new_n53998_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ q=$abc$109383$new_n53999_
+.subckt and2_x1 i0=$abc$109383$new_n53967_ i1=soc.cpu.minerva.payload__pc$25[30] q=$abc$109383$new_n53997_
+.subckt nexor2_x0 i0=$abc$109383$new_n53997_ i1=$abc$109383$new_n53996_ nq=$abc$109383$new_n53998_
+.subckt and21nor_x1 i0=$abc$109383$new_n53998_ i1=$abc$109383$new_n53320_ i2=$abc$109383$new_n53231_ nq=$abc$109383$new_n53999_
 .subckt buf_x4 i=soc.cpu.minerva.csrf_rp__addr[10] q=$abc$109383$new_n54000_
-.subckt a2_x2 i0=$abc$109383$new_n53970_ i1=$abc$109383$new_n54000_ q=$abc$109383$new_n54001_
-.subckt oa22_x2 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n54001_ q=$abc$109383$new_n54002_
-.subckt a2_x2 i0=$abc$109383$new_n54002_ i1=soc.cpu.minerva.payload__pc$27[30] q=$abc$109383$new_n54003_
-.subckt nxr2_x1 i0=$abc$109383$new_n53972_ i1=soc.cpu.minerva.payload__pc$27[30] nq=$abc$109383$new_n54004_
-.subckt ao22_x2 i0=$abc$109383$new_n53976_ i1=$abc$109383$new_n53978_ i2=$abc$109383$new_n54004_ q=$abc$109383$new_n54005_
+.subckt and2_x1 i0=$abc$109383$new_n53970_ i1=$abc$109383$new_n54000_ q=$abc$109383$new_n54001_
+.subckt or21nand_x1 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n53920_ i2=$abc$109383$new_n54001_ nq=$abc$109383$new_n54002_
+.subckt and2_x1 i0=$abc$109383$new_n54002_ i1=soc.cpu.minerva.payload__pc$27[30] q=$abc$109383$new_n54003_
+.subckt nexor2_x0 i0=$abc$109383$new_n53972_ i1=soc.cpu.minerva.payload__pc$27[30] nq=$abc$109383$new_n54004_
+.subckt and21nor_x1 i0=$abc$109383$new_n53976_ i1=$abc$109383$new_n53978_ i2=$abc$109383$new_n54004_ nq=$abc$109383$new_n54005_
 .subckt nor2_x0 i0=$abc$109383$new_n54005_ i1=$abc$109383$new_n54003_ nq=$abc$109383$new_n54006_
 .subckt buf_x4 i=$abc$109383$new_n15364_ q=$abc$109383$new_n54007_
-.subckt oa22_x2 i0=$abc$109383$new_n15390_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n53669_ q=$abc$109383$new_n54008_
-.subckt nxr2_x1 i0=$abc$109383$new_n54008_ i1=soc.cpu.minerva.payload__pc$27[31] nq=$abc$109383$new_n54009_
-.subckt nxr2_x1 i0=$abc$109383$new_n54009_ i1=$abc$109383$new_n54006_ nq=$abc$109383$new_n54010_
-.subckt ao22_x2 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n54010_ i2=$abc$109383$new_n53999_ q=$abc$109383$new_n54011_
-.subckt ao22_x2 i0=$abc$109383$new_n54011_ i1=$abc$109383$new_n53995_ i2=$abc$109383$new_n53993_ q=$abc$109383$new_n54012_
-.subckt ao22_x2 i0=$abc$109383$new_n54012_ i1=$abc$109383$new_n53985_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104168
-.subckt a4_x2 i0=$abc$109383$new_n52662_ i1=$abc$109383$new_n52661_ i2=$abc$109383$new_n52658_ i3=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n54014_
-.subckt oa22_x2 i0=$abc$109383$new_n52667_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n54014_ q=$abc$109383$new_n54015_
-.subckt a2_x2 i0=$abc$109383$new_n54015_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104170
+.subckt or21nand_x1 i0=$abc$109383$new_n15390_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n53669_ nq=$abc$109383$new_n54008_
+.subckt nexor2_x0 i0=$abc$109383$new_n54008_ i1=soc.cpu.minerva.payload__pc$27[31] nq=$abc$109383$new_n54009_
+.subckt nexor2_x0 i0=$abc$109383$new_n54009_ i1=$abc$109383$new_n54006_ nq=$abc$109383$new_n54010_
+.subckt and21nor_x1 i0=$abc$109383$new_n52658_ i1=$abc$109383$new_n54010_ i2=$abc$109383$new_n53999_ nq=$abc$109383$new_n54011_
+.subckt and21nor_x1 i0=$abc$109383$new_n54011_ i1=$abc$109383$new_n53995_ i2=$abc$109383$new_n53993_ nq=$abc$109383$new_n54012_
+.subckt and21nor_x1 i0=$abc$109383$new_n54012_ i1=$abc$109383$new_n53985_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104168
+.subckt and4_x1 i0=$abc$109383$new_n52662_ i1=$abc$109383$new_n52661_ i2=$abc$109383$new_n52658_ i3=soc.cpu.minerva.fetch.ibus__cyc q=$abc$109383$new_n54014_
+.subckt or21nand_x1 i0=$abc$109383$new_n52667_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n54014_ nq=$abc$109383$new_n54015_
+.subckt and2_x1 i0=$abc$109383$new_n54015_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104170
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n54017_
 .subckt buf_x4 i=$abc$109383$new_n54017_ q=$abc$109383$new_n54018_
 .subckt nand2_x0 i0=$abc$109383$new_n52661_ i1=$abc$109383$new_n52658_ nq=$abc$109383$new_n54019_
 .subckt nand3_x0 i0=$abc$109383$new_n54019_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n54020_
-.subckt oa22_x2 i0=soc.cpu.minerva.f.valid$1 i1=$abc$109383$new_n52649_ i2=$abc$109383$new_n40103_ q=$abc$109383$new_n54021_
-.subckt a2_x2 i0=$abc$109383$new_n54021_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n54022_
-.subckt a2_x2 i0=$abc$109383$new_n54022_ i1=$abc$109383$new_n54020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104174
+.subckt or21nand_x1 i0=soc.cpu.minerva.f.valid$1 i1=$abc$109383$new_n52649_ i2=$abc$109383$new_n40103_ nq=$abc$109383$new_n54021_
+.subckt and2_x1 i0=$abc$109383$new_n54021_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n54022_
+.subckt and2_x1 i0=$abc$109383$new_n54022_ i1=$abc$109383$new_n54020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104174
 .subckt buf_x4 i=$abc$109383$new_n43083_ q=$abc$109383$new_n54024_
 .subckt nor3_x0 i0=$abc$109383$new_n41734_ i1=$abc$109383$new_n52157_ i2=$abc$109383$new_n41737_ nq=$abc$109383$new_n54025_
 .subckt nor2_x0 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n40201_ nq=$abc$109383$new_n54026_
 .subckt nor3_x0 i0=$abc$109383$new_n36232_ i1=$abc$109383$new_n29237_ i2=$abc$109383$new_n29247_ nq=$abc$109383$new_n54027_
 .subckt nor3_x0 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n29317_ i2=$abc$109383$new_n29385_ nq=$abc$109383$new_n54028_
-.subckt a4_x2 i0=$abc$109383$new_n54028_ i1=$abc$109383$new_n54027_ i2=$abc$109383$new_n51951_ i3=$abc$109383$new_n51936_ q=$abc$109383$new_n54029_
-.subckt a4_x2 i0=$abc$109383$new_n54029_ i1=$abc$109383$new_n51993_ i2=$abc$109383$new_n51985_ i3=$abc$109383$new_n51968_ q=$abc$109383$new_n54030_
-.subckt a4_x2 i0=$abc$109383$new_n54030_ i1=$abc$109383$new_n52037_ i2=$abc$109383$new_n52025_ i3=$abc$109383$new_n38881_ q=$abc$109383$new_n54031_
-.subckt a4_x2 i0=$abc$109383$new_n54031_ i1=$abc$109383$new_n54026_ i2=$abc$109383$new_n52074_ i3=$abc$109383$new_n52054_ q=$abc$109383$new_n54032_
-.subckt a4_x2 i0=$abc$109383$new_n54032_ i1=$abc$109383$new_n52145_ i2=$abc$109383$new_n52130_ i3=$abc$109383$new_n52115_ q=$abc$109383$new_n54033_
+.subckt and4_x1 i0=$abc$109383$new_n54028_ i1=$abc$109383$new_n54027_ i2=$abc$109383$new_n51951_ i3=$abc$109383$new_n51936_ q=$abc$109383$new_n54029_
+.subckt and4_x1 i0=$abc$109383$new_n54029_ i1=$abc$109383$new_n51993_ i2=$abc$109383$new_n51985_ i3=$abc$109383$new_n51968_ q=$abc$109383$new_n54030_
+.subckt and4_x1 i0=$abc$109383$new_n54030_ i1=$abc$109383$new_n52037_ i2=$abc$109383$new_n52025_ i3=$abc$109383$new_n38881_ q=$abc$109383$new_n54031_
+.subckt and4_x1 i0=$abc$109383$new_n54031_ i1=$abc$109383$new_n54026_ i2=$abc$109383$new_n52074_ i3=$abc$109383$new_n52054_ q=$abc$109383$new_n54032_
+.subckt and4_x1 i0=$abc$109383$new_n54032_ i1=$abc$109383$new_n52145_ i2=$abc$109383$new_n52130_ i3=$abc$109383$new_n52115_ q=$abc$109383$new_n54033_
 .subckt nand4_x0 i0=$abc$109383$new_n54033_ i1=$abc$109383$new_n54025_ i2=$abc$109383$new_n52238_ i3=$abc$109383$new_n52226_ nq=$abc$109383$new_n54034_
 .subckt nor2_x0 i0=$abc$109383$new_n54034_ i1=$abc$109383$new_n52249_ nq=$abc$109383$new_n54035_
-.subckt a4_x2 i0=$abc$109383$new_n54035_ i1=$abc$109383$new_n42764_ i2=$abc$109383$new_n52283_ i3=$abc$109383$new_n52270_ q=$abc$109383$new_n54036_
+.subckt and4_x1 i0=$abc$109383$new_n54035_ i1=$abc$109383$new_n42764_ i2=$abc$109383$new_n52283_ i3=$abc$109383$new_n52270_ q=$abc$109383$new_n54036_
 .subckt buf_x4 i=$abc$109383$new_n54036_ q=$abc$109383$new_n54037_
 .subckt nand3_x0 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n52317_ i2=$abc$109383$new_n54024_ nq=$abc$109383$new_n54038_
-.subckt a4_x2 i0=$abc$109383$new_n28912_ i1=$abc$109383$new_n52326_ i2=$abc$109383$new_n29192_ i3=$abc$109383$new_n28910_ q=$abc$109383$new_n54039_
+.subckt and4_x1 i0=$abc$109383$new_n28912_ i1=$abc$109383$new_n52326_ i2=$abc$109383$new_n29192_ i3=$abc$109383$new_n28910_ q=$abc$109383$new_n54039_
 .subckt nor4_x0 i0=$abc$109383$new_n29420_ i1=$abc$109383$new_n29395_ i2=$abc$109383$new_n29475_ i3=$abc$109383$new_n29451_ nq=$abc$109383$new_n54040_
-.subckt a4_x2 i0=$abc$109383$new_n54040_ i1=$abc$109383$new_n29734_ i2=$abc$109383$new_n29738_ i3=$abc$109383$new_n29741_ q=$abc$109383$new_n54041_
-.subckt a4_x2 i0=$abc$109383$new_n54041_ i1=$abc$109383$new_n29720_ i2=$abc$109383$new_n29723_ i3=$abc$109383$new_n29731_ q=$abc$109383$new_n54042_
-.subckt a4_x2 i0=$abc$109383$new_n54042_ i1=$abc$109383$new_n29707_ i2=$abc$109383$new_n29713_ i3=$abc$109383$new_n29716_ q=$abc$109383$new_n54043_
-.subckt a4_x2 i0=$abc$109383$new_n54043_ i1=$abc$109383$new_n29696_ i2=$abc$109383$new_n29699_ i3=$abc$109383$new_n29704_ q=$abc$109383$new_n54044_
-.subckt a4_x2 i0=$abc$109383$new_n54044_ i1=$abc$109383$new_n29705_ i2=$abc$109383$new_n29700_ i3=$abc$109383$new_n29697_ q=$abc$109383$new_n54045_
-.subckt a4_x2 i0=$abc$109383$new_n54045_ i1=$abc$109383$new_n29717_ i2=$abc$109383$new_n29714_ i3=$abc$109383$new_n29708_ q=$abc$109383$new_n54046_
-.subckt a4_x2 i0=$abc$109383$new_n54046_ i1=$abc$109383$new_n29732_ i2=$abc$109383$new_n29724_ i3=$abc$109383$new_n29721_ q=$abc$109383$new_n54047_
-.subckt a4_x2 i0=$abc$109383$new_n54047_ i1=$abc$109383$new_n29742_ i2=$abc$109383$new_n29739_ i3=$abc$109383$new_n29735_ q=$abc$109383$new_n54048_
-.subckt a4_x2 i0=$abc$109383$new_n54048_ i1=$abc$109383$new_n29754_ i2=$abc$109383$new_n29750_ i3=$abc$109383$new_n29747_ q=$abc$109383$new_n54049_
+.subckt and4_x1 i0=$abc$109383$new_n54040_ i1=$abc$109383$new_n29734_ i2=$abc$109383$new_n29738_ i3=$abc$109383$new_n29741_ q=$abc$109383$new_n54041_
+.subckt and4_x1 i0=$abc$109383$new_n54041_ i1=$abc$109383$new_n29720_ i2=$abc$109383$new_n29723_ i3=$abc$109383$new_n29731_ q=$abc$109383$new_n54042_
+.subckt and4_x1 i0=$abc$109383$new_n54042_ i1=$abc$109383$new_n29707_ i2=$abc$109383$new_n29713_ i3=$abc$109383$new_n29716_ q=$abc$109383$new_n54043_
+.subckt and4_x1 i0=$abc$109383$new_n54043_ i1=$abc$109383$new_n29696_ i2=$abc$109383$new_n29699_ i3=$abc$109383$new_n29704_ q=$abc$109383$new_n54044_
+.subckt and4_x1 i0=$abc$109383$new_n54044_ i1=$abc$109383$new_n29705_ i2=$abc$109383$new_n29700_ i3=$abc$109383$new_n29697_ q=$abc$109383$new_n54045_
+.subckt and4_x1 i0=$abc$109383$new_n54045_ i1=$abc$109383$new_n29717_ i2=$abc$109383$new_n29714_ i3=$abc$109383$new_n29708_ q=$abc$109383$new_n54046_
+.subckt and4_x1 i0=$abc$109383$new_n54046_ i1=$abc$109383$new_n29732_ i2=$abc$109383$new_n29724_ i3=$abc$109383$new_n29721_ q=$abc$109383$new_n54047_
+.subckt and4_x1 i0=$abc$109383$new_n54047_ i1=$abc$109383$new_n29742_ i2=$abc$109383$new_n29739_ i3=$abc$109383$new_n29735_ q=$abc$109383$new_n54048_
+.subckt and4_x1 i0=$abc$109383$new_n54048_ i1=$abc$109383$new_n29754_ i2=$abc$109383$new_n29750_ i3=$abc$109383$new_n29747_ q=$abc$109383$new_n54049_
 .subckt nand2_x0 i0=$abc$109383$new_n54049_ i1=$abc$109383$new_n29756_ nq=$abc$109383$new_n54050_
-.subckt a3_x2 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n54038_ q=$abc$109383$new_n54051_
+.subckt and3_x1 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n54038_ q=$abc$109383$new_n54051_
 .subckt buf_x4 i=soc.cpu.minerva.divider.fsm_state q=$abc$109383$new_n54052_
 .subckt inv_x0 i=soc.cpu.minerva.divider.timer[5] nq=$abc$109383$new_n54053_
 .subckt inv_x1 i=soc.cpu.minerva.divider.timer[4] nq=$abc$109383$new_n54054_
 .subckt nor4_x0 i0=soc.cpu.minerva.divider.timer[3] i1=soc.cpu.minerva.divider.timer[2] i2=soc.cpu.minerva.divider.timer[1] i3=soc.cpu.minerva.divider.timer[0] nq=$abc$109383$new_n54055_
 .subckt nand3_x0 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n54053_ nq=$abc$109383$new_n54056_
-.subckt a2_x2 i0=$abc$109383$new_n54056_ i1=$abc$109383$new_n54052_ q=$abc$109383$new_n54057_
+.subckt and2_x1 i0=$abc$109383$new_n54056_ i1=$abc$109383$new_n54052_ q=$abc$109383$new_n54057_
 .subckt buf_x4 i=$abc$109383$new_n54057_ q=$abc$109383$new_n54058_
 .subckt buf_x4 i=$abc$109383$new_n54058_ q=$abc$109383$new_n54059_
-.subckt ao22_x2 i0=$abc$109383$new_n54059_ i1=$abc$109383$new_n54051_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104288
+.subckt and21nor_x1 i0=$abc$109383$new_n54059_ i1=$abc$109383$new_n54051_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104288
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__csr_adr$114[3] i1=soc.cpu.minerva.payload__csr_adr$114[2] nq=$abc$109383$new_n54061_
 .subckt buf_x4 i=$abc$109383$new_n54061_ q=$abc$109383$new_n54062_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__csr_adr$114[9] i1=soc.cpu.minerva.payload__csr_adr$114[8] q=$abc$109383$new_n54063_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__csr_adr$114[9] i1=soc.cpu.minerva.payload__csr_adr$114[8] q=$abc$109383$new_n54063_
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__csr_adr$114[11] i1=soc.cpu.minerva.payload__csr_adr$114[10] nq=$abc$109383$new_n54064_
 .subckt nor4_x0 i0=soc.cpu.minerva.payload__csr_adr$114[7] i1=soc.cpu.minerva.payload__csr_adr$114[6] i2=soc.cpu.minerva.payload__csr_adr$114[5] i3=soc.cpu.minerva.payload__csr_adr$114[4] nq=$abc$109383$new_n54065_
-.subckt a3_x2 i0=$abc$109383$new_n54065_ i1=$abc$109383$new_n54064_ i2=$abc$109383$new_n54063_ q=$abc$109383$new_n54066_
-.subckt a3_x2 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ q=$abc$109383$new_n54067_
+.subckt and3_x1 i0=$abc$109383$new_n54065_ i1=$abc$109383$new_n54064_ i2=$abc$109383$new_n54063_ q=$abc$109383$new_n54066_
+.subckt and3_x1 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ q=$abc$109383$new_n54067_
 .subckt inv_x1 i=soc.cpu.minerva.divider.fsm_state nq=$abc$109383$new_n54068_
-.subckt a4_x2 i0=$abc$109383$new_n54068_ i1=$abc$109383$new_n28911_ i2=$abc$109383$new_n52664_ i3=$abc$109383$new_n28910_ q=$abc$109383$new_n54069_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__csr$112 i1=soc.cpu.minerva.payload__csr_we$116 q=$abc$109383$new_n54070_
+.subckt and4_x1 i0=$abc$109383$new_n54068_ i1=$abc$109383$new_n28911_ i2=$abc$109383$new_n52664_ i3=$abc$109383$new_n28910_ q=$abc$109383$new_n54069_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__csr$112 i1=soc.cpu.minerva.payload__csr_we$116 q=$abc$109383$new_n54070_
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__csr_adr$114[1] i1=soc.cpu.minerva.payload__csr_adr$114[0] nq=$abc$109383$new_n54071_
-.subckt a4_x2 i0=$abc$109383$new_n54071_ i1=$abc$109383$new_n54070_ i2=$abc$109383$new_n54069_ i3=$abc$109383$new_n54067_ q=$abc$109383$new_n54072_
-.subckt a3_x2 i0=$abc$109383$new_n54072_ i1=$abc$109383$new_n54066_ i2=$abc$109383$new_n54062_ q=$abc$109383$new_n54073_
-.subckt mx2_x2 cmd=$abc$109383$new_n54073_ i0=soc.cpu.minerva.exception.mstatus__r__mpp[0] i1=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n54074_
-.subckt a2_x2 i0=$abc$109383$new_n54074_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104292
-.subckt mx2_x2 cmd=$abc$109383$new_n54073_ i0=soc.cpu.minerva.exception.mstatus__r__mpp[1] i1=soc.cpu.minerva.payload__csr_result$117[12] q=$abc$109383$new_n54076_
-.subckt a2_x2 i0=$abc$109383$new_n54076_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104296
+.subckt and4_x1 i0=$abc$109383$new_n54071_ i1=$abc$109383$new_n54070_ i2=$abc$109383$new_n54069_ i3=$abc$109383$new_n54067_ q=$abc$109383$new_n54072_
+.subckt and3_x1 i0=$abc$109383$new_n54072_ i1=$abc$109383$new_n54066_ i2=$abc$109383$new_n54062_ q=$abc$109383$new_n54073_
+.subckt mux2_x1 cmd=$abc$109383$new_n54073_ i0=soc.cpu.minerva.exception.mstatus__r__mpp[0] i1=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n54074_
+.subckt and2_x1 i0=$abc$109383$new_n54074_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104292
+.subckt mux2_x1 cmd=$abc$109383$new_n54073_ i0=soc.cpu.minerva.exception.mstatus__r__mpp[1] i1=soc.cpu.minerva.payload__csr_result$117[12] q=$abc$109383$new_n54076_
+.subckt and2_x1 i0=$abc$109383$new_n54076_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104296
 .subckt inv_x0 i=soc.cpu.minerva.exception.mstatus__r__mie nq=$abc$109383$new_n54078_
-.subckt o4_x2 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n15243_ i2=$abc$109383$new_n15241_ i3=$abc$109383$new_n15240_ q=$abc$109383$new_n54079_
+.subckt or4_x1 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n15243_ i2=$abc$109383$new_n15241_ i3=$abc$109383$new_n15240_ q=$abc$109383$new_n54079_
 .subckt buf_x4 i=$abc$109383$new_n54079_ q=$abc$109383$new_n54080_
 .subckt buf_x4 i=$abc$109383$new_n54069_ q=$abc$109383$new_n54081_
 .subckt buf_x4 i=$abc$109383$new_n54081_ q=$abc$109383$new_n54082_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54080_ i2=$abc$109383$new_n54078_ nq=$abc$109383$new_n54083_
-.subckt a2_x2 i0=$abc$109383$new_n54083_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54084_
-.subckt a4_x2 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ i3=$abc$109383$new_n15552_ q=$abc$109383$new_n54085_
-.subckt a4_x2 i0=$abc$109383$new_n54085_ i1=soc.cpu.minerva.payload__csr$112 i2=soc.cpu.minerva.payload__csr_we$116 i3=$abc$109383$new_n28911_ q=$abc$109383$new_n54086_
-.subckt a4_x2 i0=$abc$109383$new_n54086_ i1=$abc$109383$new_n54071_ i2=$abc$109383$new_n54066_ i3=$abc$109383$new_n54062_ q=$abc$109383$new_n54087_
-.subckt mx2_x2 cmd=$abc$109383$new_n54087_ i0=soc.cpu.minerva.exception.mstatus__r__mpie i1=soc.cpu.minerva.payload__csr_result$117[7] q=$abc$109383$new_n54088_
-.subckt a2_x2 i0=$abc$109383$new_n54081_ i1=$abc$109383$new_n53312_ q=$abc$109383$new_n54089_
+.subckt and2_x1 i0=$abc$109383$new_n54083_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54084_
+.subckt and4_x1 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n15242_ i3=$abc$109383$new_n15552_ q=$abc$109383$new_n54085_
+.subckt and4_x1 i0=$abc$109383$new_n54085_ i1=soc.cpu.minerva.payload__csr$112 i2=soc.cpu.minerva.payload__csr_we$116 i3=$abc$109383$new_n28911_ q=$abc$109383$new_n54086_
+.subckt and4_x1 i0=$abc$109383$new_n54086_ i1=$abc$109383$new_n54071_ i2=$abc$109383$new_n54066_ i3=$abc$109383$new_n54062_ q=$abc$109383$new_n54087_
+.subckt mux2_x1 cmd=$abc$109383$new_n54087_ i0=soc.cpu.minerva.exception.mstatus__r__mpie i1=soc.cpu.minerva.payload__csr_result$117[7] q=$abc$109383$new_n54088_
+.subckt and2_x1 i0=$abc$109383$new_n54081_ i1=$abc$109383$new_n53312_ q=$abc$109383$new_n54089_
 .subckt buf_x4 i=$abc$109383$new_n54089_ q=$abc$109383$new_n54090_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54088_ i2=$abc$109383$new_n54084_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104298
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54088_ i2=$abc$109383$new_n54084_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104298
 .subckt buf_x4 i=$abc$109383$new_n54081_ q=$abc$109383$new_n54092_
 .subckt nand4_x0 i0=$abc$109383$new_n54092_ i1=$abc$109383$new_n54067_ i2=soc.cpu.minerva.exception.mstatus__r__mpie i3=$abc$109383$new_n53224_ nq=$abc$109383$new_n54093_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_result$117[3] nq=$abc$109383$new_n54094_
 .subckt nand4_x0 i0=$abc$109383$new_n54086_ i1=$abc$109383$new_n54071_ i2=$abc$109383$new_n54066_ i3=$abc$109383$new_n54062_ nq=$abc$109383$new_n54095_
-.subckt mx2_x2 cmd=$abc$109383$new_n54095_ i0=$abc$109383$new_n54094_ i1=$abc$109383$new_n54078_ q=$abc$109383$new_n54096_
+.subckt mux2_x1 cmd=$abc$109383$new_n54095_ i0=$abc$109383$new_n54094_ i1=$abc$109383$new_n54078_ q=$abc$109383$new_n54096_
 .subckt buf_x4 i=$abc$109383$new_n15242_ q=$abc$109383$new_n54097_
 .subckt nand4_x0 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n54097_ i3=$abc$109383$new_n15238_ nq=$abc$109383$new_n54098_
-.subckt a2_x2 i0=$abc$109383$new_n54092_ i1=$abc$109383$new_n54098_ q=$abc$109383$new_n54099_
-.subckt ao22_x2 i0=$abc$109383$new_n54099_ i1=$abc$109383$new_n54096_ i2=$abc$109383$new_n54093_ q=$abc$109383$new_n54100_
+.subckt and2_x1 i0=$abc$109383$new_n54092_ i1=$abc$109383$new_n54098_ q=$abc$109383$new_n54099_
+.subckt and21nor_x1 i0=$abc$109383$new_n54099_ i1=$abc$109383$new_n54096_ i2=$abc$109383$new_n54093_ nq=$abc$109383$new_n54100_
 .subckt nor2_x0 i0=$abc$109383$new_n54100_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104300
-.subckt a2_x2 i0=$abc$109383$new_n15471_ i1=soc.cpu.minerva.payload__csr_adr$114[0] q=$abc$109383$new_n54102_
-.subckt a2_x2 i0=$abc$109383$new_n54102_ i1=$abc$109383$new_n54066_ q=$abc$109383$new_n54103_
-.subckt a4_x2 i0=$abc$109383$new_n54103_ i1=$abc$109383$new_n54070_ i2=$abc$109383$new_n54069_ i3=$abc$109383$new_n54067_ q=$abc$109383$new_n54104_
-.subckt a2_x2 i0=$abc$109383$new_n54104_ i1=$abc$109383$new_n54062_ q=$abc$109383$new_n54105_
+.subckt and2_x1 i0=$abc$109383$new_n15471_ i1=soc.cpu.minerva.payload__csr_adr$114[0] q=$abc$109383$new_n54102_
+.subckt and2_x1 i0=$abc$109383$new_n54102_ i1=$abc$109383$new_n54066_ q=$abc$109383$new_n54103_
+.subckt and4_x1 i0=$abc$109383$new_n54103_ i1=$abc$109383$new_n54070_ i2=$abc$109383$new_n54069_ i3=$abc$109383$new_n54067_ q=$abc$109383$new_n54104_
+.subckt and2_x1 i0=$abc$109383$new_n54104_ i1=$abc$109383$new_n54062_ q=$abc$109383$new_n54105_
 .subckt buf_x4 i=$abc$109383$new_n54105_ q=$abc$109383$new_n54106_
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__mxl[0] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n54107_
-.subckt a2_x2 i0=$abc$109383$new_n54107_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104304
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__mxl[1] i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n54109_
-.subckt a2_x2 i0=$abc$109383$new_n54109_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104308
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[0] i1=soc.cpu.minerva.payload__csr_result$117[0] q=$abc$109383$new_n54111_
-.subckt a2_x2 i0=$abc$109383$new_n54111_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104328
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[1] i1=soc.cpu.minerva.payload__csr_result$117[1] q=$abc$109383$new_n54113_
-.subckt a2_x2 i0=$abc$109383$new_n54113_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104332
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__mxl[0] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n54107_
+.subckt and2_x1 i0=$abc$109383$new_n54107_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104304
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__mxl[1] i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n54109_
+.subckt and2_x1 i0=$abc$109383$new_n54109_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104308
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[0] i1=soc.cpu.minerva.payload__csr_result$117[0] q=$abc$109383$new_n54111_
+.subckt and2_x1 i0=$abc$109383$new_n54111_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104328
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[1] i1=soc.cpu.minerva.payload__csr_result$117[1] q=$abc$109383$new_n54113_
+.subckt and2_x1 i0=$abc$109383$new_n54113_ i1=$abc$109383$new_n53901_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104332
 .subckt buf_x4 i=$abc$109383$new_n53158_ q=$abc$109383$new_n54115_
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[2] i1=soc.cpu.minerva.payload__csr_result$117[2] q=$abc$109383$new_n54116_
-.subckt a2_x2 i0=$abc$109383$new_n54116_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104336
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[3] i1=soc.cpu.minerva.payload__csr_result$117[3] q=$abc$109383$new_n54118_
-.subckt a2_x2 i0=$abc$109383$new_n54118_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104340
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[4] i1=soc.cpu.minerva.payload__csr_result$117[4] q=$abc$109383$new_n54120_
-.subckt a2_x2 i0=$abc$109383$new_n54120_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104344
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[5] i1=soc.cpu.minerva.payload__csr_result$117[5] q=$abc$109383$new_n54122_
-.subckt a2_x2 i0=$abc$109383$new_n54122_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104348
-.subckt mx2_x2 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[6] i1=soc.cpu.minerva.payload__csr_result$117[6] q=$abc$109383$new_n54124_
-.subckt a2_x2 i0=$abc$109383$new_n54124_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104352
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[2] i1=soc.cpu.minerva.payload__csr_result$117[2] q=$abc$109383$new_n54116_
+.subckt and2_x1 i0=$abc$109383$new_n54116_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104336
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[3] i1=soc.cpu.minerva.payload__csr_result$117[3] q=$abc$109383$new_n54118_
+.subckt and2_x1 i0=$abc$109383$new_n54118_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104340
+.subckt mux2_x1 cmd=$abc$109383$new_n54106_ i0=soc.cpu.minerva.exception.misa__r__extensions[4] i1=soc.cpu.minerva.payload__csr_result$117[4] q=$abc$109383$new_n54120_
+.subckt and2_x1 i0=$abc$109383$new_n54120_ i1=$abc$109383$new_n54115_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104344
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 .subckt nor2_x0 i0=soc.cpu.minerva.payload__csr_adr$114[5] i1=soc.cpu.minerva.payload__csr_adr$114[4] nq=$abc$109383$new_n54251_
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 .subckt buf_x4 i=$abc$109383$new_n54254_ q=$abc$109383$new_n54255_
 .subckt buf_x4 i=$abc$109383$new_n54255_ q=$abc$109383$new_n54256_
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 .subckt buf_x4 i=$abc$109383$new_n53158_ q=$abc$109383$new_n54259_
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 .subckt buf_x4 i=$abc$109383$new_n54255_ q=$abc$109383$new_n54276_
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-.subckt a2_x2 i0=$abc$109383$new_n54277_ i1=$abc$109383$new_n54259_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104608
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-.subckt a2_x2 i0=$abc$109383$new_n54279_ i1=$abc$109383$new_n54259_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104612
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 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n54281_
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n54282_
-.subckt mx2_x2 cmd=$abc$109383$new_n54276_ i0=soc.cpu.minerva.exception.mscratch__r__value[11] i1=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n54283_
-.subckt a2_x2 i0=$abc$109383$new_n54283_ i1=$abc$109383$new_n54282_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104616
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-.subckt mx2_x2 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[21] i1=soc.cpu.minerva.payload__csr_result$117[21] q=$abc$109383$new_n54305_
-.subckt a2_x2 i0=$abc$109383$new_n54305_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104656
-.subckt mx2_x2 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[22] i1=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n54307_
-.subckt a2_x2 i0=$abc$109383$new_n54307_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104660
-.subckt mx2_x2 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[23] i1=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n54309_
-.subckt a2_x2 i0=$abc$109383$new_n54309_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104664
-.subckt mx2_x2 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[24] i1=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n54311_
-.subckt a2_x2 i0=$abc$109383$new_n54311_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104668
-.subckt mx2_x2 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[25] i1=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n54313_
-.subckt a2_x2 i0=$abc$109383$new_n54313_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104672
-.subckt mx2_x2 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[26] i1=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n54315_
-.subckt a2_x2 i0=$abc$109383$new_n54315_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104676
-.subckt mx2_x2 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[27] i1=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n54317_
-.subckt a2_x2 i0=$abc$109383$new_n54317_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104680
-.subckt mx2_x2 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[28] i1=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n54319_
-.subckt a2_x2 i0=$abc$109383$new_n54319_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104684
-.subckt mx2_x2 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[29] i1=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n54321_
-.subckt a2_x2 i0=$abc$109383$new_n54321_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104688
-.subckt mx2_x2 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[30] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n54323_
-.subckt a2_x2 i0=$abc$109383$new_n54323_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104692
+.subckt mux2_x1 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[21] i1=soc.cpu.minerva.payload__csr_result$117[21] q=$abc$109383$new_n54305_
+.subckt and2_x1 i0=$abc$109383$new_n54305_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104656
+.subckt mux2_x1 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[22] i1=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n54307_
+.subckt and2_x1 i0=$abc$109383$new_n54307_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104660
+.subckt mux2_x1 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[23] i1=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n54309_
+.subckt and2_x1 i0=$abc$109383$new_n54309_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104664
+.subckt mux2_x1 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[24] i1=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n54311_
+.subckt and2_x1 i0=$abc$109383$new_n54311_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104668
+.subckt mux2_x1 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[25] i1=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n54313_
+.subckt and2_x1 i0=$abc$109383$new_n54313_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104672
+.subckt mux2_x1 cmd=$abc$109383$new_n54297_ i0=soc.cpu.minerva.exception.mscratch__r__value[26] i1=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n54315_
+.subckt and2_x1 i0=$abc$109383$new_n54315_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104676
+.subckt mux2_x1 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[27] i1=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n54317_
+.subckt and2_x1 i0=$abc$109383$new_n54317_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104680
+.subckt mux2_x1 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[28] i1=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n54319_
+.subckt and2_x1 i0=$abc$109383$new_n54319_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104684
+.subckt mux2_x1 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[29] i1=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n54321_
+.subckt and2_x1 i0=$abc$109383$new_n54321_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104688
+.subckt mux2_x1 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[30] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n54323_
+.subckt and2_x1 i0=$abc$109383$new_n54323_ i1=$abc$109383$new_n54304_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104692
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n54325_
-.subckt mx2_x2 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[31] i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n54326_
-.subckt a2_x2 i0=$abc$109383$new_n54326_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104696
+.subckt mux2_x1 cmd=$abc$109383$new_n54255_ i0=soc.cpu.minerva.exception.mscratch__r__value[31] i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n54326_
+.subckt and2_x1 i0=$abc$109383$new_n54326_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104696
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[2] nq=$abc$109383$new_n54328_
 .subckt buf_x4 i=$abc$109383$new_n53312_ q=$abc$109383$new_n54329_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54328_ nq=$abc$109383$new_n54330_
-.subckt a2_x2 i0=$abc$109383$new_n54330_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54331_
+.subckt and2_x1 i0=$abc$109383$new_n54330_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54331_
 .subckt nand4_x0 i0=$abc$109383$new_n54068_ i1=$abc$109383$new_n28911_ i2=$abc$109383$new_n52664_ i3=$abc$109383$new_n28910_ nq=$abc$109383$new_n54332_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__csr$112 i1=soc.cpu.minerva.payload__csr_we$116 nq=$abc$109383$new_n54333_
 .subckt nand4_x0 i0=$abc$109383$new_n54252_ i1=$abc$109383$new_n54102_ i2=$abc$109383$new_n54250_ i3=$abc$109383$new_n54062_ nq=$abc$109383$new_n54334_
-.subckt o4_x2 i0=$abc$109383$new_n54334_ i1=$abc$109383$new_n54333_ i2=$abc$109383$new_n54332_ i3=$abc$109383$new_n53227_ q=$abc$109383$new_n54335_
+.subckt or4_x1 i0=$abc$109383$new_n54334_ i1=$abc$109383$new_n54333_ i2=$abc$109383$new_n54332_ i3=$abc$109383$new_n53227_ q=$abc$109383$new_n54335_
 .subckt buf_x4 i=$abc$109383$new_n54335_ q=$abc$109383$new_n54336_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[2] i1=soc.cpu.minerva.exception.mepc__r__base[0] q=$abc$109383$new_n54337_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54337_ i2=$abc$109383$new_n54331_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104698
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[2] i1=soc.cpu.minerva.exception.mepc__r__base[0] q=$abc$109383$new_n54337_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54337_ i2=$abc$109383$new_n54331_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104698
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[3] nq=$abc$109383$new_n54339_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54339_ nq=$abc$109383$new_n54340_
-.subckt a2_x2 i0=$abc$109383$new_n54340_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54341_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[3] i1=soc.cpu.minerva.exception.mepc__r__base[1] q=$abc$109383$new_n54342_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54342_ i2=$abc$109383$new_n54341_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104700
+.subckt and2_x1 i0=$abc$109383$new_n54340_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54341_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[3] i1=soc.cpu.minerva.exception.mepc__r__base[1] q=$abc$109383$new_n54342_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54342_ i2=$abc$109383$new_n54341_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104700
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[4] nq=$abc$109383$new_n54344_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54344_ nq=$abc$109383$new_n54345_
-.subckt a2_x2 i0=$abc$109383$new_n54345_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54346_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[4] i1=soc.cpu.minerva.exception.mepc__r__base[2] q=$abc$109383$new_n54347_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54347_ i2=$abc$109383$new_n54346_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104702
+.subckt and2_x1 i0=$abc$109383$new_n54345_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54346_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[4] i1=soc.cpu.minerva.exception.mepc__r__base[2] q=$abc$109383$new_n54347_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54347_ i2=$abc$109383$new_n54346_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104702
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[5] nq=$abc$109383$new_n54349_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54349_ nq=$abc$109383$new_n54350_
-.subckt a2_x2 i0=$abc$109383$new_n54350_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54351_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[5] i1=soc.cpu.minerva.exception.mepc__r__base[3] q=$abc$109383$new_n54352_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54352_ i2=$abc$109383$new_n54351_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104704
+.subckt and2_x1 i0=$abc$109383$new_n54350_ i1=$abc$109383$new_n51603_ q=$abc$109383$new_n54351_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[5] i1=soc.cpu.minerva.exception.mepc__r__base[3] q=$abc$109383$new_n54352_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54352_ i2=$abc$109383$new_n54351_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104704
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n54354_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[6] nq=$abc$109383$new_n54355_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54355_ nq=$abc$109383$new_n54356_
-.subckt a2_x2 i0=$abc$109383$new_n54356_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54357_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[6] i1=soc.cpu.minerva.exception.mepc__r__base[4] q=$abc$109383$new_n54358_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54358_ i2=$abc$109383$new_n54357_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104706
+.subckt and2_x1 i0=$abc$109383$new_n54356_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54357_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[6] i1=soc.cpu.minerva.exception.mepc__r__base[4] q=$abc$109383$new_n54358_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54358_ i2=$abc$109383$new_n54357_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104706
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[7] nq=$abc$109383$new_n54360_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54360_ nq=$abc$109383$new_n54361_
-.subckt a2_x2 i0=$abc$109383$new_n54361_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54362_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[7] i1=soc.cpu.minerva.exception.mepc__r__base[5] q=$abc$109383$new_n54363_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54363_ i2=$abc$109383$new_n54362_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104708
+.subckt and2_x1 i0=$abc$109383$new_n54361_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54362_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[7] i1=soc.cpu.minerva.exception.mepc__r__base[5] q=$abc$109383$new_n54363_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54363_ i2=$abc$109383$new_n54362_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104708
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[8] nq=$abc$109383$new_n54365_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54365_ nq=$abc$109383$new_n54366_
-.subckt a2_x2 i0=$abc$109383$new_n54366_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54367_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[8] i1=soc.cpu.minerva.exception.mepc__r__base[6] q=$abc$109383$new_n54368_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54368_ i2=$abc$109383$new_n54367_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104710
+.subckt and2_x1 i0=$abc$109383$new_n54366_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54367_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[8] i1=soc.cpu.minerva.exception.mepc__r__base[6] q=$abc$109383$new_n54368_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54368_ i2=$abc$109383$new_n54367_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104710
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[9] nq=$abc$109383$new_n54370_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54370_ nq=$abc$109383$new_n54371_
-.subckt a2_x2 i0=$abc$109383$new_n54371_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54372_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[9] i1=soc.cpu.minerva.exception.mepc__r__base[7] q=$abc$109383$new_n54373_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54373_ i2=$abc$109383$new_n54372_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104712
+.subckt and2_x1 i0=$abc$109383$new_n54371_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54372_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[9] i1=soc.cpu.minerva.exception.mepc__r__base[7] q=$abc$109383$new_n54373_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54373_ i2=$abc$109383$new_n54372_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104712
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[10] nq=$abc$109383$new_n54375_
 .subckt nand3_x0 i0=$abc$109383$new_n54082_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54375_ nq=$abc$109383$new_n54376_
-.subckt a2_x2 i0=$abc$109383$new_n54376_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54377_
-.subckt mx2_x2 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[10] i1=soc.cpu.minerva.exception.mepc__r__base[8] q=$abc$109383$new_n54378_
-.subckt ao22_x2 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54378_ i2=$abc$109383$new_n54377_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104714
+.subckt and2_x1 i0=$abc$109383$new_n54376_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54377_
+.subckt mux2_x1 cmd=$abc$109383$new_n54336_ i0=soc.cpu.minerva.payload__csr_result$117[10] i1=soc.cpu.minerva.exception.mepc__r__base[8] q=$abc$109383$new_n54378_
+.subckt and21nor_x1 i0=$abc$109383$new_n54090_ i1=$abc$109383$new_n54378_ i2=$abc$109383$new_n54377_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104714
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[11] nq=$abc$109383$new_n54380_
 .subckt buf_x4 i=$abc$109383$new_n54081_ q=$abc$109383$new_n54381_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54329_ i2=$abc$109383$new_n54380_ nq=$abc$109383$new_n54382_
-.subckt a2_x2 i0=$abc$109383$new_n54382_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54383_
+.subckt and2_x1 i0=$abc$109383$new_n54382_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54383_
 .subckt buf_x4 i=$abc$109383$new_n54335_ q=$abc$109383$new_n54384_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[11] i1=soc.cpu.minerva.exception.mepc__r__base[9] q=$abc$109383$new_n54385_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[11] i1=soc.cpu.minerva.exception.mepc__r__base[9] q=$abc$109383$new_n54385_
 .subckt buf_x4 i=$abc$109383$new_n54089_ q=$abc$109383$new_n54386_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54385_ i2=$abc$109383$new_n54383_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104716
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54385_ i2=$abc$109383$new_n54383_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104716
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[12] nq=$abc$109383$new_n54388_
 .subckt buf_x4 i=$abc$109383$new_n53312_ q=$abc$109383$new_n54389_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54388_ nq=$abc$109383$new_n54390_
-.subckt a2_x2 i0=$abc$109383$new_n54390_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54391_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[12] i1=soc.cpu.minerva.exception.mepc__r__base[10] q=$abc$109383$new_n54392_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54392_ i2=$abc$109383$new_n54391_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104718
+.subckt and2_x1 i0=$abc$109383$new_n54390_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54391_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[12] i1=soc.cpu.minerva.exception.mepc__r__base[10] q=$abc$109383$new_n54392_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54392_ i2=$abc$109383$new_n54391_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104718
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[13] nq=$abc$109383$new_n54394_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54394_ nq=$abc$109383$new_n54395_
-.subckt a2_x2 i0=$abc$109383$new_n54395_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54396_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[13] i1=soc.cpu.minerva.exception.mepc__r__base[11] q=$abc$109383$new_n54397_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54397_ i2=$abc$109383$new_n54396_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104720
+.subckt and2_x1 i0=$abc$109383$new_n54395_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54396_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[13] i1=soc.cpu.minerva.exception.mepc__r__base[11] q=$abc$109383$new_n54397_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54397_ i2=$abc$109383$new_n54396_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104720
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[14] nq=$abc$109383$new_n54399_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54399_ nq=$abc$109383$new_n54400_
-.subckt a2_x2 i0=$abc$109383$new_n54400_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54401_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[14] i1=soc.cpu.minerva.exception.mepc__r__base[12] q=$abc$109383$new_n54402_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54402_ i2=$abc$109383$new_n54401_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104722
+.subckt and2_x1 i0=$abc$109383$new_n54400_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54401_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[14] i1=soc.cpu.minerva.exception.mepc__r__base[12] q=$abc$109383$new_n54402_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54402_ i2=$abc$109383$new_n54401_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104722
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[15] nq=$abc$109383$new_n54404_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54404_ nq=$abc$109383$new_n54405_
-.subckt a2_x2 i0=$abc$109383$new_n54405_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54406_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[15] i1=soc.cpu.minerva.exception.mepc__r__base[13] q=$abc$109383$new_n54407_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54407_ i2=$abc$109383$new_n54406_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104724
+.subckt and2_x1 i0=$abc$109383$new_n54405_ i1=$abc$109383$new_n54354_ q=$abc$109383$new_n54406_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[15] i1=soc.cpu.minerva.exception.mepc__r__base[13] q=$abc$109383$new_n54407_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54407_ i2=$abc$109383$new_n54406_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104724
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n54409_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[16] nq=$abc$109383$new_n54410_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54410_ nq=$abc$109383$new_n54411_
-.subckt a2_x2 i0=$abc$109383$new_n54411_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54412_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[16] i1=soc.cpu.minerva.exception.mepc__r__base[14] q=$abc$109383$new_n54413_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54413_ i2=$abc$109383$new_n54412_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104726
+.subckt and2_x1 i0=$abc$109383$new_n54411_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54412_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[16] i1=soc.cpu.minerva.exception.mepc__r__base[14] q=$abc$109383$new_n54413_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54413_ i2=$abc$109383$new_n54412_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104726
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[17] nq=$abc$109383$new_n54415_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54415_ nq=$abc$109383$new_n54416_
-.subckt a2_x2 i0=$abc$109383$new_n54416_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54417_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[17] i1=soc.cpu.minerva.exception.mepc__r__base[15] q=$abc$109383$new_n54418_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54418_ i2=$abc$109383$new_n54417_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104728
+.subckt and2_x1 i0=$abc$109383$new_n54416_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54417_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[17] i1=soc.cpu.minerva.exception.mepc__r__base[15] q=$abc$109383$new_n54418_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54418_ i2=$abc$109383$new_n54417_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104728
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[18] nq=$abc$109383$new_n54420_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54420_ nq=$abc$109383$new_n54421_
-.subckt a2_x2 i0=$abc$109383$new_n54421_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54422_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[18] i1=soc.cpu.minerva.exception.mepc__r__base[16] q=$abc$109383$new_n54423_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54423_ i2=$abc$109383$new_n54422_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104730
+.subckt and2_x1 i0=$abc$109383$new_n54421_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54422_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[18] i1=soc.cpu.minerva.exception.mepc__r__base[16] q=$abc$109383$new_n54423_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54423_ i2=$abc$109383$new_n54422_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104730
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[19] nq=$abc$109383$new_n54425_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54425_ nq=$abc$109383$new_n54426_
-.subckt a2_x2 i0=$abc$109383$new_n54426_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54427_
-.subckt mx2_x2 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[19] i1=soc.cpu.minerva.exception.mepc__r__base[17] q=$abc$109383$new_n54428_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54428_ i2=$abc$109383$new_n54427_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104732
+.subckt and2_x1 i0=$abc$109383$new_n54426_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54427_
+.subckt mux2_x1 cmd=$abc$109383$new_n54384_ i0=soc.cpu.minerva.payload__csr_result$117[19] i1=soc.cpu.minerva.exception.mepc__r__base[17] q=$abc$109383$new_n54428_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54428_ i2=$abc$109383$new_n54427_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104732
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[20] nq=$abc$109383$new_n54430_
 .subckt nand3_x0 i0=$abc$109383$new_n54381_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54430_ nq=$abc$109383$new_n54431_
-.subckt a2_x2 i0=$abc$109383$new_n54431_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54432_
+.subckt and2_x1 i0=$abc$109383$new_n54431_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54432_
 .subckt buf_x4 i=$abc$109383$new_n54335_ q=$abc$109383$new_n54433_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[20] i1=soc.cpu.minerva.exception.mepc__r__base[18] q=$abc$109383$new_n54434_
-.subckt ao22_x2 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54434_ i2=$abc$109383$new_n54432_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104734
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[20] i1=soc.cpu.minerva.exception.mepc__r__base[18] q=$abc$109383$new_n54434_
+.subckt and21nor_x1 i0=$abc$109383$new_n54386_ i1=$abc$109383$new_n54434_ i2=$abc$109383$new_n54432_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104734
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[21] nq=$abc$109383$new_n54436_
 .subckt buf_x4 i=$abc$109383$new_n54081_ q=$abc$109383$new_n54437_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54389_ i2=$abc$109383$new_n54436_ nq=$abc$109383$new_n54438_
-.subckt a2_x2 i0=$abc$109383$new_n54438_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54439_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[21] i1=soc.cpu.minerva.exception.mepc__r__base[19] q=$abc$109383$new_n54440_
+.subckt and2_x1 i0=$abc$109383$new_n54438_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54439_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[21] i1=soc.cpu.minerva.exception.mepc__r__base[19] q=$abc$109383$new_n54440_
 .subckt buf_x4 i=$abc$109383$new_n54089_ q=$abc$109383$new_n54441_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54440_ i2=$abc$109383$new_n54439_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104736
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54440_ i2=$abc$109383$new_n54439_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104736
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[22] nq=$abc$109383$new_n54443_
 .subckt buf_x4 i=$abc$109383$new_n53312_ q=$abc$109383$new_n54444_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54443_ nq=$abc$109383$new_n54445_
-.subckt a2_x2 i0=$abc$109383$new_n54445_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54446_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[22] i1=soc.cpu.minerva.exception.mepc__r__base[20] q=$abc$109383$new_n54447_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54447_ i2=$abc$109383$new_n54446_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104738
+.subckt and2_x1 i0=$abc$109383$new_n54445_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54446_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[22] i1=soc.cpu.minerva.exception.mepc__r__base[20] q=$abc$109383$new_n54447_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54447_ i2=$abc$109383$new_n54446_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104738
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[23] nq=$abc$109383$new_n54449_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54449_ nq=$abc$109383$new_n54450_
-.subckt a2_x2 i0=$abc$109383$new_n54450_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54451_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[23] i1=soc.cpu.minerva.exception.mepc__r__base[21] q=$abc$109383$new_n54452_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54452_ i2=$abc$109383$new_n54451_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104740
+.subckt and2_x1 i0=$abc$109383$new_n54450_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54451_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[23] i1=soc.cpu.minerva.exception.mepc__r__base[21] q=$abc$109383$new_n54452_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54452_ i2=$abc$109383$new_n54451_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104740
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[24] nq=$abc$109383$new_n54454_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54454_ nq=$abc$109383$new_n54455_
-.subckt a2_x2 i0=$abc$109383$new_n54455_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54456_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[24] i1=soc.cpu.minerva.exception.mepc__r__base[22] q=$abc$109383$new_n54457_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54457_ i2=$abc$109383$new_n54456_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104742
+.subckt and2_x1 i0=$abc$109383$new_n54455_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54456_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[24] i1=soc.cpu.minerva.exception.mepc__r__base[22] q=$abc$109383$new_n54457_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54457_ i2=$abc$109383$new_n54456_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104742
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[25] nq=$abc$109383$new_n54459_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54459_ nq=$abc$109383$new_n54460_
-.subckt a2_x2 i0=$abc$109383$new_n54460_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54461_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[25] i1=soc.cpu.minerva.exception.mepc__r__base[23] q=$abc$109383$new_n54462_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54462_ i2=$abc$109383$new_n54461_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104744
+.subckt and2_x1 i0=$abc$109383$new_n54460_ i1=$abc$109383$new_n54409_ q=$abc$109383$new_n54461_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[25] i1=soc.cpu.minerva.exception.mepc__r__base[23] q=$abc$109383$new_n54462_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54462_ i2=$abc$109383$new_n54461_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104744
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n54464_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[26] nq=$abc$109383$new_n54465_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54465_ nq=$abc$109383$new_n54466_
-.subckt a2_x2 i0=$abc$109383$new_n54466_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54467_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[26] i1=soc.cpu.minerva.exception.mepc__r__base[24] q=$abc$109383$new_n54468_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54468_ i2=$abc$109383$new_n54467_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104746
+.subckt and2_x1 i0=$abc$109383$new_n54466_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54467_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[26] i1=soc.cpu.minerva.exception.mepc__r__base[24] q=$abc$109383$new_n54468_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54468_ i2=$abc$109383$new_n54467_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104746
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[27] nq=$abc$109383$new_n54470_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54470_ nq=$abc$109383$new_n54471_
-.subckt a2_x2 i0=$abc$109383$new_n54471_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54472_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[27] i1=soc.cpu.minerva.exception.mepc__r__base[25] q=$abc$109383$new_n54473_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54473_ i2=$abc$109383$new_n54472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104748
+.subckt and2_x1 i0=$abc$109383$new_n54471_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54472_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[27] i1=soc.cpu.minerva.exception.mepc__r__base[25] q=$abc$109383$new_n54473_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54473_ i2=$abc$109383$new_n54472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104748
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[28] nq=$abc$109383$new_n54475_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54475_ nq=$abc$109383$new_n54476_
-.subckt a2_x2 i0=$abc$109383$new_n54476_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54477_
-.subckt mx2_x2 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[28] i1=soc.cpu.minerva.exception.mepc__r__base[26] q=$abc$109383$new_n54478_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54478_ i2=$abc$109383$new_n54477_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104750
+.subckt and2_x1 i0=$abc$109383$new_n54476_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54477_
+.subckt mux2_x1 cmd=$abc$109383$new_n54433_ i0=soc.cpu.minerva.payload__csr_result$117[28] i1=soc.cpu.minerva.exception.mepc__r__base[26] q=$abc$109383$new_n54478_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54478_ i2=$abc$109383$new_n54477_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104750
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[29] nq=$abc$109383$new_n54480_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54480_ nq=$abc$109383$new_n54481_
-.subckt a2_x2 i0=$abc$109383$new_n54481_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54482_
-.subckt mx2_x2 cmd=$abc$109383$new_n54335_ i0=soc.cpu.minerva.payload__csr_result$117[29] i1=soc.cpu.minerva.exception.mepc__r__base[27] q=$abc$109383$new_n54483_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54483_ i2=$abc$109383$new_n54482_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104752
+.subckt and2_x1 i0=$abc$109383$new_n54481_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54482_
+.subckt mux2_x1 cmd=$abc$109383$new_n54335_ i0=soc.cpu.minerva.payload__csr_result$117[29] i1=soc.cpu.minerva.exception.mepc__r__base[27] q=$abc$109383$new_n54483_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54483_ i2=$abc$109383$new_n54482_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104752
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[30] nq=$abc$109383$new_n54485_
 .subckt nand3_x0 i0=$abc$109383$new_n54437_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54485_ nq=$abc$109383$new_n54486_
-.subckt a2_x2 i0=$abc$109383$new_n54486_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54487_
-.subckt mx2_x2 cmd=$abc$109383$new_n54335_ i0=soc.cpu.minerva.payload__csr_result$117[30] i1=soc.cpu.minerva.exception.mepc__r__base[28] q=$abc$109383$new_n54488_
-.subckt ao22_x2 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54488_ i2=$abc$109383$new_n54487_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104754
+.subckt and2_x1 i0=$abc$109383$new_n54486_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54487_
+.subckt mux2_x1 cmd=$abc$109383$new_n54335_ i0=soc.cpu.minerva.payload__csr_result$117[30] i1=soc.cpu.minerva.exception.mepc__r__base[28] q=$abc$109383$new_n54488_
+.subckt and21nor_x1 i0=$abc$109383$new_n54441_ i1=$abc$109383$new_n54488_ i2=$abc$109383$new_n54487_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104754
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$71[31] nq=$abc$109383$new_n54490_
 .subckt nand3_x0 i0=$abc$109383$new_n54092_ i1=$abc$109383$new_n54444_ i2=$abc$109383$new_n54490_ nq=$abc$109383$new_n54491_
-.subckt a2_x2 i0=$abc$109383$new_n54491_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54492_
-.subckt mx2_x2 cmd=$abc$109383$new_n54335_ i0=soc.cpu.minerva.payload__csr_result$117[31] i1=soc.cpu.minerva.exception.mepc__r__base[29] q=$abc$109383$new_n54493_
-.subckt ao22_x2 i0=$abc$109383$new_n54089_ i1=$abc$109383$new_n54493_ i2=$abc$109383$new_n54492_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104756
+.subckt and2_x1 i0=$abc$109383$new_n54491_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n54492_
+.subckt mux2_x1 cmd=$abc$109383$new_n54335_ i0=soc.cpu.minerva.payload__csr_result$117[31] i1=soc.cpu.minerva.exception.mepc__r__base[29] q=$abc$109383$new_n54493_
+.subckt and21nor_x1 i0=$abc$109383$new_n54089_ i1=$abc$109383$new_n54493_ i2=$abc$109383$new_n54492_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104756
 .subckt buf_x4 i=$abc$109383$new_n15240_ q=$abc$109383$new_n54495_
 .subckt nor4_x0 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n15243_ i2=$abc$109383$new_n15241_ i3=$abc$109383$new_n54495_ nq=$abc$109383$new_n54496_
-.subckt ao22_x2 i0=$abc$109383$new_n54332_ i1=$abc$109383$new_n54496_ i2=$abc$109383$new_n53172_ q=$abc$109383$new_n54497_
+.subckt and21nor_x1 i0=$abc$109383$new_n54332_ i1=$abc$109383$new_n54496_ i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n54497_
 .subckt inv_x1 i=soc.cpu.minerva.payload__csr_adr$114[0] nq=$abc$109383$new_n54498_
-.subckt a3_x2 i0=$abc$109383$new_n54070_ i1=$abc$109383$new_n54081_ i2=$abc$109383$new_n54067_ q=$abc$109383$new_n54499_
+.subckt and3_x1 i0=$abc$109383$new_n54070_ i1=$abc$109383$new_n54081_ i2=$abc$109383$new_n54067_ q=$abc$109383$new_n54499_
 .subckt buf_x4 i=$abc$109383$new_n54499_ q=$abc$109383$new_n54500_
 .subckt nand3_x0 i0=$abc$109383$new_n54251_ i1=$abc$109383$new_n15452_ i2=soc.cpu.minerva.payload__csr_adr$114[6] nq=$abc$109383$new_n54501_
 .subckt nand4_x0 i0=$abc$109383$new_n54064_ i1=$abc$109383$new_n54063_ i2=$abc$109383$new_n54062_ i3=soc.cpu.minerva.payload__csr_adr$114[1] nq=$abc$109383$new_n54502_
 .subckt nor2_x0 i0=$abc$109383$new_n54502_ i1=$abc$109383$new_n54501_ nq=$abc$109383$new_n54503_
-.subckt a3_x2 i0=$abc$109383$new_n54503_ i1=$abc$109383$new_n54500_ i2=$abc$109383$new_n54498_ q=$abc$109383$new_n54504_
-.subckt mx2_x2 cmd=$abc$109383$new_n54504_ i0=soc.cpu.minerva.exception.mcause__r__interrupt i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n54505_
-.subckt ao22_x2 i0=$abc$109383$new_n54089_ i1=$abc$109383$new_n54505_ i2=$abc$109383$new_n54497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104758
+.subckt and3_x1 i0=$abc$109383$new_n54503_ i1=$abc$109383$new_n54500_ i2=$abc$109383$new_n54498_ q=$abc$109383$new_n54504_
+.subckt mux2_x1 cmd=$abc$109383$new_n54504_ i0=soc.cpu.minerva.exception.mcause__r__interrupt i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n54505_
+.subckt and21nor_x1 i0=$abc$109383$new_n54089_ i1=$abc$109383$new_n54505_ i2=$abc$109383$new_n54497_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104758
 .subckt buf_x4 i=$abc$109383$new_n54081_ q=$abc$109383$new_n54507_
 .subckt nand2_x0 i0=$abc$109383$new_n54507_ i1=$abc$109383$new_n53312_ nq=$abc$109383$new_n54508_
-.subckt a2_x2 i0=soc.cpu.minerva.exception.mip__r__meip i1=soc.cpu.minerva.exception.mie__r__meie q=$abc$109383$new_n54509_
-.subckt a3_x2 i0=$abc$109383$new_n54509_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n54097_ q=$abc$109383$new_n54510_
+.subckt and2_x1 i0=soc.cpu.minerva.exception.mip__r__meip i1=soc.cpu.minerva.exception.mie__r__meie q=$abc$109383$new_n54509_
+.subckt and3_x1 i0=$abc$109383$new_n54509_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n54097_ q=$abc$109383$new_n54510_
 .subckt buf_x4 i=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54511_
 .subckt inv_x0 i=soc.cpu.minerva.payload__ebreak$84 nq=$abc$109383$new_n54512_
 .subckt inv_x0 i=soc.cpu.minerva.payload__ecall$82 nq=$abc$109383$new_n54513_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__load$97 i1=soc.cpu.minerva.payload__store$99 i2=soc.cpu.minerva.payload__loadstore_misaligned$80 q=$abc$109383$new_n54514_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__load$97 i1=soc.cpu.minerva.payload__store$99 i2=soc.cpu.minerva.payload__loadstore_misaligned$80 nq=$abc$109383$new_n54514_
 .subckt buf_x4 i=$abc$109383$new_n54514_ q=$abc$109383$new_n54515_
-.subckt ao22_x2 i0=$abc$109383$new_n54515_ i1=$abc$109383$new_n54513_ i2=$abc$109383$new_n54512_ q=$abc$109383$new_n54516_
+.subckt and21nor_x1 i0=$abc$109383$new_n54515_ i1=$abc$109383$new_n54513_ i2=$abc$109383$new_n54512_ nq=$abc$109383$new_n54516_
 .subckt nor2_x0 i0=$abc$109383$new_n54516_ i1=$abc$109383$new_n54511_ nq=$abc$109383$new_n54517_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[1] nq=$abc$109383$new_n54518_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[0] nq=$abc$109383$new_n54519_
-.subckt oa22_x2 i0=$abc$109383$new_n54519_ i1=$abc$109383$new_n54518_ i2=$abc$109383$new_n15251_ q=$abc$109383$new_n54520_
-.subckt oa22_x2 i0=$abc$109383$new_n54520_ i1=$abc$109383$new_n54517_ i2=$abc$109383$new_n54510_ q=$abc$109383$new_n54521_
-.subckt ao22_x2 i0=$abc$109383$new_n54521_ i1=$abc$109383$new_n54508_ i2=$abc$109383$new_n27536_ q=$abc$109383$new_n54522_
+.subckt or21nand_x1 i0=$abc$109383$new_n54519_ i1=$abc$109383$new_n54518_ i2=$abc$109383$new_n15251_ nq=$abc$109383$new_n54520_
+.subckt or21nand_x1 i0=$abc$109383$new_n54520_ i1=$abc$109383$new_n54517_ i2=$abc$109383$new_n54510_ nq=$abc$109383$new_n54521_
+.subckt and21nor_x1 i0=$abc$109383$new_n54521_ i1=$abc$109383$new_n54508_ i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n54522_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mcause__r__ecode[0] nq=$abc$109383$new_n54523_
 .subckt buf_x4 i=$abc$109383$new_n54500_ q=$abc$109383$new_n54524_
-.subckt a3_x2 i0=$abc$109383$new_n54253_ i1=soc.cpu.minerva.payload__csr_adr$114[1] i2=$abc$109383$new_n54498_ q=$abc$109383$new_n54525_
-.subckt oa22_x2 i0=$abc$109383$new_n54525_ i1=$abc$109383$new_n54524_ i2=$abc$109383$new_n54523_ q=$abc$109383$new_n54526_
-.subckt a4_x2 i0=$abc$109383$new_n54252_ i1=$abc$109383$new_n54250_ i2=$abc$109383$new_n54062_ i3=soc.cpu.minerva.payload__csr_adr$114[1] q=$abc$109383$new_n54527_
+.subckt and3_x1 i0=$abc$109383$new_n54253_ i1=soc.cpu.minerva.payload__csr_adr$114[1] i2=$abc$109383$new_n54498_ q=$abc$109383$new_n54525_
+.subckt or21nand_x1 i0=$abc$109383$new_n54525_ i1=$abc$109383$new_n54524_ i2=$abc$109383$new_n54523_ nq=$abc$109383$new_n54526_
+.subckt and4_x1 i0=$abc$109383$new_n54252_ i1=$abc$109383$new_n54250_ i2=$abc$109383$new_n54062_ i3=soc.cpu.minerva.payload__csr_adr$114[1] q=$abc$109383$new_n54527_
 .subckt nand4_x0 i0=$abc$109383$new_n54527_ i1=$abc$109383$new_n54086_ i2=soc.cpu.minerva.payload__csr_result$117[0] i3=$abc$109383$new_n54498_ nq=$abc$109383$new_n54528_
 .subckt nand3_x0 i0=$abc$109383$new_n54528_ i1=$abc$109383$new_n54526_ i2=$abc$109383$new_n54508_ nq=$abc$109383$new_n54529_
-.subckt a2_x2 i0=$abc$109383$new_n54529_ i1=$abc$109383$new_n54522_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104760
+.subckt and2_x1 i0=$abc$109383$new_n54529_ i1=$abc$109383$new_n54522_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104760
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__loadstore_misaligned$80 i1=soc.cpu.minerva.payload__load$97 nq=$abc$109383$new_n54531_
-.subckt a2_x2 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n54531_ q=$abc$109383$new_n54532_
-.subckt ao22_x2 i0=$abc$109383$new_n54532_ i1=$abc$109383$new_n15241_ i2=$abc$109383$new_n54520_ q=$abc$109383$new_n54533_
+.subckt and2_x1 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n54531_ q=$abc$109383$new_n54532_
+.subckt and21nor_x1 i0=$abc$109383$new_n54532_ i1=$abc$109383$new_n15241_ i2=$abc$109383$new_n54520_ nq=$abc$109383$new_n54533_
 .subckt buf_x4 i=$abc$109383$new_n54533_ q=$abc$109383$new_n54534_
-.subckt o2_x2 i0=$abc$109383$new_n54534_ i1=$abc$109383$new_n54510_ q=$abc$109383$new_n54535_
-.subckt ao22_x2 i0=$abc$109383$new_n54535_ i1=$abc$109383$new_n54508_ i2=$abc$109383$new_n27536_ q=$abc$109383$new_n54536_
+.subckt or2_x1 i0=$abc$109383$new_n54534_ i1=$abc$109383$new_n54510_ q=$abc$109383$new_n54535_
+.subckt and21nor_x1 i0=$abc$109383$new_n54535_ i1=$abc$109383$new_n54508_ i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n54536_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mcause__r__ecode[1] nq=$abc$109383$new_n54537_
-.subckt oa22_x2 i0=$abc$109383$new_n54525_ i1=$abc$109383$new_n54524_ i2=$abc$109383$new_n54537_ q=$abc$109383$new_n54538_
+.subckt or21nand_x1 i0=$abc$109383$new_n54525_ i1=$abc$109383$new_n54524_ i2=$abc$109383$new_n54537_ nq=$abc$109383$new_n54538_
 .subckt nand4_x0 i0=$abc$109383$new_n54527_ i1=$abc$109383$new_n54086_ i2=soc.cpu.minerva.payload__csr_result$117[1] i3=$abc$109383$new_n54498_ nq=$abc$109383$new_n54539_
 .subckt nand3_x0 i0=$abc$109383$new_n54539_ i1=$abc$109383$new_n54538_ i2=$abc$109383$new_n54508_ nq=$abc$109383$new_n54540_
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 .subckt buf_x4 i=$abc$109383$new_n54097_ q=$abc$109383$new_n54542_
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 .subckt buf_x4 i=$abc$109383$new_n54545_ q=$abc$109383$new_n54546_
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 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_result$117[2] nq=$abc$109383$new_n54549_
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 .subckt nand3_x0 i0=$abc$109383$new_n54550_ i1=$abc$109383$new_n54548_ i2=$abc$109383$new_n54547_ nq=$abc$109383$new_n54551_
 .subckt nand2_x0 i0=$abc$109383$new_n54551_ i1=$abc$109383$new_n54544_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104764
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 .subckt nand3_x0 i0=$abc$109383$new_n54509_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n54542_ nq=$abc$109383$new_n54554_
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 .subckt nand4_x0 i0=$abc$109383$new_n54527_ i1=$abc$109383$new_n54086_ i2=soc.cpu.minerva.payload__csr_result$117[3] i3=$abc$109383$new_n54498_ nq=$abc$109383$new_n54560_
 .subckt nand3_x0 i0=$abc$109383$new_n54560_ i1=$abc$109383$new_n54559_ i2=$abc$109383$new_n54508_ nq=$abc$109383$new_n54561_
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 .subckt buf_x4 i=$abc$109383$new_n54546_ q=$abc$109383$new_n54583_
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-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[24] i1=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n54608_
-.subckt a2_x2 i0=$abc$109383$new_n54608_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104808
-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[25] i1=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n54610_
-.subckt a2_x2 i0=$abc$109383$new_n54610_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104810
-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[26] i1=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n54612_
-.subckt a2_x2 i0=$abc$109383$new_n54612_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104812
-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[27] i1=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n54614_
-.subckt a2_x2 i0=$abc$109383$new_n54614_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104814
-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[28] i1=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n54616_
-.subckt a2_x2 i0=$abc$109383$new_n54616_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104816
-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[29] i1=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n54618_
-.subckt a2_x2 i0=$abc$109383$new_n54618_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104818
-.subckt mx2_x2 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[30] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n54620_
-.subckt a2_x2 i0=$abc$109383$new_n54620_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104820
-.subckt o2_x2 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n15243_ q=$abc$109383$new_n54622_
-.subckt o2_x2 i0=$abc$109383$new_n15241_ i1=$abc$109383$new_n15240_ q=$abc$109383$new_n54623_
-.subckt ao22_x2 i0=$abc$109383$new_n54623_ i1=$abc$109383$new_n54622_ i2=$abc$109383$new_n54081_ q=$abc$109383$new_n54624_
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[22] i1=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n54604_
+.subckt and2_x1 i0=$abc$109383$new_n54604_ i1=$abc$109383$new_n54583_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104804
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[23] i1=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n54606_
+.subckt and2_x1 i0=$abc$109383$new_n54606_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104806
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[24] i1=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n54608_
+.subckt and2_x1 i0=$abc$109383$new_n54608_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104808
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[25] i1=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n54610_
+.subckt and2_x1 i0=$abc$109383$new_n54610_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104810
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[26] i1=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n54612_
+.subckt and2_x1 i0=$abc$109383$new_n54612_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104812
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[27] i1=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n54614_
+.subckt and2_x1 i0=$abc$109383$new_n54614_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104814
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[28] i1=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n54616_
+.subckt and2_x1 i0=$abc$109383$new_n54616_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104816
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[29] i1=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n54618_
+.subckt and2_x1 i0=$abc$109383$new_n54618_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104818
+.subckt mux2_x1 cmd=$abc$109383$new_n54603_ i0=soc.cpu.minerva.exception.mcause__r__ecode[30] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n54620_
+.subckt and2_x1 i0=$abc$109383$new_n54620_ i1=$abc$109383$new_n54546_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104820
+.subckt or2_x1 i0=$abc$109383$new_n15244_ i1=$abc$109383$new_n15243_ q=$abc$109383$new_n54622_
+.subckt or2_x1 i0=$abc$109383$new_n15241_ i1=$abc$109383$new_n15240_ q=$abc$109383$new_n54623_
+.subckt and21nor_x1 i0=$abc$109383$new_n54623_ i1=$abc$109383$new_n54622_ i2=$abc$109383$new_n54081_ nq=$abc$109383$new_n54624_
 .subckt buf_x4 i=$abc$109383$new_n54624_ q=$abc$109383$new_n54625_
 .subckt buf_x4 i=$abc$109383$new_n54625_ q=$abc$109383$new_n54626_
 .subckt nand3_x0 i0=$abc$109383$new_n54070_ i1=$abc$109383$new_n54081_ i2=$abc$109383$new_n54067_ nq=$abc$109383$new_n54627_
 .subckt buf_x4 i=$abc$109383$new_n54627_ q=$abc$109383$new_n54628_
-.subckt o3_x2 i0=$abc$109383$new_n54502_ i1=$abc$109383$new_n54501_ i2=$abc$109383$new_n54498_ q=$abc$109383$new_n54629_
-.subckt ao22_x2 i0=$abc$109383$new_n54629_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[0] q=$abc$109383$new_n54630_
+.subckt or3_x1 i0=$abc$109383$new_n54502_ i1=$abc$109383$new_n54501_ i2=$abc$109383$new_n54498_ q=$abc$109383$new_n54629_
+.subckt and21nor_x1 i0=$abc$109383$new_n54629_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[0] nq=$abc$109383$new_n54630_
 .subckt nor3_x0 i0=$abc$109383$new_n54502_ i1=$abc$109383$new_n54501_ i2=$abc$109383$new_n54498_ nq=$abc$109383$new_n54631_
 .subckt buf_x4 i=$abc$109383$new_n54631_ q=$abc$109383$new_n54632_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[0] q=$abc$109383$new_n54633_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[0] q=$abc$109383$new_n54633_
 .subckt nor3_x0 i0=$abc$109383$new_n54633_ i1=$abc$109383$new_n54630_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54634_
-.subckt o2_x2 i0=$abc$109383$new_n54516_ i1=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54635_
+.subckt or2_x1 i0=$abc$109383$new_n54516_ i1=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54635_
 .subckt buf_x4 i=$abc$109383$new_n54635_ q=$abc$109383$new_n54636_
 .subckt buf_x4 i=$abc$109383$new_n54533_ q=$abc$109383$new_n54637_
 .subckt buf_x4 i=$abc$109383$new_n54637_ q=$abc$109383$new_n54638_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__store$99 i1=soc.cpu.minerva.payload__loadstore_misaligned$80 nq=$abc$109383$new_n54639_
-.subckt a2_x2 i0=$abc$109383$new_n54639_ i1=$abc$109383$new_n54531_ q=$abc$109383$new_n54640_
-.subckt oa22_x2 i0=$abc$109383$new_n54513_ i1=$abc$109383$new_n54640_ i2=$abc$109383$new_n54623_ q=$abc$109383$new_n54641_
+.subckt and2_x1 i0=$abc$109383$new_n54639_ i1=$abc$109383$new_n54531_ q=$abc$109383$new_n54640_
+.subckt or21nand_x1 i0=$abc$109383$new_n54513_ i1=$abc$109383$new_n54640_ i2=$abc$109383$new_n54623_ nq=$abc$109383$new_n54641_
 .subckt buf_x4 i=$abc$109383$new_n54641_ q=$abc$109383$new_n54642_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[0] nq=$abc$109383$new_n54643_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__ecall$82 i1=$abc$109383$new_n54515_ i2=$abc$109383$new_n15242_ q=$abc$109383$new_n54644_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__ecall$82 i1=$abc$109383$new_n54515_ i2=$abc$109383$new_n15242_ nq=$abc$109383$new_n54644_
 .subckt buf_x4 i=$abc$109383$new_n54644_ q=$abc$109383$new_n54645_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54519_ q=$abc$109383$new_n54646_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54519_ q=$abc$109383$new_n54646_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[0] nq=$abc$109383$new_n54647_
-.subckt a3_x2 i0=$abc$109383$new_n54647_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54648_
-.subckt a3_x2 i0=$abc$109383$new_n54648_ i1=$abc$109383$new_n54646_ i2=$abc$109383$new_n54643_ q=$abc$109383$new_n54649_
+.subckt and3_x1 i0=$abc$109383$new_n54647_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54648_
+.subckt and3_x1 i0=$abc$109383$new_n54648_ i1=$abc$109383$new_n54646_ i2=$abc$109383$new_n54643_ q=$abc$109383$new_n54649_
 .subckt nor3_x0 i0=$abc$109383$new_n54649_ i1=$abc$109383$new_n54634_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104822
-.subckt ao22_x2 i0=$abc$109383$new_n54629_ i1=$abc$109383$new_n54627_ i2=soc.cpu.minerva.exception.mtval__r__value[1] q=$abc$109383$new_n54651_
-.subckt a3_x2 i0=$abc$109383$new_n54631_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[1] q=$abc$109383$new_n54652_
-.subckt o3_x2 i0=$abc$109383$new_n54652_ i1=$abc$109383$new_n54651_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54653_
+.subckt and21nor_x1 i0=$abc$109383$new_n54629_ i1=$abc$109383$new_n54627_ i2=soc.cpu.minerva.exception.mtval__r__value[1] nq=$abc$109383$new_n54651_
+.subckt and3_x1 i0=$abc$109383$new_n54631_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[1] q=$abc$109383$new_n54652_
+.subckt or3_x1 i0=$abc$109383$new_n54652_ i1=$abc$109383$new_n54651_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54653_
 .subckt buf_x4 i=$abc$109383$new_n54637_ q=$abc$109383$new_n54654_
-.subckt a4_x2 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54635_ i3=soc.cpu.minerva.payload__instruction$73[1] q=$abc$109383$new_n54655_
-.subckt o3_x2 i0=$abc$109383$new_n54644_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n54518_ q=$abc$109383$new_n54656_
+.subckt and4_x1 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54635_ i3=soc.cpu.minerva.payload__instruction$73[1] q=$abc$109383$new_n54655_
+.subckt or3_x1 i0=$abc$109383$new_n54644_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n54518_ q=$abc$109383$new_n54656_
 .subckt nand3_x0 i0=$abc$109383$new_n54515_ i1=$abc$109383$new_n54097_ i2=soc.cpu.minerva.payload__result$93[1] nq=$abc$109383$new_n54657_
-.subckt a3_x2 i0=$abc$109383$new_n54657_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54658_
+.subckt and3_x1 i0=$abc$109383$new_n54657_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54658_
 .subckt nand2_x0 i0=$abc$109383$new_n54658_ i1=$abc$109383$new_n54656_ nq=$abc$109383$new_n54659_
-.subckt ao22_x2 i0=$abc$109383$new_n54659_ i1=$abc$109383$new_n54655_ i2=$abc$109383$new_n31806_ q=$abc$109383$new_n54660_
-.subckt a2_x2 i0=$abc$109383$new_n54660_ i1=$abc$109383$new_n54653_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104824
+.subckt and21nor_x1 i0=$abc$109383$new_n54659_ i1=$abc$109383$new_n54655_ i2=$abc$109383$new_n31806_ nq=$abc$109383$new_n54660_
+.subckt and2_x1 i0=$abc$109383$new_n54660_ i1=$abc$109383$new_n54653_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104824
 .subckt nand3_x0 i0=$abc$109383$new_n54253_ i1=soc.cpu.minerva.payload__csr_adr$114[1] i2=soc.cpu.minerva.payload__csr_adr$114[0] nq=$abc$109383$new_n54662_
 .subckt buf_x4 i=$abc$109383$new_n54662_ q=$abc$109383$new_n54663_
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[2] q=$abc$109383$new_n54664_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[2] q=$abc$109383$new_n54665_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[2] nq=$abc$109383$new_n54664_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[2] q=$abc$109383$new_n54665_
 .subckt nor3_x0 i0=$abc$109383$new_n54665_ i1=$abc$109383$new_n54664_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54666_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[2] nq=$abc$109383$new_n54667_
 .subckt buf_x4 i=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54668_
 .subckt buf_x4 i=$abc$109383$new_n54512_ q=$abc$109383$new_n54669_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54328_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54670_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54328_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54670_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[2] nq=$abc$109383$new_n54671_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54671_ q=$abc$109383$new_n54672_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54671_ q=$abc$109383$new_n54672_
 .subckt buf_x4 i=$abc$109383$new_n54097_ q=$abc$109383$new_n54673_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[2] nq=$abc$109383$new_n54674_
-.subckt a3_x2 i0=$abc$109383$new_n54674_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54675_
-.subckt a4_x2 i0=$abc$109383$new_n54675_ i1=$abc$109383$new_n54672_ i2=$abc$109383$new_n54670_ i3=$abc$109383$new_n54667_ q=$abc$109383$new_n54676_
+.subckt and3_x1 i0=$abc$109383$new_n54674_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54675_
+.subckt and4_x1 i0=$abc$109383$new_n54675_ i1=$abc$109383$new_n54672_ i2=$abc$109383$new_n54670_ i3=$abc$109383$new_n54667_ q=$abc$109383$new_n54676_
 .subckt nor3_x0 i0=$abc$109383$new_n54676_ i1=$abc$109383$new_n54666_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104826
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[3] q=$abc$109383$new_n54678_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[3] q=$abc$109383$new_n54679_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[3] nq=$abc$109383$new_n54678_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[3] q=$abc$109383$new_n54679_
 .subckt nor3_x0 i0=$abc$109383$new_n54679_ i1=$abc$109383$new_n54678_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54680_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[3] nq=$abc$109383$new_n54681_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54339_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54682_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54339_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54682_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[3] nq=$abc$109383$new_n54683_
 .subckt buf_x4 i=$abc$109383$new_n54637_ q=$abc$109383$new_n54684_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54683_ q=$abc$109383$new_n54685_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54683_ q=$abc$109383$new_n54685_
 .subckt buf_x4 i=$abc$109383$new_n54515_ q=$abc$109383$new_n54686_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[3] nq=$abc$109383$new_n54687_
-.subckt a3_x2 i0=$abc$109383$new_n54687_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54688_
-.subckt a4_x2 i0=$abc$109383$new_n54688_ i1=$abc$109383$new_n54685_ i2=$abc$109383$new_n54682_ i3=$abc$109383$new_n54681_ q=$abc$109383$new_n54689_
+.subckt and3_x1 i0=$abc$109383$new_n54687_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54688_
+.subckt and4_x1 i0=$abc$109383$new_n54688_ i1=$abc$109383$new_n54685_ i2=$abc$109383$new_n54682_ i3=$abc$109383$new_n54681_ q=$abc$109383$new_n54689_
 .subckt nor3_x0 i0=$abc$109383$new_n54689_ i1=$abc$109383$new_n54680_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104828
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[4] q=$abc$109383$new_n54691_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[4] q=$abc$109383$new_n54692_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[4] nq=$abc$109383$new_n54691_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[4] q=$abc$109383$new_n54692_
 .subckt nor3_x0 i0=$abc$109383$new_n54692_ i1=$abc$109383$new_n54691_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54693_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[4] nq=$abc$109383$new_n54694_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54694_ q=$abc$109383$new_n54695_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54694_ q=$abc$109383$new_n54695_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[4] nq=$abc$109383$new_n54696_
 .subckt buf_x4 i=$abc$109383$new_n54512_ q=$abc$109383$new_n54697_
 .subckt buf_x4 i=$abc$109383$new_n15240_ q=$abc$109383$new_n54698_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54344_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54699_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54344_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54699_
 .subckt buf_x4 i=$abc$109383$new_n54635_ q=$abc$109383$new_n54700_
 .subckt buf_x4 i=$abc$109383$new_n54641_ q=$abc$109383$new_n54701_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[4] nq=$abc$109383$new_n54702_
-.subckt a3_x2 i0=$abc$109383$new_n54702_ i1=$abc$109383$new_n54699_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54703_
-.subckt a3_x2 i0=$abc$109383$new_n54703_ i1=$abc$109383$new_n54696_ i2=$abc$109383$new_n54695_ q=$abc$109383$new_n54704_
+.subckt and3_x1 i0=$abc$109383$new_n54702_ i1=$abc$109383$new_n54699_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54703_
+.subckt and3_x1 i0=$abc$109383$new_n54703_ i1=$abc$109383$new_n54696_ i2=$abc$109383$new_n54695_ q=$abc$109383$new_n54704_
 .subckt nor3_x0 i0=$abc$109383$new_n54704_ i1=$abc$109383$new_n54693_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104830
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[5] q=$abc$109383$new_n54706_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[5] q=$abc$109383$new_n54707_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[5] nq=$abc$109383$new_n54706_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[5] q=$abc$109383$new_n54707_
 .subckt nor3_x0 i0=$abc$109383$new_n54707_ i1=$abc$109383$new_n54706_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54708_
 .subckt buf_x4 i=$abc$109383$new_n54512_ q=$abc$109383$new_n54709_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54349_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54710_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54349_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54710_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[5] nq=$abc$109383$new_n54711_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[5] nq=$abc$109383$new_n54712_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54712_ q=$abc$109383$new_n54713_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54712_ q=$abc$109383$new_n54713_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[5] nq=$abc$109383$new_n54714_
-.subckt a3_x2 i0=$abc$109383$new_n54714_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54715_
-.subckt a4_x2 i0=$abc$109383$new_n54715_ i1=$abc$109383$new_n54713_ i2=$abc$109383$new_n54711_ i3=$abc$109383$new_n54710_ q=$abc$109383$new_n54716_
+.subckt and3_x1 i0=$abc$109383$new_n54714_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54715_
+.subckt and4_x1 i0=$abc$109383$new_n54715_ i1=$abc$109383$new_n54713_ i2=$abc$109383$new_n54711_ i3=$abc$109383$new_n54710_ q=$abc$109383$new_n54716_
 .subckt nor3_x0 i0=$abc$109383$new_n54716_ i1=$abc$109383$new_n54708_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104832
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[6] q=$abc$109383$new_n54718_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[6] q=$abc$109383$new_n54719_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[6] nq=$abc$109383$new_n54718_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54524_ i2=soc.cpu.minerva.payload__csr_result$117[6] q=$abc$109383$new_n54719_
 .subckt nor3_x0 i0=$abc$109383$new_n54719_ i1=$abc$109383$new_n54718_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54720_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[6] nq=$abc$109383$new_n54721_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54355_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54722_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54355_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54722_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[6] nq=$abc$109383$new_n54723_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54723_ q=$abc$109383$new_n54724_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54723_ q=$abc$109383$new_n54724_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[6] nq=$abc$109383$new_n54725_
-.subckt a3_x2 i0=$abc$109383$new_n54725_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54726_
-.subckt a4_x2 i0=$abc$109383$new_n54726_ i1=$abc$109383$new_n54724_ i2=$abc$109383$new_n54722_ i3=$abc$109383$new_n54721_ q=$abc$109383$new_n54727_
+.subckt and3_x1 i0=$abc$109383$new_n54725_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54726_
+.subckt and4_x1 i0=$abc$109383$new_n54726_ i1=$abc$109383$new_n54724_ i2=$abc$109383$new_n54722_ i3=$abc$109383$new_n54721_ q=$abc$109383$new_n54727_
 .subckt nor3_x0 i0=$abc$109383$new_n54727_ i1=$abc$109383$new_n54720_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104834
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[7] q=$abc$109383$new_n54729_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[7] nq=$abc$109383$new_n54729_
 .subckt buf_x4 i=$abc$109383$new_n54500_ q=$abc$109383$new_n54730_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[7] q=$abc$109383$new_n54731_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[7] q=$abc$109383$new_n54731_
 .subckt nor3_x0 i0=$abc$109383$new_n54731_ i1=$abc$109383$new_n54729_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54732_
 .subckt buf_x4 i=$abc$109383$new_n54641_ q=$abc$109383$new_n54733_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[7] nq=$abc$109383$new_n54734_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54360_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54735_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54360_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54735_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[7] nq=$abc$109383$new_n54736_
 .subckt buf_x4 i=$abc$109383$new_n54644_ q=$abc$109383$new_n54737_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54736_ q=$abc$109383$new_n54738_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54736_ q=$abc$109383$new_n54738_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[7] nq=$abc$109383$new_n54739_
-.subckt a3_x2 i0=$abc$109383$new_n54739_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54740_
-.subckt a4_x2 i0=$abc$109383$new_n54740_ i1=$abc$109383$new_n54738_ i2=$abc$109383$new_n54735_ i3=$abc$109383$new_n54734_ q=$abc$109383$new_n54741_
+.subckt and3_x1 i0=$abc$109383$new_n54739_ i1=$abc$109383$new_n54092_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54740_
+.subckt and4_x1 i0=$abc$109383$new_n54740_ i1=$abc$109383$new_n54738_ i2=$abc$109383$new_n54735_ i3=$abc$109383$new_n54734_ q=$abc$109383$new_n54741_
 .subckt nor3_x0 i0=$abc$109383$new_n54741_ i1=$abc$109383$new_n54732_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104836
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[8] q=$abc$109383$new_n54743_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[8] q=$abc$109383$new_n54744_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[8] nq=$abc$109383$new_n54743_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[8] q=$abc$109383$new_n54744_
 .subckt nor3_x0 i0=$abc$109383$new_n54744_ i1=$abc$109383$new_n54743_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54745_
 .subckt buf_x4 i=$abc$109383$new_n54635_ q=$abc$109383$new_n54746_
 .subckt buf_x4 i=$abc$109383$new_n54637_ q=$abc$109383$new_n54747_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[8] nq=$abc$109383$new_n54748_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54365_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54749_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54365_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54749_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[8] nq=$abc$109383$new_n54750_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54750_ q=$abc$109383$new_n54751_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54750_ q=$abc$109383$new_n54751_
 .subckt buf_x4 i=$abc$109383$new_n54081_ q=$abc$109383$new_n54752_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[8] nq=$abc$109383$new_n54753_
-.subckt a3_x2 i0=$abc$109383$new_n54753_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54754_
-.subckt a4_x2 i0=$abc$109383$new_n54754_ i1=$abc$109383$new_n54751_ i2=$abc$109383$new_n54749_ i3=$abc$109383$new_n54748_ q=$abc$109383$new_n54755_
+.subckt and3_x1 i0=$abc$109383$new_n54753_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54754_
+.subckt and4_x1 i0=$abc$109383$new_n54754_ i1=$abc$109383$new_n54751_ i2=$abc$109383$new_n54749_ i3=$abc$109383$new_n54748_ q=$abc$109383$new_n54755_
 .subckt nor3_x0 i0=$abc$109383$new_n54755_ i1=$abc$109383$new_n54745_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104838
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[9] q=$abc$109383$new_n54757_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[9] q=$abc$109383$new_n54758_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[9] nq=$abc$109383$new_n54757_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[9] q=$abc$109383$new_n54758_
 .subckt nor3_x0 i0=$abc$109383$new_n54758_ i1=$abc$109383$new_n54757_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54759_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[9] nq=$abc$109383$new_n54760_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54760_ q=$abc$109383$new_n54761_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54760_ q=$abc$109383$new_n54761_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[9] nq=$abc$109383$new_n54762_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54370_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54763_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54370_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54763_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[9] nq=$abc$109383$new_n54764_
-.subckt a3_x2 i0=$abc$109383$new_n54764_ i1=$abc$109383$new_n54763_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54765_
-.subckt a3_x2 i0=$abc$109383$new_n54765_ i1=$abc$109383$new_n54762_ i2=$abc$109383$new_n54761_ q=$abc$109383$new_n54766_
+.subckt and3_x1 i0=$abc$109383$new_n54764_ i1=$abc$109383$new_n54763_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54765_
+.subckt and3_x1 i0=$abc$109383$new_n54765_ i1=$abc$109383$new_n54762_ i2=$abc$109383$new_n54761_ q=$abc$109383$new_n54766_
 .subckt nor3_x0 i0=$abc$109383$new_n54766_ i1=$abc$109383$new_n54759_ i2=$abc$109383$new_n52587_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104840
 .subckt buf_x4 i=$abc$109383$new_n27421_ q=$abc$109383$new_n54768_
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[10] q=$abc$109383$new_n54769_
-.subckt a3_x2 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[10] q=$abc$109383$new_n54770_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54628_ i2=soc.cpu.minerva.exception.mtval__r__value[10] nq=$abc$109383$new_n54769_
+.subckt and3_x1 i0=$abc$109383$new_n54632_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[10] q=$abc$109383$new_n54770_
 .subckt nor3_x0 i0=$abc$109383$new_n54770_ i1=$abc$109383$new_n54769_ i2=$abc$109383$new_n54626_ nq=$abc$109383$new_n54771_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[10] nq=$abc$109383$new_n54772_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54375_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54773_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54375_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54773_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[10] nq=$abc$109383$new_n54774_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54774_ q=$abc$109383$new_n54775_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54774_ q=$abc$109383$new_n54775_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[10] nq=$abc$109383$new_n54776_
-.subckt a3_x2 i0=$abc$109383$new_n54776_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54777_
-.subckt a4_x2 i0=$abc$109383$new_n54777_ i1=$abc$109383$new_n54775_ i2=$abc$109383$new_n54773_ i3=$abc$109383$new_n54772_ q=$abc$109383$new_n54778_
+.subckt and3_x1 i0=$abc$109383$new_n54776_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54777_
+.subckt and4_x1 i0=$abc$109383$new_n54777_ i1=$abc$109383$new_n54775_ i2=$abc$109383$new_n54773_ i3=$abc$109383$new_n54772_ q=$abc$109383$new_n54778_
 .subckt nor3_x0 i0=$abc$109383$new_n54778_ i1=$abc$109383$new_n54771_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104842
 .subckt buf_x4 i=$abc$109383$new_n54625_ q=$abc$109383$new_n54780_
 .subckt buf_x4 i=$abc$109383$new_n54627_ q=$abc$109383$new_n54781_
-.subckt ao22_x2 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[11] q=$abc$109383$new_n54782_
+.subckt and21nor_x1 i0=$abc$109383$new_n54663_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[11] nq=$abc$109383$new_n54782_
 .subckt buf_x4 i=$abc$109383$new_n54631_ q=$abc$109383$new_n54783_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n54784_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n54784_
 .subckt nor3_x0 i0=$abc$109383$new_n54784_ i1=$abc$109383$new_n54782_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54785_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[11] nq=$abc$109383$new_n54786_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54380_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54787_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54380_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54787_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[11] nq=$abc$109383$new_n54788_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54788_ q=$abc$109383$new_n54789_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54788_ q=$abc$109383$new_n54789_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[11] nq=$abc$109383$new_n54790_
-.subckt a3_x2 i0=$abc$109383$new_n54790_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54791_
-.subckt a4_x2 i0=$abc$109383$new_n54791_ i1=$abc$109383$new_n54789_ i2=$abc$109383$new_n54787_ i3=$abc$109383$new_n54786_ q=$abc$109383$new_n54792_
+.subckt and3_x1 i0=$abc$109383$new_n54790_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54080_ q=$abc$109383$new_n54791_
+.subckt and4_x1 i0=$abc$109383$new_n54791_ i1=$abc$109383$new_n54789_ i2=$abc$109383$new_n54787_ i3=$abc$109383$new_n54786_ q=$abc$109383$new_n54792_
 .subckt nor3_x0 i0=$abc$109383$new_n54792_ i1=$abc$109383$new_n54785_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104844
 .subckt buf_x4 i=$abc$109383$new_n54662_ q=$abc$109383$new_n54794_
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[12] q=$abc$109383$new_n54795_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[12] q=$abc$109383$new_n54796_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[12] nq=$abc$109383$new_n54795_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[12] q=$abc$109383$new_n54796_
 .subckt nor3_x0 i0=$abc$109383$new_n54796_ i1=$abc$109383$new_n54795_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54797_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[12] nq=$abc$109383$new_n54798_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54388_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54799_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54388_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54799_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[12] nq=$abc$109383$new_n54800_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54800_ q=$abc$109383$new_n54801_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54800_ q=$abc$109383$new_n54801_
 .subckt buf_x4 i=$abc$109383$new_n54079_ q=$abc$109383$new_n54802_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[12] nq=$abc$109383$new_n54803_
-.subckt a3_x2 i0=$abc$109383$new_n54803_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54804_
-.subckt a4_x2 i0=$abc$109383$new_n54804_ i1=$abc$109383$new_n54801_ i2=$abc$109383$new_n54799_ i3=$abc$109383$new_n54798_ q=$abc$109383$new_n54805_
+.subckt and3_x1 i0=$abc$109383$new_n54803_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54804_
+.subckt and4_x1 i0=$abc$109383$new_n54804_ i1=$abc$109383$new_n54801_ i2=$abc$109383$new_n54799_ i3=$abc$109383$new_n54798_ q=$abc$109383$new_n54805_
 .subckt nor3_x0 i0=$abc$109383$new_n54805_ i1=$abc$109383$new_n54797_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104846
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[13] q=$abc$109383$new_n54807_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[13] q=$abc$109383$new_n54808_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[13] nq=$abc$109383$new_n54807_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[13] q=$abc$109383$new_n54808_
 .subckt nor3_x0 i0=$abc$109383$new_n54808_ i1=$abc$109383$new_n54807_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54809_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[13] nq=$abc$109383$new_n54810_
-.subckt o4_x2 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54394_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54811_
+.subckt or4_x1 i0=$abc$109383$new_n54495_ i1=$abc$109383$new_n54394_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54668_ q=$abc$109383$new_n54811_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[13] nq=$abc$109383$new_n54812_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54812_ q=$abc$109383$new_n54813_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54812_ q=$abc$109383$new_n54813_
 .subckt buf_x4 i=$abc$109383$new_n54097_ q=$abc$109383$new_n54814_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[13] nq=$abc$109383$new_n54815_
-.subckt a3_x2 i0=$abc$109383$new_n54815_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54816_
-.subckt a4_x2 i0=$abc$109383$new_n54816_ i1=$abc$109383$new_n54813_ i2=$abc$109383$new_n54811_ i3=$abc$109383$new_n54810_ q=$abc$109383$new_n54817_
+.subckt and3_x1 i0=$abc$109383$new_n54815_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54816_
+.subckt and4_x1 i0=$abc$109383$new_n54816_ i1=$abc$109383$new_n54813_ i2=$abc$109383$new_n54811_ i3=$abc$109383$new_n54810_ q=$abc$109383$new_n54817_
 .subckt nor3_x0 i0=$abc$109383$new_n54817_ i1=$abc$109383$new_n54809_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104848
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[14] q=$abc$109383$new_n54819_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[14] q=$abc$109383$new_n54820_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[14] nq=$abc$109383$new_n54819_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[14] q=$abc$109383$new_n54820_
 .subckt nor3_x0 i0=$abc$109383$new_n54820_ i1=$abc$109383$new_n54819_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54821_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[14] nq=$abc$109383$new_n54822_
 .subckt buf_x4 i=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54823_
 .subckt buf_x4 i=$abc$109383$new_n15240_ q=$abc$109383$new_n54824_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54399_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54825_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54399_ i2=$abc$109383$new_n54669_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54825_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[14] nq=$abc$109383$new_n54826_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54826_ q=$abc$109383$new_n54827_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54684_ i2=$abc$109383$new_n54826_ q=$abc$109383$new_n54827_
 .subckt nand3_x0 i0=$abc$109383$new_n54686_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[14] nq=$abc$109383$new_n54828_
-.subckt a3_x2 i0=$abc$109383$new_n54828_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54829_
-.subckt a4_x2 i0=$abc$109383$new_n54829_ i1=$abc$109383$new_n54827_ i2=$abc$109383$new_n54825_ i3=$abc$109383$new_n54822_ q=$abc$109383$new_n54830_
+.subckt and3_x1 i0=$abc$109383$new_n54828_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54829_
+.subckt and4_x1 i0=$abc$109383$new_n54829_ i1=$abc$109383$new_n54827_ i2=$abc$109383$new_n54825_ i3=$abc$109383$new_n54822_ q=$abc$109383$new_n54830_
 .subckt nor3_x0 i0=$abc$109383$new_n54830_ i1=$abc$109383$new_n54821_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104850
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[15] q=$abc$109383$new_n54832_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[15] q=$abc$109383$new_n54833_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[15] nq=$abc$109383$new_n54832_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[15] q=$abc$109383$new_n54833_
 .subckt nor3_x0 i0=$abc$109383$new_n54833_ i1=$abc$109383$new_n54832_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54834_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[15] nq=$abc$109383$new_n54835_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54404_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54836_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54404_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54836_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[15] nq=$abc$109383$new_n54837_
 .subckt buf_x4 i=$abc$109383$new_n54637_ q=$abc$109383$new_n54838_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54837_ q=$abc$109383$new_n54839_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54837_ q=$abc$109383$new_n54839_
 .subckt buf_x4 i=$abc$109383$new_n54515_ q=$abc$109383$new_n54840_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[15] nq=$abc$109383$new_n54841_
-.subckt a3_x2 i0=$abc$109383$new_n54841_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54842_
-.subckt a4_x2 i0=$abc$109383$new_n54842_ i1=$abc$109383$new_n54839_ i2=$abc$109383$new_n54836_ i3=$abc$109383$new_n54835_ q=$abc$109383$new_n54843_
+.subckt and3_x1 i0=$abc$109383$new_n54841_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54842_
+.subckt and4_x1 i0=$abc$109383$new_n54842_ i1=$abc$109383$new_n54839_ i2=$abc$109383$new_n54836_ i3=$abc$109383$new_n54835_ q=$abc$109383$new_n54843_
 .subckt nor3_x0 i0=$abc$109383$new_n54843_ i1=$abc$109383$new_n54834_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104852
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[16] q=$abc$109383$new_n54845_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[16] q=$abc$109383$new_n54846_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[16] nq=$abc$109383$new_n54845_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54730_ i2=soc.cpu.minerva.payload__csr_result$117[16] q=$abc$109383$new_n54846_
 .subckt nor3_x0 i0=$abc$109383$new_n54846_ i1=$abc$109383$new_n54845_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54847_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[16] nq=$abc$109383$new_n54848_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54848_ q=$abc$109383$new_n54849_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54848_ q=$abc$109383$new_n54849_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[16] nq=$abc$109383$new_n54850_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54410_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54851_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54410_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54851_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[16] nq=$abc$109383$new_n54852_
-.subckt a3_x2 i0=$abc$109383$new_n54852_ i1=$abc$109383$new_n54851_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54853_
-.subckt a3_x2 i0=$abc$109383$new_n54853_ i1=$abc$109383$new_n54850_ i2=$abc$109383$new_n54849_ q=$abc$109383$new_n54854_
+.subckt and3_x1 i0=$abc$109383$new_n54852_ i1=$abc$109383$new_n54851_ i2=$abc$109383$new_n54625_ q=$abc$109383$new_n54853_
+.subckt and3_x1 i0=$abc$109383$new_n54853_ i1=$abc$109383$new_n54850_ i2=$abc$109383$new_n54849_ q=$abc$109383$new_n54854_
 .subckt nor3_x0 i0=$abc$109383$new_n54854_ i1=$abc$109383$new_n54847_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104854
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[17] q=$abc$109383$new_n54856_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[17] nq=$abc$109383$new_n54856_
 .subckt buf_x4 i=$abc$109383$new_n54500_ q=$abc$109383$new_n54857_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[17] q=$abc$109383$new_n54858_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[17] q=$abc$109383$new_n54858_
 .subckt nor3_x0 i0=$abc$109383$new_n54858_ i1=$abc$109383$new_n54856_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54859_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54415_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54860_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54415_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54860_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[17] nq=$abc$109383$new_n54861_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[17] nq=$abc$109383$new_n54862_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54862_ q=$abc$109383$new_n54863_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54862_ q=$abc$109383$new_n54863_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[17] nq=$abc$109383$new_n54864_
-.subckt a3_x2 i0=$abc$109383$new_n54864_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54865_
-.subckt a4_x2 i0=$abc$109383$new_n54865_ i1=$abc$109383$new_n54863_ i2=$abc$109383$new_n54861_ i3=$abc$109383$new_n54860_ q=$abc$109383$new_n54866_
+.subckt and3_x1 i0=$abc$109383$new_n54864_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54865_
+.subckt and4_x1 i0=$abc$109383$new_n54865_ i1=$abc$109383$new_n54863_ i2=$abc$109383$new_n54861_ i3=$abc$109383$new_n54860_ q=$abc$109383$new_n54866_
 .subckt nor3_x0 i0=$abc$109383$new_n54866_ i1=$abc$109383$new_n54859_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104856
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[18] q=$abc$109383$new_n54868_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[18] q=$abc$109383$new_n54869_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[18] nq=$abc$109383$new_n54868_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[18] q=$abc$109383$new_n54869_
 .subckt nor3_x0 i0=$abc$109383$new_n54869_ i1=$abc$109383$new_n54868_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54870_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[18] nq=$abc$109383$new_n54871_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[18] nq=$abc$109383$new_n54872_
-.subckt o3_x2 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54872_ q=$abc$109383$new_n54873_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54420_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54874_
+.subckt or3_x1 i0=$abc$109383$new_n54737_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54872_ q=$abc$109383$new_n54873_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54420_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54874_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54673_ i2=soc.cpu.minerva.payload__result$93[18] nq=$abc$109383$new_n54875_
-.subckt a2_x2 i0=$abc$109383$new_n54875_ i1=$abc$109383$new_n54874_ q=$abc$109383$new_n54876_
-.subckt a4_x2 i0=$abc$109383$new_n54876_ i1=$abc$109383$new_n54873_ i2=$abc$109383$new_n54871_ i3=$abc$109383$new_n54625_ q=$abc$109383$new_n54877_
+.subckt and2_x1 i0=$abc$109383$new_n54875_ i1=$abc$109383$new_n54874_ q=$abc$109383$new_n54876_
+.subckt and4_x1 i0=$abc$109383$new_n54876_ i1=$abc$109383$new_n54873_ i2=$abc$109383$new_n54871_ i3=$abc$109383$new_n54625_ q=$abc$109383$new_n54877_
 .subckt nor3_x0 i0=$abc$109383$new_n54877_ i1=$abc$109383$new_n54870_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104858
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[19] q=$abc$109383$new_n54879_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[19] q=$abc$109383$new_n54880_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[19] nq=$abc$109383$new_n54879_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[19] q=$abc$109383$new_n54880_
 .subckt nor3_x0 i0=$abc$109383$new_n54880_ i1=$abc$109383$new_n54879_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54881_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[19] nq=$abc$109383$new_n54882_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54882_ q=$abc$109383$new_n54883_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54882_ q=$abc$109383$new_n54883_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[19] nq=$abc$109383$new_n54884_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54425_ i2=$abc$109383$new_n54697_ i3=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54885_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54425_ i2=$abc$109383$new_n54697_ i3=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54885_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[19] nq=$abc$109383$new_n54886_
-.subckt a3_x2 i0=$abc$109383$new_n54886_ i1=$abc$109383$new_n54885_ i2=$abc$109383$new_n54624_ q=$abc$109383$new_n54887_
-.subckt a3_x2 i0=$abc$109383$new_n54887_ i1=$abc$109383$new_n54884_ i2=$abc$109383$new_n54883_ q=$abc$109383$new_n54888_
+.subckt and3_x1 i0=$abc$109383$new_n54886_ i1=$abc$109383$new_n54885_ i2=$abc$109383$new_n54624_ q=$abc$109383$new_n54887_
+.subckt and3_x1 i0=$abc$109383$new_n54887_ i1=$abc$109383$new_n54884_ i2=$abc$109383$new_n54883_ q=$abc$109383$new_n54888_
 .subckt nor3_x0 i0=$abc$109383$new_n54888_ i1=$abc$109383$new_n54881_ i2=$abc$109383$new_n54768_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104860
 .subckt buf_x4 i=$abc$109383$new_n27421_ q=$abc$109383$new_n54890_
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[20] q=$abc$109383$new_n54891_
-.subckt a3_x2 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[20] q=$abc$109383$new_n54892_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54781_ i2=soc.cpu.minerva.exception.mtval__r__value[20] nq=$abc$109383$new_n54891_
+.subckt and3_x1 i0=$abc$109383$new_n54783_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[20] q=$abc$109383$new_n54892_
 .subckt nor3_x0 i0=$abc$109383$new_n54892_ i1=$abc$109383$new_n54891_ i2=$abc$109383$new_n54780_ nq=$abc$109383$new_n54893_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[20] nq=$abc$109383$new_n54894_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54430_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54895_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54430_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54895_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[20] nq=$abc$109383$new_n54896_
 .subckt buf_x4 i=$abc$109383$new_n54644_ q=$abc$109383$new_n54897_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54896_ q=$abc$109383$new_n54898_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54896_ q=$abc$109383$new_n54898_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[20] nq=$abc$109383$new_n54899_
-.subckt a3_x2 i0=$abc$109383$new_n54899_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54900_
-.subckt a4_x2 i0=$abc$109383$new_n54900_ i1=$abc$109383$new_n54898_ i2=$abc$109383$new_n54895_ i3=$abc$109383$new_n54894_ q=$abc$109383$new_n54901_
+.subckt and3_x1 i0=$abc$109383$new_n54899_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54900_
+.subckt and4_x1 i0=$abc$109383$new_n54900_ i1=$abc$109383$new_n54898_ i2=$abc$109383$new_n54895_ i3=$abc$109383$new_n54894_ q=$abc$109383$new_n54901_
 .subckt nor3_x0 i0=$abc$109383$new_n54901_ i1=$abc$109383$new_n54893_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104862
 .subckt buf_x4 i=$abc$109383$new_n54625_ q=$abc$109383$new_n54903_
 .subckt buf_x4 i=$abc$109383$new_n54627_ q=$abc$109383$new_n54904_
-.subckt ao22_x2 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[21] q=$abc$109383$new_n54905_
+.subckt and21nor_x1 i0=$abc$109383$new_n54794_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[21] nq=$abc$109383$new_n54905_
 .subckt buf_x4 i=$abc$109383$new_n54631_ q=$abc$109383$new_n54906_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[21] q=$abc$109383$new_n54907_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[21] q=$abc$109383$new_n54907_
 .subckt nor3_x0 i0=$abc$109383$new_n54907_ i1=$abc$109383$new_n54905_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54908_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[21] nq=$abc$109383$new_n54909_
-.subckt o3_x2 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54909_ q=$abc$109383$new_n54910_
+.subckt or3_x1 i0=$abc$109383$new_n54645_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54909_ q=$abc$109383$new_n54910_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[21] nq=$abc$109383$new_n54911_
-.subckt o4_x2 i0=$abc$109383$new_n15240_ i1=$abc$109383$new_n54436_ i2=$abc$109383$new_n54697_ i3=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54912_
+.subckt or4_x1 i0=$abc$109383$new_n15240_ i1=$abc$109383$new_n54436_ i2=$abc$109383$new_n54697_ i3=soc.cpu.minerva.payload__illegal$79 q=$abc$109383$new_n54912_
 .subckt nand4_x0 i0=$abc$109383$new_n54641_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[21] nq=$abc$109383$new_n54913_
-.subckt a3_x2 i0=$abc$109383$new_n54913_ i1=$abc$109383$new_n54912_ i2=$abc$109383$new_n54624_ q=$abc$109383$new_n54914_
-.subckt a3_x2 i0=$abc$109383$new_n54914_ i1=$abc$109383$new_n54911_ i2=$abc$109383$new_n54910_ q=$abc$109383$new_n54915_
+.subckt and3_x1 i0=$abc$109383$new_n54913_ i1=$abc$109383$new_n54912_ i2=$abc$109383$new_n54624_ q=$abc$109383$new_n54914_
+.subckt and3_x1 i0=$abc$109383$new_n54914_ i1=$abc$109383$new_n54911_ i2=$abc$109383$new_n54910_ q=$abc$109383$new_n54915_
 .subckt nor3_x0 i0=$abc$109383$new_n54915_ i1=$abc$109383$new_n54908_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104864
 .subckt buf_x4 i=$abc$109383$new_n54662_ q=$abc$109383$new_n54917_
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[22] q=$abc$109383$new_n54918_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n54919_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[22] nq=$abc$109383$new_n54918_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n54919_
 .subckt nor3_x0 i0=$abc$109383$new_n54919_ i1=$abc$109383$new_n54918_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54920_
 .subckt nand4_x0 i0=$abc$109383$new_n54733_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[22] nq=$abc$109383$new_n54921_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54443_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54922_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54443_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54922_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[22] nq=$abc$109383$new_n54923_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54923_ q=$abc$109383$new_n54924_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54923_ q=$abc$109383$new_n54924_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[22] nq=$abc$109383$new_n54925_
-.subckt a3_x2 i0=$abc$109383$new_n54925_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54926_
-.subckt a4_x2 i0=$abc$109383$new_n54926_ i1=$abc$109383$new_n54924_ i2=$abc$109383$new_n54922_ i3=$abc$109383$new_n54921_ q=$abc$109383$new_n54927_
+.subckt and3_x1 i0=$abc$109383$new_n54925_ i1=$abc$109383$new_n54752_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54926_
+.subckt and4_x1 i0=$abc$109383$new_n54926_ i1=$abc$109383$new_n54924_ i2=$abc$109383$new_n54922_ i3=$abc$109383$new_n54921_ q=$abc$109383$new_n54927_
 .subckt nor3_x0 i0=$abc$109383$new_n54927_ i1=$abc$109383$new_n54920_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104866
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[23] q=$abc$109383$new_n54929_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n54930_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[23] nq=$abc$109383$new_n54929_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n54930_
 .subckt nor3_x0 i0=$abc$109383$new_n54930_ i1=$abc$109383$new_n54929_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54931_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54747_ i2=$abc$109383$new_n54746_ i3=soc.cpu.minerva.payload__instruction$73[23] nq=$abc$109383$new_n54932_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54449_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54933_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54449_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54933_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[23] nq=$abc$109383$new_n54934_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54934_ q=$abc$109383$new_n54935_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54934_ q=$abc$109383$new_n54935_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[23] nq=$abc$109383$new_n54936_
-.subckt a3_x2 i0=$abc$109383$new_n54936_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54937_
-.subckt a4_x2 i0=$abc$109383$new_n54937_ i1=$abc$109383$new_n54935_ i2=$abc$109383$new_n54933_ i3=$abc$109383$new_n54932_ q=$abc$109383$new_n54938_
+.subckt and3_x1 i0=$abc$109383$new_n54936_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54937_
+.subckt and4_x1 i0=$abc$109383$new_n54937_ i1=$abc$109383$new_n54935_ i2=$abc$109383$new_n54933_ i3=$abc$109383$new_n54932_ q=$abc$109383$new_n54938_
 .subckt nor3_x0 i0=$abc$109383$new_n54938_ i1=$abc$109383$new_n54931_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104868
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[24] q=$abc$109383$new_n54940_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n54941_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[24] nq=$abc$109383$new_n54940_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n54941_
 .subckt nor3_x0 i0=$abc$109383$new_n54941_ i1=$abc$109383$new_n54940_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54942_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[24] nq=$abc$109383$new_n54943_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54454_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54944_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54454_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54944_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[24] nq=$abc$109383$new_n54945_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54945_ q=$abc$109383$new_n54946_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54945_ q=$abc$109383$new_n54946_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[24] nq=$abc$109383$new_n54947_
-.subckt a3_x2 i0=$abc$109383$new_n54947_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54948_
-.subckt a4_x2 i0=$abc$109383$new_n54948_ i1=$abc$109383$new_n54946_ i2=$abc$109383$new_n54944_ i3=$abc$109383$new_n54943_ q=$abc$109383$new_n54949_
+.subckt and3_x1 i0=$abc$109383$new_n54947_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54948_
+.subckt and4_x1 i0=$abc$109383$new_n54948_ i1=$abc$109383$new_n54946_ i2=$abc$109383$new_n54944_ i3=$abc$109383$new_n54943_ q=$abc$109383$new_n54949_
 .subckt nor3_x0 i0=$abc$109383$new_n54949_ i1=$abc$109383$new_n54942_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104870
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[25] q=$abc$109383$new_n54951_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n54952_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[25] nq=$abc$109383$new_n54951_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n54952_
 .subckt nor3_x0 i0=$abc$109383$new_n54952_ i1=$abc$109383$new_n54951_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54953_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[25] nq=$abc$109383$new_n54954_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54459_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54955_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54459_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54955_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[25] nq=$abc$109383$new_n54956_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54956_ q=$abc$109383$new_n54957_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54956_ q=$abc$109383$new_n54957_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[25] nq=$abc$109383$new_n54958_
-.subckt a3_x2 i0=$abc$109383$new_n54958_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54959_
-.subckt a4_x2 i0=$abc$109383$new_n54959_ i1=$abc$109383$new_n54957_ i2=$abc$109383$new_n54955_ i3=$abc$109383$new_n54954_ q=$abc$109383$new_n54960_
+.subckt and3_x1 i0=$abc$109383$new_n54958_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54802_ q=$abc$109383$new_n54959_
+.subckt and4_x1 i0=$abc$109383$new_n54959_ i1=$abc$109383$new_n54957_ i2=$abc$109383$new_n54955_ i3=$abc$109383$new_n54954_ q=$abc$109383$new_n54960_
 .subckt nor3_x0 i0=$abc$109383$new_n54960_ i1=$abc$109383$new_n54953_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104872
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[26] q=$abc$109383$new_n54962_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n54963_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[26] nq=$abc$109383$new_n54962_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54857_ i2=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n54963_
 .subckt nor3_x0 i0=$abc$109383$new_n54963_ i1=$abc$109383$new_n54962_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54964_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54465_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54965_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54465_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54965_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[26] nq=$abc$109383$new_n54966_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[26] nq=$abc$109383$new_n54967_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54967_ q=$abc$109383$new_n54968_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54967_ q=$abc$109383$new_n54968_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54814_ i2=soc.cpu.minerva.payload__result$93[26] nq=$abc$109383$new_n54969_
-.subckt a3_x2 i0=$abc$109383$new_n54969_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54970_
-.subckt a4_x2 i0=$abc$109383$new_n54970_ i1=$abc$109383$new_n54968_ i2=$abc$109383$new_n54966_ i3=$abc$109383$new_n54965_ q=$abc$109383$new_n54971_
+.subckt and3_x1 i0=$abc$109383$new_n54969_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54970_
+.subckt and4_x1 i0=$abc$109383$new_n54970_ i1=$abc$109383$new_n54968_ i2=$abc$109383$new_n54966_ i3=$abc$109383$new_n54965_ q=$abc$109383$new_n54971_
 .subckt nor3_x0 i0=$abc$109383$new_n54971_ i1=$abc$109383$new_n54964_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104874
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[27] q=$abc$109383$new_n54973_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n54974_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[27] nq=$abc$109383$new_n54973_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n54974_
 .subckt nor3_x0 i0=$abc$109383$new_n54974_ i1=$abc$109383$new_n54973_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54975_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54470_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54976_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54470_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n54976_
 .subckt nand4_x0 i0=$abc$109383$new_n54642_ i1=$abc$109383$new_n54638_ i2=$abc$109383$new_n54636_ i3=soc.cpu.minerva.payload__instruction$73[27] nq=$abc$109383$new_n54977_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[27] nq=$abc$109383$new_n54978_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54978_ q=$abc$109383$new_n54979_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54838_ i2=$abc$109383$new_n54978_ q=$abc$109383$new_n54979_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54097_ i2=soc.cpu.minerva.payload__result$93[27] nq=$abc$109383$new_n54980_
-.subckt a3_x2 i0=$abc$109383$new_n54980_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54981_
-.subckt a4_x2 i0=$abc$109383$new_n54981_ i1=$abc$109383$new_n54979_ i2=$abc$109383$new_n54977_ i3=$abc$109383$new_n54976_ q=$abc$109383$new_n54982_
+.subckt and3_x1 i0=$abc$109383$new_n54980_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54981_
+.subckt and4_x1 i0=$abc$109383$new_n54981_ i1=$abc$109383$new_n54979_ i2=$abc$109383$new_n54977_ i3=$abc$109383$new_n54976_ q=$abc$109383$new_n54982_
 .subckt nor3_x0 i0=$abc$109383$new_n54982_ i1=$abc$109383$new_n54975_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104876
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[28] q=$abc$109383$new_n54984_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n54985_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[28] nq=$abc$109383$new_n54984_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n54985_
 .subckt nor3_x0 i0=$abc$109383$new_n54985_ i1=$abc$109383$new_n54984_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54986_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[28] nq=$abc$109383$new_n54987_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54475_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54988_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54475_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54988_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[28] nq=$abc$109383$new_n54989_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n54989_ q=$abc$109383$new_n54990_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n54989_ q=$abc$109383$new_n54990_
 .subckt nand3_x0 i0=$abc$109383$new_n54840_ i1=$abc$109383$new_n54097_ i2=soc.cpu.minerva.payload__result$93[28] nq=$abc$109383$new_n54991_
-.subckt a3_x2 i0=$abc$109383$new_n54991_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54992_
-.subckt a4_x2 i0=$abc$109383$new_n54992_ i1=$abc$109383$new_n54990_ i2=$abc$109383$new_n54988_ i3=$abc$109383$new_n54987_ q=$abc$109383$new_n54993_
+.subckt and3_x1 i0=$abc$109383$new_n54991_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n54992_
+.subckt and4_x1 i0=$abc$109383$new_n54992_ i1=$abc$109383$new_n54990_ i2=$abc$109383$new_n54988_ i3=$abc$109383$new_n54987_ q=$abc$109383$new_n54993_
 .subckt nor3_x0 i0=$abc$109383$new_n54993_ i1=$abc$109383$new_n54986_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104878
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[29] q=$abc$109383$new_n54995_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n54996_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[29] nq=$abc$109383$new_n54995_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n54996_
 .subckt nor3_x0 i0=$abc$109383$new_n54996_ i1=$abc$109383$new_n54995_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n54997_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[29] nq=$abc$109383$new_n54998_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54480_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54999_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54480_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n54999_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[29] nq=$abc$109383$new_n55000_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n55000_ q=$abc$109383$new_n55001_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n55000_ q=$abc$109383$new_n55001_
 .subckt nand3_x0 i0=$abc$109383$new_n54515_ i1=$abc$109383$new_n54097_ i2=soc.cpu.minerva.payload__result$93[29] nq=$abc$109383$new_n55002_
-.subckt a3_x2 i0=$abc$109383$new_n55002_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n55003_
-.subckt a4_x2 i0=$abc$109383$new_n55003_ i1=$abc$109383$new_n55001_ i2=$abc$109383$new_n54999_ i3=$abc$109383$new_n54998_ q=$abc$109383$new_n55004_
+.subckt and3_x1 i0=$abc$109383$new_n55002_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n55003_
+.subckt and4_x1 i0=$abc$109383$new_n55003_ i1=$abc$109383$new_n55001_ i2=$abc$109383$new_n54999_ i3=$abc$109383$new_n54998_ q=$abc$109383$new_n55004_
 .subckt nor3_x0 i0=$abc$109383$new_n55004_ i1=$abc$109383$new_n54997_ i2=$abc$109383$new_n54890_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104880
 .subckt buf_x4 i=$abc$109383$new_n27421_ q=$abc$109383$new_n55006_
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[30] q=$abc$109383$new_n55007_
-.subckt a3_x2 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n55008_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54904_ i2=soc.cpu.minerva.exception.mtval__r__value[30] nq=$abc$109383$new_n55007_
+.subckt and3_x1 i0=$abc$109383$new_n54906_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n55008_
 .subckt nor3_x0 i0=$abc$109383$new_n55008_ i1=$abc$109383$new_n55007_ i2=$abc$109383$new_n54903_ nq=$abc$109383$new_n55009_
 .subckt nand4_x0 i0=$abc$109383$new_n54701_ i1=$abc$109383$new_n54654_ i2=$abc$109383$new_n54700_ i3=soc.cpu.minerva.payload__instruction$73[30] nq=$abc$109383$new_n55010_
-.subckt o4_x2 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54485_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n55011_
+.subckt or4_x1 i0=$abc$109383$new_n54824_ i1=$abc$109383$new_n54485_ i2=$abc$109383$new_n54709_ i3=$abc$109383$new_n54823_ q=$abc$109383$new_n55011_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[30] nq=$abc$109383$new_n55012_
-.subckt o3_x2 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n55012_ q=$abc$109383$new_n55013_
+.subckt or3_x1 i0=$abc$109383$new_n54897_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n55012_ q=$abc$109383$new_n55013_
 .subckt nand3_x0 i0=$abc$109383$new_n54515_ i1=$abc$109383$new_n54097_ i2=soc.cpu.minerva.payload__result$93[30] nq=$abc$109383$new_n55014_
-.subckt a3_x2 i0=$abc$109383$new_n55014_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n55015_
-.subckt a4_x2 i0=$abc$109383$new_n55015_ i1=$abc$109383$new_n55013_ i2=$abc$109383$new_n55011_ i3=$abc$109383$new_n55010_ q=$abc$109383$new_n55016_
+.subckt and3_x1 i0=$abc$109383$new_n55014_ i1=$abc$109383$new_n54507_ i2=$abc$109383$new_n54079_ q=$abc$109383$new_n55015_
+.subckt and4_x1 i0=$abc$109383$new_n55015_ i1=$abc$109383$new_n55013_ i2=$abc$109383$new_n55011_ i3=$abc$109383$new_n55010_ q=$abc$109383$new_n55016_
 .subckt nor3_x0 i0=$abc$109383$new_n55016_ i1=$abc$109383$new_n55009_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104882
-.subckt ao22_x2 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54627_ i2=soc.cpu.minerva.exception.mtval__r__value[31] q=$abc$109383$new_n55018_
-.subckt a3_x2 i0=$abc$109383$new_n54631_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n55019_
+.subckt and21nor_x1 i0=$abc$109383$new_n54917_ i1=$abc$109383$new_n54627_ i2=soc.cpu.minerva.exception.mtval__r__value[31] nq=$abc$109383$new_n55018_
+.subckt and3_x1 i0=$abc$109383$new_n54631_ i1=$abc$109383$new_n54500_ i2=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n55019_
 .subckt nor3_x0 i0=$abc$109383$new_n55019_ i1=$abc$109383$new_n55018_ i2=$abc$109383$new_n54625_ nq=$abc$109383$new_n55020_
 .subckt nand3_x0 i0=$abc$109383$new_n54543_ i1=$abc$109383$new_n54542_ i2=soc.cpu.minerva.payload__result$93[31] nq=$abc$109383$new_n55021_
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$109[31] nq=$abc$109383$new_n55022_
-.subckt o3_x2 i0=$abc$109383$new_n54644_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n55022_ q=$abc$109383$new_n55023_
-.subckt o4_x2 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54490_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n55024_
+.subckt or3_x1 i0=$abc$109383$new_n54644_ i1=$abc$109383$new_n54637_ i2=$abc$109383$new_n55022_ q=$abc$109383$new_n55023_
+.subckt or4_x1 i0=$abc$109383$new_n54698_ i1=$abc$109383$new_n54490_ i2=$abc$109383$new_n54697_ i3=$abc$109383$new_n54511_ q=$abc$109383$new_n55024_
 .subckt nand4_x0 i0=$abc$109383$new_n54641_ i1=$abc$109383$new_n54534_ i2=$abc$109383$new_n54635_ i3=soc.cpu.minerva.payload__instruction$73[31] nq=$abc$109383$new_n55025_
-.subckt a2_x2 i0=$abc$109383$new_n55025_ i1=$abc$109383$new_n55024_ q=$abc$109383$new_n55026_
-.subckt a4_x2 i0=$abc$109383$new_n55026_ i1=$abc$109383$new_n55023_ i2=$abc$109383$new_n55021_ i3=$abc$109383$new_n54625_ q=$abc$109383$new_n55027_
+.subckt and2_x1 i0=$abc$109383$new_n55025_ i1=$abc$109383$new_n55024_ q=$abc$109383$new_n55026_
+.subckt and4_x1 i0=$abc$109383$new_n55026_ i1=$abc$109383$new_n55023_ i2=$abc$109383$new_n55021_ i3=$abc$109383$new_n54625_ q=$abc$109383$new_n55027_
 .subckt nor3_x0 i0=$abc$109383$new_n55027_ i1=$abc$109383$new_n55020_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104884
-.subckt ao22_x2 i0=soc.cpu.minerva.exception.irq_pending__r__value[0] i1=soc.cpu.minerva.exception.irq_pending__r__value[1] i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104886
+.subckt and21nor_x1 i0=soc.cpu.minerva.exception.irq_pending__r__value[0] i1=soc.cpu.minerva.exception.irq_pending__r__value[1] i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$104886
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__csr_adr$114[7] i1=soc.cpu.minerva.payload__csr_adr$114[6] nq=$abc$109383$new_n55030_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__csr_adr$114[5] i1=soc.cpu.minerva.payload__csr_adr$114[4] q=$abc$109383$new_n55031_
-.subckt a2_x2 i0=$abc$109383$new_n55031_ i1=$abc$109383$new_n55030_ q=$abc$109383$new_n55032_
-.subckt a3_x2 i0=$abc$109383$new_n55032_ i1=$abc$109383$new_n54250_ i2=$abc$109383$new_n54062_ q=$abc$109383$new_n55033_
-.subckt a2_x2 i0=$abc$109383$new_n55033_ i1=$abc$109383$new_n54072_ q=$abc$109383$new_n55034_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__csr_adr$114[5] i1=soc.cpu.minerva.payload__csr_adr$114[4] q=$abc$109383$new_n55031_
+.subckt and2_x1 i0=$abc$109383$new_n55031_ i1=$abc$109383$new_n55030_ q=$abc$109383$new_n55032_
+.subckt and3_x1 i0=$abc$109383$new_n55032_ i1=$abc$109383$new_n54250_ i2=$abc$109383$new_n54062_ q=$abc$109383$new_n55033_
+.subckt and2_x1 i0=$abc$109383$new_n55033_ i1=$abc$109383$new_n54072_ q=$abc$109383$new_n55034_
 .subckt buf_x4 i=$abc$109383$new_n55034_ q=$abc$109383$new_n55035_
 .subckt buf_x4 i=$abc$109383$new_n55035_ q=$abc$109383$new_n55036_
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[0] i1=soc.cpu.minerva.payload__csr_result$117[0] q=$abc$109383$new_n55037_
-.subckt a2_x2 i0=$abc$109383$new_n55037_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104890
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[1] i1=soc.cpu.minerva.payload__csr_result$117[1] q=$abc$109383$new_n55039_
-.subckt a2_x2 i0=$abc$109383$new_n55039_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104894
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[2] i1=soc.cpu.minerva.payload__csr_result$117[2] q=$abc$109383$new_n55041_
-.subckt a2_x2 i0=$abc$109383$new_n55041_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104898
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[3] i1=soc.cpu.minerva.payload__csr_result$117[3] q=$abc$109383$new_n55043_
-.subckt a2_x2 i0=$abc$109383$new_n55043_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104902
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[4] i1=soc.cpu.minerva.payload__csr_result$117[4] q=$abc$109383$new_n55045_
-.subckt a2_x2 i0=$abc$109383$new_n55045_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104906
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[5] i1=soc.cpu.minerva.payload__csr_result$117[5] q=$abc$109383$new_n55047_
-.subckt a2_x2 i0=$abc$109383$new_n55047_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104910
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[6] i1=soc.cpu.minerva.payload__csr_result$117[6] q=$abc$109383$new_n55049_
-.subckt a2_x2 i0=$abc$109383$new_n55049_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104914
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[7] i1=soc.cpu.minerva.payload__csr_result$117[7] q=$abc$109383$new_n55051_
-.subckt a2_x2 i0=$abc$109383$new_n55051_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104918
-.subckt mx2_x2 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[8] i1=soc.cpu.minerva.payload__csr_result$117[8] q=$abc$109383$new_n55053_
-.subckt a2_x2 i0=$abc$109383$new_n55053_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104922
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[0] i1=soc.cpu.minerva.payload__csr_result$117[0] q=$abc$109383$new_n55037_
+.subckt and2_x1 i0=$abc$109383$new_n55037_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104890
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[1] i1=soc.cpu.minerva.payload__csr_result$117[1] q=$abc$109383$new_n55039_
+.subckt and2_x1 i0=$abc$109383$new_n55039_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104894
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[2] i1=soc.cpu.minerva.payload__csr_result$117[2] q=$abc$109383$new_n55041_
+.subckt and2_x1 i0=$abc$109383$new_n55041_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104898
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[3] i1=soc.cpu.minerva.payload__csr_result$117[3] q=$abc$109383$new_n55043_
+.subckt and2_x1 i0=$abc$109383$new_n55043_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104902
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[4] i1=soc.cpu.minerva.payload__csr_result$117[4] q=$abc$109383$new_n55045_
+.subckt and2_x1 i0=$abc$109383$new_n55045_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104906
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[5] i1=soc.cpu.minerva.payload__csr_result$117[5] q=$abc$109383$new_n55047_
+.subckt and2_x1 i0=$abc$109383$new_n55047_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104910
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[6] i1=soc.cpu.minerva.payload__csr_result$117[6] q=$abc$109383$new_n55049_
+.subckt and2_x1 i0=$abc$109383$new_n55049_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104914
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[7] i1=soc.cpu.minerva.payload__csr_result$117[7] q=$abc$109383$new_n55051_
+.subckt and2_x1 i0=$abc$109383$new_n55051_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104918
+.subckt mux2_x1 cmd=$abc$109383$new_n55036_ i0=soc.cpu.minerva.exception.irq_mask__r__value[8] i1=soc.cpu.minerva.payload__csr_result$117[8] q=$abc$109383$new_n55053_
+.subckt and2_x1 i0=$abc$109383$new_n55053_ i1=$abc$109383$new_n54325_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104922
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n55055_
 .subckt buf_x4 i=$abc$109383$new_n55035_ q=$abc$109383$new_n55056_
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[9] i1=soc.cpu.minerva.payload__csr_result$117[9] q=$abc$109383$new_n55057_
-.subckt a2_x2 i0=$abc$109383$new_n55057_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104926
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[10] i1=soc.cpu.minerva.payload__csr_result$117[10] q=$abc$109383$new_n55059_
-.subckt a2_x2 i0=$abc$109383$new_n55059_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104930
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[11] i1=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n55061_
-.subckt a2_x2 i0=$abc$109383$new_n55061_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104934
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[12] i1=soc.cpu.minerva.payload__csr_result$117[12] q=$abc$109383$new_n55063_
-.subckt a2_x2 i0=$abc$109383$new_n55063_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104938
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[13] i1=soc.cpu.minerva.payload__csr_result$117[13] q=$abc$109383$new_n55065_
-.subckt a2_x2 i0=$abc$109383$new_n55065_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104942
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[14] i1=soc.cpu.minerva.payload__csr_result$117[14] q=$abc$109383$new_n55067_
-.subckt a2_x2 i0=$abc$109383$new_n55067_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104946
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[15] i1=soc.cpu.minerva.payload__csr_result$117[15] q=$abc$109383$new_n55069_
-.subckt a2_x2 i0=$abc$109383$new_n55069_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104950
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[16] i1=soc.cpu.minerva.payload__csr_result$117[16] q=$abc$109383$new_n55071_
-.subckt a2_x2 i0=$abc$109383$new_n55071_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104954
-.subckt mx2_x2 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[17] i1=soc.cpu.minerva.payload__csr_result$117[17] q=$abc$109383$new_n55073_
-.subckt a2_x2 i0=$abc$109383$new_n55073_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104958
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[9] i1=soc.cpu.minerva.payload__csr_result$117[9] q=$abc$109383$new_n55057_
+.subckt and2_x1 i0=$abc$109383$new_n55057_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104926
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[10] i1=soc.cpu.minerva.payload__csr_result$117[10] q=$abc$109383$new_n55059_
+.subckt and2_x1 i0=$abc$109383$new_n55059_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104930
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[11] i1=soc.cpu.minerva.payload__csr_result$117[11] q=$abc$109383$new_n55061_
+.subckt and2_x1 i0=$abc$109383$new_n55061_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104934
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[12] i1=soc.cpu.minerva.payload__csr_result$117[12] q=$abc$109383$new_n55063_
+.subckt and2_x1 i0=$abc$109383$new_n55063_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104938
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[13] i1=soc.cpu.minerva.payload__csr_result$117[13] q=$abc$109383$new_n55065_
+.subckt and2_x1 i0=$abc$109383$new_n55065_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104942
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[14] i1=soc.cpu.minerva.payload__csr_result$117[14] q=$abc$109383$new_n55067_
+.subckt and2_x1 i0=$abc$109383$new_n55067_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104946
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[15] i1=soc.cpu.minerva.payload__csr_result$117[15] q=$abc$109383$new_n55069_
+.subckt and2_x1 i0=$abc$109383$new_n55069_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104950
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[16] i1=soc.cpu.minerva.payload__csr_result$117[16] q=$abc$109383$new_n55071_
+.subckt and2_x1 i0=$abc$109383$new_n55071_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104954
+.subckt mux2_x1 cmd=$abc$109383$new_n55056_ i0=soc.cpu.minerva.exception.irq_mask__r__value[17] i1=soc.cpu.minerva.payload__csr_result$117[17] q=$abc$109383$new_n55073_
+.subckt and2_x1 i0=$abc$109383$new_n55073_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104958
 .subckt buf_x4 i=$abc$109383$new_n55035_ q=$abc$109383$new_n55075_
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[18] i1=soc.cpu.minerva.payload__csr_result$117[18] q=$abc$109383$new_n55076_
-.subckt a2_x2 i0=$abc$109383$new_n55076_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104962
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[18] i1=soc.cpu.minerva.payload__csr_result$117[18] q=$abc$109383$new_n55076_
+.subckt and2_x1 i0=$abc$109383$new_n55076_ i1=$abc$109383$new_n55055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104962
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n55078_
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[19] i1=soc.cpu.minerva.payload__csr_result$117[19] q=$abc$109383$new_n55079_
-.subckt a2_x2 i0=$abc$109383$new_n55079_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104966
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[20] i1=soc.cpu.minerva.payload__csr_result$117[20] q=$abc$109383$new_n55081_
-.subckt a2_x2 i0=$abc$109383$new_n55081_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104970
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[21] i1=soc.cpu.minerva.payload__csr_result$117[21] q=$abc$109383$new_n55083_
-.subckt a2_x2 i0=$abc$109383$new_n55083_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104974
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[22] i1=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n55085_
-.subckt a2_x2 i0=$abc$109383$new_n55085_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104978
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[23] i1=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n55087_
-.subckt a2_x2 i0=$abc$109383$new_n55087_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104982
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[24] i1=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n55089_
-.subckt a2_x2 i0=$abc$109383$new_n55089_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104986
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[25] i1=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n55091_
-.subckt a2_x2 i0=$abc$109383$new_n55091_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104990
-.subckt mx2_x2 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[26] i1=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n55093_
-.subckt a2_x2 i0=$abc$109383$new_n55093_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104994
-.subckt mx2_x2 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[27] i1=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n55095_
-.subckt a2_x2 i0=$abc$109383$new_n55095_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104998
-.subckt mx2_x2 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[28] i1=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n55097_
-.subckt a2_x2 i0=$abc$109383$new_n55097_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105002
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[19] i1=soc.cpu.minerva.payload__csr_result$117[19] q=$abc$109383$new_n55079_
+.subckt and2_x1 i0=$abc$109383$new_n55079_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104966
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[20] i1=soc.cpu.minerva.payload__csr_result$117[20] q=$abc$109383$new_n55081_
+.subckt and2_x1 i0=$abc$109383$new_n55081_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104970
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[21] i1=soc.cpu.minerva.payload__csr_result$117[21] q=$abc$109383$new_n55083_
+.subckt and2_x1 i0=$abc$109383$new_n55083_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104974
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[22] i1=soc.cpu.minerva.payload__csr_result$117[22] q=$abc$109383$new_n55085_
+.subckt and2_x1 i0=$abc$109383$new_n55085_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104978
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[23] i1=soc.cpu.minerva.payload__csr_result$117[23] q=$abc$109383$new_n55087_
+.subckt and2_x1 i0=$abc$109383$new_n55087_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104982
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[24] i1=soc.cpu.minerva.payload__csr_result$117[24] q=$abc$109383$new_n55089_
+.subckt and2_x1 i0=$abc$109383$new_n55089_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104986
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[25] i1=soc.cpu.minerva.payload__csr_result$117[25] q=$abc$109383$new_n55091_
+.subckt and2_x1 i0=$abc$109383$new_n55091_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104990
+.subckt mux2_x1 cmd=$abc$109383$new_n55075_ i0=soc.cpu.minerva.exception.irq_mask__r__value[26] i1=soc.cpu.minerva.payload__csr_result$117[26] q=$abc$109383$new_n55093_
+.subckt and2_x1 i0=$abc$109383$new_n55093_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104994
+.subckt mux2_x1 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[27] i1=soc.cpu.minerva.payload__csr_result$117[27] q=$abc$109383$new_n55095_
+.subckt and2_x1 i0=$abc$109383$new_n55095_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$104998
+.subckt mux2_x1 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[28] i1=soc.cpu.minerva.payload__csr_result$117[28] q=$abc$109383$new_n55097_
+.subckt and2_x1 i0=$abc$109383$new_n55097_ i1=$abc$109383$new_n55078_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105002
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n55099_
-.subckt mx2_x2 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[29] i1=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n55100_
-.subckt a2_x2 i0=$abc$109383$new_n55100_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105006
-.subckt mx2_x2 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[30] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n55102_
-.subckt a2_x2 i0=$abc$109383$new_n55102_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105010
-.subckt mx2_x2 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[31] i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n55104_
-.subckt a2_x2 i0=$abc$109383$new_n55104_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105014
+.subckt mux2_x1 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[29] i1=soc.cpu.minerva.payload__csr_result$117[29] q=$abc$109383$new_n55100_
+.subckt and2_x1 i0=$abc$109383$new_n55100_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105006
+.subckt mux2_x1 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[30] i1=soc.cpu.minerva.payload__csr_result$117[30] q=$abc$109383$new_n55102_
+.subckt and2_x1 i0=$abc$109383$new_n55102_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105010
+.subckt mux2_x1 cmd=$abc$109383$new_n55035_ i0=soc.cpu.minerva.exception.irq_mask__r__value[31] i1=soc.cpu.minerva.payload__csr_result$117[31] q=$abc$109383$new_n55104_
+.subckt and2_x1 i0=$abc$109383$new_n55104_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105014
 .subckt buf_x4 i=soc.cpu.minerva.divider.m_modulus q=$abc$109383$new_n55106_
-.subckt mx2_x2 cmd=$abc$109383$new_n54039_ i0=$abc$109383$new_n55106_ i1=$abc$109383$new_n52331_ q=$abc$109383$new_n55107_
-.subckt a2_x2 i0=$abc$109383$new_n55107_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105194
+.subckt mux2_x1 cmd=$abc$109383$new_n54039_ i0=$abc$109383$new_n55106_ i1=$abc$109383$new_n52331_ q=$abc$109383$new_n55107_
+.subckt and2_x1 i0=$abc$109383$new_n55107_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105194
 .subckt buf_x4 i=$abc$109383$new_n27584_ q=$abc$109383$new_n55109_
 .subckt buf_x4 i=$abc$109383$new_n52326_ q=$abc$109383$new_n55110_
 .subckt nand4_x0 i0=$abc$109383$new_n29492_ i1=$abc$109383$new_n52335_ i2=$abc$109383$new_n52331_ i3=$abc$109383$new_n55110_ nq=$abc$109383$new_n55111_
-.subckt xr2_x1 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29491_ q=$abc$109383$new_n55112_
+.subckt xor2_x0 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29491_ q=$abc$109383$new_n55112_
 .subckt nor2_x0 i0=$abc$109383$new_n52332_ i1=soc.cpu.minerva.payload__instruction$34[13] nq=$abc$109383$new_n55113_
 .subckt nand3_x0 i0=$abc$109383$new_n55113_ i1=$abc$109383$new_n55112_ i2=$abc$109383$new_n55110_ nq=$abc$109383$new_n55114_
 .subckt nand3_x0 i0=$abc$109383$new_n55114_ i1=$abc$109383$new_n55111_ i2=$abc$109383$new_n54039_ nq=$abc$109383$new_n55115_
 .subckt inv_x0 i=soc.cpu.minerva.divider.m_negative nq=$abc$109383$new_n55116_
 .subckt nand4_x0 i0=$abc$109383$new_n28912_ i1=$abc$109383$new_n52325_ i2=soc.cpu.minerva.d.valid$1 i3=$abc$109383$new_n28910_ nq=$abc$109383$new_n55117_
 .subckt nand2_x0 i0=$abc$109383$new_n55117_ i1=$abc$109383$new_n55116_ nq=$abc$109383$new_n55118_
-.subckt a3_x2 i0=$abc$109383$new_n55118_ i1=$abc$109383$new_n55115_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105198
+.subckt and3_x1 i0=$abc$109383$new_n55118_ i1=$abc$109383$new_n55115_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105198
 .subckt nand2_x0 i0=$abc$109383$new_n55117_ i1=$abc$109383$new_n54068_ nq=$abc$109383$new_n55120_
 .subckt nand4_x0 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n54053_ i3=soc.cpu.minerva.divider.fsm_state nq=$abc$109383$new_n55121_
-.subckt ao22_x2 i0=soc.cpu.minerva.divider.m_negative i1=$abc$109383$new_n55121_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55122_
+.subckt and21nor_x1 i0=soc.cpu.minerva.divider.m_negative i1=$abc$109383$new_n55121_ i2=$abc$109383$new_n55120_ nq=$abc$109383$new_n55122_
 .subckt buf_x4 i=$abc$109383$new_n55122_ q=$abc$109383$new_n55123_
 .subckt buf_x4 i=$abc$109383$new_n55123_ q=$abc$109383$new_n55124_
-.subckt ao22_x2 i0=$abc$109383$new_n55124_ i1=soc.cpu.minerva.divider.quotient[1] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55125_
+.subckt and21nor_x1 i0=$abc$109383$new_n55124_ i1=soc.cpu.minerva.divider.quotient[1] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55125_
 .subckt buf_x4 i=$abc$109383$new_n55123_ q=$abc$109383$new_n55126_
 .subckt buf_x4 i=$abc$109383$new_n55126_ q=$abc$109383$new_n55127_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55128_
@@ -40404,68 +40404,68 @@
 .subckt buf_x4 i=$abc$109383$new_n54056_ q=$abc$109383$new_n55130_
 .subckt buf_x4 i=$abc$109383$new_n55130_ q=$abc$109383$new_n55131_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[0] i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55132_
-.subckt a4_x2 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n54053_ i3=soc.cpu.minerva.divider.fsm_state q=$abc$109383$new_n55133_
+.subckt and4_x1 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n54053_ i3=soc.cpu.minerva.divider.fsm_state q=$abc$109383$new_n55133_
 .subckt buf_x4 i=$abc$109383$new_n55133_ q=$abc$109383$new_n55134_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.quotient[0] i1=soc.cpu.minerva.divider.quotient[1] q=$abc$109383$new_n55135_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.quotient[0] i1=soc.cpu.minerva.divider.quotient[1] q=$abc$109383$new_n55135_
 .subckt nand2_x0 i0=$abc$109383$new_n55135_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55136_
-.subckt a2_x2 i0=$abc$109383$new_n55136_ i1=$abc$109383$new_n55132_ q=$abc$109383$new_n55137_
+.subckt and2_x1 i0=$abc$109383$new_n55136_ i1=$abc$109383$new_n55132_ q=$abc$109383$new_n55137_
 .subckt nand4_x0 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n29492_ i2=$abc$109383$new_n52335_ i3=$abc$109383$new_n55110_ nq=$abc$109383$new_n55138_
 .subckt nand2_x0 i0=$abc$109383$new_n55138_ i1=$abc$109383$new_n29753_ nq=$abc$109383$new_n55139_
 .subckt buf_x4 i=$abc$109383$new_n54068_ q=$abc$109383$new_n55140_
-.subckt ao22_x2 i0=$abc$109383$new_n55138_ i1=$abc$109383$new_n29753_ i2=$abc$109383$new_n55140_ q=$abc$109383$new_n55141_
+.subckt and21nor_x1 i0=$abc$109383$new_n55138_ i1=$abc$109383$new_n29753_ i2=$abc$109383$new_n55140_ nq=$abc$109383$new_n55141_
 .subckt nand2_x0 i0=$abc$109383$new_n55141_ i1=$abc$109383$new_n55139_ nq=$abc$109383$new_n55142_
 .subckt nand3_x0 i0=$abc$109383$new_n55142_ i1=$abc$109383$new_n55137_ i2=$abc$109383$new_n55127_ nq=$abc$109383$new_n55143_
 .subckt buf_x4 i=$abc$109383$new_n52317_ q=$abc$109383$new_n55144_
 .subckt buf_x4 i=$abc$109383$new_n54037_ q=$abc$109383$new_n55145_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n54068_ q=$abc$109383$new_n55146_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n54068_ q=$abc$109383$new_n55146_
 .subckt buf_x4 i=$abc$109383$new_n55146_ q=$abc$109383$new_n55147_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55143_ i2=$abc$109383$new_n55125_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105202
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55143_ i2=$abc$109383$new_n55125_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105202
 .subckt buf_x4 i=$abc$109383$new_n55126_ q=$abc$109383$new_n55149_
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[2] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55150_
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[2] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55150_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[1] i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55151_
 .subckt nor2_x0 i0=soc.cpu.minerva.divider.quotient[0] i1=soc.cpu.minerva.divider.quotient[1] nq=$abc$109383$new_n55152_
-.subckt nxr2_x1 i0=$abc$109383$new_n55152_ i1=soc.cpu.minerva.divider.quotient[2] nq=$abc$109383$new_n55153_
+.subckt nexor2_x0 i0=$abc$109383$new_n55152_ i1=soc.cpu.minerva.divider.quotient[2] nq=$abc$109383$new_n55153_
 .subckt nand2_x0 i0=$abc$109383$new_n55153_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55154_
-.subckt a2_x2 i0=$abc$109383$new_n55154_ i1=$abc$109383$new_n55151_ q=$abc$109383$new_n55155_
+.subckt and2_x1 i0=$abc$109383$new_n55154_ i1=$abc$109383$new_n55151_ q=$abc$109383$new_n55155_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55156_
-.subckt o2_x2 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n29452_ q=$abc$109383$new_n55157_
-.subckt a3_x2 i0=$abc$109383$new_n29491_ i1=$abc$109383$new_n52333_ i2=$abc$109383$new_n52326_ q=$abc$109383$new_n55158_
+.subckt or2_x1 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n29452_ q=$abc$109383$new_n55157_
+.subckt and3_x1 i0=$abc$109383$new_n29491_ i1=$abc$109383$new_n52333_ i2=$abc$109383$new_n52326_ q=$abc$109383$new_n55158_
 .subckt buf_x4 i=$abc$109383$new_n55158_ q=$abc$109383$new_n55159_
-.subckt a3_x2 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55157_ i2=$abc$109383$new_n29396_ q=$abc$109383$new_n55160_
+.subckt and3_x1 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55157_ i2=$abc$109383$new_n29396_ q=$abc$109383$new_n55160_
 .subckt nor2_x0 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n29452_ nq=$abc$109383$new_n55161_
 .subckt nand3_x0 i0=$abc$109383$new_n29492_ i1=$abc$109383$new_n52334_ i2=$abc$109383$new_n52326_ nq=$abc$109383$new_n55162_
-.subckt ao22_x2 i0=$abc$109383$new_n55162_ i1=$abc$109383$new_n55161_ i2=$abc$109383$new_n29749_ q=$abc$109383$new_n55163_
-.subckt o3_x2 i0=$abc$109383$new_n55163_ i1=$abc$109383$new_n55160_ i2=$abc$109383$new_n55156_ q=$abc$109383$new_n55164_
+.subckt and21nor_x1 i0=$abc$109383$new_n55162_ i1=$abc$109383$new_n55161_ i2=$abc$109383$new_n29749_ nq=$abc$109383$new_n55163_
+.subckt or3_x1 i0=$abc$109383$new_n55163_ i1=$abc$109383$new_n55160_ i2=$abc$109383$new_n55156_ q=$abc$109383$new_n55164_
 .subckt nand3_x0 i0=$abc$109383$new_n55164_ i1=$abc$109383$new_n55155_ i2=$abc$109383$new_n55127_ nq=$abc$109383$new_n55165_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55165_ i2=$abc$109383$new_n55150_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105206
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[3] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55167_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55165_ i2=$abc$109383$new_n55150_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105206
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[3] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55167_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[2] i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55168_
 .subckt nor3_x0 i0=soc.cpu.minerva.divider.quotient[2] i1=soc.cpu.minerva.divider.quotient[0] i2=soc.cpu.minerva.divider.quotient[1] nq=$abc$109383$new_n55169_
-.subckt nxr2_x1 i0=$abc$109383$new_n55169_ i1=soc.cpu.minerva.divider.quotient[3] nq=$abc$109383$new_n55170_
+.subckt nexor2_x0 i0=$abc$109383$new_n55169_ i1=soc.cpu.minerva.divider.quotient[3] nq=$abc$109383$new_n55170_
 .subckt nand2_x0 i0=$abc$109383$new_n55170_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55171_
-.subckt a2_x2 i0=$abc$109383$new_n55171_ i1=$abc$109383$new_n55168_ q=$abc$109383$new_n55172_
+.subckt and2_x1 i0=$abc$109383$new_n55171_ i1=$abc$109383$new_n55168_ q=$abc$109383$new_n55172_
 .subckt buf_x4 i=$abc$109383$new_n54068_ q=$abc$109383$new_n55173_
-.subckt o3_x2 i0=$abc$109383$new_n29396_ i1=$abc$109383$new_n30304_ i2=$abc$109383$new_n29452_ q=$abc$109383$new_n55174_
+.subckt or3_x1 i0=$abc$109383$new_n29396_ i1=$abc$109383$new_n30304_ i2=$abc$109383$new_n29452_ q=$abc$109383$new_n55174_
 .subckt buf_x4 i=$abc$109383$new_n55159_ q=$abc$109383$new_n55175_
 .subckt nand3_x0 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55174_ i2=$abc$109383$new_n29421_ nq=$abc$109383$new_n55176_
 .subckt buf_x4 i=$abc$109383$new_n55158_ q=$abc$109383$new_n55177_
-.subckt oa22_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55174_ i2=$abc$109383$new_n29421_ q=$abc$109383$new_n55178_
+.subckt or21nand_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55174_ i2=$abc$109383$new_n29421_ nq=$abc$109383$new_n55178_
 .subckt nand3_x0 i0=$abc$109383$new_n55178_ i1=$abc$109383$new_n55176_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55179_
 .subckt nand3_x0 i0=$abc$109383$new_n55179_ i1=$abc$109383$new_n55172_ i2=$abc$109383$new_n55127_ nq=$abc$109383$new_n55180_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55180_ i2=$abc$109383$new_n55167_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105210
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[4] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55182_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55180_ i2=$abc$109383$new_n55167_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105210
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[4] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55182_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[3] i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55183_
 .subckt nor4_x0 i0=soc.cpu.minerva.divider.quotient[3] i1=soc.cpu.minerva.divider.quotient[2] i2=soc.cpu.minerva.divider.quotient[0] i3=soc.cpu.minerva.divider.quotient[1] nq=$abc$109383$new_n55184_
-.subckt nxr2_x1 i0=$abc$109383$new_n55184_ i1=soc.cpu.minerva.divider.quotient[4] nq=$abc$109383$new_n55185_
+.subckt nexor2_x0 i0=$abc$109383$new_n55184_ i1=soc.cpu.minerva.divider.quotient[4] nq=$abc$109383$new_n55185_
 .subckt nand2_x0 i0=$abc$109383$new_n55185_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55186_
-.subckt a2_x2 i0=$abc$109383$new_n55186_ i1=$abc$109383$new_n55183_ q=$abc$109383$new_n55187_
-.subckt o4_x2 i0=$abc$109383$new_n29421_ i1=$abc$109383$new_n29396_ i2=$abc$109383$new_n30304_ i3=$abc$109383$new_n29452_ q=$abc$109383$new_n55188_
-.subckt oa22_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55188_ i2=$abc$109383$new_n29275_ q=$abc$109383$new_n55189_
+.subckt and2_x1 i0=$abc$109383$new_n55186_ i1=$abc$109383$new_n55183_ q=$abc$109383$new_n55187_
+.subckt or4_x1 i0=$abc$109383$new_n29421_ i1=$abc$109383$new_n29396_ i2=$abc$109383$new_n30304_ i3=$abc$109383$new_n29452_ q=$abc$109383$new_n55188_
+.subckt or21nand_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55188_ i2=$abc$109383$new_n29275_ nq=$abc$109383$new_n55189_
 .subckt nand3_x0 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55188_ i2=$abc$109383$new_n29275_ nq=$abc$109383$new_n55190_
 .subckt nand3_x0 i0=$abc$109383$new_n55190_ i1=$abc$109383$new_n55189_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55191_
 .subckt nand3_x0 i0=$abc$109383$new_n55191_ i1=$abc$109383$new_n55187_ i2=$abc$109383$new_n55127_ nq=$abc$109383$new_n55192_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55192_ i2=$abc$109383$new_n55182_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105214
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[5] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55194_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55192_ i2=$abc$109383$new_n55182_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105214
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[5] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55194_
 .subckt buf_x4 i=$abc$109383$new_n55120_ q=$abc$109383$new_n55195_
 .subckt nand2_x0 i0=$abc$109383$new_n55133_ i1=$abc$109383$new_n55116_ nq=$abc$109383$new_n55196_
 .subckt buf_x4 i=$abc$109383$new_n55196_ q=$abc$109383$new_n55197_
@@ -40473,486 +40473,486 @@
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[4] nq=$abc$109383$new_n55199_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[5] nq=$abc$109383$new_n55200_
 .subckt nand3_x0 i0=$abc$109383$new_n55184_ i1=$abc$109383$new_n55200_ i2=$abc$109383$new_n55199_ nq=$abc$109383$new_n55201_
-.subckt oa22_x2 i0=$abc$109383$new_n55199_ i1=$abc$109383$new_n55184_ i2=$abc$109383$new_n55200_ q=$abc$109383$new_n55202_
+.subckt or21nand_x1 i0=$abc$109383$new_n55199_ i1=$abc$109383$new_n55184_ i2=$abc$109383$new_n55200_ nq=$abc$109383$new_n55202_
 .subckt nand3_x0 i0=$abc$109383$new_n55202_ i1=$abc$109383$new_n55201_ i2=$abc$109383$new_n55134_ nq=$abc$109383$new_n55203_
-.subckt a4_x2 i0=$abc$109383$new_n55203_ i1=$abc$109383$new_n55198_ i2=$abc$109383$new_n55197_ i3=$abc$109383$new_n55195_ q=$abc$109383$new_n55204_
+.subckt and4_x1 i0=$abc$109383$new_n55203_ i1=$abc$109383$new_n55198_ i2=$abc$109383$new_n55197_ i3=$abc$109383$new_n55195_ q=$abc$109383$new_n55204_
 .subckt buf_x4 i=$abc$109383$new_n55140_ q=$abc$109383$new_n55205_
 .subckt nand2_x0 i0=$abc$109383$new_n54040_ i1=$abc$109383$new_n29741_ nq=$abc$109383$new_n55206_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55206_ q=$abc$109383$new_n55207_
-.subckt nxr2_x1 i0=$abc$109383$new_n55207_ i1=$abc$109383$new_n29738_ nq=$abc$109383$new_n55208_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55206_ q=$abc$109383$new_n55207_
+.subckt nexor2_x0 i0=$abc$109383$new_n55207_ i1=$abc$109383$new_n29738_ nq=$abc$109383$new_n55208_
 .subckt nand2_x0 i0=$abc$109383$new_n55208_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55209_
 .subckt nand2_x0 i0=$abc$109383$new_n55209_ i1=$abc$109383$new_n55204_ nq=$abc$109383$new_n55210_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55210_ i2=$abc$109383$new_n55194_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105218
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[6] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55212_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55210_ i2=$abc$109383$new_n55194_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105218
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[6] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55212_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[6] nq=$abc$109383$new_n55213_
 .subckt nand4_x0 i0=$abc$109383$new_n55184_ i1=$abc$109383$new_n55213_ i2=$abc$109383$new_n55200_ i3=$abc$109383$new_n55199_ nq=$abc$109383$new_n55214_
-.subckt a3_x2 i0=$abc$109383$new_n55184_ i1=$abc$109383$new_n55200_ i2=$abc$109383$new_n55199_ q=$abc$109383$new_n55215_
-.subckt ao22_x2 i0=$abc$109383$new_n55213_ i1=$abc$109383$new_n55215_ i2=$abc$109383$new_n55134_ q=$abc$109383$new_n55216_
+.subckt and3_x1 i0=$abc$109383$new_n55184_ i1=$abc$109383$new_n55200_ i2=$abc$109383$new_n55199_ q=$abc$109383$new_n55215_
+.subckt and21nor_x1 i0=$abc$109383$new_n55213_ i1=$abc$109383$new_n55215_ i2=$abc$109383$new_n55134_ nq=$abc$109383$new_n55216_
 .subckt nand2_x0 i0=$abc$109383$new_n55216_ i1=$abc$109383$new_n55214_ nq=$abc$109383$new_n55217_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[5] i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55218_
 .subckt nand3_x0 i0=$abc$109383$new_n54040_ i1=$abc$109383$new_n29738_ i2=$abc$109383$new_n29741_ nq=$abc$109383$new_n55219_
-.subckt oa22_x2 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55219_ i2=$abc$109383$new_n29332_ q=$abc$109383$new_n55220_
+.subckt or21nand_x1 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55219_ i2=$abc$109383$new_n29332_ nq=$abc$109383$new_n55220_
 .subckt nand3_x0 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55219_ i2=$abc$109383$new_n29332_ nq=$abc$109383$new_n55221_
 .subckt nand3_x0 i0=$abc$109383$new_n55221_ i1=$abc$109383$new_n55220_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55222_
 .subckt nand4_x0 i0=$abc$109383$new_n55222_ i1=$abc$109383$new_n55218_ i2=$abc$109383$new_n55217_ i3=$abc$109383$new_n55127_ nq=$abc$109383$new_n55223_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55223_ i2=$abc$109383$new_n55212_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105222
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[7] i2=$abc$109383$new_n53172_ q=$abc$109383$new_n55225_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55223_ i2=$abc$109383$new_n55212_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105222
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[7] i2=$abc$109383$new_n53172_ nq=$abc$109383$new_n55225_
 .subckt nand3_x0 i0=$abc$109383$new_n55130_ i1=soc.cpu.minerva.divider.quotient[6] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55226_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[7] nq=$abc$109383$new_n55227_
-.subckt a4_x2 i0=$abc$109383$new_n55184_ i1=$abc$109383$new_n55213_ i2=$abc$109383$new_n55200_ i3=$abc$109383$new_n55199_ q=$abc$109383$new_n55228_
-.subckt nxr2_x1 i0=$abc$109383$new_n55228_ i1=$abc$109383$new_n55227_ nq=$abc$109383$new_n55229_
-.subckt ao22_x2 i0=$abc$109383$new_n55121_ i1=$abc$109383$new_n55229_ i2=$abc$109383$new_n55226_ q=$abc$109383$new_n55230_
+.subckt and4_x1 i0=$abc$109383$new_n55184_ i1=$abc$109383$new_n55213_ i2=$abc$109383$new_n55200_ i3=$abc$109383$new_n55199_ q=$abc$109383$new_n55228_
+.subckt nexor2_x0 i0=$abc$109383$new_n55228_ i1=$abc$109383$new_n55227_ nq=$abc$109383$new_n55229_
+.subckt and21nor_x1 i0=$abc$109383$new_n55121_ i1=$abc$109383$new_n55229_ i2=$abc$109383$new_n55226_ nq=$abc$109383$new_n55230_
 .subckt nand2_x0 i0=$abc$109383$new_n55230_ i1=$abc$109383$new_n55124_ nq=$abc$109383$new_n55231_
 .subckt nand4_x0 i0=$abc$109383$new_n54040_ i1=$abc$109383$new_n29734_ i2=$abc$109383$new_n29738_ i3=$abc$109383$new_n29741_ nq=$abc$109383$new_n55232_
-.subckt a2_x2 i0=$abc$109383$new_n55158_ i1=$abc$109383$new_n55232_ q=$abc$109383$new_n55233_
-.subckt nxr2_x1 i0=$abc$109383$new_n55233_ i1=$abc$109383$new_n29731_ nq=$abc$109383$new_n55234_
-.subckt a2_x2 i0=$abc$109383$new_n55234_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n55235_
-.subckt o2_x2 i0=$abc$109383$new_n55235_ i1=$abc$109383$new_n55231_ q=$abc$109383$new_n55236_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55236_ i2=$abc$109383$new_n55225_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105226
+.subckt and2_x1 i0=$abc$109383$new_n55158_ i1=$abc$109383$new_n55232_ q=$abc$109383$new_n55233_
+.subckt nexor2_x0 i0=$abc$109383$new_n55233_ i1=$abc$109383$new_n29731_ nq=$abc$109383$new_n55234_
+.subckt and2_x1 i0=$abc$109383$new_n55234_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n55235_
+.subckt or2_x1 i0=$abc$109383$new_n55235_ i1=$abc$109383$new_n55231_ q=$abc$109383$new_n55236_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55236_ i2=$abc$109383$new_n55225_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105226
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n55238_
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[8] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55239_
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[8] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55239_
 .subckt nand3_x0 i0=$abc$109383$new_n55130_ i1=soc.cpu.minerva.divider.quotient[7] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55240_
 .subckt nand3_x0 i0=$abc$109383$new_n55240_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ nq=$abc$109383$new_n55241_
 .subckt buf_x4 i=$abc$109383$new_n55121_ q=$abc$109383$new_n55242_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[8] nq=$abc$109383$new_n55243_
-.subckt a3_x2 i0=$abc$109383$new_n55228_ i1=$abc$109383$new_n55243_ i2=$abc$109383$new_n55227_ q=$abc$109383$new_n55244_
+.subckt and3_x1 i0=$abc$109383$new_n55228_ i1=$abc$109383$new_n55243_ i2=$abc$109383$new_n55227_ q=$abc$109383$new_n55244_
 .subckt nor2_x0 i0=$abc$109383$new_n55244_ i1=$abc$109383$new_n55242_ nq=$abc$109383$new_n55245_
-.subckt oa22_x2 i0=$abc$109383$new_n55227_ i1=$abc$109383$new_n55228_ i2=$abc$109383$new_n55243_ q=$abc$109383$new_n55246_
-.subckt oa22_x2 i0=$abc$109383$new_n55246_ i1=$abc$109383$new_n55245_ i2=$abc$109383$new_n55241_ q=$abc$109383$new_n55247_
-.subckt oa22_x2 i0=$abc$109383$new_n29731_ i1=$abc$109383$new_n54041_ i2=$abc$109383$new_n55162_ q=$abc$109383$new_n55248_
+.subckt or21nand_x1 i0=$abc$109383$new_n55227_ i1=$abc$109383$new_n55228_ i2=$abc$109383$new_n55243_ nq=$abc$109383$new_n55246_
+.subckt or21nand_x1 i0=$abc$109383$new_n55246_ i1=$abc$109383$new_n55245_ i2=$abc$109383$new_n55241_ nq=$abc$109383$new_n55247_
+.subckt or21nand_x1 i0=$abc$109383$new_n29731_ i1=$abc$109383$new_n54041_ i2=$abc$109383$new_n55162_ nq=$abc$109383$new_n55248_
 .subckt nand2_x0 i0=$abc$109383$new_n55248_ i1=$abc$109383$new_n29723_ nq=$abc$109383$new_n55249_
-.subckt ao22_x2 i0=$abc$109383$new_n55248_ i1=$abc$109383$new_n29723_ i2=$abc$109383$new_n54068_ q=$abc$109383$new_n55250_
-.subckt a2_x2 i0=$abc$109383$new_n55250_ i1=$abc$109383$new_n55249_ q=$abc$109383$new_n55251_
-.subckt o2_x2 i0=$abc$109383$new_n55251_ i1=$abc$109383$new_n55247_ q=$abc$109383$new_n55252_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55252_ i2=$abc$109383$new_n55239_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105230
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[9] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55254_
+.subckt and21nor_x1 i0=$abc$109383$new_n55248_ i1=$abc$109383$new_n29723_ i2=$abc$109383$new_n54068_ nq=$abc$109383$new_n55250_
+.subckt and2_x1 i0=$abc$109383$new_n55250_ i1=$abc$109383$new_n55249_ q=$abc$109383$new_n55251_
+.subckt or2_x1 i0=$abc$109383$new_n55251_ i1=$abc$109383$new_n55247_ q=$abc$109383$new_n55252_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55252_ i2=$abc$109383$new_n55239_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105230
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[9] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55254_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55255_
 .subckt buf_x4 i=$abc$109383$new_n55130_ q=$abc$109383$new_n55256_
 .subckt nand3_x0 i0=$abc$109383$new_n55256_ i1=soc.cpu.minerva.divider.quotient[8] i2=$abc$109383$new_n55255_ nq=$abc$109383$new_n55257_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[9] nq=$abc$109383$new_n55258_
-.subckt nxr2_x1 i0=$abc$109383$new_n55244_ i1=$abc$109383$new_n55258_ nq=$abc$109383$new_n55259_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55259_ i2=$abc$109383$new_n55257_ q=$abc$109383$new_n55260_
-.subckt a2_x2 i0=$abc$109383$new_n55260_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55261_
+.subckt nexor2_x0 i0=$abc$109383$new_n55244_ i1=$abc$109383$new_n55258_ nq=$abc$109383$new_n55259_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55259_ i2=$abc$109383$new_n55257_ nq=$abc$109383$new_n55260_
+.subckt and2_x1 i0=$abc$109383$new_n55260_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55261_
 .subckt nand3_x0 i0=$abc$109383$new_n54041_ i1=$abc$109383$new_n29723_ i2=$abc$109383$new_n29731_ nq=$abc$109383$new_n55262_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55262_ q=$abc$109383$new_n55263_
-.subckt nxr2_x1 i0=$abc$109383$new_n55263_ i1=$abc$109383$new_n29720_ nq=$abc$109383$new_n55264_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55262_ q=$abc$109383$new_n55263_
+.subckt nexor2_x0 i0=$abc$109383$new_n55263_ i1=$abc$109383$new_n29720_ nq=$abc$109383$new_n55264_
 .subckt nand2_x0 i0=$abc$109383$new_n55264_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55265_
 .subckt nand2_x0 i0=$abc$109383$new_n55265_ i1=$abc$109383$new_n55261_ nq=$abc$109383$new_n55266_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55266_ i2=$abc$109383$new_n55254_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105234
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[10] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55268_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55266_ i2=$abc$109383$new_n55254_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105234
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[10] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55268_
 .subckt nand3_x0 i0=$abc$109383$new_n55256_ i1=soc.cpu.minerva.divider.quotient[9] i2=$abc$109383$new_n55255_ nq=$abc$109383$new_n55269_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[10] nq=$abc$109383$new_n55270_
-.subckt a4_x2 i0=$abc$109383$new_n55228_ i1=$abc$109383$new_n55258_ i2=$abc$109383$new_n55243_ i3=$abc$109383$new_n55227_ q=$abc$109383$new_n55271_
-.subckt nxr2_x1 i0=$abc$109383$new_n55271_ i1=$abc$109383$new_n55270_ nq=$abc$109383$new_n55272_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55272_ i2=$abc$109383$new_n55269_ q=$abc$109383$new_n55273_
-.subckt a2_x2 i0=$abc$109383$new_n55273_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55274_
+.subckt and4_x1 i0=$abc$109383$new_n55228_ i1=$abc$109383$new_n55258_ i2=$abc$109383$new_n55243_ i3=$abc$109383$new_n55227_ q=$abc$109383$new_n55271_
+.subckt nexor2_x0 i0=$abc$109383$new_n55271_ i1=$abc$109383$new_n55270_ nq=$abc$109383$new_n55272_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55272_ i2=$abc$109383$new_n55269_ nq=$abc$109383$new_n55273_
+.subckt and2_x1 i0=$abc$109383$new_n55273_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55274_
 .subckt nand4_x0 i0=$abc$109383$new_n54041_ i1=$abc$109383$new_n29720_ i2=$abc$109383$new_n29723_ i3=$abc$109383$new_n29731_ nq=$abc$109383$new_n55275_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55275_ q=$abc$109383$new_n55276_
-.subckt nxr2_x1 i0=$abc$109383$new_n55276_ i1=$abc$109383$new_n29716_ nq=$abc$109383$new_n55277_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55275_ q=$abc$109383$new_n55276_
+.subckt nexor2_x0 i0=$abc$109383$new_n55276_ i1=$abc$109383$new_n29716_ nq=$abc$109383$new_n55277_
 .subckt nand2_x0 i0=$abc$109383$new_n55277_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55278_
 .subckt nand2_x0 i0=$abc$109383$new_n55278_ i1=$abc$109383$new_n55274_ nq=$abc$109383$new_n55279_
-.subckt ao22_x2 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55279_ i2=$abc$109383$new_n55268_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105238
-.subckt ao22_x2 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[11] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55281_
+.subckt and21nor_x1 i0=$abc$109383$new_n55147_ i1=$abc$109383$new_n55279_ i2=$abc$109383$new_n55268_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105238
+.subckt and21nor_x1 i0=$abc$109383$new_n55149_ i1=soc.cpu.minerva.divider.quotient[11] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55281_
 .subckt nand3_x0 i0=$abc$109383$new_n55130_ i1=soc.cpu.minerva.divider.quotient[10] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55282_
 .subckt nand3_x0 i0=$abc$109383$new_n55282_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ nq=$abc$109383$new_n55283_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[11] nq=$abc$109383$new_n55284_
-.subckt a3_x2 i0=$abc$109383$new_n55271_ i1=$abc$109383$new_n55284_ i2=$abc$109383$new_n55270_ q=$abc$109383$new_n55285_
+.subckt and3_x1 i0=$abc$109383$new_n55271_ i1=$abc$109383$new_n55284_ i2=$abc$109383$new_n55270_ q=$abc$109383$new_n55285_
 .subckt nor2_x0 i0=$abc$109383$new_n55285_ i1=$abc$109383$new_n55242_ nq=$abc$109383$new_n55286_
-.subckt oa22_x2 i0=$abc$109383$new_n55270_ i1=$abc$109383$new_n55271_ i2=$abc$109383$new_n55284_ q=$abc$109383$new_n55287_
-.subckt oa22_x2 i0=$abc$109383$new_n55287_ i1=$abc$109383$new_n55286_ i2=$abc$109383$new_n55283_ q=$abc$109383$new_n55288_
-.subckt ao22_x2 i0=$abc$109383$new_n29558_ i1=$abc$109383$new_n55275_ i2=$abc$109383$new_n55158_ q=$abc$109383$new_n55289_
-.subckt nxr2_x1 i0=$abc$109383$new_n55289_ i1=$abc$109383$new_n29713_ nq=$abc$109383$new_n55290_
-.subckt a2_x2 i0=$abc$109383$new_n55290_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n55291_
-.subckt o2_x2 i0=$abc$109383$new_n55291_ i1=$abc$109383$new_n55288_ q=$abc$109383$new_n55292_
+.subckt or21nand_x1 i0=$abc$109383$new_n55270_ i1=$abc$109383$new_n55271_ i2=$abc$109383$new_n55284_ nq=$abc$109383$new_n55287_
+.subckt or21nand_x1 i0=$abc$109383$new_n55287_ i1=$abc$109383$new_n55286_ i2=$abc$109383$new_n55283_ nq=$abc$109383$new_n55288_
+.subckt and21nor_x1 i0=$abc$109383$new_n29558_ i1=$abc$109383$new_n55275_ i2=$abc$109383$new_n55158_ nq=$abc$109383$new_n55289_
+.subckt nexor2_x0 i0=$abc$109383$new_n55289_ i1=$abc$109383$new_n29713_ nq=$abc$109383$new_n55290_
+.subckt and2_x1 i0=$abc$109383$new_n55290_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n55291_
+.subckt or2_x1 i0=$abc$109383$new_n55291_ i1=$abc$109383$new_n55288_ q=$abc$109383$new_n55292_
 .subckt buf_x4 i=$abc$109383$new_n55146_ q=$abc$109383$new_n55293_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55292_ i2=$abc$109383$new_n55281_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105242
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55292_ i2=$abc$109383$new_n55281_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105242
 .subckt buf_x4 i=$abc$109383$new_n55126_ q=$abc$109383$new_n55295_
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[12] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55296_
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[12] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55296_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55297_
 .subckt buf_x4 i=$abc$109383$new_n55130_ q=$abc$109383$new_n55298_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[11] i2=$abc$109383$new_n55297_ nq=$abc$109383$new_n55299_
-.subckt a3_x2 i0=$abc$109383$new_n55299_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55300_
+.subckt and3_x1 i0=$abc$109383$new_n55299_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55300_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[12] nq=$abc$109383$new_n55301_
-.subckt nxr2_x1 i0=$abc$109383$new_n55285_ i1=$abc$109383$new_n55301_ nq=$abc$109383$new_n55302_
+.subckt nexor2_x0 i0=$abc$109383$new_n55285_ i1=$abc$109383$new_n55301_ nq=$abc$109383$new_n55302_
 .subckt buf_x4 i=$abc$109383$new_n55121_ q=$abc$109383$new_n55303_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55302_ i2=$abc$109383$new_n55300_ q=$abc$109383$new_n55304_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55302_ i2=$abc$109383$new_n55300_ nq=$abc$109383$new_n55304_
 .subckt nand3_x0 i0=$abc$109383$new_n54042_ i1=$abc$109383$new_n29713_ i2=$abc$109383$new_n29716_ nq=$abc$109383$new_n55305_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55305_ q=$abc$109383$new_n55306_
-.subckt nxr2_x1 i0=$abc$109383$new_n55306_ i1=$abc$109383$new_n29707_ nq=$abc$109383$new_n55307_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55305_ q=$abc$109383$new_n55306_
+.subckt nexor2_x0 i0=$abc$109383$new_n55306_ i1=$abc$109383$new_n29707_ nq=$abc$109383$new_n55307_
 .subckt nand2_x0 i0=$abc$109383$new_n55307_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55308_
 .subckt nand2_x0 i0=$abc$109383$new_n55308_ i1=$abc$109383$new_n55304_ nq=$abc$109383$new_n55309_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55309_ i2=$abc$109383$new_n55296_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105246
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[13] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55311_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55309_ i2=$abc$109383$new_n55296_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105246
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[13] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55311_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[12] i2=$abc$109383$new_n55255_ nq=$abc$109383$new_n55312_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[13] nq=$abc$109383$new_n55313_
-.subckt a4_x2 i0=$abc$109383$new_n55271_ i1=$abc$109383$new_n55301_ i2=$abc$109383$new_n55284_ i3=$abc$109383$new_n55270_ q=$abc$109383$new_n55314_
-.subckt nxr2_x1 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55313_ nq=$abc$109383$new_n55315_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55315_ i2=$abc$109383$new_n55312_ q=$abc$109383$new_n55316_
-.subckt a2_x2 i0=$abc$109383$new_n55316_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55317_
+.subckt and4_x1 i0=$abc$109383$new_n55271_ i1=$abc$109383$new_n55301_ i2=$abc$109383$new_n55284_ i3=$abc$109383$new_n55270_ q=$abc$109383$new_n55314_
+.subckt nexor2_x0 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55313_ nq=$abc$109383$new_n55315_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55315_ i2=$abc$109383$new_n55312_ nq=$abc$109383$new_n55316_
+.subckt and2_x1 i0=$abc$109383$new_n55316_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55317_
 .subckt nand4_x0 i0=$abc$109383$new_n54042_ i1=$abc$109383$new_n29707_ i2=$abc$109383$new_n29713_ i3=$abc$109383$new_n29716_ nq=$abc$109383$new_n55318_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55318_ q=$abc$109383$new_n55319_
-.subckt nxr2_x1 i0=$abc$109383$new_n55319_ i1=$abc$109383$new_n29704_ nq=$abc$109383$new_n55320_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55318_ q=$abc$109383$new_n55319_
+.subckt nexor2_x0 i0=$abc$109383$new_n55319_ i1=$abc$109383$new_n29704_ nq=$abc$109383$new_n55320_
 .subckt nand2_x0 i0=$abc$109383$new_n55320_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55321_
 .subckt nand2_x0 i0=$abc$109383$new_n55321_ i1=$abc$109383$new_n55317_ nq=$abc$109383$new_n55322_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55322_ i2=$abc$109383$new_n55311_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105250
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[14] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55324_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55322_ i2=$abc$109383$new_n55311_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105250
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[14] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55324_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[13] i2=$abc$109383$new_n55297_ nq=$abc$109383$new_n55325_
-.subckt a3_x2 i0=$abc$109383$new_n55325_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55326_
+.subckt and3_x1 i0=$abc$109383$new_n55325_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55326_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[14] nq=$abc$109383$new_n55327_
-.subckt a2_x2 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55313_ q=$abc$109383$new_n55328_
-.subckt nxr2_x1 i0=$abc$109383$new_n55328_ i1=$abc$109383$new_n55327_ nq=$abc$109383$new_n55329_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55329_ i2=$abc$109383$new_n55326_ q=$abc$109383$new_n55330_
-.subckt ao22_x2 i0=$abc$109383$new_n29632_ i1=$abc$109383$new_n55318_ i2=$abc$109383$new_n55159_ q=$abc$109383$new_n55331_
-.subckt nxr2_x1 i0=$abc$109383$new_n55331_ i1=$abc$109383$new_n29699_ nq=$abc$109383$new_n55332_
+.subckt and2_x1 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55313_ q=$abc$109383$new_n55328_
+.subckt nexor2_x0 i0=$abc$109383$new_n55328_ i1=$abc$109383$new_n55327_ nq=$abc$109383$new_n55329_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55329_ i2=$abc$109383$new_n55326_ nq=$abc$109383$new_n55330_
+.subckt and21nor_x1 i0=$abc$109383$new_n29632_ i1=$abc$109383$new_n55318_ i2=$abc$109383$new_n55159_ nq=$abc$109383$new_n55331_
+.subckt nexor2_x0 i0=$abc$109383$new_n55331_ i1=$abc$109383$new_n29699_ nq=$abc$109383$new_n55332_
 .subckt nand2_x0 i0=$abc$109383$new_n55332_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55333_
 .subckt nand2_x0 i0=$abc$109383$new_n55333_ i1=$abc$109383$new_n55330_ nq=$abc$109383$new_n55334_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55334_ i2=$abc$109383$new_n55324_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105254
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[15] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55336_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55334_ i2=$abc$109383$new_n55324_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105254
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[15] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55336_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[14] i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55337_
 .subckt nand3_x0 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55327_ i2=$abc$109383$new_n55313_ nq=$abc$109383$new_n55338_
 .subckt nand2_x0 i0=$abc$109383$new_n55338_ i1=soc.cpu.minerva.divider.quotient[15] nq=$abc$109383$new_n55339_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[15] nq=$abc$109383$new_n55340_
-.subckt a4_x2 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55340_ i2=$abc$109383$new_n55327_ i3=$abc$109383$new_n55313_ q=$abc$109383$new_n55341_
+.subckt and4_x1 i0=$abc$109383$new_n55314_ i1=$abc$109383$new_n55340_ i2=$abc$109383$new_n55327_ i3=$abc$109383$new_n55313_ q=$abc$109383$new_n55341_
 .subckt nor2_x0 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55242_ nq=$abc$109383$new_n55342_
 .subckt nand2_x0 i0=$abc$109383$new_n55342_ i1=$abc$109383$new_n55339_ nq=$abc$109383$new_n55343_
 .subckt nand3_x0 i0=$abc$109383$new_n55343_ i1=$abc$109383$new_n55337_ i2=$abc$109383$new_n55124_ nq=$abc$109383$new_n55344_
 .subckt nand3_x0 i0=$abc$109383$new_n54043_ i1=$abc$109383$new_n29699_ i2=$abc$109383$new_n29704_ nq=$abc$109383$new_n55345_
-.subckt a2_x2 i0=$abc$109383$new_n55158_ i1=$abc$109383$new_n55345_ q=$abc$109383$new_n55346_
-.subckt nxr2_x1 i0=$abc$109383$new_n55346_ i1=$abc$109383$new_n29696_ nq=$abc$109383$new_n55347_
-.subckt a2_x2 i0=$abc$109383$new_n55347_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n55348_
-.subckt o2_x2 i0=$abc$109383$new_n55348_ i1=$abc$109383$new_n55344_ q=$abc$109383$new_n55349_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55349_ i2=$abc$109383$new_n55336_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105258
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[16] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55351_
+.subckt and2_x1 i0=$abc$109383$new_n55158_ i1=$abc$109383$new_n55345_ q=$abc$109383$new_n55346_
+.subckt nexor2_x0 i0=$abc$109383$new_n55346_ i1=$abc$109383$new_n29696_ nq=$abc$109383$new_n55347_
+.subckt and2_x1 i0=$abc$109383$new_n55347_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n55348_
+.subckt or2_x1 i0=$abc$109383$new_n55348_ i1=$abc$109383$new_n55344_ q=$abc$109383$new_n55349_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55349_ i2=$abc$109383$new_n55336_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105258
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[16] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55351_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[15] i2=$abc$109383$new_n55255_ nq=$abc$109383$new_n55352_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[16] nq=$abc$109383$new_n55353_
-.subckt nxr2_x1 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55353_ nq=$abc$109383$new_n55354_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55354_ i2=$abc$109383$new_n55352_ q=$abc$109383$new_n55355_
-.subckt a2_x2 i0=$abc$109383$new_n55355_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55356_
+.subckt nexor2_x0 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55353_ nq=$abc$109383$new_n55354_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55354_ i2=$abc$109383$new_n55352_ nq=$abc$109383$new_n55355_
+.subckt and2_x1 i0=$abc$109383$new_n55355_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55356_
 .subckt nand4_x0 i0=$abc$109383$new_n54043_ i1=$abc$109383$new_n29696_ i2=$abc$109383$new_n29699_ i3=$abc$109383$new_n29704_ nq=$abc$109383$new_n55357_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55357_ q=$abc$109383$new_n55358_
-.subckt nxr2_x1 i0=$abc$109383$new_n55358_ i1=$abc$109383$new_n29697_ nq=$abc$109383$new_n55359_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55357_ q=$abc$109383$new_n55358_
+.subckt nexor2_x0 i0=$abc$109383$new_n55358_ i1=$abc$109383$new_n29697_ nq=$abc$109383$new_n55359_
 .subckt nand2_x0 i0=$abc$109383$new_n55359_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55360_
 .subckt nand2_x0 i0=$abc$109383$new_n55360_ i1=$abc$109383$new_n55356_ nq=$abc$109383$new_n55361_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55361_ i2=$abc$109383$new_n55351_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105262
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[17] i2=$abc$109383$new_n55238_ q=$abc$109383$new_n55363_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55361_ i2=$abc$109383$new_n55351_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105262
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[17] i2=$abc$109383$new_n55238_ nq=$abc$109383$new_n55363_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[16] i2=$abc$109383$new_n55297_ nq=$abc$109383$new_n55364_
-.subckt a3_x2 i0=$abc$109383$new_n55364_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55365_
+.subckt and3_x1 i0=$abc$109383$new_n55364_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55365_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[17] nq=$abc$109383$new_n55366_
-.subckt a2_x2 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55353_ q=$abc$109383$new_n55367_
-.subckt nxr2_x1 i0=$abc$109383$new_n55367_ i1=$abc$109383$new_n55366_ nq=$abc$109383$new_n55368_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55368_ i2=$abc$109383$new_n55365_ q=$abc$109383$new_n55369_
-.subckt ao22_x2 i0=$abc$109383$new_n29688_ i1=$abc$109383$new_n55357_ i2=$abc$109383$new_n55159_ q=$abc$109383$new_n55370_
+.subckt and2_x1 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55353_ q=$abc$109383$new_n55367_
+.subckt nexor2_x0 i0=$abc$109383$new_n55367_ i1=$abc$109383$new_n55366_ nq=$abc$109383$new_n55368_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55368_ i2=$abc$109383$new_n55365_ nq=$abc$109383$new_n55369_
+.subckt and21nor_x1 i0=$abc$109383$new_n29688_ i1=$abc$109383$new_n55357_ i2=$abc$109383$new_n55159_ nq=$abc$109383$new_n55370_
 .subckt nand2_x0 i0=$abc$109383$new_n55370_ i1=$abc$109383$new_n29664_ nq=$abc$109383$new_n55371_
-.subckt ao22_x2 i0=$abc$109383$new_n55370_ i1=$abc$109383$new_n29664_ i2=$abc$109383$new_n55173_ q=$abc$109383$new_n55372_
+.subckt and21nor_x1 i0=$abc$109383$new_n55370_ i1=$abc$109383$new_n29664_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55372_
 .subckt nand2_x0 i0=$abc$109383$new_n55372_ i1=$abc$109383$new_n55371_ nq=$abc$109383$new_n55373_
 .subckt nand2_x0 i0=$abc$109383$new_n55373_ i1=$abc$109383$new_n55369_ nq=$abc$109383$new_n55374_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55374_ i2=$abc$109383$new_n55363_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105266
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55374_ i2=$abc$109383$new_n55363_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105266
 .subckt buf_x4 i=$abc$109383$new_n27524_ q=$abc$109383$new_n55376_
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[18] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55377_
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[18] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55377_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[17] i2=$abc$109383$new_n55297_ nq=$abc$109383$new_n55378_
-.subckt a3_x2 i0=$abc$109383$new_n55378_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55379_
+.subckt and3_x1 i0=$abc$109383$new_n55378_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55379_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[18] nq=$abc$109383$new_n55380_
-.subckt a3_x2 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55366_ i2=$abc$109383$new_n55353_ q=$abc$109383$new_n55381_
-.subckt nxr2_x1 i0=$abc$109383$new_n55381_ i1=$abc$109383$new_n55380_ nq=$abc$109383$new_n55382_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55382_ i2=$abc$109383$new_n55379_ q=$abc$109383$new_n55383_
+.subckt and3_x1 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55366_ i2=$abc$109383$new_n55353_ q=$abc$109383$new_n55381_
+.subckt nexor2_x0 i0=$abc$109383$new_n55381_ i1=$abc$109383$new_n55380_ nq=$abc$109383$new_n55382_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55382_ i2=$abc$109383$new_n55379_ nq=$abc$109383$new_n55383_
 .subckt nand3_x0 i0=$abc$109383$new_n54044_ i1=$abc$109383$new_n29700_ i2=$abc$109383$new_n29697_ nq=$abc$109383$new_n55384_
-.subckt oa22_x2 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55384_ i2=$abc$109383$new_n29643_ q=$abc$109383$new_n55385_
+.subckt or21nand_x1 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55384_ i2=$abc$109383$new_n29643_ nq=$abc$109383$new_n55385_
 .subckt nand3_x0 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55384_ i2=$abc$109383$new_n29643_ nq=$abc$109383$new_n55386_
 .subckt nand3_x0 i0=$abc$109383$new_n55386_ i1=$abc$109383$new_n55385_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55387_
 .subckt nand2_x0 i0=$abc$109383$new_n55387_ i1=$abc$109383$new_n55383_ nq=$abc$109383$new_n55388_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55388_ i2=$abc$109383$new_n55377_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105270
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[19] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55390_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55388_ i2=$abc$109383$new_n55377_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105270
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[19] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55390_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[18] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55391_
-.subckt a3_x2 i0=$abc$109383$new_n55391_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55392_
+.subckt and3_x1 i0=$abc$109383$new_n55391_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55392_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[19] nq=$abc$109383$new_n55393_
-.subckt a4_x2 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55380_ i2=$abc$109383$new_n55366_ i3=$abc$109383$new_n55353_ q=$abc$109383$new_n55394_
-.subckt nxr2_x1 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55393_ nq=$abc$109383$new_n55395_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55395_ i2=$abc$109383$new_n55392_ q=$abc$109383$new_n55396_
+.subckt and4_x1 i0=$abc$109383$new_n55341_ i1=$abc$109383$new_n55380_ i2=$abc$109383$new_n55366_ i3=$abc$109383$new_n55353_ q=$abc$109383$new_n55394_
+.subckt nexor2_x0 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55393_ nq=$abc$109383$new_n55395_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55395_ i2=$abc$109383$new_n55392_ nq=$abc$109383$new_n55396_
 .subckt nand4_x0 i0=$abc$109383$new_n54044_ i1=$abc$109383$new_n29705_ i2=$abc$109383$new_n29700_ i3=$abc$109383$new_n29697_ nq=$abc$109383$new_n55397_
-.subckt oa22_x2 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55397_ i2=$abc$109383$new_n29620_ q=$abc$109383$new_n55398_
+.subckt or21nand_x1 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55397_ i2=$abc$109383$new_n29620_ nq=$abc$109383$new_n55398_
 .subckt nand3_x0 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55397_ i2=$abc$109383$new_n29620_ nq=$abc$109383$new_n55399_
 .subckt nand3_x0 i0=$abc$109383$new_n55399_ i1=$abc$109383$new_n55398_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55400_
 .subckt nand2_x0 i0=$abc$109383$new_n55400_ i1=$abc$109383$new_n55396_ nq=$abc$109383$new_n55401_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55401_ i2=$abc$109383$new_n55390_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105274
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[20] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55403_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55401_ i2=$abc$109383$new_n55390_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105274
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[20] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55403_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[19] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55404_
-.subckt a3_x2 i0=$abc$109383$new_n55404_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55405_
+.subckt and3_x1 i0=$abc$109383$new_n55404_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55405_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[20] nq=$abc$109383$new_n55406_
-.subckt a2_x2 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55393_ q=$abc$109383$new_n55407_
-.subckt nxr2_x1 i0=$abc$109383$new_n55407_ i1=$abc$109383$new_n55406_ nq=$abc$109383$new_n55408_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55408_ i2=$abc$109383$new_n55405_ q=$abc$109383$new_n55409_
-.subckt ao22_x2 i0=$abc$109383$new_n29620_ i1=$abc$109383$new_n55397_ i2=$abc$109383$new_n55159_ q=$abc$109383$new_n55410_
+.subckt and2_x1 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55393_ q=$abc$109383$new_n55407_
+.subckt nexor2_x0 i0=$abc$109383$new_n55407_ i1=$abc$109383$new_n55406_ nq=$abc$109383$new_n55408_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55408_ i2=$abc$109383$new_n55405_ nq=$abc$109383$new_n55409_
+.subckt and21nor_x1 i0=$abc$109383$new_n29620_ i1=$abc$109383$new_n55397_ i2=$abc$109383$new_n55159_ nq=$abc$109383$new_n55410_
 .subckt nand2_x0 i0=$abc$109383$new_n55410_ i1=$abc$109383$new_n29594_ nq=$abc$109383$new_n55411_
-.subckt ao22_x2 i0=$abc$109383$new_n55410_ i1=$abc$109383$new_n29594_ i2=$abc$109383$new_n55140_ q=$abc$109383$new_n55412_
+.subckt and21nor_x1 i0=$abc$109383$new_n55410_ i1=$abc$109383$new_n29594_ i2=$abc$109383$new_n55140_ nq=$abc$109383$new_n55412_
 .subckt nand2_x0 i0=$abc$109383$new_n55412_ i1=$abc$109383$new_n55411_ nq=$abc$109383$new_n55413_
 .subckt nand2_x0 i0=$abc$109383$new_n55413_ i1=$abc$109383$new_n55409_ nq=$abc$109383$new_n55414_
-.subckt ao22_x2 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55414_ i2=$abc$109383$new_n55403_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105278
-.subckt ao22_x2 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[21] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55416_
+.subckt and21nor_x1 i0=$abc$109383$new_n55293_ i1=$abc$109383$new_n55414_ i2=$abc$109383$new_n55403_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105278
+.subckt and21nor_x1 i0=$abc$109383$new_n55295_ i1=soc.cpu.minerva.divider.quotient[21] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55416_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[20] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55417_
-.subckt a3_x2 i0=$abc$109383$new_n55417_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55418_
+.subckt and3_x1 i0=$abc$109383$new_n55417_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55418_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[21] nq=$abc$109383$new_n55419_
-.subckt a3_x2 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55406_ i2=$abc$109383$new_n55393_ q=$abc$109383$new_n55420_
-.subckt nxr2_x1 i0=$abc$109383$new_n55420_ i1=$abc$109383$new_n55419_ nq=$abc$109383$new_n55421_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55421_ i2=$abc$109383$new_n55418_ q=$abc$109383$new_n55422_
+.subckt and3_x1 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55406_ i2=$abc$109383$new_n55393_ q=$abc$109383$new_n55420_
+.subckt nexor2_x0 i0=$abc$109383$new_n55420_ i1=$abc$109383$new_n55419_ nq=$abc$109383$new_n55421_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55421_ i2=$abc$109383$new_n55418_ nq=$abc$109383$new_n55422_
 .subckt nand3_x0 i0=$abc$109383$new_n54045_ i1=$abc$109383$new_n29714_ i2=$abc$109383$new_n29708_ nq=$abc$109383$new_n55423_
-.subckt oa22_x2 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55423_ i2=$abc$109383$new_n29570_ q=$abc$109383$new_n55424_
+.subckt or21nand_x1 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55423_ i2=$abc$109383$new_n29570_ nq=$abc$109383$new_n55424_
 .subckt nand3_x0 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55423_ i2=$abc$109383$new_n29570_ nq=$abc$109383$new_n55425_
 .subckt nand3_x0 i0=$abc$109383$new_n55425_ i1=$abc$109383$new_n55424_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55426_
 .subckt nand2_x0 i0=$abc$109383$new_n55426_ i1=$abc$109383$new_n55422_ nq=$abc$109383$new_n55427_
-.subckt ao22_x2 i0=$abc$109383$new_n55146_ i1=$abc$109383$new_n55427_ i2=$abc$109383$new_n55416_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105282
+.subckt and21nor_x1 i0=$abc$109383$new_n55146_ i1=$abc$109383$new_n55427_ i2=$abc$109383$new_n55416_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105282
 .subckt buf_x4 i=$abc$109383$new_n55123_ q=$abc$109383$new_n55429_
-.subckt ao22_x2 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[22] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55430_
+.subckt and21nor_x1 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[22] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55430_
 .subckt nand3_x0 i0=$abc$109383$new_n55298_ i1=soc.cpu.minerva.divider.quotient[21] i2=$abc$109383$new_n55255_ nq=$abc$109383$new_n55431_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[22] nq=$abc$109383$new_n55432_
-.subckt a4_x2 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55419_ i2=$abc$109383$new_n55406_ i3=$abc$109383$new_n55393_ q=$abc$109383$new_n55433_
-.subckt nxr2_x1 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55432_ nq=$abc$109383$new_n55434_
-.subckt ao22_x2 i0=$abc$109383$new_n55121_ i1=$abc$109383$new_n55434_ i2=$abc$109383$new_n55431_ q=$abc$109383$new_n55435_
-.subckt a2_x2 i0=$abc$109383$new_n55435_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55436_
+.subckt and4_x1 i0=$abc$109383$new_n55394_ i1=$abc$109383$new_n55419_ i2=$abc$109383$new_n55406_ i3=$abc$109383$new_n55393_ q=$abc$109383$new_n55433_
+.subckt nexor2_x0 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55432_ nq=$abc$109383$new_n55434_
+.subckt and21nor_x1 i0=$abc$109383$new_n55121_ i1=$abc$109383$new_n55434_ i2=$abc$109383$new_n55431_ nq=$abc$109383$new_n55435_
+.subckt and2_x1 i0=$abc$109383$new_n55435_ i1=$abc$109383$new_n55124_ q=$abc$109383$new_n55436_
 .subckt nand4_x0 i0=$abc$109383$new_n54045_ i1=$abc$109383$new_n29717_ i2=$abc$109383$new_n29714_ i3=$abc$109383$new_n29708_ nq=$abc$109383$new_n55437_
-.subckt a2_x2 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55437_ q=$abc$109383$new_n55438_
-.subckt nxr2_x1 i0=$abc$109383$new_n55438_ i1=$abc$109383$new_n29721_ nq=$abc$109383$new_n55439_
+.subckt and2_x1 i0=$abc$109383$new_n55177_ i1=$abc$109383$new_n55437_ q=$abc$109383$new_n55438_
+.subckt nexor2_x0 i0=$abc$109383$new_n55438_ i1=$abc$109383$new_n29721_ nq=$abc$109383$new_n55439_
 .subckt nand2_x0 i0=$abc$109383$new_n55439_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55440_
 .subckt nand2_x0 i0=$abc$109383$new_n55440_ i1=$abc$109383$new_n55436_ nq=$abc$109383$new_n55441_
-.subckt ao22_x2 i0=$abc$109383$new_n55146_ i1=$abc$109383$new_n55441_ i2=$abc$109383$new_n55430_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105286
-.subckt ao22_x2 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[23] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55443_
+.subckt and21nor_x1 i0=$abc$109383$new_n55146_ i1=$abc$109383$new_n55441_ i2=$abc$109383$new_n55430_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105286
+.subckt and21nor_x1 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[23] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55443_
 .subckt nand3_x0 i0=$abc$109383$new_n55130_ i1=soc.cpu.minerva.divider.quotient[22] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55444_
-.subckt a3_x2 i0=$abc$109383$new_n55444_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55445_
+.subckt and3_x1 i0=$abc$109383$new_n55444_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55445_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[23] nq=$abc$109383$new_n55446_
-.subckt a2_x2 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55432_ q=$abc$109383$new_n55447_
-.subckt nxr2_x1 i0=$abc$109383$new_n55447_ i1=$abc$109383$new_n55446_ nq=$abc$109383$new_n55448_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55448_ i2=$abc$109383$new_n55445_ q=$abc$109383$new_n55449_
-.subckt oa22_x2 i0=$abc$109383$new_n29721_ i1=$abc$109383$new_n54046_ i2=$abc$109383$new_n55162_ q=$abc$109383$new_n55450_
+.subckt and2_x1 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55432_ q=$abc$109383$new_n55447_
+.subckt nexor2_x0 i0=$abc$109383$new_n55447_ i1=$abc$109383$new_n55446_ nq=$abc$109383$new_n55448_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55448_ i2=$abc$109383$new_n55445_ nq=$abc$109383$new_n55449_
+.subckt or21nand_x1 i0=$abc$109383$new_n29721_ i1=$abc$109383$new_n54046_ i2=$abc$109383$new_n55162_ nq=$abc$109383$new_n55450_
 .subckt nand2_x0 i0=$abc$109383$new_n55450_ i1=$abc$109383$new_n29724_ nq=$abc$109383$new_n55451_
-.subckt ao22_x2 i0=$abc$109383$new_n55450_ i1=$abc$109383$new_n29724_ i2=$abc$109383$new_n55140_ q=$abc$109383$new_n55452_
+.subckt and21nor_x1 i0=$abc$109383$new_n55450_ i1=$abc$109383$new_n29724_ i2=$abc$109383$new_n55140_ nq=$abc$109383$new_n55452_
 .subckt nand2_x0 i0=$abc$109383$new_n55452_ i1=$abc$109383$new_n55451_ nq=$abc$109383$new_n55453_
 .subckt nand2_x0 i0=$abc$109383$new_n55453_ i1=$abc$109383$new_n55449_ nq=$abc$109383$new_n55454_
-.subckt ao22_x2 i0=$abc$109383$new_n55146_ i1=$abc$109383$new_n55454_ i2=$abc$109383$new_n55443_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105290
+.subckt and21nor_x1 i0=$abc$109383$new_n55146_ i1=$abc$109383$new_n55454_ i2=$abc$109383$new_n55443_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105290
 .subckt nand3_x0 i0=$abc$109383$new_n55256_ i1=soc.cpu.minerva.divider.quotient[23] i2=$abc$109383$new_n55156_ nq=$abc$109383$new_n55456_
-.subckt a3_x2 i0=$abc$109383$new_n55456_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55457_
+.subckt and3_x1 i0=$abc$109383$new_n55456_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55457_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[24] nq=$abc$109383$new_n55458_
-.subckt a3_x2 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55446_ i2=$abc$109383$new_n55432_ q=$abc$109383$new_n55459_
-.subckt nxr2_x1 i0=$abc$109383$new_n55459_ i1=$abc$109383$new_n55458_ nq=$abc$109383$new_n55460_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55460_ i2=$abc$109383$new_n55457_ q=$abc$109383$new_n55461_
+.subckt and3_x1 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55446_ i2=$abc$109383$new_n55432_ q=$abc$109383$new_n55459_
+.subckt nexor2_x0 i0=$abc$109383$new_n55459_ i1=$abc$109383$new_n55458_ nq=$abc$109383$new_n55460_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55460_ i2=$abc$109383$new_n55457_ nq=$abc$109383$new_n55461_
 .subckt nand3_x0 i0=$abc$109383$new_n54046_ i1=$abc$109383$new_n29724_ i2=$abc$109383$new_n29721_ nq=$abc$109383$new_n55462_
-.subckt a2_x2 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55462_ q=$abc$109383$new_n55463_
-.subckt nxr2_x1 i0=$abc$109383$new_n55463_ i1=$abc$109383$new_n29365_ nq=$abc$109383$new_n55464_
-.subckt oa22_x2 i0=$abc$109383$new_n55464_ i1=$abc$109383$new_n54038_ i2=$abc$109383$new_n55129_ q=$abc$109383$new_n55465_
+.subckt and2_x1 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55462_ q=$abc$109383$new_n55463_
+.subckt nexor2_x0 i0=$abc$109383$new_n55463_ i1=$abc$109383$new_n29365_ nq=$abc$109383$new_n55464_
+.subckt or21nand_x1 i0=$abc$109383$new_n55464_ i1=$abc$109383$new_n54038_ i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55465_
 .subckt nand2_x0 i0=$abc$109383$new_n55465_ i1=$abc$109383$new_n55461_ nq=$abc$109383$new_n55466_
-.subckt ao22_x2 i0=$abc$109383$new_n55127_ i1=soc.cpu.minerva.divider.quotient[24] i2=$abc$109383$new_n31806_ q=$abc$109383$new_n55467_
-.subckt a2_x2 i0=$abc$109383$new_n55467_ i1=$abc$109383$new_n55466_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105294
-.subckt ao22_x2 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[25] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55469_
+.subckt and21nor_x1 i0=$abc$109383$new_n55127_ i1=soc.cpu.minerva.divider.quotient[24] i2=$abc$109383$new_n31806_ nq=$abc$109383$new_n55467_
+.subckt and2_x1 i0=$abc$109383$new_n55467_ i1=$abc$109383$new_n55466_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105294
+.subckt and21nor_x1 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[25] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55469_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[24] i2=$abc$109383$new_n55156_ nq=$abc$109383$new_n55470_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[25] nq=$abc$109383$new_n55471_
-.subckt a4_x2 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55458_ i2=$abc$109383$new_n55446_ i3=$abc$109383$new_n55432_ q=$abc$109383$new_n55472_
-.subckt nxr2_x1 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55471_ nq=$abc$109383$new_n55473_
-.subckt ao22_x2 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55473_ i2=$abc$109383$new_n55470_ q=$abc$109383$new_n55474_
+.subckt and4_x1 i0=$abc$109383$new_n55433_ i1=$abc$109383$new_n55458_ i2=$abc$109383$new_n55446_ i3=$abc$109383$new_n55432_ q=$abc$109383$new_n55472_
+.subckt nexor2_x0 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55471_ nq=$abc$109383$new_n55473_
+.subckt and21nor_x1 i0=$abc$109383$new_n55303_ i1=$abc$109383$new_n55473_ i2=$abc$109383$new_n55470_ nq=$abc$109383$new_n55474_
 .subckt nand2_x0 i0=$abc$109383$new_n55474_ i1=$abc$109383$new_n55127_ nq=$abc$109383$new_n55475_
 .subckt buf_x4 i=$abc$109383$new_n54024_ q=$abc$109383$new_n55476_
 .subckt buf_x4 i=$abc$109383$new_n52317_ q=$abc$109383$new_n55477_
-.subckt a3_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ q=$abc$109383$new_n55478_
+.subckt and3_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ q=$abc$109383$new_n55478_
 .subckt nand4_x0 i0=$abc$109383$new_n54046_ i1=$abc$109383$new_n29732_ i2=$abc$109383$new_n29724_ i3=$abc$109383$new_n29721_ nq=$abc$109383$new_n55479_
-.subckt a2_x2 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55479_ q=$abc$109383$new_n55480_
-.subckt nxr2_x1 i0=$abc$109383$new_n55480_ i1=$abc$109383$new_n29735_ nq=$abc$109383$new_n55481_
-.subckt ao22_x2 i0=$abc$109383$new_n55481_ i1=$abc$109383$new_n55478_ i2=$abc$109383$new_n55173_ q=$abc$109383$new_n55482_
-.subckt ao22_x2 i0=$abc$109383$new_n55482_ i1=$abc$109383$new_n55475_ i2=$abc$109383$new_n55469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105298
-.subckt ao22_x2 i0=$abc$109383$new_n29342_ i1=$abc$109383$new_n55479_ i2=$abc$109383$new_n55177_ q=$abc$109383$new_n55484_
-.subckt nxr2_x1 i0=$abc$109383$new_n55484_ i1=$abc$109383$new_n29739_ nq=$abc$109383$new_n55485_
+.subckt and2_x1 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55479_ q=$abc$109383$new_n55480_
+.subckt nexor2_x0 i0=$abc$109383$new_n55480_ i1=$abc$109383$new_n29735_ nq=$abc$109383$new_n55481_
+.subckt and21nor_x1 i0=$abc$109383$new_n55481_ i1=$abc$109383$new_n55478_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55482_
+.subckt and21nor_x1 i0=$abc$109383$new_n55482_ i1=$abc$109383$new_n55475_ i2=$abc$109383$new_n55469_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105298
+.subckt and21nor_x1 i0=$abc$109383$new_n29342_ i1=$abc$109383$new_n55479_ i2=$abc$109383$new_n55177_ nq=$abc$109383$new_n55484_
+.subckt nexor2_x0 i0=$abc$109383$new_n55484_ i1=$abc$109383$new_n29739_ nq=$abc$109383$new_n55485_
 .subckt nand2_x0 i0=$abc$109383$new_n55485_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55486_
-.subckt a2_x2 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55471_ q=$abc$109383$new_n55487_
-.subckt nxr2_x1 i0=$abc$109383$new_n55487_ i1=soc.cpu.minerva.divider.quotient[26] nq=$abc$109383$new_n55488_
+.subckt and2_x1 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55471_ q=$abc$109383$new_n55487_
+.subckt nexor2_x0 i0=$abc$109383$new_n55487_ i1=soc.cpu.minerva.divider.quotient[26] nq=$abc$109383$new_n55488_
 .subckt nand2_x0 i0=$abc$109383$new_n55488_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55489_
 .subckt nand4_x0 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n55140_ nq=$abc$109383$new_n55490_
 .subckt nand3_x0 i0=$abc$109383$new_n55256_ i1=soc.cpu.minerva.divider.quotient[25] i2=$abc$109383$new_n55156_ nq=$abc$109383$new_n55491_
-.subckt a3_x2 i0=$abc$109383$new_n55491_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55492_
-.subckt a2_x2 i0=$abc$109383$new_n55492_ i1=$abc$109383$new_n55490_ q=$abc$109383$new_n55493_
+.subckt and3_x1 i0=$abc$109383$new_n55491_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55492_
+.subckt and2_x1 i0=$abc$109383$new_n55492_ i1=$abc$109383$new_n55490_ q=$abc$109383$new_n55493_
 .subckt nand3_x0 i0=$abc$109383$new_n55493_ i1=$abc$109383$new_n55489_ i2=$abc$109383$new_n55486_ nq=$abc$109383$new_n55494_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n55495_
-.subckt ao22_x2 i0=$abc$109383$new_n55127_ i1=soc.cpu.minerva.divider.quotient[26] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n55496_
-.subckt a2_x2 i0=$abc$109383$new_n55496_ i1=$abc$109383$new_n55494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105302
+.subckt and21nor_x1 i0=$abc$109383$new_n55127_ i1=soc.cpu.minerva.divider.quotient[26] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n55496_
+.subckt and2_x1 i0=$abc$109383$new_n55496_ i1=$abc$109383$new_n55494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105302
 .subckt nand3_x0 i0=$abc$109383$new_n54047_ i1=$abc$109383$new_n29739_ i2=$abc$109383$new_n29735_ nq=$abc$109383$new_n55498_
-.subckt a2_x2 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55498_ q=$abc$109383$new_n55499_
-.subckt nxr2_x1 i0=$abc$109383$new_n55499_ i1=$abc$109383$new_n29742_ nq=$abc$109383$new_n55500_
+.subckt and2_x1 i0=$abc$109383$new_n55175_ i1=$abc$109383$new_n55498_ q=$abc$109383$new_n55499_
+.subckt nexor2_x0 i0=$abc$109383$new_n55499_ i1=$abc$109383$new_n29742_ nq=$abc$109383$new_n55500_
 .subckt nand2_x0 i0=$abc$109383$new_n55500_ i1=$abc$109383$new_n55205_ nq=$abc$109383$new_n55501_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[26] nq=$abc$109383$new_n55502_
-.subckt a3_x2 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55502_ i2=$abc$109383$new_n55471_ q=$abc$109383$new_n55503_
-.subckt nxr2_x1 i0=$abc$109383$new_n55503_ i1=soc.cpu.minerva.divider.quotient[27] nq=$abc$109383$new_n55504_
+.subckt and3_x1 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55502_ i2=$abc$109383$new_n55471_ q=$abc$109383$new_n55503_
+.subckt nexor2_x0 i0=$abc$109383$new_n55503_ i1=soc.cpu.minerva.divider.quotient[27] nq=$abc$109383$new_n55504_
 .subckt nand2_x0 i0=$abc$109383$new_n55504_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55505_
 .subckt nand3_x0 i0=$abc$109383$new_n55256_ i1=soc.cpu.minerva.divider.quotient[26] i2=$abc$109383$new_n55156_ nq=$abc$109383$new_n55506_
-.subckt a3_x2 i0=$abc$109383$new_n55506_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55507_
-.subckt a2_x2 i0=$abc$109383$new_n55507_ i1=$abc$109383$new_n55490_ q=$abc$109383$new_n55508_
+.subckt and3_x1 i0=$abc$109383$new_n55506_ i1=$abc$109383$new_n55197_ i2=$abc$109383$new_n55195_ q=$abc$109383$new_n55507_
+.subckt and2_x1 i0=$abc$109383$new_n55507_ i1=$abc$109383$new_n55490_ q=$abc$109383$new_n55508_
 .subckt nand3_x0 i0=$abc$109383$new_n55508_ i1=$abc$109383$new_n55505_ i2=$abc$109383$new_n55501_ nq=$abc$109383$new_n55509_
-.subckt ao22_x2 i0=$abc$109383$new_n55124_ i1=soc.cpu.minerva.divider.quotient[27] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n55510_
-.subckt a2_x2 i0=$abc$109383$new_n55510_ i1=$abc$109383$new_n55509_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105306
+.subckt and21nor_x1 i0=$abc$109383$new_n55124_ i1=soc.cpu.minerva.divider.quotient[27] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n55510_
+.subckt and2_x1 i0=$abc$109383$new_n55510_ i1=$abc$109383$new_n55509_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105306
 .subckt nand4_x0 i0=$abc$109383$new_n54047_ i1=$abc$109383$new_n29742_ i2=$abc$109383$new_n29739_ i3=$abc$109383$new_n29735_ nq=$abc$109383$new_n55512_
-.subckt a2_x2 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55512_ q=$abc$109383$new_n55513_
-.subckt nxr2_x1 i0=$abc$109383$new_n55513_ i1=$abc$109383$new_n29433_ nq=$abc$109383$new_n55514_
-.subckt oa22_x2 i0=$abc$109383$new_n55514_ i1=$abc$109383$new_n54038_ i2=$abc$109383$new_n55129_ q=$abc$109383$new_n55515_
+.subckt and2_x1 i0=$abc$109383$new_n55159_ i1=$abc$109383$new_n55512_ q=$abc$109383$new_n55513_
+.subckt nexor2_x0 i0=$abc$109383$new_n55513_ i1=$abc$109383$new_n29433_ nq=$abc$109383$new_n55514_
+.subckt or21nand_x1 i0=$abc$109383$new_n55514_ i1=$abc$109383$new_n54038_ i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55515_
 .subckt nand3_x0 i0=$abc$109383$new_n55256_ i1=soc.cpu.minerva.divider.quotient[27] i2=$abc$109383$new_n55156_ nq=$abc$109383$new_n55516_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[28] nq=$abc$109383$new_n55517_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[27] nq=$abc$109383$new_n55518_
-.subckt a4_x2 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55518_ i2=$abc$109383$new_n55502_ i3=$abc$109383$new_n55471_ q=$abc$109383$new_n55519_
-.subckt nxr2_x1 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55517_ nq=$abc$109383$new_n55520_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55520_ i2=$abc$109383$new_n55516_ q=$abc$109383$new_n55521_
-.subckt a2_x2 i0=$abc$109383$new_n55521_ i1=$abc$109383$new_n55127_ q=$abc$109383$new_n55522_
-.subckt a2_x2 i0=$abc$109383$new_n55522_ i1=$abc$109383$new_n55515_ q=$abc$109383$new_n55523_
-.subckt a2_x2 i0=$abc$109383$new_n55117_ i1=$abc$109383$new_n54068_ q=$abc$109383$new_n55524_
+.subckt and4_x1 i0=$abc$109383$new_n55472_ i1=$abc$109383$new_n55518_ i2=$abc$109383$new_n55502_ i3=$abc$109383$new_n55471_ q=$abc$109383$new_n55519_
+.subckt nexor2_x0 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55517_ nq=$abc$109383$new_n55520_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55520_ i2=$abc$109383$new_n55516_ nq=$abc$109383$new_n55521_
+.subckt and2_x1 i0=$abc$109383$new_n55521_ i1=$abc$109383$new_n55127_ q=$abc$109383$new_n55522_
+.subckt and2_x1 i0=$abc$109383$new_n55522_ i1=$abc$109383$new_n55515_ q=$abc$109383$new_n55523_
+.subckt and2_x1 i0=$abc$109383$new_n55117_ i1=$abc$109383$new_n54068_ q=$abc$109383$new_n55524_
 .subckt buf_x4 i=$abc$109383$new_n55524_ q=$abc$109383$new_n55525_
-.subckt oa22_x2 i0=$abc$109383$new_n55116_ i1=$abc$109383$new_n55134_ i2=$abc$109383$new_n55525_ q=$abc$109383$new_n55526_
-.subckt oa22_x2 i0=$abc$109383$new_n55526_ i1=$abc$109383$new_n55517_ i2=$abc$109383$new_n27421_ q=$abc$109383$new_n55527_
+.subckt or21nand_x1 i0=$abc$109383$new_n55116_ i1=$abc$109383$new_n55134_ i2=$abc$109383$new_n55525_ nq=$abc$109383$new_n55526_
+.subckt or21nand_x1 i0=$abc$109383$new_n55526_ i1=$abc$109383$new_n55517_ i2=$abc$109383$new_n27421_ nq=$abc$109383$new_n55527_
 .subckt nor2_x0 i0=$abc$109383$new_n55527_ i1=$abc$109383$new_n55523_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105310
-.subckt ao22_x2 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[29] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55529_
+.subckt and21nor_x1 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[29] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55529_
 .subckt nand3_x0 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[28] i2=$abc$109383$new_n55156_ nq=$abc$109383$new_n55530_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[29] nq=$abc$109383$new_n55531_
-.subckt a2_x2 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55517_ q=$abc$109383$new_n55532_
-.subckt nxr2_x1 i0=$abc$109383$new_n55532_ i1=$abc$109383$new_n55531_ nq=$abc$109383$new_n55533_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55533_ i2=$abc$109383$new_n55530_ q=$abc$109383$new_n55534_
+.subckt and2_x1 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55517_ q=$abc$109383$new_n55532_
+.subckt nexor2_x0 i0=$abc$109383$new_n55532_ i1=$abc$109383$new_n55531_ nq=$abc$109383$new_n55533_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55533_ i2=$abc$109383$new_n55530_ nq=$abc$109383$new_n55534_
 .subckt nand2_x0 i0=$abc$109383$new_n55534_ i1=$abc$109383$new_n55127_ nq=$abc$109383$new_n55535_
-.subckt ao22_x2 i0=$abc$109383$new_n29433_ i1=$abc$109383$new_n55512_ i2=$abc$109383$new_n55158_ q=$abc$109383$new_n55536_
-.subckt nxr2_x1 i0=$abc$109383$new_n55536_ i1=$abc$109383$new_n29750_ nq=$abc$109383$new_n55537_
-.subckt ao22_x2 i0=$abc$109383$new_n55537_ i1=$abc$109383$new_n55478_ i2=$abc$109383$new_n55173_ q=$abc$109383$new_n55538_
-.subckt ao22_x2 i0=$abc$109383$new_n55538_ i1=$abc$109383$new_n55535_ i2=$abc$109383$new_n55529_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105314
-.subckt ao22_x2 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[30] i2=$abc$109383$new_n55376_ q=$abc$109383$new_n55540_
+.subckt and21nor_x1 i0=$abc$109383$new_n29433_ i1=$abc$109383$new_n55512_ i2=$abc$109383$new_n55158_ nq=$abc$109383$new_n55536_
+.subckt nexor2_x0 i0=$abc$109383$new_n55536_ i1=$abc$109383$new_n29750_ nq=$abc$109383$new_n55537_
+.subckt and21nor_x1 i0=$abc$109383$new_n55537_ i1=$abc$109383$new_n55478_ i2=$abc$109383$new_n55173_ nq=$abc$109383$new_n55538_
+.subckt and21nor_x1 i0=$abc$109383$new_n55538_ i1=$abc$109383$new_n55535_ i2=$abc$109383$new_n55529_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105314
+.subckt and21nor_x1 i0=$abc$109383$new_n55429_ i1=soc.cpu.minerva.divider.quotient[30] i2=$abc$109383$new_n55376_ nq=$abc$109383$new_n55540_
 .subckt nand3_x0 i0=$abc$109383$new_n54048_ i1=$abc$109383$new_n29750_ i2=$abc$109383$new_n29747_ nq=$abc$109383$new_n55541_
-.subckt a2_x2 i0=$abc$109383$new_n55541_ i1=$abc$109383$new_n55159_ q=$abc$109383$new_n55542_
-.subckt nxr2_x1 i0=$abc$109383$new_n55542_ i1=$abc$109383$new_n29463_ nq=$abc$109383$new_n55543_
-.subckt oa22_x2 i0=$abc$109383$new_n55543_ i1=$abc$109383$new_n54038_ i2=$abc$109383$new_n55129_ q=$abc$109383$new_n55544_
+.subckt and2_x1 i0=$abc$109383$new_n55541_ i1=$abc$109383$new_n55159_ q=$abc$109383$new_n55542_
+.subckt nexor2_x0 i0=$abc$109383$new_n55542_ i1=$abc$109383$new_n29463_ nq=$abc$109383$new_n55543_
+.subckt or21nand_x1 i0=$abc$109383$new_n55543_ i1=$abc$109383$new_n54038_ i2=$abc$109383$new_n55129_ nq=$abc$109383$new_n55544_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[30] nq=$abc$109383$new_n55545_
-.subckt a3_x2 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55531_ i2=$abc$109383$new_n55517_ q=$abc$109383$new_n55546_
-.subckt nxr2_x1 i0=$abc$109383$new_n55546_ i1=$abc$109383$new_n55545_ nq=$abc$109383$new_n55547_
-.subckt ao22_x2 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55547_ i2=$abc$109383$new_n55429_ q=$abc$109383$new_n55548_
+.subckt and3_x1 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55531_ i2=$abc$109383$new_n55517_ q=$abc$109383$new_n55546_
+.subckt nexor2_x0 i0=$abc$109383$new_n55546_ i1=$abc$109383$new_n55545_ nq=$abc$109383$new_n55547_
+.subckt and21nor_x1 i0=$abc$109383$new_n55242_ i1=$abc$109383$new_n55547_ i2=$abc$109383$new_n55429_ nq=$abc$109383$new_n55548_
 .subckt nand2_x0 i0=$abc$109383$new_n55548_ i1=$abc$109383$new_n55544_ nq=$abc$109383$new_n55549_
-.subckt a3_x2 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[29] i2=$abc$109383$new_n55129_ q=$abc$109383$new_n55550_
-.subckt ao22_x2 i0=$abc$109383$new_n55550_ i1=$abc$109383$new_n55549_ i2=$abc$109383$new_n55540_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105318
-.subckt a4_x2 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55545_ i2=$abc$109383$new_n55531_ i3=$abc$109383$new_n55517_ q=$abc$109383$new_n55552_
-.subckt nxr2_x1 i0=$abc$109383$new_n55552_ i1=soc.cpu.minerva.divider.quotient[31] nq=$abc$109383$new_n55553_
+.subckt and3_x1 i0=$abc$109383$new_n55131_ i1=soc.cpu.minerva.divider.quotient[29] i2=$abc$109383$new_n55129_ q=$abc$109383$new_n55550_
+.subckt and21nor_x1 i0=$abc$109383$new_n55550_ i1=$abc$109383$new_n55549_ i2=$abc$109383$new_n55540_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105318
+.subckt and4_x1 i0=$abc$109383$new_n55519_ i1=$abc$109383$new_n55545_ i2=$abc$109383$new_n55531_ i3=$abc$109383$new_n55517_ q=$abc$109383$new_n55552_
+.subckt nexor2_x0 i0=$abc$109383$new_n55552_ i1=soc.cpu.minerva.divider.quotient[31] nq=$abc$109383$new_n55553_
 .subckt nand2_x0 i0=$abc$109383$new_n55553_ i1=$abc$109383$new_n55134_ nq=$abc$109383$new_n55554_
 .subckt nand3_x0 i0=$abc$109383$new_n55130_ i1=soc.cpu.minerva.divider.quotient[30] i2=$abc$109383$new_n55128_ nq=$abc$109383$new_n55555_
-.subckt a3_x2 i0=$abc$109383$new_n55555_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55556_
-.subckt a2_x2 i0=$abc$109383$new_n55556_ i1=$abc$109383$new_n55490_ q=$abc$109383$new_n55557_
+.subckt and3_x1 i0=$abc$109383$new_n55555_ i1=$abc$109383$new_n55196_ i2=$abc$109383$new_n55120_ q=$abc$109383$new_n55556_
+.subckt and2_x1 i0=$abc$109383$new_n55556_ i1=$abc$109383$new_n55490_ q=$abc$109383$new_n55557_
 .subckt nand2_x0 i0=$abc$109383$new_n29492_ i1=$abc$109383$new_n55173_ nq=$abc$109383$new_n55558_
-.subckt a2_x2 i0=$abc$109383$new_n52335_ i1=$abc$109383$new_n55110_ q=$abc$109383$new_n55559_
+.subckt and2_x1 i0=$abc$109383$new_n52335_ i1=$abc$109383$new_n55110_ q=$abc$109383$new_n55559_
 .subckt nand4_x0 i0=$abc$109383$new_n54048_ i1=$abc$109383$new_n29754_ i2=$abc$109383$new_n29750_ i3=$abc$109383$new_n29747_ nq=$abc$109383$new_n55560_
-.subckt a2_x2 i0=$abc$109383$new_n55560_ i1=$abc$109383$new_n55559_ q=$abc$109383$new_n55561_
-.subckt ao22_x2 i0=$abc$109383$new_n55561_ i1=$abc$109383$new_n55558_ i2=$abc$109383$new_n55557_ q=$abc$109383$new_n55562_
+.subckt and2_x1 i0=$abc$109383$new_n55560_ i1=$abc$109383$new_n55559_ q=$abc$109383$new_n55561_
+.subckt and21nor_x1 i0=$abc$109383$new_n55561_ i1=$abc$109383$new_n55558_ i2=$abc$109383$new_n55557_ nq=$abc$109383$new_n55562_
 .subckt nand2_x0 i0=$abc$109383$new_n55562_ i1=$abc$109383$new_n55554_ nq=$abc$109383$new_n55563_
-.subckt ao22_x2 i0=$abc$109383$new_n55124_ i1=soc.cpu.minerva.divider.quotient[31] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n55564_
-.subckt a2_x2 i0=$abc$109383$new_n55564_ i1=$abc$109383$new_n55563_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105322
-.subckt a2_x2 i0=$abc$109383$new_n55133_ i1=$abc$109383$new_n55116_ q=$abc$109383$new_n55566_
+.subckt and21nor_x1 i0=$abc$109383$new_n55124_ i1=soc.cpu.minerva.divider.quotient[31] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n55564_
+.subckt and2_x1 i0=$abc$109383$new_n55564_ i1=$abc$109383$new_n55563_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105322
+.subckt and2_x1 i0=$abc$109383$new_n55133_ i1=$abc$109383$new_n55116_ q=$abc$109383$new_n55566_
 .subckt buf_x4 i=$abc$109383$new_n55566_ q=$abc$109383$new_n55567_
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[1] q=$abc$109383$new_n55568_
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[1] nq=$abc$109383$new_n55568_
 .subckt buf_x4 i=$abc$109383$new_n54058_ q=$abc$109383$new_n55569_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[31] nq=$abc$109383$new_n55570_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[30] i1=$abc$109383$new_n55570_ q=$abc$109383$new_n55571_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[30] i1=$abc$109383$new_n55570_ q=$abc$109383$new_n55571_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[30] nq=$abc$109383$new_n55572_
 .subckt nand2_x0 i0=$abc$109383$new_n55572_ i1=soc.cpu.minerva.divider.divisor[31] nq=$abc$109383$new_n55573_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[30] nq=$abc$109383$new_n55574_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[29] i1=$abc$109383$new_n55574_ q=$abc$109383$new_n55575_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[29] i1=soc.cpu.minerva.divider.divisor[30] nq=$abc$109383$new_n55576_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[29] i1=$abc$109383$new_n55574_ q=$abc$109383$new_n55575_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[29] i1=soc.cpu.minerva.divider.divisor[30] nq=$abc$109383$new_n55576_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[29] nq=$abc$109383$new_n55577_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[28] i1=$abc$109383$new_n55577_ q=$abc$109383$new_n55578_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[28] i1=$abc$109383$new_n55577_ q=$abc$109383$new_n55578_
 .subckt inv_x1 i=soc.cpu.minerva.divider.remainder[28] nq=$abc$109383$new_n55579_
 .subckt nand2_x0 i0=$abc$109383$new_n55579_ i1=soc.cpu.minerva.divider.divisor[29] nq=$abc$109383$new_n55580_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[28] nq=$abc$109383$new_n55581_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[27] i1=$abc$109383$new_n55581_ q=$abc$109383$new_n55582_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[27] i1=soc.cpu.minerva.divider.divisor[28] nq=$abc$109383$new_n55583_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[27] i1=$abc$109383$new_n55581_ q=$abc$109383$new_n55582_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[27] i1=soc.cpu.minerva.divider.divisor[28] nq=$abc$109383$new_n55583_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[27] nq=$abc$109383$new_n55584_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[26] i1=$abc$109383$new_n55584_ q=$abc$109383$new_n55585_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[26] i1=$abc$109383$new_n55584_ q=$abc$109383$new_n55585_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[26] nq=$abc$109383$new_n55586_
 .subckt nand2_x0 i0=$abc$109383$new_n55586_ i1=soc.cpu.minerva.divider.divisor[27] nq=$abc$109383$new_n55587_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[26] nq=$abc$109383$new_n55588_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[25] i1=$abc$109383$new_n55588_ q=$abc$109383$new_n55589_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[25] i1=soc.cpu.minerva.divider.divisor[26] nq=$abc$109383$new_n55590_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[25] i1=$abc$109383$new_n55588_ q=$abc$109383$new_n55589_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[25] i1=soc.cpu.minerva.divider.divisor[26] nq=$abc$109383$new_n55590_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[25] nq=$abc$109383$new_n55591_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[24] i1=$abc$109383$new_n55591_ q=$abc$109383$new_n55592_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[24] i1=$abc$109383$new_n55591_ q=$abc$109383$new_n55592_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[24] nq=$abc$109383$new_n55593_
 .subckt nand2_x0 i0=$abc$109383$new_n55593_ i1=soc.cpu.minerva.divider.divisor[25] nq=$abc$109383$new_n55594_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[24] nq=$abc$109383$new_n55595_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[23] i1=$abc$109383$new_n55595_ q=$abc$109383$new_n55596_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[23] i1=soc.cpu.minerva.divider.divisor[24] nq=$abc$109383$new_n55597_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[23] i1=$abc$109383$new_n55595_ q=$abc$109383$new_n55596_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[23] i1=soc.cpu.minerva.divider.divisor[24] nq=$abc$109383$new_n55597_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[23] nq=$abc$109383$new_n55598_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[22] i1=$abc$109383$new_n55598_ q=$abc$109383$new_n55599_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[22] i1=$abc$109383$new_n55598_ q=$abc$109383$new_n55599_
 .subckt inv_x1 i=soc.cpu.minerva.divider.remainder[22] nq=$abc$109383$new_n55600_
 .subckt nand2_x0 i0=$abc$109383$new_n55600_ i1=soc.cpu.minerva.divider.divisor[23] nq=$abc$109383$new_n55601_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[22] nq=$abc$109383$new_n55602_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[21] i1=$abc$109383$new_n55602_ q=$abc$109383$new_n55603_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[21] i1=soc.cpu.minerva.divider.divisor[22] nq=$abc$109383$new_n55604_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[21] i1=$abc$109383$new_n55602_ q=$abc$109383$new_n55603_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[21] i1=soc.cpu.minerva.divider.divisor[22] nq=$abc$109383$new_n55604_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[21] nq=$abc$109383$new_n55605_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[20] i1=$abc$109383$new_n55605_ q=$abc$109383$new_n55606_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[20] i1=$abc$109383$new_n55605_ q=$abc$109383$new_n55606_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[20] nq=$abc$109383$new_n55607_
 .subckt nand2_x0 i0=$abc$109383$new_n55607_ i1=soc.cpu.minerva.divider.divisor[21] nq=$abc$109383$new_n55608_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[20] nq=$abc$109383$new_n55609_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[19] i1=$abc$109383$new_n55609_ q=$abc$109383$new_n55610_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[19] i1=soc.cpu.minerva.divider.divisor[20] nq=$abc$109383$new_n55611_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[19] i1=$abc$109383$new_n55609_ q=$abc$109383$new_n55610_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[19] i1=soc.cpu.minerva.divider.divisor[20] nq=$abc$109383$new_n55611_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[18] nq=$abc$109383$new_n55612_
 .subckt nand2_x0 i0=$abc$109383$new_n55612_ i1=soc.cpu.minerva.divider.divisor[19] nq=$abc$109383$new_n55613_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[19] nq=$abc$109383$new_n55614_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[18] i1=$abc$109383$new_n55614_ nq=$abc$109383$new_n55615_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[18] nq=$abc$109383$new_n55616_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[17] i1=$abc$109383$new_n55616_ nq=$abc$109383$new_n55617_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[17] i1=soc.cpu.minerva.divider.divisor[18] nq=$abc$109383$new_n55618_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[17] i1=soc.cpu.minerva.divider.divisor[18] nq=$abc$109383$new_n55618_
 .subckt inv_x1 i=soc.cpu.minerva.divider.remainder[16] nq=$abc$109383$new_n55619_
 .subckt nand2_x0 i0=$abc$109383$new_n55619_ i1=soc.cpu.minerva.divider.divisor[17] nq=$abc$109383$new_n55620_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[17] nq=$abc$109383$new_n55621_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[16] i1=$abc$109383$new_n55621_ nq=$abc$109383$new_n55622_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[16] nq=$abc$109383$new_n55623_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[15] i1=$abc$109383$new_n55623_ nq=$abc$109383$new_n55624_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[15] i1=soc.cpu.minerva.divider.divisor[16] nq=$abc$109383$new_n55625_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[15] i1=soc.cpu.minerva.divider.divisor[16] nq=$abc$109383$new_n55625_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[14] nq=$abc$109383$new_n55626_
 .subckt nand2_x0 i0=$abc$109383$new_n55626_ i1=soc.cpu.minerva.divider.divisor[15] nq=$abc$109383$new_n55627_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[15] nq=$abc$109383$new_n55628_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[14] i1=$abc$109383$new_n55628_ nq=$abc$109383$new_n55629_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[14] nq=$abc$109383$new_n55630_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[13] i1=$abc$109383$new_n55630_ nq=$abc$109383$new_n55631_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[13] i1=soc.cpu.minerva.divider.divisor[14] nq=$abc$109383$new_n55632_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[13] i1=soc.cpu.minerva.divider.divisor[14] nq=$abc$109383$new_n55632_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[12] nq=$abc$109383$new_n55633_
 .subckt nand2_x0 i0=$abc$109383$new_n55633_ i1=soc.cpu.minerva.divider.divisor[13] nq=$abc$109383$new_n55634_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[13] nq=$abc$109383$new_n55635_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[12] i1=$abc$109383$new_n55635_ nq=$abc$109383$new_n55636_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[12] nq=$abc$109383$new_n55637_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[11] i1=$abc$109383$new_n55637_ nq=$abc$109383$new_n55638_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[11] i1=soc.cpu.minerva.divider.divisor[12] nq=$abc$109383$new_n55639_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[11] i1=soc.cpu.minerva.divider.divisor[12] nq=$abc$109383$new_n55639_
 .subckt inv_x1 i=soc.cpu.minerva.divider.remainder[10] nq=$abc$109383$new_n55640_
 .subckt nand2_x0 i0=$abc$109383$new_n55640_ i1=soc.cpu.minerva.divider.divisor[11] nq=$abc$109383$new_n55641_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[11] nq=$abc$109383$new_n55642_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[10] i1=$abc$109383$new_n55642_ nq=$abc$109383$new_n55643_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[10] nq=$abc$109383$new_n55644_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[9] i1=$abc$109383$new_n55644_ nq=$abc$109383$new_n55645_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[9] i1=soc.cpu.minerva.divider.divisor[10] nq=$abc$109383$new_n55646_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[9] i1=soc.cpu.minerva.divider.divisor[10] nq=$abc$109383$new_n55646_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[8] nq=$abc$109383$new_n55647_
 .subckt nand2_x0 i0=$abc$109383$new_n55647_ i1=soc.cpu.minerva.divider.divisor[9] nq=$abc$109383$new_n55648_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[9] nq=$abc$109383$new_n55649_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[8] i1=$abc$109383$new_n55649_ nq=$abc$109383$new_n55650_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[8] nq=$abc$109383$new_n55651_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[7] i1=$abc$109383$new_n55651_ nq=$abc$109383$new_n55652_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[7] i1=soc.cpu.minerva.divider.divisor[8] nq=$abc$109383$new_n55653_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[7] i1=soc.cpu.minerva.divider.divisor[8] nq=$abc$109383$new_n55653_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[6] nq=$abc$109383$new_n55654_
 .subckt nand2_x0 i0=$abc$109383$new_n55654_ i1=soc.cpu.minerva.divider.divisor[7] nq=$abc$109383$new_n55655_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[7] nq=$abc$109383$new_n55656_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[6] i1=$abc$109383$new_n55656_ nq=$abc$109383$new_n55657_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[6] nq=$abc$109383$new_n55658_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[5] i1=$abc$109383$new_n55658_ nq=$abc$109383$new_n55659_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[5] i1=soc.cpu.minerva.divider.divisor[6] nq=$abc$109383$new_n55660_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[5] i1=soc.cpu.minerva.divider.divisor[6] nq=$abc$109383$new_n55660_
 .subckt inv_x1 i=soc.cpu.minerva.divider.remainder[4] nq=$abc$109383$new_n55661_
 .subckt nand2_x0 i0=$abc$109383$new_n55661_ i1=soc.cpu.minerva.divider.divisor[5] nq=$abc$109383$new_n55662_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[5] nq=$abc$109383$new_n55663_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[4] i1=$abc$109383$new_n55663_ nq=$abc$109383$new_n55664_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[4] nq=$abc$109383$new_n55665_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[3] i1=$abc$109383$new_n55665_ nq=$abc$109383$new_n55666_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.remainder[3] i1=soc.cpu.minerva.divider.divisor[4] q=$abc$109383$new_n55667_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.remainder[3] i1=soc.cpu.minerva.divider.divisor[4] q=$abc$109383$new_n55667_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[3] nq=$abc$109383$new_n55668_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[2] i1=$abc$109383$new_n55668_ nq=$abc$109383$new_n55669_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.remainder[2] i1=soc.cpu.minerva.divider.divisor[3] q=$abc$109383$new_n55670_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.remainder[1] i1=soc.cpu.minerva.divider.divisor[2] q=$abc$109383$new_n55671_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.remainder[2] i1=soc.cpu.minerva.divider.divisor[3] q=$abc$109383$new_n55670_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.remainder[1] i1=soc.cpu.minerva.divider.divisor[2] q=$abc$109383$new_n55671_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[1] nq=$abc$109383$new_n55672_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[0] i1=$abc$109383$new_n55672_ nq=$abc$109383$new_n55673_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.divisor[1] q=$abc$109383$new_n55674_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.divisor[1] q=$abc$109383$new_n55674_
 .subckt inv_x0 i=soc.cpu.minerva.divider.quotient[31] nq=$abc$109383$new_n55675_
-.subckt oa22_x2 i0=$abc$109383$new_n55675_ i1=soc.cpu.minerva.divider.divisor[0] i2=$abc$109383$new_n55674_ q=$abc$109383$new_n55676_
-.subckt oa22_x2 i0=$abc$109383$new_n55676_ i1=$abc$109383$new_n55673_ i2=$abc$109383$new_n55671_ q=$abc$109383$new_n55677_
+.subckt or21nand_x1 i0=$abc$109383$new_n55675_ i1=soc.cpu.minerva.divider.divisor[0] i2=$abc$109383$new_n55674_ nq=$abc$109383$new_n55676_
+.subckt or21nand_x1 i0=$abc$109383$new_n55676_ i1=$abc$109383$new_n55673_ i2=$abc$109383$new_n55671_ nq=$abc$109383$new_n55677_
 .subckt inv_x0 i=soc.cpu.minerva.divider.divisor[2] nq=$abc$109383$new_n55678_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[1] i1=$abc$109383$new_n55678_ nq=$abc$109383$new_n55679_
-.subckt oa22_x2 i0=$abc$109383$new_n55679_ i1=$abc$109383$new_n55677_ i2=$abc$109383$new_n55670_ q=$abc$109383$new_n55680_
-.subckt oa22_x2 i0=$abc$109383$new_n55680_ i1=$abc$109383$new_n55669_ i2=$abc$109383$new_n55667_ q=$abc$109383$new_n55681_
+.subckt or21nand_x1 i0=$abc$109383$new_n55679_ i1=$abc$109383$new_n55677_ i2=$abc$109383$new_n55670_ nq=$abc$109383$new_n55680_
+.subckt or21nand_x1 i0=$abc$109383$new_n55680_ i1=$abc$109383$new_n55669_ i2=$abc$109383$new_n55667_ nq=$abc$109383$new_n55681_
 .subckt nand3_x0 i0=$abc$109383$new_n55681_ i1=$abc$109383$new_n55666_ i2=$abc$109383$new_n55664_ nq=$abc$109383$new_n55682_
 .subckt nand3_x0 i0=$abc$109383$new_n55682_ i1=$abc$109383$new_n55662_ i2=$abc$109383$new_n55660_ nq=$abc$109383$new_n55683_
 .subckt nand3_x0 i0=$abc$109383$new_n55683_ i1=$abc$109383$new_n55659_ i2=$abc$109383$new_n55657_ nq=$abc$109383$new_n55684_
@@ -40968,2977 +40968,2977 @@
 .subckt nand3_x0 i0=$abc$109383$new_n55693_ i1=$abc$109383$new_n55624_ i2=$abc$109383$new_n55622_ nq=$abc$109383$new_n55694_
 .subckt nand3_x0 i0=$abc$109383$new_n55694_ i1=$abc$109383$new_n55620_ i2=$abc$109383$new_n55618_ nq=$abc$109383$new_n55695_
 .subckt nand3_x0 i0=$abc$109383$new_n55695_ i1=$abc$109383$new_n55617_ i2=$abc$109383$new_n55615_ nq=$abc$109383$new_n55696_
-.subckt a3_x2 i0=$abc$109383$new_n55696_ i1=$abc$109383$new_n55613_ i2=$abc$109383$new_n55611_ q=$abc$109383$new_n55697_
-.subckt ao22_x2 i0=$abc$109383$new_n55697_ i1=$abc$109383$new_n55610_ i2=$abc$109383$new_n55608_ q=$abc$109383$new_n55698_
-.subckt ao22_x2 i0=$abc$109383$new_n55698_ i1=$abc$109383$new_n55606_ i2=$abc$109383$new_n55604_ q=$abc$109383$new_n55699_
-.subckt ao22_x2 i0=$abc$109383$new_n55699_ i1=$abc$109383$new_n55603_ i2=$abc$109383$new_n55601_ q=$abc$109383$new_n55700_
-.subckt ao22_x2 i0=$abc$109383$new_n55700_ i1=$abc$109383$new_n55599_ i2=$abc$109383$new_n55597_ q=$abc$109383$new_n55701_
-.subckt ao22_x2 i0=$abc$109383$new_n55701_ i1=$abc$109383$new_n55596_ i2=$abc$109383$new_n55594_ q=$abc$109383$new_n55702_
-.subckt ao22_x2 i0=$abc$109383$new_n55702_ i1=$abc$109383$new_n55592_ i2=$abc$109383$new_n55590_ q=$abc$109383$new_n55703_
-.subckt ao22_x2 i0=$abc$109383$new_n55703_ i1=$abc$109383$new_n55589_ i2=$abc$109383$new_n55587_ q=$abc$109383$new_n55704_
-.subckt ao22_x2 i0=$abc$109383$new_n55704_ i1=$abc$109383$new_n55585_ i2=$abc$109383$new_n55583_ q=$abc$109383$new_n55705_
-.subckt ao22_x2 i0=$abc$109383$new_n55705_ i1=$abc$109383$new_n55582_ i2=$abc$109383$new_n55580_ q=$abc$109383$new_n55706_
-.subckt ao22_x2 i0=$abc$109383$new_n55706_ i1=$abc$109383$new_n55578_ i2=$abc$109383$new_n55576_ q=$abc$109383$new_n55707_
-.subckt ao22_x2 i0=$abc$109383$new_n55707_ i1=$abc$109383$new_n55575_ i2=$abc$109383$new_n55573_ q=$abc$109383$new_n55708_
-.subckt o2_x2 i0=$abc$109383$new_n55708_ i1=$abc$109383$new_n55571_ q=$abc$109383$new_n55709_
-.subckt nxr2_x1 i0=$abc$109383$new_n55709_ i1=soc.cpu.minerva.divider.remainder[31] nq=$abc$109383$new_n55710_
+.subckt and3_x1 i0=$abc$109383$new_n55696_ i1=$abc$109383$new_n55613_ i2=$abc$109383$new_n55611_ q=$abc$109383$new_n55697_
+.subckt and21nor_x1 i0=$abc$109383$new_n55697_ i1=$abc$109383$new_n55610_ i2=$abc$109383$new_n55608_ nq=$abc$109383$new_n55698_
+.subckt and21nor_x1 i0=$abc$109383$new_n55698_ i1=$abc$109383$new_n55606_ i2=$abc$109383$new_n55604_ nq=$abc$109383$new_n55699_
+.subckt and21nor_x1 i0=$abc$109383$new_n55699_ i1=$abc$109383$new_n55603_ i2=$abc$109383$new_n55601_ nq=$abc$109383$new_n55700_
+.subckt and21nor_x1 i0=$abc$109383$new_n55700_ i1=$abc$109383$new_n55599_ i2=$abc$109383$new_n55597_ nq=$abc$109383$new_n55701_
+.subckt and21nor_x1 i0=$abc$109383$new_n55701_ i1=$abc$109383$new_n55596_ i2=$abc$109383$new_n55594_ nq=$abc$109383$new_n55702_
+.subckt and21nor_x1 i0=$abc$109383$new_n55702_ i1=$abc$109383$new_n55592_ i2=$abc$109383$new_n55590_ nq=$abc$109383$new_n55703_
+.subckt and21nor_x1 i0=$abc$109383$new_n55703_ i1=$abc$109383$new_n55589_ i2=$abc$109383$new_n55587_ nq=$abc$109383$new_n55704_
+.subckt and21nor_x1 i0=$abc$109383$new_n55704_ i1=$abc$109383$new_n55585_ i2=$abc$109383$new_n55583_ nq=$abc$109383$new_n55705_
+.subckt and21nor_x1 i0=$abc$109383$new_n55705_ i1=$abc$109383$new_n55582_ i2=$abc$109383$new_n55580_ nq=$abc$109383$new_n55706_
+.subckt and21nor_x1 i0=$abc$109383$new_n55706_ i1=$abc$109383$new_n55578_ i2=$abc$109383$new_n55576_ nq=$abc$109383$new_n55707_
+.subckt and21nor_x1 i0=$abc$109383$new_n55707_ i1=$abc$109383$new_n55575_ i2=$abc$109383$new_n55573_ nq=$abc$109383$new_n55708_
+.subckt or2_x1 i0=$abc$109383$new_n55708_ i1=$abc$109383$new_n55571_ q=$abc$109383$new_n55709_
+.subckt nexor2_x0 i0=$abc$109383$new_n55709_ i1=soc.cpu.minerva.divider.remainder[31] nq=$abc$109383$new_n55710_
 .subckt buf_x4 i=$abc$109383$new_n55710_ q=$abc$109383$new_n55711_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55569_ i2=soc.cpu.minerva.divider.remainder[0] nq=$abc$109383$new_n55712_
 .subckt buf_x4 i=$abc$109383$new_n54057_ q=$abc$109383$new_n55713_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[31] nq=$abc$109383$new_n55714_
-.subckt nxr2_x1 i0=$abc$109383$new_n55709_ i1=$abc$109383$new_n55714_ nq=$abc$109383$new_n55715_
+.subckt nexor2_x0 i0=$abc$109383$new_n55709_ i1=$abc$109383$new_n55714_ nq=$abc$109383$new_n55715_
 .subckt buf_x4 i=$abc$109383$new_n55715_ q=$abc$109383$new_n55716_
 .subckt nand3_x0 i0=$abc$109383$new_n55674_ i1=soc.cpu.minerva.divider.divisor[0] i2=$abc$109383$new_n55675_ nq=$abc$109383$new_n55717_
-.subckt a2_x2 i0=$abc$109383$new_n55717_ i1=$abc$109383$new_n55676_ q=$abc$109383$new_n55718_
+.subckt and2_x1 i0=$abc$109383$new_n55717_ i1=$abc$109383$new_n55676_ q=$abc$109383$new_n55718_
 .subckt nand3_x0 i0=$abc$109383$new_n55718_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55713_ nq=$abc$109383$new_n55719_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.remainder[1] q=$abc$109383$new_n55720_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.remainder[1] q=$abc$109383$new_n55720_
 .subckt nand4_x0 i0=$abc$109383$new_n55720_ i1=$abc$109383$new_n54055_ i2=$abc$109383$new_n54054_ i3=$abc$109383$new_n54053_ nq=$abc$109383$new_n55721_
-.subckt a2_x2 i0=$abc$109383$new_n55721_ i1=$abc$109383$new_n55156_ q=$abc$109383$new_n55722_
+.subckt and2_x1 i0=$abc$109383$new_n55721_ i1=$abc$109383$new_n55156_ q=$abc$109383$new_n55722_
 .subckt nand3_x0 i0=$abc$109383$new_n55722_ i1=$abc$109383$new_n55719_ i2=$abc$109383$new_n55712_ nq=$abc$109383$new_n55723_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29452_ q=$abc$109383$new_n55724_
-.subckt ao22_x2 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55724_ i2=$abc$109383$new_n55429_ q=$abc$109383$new_n55725_
-.subckt oa22_x2 i0=$abc$109383$new_n55725_ i1=$abc$109383$new_n55723_ i2=$abc$109383$new_n55568_ q=$abc$109383$new_n55726_
-.subckt a2_x2 i0=$abc$109383$new_n55726_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105326
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[2] q=$abc$109383$new_n55728_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29452_ q=$abc$109383$new_n55724_
+.subckt and21nor_x1 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55724_ i2=$abc$109383$new_n55429_ nq=$abc$109383$new_n55725_
+.subckt or21nand_x1 i0=$abc$109383$new_n55725_ i1=$abc$109383$new_n55723_ i2=$abc$109383$new_n55568_ nq=$abc$109383$new_n55726_
+.subckt and2_x1 i0=$abc$109383$new_n55726_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105326
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[2] nq=$abc$109383$new_n55728_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55569_ i2=soc.cpu.minerva.divider.remainder[1] nq=$abc$109383$new_n55729_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55730_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[2] nq=$abc$109383$new_n55731_
 .subckt nor2_x0 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.remainder[1] nq=$abc$109383$new_n55732_
-.subckt nxr2_x1 i0=$abc$109383$new_n55732_ i1=$abc$109383$new_n55731_ nq=$abc$109383$new_n55733_
-.subckt ao22_x2 i0=$abc$109383$new_n55733_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55730_ q=$abc$109383$new_n55734_
+.subckt nexor2_x0 i0=$abc$109383$new_n55732_ i1=$abc$109383$new_n55731_ nq=$abc$109383$new_n55733_
+.subckt and21nor_x1 i0=$abc$109383$new_n55733_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55730_ nq=$abc$109383$new_n55734_
 .subckt buf_x4 i=$abc$109383$new_n54057_ q=$abc$109383$new_n55735_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[1] i1=soc.cpu.minerva.divider.divisor[2] nq=$abc$109383$new_n55736_
-.subckt a2_x2 i0=$abc$109383$new_n55676_ i1=$abc$109383$new_n55673_ q=$abc$109383$new_n55737_
-.subckt nxr2_x1 i0=$abc$109383$new_n55737_ i1=$abc$109383$new_n55736_ nq=$abc$109383$new_n55738_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[1] i1=soc.cpu.minerva.divider.divisor[2] nq=$abc$109383$new_n55736_
+.subckt and2_x1 i0=$abc$109383$new_n55676_ i1=$abc$109383$new_n55673_ q=$abc$109383$new_n55737_
+.subckt nexor2_x0 i0=$abc$109383$new_n55737_ i1=$abc$109383$new_n55736_ nq=$abc$109383$new_n55738_
 .subckt nand3_x0 i0=$abc$109383$new_n55738_ i1=$abc$109383$new_n55715_ i2=$abc$109383$new_n55735_ nq=$abc$109383$new_n55739_
 .subckt nand3_x0 i0=$abc$109383$new_n55739_ i1=$abc$109383$new_n55734_ i2=$abc$109383$new_n55729_ nq=$abc$109383$new_n55740_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29396_ q=$abc$109383$new_n55741_
-.subckt ao22_x2 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55741_ i2=$abc$109383$new_n55429_ q=$abc$109383$new_n55742_
-.subckt oa22_x2 i0=$abc$109383$new_n55742_ i1=$abc$109383$new_n55740_ i2=$abc$109383$new_n55728_ q=$abc$109383$new_n55743_
-.subckt a2_x2 i0=$abc$109383$new_n55743_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105330
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[3] q=$abc$109383$new_n55745_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29396_ q=$abc$109383$new_n55741_
+.subckt and21nor_x1 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55741_ i2=$abc$109383$new_n55429_ nq=$abc$109383$new_n55742_
+.subckt or21nand_x1 i0=$abc$109383$new_n55742_ i1=$abc$109383$new_n55740_ i2=$abc$109383$new_n55728_ nq=$abc$109383$new_n55743_
+.subckt and2_x1 i0=$abc$109383$new_n55743_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105330
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[3] nq=$abc$109383$new_n55745_
 .subckt buf_x4 i=$abc$109383$new_n55715_ q=$abc$109383$new_n55746_
-.subckt a2_x2 i0=$abc$109383$new_n55677_ i1=$abc$109383$new_n55679_ q=$abc$109383$new_n55747_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[2] i1=soc.cpu.minerva.divider.divisor[3] nq=$abc$109383$new_n55748_
-.subckt nxr2_x1 i0=$abc$109383$new_n55748_ i1=$abc$109383$new_n55747_ nq=$abc$109383$new_n55749_
+.subckt and2_x1 i0=$abc$109383$new_n55677_ i1=$abc$109383$new_n55679_ q=$abc$109383$new_n55747_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[2] i1=soc.cpu.minerva.divider.divisor[3] nq=$abc$109383$new_n55748_
+.subckt nexor2_x0 i0=$abc$109383$new_n55748_ i1=$abc$109383$new_n55747_ nq=$abc$109383$new_n55749_
 .subckt nand3_x0 i0=$abc$109383$new_n55749_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55750_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[2] nq=$abc$109383$new_n55751_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[3] nq=$abc$109383$new_n55752_
 .subckt nor3_x0 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.remainder[1] i2=soc.cpu.minerva.divider.remainder[2] nq=$abc$109383$new_n55753_
-.subckt nxr2_x1 i0=$abc$109383$new_n55753_ i1=$abc$109383$new_n55752_ nq=$abc$109383$new_n55754_
-.subckt ao22_x2 i0=$abc$109383$new_n55754_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55730_ q=$abc$109383$new_n55755_
+.subckt nexor2_x0 i0=$abc$109383$new_n55753_ i1=$abc$109383$new_n55752_ nq=$abc$109383$new_n55754_
+.subckt and21nor_x1 i0=$abc$109383$new_n55754_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55730_ nq=$abc$109383$new_n55755_
 .subckt nand3_x0 i0=$abc$109383$new_n55755_ i1=$abc$109383$new_n55751_ i2=$abc$109383$new_n55750_ nq=$abc$109383$new_n55756_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29421_ q=$abc$109383$new_n55757_
-.subckt ao22_x2 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55757_ i2=$abc$109383$new_n55429_ q=$abc$109383$new_n55758_
-.subckt oa22_x2 i0=$abc$109383$new_n55758_ i1=$abc$109383$new_n55756_ i2=$abc$109383$new_n55745_ q=$abc$109383$new_n55759_
-.subckt a2_x2 i0=$abc$109383$new_n55759_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105334
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[4] q=$abc$109383$new_n55761_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29421_ q=$abc$109383$new_n55757_
+.subckt and21nor_x1 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55757_ i2=$abc$109383$new_n55429_ nq=$abc$109383$new_n55758_
+.subckt or21nand_x1 i0=$abc$109383$new_n55758_ i1=$abc$109383$new_n55756_ i2=$abc$109383$new_n55745_ nq=$abc$109383$new_n55759_
+.subckt and2_x1 i0=$abc$109383$new_n55759_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105334
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[4] nq=$abc$109383$new_n55761_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55569_ i2=soc.cpu.minerva.divider.remainder[3] nq=$abc$109383$new_n55762_
 .subckt nor4_x0 i0=soc.cpu.minerva.divider.remainder[0] i1=soc.cpu.minerva.divider.remainder[1] i2=soc.cpu.minerva.divider.remainder[2] i3=soc.cpu.minerva.divider.remainder[3] nq=$abc$109383$new_n55763_
-.subckt nxr2_x1 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ nq=$abc$109383$new_n55764_
-.subckt ao22_x2 i0=$abc$109383$new_n55764_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55730_ q=$abc$109383$new_n55765_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[3] i1=soc.cpu.minerva.divider.divisor[4] nq=$abc$109383$new_n55766_
-.subckt a2_x2 i0=$abc$109383$new_n55680_ i1=$abc$109383$new_n55669_ q=$abc$109383$new_n55767_
-.subckt nxr2_x1 i0=$abc$109383$new_n55767_ i1=$abc$109383$new_n55766_ nq=$abc$109383$new_n55768_
+.subckt nexor2_x0 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ nq=$abc$109383$new_n55764_
+.subckt and21nor_x1 i0=$abc$109383$new_n55764_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55730_ nq=$abc$109383$new_n55765_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[3] i1=soc.cpu.minerva.divider.divisor[4] nq=$abc$109383$new_n55766_
+.subckt and2_x1 i0=$abc$109383$new_n55680_ i1=$abc$109383$new_n55669_ q=$abc$109383$new_n55767_
+.subckt nexor2_x0 i0=$abc$109383$new_n55767_ i1=$abc$109383$new_n55766_ nq=$abc$109383$new_n55768_
 .subckt nand3_x0 i0=$abc$109383$new_n55768_ i1=$abc$109383$new_n55715_ i2=$abc$109383$new_n55735_ nq=$abc$109383$new_n55769_
 .subckt nand3_x0 i0=$abc$109383$new_n55769_ i1=$abc$109383$new_n55765_ i2=$abc$109383$new_n55762_ nq=$abc$109383$new_n55770_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29275_ q=$abc$109383$new_n55771_
-.subckt ao22_x2 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55771_ i2=$abc$109383$new_n55429_ q=$abc$109383$new_n55772_
-.subckt oa22_x2 i0=$abc$109383$new_n55772_ i1=$abc$109383$new_n55770_ i2=$abc$109383$new_n55761_ q=$abc$109383$new_n55773_
-.subckt a2_x2 i0=$abc$109383$new_n55773_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105338
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[5] q=$abc$109383$new_n55775_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29275_ q=$abc$109383$new_n55771_
+.subckt and21nor_x1 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55771_ i2=$abc$109383$new_n55429_ nq=$abc$109383$new_n55772_
+.subckt or21nand_x1 i0=$abc$109383$new_n55772_ i1=$abc$109383$new_n55770_ i2=$abc$109383$new_n55761_ nq=$abc$109383$new_n55773_
+.subckt and2_x1 i0=$abc$109383$new_n55773_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105338
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[5] nq=$abc$109383$new_n55775_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55569_ i2=soc.cpu.minerva.divider.remainder[4] nq=$abc$109383$new_n55776_
-.subckt a2_x2 i0=$abc$109383$new_n55681_ i1=$abc$109383$new_n55666_ q=$abc$109383$new_n55777_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[4] i1=soc.cpu.minerva.divider.divisor[5] nq=$abc$109383$new_n55778_
-.subckt nxr2_x1 i0=$abc$109383$new_n55778_ i1=$abc$109383$new_n55777_ nq=$abc$109383$new_n55779_
+.subckt and2_x1 i0=$abc$109383$new_n55681_ i1=$abc$109383$new_n55666_ q=$abc$109383$new_n55777_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[4] i1=soc.cpu.minerva.divider.divisor[5] nq=$abc$109383$new_n55778_
+.subckt nexor2_x0 i0=$abc$109383$new_n55778_ i1=$abc$109383$new_n55777_ nq=$abc$109383$new_n55779_
 .subckt nand3_x0 i0=$abc$109383$new_n55779_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55713_ nq=$abc$109383$new_n55780_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55781_
-.subckt a3_x2 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n54053_ q=$abc$109383$new_n55782_
+.subckt and3_x1 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n54053_ q=$abc$109383$new_n55782_
 .subckt buf_x4 i=$abc$109383$new_n55782_ q=$abc$109383$new_n55783_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[5] nq=$abc$109383$new_n55784_
 .subckt nand3_x0 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ i2=$abc$109383$new_n55784_ nq=$abc$109383$new_n55785_
-.subckt oa22_x2 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ i2=$abc$109383$new_n55784_ q=$abc$109383$new_n55786_
+.subckt or21nand_x1 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ i2=$abc$109383$new_n55784_ nq=$abc$109383$new_n55786_
 .subckt nand3_x0 i0=$abc$109383$new_n55786_ i1=$abc$109383$new_n55785_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n55787_
-.subckt a2_x2 i0=$abc$109383$new_n55787_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55788_
+.subckt and2_x1 i0=$abc$109383$new_n55787_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55788_
 .subckt nand3_x0 i0=$abc$109383$new_n55788_ i1=$abc$109383$new_n55780_ i2=$abc$109383$new_n55776_ nq=$abc$109383$new_n55789_
 .subckt buf_x4 i=$abc$109383$new_n55123_ q=$abc$109383$new_n55790_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29298_ q=$abc$109383$new_n55791_
-.subckt ao22_x2 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55791_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55792_
-.subckt oa22_x2 i0=$abc$109383$new_n55792_ i1=$abc$109383$new_n55789_ i2=$abc$109383$new_n55775_ q=$abc$109383$new_n55793_
-.subckt a2_x2 i0=$abc$109383$new_n55793_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105342
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[6] q=$abc$109383$new_n55795_
-.subckt oa22_x2 i0=$abc$109383$new_n55682_ i1=$abc$109383$new_n55662_ i2=$abc$109383$new_n55660_ q=$abc$109383$new_n55796_
-.subckt a2_x2 i0=$abc$109383$new_n55796_ i1=$abc$109383$new_n55683_ q=$abc$109383$new_n55797_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55477_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29298_ q=$abc$109383$new_n55791_
+.subckt and21nor_x1 i0=$abc$109383$new_n55255_ i1=$abc$109383$new_n55791_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55792_
+.subckt or21nand_x1 i0=$abc$109383$new_n55792_ i1=$abc$109383$new_n55789_ i2=$abc$109383$new_n55775_ nq=$abc$109383$new_n55793_
+.subckt and2_x1 i0=$abc$109383$new_n55793_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105342
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[6] nq=$abc$109383$new_n55795_
+.subckt or21nand_x1 i0=$abc$109383$new_n55682_ i1=$abc$109383$new_n55662_ i2=$abc$109383$new_n55660_ nq=$abc$109383$new_n55796_
+.subckt and2_x1 i0=$abc$109383$new_n55796_ i1=$abc$109383$new_n55683_ q=$abc$109383$new_n55797_
 .subckt nand3_x0 i0=$abc$109383$new_n55797_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55798_
 .subckt buf_x4 i=$abc$109383$new_n55710_ q=$abc$109383$new_n55799_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[5] nq=$abc$109383$new_n55800_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55801_
-.subckt a2_x2 i0=$abc$109383$new_n55785_ i1=soc.cpu.minerva.divider.remainder[6] q=$abc$109383$new_n55802_
+.subckt and2_x1 i0=$abc$109383$new_n55785_ i1=soc.cpu.minerva.divider.remainder[6] q=$abc$109383$new_n55802_
 .subckt nand4_x0 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ i2=$abc$109383$new_n55784_ i3=$abc$109383$new_n55654_ nq=$abc$109383$new_n55803_
 .subckt nand2_x0 i0=$abc$109383$new_n55803_ i1=$abc$109383$new_n55783_ nq=$abc$109383$new_n55804_
-.subckt ao22_x2 i0=$abc$109383$new_n55804_ i1=$abc$109383$new_n55802_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n55805_
+.subckt and21nor_x1 i0=$abc$109383$new_n55804_ i1=$abc$109383$new_n55802_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n55805_
 .subckt nand3_x0 i0=$abc$109383$new_n55805_ i1=$abc$109383$new_n55800_ i2=$abc$109383$new_n55798_ nq=$abc$109383$new_n55806_
 .subckt buf_x4 i=$abc$109383$new_n55144_ q=$abc$109383$new_n55807_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29332_ q=$abc$109383$new_n55808_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55476_ i3=$abc$109383$new_n29332_ q=$abc$109383$new_n55808_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55809_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55808_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55810_
-.subckt oa22_x2 i0=$abc$109383$new_n55810_ i1=$abc$109383$new_n55806_ i2=$abc$109383$new_n55795_ q=$abc$109383$new_n55811_
-.subckt a2_x2 i0=$abc$109383$new_n55811_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105346
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55808_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55810_
+.subckt or21nand_x1 i0=$abc$109383$new_n55810_ i1=$abc$109383$new_n55806_ i2=$abc$109383$new_n55795_ nq=$abc$109383$new_n55811_
+.subckt and2_x1 i0=$abc$109383$new_n55811_ i1=$abc$109383$new_n55099_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105346
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n55813_
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[7] q=$abc$109383$new_n55814_
-.subckt a2_x2 i0=$abc$109383$new_n55683_ i1=$abc$109383$new_n55659_ q=$abc$109383$new_n55815_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[6] i1=soc.cpu.minerva.divider.divisor[7] nq=$abc$109383$new_n55816_
-.subckt nxr2_x1 i0=$abc$109383$new_n55816_ i1=$abc$109383$new_n55815_ nq=$abc$109383$new_n55817_
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[7] nq=$abc$109383$new_n55814_
+.subckt and2_x1 i0=$abc$109383$new_n55683_ i1=$abc$109383$new_n55659_ q=$abc$109383$new_n55815_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[6] i1=soc.cpu.minerva.divider.divisor[7] nq=$abc$109383$new_n55816_
+.subckt nexor2_x0 i0=$abc$109383$new_n55816_ i1=$abc$109383$new_n55815_ nq=$abc$109383$new_n55817_
 .subckt nand3_x0 i0=$abc$109383$new_n55817_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55818_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[6] nq=$abc$109383$new_n55819_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[7] nq=$abc$109383$new_n55820_
-.subckt a4_x2 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ i2=$abc$109383$new_n55784_ i3=$abc$109383$new_n55654_ q=$abc$109383$new_n55821_
+.subckt and4_x1 i0=$abc$109383$new_n55763_ i1=$abc$109383$new_n55661_ i2=$abc$109383$new_n55784_ i3=$abc$109383$new_n55654_ q=$abc$109383$new_n55821_
 .subckt nand2_x0 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ nq=$abc$109383$new_n55822_
 .subckt buf_x4 i=$abc$109383$new_n55782_ q=$abc$109383$new_n55823_
-.subckt ao22_x2 i0=$abc$109383$new_n55820_ i1=$abc$109383$new_n55821_ i2=$abc$109383$new_n55823_ q=$abc$109383$new_n55824_
+.subckt and21nor_x1 i0=$abc$109383$new_n55820_ i1=$abc$109383$new_n55821_ i2=$abc$109383$new_n55823_ nq=$abc$109383$new_n55824_
 .subckt nand2_x0 i0=$abc$109383$new_n55824_ i1=$abc$109383$new_n55822_ nq=$abc$109383$new_n55825_
-.subckt a2_x2 i0=$abc$109383$new_n55825_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55826_
+.subckt and2_x1 i0=$abc$109383$new_n55825_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55826_
 .subckt nand3_x0 i0=$abc$109383$new_n55826_ i1=$abc$109383$new_n55819_ i2=$abc$109383$new_n55818_ nq=$abc$109383$new_n55827_
 .subckt buf_x4 i=$abc$109383$new_n54024_ q=$abc$109383$new_n55828_
-.subckt a4_x2 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29354_ q=$abc$109383$new_n55829_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55829_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55830_
-.subckt oa22_x2 i0=$abc$109383$new_n55830_ i1=$abc$109383$new_n55827_ i2=$abc$109383$new_n55814_ q=$abc$109383$new_n55831_
-.subckt a2_x2 i0=$abc$109383$new_n55831_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105350
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[8] q=$abc$109383$new_n55833_
-.subckt oa22_x2 i0=$abc$109383$new_n55684_ i1=$abc$109383$new_n55655_ i2=$abc$109383$new_n55653_ q=$abc$109383$new_n55834_
-.subckt a2_x2 i0=$abc$109383$new_n55834_ i1=$abc$109383$new_n55685_ q=$abc$109383$new_n55835_
+.subckt and4_x1 i0=$abc$109383$new_n55145_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29354_ q=$abc$109383$new_n55829_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55829_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55830_
+.subckt or21nand_x1 i0=$abc$109383$new_n55830_ i1=$abc$109383$new_n55827_ i2=$abc$109383$new_n55814_ nq=$abc$109383$new_n55831_
+.subckt and2_x1 i0=$abc$109383$new_n55831_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105350
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[8] nq=$abc$109383$new_n55833_
+.subckt or21nand_x1 i0=$abc$109383$new_n55684_ i1=$abc$109383$new_n55655_ i2=$abc$109383$new_n55653_ nq=$abc$109383$new_n55834_
+.subckt and2_x1 i0=$abc$109383$new_n55834_ i1=$abc$109383$new_n55685_ q=$abc$109383$new_n55835_
 .subckt nand3_x0 i0=$abc$109383$new_n55835_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55836_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[7] nq=$abc$109383$new_n55837_
-.subckt oa22_x2 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ i2=$abc$109383$new_n55647_ q=$abc$109383$new_n55838_
+.subckt or21nand_x1 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ i2=$abc$109383$new_n55647_ nq=$abc$109383$new_n55838_
 .subckt nand3_x0 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ i2=$abc$109383$new_n55647_ nq=$abc$109383$new_n55839_
 .subckt nand3_x0 i0=$abc$109383$new_n55839_ i1=$abc$109383$new_n55838_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n55840_
-.subckt a2_x2 i0=$abc$109383$new_n55840_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55841_
+.subckt and2_x1 i0=$abc$109383$new_n55840_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55841_
 .subckt nand3_x0 i0=$abc$109383$new_n55841_ i1=$abc$109383$new_n55837_ i2=$abc$109383$new_n55836_ nq=$abc$109383$new_n55842_
 .subckt buf_x4 i=$abc$109383$new_n54037_ q=$abc$109383$new_n55843_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29510_ q=$abc$109383$new_n55844_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55844_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55845_
-.subckt oa22_x2 i0=$abc$109383$new_n55845_ i1=$abc$109383$new_n55842_ i2=$abc$109383$new_n55833_ q=$abc$109383$new_n55846_
-.subckt a2_x2 i0=$abc$109383$new_n55846_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105354
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[9] q=$abc$109383$new_n55848_
-.subckt a2_x2 i0=$abc$109383$new_n55685_ i1=$abc$109383$new_n55652_ q=$abc$109383$new_n55849_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[8] i1=soc.cpu.minerva.divider.divisor[9] nq=$abc$109383$new_n55850_
-.subckt nxr2_x1 i0=$abc$109383$new_n55850_ i1=$abc$109383$new_n55849_ nq=$abc$109383$new_n55851_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29510_ q=$abc$109383$new_n55844_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55844_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55845_
+.subckt or21nand_x1 i0=$abc$109383$new_n55845_ i1=$abc$109383$new_n55842_ i2=$abc$109383$new_n55833_ nq=$abc$109383$new_n55846_
+.subckt and2_x1 i0=$abc$109383$new_n55846_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105354
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55525_ i2=soc.cpu.minerva.divider.remainder[9] nq=$abc$109383$new_n55848_
+.subckt and2_x1 i0=$abc$109383$new_n55685_ i1=$abc$109383$new_n55652_ q=$abc$109383$new_n55849_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[8] i1=soc.cpu.minerva.divider.divisor[9] nq=$abc$109383$new_n55850_
+.subckt nexor2_x0 i0=$abc$109383$new_n55850_ i1=$abc$109383$new_n55849_ nq=$abc$109383$new_n55851_
 .subckt nand3_x0 i0=$abc$109383$new_n55851_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55852_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[8] nq=$abc$109383$new_n55853_
-.subckt a2_x2 i0=$abc$109383$new_n55839_ i1=soc.cpu.minerva.divider.remainder[9] q=$abc$109383$new_n55854_
+.subckt and2_x1 i0=$abc$109383$new_n55839_ i1=soc.cpu.minerva.divider.remainder[9] q=$abc$109383$new_n55854_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[9] nq=$abc$109383$new_n55855_
 .subckt nand4_x0 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ i2=$abc$109383$new_n55647_ i3=$abc$109383$new_n55855_ nq=$abc$109383$new_n55856_
 .subckt nand2_x0 i0=$abc$109383$new_n55856_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n55857_
-.subckt ao22_x2 i0=$abc$109383$new_n55857_ i1=$abc$109383$new_n55854_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n55858_
+.subckt and21nor_x1 i0=$abc$109383$new_n55857_ i1=$abc$109383$new_n55854_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n55858_
 .subckt nand3_x0 i0=$abc$109383$new_n55858_ i1=$abc$109383$new_n55853_ i2=$abc$109383$new_n55852_ nq=$abc$109383$new_n55859_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29532_ q=$abc$109383$new_n55860_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55860_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55861_
-.subckt oa22_x2 i0=$abc$109383$new_n55861_ i1=$abc$109383$new_n55859_ i2=$abc$109383$new_n55848_ q=$abc$109383$new_n55862_
-.subckt a2_x2 i0=$abc$109383$new_n55862_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105358
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29532_ q=$abc$109383$new_n55860_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55860_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55861_
+.subckt or21nand_x1 i0=$abc$109383$new_n55861_ i1=$abc$109383$new_n55859_ i2=$abc$109383$new_n55848_ nq=$abc$109383$new_n55862_
+.subckt and2_x1 i0=$abc$109383$new_n55862_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105358
 .subckt buf_x4 i=$abc$109383$new_n55524_ q=$abc$109383$new_n55864_
-.subckt ao22_x2 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[10] q=$abc$109383$new_n55865_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[8] i1=$abc$109383$new_n55649_ q=$abc$109383$new_n55866_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[7] i1=$abc$109383$new_n55651_ q=$abc$109383$new_n55867_
-.subckt a3_x2 i0=$abc$109383$new_n55684_ i1=$abc$109383$new_n55655_ i2=$abc$109383$new_n55653_ q=$abc$109383$new_n55868_
-.subckt ao22_x2 i0=$abc$109383$new_n55868_ i1=$abc$109383$new_n55867_ i2=$abc$109383$new_n55648_ q=$abc$109383$new_n55869_
+.subckt and21nor_x1 i0=$abc$109383$new_n55567_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[10] nq=$abc$109383$new_n55865_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[8] i1=$abc$109383$new_n55649_ q=$abc$109383$new_n55866_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[7] i1=$abc$109383$new_n55651_ q=$abc$109383$new_n55867_
+.subckt and3_x1 i0=$abc$109383$new_n55684_ i1=$abc$109383$new_n55655_ i2=$abc$109383$new_n55653_ q=$abc$109383$new_n55868_
+.subckt and21nor_x1 i0=$abc$109383$new_n55868_ i1=$abc$109383$new_n55867_ i2=$abc$109383$new_n55648_ nq=$abc$109383$new_n55869_
 .subckt nor2_x0 i0=$abc$109383$new_n55869_ i1=$abc$109383$new_n55866_ nq=$abc$109383$new_n55870_
-.subckt nxr2_x1 i0=$abc$109383$new_n55870_ i1=$abc$109383$new_n55646_ nq=$abc$109383$new_n55871_
+.subckt nexor2_x0 i0=$abc$109383$new_n55870_ i1=$abc$109383$new_n55646_ nq=$abc$109383$new_n55871_
 .subckt nand3_x0 i0=$abc$109383$new_n55871_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55872_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[9] nq=$abc$109383$new_n55873_
-.subckt a4_x2 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ i2=$abc$109383$new_n55647_ i3=$abc$109383$new_n55855_ q=$abc$109383$new_n55874_
+.subckt and4_x1 i0=$abc$109383$new_n55821_ i1=$abc$109383$new_n55820_ i2=$abc$109383$new_n55647_ i3=$abc$109383$new_n55855_ q=$abc$109383$new_n55874_
 .subckt nand2_x0 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ nq=$abc$109383$new_n55875_
-.subckt ao22_x2 i0=$abc$109383$new_n55640_ i1=$abc$109383$new_n55874_ i2=$abc$109383$new_n55823_ q=$abc$109383$new_n55876_
+.subckt and21nor_x1 i0=$abc$109383$new_n55640_ i1=$abc$109383$new_n55874_ i2=$abc$109383$new_n55823_ nq=$abc$109383$new_n55876_
 .subckt nand2_x0 i0=$abc$109383$new_n55876_ i1=$abc$109383$new_n55875_ nq=$abc$109383$new_n55877_
-.subckt a2_x2 i0=$abc$109383$new_n55877_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55878_
+.subckt and2_x1 i0=$abc$109383$new_n55877_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55878_
 .subckt nand3_x0 i0=$abc$109383$new_n55878_ i1=$abc$109383$new_n55873_ i2=$abc$109383$new_n55872_ nq=$abc$109383$new_n55879_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29558_ q=$abc$109383$new_n55880_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55880_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55881_
-.subckt oa22_x2 i0=$abc$109383$new_n55881_ i1=$abc$109383$new_n55879_ i2=$abc$109383$new_n55865_ q=$abc$109383$new_n55882_
-.subckt a2_x2 i0=$abc$109383$new_n55882_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105362
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29558_ q=$abc$109383$new_n55880_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55880_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55881_
+.subckt or21nand_x1 i0=$abc$109383$new_n55881_ i1=$abc$109383$new_n55879_ i2=$abc$109383$new_n55865_ nq=$abc$109383$new_n55882_
+.subckt and2_x1 i0=$abc$109383$new_n55882_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105362
 .subckt buf_x4 i=$abc$109383$new_n55566_ q=$abc$109383$new_n55884_
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[11] q=$abc$109383$new_n55885_
-.subckt a2_x2 i0=$abc$109383$new_n55687_ i1=$abc$109383$new_n55645_ q=$abc$109383$new_n55886_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[10] i1=soc.cpu.minerva.divider.divisor[11] nq=$abc$109383$new_n55887_
-.subckt nxr2_x1 i0=$abc$109383$new_n55887_ i1=$abc$109383$new_n55886_ nq=$abc$109383$new_n55888_
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[11] nq=$abc$109383$new_n55885_
+.subckt and2_x1 i0=$abc$109383$new_n55687_ i1=$abc$109383$new_n55645_ q=$abc$109383$new_n55886_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[10] i1=soc.cpu.minerva.divider.divisor[11] nq=$abc$109383$new_n55887_
+.subckt nexor2_x0 i0=$abc$109383$new_n55887_ i1=$abc$109383$new_n55886_ nq=$abc$109383$new_n55888_
 .subckt nand3_x0 i0=$abc$109383$new_n55888_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n55889_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55735_ i2=soc.cpu.minerva.divider.remainder[10] nq=$abc$109383$new_n55890_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[11] nq=$abc$109383$new_n55891_
 .subckt nand3_x0 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ i2=$abc$109383$new_n55891_ nq=$abc$109383$new_n55892_
-.subckt oa22_x2 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ i2=$abc$109383$new_n55891_ q=$abc$109383$new_n55893_
+.subckt or21nand_x1 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ i2=$abc$109383$new_n55891_ nq=$abc$109383$new_n55893_
 .subckt nand3_x0 i0=$abc$109383$new_n55893_ i1=$abc$109383$new_n55892_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n55894_
-.subckt a2_x2 i0=$abc$109383$new_n55894_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55895_
+.subckt and2_x1 i0=$abc$109383$new_n55894_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55895_
 .subckt nand3_x0 i0=$abc$109383$new_n55895_ i1=$abc$109383$new_n55890_ i2=$abc$109383$new_n55889_ nq=$abc$109383$new_n55896_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29582_ q=$abc$109383$new_n55897_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55897_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55898_
-.subckt oa22_x2 i0=$abc$109383$new_n55898_ i1=$abc$109383$new_n55896_ i2=$abc$109383$new_n55885_ q=$abc$109383$new_n55899_
-.subckt a2_x2 i0=$abc$109383$new_n55899_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105366
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[12] q=$abc$109383$new_n55901_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29582_ q=$abc$109383$new_n55897_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55897_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55898_
+.subckt or21nand_x1 i0=$abc$109383$new_n55898_ i1=$abc$109383$new_n55896_ i2=$abc$109383$new_n55885_ nq=$abc$109383$new_n55899_
+.subckt and2_x1 i0=$abc$109383$new_n55899_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105366
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[12] nq=$abc$109383$new_n55901_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55569_ i2=soc.cpu.minerva.divider.remainder[11] nq=$abc$109383$new_n55902_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[10] i1=$abc$109383$new_n55642_ q=$abc$109383$new_n55903_
-.subckt a2_x2 i0=soc.cpu.minerva.divider.remainder[9] i1=$abc$109383$new_n55644_ q=$abc$109383$new_n55904_
-.subckt a3_x2 i0=$abc$109383$new_n55686_ i1=$abc$109383$new_n55648_ i2=$abc$109383$new_n55646_ q=$abc$109383$new_n55905_
-.subckt ao22_x2 i0=$abc$109383$new_n55905_ i1=$abc$109383$new_n55904_ i2=$abc$109383$new_n55641_ q=$abc$109383$new_n55906_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[10] i1=$abc$109383$new_n55642_ q=$abc$109383$new_n55903_
+.subckt and2_x1 i0=soc.cpu.minerva.divider.remainder[9] i1=$abc$109383$new_n55644_ q=$abc$109383$new_n55904_
+.subckt and3_x1 i0=$abc$109383$new_n55686_ i1=$abc$109383$new_n55648_ i2=$abc$109383$new_n55646_ q=$abc$109383$new_n55905_
+.subckt and21nor_x1 i0=$abc$109383$new_n55905_ i1=$abc$109383$new_n55904_ i2=$abc$109383$new_n55641_ nq=$abc$109383$new_n55906_
 .subckt nor2_x0 i0=$abc$109383$new_n55906_ i1=$abc$109383$new_n55903_ nq=$abc$109383$new_n55907_
-.subckt nxr2_x1 i0=$abc$109383$new_n55907_ i1=$abc$109383$new_n55639_ nq=$abc$109383$new_n55908_
+.subckt nexor2_x0 i0=$abc$109383$new_n55907_ i1=$abc$109383$new_n55639_ nq=$abc$109383$new_n55908_
 .subckt nand3_x0 i0=$abc$109383$new_n55908_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55713_ nq=$abc$109383$new_n55909_
-.subckt a2_x2 i0=$abc$109383$new_n55892_ i1=soc.cpu.minerva.divider.remainder[12] q=$abc$109383$new_n55910_
+.subckt and2_x1 i0=$abc$109383$new_n55892_ i1=soc.cpu.minerva.divider.remainder[12] q=$abc$109383$new_n55910_
 .subckt nand4_x0 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ i2=$abc$109383$new_n55891_ i3=$abc$109383$new_n55633_ nq=$abc$109383$new_n55911_
 .subckt nand2_x0 i0=$abc$109383$new_n55911_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n55912_
-.subckt ao22_x2 i0=$abc$109383$new_n55912_ i1=$abc$109383$new_n55910_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n55913_
+.subckt and21nor_x1 i0=$abc$109383$new_n55912_ i1=$abc$109383$new_n55910_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n55913_
 .subckt nand3_x0 i0=$abc$109383$new_n55913_ i1=$abc$109383$new_n55909_ i2=$abc$109383$new_n55902_ nq=$abc$109383$new_n55914_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29608_ q=$abc$109383$new_n55915_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55915_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55916_
-.subckt oa22_x2 i0=$abc$109383$new_n55916_ i1=$abc$109383$new_n55914_ i2=$abc$109383$new_n55901_ q=$abc$109383$new_n55917_
-.subckt a2_x2 i0=$abc$109383$new_n55917_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105370
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[13] q=$abc$109383$new_n55919_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29608_ q=$abc$109383$new_n55915_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55915_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55916_
+.subckt or21nand_x1 i0=$abc$109383$new_n55916_ i1=$abc$109383$new_n55914_ i2=$abc$109383$new_n55901_ nq=$abc$109383$new_n55917_
+.subckt and2_x1 i0=$abc$109383$new_n55917_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105370
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[13] nq=$abc$109383$new_n55919_
 .subckt buf_x4 i=$abc$109383$new_n54058_ q=$abc$109383$new_n55920_
-.subckt a2_x2 i0=$abc$109383$new_n55689_ i1=$abc$109383$new_n55638_ q=$abc$109383$new_n55921_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[12] i1=soc.cpu.minerva.divider.divisor[13] nq=$abc$109383$new_n55922_
-.subckt nxr2_x1 i0=$abc$109383$new_n55922_ i1=$abc$109383$new_n55921_ nq=$abc$109383$new_n55923_
+.subckt and2_x1 i0=$abc$109383$new_n55689_ i1=$abc$109383$new_n55638_ q=$abc$109383$new_n55921_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[12] i1=soc.cpu.minerva.divider.divisor[13] nq=$abc$109383$new_n55922_
+.subckt nexor2_x0 i0=$abc$109383$new_n55922_ i1=$abc$109383$new_n55921_ nq=$abc$109383$new_n55923_
 .subckt nand3_x0 i0=$abc$109383$new_n55923_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n55924_
 .subckt buf_x4 i=$abc$109383$new_n54057_ q=$abc$109383$new_n55925_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[12] nq=$abc$109383$new_n55926_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[13] nq=$abc$109383$new_n55927_
-.subckt a4_x2 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ i2=$abc$109383$new_n55891_ i3=$abc$109383$new_n55633_ q=$abc$109383$new_n55928_
+.subckt and4_x1 i0=$abc$109383$new_n55874_ i1=$abc$109383$new_n55640_ i2=$abc$109383$new_n55891_ i3=$abc$109383$new_n55633_ q=$abc$109383$new_n55928_
 .subckt nand2_x0 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ nq=$abc$109383$new_n55929_
-.subckt ao22_x2 i0=$abc$109383$new_n55927_ i1=$abc$109383$new_n55928_ i2=$abc$109383$new_n55782_ q=$abc$109383$new_n55930_
+.subckt and21nor_x1 i0=$abc$109383$new_n55927_ i1=$abc$109383$new_n55928_ i2=$abc$109383$new_n55782_ nq=$abc$109383$new_n55930_
 .subckt nand2_x0 i0=$abc$109383$new_n55930_ i1=$abc$109383$new_n55929_ nq=$abc$109383$new_n55931_
-.subckt a2_x2 i0=$abc$109383$new_n55931_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55932_
+.subckt and2_x1 i0=$abc$109383$new_n55931_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55932_
 .subckt nand3_x0 i0=$abc$109383$new_n55932_ i1=$abc$109383$new_n55926_ i2=$abc$109383$new_n55924_ nq=$abc$109383$new_n55933_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29632_ q=$abc$109383$new_n55934_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55934_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55935_
-.subckt oa22_x2 i0=$abc$109383$new_n55935_ i1=$abc$109383$new_n55933_ i2=$abc$109383$new_n55919_ q=$abc$109383$new_n55936_
-.subckt a2_x2 i0=$abc$109383$new_n55936_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105374
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[14] q=$abc$109383$new_n55938_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29632_ q=$abc$109383$new_n55934_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55934_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55935_
+.subckt or21nand_x1 i0=$abc$109383$new_n55935_ i1=$abc$109383$new_n55933_ i2=$abc$109383$new_n55919_ nq=$abc$109383$new_n55936_
+.subckt and2_x1 i0=$abc$109383$new_n55936_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105374
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[14] nq=$abc$109383$new_n55938_
 .subckt buf_x4 i=$abc$109383$new_n55715_ q=$abc$109383$new_n55939_
-.subckt oa22_x2 i0=$abc$109383$new_n55690_ i1=$abc$109383$new_n55634_ i2=$abc$109383$new_n55632_ q=$abc$109383$new_n55940_
-.subckt a2_x2 i0=$abc$109383$new_n55940_ i1=$abc$109383$new_n55691_ q=$abc$109383$new_n55941_
+.subckt or21nand_x1 i0=$abc$109383$new_n55690_ i1=$abc$109383$new_n55634_ i2=$abc$109383$new_n55632_ nq=$abc$109383$new_n55940_
+.subckt and2_x1 i0=$abc$109383$new_n55940_ i1=$abc$109383$new_n55691_ q=$abc$109383$new_n55941_
 .subckt nand3_x0 i0=$abc$109383$new_n55941_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n55942_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[13] nq=$abc$109383$new_n55943_
-.subckt oa22_x2 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ i2=$abc$109383$new_n55626_ q=$abc$109383$new_n55944_
+.subckt or21nand_x1 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ i2=$abc$109383$new_n55626_ nq=$abc$109383$new_n55944_
 .subckt nand3_x0 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ i2=$abc$109383$new_n55626_ nq=$abc$109383$new_n55945_
 .subckt nand3_x0 i0=$abc$109383$new_n55945_ i1=$abc$109383$new_n55944_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n55946_
-.subckt a2_x2 i0=$abc$109383$new_n55946_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55947_
+.subckt and2_x1 i0=$abc$109383$new_n55946_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55947_
 .subckt nand3_x0 i0=$abc$109383$new_n55947_ i1=$abc$109383$new_n55943_ i2=$abc$109383$new_n55942_ nq=$abc$109383$new_n55948_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29655_ q=$abc$109383$new_n55949_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55949_ i2=$abc$109383$new_n55790_ q=$abc$109383$new_n55950_
-.subckt oa22_x2 i0=$abc$109383$new_n55950_ i1=$abc$109383$new_n55948_ i2=$abc$109383$new_n55938_ q=$abc$109383$new_n55951_
-.subckt a2_x2 i0=$abc$109383$new_n55951_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105378
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[15] q=$abc$109383$new_n55953_
-.subckt a2_x2 i0=$abc$109383$new_n55691_ i1=$abc$109383$new_n55631_ q=$abc$109383$new_n55954_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[14] i1=soc.cpu.minerva.divider.divisor[15] nq=$abc$109383$new_n55955_
-.subckt nxr2_x1 i0=$abc$109383$new_n55955_ i1=$abc$109383$new_n55954_ nq=$abc$109383$new_n55956_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29655_ q=$abc$109383$new_n55949_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55949_ i2=$abc$109383$new_n55790_ nq=$abc$109383$new_n55950_
+.subckt or21nand_x1 i0=$abc$109383$new_n55950_ i1=$abc$109383$new_n55948_ i2=$abc$109383$new_n55938_ nq=$abc$109383$new_n55951_
+.subckt and2_x1 i0=$abc$109383$new_n55951_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105378
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[15] nq=$abc$109383$new_n55953_
+.subckt and2_x1 i0=$abc$109383$new_n55691_ i1=$abc$109383$new_n55631_ q=$abc$109383$new_n55954_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[14] i1=soc.cpu.minerva.divider.divisor[15] nq=$abc$109383$new_n55955_
+.subckt nexor2_x0 i0=$abc$109383$new_n55955_ i1=$abc$109383$new_n55954_ nq=$abc$109383$new_n55956_
 .subckt nand3_x0 i0=$abc$109383$new_n55956_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n55957_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[14] nq=$abc$109383$new_n55958_
-.subckt a2_x2 i0=$abc$109383$new_n55945_ i1=soc.cpu.minerva.divider.remainder[15] q=$abc$109383$new_n55959_
+.subckt and2_x1 i0=$abc$109383$new_n55945_ i1=soc.cpu.minerva.divider.remainder[15] q=$abc$109383$new_n55959_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[15] nq=$abc$109383$new_n55960_
 .subckt nand4_x0 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ i2=$abc$109383$new_n55626_ i3=$abc$109383$new_n55960_ nq=$abc$109383$new_n55961_
 .subckt nand2_x0 i0=$abc$109383$new_n55961_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n55962_
-.subckt ao22_x2 i0=$abc$109383$new_n55962_ i1=$abc$109383$new_n55959_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n55963_
+.subckt and21nor_x1 i0=$abc$109383$new_n55962_ i1=$abc$109383$new_n55959_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n55963_
 .subckt nand3_x0 i0=$abc$109383$new_n55963_ i1=$abc$109383$new_n55958_ i2=$abc$109383$new_n55957_ nq=$abc$109383$new_n55964_
 .subckt buf_x4 i=$abc$109383$new_n55123_ q=$abc$109383$new_n55965_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29676_ q=$abc$109383$new_n55966_
-.subckt ao22_x2 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55966_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n55967_
-.subckt oa22_x2 i0=$abc$109383$new_n55967_ i1=$abc$109383$new_n55964_ i2=$abc$109383$new_n55953_ q=$abc$109383$new_n55968_
-.subckt a2_x2 i0=$abc$109383$new_n55968_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105382
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[16] q=$abc$109383$new_n55970_
-.subckt oa22_x2 i0=$abc$109383$new_n55692_ i1=$abc$109383$new_n55627_ i2=$abc$109383$new_n55625_ q=$abc$109383$new_n55971_
-.subckt a2_x2 i0=$abc$109383$new_n55971_ i1=$abc$109383$new_n55693_ q=$abc$109383$new_n55972_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55807_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29676_ q=$abc$109383$new_n55966_
+.subckt and21nor_x1 i0=$abc$109383$new_n55809_ i1=$abc$109383$new_n55966_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n55967_
+.subckt or21nand_x1 i0=$abc$109383$new_n55967_ i1=$abc$109383$new_n55964_ i2=$abc$109383$new_n55953_ nq=$abc$109383$new_n55968_
+.subckt and2_x1 i0=$abc$109383$new_n55968_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105382
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[16] nq=$abc$109383$new_n55970_
+.subckt or21nand_x1 i0=$abc$109383$new_n55692_ i1=$abc$109383$new_n55627_ i2=$abc$109383$new_n55625_ nq=$abc$109383$new_n55971_
+.subckt and2_x1 i0=$abc$109383$new_n55971_ i1=$abc$109383$new_n55693_ q=$abc$109383$new_n55972_
 .subckt nand3_x0 i0=$abc$109383$new_n55972_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n55973_
 .subckt nand3_x0 i0=$abc$109383$new_n55799_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[15] nq=$abc$109383$new_n55974_
-.subckt a4_x2 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ i2=$abc$109383$new_n55626_ i3=$abc$109383$new_n55960_ q=$abc$109383$new_n55975_
+.subckt and4_x1 i0=$abc$109383$new_n55928_ i1=$abc$109383$new_n55927_ i2=$abc$109383$new_n55626_ i3=$abc$109383$new_n55960_ q=$abc$109383$new_n55975_
 .subckt nand2_x0 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ nq=$abc$109383$new_n55976_
-.subckt ao22_x2 i0=$abc$109383$new_n55619_ i1=$abc$109383$new_n55975_ i2=$abc$109383$new_n55782_ q=$abc$109383$new_n55977_
+.subckt and21nor_x1 i0=$abc$109383$new_n55619_ i1=$abc$109383$new_n55975_ i2=$abc$109383$new_n55782_ nq=$abc$109383$new_n55977_
 .subckt nand2_x0 i0=$abc$109383$new_n55977_ i1=$abc$109383$new_n55976_ nq=$abc$109383$new_n55978_
-.subckt a2_x2 i0=$abc$109383$new_n55978_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55979_
+.subckt and2_x1 i0=$abc$109383$new_n55978_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55979_
 .subckt nand3_x0 i0=$abc$109383$new_n55979_ i1=$abc$109383$new_n55974_ i2=$abc$109383$new_n55973_ nq=$abc$109383$new_n55980_
 .subckt buf_x4 i=$abc$109383$new_n55144_ q=$abc$109383$new_n55981_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29688_ q=$abc$109383$new_n55982_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n55828_ i3=$abc$109383$new_n29688_ q=$abc$109383$new_n55982_
 .subckt buf_x4 i=$abc$109383$new_n54052_ q=$abc$109383$new_n55983_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n55982_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n55984_
-.subckt oa22_x2 i0=$abc$109383$new_n55984_ i1=$abc$109383$new_n55980_ i2=$abc$109383$new_n55970_ q=$abc$109383$new_n55985_
-.subckt a2_x2 i0=$abc$109383$new_n55985_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105386
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n55982_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n55984_
+.subckt or21nand_x1 i0=$abc$109383$new_n55984_ i1=$abc$109383$new_n55980_ i2=$abc$109383$new_n55970_ nq=$abc$109383$new_n55985_
+.subckt and2_x1 i0=$abc$109383$new_n55985_ i1=$abc$109383$new_n55813_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105386
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n55987_
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[17] q=$abc$109383$new_n55988_
-.subckt a2_x2 i0=$abc$109383$new_n55693_ i1=$abc$109383$new_n55624_ q=$abc$109383$new_n55989_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[16] i1=soc.cpu.minerva.divider.divisor[17] nq=$abc$109383$new_n55990_
-.subckt nxr2_x1 i0=$abc$109383$new_n55990_ i1=$abc$109383$new_n55989_ nq=$abc$109383$new_n55991_
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[17] nq=$abc$109383$new_n55988_
+.subckt and2_x1 i0=$abc$109383$new_n55693_ i1=$abc$109383$new_n55624_ q=$abc$109383$new_n55989_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[16] i1=soc.cpu.minerva.divider.divisor[17] nq=$abc$109383$new_n55990_
+.subckt nexor2_x0 i0=$abc$109383$new_n55990_ i1=$abc$109383$new_n55989_ nq=$abc$109383$new_n55991_
 .subckt nand3_x0 i0=$abc$109383$new_n55991_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n55992_
 .subckt buf_x4 i=$abc$109383$new_n55710_ q=$abc$109383$new_n55993_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[16] nq=$abc$109383$new_n55994_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[17] nq=$abc$109383$new_n55995_
 .subckt nand3_x0 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ i2=$abc$109383$new_n55995_ nq=$abc$109383$new_n55996_
-.subckt oa22_x2 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ i2=$abc$109383$new_n55995_ q=$abc$109383$new_n55997_
+.subckt or21nand_x1 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ i2=$abc$109383$new_n55995_ nq=$abc$109383$new_n55997_
 .subckt nand3_x0 i0=$abc$109383$new_n55997_ i1=$abc$109383$new_n55996_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n55998_
-.subckt a2_x2 i0=$abc$109383$new_n55998_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55999_
+.subckt and2_x1 i0=$abc$109383$new_n55998_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n55999_
 .subckt nand3_x0 i0=$abc$109383$new_n55999_ i1=$abc$109383$new_n55994_ i2=$abc$109383$new_n55992_ nq=$abc$109383$new_n56000_
 .subckt buf_x4 i=$abc$109383$new_n54024_ q=$abc$109383$new_n56001_
-.subckt a4_x2 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29664_ q=$abc$109383$new_n56002_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56002_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56003_
-.subckt oa22_x2 i0=$abc$109383$new_n56003_ i1=$abc$109383$new_n56000_ i2=$abc$109383$new_n55988_ q=$abc$109383$new_n56004_
-.subckt a2_x2 i0=$abc$109383$new_n56004_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105390
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[18] q=$abc$109383$new_n56006_
-.subckt oa22_x2 i0=$abc$109383$new_n55694_ i1=$abc$109383$new_n55620_ i2=$abc$109383$new_n55618_ q=$abc$109383$new_n56007_
-.subckt a2_x2 i0=$abc$109383$new_n56007_ i1=$abc$109383$new_n55695_ q=$abc$109383$new_n56008_
+.subckt and4_x1 i0=$abc$109383$new_n55843_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29664_ q=$abc$109383$new_n56002_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56002_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56003_
+.subckt or21nand_x1 i0=$abc$109383$new_n56003_ i1=$abc$109383$new_n56000_ i2=$abc$109383$new_n55988_ nq=$abc$109383$new_n56004_
+.subckt and2_x1 i0=$abc$109383$new_n56004_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105390
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[18] nq=$abc$109383$new_n56006_
+.subckt or21nand_x1 i0=$abc$109383$new_n55694_ i1=$abc$109383$new_n55620_ i2=$abc$109383$new_n55618_ nq=$abc$109383$new_n56007_
+.subckt and2_x1 i0=$abc$109383$new_n56007_ i1=$abc$109383$new_n55695_ q=$abc$109383$new_n56008_
 .subckt nand3_x0 i0=$abc$109383$new_n56008_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n56009_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[17] nq=$abc$109383$new_n56010_
-.subckt a2_x2 i0=$abc$109383$new_n55996_ i1=soc.cpu.minerva.divider.remainder[18] q=$abc$109383$new_n56011_
+.subckt and2_x1 i0=$abc$109383$new_n55996_ i1=soc.cpu.minerva.divider.remainder[18] q=$abc$109383$new_n56011_
 .subckt nand4_x0 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ i2=$abc$109383$new_n55995_ i3=$abc$109383$new_n55612_ nq=$abc$109383$new_n56012_
 .subckt nand2_x0 i0=$abc$109383$new_n56012_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n56013_
-.subckt ao22_x2 i0=$abc$109383$new_n56013_ i1=$abc$109383$new_n56011_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n56014_
+.subckt and21nor_x1 i0=$abc$109383$new_n56013_ i1=$abc$109383$new_n56011_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n56014_
 .subckt nand3_x0 i0=$abc$109383$new_n56014_ i1=$abc$109383$new_n56010_ i2=$abc$109383$new_n56009_ nq=$abc$109383$new_n56015_
 .subckt buf_x4 i=$abc$109383$new_n54037_ q=$abc$109383$new_n56016_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29643_ q=$abc$109383$new_n56017_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56017_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56018_
-.subckt oa22_x2 i0=$abc$109383$new_n56018_ i1=$abc$109383$new_n56015_ i2=$abc$109383$new_n56006_ q=$abc$109383$new_n56019_
-.subckt a2_x2 i0=$abc$109383$new_n56019_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105394
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[19] q=$abc$109383$new_n56021_
-.subckt a2_x2 i0=$abc$109383$new_n55695_ i1=$abc$109383$new_n55617_ q=$abc$109383$new_n56022_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[18] i1=soc.cpu.minerva.divider.divisor[19] nq=$abc$109383$new_n56023_
-.subckt nxr2_x1 i0=$abc$109383$new_n56023_ i1=$abc$109383$new_n56022_ nq=$abc$109383$new_n56024_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29643_ q=$abc$109383$new_n56017_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56017_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56018_
+.subckt or21nand_x1 i0=$abc$109383$new_n56018_ i1=$abc$109383$new_n56015_ i2=$abc$109383$new_n56006_ nq=$abc$109383$new_n56019_
+.subckt and2_x1 i0=$abc$109383$new_n56019_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105394
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n55864_ i2=soc.cpu.minerva.divider.remainder[19] nq=$abc$109383$new_n56021_
+.subckt and2_x1 i0=$abc$109383$new_n55695_ i1=$abc$109383$new_n55617_ q=$abc$109383$new_n56022_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[18] i1=soc.cpu.minerva.divider.divisor[19] nq=$abc$109383$new_n56023_
+.subckt nexor2_x0 i0=$abc$109383$new_n56023_ i1=$abc$109383$new_n56022_ nq=$abc$109383$new_n56024_
 .subckt nand3_x0 i0=$abc$109383$new_n56024_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n56025_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[18] nq=$abc$109383$new_n56026_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[19] nq=$abc$109383$new_n56027_
-.subckt a4_x2 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ i2=$abc$109383$new_n55995_ i3=$abc$109383$new_n55612_ q=$abc$109383$new_n56028_
+.subckt and4_x1 i0=$abc$109383$new_n55975_ i1=$abc$109383$new_n55619_ i2=$abc$109383$new_n55995_ i3=$abc$109383$new_n55612_ q=$abc$109383$new_n56028_
 .subckt nand2_x0 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ nq=$abc$109383$new_n56029_
-.subckt ao22_x2 i0=$abc$109383$new_n56027_ i1=$abc$109383$new_n56028_ i2=$abc$109383$new_n55782_ q=$abc$109383$new_n56030_
+.subckt and21nor_x1 i0=$abc$109383$new_n56027_ i1=$abc$109383$new_n56028_ i2=$abc$109383$new_n55782_ nq=$abc$109383$new_n56030_
 .subckt nand2_x0 i0=$abc$109383$new_n56030_ i1=$abc$109383$new_n56029_ nq=$abc$109383$new_n56031_
-.subckt a2_x2 i0=$abc$109383$new_n56031_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n56032_
+.subckt and2_x1 i0=$abc$109383$new_n56031_ i1=$abc$109383$new_n55781_ q=$abc$109383$new_n56032_
 .subckt nand3_x0 i0=$abc$109383$new_n56032_ i1=$abc$109383$new_n56026_ i2=$abc$109383$new_n56025_ nq=$abc$109383$new_n56033_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29620_ q=$abc$109383$new_n56034_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56034_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56035_
-.subckt oa22_x2 i0=$abc$109383$new_n56035_ i1=$abc$109383$new_n56033_ i2=$abc$109383$new_n56021_ q=$abc$109383$new_n56036_
-.subckt a2_x2 i0=$abc$109383$new_n56036_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105398
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29620_ q=$abc$109383$new_n56034_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56034_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56035_
+.subckt or21nand_x1 i0=$abc$109383$new_n56035_ i1=$abc$109383$new_n56033_ i2=$abc$109383$new_n56021_ nq=$abc$109383$new_n56036_
+.subckt and2_x1 i0=$abc$109383$new_n56036_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105398
 .subckt buf_x4 i=$abc$109383$new_n55524_ q=$abc$109383$new_n56038_
-.subckt ao22_x2 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[20] q=$abc$109383$new_n56039_
+.subckt and21nor_x1 i0=$abc$109383$new_n55884_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[20] nq=$abc$109383$new_n56039_
 .subckt nand3_x0 i0=$abc$109383$new_n55696_ i1=$abc$109383$new_n55613_ i2=$abc$109383$new_n55611_ nq=$abc$109383$new_n56040_
-.subckt oa22_x2 i0=$abc$109383$new_n55696_ i1=$abc$109383$new_n55613_ i2=$abc$109383$new_n55611_ q=$abc$109383$new_n56041_
-.subckt a2_x2 i0=$abc$109383$new_n56041_ i1=$abc$109383$new_n56040_ q=$abc$109383$new_n56042_
+.subckt or21nand_x1 i0=$abc$109383$new_n55696_ i1=$abc$109383$new_n55613_ i2=$abc$109383$new_n55611_ nq=$abc$109383$new_n56041_
+.subckt and2_x1 i0=$abc$109383$new_n56041_ i1=$abc$109383$new_n56040_ q=$abc$109383$new_n56042_
 .subckt nand3_x0 i0=$abc$109383$new_n56042_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n56043_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[19] nq=$abc$109383$new_n56044_
-.subckt oa22_x2 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ i2=$abc$109383$new_n55607_ q=$abc$109383$new_n56045_
+.subckt or21nand_x1 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ i2=$abc$109383$new_n55607_ nq=$abc$109383$new_n56045_
 .subckt nand3_x0 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ i2=$abc$109383$new_n55607_ nq=$abc$109383$new_n56046_
 .subckt nand3_x0 i0=$abc$109383$new_n56046_ i1=$abc$109383$new_n56045_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n56047_
-.subckt a2_x2 i0=$abc$109383$new_n56047_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56048_
+.subckt and2_x1 i0=$abc$109383$new_n56047_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56048_
 .subckt nand3_x0 i0=$abc$109383$new_n56048_ i1=$abc$109383$new_n56044_ i2=$abc$109383$new_n56043_ nq=$abc$109383$new_n56049_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29594_ q=$abc$109383$new_n56050_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56050_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56051_
-.subckt oa22_x2 i0=$abc$109383$new_n56051_ i1=$abc$109383$new_n56049_ i2=$abc$109383$new_n56039_ q=$abc$109383$new_n56052_
-.subckt a2_x2 i0=$abc$109383$new_n56052_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105402
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29594_ q=$abc$109383$new_n56050_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56050_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56051_
+.subckt or21nand_x1 i0=$abc$109383$new_n56051_ i1=$abc$109383$new_n56049_ i2=$abc$109383$new_n56039_ nq=$abc$109383$new_n56052_
+.subckt and2_x1 i0=$abc$109383$new_n56052_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105402
 .subckt buf_x4 i=$abc$109383$new_n55566_ q=$abc$109383$new_n56054_
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[21] q=$abc$109383$new_n56055_
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[21] nq=$abc$109383$new_n56055_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55713_ i2=soc.cpu.minerva.divider.remainder[20] nq=$abc$109383$new_n56056_
 .subckt nand2_x0 i0=soc.cpu.minerva.divider.remainder[19] i1=$abc$109383$new_n55609_ nq=$abc$109383$new_n56057_
-.subckt a2_x2 i0=$abc$109383$new_n56040_ i1=$abc$109383$new_n56057_ q=$abc$109383$new_n56058_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[20] i1=soc.cpu.minerva.divider.divisor[21] nq=$abc$109383$new_n56059_
-.subckt nxr2_x1 i0=$abc$109383$new_n56059_ i1=$abc$109383$new_n56058_ nq=$abc$109383$new_n56060_
+.subckt and2_x1 i0=$abc$109383$new_n56040_ i1=$abc$109383$new_n56057_ q=$abc$109383$new_n56058_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[20] i1=soc.cpu.minerva.divider.divisor[21] nq=$abc$109383$new_n56059_
+.subckt nexor2_x0 i0=$abc$109383$new_n56059_ i1=$abc$109383$new_n56058_ nq=$abc$109383$new_n56060_
 .subckt nand3_x0 i0=$abc$109383$new_n56060_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55713_ nq=$abc$109383$new_n56061_
-.subckt a2_x2 i0=$abc$109383$new_n56046_ i1=soc.cpu.minerva.divider.remainder[21] q=$abc$109383$new_n56062_
+.subckt and2_x1 i0=$abc$109383$new_n56046_ i1=soc.cpu.minerva.divider.remainder[21] q=$abc$109383$new_n56062_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[21] nq=$abc$109383$new_n56063_
 .subckt nand4_x0 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ i2=$abc$109383$new_n55607_ i3=$abc$109383$new_n56063_ nq=$abc$109383$new_n56064_
 .subckt nand2_x0 i0=$abc$109383$new_n56064_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n56065_
-.subckt ao22_x2 i0=$abc$109383$new_n56065_ i1=$abc$109383$new_n56062_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n56066_
+.subckt and21nor_x1 i0=$abc$109383$new_n56065_ i1=$abc$109383$new_n56062_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n56066_
 .subckt nand3_x0 i0=$abc$109383$new_n56066_ i1=$abc$109383$new_n56061_ i2=$abc$109383$new_n56056_ nq=$abc$109383$new_n56067_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29570_ q=$abc$109383$new_n56068_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56068_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56069_
-.subckt oa22_x2 i0=$abc$109383$new_n56069_ i1=$abc$109383$new_n56067_ i2=$abc$109383$new_n56055_ q=$abc$109383$new_n56070_
-.subckt a2_x2 i0=$abc$109383$new_n56070_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105406
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[22] q=$abc$109383$new_n56072_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29570_ q=$abc$109383$new_n56068_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56068_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56069_
+.subckt or21nand_x1 i0=$abc$109383$new_n56069_ i1=$abc$109383$new_n56067_ i2=$abc$109383$new_n56055_ nq=$abc$109383$new_n56070_
+.subckt and2_x1 i0=$abc$109383$new_n56070_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105406
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[22] nq=$abc$109383$new_n56072_
 .subckt nor3_x0 i0=$abc$109383$new_n55698_ i1=$abc$109383$new_n55606_ i2=$abc$109383$new_n55604_ nq=$abc$109383$new_n56073_
 .subckt nor2_x0 i0=$abc$109383$new_n56073_ i1=$abc$109383$new_n55699_ nq=$abc$109383$new_n56074_
 .subckt nand3_x0 i0=$abc$109383$new_n56074_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n56075_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[21] nq=$abc$109383$new_n56076_
-.subckt a4_x2 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ i2=$abc$109383$new_n55607_ i3=$abc$109383$new_n56063_ q=$abc$109383$new_n56077_
+.subckt and4_x1 i0=$abc$109383$new_n56028_ i1=$abc$109383$new_n56027_ i2=$abc$109383$new_n55607_ i3=$abc$109383$new_n56063_ q=$abc$109383$new_n56077_
 .subckt nand2_x0 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ nq=$abc$109383$new_n56078_
-.subckt ao22_x2 i0=$abc$109383$new_n55600_ i1=$abc$109383$new_n56077_ i2=$abc$109383$new_n55782_ q=$abc$109383$new_n56079_
+.subckt and21nor_x1 i0=$abc$109383$new_n55600_ i1=$abc$109383$new_n56077_ i2=$abc$109383$new_n55782_ nq=$abc$109383$new_n56079_
 .subckt nand2_x0 i0=$abc$109383$new_n56079_ i1=$abc$109383$new_n56078_ nq=$abc$109383$new_n56080_
-.subckt a2_x2 i0=$abc$109383$new_n56080_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56081_
+.subckt and2_x1 i0=$abc$109383$new_n56080_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56081_
 .subckt nand3_x0 i0=$abc$109383$new_n56081_ i1=$abc$109383$new_n56076_ i2=$abc$109383$new_n56075_ nq=$abc$109383$new_n56082_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29544_ q=$abc$109383$new_n56083_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56083_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56084_
-.subckt oa22_x2 i0=$abc$109383$new_n56084_ i1=$abc$109383$new_n56082_ i2=$abc$109383$new_n56072_ q=$abc$109383$new_n56085_
-.subckt a2_x2 i0=$abc$109383$new_n56085_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105410
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[23] q=$abc$109383$new_n56087_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29544_ q=$abc$109383$new_n56083_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56083_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56084_
+.subckt or21nand_x1 i0=$abc$109383$new_n56084_ i1=$abc$109383$new_n56082_ i2=$abc$109383$new_n56072_ nq=$abc$109383$new_n56085_
+.subckt and2_x1 i0=$abc$109383$new_n56085_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105410
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[23] nq=$abc$109383$new_n56087_
 .subckt nor2_x0 i0=$abc$109383$new_n55699_ i1=$abc$109383$new_n55603_ nq=$abc$109383$new_n56088_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[22] i1=soc.cpu.minerva.divider.divisor[23] nq=$abc$109383$new_n56089_
-.subckt nxr2_x1 i0=$abc$109383$new_n56089_ i1=$abc$109383$new_n56088_ nq=$abc$109383$new_n56090_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[22] i1=soc.cpu.minerva.divider.divisor[23] nq=$abc$109383$new_n56089_
+.subckt nexor2_x0 i0=$abc$109383$new_n56089_ i1=$abc$109383$new_n56088_ nq=$abc$109383$new_n56090_
 .subckt nand3_x0 i0=$abc$109383$new_n56090_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55920_ nq=$abc$109383$new_n56091_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n55925_ i2=soc.cpu.minerva.divider.remainder[22] nq=$abc$109383$new_n56092_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[23] nq=$abc$109383$new_n56093_
 .subckt nand3_x0 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ i2=$abc$109383$new_n56093_ nq=$abc$109383$new_n56094_
-.subckt oa22_x2 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ i2=$abc$109383$new_n56093_ q=$abc$109383$new_n56095_
+.subckt or21nand_x1 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ i2=$abc$109383$new_n56093_ nq=$abc$109383$new_n56095_
 .subckt nand3_x0 i0=$abc$109383$new_n56095_ i1=$abc$109383$new_n56094_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n56096_
-.subckt a2_x2 i0=$abc$109383$new_n56096_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56097_
+.subckt and2_x1 i0=$abc$109383$new_n56096_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56097_
 .subckt nand3_x0 i0=$abc$109383$new_n56097_ i1=$abc$109383$new_n56092_ i2=$abc$109383$new_n56091_ nq=$abc$109383$new_n56098_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29521_ q=$abc$109383$new_n56099_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56099_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56100_
-.subckt oa22_x2 i0=$abc$109383$new_n56100_ i1=$abc$109383$new_n56098_ i2=$abc$109383$new_n56087_ q=$abc$109383$new_n56101_
-.subckt a2_x2 i0=$abc$109383$new_n56101_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105414
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[24] q=$abc$109383$new_n56103_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29521_ q=$abc$109383$new_n56099_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56099_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56100_
+.subckt or21nand_x1 i0=$abc$109383$new_n56100_ i1=$abc$109383$new_n56098_ i2=$abc$109383$new_n56087_ nq=$abc$109383$new_n56101_
+.subckt and2_x1 i0=$abc$109383$new_n56101_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105414
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[24] nq=$abc$109383$new_n56103_
 .subckt nor3_x0 i0=$abc$109383$new_n55700_ i1=$abc$109383$new_n55599_ i2=$abc$109383$new_n55597_ nq=$abc$109383$new_n56104_
 .subckt nor2_x0 i0=$abc$109383$new_n56104_ i1=$abc$109383$new_n55701_ nq=$abc$109383$new_n56105_
 .subckt nand3_x0 i0=$abc$109383$new_n56105_ i1=$abc$109383$new_n55939_ i2=$abc$109383$new_n55569_ nq=$abc$109383$new_n56106_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n54058_ i2=soc.cpu.minerva.divider.remainder[23] nq=$abc$109383$new_n56107_
-.subckt a2_x2 i0=$abc$109383$new_n56094_ i1=soc.cpu.minerva.divider.remainder[24] q=$abc$109383$new_n56108_
+.subckt and2_x1 i0=$abc$109383$new_n56094_ i1=soc.cpu.minerva.divider.remainder[24] q=$abc$109383$new_n56108_
 .subckt nand4_x0 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ i2=$abc$109383$new_n56093_ i3=$abc$109383$new_n55593_ nq=$abc$109383$new_n56109_
 .subckt nand2_x0 i0=$abc$109383$new_n56109_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n56110_
-.subckt ao22_x2 i0=$abc$109383$new_n56110_ i1=$abc$109383$new_n56108_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n56111_
+.subckt and21nor_x1 i0=$abc$109383$new_n56110_ i1=$abc$109383$new_n56108_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n56111_
 .subckt nand3_x0 i0=$abc$109383$new_n56111_ i1=$abc$109383$new_n56107_ i2=$abc$109383$new_n56106_ nq=$abc$109383$new_n56112_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29365_ q=$abc$109383$new_n56113_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56113_ i2=$abc$109383$new_n55965_ q=$abc$109383$new_n56114_
-.subckt oa22_x2 i0=$abc$109383$new_n56114_ i1=$abc$109383$new_n56112_ i2=$abc$109383$new_n56103_ q=$abc$109383$new_n56115_
-.subckt a2_x2 i0=$abc$109383$new_n56115_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105418
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[25] q=$abc$109383$new_n56117_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29365_ q=$abc$109383$new_n56113_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56113_ i2=$abc$109383$new_n55965_ nq=$abc$109383$new_n56114_
+.subckt or21nand_x1 i0=$abc$109383$new_n56114_ i1=$abc$109383$new_n56112_ i2=$abc$109383$new_n56103_ nq=$abc$109383$new_n56115_
+.subckt and2_x1 i0=$abc$109383$new_n56115_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105418
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[25] nq=$abc$109383$new_n56117_
 .subckt nor2_x0 i0=$abc$109383$new_n55701_ i1=$abc$109383$new_n55596_ nq=$abc$109383$new_n56118_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[24] i1=soc.cpu.minerva.divider.divisor[25] nq=$abc$109383$new_n56119_
-.subckt nxr2_x1 i0=$abc$109383$new_n56119_ i1=$abc$109383$new_n56118_ nq=$abc$109383$new_n56120_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[24] i1=soc.cpu.minerva.divider.divisor[25] nq=$abc$109383$new_n56119_
+.subckt nexor2_x0 i0=$abc$109383$new_n56119_ i1=$abc$109383$new_n56118_ nq=$abc$109383$new_n56120_
 .subckt nand3_x0 i0=$abc$109383$new_n56120_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55569_ nq=$abc$109383$new_n56121_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n54058_ i2=soc.cpu.minerva.divider.remainder[24] nq=$abc$109383$new_n56122_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[25] nq=$abc$109383$new_n56123_
-.subckt a4_x2 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ i2=$abc$109383$new_n56093_ i3=$abc$109383$new_n55593_ q=$abc$109383$new_n56124_
+.subckt and4_x1 i0=$abc$109383$new_n56077_ i1=$abc$109383$new_n55600_ i2=$abc$109383$new_n56093_ i3=$abc$109383$new_n55593_ q=$abc$109383$new_n56124_
 .subckt nand2_x0 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ nq=$abc$109383$new_n56125_
-.subckt ao22_x2 i0=$abc$109383$new_n56123_ i1=$abc$109383$new_n56124_ i2=$abc$109383$new_n55782_ q=$abc$109383$new_n56126_
+.subckt and21nor_x1 i0=$abc$109383$new_n56123_ i1=$abc$109383$new_n56124_ i2=$abc$109383$new_n55782_ nq=$abc$109383$new_n56126_
 .subckt nand2_x0 i0=$abc$109383$new_n56126_ i1=$abc$109383$new_n56125_ nq=$abc$109383$new_n56127_
-.subckt a2_x2 i0=$abc$109383$new_n56127_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56128_
+.subckt and2_x1 i0=$abc$109383$new_n56127_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56128_
 .subckt nand3_x0 i0=$abc$109383$new_n56128_ i1=$abc$109383$new_n56122_ i2=$abc$109383$new_n56121_ nq=$abc$109383$new_n56129_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29342_ q=$abc$109383$new_n56130_
-.subckt ao22_x2 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56130_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56131_
-.subckt oa22_x2 i0=$abc$109383$new_n56131_ i1=$abc$109383$new_n56129_ i2=$abc$109383$new_n56117_ q=$abc$109383$new_n56132_
-.subckt a2_x2 i0=$abc$109383$new_n56132_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105422
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[26] q=$abc$109383$new_n56134_
-.subckt xr2_x1 i0=soc.cpu.minerva.divider.remainder[25] i1=soc.cpu.minerva.divider.divisor[26] q=$abc$109383$new_n56135_
-.subckt o2_x2 i0=$abc$109383$new_n55702_ i1=$abc$109383$new_n55592_ q=$abc$109383$new_n56136_
-.subckt nxr2_x1 i0=$abc$109383$new_n56136_ i1=$abc$109383$new_n56135_ nq=$abc$109383$new_n56137_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55981_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29342_ q=$abc$109383$new_n56130_
+.subckt and21nor_x1 i0=$abc$109383$new_n55983_ i1=$abc$109383$new_n56130_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56131_
+.subckt or21nand_x1 i0=$abc$109383$new_n56131_ i1=$abc$109383$new_n56129_ i2=$abc$109383$new_n56117_ nq=$abc$109383$new_n56132_
+.subckt and2_x1 i0=$abc$109383$new_n56132_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105422
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[26] nq=$abc$109383$new_n56134_
+.subckt xor2_x0 i0=soc.cpu.minerva.divider.remainder[25] i1=soc.cpu.minerva.divider.divisor[26] q=$abc$109383$new_n56135_
+.subckt or2_x1 i0=$abc$109383$new_n55702_ i1=$abc$109383$new_n55592_ q=$abc$109383$new_n56136_
+.subckt nexor2_x0 i0=$abc$109383$new_n56136_ i1=$abc$109383$new_n56135_ nq=$abc$109383$new_n56137_
 .subckt nand3_x0 i0=$abc$109383$new_n56137_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55569_ nq=$abc$109383$new_n56138_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n54058_ i2=soc.cpu.minerva.divider.remainder[25] nq=$abc$109383$new_n56139_
-.subckt oa22_x2 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ i2=$abc$109383$new_n55586_ q=$abc$109383$new_n56140_
+.subckt or21nand_x1 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ i2=$abc$109383$new_n55586_ nq=$abc$109383$new_n56140_
 .subckt nand3_x0 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ i2=$abc$109383$new_n55586_ nq=$abc$109383$new_n56141_
 .subckt nand3_x0 i0=$abc$109383$new_n56141_ i1=$abc$109383$new_n56140_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n56142_
-.subckt a2_x2 i0=$abc$109383$new_n56142_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56143_
+.subckt and2_x1 i0=$abc$109383$new_n56142_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56143_
 .subckt nand3_x0 i0=$abc$109383$new_n56143_ i1=$abc$109383$new_n56139_ i2=$abc$109383$new_n56138_ nq=$abc$109383$new_n56144_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29309_ q=$abc$109383$new_n56145_
-.subckt ao22_x2 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56145_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56146_
-.subckt oa22_x2 i0=$abc$109383$new_n56146_ i1=$abc$109383$new_n56144_ i2=$abc$109383$new_n56134_ q=$abc$109383$new_n56147_
-.subckt a2_x2 i0=$abc$109383$new_n56147_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105426
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n56001_ i3=$abc$109383$new_n29309_ q=$abc$109383$new_n56145_
+.subckt and21nor_x1 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56145_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56146_
+.subckt or21nand_x1 i0=$abc$109383$new_n56146_ i1=$abc$109383$new_n56144_ i2=$abc$109383$new_n56134_ nq=$abc$109383$new_n56147_
+.subckt and2_x1 i0=$abc$109383$new_n56147_ i1=$abc$109383$new_n55987_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105426
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n56149_
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[27] q=$abc$109383$new_n56150_
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[27] nq=$abc$109383$new_n56150_
 .subckt nor2_x0 i0=$abc$109383$new_n55703_ i1=$abc$109383$new_n55589_ nq=$abc$109383$new_n56151_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[26] i1=soc.cpu.minerva.divider.divisor[27] nq=$abc$109383$new_n56152_
-.subckt nxr2_x1 i0=$abc$109383$new_n56152_ i1=$abc$109383$new_n56151_ nq=$abc$109383$new_n56153_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[26] i1=soc.cpu.minerva.divider.divisor[27] nq=$abc$109383$new_n56152_
+.subckt nexor2_x0 i0=$abc$109383$new_n56152_ i1=$abc$109383$new_n56151_ nq=$abc$109383$new_n56153_
 .subckt nand3_x0 i0=$abc$109383$new_n56153_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55569_ nq=$abc$109383$new_n56154_
 .subckt nand3_x0 i0=$abc$109383$new_n55993_ i1=$abc$109383$new_n54058_ i2=soc.cpu.minerva.divider.remainder[26] nq=$abc$109383$new_n56155_
-.subckt a2_x2 i0=$abc$109383$new_n56141_ i1=soc.cpu.minerva.divider.remainder[27] q=$abc$109383$new_n56156_
+.subckt and2_x1 i0=$abc$109383$new_n56141_ i1=soc.cpu.minerva.divider.remainder[27] q=$abc$109383$new_n56156_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[27] nq=$abc$109383$new_n56157_
 .subckt nand4_x0 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ i2=$abc$109383$new_n55586_ i3=$abc$109383$new_n56157_ nq=$abc$109383$new_n56158_
 .subckt nand2_x0 i0=$abc$109383$new_n56158_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n56159_
-.subckt ao22_x2 i0=$abc$109383$new_n56159_ i1=$abc$109383$new_n56156_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n56160_
+.subckt and21nor_x1 i0=$abc$109383$new_n56159_ i1=$abc$109383$new_n56156_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n56160_
 .subckt nand3_x0 i0=$abc$109383$new_n56160_ i1=$abc$109383$new_n56155_ i2=$abc$109383$new_n56154_ nq=$abc$109383$new_n56161_
-.subckt a4_x2 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29285_ q=$abc$109383$new_n56162_
-.subckt ao22_x2 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56162_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56163_
-.subckt oa22_x2 i0=$abc$109383$new_n56163_ i1=$abc$109383$new_n56161_ i2=$abc$109383$new_n56150_ q=$abc$109383$new_n56164_
-.subckt a2_x2 i0=$abc$109383$new_n56164_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105430
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[28] q=$abc$109383$new_n56166_
+.subckt and4_x1 i0=$abc$109383$new_n56016_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29285_ q=$abc$109383$new_n56162_
+.subckt and21nor_x1 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56162_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56163_
+.subckt or21nand_x1 i0=$abc$109383$new_n56163_ i1=$abc$109383$new_n56161_ i2=$abc$109383$new_n56150_ nq=$abc$109383$new_n56164_
+.subckt and2_x1 i0=$abc$109383$new_n56164_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105430
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[28] nq=$abc$109383$new_n56166_
 .subckt nor3_x0 i0=$abc$109383$new_n55704_ i1=$abc$109383$new_n55585_ i2=$abc$109383$new_n55583_ nq=$abc$109383$new_n56167_
 .subckt nor2_x0 i0=$abc$109383$new_n56167_ i1=$abc$109383$new_n55705_ nq=$abc$109383$new_n56168_
 .subckt nand3_x0 i0=$abc$109383$new_n56168_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55569_ nq=$abc$109383$new_n56169_
 .subckt nand3_x0 i0=$abc$109383$new_n55710_ i1=$abc$109383$new_n54058_ i2=soc.cpu.minerva.divider.remainder[27] nq=$abc$109383$new_n56170_
-.subckt a4_x2 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ i2=$abc$109383$new_n55586_ i3=$abc$109383$new_n56157_ q=$abc$109383$new_n56171_
+.subckt and4_x1 i0=$abc$109383$new_n56124_ i1=$abc$109383$new_n56123_ i2=$abc$109383$new_n55586_ i3=$abc$109383$new_n56157_ q=$abc$109383$new_n56171_
 .subckt nand2_x0 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ nq=$abc$109383$new_n56172_
-.subckt ao22_x2 i0=$abc$109383$new_n55579_ i1=$abc$109383$new_n56171_ i2=$abc$109383$new_n55782_ q=$abc$109383$new_n56173_
+.subckt and21nor_x1 i0=$abc$109383$new_n55579_ i1=$abc$109383$new_n56171_ i2=$abc$109383$new_n55782_ nq=$abc$109383$new_n56173_
 .subckt nand2_x0 i0=$abc$109383$new_n56173_ i1=$abc$109383$new_n56172_ nq=$abc$109383$new_n56174_
-.subckt a2_x2 i0=$abc$109383$new_n56174_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56175_
+.subckt and2_x1 i0=$abc$109383$new_n56174_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56175_
 .subckt nand3_x0 i0=$abc$109383$new_n56175_ i1=$abc$109383$new_n56170_ i2=$abc$109383$new_n56169_ nq=$abc$109383$new_n56176_
-.subckt a4_x2 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29433_ q=$abc$109383$new_n56177_
-.subckt ao22_x2 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56177_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56178_
-.subckt oa22_x2 i0=$abc$109383$new_n56178_ i1=$abc$109383$new_n56176_ i2=$abc$109383$new_n56166_ q=$abc$109383$new_n56179_
-.subckt a2_x2 i0=$abc$109383$new_n56179_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105434
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[29] q=$abc$109383$new_n56181_
+.subckt and4_x1 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29433_ q=$abc$109383$new_n56177_
+.subckt and21nor_x1 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56177_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56178_
+.subckt or21nand_x1 i0=$abc$109383$new_n56178_ i1=$abc$109383$new_n56176_ i2=$abc$109383$new_n56166_ nq=$abc$109383$new_n56179_
+.subckt and2_x1 i0=$abc$109383$new_n56179_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105434
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n56038_ i2=soc.cpu.minerva.divider.remainder[29] nq=$abc$109383$new_n56181_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55713_ i2=soc.cpu.minerva.divider.remainder[28] nq=$abc$109383$new_n56182_
 .subckt nor2_x0 i0=$abc$109383$new_n55705_ i1=$abc$109383$new_n55582_ nq=$abc$109383$new_n56183_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[28] i1=soc.cpu.minerva.divider.divisor[29] nq=$abc$109383$new_n56184_
-.subckt nxr2_x1 i0=$abc$109383$new_n56184_ i1=$abc$109383$new_n56183_ nq=$abc$109383$new_n56185_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[28] i1=soc.cpu.minerva.divider.divisor[29] nq=$abc$109383$new_n56184_
+.subckt nexor2_x0 i0=$abc$109383$new_n56184_ i1=$abc$109383$new_n56183_ nq=$abc$109383$new_n56185_
 .subckt nand3_x0 i0=$abc$109383$new_n56185_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55713_ nq=$abc$109383$new_n56186_
 .subckt inv_x0 i=soc.cpu.minerva.divider.remainder[29] nq=$abc$109383$new_n56187_
 .subckt nand3_x0 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ i2=$abc$109383$new_n56187_ nq=$abc$109383$new_n56188_
-.subckt oa22_x2 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ i2=$abc$109383$new_n56187_ q=$abc$109383$new_n56189_
+.subckt or21nand_x1 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ i2=$abc$109383$new_n56187_ nq=$abc$109383$new_n56189_
 .subckt nand3_x0 i0=$abc$109383$new_n56189_ i1=$abc$109383$new_n56188_ i2=$abc$109383$new_n55783_ nq=$abc$109383$new_n56190_
-.subckt a2_x2 i0=$abc$109383$new_n56190_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56191_
+.subckt and2_x1 i0=$abc$109383$new_n56190_ i1=$abc$109383$new_n55730_ q=$abc$109383$new_n56191_
 .subckt nand3_x0 i0=$abc$109383$new_n56191_ i1=$abc$109383$new_n56186_ i2=$abc$109383$new_n56182_ nq=$abc$109383$new_n56192_
-.subckt a4_x2 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29406_ q=$abc$109383$new_n56193_
-.subckt ao22_x2 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56193_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56194_
-.subckt oa22_x2 i0=$abc$109383$new_n56194_ i1=$abc$109383$new_n56192_ i2=$abc$109383$new_n56181_ q=$abc$109383$new_n56195_
-.subckt a2_x2 i0=$abc$109383$new_n56195_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105438
-.subckt ao22_x2 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n55524_ i2=soc.cpu.minerva.divider.remainder[30] q=$abc$109383$new_n56197_
+.subckt and4_x1 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29406_ q=$abc$109383$new_n56193_
+.subckt and21nor_x1 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56193_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56194_
+.subckt or21nand_x1 i0=$abc$109383$new_n56194_ i1=$abc$109383$new_n56192_ i2=$abc$109383$new_n56181_ nq=$abc$109383$new_n56195_
+.subckt and2_x1 i0=$abc$109383$new_n56195_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105438
+.subckt and21nor_x1 i0=$abc$109383$new_n56054_ i1=$abc$109383$new_n55524_ i2=soc.cpu.minerva.divider.remainder[30] nq=$abc$109383$new_n56197_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55713_ i2=soc.cpu.minerva.divider.remainder[29] nq=$abc$109383$new_n56198_
 .subckt nor3_x0 i0=$abc$109383$new_n55706_ i1=$abc$109383$new_n55578_ i2=$abc$109383$new_n55576_ nq=$abc$109383$new_n56199_
 .subckt nor2_x0 i0=$abc$109383$new_n56199_ i1=$abc$109383$new_n55707_ nq=$abc$109383$new_n56200_
 .subckt nand3_x0 i0=$abc$109383$new_n56200_ i1=$abc$109383$new_n55716_ i2=$abc$109383$new_n55713_ nq=$abc$109383$new_n56201_
-.subckt a2_x2 i0=$abc$109383$new_n56188_ i1=soc.cpu.minerva.divider.remainder[30] q=$abc$109383$new_n56202_
+.subckt and2_x1 i0=$abc$109383$new_n56188_ i1=soc.cpu.minerva.divider.remainder[30] q=$abc$109383$new_n56202_
 .subckt nand4_x0 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ i2=$abc$109383$new_n56187_ i3=$abc$109383$new_n55572_ nq=$abc$109383$new_n56203_
 .subckt nand2_x0 i0=$abc$109383$new_n56203_ i1=$abc$109383$new_n55823_ nq=$abc$109383$new_n56204_
-.subckt ao22_x2 i0=$abc$109383$new_n56204_ i1=$abc$109383$new_n56202_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n56205_
+.subckt and21nor_x1 i0=$abc$109383$new_n56204_ i1=$abc$109383$new_n56202_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n56205_
 .subckt nand3_x0 i0=$abc$109383$new_n56205_ i1=$abc$109383$new_n56201_ i2=$abc$109383$new_n56198_ nq=$abc$109383$new_n56206_
-.subckt a4_x2 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29463_ q=$abc$109383$new_n56207_
-.subckt ao22_x2 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56207_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56208_
-.subckt oa22_x2 i0=$abc$109383$new_n56208_ i1=$abc$109383$new_n56206_ i2=$abc$109383$new_n56197_ q=$abc$109383$new_n56209_
-.subckt a2_x2 i0=$abc$109383$new_n56209_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105442
-.subckt ao22_x2 i0=$abc$109383$new_n55566_ i1=$abc$109383$new_n55524_ i2=soc.cpu.minerva.divider.remainder[31] q=$abc$109383$new_n56211_
+.subckt and4_x1 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29463_ q=$abc$109383$new_n56207_
+.subckt and21nor_x1 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56207_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56208_
+.subckt or21nand_x1 i0=$abc$109383$new_n56208_ i1=$abc$109383$new_n56206_ i2=$abc$109383$new_n56197_ nq=$abc$109383$new_n56209_
+.subckt and2_x1 i0=$abc$109383$new_n56209_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105442
+.subckt and21nor_x1 i0=$abc$109383$new_n55566_ i1=$abc$109383$new_n55524_ i2=soc.cpu.minerva.divider.remainder[31] nq=$abc$109383$new_n56211_
 .subckt nand3_x0 i0=$abc$109383$new_n55711_ i1=$abc$109383$new_n55713_ i2=soc.cpu.minerva.divider.remainder[30] nq=$abc$109383$new_n56212_
 .subckt nor2_x0 i0=$abc$109383$new_n55707_ i1=$abc$109383$new_n55575_ nq=$abc$109383$new_n56213_
-.subckt nxr2_x1 i0=soc.cpu.minerva.divider.remainder[30] i1=soc.cpu.minerva.divider.divisor[31] nq=$abc$109383$new_n56214_
-.subckt nxr2_x1 i0=$abc$109383$new_n56214_ i1=$abc$109383$new_n56213_ nq=$abc$109383$new_n56215_
+.subckt nexor2_x0 i0=soc.cpu.minerva.divider.remainder[30] i1=soc.cpu.minerva.divider.divisor[31] nq=$abc$109383$new_n56214_
+.subckt nexor2_x0 i0=$abc$109383$new_n56214_ i1=$abc$109383$new_n56213_ nq=$abc$109383$new_n56215_
 .subckt nand3_x0 i0=$abc$109383$new_n56215_ i1=$abc$109383$new_n55715_ i2=$abc$109383$new_n55735_ nq=$abc$109383$new_n56216_
-.subckt a4_x2 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ i2=$abc$109383$new_n56187_ i3=$abc$109383$new_n55572_ q=$abc$109383$new_n56217_
-.subckt nxr2_x1 i0=$abc$109383$new_n56217_ i1=$abc$109383$new_n55714_ nq=$abc$109383$new_n56218_
-.subckt ao22_x2 i0=$abc$109383$new_n56218_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55801_ q=$abc$109383$new_n56219_
+.subckt and4_x1 i0=$abc$109383$new_n56171_ i1=$abc$109383$new_n55579_ i2=$abc$109383$new_n56187_ i3=$abc$109383$new_n55572_ q=$abc$109383$new_n56217_
+.subckt nexor2_x0 i0=$abc$109383$new_n56217_ i1=$abc$109383$new_n55714_ nq=$abc$109383$new_n56218_
+.subckt and21nor_x1 i0=$abc$109383$new_n56218_ i1=$abc$109383$new_n55256_ i2=$abc$109383$new_n55801_ nq=$abc$109383$new_n56219_
 .subckt nand3_x0 i0=$abc$109383$new_n56219_ i1=$abc$109383$new_n56216_ i2=$abc$109383$new_n56212_ nq=$abc$109383$new_n56220_
-.subckt a4_x2 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29492_ q=$abc$109383$new_n56221_
-.subckt ao22_x2 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56221_ i2=$abc$109383$new_n55126_ q=$abc$109383$new_n56222_
-.subckt oa22_x2 i0=$abc$109383$new_n56222_ i1=$abc$109383$new_n56220_ i2=$abc$109383$new_n56211_ q=$abc$109383$new_n56223_
-.subckt a2_x2 i0=$abc$109383$new_n56223_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105446
-.subckt mx2_x2 cmd=$abc$109383$new_n54051_ i0=soc.cpu.minerva.divider.divisor[0] i1=$abc$109383$new_n29440_ q=$abc$109383$new_n56225_
-.subckt a2_x2 i0=$abc$109383$new_n56225_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105450
+.subckt and4_x1 i0=$abc$109383$new_n54037_ i1=$abc$109383$new_n55144_ i2=$abc$109383$new_n54024_ i3=$abc$109383$new_n29492_ q=$abc$109383$new_n56221_
+.subckt and21nor_x1 i0=$abc$109383$new_n55297_ i1=$abc$109383$new_n56221_ i2=$abc$109383$new_n55126_ nq=$abc$109383$new_n56222_
+.subckt or21nand_x1 i0=$abc$109383$new_n56222_ i1=$abc$109383$new_n56220_ i2=$abc$109383$new_n56211_ nq=$abc$109383$new_n56223_
+.subckt and2_x1 i0=$abc$109383$new_n56223_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105446
+.subckt mux2_x1 cmd=$abc$109383$new_n54051_ i0=soc.cpu.minerva.divider.divisor[0] i1=$abc$109383$new_n29440_ q=$abc$109383$new_n56225_
+.subckt and2_x1 i0=$abc$109383$new_n56225_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105450
 .subckt buf_x4 i=$abc$109383$new_n42753_ q=$abc$109383$new_n56227_
-.subckt a4_x2 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52518_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56228_
-.subckt nxr2_x1 i0=$abc$109383$new_n56228_ i1=$abc$109383$new_n29438_ nq=$abc$109383$new_n56229_
+.subckt and4_x1 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52518_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56228_
+.subckt nexor2_x0 i0=$abc$109383$new_n56228_ i1=$abc$109383$new_n29438_ nq=$abc$109383$new_n56229_
 .subckt nand3_x0 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n54038_ nq=$abc$109383$new_n56230_
 .subckt buf_x4 i=$abc$109383$new_n56230_ q=$abc$109383$new_n56231_
 .subckt buf_x4 i=$abc$109383$new_n56231_ q=$abc$109383$new_n56232_
-.subckt mx2_x2 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56229_ i1=soc.cpu.minerva.divider.divisor[1] q=$abc$109383$new_n56233_
-.subckt a2_x2 i0=$abc$109383$new_n56233_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105454
-.subckt o2_x2 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n29386_ q=$abc$109383$new_n56235_
-.subckt a4_x2 i0=$abc$109383$new_n56235_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52518_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56236_
-.subckt nxr2_x1 i0=$abc$109383$new_n56236_ i1=$abc$109383$new_n29264_ nq=$abc$109383$new_n56237_
-.subckt mx2_x2 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56237_ i1=soc.cpu.minerva.divider.divisor[2] q=$abc$109383$new_n56238_
-.subckt a2_x2 i0=$abc$109383$new_n56238_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105458
-.subckt o3_x2 i0=$abc$109383$new_n29894_ i1=$abc$109383$new_n29440_ i2=$abc$109383$new_n29386_ q=$abc$109383$new_n56240_
-.subckt a4_x2 i0=$abc$109383$new_n56240_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52334_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56241_
-.subckt nxr2_x1 i0=$abc$109383$new_n56241_ i1=$abc$109383$new_n29250_ nq=$abc$109383$new_n56242_
-.subckt mx2_x2 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56242_ i1=soc.cpu.minerva.divider.divisor[3] q=$abc$109383$new_n56243_
-.subckt a2_x2 i0=$abc$109383$new_n56243_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105462
-.subckt o4_x2 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n29894_ i2=$abc$109383$new_n29439_ i3=$abc$109383$new_n29386_ q=$abc$109383$new_n56245_
-.subckt a4_x2 i0=$abc$109383$new_n56245_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52334_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56246_
-.subckt nxr2_x1 i0=$abc$109383$new_n56246_ i1=$abc$109383$new_n29239_ nq=$abc$109383$new_n56247_
-.subckt mx2_x2 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56247_ i1=soc.cpu.minerva.divider.divisor[4] q=$abc$109383$new_n56248_
-.subckt a2_x2 i0=$abc$109383$new_n56248_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105466
+.subckt mux2_x1 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56229_ i1=soc.cpu.minerva.divider.divisor[1] q=$abc$109383$new_n56233_
+.subckt and2_x1 i0=$abc$109383$new_n56233_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105454
+.subckt or2_x1 i0=$abc$109383$new_n29440_ i1=$abc$109383$new_n29386_ q=$abc$109383$new_n56235_
+.subckt and4_x1 i0=$abc$109383$new_n56235_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52518_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56236_
+.subckt nexor2_x0 i0=$abc$109383$new_n56236_ i1=$abc$109383$new_n29264_ nq=$abc$109383$new_n56237_
+.subckt mux2_x1 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56237_ i1=soc.cpu.minerva.divider.divisor[2] q=$abc$109383$new_n56238_
+.subckt and2_x1 i0=$abc$109383$new_n56238_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105458
+.subckt or3_x1 i0=$abc$109383$new_n29894_ i1=$abc$109383$new_n29440_ i2=$abc$109383$new_n29386_ q=$abc$109383$new_n56240_
+.subckt and4_x1 i0=$abc$109383$new_n56240_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52334_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56241_
+.subckt nexor2_x0 i0=$abc$109383$new_n56241_ i1=$abc$109383$new_n29250_ nq=$abc$109383$new_n56242_
+.subckt mux2_x1 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56242_ i1=soc.cpu.minerva.divider.divisor[3] q=$abc$109383$new_n56243_
+.subckt and2_x1 i0=$abc$109383$new_n56243_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105462
+.subckt or4_x1 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n29894_ i2=$abc$109383$new_n29439_ i3=$abc$109383$new_n29386_ q=$abc$109383$new_n56245_
+.subckt and4_x1 i0=$abc$109383$new_n56245_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n52334_ i3=$abc$109383$new_n55110_ q=$abc$109383$new_n56246_
+.subckt nexor2_x0 i0=$abc$109383$new_n56246_ i1=$abc$109383$new_n29239_ nq=$abc$109383$new_n56247_
+.subckt mux2_x1 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56247_ i1=soc.cpu.minerva.divider.divisor[4] q=$abc$109383$new_n56248_
+.subckt and2_x1 i0=$abc$109383$new_n56248_ i1=$abc$109383$new_n56149_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105466
 .subckt buf_x4 i=$abc$109383$new_n54281_ q=$abc$109383$new_n56250_
-.subckt a3_x2 i0=$abc$109383$new_n56227_ i1=$abc$109383$new_n52334_ i2=$abc$109383$new_n52326_ q=$abc$109383$new_n56251_
+.subckt and3_x1 i0=$abc$109383$new_n56227_ i1=$abc$109383$new_n52334_ i2=$abc$109383$new_n52326_ q=$abc$109383$new_n56251_
 .subckt buf_x4 i=$abc$109383$new_n56251_ q=$abc$109383$new_n56252_
-.subckt ao22_x2 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n56245_ i2=$abc$109383$new_n56252_ q=$abc$109383$new_n56253_
-.subckt nxr2_x1 i0=$abc$109383$new_n56253_ i1=$abc$109383$new_n36912_ nq=$abc$109383$new_n56254_
-.subckt mx2_x2 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56254_ i1=soc.cpu.minerva.divider.divisor[5] q=$abc$109383$new_n56255_
-.subckt a2_x2 i0=$abc$109383$new_n56255_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105470
+.subckt and21nor_x1 i0=$abc$109383$new_n29764_ i1=$abc$109383$new_n56245_ i2=$abc$109383$new_n56252_ nq=$abc$109383$new_n56253_
+.subckt nexor2_x0 i0=$abc$109383$new_n56253_ i1=$abc$109383$new_n36912_ nq=$abc$109383$new_n56254_
+.subckt mux2_x1 cmd=$abc$109383$new_n56232_ i0=$abc$109383$new_n56254_ i1=soc.cpu.minerva.divider.divisor[5] q=$abc$109383$new_n56255_
+.subckt and2_x1 i0=$abc$109383$new_n56255_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105470
 .subckt nand2_x0 i0=$abc$109383$new_n54028_ i1=$abc$109383$new_n54027_ nq=$abc$109383$new_n56257_
 .subckt buf_x4 i=$abc$109383$new_n56251_ q=$abc$109383$new_n56258_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56257_ q=$abc$109383$new_n56259_
-.subckt nxr2_x1 i0=$abc$109383$new_n56259_ i1=$abc$109383$new_n51936_ nq=$abc$109383$new_n56260_
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56257_ q=$abc$109383$new_n56259_
+.subckt nexor2_x0 i0=$abc$109383$new_n56259_ i1=$abc$109383$new_n51936_ nq=$abc$109383$new_n56260_
 .subckt buf_x4 i=$abc$109383$new_n56231_ q=$abc$109383$new_n56261_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56260_ i1=soc.cpu.minerva.divider.divisor[6] q=$abc$109383$new_n56262_
-.subckt a2_x2 i0=$abc$109383$new_n56262_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105474
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56260_ i1=soc.cpu.minerva.divider.divisor[6] q=$abc$109383$new_n56262_
+.subckt and2_x1 i0=$abc$109383$new_n56262_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105474
 .subckt nand3_x0 i0=$abc$109383$new_n54028_ i1=$abc$109383$new_n54027_ i2=$abc$109383$new_n51936_ nq=$abc$109383$new_n56264_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56264_ q=$abc$109383$new_n56265_
-.subckt nxr2_x1 i0=$abc$109383$new_n56265_ i1=$abc$109383$new_n51951_ nq=$abc$109383$new_n56266_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56266_ i1=soc.cpu.minerva.divider.divisor[7] q=$abc$109383$new_n56267_
-.subckt a2_x2 i0=$abc$109383$new_n56267_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105478
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56264_ q=$abc$109383$new_n56265_
+.subckt nexor2_x0 i0=$abc$109383$new_n56265_ i1=$abc$109383$new_n51951_ nq=$abc$109383$new_n56266_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56266_ i1=soc.cpu.minerva.divider.divisor[7] q=$abc$109383$new_n56267_
+.subckt and2_x1 i0=$abc$109383$new_n56267_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105478
 .subckt nand4_x0 i0=$abc$109383$new_n54028_ i1=$abc$109383$new_n54027_ i2=$abc$109383$new_n51951_ i3=$abc$109383$new_n51936_ nq=$abc$109383$new_n56269_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56269_ q=$abc$109383$new_n56270_
-.subckt nxr2_x1 i0=$abc$109383$new_n56270_ i1=$abc$109383$new_n51968_ nq=$abc$109383$new_n56271_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56271_ i1=soc.cpu.minerva.divider.divisor[8] q=$abc$109383$new_n56272_
-.subckt a2_x2 i0=$abc$109383$new_n56272_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105482
-.subckt ao22_x2 i0=$abc$109383$new_n37588_ i1=$abc$109383$new_n56269_ i2=$abc$109383$new_n56252_ q=$abc$109383$new_n56274_
-.subckt nxr2_x1 i0=$abc$109383$new_n56274_ i1=$abc$109383$new_n51985_ nq=$abc$109383$new_n56275_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56275_ i1=soc.cpu.minerva.divider.divisor[9] q=$abc$109383$new_n56276_
-.subckt a2_x2 i0=$abc$109383$new_n56276_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105486
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56269_ q=$abc$109383$new_n56270_
+.subckt nexor2_x0 i0=$abc$109383$new_n56270_ i1=$abc$109383$new_n51968_ nq=$abc$109383$new_n56271_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56271_ i1=soc.cpu.minerva.divider.divisor[8] q=$abc$109383$new_n56272_
+.subckt and2_x1 i0=$abc$109383$new_n56272_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105482
+.subckt and21nor_x1 i0=$abc$109383$new_n37588_ i1=$abc$109383$new_n56269_ i2=$abc$109383$new_n56252_ nq=$abc$109383$new_n56274_
+.subckt nexor2_x0 i0=$abc$109383$new_n56274_ i1=$abc$109383$new_n51985_ nq=$abc$109383$new_n56275_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56275_ i1=soc.cpu.minerva.divider.divisor[9] q=$abc$109383$new_n56276_
+.subckt and2_x1 i0=$abc$109383$new_n56276_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105486
 .subckt nand3_x0 i0=$abc$109383$new_n54029_ i1=$abc$109383$new_n51985_ i2=$abc$109383$new_n51968_ nq=$abc$109383$new_n56278_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56278_ q=$abc$109383$new_n56279_
-.subckt nxr2_x1 i0=$abc$109383$new_n56279_ i1=$abc$109383$new_n51993_ nq=$abc$109383$new_n56280_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56280_ i1=soc.cpu.minerva.divider.divisor[10] q=$abc$109383$new_n56281_
-.subckt a2_x2 i0=$abc$109383$new_n56281_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105490
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56278_ q=$abc$109383$new_n56279_
+.subckt nexor2_x0 i0=$abc$109383$new_n56279_ i1=$abc$109383$new_n51993_ nq=$abc$109383$new_n56280_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56280_ i1=soc.cpu.minerva.divider.divisor[10] q=$abc$109383$new_n56281_
+.subckt and2_x1 i0=$abc$109383$new_n56281_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105490
 .subckt nand4_x0 i0=$abc$109383$new_n54029_ i1=$abc$109383$new_n51993_ i2=$abc$109383$new_n51985_ i3=$abc$109383$new_n51968_ nq=$abc$109383$new_n56283_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56283_ q=$abc$109383$new_n56284_
-.subckt nxr2_x1 i0=$abc$109383$new_n56284_ i1=$abc$109383$new_n38881_ nq=$abc$109383$new_n56285_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56285_ i1=soc.cpu.minerva.divider.divisor[11] q=$abc$109383$new_n56286_
-.subckt a2_x2 i0=$abc$109383$new_n56286_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105494
-.subckt ao22_x2 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n56283_ i2=$abc$109383$new_n56252_ q=$abc$109383$new_n56288_
-.subckt nxr2_x1 i0=$abc$109383$new_n56288_ i1=$abc$109383$new_n52025_ nq=$abc$109383$new_n56289_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56289_ i1=soc.cpu.minerva.divider.divisor[12] q=$abc$109383$new_n56290_
-.subckt a2_x2 i0=$abc$109383$new_n56290_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105498
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56283_ q=$abc$109383$new_n56284_
+.subckt nexor2_x0 i0=$abc$109383$new_n56284_ i1=$abc$109383$new_n38881_ nq=$abc$109383$new_n56285_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56285_ i1=soc.cpu.minerva.divider.divisor[11] q=$abc$109383$new_n56286_
+.subckt and2_x1 i0=$abc$109383$new_n56286_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105494
+.subckt and21nor_x1 i0=$abc$109383$new_n38514_ i1=$abc$109383$new_n56283_ i2=$abc$109383$new_n56252_ nq=$abc$109383$new_n56288_
+.subckt nexor2_x0 i0=$abc$109383$new_n56288_ i1=$abc$109383$new_n52025_ nq=$abc$109383$new_n56289_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56289_ i1=soc.cpu.minerva.divider.divisor[12] q=$abc$109383$new_n56290_
+.subckt and2_x1 i0=$abc$109383$new_n56290_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105498
 .subckt nand3_x0 i0=$abc$109383$new_n54030_ i1=$abc$109383$new_n52025_ i2=$abc$109383$new_n38881_ nq=$abc$109383$new_n56292_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56292_ q=$abc$109383$new_n56293_
-.subckt nxr2_x1 i0=$abc$109383$new_n56293_ i1=$abc$109383$new_n52037_ nq=$abc$109383$new_n56294_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56294_ i1=soc.cpu.minerva.divider.divisor[13] q=$abc$109383$new_n56295_
-.subckt a2_x2 i0=$abc$109383$new_n56295_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105502
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56292_ q=$abc$109383$new_n56293_
+.subckt nexor2_x0 i0=$abc$109383$new_n56293_ i1=$abc$109383$new_n52037_ nq=$abc$109383$new_n56294_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56294_ i1=soc.cpu.minerva.divider.divisor[13] q=$abc$109383$new_n56295_
+.subckt and2_x1 i0=$abc$109383$new_n56295_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105502
 .subckt nand4_x0 i0=$abc$109383$new_n54030_ i1=$abc$109383$new_n52037_ i2=$abc$109383$new_n52025_ i3=$abc$109383$new_n38881_ nq=$abc$109383$new_n56297_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56297_ q=$abc$109383$new_n56298_
-.subckt nxr2_x1 i0=$abc$109383$new_n56298_ i1=$abc$109383$new_n52054_ nq=$abc$109383$new_n56299_
-.subckt mx2_x2 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56299_ i1=soc.cpu.minerva.divider.divisor[14] q=$abc$109383$new_n56300_
-.subckt a2_x2 i0=$abc$109383$new_n56300_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105506
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56297_ q=$abc$109383$new_n56298_
+.subckt nexor2_x0 i0=$abc$109383$new_n56298_ i1=$abc$109383$new_n52054_ nq=$abc$109383$new_n56299_
+.subckt mux2_x1 cmd=$abc$109383$new_n56261_ i0=$abc$109383$new_n56299_ i1=soc.cpu.minerva.divider.divisor[14] q=$abc$109383$new_n56300_
+.subckt and2_x1 i0=$abc$109383$new_n56300_ i1=$abc$109383$new_n56250_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105506
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n56302_
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n56303_
-.subckt ao22_x2 i0=$abc$109383$new_n39379_ i1=$abc$109383$new_n56297_ i2=$abc$109383$new_n56252_ q=$abc$109383$new_n56304_
-.subckt nxr2_x1 i0=$abc$109383$new_n56304_ i1=$abc$109383$new_n52074_ nq=$abc$109383$new_n56305_
+.subckt and21nor_x1 i0=$abc$109383$new_n39379_ i1=$abc$109383$new_n56297_ i2=$abc$109383$new_n56252_ nq=$abc$109383$new_n56304_
+.subckt nexor2_x0 i0=$abc$109383$new_n56304_ i1=$abc$109383$new_n52074_ nq=$abc$109383$new_n56305_
 .subckt buf_x4 i=$abc$109383$new_n56230_ q=$abc$109383$new_n56306_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56305_ i1=soc.cpu.minerva.divider.divisor[15] q=$abc$109383$new_n56307_
-.subckt a2_x2 i0=$abc$109383$new_n56307_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105510
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56305_ i1=soc.cpu.minerva.divider.divisor[15] q=$abc$109383$new_n56307_
+.subckt and2_x1 i0=$abc$109383$new_n56307_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105510
 .subckt nand3_x0 i0=$abc$109383$new_n54031_ i1=$abc$109383$new_n52074_ i2=$abc$109383$new_n52054_ nq=$abc$109383$new_n56309_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56309_ q=$abc$109383$new_n56310_
-.subckt nxr2_x1 i0=$abc$109383$new_n56310_ i1=$abc$109383$new_n52094_ nq=$abc$109383$new_n56311_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56311_ i1=soc.cpu.minerva.divider.divisor[16] q=$abc$109383$new_n56312_
-.subckt a2_x2 i0=$abc$109383$new_n56312_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105514
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56309_ q=$abc$109383$new_n56310_
+.subckt nexor2_x0 i0=$abc$109383$new_n56310_ i1=$abc$109383$new_n52094_ nq=$abc$109383$new_n56311_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56311_ i1=soc.cpu.minerva.divider.divisor[16] q=$abc$109383$new_n56312_
+.subckt and2_x1 i0=$abc$109383$new_n56312_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105514
 .subckt nand4_x0 i0=$abc$109383$new_n54031_ i1=$abc$109383$new_n52094_ i2=$abc$109383$new_n52074_ i3=$abc$109383$new_n52054_ nq=$abc$109383$new_n56314_
 .subckt nand2_x0 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56314_ nq=$abc$109383$new_n56315_
-.subckt nxr2_x1 i0=$abc$109383$new_n56315_ i1=$abc$109383$new_n40442_ nq=$abc$109383$new_n56316_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56316_ i1=soc.cpu.minerva.divider.divisor[17] q=$abc$109383$new_n56317_
-.subckt a2_x2 i0=$abc$109383$new_n56317_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105518
+.subckt nexor2_x0 i0=$abc$109383$new_n56315_ i1=$abc$109383$new_n40442_ nq=$abc$109383$new_n56316_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56316_ i1=soc.cpu.minerva.divider.divisor[17] q=$abc$109383$new_n56317_
+.subckt and2_x1 i0=$abc$109383$new_n56317_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105518
 .subckt nand4_x0 i0=$abc$109383$new_n54031_ i1=$abc$109383$new_n54026_ i2=$abc$109383$new_n52074_ i3=$abc$109383$new_n52054_ nq=$abc$109383$new_n56319_
-.subckt a2_x2 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56319_ q=$abc$109383$new_n56320_
-.subckt nxr2_x1 i0=$abc$109383$new_n56320_ i1=$abc$109383$new_n52115_ nq=$abc$109383$new_n56321_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56321_ i1=soc.cpu.minerva.divider.divisor[18] q=$abc$109383$new_n56322_
-.subckt a2_x2 i0=$abc$109383$new_n56322_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105522
-.subckt ao22_x2 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n56319_ i2=$abc$109383$new_n56252_ q=$abc$109383$new_n56324_
-.subckt nxr2_x1 i0=$abc$109383$new_n56324_ i1=$abc$109383$new_n52130_ nq=$abc$109383$new_n56325_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56325_ i1=soc.cpu.minerva.divider.divisor[19] q=$abc$109383$new_n56326_
-.subckt a2_x2 i0=$abc$109383$new_n56326_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105526
+.subckt and2_x1 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56319_ q=$abc$109383$new_n56320_
+.subckt nexor2_x0 i0=$abc$109383$new_n56320_ i1=$abc$109383$new_n52115_ nq=$abc$109383$new_n56321_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56321_ i1=soc.cpu.minerva.divider.divisor[18] q=$abc$109383$new_n56322_
+.subckt and2_x1 i0=$abc$109383$new_n56322_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105522
+.subckt and21nor_x1 i0=$abc$109383$new_n40910_ i1=$abc$109383$new_n56319_ i2=$abc$109383$new_n56252_ nq=$abc$109383$new_n56324_
+.subckt nexor2_x0 i0=$abc$109383$new_n56324_ i1=$abc$109383$new_n52130_ nq=$abc$109383$new_n56325_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56325_ i1=soc.cpu.minerva.divider.divisor[19] q=$abc$109383$new_n56326_
+.subckt and2_x1 i0=$abc$109383$new_n56326_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105526
 .subckt nand3_x0 i0=$abc$109383$new_n54032_ i1=$abc$109383$new_n52130_ i2=$abc$109383$new_n52115_ nq=$abc$109383$new_n56328_
-.subckt a2_x2 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56328_ q=$abc$109383$new_n56329_
-.subckt nxr2_x1 i0=$abc$109383$new_n56329_ i1=$abc$109383$new_n52145_ nq=$abc$109383$new_n56330_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56330_ i1=soc.cpu.minerva.divider.divisor[20] q=$abc$109383$new_n56331_
-.subckt a2_x2 i0=$abc$109383$new_n56331_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105530
+.subckt and2_x1 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56328_ q=$abc$109383$new_n56329_
+.subckt nexor2_x0 i0=$abc$109383$new_n56329_ i1=$abc$109383$new_n52145_ nq=$abc$109383$new_n56330_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56330_ i1=soc.cpu.minerva.divider.divisor[20] q=$abc$109383$new_n56331_
+.subckt and2_x1 i0=$abc$109383$new_n56331_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105530
 .subckt nand4_x0 i0=$abc$109383$new_n54032_ i1=$abc$109383$new_n52145_ i2=$abc$109383$new_n52130_ i3=$abc$109383$new_n52115_ nq=$abc$109383$new_n56333_
-.subckt a2_x2 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56333_ q=$abc$109383$new_n56334_
-.subckt nxr2_x1 i0=$abc$109383$new_n56334_ i1=$abc$109383$new_n41945_ nq=$abc$109383$new_n56335_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56335_ i1=soc.cpu.minerva.divider.divisor[21] q=$abc$109383$new_n56336_
-.subckt a2_x2 i0=$abc$109383$new_n56336_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105534
+.subckt and2_x1 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56333_ q=$abc$109383$new_n56334_
+.subckt nexor2_x0 i0=$abc$109383$new_n56334_ i1=$abc$109383$new_n41945_ nq=$abc$109383$new_n56335_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56335_ i1=soc.cpu.minerva.divider.divisor[21] q=$abc$109383$new_n56336_
+.subckt and2_x1 i0=$abc$109383$new_n56336_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105534
 .subckt nand3_x0 i0=$abc$109383$new_n56227_ i1=$abc$109383$new_n52334_ i2=$abc$109383$new_n52326_ nq=$abc$109383$new_n56338_
-.subckt oa22_x2 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n54033_ i2=$abc$109383$new_n56338_ q=$abc$109383$new_n56339_
-.subckt nxr2_x1 i0=$abc$109383$new_n56339_ i1=$abc$109383$new_n52157_ nq=$abc$109383$new_n56340_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56340_ i1=soc.cpu.minerva.divider.divisor[22] q=$abc$109383$new_n56341_
-.subckt a2_x2 i0=$abc$109383$new_n56341_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105538
+.subckt or21nand_x1 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n54033_ i2=$abc$109383$new_n56338_ nq=$abc$109383$new_n56339_
+.subckt nexor2_x0 i0=$abc$109383$new_n56339_ i1=$abc$109383$new_n52157_ nq=$abc$109383$new_n56340_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56340_ i1=soc.cpu.minerva.divider.divisor[22] q=$abc$109383$new_n56341_
+.subckt and2_x1 i0=$abc$109383$new_n56341_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105538
 .subckt nand2_x0 i0=$abc$109383$new_n54033_ i1=$abc$109383$new_n41945_ nq=$abc$109383$new_n56343_
-.subckt ao22_x2 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n56343_ i2=$abc$109383$new_n56251_ q=$abc$109383$new_n56344_
-.subckt nxr2_x1 i0=$abc$109383$new_n56344_ i1=$abc$109383$new_n41767_ nq=$abc$109383$new_n56345_
-.subckt mx2_x2 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56345_ i1=soc.cpu.minerva.divider.divisor[23] q=$abc$109383$new_n56346_
-.subckt a2_x2 i0=$abc$109383$new_n56346_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105542
-.subckt ao22_x2 i0=$abc$109383$new_n41943_ i1=$abc$109383$new_n56333_ i2=$abc$109383$new_n56251_ q=$abc$109383$new_n56348_
-.subckt nxr2_x1 i0=$abc$109383$new_n56348_ i1=$abc$109383$new_n52226_ nq=$abc$109383$new_n56349_
-.subckt mx2_x2 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56349_ i1=soc.cpu.minerva.divider.divisor[24] q=$abc$109383$new_n56350_
-.subckt a2_x2 i0=$abc$109383$new_n56350_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105546
+.subckt and21nor_x1 i0=$abc$109383$new_n52157_ i1=$abc$109383$new_n56343_ i2=$abc$109383$new_n56251_ nq=$abc$109383$new_n56344_
+.subckt nexor2_x0 i0=$abc$109383$new_n56344_ i1=$abc$109383$new_n41767_ nq=$abc$109383$new_n56345_
+.subckt mux2_x1 cmd=$abc$109383$new_n56306_ i0=$abc$109383$new_n56345_ i1=soc.cpu.minerva.divider.divisor[23] q=$abc$109383$new_n56346_
+.subckt and2_x1 i0=$abc$109383$new_n56346_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105542
+.subckt and21nor_x1 i0=$abc$109383$new_n41943_ i1=$abc$109383$new_n56333_ i2=$abc$109383$new_n56251_ nq=$abc$109383$new_n56348_
+.subckt nexor2_x0 i0=$abc$109383$new_n56348_ i1=$abc$109383$new_n52226_ nq=$abc$109383$new_n56349_
+.subckt mux2_x1 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56349_ i1=soc.cpu.minerva.divider.divisor[24] q=$abc$109383$new_n56350_
+.subckt and2_x1 i0=$abc$109383$new_n56350_ i1=$abc$109383$new_n56303_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105546
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n56352_
 .subckt nand3_x0 i0=$abc$109383$new_n54033_ i1=$abc$109383$new_n54025_ i2=$abc$109383$new_n52226_ nq=$abc$109383$new_n56353_
-.subckt a2_x2 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56353_ q=$abc$109383$new_n56354_
-.subckt nxr2_x1 i0=$abc$109383$new_n56354_ i1=$abc$109383$new_n52238_ nq=$abc$109383$new_n56355_
-.subckt mx2_x2 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56355_ i1=soc.cpu.minerva.divider.divisor[25] q=$abc$109383$new_n56356_
-.subckt a2_x2 i0=$abc$109383$new_n56356_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105550
-.subckt a2_x2 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n54034_ q=$abc$109383$new_n56358_
-.subckt nxr2_x1 i0=$abc$109383$new_n56358_ i1=$abc$109383$new_n52250_ nq=$abc$109383$new_n56359_
-.subckt mx2_x2 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56359_ i1=soc.cpu.minerva.divider.divisor[26] q=$abc$109383$new_n56360_
-.subckt a2_x2 i0=$abc$109383$new_n56360_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105554
-.subckt ao22_x2 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n54034_ i2=$abc$109383$new_n56251_ q=$abc$109383$new_n56362_
-.subckt nxr2_x1 i0=$abc$109383$new_n56362_ i1=$abc$109383$new_n52270_ nq=$abc$109383$new_n56363_
-.subckt mx2_x2 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56363_ i1=soc.cpu.minerva.divider.divisor[27] q=$abc$109383$new_n56364_
-.subckt a2_x2 i0=$abc$109383$new_n56364_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105558
-.subckt o2_x2 i0=$abc$109383$new_n54034_ i1=$abc$109383$new_n52249_ q=$abc$109383$new_n56366_
-.subckt ao22_x2 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n56366_ i2=$abc$109383$new_n56251_ q=$abc$109383$new_n56367_
-.subckt nxr2_x1 i0=$abc$109383$new_n56367_ i1=$abc$109383$new_n52283_ nq=$abc$109383$new_n56368_
-.subckt mx2_x2 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56368_ i1=soc.cpu.minerva.divider.divisor[28] q=$abc$109383$new_n56369_
-.subckt a2_x2 i0=$abc$109383$new_n56369_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105562
-.subckt o4_x2 i0=$abc$109383$new_n54034_ i1=$abc$109383$new_n42738_ i2=$abc$109383$new_n42583_ i3=$abc$109383$new_n52249_ q=$abc$109383$new_n56371_
-.subckt a2_x2 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56371_ q=$abc$109383$new_n56372_
-.subckt nxr2_x1 i0=$abc$109383$new_n56372_ i1=$abc$109383$new_n42764_ nq=$abc$109383$new_n56373_
-.subckt mx2_x2 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56373_ i1=soc.cpu.minerva.divider.divisor[29] q=$abc$109383$new_n56374_
-.subckt a2_x2 i0=$abc$109383$new_n56374_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105566
+.subckt and2_x1 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n56353_ q=$abc$109383$new_n56354_
+.subckt nexor2_x0 i0=$abc$109383$new_n56354_ i1=$abc$109383$new_n52238_ nq=$abc$109383$new_n56355_
+.subckt mux2_x1 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56355_ i1=soc.cpu.minerva.divider.divisor[25] q=$abc$109383$new_n56356_
+.subckt and2_x1 i0=$abc$109383$new_n56356_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105550
+.subckt and2_x1 i0=$abc$109383$new_n56252_ i1=$abc$109383$new_n54034_ q=$abc$109383$new_n56358_
+.subckt nexor2_x0 i0=$abc$109383$new_n56358_ i1=$abc$109383$new_n52250_ nq=$abc$109383$new_n56359_
+.subckt mux2_x1 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56359_ i1=soc.cpu.minerva.divider.divisor[26] q=$abc$109383$new_n56360_
+.subckt and2_x1 i0=$abc$109383$new_n56360_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105554
+.subckt and21nor_x1 i0=$abc$109383$new_n52249_ i1=$abc$109383$new_n54034_ i2=$abc$109383$new_n56251_ nq=$abc$109383$new_n56362_
+.subckt nexor2_x0 i0=$abc$109383$new_n56362_ i1=$abc$109383$new_n52270_ nq=$abc$109383$new_n56363_
+.subckt mux2_x1 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56363_ i1=soc.cpu.minerva.divider.divisor[27] q=$abc$109383$new_n56364_
+.subckt and2_x1 i0=$abc$109383$new_n56364_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105558
+.subckt or2_x1 i0=$abc$109383$new_n54034_ i1=$abc$109383$new_n52249_ q=$abc$109383$new_n56366_
+.subckt and21nor_x1 i0=$abc$109383$new_n42583_ i1=$abc$109383$new_n56366_ i2=$abc$109383$new_n56251_ nq=$abc$109383$new_n56367_
+.subckt nexor2_x0 i0=$abc$109383$new_n56367_ i1=$abc$109383$new_n52283_ nq=$abc$109383$new_n56368_
+.subckt mux2_x1 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56368_ i1=soc.cpu.minerva.divider.divisor[28] q=$abc$109383$new_n56369_
+.subckt and2_x1 i0=$abc$109383$new_n56369_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105562
+.subckt or4_x1 i0=$abc$109383$new_n54034_ i1=$abc$109383$new_n42738_ i2=$abc$109383$new_n42583_ i3=$abc$109383$new_n52249_ q=$abc$109383$new_n56371_
+.subckt and2_x1 i0=$abc$109383$new_n56258_ i1=$abc$109383$new_n56371_ q=$abc$109383$new_n56372_
+.subckt nexor2_x0 i0=$abc$109383$new_n56372_ i1=$abc$109383$new_n42764_ nq=$abc$109383$new_n56373_
+.subckt mux2_x1 cmd=$abc$109383$new_n56231_ i0=$abc$109383$new_n56373_ i1=soc.cpu.minerva.divider.divisor[29] q=$abc$109383$new_n56374_
+.subckt and2_x1 i0=$abc$109383$new_n56374_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105566
 .subckt nand4_x0 i0=$abc$109383$new_n54035_ i1=$abc$109383$new_n42764_ i2=$abc$109383$new_n52283_ i3=$abc$109383$new_n52270_ nq=$abc$109383$new_n56376_
-.subckt a2_x2 i0=$abc$109383$new_n56251_ i1=$abc$109383$new_n56376_ q=$abc$109383$new_n56377_
-.subckt nxr2_x1 i0=$abc$109383$new_n56377_ i1=$abc$109383$new_n55477_ nq=$abc$109383$new_n56378_
-.subckt a3_x2 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n56378_ q=$abc$109383$new_n56379_
-.subckt oa22_x2 i0=soc.cpu.minerva.divider.divisor[30] i1=$abc$109383$new_n56232_ i2=$abc$109383$new_n56379_ q=$abc$109383$new_n56380_
-.subckt a2_x2 i0=$abc$109383$new_n56380_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105570
+.subckt and2_x1 i0=$abc$109383$new_n56251_ i1=$abc$109383$new_n56376_ q=$abc$109383$new_n56377_
+.subckt nexor2_x0 i0=$abc$109383$new_n56377_ i1=$abc$109383$new_n55477_ nq=$abc$109383$new_n56378_
+.subckt and3_x1 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n56378_ q=$abc$109383$new_n56379_
+.subckt or21nand_x1 i0=soc.cpu.minerva.divider.divisor[30] i1=$abc$109383$new_n56232_ i2=$abc$109383$new_n56379_ nq=$abc$109383$new_n56380_
+.subckt and2_x1 i0=$abc$109383$new_n56380_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105570
 .subckt nand2_x0 i0=$abc$109383$new_n52333_ i1=$abc$109383$new_n52326_ nq=$abc$109383$new_n56382_
-.subckt oa22_x2 i0=$abc$109383$new_n55144_ i1=$abc$109383$new_n54037_ i2=$abc$109383$new_n56382_ q=$abc$109383$new_n56383_
-.subckt a2_x2 i0=$abc$109383$new_n56383_ i1=$abc$109383$new_n56227_ q=$abc$109383$new_n56384_
-.subckt a3_x2 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n56384_ q=$abc$109383$new_n56385_
-.subckt oa22_x2 i0=soc.cpu.minerva.divider.divisor[31] i1=$abc$109383$new_n56232_ i2=$abc$109383$new_n56385_ q=$abc$109383$new_n56386_
-.subckt a2_x2 i0=$abc$109383$new_n56386_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105574
-.subckt a2_x2 i0=$abc$109383$new_n56232_ i1=$abc$109383$new_n55376_ q=$abc$109383$new_n56388_
+.subckt or21nand_x1 i0=$abc$109383$new_n55144_ i1=$abc$109383$new_n54037_ i2=$abc$109383$new_n56382_ nq=$abc$109383$new_n56383_
+.subckt and2_x1 i0=$abc$109383$new_n56383_ i1=$abc$109383$new_n56227_ q=$abc$109383$new_n56384_
+.subckt and3_x1 i0=$abc$109383$new_n54050_ i1=$abc$109383$new_n54039_ i2=$abc$109383$new_n56384_ q=$abc$109383$new_n56385_
+.subckt or21nand_x1 i0=soc.cpu.minerva.divider.divisor[31] i1=$abc$109383$new_n56232_ i2=$abc$109383$new_n56385_ nq=$abc$109383$new_n56386_
+.subckt and2_x1 i0=$abc$109383$new_n56386_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105574
+.subckt and2_x1 i0=$abc$109383$new_n56232_ i1=$abc$109383$new_n55376_ q=$abc$109383$new_n56388_
 .subckt nand2_x0 i0=$abc$109383$new_n55130_ i1=$abc$109383$new_n55128_ nq=$abc$109383$new_n56389_
-.subckt a2_x2 i0=$abc$109383$new_n56389_ i1=$abc$109383$new_n56231_ q=$abc$109383$new_n56390_
-.subckt nxr2_x1 i0=$abc$109383$new_n56390_ i1=soc.cpu.minerva.divider.timer[0] nq=$abc$109383$new_n56391_
-.subckt a2_x2 i0=$abc$109383$new_n56391_ i1=$abc$109383$new_n56388_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105578
+.subckt and2_x1 i0=$abc$109383$new_n56389_ i1=$abc$109383$new_n56231_ q=$abc$109383$new_n56390_
+.subckt nexor2_x0 i0=$abc$109383$new_n56390_ i1=soc.cpu.minerva.divider.timer[0] nq=$abc$109383$new_n56391_
+.subckt and2_x1 i0=$abc$109383$new_n56391_ i1=$abc$109383$new_n56388_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105578
 .subckt inv_x0 i=soc.cpu.minerva.divider.timer[1] nq=$abc$109383$new_n56393_
 .subckt inv_x0 i=soc.cpu.minerva.divider.timer[0] nq=$abc$109383$new_n56394_
-.subckt ao22_x2 i0=$abc$109383$new_n54058_ i1=$abc$109383$new_n54051_ i2=$abc$109383$new_n56394_ q=$abc$109383$new_n56395_
-.subckt nxr2_x1 i0=$abc$109383$new_n56395_ i1=$abc$109383$new_n56393_ nq=$abc$109383$new_n56396_
-.subckt a2_x2 i0=$abc$109383$new_n56396_ i1=$abc$109383$new_n56388_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105582
+.subckt and21nor_x1 i0=$abc$109383$new_n54058_ i1=$abc$109383$new_n54051_ i2=$abc$109383$new_n56394_ nq=$abc$109383$new_n56395_
+.subckt nexor2_x0 i0=$abc$109383$new_n56395_ i1=$abc$109383$new_n56393_ nq=$abc$109383$new_n56396_
+.subckt and2_x1 i0=$abc$109383$new_n56396_ i1=$abc$109383$new_n56388_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105582
 .subckt nand2_x0 i0=$abc$109383$new_n56232_ i1=$abc$109383$new_n27432_ nq=$abc$109383$new_n56398_
-.subckt a3_x2 i0=$abc$109383$new_n56395_ i1=soc.cpu.minerva.divider.timer[2] i2=$abc$109383$new_n56393_ q=$abc$109383$new_n56399_
+.subckt and3_x1 i0=$abc$109383$new_n56395_ i1=soc.cpu.minerva.divider.timer[2] i2=$abc$109383$new_n56393_ q=$abc$109383$new_n56399_
 .subckt inv_x0 i=soc.cpu.minerva.divider.timer[2] nq=$abc$109383$new_n56400_
-.subckt oa22_x2 i0=$abc$109383$new_n56389_ i1=$abc$109383$new_n56231_ i2=soc.cpu.minerva.divider.timer[0] q=$abc$109383$new_n56401_
-.subckt ao22_x2 i0=soc.cpu.minerva.divider.timer[1] i1=$abc$109383$new_n56401_ i2=$abc$109383$new_n56400_ q=$abc$109383$new_n56402_
+.subckt or21nand_x1 i0=$abc$109383$new_n56389_ i1=$abc$109383$new_n56231_ i2=soc.cpu.minerva.divider.timer[0] nq=$abc$109383$new_n56401_
+.subckt and21nor_x1 i0=soc.cpu.minerva.divider.timer[1] i1=$abc$109383$new_n56401_ i2=$abc$109383$new_n56400_ nq=$abc$109383$new_n56402_
 .subckt nor3_x0 i0=$abc$109383$new_n56402_ i1=$abc$109383$new_n56399_ i2=$abc$109383$new_n56398_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105586
 .subckt nor2_x0 i0=soc.cpu.minerva.divider.timer[2] i1=soc.cpu.minerva.divider.timer[1] nq=$abc$109383$new_n56404_
-.subckt a3_x2 i0=$abc$109383$new_n56395_ i1=$abc$109383$new_n56404_ i2=soc.cpu.minerva.divider.timer[3] q=$abc$109383$new_n56405_
+.subckt and3_x1 i0=$abc$109383$new_n56395_ i1=$abc$109383$new_n56404_ i2=soc.cpu.minerva.divider.timer[3] q=$abc$109383$new_n56405_
 .subckt inv_x0 i=soc.cpu.minerva.divider.timer[3] nq=$abc$109383$new_n56406_
-.subckt o2_x2 i0=soc.cpu.minerva.divider.timer[2] i1=soc.cpu.minerva.divider.timer[1] q=$abc$109383$new_n56407_
-.subckt ao22_x2 i0=$abc$109383$new_n56401_ i1=$abc$109383$new_n56407_ i2=$abc$109383$new_n56406_ q=$abc$109383$new_n56408_
+.subckt or2_x1 i0=soc.cpu.minerva.divider.timer[2] i1=soc.cpu.minerva.divider.timer[1] q=$abc$109383$new_n56407_
+.subckt and21nor_x1 i0=$abc$109383$new_n56401_ i1=$abc$109383$new_n56407_ i2=$abc$109383$new_n56406_ nq=$abc$109383$new_n56408_
 .subckt nor3_x0 i0=$abc$109383$new_n56408_ i1=$abc$109383$new_n56405_ i2=$abc$109383$new_n56398_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105590
-.subckt ao22_x2 i0=$abc$109383$new_n54051_ i1=$abc$109383$new_n54058_ i2=$abc$109383$new_n54055_ q=$abc$109383$new_n56410_
-.subckt nxr2_x1 i0=$abc$109383$new_n56410_ i1=$abc$109383$new_n54054_ nq=$abc$109383$new_n56411_
-.subckt a2_x2 i0=$abc$109383$new_n56411_ i1=$abc$109383$new_n56388_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105594
-.subckt a3_x2 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n55156_ q=$abc$109383$new_n56413_
-.subckt ao22_x2 i0=$abc$109383$new_n56413_ i1=$abc$109383$new_n54053_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n56414_
+.subckt and21nor_x1 i0=$abc$109383$new_n54051_ i1=$abc$109383$new_n54058_ i2=$abc$109383$new_n54055_ nq=$abc$109383$new_n56410_
+.subckt nexor2_x0 i0=$abc$109383$new_n56410_ i1=$abc$109383$new_n54054_ nq=$abc$109383$new_n56411_
+.subckt and2_x1 i0=$abc$109383$new_n56411_ i1=$abc$109383$new_n56388_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105594
+.subckt and3_x1 i0=$abc$109383$new_n54055_ i1=$abc$109383$new_n54054_ i2=$abc$109383$new_n55156_ q=$abc$109383$new_n56413_
+.subckt and21nor_x1 i0=$abc$109383$new_n56413_ i1=$abc$109383$new_n54053_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n56414_
 .subckt nand2_x0 i0=$abc$109383$new_n56414_ i1=$abc$109383$new_n56232_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105598
-.subckt oa22_x2 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n34794_ i2=$abc$109383$new_n53234_ q=$abc$109383$new_n56416_
+.subckt or21nand_x1 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n34794_ i2=$abc$109383$new_n53234_ nq=$abc$109383$new_n56416_
 .subckt nand3_x0 i0=$abc$109383$new_n56416_ i1=$abc$109383$new_n53242_ i2=$abc$109383$new_n28536_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105602
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[3] nq=$abc$109383$new_n56418_
-.subckt oa22_x2 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n34794_ i2=$abc$109383$new_n56418_ q=$abc$109383$new_n56419_
+.subckt or21nand_x1 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n34794_ i2=$abc$109383$new_n56418_ nq=$abc$109383$new_n56419_
 .subckt nand3_x0 i0=$abc$109383$new_n56419_ i1=$abc$109383$new_n53271_ i2=$abc$109383$new_n28536_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105606
 .subckt buf_x4 i=$abc$109383$new_n35098_ q=$abc$109383$new_n56421_
 .subckt nand3_x0 i0=$abc$109383$new_n53303_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n56421_ nq=$abc$109383$new_n56422_
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n56423_
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n56424_
-.subckt oa22_x2 i0=$abc$109383$new_n56424_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n53289_ q=$abc$109383$new_n56425_
-.subckt a2_x2 i0=$abc$109383$new_n56425_ i1=$abc$109383$new_n28044_ q=$abc$109383$new_n56426_
+.subckt or21nand_x1 i0=$abc$109383$new_n56424_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n53289_ nq=$abc$109383$new_n56425_
+.subckt and2_x1 i0=$abc$109383$new_n56425_ i1=$abc$109383$new_n28044_ q=$abc$109383$new_n56426_
 .subckt nand2_x0 i0=$abc$109383$new_n56426_ i1=$abc$109383$new_n56422_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105610
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n29222_ i2=soc.cpu.minerva.payload__pc$25[5] q=$abc$109383$new_n56428_
-.subckt o3_x2 i0=$abc$109383$new_n56428_ i1=$abc$109383$new_n53332_ i2=$abc$109383$new_n28532_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105614
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n29222_ i2=soc.cpu.minerva.payload__pc$25[5] nq=$abc$109383$new_n56428_
+.subckt or3_x1 i0=$abc$109383$new_n56428_ i1=$abc$109383$new_n53332_ i2=$abc$109383$new_n28532_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105614
 .subckt buf_x4 i=$abc$109383$new_n27603_ q=$abc$109383$new_n56430_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[6] nq=$abc$109383$new_n56431_
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n56431_ q=$abc$109383$new_n56432_
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n56431_ nq=$abc$109383$new_n56432_
 .subckt nand2_x0 i0=$abc$109383$new_n56432_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56433_
-.subckt a2_x2 i0=$abc$109383$new_n53209_ i1=$abc$109383$new_n29825_ q=$abc$109383$new_n56434_
+.subckt and2_x1 i0=$abc$109383$new_n53209_ i1=$abc$109383$new_n29825_ q=$abc$109383$new_n56434_
 .subckt buf_x4 i=$abc$109383$new_n56434_ q=$abc$109383$new_n56435_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53352_ i2=$abc$109383$new_n56433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105618
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53352_ i2=$abc$109383$new_n56433_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105618
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[7] nq=$abc$109383$new_n56437_
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n56437_ q=$abc$109383$new_n56438_
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n56437_ nq=$abc$109383$new_n56438_
 .subckt nand2_x0 i0=$abc$109383$new_n56438_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56439_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53375_ i2=$abc$109383$new_n56439_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105622
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53392_ q=$abc$109383$new_n56441_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53375_ i2=$abc$109383$new_n56439_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105622
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53392_ nq=$abc$109383$new_n56441_
 .subckt nand2_x0 i0=$abc$109383$new_n56441_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56442_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53405_ i2=$abc$109383$new_n56442_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105626
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53414_ q=$abc$109383$new_n56444_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53405_ i2=$abc$109383$new_n56442_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105626
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53414_ nq=$abc$109383$new_n56444_
 .subckt nand2_x0 i0=$abc$109383$new_n56444_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56445_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53426_ i2=$abc$109383$new_n56445_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105630
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53435_ q=$abc$109383$new_n56447_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53426_ i2=$abc$109383$new_n56445_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105630
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53435_ nq=$abc$109383$new_n56447_
 .subckt nand2_x0 i0=$abc$109383$new_n56447_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56448_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53447_ i2=$abc$109383$new_n56448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105634
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53447_ i2=$abc$109383$new_n56448_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105634
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[11] nq=$abc$109383$new_n56450_
-.subckt oa22_x2 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n33877_ i2=$abc$109383$new_n56450_ q=$abc$109383$new_n56451_
-.subckt ao22_x2 i0=$abc$109383$new_n53467_ i1=$abc$109383$new_n53354_ i2=$abc$109383$new_n27942_ q=$abc$109383$new_n56452_
+.subckt or21nand_x1 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n33877_ i2=$abc$109383$new_n56450_ nq=$abc$109383$new_n56451_
+.subckt and21nor_x1 i0=$abc$109383$new_n53467_ i1=$abc$109383$new_n53354_ i2=$abc$109383$new_n27942_ nq=$abc$109383$new_n56452_
 .subckt nand2_x0 i0=$abc$109383$new_n56452_ i1=$abc$109383$new_n56451_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105638
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$25[12] nq=$abc$109383$new_n56454_
-.subckt oa22_x2 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n33877_ i2=$abc$109383$new_n56454_ q=$abc$109383$new_n56455_
-.subckt ao22_x2 i0=$abc$109383$new_n53492_ i1=$abc$109383$new_n53354_ i2=$abc$109383$new_n56430_ q=$abc$109383$new_n56456_
+.subckt or21nand_x1 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n33877_ i2=$abc$109383$new_n56454_ nq=$abc$109383$new_n56455_
+.subckt and21nor_x1 i0=$abc$109383$new_n53492_ i1=$abc$109383$new_n53354_ i2=$abc$109383$new_n56430_ nq=$abc$109383$new_n56456_
 .subckt nand2_x0 i0=$abc$109383$new_n56456_ i1=$abc$109383$new_n56455_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105642
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53501_ q=$abc$109383$new_n56458_
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53501_ nq=$abc$109383$new_n56458_
 .subckt nand2_x0 i0=$abc$109383$new_n56458_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56459_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53518_ i2=$abc$109383$new_n56459_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105646
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53527_ q=$abc$109383$new_n56461_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53518_ i2=$abc$109383$new_n56459_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105646
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53527_ nq=$abc$109383$new_n56461_
 .subckt nand2_x0 i0=$abc$109383$new_n56461_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56462_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53543_ i2=$abc$109383$new_n56462_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105650
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53557_ q=$abc$109383$new_n56464_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53543_ i2=$abc$109383$new_n56462_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105650
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53557_ nq=$abc$109383$new_n56464_
 .subckt nand2_x0 i0=$abc$109383$new_n56464_ i1=$abc$109383$new_n56430_ nq=$abc$109383$new_n56465_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53570_ i2=$abc$109383$new_n56465_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105654
-.subckt oa22_x2 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53583_ q=$abc$109383$new_n56467_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53570_ i2=$abc$109383$new_n56465_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105654
+.subckt or21nand_x1 i0=$abc$109383$new_n54017_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53583_ nq=$abc$109383$new_n56467_
 .subckt nand2_x0 i0=$abc$109383$new_n56467_ i1=$abc$109383$new_n28649_ nq=$abc$109383$new_n56468_
-.subckt oa22_x2 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53595_ i2=$abc$109383$new_n56468_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105658
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53607_ q=$abc$109383$new_n56470_
+.subckt or21nand_x1 i0=$abc$109383$new_n56435_ i1=$abc$109383$new_n53595_ i2=$abc$109383$new_n56468_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105658
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53607_ nq=$abc$109383$new_n56470_
 .subckt nand2_x0 i0=$abc$109383$new_n56470_ i1=$abc$109383$new_n28649_ nq=$abc$109383$new_n56471_
-.subckt oa22_x2 i0=$abc$109383$new_n56434_ i1=$abc$109383$new_n53617_ i2=$abc$109383$new_n56471_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105662
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53629_ q=$abc$109383$new_n56473_
+.subckt or21nand_x1 i0=$abc$109383$new_n56434_ i1=$abc$109383$new_n53617_ i2=$abc$109383$new_n56471_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105662
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n40816_ i2=$abc$109383$new_n53629_ nq=$abc$109383$new_n56473_
 .subckt nand2_x0 i0=$abc$109383$new_n56473_ i1=$abc$109383$new_n28649_ nq=$abc$109383$new_n56474_
-.subckt oa22_x2 i0=$abc$109383$new_n56434_ i1=$abc$109383$new_n53642_ i2=$abc$109383$new_n56474_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105666
+.subckt or21nand_x1 i0=$abc$109383$new_n56434_ i1=$abc$109383$new_n53642_ i2=$abc$109383$new_n56474_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105666
 .subckt nand3_x0 i0=$abc$109383$new_n53653_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n34794_ nq=$abc$109383$new_n56476_
-.subckt a2_x2 i0=$abc$109383$new_n53655_ i1=$abc$109383$new_n53237_ q=$abc$109383$new_n56477_
-.subckt nxr2_x1 i0=$abc$109383$new_n53659_ i1=soc.cpu.minerva.payload__pc$25[19] nq=$abc$109383$new_n56478_
-.subckt oa22_x2 i0=$abc$109383$new_n56478_ i1=$abc$109383$new_n52658_ i2=$abc$109383$new_n53288_ q=$abc$109383$new_n56479_
+.subckt and2_x1 i0=$abc$109383$new_n53655_ i1=$abc$109383$new_n53237_ q=$abc$109383$new_n56477_
+.subckt nexor2_x0 i0=$abc$109383$new_n53659_ i1=soc.cpu.minerva.payload__pc$25[19] nq=$abc$109383$new_n56478_
+.subckt or21nand_x1 i0=$abc$109383$new_n56478_ i1=$abc$109383$new_n52658_ i2=$abc$109383$new_n53288_ nq=$abc$109383$new_n56479_
 .subckt nand4_x0 i0=$abc$109383$new_n15374_ i1=$abc$109383$new_n15342_ i2=$abc$109383$new_n15291_ i3=$abc$109383$new_n53626_ nq=$abc$109383$new_n56480_
-.subckt oa22_x2 i0=$abc$109383$new_n56480_ i1=$abc$109383$new_n53639_ i2=$abc$109383$new_n53726_ q=$abc$109383$new_n56481_
-.subckt nxr2_x1 i0=$abc$109383$new_n53671_ i1=$abc$109383$new_n56481_ nq=$abc$109383$new_n56482_
-.subckt oa22_x2 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n56482_ i2=$abc$109383$new_n56479_ q=$abc$109383$new_n56483_
-.subckt oa22_x2 i0=$abc$109383$new_n56483_ i1=$abc$109383$new_n56477_ i2=$abc$109383$new_n56476_ q=$abc$109383$new_n56484_
+.subckt or21nand_x1 i0=$abc$109383$new_n56480_ i1=$abc$109383$new_n53639_ i2=$abc$109383$new_n53726_ nq=$abc$109383$new_n56481_
+.subckt nexor2_x0 i0=$abc$109383$new_n53671_ i1=$abc$109383$new_n56481_ nq=$abc$109383$new_n56482_
+.subckt or21nand_x1 i0=$abc$109383$new_n53260_ i1=$abc$109383$new_n56482_ i2=$abc$109383$new_n56479_ nq=$abc$109383$new_n56483_
+.subckt or21nand_x1 i0=$abc$109383$new_n56483_ i1=$abc$109383$new_n56477_ i2=$abc$109383$new_n56476_ nq=$abc$109383$new_n56484_
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n56485_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n53658_ q=$abc$109383$new_n56486_
-.subckt a2_x2 i0=$abc$109383$new_n56486_ i1=$abc$109383$new_n28044_ q=$abc$109383$new_n56487_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n53658_ nq=$abc$109383$new_n56486_
+.subckt and2_x1 i0=$abc$109383$new_n56486_ i1=$abc$109383$new_n28044_ q=$abc$109383$new_n56487_
 .subckt nand2_x0 i0=$abc$109383$new_n56487_ i1=$abc$109383$new_n56484_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105670
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53703_ i1=soc.cpu.minerva.payload__pc$25[20] q=$abc$109383$new_n56489_
-.subckt a2_x2 i0=$abc$109383$new_n56489_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105674
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$25[21] q=$abc$109383$new_n56491_
-.subckt ao22_x2 i0=$abc$109383$new_n56491_ i1=$abc$109383$new_n53736_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105678
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53763_ i1=soc.cpu.minerva.payload__pc$25[22] q=$abc$109383$new_n56493_
-.subckt a2_x2 i0=$abc$109383$new_n56493_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105682
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53788_ i1=soc.cpu.minerva.payload__pc$25[23] q=$abc$109383$new_n56495_
-.subckt a2_x2 i0=$abc$109383$new_n56495_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105686
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53703_ i1=soc.cpu.minerva.payload__pc$25[20] q=$abc$109383$new_n56489_
+.subckt and2_x1 i0=$abc$109383$new_n56489_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105674
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n30235_ i2=soc.cpu.minerva.payload__pc$25[21] nq=$abc$109383$new_n56491_
+.subckt and21nor_x1 i0=$abc$109383$new_n56491_ i1=$abc$109383$new_n53736_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105678
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53763_ i1=soc.cpu.minerva.payload__pc$25[22] q=$abc$109383$new_n56493_
+.subckt and2_x1 i0=$abc$109383$new_n56493_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105682
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53788_ i1=soc.cpu.minerva.payload__pc$25[23] q=$abc$109383$new_n56495_
+.subckt and2_x1 i0=$abc$109383$new_n56495_ i1=$abc$109383$new_n56352_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105686
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n56497_
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53815_ i1=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n56498_
-.subckt a2_x2 i0=$abc$109383$new_n56498_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105690
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53843_ i1=soc.cpu.minerva.payload__pc$25[25] q=$abc$109383$new_n56500_
-.subckt a2_x2 i0=$abc$109383$new_n56500_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105694
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53871_ i1=soc.cpu.minerva.payload__pc$25[26] q=$abc$109383$new_n56502_
-.subckt a2_x2 i0=$abc$109383$new_n56502_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105698
-.subckt mx2_x2 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53898_ i1=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n56504_
-.subckt a2_x2 i0=$abc$109383$new_n56504_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105702
-.subckt mx2_x2 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53928_ i1=soc.cpu.minerva.payload__pc$25[28] q=$abc$109383$new_n56506_
-.subckt a2_x2 i0=$abc$109383$new_n56506_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105706
-.subckt mx2_x2 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53953_ i1=soc.cpu.minerva.payload__pc$25[29] q=$abc$109383$new_n56508_
-.subckt a2_x2 i0=$abc$109383$new_n56508_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105710
-.subckt mx2_x2 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53982_ i1=soc.cpu.minerva.payload__pc$25[30] q=$abc$109383$new_n56510_
-.subckt a2_x2 i0=$abc$109383$new_n56510_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105714
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53815_ i1=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n56498_
+.subckt and2_x1 i0=$abc$109383$new_n56498_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105690
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53843_ i1=soc.cpu.minerva.payload__pc$25[25] q=$abc$109383$new_n56500_
+.subckt and2_x1 i0=$abc$109383$new_n56500_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105694
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53871_ i1=soc.cpu.minerva.payload__pc$25[26] q=$abc$109383$new_n56502_
+.subckt and2_x1 i0=$abc$109383$new_n56502_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105698
+.subckt mux2_x1 cmd=$abc$109383$new_n53954_ i0=$abc$109383$new_n53898_ i1=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n56504_
+.subckt and2_x1 i0=$abc$109383$new_n56504_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105702
+.subckt mux2_x1 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53928_ i1=soc.cpu.minerva.payload__pc$25[28] q=$abc$109383$new_n56506_
+.subckt and2_x1 i0=$abc$109383$new_n56506_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105706
+.subckt mux2_x1 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53953_ i1=soc.cpu.minerva.payload__pc$25[29] q=$abc$109383$new_n56508_
+.subckt and2_x1 i0=$abc$109383$new_n56508_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105710
+.subckt mux2_x1 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53982_ i1=soc.cpu.minerva.payload__pc$25[30] q=$abc$109383$new_n56510_
+.subckt and2_x1 i0=$abc$109383$new_n56510_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105714
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n56512_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__pc$25[31] q=$abc$109383$new_n56513_
-.subckt ao22_x2 i0=$abc$109383$new_n56513_ i1=$abc$109383$new_n54012_ i2=$abc$109383$new_n52623_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$105718
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__pc$25[31] nq=$abc$109383$new_n56513_
+.subckt and21nor_x1 i0=$abc$109383$new_n56513_ i1=$abc$109383$new_n54012_ i2=$abc$109383$new_n52623_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105718
 .subckt nand3_x0 i0=$abc$109383$new_n29197_ i1=$abc$109383$new_n42784_ i2=$abc$109383$new_n29193_ nq=$abc$109383$new_n56515_
-.subckt a3_x2 i0=$abc$109383$new_n53231_ i1=$abc$109383$new_n53237_ i2=soc.cpu.minerva.f.valid$1 q=$abc$109383$new_n56516_
+.subckt and3_x1 i0=$abc$109383$new_n53231_ i1=$abc$109383$new_n53237_ i2=soc.cpu.minerva.f.valid$1 q=$abc$109383$new_n56516_
 .subckt nand4_x0 i0=$abc$109383$new_n15505_ i1=$abc$109383$new_n15436_ i2=$abc$109383$new_n56516_ i3=$abc$109383$new_n34794_ nq=$abc$109383$new_n56517_
-.subckt a2_x2 i0=$abc$109383$new_n56517_ i1=$abc$109383$new_n56515_ q=$abc$109383$new_n56518_
+.subckt and2_x1 i0=$abc$109383$new_n56517_ i1=$abc$109383$new_n56515_ q=$abc$109383$new_n56518_
 .subckt nor2_x0 i0=$abc$109383$new_n56518_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106246
-.subckt a2_x2 i0=$abc$109383$new_n30273_ i1=$abc$109383$new_n30289_ q=$abc$109383$new_n56520_
-.subckt o2_x2 i0=$abc$109383$new_n56520_ i1=$abc$109383$new_n15295_ q=$abc$109383$new_n56521_
-.subckt a2_x2 i0=$abc$109383$new_n15300_ i1=$abc$109383$new_n15346_ q=$abc$109383$new_n56522_
+.subckt and2_x1 i0=$abc$109383$new_n30273_ i1=$abc$109383$new_n30289_ q=$abc$109383$new_n56520_
+.subckt or2_x1 i0=$abc$109383$new_n56520_ i1=$abc$109383$new_n15295_ q=$abc$109383$new_n56521_
+.subckt and2_x1 i0=$abc$109383$new_n15300_ i1=$abc$109383$new_n15346_ q=$abc$109383$new_n56522_
 .subckt inv_x1 i=$abc$109383$new_n15329_ nq=$abc$109383$new_n56523_
 .subckt buf_x4 i=$abc$109383$new_n15321_ q=$abc$109383$new_n56524_
 .subckt nor4_x0 i0=$abc$109383$new_n53915_ i1=$abc$109383$new_n15467_ i2=$abc$109383$new_n53859_ i3=$abc$109383$new_n56524_ nq=$abc$109383$new_n56525_
 .subckt nor3_x0 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n54000_ i2=$abc$109383$new_n15263_ nq=$abc$109383$new_n56526_
-.subckt oa22_x2 i0=$abc$109383$new_n56526_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n56523_ q=$abc$109383$new_n56527_
+.subckt or21nand_x1 i0=$abc$109383$new_n56526_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n56523_ nq=$abc$109383$new_n56527_
 .subckt nand3_x0 i0=$abc$109383$new_n56527_ i1=$abc$109383$new_n56522_ i2=$abc$109383$new_n56520_ nq=$abc$109383$new_n56528_
-.subckt o3_x2 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30273_ i2=$abc$109383$new_n15349_ q=$abc$109383$new_n56529_
+.subckt or3_x1 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30273_ i2=$abc$109383$new_n15349_ q=$abc$109383$new_n56529_
 .subckt nand2_x0 i0=$abc$109383$new_n15353_ i1=$abc$109383$new_n15300_ nq=$abc$109383$new_n56530_
 .subckt nor2_x0 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n15263_ nq=$abc$109383$new_n56531_
 .subckt nand3_x0 i0=$abc$109383$new_n56531_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n54000_ nq=$abc$109383$new_n56532_
-.subckt o3_x2 i0=$abc$109383$new_n56532_ i1=$abc$109383$new_n56530_ i2=$abc$109383$new_n56529_ q=$abc$109383$new_n56533_
-.subckt a3_x2 i0=$abc$109383$new_n56533_ i1=$abc$109383$new_n56528_ i2=$abc$109383$new_n56521_ q=$abc$109383$new_n56534_
+.subckt or3_x1 i0=$abc$109383$new_n56532_ i1=$abc$109383$new_n56530_ i2=$abc$109383$new_n56529_ q=$abc$109383$new_n56533_
+.subckt and3_x1 i0=$abc$109383$new_n56533_ i1=$abc$109383$new_n56528_ i2=$abc$109383$new_n56521_ q=$abc$109383$new_n56534_
 .subckt nand3_x0 i0=$abc$109383$new_n56534_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n56535_
 .subckt buf_x4 i=$abc$109383$new_n34793_ q=$abc$109383$new_n56536_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=$abc$109383$new_n51911_ q=$abc$109383$new_n56537_
-.subckt a3_x2 i0=$abc$109383$new_n56537_ i1=$abc$109383$new_n56535_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106298
-.subckt a2_x2 i0=$abc$109383$new_n52661_ i1=$abc$109383$new_n52658_ q=$abc$109383$new_n56539_
-.subckt oa22_x2 i0=$abc$109383$new_n52667_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n56539_ q=$abc$109383$new_n56540_
-.subckt a2_x2 i0=$abc$109383$new_n56540_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106334
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=$abc$109383$new_n51911_ nq=$abc$109383$new_n56537_
+.subckt and3_x1 i0=$abc$109383$new_n56537_ i1=$abc$109383$new_n56535_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106298
+.subckt and2_x1 i0=$abc$109383$new_n52661_ i1=$abc$109383$new_n52658_ q=$abc$109383$new_n56539_
+.subckt or21nand_x1 i0=$abc$109383$new_n52667_ i1=$abc$109383$new_n52666_ i2=$abc$109383$new_n56539_ nq=$abc$109383$new_n56540_
+.subckt and2_x1 i0=$abc$109383$new_n56540_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106334
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n56542_
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n56543_
 .subckt inv_x0 i=soc.cpu.minerva.payload__multiply$104 nq=$abc$109383$new_n56544_
 .subckt nor3_x0 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n56544_ nq=$abc$109383$new_n56545_
 .subckt buf_x4 i=$abc$109383$new_n15236_ q=$abc$109383$new_n56546_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n56547_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n19958_ q=$abc$109383$new_n56548_
-.subckt ao22_x2 i0=$abc$109383$new_n56548_ i1=$abc$109383$new_n56545_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106338
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n19958_ nq=$abc$109383$new_n56548_
+.subckt and21nor_x1 i0=$abc$109383$new_n56548_ i1=$abc$109383$new_n56545_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106338
 .subckt nand4_x0 i0=$abc$109383$new_n15247_ i1=$abc$109383$new_n15246_ i2=$abc$109383$new_n54542_ i3=$abc$109383$new_n40104_ nq=$abc$109383$new_n56550_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n19827_ q=$abc$109383$new_n56551_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n19827_ nq=$abc$109383$new_n56551_
 .subckt nor2_x0 i0=$abc$109383$new_n56551_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56552_
-.subckt a2_x2 i0=$abc$109383$new_n56552_ i1=$abc$109383$new_n56550_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106342
-.subckt ao22_x2 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n19854_ q=$abc$109383$new_n56554_
+.subckt and2_x1 i0=$abc$109383$new_n56552_ i1=$abc$109383$new_n56550_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106342
+.subckt and21nor_x1 i0=$abc$109383$new_n40355_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n19854_ nq=$abc$109383$new_n56554_
 .subckt nor2_x0 i0=$abc$109383$new_n56554_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n56555_
 .subckt buf_x4 i=soc.cpu.minerva.payload__divide$106 q=$abc$109383$new_n56556_
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[0] i1=soc.cpu.minerva.divider.remainder[0] q=$abc$109383$new_n56557_
-.subckt a2_x2 i0=$abc$109383$new_n56557_ i1=$abc$109383$new_n56556_ q=$abc$109383$new_n56558_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[31] i1=soc.cpu.minerva.shifter.m_result$9[0] q=$abc$109383$new_n56559_
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[0] i1=soc.cpu.minerva.divider.remainder[0] q=$abc$109383$new_n56557_
+.subckt and2_x1 i0=$abc$109383$new_n56557_ i1=$abc$109383$new_n56556_ q=$abc$109383$new_n56558_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[31] i1=soc.cpu.minerva.shifter.m_result$9[0] q=$abc$109383$new_n56559_
 .subckt inv_x1 i=soc.cpu.minerva.payload__shift$95 nq=$abc$109383$new_n56560_
 .subckt buf_x4 i=$abc$109383$new_n56560_ q=$abc$109383$new_n56561_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56559_ i1=soc.cpu.minerva.payload__result$93[0] q=$abc$109383$new_n56562_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56559_ i1=soc.cpu.minerva.payload__result$93[0] q=$abc$109383$new_n56562_
 .subckt inv_x0 i=$abc$109383$new_n56556_ nq=$abc$109383$new_n56563_
-.subckt oa22_x2 i0=$abc$109383$new_n56563_ i1=$abc$109383$new_n56562_ i2=$abc$109383$new_n56558_ q=$abc$109383$new_n56564_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__compare$102 i0=$abc$109383$new_n56564_ i1=soc.cpu.minerva.payload__condition_met$107 q=$abc$109383$new_n56565_
-.subckt ao22_x2 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n56565_ i2=$abc$109383$new_n56555_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106346
+.subckt or21nand_x1 i0=$abc$109383$new_n56563_ i1=$abc$109383$new_n56562_ i2=$abc$109383$new_n56558_ nq=$abc$109383$new_n56564_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__compare$102 i0=$abc$109383$new_n56564_ i1=soc.cpu.minerva.payload__condition_met$107 q=$abc$109383$new_n56565_
+.subckt and21nor_x1 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n56565_ i2=$abc$109383$new_n56555_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106346
 .subckt buf_x4 i=soc.cpu.minerva.divider.m_modulus q=$abc$109383$new_n56567_
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[1] i1=soc.cpu.minerva.divider.remainder[1] q=$abc$109383$new_n56568_
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[1] i1=soc.cpu.minerva.divider.remainder[1] q=$abc$109383$new_n56568_
 .subckt buf_x4 i=soc.cpu.minerva.shifter.m_direction q=$abc$109383$new_n56569_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[30] i1=soc.cpu.minerva.shifter.m_result$9[1] q=$abc$109383$new_n56570_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[30] i1=soc.cpu.minerva.shifter.m_result$9[1] q=$abc$109383$new_n56570_
 .subckt buf_x4 i=$abc$109383$new_n56560_ q=$abc$109383$new_n56571_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56570_ i1=soc.cpu.minerva.payload__result$93[1] q=$abc$109383$new_n56572_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56570_ i1=soc.cpu.minerva.payload__result$93[1] q=$abc$109383$new_n56572_
 .subckt buf_x4 i=soc.cpu.minerva.payload__divide$106 q=$abc$109383$new_n56573_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56572_ i1=$abc$109383$new_n56568_ q=$abc$109383$new_n56574_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56572_ i1=$abc$109383$new_n56568_ q=$abc$109383$new_n56574_
 .subckt inv_x1 i=soc.cpu.minerva.payload__compare$102 nq=$abc$109383$new_n56575_
 .subckt buf_x4 i=$abc$109383$new_n56575_ q=$abc$109383$new_n56576_
 .subckt buf_x4 i=$abc$109383$new_n56576_ q=$abc$109383$new_n56577_
 .subckt buf_x4 i=$abc$109383$new_n56577_ q=$abc$109383$new_n56578_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56574_ i2=$abc$109383$new_n29223_ q=$abc$109383$new_n56579_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n19926_ q=$abc$109383$new_n56580_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56574_ i2=$abc$109383$new_n29223_ nq=$abc$109383$new_n56579_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n19926_ nq=$abc$109383$new_n56580_
 .subckt nor2_x0 i0=$abc$109383$new_n56580_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56581_
-.subckt a2_x2 i0=$abc$109383$new_n56581_ i1=$abc$109383$new_n56579_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106350
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[2] i1=soc.cpu.minerva.divider.remainder[2] q=$abc$109383$new_n56583_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[29] i1=soc.cpu.minerva.shifter.m_result$9[2] q=$abc$109383$new_n56584_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56584_ i1=soc.cpu.minerva.payload__result$93[2] q=$abc$109383$new_n56585_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56585_ i1=$abc$109383$new_n56583_ q=$abc$109383$new_n56586_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56586_ i2=$abc$109383$new_n29223_ q=$abc$109383$new_n56587_
+.subckt and2_x1 i0=$abc$109383$new_n56581_ i1=$abc$109383$new_n56579_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106350
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[2] i1=soc.cpu.minerva.divider.remainder[2] q=$abc$109383$new_n56583_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[29] i1=soc.cpu.minerva.shifter.m_result$9[2] q=$abc$109383$new_n56584_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56584_ i1=soc.cpu.minerva.payload__result$93[2] q=$abc$109383$new_n56585_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56585_ i1=$abc$109383$new_n56583_ q=$abc$109383$new_n56586_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56586_ i2=$abc$109383$new_n29223_ nq=$abc$109383$new_n56587_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[2] nq=$abc$109383$new_n56588_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56588_ q=$abc$109383$new_n56589_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56588_ nq=$abc$109383$new_n56589_
 .subckt nor2_x0 i0=$abc$109383$new_n56589_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56590_
-.subckt a2_x2 i0=$abc$109383$new_n56590_ i1=$abc$109383$new_n56587_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106354
+.subckt and2_x1 i0=$abc$109383$new_n56590_ i1=$abc$109383$new_n56587_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106354
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n56592_
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[3] i1=soc.cpu.minerva.divider.remainder[3] q=$abc$109383$new_n56593_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[28] i1=soc.cpu.minerva.shifter.m_result$9[3] q=$abc$109383$new_n56594_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56594_ i1=soc.cpu.minerva.payload__result$93[3] q=$abc$109383$new_n56595_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56595_ i1=$abc$109383$new_n56593_ q=$abc$109383$new_n56596_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56596_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56597_
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[3] i1=soc.cpu.minerva.divider.remainder[3] q=$abc$109383$new_n56593_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[28] i1=soc.cpu.minerva.shifter.m_result$9[3] q=$abc$109383$new_n56594_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56594_ i1=soc.cpu.minerva.payload__result$93[3] q=$abc$109383$new_n56595_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56595_ i1=$abc$109383$new_n56593_ q=$abc$109383$new_n56596_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56596_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56597_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[3] nq=$abc$109383$new_n56598_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56598_ q=$abc$109383$new_n56599_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56598_ nq=$abc$109383$new_n56599_
 .subckt nor2_x0 i0=$abc$109383$new_n56599_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56600_
-.subckt a2_x2 i0=$abc$109383$new_n56600_ i1=$abc$109383$new_n56597_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106358
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[4] i1=soc.cpu.minerva.divider.remainder[4] q=$abc$109383$new_n56602_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[27] i1=soc.cpu.minerva.shifter.m_result$9[4] q=$abc$109383$new_n56603_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56603_ i1=soc.cpu.minerva.payload__result$93[4] q=$abc$109383$new_n56604_
-.subckt mx2_x2 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56604_ i1=$abc$109383$new_n56602_ q=$abc$109383$new_n56605_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56605_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56606_
+.subckt and2_x1 i0=$abc$109383$new_n56600_ i1=$abc$109383$new_n56597_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106358
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[4] i1=soc.cpu.minerva.divider.remainder[4] q=$abc$109383$new_n56602_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[27] i1=soc.cpu.minerva.shifter.m_result$9[4] q=$abc$109383$new_n56603_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56603_ i1=soc.cpu.minerva.payload__result$93[4] q=$abc$109383$new_n56604_
+.subckt mux2_x1 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56604_ i1=$abc$109383$new_n56602_ q=$abc$109383$new_n56605_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56605_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56606_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[4] nq=$abc$109383$new_n56607_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56607_ q=$abc$109383$new_n56608_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56607_ nq=$abc$109383$new_n56608_
 .subckt nor2_x0 i0=$abc$109383$new_n56608_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56609_
-.subckt a2_x2 i0=$abc$109383$new_n56609_ i1=$abc$109383$new_n56606_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106362
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[5] i1=soc.cpu.minerva.divider.remainder[5] q=$abc$109383$new_n56611_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[26] i1=soc.cpu.minerva.shifter.m_result$9[5] q=$abc$109383$new_n56612_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56612_ i1=soc.cpu.minerva.payload__result$93[5] q=$abc$109383$new_n56613_
-.subckt mx2_x2 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56613_ i1=$abc$109383$new_n56611_ q=$abc$109383$new_n56614_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56614_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56615_
+.subckt and2_x1 i0=$abc$109383$new_n56609_ i1=$abc$109383$new_n56606_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106362
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[5] i1=soc.cpu.minerva.divider.remainder[5] q=$abc$109383$new_n56611_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[26] i1=soc.cpu.minerva.shifter.m_result$9[5] q=$abc$109383$new_n56612_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56612_ i1=soc.cpu.minerva.payload__result$93[5] q=$abc$109383$new_n56613_
+.subckt mux2_x1 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56613_ i1=$abc$109383$new_n56611_ q=$abc$109383$new_n56614_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56614_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56615_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[5] nq=$abc$109383$new_n56616_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56616_ q=$abc$109383$new_n56617_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56616_ nq=$abc$109383$new_n56617_
 .subckt nor2_x0 i0=$abc$109383$new_n56617_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56618_
-.subckt a2_x2 i0=$abc$109383$new_n56618_ i1=$abc$109383$new_n56615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106366
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[6] i1=soc.cpu.minerva.divider.remainder[6] q=$abc$109383$new_n56620_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[25] i1=soc.cpu.minerva.shifter.m_result$9[6] q=$abc$109383$new_n56621_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56621_ i1=soc.cpu.minerva.payload__result$93[6] q=$abc$109383$new_n56622_
-.subckt mx2_x2 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56622_ i1=$abc$109383$new_n56620_ q=$abc$109383$new_n56623_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56623_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56624_
+.subckt and2_x1 i0=$abc$109383$new_n56618_ i1=$abc$109383$new_n56615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106366
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[6] i1=soc.cpu.minerva.divider.remainder[6] q=$abc$109383$new_n56620_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[25] i1=soc.cpu.minerva.shifter.m_result$9[6] q=$abc$109383$new_n56621_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56621_ i1=soc.cpu.minerva.payload__result$93[6] q=$abc$109383$new_n56622_
+.subckt mux2_x1 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56622_ i1=$abc$109383$new_n56620_ q=$abc$109383$new_n56623_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56623_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56624_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[6] nq=$abc$109383$new_n56625_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56625_ q=$abc$109383$new_n56626_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56625_ nq=$abc$109383$new_n56626_
 .subckt nor2_x0 i0=$abc$109383$new_n56626_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56627_
-.subckt a2_x2 i0=$abc$109383$new_n56627_ i1=$abc$109383$new_n56624_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106370
+.subckt and2_x1 i0=$abc$109383$new_n56627_ i1=$abc$109383$new_n56624_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106370
 .subckt buf_x4 i=soc.cpu.minerva.divider.m_modulus q=$abc$109383$new_n56629_
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[7] i1=soc.cpu.minerva.divider.remainder[7] q=$abc$109383$new_n56630_
-.subckt mx2_x2 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[24] i1=soc.cpu.minerva.shifter.m_result$9[7] q=$abc$109383$new_n56631_
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[7] i1=soc.cpu.minerva.divider.remainder[7] q=$abc$109383$new_n56630_
+.subckt mux2_x1 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[24] i1=soc.cpu.minerva.shifter.m_result$9[7] q=$abc$109383$new_n56631_
 .subckt buf_x4 i=$abc$109383$new_n56560_ q=$abc$109383$new_n56632_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56631_ i1=soc.cpu.minerva.payload__result$93[7] q=$abc$109383$new_n56633_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56633_ i1=$abc$109383$new_n56630_ q=$abc$109383$new_n56634_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56634_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56635_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56631_ i1=soc.cpu.minerva.payload__result$93[7] q=$abc$109383$new_n56633_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56633_ i1=$abc$109383$new_n56630_ q=$abc$109383$new_n56634_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56634_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56635_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[7] nq=$abc$109383$new_n56636_
-.subckt ao22_x2 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56636_ q=$abc$109383$new_n56637_
+.subckt and21nor_x1 i0=$abc$109383$new_n34494_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56636_ nq=$abc$109383$new_n56637_
 .subckt nor2_x0 i0=$abc$109383$new_n56637_ i1=$abc$109383$new_n34492_ nq=$abc$109383$new_n56638_
-.subckt a2_x2 i0=$abc$109383$new_n56638_ i1=$abc$109383$new_n56635_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106374
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[8] i1=soc.cpu.minerva.divider.remainder[8] q=$abc$109383$new_n56640_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[23] i1=soc.cpu.minerva.shifter.m_result$9[8] q=$abc$109383$new_n56641_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56641_ i1=soc.cpu.minerva.payload__result$93[8] q=$abc$109383$new_n56642_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56642_ i1=$abc$109383$new_n56640_ q=$abc$109383$new_n56643_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56643_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56644_
+.subckt and2_x1 i0=$abc$109383$new_n56638_ i1=$abc$109383$new_n56635_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106374
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[8] i1=soc.cpu.minerva.divider.remainder[8] q=$abc$109383$new_n56640_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[23] i1=soc.cpu.minerva.shifter.m_result$9[8] q=$abc$109383$new_n56641_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56641_ i1=soc.cpu.minerva.payload__result$93[8] q=$abc$109383$new_n56642_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56642_ i1=$abc$109383$new_n56640_ q=$abc$109383$new_n56643_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56643_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56644_
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n56645_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[8] nq=$abc$109383$new_n56646_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n56647_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56646_ q=$abc$109383$new_n56648_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n39590_ i2=$abc$109383$new_n56646_ nq=$abc$109383$new_n56648_
 .subckt nor2_x0 i0=$abc$109383$new_n56648_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56649_
-.subckt a2_x2 i0=$abc$109383$new_n56649_ i1=$abc$109383$new_n56644_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106378
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[9] i1=soc.cpu.minerva.divider.remainder[9] q=$abc$109383$new_n56651_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[22] i1=soc.cpu.minerva.shifter.m_result$9[9] q=$abc$109383$new_n56652_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56652_ i1=soc.cpu.minerva.payload__result$93[9] q=$abc$109383$new_n56653_
-.subckt mx2_x2 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56653_ i1=$abc$109383$new_n56651_ q=$abc$109383$new_n56654_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56654_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56655_
+.subckt and2_x1 i0=$abc$109383$new_n56649_ i1=$abc$109383$new_n56644_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106378
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[9] i1=soc.cpu.minerva.divider.remainder[9] q=$abc$109383$new_n56651_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[22] i1=soc.cpu.minerva.shifter.m_result$9[9] q=$abc$109383$new_n56652_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56652_ i1=soc.cpu.minerva.payload__result$93[9] q=$abc$109383$new_n56653_
+.subckt mux2_x1 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56653_ i1=$abc$109383$new_n56651_ q=$abc$109383$new_n56654_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56654_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56655_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[9] nq=$abc$109383$new_n56656_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n56657_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56656_ q=$abc$109383$new_n56658_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56656_ nq=$abc$109383$new_n56658_
 .subckt nor2_x0 i0=$abc$109383$new_n56658_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56659_
-.subckt a2_x2 i0=$abc$109383$new_n56659_ i1=$abc$109383$new_n56655_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106382
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[10] i1=soc.cpu.minerva.divider.remainder[10] q=$abc$109383$new_n56661_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[21] i1=soc.cpu.minerva.shifter.m_result$9[10] q=$abc$109383$new_n56662_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56662_ i1=soc.cpu.minerva.payload__result$93[10] q=$abc$109383$new_n56663_
+.subckt and2_x1 i0=$abc$109383$new_n56659_ i1=$abc$109383$new_n56655_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106382
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[10] i1=soc.cpu.minerva.divider.remainder[10] q=$abc$109383$new_n56661_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[21] i1=soc.cpu.minerva.shifter.m_result$9[10] q=$abc$109383$new_n56662_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56662_ i1=soc.cpu.minerva.payload__result$93[10] q=$abc$109383$new_n56663_
 .subckt buf_x4 i=soc.cpu.minerva.payload__divide$106 q=$abc$109383$new_n56664_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56663_ i1=$abc$109383$new_n56661_ q=$abc$109383$new_n56665_
-.subckt oa22_x2 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56665_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56666_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56663_ i1=$abc$109383$new_n56661_ q=$abc$109383$new_n56665_
+.subckt or21nand_x1 i0=$abc$109383$new_n56578_ i1=$abc$109383$new_n56665_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56666_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[10] nq=$abc$109383$new_n56667_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56667_ q=$abc$109383$new_n56668_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56667_ nq=$abc$109383$new_n56668_
 .subckt nor2_x0 i0=$abc$109383$new_n56668_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56669_
-.subckt a2_x2 i0=$abc$109383$new_n56669_ i1=$abc$109383$new_n56666_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106386
-.subckt mx2_x2 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[11] i1=soc.cpu.minerva.divider.remainder[11] q=$abc$109383$new_n56671_
-.subckt mx2_x2 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[20] i1=soc.cpu.minerva.shifter.m_result$9[11] q=$abc$109383$new_n56672_
-.subckt mx2_x2 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56672_ i1=soc.cpu.minerva.payload__result$93[11] q=$abc$109383$new_n56673_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56673_ i1=$abc$109383$new_n56671_ q=$abc$109383$new_n56674_
+.subckt and2_x1 i0=$abc$109383$new_n56669_ i1=$abc$109383$new_n56666_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106386
+.subckt mux2_x1 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[11] i1=soc.cpu.minerva.divider.remainder[11] q=$abc$109383$new_n56671_
+.subckt mux2_x1 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[20] i1=soc.cpu.minerva.shifter.m_result$9[11] q=$abc$109383$new_n56672_
+.subckt mux2_x1 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56672_ i1=soc.cpu.minerva.payload__result$93[11] q=$abc$109383$new_n56673_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56673_ i1=$abc$109383$new_n56671_ q=$abc$109383$new_n56674_
 .subckt buf_x4 i=$abc$109383$new_n56577_ q=$abc$109383$new_n56675_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56674_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56676_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56674_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56676_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[11] nq=$abc$109383$new_n56677_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56677_ q=$abc$109383$new_n56678_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56677_ nq=$abc$109383$new_n56678_
 .subckt nor2_x0 i0=$abc$109383$new_n56678_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56679_
-.subckt a2_x2 i0=$abc$109383$new_n56679_ i1=$abc$109383$new_n56676_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106390
-.subckt mx2_x2 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[12] i1=soc.cpu.minerva.divider.remainder[12] q=$abc$109383$new_n56681_
-.subckt mx2_x2 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[19] i1=soc.cpu.minerva.shifter.m_result$9[12] q=$abc$109383$new_n56682_
-.subckt mx2_x2 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56682_ i1=soc.cpu.minerva.payload__result$93[12] q=$abc$109383$new_n56683_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56683_ i1=$abc$109383$new_n56681_ q=$abc$109383$new_n56684_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56684_ i2=$abc$109383$new_n56592_ q=$abc$109383$new_n56685_
+.subckt and2_x1 i0=$abc$109383$new_n56679_ i1=$abc$109383$new_n56676_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106390
+.subckt mux2_x1 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[12] i1=soc.cpu.minerva.divider.remainder[12] q=$abc$109383$new_n56681_
+.subckt mux2_x1 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[19] i1=soc.cpu.minerva.shifter.m_result$9[12] q=$abc$109383$new_n56682_
+.subckt mux2_x1 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56682_ i1=soc.cpu.minerva.payload__result$93[12] q=$abc$109383$new_n56683_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56683_ i1=$abc$109383$new_n56681_ q=$abc$109383$new_n56684_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56684_ i2=$abc$109383$new_n56592_ nq=$abc$109383$new_n56685_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[12] nq=$abc$109383$new_n56686_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56686_ q=$abc$109383$new_n56687_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56686_ nq=$abc$109383$new_n56687_
 .subckt nor2_x0 i0=$abc$109383$new_n56687_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56688_
-.subckt a2_x2 i0=$abc$109383$new_n56688_ i1=$abc$109383$new_n56685_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106394
+.subckt and2_x1 i0=$abc$109383$new_n56688_ i1=$abc$109383$new_n56685_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106394
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n56690_
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[13] i1=soc.cpu.minerva.divider.remainder[13] q=$abc$109383$new_n56691_
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[13] i1=soc.cpu.minerva.divider.remainder[13] q=$abc$109383$new_n56691_
 .subckt buf_x4 i=soc.cpu.minerva.shifter.m_direction q=$abc$109383$new_n56692_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[18] i1=soc.cpu.minerva.shifter.m_result$9[13] q=$abc$109383$new_n56693_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56693_ i1=soc.cpu.minerva.payload__result$93[13] q=$abc$109383$new_n56694_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56694_ i1=$abc$109383$new_n56691_ q=$abc$109383$new_n56695_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56695_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56696_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[18] i1=soc.cpu.minerva.shifter.m_result$9[13] q=$abc$109383$new_n56693_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56693_ i1=soc.cpu.minerva.payload__result$93[13] q=$abc$109383$new_n56694_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56694_ i1=$abc$109383$new_n56691_ q=$abc$109383$new_n56695_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56695_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56696_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[13] nq=$abc$109383$new_n56697_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56697_ q=$abc$109383$new_n56698_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56697_ nq=$abc$109383$new_n56698_
 .subckt nor2_x0 i0=$abc$109383$new_n56698_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56699_
-.subckt a2_x2 i0=$abc$109383$new_n56699_ i1=$abc$109383$new_n56696_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106398
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[14] i1=soc.cpu.minerva.divider.remainder[14] q=$abc$109383$new_n56701_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[17] i1=soc.cpu.minerva.shifter.m_result$9[14] q=$abc$109383$new_n56702_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56702_ i1=soc.cpu.minerva.payload__result$93[14] q=$abc$109383$new_n56703_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56703_ i1=$abc$109383$new_n56701_ q=$abc$109383$new_n56704_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56704_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56705_
+.subckt and2_x1 i0=$abc$109383$new_n56699_ i1=$abc$109383$new_n56696_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106398
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[14] i1=soc.cpu.minerva.divider.remainder[14] q=$abc$109383$new_n56701_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[17] i1=soc.cpu.minerva.shifter.m_result$9[14] q=$abc$109383$new_n56702_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56702_ i1=soc.cpu.minerva.payload__result$93[14] q=$abc$109383$new_n56703_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56703_ i1=$abc$109383$new_n56701_ q=$abc$109383$new_n56704_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56704_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56705_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[14] nq=$abc$109383$new_n56706_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56706_ q=$abc$109383$new_n56707_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56706_ nq=$abc$109383$new_n56707_
 .subckt nor2_x0 i0=$abc$109383$new_n56707_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56708_
-.subckt a2_x2 i0=$abc$109383$new_n56708_ i1=$abc$109383$new_n56705_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106402
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[15] i1=soc.cpu.minerva.divider.remainder[15] q=$abc$109383$new_n56710_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[16] i1=soc.cpu.minerva.shifter.m_result$9[15] q=$abc$109383$new_n56711_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56711_ i1=soc.cpu.minerva.payload__result$93[15] q=$abc$109383$new_n56712_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56712_ i1=$abc$109383$new_n56710_ q=$abc$109383$new_n56713_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56713_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56714_
+.subckt and2_x1 i0=$abc$109383$new_n56708_ i1=$abc$109383$new_n56705_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106402
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[15] i1=soc.cpu.minerva.divider.remainder[15] q=$abc$109383$new_n56710_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[16] i1=soc.cpu.minerva.shifter.m_result$9[15] q=$abc$109383$new_n56711_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56711_ i1=soc.cpu.minerva.payload__result$93[15] q=$abc$109383$new_n56712_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56712_ i1=$abc$109383$new_n56710_ q=$abc$109383$new_n56713_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56713_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56714_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[15] nq=$abc$109383$new_n56715_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56715_ q=$abc$109383$new_n56716_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56715_ nq=$abc$109383$new_n56716_
 .subckt nor2_x0 i0=$abc$109383$new_n56716_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56717_
-.subckt a2_x2 i0=$abc$109383$new_n56717_ i1=$abc$109383$new_n56714_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106406
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[16] i1=soc.cpu.minerva.divider.remainder[16] q=$abc$109383$new_n56719_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[15] i1=soc.cpu.minerva.shifter.m_result$9[16] q=$abc$109383$new_n56720_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56720_ i1=soc.cpu.minerva.payload__result$93[16] q=$abc$109383$new_n56721_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56721_ i1=$abc$109383$new_n56719_ q=$abc$109383$new_n56722_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56722_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56723_
+.subckt and2_x1 i0=$abc$109383$new_n56717_ i1=$abc$109383$new_n56714_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106406
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[16] i1=soc.cpu.minerva.divider.remainder[16] q=$abc$109383$new_n56719_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[15] i1=soc.cpu.minerva.shifter.m_result$9[16] q=$abc$109383$new_n56720_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56720_ i1=soc.cpu.minerva.payload__result$93[16] q=$abc$109383$new_n56721_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56721_ i1=$abc$109383$new_n56719_ q=$abc$109383$new_n56722_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56722_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56723_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[16] nq=$abc$109383$new_n56724_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56724_ q=$abc$109383$new_n56725_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56724_ nq=$abc$109383$new_n56725_
 .subckt nor2_x0 i0=$abc$109383$new_n56725_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56726_
-.subckt a2_x2 i0=$abc$109383$new_n56726_ i1=$abc$109383$new_n56723_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106410
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[17] i1=soc.cpu.minerva.divider.remainder[17] q=$abc$109383$new_n56728_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[14] i1=soc.cpu.minerva.shifter.m_result$9[17] q=$abc$109383$new_n56729_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56729_ i1=soc.cpu.minerva.payload__result$93[17] q=$abc$109383$new_n56730_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56730_ i1=$abc$109383$new_n56728_ q=$abc$109383$new_n56731_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56731_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56732_
+.subckt and2_x1 i0=$abc$109383$new_n56726_ i1=$abc$109383$new_n56723_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106410
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[17] i1=soc.cpu.minerva.divider.remainder[17] q=$abc$109383$new_n56728_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[14] i1=soc.cpu.minerva.shifter.m_result$9[17] q=$abc$109383$new_n56729_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56729_ i1=soc.cpu.minerva.payload__result$93[17] q=$abc$109383$new_n56730_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56730_ i1=$abc$109383$new_n56728_ q=$abc$109383$new_n56731_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56731_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56732_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[17] nq=$abc$109383$new_n56733_
-.subckt ao22_x2 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56733_ q=$abc$109383$new_n56734_
+.subckt and21nor_x1 i0=$abc$109383$new_n56647_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56733_ nq=$abc$109383$new_n56734_
 .subckt nor2_x0 i0=$abc$109383$new_n56734_ i1=$abc$109383$new_n56645_ nq=$abc$109383$new_n56735_
-.subckt a2_x2 i0=$abc$109383$new_n56735_ i1=$abc$109383$new_n56732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106414
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[18] i1=soc.cpu.minerva.divider.remainder[18] q=$abc$109383$new_n56737_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[13] i1=soc.cpu.minerva.shifter.m_result$9[18] q=$abc$109383$new_n56738_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56738_ i1=soc.cpu.minerva.payload__result$93[18] q=$abc$109383$new_n56739_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56739_ i1=$abc$109383$new_n56737_ q=$abc$109383$new_n56740_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56740_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56741_
+.subckt and2_x1 i0=$abc$109383$new_n56735_ i1=$abc$109383$new_n56732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106414
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[18] i1=soc.cpu.minerva.divider.remainder[18] q=$abc$109383$new_n56737_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[13] i1=soc.cpu.minerva.shifter.m_result$9[18] q=$abc$109383$new_n56738_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56738_ i1=soc.cpu.minerva.payload__result$93[18] q=$abc$109383$new_n56739_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56739_ i1=$abc$109383$new_n56737_ q=$abc$109383$new_n56740_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56740_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56741_
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n56742_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[18] nq=$abc$109383$new_n56743_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n56744_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56743_ q=$abc$109383$new_n56745_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56657_ i2=$abc$109383$new_n56743_ nq=$abc$109383$new_n56745_
 .subckt nor2_x0 i0=$abc$109383$new_n56745_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56746_
-.subckt a2_x2 i0=$abc$109383$new_n56746_ i1=$abc$109383$new_n56741_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106418
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[19] i1=soc.cpu.minerva.divider.remainder[19] q=$abc$109383$new_n56748_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[12] i1=soc.cpu.minerva.shifter.m_result$9[19] q=$abc$109383$new_n56749_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56749_ i1=soc.cpu.minerva.payload__result$93[19] q=$abc$109383$new_n56750_
-.subckt mx2_x2 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56750_ i1=$abc$109383$new_n56748_ q=$abc$109383$new_n56751_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56751_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56752_
+.subckt and2_x1 i0=$abc$109383$new_n56746_ i1=$abc$109383$new_n56741_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106418
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[19] i1=soc.cpu.minerva.divider.remainder[19] q=$abc$109383$new_n56748_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[12] i1=soc.cpu.minerva.shifter.m_result$9[19] q=$abc$109383$new_n56749_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56749_ i1=soc.cpu.minerva.payload__result$93[19] q=$abc$109383$new_n56750_
+.subckt mux2_x1 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56750_ i1=$abc$109383$new_n56748_ q=$abc$109383$new_n56751_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56751_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56752_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[19] nq=$abc$109383$new_n56753_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n56754_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56753_ q=$abc$109383$new_n56755_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56753_ nq=$abc$109383$new_n56755_
 .subckt nor2_x0 i0=$abc$109383$new_n56755_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56756_
-.subckt a2_x2 i0=$abc$109383$new_n56756_ i1=$abc$109383$new_n56752_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106422
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[20] i1=soc.cpu.minerva.divider.remainder[20] q=$abc$109383$new_n56758_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[11] i1=soc.cpu.minerva.shifter.m_result$9[20] q=$abc$109383$new_n56759_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56759_ i1=soc.cpu.minerva.payload__result$93[20] q=$abc$109383$new_n56760_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56760_ i1=$abc$109383$new_n56758_ q=$abc$109383$new_n56761_
-.subckt oa22_x2 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56761_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56762_
+.subckt and2_x1 i0=$abc$109383$new_n56756_ i1=$abc$109383$new_n56752_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106422
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[20] i1=soc.cpu.minerva.divider.remainder[20] q=$abc$109383$new_n56758_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[11] i1=soc.cpu.minerva.shifter.m_result$9[20] q=$abc$109383$new_n56759_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56759_ i1=soc.cpu.minerva.payload__result$93[20] q=$abc$109383$new_n56760_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56760_ i1=$abc$109383$new_n56758_ q=$abc$109383$new_n56761_
+.subckt or21nand_x1 i0=$abc$109383$new_n56675_ i1=$abc$109383$new_n56761_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56762_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[20] nq=$abc$109383$new_n56763_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56763_ q=$abc$109383$new_n56764_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56763_ nq=$abc$109383$new_n56764_
 .subckt nor2_x0 i0=$abc$109383$new_n56764_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56765_
-.subckt a2_x2 i0=$abc$109383$new_n56765_ i1=$abc$109383$new_n56762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106426
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[21] i1=soc.cpu.minerva.divider.remainder[21] q=$abc$109383$new_n56767_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[10] i1=soc.cpu.minerva.shifter.m_result$9[21] q=$abc$109383$new_n56768_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56768_ i1=soc.cpu.minerva.payload__result$93[21] q=$abc$109383$new_n56769_
-.subckt mx2_x2 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56769_ i1=$abc$109383$new_n56767_ q=$abc$109383$new_n56770_
+.subckt and2_x1 i0=$abc$109383$new_n56765_ i1=$abc$109383$new_n56762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106426
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[21] i1=soc.cpu.minerva.divider.remainder[21] q=$abc$109383$new_n56767_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[10] i1=soc.cpu.minerva.shifter.m_result$9[21] q=$abc$109383$new_n56768_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56768_ i1=soc.cpu.minerva.payload__result$93[21] q=$abc$109383$new_n56769_
+.subckt mux2_x1 cmd=$abc$109383$new_n56664_ i0=$abc$109383$new_n56769_ i1=$abc$109383$new_n56767_ q=$abc$109383$new_n56770_
 .subckt buf_x4 i=$abc$109383$new_n56577_ q=$abc$109383$new_n56771_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56770_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56772_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56770_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56772_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[21] nq=$abc$109383$new_n56773_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56773_ q=$abc$109383$new_n56774_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56773_ nq=$abc$109383$new_n56774_
 .subckt nor2_x0 i0=$abc$109383$new_n56774_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56775_
-.subckt a2_x2 i0=$abc$109383$new_n56775_ i1=$abc$109383$new_n56772_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106430
-.subckt mx2_x2 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[22] i1=soc.cpu.minerva.divider.remainder[22] q=$abc$109383$new_n56777_
-.subckt mx2_x2 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[9] i1=soc.cpu.minerva.shifter.m_result$9[22] q=$abc$109383$new_n56778_
-.subckt mx2_x2 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56778_ i1=soc.cpu.minerva.payload__result$93[22] q=$abc$109383$new_n56779_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56779_ i1=$abc$109383$new_n56777_ q=$abc$109383$new_n56780_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56780_ i2=$abc$109383$new_n56690_ q=$abc$109383$new_n56781_
+.subckt and2_x1 i0=$abc$109383$new_n56775_ i1=$abc$109383$new_n56772_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106430
+.subckt mux2_x1 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[22] i1=soc.cpu.minerva.divider.remainder[22] q=$abc$109383$new_n56777_
+.subckt mux2_x1 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[9] i1=soc.cpu.minerva.shifter.m_result$9[22] q=$abc$109383$new_n56778_
+.subckt mux2_x1 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56778_ i1=soc.cpu.minerva.payload__result$93[22] q=$abc$109383$new_n56779_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56779_ i1=$abc$109383$new_n56777_ q=$abc$109383$new_n56780_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56780_ i2=$abc$109383$new_n56690_ nq=$abc$109383$new_n56781_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[22] nq=$abc$109383$new_n56782_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56782_ q=$abc$109383$new_n56783_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56782_ nq=$abc$109383$new_n56783_
 .subckt nor2_x0 i0=$abc$109383$new_n56783_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56784_
-.subckt a2_x2 i0=$abc$109383$new_n56784_ i1=$abc$109383$new_n56781_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106434
+.subckt and2_x1 i0=$abc$109383$new_n56784_ i1=$abc$109383$new_n56781_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106434
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n56786_
-.subckt mx2_x2 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[23] i1=soc.cpu.minerva.divider.remainder[23] q=$abc$109383$new_n56787_
-.subckt mx2_x2 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[8] i1=soc.cpu.minerva.shifter.m_result$9[23] q=$abc$109383$new_n56788_
-.subckt mx2_x2 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56788_ i1=soc.cpu.minerva.payload__result$93[23] q=$abc$109383$new_n56789_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56789_ i1=$abc$109383$new_n56787_ q=$abc$109383$new_n56790_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56790_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56791_
+.subckt mux2_x1 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[23] i1=soc.cpu.minerva.divider.remainder[23] q=$abc$109383$new_n56787_
+.subckt mux2_x1 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[8] i1=soc.cpu.minerva.shifter.m_result$9[23] q=$abc$109383$new_n56788_
+.subckt mux2_x1 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56788_ i1=soc.cpu.minerva.payload__result$93[23] q=$abc$109383$new_n56789_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56789_ i1=$abc$109383$new_n56787_ q=$abc$109383$new_n56790_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56790_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56791_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[23] nq=$abc$109383$new_n56792_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56792_ q=$abc$109383$new_n56793_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56792_ nq=$abc$109383$new_n56793_
 .subckt nor2_x0 i0=$abc$109383$new_n56793_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56794_
-.subckt a2_x2 i0=$abc$109383$new_n56794_ i1=$abc$109383$new_n56791_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106438
-.subckt mx2_x2 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[24] i1=soc.cpu.minerva.divider.remainder[24] q=$abc$109383$new_n56796_
-.subckt mx2_x2 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[7] i1=soc.cpu.minerva.shifter.m_result$9[24] q=$abc$109383$new_n56797_
-.subckt mx2_x2 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56797_ i1=soc.cpu.minerva.payload__result$93[24] q=$abc$109383$new_n56798_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56798_ i1=$abc$109383$new_n56796_ q=$abc$109383$new_n56799_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56799_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56800_
+.subckt and2_x1 i0=$abc$109383$new_n56794_ i1=$abc$109383$new_n56791_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106438
+.subckt mux2_x1 cmd=$abc$109383$new_n56629_ i0=soc.cpu.minerva.divider.quotient[24] i1=soc.cpu.minerva.divider.remainder[24] q=$abc$109383$new_n56796_
+.subckt mux2_x1 cmd=$abc$109383$new_n56692_ i0=soc.cpu.minerva.shifter.m_result$9[7] i1=soc.cpu.minerva.shifter.m_result$9[24] q=$abc$109383$new_n56797_
+.subckt mux2_x1 cmd=$abc$109383$new_n56632_ i0=$abc$109383$new_n56797_ i1=soc.cpu.minerva.payload__result$93[24] q=$abc$109383$new_n56798_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56798_ i1=$abc$109383$new_n56796_ q=$abc$109383$new_n56799_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56799_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56800_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[24] nq=$abc$109383$new_n56801_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56801_ q=$abc$109383$new_n56802_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56801_ nq=$abc$109383$new_n56802_
 .subckt nor2_x0 i0=$abc$109383$new_n56802_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56803_
-.subckt a2_x2 i0=$abc$109383$new_n56803_ i1=$abc$109383$new_n56800_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106442
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[25] i1=soc.cpu.minerva.divider.remainder[25] q=$abc$109383$new_n56805_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[6] i1=soc.cpu.minerva.shifter.m_result$9[25] q=$abc$109383$new_n56806_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56806_ i1=soc.cpu.minerva.payload__result$93[25] q=$abc$109383$new_n56807_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56807_ i1=$abc$109383$new_n56805_ q=$abc$109383$new_n56808_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56808_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56809_
+.subckt and2_x1 i0=$abc$109383$new_n56803_ i1=$abc$109383$new_n56800_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106442
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[25] i1=soc.cpu.minerva.divider.remainder[25] q=$abc$109383$new_n56805_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[6] i1=soc.cpu.minerva.shifter.m_result$9[25] q=$abc$109383$new_n56806_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56806_ i1=soc.cpu.minerva.payload__result$93[25] q=$abc$109383$new_n56807_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56807_ i1=$abc$109383$new_n56805_ q=$abc$109383$new_n56808_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56808_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56809_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[25] nq=$abc$109383$new_n56810_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56810_ q=$abc$109383$new_n56811_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56810_ nq=$abc$109383$new_n56811_
 .subckt nor2_x0 i0=$abc$109383$new_n56811_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56812_
-.subckt a2_x2 i0=$abc$109383$new_n56812_ i1=$abc$109383$new_n56809_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106446
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[26] i1=soc.cpu.minerva.divider.remainder[26] q=$abc$109383$new_n56814_
-.subckt mx2_x2 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[5] i1=soc.cpu.minerva.shifter.m_result$9[26] q=$abc$109383$new_n56815_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56815_ i1=soc.cpu.minerva.payload__result$93[26] q=$abc$109383$new_n56816_
-.subckt mx2_x2 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56816_ i1=$abc$109383$new_n56814_ q=$abc$109383$new_n56817_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56817_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56818_
+.subckt and2_x1 i0=$abc$109383$new_n56812_ i1=$abc$109383$new_n56809_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106446
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[26] i1=soc.cpu.minerva.divider.remainder[26] q=$abc$109383$new_n56814_
+.subckt mux2_x1 cmd=$abc$109383$new_n29214_ i0=soc.cpu.minerva.shifter.m_result$9[5] i1=soc.cpu.minerva.shifter.m_result$9[26] q=$abc$109383$new_n56815_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56815_ i1=soc.cpu.minerva.payload__result$93[26] q=$abc$109383$new_n56816_
+.subckt mux2_x1 cmd=$abc$109383$new_n56556_ i0=$abc$109383$new_n56816_ i1=$abc$109383$new_n56814_ q=$abc$109383$new_n56817_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56817_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56818_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[26] nq=$abc$109383$new_n56819_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56819_ q=$abc$109383$new_n56820_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56819_ nq=$abc$109383$new_n56820_
 .subckt nor2_x0 i0=$abc$109383$new_n56820_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56821_
-.subckt a2_x2 i0=$abc$109383$new_n56821_ i1=$abc$109383$new_n56818_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106450
-.subckt mx2_x2 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[27] i1=soc.cpu.minerva.divider.remainder[27] q=$abc$109383$new_n56823_
-.subckt mx2_x2 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[4] i1=soc.cpu.minerva.shifter.m_result$9[27] q=$abc$109383$new_n56824_
-.subckt mx2_x2 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56824_ i1=soc.cpu.minerva.payload__result$93[27] q=$abc$109383$new_n56825_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56825_ i1=$abc$109383$new_n56823_ q=$abc$109383$new_n56826_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56826_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56827_
+.subckt and2_x1 i0=$abc$109383$new_n56821_ i1=$abc$109383$new_n56818_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106450
+.subckt mux2_x1 cmd=soc.cpu.minerva.divider.m_modulus i0=soc.cpu.minerva.divider.quotient[27] i1=soc.cpu.minerva.divider.remainder[27] q=$abc$109383$new_n56823_
+.subckt mux2_x1 cmd=soc.cpu.minerva.shifter.m_direction i0=soc.cpu.minerva.shifter.m_result$9[4] i1=soc.cpu.minerva.shifter.m_result$9[27] q=$abc$109383$new_n56824_
+.subckt mux2_x1 cmd=$abc$109383$new_n56560_ i0=$abc$109383$new_n56824_ i1=soc.cpu.minerva.payload__result$93[27] q=$abc$109383$new_n56825_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__divide$106 i0=$abc$109383$new_n56825_ i1=$abc$109383$new_n56823_ q=$abc$109383$new_n56826_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56826_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56827_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[27] nq=$abc$109383$new_n56828_
-.subckt ao22_x2 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56828_ q=$abc$109383$new_n56829_
+.subckt and21nor_x1 i0=$abc$109383$new_n56744_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56828_ nq=$abc$109383$new_n56829_
 .subckt nor2_x0 i0=$abc$109383$new_n56829_ i1=$abc$109383$new_n56742_ nq=$abc$109383$new_n56830_
-.subckt a2_x2 i0=$abc$109383$new_n56830_ i1=$abc$109383$new_n56827_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106454
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[28] i1=soc.cpu.minerva.divider.remainder[28] q=$abc$109383$new_n56832_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[3] i1=soc.cpu.minerva.shifter.m_result$9[28] q=$abc$109383$new_n56833_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56833_ i1=soc.cpu.minerva.payload__result$93[28] q=$abc$109383$new_n56834_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56834_ i1=$abc$109383$new_n56832_ q=$abc$109383$new_n56835_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56835_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56836_
+.subckt and2_x1 i0=$abc$109383$new_n56830_ i1=$abc$109383$new_n56827_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106454
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[28] i1=soc.cpu.minerva.divider.remainder[28] q=$abc$109383$new_n56832_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[3] i1=soc.cpu.minerva.shifter.m_result$9[28] q=$abc$109383$new_n56833_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56833_ i1=soc.cpu.minerva.payload__result$93[28] q=$abc$109383$new_n56834_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56834_ i1=$abc$109383$new_n56832_ q=$abc$109383$new_n56835_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56835_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56836_
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n56837_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[28] nq=$abc$109383$new_n56838_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n56839_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56838_ q=$abc$109383$new_n56840_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56754_ i2=$abc$109383$new_n56838_ nq=$abc$109383$new_n56840_
 .subckt nor2_x0 i0=$abc$109383$new_n56840_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n56841_
-.subckt a2_x2 i0=$abc$109383$new_n56841_ i1=$abc$109383$new_n56836_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106458
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[29] i1=soc.cpu.minerva.divider.remainder[29] q=$abc$109383$new_n56843_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[2] i1=soc.cpu.minerva.shifter.m_result$9[29] q=$abc$109383$new_n56844_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56844_ i1=soc.cpu.minerva.payload__result$93[29] q=$abc$109383$new_n56845_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56845_ i1=$abc$109383$new_n56843_ q=$abc$109383$new_n56846_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56846_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56847_
+.subckt and2_x1 i0=$abc$109383$new_n56841_ i1=$abc$109383$new_n56836_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106458
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[29] i1=soc.cpu.minerva.divider.remainder[29] q=$abc$109383$new_n56843_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[2] i1=soc.cpu.minerva.shifter.m_result$9[29] q=$abc$109383$new_n56844_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56844_ i1=soc.cpu.minerva.payload__result$93[29] q=$abc$109383$new_n56845_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56845_ i1=$abc$109383$new_n56843_ q=$abc$109383$new_n56846_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56846_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56847_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[29] nq=$abc$109383$new_n56848_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n56849_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n56848_ q=$abc$109383$new_n56850_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n56848_ nq=$abc$109383$new_n56850_
 .subckt nor2_x0 i0=$abc$109383$new_n56850_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n56851_
-.subckt a2_x2 i0=$abc$109383$new_n56851_ i1=$abc$109383$new_n56847_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106462
-.subckt mx2_x2 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[30] i1=soc.cpu.minerva.divider.remainder[30] q=$abc$109383$new_n56853_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[1] i1=soc.cpu.minerva.shifter.m_result$9[30] q=$abc$109383$new_n56854_
-.subckt mx2_x2 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56854_ i1=soc.cpu.minerva.payload__result$93[30] q=$abc$109383$new_n56855_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56855_ i1=$abc$109383$new_n56853_ q=$abc$109383$new_n56856_
-.subckt oa22_x2 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56856_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56857_
+.subckt and2_x1 i0=$abc$109383$new_n56851_ i1=$abc$109383$new_n56847_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106462
+.subckt mux2_x1 cmd=$abc$109383$new_n56567_ i0=soc.cpu.minerva.divider.quotient[30] i1=soc.cpu.minerva.divider.remainder[30] q=$abc$109383$new_n56853_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[1] i1=soc.cpu.minerva.shifter.m_result$9[30] q=$abc$109383$new_n56854_
+.subckt mux2_x1 cmd=$abc$109383$new_n56571_ i0=$abc$109383$new_n56854_ i1=soc.cpu.minerva.payload__result$93[30] q=$abc$109383$new_n56855_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56855_ i1=$abc$109383$new_n56853_ q=$abc$109383$new_n56856_
+.subckt or21nand_x1 i0=$abc$109383$new_n56771_ i1=$abc$109383$new_n56856_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56857_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[30] nq=$abc$109383$new_n56858_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n56858_ q=$abc$109383$new_n56859_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n56858_ nq=$abc$109383$new_n56859_
 .subckt nor2_x0 i0=$abc$109383$new_n56859_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n56860_
-.subckt a2_x2 i0=$abc$109383$new_n56860_ i1=$abc$109383$new_n56857_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106466
-.subckt mx2_x2 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[31] i1=soc.cpu.minerva.divider.remainder[31] q=$abc$109383$new_n56862_
-.subckt mx2_x2 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[0] i1=soc.cpu.minerva.shifter.m_result$9[31] q=$abc$109383$new_n56863_
-.subckt mx2_x2 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56863_ i1=soc.cpu.minerva.payload__result$93[31] q=$abc$109383$new_n56864_
-.subckt mx2_x2 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56864_ i1=$abc$109383$new_n56862_ q=$abc$109383$new_n56865_
-.subckt oa22_x2 i0=$abc$109383$new_n56577_ i1=$abc$109383$new_n56865_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n56866_
+.subckt and2_x1 i0=$abc$109383$new_n56860_ i1=$abc$109383$new_n56857_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106466
+.subckt mux2_x1 cmd=$abc$109383$new_n55106_ i0=soc.cpu.minerva.divider.quotient[31] i1=soc.cpu.minerva.divider.remainder[31] q=$abc$109383$new_n56862_
+.subckt mux2_x1 cmd=$abc$109383$new_n56569_ i0=soc.cpu.minerva.shifter.m_result$9[0] i1=soc.cpu.minerva.shifter.m_result$9[31] q=$abc$109383$new_n56863_
+.subckt mux2_x1 cmd=$abc$109383$new_n56561_ i0=$abc$109383$new_n56863_ i1=soc.cpu.minerva.payload__result$93[31] q=$abc$109383$new_n56864_
+.subckt mux2_x1 cmd=$abc$109383$new_n56573_ i0=$abc$109383$new_n56864_ i1=$abc$109383$new_n56862_ q=$abc$109383$new_n56865_
+.subckt or21nand_x1 i0=$abc$109383$new_n56577_ i1=$abc$109383$new_n56865_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n56866_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$129[31] nq=$abc$109383$new_n56867_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n56867_ q=$abc$109383$new_n56868_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n56867_ nq=$abc$109383$new_n56868_
 .subckt nor2_x0 i0=$abc$109383$new_n56868_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n56869_
-.subckt a2_x2 i0=$abc$109383$new_n56869_ i1=$abc$109383$new_n56866_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106470
+.subckt and2_x1 i0=$abc$109383$new_n56869_ i1=$abc$109383$new_n56866_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106470
 .subckt nor3_x0 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n15480_ nq=$abc$109383$new_n56871_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n56872_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__rd_we$125 q=$abc$109383$new_n56873_
-.subckt ao22_x2 i0=$abc$109383$new_n56873_ i1=$abc$109383$new_n56871_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106474
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__rd_we$125 nq=$abc$109383$new_n56873_
+.subckt and21nor_x1 i0=$abc$109383$new_n56873_ i1=$abc$109383$new_n56871_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106474
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[0] nq=$abc$109383$new_n56875_
 .subckt buf_x4 i=$abc$109383$new_n29209_ q=$abc$109383$new_n56876_
 .subckt buf_x4 i=$abc$109383$new_n29211_ q=$abc$109383$new_n56877_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56875_ nq=$abc$109383$new_n56878_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[0] q=$abc$109383$new_n56879_
-.subckt ao22_x2 i0=$abc$109383$new_n56879_ i1=$abc$109383$new_n56878_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106478
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[0] nq=$abc$109383$new_n56879_
+.subckt and21nor_x1 i0=$abc$109383$new_n56879_ i1=$abc$109383$new_n56878_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106478
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[1] nq=$abc$109383$new_n56881_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56881_ nq=$abc$109383$new_n56882_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[1] q=$abc$109383$new_n56883_
-.subckt ao22_x2 i0=$abc$109383$new_n56883_ i1=$abc$109383$new_n56882_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106482
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[1] nq=$abc$109383$new_n56883_
+.subckt and21nor_x1 i0=$abc$109383$new_n56883_ i1=$abc$109383$new_n56882_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106482
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[2] nq=$abc$109383$new_n56885_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56885_ nq=$abc$109383$new_n56886_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[2] q=$abc$109383$new_n56887_
-.subckt ao22_x2 i0=$abc$109383$new_n56887_ i1=$abc$109383$new_n56886_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106486
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[2] nq=$abc$109383$new_n56887_
+.subckt and21nor_x1 i0=$abc$109383$new_n56887_ i1=$abc$109383$new_n56886_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106486
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[3] nq=$abc$109383$new_n56889_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56889_ nq=$abc$109383$new_n56890_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[3] q=$abc$109383$new_n56891_
-.subckt ao22_x2 i0=$abc$109383$new_n56891_ i1=$abc$109383$new_n56890_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106490
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[3] nq=$abc$109383$new_n56891_
+.subckt and21nor_x1 i0=$abc$109383$new_n56891_ i1=$abc$109383$new_n56890_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106490
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[4] nq=$abc$109383$new_n56893_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56893_ nq=$abc$109383$new_n56894_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[4] q=$abc$109383$new_n56895_
-.subckt ao22_x2 i0=$abc$109383$new_n56895_ i1=$abc$109383$new_n56894_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106494
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[4] nq=$abc$109383$new_n56895_
+.subckt and21nor_x1 i0=$abc$109383$new_n56895_ i1=$abc$109383$new_n56894_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106494
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[5] nq=$abc$109383$new_n56897_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56897_ nq=$abc$109383$new_n56898_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[5] q=$abc$109383$new_n56899_
-.subckt ao22_x2 i0=$abc$109383$new_n56899_ i1=$abc$109383$new_n56898_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106498
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[5] nq=$abc$109383$new_n56899_
+.subckt and21nor_x1 i0=$abc$109383$new_n56899_ i1=$abc$109383$new_n56898_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106498
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[6] nq=$abc$109383$new_n56901_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56901_ nq=$abc$109383$new_n56902_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[6] q=$abc$109383$new_n56903_
-.subckt ao22_x2 i0=$abc$109383$new_n56903_ i1=$abc$109383$new_n56902_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106502
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[6] nq=$abc$109383$new_n56903_
+.subckt and21nor_x1 i0=$abc$109383$new_n56903_ i1=$abc$109383$new_n56902_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106502
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[7] nq=$abc$109383$new_n56905_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56905_ nq=$abc$109383$new_n56906_
-.subckt ao22_x2 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[7] q=$abc$109383$new_n56907_
-.subckt ao22_x2 i0=$abc$109383$new_n56907_ i1=$abc$109383$new_n56906_ i2=$abc$109383$new_n56543_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106506
+.subckt and21nor_x1 i0=$abc$109383$new_n56547_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[7] nq=$abc$109383$new_n56907_
+.subckt and21nor_x1 i0=$abc$109383$new_n56907_ i1=$abc$109383$new_n56906_ i2=$abc$109383$new_n56543_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106506
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n56909_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[8] nq=$abc$109383$new_n56910_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56910_ nq=$abc$109383$new_n56911_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n56912_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[8] q=$abc$109383$new_n56913_
-.subckt ao22_x2 i0=$abc$109383$new_n56913_ i1=$abc$109383$new_n56911_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106510
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56872_ i2=soc.cpu.minerva.payload__load_data$132[8] nq=$abc$109383$new_n56913_
+.subckt and21nor_x1 i0=$abc$109383$new_n56913_ i1=$abc$109383$new_n56911_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106510
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[9] nq=$abc$109383$new_n56915_
 .subckt nor3_x0 i0=$abc$109383$new_n56877_ i1=$abc$109383$new_n56876_ i2=$abc$109383$new_n56915_ nq=$abc$109383$new_n56916_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n56917_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n56918_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[9] q=$abc$109383$new_n56919_
-.subckt ao22_x2 i0=$abc$109383$new_n56919_ i1=$abc$109383$new_n56916_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106514
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[9] nq=$abc$109383$new_n56919_
+.subckt and21nor_x1 i0=$abc$109383$new_n56919_ i1=$abc$109383$new_n56916_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106514
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[10] nq=$abc$109383$new_n56921_
 .subckt buf_x4 i=$abc$109383$new_n29209_ q=$abc$109383$new_n56922_
 .subckt buf_x4 i=$abc$109383$new_n29211_ q=$abc$109383$new_n56923_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56921_ nq=$abc$109383$new_n56924_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[10] q=$abc$109383$new_n56925_
-.subckt ao22_x2 i0=$abc$109383$new_n56925_ i1=$abc$109383$new_n56924_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106518
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[10] nq=$abc$109383$new_n56925_
+.subckt and21nor_x1 i0=$abc$109383$new_n56925_ i1=$abc$109383$new_n56924_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106518
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[11] nq=$abc$109383$new_n56927_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56927_ nq=$abc$109383$new_n56928_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[11] q=$abc$109383$new_n56929_
-.subckt ao22_x2 i0=$abc$109383$new_n56929_ i1=$abc$109383$new_n56928_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106522
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[11] nq=$abc$109383$new_n56929_
+.subckt and21nor_x1 i0=$abc$109383$new_n56929_ i1=$abc$109383$new_n56928_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106522
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[12] nq=$abc$109383$new_n56931_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56931_ nq=$abc$109383$new_n56932_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[12] q=$abc$109383$new_n56933_
-.subckt ao22_x2 i0=$abc$109383$new_n56933_ i1=$abc$109383$new_n56932_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106526
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[12] nq=$abc$109383$new_n56933_
+.subckt and21nor_x1 i0=$abc$109383$new_n56933_ i1=$abc$109383$new_n56932_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106526
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[13] nq=$abc$109383$new_n56935_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56935_ nq=$abc$109383$new_n56936_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[13] q=$abc$109383$new_n56937_
-.subckt ao22_x2 i0=$abc$109383$new_n56937_ i1=$abc$109383$new_n56936_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106530
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[13] nq=$abc$109383$new_n56937_
+.subckt and21nor_x1 i0=$abc$109383$new_n56937_ i1=$abc$109383$new_n56936_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106530
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[14] nq=$abc$109383$new_n56939_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56939_ nq=$abc$109383$new_n56940_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[14] q=$abc$109383$new_n56941_
-.subckt ao22_x2 i0=$abc$109383$new_n56941_ i1=$abc$109383$new_n56940_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106534
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[14] nq=$abc$109383$new_n56941_
+.subckt and21nor_x1 i0=$abc$109383$new_n56941_ i1=$abc$109383$new_n56940_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106534
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[15] nq=$abc$109383$new_n56943_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56943_ nq=$abc$109383$new_n56944_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[15] q=$abc$109383$new_n56945_
-.subckt ao22_x2 i0=$abc$109383$new_n56945_ i1=$abc$109383$new_n56944_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106538
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[15] nq=$abc$109383$new_n56945_
+.subckt and21nor_x1 i0=$abc$109383$new_n56945_ i1=$abc$109383$new_n56944_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106538
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[16] nq=$abc$109383$new_n56947_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56947_ nq=$abc$109383$new_n56948_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[16] q=$abc$109383$new_n56949_
-.subckt ao22_x2 i0=$abc$109383$new_n56949_ i1=$abc$109383$new_n56948_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106542
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[16] nq=$abc$109383$new_n56949_
+.subckt and21nor_x1 i0=$abc$109383$new_n56949_ i1=$abc$109383$new_n56948_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106542
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[17] nq=$abc$109383$new_n56951_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56951_ nq=$abc$109383$new_n56952_
-.subckt ao22_x2 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[17] q=$abc$109383$new_n56953_
-.subckt ao22_x2 i0=$abc$109383$new_n56953_ i1=$abc$109383$new_n56952_ i2=$abc$109383$new_n56909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106546
+.subckt and21nor_x1 i0=$abc$109383$new_n56912_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[17] nq=$abc$109383$new_n56953_
+.subckt and21nor_x1 i0=$abc$109383$new_n56953_ i1=$abc$109383$new_n56952_ i2=$abc$109383$new_n56909_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106546
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n56955_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[18] nq=$abc$109383$new_n56956_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56956_ nq=$abc$109383$new_n56957_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n56958_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[18] q=$abc$109383$new_n56959_
-.subckt ao22_x2 i0=$abc$109383$new_n56959_ i1=$abc$109383$new_n56957_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106550
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56918_ i2=soc.cpu.minerva.payload__load_data$132[18] nq=$abc$109383$new_n56959_
+.subckt and21nor_x1 i0=$abc$109383$new_n56959_ i1=$abc$109383$new_n56957_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106550
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[19] nq=$abc$109383$new_n56961_
 .subckt nor3_x0 i0=$abc$109383$new_n56923_ i1=$abc$109383$new_n56922_ i2=$abc$109383$new_n56961_ nq=$abc$109383$new_n56962_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n56963_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[19] q=$abc$109383$new_n56964_
-.subckt ao22_x2 i0=$abc$109383$new_n56964_ i1=$abc$109383$new_n56962_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106554
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[19] nq=$abc$109383$new_n56964_
+.subckt and21nor_x1 i0=$abc$109383$new_n56964_ i1=$abc$109383$new_n56962_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106554
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[20] nq=$abc$109383$new_n56966_
 .subckt buf_x4 i=$abc$109383$new_n29209_ q=$abc$109383$new_n56967_
 .subckt buf_x4 i=$abc$109383$new_n29211_ q=$abc$109383$new_n56968_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56966_ nq=$abc$109383$new_n56969_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[20] q=$abc$109383$new_n56970_
-.subckt ao22_x2 i0=$abc$109383$new_n56970_ i1=$abc$109383$new_n56969_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106558
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[20] nq=$abc$109383$new_n56970_
+.subckt and21nor_x1 i0=$abc$109383$new_n56970_ i1=$abc$109383$new_n56969_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106558
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[21] nq=$abc$109383$new_n56972_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56972_ nq=$abc$109383$new_n56973_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[21] q=$abc$109383$new_n56974_
-.subckt ao22_x2 i0=$abc$109383$new_n56974_ i1=$abc$109383$new_n56973_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106562
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[21] nq=$abc$109383$new_n56974_
+.subckt and21nor_x1 i0=$abc$109383$new_n56974_ i1=$abc$109383$new_n56973_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106562
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[22] nq=$abc$109383$new_n56976_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56976_ nq=$abc$109383$new_n56977_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[22] q=$abc$109383$new_n56978_
-.subckt ao22_x2 i0=$abc$109383$new_n56978_ i1=$abc$109383$new_n56977_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106566
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[22] nq=$abc$109383$new_n56978_
+.subckt and21nor_x1 i0=$abc$109383$new_n56978_ i1=$abc$109383$new_n56977_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106566
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[23] nq=$abc$109383$new_n56980_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56980_ nq=$abc$109383$new_n56981_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[23] q=$abc$109383$new_n56982_
-.subckt ao22_x2 i0=$abc$109383$new_n56982_ i1=$abc$109383$new_n56981_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106570
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[23] nq=$abc$109383$new_n56982_
+.subckt and21nor_x1 i0=$abc$109383$new_n56982_ i1=$abc$109383$new_n56981_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106570
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[24] nq=$abc$109383$new_n56984_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56984_ nq=$abc$109383$new_n56985_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[24] q=$abc$109383$new_n56986_
-.subckt ao22_x2 i0=$abc$109383$new_n56986_ i1=$abc$109383$new_n56985_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106574
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[24] nq=$abc$109383$new_n56986_
+.subckt and21nor_x1 i0=$abc$109383$new_n56986_ i1=$abc$109383$new_n56985_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106574
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[25] nq=$abc$109383$new_n56988_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56988_ nq=$abc$109383$new_n56989_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[25] q=$abc$109383$new_n56990_
-.subckt ao22_x2 i0=$abc$109383$new_n56990_ i1=$abc$109383$new_n56989_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106578
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[25] nq=$abc$109383$new_n56990_
+.subckt and21nor_x1 i0=$abc$109383$new_n56990_ i1=$abc$109383$new_n56989_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106578
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[26] nq=$abc$109383$new_n56992_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56992_ nq=$abc$109383$new_n56993_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[26] q=$abc$109383$new_n56994_
-.subckt ao22_x2 i0=$abc$109383$new_n56994_ i1=$abc$109383$new_n56993_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106582
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[26] nq=$abc$109383$new_n56994_
+.subckt and21nor_x1 i0=$abc$109383$new_n56994_ i1=$abc$109383$new_n56993_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106582
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[27] nq=$abc$109383$new_n56996_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n56996_ nq=$abc$109383$new_n56997_
-.subckt ao22_x2 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[27] q=$abc$109383$new_n56998_
-.subckt ao22_x2 i0=$abc$109383$new_n56998_ i1=$abc$109383$new_n56997_ i2=$abc$109383$new_n56955_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106586
+.subckt and21nor_x1 i0=$abc$109383$new_n56958_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[27] nq=$abc$109383$new_n56998_
+.subckt and21nor_x1 i0=$abc$109383$new_n56998_ i1=$abc$109383$new_n56997_ i2=$abc$109383$new_n56955_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106586
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n57000_
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[28] nq=$abc$109383$new_n57001_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n57001_ nq=$abc$109383$new_n57002_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n57003_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[28] q=$abc$109383$new_n57004_
-.subckt ao22_x2 i0=$abc$109383$new_n57004_ i1=$abc$109383$new_n57002_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106590
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n56963_ i2=soc.cpu.minerva.payload__load_data$132[28] nq=$abc$109383$new_n57004_
+.subckt and21nor_x1 i0=$abc$109383$new_n57004_ i1=$abc$109383$new_n57002_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106590
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[29] nq=$abc$109383$new_n57006_
 .subckt nor3_x0 i0=$abc$109383$new_n56968_ i1=$abc$109383$new_n56967_ i2=$abc$109383$new_n57006_ nq=$abc$109383$new_n57007_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n57008_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__load_data$132[29] q=$abc$109383$new_n57009_
-.subckt ao22_x2 i0=$abc$109383$new_n57009_ i1=$abc$109383$new_n57007_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106594
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__load_data$132[29] nq=$abc$109383$new_n57009_
+.subckt and21nor_x1 i0=$abc$109383$new_n57009_ i1=$abc$109383$new_n57007_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106594
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[30] nq=$abc$109383$new_n57011_
 .subckt buf_x4 i=$abc$109383$new_n29209_ q=$abc$109383$new_n57012_
 .subckt buf_x4 i=$abc$109383$new_n29211_ q=$abc$109383$new_n57013_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57011_ nq=$abc$109383$new_n57014_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__load_data$132[30] q=$abc$109383$new_n57015_
-.subckt ao22_x2 i0=$abc$109383$new_n57015_ i1=$abc$109383$new_n57014_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106598
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__load_data$132[30] nq=$abc$109383$new_n57015_
+.subckt and21nor_x1 i0=$abc$109383$new_n57015_ i1=$abc$109383$new_n57014_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106598
 .subckt inv_x0 i=soc.cpu.minerva.loadstore.m_load_data[31] nq=$abc$109383$new_n57017_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57017_ nq=$abc$109383$new_n57018_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__load_data$132[31] q=$abc$109383$new_n57019_
-.subckt ao22_x2 i0=$abc$109383$new_n57019_ i1=$abc$109383$new_n57018_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106602
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__load_data$132[31] nq=$abc$109383$new_n57019_
+.subckt and21nor_x1 i0=$abc$109383$new_n57019_ i1=$abc$109383$new_n57018_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106602
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[12] nq=$abc$109383$new_n57021_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57021_ nq=$abc$109383$new_n57022_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__funct3$127[0] q=$abc$109383$new_n57023_
-.subckt ao22_x2 i0=$abc$109383$new_n57023_ i1=$abc$109383$new_n57022_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106606
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__funct3$127[0] nq=$abc$109383$new_n57023_
+.subckt and21nor_x1 i0=$abc$109383$new_n57023_ i1=$abc$109383$new_n57022_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106606
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[13] nq=$abc$109383$new_n57025_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57025_ nq=$abc$109383$new_n57026_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n19873_ q=$abc$109383$new_n57027_
-.subckt ao22_x2 i0=$abc$109383$new_n57027_ i1=$abc$109383$new_n57026_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106610
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n19873_ nq=$abc$109383$new_n57027_
+.subckt and21nor_x1 i0=$abc$109383$new_n57027_ i1=$abc$109383$new_n57026_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106610
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[14] nq=$abc$109383$new_n57029_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57029_ nq=$abc$109383$new_n57030_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__funct3$127[2] q=$abc$109383$new_n57031_
-.subckt ao22_x2 i0=$abc$109383$new_n57031_ i1=$abc$109383$new_n57030_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106614
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__funct3$127[2] nq=$abc$109383$new_n57031_
+.subckt and21nor_x1 i0=$abc$109383$new_n57031_ i1=$abc$109383$new_n57030_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106614
 .subckt inv_x0 i=soc.cpu.minerva.payload__load$97 nq=$abc$109383$new_n57033_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57033_ nq=$abc$109383$new_n57034_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n52579_ q=$abc$109383$new_n57035_
-.subckt ao22_x2 i0=$abc$109383$new_n57035_ i1=$abc$109383$new_n57034_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106618
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n52579_ nq=$abc$109383$new_n57035_
+.subckt and21nor_x1 i0=$abc$109383$new_n57035_ i1=$abc$109383$new_n57034_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106618
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[7] nq=$abc$109383$new_n57037_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57037_ nq=$abc$109383$new_n57038_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__rd$123[0] q=$abc$109383$new_n57039_
-.subckt ao22_x2 i0=$abc$109383$new_n57039_ i1=$abc$109383$new_n57038_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106622
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=soc.cpu.minerva.payload__rd$123[0] nq=$abc$109383$new_n57039_
+.subckt and21nor_x1 i0=$abc$109383$new_n57039_ i1=$abc$109383$new_n57038_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106622
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[8] nq=$abc$109383$new_n57041_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57041_ nq=$abc$109383$new_n57042_
-.subckt ao22_x2 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n19822_ q=$abc$109383$new_n57043_
-.subckt ao22_x2 i0=$abc$109383$new_n57043_ i1=$abc$109383$new_n57042_ i2=$abc$109383$new_n57000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106626
+.subckt and21nor_x1 i0=$abc$109383$new_n57003_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n19822_ nq=$abc$109383$new_n57043_
+.subckt and21nor_x1 i0=$abc$109383$new_n57043_ i1=$abc$109383$new_n57042_ i2=$abc$109383$new_n57000_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106626
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n57045_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n15482_ nq=$abc$109383$new_n57046_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n57047_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n19816_ q=$abc$109383$new_n57048_
-.subckt ao22_x2 i0=$abc$109383$new_n57048_ i1=$abc$109383$new_n57046_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106630
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57008_ i2=$abc$109383$new_n19816_ nq=$abc$109383$new_n57048_
+.subckt and21nor_x1 i0=$abc$109383$new_n57048_ i1=$abc$109383$new_n57046_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106630
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[10] nq=$abc$109383$new_n57050_
 .subckt nor3_x0 i0=$abc$109383$new_n57013_ i1=$abc$109383$new_n57012_ i2=$abc$109383$new_n57050_ nq=$abc$109383$new_n57051_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n57052_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=$abc$109383$new_n19817_ q=$abc$109383$new_n57053_
-.subckt ao22_x2 i0=$abc$109383$new_n57053_ i1=$abc$109383$new_n57051_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106634
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=$abc$109383$new_n19817_ nq=$abc$109383$new_n57053_
+.subckt and21nor_x1 i0=$abc$109383$new_n57053_ i1=$abc$109383$new_n57051_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106634
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$73[11] nq=$abc$109383$new_n57055_
 .subckt buf_x4 i=$abc$109383$new_n29209_ q=$abc$109383$new_n57056_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n57057_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n57058_
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n57055_ nq=$abc$109383$new_n57059_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=$abc$109383$new_n19818_ q=$abc$109383$new_n57060_
-.subckt ao22_x2 i0=$abc$109383$new_n57060_ i1=$abc$109383$new_n57059_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106638
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=$abc$109383$new_n19818_ nq=$abc$109383$new_n57060_
+.subckt and21nor_x1 i0=$abc$109383$new_n57060_ i1=$abc$109383$new_n57059_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106638
 .subckt inv_x0 i=soc.cpu.minerva.payload__divide$55 nq=$abc$109383$new_n57062_
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n57062_ nq=$abc$109383$new_n57063_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=$abc$109383$new_n56556_ q=$abc$109383$new_n57064_
-.subckt ao22_x2 i0=$abc$109383$new_n57064_ i1=$abc$109383$new_n57063_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106642
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=$abc$109383$new_n56556_ nq=$abc$109383$new_n57064_
+.subckt and21nor_x1 i0=$abc$109383$new_n57064_ i1=$abc$109383$new_n57063_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106642
 .subckt inv_x0 i=soc.cpu.minerva.payload__multiply$54 nq=$abc$109383$new_n57066_
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n57066_ nq=$abc$109383$new_n57067_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__multiply$104 q=$abc$109383$new_n57068_
-.subckt ao22_x2 i0=$abc$109383$new_n57068_ i1=$abc$109383$new_n57067_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106646
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__multiply$104 nq=$abc$109383$new_n57068_
+.subckt and21nor_x1 i0=$abc$109383$new_n57068_ i1=$abc$109383$new_n57067_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106646
 .subckt buf_x4 i=soc.cpu.minerva.payload__csr$64 q=$abc$109383$new_n57070_
 .subckt nand2_x0 i0=$abc$109383$new_n57070_ i1=$abc$109383$new_n29439_ nq=$abc$109383$new_n57071_
 .subckt buf_x4 i=soc.cpu.minerva.payload__logic$53 q=$abc$109383$new_n57072_
 .subckt inv_x0 i=$abc$109383$new_n57072_ nq=$abc$109383$new_n57073_
-.subckt ao22_x2 i0=$abc$109383$new_n57070_ i1=$abc$109383$new_n52339_ i2=$abc$109383$new_n57073_ q=$abc$109383$new_n57074_
-.subckt oa22_x2 i0=$abc$109383$new_n57074_ i1=$abc$109383$new_n57071_ i2=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57075_
+.subckt and21nor_x1 i0=$abc$109383$new_n57070_ i1=$abc$109383$new_n52339_ i2=$abc$109383$new_n57073_ nq=$abc$109383$new_n57074_
+.subckt or21nand_x1 i0=$abc$109383$new_n57074_ i1=$abc$109383$new_n57071_ i2=soc.cpu.minerva.payload__jump$59 nq=$abc$109383$new_n57075_
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr$64 nq=$abc$109383$new_n57076_
 .subckt nand2_x0 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29475_ nq=$abc$109383$new_n57077_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__instruction$34[12] i1=soc.cpu.minerva.payload__instruction$34[13] nq=$abc$109383$new_n57078_
 .subckt nand2_x0 i0=$abc$109383$new_n57078_ i1=soc.cpu.minerva.payload__csr$64 nq=$abc$109383$new_n57079_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__csr$64 i1=soc.cpu.minerva.payload__instruction$34[12] i2=soc.cpu.minerva.payload__instruction$34[13] nq=$abc$109383$new_n57080_
-.subckt mx2_x2 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29475_ i1=soc.cpu.minerva.payload__instruction$34[15] q=$abc$109383$new_n57081_
-.subckt mx2_x2 cmd=$abc$109383$new_n57081_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57082_
-.subckt oa22_x2 i0=$abc$109383$new_n57082_ i1=$abc$109383$new_n57077_ i2=$abc$109383$new_n29318_ q=$abc$109383$new_n57083_
-.subckt o2_x2 i0=soc.cpu.minerva.payload__csr$64 i1=$abc$109383$new_n52325_ q=$abc$109383$new_n57084_
-.subckt a2_x2 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n55113_ q=$abc$109383$new_n57085_
+.subckt mux2_x1 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29475_ i1=soc.cpu.minerva.payload__instruction$34[15] q=$abc$109383$new_n57081_
+.subckt mux2_x1 cmd=$abc$109383$new_n57081_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57082_
+.subckt or21nand_x1 i0=$abc$109383$new_n57082_ i1=$abc$109383$new_n57077_ i2=$abc$109383$new_n29318_ nq=$abc$109383$new_n57083_
+.subckt or2_x1 i0=soc.cpu.minerva.payload__csr$64 i1=$abc$109383$new_n52325_ q=$abc$109383$new_n57084_
+.subckt and2_x1 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n55113_ q=$abc$109383$new_n57085_
 .subckt nand3_x0 i0=$abc$109383$new_n57082_ i1=$abc$109383$new_n57077_ i2=$abc$109383$new_n29367_ nq=$abc$109383$new_n57086_
 .subckt nand3_x0 i0=$abc$109383$new_n57086_ i1=$abc$109383$new_n57085_ i2=$abc$109383$new_n57083_ nq=$abc$109383$new_n57087_
-.subckt a3_x2 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n52333_ i2=$abc$109383$new_n52329_ q=$abc$109383$new_n57088_
+.subckt and3_x1 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n52333_ i2=$abc$109383$new_n52329_ q=$abc$109383$new_n57088_
 .subckt nand2_x0 i0=$abc$109383$new_n57088_ i1=$abc$109383$new_n57086_ nq=$abc$109383$new_n57089_
-.subckt o2_x2 i0=$abc$109383$new_n57070_ i1=$abc$109383$new_n29475_ q=$abc$109383$new_n57090_
-.subckt a2_x2 i0=$abc$109383$new_n52332_ i1=soc.cpu.minerva.payload__instruction$34[13] q=$abc$109383$new_n57091_
-.subckt nxr2_x1 i0=$abc$109383$new_n57091_ i1=$abc$109383$new_n57081_ nq=$abc$109383$new_n57092_
+.subckt or2_x1 i0=$abc$109383$new_n57070_ i1=$abc$109383$new_n29475_ q=$abc$109383$new_n57090_
+.subckt and2_x1 i0=$abc$109383$new_n52332_ i1=soc.cpu.minerva.payload__instruction$34[13] q=$abc$109383$new_n57091_
+.subckt nexor2_x0 i0=$abc$109383$new_n57091_ i1=$abc$109383$new_n57081_ nq=$abc$109383$new_n57092_
 .subckt nand2_x0 i0=$abc$109383$new_n57092_ i1=$abc$109383$new_n57070_ nq=$abc$109383$new_n57093_
-.subckt a2_x2 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n57091_ q=$abc$109383$new_n57094_
+.subckt and2_x1 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n57091_ q=$abc$109383$new_n57094_
 .subckt nand4_x0 i0=$abc$109383$new_n57094_ i1=$abc$109383$new_n57093_ i2=$abc$109383$new_n57090_ i3=$abc$109383$new_n29439_ nq=$abc$109383$new_n57095_
-.subckt a4_x2 i0=$abc$109383$new_n57095_ i1=$abc$109383$new_n57089_ i2=$abc$109383$new_n57087_ i3=$abc$109383$new_n57072_ q=$abc$109383$new_n57096_
-.subckt ao22_x2 i0=$abc$109383$new_n57096_ i1=$abc$109383$new_n57075_ i2=$abc$109383$new_n30136_ q=$abc$109383$new_n57097_
+.subckt and4_x1 i0=$abc$109383$new_n57095_ i1=$abc$109383$new_n57089_ i2=$abc$109383$new_n57087_ i3=$abc$109383$new_n57072_ q=$abc$109383$new_n57096_
+.subckt and21nor_x1 i0=$abc$109383$new_n57096_ i1=$abc$109383$new_n57075_ i2=$abc$109383$new_n30136_ nq=$abc$109383$new_n57097_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[0] nq=$abc$109383$new_n57098_
-.subckt ao22_x2 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n29209_ i2=$abc$109383$new_n57098_ q=$abc$109383$new_n57099_
-.subckt o2_x2 i0=$abc$109383$new_n57099_ i1=$abc$109383$new_n29220_ q=$abc$109383$new_n57100_
+.subckt and21nor_x1 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n29209_ i2=$abc$109383$new_n57098_ nq=$abc$109383$new_n57099_
+.subckt or2_x1 i0=$abc$109383$new_n57099_ i1=$abc$109383$new_n29220_ q=$abc$109383$new_n57100_
 .subckt nor2_x0 i0=$abc$109383$new_n57100_ i1=$abc$109383$new_n57097_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106650
 .subckt inv_x0 i=soc.cpu.minerva.payload__jump$59 nq=$abc$109383$new_n57102_
-.subckt oa22_x2 i0=$abc$109383$new_n29385_ i1=$abc$109383$new_n57070_ i2=$abc$109383$new_n57072_ q=$abc$109383$new_n57103_
+.subckt or21nand_x1 i0=$abc$109383$new_n29385_ i1=$abc$109383$new_n57070_ i2=$abc$109383$new_n57072_ nq=$abc$109383$new_n57103_
 .subckt buf_x4 i=$abc$109383$new_n57076_ q=$abc$109383$new_n57104_
 .subckt buf_x4 i=$abc$109383$new_n57104_ q=$abc$109383$new_n57105_
-.subckt oa22_x2 i0=$abc$109383$new_n57105_ i1=$abc$109383$new_n52357_ i2=$abc$109383$new_n57103_ q=$abc$109383$new_n57106_
-.subckt a2_x2 i0=$abc$109383$new_n57106_ i1=$abc$109383$new_n57102_ q=$abc$109383$new_n57107_
+.subckt or21nand_x1 i0=$abc$109383$new_n57105_ i1=$abc$109383$new_n52357_ i2=$abc$109383$new_n57103_ nq=$abc$109383$new_n57106_
+.subckt and2_x1 i0=$abc$109383$new_n57106_ i1=$abc$109383$new_n57102_ q=$abc$109383$new_n57107_
 .subckt buf_x4 i=$abc$109383$new_n57072_ q=$abc$109383$new_n57108_
 .subckt nand2_x0 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n29452_ nq=$abc$109383$new_n57109_
 .subckt buf_x4 i=$abc$109383$new_n57080_ q=$abc$109383$new_n57110_
-.subckt mx2_x2 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29451_ i1=soc.cpu.minerva.payload__instruction$34[16] q=$abc$109383$new_n57111_
-.subckt mx2_x2 cmd=$abc$109383$new_n57111_ i0=$abc$109383$new_n57110_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57112_
+.subckt mux2_x1 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29451_ i1=soc.cpu.minerva.payload__instruction$34[16] q=$abc$109383$new_n57111_
+.subckt mux2_x1 cmd=$abc$109383$new_n57111_ i0=$abc$109383$new_n57110_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57112_
 .subckt nand3_x0 i0=$abc$109383$new_n57112_ i1=$abc$109383$new_n57109_ i2=$abc$109383$new_n29760_ nq=$abc$109383$new_n57113_
-.subckt oa22_x2 i0=$abc$109383$new_n57112_ i1=$abc$109383$new_n57109_ i2=$abc$109383$new_n29382_ q=$abc$109383$new_n57114_
+.subckt or21nand_x1 i0=$abc$109383$new_n57112_ i1=$abc$109383$new_n57109_ i2=$abc$109383$new_n29382_ nq=$abc$109383$new_n57114_
 .subckt nand3_x0 i0=$abc$109383$new_n57114_ i1=$abc$109383$new_n57113_ i2=$abc$109383$new_n57085_ nq=$abc$109383$new_n57115_
 .subckt buf_x4 i=$abc$109383$new_n57094_ q=$abc$109383$new_n57116_
-.subckt a2_x2 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n29451_ q=$abc$109383$new_n57117_
-.subckt a2_x2 i0=$abc$109383$new_n57078_ i1=soc.cpu.minerva.payload__csr$64 q=$abc$109383$new_n57118_
-.subckt a3_x2 i0=soc.cpu.minerva.payload__csr$64 i1=soc.cpu.minerva.payload__instruction$34[12] i2=soc.cpu.minerva.payload__instruction$34[13] q=$abc$109383$new_n57119_
+.subckt and2_x1 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n29451_ q=$abc$109383$new_n57117_
+.subckt and2_x1 i0=$abc$109383$new_n57078_ i1=soc.cpu.minerva.payload__csr$64 q=$abc$109383$new_n57118_
+.subckt and3_x1 i0=soc.cpu.minerva.payload__csr$64 i1=soc.cpu.minerva.payload__instruction$34[12] i2=soc.cpu.minerva.payload__instruction$34[13] q=$abc$109383$new_n57119_
 .subckt buf_x4 i=$abc$109383$new_n57119_ q=$abc$109383$new_n57120_
 .subckt buf_x4 i=$abc$109383$new_n57120_ q=$abc$109383$new_n57121_
-.subckt mx2_x2 cmd=$abc$109383$new_n57111_ i0=$abc$109383$new_n57121_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57122_
-.subckt ao22_x2 i0=$abc$109383$new_n57122_ i1=$abc$109383$new_n57117_ i2=$abc$109383$new_n29385_ q=$abc$109383$new_n57123_
+.subckt mux2_x1 cmd=$abc$109383$new_n57111_ i0=$abc$109383$new_n57121_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57122_
+.subckt and21nor_x1 i0=$abc$109383$new_n57122_ i1=$abc$109383$new_n57117_ i2=$abc$109383$new_n29385_ nq=$abc$109383$new_n57123_
 .subckt nand2_x0 i0=$abc$109383$new_n57123_ i1=$abc$109383$new_n57116_ nq=$abc$109383$new_n57124_
 .subckt nand2_x0 i0=$abc$109383$new_n57113_ i1=$abc$109383$new_n57088_ nq=$abc$109383$new_n57125_
 .subckt nand4_x0 i0=$abc$109383$new_n57125_ i1=$abc$109383$new_n57124_ i2=$abc$109383$new_n57115_ i3=$abc$109383$new_n57108_ nq=$abc$109383$new_n57126_
-.subckt oa22_x2 i0=$abc$109383$new_n57126_ i1=$abc$109383$new_n57107_ i2=$abc$109383$new_n56786_ q=$abc$109383$new_n57127_
+.subckt or21nand_x1 i0=$abc$109383$new_n57126_ i1=$abc$109383$new_n57107_ i2=$abc$109383$new_n56786_ nq=$abc$109383$new_n57127_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[1] nq=$abc$109383$new_n57128_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57128_ q=$abc$109383$new_n57129_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57128_ nq=$abc$109383$new_n57129_
 .subckt nor2_x0 i0=$abc$109383$new_n57129_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n57130_
-.subckt a2_x2 i0=$abc$109383$new_n57130_ i1=$abc$109383$new_n57127_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106654
+.subckt and2_x1 i0=$abc$109383$new_n57130_ i1=$abc$109383$new_n57127_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106654
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[2] nq=$abc$109383$new_n57132_
-.subckt ao22_x2 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n57132_ q=$abc$109383$new_n57133_
+.subckt and21nor_x1 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n41253_ i2=$abc$109383$new_n57132_ nq=$abc$109383$new_n57133_
 .subckt nor2_x0 i0=$abc$109383$new_n57133_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n57134_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[2] nq=$abc$109383$new_n57135_
-.subckt oa22_x2 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n57070_ i2=soc.cpu.minerva.payload__logic$53 q=$abc$109383$new_n57136_
-.subckt oa22_x2 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n51868_ i2=$abc$109383$new_n57136_ q=$abc$109383$new_n57137_
+.subckt or21nand_x1 i0=$abc$109383$new_n29893_ i1=$abc$109383$new_n57070_ i2=soc.cpu.minerva.payload__logic$53 nq=$abc$109383$new_n57136_
+.subckt or21nand_x1 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n51868_ i2=$abc$109383$new_n57136_ nq=$abc$109383$new_n57137_
 .subckt nand2_x0 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29396_ nq=$abc$109383$new_n57138_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__instruction$34[14] i0=$abc$109383$new_n29395_ i1=soc.cpu.minerva.payload__instruction$34[17] q=$abc$109383$new_n57139_
-.subckt mx2_x2 cmd=$abc$109383$new_n57139_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57140_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__instruction$34[14] i0=$abc$109383$new_n29395_ i1=soc.cpu.minerva.payload__instruction$34[17] q=$abc$109383$new_n57139_
+.subckt mux2_x1 cmd=$abc$109383$new_n57139_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57140_
 .subckt nand3_x0 i0=$abc$109383$new_n57140_ i1=$abc$109383$new_n57138_ i2=$abc$109383$new_n29263_ nq=$abc$109383$new_n57141_
-.subckt oa22_x2 i0=$abc$109383$new_n57140_ i1=$abc$109383$new_n57138_ i2=$abc$109383$new_n29262_ q=$abc$109383$new_n57142_
-.subckt a3_x2 i0=$abc$109383$new_n57142_ i1=$abc$109383$new_n57141_ i2=$abc$109383$new_n57085_ q=$abc$109383$new_n57143_
-.subckt a2_x2 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29396_ q=$abc$109383$new_n57144_
-.subckt mx2_x2 cmd=$abc$109383$new_n57139_ i0=$abc$109383$new_n57119_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57145_
-.subckt ao22_x2 i0=$abc$109383$new_n57145_ i1=$abc$109383$new_n57144_ i2=$abc$109383$new_n29893_ q=$abc$109383$new_n57146_
+.subckt or21nand_x1 i0=$abc$109383$new_n57140_ i1=$abc$109383$new_n57138_ i2=$abc$109383$new_n29262_ nq=$abc$109383$new_n57142_
+.subckt and3_x1 i0=$abc$109383$new_n57142_ i1=$abc$109383$new_n57141_ i2=$abc$109383$new_n57085_ q=$abc$109383$new_n57143_
+.subckt and2_x1 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29396_ q=$abc$109383$new_n57144_
+.subckt mux2_x1 cmd=$abc$109383$new_n57139_ i0=$abc$109383$new_n57119_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57145_
+.subckt and21nor_x1 i0=$abc$109383$new_n57145_ i1=$abc$109383$new_n57144_ i2=$abc$109383$new_n29893_ nq=$abc$109383$new_n57146_
 .subckt nand2_x0 i0=$abc$109383$new_n57146_ i1=$abc$109383$new_n57094_ nq=$abc$109383$new_n57147_
 .subckt nand2_x0 i0=$abc$109383$new_n57141_ i1=$abc$109383$new_n57088_ nq=$abc$109383$new_n57148_
 .subckt nand3_x0 i0=$abc$109383$new_n57148_ i1=$abc$109383$new_n57147_ i2=$abc$109383$new_n57072_ nq=$abc$109383$new_n57149_
-.subckt ao22_x2 i0=$abc$109383$new_n57149_ i1=$abc$109383$new_n57143_ i2=$abc$109383$new_n57137_ q=$abc$109383$new_n57150_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__jump$59 i0=$abc$109383$new_n57150_ i1=$abc$109383$new_n57135_ q=$abc$109383$new_n57151_
-.subckt ao22_x2 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n57151_ i2=$abc$109383$new_n57134_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106658
+.subckt and21nor_x1 i0=$abc$109383$new_n57149_ i1=$abc$109383$new_n57143_ i2=$abc$109383$new_n57137_ nq=$abc$109383$new_n57150_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__jump$59 i0=$abc$109383$new_n57150_ i1=$abc$109383$new_n57135_ q=$abc$109383$new_n57151_
+.subckt and21nor_x1 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n57151_ i2=$abc$109383$new_n57134_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106658
 .subckt buf_x4 i=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57153_
-.subckt xr2_x1 i0=soc.cpu.minerva.payload__pc$32[3] i1=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n57154_
+.subckt xor2_x0 i0=soc.cpu.minerva.payload__pc$32[3] i1=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n57154_
 .subckt nand2_x0 i0=$abc$109383$new_n57154_ i1=$abc$109383$new_n57153_ nq=$abc$109383$new_n57155_
-.subckt oa22_x2 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n57070_ i2=$abc$109383$new_n57072_ q=$abc$109383$new_n57156_
+.subckt or21nand_x1 i0=$abc$109383$new_n29247_ i1=$abc$109383$new_n57070_ i2=$abc$109383$new_n57072_ nq=$abc$109383$new_n57156_
 .subckt buf_x4 i=$abc$109383$new_n57104_ q=$abc$109383$new_n57157_
-.subckt oa22_x2 i0=$abc$109383$new_n57157_ i1=$abc$109383$new_n51880_ i2=$abc$109383$new_n57156_ q=$abc$109383$new_n57158_
+.subckt or21nand_x1 i0=$abc$109383$new_n57157_ i1=$abc$109383$new_n51880_ i2=$abc$109383$new_n57156_ nq=$abc$109383$new_n57158_
 .subckt nand2_x0 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n29421_ nq=$abc$109383$new_n57159_
-.subckt mx2_x2 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29420_ i1=soc.cpu.minerva.payload__instruction$34[18] q=$abc$109383$new_n57160_
-.subckt mx2_x2 cmd=$abc$109383$new_n57160_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57161_
+.subckt mux2_x1 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29420_ i1=soc.cpu.minerva.payload__instruction$34[18] q=$abc$109383$new_n57160_
+.subckt mux2_x1 cmd=$abc$109383$new_n57160_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57161_
 .subckt nand3_x0 i0=$abc$109383$new_n57161_ i1=$abc$109383$new_n57159_ i2=$abc$109383$new_n29248_ nq=$abc$109383$new_n57162_
-.subckt oa22_x2 i0=$abc$109383$new_n57161_ i1=$abc$109383$new_n57159_ i2=$abc$109383$new_n29248_ q=$abc$109383$new_n57163_
+.subckt or21nand_x1 i0=$abc$109383$new_n57161_ i1=$abc$109383$new_n57159_ i2=$abc$109383$new_n29248_ nq=$abc$109383$new_n57163_
 .subckt nand3_x0 i0=$abc$109383$new_n57163_ i1=$abc$109383$new_n57162_ i2=$abc$109383$new_n57085_ nq=$abc$109383$new_n57164_
-.subckt a2_x2 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n29421_ q=$abc$109383$new_n57165_
-.subckt mx2_x2 cmd=$abc$109383$new_n57160_ i0=$abc$109383$new_n57120_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57166_
-.subckt ao22_x2 i0=$abc$109383$new_n57166_ i1=$abc$109383$new_n57165_ i2=$abc$109383$new_n29247_ q=$abc$109383$new_n57167_
+.subckt and2_x1 i0=$abc$109383$new_n57104_ i1=$abc$109383$new_n29421_ q=$abc$109383$new_n57165_
+.subckt mux2_x1 cmd=$abc$109383$new_n57160_ i0=$abc$109383$new_n57120_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57166_
+.subckt and21nor_x1 i0=$abc$109383$new_n57166_ i1=$abc$109383$new_n57165_ i2=$abc$109383$new_n29247_ nq=$abc$109383$new_n57167_
 .subckt nand2_x0 i0=$abc$109383$new_n57167_ i1=$abc$109383$new_n57116_ nq=$abc$109383$new_n57168_
 .subckt nand2_x0 i0=$abc$109383$new_n57162_ i1=$abc$109383$new_n57088_ nq=$abc$109383$new_n57169_
 .subckt nand4_x0 i0=$abc$109383$new_n57169_ i1=$abc$109383$new_n57168_ i2=$abc$109383$new_n57164_ i3=$abc$109383$new_n57108_ nq=$abc$109383$new_n57170_
 .subckt nand3_x0 i0=$abc$109383$new_n57170_ i1=$abc$109383$new_n57158_ i2=$abc$109383$new_n57102_ nq=$abc$109383$new_n57171_
 .subckt nand3_x0 i0=$abc$109383$new_n57171_ i1=$abc$109383$new_n57155_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n57172_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[3] nq=$abc$109383$new_n57173_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57173_ q=$abc$109383$new_n57174_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57173_ nq=$abc$109383$new_n57174_
 .subckt nor2_x0 i0=$abc$109383$new_n57174_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n57175_
-.subckt a2_x2 i0=$abc$109383$new_n57175_ i1=$abc$109383$new_n57172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106662
+.subckt and2_x1 i0=$abc$109383$new_n57175_ i1=$abc$109383$new_n57172_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106662
 .subckt buf_x4 i=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57177_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__pc$32[4] i1=soc.cpu.minerva.payload__pc$32[3] i2=soc.cpu.minerva.payload__pc$32[2] nq=$abc$109383$new_n57178_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[2] i1=soc.cpu.minerva.payload__pc$32[3] i2=soc.cpu.minerva.payload__pc$32[4] q=$abc$109383$new_n57179_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[2] i1=soc.cpu.minerva.payload__pc$32[3] i2=soc.cpu.minerva.payload__pc$32[4] nq=$abc$109383$new_n57179_
 .subckt nand3_x0 i0=$abc$109383$new_n57179_ i1=$abc$109383$new_n57178_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57180_
 .subckt buf_x4 i=$abc$109383$new_n57073_ q=$abc$109383$new_n57181_
 .subckt buf_x4 i=$abc$109383$new_n57181_ q=$abc$109383$new_n57182_
-.subckt ao22_x2 i0=$abc$109383$new_n29238_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57183_
-.subckt nxr2_x1 i0=$abc$109383$new_n51897_ i1=$abc$109383$new_n51905_ nq=$abc$109383$new_n57184_
+.subckt and21nor_x1 i0=$abc$109383$new_n29238_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57183_
+.subckt nexor2_x0 i0=$abc$109383$new_n51897_ i1=$abc$109383$new_n51905_ nq=$abc$109383$new_n57184_
 .subckt buf_x4 i=$abc$109383$new_n57070_ q=$abc$109383$new_n57185_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57184_ i2=$abc$109383$new_n57183_ q=$abc$109383$new_n57186_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57184_ i2=$abc$109383$new_n57183_ nq=$abc$109383$new_n57186_
 .subckt buf_x4 i=$abc$109383$new_n57094_ q=$abc$109383$new_n57187_
-.subckt a2_x2 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n57188_
-.subckt mx2_x2 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29274_ i1=soc.cpu.minerva.payload__instruction$34[19] q=$abc$109383$new_n57189_
-.subckt mx2_x2 cmd=$abc$109383$new_n57189_ i0=$abc$109383$new_n57120_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57190_
-.subckt ao22_x2 i0=$abc$109383$new_n57190_ i1=$abc$109383$new_n57188_ i2=$abc$109383$new_n29237_ q=$abc$109383$new_n57191_
+.subckt and2_x1 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29275_ q=$abc$109383$new_n57188_
+.subckt mux2_x1 cmd=$abc$109383$new_n52325_ i0=$abc$109383$new_n29274_ i1=soc.cpu.minerva.payload__instruction$34[19] q=$abc$109383$new_n57189_
+.subckt mux2_x1 cmd=$abc$109383$new_n57189_ i0=$abc$109383$new_n57120_ i1=$abc$109383$new_n57118_ q=$abc$109383$new_n57190_
+.subckt and21nor_x1 i0=$abc$109383$new_n57190_ i1=$abc$109383$new_n57188_ i2=$abc$109383$new_n29237_ nq=$abc$109383$new_n57191_
 .subckt nand2_x0 i0=$abc$109383$new_n57191_ i1=$abc$109383$new_n57187_ nq=$abc$109383$new_n57192_
 .subckt nand2_x0 i0=$abc$109383$new_n57076_ i1=$abc$109383$new_n29275_ nq=$abc$109383$new_n57193_
-.subckt mx2_x2 cmd=$abc$109383$new_n57189_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57194_
+.subckt mux2_x1 cmd=$abc$109383$new_n57189_ i0=$abc$109383$new_n57080_ i1=$abc$109383$new_n57079_ q=$abc$109383$new_n57194_
 .subckt nand3_x0 i0=$abc$109383$new_n57194_ i1=$abc$109383$new_n57193_ i2=$abc$109383$new_n29238_ nq=$abc$109383$new_n57195_
 .subckt nand2_x0 i0=$abc$109383$new_n57195_ i1=$abc$109383$new_n57088_ nq=$abc$109383$new_n57196_
-.subckt a2_x2 i0=$abc$109383$new_n57196_ i1=$abc$109383$new_n57192_ q=$abc$109383$new_n57197_
-.subckt oa22_x2 i0=$abc$109383$new_n57194_ i1=$abc$109383$new_n57193_ i2=$abc$109383$new_n29238_ q=$abc$109383$new_n57198_
+.subckt and2_x1 i0=$abc$109383$new_n57196_ i1=$abc$109383$new_n57192_ q=$abc$109383$new_n57197_
+.subckt or21nand_x1 i0=$abc$109383$new_n57194_ i1=$abc$109383$new_n57193_ i2=$abc$109383$new_n29238_ nq=$abc$109383$new_n57198_
 .subckt nand3_x0 i0=$abc$109383$new_n57195_ i1=$abc$109383$new_n57198_ i2=$abc$109383$new_n57085_ nq=$abc$109383$new_n57199_
-.subckt a2_x2 i0=$abc$109383$new_n57199_ i1=$abc$109383$new_n57072_ q=$abc$109383$new_n57200_
-.subckt oa22_x2 i0=$abc$109383$new_n57200_ i1=$abc$109383$new_n57197_ i2=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57201_
-.subckt ao22_x2 i0=$abc$109383$new_n57201_ i1=$abc$109383$new_n57186_ i2=$abc$109383$new_n57180_ q=$abc$109383$new_n57202_
+.subckt and2_x1 i0=$abc$109383$new_n57199_ i1=$abc$109383$new_n57072_ q=$abc$109383$new_n57200_
+.subckt or21nand_x1 i0=$abc$109383$new_n57200_ i1=$abc$109383$new_n57197_ i2=soc.cpu.minerva.payload__jump$59 nq=$abc$109383$new_n57201_
+.subckt and21nor_x1 i0=$abc$109383$new_n57201_ i1=$abc$109383$new_n57186_ i2=$abc$109383$new_n57180_ nq=$abc$109383$new_n57202_
 .subckt nand2_x0 i0=$abc$109383$new_n57202_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57203_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[4] nq=$abc$109383$new_n57204_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57204_ q=$abc$109383$new_n57205_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57204_ nq=$abc$109383$new_n57205_
 .subckt nor2_x0 i0=$abc$109383$new_n57205_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n57206_
-.subckt a2_x2 i0=$abc$109383$new_n57206_ i1=$abc$109383$new_n57203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106666
+.subckt and2_x1 i0=$abc$109383$new_n57206_ i1=$abc$109383$new_n57203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106666
 .subckt buf_x4 i=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57208_
 .subckt buf_x4 i=$abc$109383$new_n57208_ q=$abc$109383$new_n57209_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[5] nq=$abc$109383$new_n57210_
-.subckt a3_x2 i0=soc.cpu.minerva.payload__pc$32[4] i1=soc.cpu.minerva.payload__pc$32[3] i2=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n57211_
-.subckt nxr2_x1 i0=$abc$109383$new_n57211_ i1=$abc$109383$new_n57210_ nq=$abc$109383$new_n57212_
+.subckt and3_x1 i0=soc.cpu.minerva.payload__pc$32[4] i1=soc.cpu.minerva.payload__pc$32[3] i2=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n57211_
+.subckt nexor2_x0 i0=$abc$109383$new_n57211_ i1=$abc$109383$new_n57210_ nq=$abc$109383$new_n57212_
 .subckt nand2_x0 i0=$abc$109383$new_n57212_ i1=$abc$109383$new_n57209_ nq=$abc$109383$new_n57213_
-.subckt ao22_x2 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57214_
-.subckt nxr2_x1 i0=$abc$109383$new_n51912_ i1=$abc$109383$new_n51919_ nq=$abc$109383$new_n57215_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57215_ i2=$abc$109383$new_n57214_ q=$abc$109383$new_n57216_
+.subckt and21nor_x1 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57214_
+.subckt nexor2_x0 i0=$abc$109383$new_n51912_ i1=$abc$109383$new_n51919_ nq=$abc$109383$new_n57215_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57215_ i2=$abc$109383$new_n57214_ nq=$abc$109383$new_n57216_
 .subckt buf_x4 i=$abc$109383$new_n57110_ q=$abc$109383$new_n57217_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__csr$64 i1=$abc$109383$new_n52325_ nq=$abc$109383$new_n57218_
 .subckt buf_x4 i=$abc$109383$new_n57218_ q=$abc$109383$new_n57219_
 .subckt buf_x4 i=$abc$109383$new_n57219_ q=$abc$109383$new_n57220_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n57221_
-.subckt nxr2_x1 i0=$abc$109383$new_n57221_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57222_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29298_ q=$abc$109383$new_n57221_
+.subckt nexor2_x0 i0=$abc$109383$new_n57221_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57222_
 .subckt nand3_x0 i0=$abc$109383$new_n57222_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n36232_ nq=$abc$109383$new_n57223_
 .subckt nand3_x0 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n52333_ i2=$abc$109383$new_n52329_ nq=$abc$109383$new_n57224_
 .subckt buf_x4 i=$abc$109383$new_n57224_ q=$abc$109383$new_n57225_
-.subckt nxr2_x1 i0=$abc$109383$new_n57221_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57226_
-.subckt oa22_x2 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n57226_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57227_
-.subckt a2_x2 i0=$abc$109383$new_n57227_ i1=$abc$109383$new_n57223_ q=$abc$109383$new_n57228_
+.subckt nexor2_x0 i0=$abc$109383$new_n57221_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57226_
+.subckt or21nand_x1 i0=$abc$109383$new_n36912_ i1=$abc$109383$new_n57226_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57227_
+.subckt and2_x1 i0=$abc$109383$new_n57227_ i1=$abc$109383$new_n57223_ q=$abc$109383$new_n57228_
 .subckt nand2_x0 i0=$abc$109383$new_n57084_ i1=$abc$109383$new_n55113_ nq=$abc$109383$new_n57229_
 .subckt buf_x4 i=$abc$109383$new_n57229_ q=$abc$109383$new_n57230_
-.subckt nxr2_x1 i0=$abc$109383$new_n57226_ i1=$abc$109383$new_n36912_ nq=$abc$109383$new_n57231_
-.subckt ao22_x2 i0=$abc$109383$new_n57231_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57232_
-.subckt oa22_x2 i0=$abc$109383$new_n57232_ i1=$abc$109383$new_n57228_ i2=$abc$109383$new_n57177_ q=$abc$109383$new_n57233_
-.subckt ao22_x2 i0=$abc$109383$new_n57233_ i1=$abc$109383$new_n57216_ i2=$abc$109383$new_n57213_ q=$abc$109383$new_n57234_
+.subckt nexor2_x0 i0=$abc$109383$new_n57226_ i1=$abc$109383$new_n36912_ nq=$abc$109383$new_n57231_
+.subckt and21nor_x1 i0=$abc$109383$new_n57231_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57232_
+.subckt or21nand_x1 i0=$abc$109383$new_n57232_ i1=$abc$109383$new_n57228_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57233_
+.subckt and21nor_x1 i0=$abc$109383$new_n57233_ i1=$abc$109383$new_n57216_ i2=$abc$109383$new_n57213_ nq=$abc$109383$new_n57234_
 .subckt nand2_x0 i0=$abc$109383$new_n57234_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57235_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[5] nq=$abc$109383$new_n57236_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57236_ q=$abc$109383$new_n57237_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57236_ nq=$abc$109383$new_n57237_
 .subckt nor2_x0 i0=$abc$109383$new_n57237_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n57238_
-.subckt a2_x2 i0=$abc$109383$new_n57238_ i1=$abc$109383$new_n57235_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106670
+.subckt and2_x1 i0=$abc$109383$new_n57238_ i1=$abc$109383$new_n57235_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106670
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[6] nq=$abc$109383$new_n57240_
-.subckt a4_x2 i0=soc.cpu.minerva.payload__pc$32[5] i1=soc.cpu.minerva.payload__pc$32[4] i2=soc.cpu.minerva.payload__pc$32[3] i3=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n57241_
-.subckt nxr2_x1 i0=$abc$109383$new_n57241_ i1=$abc$109383$new_n57240_ nq=$abc$109383$new_n57242_
+.subckt and4_x1 i0=soc.cpu.minerva.payload__pc$32[5] i1=soc.cpu.minerva.payload__pc$32[4] i2=soc.cpu.minerva.payload__pc$32[3] i3=soc.cpu.minerva.payload__pc$32[2] q=$abc$109383$new_n57241_
+.subckt nexor2_x0 i0=$abc$109383$new_n57241_ i1=$abc$109383$new_n57240_ nq=$abc$109383$new_n57242_
 .subckt nand2_x0 i0=$abc$109383$new_n57242_ i1=$abc$109383$new_n57209_ nq=$abc$109383$new_n57243_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29332_ q=$abc$109383$new_n57244_
-.subckt nxr2_x1 i0=$abc$109383$new_n57244_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57245_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29332_ q=$abc$109383$new_n57244_
+.subckt nexor2_x0 i0=$abc$109383$new_n57244_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57245_
 .subckt nand3_x0 i0=$abc$109383$new_n57245_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n36592_ nq=$abc$109383$new_n57246_
-.subckt nxr2_x1 i0=$abc$109383$new_n57244_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57247_
-.subckt oa22_x2 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n57247_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57248_
-.subckt a2_x2 i0=$abc$109383$new_n57248_ i1=$abc$109383$new_n57246_ q=$abc$109383$new_n57249_
-.subckt nxr2_x1 i0=$abc$109383$new_n57247_ i1=$abc$109383$new_n51936_ nq=$abc$109383$new_n57250_
-.subckt ao22_x2 i0=$abc$109383$new_n57250_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57251_
-.subckt oa22_x2 i0=$abc$109383$new_n57251_ i1=$abc$109383$new_n57249_ i2=$abc$109383$new_n57177_ q=$abc$109383$new_n57252_
-.subckt ao22_x2 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57253_
-.subckt nxr2_x1 i0=$abc$109383$new_n51926_ i1=$abc$109383$new_n51956_ nq=$abc$109383$new_n57254_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57254_ i2=$abc$109383$new_n57253_ q=$abc$109383$new_n57255_
-.subckt ao22_x2 i0=$abc$109383$new_n57255_ i1=$abc$109383$new_n57252_ i2=$abc$109383$new_n57243_ q=$abc$109383$new_n57256_
+.subckt nexor2_x0 i0=$abc$109383$new_n57244_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57247_
+.subckt or21nand_x1 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n57247_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57248_
+.subckt and2_x1 i0=$abc$109383$new_n57248_ i1=$abc$109383$new_n57246_ q=$abc$109383$new_n57249_
+.subckt nexor2_x0 i0=$abc$109383$new_n57247_ i1=$abc$109383$new_n51936_ nq=$abc$109383$new_n57250_
+.subckt and21nor_x1 i0=$abc$109383$new_n57250_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57251_
+.subckt or21nand_x1 i0=$abc$109383$new_n57251_ i1=$abc$109383$new_n57249_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57252_
+.subckt and21nor_x1 i0=$abc$109383$new_n51936_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57253_
+.subckt nexor2_x0 i0=$abc$109383$new_n51926_ i1=$abc$109383$new_n51956_ nq=$abc$109383$new_n57254_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57254_ i2=$abc$109383$new_n57253_ nq=$abc$109383$new_n57255_
+.subckt and21nor_x1 i0=$abc$109383$new_n57255_ i1=$abc$109383$new_n57252_ i2=$abc$109383$new_n57243_ nq=$abc$109383$new_n57256_
 .subckt nand2_x0 i0=$abc$109383$new_n57256_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57257_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[6] nq=$abc$109383$new_n57258_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57258_ q=$abc$109383$new_n57259_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57258_ nq=$abc$109383$new_n57259_
 .subckt nor2_x0 i0=$abc$109383$new_n57259_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n57260_
-.subckt a2_x2 i0=$abc$109383$new_n57260_ i1=$abc$109383$new_n57257_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106674
+.subckt and2_x1 i0=$abc$109383$new_n57260_ i1=$abc$109383$new_n57257_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106674
 .subckt nand3_x0 i0=$abc$109383$new_n57241_ i1=soc.cpu.minerva.payload__pc$32[7] i2=soc.cpu.minerva.payload__pc$32[6] nq=$abc$109383$new_n57262_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[6] i1=$abc$109383$new_n57241_ i2=soc.cpu.minerva.payload__pc$32[7] q=$abc$109383$new_n57263_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[6] i1=$abc$109383$new_n57241_ i2=soc.cpu.minerva.payload__pc$32[7] nq=$abc$109383$new_n57263_
 .subckt nand3_x0 i0=$abc$109383$new_n57263_ i1=$abc$109383$new_n57262_ i2=$abc$109383$new_n57209_ nq=$abc$109383$new_n57264_
 .subckt buf_x4 i=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57265_
 .subckt buf_x4 i=$abc$109383$new_n57094_ q=$abc$109383$new_n57266_
 .subckt buf_x4 i=$abc$109383$new_n57110_ q=$abc$109383$new_n57267_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n57268_
-.subckt nxr2_x1 i0=$abc$109383$new_n57268_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57269_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29354_ q=$abc$109383$new_n57268_
+.subckt nexor2_x0 i0=$abc$109383$new_n57268_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57269_
 .subckt nand3_x0 i0=$abc$109383$new_n57269_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n37587_ nq=$abc$109383$new_n57270_
 .subckt buf_x4 i=$abc$109383$new_n57120_ q=$abc$109383$new_n57271_
-.subckt nxr2_x1 i0=$abc$109383$new_n57268_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57272_
-.subckt oa22_x2 i0=$abc$109383$new_n51951_ i1=$abc$109383$new_n57272_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57273_
-.subckt a2_x2 i0=$abc$109383$new_n57273_ i1=$abc$109383$new_n57270_ q=$abc$109383$new_n57274_
+.subckt nexor2_x0 i0=$abc$109383$new_n57268_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57272_
+.subckt or21nand_x1 i0=$abc$109383$new_n51951_ i1=$abc$109383$new_n57272_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57273_
+.subckt and2_x1 i0=$abc$109383$new_n57273_ i1=$abc$109383$new_n57270_ q=$abc$109383$new_n57274_
 .subckt buf_x4 i=$abc$109383$new_n57072_ q=$abc$109383$new_n57275_
-.subckt nxr2_x1 i0=$abc$109383$new_n57272_ i1=$abc$109383$new_n51951_ nq=$abc$109383$new_n57276_
-.subckt ao22_x2 i0=$abc$109383$new_n57276_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57277_
-.subckt oa22_x2 i0=$abc$109383$new_n57277_ i1=$abc$109383$new_n57274_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57278_
+.subckt nexor2_x0 i0=$abc$109383$new_n57272_ i1=$abc$109383$new_n51951_ nq=$abc$109383$new_n57276_
+.subckt and21nor_x1 i0=$abc$109383$new_n57276_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57277_
+.subckt or21nand_x1 i0=$abc$109383$new_n57277_ i1=$abc$109383$new_n57274_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57278_
 .subckt buf_x4 i=$abc$109383$new_n57181_ q=$abc$109383$new_n57279_
-.subckt ao22_x2 i0=$abc$109383$new_n51951_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57280_
-.subckt nxr2_x1 i0=$abc$109383$new_n51942_ i1=$abc$109383$new_n51954_ nq=$abc$109383$new_n57281_
+.subckt and21nor_x1 i0=$abc$109383$new_n51951_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57280_
+.subckt nexor2_x0 i0=$abc$109383$new_n51942_ i1=$abc$109383$new_n51954_ nq=$abc$109383$new_n57281_
 .subckt buf_x4 i=$abc$109383$new_n57070_ q=$abc$109383$new_n57282_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57281_ i2=$abc$109383$new_n57280_ q=$abc$109383$new_n57283_
-.subckt ao22_x2 i0=$abc$109383$new_n57283_ i1=$abc$109383$new_n57278_ i2=$abc$109383$new_n57264_ q=$abc$109383$new_n57284_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57281_ i2=$abc$109383$new_n57280_ nq=$abc$109383$new_n57283_
+.subckt and21nor_x1 i0=$abc$109383$new_n57283_ i1=$abc$109383$new_n57278_ i2=$abc$109383$new_n57264_ nq=$abc$109383$new_n57284_
 .subckt nand2_x0 i0=$abc$109383$new_n57284_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57285_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[7] nq=$abc$109383$new_n57286_
-.subckt ao22_x2 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57286_ q=$abc$109383$new_n57287_
+.subckt and21nor_x1 i0=$abc$109383$new_n56839_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57286_ nq=$abc$109383$new_n57287_
 .subckt nor2_x0 i0=$abc$109383$new_n57287_ i1=$abc$109383$new_n56837_ nq=$abc$109383$new_n57288_
-.subckt a2_x2 i0=$abc$109383$new_n57288_ i1=$abc$109383$new_n57285_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106678
+.subckt and2_x1 i0=$abc$109383$new_n57288_ i1=$abc$109383$new_n57285_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106678
 .subckt nand4_x0 i0=$abc$109383$new_n57241_ i1=soc.cpu.minerva.payload__pc$32[8] i2=soc.cpu.minerva.payload__pc$32[7] i3=soc.cpu.minerva.payload__pc$32[6] nq=$abc$109383$new_n57290_
-.subckt a3_x2 i0=$abc$109383$new_n57241_ i1=soc.cpu.minerva.payload__pc$32[7] i2=soc.cpu.minerva.payload__pc$32[6] q=$abc$109383$new_n57291_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[8] i1=$abc$109383$new_n57291_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57292_
+.subckt and3_x1 i0=$abc$109383$new_n57241_ i1=soc.cpu.minerva.payload__pc$32[7] i2=soc.cpu.minerva.payload__pc$32[6] q=$abc$109383$new_n57291_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[8] i1=$abc$109383$new_n57291_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57292_
 .subckt nand2_x0 i0=$abc$109383$new_n57292_ i1=$abc$109383$new_n57290_ nq=$abc$109383$new_n57293_
 .subckt buf_x4 i=$abc$109383$new_n57219_ q=$abc$109383$new_n57294_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n57295_
-.subckt nxr2_x1 i0=$abc$109383$new_n57295_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57296_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29510_ q=$abc$109383$new_n57295_
+.subckt nexor2_x0 i0=$abc$109383$new_n57295_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57296_
 .subckt nand3_x0 i0=$abc$109383$new_n57296_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n37588_ nq=$abc$109383$new_n57297_
 .subckt buf_x4 i=$abc$109383$new_n57224_ q=$abc$109383$new_n57298_
-.subckt nxr2_x1 i0=$abc$109383$new_n57295_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57299_
-.subckt oa22_x2 i0=$abc$109383$new_n51968_ i1=$abc$109383$new_n57299_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57300_
-.subckt a2_x2 i0=$abc$109383$new_n57300_ i1=$abc$109383$new_n57297_ q=$abc$109383$new_n57301_
+.subckt nexor2_x0 i0=$abc$109383$new_n57295_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57299_
+.subckt or21nand_x1 i0=$abc$109383$new_n51968_ i1=$abc$109383$new_n57299_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57300_
+.subckt and2_x1 i0=$abc$109383$new_n57300_ i1=$abc$109383$new_n57297_ q=$abc$109383$new_n57301_
 .subckt buf_x4 i=$abc$109383$new_n57229_ q=$abc$109383$new_n57302_
-.subckt nxr2_x1 i0=$abc$109383$new_n57299_ i1=$abc$109383$new_n51968_ nq=$abc$109383$new_n57303_
-.subckt ao22_x2 i0=$abc$109383$new_n57303_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57304_
-.subckt oa22_x2 i0=$abc$109383$new_n57304_ i1=$abc$109383$new_n57301_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57305_
-.subckt ao22_x2 i0=$abc$109383$new_n51968_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57306_
-.subckt nxr2_x1 i0=$abc$109383$new_n51963_ i1=$abc$109383$new_n51970_ nq=$abc$109383$new_n57307_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57307_ i2=$abc$109383$new_n57306_ q=$abc$109383$new_n57308_
-.subckt ao22_x2 i0=$abc$109383$new_n57308_ i1=$abc$109383$new_n57305_ i2=$abc$109383$new_n57293_ q=$abc$109383$new_n57309_
+.subckt nexor2_x0 i0=$abc$109383$new_n57299_ i1=$abc$109383$new_n51968_ nq=$abc$109383$new_n57303_
+.subckt and21nor_x1 i0=$abc$109383$new_n57303_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57304_
+.subckt or21nand_x1 i0=$abc$109383$new_n57304_ i1=$abc$109383$new_n57301_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57305_
+.subckt and21nor_x1 i0=$abc$109383$new_n51968_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57306_
+.subckt nexor2_x0 i0=$abc$109383$new_n51963_ i1=$abc$109383$new_n51970_ nq=$abc$109383$new_n57307_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57307_ i2=$abc$109383$new_n57306_ nq=$abc$109383$new_n57308_
+.subckt and21nor_x1 i0=$abc$109383$new_n57308_ i1=$abc$109383$new_n57305_ i2=$abc$109383$new_n57293_ nq=$abc$109383$new_n57309_
 .subckt nand2_x0 i0=$abc$109383$new_n57309_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57310_
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n57311_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[8] nq=$abc$109383$new_n57312_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n57313_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57312_ q=$abc$109383$new_n57314_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n56849_ i2=$abc$109383$new_n57312_ nq=$abc$109383$new_n57314_
 .subckt nor2_x0 i0=$abc$109383$new_n57314_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57315_
-.subckt a2_x2 i0=$abc$109383$new_n57315_ i1=$abc$109383$new_n57310_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106682
+.subckt and2_x1 i0=$abc$109383$new_n57315_ i1=$abc$109383$new_n57310_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106682
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[9] nq=$abc$109383$new_n57317_
-.subckt ao22_x2 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n29209_ i2=$abc$109383$new_n57317_ q=$abc$109383$new_n57318_
+.subckt and21nor_x1 i0=$abc$109383$new_n29211_ i1=$abc$109383$new_n29209_ i2=$abc$109383$new_n57317_ nq=$abc$109383$new_n57318_
 .subckt nor2_x0 i0=$abc$109383$new_n57318_ i1=$abc$109383$new_n28376_ nq=$abc$109383$new_n57319_
-.subckt a4_x2 i0=$abc$109383$new_n57241_ i1=soc.cpu.minerva.payload__pc$32[8] i2=soc.cpu.minerva.payload__pc$32[7] i3=soc.cpu.minerva.payload__pc$32[6] q=$abc$109383$new_n57320_
+.subckt and4_x1 i0=$abc$109383$new_n57241_ i1=soc.cpu.minerva.payload__pc$32[8] i2=soc.cpu.minerva.payload__pc$32[7] i3=soc.cpu.minerva.payload__pc$32[6] q=$abc$109383$new_n57320_
 .subckt nand2_x0 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[9] nq=$abc$109383$new_n57321_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[9] i1=$abc$109383$new_n57320_ i2=$abc$109383$new_n57177_ q=$abc$109383$new_n57322_
-.subckt a2_x2 i0=$abc$109383$new_n57322_ i1=$abc$109383$new_n57321_ q=$abc$109383$new_n57323_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n57324_
-.subckt nxr2_x1 i0=$abc$109383$new_n57324_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57325_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[9] i1=$abc$109383$new_n57320_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57322_
+.subckt and2_x1 i0=$abc$109383$new_n57322_ i1=$abc$109383$new_n57321_ q=$abc$109383$new_n57323_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29532_ q=$abc$109383$new_n57324_
+.subckt nexor2_x0 i0=$abc$109383$new_n57324_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57325_
 .subckt nand3_x0 i0=$abc$109383$new_n57325_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n38535_ nq=$abc$109383$new_n57326_
-.subckt nxr2_x1 i0=$abc$109383$new_n57324_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57327_
-.subckt oa22_x2 i0=$abc$109383$new_n51985_ i1=$abc$109383$new_n57327_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57328_
-.subckt a2_x2 i0=$abc$109383$new_n57328_ i1=$abc$109383$new_n57326_ q=$abc$109383$new_n57329_
-.subckt nxr2_x1 i0=$abc$109383$new_n57327_ i1=$abc$109383$new_n51985_ nq=$abc$109383$new_n57330_
-.subckt ao22_x2 i0=$abc$109383$new_n57330_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57331_
+.subckt nexor2_x0 i0=$abc$109383$new_n57324_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57327_
+.subckt or21nand_x1 i0=$abc$109383$new_n51985_ i1=$abc$109383$new_n57327_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57328_
+.subckt and2_x1 i0=$abc$109383$new_n57328_ i1=$abc$109383$new_n57326_ q=$abc$109383$new_n57329_
+.subckt nexor2_x0 i0=$abc$109383$new_n57327_ i1=$abc$109383$new_n51985_ nq=$abc$109383$new_n57330_
+.subckt and21nor_x1 i0=$abc$109383$new_n57330_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57331_
 .subckt nand2_x0 i0=$abc$109383$new_n57331_ i1=$abc$109383$new_n57329_ nq=$abc$109383$new_n57332_
-.subckt a2_x2 i0=$abc$109383$new_n57332_ i1=$abc$109383$new_n57102_ q=$abc$109383$new_n57333_
-.subckt oa22_x2 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n57185_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57334_
-.subckt oa22_x2 i0=$abc$109383$new_n57105_ i1=$abc$109383$new_n51976_ i2=$abc$109383$new_n57334_ q=$abc$109383$new_n57335_
-.subckt oa22_x2 i0=$abc$109383$new_n57335_ i1=$abc$109383$new_n57333_ i2=$abc$109383$new_n57323_ q=$abc$109383$new_n57336_
-.subckt ao22_x2 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n57336_ i2=$abc$109383$new_n57319_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106686
+.subckt and2_x1 i0=$abc$109383$new_n57332_ i1=$abc$109383$new_n57102_ q=$abc$109383$new_n57333_
+.subckt or21nand_x1 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n57185_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57334_
+.subckt or21nand_x1 i0=$abc$109383$new_n57105_ i1=$abc$109383$new_n51976_ i2=$abc$109383$new_n57334_ nq=$abc$109383$new_n57335_
+.subckt or21nand_x1 i0=$abc$109383$new_n57335_ i1=$abc$109383$new_n57333_ i2=$abc$109383$new_n57323_ nq=$abc$109383$new_n57336_
+.subckt and21nor_x1 i0=$abc$109383$new_n42784_ i1=$abc$109383$new_n57336_ i2=$abc$109383$new_n57319_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106686
 .subckt nand3_x0 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[10] i2=soc.cpu.minerva.payload__pc$32[9] nq=$abc$109383$new_n57338_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[9] i1=$abc$109383$new_n57320_ i2=soc.cpu.minerva.payload__pc$32[10] q=$abc$109383$new_n57339_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[9] i1=$abc$109383$new_n57320_ i2=soc.cpu.minerva.payload__pc$32[10] nq=$abc$109383$new_n57339_
 .subckt nand3_x0 i0=$abc$109383$new_n57339_ i1=$abc$109383$new_n57338_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57340_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29558_ q=$abc$109383$new_n57341_
-.subckt nxr2_x1 i0=$abc$109383$new_n57341_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57342_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29558_ q=$abc$109383$new_n57341_
+.subckt nexor2_x0 i0=$abc$109383$new_n57341_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57342_
 .subckt nand3_x0 i0=$abc$109383$new_n57342_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n38513_ nq=$abc$109383$new_n57343_
-.subckt nxr2_x1 i0=$abc$109383$new_n57341_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57344_
-.subckt oa22_x2 i0=$abc$109383$new_n51993_ i1=$abc$109383$new_n57344_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57345_
-.subckt a2_x2 i0=$abc$109383$new_n57345_ i1=$abc$109383$new_n57343_ q=$abc$109383$new_n57346_
-.subckt nxr2_x1 i0=$abc$109383$new_n57344_ i1=$abc$109383$new_n51993_ nq=$abc$109383$new_n57347_
-.subckt ao22_x2 i0=$abc$109383$new_n57347_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57348_
-.subckt oa22_x2 i0=$abc$109383$new_n57348_ i1=$abc$109383$new_n57346_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57349_
-.subckt ao22_x2 i0=$abc$109383$new_n51993_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57350_
-.subckt nxr2_x1 i0=$abc$109383$new_n51988_ i1=$abc$109383$new_n51995_ nq=$abc$109383$new_n57351_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57351_ i2=$abc$109383$new_n57350_ q=$abc$109383$new_n57352_
-.subckt ao22_x2 i0=$abc$109383$new_n57352_ i1=$abc$109383$new_n57349_ i2=$abc$109383$new_n57340_ q=$abc$109383$new_n57353_
+.subckt nexor2_x0 i0=$abc$109383$new_n57341_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57344_
+.subckt or21nand_x1 i0=$abc$109383$new_n51993_ i1=$abc$109383$new_n57344_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57345_
+.subckt and2_x1 i0=$abc$109383$new_n57345_ i1=$abc$109383$new_n57343_ q=$abc$109383$new_n57346_
+.subckt nexor2_x0 i0=$abc$109383$new_n57344_ i1=$abc$109383$new_n51993_ nq=$abc$109383$new_n57347_
+.subckt and21nor_x1 i0=$abc$109383$new_n57347_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57348_
+.subckt or21nand_x1 i0=$abc$109383$new_n57348_ i1=$abc$109383$new_n57346_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57349_
+.subckt and21nor_x1 i0=$abc$109383$new_n51993_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57350_
+.subckt nexor2_x0 i0=$abc$109383$new_n51988_ i1=$abc$109383$new_n51995_ nq=$abc$109383$new_n57351_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57351_ i2=$abc$109383$new_n57350_ nq=$abc$109383$new_n57352_
+.subckt and21nor_x1 i0=$abc$109383$new_n57352_ i1=$abc$109383$new_n57349_ i2=$abc$109383$new_n57340_ nq=$abc$109383$new_n57353_
 .subckt nand2_x0 i0=$abc$109383$new_n57353_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57354_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[10] nq=$abc$109383$new_n57355_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n57356_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57355_ q=$abc$109383$new_n57357_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57355_ nq=$abc$109383$new_n57357_
 .subckt nor2_x0 i0=$abc$109383$new_n57357_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57358_
-.subckt a2_x2 i0=$abc$109383$new_n57358_ i1=$abc$109383$new_n57354_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106690
+.subckt and2_x1 i0=$abc$109383$new_n57358_ i1=$abc$109383$new_n57354_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106690
 .subckt nand4_x0 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[11] i2=soc.cpu.minerva.payload__pc$32[10] i3=soc.cpu.minerva.payload__pc$32[9] nq=$abc$109383$new_n57360_
-.subckt a3_x2 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[10] i2=soc.cpu.minerva.payload__pc$32[9] q=$abc$109383$new_n57361_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[11] i1=$abc$109383$new_n57361_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57362_
+.subckt and3_x1 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[10] i2=soc.cpu.minerva.payload__pc$32[9] q=$abc$109383$new_n57361_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[11] i1=$abc$109383$new_n57361_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57362_
 .subckt nand2_x0 i0=$abc$109383$new_n57362_ i1=$abc$109383$new_n57360_ nq=$abc$109383$new_n57363_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n57364_
-.subckt nxr2_x1 i0=$abc$109383$new_n57364_ i1=$abc$109383$new_n57110_ nq=$abc$109383$new_n57365_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29582_ q=$abc$109383$new_n57364_
+.subckt nexor2_x0 i0=$abc$109383$new_n57364_ i1=$abc$109383$new_n57110_ nq=$abc$109383$new_n57365_
 .subckt nand3_x0 i0=$abc$109383$new_n57365_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n38514_ nq=$abc$109383$new_n57366_
-.subckt nxr2_x1 i0=$abc$109383$new_n57364_ i1=$abc$109383$new_n57120_ nq=$abc$109383$new_n57367_
-.subckt oa22_x2 i0=$abc$109383$new_n38881_ i1=$abc$109383$new_n57367_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57368_
-.subckt a2_x2 i0=$abc$109383$new_n57368_ i1=$abc$109383$new_n57366_ q=$abc$109383$new_n57369_
-.subckt nxr2_x1 i0=$abc$109383$new_n57367_ i1=$abc$109383$new_n38881_ nq=$abc$109383$new_n57370_
-.subckt ao22_x2 i0=$abc$109383$new_n57370_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57072_ q=$abc$109383$new_n57371_
-.subckt oa22_x2 i0=$abc$109383$new_n57371_ i1=$abc$109383$new_n57369_ i2=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57372_
-.subckt ao22_x2 i0=$abc$109383$new_n38881_ i1=$abc$109383$new_n57104_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57373_
-.subckt nxr2_x1 i0=$abc$109383$new_n51999_ i1=$abc$109383$new_n52005_ nq=$abc$109383$new_n57374_
+.subckt nexor2_x0 i0=$abc$109383$new_n57364_ i1=$abc$109383$new_n57120_ nq=$abc$109383$new_n57367_
+.subckt or21nand_x1 i0=$abc$109383$new_n38881_ i1=$abc$109383$new_n57367_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57368_
+.subckt and2_x1 i0=$abc$109383$new_n57368_ i1=$abc$109383$new_n57366_ q=$abc$109383$new_n57369_
+.subckt nexor2_x0 i0=$abc$109383$new_n57367_ i1=$abc$109383$new_n38881_ nq=$abc$109383$new_n57370_
+.subckt and21nor_x1 i0=$abc$109383$new_n57370_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57072_ nq=$abc$109383$new_n57371_
+.subckt or21nand_x1 i0=$abc$109383$new_n57371_ i1=$abc$109383$new_n57369_ i2=soc.cpu.minerva.payload__jump$59 nq=$abc$109383$new_n57372_
+.subckt and21nor_x1 i0=$abc$109383$new_n38881_ i1=$abc$109383$new_n57104_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57373_
+.subckt nexor2_x0 i0=$abc$109383$new_n51999_ i1=$abc$109383$new_n52005_ nq=$abc$109383$new_n57374_
 .subckt buf_x4 i=$abc$109383$new_n57070_ q=$abc$109383$new_n57375_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57374_ i2=$abc$109383$new_n57373_ q=$abc$109383$new_n57376_
-.subckt ao22_x2 i0=$abc$109383$new_n57376_ i1=$abc$109383$new_n57372_ i2=$abc$109383$new_n57363_ q=$abc$109383$new_n57377_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57374_ i2=$abc$109383$new_n57373_ nq=$abc$109383$new_n57376_
+.subckt and21nor_x1 i0=$abc$109383$new_n57376_ i1=$abc$109383$new_n57372_ i2=$abc$109383$new_n57363_ nq=$abc$109383$new_n57377_
 .subckt nand2_x0 i0=$abc$109383$new_n57377_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57378_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[11] nq=$abc$109383$new_n57379_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57379_ q=$abc$109383$new_n57380_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57379_ nq=$abc$109383$new_n57380_
 .subckt nor2_x0 i0=$abc$109383$new_n57380_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57381_
-.subckt a2_x2 i0=$abc$109383$new_n57381_ i1=$abc$109383$new_n57378_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106694
-.subckt a4_x2 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[11] i2=soc.cpu.minerva.payload__pc$32[10] i3=soc.cpu.minerva.payload__pc$32[9] q=$abc$109383$new_n57383_
+.subckt and2_x1 i0=$abc$109383$new_n57381_ i1=$abc$109383$new_n57378_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106694
+.subckt and4_x1 i0=$abc$109383$new_n57320_ i1=soc.cpu.minerva.payload__pc$32[11] i2=soc.cpu.minerva.payload__pc$32[10] i3=soc.cpu.minerva.payload__pc$32[9] q=$abc$109383$new_n57383_
 .subckt nand2_x0 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[12] nq=$abc$109383$new_n57384_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[12] i1=$abc$109383$new_n57383_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57385_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[12] i1=$abc$109383$new_n57383_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57385_
 .subckt nand2_x0 i0=$abc$109383$new_n57385_ i1=$abc$109383$new_n57384_ nq=$abc$109383$new_n57386_
 .subckt buf_x4 i=soc.cpu.minerva.payload__jump$59 q=$abc$109383$new_n57387_
 .subckt buf_x4 i=$abc$109383$new_n57110_ q=$abc$109383$new_n57388_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29608_ q=$abc$109383$new_n57389_
-.subckt nxr2_x1 i0=$abc$109383$new_n57389_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57390_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29608_ q=$abc$109383$new_n57389_
+.subckt nexor2_x0 i0=$abc$109383$new_n57389_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57390_
 .subckt nand3_x0 i0=$abc$109383$new_n57390_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n38874_ nq=$abc$109383$new_n57391_
 .subckt buf_x4 i=$abc$109383$new_n57120_ q=$abc$109383$new_n57392_
-.subckt nxr2_x1 i0=$abc$109383$new_n57389_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57393_
-.subckt oa22_x2 i0=$abc$109383$new_n52025_ i1=$abc$109383$new_n57393_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57394_
-.subckt a2_x2 i0=$abc$109383$new_n57394_ i1=$abc$109383$new_n57391_ q=$abc$109383$new_n57395_
-.subckt nxr2_x1 i0=$abc$109383$new_n57393_ i1=$abc$109383$new_n52025_ nq=$abc$109383$new_n57396_
-.subckt ao22_x2 i0=$abc$109383$new_n57396_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57397_
-.subckt oa22_x2 i0=$abc$109383$new_n57397_ i1=$abc$109383$new_n57395_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57398_
-.subckt ao22_x2 i0=$abc$109383$new_n52025_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57399_
-.subckt nxr2_x1 i0=$abc$109383$new_n52014_ i1=$abc$109383$new_n52021_ nq=$abc$109383$new_n57400_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57400_ i2=$abc$109383$new_n57399_ q=$abc$109383$new_n57401_
-.subckt ao22_x2 i0=$abc$109383$new_n57401_ i1=$abc$109383$new_n57398_ i2=$abc$109383$new_n57386_ q=$abc$109383$new_n57402_
+.subckt nexor2_x0 i0=$abc$109383$new_n57389_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57393_
+.subckt or21nand_x1 i0=$abc$109383$new_n52025_ i1=$abc$109383$new_n57393_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57394_
+.subckt and2_x1 i0=$abc$109383$new_n57394_ i1=$abc$109383$new_n57391_ q=$abc$109383$new_n57395_
+.subckt nexor2_x0 i0=$abc$109383$new_n57393_ i1=$abc$109383$new_n52025_ nq=$abc$109383$new_n57396_
+.subckt and21nor_x1 i0=$abc$109383$new_n57396_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57397_
+.subckt or21nand_x1 i0=$abc$109383$new_n57397_ i1=$abc$109383$new_n57395_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57398_
+.subckt and21nor_x1 i0=$abc$109383$new_n52025_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57399_
+.subckt nexor2_x0 i0=$abc$109383$new_n52014_ i1=$abc$109383$new_n52021_ nq=$abc$109383$new_n57400_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57400_ i2=$abc$109383$new_n57399_ nq=$abc$109383$new_n57401_
+.subckt and21nor_x1 i0=$abc$109383$new_n57401_ i1=$abc$109383$new_n57398_ i2=$abc$109383$new_n57386_ nq=$abc$109383$new_n57402_
 .subckt nand2_x0 i0=$abc$109383$new_n57402_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57403_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[12] nq=$abc$109383$new_n57404_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57404_ q=$abc$109383$new_n57405_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57404_ nq=$abc$109383$new_n57405_
 .subckt nor2_x0 i0=$abc$109383$new_n57405_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57406_
-.subckt a2_x2 i0=$abc$109383$new_n57406_ i1=$abc$109383$new_n57403_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106698
+.subckt and2_x1 i0=$abc$109383$new_n57406_ i1=$abc$109383$new_n57403_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106698
 .subckt nand3_x0 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[13] i2=soc.cpu.minerva.payload__pc$32[12] nq=$abc$109383$new_n57408_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[12] i1=$abc$109383$new_n57383_ i2=soc.cpu.minerva.payload__pc$32[13] q=$abc$109383$new_n57409_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[12] i1=$abc$109383$new_n57383_ i2=soc.cpu.minerva.payload__pc$32[13] nq=$abc$109383$new_n57409_
 .subckt nand3_x0 i0=$abc$109383$new_n57409_ i1=$abc$109383$new_n57408_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57410_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n57411_
-.subckt nxr2_x1 i0=$abc$109383$new_n57411_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57412_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29632_ q=$abc$109383$new_n57411_
+.subckt nexor2_x0 i0=$abc$109383$new_n57411_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57412_
 .subckt nand3_x0 i0=$abc$109383$new_n57412_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n39378_ nq=$abc$109383$new_n57413_
-.subckt nxr2_x1 i0=$abc$109383$new_n57411_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57414_
-.subckt oa22_x2 i0=$abc$109383$new_n52037_ i1=$abc$109383$new_n57414_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57415_
-.subckt a2_x2 i0=$abc$109383$new_n57415_ i1=$abc$109383$new_n57413_ q=$abc$109383$new_n57416_
-.subckt nxr2_x1 i0=$abc$109383$new_n57414_ i1=$abc$109383$new_n52037_ nq=$abc$109383$new_n57417_
-.subckt ao22_x2 i0=$abc$109383$new_n57417_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57418_
-.subckt oa22_x2 i0=$abc$109383$new_n57418_ i1=$abc$109383$new_n57416_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57419_
-.subckt ao22_x2 i0=$abc$109383$new_n52037_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57420_
-.subckt nxr2_x1 i0=$abc$109383$new_n52028_ i1=$abc$109383$new_n52039_ nq=$abc$109383$new_n57421_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57421_ i2=$abc$109383$new_n57420_ q=$abc$109383$new_n57422_
-.subckt ao22_x2 i0=$abc$109383$new_n57422_ i1=$abc$109383$new_n57419_ i2=$abc$109383$new_n57410_ q=$abc$109383$new_n57423_
+.subckt nexor2_x0 i0=$abc$109383$new_n57411_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57414_
+.subckt or21nand_x1 i0=$abc$109383$new_n52037_ i1=$abc$109383$new_n57414_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57415_
+.subckt and2_x1 i0=$abc$109383$new_n57415_ i1=$abc$109383$new_n57413_ q=$abc$109383$new_n57416_
+.subckt nexor2_x0 i0=$abc$109383$new_n57414_ i1=$abc$109383$new_n52037_ nq=$abc$109383$new_n57417_
+.subckt and21nor_x1 i0=$abc$109383$new_n57417_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57418_
+.subckt or21nand_x1 i0=$abc$109383$new_n57418_ i1=$abc$109383$new_n57416_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57419_
+.subckt and21nor_x1 i0=$abc$109383$new_n52037_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57420_
+.subckt nexor2_x0 i0=$abc$109383$new_n52028_ i1=$abc$109383$new_n52039_ nq=$abc$109383$new_n57421_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57421_ i2=$abc$109383$new_n57420_ nq=$abc$109383$new_n57422_
+.subckt and21nor_x1 i0=$abc$109383$new_n57422_ i1=$abc$109383$new_n57419_ i2=$abc$109383$new_n57410_ nq=$abc$109383$new_n57423_
 .subckt nand2_x0 i0=$abc$109383$new_n57423_ i1=$abc$109383$new_n56421_ nq=$abc$109383$new_n57424_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[13] nq=$abc$109383$new_n57425_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57425_ q=$abc$109383$new_n57426_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57425_ nq=$abc$109383$new_n57426_
 .subckt nor2_x0 i0=$abc$109383$new_n57426_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57427_
-.subckt a2_x2 i0=$abc$109383$new_n57427_ i1=$abc$109383$new_n57424_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106702
+.subckt and2_x1 i0=$abc$109383$new_n57427_ i1=$abc$109383$new_n57424_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106702
 .subckt buf_x4 i=$abc$109383$new_n35098_ q=$abc$109383$new_n57429_
 .subckt nand4_x0 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[14] i2=soc.cpu.minerva.payload__pc$32[13] i3=soc.cpu.minerva.payload__pc$32[12] nq=$abc$109383$new_n57430_
-.subckt a3_x2 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[13] i2=soc.cpu.minerva.payload__pc$32[12] q=$abc$109383$new_n57431_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[14] i1=$abc$109383$new_n57431_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57432_
+.subckt and3_x1 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[13] i2=soc.cpu.minerva.payload__pc$32[12] q=$abc$109383$new_n57431_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[14] i1=$abc$109383$new_n57431_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57432_
 .subckt nand2_x0 i0=$abc$109383$new_n57432_ i1=$abc$109383$new_n57430_ nq=$abc$109383$new_n57433_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29655_ q=$abc$109383$new_n57434_
-.subckt nxr2_x1 i0=$abc$109383$new_n57434_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57435_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29655_ q=$abc$109383$new_n57434_
+.subckt nexor2_x0 i0=$abc$109383$new_n57434_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57435_
 .subckt nand3_x0 i0=$abc$109383$new_n57435_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n39379_ nq=$abc$109383$new_n57436_
-.subckt nxr2_x1 i0=$abc$109383$new_n57434_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57437_
-.subckt oa22_x2 i0=$abc$109383$new_n52054_ i1=$abc$109383$new_n57437_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57438_
-.subckt a2_x2 i0=$abc$109383$new_n57438_ i1=$abc$109383$new_n57436_ q=$abc$109383$new_n57439_
-.subckt nxr2_x1 i0=$abc$109383$new_n57437_ i1=$abc$109383$new_n52054_ nq=$abc$109383$new_n57440_
-.subckt ao22_x2 i0=$abc$109383$new_n57440_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57441_
-.subckt oa22_x2 i0=$abc$109383$new_n57441_ i1=$abc$109383$new_n57439_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57442_
-.subckt ao22_x2 i0=$abc$109383$new_n52054_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57443_
-.subckt nxr2_x1 i0=$abc$109383$new_n52046_ i1=$abc$109383$new_n52068_ nq=$abc$109383$new_n57444_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57444_ i2=$abc$109383$new_n57443_ q=$abc$109383$new_n57445_
-.subckt ao22_x2 i0=$abc$109383$new_n57445_ i1=$abc$109383$new_n57442_ i2=$abc$109383$new_n57433_ q=$abc$109383$new_n57446_
+.subckt nexor2_x0 i0=$abc$109383$new_n57434_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57437_
+.subckt or21nand_x1 i0=$abc$109383$new_n52054_ i1=$abc$109383$new_n57437_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57438_
+.subckt and2_x1 i0=$abc$109383$new_n57438_ i1=$abc$109383$new_n57436_ q=$abc$109383$new_n57439_
+.subckt nexor2_x0 i0=$abc$109383$new_n57437_ i1=$abc$109383$new_n52054_ nq=$abc$109383$new_n57440_
+.subckt and21nor_x1 i0=$abc$109383$new_n57440_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57441_
+.subckt or21nand_x1 i0=$abc$109383$new_n57441_ i1=$abc$109383$new_n57439_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57442_
+.subckt and21nor_x1 i0=$abc$109383$new_n52054_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57443_
+.subckt nexor2_x0 i0=$abc$109383$new_n52046_ i1=$abc$109383$new_n52068_ nq=$abc$109383$new_n57444_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57444_ i2=$abc$109383$new_n57443_ nq=$abc$109383$new_n57445_
+.subckt and21nor_x1 i0=$abc$109383$new_n57445_ i1=$abc$109383$new_n57442_ i2=$abc$109383$new_n57433_ nq=$abc$109383$new_n57446_
 .subckt nand2_x0 i0=$abc$109383$new_n57446_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57447_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[14] nq=$abc$109383$new_n57448_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57448_ q=$abc$109383$new_n57449_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57448_ nq=$abc$109383$new_n57449_
 .subckt nor2_x0 i0=$abc$109383$new_n57449_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57450_
-.subckt a2_x2 i0=$abc$109383$new_n57450_ i1=$abc$109383$new_n57447_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106706
-.subckt a4_x2 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[14] i2=soc.cpu.minerva.payload__pc$32[13] i3=soc.cpu.minerva.payload__pc$32[12] q=$abc$109383$new_n57452_
+.subckt and2_x1 i0=$abc$109383$new_n57450_ i1=$abc$109383$new_n57447_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106706
+.subckt and4_x1 i0=$abc$109383$new_n57383_ i1=soc.cpu.minerva.payload__pc$32[14] i2=soc.cpu.minerva.payload__pc$32[13] i3=soc.cpu.minerva.payload__pc$32[12] q=$abc$109383$new_n57452_
 .subckt nand2_x0 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[15] nq=$abc$109383$new_n57453_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[15] i1=$abc$109383$new_n57452_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57454_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[15] i1=$abc$109383$new_n57452_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57454_
 .subckt nand2_x0 i0=$abc$109383$new_n57454_ i1=$abc$109383$new_n57453_ nq=$abc$109383$new_n57455_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n57456_
-.subckt nxr2_x1 i0=$abc$109383$new_n57456_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57457_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n57456_
+.subckt nexor2_x0 i0=$abc$109383$new_n57456_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57457_
 .subckt nand3_x0 i0=$abc$109383$new_n57457_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n39957_ nq=$abc$109383$new_n57458_
-.subckt nxr2_x1 i0=$abc$109383$new_n57456_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57459_
-.subckt oa22_x2 i0=$abc$109383$new_n52074_ i1=$abc$109383$new_n57459_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57460_
-.subckt a2_x2 i0=$abc$109383$new_n57460_ i1=$abc$109383$new_n57458_ q=$abc$109383$new_n57461_
-.subckt nxr2_x1 i0=$abc$109383$new_n57459_ i1=$abc$109383$new_n52074_ nq=$abc$109383$new_n57462_
-.subckt ao22_x2 i0=$abc$109383$new_n57462_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57463_
-.subckt oa22_x2 i0=$abc$109383$new_n57463_ i1=$abc$109383$new_n57461_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57464_
+.subckt nexor2_x0 i0=$abc$109383$new_n57456_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57459_
+.subckt or21nand_x1 i0=$abc$109383$new_n52074_ i1=$abc$109383$new_n57459_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57460_
+.subckt and2_x1 i0=$abc$109383$new_n57460_ i1=$abc$109383$new_n57458_ q=$abc$109383$new_n57461_
+.subckt nexor2_x0 i0=$abc$109383$new_n57459_ i1=$abc$109383$new_n52074_ nq=$abc$109383$new_n57462_
+.subckt and21nor_x1 i0=$abc$109383$new_n57462_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57463_
+.subckt or21nand_x1 i0=$abc$109383$new_n57463_ i1=$abc$109383$new_n57461_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57464_
 .subckt buf_x4 i=$abc$109383$new_n57104_ q=$abc$109383$new_n57465_
-.subckt ao22_x2 i0=$abc$109383$new_n52074_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57466_
-.subckt xr2_x1 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n57467_
-.subckt nxr2_x1 i0=$abc$109383$new_n52059_ i1=$abc$109383$new_n57467_ nq=$abc$109383$new_n57468_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57468_ i2=$abc$109383$new_n57466_ q=$abc$109383$new_n57469_
-.subckt ao22_x2 i0=$abc$109383$new_n57469_ i1=$abc$109383$new_n57464_ i2=$abc$109383$new_n57455_ q=$abc$109383$new_n57470_
+.subckt and21nor_x1 i0=$abc$109383$new_n52074_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57466_
+.subckt xor2_x0 i0=$abc$109383$new_n39957_ i1=$abc$109383$new_n29676_ q=$abc$109383$new_n57467_
+.subckt nexor2_x0 i0=$abc$109383$new_n52059_ i1=$abc$109383$new_n57467_ nq=$abc$109383$new_n57468_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57468_ i2=$abc$109383$new_n57466_ nq=$abc$109383$new_n57469_
+.subckt and21nor_x1 i0=$abc$109383$new_n57469_ i1=$abc$109383$new_n57464_ i2=$abc$109383$new_n57455_ nq=$abc$109383$new_n57470_
 .subckt nand2_x0 i0=$abc$109383$new_n57470_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57471_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[15] nq=$abc$109383$new_n57472_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57472_ q=$abc$109383$new_n57473_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57472_ nq=$abc$109383$new_n57473_
 .subckt nor2_x0 i0=$abc$109383$new_n57473_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57474_
-.subckt a2_x2 i0=$abc$109383$new_n57474_ i1=$abc$109383$new_n57471_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106710
+.subckt and2_x1 i0=$abc$109383$new_n57474_ i1=$abc$109383$new_n57471_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106710
 .subckt nand3_x0 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[16] i2=soc.cpu.minerva.payload__pc$32[15] nq=$abc$109383$new_n57476_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[15] i1=$abc$109383$new_n57452_ i2=soc.cpu.minerva.payload__pc$32[16] q=$abc$109383$new_n57477_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[15] i1=$abc$109383$new_n57452_ i2=soc.cpu.minerva.payload__pc$32[16] nq=$abc$109383$new_n57477_
 .subckt nand3_x0 i0=$abc$109383$new_n57477_ i1=$abc$109383$new_n57476_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57478_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29688_ q=$abc$109383$new_n57479_
-.subckt nxr2_x1 i0=$abc$109383$new_n57479_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57480_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29688_ q=$abc$109383$new_n57479_
+.subckt nexor2_x0 i0=$abc$109383$new_n57479_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57480_
 .subckt nand3_x0 i0=$abc$109383$new_n57480_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n40201_ nq=$abc$109383$new_n57481_
-.subckt nxr2_x1 i0=$abc$109383$new_n57479_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57482_
-.subckt oa22_x2 i0=$abc$109383$new_n52094_ i1=$abc$109383$new_n57482_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57483_
-.subckt a2_x2 i0=$abc$109383$new_n57483_ i1=$abc$109383$new_n57481_ q=$abc$109383$new_n57484_
+.subckt nexor2_x0 i0=$abc$109383$new_n57479_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57482_
+.subckt or21nand_x1 i0=$abc$109383$new_n52094_ i1=$abc$109383$new_n57482_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57483_
+.subckt and2_x1 i0=$abc$109383$new_n57483_ i1=$abc$109383$new_n57481_ q=$abc$109383$new_n57484_
 .subckt buf_x4 i=$abc$109383$new_n57072_ q=$abc$109383$new_n57485_
-.subckt nxr2_x1 i0=$abc$109383$new_n57482_ i1=$abc$109383$new_n52094_ nq=$abc$109383$new_n57486_
-.subckt ao22_x2 i0=$abc$109383$new_n57486_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57487_
-.subckt oa22_x2 i0=$abc$109383$new_n57487_ i1=$abc$109383$new_n57484_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57488_
-.subckt ao22_x2 i0=$abc$109383$new_n52094_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57489_
-.subckt nxr2_x1 i0=$abc$109383$new_n52079_ i1=$abc$109383$new_n52090_ nq=$abc$109383$new_n57490_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57490_ i2=$abc$109383$new_n57489_ q=$abc$109383$new_n57491_
-.subckt ao22_x2 i0=$abc$109383$new_n57491_ i1=$abc$109383$new_n57488_ i2=$abc$109383$new_n57478_ q=$abc$109383$new_n57492_
+.subckt nexor2_x0 i0=$abc$109383$new_n57482_ i1=$abc$109383$new_n52094_ nq=$abc$109383$new_n57486_
+.subckt and21nor_x1 i0=$abc$109383$new_n57486_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57487_
+.subckt or21nand_x1 i0=$abc$109383$new_n57487_ i1=$abc$109383$new_n57484_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57488_
+.subckt and21nor_x1 i0=$abc$109383$new_n52094_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57489_
+.subckt nexor2_x0 i0=$abc$109383$new_n52079_ i1=$abc$109383$new_n52090_ nq=$abc$109383$new_n57490_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57490_ i2=$abc$109383$new_n57489_ nq=$abc$109383$new_n57491_
+.subckt and21nor_x1 i0=$abc$109383$new_n57491_ i1=$abc$109383$new_n57488_ i2=$abc$109383$new_n57478_ nq=$abc$109383$new_n57492_
 .subckt nand2_x0 i0=$abc$109383$new_n57492_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57493_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[16] nq=$abc$109383$new_n57494_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57494_ q=$abc$109383$new_n57495_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57494_ nq=$abc$109383$new_n57495_
 .subckt nor2_x0 i0=$abc$109383$new_n57495_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57496_
-.subckt a2_x2 i0=$abc$109383$new_n57496_ i1=$abc$109383$new_n57493_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106714
+.subckt and2_x1 i0=$abc$109383$new_n57496_ i1=$abc$109383$new_n57493_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106714
 .subckt nand4_x0 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[17] i2=soc.cpu.minerva.payload__pc$32[16] i3=soc.cpu.minerva.payload__pc$32[15] nq=$abc$109383$new_n57498_
-.subckt a3_x2 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[16] i2=soc.cpu.minerva.payload__pc$32[15] q=$abc$109383$new_n57499_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[17] i1=$abc$109383$new_n57499_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57500_
+.subckt and3_x1 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[16] i2=soc.cpu.minerva.payload__pc$32[15] q=$abc$109383$new_n57499_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[17] i1=$abc$109383$new_n57499_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57500_
 .subckt nand2_x0 i0=$abc$109383$new_n57500_ i1=$abc$109383$new_n57498_ nq=$abc$109383$new_n57501_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n57502_
-.subckt nxr2_x1 i0=$abc$109383$new_n57502_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57503_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n57502_
+.subckt nexor2_x0 i0=$abc$109383$new_n57502_ i1=$abc$109383$new_n57388_ nq=$abc$109383$new_n57503_
 .subckt nand3_x0 i0=$abc$109383$new_n57503_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n40442_ nq=$abc$109383$new_n57504_
-.subckt nxr2_x1 i0=$abc$109383$new_n57502_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57505_
-.subckt oa22_x2 i0=$abc$109383$new_n40464_ i1=$abc$109383$new_n57505_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57506_
-.subckt a2_x2 i0=$abc$109383$new_n57506_ i1=$abc$109383$new_n57504_ q=$abc$109383$new_n57507_
-.subckt nxr2_x1 i0=$abc$109383$new_n57505_ i1=$abc$109383$new_n40464_ nq=$abc$109383$new_n57508_
-.subckt ao22_x2 i0=$abc$109383$new_n57508_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57509_
-.subckt oa22_x2 i0=$abc$109383$new_n57509_ i1=$abc$109383$new_n57507_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57510_
-.subckt ao22_x2 i0=$abc$109383$new_n40464_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57511_
-.subckt xr2_x1 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n57512_
-.subckt nxr2_x1 i0=$abc$109383$new_n52097_ i1=$abc$109383$new_n57512_ nq=$abc$109383$new_n57513_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57513_ i2=$abc$109383$new_n57511_ q=$abc$109383$new_n57514_
-.subckt ao22_x2 i0=$abc$109383$new_n57514_ i1=$abc$109383$new_n57510_ i2=$abc$109383$new_n57501_ q=$abc$109383$new_n57515_
+.subckt nexor2_x0 i0=$abc$109383$new_n57502_ i1=$abc$109383$new_n57392_ nq=$abc$109383$new_n57505_
+.subckt or21nand_x1 i0=$abc$109383$new_n40464_ i1=$abc$109383$new_n57505_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57506_
+.subckt and2_x1 i0=$abc$109383$new_n57506_ i1=$abc$109383$new_n57504_ q=$abc$109383$new_n57507_
+.subckt nexor2_x0 i0=$abc$109383$new_n57505_ i1=$abc$109383$new_n40464_ nq=$abc$109383$new_n57508_
+.subckt and21nor_x1 i0=$abc$109383$new_n57508_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57509_
+.subckt or21nand_x1 i0=$abc$109383$new_n57509_ i1=$abc$109383$new_n57507_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57510_
+.subckt and21nor_x1 i0=$abc$109383$new_n40464_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57511_
+.subckt xor2_x0 i0=$abc$109383$new_n40442_ i1=$abc$109383$new_n29664_ q=$abc$109383$new_n57512_
+.subckt nexor2_x0 i0=$abc$109383$new_n52097_ i1=$abc$109383$new_n57512_ nq=$abc$109383$new_n57513_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57513_ i2=$abc$109383$new_n57511_ nq=$abc$109383$new_n57514_
+.subckt and21nor_x1 i0=$abc$109383$new_n57514_ i1=$abc$109383$new_n57510_ i2=$abc$109383$new_n57501_ nq=$abc$109383$new_n57515_
 .subckt nand2_x0 i0=$abc$109383$new_n57515_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57516_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[17] nq=$abc$109383$new_n57517_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57517_ q=$abc$109383$new_n57518_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57517_ nq=$abc$109383$new_n57518_
 .subckt nor2_x0 i0=$abc$109383$new_n57518_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57519_
-.subckt a2_x2 i0=$abc$109383$new_n57519_ i1=$abc$109383$new_n57516_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106718
-.subckt a4_x2 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[17] i2=soc.cpu.minerva.payload__pc$32[16] i3=soc.cpu.minerva.payload__pc$32[15] q=$abc$109383$new_n57521_
+.subckt and2_x1 i0=$abc$109383$new_n57519_ i1=$abc$109383$new_n57516_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106718
+.subckt and4_x1 i0=$abc$109383$new_n57452_ i1=soc.cpu.minerva.payload__pc$32[17] i2=soc.cpu.minerva.payload__pc$32[16] i3=soc.cpu.minerva.payload__pc$32[15] q=$abc$109383$new_n57521_
 .subckt nand2_x0 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[18] nq=$abc$109383$new_n57522_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[18] i1=$abc$109383$new_n57521_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57523_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[18] i1=$abc$109383$new_n57521_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57523_
 .subckt nand2_x0 i0=$abc$109383$new_n57523_ i1=$abc$109383$new_n57522_ nq=$abc$109383$new_n57524_
 .subckt buf_x4 i=$abc$109383$new_n57110_ q=$abc$109383$new_n57525_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n57526_
-.subckt nxr2_x1 i0=$abc$109383$new_n57526_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57527_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29643_ q=$abc$109383$new_n57526_
+.subckt nexor2_x0 i0=$abc$109383$new_n57526_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57527_
 .subckt nand3_x0 i0=$abc$109383$new_n57527_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n40910_ nq=$abc$109383$new_n57528_
 .subckt buf_x4 i=$abc$109383$new_n57120_ q=$abc$109383$new_n57529_
-.subckt nxr2_x1 i0=$abc$109383$new_n57526_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57530_
-.subckt oa22_x2 i0=$abc$109383$new_n52115_ i1=$abc$109383$new_n57530_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57531_
-.subckt a2_x2 i0=$abc$109383$new_n57531_ i1=$abc$109383$new_n57528_ q=$abc$109383$new_n57532_
-.subckt nxr2_x1 i0=$abc$109383$new_n57530_ i1=$abc$109383$new_n52115_ nq=$abc$109383$new_n57533_
-.subckt ao22_x2 i0=$abc$109383$new_n57533_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57534_
-.subckt oa22_x2 i0=$abc$109383$new_n57534_ i1=$abc$109383$new_n57532_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57535_
-.subckt ao22_x2 i0=$abc$109383$new_n52115_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ q=$abc$109383$new_n57536_
-.subckt nxr2_x1 i0=$abc$109383$new_n52110_ i1=$abc$109383$new_n52117_ nq=$abc$109383$new_n57537_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57537_ i2=$abc$109383$new_n57536_ q=$abc$109383$new_n57538_
-.subckt ao22_x2 i0=$abc$109383$new_n57538_ i1=$abc$109383$new_n57535_ i2=$abc$109383$new_n57524_ q=$abc$109383$new_n57539_
+.subckt nexor2_x0 i0=$abc$109383$new_n57526_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57530_
+.subckt or21nand_x1 i0=$abc$109383$new_n52115_ i1=$abc$109383$new_n57530_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57531_
+.subckt and2_x1 i0=$abc$109383$new_n57531_ i1=$abc$109383$new_n57528_ q=$abc$109383$new_n57532_
+.subckt nexor2_x0 i0=$abc$109383$new_n57530_ i1=$abc$109383$new_n52115_ nq=$abc$109383$new_n57533_
+.subckt and21nor_x1 i0=$abc$109383$new_n57533_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57534_
+.subckt or21nand_x1 i0=$abc$109383$new_n57534_ i1=$abc$109383$new_n57532_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57535_
+.subckt and21nor_x1 i0=$abc$109383$new_n52115_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57279_ nq=$abc$109383$new_n57536_
+.subckt nexor2_x0 i0=$abc$109383$new_n52110_ i1=$abc$109383$new_n52117_ nq=$abc$109383$new_n57537_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57537_ i2=$abc$109383$new_n57536_ nq=$abc$109383$new_n57538_
+.subckt and21nor_x1 i0=$abc$109383$new_n57538_ i1=$abc$109383$new_n57535_ i2=$abc$109383$new_n57524_ nq=$abc$109383$new_n57539_
 .subckt nand2_x0 i0=$abc$109383$new_n57539_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57540_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[18] nq=$abc$109383$new_n57541_
-.subckt ao22_x2 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57541_ q=$abc$109383$new_n57542_
+.subckt and21nor_x1 i0=$abc$109383$new_n57313_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57541_ nq=$abc$109383$new_n57542_
 .subckt nor2_x0 i0=$abc$109383$new_n57542_ i1=$abc$109383$new_n57311_ nq=$abc$109383$new_n57543_
-.subckt a2_x2 i0=$abc$109383$new_n57543_ i1=$abc$109383$new_n57540_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106722
+.subckt and2_x1 i0=$abc$109383$new_n57543_ i1=$abc$109383$new_n57540_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106722
 .subckt nand3_x0 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[19] i2=soc.cpu.minerva.payload__pc$32[18] nq=$abc$109383$new_n57545_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[18] i1=$abc$109383$new_n57521_ i2=soc.cpu.minerva.payload__pc$32[19] q=$abc$109383$new_n57546_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[18] i1=$abc$109383$new_n57521_ i2=soc.cpu.minerva.payload__pc$32[19] nq=$abc$109383$new_n57546_
 .subckt nand3_x0 i0=$abc$109383$new_n57546_ i1=$abc$109383$new_n57545_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57547_
-.subckt a2_x2 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29620_ q=$abc$109383$new_n57548_
-.subckt nxr2_x1 i0=$abc$109383$new_n57548_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57549_
+.subckt and2_x1 i0=$abc$109383$new_n57294_ i1=$abc$109383$new_n29620_ q=$abc$109383$new_n57548_
+.subckt nexor2_x0 i0=$abc$109383$new_n57548_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57549_
 .subckt nand3_x0 i0=$abc$109383$new_n57549_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n41118_ nq=$abc$109383$new_n57550_
-.subckt nxr2_x1 i0=$abc$109383$new_n57548_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57551_
-.subckt oa22_x2 i0=$abc$109383$new_n52130_ i1=$abc$109383$new_n57551_ i2=$abc$109383$new_n57298_ q=$abc$109383$new_n57552_
-.subckt a2_x2 i0=$abc$109383$new_n57552_ i1=$abc$109383$new_n57550_ q=$abc$109383$new_n57553_
-.subckt nxr2_x1 i0=$abc$109383$new_n57551_ i1=$abc$109383$new_n52130_ nq=$abc$109383$new_n57554_
-.subckt ao22_x2 i0=$abc$109383$new_n57554_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57555_
-.subckt oa22_x2 i0=$abc$109383$new_n57555_ i1=$abc$109383$new_n57553_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57556_
-.subckt ao22_x2 i0=$abc$109383$new_n52130_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57557_
-.subckt nxr2_x1 i0=$abc$109383$new_n52124_ i1=$abc$109383$new_n52137_ nq=$abc$109383$new_n57558_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57558_ i2=$abc$109383$new_n57557_ q=$abc$109383$new_n57559_
-.subckt ao22_x2 i0=$abc$109383$new_n57559_ i1=$abc$109383$new_n57556_ i2=$abc$109383$new_n57547_ q=$abc$109383$new_n57560_
+.subckt nexor2_x0 i0=$abc$109383$new_n57548_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57551_
+.subckt or21nand_x1 i0=$abc$109383$new_n52130_ i1=$abc$109383$new_n57551_ i2=$abc$109383$new_n57298_ nq=$abc$109383$new_n57552_
+.subckt and2_x1 i0=$abc$109383$new_n57552_ i1=$abc$109383$new_n57550_ q=$abc$109383$new_n57553_
+.subckt nexor2_x0 i0=$abc$109383$new_n57551_ i1=$abc$109383$new_n52130_ nq=$abc$109383$new_n57554_
+.subckt and21nor_x1 i0=$abc$109383$new_n57554_ i1=$abc$109383$new_n57302_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57555_
+.subckt or21nand_x1 i0=$abc$109383$new_n57555_ i1=$abc$109383$new_n57553_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57556_
+.subckt and21nor_x1 i0=$abc$109383$new_n52130_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57557_
+.subckt nexor2_x0 i0=$abc$109383$new_n52124_ i1=$abc$109383$new_n52137_ nq=$abc$109383$new_n57558_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57558_ i2=$abc$109383$new_n57557_ nq=$abc$109383$new_n57559_
+.subckt and21nor_x1 i0=$abc$109383$new_n57559_ i1=$abc$109383$new_n57556_ i2=$abc$109383$new_n57547_ nq=$abc$109383$new_n57560_
 .subckt nand2_x0 i0=$abc$109383$new_n57560_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57561_
 .subckt buf_x4 i=$abc$109383$new_n15124_ q=$abc$109383$new_n57562_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[19] nq=$abc$109383$new_n57563_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n57564_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57563_ q=$abc$109383$new_n57565_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57356_ i2=$abc$109383$new_n57563_ nq=$abc$109383$new_n57565_
 .subckt nor2_x0 i0=$abc$109383$new_n57565_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57566_
-.subckt a2_x2 i0=$abc$109383$new_n57566_ i1=$abc$109383$new_n57561_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106726
+.subckt and2_x1 i0=$abc$109383$new_n57566_ i1=$abc$109383$new_n57561_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106726
 .subckt nand4_x0 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[20] i2=soc.cpu.minerva.payload__pc$32[19] i3=soc.cpu.minerva.payload__pc$32[18] nq=$abc$109383$new_n57568_
-.subckt a3_x2 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[19] i2=soc.cpu.minerva.payload__pc$32[18] q=$abc$109383$new_n57569_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[20] i1=$abc$109383$new_n57569_ i2=$abc$109383$new_n57265_ q=$abc$109383$new_n57570_
+.subckt and3_x1 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[19] i2=soc.cpu.minerva.payload__pc$32[18] q=$abc$109383$new_n57569_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[20] i1=$abc$109383$new_n57569_ i2=$abc$109383$new_n57265_ nq=$abc$109383$new_n57570_
 .subckt nand2_x0 i0=$abc$109383$new_n57570_ i1=$abc$109383$new_n57568_ nq=$abc$109383$new_n57571_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29594_ q=$abc$109383$new_n57572_
-.subckt nxr2_x1 i0=$abc$109383$new_n57572_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57573_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29594_ q=$abc$109383$new_n57572_
+.subckt nexor2_x0 i0=$abc$109383$new_n57572_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57573_
 .subckt nand3_x0 i0=$abc$109383$new_n57573_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n41119_ nq=$abc$109383$new_n57574_
-.subckt nxr2_x1 i0=$abc$109383$new_n57572_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57575_
-.subckt oa22_x2 i0=$abc$109383$new_n52145_ i1=$abc$109383$new_n57575_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57576_
-.subckt a2_x2 i0=$abc$109383$new_n57576_ i1=$abc$109383$new_n57574_ q=$abc$109383$new_n57577_
-.subckt nxr2_x1 i0=$abc$109383$new_n57575_ i1=$abc$109383$new_n52145_ nq=$abc$109383$new_n57578_
-.subckt ao22_x2 i0=$abc$109383$new_n57578_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57579_
-.subckt oa22_x2 i0=$abc$109383$new_n57579_ i1=$abc$109383$new_n57577_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57580_
-.subckt ao22_x2 i0=$abc$109383$new_n52145_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57581_
-.subckt nxr2_x1 i0=$abc$109383$new_n52140_ i1=$abc$109383$new_n52147_ nq=$abc$109383$new_n57582_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57582_ i2=$abc$109383$new_n57581_ q=$abc$109383$new_n57583_
-.subckt ao22_x2 i0=$abc$109383$new_n57583_ i1=$abc$109383$new_n57580_ i2=$abc$109383$new_n57571_ q=$abc$109383$new_n57584_
+.subckt nexor2_x0 i0=$abc$109383$new_n57572_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57575_
+.subckt or21nand_x1 i0=$abc$109383$new_n52145_ i1=$abc$109383$new_n57575_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57576_
+.subckt and2_x1 i0=$abc$109383$new_n57576_ i1=$abc$109383$new_n57574_ q=$abc$109383$new_n57577_
+.subckt nexor2_x0 i0=$abc$109383$new_n57575_ i1=$abc$109383$new_n52145_ nq=$abc$109383$new_n57578_
+.subckt and21nor_x1 i0=$abc$109383$new_n57578_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57579_
+.subckt or21nand_x1 i0=$abc$109383$new_n57579_ i1=$abc$109383$new_n57577_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57580_
+.subckt and21nor_x1 i0=$abc$109383$new_n52145_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57581_
+.subckt nexor2_x0 i0=$abc$109383$new_n52140_ i1=$abc$109383$new_n52147_ nq=$abc$109383$new_n57582_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57582_ i2=$abc$109383$new_n57581_ nq=$abc$109383$new_n57583_
+.subckt and21nor_x1 i0=$abc$109383$new_n57583_ i1=$abc$109383$new_n57580_ i2=$abc$109383$new_n57571_ nq=$abc$109383$new_n57584_
 .subckt nand2_x0 i0=$abc$109383$new_n57584_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57585_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[20] nq=$abc$109383$new_n57586_
 .subckt buf_x4 i=$abc$109383$new_n29215_ q=$abc$109383$new_n57587_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57586_ q=$abc$109383$new_n57588_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57586_ nq=$abc$109383$new_n57588_
 .subckt nor2_x0 i0=$abc$109383$new_n57588_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57589_
-.subckt a2_x2 i0=$abc$109383$new_n57589_ i1=$abc$109383$new_n57585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106730
-.subckt a4_x2 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[20] i2=soc.cpu.minerva.payload__pc$32[19] i3=soc.cpu.minerva.payload__pc$32[18] q=$abc$109383$new_n57591_
+.subckt and2_x1 i0=$abc$109383$new_n57589_ i1=$abc$109383$new_n57585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106730
+.subckt and4_x1 i0=$abc$109383$new_n57521_ i1=soc.cpu.minerva.payload__pc$32[20] i2=soc.cpu.minerva.payload__pc$32[19] i3=soc.cpu.minerva.payload__pc$32[18] q=$abc$109383$new_n57591_
 .subckt nand2_x0 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[21] nq=$abc$109383$new_n57592_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[21] i1=$abc$109383$new_n57591_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57593_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[21] i1=$abc$109383$new_n57591_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57593_
 .subckt nand2_x0 i0=$abc$109383$new_n57593_ i1=$abc$109383$new_n57592_ nq=$abc$109383$new_n57594_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29570_ q=$abc$109383$new_n57595_
-.subckt nxr2_x1 i0=$abc$109383$new_n57595_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57596_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29570_ q=$abc$109383$new_n57595_
+.subckt nexor2_x0 i0=$abc$109383$new_n57595_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57596_
 .subckt nand3_x0 i0=$abc$109383$new_n57596_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n41737_ nq=$abc$109383$new_n57597_
-.subckt nxr2_x1 i0=$abc$109383$new_n57595_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57598_
-.subckt oa22_x2 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n57598_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57599_
-.subckt a2_x2 i0=$abc$109383$new_n57599_ i1=$abc$109383$new_n57597_ q=$abc$109383$new_n57600_
-.subckt nxr2_x1 i0=$abc$109383$new_n57598_ i1=$abc$109383$new_n41945_ nq=$abc$109383$new_n57601_
-.subckt ao22_x2 i0=$abc$109383$new_n57601_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57602_
-.subckt oa22_x2 i0=$abc$109383$new_n57602_ i1=$abc$109383$new_n57600_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57603_
-.subckt ao22_x2 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57604_
-.subckt nxr2_x1 i0=$abc$109383$new_n52153_ i1=$abc$109383$new_n52166_ nq=$abc$109383$new_n57605_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57605_ i2=$abc$109383$new_n57604_ q=$abc$109383$new_n57606_
-.subckt ao22_x2 i0=$abc$109383$new_n57606_ i1=$abc$109383$new_n57603_ i2=$abc$109383$new_n57594_ q=$abc$109383$new_n57607_
+.subckt nexor2_x0 i0=$abc$109383$new_n57595_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57598_
+.subckt or21nand_x1 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n57598_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57599_
+.subckt and2_x1 i0=$abc$109383$new_n57599_ i1=$abc$109383$new_n57597_ q=$abc$109383$new_n57600_
+.subckt nexor2_x0 i0=$abc$109383$new_n57598_ i1=$abc$109383$new_n41945_ nq=$abc$109383$new_n57601_
+.subckt and21nor_x1 i0=$abc$109383$new_n57601_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57602_
+.subckt or21nand_x1 i0=$abc$109383$new_n57602_ i1=$abc$109383$new_n57600_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57603_
+.subckt and21nor_x1 i0=$abc$109383$new_n41945_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57604_
+.subckt nexor2_x0 i0=$abc$109383$new_n52153_ i1=$abc$109383$new_n52166_ nq=$abc$109383$new_n57605_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57605_ i2=$abc$109383$new_n57604_ nq=$abc$109383$new_n57606_
+.subckt and21nor_x1 i0=$abc$109383$new_n57606_ i1=$abc$109383$new_n57603_ i2=$abc$109383$new_n57594_ nq=$abc$109383$new_n57607_
 .subckt nand2_x0 i0=$abc$109383$new_n57607_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57608_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[21] nq=$abc$109383$new_n57609_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57609_ q=$abc$109383$new_n57610_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57609_ nq=$abc$109383$new_n57610_
 .subckt nor2_x0 i0=$abc$109383$new_n57610_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57611_
-.subckt a2_x2 i0=$abc$109383$new_n57611_ i1=$abc$109383$new_n57608_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106734
+.subckt and2_x1 i0=$abc$109383$new_n57611_ i1=$abc$109383$new_n57608_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106734
 .subckt nand3_x0 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[22] i2=soc.cpu.minerva.payload__pc$32[21] nq=$abc$109383$new_n57613_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[21] i1=$abc$109383$new_n57591_ i2=soc.cpu.minerva.payload__pc$32[22] q=$abc$109383$new_n57614_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[21] i1=$abc$109383$new_n57591_ i2=soc.cpu.minerva.payload__pc$32[22] nq=$abc$109383$new_n57614_
 .subckt nand3_x0 i0=$abc$109383$new_n57614_ i1=$abc$109383$new_n57613_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n57615_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29544_ q=$abc$109383$new_n57616_
-.subckt nxr2_x1 i0=$abc$109383$new_n57616_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57617_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29544_ q=$abc$109383$new_n57616_
+.subckt nexor2_x0 i0=$abc$109383$new_n57616_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57617_
 .subckt nand3_x0 i0=$abc$109383$new_n57617_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n52157_ nq=$abc$109383$new_n57618_
-.subckt nxr2_x1 i0=$abc$109383$new_n57616_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57619_
-.subckt oa22_x2 i0=$abc$109383$new_n52176_ i1=$abc$109383$new_n57619_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57620_
-.subckt a2_x2 i0=$abc$109383$new_n57620_ i1=$abc$109383$new_n57618_ q=$abc$109383$new_n57621_
-.subckt nxr2_x1 i0=$abc$109383$new_n57619_ i1=$abc$109383$new_n52176_ nq=$abc$109383$new_n57622_
-.subckt ao22_x2 i0=$abc$109383$new_n57622_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57623_
-.subckt oa22_x2 i0=$abc$109383$new_n57623_ i1=$abc$109383$new_n57621_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57624_
-.subckt ao22_x2 i0=$abc$109383$new_n52176_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57625_
-.subckt nxr2_x1 i0=$abc$109383$new_n52169_ i1=$abc$109383$new_n52187_ nq=$abc$109383$new_n57626_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57626_ i2=$abc$109383$new_n57625_ q=$abc$109383$new_n57627_
-.subckt ao22_x2 i0=$abc$109383$new_n57627_ i1=$abc$109383$new_n57624_ i2=$abc$109383$new_n57615_ q=$abc$109383$new_n57628_
+.subckt nexor2_x0 i0=$abc$109383$new_n57616_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57619_
+.subckt or21nand_x1 i0=$abc$109383$new_n52176_ i1=$abc$109383$new_n57619_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57620_
+.subckt and2_x1 i0=$abc$109383$new_n57620_ i1=$abc$109383$new_n57618_ q=$abc$109383$new_n57621_
+.subckt nexor2_x0 i0=$abc$109383$new_n57619_ i1=$abc$109383$new_n52176_ nq=$abc$109383$new_n57622_
+.subckt and21nor_x1 i0=$abc$109383$new_n57622_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57623_
+.subckt or21nand_x1 i0=$abc$109383$new_n57623_ i1=$abc$109383$new_n57621_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57624_
+.subckt and21nor_x1 i0=$abc$109383$new_n52176_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57625_
+.subckt nexor2_x0 i0=$abc$109383$new_n52169_ i1=$abc$109383$new_n52187_ nq=$abc$109383$new_n57626_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57626_ i2=$abc$109383$new_n57625_ nq=$abc$109383$new_n57627_
+.subckt and21nor_x1 i0=$abc$109383$new_n57627_ i1=$abc$109383$new_n57624_ i2=$abc$109383$new_n57615_ nq=$abc$109383$new_n57628_
 .subckt nand2_x0 i0=$abc$109383$new_n57628_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57629_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[22] nq=$abc$109383$new_n57630_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57630_ q=$abc$109383$new_n57631_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57630_ nq=$abc$109383$new_n57631_
 .subckt nor2_x0 i0=$abc$109383$new_n57631_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57632_
-.subckt a2_x2 i0=$abc$109383$new_n57632_ i1=$abc$109383$new_n57629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106738
+.subckt and2_x1 i0=$abc$109383$new_n57632_ i1=$abc$109383$new_n57629_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106738
 .subckt nand4_x0 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[23] i2=soc.cpu.minerva.payload__pc$32[22] i3=soc.cpu.minerva.payload__pc$32[21] nq=$abc$109383$new_n57634_
-.subckt a3_x2 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[22] i2=soc.cpu.minerva.payload__pc$32[21] q=$abc$109383$new_n57635_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[23] i1=$abc$109383$new_n57635_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57636_
+.subckt and3_x1 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[22] i2=soc.cpu.minerva.payload__pc$32[21] q=$abc$109383$new_n57635_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[23] i1=$abc$109383$new_n57635_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57636_
 .subckt nand2_x0 i0=$abc$109383$new_n57636_ i1=$abc$109383$new_n57634_ nq=$abc$109383$new_n57637_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29521_ q=$abc$109383$new_n57638_
-.subckt nxr2_x1 i0=$abc$109383$new_n57638_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57639_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29521_ q=$abc$109383$new_n57638_
+.subckt nexor2_x0 i0=$abc$109383$new_n57638_ i1=$abc$109383$new_n57525_ nq=$abc$109383$new_n57639_
 .subckt nand3_x0 i0=$abc$109383$new_n57639_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n41734_ nq=$abc$109383$new_n57640_
-.subckt nxr2_x1 i0=$abc$109383$new_n57638_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57641_
-.subckt oa22_x2 i0=$abc$109383$new_n41767_ i1=$abc$109383$new_n57641_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57642_
-.subckt a2_x2 i0=$abc$109383$new_n57642_ i1=$abc$109383$new_n57640_ q=$abc$109383$new_n57643_
-.subckt nxr2_x1 i0=$abc$109383$new_n57641_ i1=$abc$109383$new_n41767_ nq=$abc$109383$new_n57644_
-.subckt ao22_x2 i0=$abc$109383$new_n57644_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57645_
-.subckt oa22_x2 i0=$abc$109383$new_n57645_ i1=$abc$109383$new_n57643_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57646_
-.subckt ao22_x2 i0=$abc$109383$new_n41767_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57647_
-.subckt nxr2_x1 i0=$abc$109383$new_n52182_ i1=$abc$109383$new_n52205_ nq=$abc$109383$new_n57648_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57648_ i2=$abc$109383$new_n57647_ q=$abc$109383$new_n57649_
-.subckt ao22_x2 i0=$abc$109383$new_n57649_ i1=$abc$109383$new_n57646_ i2=$abc$109383$new_n57637_ q=$abc$109383$new_n57650_
+.subckt nexor2_x0 i0=$abc$109383$new_n57638_ i1=$abc$109383$new_n57529_ nq=$abc$109383$new_n57641_
+.subckt or21nand_x1 i0=$abc$109383$new_n41767_ i1=$abc$109383$new_n57641_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57642_
+.subckt and2_x1 i0=$abc$109383$new_n57642_ i1=$abc$109383$new_n57640_ q=$abc$109383$new_n57643_
+.subckt nexor2_x0 i0=$abc$109383$new_n57641_ i1=$abc$109383$new_n41767_ nq=$abc$109383$new_n57644_
+.subckt and21nor_x1 i0=$abc$109383$new_n57644_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57645_
+.subckt or21nand_x1 i0=$abc$109383$new_n57645_ i1=$abc$109383$new_n57643_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57646_
+.subckt and21nor_x1 i0=$abc$109383$new_n41767_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57647_
+.subckt nexor2_x0 i0=$abc$109383$new_n52182_ i1=$abc$109383$new_n52205_ nq=$abc$109383$new_n57648_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57648_ i2=$abc$109383$new_n57647_ nq=$abc$109383$new_n57649_
+.subckt and21nor_x1 i0=$abc$109383$new_n57649_ i1=$abc$109383$new_n57646_ i2=$abc$109383$new_n57637_ nq=$abc$109383$new_n57650_
 .subckt nand2_x0 i0=$abc$109383$new_n57650_ i1=$abc$109383$new_n57429_ nq=$abc$109383$new_n57651_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[23] nq=$abc$109383$new_n57652_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57652_ q=$abc$109383$new_n57653_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57652_ nq=$abc$109383$new_n57653_
 .subckt nor2_x0 i0=$abc$109383$new_n57653_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57654_
-.subckt a2_x2 i0=$abc$109383$new_n57654_ i1=$abc$109383$new_n57651_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106742
-.subckt a4_x2 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[23] i2=soc.cpu.minerva.payload__pc$32[22] i3=soc.cpu.minerva.payload__pc$32[21] q=$abc$109383$new_n57656_
+.subckt and2_x1 i0=$abc$109383$new_n57654_ i1=$abc$109383$new_n57651_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106742
+.subckt and4_x1 i0=$abc$109383$new_n57591_ i1=soc.cpu.minerva.payload__pc$32[23] i2=soc.cpu.minerva.payload__pc$32[22] i3=soc.cpu.minerva.payload__pc$32[21] q=$abc$109383$new_n57656_
 .subckt nand2_x0 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[24] nq=$abc$109383$new_n57657_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[24] i1=$abc$109383$new_n57656_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57658_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[24] i1=$abc$109383$new_n57656_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57658_
 .subckt nand2_x0 i0=$abc$109383$new_n57658_ i1=$abc$109383$new_n57657_ nq=$abc$109383$new_n57659_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n57660_
-.subckt nxr2_x1 i0=$abc$109383$new_n57660_ i1=$abc$109383$new_n57110_ nq=$abc$109383$new_n57661_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n57660_
+.subckt nexor2_x0 i0=$abc$109383$new_n57660_ i1=$abc$109383$new_n57110_ nq=$abc$109383$new_n57661_
 .subckt nand3_x0 i0=$abc$109383$new_n57661_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n42125_ nq=$abc$109383$new_n57662_
-.subckt nxr2_x1 i0=$abc$109383$new_n57660_ i1=$abc$109383$new_n57120_ nq=$abc$109383$new_n57663_
-.subckt oa22_x2 i0=$abc$109383$new_n52226_ i1=$abc$109383$new_n57663_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57664_
-.subckt a2_x2 i0=$abc$109383$new_n57664_ i1=$abc$109383$new_n57662_ q=$abc$109383$new_n57665_
-.subckt nxr2_x1 i0=$abc$109383$new_n57663_ i1=$abc$109383$new_n52226_ nq=$abc$109383$new_n57666_
-.subckt ao22_x2 i0=$abc$109383$new_n57666_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57667_
-.subckt oa22_x2 i0=$abc$109383$new_n57667_ i1=$abc$109383$new_n57665_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57668_
-.subckt ao22_x2 i0=$abc$109383$new_n52226_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57669_
-.subckt xr2_x1 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n57670_
-.subckt nxr2_x1 i0=$abc$109383$new_n52217_ i1=$abc$109383$new_n57670_ nq=$abc$109383$new_n57671_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57671_ i2=$abc$109383$new_n57669_ q=$abc$109383$new_n57672_
-.subckt ao22_x2 i0=$abc$109383$new_n57672_ i1=$abc$109383$new_n57668_ i2=$abc$109383$new_n57659_ q=$abc$109383$new_n57673_
+.subckt nexor2_x0 i0=$abc$109383$new_n57660_ i1=$abc$109383$new_n57120_ nq=$abc$109383$new_n57663_
+.subckt or21nand_x1 i0=$abc$109383$new_n52226_ i1=$abc$109383$new_n57663_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57664_
+.subckt and2_x1 i0=$abc$109383$new_n57664_ i1=$abc$109383$new_n57662_ q=$abc$109383$new_n57665_
+.subckt nexor2_x0 i0=$abc$109383$new_n57663_ i1=$abc$109383$new_n52226_ nq=$abc$109383$new_n57666_
+.subckt and21nor_x1 i0=$abc$109383$new_n57666_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57667_
+.subckt or21nand_x1 i0=$abc$109383$new_n57667_ i1=$abc$109383$new_n57665_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57668_
+.subckt and21nor_x1 i0=$abc$109383$new_n52226_ i1=$abc$109383$new_n57465_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57669_
+.subckt xor2_x0 i0=$abc$109383$new_n42125_ i1=$abc$109383$new_n29365_ q=$abc$109383$new_n57670_
+.subckt nexor2_x0 i0=$abc$109383$new_n52217_ i1=$abc$109383$new_n57670_ nq=$abc$109383$new_n57671_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57671_ i2=$abc$109383$new_n57669_ nq=$abc$109383$new_n57672_
+.subckt and21nor_x1 i0=$abc$109383$new_n57672_ i1=$abc$109383$new_n57668_ i2=$abc$109383$new_n57659_ nq=$abc$109383$new_n57673_
 .subckt nand2_x0 i0=$abc$109383$new_n57673_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57674_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[24] nq=$abc$109383$new_n57675_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57675_ q=$abc$109383$new_n57676_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57675_ nq=$abc$109383$new_n57676_
 .subckt nor2_x0 i0=$abc$109383$new_n57676_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57677_
-.subckt a2_x2 i0=$abc$109383$new_n57677_ i1=$abc$109383$new_n57674_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106746
+.subckt and2_x1 i0=$abc$109383$new_n57677_ i1=$abc$109383$new_n57674_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106746
 .subckt nand3_x0 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[25] i2=soc.cpu.minerva.payload__pc$32[24] nq=$abc$109383$new_n57679_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[24] i1=$abc$109383$new_n57656_ i2=soc.cpu.minerva.payload__pc$32[25] q=$abc$109383$new_n57680_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[24] i1=$abc$109383$new_n57656_ i2=soc.cpu.minerva.payload__pc$32[25] nq=$abc$109383$new_n57680_
 .subckt nand3_x0 i0=$abc$109383$new_n57680_ i1=$abc$109383$new_n57679_ i2=$abc$109383$new_n57209_ nq=$abc$109383$new_n57681_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n57682_
-.subckt nxr2_x1 i0=$abc$109383$new_n57682_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57683_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n57682_
+.subckt nexor2_x0 i0=$abc$109383$new_n57682_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57683_
 .subckt nand3_x0 i0=$abc$109383$new_n57683_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n42267_ nq=$abc$109383$new_n57684_
-.subckt nxr2_x1 i0=$abc$109383$new_n57682_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57685_
-.subckt oa22_x2 i0=$abc$109383$new_n52238_ i1=$abc$109383$new_n57685_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57686_
-.subckt a2_x2 i0=$abc$109383$new_n57686_ i1=$abc$109383$new_n57684_ q=$abc$109383$new_n57687_
-.subckt nxr2_x1 i0=$abc$109383$new_n57685_ i1=$abc$109383$new_n52238_ nq=$abc$109383$new_n57688_
-.subckt ao22_x2 i0=$abc$109383$new_n57688_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57689_
-.subckt oa22_x2 i0=$abc$109383$new_n57689_ i1=$abc$109383$new_n57687_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57690_
-.subckt ao22_x2 i0=$abc$109383$new_n52238_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57691_
-.subckt xr2_x1 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n57692_
-.subckt nxr2_x1 i0=$abc$109383$new_n52230_ i1=$abc$109383$new_n57692_ nq=$abc$109383$new_n57693_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57693_ i2=$abc$109383$new_n57691_ q=$abc$109383$new_n57694_
-.subckt ao22_x2 i0=$abc$109383$new_n57694_ i1=$abc$109383$new_n57690_ i2=$abc$109383$new_n57681_ q=$abc$109383$new_n57695_
+.subckt nexor2_x0 i0=$abc$109383$new_n57682_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57685_
+.subckt or21nand_x1 i0=$abc$109383$new_n52238_ i1=$abc$109383$new_n57685_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57686_
+.subckt and2_x1 i0=$abc$109383$new_n57686_ i1=$abc$109383$new_n57684_ q=$abc$109383$new_n57687_
+.subckt nexor2_x0 i0=$abc$109383$new_n57685_ i1=$abc$109383$new_n52238_ nq=$abc$109383$new_n57688_
+.subckt and21nor_x1 i0=$abc$109383$new_n57688_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57689_
+.subckt or21nand_x1 i0=$abc$109383$new_n57689_ i1=$abc$109383$new_n57687_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57690_
+.subckt and21nor_x1 i0=$abc$109383$new_n52238_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57691_
+.subckt xor2_x0 i0=$abc$109383$new_n42267_ i1=$abc$109383$new_n29342_ q=$abc$109383$new_n57692_
+.subckt nexor2_x0 i0=$abc$109383$new_n52230_ i1=$abc$109383$new_n57692_ nq=$abc$109383$new_n57693_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57693_ i2=$abc$109383$new_n57691_ nq=$abc$109383$new_n57694_
+.subckt and21nor_x1 i0=$abc$109383$new_n57694_ i1=$abc$109383$new_n57690_ i2=$abc$109383$new_n57681_ nq=$abc$109383$new_n57695_
 .subckt nand2_x0 i0=$abc$109383$new_n57695_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57696_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[25] nq=$abc$109383$new_n57697_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57697_ q=$abc$109383$new_n57698_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57697_ nq=$abc$109383$new_n57698_
 .subckt nor2_x0 i0=$abc$109383$new_n57698_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57699_
-.subckt a2_x2 i0=$abc$109383$new_n57699_ i1=$abc$109383$new_n57696_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106750
+.subckt and2_x1 i0=$abc$109383$new_n57699_ i1=$abc$109383$new_n57696_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106750
 .subckt nand4_x0 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[26] i2=soc.cpu.minerva.payload__pc$32[25] i3=soc.cpu.minerva.payload__pc$32[24] nq=$abc$109383$new_n57701_
-.subckt a3_x2 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[25] i2=soc.cpu.minerva.payload__pc$32[24] q=$abc$109383$new_n57702_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[26] i1=$abc$109383$new_n57702_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57703_
+.subckt and3_x1 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[25] i2=soc.cpu.minerva.payload__pc$32[24] q=$abc$109383$new_n57702_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[26] i1=$abc$109383$new_n57702_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57703_
 .subckt nand2_x0 i0=$abc$109383$new_n57703_ i1=$abc$109383$new_n57701_ nq=$abc$109383$new_n57704_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n57705_
-.subckt nxr2_x1 i0=$abc$109383$new_n57705_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57706_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29309_ q=$abc$109383$new_n57705_
+.subckt nexor2_x0 i0=$abc$109383$new_n57705_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57706_
 .subckt nand3_x0 i0=$abc$109383$new_n57706_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n52249_ nq=$abc$109383$new_n57707_
-.subckt nxr2_x1 i0=$abc$109383$new_n57705_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57708_
-.subckt oa22_x2 i0=$abc$109383$new_n52250_ i1=$abc$109383$new_n57708_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57709_
-.subckt a2_x2 i0=$abc$109383$new_n57709_ i1=$abc$109383$new_n57707_ q=$abc$109383$new_n57710_
-.subckt nxr2_x1 i0=$abc$109383$new_n57708_ i1=$abc$109383$new_n52250_ nq=$abc$109383$new_n57711_
-.subckt ao22_x2 i0=$abc$109383$new_n57711_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57712_
-.subckt oa22_x2 i0=$abc$109383$new_n57712_ i1=$abc$109383$new_n57710_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57713_
-.subckt ao22_x2 i0=$abc$109383$new_n52250_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57714_
-.subckt nxr2_x1 i0=$abc$109383$new_n52244_ i1=$abc$109383$new_n52266_ nq=$abc$109383$new_n57715_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57715_ i2=$abc$109383$new_n57714_ q=$abc$109383$new_n57716_
-.subckt ao22_x2 i0=$abc$109383$new_n57716_ i1=$abc$109383$new_n57713_ i2=$abc$109383$new_n57704_ q=$abc$109383$new_n57717_
+.subckt nexor2_x0 i0=$abc$109383$new_n57705_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57708_
+.subckt or21nand_x1 i0=$abc$109383$new_n52250_ i1=$abc$109383$new_n57708_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57709_
+.subckt and2_x1 i0=$abc$109383$new_n57709_ i1=$abc$109383$new_n57707_ q=$abc$109383$new_n57710_
+.subckt nexor2_x0 i0=$abc$109383$new_n57708_ i1=$abc$109383$new_n52250_ nq=$abc$109383$new_n57711_
+.subckt and21nor_x1 i0=$abc$109383$new_n57711_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57712_
+.subckt or21nand_x1 i0=$abc$109383$new_n57712_ i1=$abc$109383$new_n57710_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57713_
+.subckt and21nor_x1 i0=$abc$109383$new_n52250_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57714_
+.subckt nexor2_x0 i0=$abc$109383$new_n52244_ i1=$abc$109383$new_n52266_ nq=$abc$109383$new_n57715_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57715_ i2=$abc$109383$new_n57714_ nq=$abc$109383$new_n57716_
+.subckt and21nor_x1 i0=$abc$109383$new_n57716_ i1=$abc$109383$new_n57713_ i2=$abc$109383$new_n57704_ nq=$abc$109383$new_n57717_
 .subckt nand2_x0 i0=$abc$109383$new_n57717_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57718_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[26] nq=$abc$109383$new_n57719_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57719_ q=$abc$109383$new_n57720_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57719_ nq=$abc$109383$new_n57720_
 .subckt nor2_x0 i0=$abc$109383$new_n57720_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57721_
-.subckt a2_x2 i0=$abc$109383$new_n57721_ i1=$abc$109383$new_n57718_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106754
-.subckt a4_x2 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[26] i2=soc.cpu.minerva.payload__pc$32[25] i3=soc.cpu.minerva.payload__pc$32[24] q=$abc$109383$new_n57723_
+.subckt and2_x1 i0=$abc$109383$new_n57721_ i1=$abc$109383$new_n57718_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106754
+.subckt and4_x1 i0=$abc$109383$new_n57656_ i1=soc.cpu.minerva.payload__pc$32[26] i2=soc.cpu.minerva.payload__pc$32[25] i3=soc.cpu.minerva.payload__pc$32[24] q=$abc$109383$new_n57723_
 .subckt nand2_x0 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[27] nq=$abc$109383$new_n57724_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[27] i1=$abc$109383$new_n57723_ i2=$abc$109383$new_n57387_ q=$abc$109383$new_n57725_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[27] i1=$abc$109383$new_n57723_ i2=$abc$109383$new_n57387_ nq=$abc$109383$new_n57725_
 .subckt nand2_x0 i0=$abc$109383$new_n57725_ i1=$abc$109383$new_n57724_ nq=$abc$109383$new_n57726_
-.subckt a2_x2 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n57727_
-.subckt nxr2_x1 i0=$abc$109383$new_n57727_ i1=$abc$109383$new_n57110_ nq=$abc$109383$new_n57728_
+.subckt and2_x1 i0=$abc$109383$new_n57219_ i1=$abc$109383$new_n29285_ q=$abc$109383$new_n57727_
+.subckt nexor2_x0 i0=$abc$109383$new_n57727_ i1=$abc$109383$new_n57110_ nq=$abc$109383$new_n57728_
 .subckt nand3_x0 i0=$abc$109383$new_n57728_ i1=$abc$109383$new_n57187_ i2=$abc$109383$new_n42583_ nq=$abc$109383$new_n57729_
-.subckt nxr2_x1 i0=$abc$109383$new_n57727_ i1=$abc$109383$new_n57120_ nq=$abc$109383$new_n57730_
-.subckt oa22_x2 i0=$abc$109383$new_n52270_ i1=$abc$109383$new_n57730_ i2=$abc$109383$new_n57224_ q=$abc$109383$new_n57731_
-.subckt a2_x2 i0=$abc$109383$new_n57731_ i1=$abc$109383$new_n57729_ q=$abc$109383$new_n57732_
-.subckt nxr2_x1 i0=$abc$109383$new_n57730_ i1=$abc$109383$new_n52270_ nq=$abc$109383$new_n57733_
-.subckt ao22_x2 i0=$abc$109383$new_n57733_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ q=$abc$109383$new_n57734_
-.subckt oa22_x2 i0=$abc$109383$new_n57734_ i1=$abc$109383$new_n57732_ i2=$abc$109383$new_n57208_ q=$abc$109383$new_n57735_
-.subckt ao22_x2 i0=$abc$109383$new_n52270_ i1=$abc$109383$new_n57104_ i2=$abc$109383$new_n57181_ q=$abc$109383$new_n57736_
-.subckt nxr2_x1 i0=$abc$109383$new_n52259_ i1=$abc$109383$new_n52290_ nq=$abc$109383$new_n57737_
-.subckt ao22_x2 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57737_ i2=$abc$109383$new_n57736_ q=$abc$109383$new_n57738_
-.subckt ao22_x2 i0=$abc$109383$new_n57738_ i1=$abc$109383$new_n57735_ i2=$abc$109383$new_n57726_ q=$abc$109383$new_n57739_
+.subckt nexor2_x0 i0=$abc$109383$new_n57727_ i1=$abc$109383$new_n57120_ nq=$abc$109383$new_n57730_
+.subckt or21nand_x1 i0=$abc$109383$new_n52270_ i1=$abc$109383$new_n57730_ i2=$abc$109383$new_n57224_ nq=$abc$109383$new_n57731_
+.subckt and2_x1 i0=$abc$109383$new_n57731_ i1=$abc$109383$new_n57729_ q=$abc$109383$new_n57732_
+.subckt nexor2_x0 i0=$abc$109383$new_n57730_ i1=$abc$109383$new_n52270_ nq=$abc$109383$new_n57733_
+.subckt and21nor_x1 i0=$abc$109383$new_n57733_ i1=$abc$109383$new_n57229_ i2=$abc$109383$new_n57485_ nq=$abc$109383$new_n57734_
+.subckt or21nand_x1 i0=$abc$109383$new_n57734_ i1=$abc$109383$new_n57732_ i2=$abc$109383$new_n57208_ nq=$abc$109383$new_n57735_
+.subckt and21nor_x1 i0=$abc$109383$new_n52270_ i1=$abc$109383$new_n57104_ i2=$abc$109383$new_n57181_ nq=$abc$109383$new_n57736_
+.subckt nexor2_x0 i0=$abc$109383$new_n52259_ i1=$abc$109383$new_n52290_ nq=$abc$109383$new_n57737_
+.subckt and21nor_x1 i0=$abc$109383$new_n57375_ i1=$abc$109383$new_n57737_ i2=$abc$109383$new_n57736_ nq=$abc$109383$new_n57738_
+.subckt and21nor_x1 i0=$abc$109383$new_n57738_ i1=$abc$109383$new_n57735_ i2=$abc$109383$new_n57726_ nq=$abc$109383$new_n57739_
 .subckt nand2_x0 i0=$abc$109383$new_n57739_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57740_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[27] nq=$abc$109383$new_n57741_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57741_ q=$abc$109383$new_n57742_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57741_ nq=$abc$109383$new_n57742_
 .subckt nor2_x0 i0=$abc$109383$new_n57742_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57743_
-.subckt a2_x2 i0=$abc$109383$new_n57743_ i1=$abc$109383$new_n57740_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106758
+.subckt and2_x1 i0=$abc$109383$new_n57743_ i1=$abc$109383$new_n57740_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106758
 .subckt nand3_x0 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[28] i2=soc.cpu.minerva.payload__pc$32[27] nq=$abc$109383$new_n57745_
-.subckt oa22_x2 i0=soc.cpu.minerva.payload__pc$32[27] i1=$abc$109383$new_n57723_ i2=soc.cpu.minerva.payload__pc$32[28] q=$abc$109383$new_n57746_
+.subckt or21nand_x1 i0=soc.cpu.minerva.payload__pc$32[27] i1=$abc$109383$new_n57723_ i2=soc.cpu.minerva.payload__pc$32[28] nq=$abc$109383$new_n57746_
 .subckt nand3_x0 i0=$abc$109383$new_n57746_ i1=$abc$109383$new_n57745_ i2=$abc$109383$new_n57209_ nq=$abc$109383$new_n57747_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29433_ q=$abc$109383$new_n57748_
-.subckt nxr2_x1 i0=$abc$109383$new_n57748_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57749_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29433_ q=$abc$109383$new_n57748_
+.subckt nexor2_x0 i0=$abc$109383$new_n57748_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57749_
 .subckt nand3_x0 i0=$abc$109383$new_n57749_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n42738_ nq=$abc$109383$new_n57750_
-.subckt nxr2_x1 i0=$abc$109383$new_n57748_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57751_
-.subckt oa22_x2 i0=$abc$109383$new_n52283_ i1=$abc$109383$new_n57751_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57752_
-.subckt a2_x2 i0=$abc$109383$new_n57752_ i1=$abc$109383$new_n57750_ q=$abc$109383$new_n57753_
-.subckt nxr2_x1 i0=$abc$109383$new_n57751_ i1=$abc$109383$new_n52283_ nq=$abc$109383$new_n57754_
-.subckt ao22_x2 i0=$abc$109383$new_n57754_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57755_
-.subckt oa22_x2 i0=$abc$109383$new_n57755_ i1=$abc$109383$new_n57753_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57756_
-.subckt ao22_x2 i0=$abc$109383$new_n52283_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57757_
-.subckt nxr2_x1 i0=$abc$109383$new_n42738_ i1=$abc$109383$new_n29432_ nq=$abc$109383$new_n57758_
-.subckt nxr2_x1 i0=$abc$109383$new_n52275_ i1=$abc$109383$new_n57758_ nq=$abc$109383$new_n57759_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57759_ i2=$abc$109383$new_n57757_ q=$abc$109383$new_n57760_
-.subckt ao22_x2 i0=$abc$109383$new_n57760_ i1=$abc$109383$new_n57756_ i2=$abc$109383$new_n57747_ q=$abc$109383$new_n57761_
+.subckt nexor2_x0 i0=$abc$109383$new_n57748_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57751_
+.subckt or21nand_x1 i0=$abc$109383$new_n52283_ i1=$abc$109383$new_n57751_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57752_
+.subckt and2_x1 i0=$abc$109383$new_n57752_ i1=$abc$109383$new_n57750_ q=$abc$109383$new_n57753_
+.subckt nexor2_x0 i0=$abc$109383$new_n57751_ i1=$abc$109383$new_n52283_ nq=$abc$109383$new_n57754_
+.subckt and21nor_x1 i0=$abc$109383$new_n57754_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57755_
+.subckt or21nand_x1 i0=$abc$109383$new_n57755_ i1=$abc$109383$new_n57753_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57756_
+.subckt and21nor_x1 i0=$abc$109383$new_n52283_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57757_
+.subckt nexor2_x0 i0=$abc$109383$new_n42738_ i1=$abc$109383$new_n29432_ nq=$abc$109383$new_n57758_
+.subckt nexor2_x0 i0=$abc$109383$new_n52275_ i1=$abc$109383$new_n57758_ nq=$abc$109383$new_n57759_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57759_ i2=$abc$109383$new_n57757_ nq=$abc$109383$new_n57760_
+.subckt and21nor_x1 i0=$abc$109383$new_n57760_ i1=$abc$109383$new_n57756_ i2=$abc$109383$new_n57747_ nq=$abc$109383$new_n57761_
 .subckt nand2_x0 i0=$abc$109383$new_n57761_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57762_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[28] nq=$abc$109383$new_n57763_
-.subckt ao22_x2 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57763_ q=$abc$109383$new_n57764_
+.subckt and21nor_x1 i0=$abc$109383$new_n57564_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57763_ nq=$abc$109383$new_n57764_
 .subckt nor2_x0 i0=$abc$109383$new_n57764_ i1=$abc$109383$new_n57562_ nq=$abc$109383$new_n57765_
-.subckt a2_x2 i0=$abc$109383$new_n57765_ i1=$abc$109383$new_n57762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106762
+.subckt and2_x1 i0=$abc$109383$new_n57765_ i1=$abc$109383$new_n57762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106762
 .subckt nand4_x0 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[29] i2=soc.cpu.minerva.payload__pc$32[28] i3=soc.cpu.minerva.payload__pc$32[27] nq=$abc$109383$new_n57767_
-.subckt a3_x2 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[28] i2=soc.cpu.minerva.payload__pc$32[27] q=$abc$109383$new_n57768_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[29] i1=$abc$109383$new_n57768_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57769_
+.subckt and3_x1 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[28] i2=soc.cpu.minerva.payload__pc$32[27] q=$abc$109383$new_n57768_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[29] i1=$abc$109383$new_n57768_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57769_
 .subckt nand2_x0 i0=$abc$109383$new_n57769_ i1=$abc$109383$new_n57767_ nq=$abc$109383$new_n57770_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n57771_
-.subckt nxr2_x1 i0=$abc$109383$new_n57771_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57772_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29406_ q=$abc$109383$new_n57771_
+.subckt nexor2_x0 i0=$abc$109383$new_n57771_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57772_
 .subckt nand3_x0 i0=$abc$109383$new_n57772_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n42591_ nq=$abc$109383$new_n57773_
-.subckt nxr2_x1 i0=$abc$109383$new_n57771_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57774_
-.subckt oa22_x2 i0=$abc$109383$new_n42764_ i1=$abc$109383$new_n57774_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57775_
-.subckt a2_x2 i0=$abc$109383$new_n57775_ i1=$abc$109383$new_n57773_ q=$abc$109383$new_n57776_
-.subckt nxr2_x1 i0=$abc$109383$new_n57774_ i1=$abc$109383$new_n42764_ nq=$abc$109383$new_n57777_
-.subckt ao22_x2 i0=$abc$109383$new_n57777_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57778_
-.subckt oa22_x2 i0=$abc$109383$new_n57778_ i1=$abc$109383$new_n57776_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57779_
-.subckt ao22_x2 i0=$abc$109383$new_n42764_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57780_
-.subckt nxr2_x1 i0=$abc$109383$new_n52295_ i1=$abc$109383$new_n52307_ nq=$abc$109383$new_n57781_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57781_ i2=$abc$109383$new_n57780_ q=$abc$109383$new_n57782_
-.subckt ao22_x2 i0=$abc$109383$new_n57782_ i1=$abc$109383$new_n57779_ i2=$abc$109383$new_n57770_ q=$abc$109383$new_n57783_
+.subckt nexor2_x0 i0=$abc$109383$new_n57771_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57774_
+.subckt or21nand_x1 i0=$abc$109383$new_n42764_ i1=$abc$109383$new_n57774_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57775_
+.subckt and2_x1 i0=$abc$109383$new_n57775_ i1=$abc$109383$new_n57773_ q=$abc$109383$new_n57776_
+.subckt nexor2_x0 i0=$abc$109383$new_n57774_ i1=$abc$109383$new_n42764_ nq=$abc$109383$new_n57777_
+.subckt and21nor_x1 i0=$abc$109383$new_n57777_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57778_
+.subckt or21nand_x1 i0=$abc$109383$new_n57778_ i1=$abc$109383$new_n57776_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57779_
+.subckt and21nor_x1 i0=$abc$109383$new_n42764_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57780_
+.subckt nexor2_x0 i0=$abc$109383$new_n52295_ i1=$abc$109383$new_n52307_ nq=$abc$109383$new_n57781_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57781_ i2=$abc$109383$new_n57780_ nq=$abc$109383$new_n57782_
+.subckt and21nor_x1 i0=$abc$109383$new_n57782_ i1=$abc$109383$new_n57779_ i2=$abc$109383$new_n57770_ nq=$abc$109383$new_n57783_
 .subckt nand2_x0 i0=$abc$109383$new_n57783_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57784_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[29] nq=$abc$109383$new_n57785_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57785_ q=$abc$109383$new_n57786_
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n57587_ i2=$abc$109383$new_n57785_ nq=$abc$109383$new_n57786_
 .subckt nor2_x0 i0=$abc$109383$new_n57786_ i1=$abc$109383$new_n28532_ nq=$abc$109383$new_n57787_
-.subckt a2_x2 i0=$abc$109383$new_n57787_ i1=$abc$109383$new_n57784_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106766
-.subckt a4_x2 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[29] i2=soc.cpu.minerva.payload__pc$32[28] i3=soc.cpu.minerva.payload__pc$32[27] q=$abc$109383$new_n57789_
+.subckt and2_x1 i0=$abc$109383$new_n57787_ i1=$abc$109383$new_n57784_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106766
+.subckt and4_x1 i0=$abc$109383$new_n57723_ i1=soc.cpu.minerva.payload__pc$32[29] i2=soc.cpu.minerva.payload__pc$32[28] i3=soc.cpu.minerva.payload__pc$32[27] q=$abc$109383$new_n57789_
 .subckt nand2_x0 i0=$abc$109383$new_n57789_ i1=soc.cpu.minerva.payload__pc$32[30] nq=$abc$109383$new_n57790_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__pc$32[30] i1=$abc$109383$new_n57789_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57791_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__pc$32[30] i1=$abc$109383$new_n57789_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57791_
 .subckt nand2_x0 i0=$abc$109383$new_n57791_ i1=$abc$109383$new_n57790_ nq=$abc$109383$new_n57792_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n57793_
-.subckt nxr2_x1 i0=$abc$109383$new_n57793_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57794_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29463_ q=$abc$109383$new_n57793_
+.subckt nexor2_x0 i0=$abc$109383$new_n57793_ i1=$abc$109383$new_n57267_ nq=$abc$109383$new_n57794_
 .subckt nand3_x0 i0=$abc$109383$new_n57794_ i1=$abc$109383$new_n57266_ i2=$abc$109383$new_n42891_ nq=$abc$109383$new_n57795_
-.subckt nxr2_x1 i0=$abc$109383$new_n57793_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57796_
-.subckt oa22_x2 i0=$abc$109383$new_n52317_ i1=$abc$109383$new_n57796_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57797_
-.subckt a2_x2 i0=$abc$109383$new_n57797_ i1=$abc$109383$new_n57795_ q=$abc$109383$new_n57798_
-.subckt nxr2_x1 i0=$abc$109383$new_n57796_ i1=$abc$109383$new_n52317_ nq=$abc$109383$new_n57799_
-.subckt ao22_x2 i0=$abc$109383$new_n57799_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ q=$abc$109383$new_n57800_
-.subckt oa22_x2 i0=$abc$109383$new_n57800_ i1=$abc$109383$new_n57798_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57801_
-.subckt ao22_x2 i0=$abc$109383$new_n52317_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57802_
-.subckt nxr2_x1 i0=$abc$109383$new_n52309_ i1=$abc$109383$new_n52319_ nq=$abc$109383$new_n57803_
-.subckt ao22_x2 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57803_ i2=$abc$109383$new_n57802_ q=$abc$109383$new_n57804_
-.subckt ao22_x2 i0=$abc$109383$new_n57804_ i1=$abc$109383$new_n57801_ i2=$abc$109383$new_n57792_ q=$abc$109383$new_n57805_
+.subckt nexor2_x0 i0=$abc$109383$new_n57793_ i1=$abc$109383$new_n57271_ nq=$abc$109383$new_n57796_
+.subckt or21nand_x1 i0=$abc$109383$new_n52317_ i1=$abc$109383$new_n57796_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57797_
+.subckt and2_x1 i0=$abc$109383$new_n57797_ i1=$abc$109383$new_n57795_ q=$abc$109383$new_n57798_
+.subckt nexor2_x0 i0=$abc$109383$new_n57796_ i1=$abc$109383$new_n52317_ nq=$abc$109383$new_n57799_
+.subckt and21nor_x1 i0=$abc$109383$new_n57799_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57275_ nq=$abc$109383$new_n57800_
+.subckt or21nand_x1 i0=$abc$109383$new_n57800_ i1=$abc$109383$new_n57798_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57801_
+.subckt and21nor_x1 i0=$abc$109383$new_n52317_ i1=$abc$109383$new_n57157_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57802_
+.subckt nexor2_x0 i0=$abc$109383$new_n52309_ i1=$abc$109383$new_n52319_ nq=$abc$109383$new_n57803_
+.subckt and21nor_x1 i0=$abc$109383$new_n57282_ i1=$abc$109383$new_n57803_ i2=$abc$109383$new_n57802_ nq=$abc$109383$new_n57804_
+.subckt and21nor_x1 i0=$abc$109383$new_n57804_ i1=$abc$109383$new_n57801_ i2=$abc$109383$new_n57792_ nq=$abc$109383$new_n57805_
 .subckt nand2_x0 i0=$abc$109383$new_n57805_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57806_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[30] nq=$abc$109383$new_n57807_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n57807_ q=$abc$109383$new_n57808_
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n57807_ nq=$abc$109383$new_n57808_
 .subckt nor2_x0 i0=$abc$109383$new_n57808_ i1=$abc$109383$new_n28532_ nq=$abc$109383$new_n57809_
-.subckt a2_x2 i0=$abc$109383$new_n57809_ i1=$abc$109383$new_n57806_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106770
+.subckt and2_x1 i0=$abc$109383$new_n57809_ i1=$abc$109383$new_n57806_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106770
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[31] nq=$abc$109383$new_n57811_
-.subckt a2_x2 i0=$abc$109383$new_n57789_ i1=soc.cpu.minerva.payload__pc$32[30] q=$abc$109383$new_n57812_
-.subckt nxr2_x1 i0=$abc$109383$new_n57812_ i1=$abc$109383$new_n57811_ nq=$abc$109383$new_n57813_
+.subckt and2_x1 i0=$abc$109383$new_n57789_ i1=soc.cpu.minerva.payload__pc$32[30] q=$abc$109383$new_n57812_
+.subckt nexor2_x0 i0=$abc$109383$new_n57812_ i1=$abc$109383$new_n57811_ nq=$abc$109383$new_n57813_
 .subckt nand2_x0 i0=$abc$109383$new_n57813_ i1=$abc$109383$new_n57209_ nq=$abc$109383$new_n57814_
-.subckt a2_x2 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29490_ q=$abc$109383$new_n57815_
-.subckt nxr2_x1 i0=$abc$109383$new_n57815_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57816_
+.subckt and2_x1 i0=$abc$109383$new_n57220_ i1=$abc$109383$new_n29490_ q=$abc$109383$new_n57815_
+.subckt nexor2_x0 i0=$abc$109383$new_n57815_ i1=$abc$109383$new_n57217_ nq=$abc$109383$new_n57816_
 .subckt nand3_x0 i0=$abc$109383$new_n57816_ i1=$abc$109383$new_n57116_ i2=$abc$109383$new_n56227_ nq=$abc$109383$new_n57817_
-.subckt nxr2_x1 i0=$abc$109383$new_n57815_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57818_
-.subckt oa22_x2 i0=$abc$109383$new_n43083_ i1=$abc$109383$new_n57818_ i2=$abc$109383$new_n57225_ q=$abc$109383$new_n57819_
-.subckt a2_x2 i0=$abc$109383$new_n57819_ i1=$abc$109383$new_n57817_ q=$abc$109383$new_n57820_
-.subckt nxr2_x1 i0=$abc$109383$new_n57818_ i1=$abc$109383$new_n43083_ nq=$abc$109383$new_n57821_
-.subckt ao22_x2 i0=$abc$109383$new_n57821_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n57822_
-.subckt oa22_x2 i0=$abc$109383$new_n57822_ i1=$abc$109383$new_n57820_ i2=$abc$109383$new_n57153_ q=$abc$109383$new_n57823_
-.subckt ao22_x2 i0=$abc$109383$new_n43083_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n57824_
-.subckt nxr2_x1 i0=$abc$109383$new_n52321_ i1=$abc$109383$new_n55112_ nq=$abc$109383$new_n57825_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57825_ i2=$abc$109383$new_n57824_ q=$abc$109383$new_n57826_
-.subckt ao22_x2 i0=$abc$109383$new_n57826_ i1=$abc$109383$new_n57823_ i2=$abc$109383$new_n57814_ q=$abc$109383$new_n57827_
+.subckt nexor2_x0 i0=$abc$109383$new_n57815_ i1=$abc$109383$new_n57121_ nq=$abc$109383$new_n57818_
+.subckt or21nand_x1 i0=$abc$109383$new_n43083_ i1=$abc$109383$new_n57818_ i2=$abc$109383$new_n57225_ nq=$abc$109383$new_n57819_
+.subckt and2_x1 i0=$abc$109383$new_n57819_ i1=$abc$109383$new_n57817_ q=$abc$109383$new_n57820_
+.subckt nexor2_x0 i0=$abc$109383$new_n57818_ i1=$abc$109383$new_n43083_ nq=$abc$109383$new_n57821_
+.subckt and21nor_x1 i0=$abc$109383$new_n57821_ i1=$abc$109383$new_n57230_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n57822_
+.subckt or21nand_x1 i0=$abc$109383$new_n57822_ i1=$abc$109383$new_n57820_ i2=$abc$109383$new_n57153_ nq=$abc$109383$new_n57823_
+.subckt and21nor_x1 i0=$abc$109383$new_n43083_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n57824_
+.subckt nexor2_x0 i0=$abc$109383$new_n52321_ i1=$abc$109383$new_n55112_ nq=$abc$109383$new_n57825_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n57825_ i2=$abc$109383$new_n57824_ nq=$abc$109383$new_n57826_
+.subckt and21nor_x1 i0=$abc$109383$new_n57826_ i1=$abc$109383$new_n57823_ i2=$abc$109383$new_n57814_ nq=$abc$109383$new_n57827_
 .subckt nand2_x0 i0=$abc$109383$new_n57827_ i1=$abc$109383$new_n35099_ nq=$abc$109383$new_n57828_
 .subckt inv_x0 i=soc.cpu.minerva.payload__result$93[31] nq=$abc$109383$new_n57829_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n57829_ q=$abc$109383$new_n57830_
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n57829_ nq=$abc$109383$new_n57830_
 .subckt nor2_x0 i0=$abc$109383$new_n57830_ i1=$abc$109383$new_n28532_ nq=$abc$109383$new_n57831_
-.subckt a2_x2 i0=$abc$109383$new_n57831_ i1=$abc$109383$new_n57828_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106774
+.subckt and2_x1 i0=$abc$109383$new_n57831_ i1=$abc$109383$new_n57828_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106774
 .subckt nand2_x0 i0=$abc$109383$new_n57081_ i1=$abc$109383$new_n52338_ nq=$abc$109383$new_n57833_
-.subckt a2_x2 i0=$abc$109383$new_n57833_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57834_
+.subckt and2_x1 i0=$abc$109383$new_n57833_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57834_
 .subckt nand3_x0 i0=$abc$109383$new_n57834_ i1=$abc$109383$new_n57095_ i2=$abc$109383$new_n57089_ nq=$abc$109383$new_n57835_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.payload__csr_result$117[0] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57836_
-.subckt a2_x2 i0=$abc$109383$new_n57836_ i1=$abc$109383$new_n57835_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106778
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.payload__csr_result$117[0] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57836_
+.subckt and2_x1 i0=$abc$109383$new_n57836_ i1=$abc$109383$new_n57835_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106778
 .subckt nand2_x0 i0=$abc$109383$new_n57111_ i1=$abc$109383$new_n52338_ nq=$abc$109383$new_n57838_
-.subckt a2_x2 i0=$abc$109383$new_n57838_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57839_
+.subckt and2_x1 i0=$abc$109383$new_n57838_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57839_
 .subckt nand3_x0 i0=$abc$109383$new_n57839_ i1=$abc$109383$new_n57125_ i2=$abc$109383$new_n57124_ nq=$abc$109383$new_n57840_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.payload__csr_result$117[1] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57841_
-.subckt a2_x2 i0=$abc$109383$new_n57841_ i1=$abc$109383$new_n57840_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106782
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.payload__csr_result$117[1] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57841_
+.subckt and2_x1 i0=$abc$109383$new_n57841_ i1=$abc$109383$new_n57840_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106782
 .subckt nand2_x0 i0=$abc$109383$new_n57139_ i1=$abc$109383$new_n52338_ nq=$abc$109383$new_n57843_
-.subckt a2_x2 i0=$abc$109383$new_n57843_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57844_
+.subckt and2_x1 i0=$abc$109383$new_n57843_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57844_
 .subckt nand3_x0 i0=$abc$109383$new_n57844_ i1=$abc$109383$new_n57148_ i2=$abc$109383$new_n57147_ nq=$abc$109383$new_n57845_
-.subckt ao22_x2 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.payload__csr_result$117[2] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57846_
-.subckt a2_x2 i0=$abc$109383$new_n57846_ i1=$abc$109383$new_n57845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106786
+.subckt and21nor_x1 i0=$abc$109383$new_n33612_ i1=soc.cpu.minerva.payload__csr_result$117[2] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57846_
+.subckt and2_x1 i0=$abc$109383$new_n57846_ i1=$abc$109383$new_n57845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106786
 .subckt nand2_x0 i0=$abc$109383$new_n57160_ i1=$abc$109383$new_n52338_ nq=$abc$109383$new_n57848_
-.subckt a2_x2 i0=$abc$109383$new_n57848_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57849_
+.subckt and2_x1 i0=$abc$109383$new_n57848_ i1=$abc$109383$new_n31803_ q=$abc$109383$new_n57849_
 .subckt nand3_x0 i0=$abc$109383$new_n57849_ i1=$abc$109383$new_n57169_ i2=$abc$109383$new_n57168_ nq=$abc$109383$new_n57850_
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n57851_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[3] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57852_
-.subckt a2_x2 i0=$abc$109383$new_n57852_ i1=$abc$109383$new_n57850_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106790
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[3] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57852_
+.subckt and2_x1 i0=$abc$109383$new_n57852_ i1=$abc$109383$new_n57850_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106790
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n57854_
 .subckt nand2_x0 i0=$abc$109383$new_n57189_ i1=$abc$109383$new_n52338_ nq=$abc$109383$new_n57855_
-.subckt a2_x2 i0=$abc$109383$new_n57855_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57856_
+.subckt and2_x1 i0=$abc$109383$new_n57855_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57856_
 .subckt nand3_x0 i0=$abc$109383$new_n57856_ i1=$abc$109383$new_n57196_ i2=$abc$109383$new_n57192_ nq=$abc$109383$new_n57857_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[4] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57858_
-.subckt a2_x2 i0=$abc$109383$new_n57858_ i1=$abc$109383$new_n57857_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106794
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[4] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57858_
+.subckt and2_x1 i0=$abc$109383$new_n57858_ i1=$abc$109383$new_n57857_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106794
 .subckt buf_x4 i=$abc$109383$new_n52374_ q=$abc$109383$new_n57860_
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29298_ nq=$abc$109383$new_n57861_
-.subckt a2_x2 i0=$abc$109383$new_n57861_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57862_
+.subckt and2_x1 i0=$abc$109383$new_n57861_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57862_
 .subckt nand3_x0 i0=$abc$109383$new_n57862_ i1=$abc$109383$new_n57227_ i2=$abc$109383$new_n57223_ nq=$abc$109383$new_n57863_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[5] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57864_
-.subckt a2_x2 i0=$abc$109383$new_n57864_ i1=$abc$109383$new_n57863_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106798
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[5] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57864_
+.subckt and2_x1 i0=$abc$109383$new_n57864_ i1=$abc$109383$new_n57863_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106798
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29332_ nq=$abc$109383$new_n57866_
-.subckt a2_x2 i0=$abc$109383$new_n57866_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57867_
+.subckt and2_x1 i0=$abc$109383$new_n57866_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57867_
 .subckt nand3_x0 i0=$abc$109383$new_n57867_ i1=$abc$109383$new_n57248_ i2=$abc$109383$new_n57246_ nq=$abc$109383$new_n57868_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[6] i2=$abc$109383$new_n55495_ q=$abc$109383$new_n57869_
-.subckt a2_x2 i0=$abc$109383$new_n57869_ i1=$abc$109383$new_n57868_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106802
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[6] i2=$abc$109383$new_n55495_ nq=$abc$109383$new_n57869_
+.subckt and2_x1 i0=$abc$109383$new_n57869_ i1=$abc$109383$new_n57868_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106802
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29354_ nq=$abc$109383$new_n57871_
-.subckt a2_x2 i0=$abc$109383$new_n57871_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57872_
+.subckt and2_x1 i0=$abc$109383$new_n57871_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57872_
 .subckt nand3_x0 i0=$abc$109383$new_n57872_ i1=$abc$109383$new_n57273_ i2=$abc$109383$new_n57270_ nq=$abc$109383$new_n57873_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n57874_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[7] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57875_
-.subckt a2_x2 i0=$abc$109383$new_n57875_ i1=$abc$109383$new_n57873_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106806
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[7] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57875_
+.subckt and2_x1 i0=$abc$109383$new_n57875_ i1=$abc$109383$new_n57873_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106806
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29510_ nq=$abc$109383$new_n57877_
-.subckt a2_x2 i0=$abc$109383$new_n57877_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57878_
+.subckt and2_x1 i0=$abc$109383$new_n57877_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57878_
 .subckt nand3_x0 i0=$abc$109383$new_n57878_ i1=$abc$109383$new_n57300_ i2=$abc$109383$new_n57297_ nq=$abc$109383$new_n57879_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[8] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57880_
-.subckt a2_x2 i0=$abc$109383$new_n57880_ i1=$abc$109383$new_n57879_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106810
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[8] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57880_
+.subckt and2_x1 i0=$abc$109383$new_n57880_ i1=$abc$109383$new_n57879_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106810
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29532_ nq=$abc$109383$new_n57882_
-.subckt a2_x2 i0=$abc$109383$new_n57882_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57883_
+.subckt and2_x1 i0=$abc$109383$new_n57882_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57883_
 .subckt nand3_x0 i0=$abc$109383$new_n57883_ i1=$abc$109383$new_n57328_ i2=$abc$109383$new_n57326_ nq=$abc$109383$new_n57884_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[9] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57885_
-.subckt a2_x2 i0=$abc$109383$new_n57885_ i1=$abc$109383$new_n57884_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106814
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[9] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57885_
+.subckt and2_x1 i0=$abc$109383$new_n57885_ i1=$abc$109383$new_n57884_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106814
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29558_ nq=$abc$109383$new_n57887_
-.subckt a2_x2 i0=$abc$109383$new_n57887_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57888_
+.subckt and2_x1 i0=$abc$109383$new_n57887_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57888_
 .subckt nand3_x0 i0=$abc$109383$new_n57888_ i1=$abc$109383$new_n57345_ i2=$abc$109383$new_n57343_ nq=$abc$109383$new_n57889_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[10] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57890_
-.subckt a2_x2 i0=$abc$109383$new_n57890_ i1=$abc$109383$new_n57889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106818
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[10] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57890_
+.subckt and2_x1 i0=$abc$109383$new_n57890_ i1=$abc$109383$new_n57889_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106818
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29582_ nq=$abc$109383$new_n57892_
-.subckt a2_x2 i0=$abc$109383$new_n57892_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57893_
+.subckt and2_x1 i0=$abc$109383$new_n57892_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57893_
 .subckt nand3_x0 i0=$abc$109383$new_n57893_ i1=$abc$109383$new_n57368_ i2=$abc$109383$new_n57366_ nq=$abc$109383$new_n57894_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[11] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57895_
-.subckt a2_x2 i0=$abc$109383$new_n57895_ i1=$abc$109383$new_n57894_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106822
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[11] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57895_
+.subckt and2_x1 i0=$abc$109383$new_n57895_ i1=$abc$109383$new_n57894_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106822
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29608_ nq=$abc$109383$new_n57897_
-.subckt a2_x2 i0=$abc$109383$new_n57897_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57898_
+.subckt and2_x1 i0=$abc$109383$new_n57897_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57898_
 .subckt nand3_x0 i0=$abc$109383$new_n57898_ i1=$abc$109383$new_n57394_ i2=$abc$109383$new_n57391_ nq=$abc$109383$new_n57899_
-.subckt ao22_x2 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[12] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57900_
-.subckt a2_x2 i0=$abc$109383$new_n57900_ i1=$abc$109383$new_n57899_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106826
+.subckt and21nor_x1 i0=$abc$109383$new_n57851_ i1=soc.cpu.minerva.payload__csr_result$117[12] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57900_
+.subckt and2_x1 i0=$abc$109383$new_n57900_ i1=$abc$109383$new_n57899_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106826
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29632_ nq=$abc$109383$new_n57902_
-.subckt a2_x2 i0=$abc$109383$new_n57902_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57903_
+.subckt and2_x1 i0=$abc$109383$new_n57902_ i1=$abc$109383$new_n57854_ q=$abc$109383$new_n57903_
 .subckt nand3_x0 i0=$abc$109383$new_n57903_ i1=$abc$109383$new_n57415_ i2=$abc$109383$new_n57413_ nq=$abc$109383$new_n57904_
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n57905_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[13] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57906_
-.subckt a2_x2 i0=$abc$109383$new_n57906_ i1=$abc$109383$new_n57904_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106830
+.subckt and21nor_x1 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[13] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57906_
+.subckt and2_x1 i0=$abc$109383$new_n57906_ i1=$abc$109383$new_n57904_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106830
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n57908_
 .subckt nand2_x0 i0=$abc$109383$new_n57860_ i1=$abc$109383$new_n29655_ nq=$abc$109383$new_n57909_
-.subckt a2_x2 i0=$abc$109383$new_n57909_ i1=$abc$109383$new_n57908_ q=$abc$109383$new_n57910_
+.subckt and2_x1 i0=$abc$109383$new_n57909_ i1=$abc$109383$new_n57908_ q=$abc$109383$new_n57910_
 .subckt nand3_x0 i0=$abc$109383$new_n57910_ i1=$abc$109383$new_n57438_ i2=$abc$109383$new_n57436_ nq=$abc$109383$new_n57911_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[14] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57912_
-.subckt a2_x2 i0=$abc$109383$new_n57912_ i1=$abc$109383$new_n57911_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106834
+.subckt and21nor_x1 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[14] i2=$abc$109383$new_n57874_ nq=$abc$109383$new_n57912_
+.subckt and2_x1 i0=$abc$109383$new_n57912_ i1=$abc$109383$new_n57911_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106834
 .subckt buf_x4 i=$abc$109383$new_n52374_ q=$abc$109383$new_n57914_
 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29676_ nq=$abc$109383$new_n57915_
-.subckt a2_x2 i0=$abc$109383$new_n57915_ i1=$abc$109383$new_n57908_ q=$abc$109383$new_n57916_
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 .subckt nand3_x0 i0=$abc$109383$new_n57916_ i1=$abc$109383$new_n57460_ i2=$abc$109383$new_n57458_ nq=$abc$109383$new_n57917_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[15] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57918_
-.subckt a2_x2 i0=$abc$109383$new_n57918_ i1=$abc$109383$new_n57917_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106838
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29688_ nq=$abc$109383$new_n57920_
-.subckt a2_x2 i0=$abc$109383$new_n57920_ i1=$abc$109383$new_n57908_ q=$abc$109383$new_n57921_
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 .subckt nand3_x0 i0=$abc$109383$new_n57921_ i1=$abc$109383$new_n57483_ i2=$abc$109383$new_n57481_ nq=$abc$109383$new_n57922_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[16] i2=$abc$109383$new_n57874_ q=$abc$109383$new_n57923_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29664_ nq=$abc$109383$new_n57925_
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 .subckt nand3_x0 i0=$abc$109383$new_n57926_ i1=$abc$109383$new_n57506_ i2=$abc$109383$new_n57504_ nq=$abc$109383$new_n57927_
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n57928_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29643_ nq=$abc$109383$new_n57931_
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 .subckt nand3_x0 i0=$abc$109383$new_n57932_ i1=$abc$109383$new_n57531_ i2=$abc$109383$new_n57528_ nq=$abc$109383$new_n57933_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29620_ nq=$abc$109383$new_n57936_
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 .subckt nand3_x0 i0=$abc$109383$new_n57937_ i1=$abc$109383$new_n57552_ i2=$abc$109383$new_n57550_ nq=$abc$109383$new_n57938_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[19] i2=$abc$109383$new_n57928_ q=$abc$109383$new_n57939_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29594_ nq=$abc$109383$new_n57941_
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 .subckt nand3_x0 i0=$abc$109383$new_n57942_ i1=$abc$109383$new_n57576_ i2=$abc$109383$new_n57574_ nq=$abc$109383$new_n57943_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[20] i2=$abc$109383$new_n57928_ q=$abc$109383$new_n57944_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29570_ nq=$abc$109383$new_n57946_
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 .subckt nand3_x0 i0=$abc$109383$new_n57947_ i1=$abc$109383$new_n57599_ i2=$abc$109383$new_n57597_ nq=$abc$109383$new_n57948_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[21] i2=$abc$109383$new_n57928_ q=$abc$109383$new_n57949_
-.subckt a2_x2 i0=$abc$109383$new_n57949_ i1=$abc$109383$new_n57948_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106862
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29544_ nq=$abc$109383$new_n57951_
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 .subckt nand3_x0 i0=$abc$109383$new_n57952_ i1=$abc$109383$new_n57620_ i2=$abc$109383$new_n57618_ nq=$abc$109383$new_n57953_
-.subckt ao22_x2 i0=$abc$109383$new_n57905_ i1=soc.cpu.minerva.payload__csr_result$117[22] i2=$abc$109383$new_n57928_ q=$abc$109383$new_n57954_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29521_ nq=$abc$109383$new_n57956_
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 .subckt nand3_x0 i0=$abc$109383$new_n57957_ i1=$abc$109383$new_n57642_ i2=$abc$109383$new_n57640_ nq=$abc$109383$new_n57958_
-.subckt ao22_x2 i0=$abc$109383$new_n30027_ i1=soc.cpu.minerva.payload__csr_result$117[23] i2=$abc$109383$new_n57928_ q=$abc$109383$new_n57959_
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 .subckt nand2_x0 i0=$abc$109383$new_n57914_ i1=$abc$109383$new_n29365_ nq=$abc$109383$new_n57961_
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 .subckt nand3_x0 i0=$abc$109383$new_n57962_ i1=$abc$109383$new_n57664_ i2=$abc$109383$new_n57662_ nq=$abc$109383$new_n57963_
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 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29342_ nq=$abc$109383$new_n57966_
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 .subckt nand3_x0 i0=$abc$109383$new_n57967_ i1=$abc$109383$new_n57686_ i2=$abc$109383$new_n57684_ nq=$abc$109383$new_n57968_
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 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29309_ nq=$abc$109383$new_n57971_
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 .subckt nand3_x0 i0=$abc$109383$new_n57972_ i1=$abc$109383$new_n57709_ i2=$abc$109383$new_n57707_ nq=$abc$109383$new_n57973_
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 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29285_ nq=$abc$109383$new_n57976_
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 .subckt nand3_x0 i0=$abc$109383$new_n57977_ i1=$abc$109383$new_n57731_ i2=$abc$109383$new_n57729_ nq=$abc$109383$new_n57978_
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n57979_
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 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29433_ nq=$abc$109383$new_n57982_
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 .subckt nand3_x0 i0=$abc$109383$new_n57983_ i1=$abc$109383$new_n57752_ i2=$abc$109383$new_n57750_ nq=$abc$109383$new_n57984_
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 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29406_ nq=$abc$109383$new_n57987_
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 .subckt nand3_x0 i0=$abc$109383$new_n57988_ i1=$abc$109383$new_n57775_ i2=$abc$109383$new_n57773_ nq=$abc$109383$new_n57989_
-.subckt ao22_x2 i0=$abc$109383$new_n30027_ i1=soc.cpu.minerva.payload__csr_result$117[29] i2=$abc$109383$new_n57979_ q=$abc$109383$new_n57990_
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 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29463_ nq=$abc$109383$new_n57992_
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 .subckt nand3_x0 i0=$abc$109383$new_n57993_ i1=$abc$109383$new_n57797_ i2=$abc$109383$new_n57795_ nq=$abc$109383$new_n57994_
-.subckt ao22_x2 i0=$abc$109383$new_n30027_ i1=soc.cpu.minerva.payload__csr_result$117[30] i2=$abc$109383$new_n57979_ q=$abc$109383$new_n57995_
-.subckt a2_x2 i0=$abc$109383$new_n57995_ i1=$abc$109383$new_n57994_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106898
+.subckt and21nor_x1 i0=$abc$109383$new_n30027_ i1=soc.cpu.minerva.payload__csr_result$117[30] i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n57995_
+.subckt and2_x1 i0=$abc$109383$new_n57995_ i1=$abc$109383$new_n57994_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106898
 .subckt nand2_x0 i0=$abc$109383$new_n52374_ i1=$abc$109383$new_n29492_ nq=$abc$109383$new_n57997_
-.subckt a2_x2 i0=$abc$109383$new_n57997_ i1=$abc$109383$new_n30271_ q=$abc$109383$new_n57998_
+.subckt and2_x1 i0=$abc$109383$new_n57997_ i1=$abc$109383$new_n30271_ q=$abc$109383$new_n57998_
 .subckt nand3_x0 i0=$abc$109383$new_n57998_ i1=$abc$109383$new_n57819_ i2=$abc$109383$new_n57817_ nq=$abc$109383$new_n57999_
-.subckt ao22_x2 i0=$abc$109383$new_n30027_ i1=soc.cpu.minerva.payload__csr_result$117[31] i2=$abc$109383$new_n57979_ q=$abc$109383$new_n58000_
-.subckt a2_x2 i0=$abc$109383$new_n58000_ i1=$abc$109383$new_n57999_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106902
+.subckt and21nor_x1 i0=$abc$109383$new_n30027_ i1=soc.cpu.minerva.payload__csr_result$117[31] i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n58000_
+.subckt and2_x1 i0=$abc$109383$new_n58000_ i1=$abc$109383$new_n57999_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106902
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_we$66 nq=$abc$109383$new_n58002_
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n58002_ nq=$abc$109383$new_n58003_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_we$116 q=$abc$109383$new_n58004_
-.subckt ao22_x2 i0=$abc$109383$new_n58004_ i1=$abc$109383$new_n58003_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106906
-.subckt mx2_x2 cmd=$abc$109383$new_n29816_ i0=soc.cpu.minerva.payload__csr_adr$114[0] i1=soc.cpu.minerva.payload__branch_target$62[0] q=$abc$109383$new_n58006_
-.subckt a2_x2 i0=$abc$109383$new_n58006_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106910
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_we$116 nq=$abc$109383$new_n58004_
+.subckt and21nor_x1 i0=$abc$109383$new_n58004_ i1=$abc$109383$new_n58003_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106906
+.subckt mux2_x1 cmd=$abc$109383$new_n29816_ i0=soc.cpu.minerva.payload__csr_adr$114[0] i1=soc.cpu.minerva.payload__branch_target$62[0] q=$abc$109383$new_n58006_
+.subckt and2_x1 i0=$abc$109383$new_n58006_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106910
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n15328_ nq=$abc$109383$new_n58008_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[1] q=$abc$109383$new_n58009_
-.subckt ao22_x2 i0=$abc$109383$new_n58009_ i1=$abc$109383$new_n58008_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106914
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[1] nq=$abc$109383$new_n58009_
+.subckt and21nor_x1 i0=$abc$109383$new_n58009_ i1=$abc$109383$new_n58008_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106914
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n15398_ nq=$abc$109383$new_n58011_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[2] q=$abc$109383$new_n58012_
-.subckt ao22_x2 i0=$abc$109383$new_n58012_ i1=$abc$109383$new_n58011_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106918
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[2] nq=$abc$109383$new_n58012_
+.subckt and21nor_x1 i0=$abc$109383$new_n58012_ i1=$abc$109383$new_n58011_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106918
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n15335_ nq=$abc$109383$new_n58014_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[3] q=$abc$109383$new_n58015_
-.subckt ao22_x2 i0=$abc$109383$new_n58015_ i1=$abc$109383$new_n58014_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106922
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[3] nq=$abc$109383$new_n58015_
+.subckt and21nor_x1 i0=$abc$109383$new_n58015_ i1=$abc$109383$new_n58014_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106922
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n15310_ nq=$abc$109383$new_n58017_
-.subckt ao22_x2 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[4] q=$abc$109383$new_n58018_
-.subckt ao22_x2 i0=$abc$109383$new_n58018_ i1=$abc$109383$new_n58017_ i2=$abc$109383$new_n57045_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106926
+.subckt and21nor_x1 i0=$abc$109383$new_n57047_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[4] nq=$abc$109383$new_n58018_
+.subckt and21nor_x1 i0=$abc$109383$new_n58018_ i1=$abc$109383$new_n58017_ i2=$abc$109383$new_n57045_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106926
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n58020_
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n15322_ nq=$abc$109383$new_n58021_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n58022_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[5] q=$abc$109383$new_n58023_
-.subckt ao22_x2 i0=$abc$109383$new_n58023_ i1=$abc$109383$new_n58021_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106930
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n57052_ i2=soc.cpu.minerva.payload__csr_adr$114[5] nq=$abc$109383$new_n58023_
+.subckt and21nor_x1 i0=$abc$109383$new_n58023_ i1=$abc$109383$new_n58021_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106930
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[6] nq=$abc$109383$new_n58025_
 .subckt nor3_x0 i0=$abc$109383$new_n57058_ i1=$abc$109383$new_n57056_ i2=$abc$109383$new_n58025_ nq=$abc$109383$new_n58026_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n58027_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[6] q=$abc$109383$new_n58028_
-.subckt ao22_x2 i0=$abc$109383$new_n58028_ i1=$abc$109383$new_n58026_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106934
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[6] nq=$abc$109383$new_n58028_
+.subckt and21nor_x1 i0=$abc$109383$new_n58028_ i1=$abc$109383$new_n58026_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106934
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[7] nq=$abc$109383$new_n58030_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n58031_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58032_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n58033_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58030_ nq=$abc$109383$new_n58034_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[7] q=$abc$109383$new_n58035_
-.subckt ao22_x2 i0=$abc$109383$new_n58035_ i1=$abc$109383$new_n58034_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106938
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[7] nq=$abc$109383$new_n58035_
+.subckt and21nor_x1 i0=$abc$109383$new_n58035_ i1=$abc$109383$new_n58034_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106938
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[8] nq=$abc$109383$new_n58037_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58037_ nq=$abc$109383$new_n58038_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[8] q=$abc$109383$new_n58039_
-.subckt ao22_x2 i0=$abc$109383$new_n58039_ i1=$abc$109383$new_n58038_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106942
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[8] nq=$abc$109383$new_n58039_
+.subckt and21nor_x1 i0=$abc$109383$new_n58039_ i1=$abc$109383$new_n58038_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106942
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[9] nq=$abc$109383$new_n58041_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58041_ nq=$abc$109383$new_n58042_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[9] q=$abc$109383$new_n58043_
-.subckt ao22_x2 i0=$abc$109383$new_n58043_ i1=$abc$109383$new_n58042_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106946
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[9] nq=$abc$109383$new_n58043_
+.subckt and21nor_x1 i0=$abc$109383$new_n58043_ i1=$abc$109383$new_n58042_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106946
 .subckt inv_x0 i=soc.cpu.minerva.payload__csr_adr$65[10] nq=$abc$109383$new_n58045_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58045_ nq=$abc$109383$new_n58046_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[10] q=$abc$109383$new_n58047_
-.subckt ao22_x2 i0=$abc$109383$new_n58047_ i1=$abc$109383$new_n58046_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106950
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[10] nq=$abc$109383$new_n58047_
+.subckt and21nor_x1 i0=$abc$109383$new_n58047_ i1=$abc$109383$new_n58046_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106950
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n15288_ nq=$abc$109383$new_n58049_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[11] q=$abc$109383$new_n58050_
-.subckt ao22_x2 i0=$abc$109383$new_n58050_ i1=$abc$109383$new_n58049_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106954
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr_adr$114[11] nq=$abc$109383$new_n58050_
+.subckt and21nor_x1 i0=$abc$109383$new_n58050_ i1=$abc$109383$new_n58049_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106954
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n57105_ nq=$abc$109383$new_n58052_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr$112 q=$abc$109383$new_n58053_
-.subckt ao22_x2 i0=$abc$109383$new_n58053_ i1=$abc$109383$new_n58052_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106958
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__csr$112 nq=$abc$109383$new_n58053_
+.subckt and21nor_x1 i0=$abc$109383$new_n58053_ i1=$abc$109383$new_n58052_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106958
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_predict_taken$63 nq=$abc$109383$new_n58055_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58055_ nq=$abc$109383$new_n58056_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=$abc$109383$new_n53217_ q=$abc$109383$new_n58057_
-.subckt ao22_x2 i0=$abc$109383$new_n58057_ i1=$abc$109383$new_n58056_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106962
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=$abc$109383$new_n53217_ nq=$abc$109383$new_n58057_
+.subckt and21nor_x1 i0=$abc$109383$new_n58057_ i1=$abc$109383$new_n58056_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106962
 .subckt inv_x0 i=soc.cpu.minerva.payload__branch_target$62[0] nq=$abc$109383$new_n58059_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58060_
 .subckt buf_x4 i=$abc$109383$new_n29200_ q=$abc$109383$new_n58061_
 .subckt buf_x4 i=$abc$109383$new_n57209_ q=$abc$109383$new_n58062_
 .subckt buf_x4 i=soc.cpu.minerva.payload__rs1_re$43 q=$abc$109383$new_n58063_
-.subckt a2_x2 i0=$abc$109383$new_n58063_ i1=$abc$109383$new_n58062_ q=$abc$109383$new_n58064_
+.subckt and2_x1 i0=$abc$109383$new_n58063_ i1=$abc$109383$new_n58062_ q=$abc$109383$new_n58064_
 .subckt nor4_x0 i0=$abc$109383$new_n58064_ i1=$abc$109383$new_n58061_ i2=$abc$109383$new_n58060_ i3=$abc$109383$new_n58059_ nq=$abc$109383$new_n58065_
-.subckt ao22_x2 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__branch_target$109[0] q=$abc$109383$new_n58066_
-.subckt ao22_x2 i0=$abc$109383$new_n58066_ i1=$abc$109383$new_n58065_ i2=$abc$109383$new_n58020_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106966
+.subckt and21nor_x1 i0=$abc$109383$new_n58022_ i1=$abc$109383$new_n58027_ i2=soc.cpu.minerva.payload__branch_target$109[0] nq=$abc$109383$new_n58066_
+.subckt and21nor_x1 i0=$abc$109383$new_n58066_ i1=$abc$109383$new_n58065_ i2=$abc$109383$new_n58020_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$106966
 .subckt buf_x4 i=$abc$109383$new_n29815_ q=$abc$109383$new_n58068_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__rs1_re$43 i1=$abc$109383$new_n57209_ nq=$abc$109383$new_n58069_
 .subckt buf_x4 i=$abc$109383$new_n58069_ q=$abc$109383$new_n58070_
 .subckt nand2_x0 i0=$abc$109383$new_n58070_ i1=soc.cpu.minerva.payload__branch_target$62[1] nq=$abc$109383$new_n58071_
 .subckt nand2_x0 i0=$abc$109383$new_n58071_ i1=$abc$109383$new_n58068_ nq=$abc$109383$new_n58072_
-.subckt oa22_x2 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n58064_ i2=$abc$109383$new_n58072_ q=$abc$109383$new_n58073_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n54518_ q=$abc$109383$new_n58074_
+.subckt or21nand_x1 i0=$abc$109383$new_n52362_ i1=$abc$109383$new_n58064_ i2=$abc$109383$new_n58072_ nq=$abc$109383$new_n58073_
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n54518_ nq=$abc$109383$new_n58074_
 .subckt nor2_x0 i0=$abc$109383$new_n58074_ i1=$abc$109383$new_n28532_ nq=$abc$109383$new_n58075_
-.subckt a2_x2 i0=$abc$109383$new_n58075_ i1=$abc$109383$new_n58073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106970
+.subckt and2_x1 i0=$abc$109383$new_n58075_ i1=$abc$109383$new_n58073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$106970
 .subckt nand2_x0 i0=$abc$109383$new_n58070_ i1=soc.cpu.minerva.payload__branch_target$62[2] nq=$abc$109383$new_n58077_
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 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n58146_
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 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58169_
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 .subckt buf_x4 i=soc.cpu.minerva.payload__rs1_re$43 q=$abc$109383$new_n58192_
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 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n58203_
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-.subckt a2_x2 i0=$abc$109383$new_n58210_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58211_
-.subckt ao22_x2 i0=$abc$109383$new_n52231_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58211_ q=$abc$109383$new_n58212_
-.subckt ao22_x2 i0=$abc$109383$new_n58212_ i1=$abc$109383$new_n58209_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107066
-.subckt ao22_x2 i0=$abc$109383$new_n58170_ i1=$abc$109383$new_n58169_ i2=soc.cpu.minerva.payload__branch_target$109[26] q=$abc$109383$new_n58214_
-.subckt oa22_x2 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[26] q=$abc$109383$new_n58215_
-.subckt a2_x2 i0=$abc$109383$new_n58215_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58216_
-.subckt ao22_x2 i0=$abc$109383$new_n52245_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58216_ q=$abc$109383$new_n58217_
-.subckt ao22_x2 i0=$abc$109383$new_n58217_ i1=$abc$109383$new_n58214_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107070
-.subckt ao22_x2 i0=$abc$109383$new_n58170_ i1=$abc$109383$new_n58169_ i2=soc.cpu.minerva.payload__branch_target$109[27] q=$abc$109383$new_n58219_
-.subckt oa22_x2 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[27] q=$abc$109383$new_n58220_
-.subckt a2_x2 i0=$abc$109383$new_n58220_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58221_
-.subckt ao22_x2 i0=$abc$109383$new_n52260_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58221_ q=$abc$109383$new_n58222_
-.subckt ao22_x2 i0=$abc$109383$new_n58222_ i1=$abc$109383$new_n58219_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107074
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[28] q=$abc$109383$new_n58224_
-.subckt oa22_x2 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[28] q=$abc$109383$new_n58225_
-.subckt a2_x2 i0=$abc$109383$new_n58225_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58226_
-.subckt ao22_x2 i0=$abc$109383$new_n52276_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58226_ q=$abc$109383$new_n58227_
-.subckt ao22_x2 i0=$abc$109383$new_n58227_ i1=$abc$109383$new_n58224_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107078
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[29] q=$abc$109383$new_n58229_
-.subckt oa22_x2 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[29] q=$abc$109383$new_n58230_
-.subckt a2_x2 i0=$abc$109383$new_n58230_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58231_
-.subckt ao22_x2 i0=$abc$109383$new_n52296_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58231_ q=$abc$109383$new_n58232_
-.subckt ao22_x2 i0=$abc$109383$new_n58232_ i1=$abc$109383$new_n58229_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107082
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[30] q=$abc$109383$new_n58234_
-.subckt oa22_x2 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[30] q=$abc$109383$new_n58235_
-.subckt a2_x2 i0=$abc$109383$new_n58235_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58236_
-.subckt ao22_x2 i0=$abc$109383$new_n52310_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58236_ q=$abc$109383$new_n58237_
-.subckt ao22_x2 i0=$abc$109383$new_n58237_ i1=$abc$109383$new_n58234_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107086
-.subckt ao22_x2 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[31] q=$abc$109383$new_n58239_
-.subckt oa22_x2 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[31] q=$abc$109383$new_n58240_
-.subckt a2_x2 i0=$abc$109383$new_n58240_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58241_
-.subckt ao22_x2 i0=$abc$109383$new_n52322_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58241_ q=$abc$109383$new_n58242_
-.subckt ao22_x2 i0=$abc$109383$new_n58242_ i1=$abc$109383$new_n58239_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107090
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__compare$60 i0=$abc$109383$new_n56382_ i1=$abc$109383$new_n52337_ q=$abc$109383$new_n58244_
-.subckt a4_x2 i0=$abc$109383$new_n52313_ i1=$abc$109383$new_n52299_ i2=$abc$109383$new_n52279_ i3=$abc$109383$new_n57758_ q=$abc$109383$new_n58245_
-.subckt a4_x2 i0=$abc$109383$new_n52248_ i1=$abc$109383$new_n52234_ i2=$abc$109383$new_n52221_ i3=$abc$109383$new_n52186_ q=$abc$109383$new_n58246_
-.subckt a4_x2 i0=$abc$109383$new_n58246_ i1=$abc$109383$new_n58245_ i2=$abc$109383$new_n52189_ i3=$abc$109383$new_n52188_ q=$abc$109383$new_n58247_
-.subckt a4_x2 i0=$abc$109383$new_n52050_ i1=$abc$109383$new_n52068_ i2=$abc$109383$new_n52005_ i3=$abc$109383$new_n51995_ q=$abc$109383$new_n58248_
-.subckt nxr2_x1 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29532_ nq=$abc$109383$new_n58249_
-.subckt a4_x2 i0=$abc$109383$new_n52339_ i1=$abc$109383$new_n58249_ i2=$abc$109383$new_n51954_ i3=$abc$109383$new_n51956_ q=$abc$109383$new_n58250_
-.subckt nxr2_x1 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n29421_ nq=$abc$109383$new_n58251_
-.subckt a4_x2 i0=$abc$109383$new_n51905_ i1=$abc$109383$new_n58251_ i2=$abc$109383$new_n52356_ i3=$abc$109383$new_n51875_ q=$abc$109383$new_n58252_
-.subckt a4_x2 i0=$abc$109383$new_n52039_ i1=$abc$109383$new_n52003_ i2=$abc$109383$new_n51970_ i3=$abc$109383$new_n51919_ q=$abc$109383$new_n58253_
-.subckt a4_x2 i0=$abc$109383$new_n58253_ i1=$abc$109383$new_n58252_ i2=$abc$109383$new_n58250_ i3=$abc$109383$new_n58248_ q=$abc$109383$new_n58254_
-.subckt oa22_x2 i0=$abc$109383$new_n58254_ i1=$abc$109383$new_n58247_ i2=$abc$109383$new_n58244_ q=$abc$109383$new_n58255_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__compare$60 i0=$abc$109383$new_n52329_ i1=$abc$109383$new_n52332_ q=$abc$109383$new_n58256_
-.subckt a2_x2 i0=$abc$109383$new_n58246_ i1=$abc$109383$new_n58245_ q=$abc$109383$new_n58257_
-.subckt ao22_x2 i0=$abc$109383$new_n52191_ i1=$abc$109383$new_n52203_ i2=$abc$109383$new_n58257_ q=$abc$109383$new_n58258_
+.subckt and21nor_x1 i0=$abc$109383$new_n58170_ i1=$abc$109383$new_n58169_ i2=soc.cpu.minerva.payload__branch_target$109[24] nq=$abc$109383$new_n58204_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[24] nq=$abc$109383$new_n58205_
+.subckt and2_x1 i0=$abc$109383$new_n58205_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58206_
+.subckt and21nor_x1 i0=$abc$109383$new_n52218_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58206_ nq=$abc$109383$new_n58207_
+.subckt and21nor_x1 i0=$abc$109383$new_n58207_ i1=$abc$109383$new_n58204_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107062
+.subckt and21nor_x1 i0=$abc$109383$new_n58170_ i1=$abc$109383$new_n58169_ i2=soc.cpu.minerva.payload__branch_target$109[25] nq=$abc$109383$new_n58209_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[25] nq=$abc$109383$new_n58210_
+.subckt and2_x1 i0=$abc$109383$new_n58210_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58211_
+.subckt and21nor_x1 i0=$abc$109383$new_n52231_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58211_ nq=$abc$109383$new_n58212_
+.subckt and21nor_x1 i0=$abc$109383$new_n58212_ i1=$abc$109383$new_n58209_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107066
+.subckt and21nor_x1 i0=$abc$109383$new_n58170_ i1=$abc$109383$new_n58169_ i2=soc.cpu.minerva.payload__branch_target$109[26] nq=$abc$109383$new_n58214_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[26] nq=$abc$109383$new_n58215_
+.subckt and2_x1 i0=$abc$109383$new_n58215_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58216_
+.subckt and21nor_x1 i0=$abc$109383$new_n52245_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58216_ nq=$abc$109383$new_n58217_
+.subckt and21nor_x1 i0=$abc$109383$new_n58217_ i1=$abc$109383$new_n58214_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107070
+.subckt and21nor_x1 i0=$abc$109383$new_n58170_ i1=$abc$109383$new_n58169_ i2=soc.cpu.minerva.payload__branch_target$109[27] nq=$abc$109383$new_n58219_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[27] nq=$abc$109383$new_n58220_
+.subckt and2_x1 i0=$abc$109383$new_n58220_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58221_
+.subckt and21nor_x1 i0=$abc$109383$new_n52260_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58221_ nq=$abc$109383$new_n58222_
+.subckt and21nor_x1 i0=$abc$109383$new_n58222_ i1=$abc$109383$new_n58219_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107074
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[28] nq=$abc$109383$new_n58224_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[28] nq=$abc$109383$new_n58225_
+.subckt and2_x1 i0=$abc$109383$new_n58225_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58226_
+.subckt and21nor_x1 i0=$abc$109383$new_n52276_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58226_ nq=$abc$109383$new_n58227_
+.subckt and21nor_x1 i0=$abc$109383$new_n58227_ i1=$abc$109383$new_n58224_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107078
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[29] nq=$abc$109383$new_n58229_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[29] nq=$abc$109383$new_n58230_
+.subckt and2_x1 i0=$abc$109383$new_n58230_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58231_
+.subckt and21nor_x1 i0=$abc$109383$new_n52296_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58231_ nq=$abc$109383$new_n58232_
+.subckt and21nor_x1 i0=$abc$109383$new_n58232_ i1=$abc$109383$new_n58229_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107082
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[30] nq=$abc$109383$new_n58234_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[30] nq=$abc$109383$new_n58235_
+.subckt and2_x1 i0=$abc$109383$new_n58235_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58236_
+.subckt and21nor_x1 i0=$abc$109383$new_n52310_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58236_ nq=$abc$109383$new_n58237_
+.subckt and21nor_x1 i0=$abc$109383$new_n58237_ i1=$abc$109383$new_n58234_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107086
+.subckt and21nor_x1 i0=$abc$109383$new_n29201_ i1=$abc$109383$new_n30049_ i2=soc.cpu.minerva.payload__branch_target$109[31] nq=$abc$109383$new_n58239_
+.subckt or21nand_x1 i0=$abc$109383$new_n58193_ i1=$abc$109383$new_n58192_ i2=soc.cpu.minerva.payload__branch_target$62[31] nq=$abc$109383$new_n58240_
+.subckt and2_x1 i0=$abc$109383$new_n58240_ i1=$abc$109383$new_n34793_ q=$abc$109383$new_n58241_
+.subckt and21nor_x1 i0=$abc$109383$new_n52322_ i1=$abc$109383$new_n58070_ i2=$abc$109383$new_n58241_ nq=$abc$109383$new_n58242_
+.subckt and21nor_x1 i0=$abc$109383$new_n58242_ i1=$abc$109383$new_n58239_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107090
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__compare$60 i0=$abc$109383$new_n56382_ i1=$abc$109383$new_n52337_ q=$abc$109383$new_n58244_
+.subckt and4_x1 i0=$abc$109383$new_n52313_ i1=$abc$109383$new_n52299_ i2=$abc$109383$new_n52279_ i3=$abc$109383$new_n57758_ q=$abc$109383$new_n58245_
+.subckt and4_x1 i0=$abc$109383$new_n52248_ i1=$abc$109383$new_n52234_ i2=$abc$109383$new_n52221_ i3=$abc$109383$new_n52186_ q=$abc$109383$new_n58246_
+.subckt and4_x1 i0=$abc$109383$new_n58246_ i1=$abc$109383$new_n58245_ i2=$abc$109383$new_n52189_ i3=$abc$109383$new_n52188_ q=$abc$109383$new_n58247_
+.subckt and4_x1 i0=$abc$109383$new_n52050_ i1=$abc$109383$new_n52068_ i2=$abc$109383$new_n52005_ i3=$abc$109383$new_n51995_ q=$abc$109383$new_n58248_
+.subckt nexor2_x0 i0=$abc$109383$new_n38535_ i1=$abc$109383$new_n29532_ nq=$abc$109383$new_n58249_
+.subckt and4_x1 i0=$abc$109383$new_n52339_ i1=$abc$109383$new_n58249_ i2=$abc$109383$new_n51954_ i3=$abc$109383$new_n51956_ q=$abc$109383$new_n58250_
+.subckt nexor2_x0 i0=$abc$109383$new_n29498_ i1=$abc$109383$new_n29421_ nq=$abc$109383$new_n58251_
+.subckt and4_x1 i0=$abc$109383$new_n51905_ i1=$abc$109383$new_n58251_ i2=$abc$109383$new_n52356_ i3=$abc$109383$new_n51875_ q=$abc$109383$new_n58252_
+.subckt and4_x1 i0=$abc$109383$new_n52039_ i1=$abc$109383$new_n52003_ i2=$abc$109383$new_n51970_ i3=$abc$109383$new_n51919_ q=$abc$109383$new_n58253_
+.subckt and4_x1 i0=$abc$109383$new_n58253_ i1=$abc$109383$new_n58252_ i2=$abc$109383$new_n58250_ i3=$abc$109383$new_n58248_ q=$abc$109383$new_n58254_
+.subckt or21nand_x1 i0=$abc$109383$new_n58254_ i1=$abc$109383$new_n58247_ i2=$abc$109383$new_n58244_ nq=$abc$109383$new_n58255_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__compare$60 i0=$abc$109383$new_n52329_ i1=$abc$109383$new_n52332_ q=$abc$109383$new_n58256_
+.subckt and2_x1 i0=$abc$109383$new_n58246_ i1=$abc$109383$new_n58245_ q=$abc$109383$new_n58257_
+.subckt and21nor_x1 i0=$abc$109383$new_n52191_ i1=$abc$109383$new_n52203_ i2=$abc$109383$new_n58257_ nq=$abc$109383$new_n58258_
 .subckt nand4_x0 i0=$abc$109383$new_n52313_ i1=$abc$109383$new_n52299_ i2=$abc$109383$new_n52279_ i3=$abc$109383$new_n57758_ nq=$abc$109383$new_n58259_
 .subckt nand2_x0 i0=$abc$109383$new_n52248_ i1=$abc$109383$new_n52234_ nq=$abc$109383$new_n58260_
-.subckt oa22_x2 i0=$abc$109383$new_n52239_ i1=$abc$109383$new_n52240_ i2=$abc$109383$new_n58260_ q=$abc$109383$new_n58261_
-.subckt oa22_x2 i0=$abc$109383$new_n52280_ i1=$abc$109383$new_n58261_ i2=$abc$109383$new_n58259_ q=$abc$109383$new_n58262_
+.subckt or21nand_x1 i0=$abc$109383$new_n52239_ i1=$abc$109383$new_n52240_ i2=$abc$109383$new_n58260_ nq=$abc$109383$new_n58261_
+.subckt or21nand_x1 i0=$abc$109383$new_n52280_ i1=$abc$109383$new_n58261_ i2=$abc$109383$new_n58259_ nq=$abc$109383$new_n58262_
 .subckt nand2_x0 i0=$abc$109383$new_n52313_ i1=$abc$109383$new_n52299_ nq=$abc$109383$new_n58263_
-.subckt oa22_x2 i0=$abc$109383$new_n52304_ i1=$abc$109383$new_n52305_ i2=$abc$109383$new_n58263_ q=$abc$109383$new_n58264_
-.subckt a2_x2 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29756_ q=$abc$109383$new_n58265_
+.subckt or21nand_x1 i0=$abc$109383$new_n52304_ i1=$abc$109383$new_n52305_ i2=$abc$109383$new_n58263_ nq=$abc$109383$new_n58264_
+.subckt and2_x1 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29756_ q=$abc$109383$new_n58265_
 .subckt nand2_x0 i0=$abc$109383$new_n43083_ i1=$abc$109383$new_n29491_ nq=$abc$109383$new_n58266_
-.subckt oa22_x2 i0=$abc$109383$new_n52318_ i1=$abc$109383$new_n58266_ i2=$abc$109383$new_n58265_ q=$abc$109383$new_n58267_
-.subckt a2_x2 i0=$abc$109383$new_n58267_ i1=$abc$109383$new_n58264_ q=$abc$109383$new_n58268_
+.subckt or21nand_x1 i0=$abc$109383$new_n52318_ i1=$abc$109383$new_n58266_ i2=$abc$109383$new_n58265_ nq=$abc$109383$new_n58267_
+.subckt and2_x1 i0=$abc$109383$new_n58267_ i1=$abc$109383$new_n58264_ q=$abc$109383$new_n58268_
 .subckt nand2_x0 i0=$abc$109383$new_n58268_ i1=$abc$109383$new_n58262_ nq=$abc$109383$new_n58269_
-.subckt ao22_x2 i0=$abc$109383$new_n58269_ i1=$abc$109383$new_n58258_ i2=$abc$109383$new_n51911_ q=$abc$109383$new_n58270_
+.subckt and21nor_x1 i0=$abc$109383$new_n58269_ i1=$abc$109383$new_n58258_ i2=$abc$109383$new_n51911_ nq=$abc$109383$new_n58270_
 .subckt nand2_x0 i0=$abc$109383$new_n55112_ i1=$abc$109383$new_n42761_ nq=$abc$109383$new_n58271_
 .subckt nand2_x0 i0=$abc$109383$new_n42753_ i1=$abc$109383$new_n29491_ nq=$abc$109383$new_n58272_
-.subckt a2_x2 i0=$abc$109383$new_n58272_ i1=$abc$109383$new_n51962_ q=$abc$109383$new_n58273_
-.subckt a2_x2 i0=$abc$109383$new_n58273_ i1=$abc$109383$new_n58271_ q=$abc$109383$new_n58274_
+.subckt and2_x1 i0=$abc$109383$new_n58272_ i1=$abc$109383$new_n51962_ q=$abc$109383$new_n58273_
+.subckt and2_x1 i0=$abc$109383$new_n58273_ i1=$abc$109383$new_n58271_ q=$abc$109383$new_n58274_
 .subckt nand2_x0 i0=$abc$109383$new_n55112_ i1=$abc$109383$new_n52319_ nq=$abc$109383$new_n58275_
 .subckt nand2_x0 i0=$abc$109383$new_n52302_ i1=$abc$109383$new_n52300_ nq=$abc$109383$new_n58276_
-.subckt ao22_x2 i0=$abc$109383$new_n58276_ i1=$abc$109383$new_n58275_ i2=$abc$109383$new_n58274_ q=$abc$109383$new_n58277_
-.subckt ao22_x2 i0=$abc$109383$new_n58277_ i1=$abc$109383$new_n58270_ i2=$abc$109383$new_n58256_ q=$abc$109383$new_n58278_
-.subckt o2_x2 i0=$abc$109383$new_n58278_ i1=$abc$109383$new_n58255_ q=$abc$109383$new_n58279_
-.subckt mx2_x2 cmd=soc.cpu.minerva.payload__compare$60 i0=$abc$109383$new_n52326_ i1=$abc$109383$new_n52329_ q=$abc$109383$new_n58280_
+.subckt and21nor_x1 i0=$abc$109383$new_n58276_ i1=$abc$109383$new_n58275_ i2=$abc$109383$new_n58274_ nq=$abc$109383$new_n58277_
+.subckt and21nor_x1 i0=$abc$109383$new_n58277_ i1=$abc$109383$new_n58270_ i2=$abc$109383$new_n58256_ nq=$abc$109383$new_n58278_
+.subckt or2_x1 i0=$abc$109383$new_n58278_ i1=$abc$109383$new_n58255_ q=$abc$109383$new_n58279_
+.subckt mux2_x1 cmd=soc.cpu.minerva.payload__compare$60 i0=$abc$109383$new_n52326_ i1=$abc$109383$new_n52329_ q=$abc$109383$new_n58280_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__compare$60 i1=$abc$109383$new_n52330_ nq=$abc$109383$new_n58281_
 .subckt nand2_x0 i0=$abc$109383$new_n58281_ i1=$abc$109383$new_n52349_ nq=$abc$109383$new_n58282_
 .subckt nand3_x0 i0=$abc$109383$new_n58256_ i1=$abc$109383$new_n58282_ i2=$abc$109383$new_n58280_ nq=$abc$109383$new_n58283_
 .subckt nand3_x0 i0=$abc$109383$new_n52315_ i1=$abc$109383$new_n58265_ i2=$abc$109383$new_n42887_ nq=$abc$109383$new_n58284_
 .subckt nand2_x0 i0=$abc$109383$new_n58284_ i1=$abc$109383$new_n51962_ nq=$abc$109383$new_n58285_
 .subckt nand2_x0 i0=$abc$109383$new_n56227_ i1=$abc$109383$new_n29756_ nq=$abc$109383$new_n58286_
-.subckt o2_x2 i0=$abc$109383$new_n52308_ i1=$abc$109383$new_n52319_ q=$abc$109383$new_n58287_
+.subckt or2_x1 i0=$abc$109383$new_n52308_ i1=$abc$109383$new_n52319_ q=$abc$109383$new_n58287_
 .subckt nand2_x0 i0=$abc$109383$new_n52318_ i1=$abc$109383$new_n58287_ nq=$abc$109383$new_n58288_
-.subckt mx2_x2 cmd=$abc$109383$new_n58288_ i0=$abc$109383$new_n58266_ i1=$abc$109383$new_n58286_ q=$abc$109383$new_n58289_
+.subckt mux2_x1 cmd=$abc$109383$new_n58288_ i0=$abc$109383$new_n58266_ i1=$abc$109383$new_n58286_ q=$abc$109383$new_n58289_
 .subckt nand2_x0 i0=$abc$109383$new_n58289_ i1=$abc$109383$new_n51911_ nq=$abc$109383$new_n58290_
-.subckt a2_x2 i0=$abc$109383$new_n58290_ i1=$abc$109383$new_n58285_ q=$abc$109383$new_n58291_
-.subckt nxr2_x1 i0=$abc$109383$new_n58291_ i1=$abc$109383$new_n52322_ nq=$abc$109383$new_n58292_
-.subckt oa22_x2 i0=$abc$109383$new_n58292_ i1=$abc$109383$new_n58283_ i2=$abc$109383$new_n58279_ q=$abc$109383$new_n58293_
+.subckt and2_x1 i0=$abc$109383$new_n58290_ i1=$abc$109383$new_n58285_ q=$abc$109383$new_n58291_
+.subckt nexor2_x0 i0=$abc$109383$new_n58291_ i1=$abc$109383$new_n52322_ nq=$abc$109383$new_n58292_
+.subckt or21nand_x1 i0=$abc$109383$new_n58292_ i1=$abc$109383$new_n58283_ i2=$abc$109383$new_n58279_ nq=$abc$109383$new_n58293_
 .subckt inv_x0 i=soc.cpu.minerva.payload__compare$60 nq=$abc$109383$new_n58294_
-.subckt mx2_x2 cmd=$abc$109383$new_n58294_ i0=$abc$109383$new_n52337_ i1=$abc$109383$new_n52327_ q=$abc$109383$new_n58295_
+.subckt mux2_x1 cmd=$abc$109383$new_n58294_ i0=$abc$109383$new_n52337_ i1=$abc$109383$new_n52327_ q=$abc$109383$new_n58295_
 .subckt nand3_x0 i0=$abc$109383$new_n58295_ i1=$abc$109383$new_n58247_ i2=$abc$109383$new_n58254_ nq=$abc$109383$new_n58296_
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__compare$60 i1=$abc$109383$new_n52330_ nq=$abc$109383$new_n58297_
-.subckt a2_x2 i0=$abc$109383$new_n58297_ i1=$abc$109383$new_n52349_ q=$abc$109383$new_n58298_
+.subckt and2_x1 i0=$abc$109383$new_n58297_ i1=$abc$109383$new_n52349_ q=$abc$109383$new_n58298_
 .subckt nand2_x0 i0=$abc$109383$new_n58298_ i1=$abc$109383$new_n58296_ nq=$abc$109383$new_n58299_
-.subckt nxr2_x1 i0=$abc$109383$new_n58291_ i1=$abc$109383$new_n57825_ nq=$abc$109383$new_n58300_
-.subckt oa22_x2 i0=$abc$109383$new_n58280_ i1=$abc$109383$new_n58300_ i2=$abc$109383$new_n58299_ q=$abc$109383$new_n58301_
-.subckt ao22_x2 i0=$abc$109383$new_n52337_ i1=soc.cpu.minerva.payload__compare$60 i2=$abc$109383$new_n52334_ q=$abc$109383$new_n58302_
+.subckt nexor2_x0 i0=$abc$109383$new_n58291_ i1=$abc$109383$new_n57825_ nq=$abc$109383$new_n58300_
+.subckt or21nand_x1 i0=$abc$109383$new_n58280_ i1=$abc$109383$new_n58300_ i2=$abc$109383$new_n58299_ nq=$abc$109383$new_n58301_
+.subckt and21nor_x1 i0=$abc$109383$new_n52337_ i1=soc.cpu.minerva.payload__compare$60 i2=$abc$109383$new_n52334_ nq=$abc$109383$new_n58302_
 .subckt nand4_x0 i0=$abc$109383$new_n58302_ i1=$abc$109383$new_n58295_ i2=$abc$109383$new_n58247_ i3=$abc$109383$new_n58254_ nq=$abc$109383$new_n58303_
 .subckt nand3_x0 i0=$abc$109383$new_n57091_ i1=$abc$109383$new_n58294_ i2=$abc$109383$new_n52326_ nq=$abc$109383$new_n58304_
-.subckt oa22_x2 i0=$abc$109383$new_n29491_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n51911_ q=$abc$109383$new_n58305_
-.subckt oa22_x2 i0=$abc$109383$new_n42761_ i1=$abc$109383$new_n55112_ i2=$abc$109383$new_n58305_ q=$abc$109383$new_n58306_
-.subckt a2_x2 i0=$abc$109383$new_n55112_ i1=$abc$109383$new_n52319_ q=$abc$109383$new_n58307_
-.subckt oa22_x2 i0=$abc$109383$new_n52303_ i1=$abc$109383$new_n58307_ i2=$abc$109383$new_n58306_ q=$abc$109383$new_n58308_
-.subckt o2_x2 i0=$abc$109383$new_n58269_ i1=$abc$109383$new_n58258_ q=$abc$109383$new_n58309_
+.subckt or21nand_x1 i0=$abc$109383$new_n29491_ i1=$abc$109383$new_n56227_ i2=$abc$109383$new_n51911_ nq=$abc$109383$new_n58305_
+.subckt or21nand_x1 i0=$abc$109383$new_n42761_ i1=$abc$109383$new_n55112_ i2=$abc$109383$new_n58305_ nq=$abc$109383$new_n58306_
+.subckt and2_x1 i0=$abc$109383$new_n55112_ i1=$abc$109383$new_n52319_ q=$abc$109383$new_n58307_
+.subckt or21nand_x1 i0=$abc$109383$new_n52303_ i1=$abc$109383$new_n58307_ i2=$abc$109383$new_n58306_ nq=$abc$109383$new_n58308_
+.subckt or2_x1 i0=$abc$109383$new_n58269_ i1=$abc$109383$new_n58258_ q=$abc$109383$new_n58309_
 .subckt nand2_x0 i0=$abc$109383$new_n58309_ i1=$abc$109383$new_n51911_ nq=$abc$109383$new_n58310_
-.subckt oa22_x2 i0=$abc$109383$new_n58310_ i1=$abc$109383$new_n58308_ i2=$abc$109383$new_n58304_ q=$abc$109383$new_n58311_
-.subckt a2_x2 i0=$abc$109383$new_n58311_ i1=$abc$109383$new_n58303_ q=$abc$109383$new_n58312_
+.subckt or21nand_x1 i0=$abc$109383$new_n58310_ i1=$abc$109383$new_n58308_ i2=$abc$109383$new_n58304_ nq=$abc$109383$new_n58311_
+.subckt and2_x1 i0=$abc$109383$new_n58311_ i1=$abc$109383$new_n58303_ q=$abc$109383$new_n58312_
 .subckt nand3_x0 i0=$abc$109383$new_n58312_ i1=$abc$109383$new_n58301_ i2=$abc$109383$new_n58293_ nq=$abc$109383$new_n58313_
 .subckt nand3_x0 i0=$abc$109383$new_n58313_ i1=$abc$109383$new_n34794_ i2=soc.cpu.minerva.payload__branch$61 nq=$abc$109383$new_n58314_
-.subckt mx2_x2 cmd=$abc$109383$new_n29222_ i0=$abc$109383$new_n57102_ i1=$abc$109383$new_n53218_ q=$abc$109383$new_n58315_
-.subckt a2_x2 i0=$abc$109383$new_n58315_ i1=$abc$109383$new_n58314_ q=$abc$109383$new_n58316_
+.subckt mux2_x1 cmd=$abc$109383$new_n29222_ i0=$abc$109383$new_n57102_ i1=$abc$109383$new_n53218_ q=$abc$109383$new_n58315_
+.subckt and2_x1 i0=$abc$109383$new_n58315_ i1=$abc$109383$new_n58314_ q=$abc$109383$new_n58316_
 .subckt nor2_x0 i0=$abc$109383$new_n58316_ i1=$abc$109383$new_n52822_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107094
-.subckt mx2_x2 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n58313_ i1=soc.cpu.minerva.payload__condition_met$107 q=$abc$109383$new_n58318_
-.subckt a2_x2 i0=$abc$109383$new_n58318_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107098
+.subckt mux2_x1 cmd=$abc$109383$new_n29875_ i0=$abc$109383$new_n58313_ i1=soc.cpu.minerva.payload__condition_met$107 q=$abc$109383$new_n58318_
+.subckt and2_x1 i0=$abc$109383$new_n58318_ i1=$abc$109383$new_n56497_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107098
 .subckt inv_x0 i=soc.cpu.minerva.payload__mret$69 nq=$abc$109383$new_n58320_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58320_ nq=$abc$109383$new_n58321_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n58322_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58027_ i2=$abc$109383$new_n53224_ q=$abc$109383$new_n58323_
-.subckt ao22_x2 i0=$abc$109383$new_n58323_ i1=$abc$109383$new_n58321_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107102
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58027_ i2=$abc$109383$new_n53224_ nq=$abc$109383$new_n58323_
+.subckt and21nor_x1 i0=$abc$109383$new_n58323_ i1=$abc$109383$new_n58321_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107102
 .subckt inv_x0 i=soc.cpu.minerva.payload__shift$56 nq=$abc$109383$new_n58325_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58325_ nq=$abc$109383$new_n58326_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n58327_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__shift$95 q=$abc$109383$new_n58328_
-.subckt ao22_x2 i0=$abc$109383$new_n58328_ i1=$abc$109383$new_n58326_ i2=$abc$109383$new_n58203_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107106
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__shift$95 nq=$abc$109383$new_n58328_
+.subckt and21nor_x1 i0=$abc$109383$new_n58328_ i1=$abc$109383$new_n58326_ i2=$abc$109383$new_n58203_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107106
 .subckt buf_x4 i=$abc$109383$new_n56542_ q=$abc$109383$new_n58330_
 .subckt nor3_x0 i0=$abc$109383$new_n58033_ i1=$abc$109383$new_n58032_ i2=$abc$109383$new_n58294_ nq=$abc$109383$new_n58331_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__compare$102 q=$abc$109383$new_n58332_
-.subckt ao22_x2 i0=$abc$109383$new_n58332_ i1=$abc$109383$new_n58331_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107110
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__compare$102 nq=$abc$109383$new_n58332_
+.subckt and21nor_x1 i0=$abc$109383$new_n58332_ i1=$abc$109383$new_n58331_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107110
 .subckt inv_x0 i=soc.cpu.minerva.payload__store$51 nq=$abc$109383$new_n58334_
 .subckt nor3_x0 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n58334_ nq=$abc$109383$new_n58335_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__store$99 q=$abc$109383$new_n58336_
-.subckt ao22_x2 i0=$abc$109383$new_n58336_ i1=$abc$109383$new_n58335_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107114
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__store$99 nq=$abc$109383$new_n58336_
+.subckt and21nor_x1 i0=$abc$109383$new_n58336_ i1=$abc$109383$new_n58335_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107114
 .subckt inv_x0 i=soc.cpu.minerva.payload__load$50 nq=$abc$109383$new_n58338_
 .subckt nor3_x0 i0=$abc$109383$new_n29212_ i1=$abc$109383$new_n29210_ i2=$abc$109383$new_n58338_ nq=$abc$109383$new_n58339_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__load$97 q=$abc$109383$new_n58340_
-.subckt ao22_x2 i0=$abc$109383$new_n58340_ i1=$abc$109383$new_n58339_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107118
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__load$97 nq=$abc$109383$new_n58340_
+.subckt and21nor_x1 i0=$abc$109383$new_n58340_ i1=$abc$109383$new_n58339_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107118
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__bypass_m$48 i1=soc.cpu.minerva.payload__bypass_x$47 nq=$abc$109383$new_n58342_
 .subckt nor3_x0 i0=$abc$109383$new_n58342_ i1=$abc$109383$new_n29212_ i2=$abc$109383$new_n29210_ nq=$abc$109383$new_n58343_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__bypass_m$90 q=$abc$109383$new_n58344_
-.subckt ao22_x2 i0=$abc$109383$new_n58344_ i1=$abc$109383$new_n58343_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107122
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__bypass_m$90 nq=$abc$109383$new_n58344_
+.subckt and21nor_x1 i0=$abc$109383$new_n58344_ i1=$abc$109383$new_n58343_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107122
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58346_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n58347_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n15412_ nq=$abc$109383$new_n58348_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__rd_we$88 q=$abc$109383$new_n58349_
-.subckt ao22_x2 i0=$abc$109383$new_n58349_ i1=$abc$109383$new_n58348_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107126
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__rd_we$88 nq=$abc$109383$new_n58349_
+.subckt and21nor_x1 i0=$abc$109383$new_n58349_ i1=$abc$109383$new_n58348_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107126
 .subckt inv_x0 i=soc.cpu.minerva.payload__ebreak$68 nq=$abc$109383$new_n58351_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58351_ nq=$abc$109383$new_n58352_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__ebreak$84 q=$abc$109383$new_n58353_
-.subckt ao22_x2 i0=$abc$109383$new_n58353_ i1=$abc$109383$new_n58352_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107130
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__ebreak$84 nq=$abc$109383$new_n58353_
+.subckt and21nor_x1 i0=$abc$109383$new_n58353_ i1=$abc$109383$new_n58352_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107130
 .subckt inv_x0 i=soc.cpu.minerva.payload__ecall$67 nq=$abc$109383$new_n58355_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58355_ nq=$abc$109383$new_n58356_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__ecall$82 q=$abc$109383$new_n58357_
-.subckt ao22_x2 i0=$abc$109383$new_n58357_ i1=$abc$109383$new_n58356_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107134
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__ecall$82 nq=$abc$109383$new_n58357_
+.subckt and21nor_x1 i0=$abc$109383$new_n58357_ i1=$abc$109383$new_n58356_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107134
 .subckt nand2_x0 i0=$abc$109383$new_n52343_ i1=$abc$109383$new_n52339_ nq=$abc$109383$new_n58359_
 .subckt nand3_x0 i0=$abc$109383$new_n52350_ i1=$abc$109383$new_n52349_ i2=$abc$109383$new_n52338_ nq=$abc$109383$new_n58360_
 .subckt nand2_x0 i0=$abc$109383$new_n58360_ i1=$abc$109383$new_n52336_ nq=$abc$109383$new_n58361_
-.subckt oa22_x2 i0=$abc$109383$new_n58361_ i1=$abc$109383$new_n58359_ i2=$abc$109383$new_n29923_ q=$abc$109383$new_n58362_
+.subckt or21nand_x1 i0=$abc$109383$new_n58361_ i1=$abc$109383$new_n58359_ i2=$abc$109383$new_n29923_ nq=$abc$109383$new_n58362_
 .subckt inv_x0 i=soc.cpu.minerva.payload__loadstore_misaligned$80 nq=$abc$109383$new_n58363_
-.subckt ao22_x2 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n58363_ q=$abc$109383$new_n58364_
+.subckt and21nor_x1 i0=$abc$109383$new_n29217_ i1=$abc$109383$new_n29216_ i2=$abc$109383$new_n58363_ nq=$abc$109383$new_n58364_
 .subckt nor2_x0 i0=$abc$109383$new_n58364_ i1=$abc$109383$new_n28532_ nq=$abc$109383$new_n58365_
-.subckt a2_x2 i0=$abc$109383$new_n58365_ i1=$abc$109383$new_n58362_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107138
+.subckt and2_x1 i0=$abc$109383$new_n58365_ i1=$abc$109383$new_n58362_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107138
 .subckt inv_x0 i=soc.cpu.minerva.payload__illegal$39 nq=$abc$109383$new_n58367_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58367_ nq=$abc$109383$new_n58368_
-.subckt ao22_x2 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=$abc$109383$new_n54668_ q=$abc$109383$new_n58369_
-.subckt ao22_x2 i0=$abc$109383$new_n58369_ i1=$abc$109383$new_n58368_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107142
+.subckt and21nor_x1 i0=$abc$109383$new_n58322_ i1=$abc$109383$new_n58327_ i2=$abc$109383$new_n54668_ nq=$abc$109383$new_n58369_
+.subckt and21nor_x1 i0=$abc$109383$new_n58369_ i1=$abc$109383$new_n58368_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107142
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[0] nq=$abc$109383$new_n58371_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58371_ nq=$abc$109383$new_n58372_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n58373_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__instruction$73[0] q=$abc$109383$new_n58374_
-.subckt ao22_x2 i0=$abc$109383$new_n58374_ i1=$abc$109383$new_n58372_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107146
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58327_ i2=soc.cpu.minerva.payload__instruction$73[0] nq=$abc$109383$new_n58374_
+.subckt and21nor_x1 i0=$abc$109383$new_n58374_ i1=$abc$109383$new_n58372_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107146
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[1] nq=$abc$109383$new_n58376_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58376_ nq=$abc$109383$new_n58377_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n58378_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[1] q=$abc$109383$new_n58379_
-.subckt ao22_x2 i0=$abc$109383$new_n58379_ i1=$abc$109383$new_n58377_ i2=$abc$109383$new_n58330_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107150
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[1] nq=$abc$109383$new_n58379_
+.subckt and21nor_x1 i0=$abc$109383$new_n58379_ i1=$abc$109383$new_n58377_ i2=$abc$109383$new_n58330_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107150
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n58381_
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n58382_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[2] nq=$abc$109383$new_n58383_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58383_ nq=$abc$109383$new_n58384_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[2] q=$abc$109383$new_n58385_
-.subckt ao22_x2 i0=$abc$109383$new_n58385_ i1=$abc$109383$new_n58384_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107154
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[2] nq=$abc$109383$new_n58385_
+.subckt and21nor_x1 i0=$abc$109383$new_n58385_ i1=$abc$109383$new_n58384_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107154
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[3] nq=$abc$109383$new_n58387_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58387_ nq=$abc$109383$new_n58388_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[3] q=$abc$109383$new_n58389_
-.subckt ao22_x2 i0=$abc$109383$new_n58389_ i1=$abc$109383$new_n58388_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107158
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[3] nq=$abc$109383$new_n58389_
+.subckt and21nor_x1 i0=$abc$109383$new_n58389_ i1=$abc$109383$new_n58388_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107158
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[4] nq=$abc$109383$new_n58391_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58391_ nq=$abc$109383$new_n58392_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[4] q=$abc$109383$new_n58393_
-.subckt ao22_x2 i0=$abc$109383$new_n58393_ i1=$abc$109383$new_n58392_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107162
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[4] nq=$abc$109383$new_n58393_
+.subckt and21nor_x1 i0=$abc$109383$new_n58393_ i1=$abc$109383$new_n58392_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107162
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[5] nq=$abc$109383$new_n58395_
 .subckt nor3_x0 i0=$abc$109383$new_n58347_ i1=$abc$109383$new_n58346_ i2=$abc$109383$new_n58395_ nq=$abc$109383$new_n58396_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[5] q=$abc$109383$new_n58397_
-.subckt ao22_x2 i0=$abc$109383$new_n58397_ i1=$abc$109383$new_n58396_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107166
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[5] nq=$abc$109383$new_n58397_
+.subckt and21nor_x1 i0=$abc$109383$new_n58397_ i1=$abc$109383$new_n58396_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107166
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[6] nq=$abc$109383$new_n58399_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58400_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n58401_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58399_ nq=$abc$109383$new_n58402_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[6] q=$abc$109383$new_n58403_
-.subckt ao22_x2 i0=$abc$109383$new_n58403_ i1=$abc$109383$new_n58402_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107170
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[6] nq=$abc$109383$new_n58403_
+.subckt and21nor_x1 i0=$abc$109383$new_n58403_ i1=$abc$109383$new_n58402_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107170
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[7] nq=$abc$109383$new_n58405_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58405_ nq=$abc$109383$new_n58406_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[7] q=$abc$109383$new_n58407_
-.subckt ao22_x2 i0=$abc$109383$new_n58407_ i1=$abc$109383$new_n58406_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107174
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[7] nq=$abc$109383$new_n58407_
+.subckt and21nor_x1 i0=$abc$109383$new_n58407_ i1=$abc$109383$new_n58406_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107174
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n58409_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58409_ nq=$abc$109383$new_n58410_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[8] q=$abc$109383$new_n58411_
-.subckt ao22_x2 i0=$abc$109383$new_n58411_ i1=$abc$109383$new_n58410_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107178
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[8] nq=$abc$109383$new_n58411_
+.subckt and21nor_x1 i0=$abc$109383$new_n58411_ i1=$abc$109383$new_n58410_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107178
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n15414_ nq=$abc$109383$new_n58413_
-.subckt ao22_x2 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[9] q=$abc$109383$new_n58414_
-.subckt ao22_x2 i0=$abc$109383$new_n58414_ i1=$abc$109383$new_n58413_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107182
+.subckt and21nor_x1 i0=$abc$109383$new_n58373_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[9] nq=$abc$109383$new_n58414_
+.subckt and21nor_x1 i0=$abc$109383$new_n58414_ i1=$abc$109383$new_n58413_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107182
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[10] nq=$abc$109383$new_n58416_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58416_ nq=$abc$109383$new_n58417_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n58418_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[10] q=$abc$109383$new_n58419_
-.subckt ao22_x2 i0=$abc$109383$new_n58419_ i1=$abc$109383$new_n58417_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107186
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58378_ i2=soc.cpu.minerva.payload__instruction$73[10] nq=$abc$109383$new_n58419_
+.subckt and21nor_x1 i0=$abc$109383$new_n58419_ i1=$abc$109383$new_n58417_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107186
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[11] nq=$abc$109383$new_n58421_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58421_ nq=$abc$109383$new_n58422_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n58423_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[11] q=$abc$109383$new_n58424_
-.subckt ao22_x2 i0=$abc$109383$new_n58424_ i1=$abc$109383$new_n58422_ i2=$abc$109383$new_n58382_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107190
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[11] nq=$abc$109383$new_n58424_
+.subckt and21nor_x1 i0=$abc$109383$new_n58424_ i1=$abc$109383$new_n58422_ i2=$abc$109383$new_n58382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107190
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n58426_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n52335_ nq=$abc$109383$new_n58427_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[12] q=$abc$109383$new_n58428_
-.subckt ao22_x2 i0=$abc$109383$new_n58428_ i1=$abc$109383$new_n58427_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107194
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[12] nq=$abc$109383$new_n58428_
+.subckt and21nor_x1 i0=$abc$109383$new_n58428_ i1=$abc$109383$new_n58427_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107194
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n52338_ nq=$abc$109383$new_n58430_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[13] q=$abc$109383$new_n58431_
-.subckt ao22_x2 i0=$abc$109383$new_n58431_ i1=$abc$109383$new_n58430_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107198
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[13] nq=$abc$109383$new_n58431_
+.subckt and21nor_x1 i0=$abc$109383$new_n58431_ i1=$abc$109383$new_n58430_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107198
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n58433_
-.subckt mx2_x2 cmd=$abc$109383$new_n29816_ i0=soc.cpu.minerva.payload__instruction$73[14] i1=$abc$109383$new_n55110_ q=$abc$109383$new_n58434_
-.subckt a2_x2 i0=$abc$109383$new_n58434_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107202
+.subckt mux2_x1 cmd=$abc$109383$new_n29816_ i0=soc.cpu.minerva.payload__instruction$73[14] i1=$abc$109383$new_n55110_ q=$abc$109383$new_n58434_
+.subckt and2_x1 i0=$abc$109383$new_n58434_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107202
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[15] nq=$abc$109383$new_n58436_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58436_ nq=$abc$109383$new_n58437_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[15] q=$abc$109383$new_n58438_
-.subckt ao22_x2 i0=$abc$109383$new_n58438_ i1=$abc$109383$new_n58437_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107206
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[15] nq=$abc$109383$new_n58438_
+.subckt and21nor_x1 i0=$abc$109383$new_n58438_ i1=$abc$109383$new_n58437_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107206
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[16] nq=$abc$109383$new_n58440_
 .subckt nor3_x0 i0=$abc$109383$new_n58401_ i1=$abc$109383$new_n58400_ i2=$abc$109383$new_n58440_ nq=$abc$109383$new_n58441_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[16] q=$abc$109383$new_n58442_
-.subckt ao22_x2 i0=$abc$109383$new_n58442_ i1=$abc$109383$new_n58441_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107210
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[16] nq=$abc$109383$new_n58442_
+.subckt and21nor_x1 i0=$abc$109383$new_n58442_ i1=$abc$109383$new_n58441_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107210
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[17] nq=$abc$109383$new_n58444_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58445_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n58446_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58444_ nq=$abc$109383$new_n58447_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[17] q=$abc$109383$new_n58448_
-.subckt ao22_x2 i0=$abc$109383$new_n58448_ i1=$abc$109383$new_n58447_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107214
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[17] nq=$abc$109383$new_n58448_
+.subckt and21nor_x1 i0=$abc$109383$new_n58448_ i1=$abc$109383$new_n58447_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107214
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[18] nq=$abc$109383$new_n58450_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58450_ nq=$abc$109383$new_n58451_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[18] q=$abc$109383$new_n58452_
-.subckt ao22_x2 i0=$abc$109383$new_n58452_ i1=$abc$109383$new_n58451_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107218
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[18] nq=$abc$109383$new_n58452_
+.subckt and21nor_x1 i0=$abc$109383$new_n58452_ i1=$abc$109383$new_n58451_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107218
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[19] nq=$abc$109383$new_n58454_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58454_ nq=$abc$109383$new_n58455_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[19] q=$abc$109383$new_n58456_
-.subckt ao22_x2 i0=$abc$109383$new_n58456_ i1=$abc$109383$new_n58455_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107222
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[19] nq=$abc$109383$new_n58456_
+.subckt and21nor_x1 i0=$abc$109383$new_n58456_ i1=$abc$109383$new_n58455_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107222
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[20] nq=$abc$109383$new_n58458_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58458_ nq=$abc$109383$new_n58459_
-.subckt ao22_x2 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[20] q=$abc$109383$new_n58460_
-.subckt ao22_x2 i0=$abc$109383$new_n58460_ i1=$abc$109383$new_n58459_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107226
+.subckt and21nor_x1 i0=$abc$109383$new_n58418_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[20] nq=$abc$109383$new_n58460_
+.subckt and21nor_x1 i0=$abc$109383$new_n58460_ i1=$abc$109383$new_n58459_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107226
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[21] nq=$abc$109383$new_n58462_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58462_ nq=$abc$109383$new_n58463_
 .subckt buf_x4 i=$abc$109383$new_n56546_ q=$abc$109383$new_n58464_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[21] q=$abc$109383$new_n58465_
-.subckt ao22_x2 i0=$abc$109383$new_n58465_ i1=$abc$109383$new_n58463_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107230
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58423_ i2=soc.cpu.minerva.payload__instruction$73[21] nq=$abc$109383$new_n58465_
+.subckt and21nor_x1 i0=$abc$109383$new_n58465_ i1=$abc$109383$new_n58463_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107230
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[22] nq=$abc$109383$new_n58467_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58467_ nq=$abc$109383$new_n58468_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n58469_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[22] q=$abc$109383$new_n58470_
-.subckt ao22_x2 i0=$abc$109383$new_n58470_ i1=$abc$109383$new_n58468_ i2=$abc$109383$new_n58426_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107234
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[22] nq=$abc$109383$new_n58470_
+.subckt and21nor_x1 i0=$abc$109383$new_n58470_ i1=$abc$109383$new_n58468_ i2=$abc$109383$new_n58426_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107234
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n58472_
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[23] nq=$abc$109383$new_n58473_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58473_ nq=$abc$109383$new_n58474_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[23] q=$abc$109383$new_n58475_
-.subckt ao22_x2 i0=$abc$109383$new_n58475_ i1=$abc$109383$new_n58474_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107238
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[23] nq=$abc$109383$new_n58475_
+.subckt and21nor_x1 i0=$abc$109383$new_n58475_ i1=$abc$109383$new_n58474_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107238
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[24] nq=$abc$109383$new_n58477_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58477_ nq=$abc$109383$new_n58478_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[24] q=$abc$109383$new_n58479_
-.subckt ao22_x2 i0=$abc$109383$new_n58479_ i1=$abc$109383$new_n58478_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107242
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[24] nq=$abc$109383$new_n58479_
+.subckt and21nor_x1 i0=$abc$109383$new_n58479_ i1=$abc$109383$new_n58478_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107242
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[25] nq=$abc$109383$new_n58481_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58481_ nq=$abc$109383$new_n58482_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[25] q=$abc$109383$new_n58483_
-.subckt ao22_x2 i0=$abc$109383$new_n58483_ i1=$abc$109383$new_n58482_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107246
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[25] nq=$abc$109383$new_n58483_
+.subckt and21nor_x1 i0=$abc$109383$new_n58483_ i1=$abc$109383$new_n58482_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107246
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[26] nq=$abc$109383$new_n58485_
 .subckt nor3_x0 i0=$abc$109383$new_n58446_ i1=$abc$109383$new_n58445_ i2=$abc$109383$new_n58485_ nq=$abc$109383$new_n58486_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[26] q=$abc$109383$new_n58487_
-.subckt ao22_x2 i0=$abc$109383$new_n58487_ i1=$abc$109383$new_n58486_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107250
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[26] nq=$abc$109383$new_n58487_
+.subckt and21nor_x1 i0=$abc$109383$new_n58487_ i1=$abc$109383$new_n58486_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107250
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[27] nq=$abc$109383$new_n58489_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n58490_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n58491_
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n58489_ nq=$abc$109383$new_n58492_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[27] q=$abc$109383$new_n58493_
-.subckt ao22_x2 i0=$abc$109383$new_n58493_ i1=$abc$109383$new_n58492_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107254
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[27] nq=$abc$109383$new_n58493_
+.subckt and21nor_x1 i0=$abc$109383$new_n58493_ i1=$abc$109383$new_n58492_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107254
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[28] nq=$abc$109383$new_n58495_
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n58495_ nq=$abc$109383$new_n58496_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[28] q=$abc$109383$new_n58497_
-.subckt ao22_x2 i0=$abc$109383$new_n58497_ i1=$abc$109383$new_n58496_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107258
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[28] nq=$abc$109383$new_n58497_
+.subckt and21nor_x1 i0=$abc$109383$new_n58497_ i1=$abc$109383$new_n58496_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107258
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[29] nq=$abc$109383$new_n58499_
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n58499_ nq=$abc$109383$new_n58500_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[29] q=$abc$109383$new_n58501_
-.subckt ao22_x2 i0=$abc$109383$new_n58501_ i1=$abc$109383$new_n58500_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107262
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[29] nq=$abc$109383$new_n58501_
+.subckt and21nor_x1 i0=$abc$109383$new_n58501_ i1=$abc$109383$new_n58500_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107262
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[30] nq=$abc$109383$new_n58503_
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n58503_ nq=$abc$109383$new_n58504_
-.subckt ao22_x2 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[30] q=$abc$109383$new_n58505_
-.subckt ao22_x2 i0=$abc$109383$new_n58505_ i1=$abc$109383$new_n58504_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107266
+.subckt and21nor_x1 i0=$abc$109383$new_n58464_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[30] nq=$abc$109383$new_n58505_
+.subckt and21nor_x1 i0=$abc$109383$new_n58505_ i1=$abc$109383$new_n58504_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107266
 .subckt inv_x0 i=soc.cpu.minerva.payload__instruction$34[31] nq=$abc$109383$new_n58507_
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n58507_ nq=$abc$109383$new_n58508_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n58509_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[31] q=$abc$109383$new_n58510_
-.subckt ao22_x2 i0=$abc$109383$new_n58510_ i1=$abc$109383$new_n58508_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107270
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n58469_ i2=soc.cpu.minerva.payload__instruction$73[31] nq=$abc$109383$new_n58510_
+.subckt and21nor_x1 i0=$abc$109383$new_n58510_ i1=$abc$109383$new_n58508_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107270
 .subckt buf_x4 i=$abc$109383$new_n29922_ q=$abc$109383$new_n58512_
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__divide$55 q=$abc$109383$new_n58513_
-.subckt a2_x2 i0=$abc$109383$new_n15353_ i1=$abc$109383$new_n15300_ q=$abc$109383$new_n58514_
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__divide$55 nq=$abc$109383$new_n58513_
+.subckt and2_x1 i0=$abc$109383$new_n15353_ i1=$abc$109383$new_n15300_ q=$abc$109383$new_n58514_
 .subckt nor2_x0 i0=$abc$109383$new_n15467_ i1=$abc$109383$new_n53859_ nq=$abc$109383$new_n58515_
-.subckt a2_x2 i0=$abc$109383$new_n58515_ i1=$abc$109383$new_n56524_ q=$abc$109383$new_n58516_
+.subckt and2_x1 i0=$abc$109383$new_n58515_ i1=$abc$109383$new_n56524_ q=$abc$109383$new_n58516_
 .subckt nor4_x0 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n54000_ i2=$abc$109383$new_n15263_ i3=$abc$109383$new_n53915_ nq=$abc$109383$new_n58517_
-.subckt a4_x2 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ i3=$abc$109383$new_n15349_ q=$abc$109383$new_n58518_
-.subckt a3_x2 i0=$abc$109383$new_n58518_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n58519_
-.subckt ao22_x2 i0=$abc$109383$new_n58519_ i1=$abc$109383$new_n58513_ i2=$abc$109383$new_n58472_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107274
+.subckt and4_x1 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ i3=$abc$109383$new_n15349_ q=$abc$109383$new_n58518_
+.subckt and3_x1 i0=$abc$109383$new_n58518_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n58519_
+.subckt and21nor_x1 i0=$abc$109383$new_n58519_ i1=$abc$109383$new_n58513_ i2=$abc$109383$new_n58472_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107274
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n58521_
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__multiply$54 q=$abc$109383$new_n58522_
-.subckt a4_x2 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ i3=$abc$109383$new_n30289_ q=$abc$109383$new_n58523_
-.subckt a3_x2 i0=$abc$109383$new_n58523_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n58524_
-.subckt ao22_x2 i0=$abc$109383$new_n58524_ i1=$abc$109383$new_n58522_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107278
-.subckt o3_x2 i0=soc.cpu.minerva.payload__instruction$28[3] i1=$abc$109383$new_n15265_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n58526_
-.subckt o4_x2 i0=$abc$109383$new_n30276_ i1=$abc$109383$new_n58526_ i2=$abc$109383$new_n15346_ i3=$abc$109383$new_n56523_ q=$abc$109383$new_n58527_
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__multiply$54 nq=$abc$109383$new_n58522_
+.subckt and4_x1 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ i3=$abc$109383$new_n30289_ q=$abc$109383$new_n58523_
+.subckt and3_x1 i0=$abc$109383$new_n58523_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n58524_
+.subckt and21nor_x1 i0=$abc$109383$new_n58524_ i1=$abc$109383$new_n58522_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107278
+.subckt or3_x1 i0=soc.cpu.minerva.payload__instruction$28[3] i1=$abc$109383$new_n15265_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n58526_
+.subckt or4_x1 i0=$abc$109383$new_n30276_ i1=$abc$109383$new_n58526_ i2=$abc$109383$new_n15346_ i3=$abc$109383$new_n56523_ q=$abc$109383$new_n58527_
 .subckt buf_x4 i=$abc$109383$new_n15355_ q=$abc$109383$new_n58528_
-.subckt a3_x2 i0=$abc$109383$new_n58515_ i1=$abc$109383$new_n56524_ i2=$abc$109383$new_n15495_ q=$abc$109383$new_n58529_
+.subckt and3_x1 i0=$abc$109383$new_n58515_ i1=$abc$109383$new_n56524_ i2=$abc$109383$new_n15495_ q=$abc$109383$new_n58529_
 .subckt buf_x4 i=$abc$109383$new_n58529_ q=$abc$109383$new_n58530_
 .subckt nor2_x0 i0=$abc$109383$new_n52650_ i1=soc.cpu.minerva.csrf_rp__addr[10] nq=$abc$109383$new_n58531_
-.subckt a2_x2 i0=$abc$109383$new_n15263_ i1=$abc$109383$new_n53915_ q=$abc$109383$new_n58532_
+.subckt and2_x1 i0=$abc$109383$new_n15263_ i1=$abc$109383$new_n53915_ q=$abc$109383$new_n58532_
 .subckt nor4_x0 i0=$abc$109383$new_n15384_ i1=$abc$109383$new_n17628_ i2=soc.cpu.minerva.csrf_rp__addr[1] i3=$abc$109383$new_n15425_ nq=$abc$109383$new_n58533_
-.subckt a3_x2 i0=$abc$109383$new_n58533_ i1=$abc$109383$new_n58532_ i2=$abc$109383$new_n58531_ q=$abc$109383$new_n58534_
+.subckt and3_x1 i0=$abc$109383$new_n58533_ i1=$abc$109383$new_n58532_ i2=$abc$109383$new_n58531_ q=$abc$109383$new_n58534_
 .subckt buf_x4 i=$abc$109383$new_n58534_ q=$abc$109383$new_n58535_
 .subckt buf_x4 i=$abc$109383$new_n58535_ q=$abc$109383$new_n58536_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[0] nq=$abc$109383$new_n58537_
 .subckt nand2_x0 i0=$abc$109383$new_n58537_ i1=$abc$109383$new_n58528_ nq=$abc$109383$new_n58538_
 .subckt nor4_x0 i0=$abc$109383$new_n15467_ i1=$abc$109383$new_n53859_ i2=$abc$109383$new_n15321_ i3=$abc$109383$new_n15495_ nq=$abc$109383$new_n58539_
-.subckt a3_x2 i0=$abc$109383$new_n58539_ i1=$abc$109383$new_n58532_ i2=$abc$109383$new_n58531_ q=$abc$109383$new_n58540_
+.subckt and3_x1 i0=$abc$109383$new_n58539_ i1=$abc$109383$new_n58532_ i2=$abc$109383$new_n58531_ q=$abc$109383$new_n58540_
 .subckt buf_x4 i=$abc$109383$new_n58540_ q=$abc$109383$new_n58541_
 .subckt buf_x4 i=$abc$109383$new_n58541_ q=$abc$109383$new_n58542_
 .subckt nor2_x0 i0=$abc$109383$new_n15384_ i1=$abc$109383$new_n17628_ nq=$abc$109383$new_n58543_
-.subckt a3_x2 i0=$abc$109383$new_n58543_ i1=$abc$109383$new_n15332_ i2=$abc$109383$new_n15425_ q=$abc$109383$new_n58544_
+.subckt and3_x1 i0=$abc$109383$new_n58543_ i1=$abc$109383$new_n15332_ i2=$abc$109383$new_n15425_ q=$abc$109383$new_n58544_
 .subckt buf_x4 i=$abc$109383$new_n58544_ q=$abc$109383$new_n58545_
-.subckt a3_x2 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[0] q=$abc$109383$new_n58546_
+.subckt and3_x1 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[0] q=$abc$109383$new_n58546_
 .subckt buf_x4 i=$abc$109383$new_n58540_ q=$abc$109383$new_n58547_
-.subckt a4_x2 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n17628_ i2=$abc$109383$new_n15332_ i3=$abc$109383$new_n18217_ q=$abc$109383$new_n58548_
-.subckt a3_x2 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58547_ i2=soc.cpu.minerva.exception.mtvec__r__mode[0] q=$abc$109383$new_n58549_
-.subckt o2_x2 i0=$abc$109383$new_n58549_ i1=$abc$109383$new_n58546_ q=$abc$109383$new_n58550_
-.subckt a2_x2 i0=$abc$109383$new_n58532_ i1=$abc$109383$new_n58531_ q=$abc$109383$new_n58551_
+.subckt and4_x1 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n17628_ i2=$abc$109383$new_n15332_ i3=$abc$109383$new_n18217_ q=$abc$109383$new_n58548_
+.subckt and3_x1 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58547_ i2=soc.cpu.minerva.exception.mtvec__r__mode[0] q=$abc$109383$new_n58549_
+.subckt or2_x1 i0=$abc$109383$new_n58549_ i1=$abc$109383$new_n58546_ q=$abc$109383$new_n58550_
+.subckt and2_x1 i0=$abc$109383$new_n58532_ i1=$abc$109383$new_n58531_ q=$abc$109383$new_n58551_
 .subckt nor2_x0 i0=$abc$109383$new_n15321_ i1=$abc$109383$new_n15495_ nq=$abc$109383$new_n58552_
-.subckt a2_x2 i0=$abc$109383$new_n15367_ i1=$abc$109383$new_n53859_ q=$abc$109383$new_n58553_
-.subckt a4_x2 i0=$abc$109383$new_n58553_ i1=$abc$109383$new_n58552_ i2=$abc$109383$new_n58533_ i3=$abc$109383$new_n58551_ q=$abc$109383$new_n58554_
+.subckt and2_x1 i0=$abc$109383$new_n15367_ i1=$abc$109383$new_n53859_ q=$abc$109383$new_n58553_
+.subckt and4_x1 i0=$abc$109383$new_n58553_ i1=$abc$109383$new_n58552_ i2=$abc$109383$new_n58533_ i3=$abc$109383$new_n58551_ q=$abc$109383$new_n58554_
 .subckt buf_x4 i=$abc$109383$new_n58554_ q=$abc$109383$new_n58555_
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[0] nq=$abc$109383$new_n58556_
-.subckt a3_x2 i0=$abc$109383$new_n58543_ i1=$abc$109383$new_n17576_ i2=$abc$109383$new_n15379_ q=$abc$109383$new_n58557_
-.subckt a4_x2 i0=$abc$109383$new_n58557_ i1=$abc$109383$new_n58553_ i2=$abc$109383$new_n58552_ i3=$abc$109383$new_n58551_ q=$abc$109383$new_n58558_
+.subckt and3_x1 i0=$abc$109383$new_n58543_ i1=$abc$109383$new_n17576_ i2=$abc$109383$new_n15379_ q=$abc$109383$new_n58557_
+.subckt and4_x1 i0=$abc$109383$new_n58557_ i1=$abc$109383$new_n58553_ i2=$abc$109383$new_n58552_ i3=$abc$109383$new_n58551_ q=$abc$109383$new_n58558_
 .subckt buf_x4 i=$abc$109383$new_n58558_ q=$abc$109383$new_n58559_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[0] nq=$abc$109383$new_n58560_
 .subckt buf_x4 i=$abc$109383$new_n58551_ q=$abc$109383$new_n58561_
 .subckt buf_x4 i=$abc$109383$new_n58533_ q=$abc$109383$new_n58562_
-.subckt a2_x2 i0=$abc$109383$new_n58562_ i1=$abc$109383$new_n15317_ q=$abc$109383$new_n58563_
-.subckt a4_x2 i0=$abc$109383$new_n58563_ i1=$abc$109383$new_n58553_ i2=$abc$109383$new_n58561_ i3=$abc$109383$new_n56524_ q=$abc$109383$new_n58564_
+.subckt and2_x1 i0=$abc$109383$new_n58562_ i1=$abc$109383$new_n15317_ q=$abc$109383$new_n58563_
+.subckt and4_x1 i0=$abc$109383$new_n58563_ i1=$abc$109383$new_n58553_ i2=$abc$109383$new_n58561_ i3=$abc$109383$new_n56524_ q=$abc$109383$new_n58564_
 .subckt nand2_x0 i0=$abc$109383$new_n58564_ i1=soc.cpu.minerva.exception.irq_pending__r__value[0] nq=$abc$109383$new_n58565_
-.subckt a3_x2 i0=$abc$109383$new_n58543_ i1=$abc$109383$new_n17576_ i2=$abc$109383$new_n18217_ q=$abc$109383$new_n58566_
-.subckt a4_x2 i0=$abc$109383$new_n58566_ i1=$abc$109383$new_n58553_ i2=$abc$109383$new_n58552_ i3=$abc$109383$new_n58561_ q=$abc$109383$new_n58567_
+.subckt and3_x1 i0=$abc$109383$new_n58543_ i1=$abc$109383$new_n17576_ i2=$abc$109383$new_n18217_ q=$abc$109383$new_n58566_
+.subckt and4_x1 i0=$abc$109383$new_n58566_ i1=$abc$109383$new_n58553_ i2=$abc$109383$new_n58552_ i3=$abc$109383$new_n58561_ q=$abc$109383$new_n58567_
 .subckt nand2_x0 i0=$abc$109383$new_n58567_ i1=soc.cpu.minerva.exception.mtval__r__value[0] nq=$abc$109383$new_n58568_
 .subckt nand4_x0 i0=$abc$109383$new_n58568_ i1=$abc$109383$new_n58565_ i2=$abc$109383$new_n58560_ i3=$abc$109383$new_n58556_ nq=$abc$109383$new_n58569_
 .subckt nor3_x0 i0=$abc$109383$new_n58569_ i1=$abc$109383$new_n58550_ i2=$abc$109383$new_n58538_ nq=$abc$109383$new_n58570_
 .subckt buf_x4 i=$abc$109383$new_n15316_ q=$abc$109383$new_n58571_
 .subckt nand2_x0 i0=$abc$109383$new_n58562_ i1=$abc$109383$new_n15317_ nq=$abc$109383$new_n58572_
 .subckt nand3_x0 i0=$abc$109383$new_n58572_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n54007_ nq=$abc$109383$new_n58573_
-.subckt nxr2_x1 i0=$abc$109383$new_n18217_ i1=soc.cpu.minerva.payload__instruction$34[7] nq=$abc$109383$new_n58574_
+.subckt nexor2_x0 i0=$abc$109383$new_n18217_ i1=soc.cpu.minerva.payload__instruction$34[7] nq=$abc$109383$new_n58574_
 .subckt nor3_x0 i0=$abc$109383$new_n15432_ i1=$abc$109383$new_n15429_ i2=$abc$109383$new_n15415_ nq=$abc$109383$new_n58575_
-.subckt a3_x2 i0=$abc$109383$new_n58575_ i1=$abc$109383$new_n58574_ i2=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n58576_
+.subckt and3_x1 i0=$abc$109383$new_n58575_ i1=$abc$109383$new_n58574_ i2=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n58576_
 .subckt buf_x4 i=$abc$109383$new_n58576_ q=$abc$109383$new_n58577_
-.subckt ao22_x2 i0=$abc$109383$new_n57075_ i1=$abc$109383$new_n57096_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n58578_
-.subckt o2_x2 i0=$abc$109383$new_n58578_ i1=$abc$109383$new_n58573_ q=$abc$109383$new_n58579_
+.subckt and21nor_x1 i0=$abc$109383$new_n57075_ i1=$abc$109383$new_n57096_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n58578_
+.subckt or2_x1 i0=$abc$109383$new_n58578_ i1=$abc$109383$new_n58573_ q=$abc$109383$new_n58579_
 .subckt nand3_x0 i0=$abc$109383$new_n58575_ i1=$abc$109383$new_n58574_ i2=soc.cpu.minerva.d.valid$1 nq=$abc$109383$new_n58580_
 .subckt nand4_x0 i0=$abc$109383$new_n15501_ i1=$abc$109383$new_n15496_ i2=$abc$109383$new_n15494_ i3=soc.cpu.minerva.x.valid$1 nq=$abc$109383$new_n58581_
 .subckt buf_x4 i=$abc$109383$new_n58581_ q=$abc$109383$new_n58582_
 .subckt inv_x0 i=soc.cpu.minerva.payload__condition_met$107 nq=$abc$109383$new_n58583_
-.subckt a2_x2 i0=soc.cpu.minerva.payload__compare$102 i1=$abc$109383$new_n58583_ q=$abc$109383$new_n58584_
+.subckt and2_x1 i0=soc.cpu.minerva.payload__compare$102 i1=$abc$109383$new_n58583_ q=$abc$109383$new_n58584_
 .subckt nand2_x0 i0=$abc$109383$new_n56557_ i1=$abc$109383$new_n56556_ nq=$abc$109383$new_n58585_
-.subckt a2_x2 i0=$abc$109383$new_n58585_ i1=$abc$109383$new_n56575_ q=$abc$109383$new_n58586_
+.subckt and2_x1 i0=$abc$109383$new_n58585_ i1=$abc$109383$new_n56575_ q=$abc$109383$new_n58586_
 .subckt nand2_x0 i0=$abc$109383$new_n56562_ i1=$abc$109383$new_n56563_ nq=$abc$109383$new_n58587_
-.subckt oa22_x2 i0=$abc$109383$new_n58587_ i1=$abc$109383$new_n58586_ i2=$abc$109383$new_n58584_ q=$abc$109383$new_n58588_
-.subckt ao22_x2 i0=$abc$109383$new_n58588_ i1=$abc$109383$new_n58582_ i2=$abc$109383$new_n58580_ q=$abc$109383$new_n58589_
-.subckt a4_x2 i0=$abc$109383$new_n15501_ i1=$abc$109383$new_n15496_ i2=$abc$109383$new_n15494_ i3=soc.cpu.minerva.x.valid$1 q=$abc$109383$new_n58590_
+.subckt or21nand_x1 i0=$abc$109383$new_n58587_ i1=$abc$109383$new_n58586_ i2=$abc$109383$new_n58584_ nq=$abc$109383$new_n58588_
+.subckt and21nor_x1 i0=$abc$109383$new_n58588_ i1=$abc$109383$new_n58582_ i2=$abc$109383$new_n58580_ nq=$abc$109383$new_n58589_
+.subckt and4_x1 i0=$abc$109383$new_n15501_ i1=$abc$109383$new_n15496_ i2=$abc$109383$new_n15494_ i3=soc.cpu.minerva.x.valid$1 q=$abc$109383$new_n58590_
 .subckt buf_x4 i=$abc$109383$new_n58590_ q=$abc$109383$new_n58591_
 .subckt inv_x0 i=soc.cpu.minerva.payload__rd_we$125 nq=$abc$109383$new_n58592_
-.subckt oa22_x2 i0=$abc$109383$new_n20445_ i1=$abc$109383$new_n20759_ i2=$abc$109383$new_n58592_ q=$abc$109383$new_n58593_
+.subckt or21nand_x1 i0=$abc$109383$new_n20445_ i1=$abc$109383$new_n20759_ i2=$abc$109383$new_n58592_ nq=$abc$109383$new_n58593_
 .subckt nand2_x0 i0=$abc$109383$new_n20302_ i1=$abc$109383$new_n15425_ nq=$abc$109383$new_n58594_
 .subckt nand2_x0 i0=$abc$109383$new_n20495_ i1=$abc$109383$new_n15384_ nq=$abc$109383$new_n58595_
-.subckt ao22_x2 i0=$abc$109383$new_n15425_ i1=$abc$109383$new_n20302_ i2=soc.cpu.minerva.m.valid$1 q=$abc$109383$new_n58596_
-.subckt nxr2_x1 i0=$abc$109383$new_n19822_ i1=soc.cpu.minerva.csrf_rp__addr[1] nq=$abc$109383$new_n58597_
+.subckt and21nor_x1 i0=$abc$109383$new_n15425_ i1=$abc$109383$new_n20302_ i2=soc.cpu.minerva.m.valid$1 nq=$abc$109383$new_n58596_
+.subckt nexor2_x0 i0=$abc$109383$new_n19822_ i1=soc.cpu.minerva.csrf_rp__addr[1] nq=$abc$109383$new_n58597_
 .subckt nand4_x0 i0=$abc$109383$new_n58597_ i1=$abc$109383$new_n58596_ i2=$abc$109383$new_n58595_ i3=$abc$109383$new_n58594_ nq=$abc$109383$new_n58598_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__rd$123[3] i1=$abc$109383$new_n15337_ nq=$abc$109383$new_n58599_
 .subckt nand2_x0 i0=$abc$109383$new_n20494_ i1=soc.cpu.minerva.csrf_rp__addr[2] nq=$abc$109383$new_n58600_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__rd$123[2] i1=$abc$109383$new_n15378_ nq=$abc$109383$new_n58601_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__rd$123[4] i1=$abc$109383$new_n15495_ nq=$abc$109383$new_n58602_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__rd$123[4] i1=$abc$109383$new_n15495_ nq=$abc$109383$new_n58602_
 .subckt nand4_x0 i0=$abc$109383$new_n58602_ i1=$abc$109383$new_n58601_ i2=$abc$109383$new_n58600_ i3=$abc$109383$new_n58599_ nq=$abc$109383$new_n58603_
-.subckt o3_x2 i0=$abc$109383$new_n58603_ i1=$abc$109383$new_n58598_ i2=$abc$109383$new_n58593_ q=$abc$109383$new_n58604_
+.subckt or3_x1 i0=$abc$109383$new_n58603_ i1=$abc$109383$new_n58598_ i2=$abc$109383$new_n58593_ q=$abc$109383$new_n58604_
 .subckt buf_x4 i=$abc$109383$new_n58604_ q=$abc$109383$new_n58605_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[0] nq=$abc$109383$new_n58606_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[0] nq=$abc$109383$new_n58607_
-.subckt a2_x2 i0=soc.cpu.minerva.gprf.mem.collision[1] i1=soc.cpu.minerva.gprf.mem.fwd_wp_en q=$abc$109383$new_n58608_
+.subckt and2_x1 i0=soc.cpu.minerva.gprf.mem.collision[1] i1=soc.cpu.minerva.gprf.mem.fwd_wp_en q=$abc$109383$new_n58608_
 .subckt buf_x4 i=$abc$109383$new_n58608_ q=$abc$109383$new_n58609_
 .subckt buf_x4 i=$abc$109383$new_n58609_ q=$abc$109383$new_n58610_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=$abc$109383$new_n58607_ i1=$abc$109383$new_n58606_ q=$abc$109383$new_n58611_
-.subckt oa22_x2 i0=$abc$109383$new_n58611_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ q=$abc$109383$new_n58612_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=$abc$109383$new_n58607_ i1=$abc$109383$new_n58606_ q=$abc$109383$new_n58611_
+.subckt or21nand_x1 i0=$abc$109383$new_n58611_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ nq=$abc$109383$new_n58612_
 .subckt nor3_x0 i0=$abc$109383$new_n58603_ i1=$abc$109383$new_n58598_ i2=$abc$109383$new_n58593_ nq=$abc$109383$new_n58613_
 .subckt buf_x4 i=$abc$109383$new_n58613_ q=$abc$109383$new_n58614_
 .subckt buf_x4 i=$abc$109383$new_n58614_ q=$abc$109383$new_n58615_
 .subckt nor2_x0 i0=$abc$109383$new_n19869_ i1=$abc$109383$new_n19863_ nq=$abc$109383$new_n58616_
-.subckt oa22_x2 i0=$abc$109383$new_n58616_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58612_ q=$abc$109383$new_n58617_
-.subckt oa22_x2 i0=$abc$109383$new_n58617_ i1=$abc$109383$new_n58589_ i2=$abc$109383$new_n58579_ q=$abc$109383$new_n58618_
+.subckt or21nand_x1 i0=$abc$109383$new_n58616_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58612_ nq=$abc$109383$new_n58617_
+.subckt or21nand_x1 i0=$abc$109383$new_n58617_ i1=$abc$109383$new_n58589_ i2=$abc$109383$new_n58579_ nq=$abc$109383$new_n58618_
 .subckt nand4_x0 i0=$abc$109383$new_n15354_ i1=$abc$109383$new_n15353_ i2=$abc$109383$new_n15330_ i3=$abc$109383$new_n15293_ nq=$abc$109383$new_n58619_
-.subckt a2_x2 i0=$abc$109383$new_n58619_ i1=$abc$109383$new_n15402_ q=$abc$109383$new_n58620_
-.subckt oa22_x2 i0=$abc$109383$new_n58620_ i1=$abc$109383$new_n58618_ i2=$abc$109383$new_n58570_ q=$abc$109383$new_n58621_
-.subckt a2_x2 i0=$abc$109383$new_n58621_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58622_
+.subckt and2_x1 i0=$abc$109383$new_n58619_ i1=$abc$109383$new_n15402_ q=$abc$109383$new_n58620_
+.subckt or21nand_x1 i0=$abc$109383$new_n58620_ i1=$abc$109383$new_n58618_ i2=$abc$109383$new_n58570_ nq=$abc$109383$new_n58621_
+.subckt and2_x1 i0=$abc$109383$new_n58621_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58622_
 .subckt nand3_x0 i0=$abc$109383$new_n58527_ i1=$abc$109383$new_n18170_ i2=$abc$109383$new_n29194_ nq=$abc$109383$new_n58623_
 .subckt nand2_x0 i0=$abc$109383$new_n15403_ i1=$abc$109383$new_n15402_ nq=$abc$109383$new_n58624_
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n58625_
 .subckt nand3_x0 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n58624_ i2=$abc$109383$new_n40103_ nq=$abc$109383$new_n58626_
-.subckt oa22_x2 i0=$abc$109383$new_n58626_ i1=$abc$109383$new_n58623_ i2=$abc$109383$new_n58622_ q=$abc$109383$new_n58627_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29435_ q=$abc$109383$new_n58628_
+.subckt or21nand_x1 i0=$abc$109383$new_n58626_ i1=$abc$109383$new_n58623_ i2=$abc$109383$new_n58622_ nq=$abc$109383$new_n58627_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29435_ nq=$abc$109383$new_n58628_
 .subckt nand2_x0 i0=$abc$109383$new_n58628_ i1=$abc$109383$new_n58627_ nq=$abc$109383$new_n58629_
-.subckt a2_x2 i0=$abc$109383$new_n58629_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107282
+.subckt and2_x1 i0=$abc$109383$new_n58629_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107282
 .subckt nand3_x0 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[1] nq=$abc$109383$new_n58631_
 .subckt buf_x4 i=$abc$109383$new_n58529_ q=$abc$109383$new_n58632_
 .subckt nand3_x0 i0=$abc$109383$new_n58535_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[1] nq=$abc$109383$new_n58633_
 .subckt buf_x4 i=$abc$109383$new_n58541_ q=$abc$109383$new_n58634_
 .subckt nand3_x0 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.mtvec__r__mode[1] nq=$abc$109383$new_n58635_
-.subckt a4_x2 i0=$abc$109383$new_n58635_ i1=$abc$109383$new_n58633_ i2=$abc$109383$new_n58631_ i3=$abc$109383$new_n15355_ q=$abc$109383$new_n58636_
+.subckt and4_x1 i0=$abc$109383$new_n58635_ i1=$abc$109383$new_n58633_ i2=$abc$109383$new_n58631_ i3=$abc$109383$new_n15355_ q=$abc$109383$new_n58636_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[1] nq=$abc$109383$new_n58637_
 .subckt nand2_x0 i0=$abc$109383$new_n58564_ i1=soc.cpu.minerva.exception.irq_pending__r__value[1] nq=$abc$109383$new_n58638_
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[1] nq=$abc$109383$new_n58639_
 .subckt nand2_x0 i0=$abc$109383$new_n58567_ i1=soc.cpu.minerva.exception.mtval__r__value[1] nq=$abc$109383$new_n58640_
-.subckt a4_x2 i0=$abc$109383$new_n58640_ i1=$abc$109383$new_n58639_ i2=$abc$109383$new_n58638_ i3=$abc$109383$new_n58637_ q=$abc$109383$new_n58641_
-.subckt a2_x2 i0=$abc$109383$new_n58641_ i1=$abc$109383$new_n58636_ q=$abc$109383$new_n58642_
+.subckt and4_x1 i0=$abc$109383$new_n58640_ i1=$abc$109383$new_n58639_ i2=$abc$109383$new_n58638_ i3=$abc$109383$new_n58637_ q=$abc$109383$new_n58641_
+.subckt and2_x1 i0=$abc$109383$new_n58641_ i1=$abc$109383$new_n58636_ q=$abc$109383$new_n58642_
 .subckt buf_x4 i=$abc$109383$new_n58590_ q=$abc$109383$new_n58643_
 .subckt nand2_x0 i0=$abc$109383$new_n56574_ i1=$abc$109383$new_n56576_ nq=$abc$109383$new_n58644_
-.subckt oa22_x2 i0=$abc$109383$new_n58644_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n58645_
+.subckt or21nand_x1 i0=$abc$109383$new_n58644_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n58645_
 .subckt buf_x4 i=$abc$109383$new_n58581_ q=$abc$109383$new_n58646_
 .subckt buf_x4 i=$abc$109383$new_n58613_ q=$abc$109383$new_n58647_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[1] nq=$abc$109383$new_n58648_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[1] nq=$abc$109383$new_n58649_
 .subckt buf_x4 i=$abc$109383$new_n58609_ q=$abc$109383$new_n58650_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=$abc$109383$new_n58649_ i1=$abc$109383$new_n58648_ q=$abc$109383$new_n58651_
-.subckt ao22_x2 i0=$abc$109383$new_n58651_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n58652_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=$abc$109383$new_n58649_ i1=$abc$109383$new_n58648_ q=$abc$109383$new_n58651_
+.subckt and21nor_x1 i0=$abc$109383$new_n58651_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n58652_
 .subckt buf_x4 i=$abc$109383$new_n58605_ q=$abc$109383$new_n58653_
-.subckt oa22_x2 i0=$abc$109383$new_n19894_ i1=$abc$109383$new_n19897_ i2=$abc$109383$new_n58653_ q=$abc$109383$new_n58654_
-.subckt oa22_x2 i0=$abc$109383$new_n58654_ i1=$abc$109383$new_n58652_ i2=$abc$109383$new_n58645_ q=$abc$109383$new_n58655_
+.subckt or21nand_x1 i0=$abc$109383$new_n19894_ i1=$abc$109383$new_n19897_ i2=$abc$109383$new_n58653_ nq=$abc$109383$new_n58654_
+.subckt or21nand_x1 i0=$abc$109383$new_n58654_ i1=$abc$109383$new_n58652_ i2=$abc$109383$new_n58645_ nq=$abc$109383$new_n58655_
 .subckt buf_x4 i=$abc$109383$new_n58576_ q=$abc$109383$new_n58656_
 .subckt nand3_x0 i0=$abc$109383$new_n58656_ i1=$abc$109383$new_n57126_ i2=$abc$109383$new_n57107_ nq=$abc$109383$new_n58657_
-.subckt oa22_x2 i0=$abc$109383$new_n58657_ i1=$abc$109383$new_n58655_ i2=$abc$109383$new_n58573_ q=$abc$109383$new_n58658_
-.subckt ao22_x2 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58619_ q=$abc$109383$new_n58659_
-.subckt oa22_x2 i0=$abc$109383$new_n58659_ i1=$abc$109383$new_n58658_ i2=$abc$109383$new_n58642_ q=$abc$109383$new_n58660_
-.subckt a2_x2 i0=$abc$109383$new_n58660_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58661_
+.subckt or21nand_x1 i0=$abc$109383$new_n58657_ i1=$abc$109383$new_n58655_ i2=$abc$109383$new_n58573_ nq=$abc$109383$new_n58658_
+.subckt and21nor_x1 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58619_ nq=$abc$109383$new_n58659_
+.subckt or21nand_x1 i0=$abc$109383$new_n58659_ i1=$abc$109383$new_n58658_ i2=$abc$109383$new_n58642_ nq=$abc$109383$new_n58660_
+.subckt and2_x1 i0=$abc$109383$new_n58660_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58661_
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n58662_
 .subckt nand3_x0 i0=$abc$109383$new_n58662_ i1=$abc$109383$new_n15473_ i2=$abc$109383$new_n35098_ nq=$abc$109383$new_n58663_
-.subckt oa22_x2 i0=$abc$109383$new_n58623_ i1=$abc$109383$new_n58663_ i2=$abc$109383$new_n58661_ q=$abc$109383$new_n58664_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29438_ q=$abc$109383$new_n58665_
+.subckt or21nand_x1 i0=$abc$109383$new_n58623_ i1=$abc$109383$new_n58663_ i2=$abc$109383$new_n58661_ nq=$abc$109383$new_n58664_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29438_ nq=$abc$109383$new_n58665_
 .subckt nand2_x0 i0=$abc$109383$new_n58665_ i1=$abc$109383$new_n58664_ nq=$abc$109383$new_n58666_
-.subckt a2_x2 i0=$abc$109383$new_n58666_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107286
+.subckt and2_x1 i0=$abc$109383$new_n58666_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107286
 .subckt buf_x4 i=$abc$109383$new_n15355_ q=$abc$109383$new_n58668_
 .subckt buf_x4 i=$abc$109383$new_n58668_ q=$abc$109383$new_n58669_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[2] nq=$abc$109383$new_n58670_
@@ -43947,10 +43947,10 @@
 .subckt nand3_x0 i0=$abc$109383$new_n58672_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.misa__r__extensions[2] nq=$abc$109383$new_n58673_
 .subckt buf_x4 i=$abc$109383$new_n58548_ q=$abc$109383$new_n58674_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.mtvec__r__base[0] nq=$abc$109383$new_n58675_
-.subckt a4_x2 i0=$abc$109383$new_n58675_ i1=$abc$109383$new_n58673_ i2=$abc$109383$new_n58670_ i3=$abc$109383$new_n58669_ q=$abc$109383$new_n58676_
+.subckt and4_x1 i0=$abc$109383$new_n58675_ i1=$abc$109383$new_n58673_ i2=$abc$109383$new_n58670_ i3=$abc$109383$new_n58669_ q=$abc$109383$new_n58676_
 .subckt buf_x4 i=$abc$109383$new_n58554_ q=$abc$109383$new_n58677_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[2] nq=$abc$109383$new_n58678_
-.subckt a4_x2 i0=$abc$109383$new_n58553_ i1=$abc$109383$new_n58544_ i2=$abc$109383$new_n58552_ i3=$abc$109383$new_n58551_ q=$abc$109383$new_n58679_
+.subckt and4_x1 i0=$abc$109383$new_n58553_ i1=$abc$109383$new_n58544_ i2=$abc$109383$new_n58552_ i3=$abc$109383$new_n58551_ q=$abc$109383$new_n58679_
 .subckt buf_x4 i=$abc$109383$new_n58679_ q=$abc$109383$new_n58680_
 .subckt buf_x4 i=$abc$109383$new_n58680_ q=$abc$109383$new_n58681_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[0] nq=$abc$109383$new_n58682_
@@ -43958,163 +43958,163 @@
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[2] nq=$abc$109383$new_n58684_
 .subckt buf_x4 i=$abc$109383$new_n58567_ q=$abc$109383$new_n58685_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[2] nq=$abc$109383$new_n58686_
-.subckt a4_x2 i0=$abc$109383$new_n58686_ i1=$abc$109383$new_n58684_ i2=$abc$109383$new_n58682_ i3=$abc$109383$new_n58678_ q=$abc$109383$new_n58687_
+.subckt and4_x1 i0=$abc$109383$new_n58686_ i1=$abc$109383$new_n58684_ i2=$abc$109383$new_n58682_ i3=$abc$109383$new_n58678_ q=$abc$109383$new_n58687_
 .subckt nand2_x0 i0=$abc$109383$new_n58687_ i1=$abc$109383$new_n58676_ nq=$abc$109383$new_n58688_
-.subckt oa22_x2 i0=$abc$109383$new_n17628_ i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n58689_
-.subckt mx2_x2 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[2] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[2] q=$abc$109383$new_n58690_
-.subckt oa22_x2 i0=$abc$109383$new_n58690_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ q=$abc$109383$new_n58691_
+.subckt or21nand_x1 i0=$abc$109383$new_n17628_ i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n58528_ nq=$abc$109383$new_n58689_
+.subckt mux2_x1 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[2] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[2] q=$abc$109383$new_n58690_
+.subckt or21nand_x1 i0=$abc$109383$new_n58690_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ nq=$abc$109383$new_n58691_
 .subckt buf_x4 i=$abc$109383$new_n58613_ q=$abc$109383$new_n58692_
-.subckt oa22_x2 i0=$abc$109383$new_n19916_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58691_ q=$abc$109383$new_n58693_
+.subckt or21nand_x1 i0=$abc$109383$new_n19916_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58691_ nq=$abc$109383$new_n58693_
 .subckt nand2_x0 i0=$abc$109383$new_n56586_ i1=$abc$109383$new_n56576_ nq=$abc$109383$new_n58694_
 .subckt nand2_x0 i0=$abc$109383$new_n58643_ i1=$abc$109383$new_n58694_ nq=$abc$109383$new_n58695_
-.subckt a2_x2 i0=$abc$109383$new_n58695_ i1=$abc$109383$new_n58580_ q=$abc$109383$new_n58696_
-.subckt a2_x2 i0=$abc$109383$new_n58696_ i1=$abc$109383$new_n58693_ q=$abc$109383$new_n58697_
-.subckt a2_x2 i0=$abc$109383$new_n58656_ i1=$abc$109383$new_n57151_ q=$abc$109383$new_n58698_
-.subckt o2_x2 i0=$abc$109383$new_n58698_ i1=$abc$109383$new_n58697_ q=$abc$109383$new_n58699_
-.subckt a3_x2 i0=$abc$109383$new_n58572_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n54007_ q=$abc$109383$new_n58700_
+.subckt and2_x1 i0=$abc$109383$new_n58695_ i1=$abc$109383$new_n58580_ q=$abc$109383$new_n58696_
+.subckt and2_x1 i0=$abc$109383$new_n58696_ i1=$abc$109383$new_n58693_ q=$abc$109383$new_n58697_
+.subckt and2_x1 i0=$abc$109383$new_n58656_ i1=$abc$109383$new_n57151_ q=$abc$109383$new_n58698_
+.subckt or2_x1 i0=$abc$109383$new_n58698_ i1=$abc$109383$new_n58697_ q=$abc$109383$new_n58699_
+.subckt and3_x1 i0=$abc$109383$new_n58572_ i1=$abc$109383$new_n15316_ i2=$abc$109383$new_n54007_ q=$abc$109383$new_n58700_
 .subckt buf_x4 i=$abc$109383$new_n58700_ q=$abc$109383$new_n58701_
-.subckt oa22_x2 i0=$abc$109383$new_n58701_ i1=$abc$109383$new_n58699_ i2=$abc$109383$new_n58689_ q=$abc$109383$new_n58702_
+.subckt or21nand_x1 i0=$abc$109383$new_n58701_ i1=$abc$109383$new_n58699_ i2=$abc$109383$new_n58689_ nq=$abc$109383$new_n58702_
 .subckt nand2_x0 i0=$abc$109383$new_n58702_ i1=$abc$109383$new_n58688_ nq=$abc$109383$new_n58703_
-.subckt a2_x2 i0=$abc$109383$new_n58703_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58704_
+.subckt and2_x1 i0=$abc$109383$new_n58703_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58704_
 .subckt nand3_x0 i0=$abc$109383$new_n58662_ i1=$abc$109383$new_n53262_ i2=$abc$109383$new_n35098_ nq=$abc$109383$new_n58705_
-.subckt oa22_x2 i0=$abc$109383$new_n58623_ i1=$abc$109383$new_n58705_ i2=$abc$109383$new_n58704_ q=$abc$109383$new_n58706_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29264_ q=$abc$109383$new_n58707_
+.subckt or21nand_x1 i0=$abc$109383$new_n58623_ i1=$abc$109383$new_n58705_ i2=$abc$109383$new_n58704_ nq=$abc$109383$new_n58706_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29264_ nq=$abc$109383$new_n58707_
 .subckt nand2_x0 i0=$abc$109383$new_n58707_ i1=$abc$109383$new_n58706_ nq=$abc$109383$new_n58708_
-.subckt a2_x2 i0=$abc$109383$new_n58708_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107290
+.subckt and2_x1 i0=$abc$109383$new_n58708_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107290
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[3] nq=$abc$109383$new_n58710_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[1] nq=$abc$109383$new_n58711_
 .subckt nand2_x0 i0=$abc$109383$new_n58567_ i1=soc.cpu.minerva.exception.mtval__r__value[3] nq=$abc$109383$new_n58712_
-.subckt a3_x2 i0=$abc$109383$new_n58712_ i1=$abc$109383$new_n58711_ i2=$abc$109383$new_n58710_ q=$abc$109383$new_n58713_
+.subckt and3_x1 i0=$abc$109383$new_n58712_ i1=$abc$109383$new_n58711_ i2=$abc$109383$new_n58710_ q=$abc$109383$new_n58713_
 .subckt nand3_x0 i0=$abc$109383$new_n58541_ i1=$abc$109383$new_n58562_ i2=soc.cpu.minerva.exception.mstatus__r__mie nq=$abc$109383$new_n58714_
 .subckt nand3_x0 i0=$abc$109383$new_n58544_ i1=$abc$109383$new_n58541_ i2=soc.cpu.minerva.exception.misa__r__extensions[3] nq=$abc$109383$new_n58715_
 .subckt nor2_x0 i0=$abc$109383$new_n17576_ i1=$abc$109383$new_n18217_ nq=$abc$109383$new_n58716_
-.subckt a3_x2 i0=$abc$109383$new_n58716_ i1=$abc$109383$new_n15337_ i2=$abc$109383$new_n17628_ q=$abc$109383$new_n58717_
+.subckt and3_x1 i0=$abc$109383$new_n58716_ i1=$abc$109383$new_n15337_ i2=$abc$109383$new_n17628_ q=$abc$109383$new_n58717_
 .subckt nand3_x0 i0=$abc$109383$new_n58717_ i1=$abc$109383$new_n58541_ i2=soc.cpu.minerva.exception.mie__r__msie nq=$abc$109383$new_n58718_
 .subckt nand3_x0 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58547_ i2=soc.cpu.minerva.exception.mtvec__r__base[1] nq=$abc$109383$new_n58719_
-.subckt a4_x2 i0=$abc$109383$new_n58719_ i1=$abc$109383$new_n58718_ i2=$abc$109383$new_n58715_ i3=$abc$109383$new_n58714_ q=$abc$109383$new_n58720_
+.subckt and4_x1 i0=$abc$109383$new_n58719_ i1=$abc$109383$new_n58718_ i2=$abc$109383$new_n58715_ i3=$abc$109383$new_n58714_ q=$abc$109383$new_n58720_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[3] nq=$abc$109383$new_n58721_
 .subckt nand3_x0 i0=$abc$109383$new_n58535_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[3] nq=$abc$109383$new_n58722_
-.subckt a2_x2 i0=$abc$109383$new_n58722_ i1=$abc$109383$new_n15355_ q=$abc$109383$new_n58723_
-.subckt a3_x2 i0=$abc$109383$new_n58723_ i1=$abc$109383$new_n58721_ i2=$abc$109383$new_n58720_ q=$abc$109383$new_n58724_
-.subckt a2_x2 i0=$abc$109383$new_n58724_ i1=$abc$109383$new_n58713_ q=$abc$109383$new_n58725_
+.subckt and2_x1 i0=$abc$109383$new_n58722_ i1=$abc$109383$new_n15355_ q=$abc$109383$new_n58723_
+.subckt and3_x1 i0=$abc$109383$new_n58723_ i1=$abc$109383$new_n58721_ i2=$abc$109383$new_n58720_ q=$abc$109383$new_n58724_
+.subckt and2_x1 i0=$abc$109383$new_n58724_ i1=$abc$109383$new_n58713_ q=$abc$109383$new_n58725_
 .subckt buf_x4 i=$abc$109383$new_n58576_ q=$abc$109383$new_n58726_
 .subckt nand2_x0 i0=$abc$109383$new_n56596_ i1=$abc$109383$new_n56576_ nq=$abc$109383$new_n58727_
-.subckt oa22_x2 i0=$abc$109383$new_n58727_ i1=$abc$109383$new_n58591_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n58728_
+.subckt or21nand_x1 i0=$abc$109383$new_n58727_ i1=$abc$109383$new_n58591_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n58728_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[3] nq=$abc$109383$new_n58729_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[3] nq=$abc$109383$new_n58730_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=$abc$109383$new_n58730_ i1=$abc$109383$new_n58729_ q=$abc$109383$new_n58731_
-.subckt ao22_x2 i0=$abc$109383$new_n58731_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ q=$abc$109383$new_n58732_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n52568_ q=$abc$109383$new_n58733_
-.subckt oa22_x2 i0=$abc$109383$new_n58733_ i1=$abc$109383$new_n58732_ i2=$abc$109383$new_n58728_ q=$abc$109383$new_n58734_
-.subckt oa22_x2 i0=$abc$109383$new_n57155_ i1=$abc$109383$new_n57171_ i2=$abc$109383$new_n58580_ q=$abc$109383$new_n58735_
-.subckt oa22_x2 i0=$abc$109383$new_n58735_ i1=$abc$109383$new_n58734_ i2=$abc$109383$new_n58573_ q=$abc$109383$new_n58736_
-.subckt ao22_x2 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58619_ q=$abc$109383$new_n58737_
-.subckt oa22_x2 i0=$abc$109383$new_n58737_ i1=$abc$109383$new_n58736_ i2=$abc$109383$new_n58725_ q=$abc$109383$new_n58738_
-.subckt a2_x2 i0=$abc$109383$new_n58738_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58739_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=$abc$109383$new_n58730_ i1=$abc$109383$new_n58729_ q=$abc$109383$new_n58731_
+.subckt and21nor_x1 i0=$abc$109383$new_n58731_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ nq=$abc$109383$new_n58732_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n52568_ q=$abc$109383$new_n58733_
+.subckt or21nand_x1 i0=$abc$109383$new_n58733_ i1=$abc$109383$new_n58732_ i2=$abc$109383$new_n58728_ nq=$abc$109383$new_n58734_
+.subckt or21nand_x1 i0=$abc$109383$new_n57155_ i1=$abc$109383$new_n57171_ i2=$abc$109383$new_n58580_ nq=$abc$109383$new_n58735_
+.subckt or21nand_x1 i0=$abc$109383$new_n58735_ i1=$abc$109383$new_n58734_ i2=$abc$109383$new_n58573_ nq=$abc$109383$new_n58736_
+.subckt and21nor_x1 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58619_ nq=$abc$109383$new_n58737_
+.subckt or21nand_x1 i0=$abc$109383$new_n58737_ i1=$abc$109383$new_n58736_ i2=$abc$109383$new_n58725_ nq=$abc$109383$new_n58738_
+.subckt and2_x1 i0=$abc$109383$new_n58738_ i1=$abc$109383$new_n58527_ q=$abc$109383$new_n58739_
 .subckt nand3_x0 i0=$abc$109383$new_n58662_ i1=$abc$109383$new_n53294_ i2=$abc$109383$new_n35098_ nq=$abc$109383$new_n58740_
-.subckt oa22_x2 i0=$abc$109383$new_n58623_ i1=$abc$109383$new_n58740_ i2=$abc$109383$new_n58739_ q=$abc$109383$new_n58741_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29250_ q=$abc$109383$new_n58742_
+.subckt or21nand_x1 i0=$abc$109383$new_n58623_ i1=$abc$109383$new_n58740_ i2=$abc$109383$new_n58739_ nq=$abc$109383$new_n58741_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n29250_ nq=$abc$109383$new_n58742_
 .subckt nand2_x0 i0=$abc$109383$new_n58742_ i1=$abc$109383$new_n58741_ nq=$abc$109383$new_n58743_
-.subckt a2_x2 i0=$abc$109383$new_n58743_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107294
+.subckt and2_x1 i0=$abc$109383$new_n58743_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107294
 .subckt nor4_x0 i0=$abc$109383$new_n30276_ i1=$abc$109383$new_n58526_ i2=$abc$109383$new_n15346_ i3=$abc$109383$new_n56523_ nq=$abc$109383$new_n58745_
 .subckt buf_x4 i=$abc$109383$new_n58745_ q=$abc$109383$new_n58746_
 .subckt buf_x4 i=$abc$109383$new_n58619_ q=$abc$109383$new_n58747_
-.subckt a3_x2 i0=$abc$109383$new_n58672_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.misa__r__extensions[4] q=$abc$109383$new_n58748_
-.subckt a3_x2 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[4] q=$abc$109383$new_n58749_
+.subckt and3_x1 i0=$abc$109383$new_n58672_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.misa__r__extensions[4] q=$abc$109383$new_n58748_
+.subckt and3_x1 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[4] q=$abc$109383$new_n58749_
 .subckt buf_x4 i=$abc$109383$new_n58547_ q=$abc$109383$new_n58750_
-.subckt a3_x2 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.mtvec__r__base[2] q=$abc$109383$new_n58751_
+.subckt and3_x1 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.mtvec__r__base[2] q=$abc$109383$new_n58751_
 .subckt nor4_x0 i0=$abc$109383$new_n58751_ i1=$abc$109383$new_n58749_ i2=$abc$109383$new_n58748_ i3=$abc$109383$new_n58747_ nq=$abc$109383$new_n58752_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[2] nq=$abc$109383$new_n58753_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[4] nq=$abc$109383$new_n58754_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[4] nq=$abc$109383$new_n58755_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[4] nq=$abc$109383$new_n58756_
-.subckt a4_x2 i0=$abc$109383$new_n58756_ i1=$abc$109383$new_n58755_ i2=$abc$109383$new_n58754_ i3=$abc$109383$new_n58753_ q=$abc$109383$new_n58757_
-.subckt a2_x2 i0=$abc$109383$new_n58757_ i1=$abc$109383$new_n58752_ q=$abc$109383$new_n58758_
+.subckt and4_x1 i0=$abc$109383$new_n58756_ i1=$abc$109383$new_n58755_ i2=$abc$109383$new_n58754_ i3=$abc$109383$new_n58753_ q=$abc$109383$new_n58757_
+.subckt and2_x1 i0=$abc$109383$new_n58757_ i1=$abc$109383$new_n58752_ q=$abc$109383$new_n58758_
 .subckt buf_x4 i=$abc$109383$new_n58619_ q=$abc$109383$new_n58759_
-.subckt ao22_x2 i0=$abc$109383$new_n15317_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n58760_
+.subckt and21nor_x1 i0=$abc$109383$new_n15317_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n58760_
 .subckt buf_x4 i=$abc$109383$new_n58605_ q=$abc$109383$new_n58761_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[4] nq=$abc$109383$new_n58762_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[4] nq=$abc$109383$new_n58763_
 .subckt buf_x4 i=$abc$109383$new_n58609_ q=$abc$109383$new_n58764_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=$abc$109383$new_n58763_ i1=$abc$109383$new_n58762_ q=$abc$109383$new_n58765_
-.subckt oa22_x2 i0=$abc$109383$new_n58765_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58643_ q=$abc$109383$new_n58766_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=$abc$109383$new_n58763_ i1=$abc$109383$new_n58762_ q=$abc$109383$new_n58765_
+.subckt or21nand_x1 i0=$abc$109383$new_n58765_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58643_ nq=$abc$109383$new_n58766_
 .subckt nand2_x0 i0=$abc$109383$new_n19940_ i1=$abc$109383$new_n19919_ nq=$abc$109383$new_n58767_
 .subckt nand2_x0 i0=$abc$109383$new_n19943_ i1=$abc$109383$new_n52579_ nq=$abc$109383$new_n58768_
 .subckt nand3_x0 i0=$abc$109383$new_n19875_ i1=soc.cpu.minerva.payload__load_data$132[4] i2=$abc$109383$new_n19873_ nq=$abc$109383$new_n58769_
-.subckt a2_x2 i0=$abc$109383$new_n19948_ i1=$abc$109383$new_n19877_ q=$abc$109383$new_n58770_
-.subckt o2_x2 i0=$abc$109383$new_n19952_ i1=$abc$109383$new_n19843_ q=$abc$109383$new_n58771_
-.subckt ao22_x2 i0=$abc$109383$new_n58771_ i1=$abc$109383$new_n58770_ i2=$abc$109383$new_n58769_ q=$abc$109383$new_n58772_
-.subckt ao22_x2 i0=$abc$109383$new_n58772_ i1=$abc$109383$new_n58768_ i2=$abc$109383$new_n58767_ q=$abc$109383$new_n58773_
-.subckt oa22_x2 i0=$abc$109383$new_n58773_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58766_ q=$abc$109383$new_n58774_
-.subckt a2_x2 i0=$abc$109383$new_n56605_ i1=$abc$109383$new_n56576_ q=$abc$109383$new_n58775_
+.subckt and2_x1 i0=$abc$109383$new_n19948_ i1=$abc$109383$new_n19877_ q=$abc$109383$new_n58770_
+.subckt or2_x1 i0=$abc$109383$new_n19952_ i1=$abc$109383$new_n19843_ q=$abc$109383$new_n58771_
+.subckt and21nor_x1 i0=$abc$109383$new_n58771_ i1=$abc$109383$new_n58770_ i2=$abc$109383$new_n58769_ nq=$abc$109383$new_n58772_
+.subckt and21nor_x1 i0=$abc$109383$new_n58772_ i1=$abc$109383$new_n58768_ i2=$abc$109383$new_n58767_ nq=$abc$109383$new_n58773_
+.subckt or21nand_x1 i0=$abc$109383$new_n58773_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58766_ nq=$abc$109383$new_n58774_
+.subckt and2_x1 i0=$abc$109383$new_n56605_ i1=$abc$109383$new_n56576_ q=$abc$109383$new_n58775_
 .subckt buf_x4 i=$abc$109383$new_n58591_ q=$abc$109383$new_n58776_
 .subckt nand2_x0 i0=$abc$109383$new_n58776_ i1=$abc$109383$new_n58775_ nq=$abc$109383$new_n58777_
-.subckt a2_x2 i0=$abc$109383$new_n58777_ i1=$abc$109383$new_n58580_ q=$abc$109383$new_n58778_
-.subckt oa22_x2 i0=$abc$109383$new_n58778_ i1=$abc$109383$new_n58774_ i2=$abc$109383$new_n58573_ q=$abc$109383$new_n58779_
+.subckt and2_x1 i0=$abc$109383$new_n58777_ i1=$abc$109383$new_n58580_ q=$abc$109383$new_n58778_
+.subckt or21nand_x1 i0=$abc$109383$new_n58778_ i1=$abc$109383$new_n58774_ i2=$abc$109383$new_n58573_ nq=$abc$109383$new_n58779_
 .subckt buf_x4 i=$abc$109383$new_n58656_ q=$abc$109383$new_n58780_
-.subckt a2_x2 i0=$abc$109383$new_n58780_ i1=$abc$109383$new_n57202_ q=$abc$109383$new_n58781_
-.subckt ao22_x2 i0=$abc$109383$new_n58781_ i1=$abc$109383$new_n58779_ i2=$abc$109383$new_n58760_ q=$abc$109383$new_n58782_
+.subckt and2_x1 i0=$abc$109383$new_n58780_ i1=$abc$109383$new_n57202_ q=$abc$109383$new_n58781_
+.subckt and21nor_x1 i0=$abc$109383$new_n58781_ i1=$abc$109383$new_n58779_ i2=$abc$109383$new_n58760_ nq=$abc$109383$new_n58782_
 .subckt nor3_x0 i0=$abc$109383$new_n58782_ i1=$abc$109383$new_n58758_ i2=$abc$109383$new_n58746_ nq=$abc$109383$new_n58783_
-.subckt a2_x2 i0=$abc$109383$new_n58746_ i1=$abc$109383$new_n15313_ q=$abc$109383$new_n58784_
+.subckt and2_x1 i0=$abc$109383$new_n58746_ i1=$abc$109383$new_n15313_ q=$abc$109383$new_n58784_
 .subckt nor4_x0 i0=$abc$109383$new_n58784_ i1=$abc$109383$new_n58783_ i2=$abc$109383$new_n30152_ i3=$abc$109383$new_n29942_ nq=$abc$109383$new_n58785_
-.subckt oa22_x2 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n29837_ q=$abc$109383$new_n58786_
+.subckt or21nand_x1 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n29837_ nq=$abc$109383$new_n58786_
 .subckt nand2_x0 i0=$abc$109383$new_n58786_ i1=$abc$109383$new_n28536_ nq=$abc$109383$new_n58787_
 .subckt nor2_x0 i0=$abc$109383$new_n58787_ i1=$abc$109383$new_n58785_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107298
 .subckt nand3_x0 i0=$abc$109383$new_n58672_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.misa__r__extensions[5] nq=$abc$109383$new_n58789_
 .subckt buf_x4 i=$abc$109383$new_n58553_ q=$abc$109383$new_n58790_
-.subckt a3_x2 i0=$abc$109383$new_n58552_ i1=$abc$109383$new_n58532_ i2=$abc$109383$new_n58531_ q=$abc$109383$new_n58791_
+.subckt and3_x1 i0=$abc$109383$new_n58552_ i1=$abc$109383$new_n58532_ i2=$abc$109383$new_n58531_ q=$abc$109383$new_n58791_
 .subckt buf_x4 i=$abc$109383$new_n58791_ q=$abc$109383$new_n58792_
 .subckt nand3_x0 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58557_ i2=$abc$109383$new_n58790_ nq=$abc$109383$new_n58793_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mcause__r__ecode[5] nq=$abc$109383$new_n58794_
-.subckt ao22_x2 i0=$abc$109383$new_n58794_ i1=$abc$109383$new_n58793_ i2=$abc$109383$new_n58789_ q=$abc$109383$new_n58795_
+.subckt and21nor_x1 i0=$abc$109383$new_n58794_ i1=$abc$109383$new_n58793_ i2=$abc$109383$new_n58789_ nq=$abc$109383$new_n58795_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[5] nq=$abc$109383$new_n58796_
 .subckt nand3_x0 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58790_ i2=$abc$109383$new_n58562_ nq=$abc$109383$new_n58797_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mscratch__r__value[5] nq=$abc$109383$new_n58798_
-.subckt ao22_x2 i0=$abc$109383$new_n58798_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58796_ q=$abc$109383$new_n58799_
+.subckt and21nor_x1 i0=$abc$109383$new_n58798_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58796_ nq=$abc$109383$new_n58799_
 .subckt nand3_x0 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58790_ i2=$abc$109383$new_n58545_ nq=$abc$109383$new_n58800_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mepc__r__base[3] nq=$abc$109383$new_n58801_
-.subckt ao22_x2 i0=$abc$109383$new_n58801_ i1=$abc$109383$new_n58800_ i2=$abc$109383$new_n58669_ q=$abc$109383$new_n58802_
-.subckt a2_x2 i0=$abc$109383$new_n58802_ i1=$abc$109383$new_n58799_ q=$abc$109383$new_n58803_
-.subckt a2_x2 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n18217_ q=$abc$109383$new_n58804_
+.subckt and21nor_x1 i0=$abc$109383$new_n58801_ i1=$abc$109383$new_n58800_ i2=$abc$109383$new_n58669_ nq=$abc$109383$new_n58802_
+.subckt and2_x1 i0=$abc$109383$new_n58802_ i1=$abc$109383$new_n58799_ q=$abc$109383$new_n58803_
+.subckt and2_x1 i0=$abc$109383$new_n15332_ i1=$abc$109383$new_n18217_ q=$abc$109383$new_n58804_
 .subckt buf_x4 i=$abc$109383$new_n58804_ q=$abc$109383$new_n58805_
 .subckt buf_x4 i=$abc$109383$new_n58805_ q=$abc$109383$new_n58806_
-.subckt a2_x2 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n17628_ q=$abc$109383$new_n58807_
+.subckt and2_x1 i0=$abc$109383$new_n15337_ i1=$abc$109383$new_n17628_ q=$abc$109383$new_n58807_
 .subckt buf_x4 i=$abc$109383$new_n58807_ q=$abc$109383$new_n58808_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58671_ i3=soc.cpu.minerva.exception.mtvec__r__base[3] nq=$abc$109383$new_n58809_
 .subckt nand3_x0 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58566_ i2=$abc$109383$new_n58790_ nq=$abc$109383$new_n58810_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[5] nq=$abc$109383$new_n58811_
-.subckt ao22_x2 i0=$abc$109383$new_n58811_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n58809_ q=$abc$109383$new_n58812_
+.subckt and21nor_x1 i0=$abc$109383$new_n58811_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n58809_ nq=$abc$109383$new_n58812_
 .subckt nand3_x0 i0=$abc$109383$new_n58812_ i1=$abc$109383$new_n58803_ i2=$abc$109383$new_n58795_ nq=$abc$109383$new_n58813_
-.subckt oa22_x2 i0=$abc$109383$new_n56524_ i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n58669_ q=$abc$109383$new_n58814_
+.subckt or21nand_x1 i0=$abc$109383$new_n56524_ i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n58669_ nq=$abc$109383$new_n58814_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[5] nq=$abc$109383$new_n58815_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[5] nq=$abc$109383$new_n58816_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=$abc$109383$new_n58816_ i1=$abc$109383$new_n58815_ q=$abc$109383$new_n58817_
-.subckt oa22_x2 i0=$abc$109383$new_n58817_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58776_ q=$abc$109383$new_n58818_
-.subckt oa22_x2 i0=$abc$109383$new_n52577_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58818_ q=$abc$109383$new_n58819_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=$abc$109383$new_n58816_ i1=$abc$109383$new_n58815_ q=$abc$109383$new_n58817_
+.subckt or21nand_x1 i0=$abc$109383$new_n58817_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58776_ nq=$abc$109383$new_n58818_
+.subckt or21nand_x1 i0=$abc$109383$new_n52577_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58818_ nq=$abc$109383$new_n58819_
 .subckt nand2_x0 i0=$abc$109383$new_n56614_ i1=$abc$109383$new_n56577_ nq=$abc$109383$new_n58820_
-.subckt ao22_x2 i0=$abc$109383$new_n58820_ i1=$abc$109383$new_n58582_ i2=$abc$109383$new_n58580_ q=$abc$109383$new_n58821_
-.subckt a2_x2 i0=$abc$109383$new_n58821_ i1=$abc$109383$new_n58819_ q=$abc$109383$new_n58822_
+.subckt and21nor_x1 i0=$abc$109383$new_n58820_ i1=$abc$109383$new_n58582_ i2=$abc$109383$new_n58580_ nq=$abc$109383$new_n58821_
+.subckt and2_x1 i0=$abc$109383$new_n58821_ i1=$abc$109383$new_n58819_ q=$abc$109383$new_n58822_
 .subckt nor2_x0 i0=$abc$109383$new_n58822_ i1=$abc$109383$new_n58573_ nq=$abc$109383$new_n58823_
 .subckt buf_x4 i=$abc$109383$new_n58656_ q=$abc$109383$new_n58824_
 .subckt nand2_x0 i0=$abc$109383$new_n58824_ i1=$abc$109383$new_n57234_ nq=$abc$109383$new_n58825_
-.subckt oa22_x2 i0=$abc$109383$new_n58825_ i1=$abc$109383$new_n58823_ i2=$abc$109383$new_n58814_ q=$abc$109383$new_n58826_
+.subckt or21nand_x1 i0=$abc$109383$new_n58825_ i1=$abc$109383$new_n58823_ i2=$abc$109383$new_n58814_ nq=$abc$109383$new_n58826_
 .subckt nand3_x0 i0=$abc$109383$new_n58826_ i1=$abc$109383$new_n58813_ i2=$abc$109383$new_n58527_ nq=$abc$109383$new_n58827_
 .subckt buf_x4 i=$abc$109383$new_n30141_ q=$abc$109383$new_n58828_
 .subckt nand2_x0 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30273_ nq=$abc$109383$new_n58829_
-.subckt a2_x2 i0=$abc$109383$new_n58829_ i1=$abc$109383$new_n30289_ q=$abc$109383$new_n58830_
+.subckt and2_x1 i0=$abc$109383$new_n58829_ i1=$abc$109383$new_n30289_ q=$abc$109383$new_n58830_
 .subckt nand4_x0 i0=$abc$109383$new_n58830_ i1=$abc$109383$new_n52652_ i2=$abc$109383$new_n56524_ i3=$abc$109383$new_n15345_ nq=$abc$109383$new_n58831_
-.subckt a3_x2 i0=$abc$109383$new_n58831_ i1=$abc$109383$new_n58828_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n58832_
+.subckt and3_x1 i0=$abc$109383$new_n58831_ i1=$abc$109383$new_n58828_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n58832_
 .subckt nand2_x0 i0=$abc$109383$new_n58832_ i1=$abc$109383$new_n58827_ nq=$abc$109383$new_n58833_
 .subckt buf_x4 i=$abc$109383$new_n29825_ q=$abc$109383$new_n58834_
-.subckt oa22_x2 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n36232_ q=$abc$109383$new_n58835_
-.subckt a2_x2 i0=$abc$109383$new_n58835_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n58836_
-.subckt a2_x2 i0=$abc$109383$new_n58836_ i1=$abc$109383$new_n58833_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107302
+.subckt or21nand_x1 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n36232_ nq=$abc$109383$new_n58835_
+.subckt and2_x1 i0=$abc$109383$new_n58835_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n58836_
+.subckt and2_x1 i0=$abc$109383$new_n58836_ i1=$abc$109383$new_n58833_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107302
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[6] nq=$abc$109383$new_n58838_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58671_ i3=soc.cpu.minerva.exception.mtvec__r__base[4] nq=$abc$109383$new_n58839_
 .subckt buf_x4 i=$abc$109383$new_n58562_ q=$abc$109383$new_n58840_
 .subckt nand4_x0 i0=$abc$109383$new_n58840_ i1=$abc$109383$new_n58561_ i2=$abc$109383$new_n58530_ i3=soc.cpu.minerva.exception.irq_mask__r__value[6] nq=$abc$109383$new_n58841_
-.subckt a3_x2 i0=$abc$109383$new_n58841_ i1=$abc$109383$new_n58839_ i2=$abc$109383$new_n58669_ q=$abc$109383$new_n58842_
-.subckt a2_x2 i0=$abc$109383$new_n58842_ i1=$abc$109383$new_n58838_ q=$abc$109383$new_n58843_
+.subckt and3_x1 i0=$abc$109383$new_n58841_ i1=$abc$109383$new_n58839_ i2=$abc$109383$new_n58669_ q=$abc$109383$new_n58842_
+.subckt and2_x1 i0=$abc$109383$new_n58842_ i1=$abc$109383$new_n58838_ q=$abc$109383$new_n58843_
 .subckt buf_x4 i=$abc$109383$new_n58790_ q=$abc$109383$new_n58844_
 .subckt buf_x4 i=$abc$109383$new_n58557_ q=$abc$109383$new_n58845_
 .subckt buf_x4 i=$abc$109383$new_n58792_ q=$abc$109383$new_n58846_
@@ -44122,643 +44122,643 @@
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58844_ i2=$abc$109383$new_n58672_ i3=soc.cpu.minerva.exception.mepc__r__base[4] nq=$abc$109383$new_n58848_
 .subckt nand3_x0 i0=$abc$109383$new_n58672_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.misa__r__extensions[6] nq=$abc$109383$new_n58849_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[6] nq=$abc$109383$new_n58850_
-.subckt ao22_x2 i0=$abc$109383$new_n58850_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n58849_ q=$abc$109383$new_n58851_
-.subckt a3_x2 i0=$abc$109383$new_n58851_ i1=$abc$109383$new_n58848_ i2=$abc$109383$new_n58847_ q=$abc$109383$new_n58852_
+.subckt and21nor_x1 i0=$abc$109383$new_n58850_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n58849_ nq=$abc$109383$new_n58851_
+.subckt and3_x1 i0=$abc$109383$new_n58851_ i1=$abc$109383$new_n58848_ i2=$abc$109383$new_n58847_ q=$abc$109383$new_n58852_
 .subckt nand2_x0 i0=$abc$109383$new_n58852_ i1=$abc$109383$new_n58843_ nq=$abc$109383$new_n58853_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[6] nq=$abc$109383$new_n58854_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[6] nq=$abc$109383$new_n58855_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=$abc$109383$new_n58855_ i1=$abc$109383$new_n58854_ q=$abc$109383$new_n58856_
-.subckt oa22_x2 i0=$abc$109383$new_n58856_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58776_ q=$abc$109383$new_n58857_
-.subckt oa22_x2 i0=$abc$109383$new_n52585_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58857_ q=$abc$109383$new_n58858_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=$abc$109383$new_n58855_ i1=$abc$109383$new_n58854_ q=$abc$109383$new_n58856_
+.subckt or21nand_x1 i0=$abc$109383$new_n58856_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58776_ nq=$abc$109383$new_n58857_
+.subckt or21nand_x1 i0=$abc$109383$new_n52585_ i1=$abc$109383$new_n58615_ i2=$abc$109383$new_n58857_ nq=$abc$109383$new_n58858_
 .subckt nand2_x0 i0=$abc$109383$new_n56623_ i1=$abc$109383$new_n56576_ nq=$abc$109383$new_n58859_
-.subckt ao22_x2 i0=$abc$109383$new_n58859_ i1=$abc$109383$new_n58582_ i2=$abc$109383$new_n58580_ q=$abc$109383$new_n58860_
-.subckt oa22_x2 i0=$abc$109383$new_n58860_ i1=$abc$109383$new_n58858_ i2=$abc$109383$new_n58573_ q=$abc$109383$new_n58861_
-.subckt oa22_x2 i0=$abc$109383$new_n57256_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n58861_ q=$abc$109383$new_n58862_
-.subckt ao22_x2 i0=$abc$109383$new_n15369_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58747_ q=$abc$109383$new_n58863_
+.subckt and21nor_x1 i0=$abc$109383$new_n58859_ i1=$abc$109383$new_n58582_ i2=$abc$109383$new_n58580_ nq=$abc$109383$new_n58860_
+.subckt or21nand_x1 i0=$abc$109383$new_n58860_ i1=$abc$109383$new_n58858_ i2=$abc$109383$new_n58573_ nq=$abc$109383$new_n58861_
+.subckt or21nand_x1 i0=$abc$109383$new_n57256_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n58861_ nq=$abc$109383$new_n58862_
+.subckt and21nor_x1 i0=$abc$109383$new_n15369_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58747_ nq=$abc$109383$new_n58863_
 .subckt nand2_x0 i0=$abc$109383$new_n58863_ i1=$abc$109383$new_n58862_ nq=$abc$109383$new_n58864_
 .subckt nand3_x0 i0=$abc$109383$new_n58864_ i1=$abc$109383$new_n58853_ i2=$abc$109383$new_n58527_ nq=$abc$109383$new_n58865_
 .subckt buf_x4 i=$abc$109383$new_n58623_ q=$abc$109383$new_n58866_
 .subckt nand2_x0 i0=$abc$109383$new_n53920_ i1=$abc$109383$new_n53859_ nq=$abc$109383$new_n58867_
 .subckt nand3_x0 i0=$abc$109383$new_n30272_ i1=$abc$109383$new_n58867_ i2=$abc$109383$new_n34794_ nq=$abc$109383$new_n58868_
 .subckt nand2_x0 i0=$abc$109383$new_n58868_ i1=$abc$109383$new_n58866_ nq=$abc$109383$new_n58869_
-.subckt a2_x2 i0=$abc$109383$new_n58869_ i1=$abc$109383$new_n58865_ q=$abc$109383$new_n58870_
-.subckt oa22_x2 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n36592_ q=$abc$109383$new_n58871_
+.subckt and2_x1 i0=$abc$109383$new_n58869_ i1=$abc$109383$new_n58865_ q=$abc$109383$new_n58870_
+.subckt or21nand_x1 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n36592_ nq=$abc$109383$new_n58871_
 .subckt nand2_x0 i0=$abc$109383$new_n58871_ i1=$abc$109383$new_n28536_ nq=$abc$109383$new_n58872_
 .subckt nor2_x0 i0=$abc$109383$new_n58872_ i1=$abc$109383$new_n58870_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107306
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[5] nq=$abc$109383$new_n58874_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[7] nq=$abc$109383$new_n58875_
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[7] nq=$abc$109383$new_n58876_
-.subckt a3_x2 i0=$abc$109383$new_n58876_ i1=$abc$109383$new_n58875_ i2=$abc$109383$new_n58874_ q=$abc$109383$new_n58877_
+.subckt and3_x1 i0=$abc$109383$new_n58876_ i1=$abc$109383$new_n58875_ i2=$abc$109383$new_n58874_ q=$abc$109383$new_n58877_
 .subckt buf_x4 i=$abc$109383$new_n58541_ q=$abc$109383$new_n58878_
-.subckt a3_x2 i0=$abc$109383$new_n58717_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.mie__r__mtie q=$abc$109383$new_n58879_
+.subckt and3_x1 i0=$abc$109383$new_n58717_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.mie__r__mtie q=$abc$109383$new_n58879_
 .subckt buf_x4 i=$abc$109383$new_n58535_ q=$abc$109383$new_n58880_
-.subckt a3_x2 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[7] q=$abc$109383$new_n58881_
-.subckt a3_x2 i0=$abc$109383$new_n58634_ i1=$abc$109383$new_n58562_ i2=soc.cpu.minerva.exception.mstatus__r__mpie q=$abc$109383$new_n58882_
-.subckt a3_x2 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58547_ i2=soc.cpu.minerva.exception.misa__r__extensions[7] q=$abc$109383$new_n58883_
+.subckt and3_x1 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[7] q=$abc$109383$new_n58881_
+.subckt and3_x1 i0=$abc$109383$new_n58634_ i1=$abc$109383$new_n58562_ i2=soc.cpu.minerva.exception.mstatus__r__mpie q=$abc$109383$new_n58882_
+.subckt and3_x1 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58547_ i2=soc.cpu.minerva.exception.misa__r__extensions[7] q=$abc$109383$new_n58883_
 .subckt nor4_x0 i0=$abc$109383$new_n58883_ i1=$abc$109383$new_n58882_ i2=$abc$109383$new_n58881_ i3=$abc$109383$new_n58879_ nq=$abc$109383$new_n58884_
 .subckt nand2_x0 i0=$abc$109383$new_n58567_ i1=soc.cpu.minerva.exception.mtval__r__value[7] nq=$abc$109383$new_n58885_
 .subckt nand2_x0 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58547_ nq=$abc$109383$new_n58886_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[5] nq=$abc$109383$new_n58887_
-.subckt ao22_x2 i0=$abc$109383$new_n58887_ i1=$abc$109383$new_n58886_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n58888_
-.subckt a2_x2 i0=$abc$109383$new_n58888_ i1=$abc$109383$new_n58885_ q=$abc$109383$new_n58889_
-.subckt a3_x2 i0=$abc$109383$new_n58889_ i1=$abc$109383$new_n58884_ i2=$abc$109383$new_n58877_ q=$abc$109383$new_n58890_
+.subckt and21nor_x1 i0=$abc$109383$new_n58887_ i1=$abc$109383$new_n58886_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n58888_
+.subckt and2_x1 i0=$abc$109383$new_n58888_ i1=$abc$109383$new_n58885_ q=$abc$109383$new_n58889_
+.subckt and3_x1 i0=$abc$109383$new_n58889_ i1=$abc$109383$new_n58884_ i2=$abc$109383$new_n58877_ q=$abc$109383$new_n58890_
 .subckt buf_x4 i=$abc$109383$new_n56575_ q=$abc$109383$new_n58891_
 .subckt nand2_x0 i0=$abc$109383$new_n56634_ i1=$abc$109383$new_n58891_ nq=$abc$109383$new_n58892_
-.subckt ao22_x2 i0=$abc$109383$new_n58892_ i1=$abc$109383$new_n58581_ i2=$abc$109383$new_n58580_ q=$abc$109383$new_n58893_
+.subckt and21nor_x1 i0=$abc$109383$new_n58892_ i1=$abc$109383$new_n58581_ i2=$abc$109383$new_n58580_ nq=$abc$109383$new_n58893_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[7] nq=$abc$109383$new_n58894_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[7] nq=$abc$109383$new_n58895_
-.subckt mx2_x2 cmd=$abc$109383$new_n58609_ i0=$abc$109383$new_n58895_ i1=$abc$109383$new_n58894_ q=$abc$109383$new_n58896_
-.subckt oa22_x2 i0=$abc$109383$new_n58896_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ q=$abc$109383$new_n58897_
-.subckt ao22_x2 i0=$abc$109383$new_n19994_ i1=$abc$109383$new_n20007_ i2=$abc$109383$new_n58614_ q=$abc$109383$new_n58898_
-.subckt ao22_x2 i0=$abc$109383$new_n58898_ i1=$abc$109383$new_n58897_ i2=$abc$109383$new_n58893_ q=$abc$109383$new_n58899_
-.subckt o2_x2 i0=$abc$109383$new_n58899_ i1=$abc$109383$new_n58573_ q=$abc$109383$new_n58900_
-.subckt oa22_x2 i0=$abc$109383$new_n57284_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n58900_ q=$abc$109383$new_n58901_
-.subckt ao22_x2 i0=$abc$109383$new_n15367_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n58902_
-.subckt oa22_x2 i0=$abc$109383$new_n58902_ i1=$abc$109383$new_n58901_ i2=$abc$109383$new_n58890_ q=$abc$109383$new_n58903_
-.subckt o2_x2 i0=$abc$109383$new_n58903_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n58904_
+.subckt mux2_x1 cmd=$abc$109383$new_n58609_ i0=$abc$109383$new_n58895_ i1=$abc$109383$new_n58894_ q=$abc$109383$new_n58896_
+.subckt or21nand_x1 i0=$abc$109383$new_n58896_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ nq=$abc$109383$new_n58897_
+.subckt and21nor_x1 i0=$abc$109383$new_n19994_ i1=$abc$109383$new_n20007_ i2=$abc$109383$new_n58614_ nq=$abc$109383$new_n58898_
+.subckt and21nor_x1 i0=$abc$109383$new_n58898_ i1=$abc$109383$new_n58897_ i2=$abc$109383$new_n58893_ nq=$abc$109383$new_n58899_
+.subckt or2_x1 i0=$abc$109383$new_n58899_ i1=$abc$109383$new_n58573_ q=$abc$109383$new_n58900_
+.subckt or21nand_x1 i0=$abc$109383$new_n57284_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n58900_ nq=$abc$109383$new_n58901_
+.subckt and21nor_x1 i0=$abc$109383$new_n15367_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n58902_
+.subckt or21nand_x1 i0=$abc$109383$new_n58902_ i1=$abc$109383$new_n58901_ i2=$abc$109383$new_n58890_ nq=$abc$109383$new_n58903_
+.subckt or2_x1 i0=$abc$109383$new_n58903_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n58904_
 .subckt nand2_x0 i0=$abc$109383$new_n53920_ i1=$abc$109383$new_n15467_ nq=$abc$109383$new_n58905_
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n58906_
 .subckt nand3_x0 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n58905_ i2=$abc$109383$new_n29770_ nq=$abc$109383$new_n58907_
 .subckt nand2_x0 i0=$abc$109383$new_n58907_ i1=$abc$109383$new_n58866_ nq=$abc$109383$new_n58908_
 .subckt nand2_x0 i0=$abc$109383$new_n58908_ i1=$abc$109383$new_n58904_ nq=$abc$109383$new_n58909_
-.subckt oa22_x2 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n37587_ q=$abc$109383$new_n58910_
-.subckt a2_x2 i0=$abc$109383$new_n58910_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n58911_
-.subckt a2_x2 i0=$abc$109383$new_n58911_ i1=$abc$109383$new_n58909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107310
+.subckt or21nand_x1 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n37587_ nq=$abc$109383$new_n58910_
+.subckt and2_x1 i0=$abc$109383$new_n58910_ i1=$abc$109383$new_n48960_ q=$abc$109383$new_n58911_
+.subckt and2_x1 i0=$abc$109383$new_n58911_ i1=$abc$109383$new_n58909_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107310
 .subckt buf_x4 i=$abc$109383$new_n58544_ q=$abc$109383$new_n58913_
 .subckt nand3_x0 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.misa__r__extensions[8] nq=$abc$109383$new_n58914_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[8] nq=$abc$109383$new_n58915_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.mtvec__r__base[6] nq=$abc$109383$new_n58916_
-.subckt a4_x2 i0=$abc$109383$new_n58916_ i1=$abc$109383$new_n58915_ i2=$abc$109383$new_n58914_ i3=$abc$109383$new_n58528_ q=$abc$109383$new_n58917_
+.subckt and4_x1 i0=$abc$109383$new_n58916_ i1=$abc$109383$new_n58915_ i2=$abc$109383$new_n58914_ i3=$abc$109383$new_n58528_ q=$abc$109383$new_n58917_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[6] nq=$abc$109383$new_n58918_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[8] nq=$abc$109383$new_n58919_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[8] nq=$abc$109383$new_n58920_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[8] nq=$abc$109383$new_n58921_
-.subckt a4_x2 i0=$abc$109383$new_n58921_ i1=$abc$109383$new_n58920_ i2=$abc$109383$new_n58919_ i3=$abc$109383$new_n58918_ q=$abc$109383$new_n58922_
-.subckt a2_x2 i0=$abc$109383$new_n58922_ i1=$abc$109383$new_n58917_ q=$abc$109383$new_n58923_
-.subckt a2_x2 i0=$abc$109383$new_n56643_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n58924_
-.subckt oa22_x2 i0=$abc$109383$new_n58924_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n58925_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[8] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[8] q=$abc$109383$new_n58926_
-.subckt ao22_x2 i0=$abc$109383$new_n58926_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n58927_
+.subckt and4_x1 i0=$abc$109383$new_n58921_ i1=$abc$109383$new_n58920_ i2=$abc$109383$new_n58919_ i3=$abc$109383$new_n58918_ q=$abc$109383$new_n58922_
+.subckt and2_x1 i0=$abc$109383$new_n58922_ i1=$abc$109383$new_n58917_ q=$abc$109383$new_n58923_
+.subckt and2_x1 i0=$abc$109383$new_n56643_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n58924_
+.subckt or21nand_x1 i0=$abc$109383$new_n58924_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n58925_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[8] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[8] q=$abc$109383$new_n58926_
+.subckt and21nor_x1 i0=$abc$109383$new_n58926_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n58927_
 .subckt nand3_x0 i0=$abc$109383$new_n58615_ i1=$abc$109383$new_n20026_ i2=$abc$109383$new_n20012_ nq=$abc$109383$new_n58928_
-.subckt oa22_x2 i0=$abc$109383$new_n58928_ i1=$abc$109383$new_n58927_ i2=$abc$109383$new_n58925_ q=$abc$109383$new_n58929_
+.subckt or21nand_x1 i0=$abc$109383$new_n58928_ i1=$abc$109383$new_n58927_ i2=$abc$109383$new_n58925_ nq=$abc$109383$new_n58929_
 .subckt nand2_x0 i0=$abc$109383$new_n58929_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n58930_
 .subckt buf_x4 i=$abc$109383$new_n58656_ q=$abc$109383$new_n58931_
-.subckt oa22_x2 i0=$abc$109383$new_n57309_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n58930_ q=$abc$109383$new_n58932_
-.subckt ao22_x2 i0=$abc$109383$new_n15376_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n58933_
-.subckt oa22_x2 i0=$abc$109383$new_n58933_ i1=$abc$109383$new_n58932_ i2=$abc$109383$new_n58923_ q=$abc$109383$new_n58934_
-.subckt o2_x2 i0=$abc$109383$new_n58934_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n58935_
+.subckt or21nand_x1 i0=$abc$109383$new_n57309_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n58930_ nq=$abc$109383$new_n58932_
+.subckt and21nor_x1 i0=$abc$109383$new_n15376_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n58933_
+.subckt or21nand_x1 i0=$abc$109383$new_n58933_ i1=$abc$109383$new_n58932_ i2=$abc$109383$new_n58923_ nq=$abc$109383$new_n58934_
+.subckt or2_x1 i0=$abc$109383$new_n58934_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n58935_
 .subckt nand4_x0 i0=$abc$109383$new_n58830_ i1=$abc$109383$new_n52652_ i2=$abc$109383$new_n53915_ i3=$abc$109383$new_n15345_ nq=$abc$109383$new_n58936_
-.subckt a3_x2 i0=$abc$109383$new_n58936_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n58937_
+.subckt and3_x1 i0=$abc$109383$new_n58936_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n58937_
 .subckt nand2_x0 i0=$abc$109383$new_n58937_ i1=$abc$109383$new_n58935_ nq=$abc$109383$new_n58938_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n58939_
-.subckt oa22_x2 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n37588_ q=$abc$109383$new_n58940_
-.subckt a2_x2 i0=$abc$109383$new_n58940_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n58941_
-.subckt a2_x2 i0=$abc$109383$new_n58941_ i1=$abc$109383$new_n58938_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107314
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=$abc$109383$new_n38535_ q=$abc$109383$new_n58943_
-.subckt a2_x2 i0=$abc$109383$new_n58943_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n58944_
+.subckt or21nand_x1 i0=$abc$109383$new_n53210_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n37588_ nq=$abc$109383$new_n58940_
+.subckt and2_x1 i0=$abc$109383$new_n58940_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n58941_
+.subckt and2_x1 i0=$abc$109383$new_n58941_ i1=$abc$109383$new_n58938_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107314
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=$abc$109383$new_n38535_ nq=$abc$109383$new_n58943_
+.subckt and2_x1 i0=$abc$109383$new_n58943_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n58944_
 .subckt nand2_x0 i0=$abc$109383$new_n53920_ i1=$abc$109383$new_n15263_ nq=$abc$109383$new_n58945_
 .subckt nand3_x0 i0=$abc$109383$new_n58662_ i1=$abc$109383$new_n58945_ i2=$abc$109383$new_n58068_ nq=$abc$109383$new_n58946_
-.subckt a2_x2 i0=$abc$109383$new_n58946_ i1=$abc$109383$new_n58623_ q=$abc$109383$new_n58947_
+.subckt and2_x1 i0=$abc$109383$new_n58946_ i1=$abc$109383$new_n58623_ q=$abc$109383$new_n58947_
 .subckt buf_x4 i=$abc$109383$new_n58745_ q=$abc$109383$new_n58948_
-.subckt a3_x2 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.misa__r__extensions[9] q=$abc$109383$new_n58949_
+.subckt and3_x1 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.misa__r__extensions[9] q=$abc$109383$new_n58949_
 .subckt buf_x4 i=$abc$109383$new_n58529_ q=$abc$109383$new_n58950_
-.subckt a3_x2 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[9] q=$abc$109383$new_n58951_
-.subckt a3_x2 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.mtvec__r__base[7] q=$abc$109383$new_n58952_
+.subckt and3_x1 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[9] q=$abc$109383$new_n58951_
+.subckt and3_x1 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.mtvec__r__base[7] q=$abc$109383$new_n58952_
 .subckt nor4_x0 i0=$abc$109383$new_n58952_ i1=$abc$109383$new_n58951_ i2=$abc$109383$new_n58949_ i3=$abc$109383$new_n58759_ nq=$abc$109383$new_n58953_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[9] nq=$abc$109383$new_n58954_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[9] nq=$abc$109383$new_n58955_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[7] nq=$abc$109383$new_n58956_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[9] nq=$abc$109383$new_n58957_
-.subckt a4_x2 i0=$abc$109383$new_n58957_ i1=$abc$109383$new_n58956_ i2=$abc$109383$new_n58955_ i3=$abc$109383$new_n58954_ q=$abc$109383$new_n58958_
-.subckt a2_x2 i0=$abc$109383$new_n58958_ i1=$abc$109383$new_n58953_ q=$abc$109383$new_n58959_
+.subckt and4_x1 i0=$abc$109383$new_n58957_ i1=$abc$109383$new_n58956_ i2=$abc$109383$new_n58955_ i3=$abc$109383$new_n58954_ q=$abc$109383$new_n58958_
+.subckt and2_x1 i0=$abc$109383$new_n58958_ i1=$abc$109383$new_n58953_ q=$abc$109383$new_n58959_
 .subckt nand2_x0 i0=$abc$109383$new_n56654_ i1=$abc$109383$new_n56576_ nq=$abc$109383$new_n58960_
 .subckt nand2_x0 i0=$abc$109383$new_n58776_ i1=$abc$109383$new_n58960_ nq=$abc$109383$new_n58961_
-.subckt mx2_x2 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[9] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[9] q=$abc$109383$new_n58962_
-.subckt oa22_x2 i0=$abc$109383$new_n58962_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ q=$abc$109383$new_n58963_
-.subckt ao22_x2 i0=$abc$109383$new_n52597_ i1=$abc$109383$new_n52598_ i2=$abc$109383$new_n58614_ q=$abc$109383$new_n58964_
-.subckt ao22_x2 i0=$abc$109383$new_n58964_ i1=$abc$109383$new_n58963_ i2=$abc$109383$new_n58961_ q=$abc$109383$new_n58965_
-.subckt o2_x2 i0=$abc$109383$new_n58965_ i1=$abc$109383$new_n58780_ q=$abc$109383$new_n58966_
+.subckt mux2_x1 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[9] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[9] q=$abc$109383$new_n58962_
+.subckt or21nand_x1 i0=$abc$109383$new_n58962_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ nq=$abc$109383$new_n58963_
+.subckt and21nor_x1 i0=$abc$109383$new_n52597_ i1=$abc$109383$new_n52598_ i2=$abc$109383$new_n58614_ nq=$abc$109383$new_n58964_
+.subckt and21nor_x1 i0=$abc$109383$new_n58964_ i1=$abc$109383$new_n58963_ i2=$abc$109383$new_n58961_ nq=$abc$109383$new_n58965_
+.subckt or2_x1 i0=$abc$109383$new_n58965_ i1=$abc$109383$new_n58780_ q=$abc$109383$new_n58966_
 .subckt nand2_x0 i0=$abc$109383$new_n58966_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n58967_
 .subckt nand2_x0 i0=$abc$109383$new_n57322_ i1=$abc$109383$new_n57321_ nq=$abc$109383$new_n58968_
-.subckt oa22_x2 i0=$abc$109383$new_n57331_ i1=$abc$109383$new_n57329_ i2=$abc$109383$new_n57177_ q=$abc$109383$new_n58969_
-.subckt ao22_x2 i0=$abc$109383$new_n51985_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ q=$abc$109383$new_n58970_
-.subckt nxr2_x1 i0=$abc$109383$new_n51975_ i1=$abc$109383$new_n58249_ nq=$abc$109383$new_n58971_
-.subckt ao22_x2 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n58971_ i2=$abc$109383$new_n58970_ q=$abc$109383$new_n58972_
-.subckt ao22_x2 i0=$abc$109383$new_n58972_ i1=$abc$109383$new_n58969_ i2=$abc$109383$new_n58968_ q=$abc$109383$new_n58973_
-.subckt oa22_x2 i0=$abc$109383$new_n58973_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n58967_ q=$abc$109383$new_n58974_
+.subckt or21nand_x1 i0=$abc$109383$new_n57331_ i1=$abc$109383$new_n57329_ i2=$abc$109383$new_n57177_ nq=$abc$109383$new_n58969_
+.subckt and21nor_x1 i0=$abc$109383$new_n51985_ i1=$abc$109383$new_n57105_ i2=$abc$109383$new_n57182_ nq=$abc$109383$new_n58970_
+.subckt nexor2_x0 i0=$abc$109383$new_n51975_ i1=$abc$109383$new_n58249_ nq=$abc$109383$new_n58971_
+.subckt and21nor_x1 i0=$abc$109383$new_n57185_ i1=$abc$109383$new_n58971_ i2=$abc$109383$new_n58970_ nq=$abc$109383$new_n58972_
+.subckt and21nor_x1 i0=$abc$109383$new_n58972_ i1=$abc$109383$new_n58969_ i2=$abc$109383$new_n58968_ nq=$abc$109383$new_n58973_
+.subckt or21nand_x1 i0=$abc$109383$new_n58973_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n58967_ nq=$abc$109383$new_n58974_
 .subckt buf_x4 i=$abc$109383$new_n58619_ q=$abc$109383$new_n58975_
-.subckt ao22_x2 i0=$abc$109383$new_n15448_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n58976_
-.subckt oa22_x2 i0=$abc$109383$new_n58976_ i1=$abc$109383$new_n58974_ i2=$abc$109383$new_n58959_ q=$abc$109383$new_n58977_
+.subckt and21nor_x1 i0=$abc$109383$new_n15448_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n58976_
+.subckt or21nand_x1 i0=$abc$109383$new_n58976_ i1=$abc$109383$new_n58974_ i2=$abc$109383$new_n58959_ nq=$abc$109383$new_n58977_
 .subckt nor2_x0 i0=$abc$109383$new_n58977_ i1=$abc$109383$new_n58948_ nq=$abc$109383$new_n58978_
-.subckt ao22_x2 i0=$abc$109383$new_n58978_ i1=$abc$109383$new_n58947_ i2=$abc$109383$new_n58944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107318
+.subckt and21nor_x1 i0=$abc$109383$new_n58978_ i1=$abc$109383$new_n58947_ i2=$abc$109383$new_n58944_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107318
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58844_ i2=$abc$109383$new_n58672_ i3=soc.cpu.minerva.exception.mepc__r__base[8] nq=$abc$109383$new_n58980_
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58844_ i2=$abc$109383$new_n58840_ i3=soc.cpu.minerva.exception.mscratch__r__value[10] nq=$abc$109383$new_n58981_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[10] nq=$abc$109383$new_n58982_
-.subckt a2_x2 i0=$abc$109383$new_n58982_ i1=$abc$109383$new_n58528_ q=$abc$109383$new_n58983_
+.subckt and2_x1 i0=$abc$109383$new_n58982_ i1=$abc$109383$new_n58528_ q=$abc$109383$new_n58983_
 .subckt nand3_x0 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.misa__r__extensions[10] nq=$abc$109383$new_n58984_
 .subckt buf_x4 i=$abc$109383$new_n58790_ q=$abc$109383$new_n58985_
 .subckt buf_x4 i=$abc$109383$new_n58792_ q=$abc$109383$new_n58986_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58985_ i3=soc.cpu.minerva.exception.mcause__r__ecode[10] nq=$abc$109383$new_n58987_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58566_ i2=$abc$109383$new_n58985_ i3=soc.cpu.minerva.exception.mtval__r__value[10] nq=$abc$109383$new_n58988_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58878_ i3=soc.cpu.minerva.exception.mtvec__r__base[8] nq=$abc$109383$new_n58989_
-.subckt a4_x2 i0=$abc$109383$new_n58989_ i1=$abc$109383$new_n58988_ i2=$abc$109383$new_n58987_ i3=$abc$109383$new_n58984_ q=$abc$109383$new_n58990_
-.subckt a4_x2 i0=$abc$109383$new_n58990_ i1=$abc$109383$new_n58983_ i2=$abc$109383$new_n58981_ i3=$abc$109383$new_n58980_ q=$abc$109383$new_n58991_
+.subckt and4_x1 i0=$abc$109383$new_n58989_ i1=$abc$109383$new_n58988_ i2=$abc$109383$new_n58987_ i3=$abc$109383$new_n58984_ q=$abc$109383$new_n58990_
+.subckt and4_x1 i0=$abc$109383$new_n58990_ i1=$abc$109383$new_n58983_ i2=$abc$109383$new_n58981_ i3=$abc$109383$new_n58980_ q=$abc$109383$new_n58991_
 .subckt buf_x4 i=$abc$109383$new_n58700_ q=$abc$109383$new_n58992_
 .subckt buf_x4 i=$abc$109383$new_n56575_ q=$abc$109383$new_n58993_
-.subckt a2_x2 i0=$abc$109383$new_n56665_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n58994_
-.subckt oa22_x2 i0=$abc$109383$new_n58994_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n58995_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[10] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[10] q=$abc$109383$new_n58996_
-.subckt ao22_x2 i0=$abc$109383$new_n58996_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n58997_
+.subckt and2_x1 i0=$abc$109383$new_n56665_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n58994_
+.subckt or21nand_x1 i0=$abc$109383$new_n58994_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n58995_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[10] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[10] q=$abc$109383$new_n58996_
+.subckt and21nor_x1 i0=$abc$109383$new_n58996_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n58997_
 .subckt nand3_x0 i0=$abc$109383$new_n58615_ i1=$abc$109383$new_n20051_ i2=$abc$109383$new_n20043_ nq=$abc$109383$new_n58998_
-.subckt oa22_x2 i0=$abc$109383$new_n58998_ i1=$abc$109383$new_n58997_ i2=$abc$109383$new_n58995_ q=$abc$109383$new_n58999_
+.subckt or21nand_x1 i0=$abc$109383$new_n58998_ i1=$abc$109383$new_n58997_ i2=$abc$109383$new_n58995_ nq=$abc$109383$new_n58999_
 .subckt nand2_x0 i0=$abc$109383$new_n58999_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59000_
-.subckt oa22_x2 i0=$abc$109383$new_n57353_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59000_ q=$abc$109383$new_n59001_
-.subckt ao22_x2 i0=$abc$109383$new_n15365_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n59002_
-.subckt oa22_x2 i0=$abc$109383$new_n59002_ i1=$abc$109383$new_n59001_ i2=$abc$109383$new_n58991_ q=$abc$109383$new_n59003_
-.subckt o2_x2 i0=$abc$109383$new_n59003_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59004_
+.subckt or21nand_x1 i0=$abc$109383$new_n57353_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59000_ nq=$abc$109383$new_n59001_
+.subckt and21nor_x1 i0=$abc$109383$new_n15365_ i1=$abc$109383$new_n58571_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n59002_
+.subckt or21nand_x1 i0=$abc$109383$new_n59002_ i1=$abc$109383$new_n59001_ i2=$abc$109383$new_n58991_ nq=$abc$109383$new_n59003_
+.subckt or2_x1 i0=$abc$109383$new_n59003_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59004_
 .subckt nand2_x0 i0=$abc$109383$new_n53920_ i1=$abc$109383$new_n54000_ nq=$abc$109383$new_n59005_
 .subckt nand3_x0 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n59005_ i2=$abc$109383$new_n29770_ nq=$abc$109383$new_n59006_
 .subckt nand2_x0 i0=$abc$109383$new_n59006_ i1=$abc$109383$new_n58866_ nq=$abc$109383$new_n59007_
 .subckt nand2_x0 i0=$abc$109383$new_n59007_ i1=$abc$109383$new_n59004_ nq=$abc$109383$new_n59008_
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n59009_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n38513_ q=$abc$109383$new_n59010_
-.subckt a2_x2 i0=$abc$109383$new_n59010_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59011_
-.subckt a2_x2 i0=$abc$109383$new_n59011_ i1=$abc$109383$new_n59008_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107322
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=$abc$109383$new_n38513_ nq=$abc$109383$new_n59010_
+.subckt and2_x1 i0=$abc$109383$new_n59010_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59011_
+.subckt and2_x1 i0=$abc$109383$new_n59011_ i1=$abc$109383$new_n59008_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107322
 .subckt nand4_x0 i0=$abc$109383$new_n58745_ i1=$abc$109383$new_n53209_ i2=$abc$109383$new_n53484_ i3=$abc$109383$new_n29825_ nq=$abc$109383$new_n59013_
 .subckt buf_x4 i=$abc$109383$new_n59013_ q=$abc$109383$new_n59014_
-.subckt oa22_x2 i0=$abc$109383$new_n30141_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n38881_ q=$abc$109383$new_n59015_
+.subckt or21nand_x1 i0=$abc$109383$new_n30141_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n38881_ nq=$abc$109383$new_n59015_
 .subckt nand3_x0 i0=$abc$109383$new_n58985_ i1=$abc$109383$new_n58552_ i2=$abc$109383$new_n58561_ nq=$abc$109383$new_n59016_
-.subckt a2_x2 i0=$abc$109383$new_n58562_ i1=soc.cpu.minerva.exception.mscratch__r__value[11] q=$abc$109383$new_n59017_
-.subckt a4_x2 i0=$abc$109383$new_n58716_ i1=soc.cpu.minerva.exception.mip__r__meip i2=$abc$109383$new_n15337_ i3=$abc$109383$new_n17628_ q=$abc$109383$new_n59018_
+.subckt and2_x1 i0=$abc$109383$new_n58562_ i1=soc.cpu.minerva.exception.mscratch__r__value[11] q=$abc$109383$new_n59017_
+.subckt and4_x1 i0=$abc$109383$new_n58716_ i1=soc.cpu.minerva.exception.mip__r__meip i2=$abc$109383$new_n15337_ i3=$abc$109383$new_n17628_ q=$abc$109383$new_n59018_
 .subckt buf_x4 i=$abc$109383$new_n58543_ q=$abc$109383$new_n59019_
-.subckt a4_x2 i0=$abc$109383$new_n59019_ i1=soc.cpu.minerva.exception.mepc__r__base[9] i2=$abc$109383$new_n15332_ i3=$abc$109383$new_n18217_ q=$abc$109383$new_n59020_
+.subckt and4_x1 i0=$abc$109383$new_n59019_ i1=soc.cpu.minerva.exception.mepc__r__base[9] i2=$abc$109383$new_n15332_ i3=$abc$109383$new_n18217_ q=$abc$109383$new_n59020_
 .subckt nor3_x0 i0=$abc$109383$new_n59020_ i1=$abc$109383$new_n59018_ i2=$abc$109383$new_n59017_ nq=$abc$109383$new_n59021_
 .subckt nand4_x0 i0=$abc$109383$new_n59019_ i1=soc.cpu.minerva.exception.mcause__r__ecode[11] i2=$abc$109383$new_n17576_ i3=$abc$109383$new_n15379_ nq=$abc$109383$new_n59022_
 .subckt nand4_x0 i0=$abc$109383$new_n59019_ i1=soc.cpu.minerva.exception.mtval__r__value[11] i2=$abc$109383$new_n17576_ i3=$abc$109383$new_n18217_ nq=$abc$109383$new_n59023_
-.subckt a2_x2 i0=$abc$109383$new_n59023_ i1=$abc$109383$new_n59022_ q=$abc$109383$new_n59024_
-.subckt oa22_x2 i0=$abc$109383$new_n59024_ i1=$abc$109383$new_n59021_ i2=$abc$109383$new_n59016_ q=$abc$109383$new_n59025_
+.subckt and2_x1 i0=$abc$109383$new_n59023_ i1=$abc$109383$new_n59022_ q=$abc$109383$new_n59024_
+.subckt or21nand_x1 i0=$abc$109383$new_n59024_ i1=$abc$109383$new_n59021_ i2=$abc$109383$new_n59016_ nq=$abc$109383$new_n59025_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[9] nq=$abc$109383$new_n59026_
-.subckt ao22_x2 i0=$abc$109383$new_n59026_ i1=$abc$109383$new_n58886_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59027_
+.subckt and21nor_x1 i0=$abc$109383$new_n59026_ i1=$abc$109383$new_n58886_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59027_
 .subckt nand3_x0 i0=$abc$109383$new_n58547_ i1=$abc$109383$new_n58562_ i2=soc.cpu.minerva.exception.mstatus__r__mpp[0] nq=$abc$109383$new_n59028_
 .subckt nand3_x0 i0=$abc$109383$new_n58717_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.mie__r__meie nq=$abc$109383$new_n59029_
 .subckt nand3_x0 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[11] nq=$abc$109383$new_n59030_
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[11] nq=$abc$109383$new_n59031_
-.subckt a4_x2 i0=$abc$109383$new_n59031_ i1=$abc$109383$new_n59030_ i2=$abc$109383$new_n59029_ i3=$abc$109383$new_n59028_ q=$abc$109383$new_n59032_
-.subckt a2_x2 i0=$abc$109383$new_n59032_ i1=$abc$109383$new_n59027_ q=$abc$109383$new_n59033_
+.subckt and4_x1 i0=$abc$109383$new_n59031_ i1=$abc$109383$new_n59030_ i2=$abc$109383$new_n59029_ i3=$abc$109383$new_n59028_ q=$abc$109383$new_n59032_
+.subckt and2_x1 i0=$abc$109383$new_n59032_ i1=$abc$109383$new_n59027_ q=$abc$109383$new_n59033_
 .subckt nand2_x0 i0=$abc$109383$new_n59033_ i1=$abc$109383$new_n59025_ nq=$abc$109383$new_n59034_
 .subckt nand3_x0 i0=$abc$109383$new_n59034_ i1=$abc$109383$new_n53209_ i2=$abc$109383$new_n29825_ nq=$abc$109383$new_n59035_
-.subckt ao22_x2 i0=$abc$109383$new_n15278_ i1=$abc$109383$new_n15277_ i2=$abc$109383$new_n15269_ q=$abc$109383$new_n59036_
-.subckt a2_x2 i0=$abc$109383$new_n15275_ i1=$abc$109383$new_n15270_ q=$abc$109383$new_n59037_
-.subckt a4_x2 i0=$abc$109383$new_n59037_ i1=$abc$109383$new_n59036_ i2=$abc$109383$new_n54007_ i3=$abc$109383$new_n15410_ q=$abc$109383$new_n59038_
+.subckt and21nor_x1 i0=$abc$109383$new_n15278_ i1=$abc$109383$new_n15277_ i2=$abc$109383$new_n15269_ nq=$abc$109383$new_n59036_
+.subckt and2_x1 i0=$abc$109383$new_n15275_ i1=$abc$109383$new_n15270_ q=$abc$109383$new_n59037_
+.subckt and4_x1 i0=$abc$109383$new_n59037_ i1=$abc$109383$new_n59036_ i2=$abc$109383$new_n54007_ i3=$abc$109383$new_n15410_ q=$abc$109383$new_n59038_
 .subckt buf_x4 i=$abc$109383$new_n59038_ q=$abc$109383$new_n59039_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n15303_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59040_
-.subckt a2_x2 i0=$abc$109383$new_n56674_ i1=$abc$109383$new_n56575_ q=$abc$109383$new_n59041_
-.subckt oa22_x2 i0=$abc$109383$new_n59041_ i1=$abc$109383$new_n58591_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59042_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[11] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[11] q=$abc$109383$new_n59043_
-.subckt ao22_x2 i0=$abc$109383$new_n59043_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ q=$abc$109383$new_n59044_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n15303_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59040_
+.subckt and2_x1 i0=$abc$109383$new_n56674_ i1=$abc$109383$new_n56575_ q=$abc$109383$new_n59041_
+.subckt or21nand_x1 i0=$abc$109383$new_n59041_ i1=$abc$109383$new_n58591_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59042_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[11] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[11] q=$abc$109383$new_n59043_
+.subckt and21nor_x1 i0=$abc$109383$new_n59043_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ nq=$abc$109383$new_n59044_
 .subckt nand3_x0 i0=$abc$109383$new_n58692_ i1=$abc$109383$new_n20066_ i2=$abc$109383$new_n20057_ nq=$abc$109383$new_n59045_
-.subckt oa22_x2 i0=$abc$109383$new_n59045_ i1=$abc$109383$new_n59044_ i2=$abc$109383$new_n59042_ q=$abc$109383$new_n59046_
+.subckt or21nand_x1 i0=$abc$109383$new_n59045_ i1=$abc$109383$new_n59044_ i2=$abc$109383$new_n59042_ nq=$abc$109383$new_n59046_
 .subckt nand2_x0 i0=$abc$109383$new_n59046_ i1=$abc$109383$new_n58700_ nq=$abc$109383$new_n59047_
-.subckt oa22_x2 i0=$abc$109383$new_n57377_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59047_ q=$abc$109383$new_n59048_
-.subckt oa22_x2 i0=$abc$109383$new_n59048_ i1=$abc$109383$new_n59040_ i2=$abc$109383$new_n59035_ q=$abc$109383$new_n59049_
-.subckt ao22_x2 i0=$abc$109383$new_n58746_ i1=$abc$109383$new_n59049_ i2=$abc$109383$new_n59015_ q=$abc$109383$new_n59050_
+.subckt or21nand_x1 i0=$abc$109383$new_n57377_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59047_ nq=$abc$109383$new_n59048_
+.subckt or21nand_x1 i0=$abc$109383$new_n59048_ i1=$abc$109383$new_n59040_ i2=$abc$109383$new_n59035_ nq=$abc$109383$new_n59049_
+.subckt and21nor_x1 i0=$abc$109383$new_n58746_ i1=$abc$109383$new_n59049_ i2=$abc$109383$new_n59015_ nq=$abc$109383$new_n59050_
 .subckt nand2_x0 i0=$abc$109383$new_n59050_ i1=$abc$109383$new_n59014_ nq=$abc$109383$new_n59051_
-.subckt a2_x2 i0=$abc$109383$new_n59051_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107326
+.subckt and2_x1 i0=$abc$109383$new_n59051_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107326
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[12] nq=$abc$109383$new_n59053_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[12] nq=$abc$109383$new_n59054_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[12] nq=$abc$109383$new_n59055_
-.subckt a3_x2 i0=$abc$109383$new_n59055_ i1=$abc$109383$new_n59054_ i2=$abc$109383$new_n59053_ q=$abc$109383$new_n59056_
+.subckt and3_x1 i0=$abc$109383$new_n59055_ i1=$abc$109383$new_n59054_ i2=$abc$109383$new_n59053_ q=$abc$109383$new_n59056_
 .subckt nand3_x0 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58547_ i2=soc.cpu.minerva.exception.mtvec__r__base[10] nq=$abc$109383$new_n59057_
 .subckt nand3_x0 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[12] nq=$abc$109383$new_n59058_
 .subckt nand3_x0 i0=$abc$109383$new_n58542_ i1=$abc$109383$new_n58840_ i2=soc.cpu.minerva.exception.mstatus__r__mpp[1] nq=$abc$109383$new_n59059_
-.subckt a3_x2 i0=$abc$109383$new_n59059_ i1=$abc$109383$new_n59058_ i2=$abc$109383$new_n59057_ q=$abc$109383$new_n59060_
+.subckt and3_x1 i0=$abc$109383$new_n59059_ i1=$abc$109383$new_n59058_ i2=$abc$109383$new_n59057_ q=$abc$109383$new_n59060_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[10] nq=$abc$109383$new_n59061_
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[12] nq=$abc$109383$new_n59062_
-.subckt a2_x2 i0=$abc$109383$new_n59062_ i1=$abc$109383$new_n58528_ q=$abc$109383$new_n59063_
-.subckt a3_x2 i0=$abc$109383$new_n59063_ i1=$abc$109383$new_n59061_ i2=$abc$109383$new_n59060_ q=$abc$109383$new_n59064_
+.subckt and2_x1 i0=$abc$109383$new_n59062_ i1=$abc$109383$new_n58528_ q=$abc$109383$new_n59063_
+.subckt and3_x1 i0=$abc$109383$new_n59063_ i1=$abc$109383$new_n59061_ i2=$abc$109383$new_n59060_ q=$abc$109383$new_n59064_
 .subckt nand2_x0 i0=$abc$109383$new_n59064_ i1=$abc$109383$new_n59056_ nq=$abc$109383$new_n59065_
 .subckt nand3_x0 i0=$abc$109383$new_n59065_ i1=$abc$109383$new_n30267_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59066_
 .subckt nand4_x0 i0=$abc$109383$new_n59037_ i1=$abc$109383$new_n59036_ i2=$abc$109383$new_n54007_ i3=$abc$109383$new_n15410_ nq=$abc$109383$new_n59067_
 .subckt nand2_x0 i0=$abc$109383$new_n53482_ i1=$abc$109383$new_n59067_ nq=$abc$109383$new_n59068_
-.subckt a2_x2 i0=$abc$109383$new_n59068_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59069_
+.subckt and2_x1 i0=$abc$109383$new_n59068_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59069_
 .subckt nand2_x0 i0=$abc$109383$new_n56684_ i1=$abc$109383$new_n58993_ nq=$abc$109383$new_n59070_
-.subckt a2_x2 i0=$abc$109383$new_n58591_ i1=$abc$109383$new_n59070_ q=$abc$109383$new_n59071_
+.subckt and2_x1 i0=$abc$109383$new_n58591_ i1=$abc$109383$new_n59070_ q=$abc$109383$new_n59071_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[12] nq=$abc$109383$new_n59072_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._1_[12] nq=$abc$109383$new_n59073_
-.subckt mx2_x2 cmd=$abc$109383$new_n58609_ i0=$abc$109383$new_n59073_ i1=$abc$109383$new_n59072_ q=$abc$109383$new_n59074_
-.subckt ao22_x2 i0=$abc$109383$new_n59074_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ q=$abc$109383$new_n59075_
-.subckt oa22_x2 i0=$abc$109383$new_n20071_ i1=$abc$109383$new_n20079_ i2=$abc$109383$new_n58605_ q=$abc$109383$new_n59076_
-.subckt oa22_x2 i0=$abc$109383$new_n59076_ i1=$abc$109383$new_n59075_ i2=$abc$109383$new_n59071_ q=$abc$109383$new_n59077_
-.subckt oa22_x2 i0=$abc$109383$new_n59077_ i1=$abc$109383$new_n58580_ i2=$abc$109383$new_n58573_ q=$abc$109383$new_n59078_
-.subckt oa22_x2 i0=$abc$109383$new_n57402_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59078_ q=$abc$109383$new_n59079_
-.subckt oa22_x2 i0=$abc$109383$new_n59079_ i1=$abc$109383$new_n59069_ i2=$abc$109383$new_n59066_ q=$abc$109383$new_n59080_
-.subckt o2_x2 i0=$abc$109383$new_n59080_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59081_
+.subckt mux2_x1 cmd=$abc$109383$new_n58609_ i0=$abc$109383$new_n59073_ i1=$abc$109383$new_n59072_ q=$abc$109383$new_n59074_
+.subckt and21nor_x1 i0=$abc$109383$new_n59074_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ nq=$abc$109383$new_n59075_
+.subckt or21nand_x1 i0=$abc$109383$new_n20071_ i1=$abc$109383$new_n20079_ i2=$abc$109383$new_n58605_ nq=$abc$109383$new_n59076_
+.subckt or21nand_x1 i0=$abc$109383$new_n59076_ i1=$abc$109383$new_n59075_ i2=$abc$109383$new_n59071_ nq=$abc$109383$new_n59077_
+.subckt or21nand_x1 i0=$abc$109383$new_n59077_ i1=$abc$109383$new_n58580_ i2=$abc$109383$new_n58573_ nq=$abc$109383$new_n59078_
+.subckt or21nand_x1 i0=$abc$109383$new_n57402_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59078_ nq=$abc$109383$new_n59079_
+.subckt or21nand_x1 i0=$abc$109383$new_n59079_ i1=$abc$109383$new_n59069_ i2=$abc$109383$new_n59066_ nq=$abc$109383$new_n59080_
+.subckt or2_x1 i0=$abc$109383$new_n59080_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59081_
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n59082_
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n59083_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59082_ i2=$abc$109383$new_n52025_ q=$abc$109383$new_n59084_
-.subckt a2_x2 i0=$abc$109383$new_n59084_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59085_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59082_ i2=$abc$109383$new_n52025_ nq=$abc$109383$new_n59084_
+.subckt and2_x1 i0=$abc$109383$new_n59084_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59085_
 .subckt nand2_x0 i0=$abc$109383$new_n59085_ i1=$abc$109383$new_n59081_ nq=$abc$109383$new_n59086_
-.subckt a2_x2 i0=$abc$109383$new_n59086_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107330
+.subckt and2_x1 i0=$abc$109383$new_n59086_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107330
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[13] nq=$abc$109383$new_n59088_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[13] nq=$abc$109383$new_n59089_
 .subckt nand4_x0 i0=$abc$109383$new_n58840_ i1=$abc$109383$new_n58561_ i2=$abc$109383$new_n58950_ i3=soc.cpu.minerva.exception.irq_mask__r__value[13] nq=$abc$109383$new_n59090_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58878_ i3=soc.cpu.minerva.exception.mtvec__r__base[11] nq=$abc$109383$new_n59091_
-.subckt a4_x2 i0=$abc$109383$new_n59091_ i1=$abc$109383$new_n59090_ i2=$abc$109383$new_n59089_ i3=$abc$109383$new_n59088_ q=$abc$109383$new_n59092_
-.subckt a2_x2 i0=$abc$109383$new_n59019_ i1=$abc$109383$new_n17576_ q=$abc$109383$new_n59093_
-.subckt a4_x2 i0=$abc$109383$new_n58553_ i1=$abc$109383$new_n58552_ i2=$abc$109383$new_n58561_ i3=$abc$109383$new_n18217_ q=$abc$109383$new_n59094_
+.subckt and4_x1 i0=$abc$109383$new_n59091_ i1=$abc$109383$new_n59090_ i2=$abc$109383$new_n59089_ i3=$abc$109383$new_n59088_ q=$abc$109383$new_n59092_
+.subckt and2_x1 i0=$abc$109383$new_n59019_ i1=$abc$109383$new_n17576_ q=$abc$109383$new_n59093_
+.subckt and4_x1 i0=$abc$109383$new_n58553_ i1=$abc$109383$new_n58552_ i2=$abc$109383$new_n58561_ i3=$abc$109383$new_n18217_ q=$abc$109383$new_n59094_
 .subckt nand3_x0 i0=$abc$109383$new_n59094_ i1=$abc$109383$new_n59093_ i2=soc.cpu.minerva.exception.mtval__r__value[13] nq=$abc$109383$new_n59095_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[11] nq=$abc$109383$new_n59096_
 .subckt nand4_x0 i0=$abc$109383$new_n58805_ i1=$abc$109383$new_n58878_ i2=$abc$109383$new_n59019_ i3=soc.cpu.minerva.exception.misa__r__extensions[13] nq=$abc$109383$new_n59097_
-.subckt a2_x2 i0=$abc$109383$new_n59097_ i1=$abc$109383$new_n59096_ q=$abc$109383$new_n59098_
+.subckt and2_x1 i0=$abc$109383$new_n59097_ i1=$abc$109383$new_n59096_ q=$abc$109383$new_n59098_
 .subckt nand4_x0 i0=$abc$109383$new_n59098_ i1=$abc$109383$new_n59095_ i2=$abc$109383$new_n59092_ i3=$abc$109383$new_n58669_ nq=$abc$109383$new_n59099_
 .subckt nand3_x0 i0=$abc$109383$new_n59099_ i1=$abc$109383$new_n30267_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59100_
 .subckt nand2_x0 i0=$abc$109383$new_n53511_ i1=$abc$109383$new_n59067_ nq=$abc$109383$new_n59101_
-.subckt a2_x2 i0=$abc$109383$new_n59101_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59102_
-.subckt a2_x2 i0=$abc$109383$new_n56695_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59103_
-.subckt oa22_x2 i0=$abc$109383$new_n59103_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n59104_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[13] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[13] q=$abc$109383$new_n59105_
-.subckt ao22_x2 i0=$abc$109383$new_n59105_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59106_
+.subckt and2_x1 i0=$abc$109383$new_n59101_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59102_
+.subckt and2_x1 i0=$abc$109383$new_n56695_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59103_
+.subckt or21nand_x1 i0=$abc$109383$new_n59103_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n59104_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[13] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[13] q=$abc$109383$new_n59105_
+.subckt and21nor_x1 i0=$abc$109383$new_n59105_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59106_
 .subckt nand3_x0 i0=$abc$109383$new_n58615_ i1=$abc$109383$new_n20093_ i2=$abc$109383$new_n20084_ nq=$abc$109383$new_n59107_
-.subckt oa22_x2 i0=$abc$109383$new_n59107_ i1=$abc$109383$new_n59106_ i2=$abc$109383$new_n59104_ q=$abc$109383$new_n59108_
+.subckt or21nand_x1 i0=$abc$109383$new_n59107_ i1=$abc$109383$new_n59106_ i2=$abc$109383$new_n59104_ nq=$abc$109383$new_n59108_
 .subckt nand2_x0 i0=$abc$109383$new_n59108_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59109_
-.subckt oa22_x2 i0=$abc$109383$new_n57423_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59109_ q=$abc$109383$new_n59110_
-.subckt oa22_x2 i0=$abc$109383$new_n59110_ i1=$abc$109383$new_n59102_ i2=$abc$109383$new_n59100_ q=$abc$109383$new_n59111_
-.subckt o2_x2 i0=$abc$109383$new_n59111_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59112_
+.subckt or21nand_x1 i0=$abc$109383$new_n57423_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59109_ nq=$abc$109383$new_n59110_
+.subckt or21nand_x1 i0=$abc$109383$new_n59110_ i1=$abc$109383$new_n59102_ i2=$abc$109383$new_n59100_ nq=$abc$109383$new_n59111_
+.subckt or2_x1 i0=$abc$109383$new_n59111_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59112_
 .subckt buf_x4 i=$abc$109383$new_n29194_ q=$abc$109383$new_n59113_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52037_ q=$abc$109383$new_n59114_
-.subckt a2_x2 i0=$abc$109383$new_n59114_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59115_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52037_ nq=$abc$109383$new_n59114_
+.subckt and2_x1 i0=$abc$109383$new_n59114_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59115_
 .subckt nand2_x0 i0=$abc$109383$new_n59115_ i1=$abc$109383$new_n59112_ nq=$abc$109383$new_n59116_
-.subckt a2_x2 i0=$abc$109383$new_n59116_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107334
+.subckt and2_x1 i0=$abc$109383$new_n59116_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107334
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58750_ i3=soc.cpu.minerva.exception.mtvec__r__base[12] nq=$abc$109383$new_n59118_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[14] nq=$abc$109383$new_n59119_
-.subckt ao22_x2 i0=$abc$109383$new_n59119_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59118_ q=$abc$109383$new_n59120_
+.subckt and21nor_x1 i0=$abc$109383$new_n59119_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59118_ nq=$abc$109383$new_n59120_
 .subckt nand3_x0 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[14] nq=$abc$109383$new_n59121_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mcause__r__ecode[14] nq=$abc$109383$new_n59122_
-.subckt ao22_x2 i0=$abc$109383$new_n59122_ i1=$abc$109383$new_n58793_ i2=$abc$109383$new_n59121_ q=$abc$109383$new_n59123_
+.subckt and21nor_x1 i0=$abc$109383$new_n59122_ i1=$abc$109383$new_n58793_ i2=$abc$109383$new_n59121_ nq=$abc$109383$new_n59123_
 .subckt nand3_x0 i0=$abc$109383$new_n58535_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[14] nq=$abc$109383$new_n59124_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mscratch__r__value[14] nq=$abc$109383$new_n59125_
-.subckt ao22_x2 i0=$abc$109383$new_n59125_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n59124_ q=$abc$109383$new_n59126_
+.subckt and21nor_x1 i0=$abc$109383$new_n59125_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n59124_ nq=$abc$109383$new_n59126_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mepc__r__base[12] nq=$abc$109383$new_n59127_
-.subckt ao22_x2 i0=$abc$109383$new_n59127_ i1=$abc$109383$new_n58800_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59128_
-.subckt a3_x2 i0=$abc$109383$new_n59128_ i1=$abc$109383$new_n59126_ i2=$abc$109383$new_n59123_ q=$abc$109383$new_n59129_
+.subckt and21nor_x1 i0=$abc$109383$new_n59127_ i1=$abc$109383$new_n58800_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59128_
+.subckt and3_x1 i0=$abc$109383$new_n59128_ i1=$abc$109383$new_n59126_ i2=$abc$109383$new_n59123_ q=$abc$109383$new_n59129_
 .subckt nand2_x0 i0=$abc$109383$new_n59129_ i1=$abc$109383$new_n59120_ nq=$abc$109383$new_n59130_
 .subckt nand3_x0 i0=$abc$109383$new_n59130_ i1=$abc$109383$new_n30267_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59131_
 .subckt nand2_x0 i0=$abc$109383$new_n53532_ i1=$abc$109383$new_n59067_ nq=$abc$109383$new_n59132_
-.subckt a2_x2 i0=$abc$109383$new_n59132_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59133_
-.subckt a2_x2 i0=$abc$109383$new_n56704_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59134_
-.subckt oa22_x2 i0=$abc$109383$new_n59134_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n59135_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[14] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[14] q=$abc$109383$new_n59136_
-.subckt ao22_x2 i0=$abc$109383$new_n59136_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59137_
+.subckt and2_x1 i0=$abc$109383$new_n59132_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59133_
+.subckt and2_x1 i0=$abc$109383$new_n56704_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59134_
+.subckt or21nand_x1 i0=$abc$109383$new_n59134_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n59135_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[14] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[14] q=$abc$109383$new_n59136_
+.subckt and21nor_x1 i0=$abc$109383$new_n59136_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59137_
 .subckt nand3_x0 i0=$abc$109383$new_n58615_ i1=$abc$109383$new_n20107_ i2=$abc$109383$new_n20098_ nq=$abc$109383$new_n59138_
-.subckt oa22_x2 i0=$abc$109383$new_n59138_ i1=$abc$109383$new_n59137_ i2=$abc$109383$new_n59135_ q=$abc$109383$new_n59139_
+.subckt or21nand_x1 i0=$abc$109383$new_n59138_ i1=$abc$109383$new_n59137_ i2=$abc$109383$new_n59135_ nq=$abc$109383$new_n59139_
 .subckt nand2_x0 i0=$abc$109383$new_n59139_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59140_
-.subckt oa22_x2 i0=$abc$109383$new_n57446_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59140_ q=$abc$109383$new_n59141_
-.subckt oa22_x2 i0=$abc$109383$new_n59141_ i1=$abc$109383$new_n59133_ i2=$abc$109383$new_n59131_ q=$abc$109383$new_n59142_
-.subckt o2_x2 i0=$abc$109383$new_n59142_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59143_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52054_ q=$abc$109383$new_n59144_
-.subckt a2_x2 i0=$abc$109383$new_n59144_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59145_
+.subckt or21nand_x1 i0=$abc$109383$new_n57446_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59140_ nq=$abc$109383$new_n59141_
+.subckt or21nand_x1 i0=$abc$109383$new_n59141_ i1=$abc$109383$new_n59133_ i2=$abc$109383$new_n59131_ nq=$abc$109383$new_n59142_
+.subckt or2_x1 i0=$abc$109383$new_n59142_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59143_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52054_ nq=$abc$109383$new_n59144_
+.subckt and2_x1 i0=$abc$109383$new_n59144_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59145_
 .subckt nand2_x0 i0=$abc$109383$new_n59145_ i1=$abc$109383$new_n59143_ nq=$abc$109383$new_n59146_
-.subckt a2_x2 i0=$abc$109383$new_n59146_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107338
+.subckt and2_x1 i0=$abc$109383$new_n59146_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107338
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n59148_
 .subckt nand3_x0 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.misa__r__extensions[15] nq=$abc$109383$new_n59149_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[15] nq=$abc$109383$new_n59150_
-.subckt ao22_x2 i0=$abc$109383$new_n59150_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59149_ q=$abc$109383$new_n59151_
+.subckt and21nor_x1 i0=$abc$109383$new_n59150_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59149_ nq=$abc$109383$new_n59151_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58985_ i3=soc.cpu.minerva.exception.mcause__r__ecode[15] nq=$abc$109383$new_n59152_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58985_ i2=$abc$109383$new_n58672_ i3=soc.cpu.minerva.exception.mepc__r__base[13] nq=$abc$109383$new_n59153_
-.subckt a2_x2 i0=$abc$109383$new_n59153_ i1=$abc$109383$new_n59152_ q=$abc$109383$new_n59154_
+.subckt and2_x1 i0=$abc$109383$new_n59153_ i1=$abc$109383$new_n59152_ q=$abc$109383$new_n59154_
 .subckt nand3_x0 i0=$abc$109383$new_n58535_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[15] nq=$abc$109383$new_n59155_
 .subckt nand3_x0 i0=$abc$109383$new_n58807_ i1=$abc$109383$new_n58805_ i2=$abc$109383$new_n58547_ nq=$abc$109383$new_n59156_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[13] nq=$abc$109383$new_n59157_
-.subckt ao22_x2 i0=$abc$109383$new_n59157_ i1=$abc$109383$new_n59156_ i2=$abc$109383$new_n59155_ q=$abc$109383$new_n59158_
+.subckt and21nor_x1 i0=$abc$109383$new_n59157_ i1=$abc$109383$new_n59156_ i2=$abc$109383$new_n59155_ nq=$abc$109383$new_n59158_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mscratch__r__value[15] nq=$abc$109383$new_n59159_
-.subckt ao22_x2 i0=$abc$109383$new_n59159_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59160_
-.subckt a2_x2 i0=$abc$109383$new_n59160_ i1=$abc$109383$new_n59158_ q=$abc$109383$new_n59161_
+.subckt and21nor_x1 i0=$abc$109383$new_n59159_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59160_
+.subckt and2_x1 i0=$abc$109383$new_n59160_ i1=$abc$109383$new_n59158_ q=$abc$109383$new_n59161_
 .subckt nand3_x0 i0=$abc$109383$new_n59161_ i1=$abc$109383$new_n59154_ i2=$abc$109383$new_n59151_ nq=$abc$109383$new_n59162_
 .subckt nand3_x0 i0=$abc$109383$new_n59162_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59163_
 .subckt nand2_x0 i0=$abc$109383$new_n53566_ i1=$abc$109383$new_n59067_ nq=$abc$109383$new_n59164_
-.subckt a2_x2 i0=$abc$109383$new_n59164_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59165_
+.subckt and2_x1 i0=$abc$109383$new_n59164_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59165_
 .subckt buf_x4 i=$abc$109383$new_n58591_ q=$abc$109383$new_n59166_
-.subckt a2_x2 i0=$abc$109383$new_n56713_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59167_
-.subckt oa22_x2 i0=$abc$109383$new_n59167_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n59168_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[15] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[15] q=$abc$109383$new_n59169_
-.subckt ao22_x2 i0=$abc$109383$new_n59169_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59170_
+.subckt and2_x1 i0=$abc$109383$new_n56713_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59167_
+.subckt or21nand_x1 i0=$abc$109383$new_n59167_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n59168_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[15] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[15] q=$abc$109383$new_n59169_
+.subckt and21nor_x1 i0=$abc$109383$new_n59169_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59170_
 .subckt nand3_x0 i0=$abc$109383$new_n58615_ i1=$abc$109383$new_n20120_ i2=$abc$109383$new_n20112_ nq=$abc$109383$new_n59171_
-.subckt oa22_x2 i0=$abc$109383$new_n59171_ i1=$abc$109383$new_n59170_ i2=$abc$109383$new_n59168_ q=$abc$109383$new_n59172_
+.subckt or21nand_x1 i0=$abc$109383$new_n59171_ i1=$abc$109383$new_n59170_ i2=$abc$109383$new_n59168_ nq=$abc$109383$new_n59172_
 .subckt nand2_x0 i0=$abc$109383$new_n59172_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59173_
-.subckt oa22_x2 i0=$abc$109383$new_n57470_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59173_ q=$abc$109383$new_n59174_
-.subckt oa22_x2 i0=$abc$109383$new_n59174_ i1=$abc$109383$new_n59165_ i2=$abc$109383$new_n59163_ q=$abc$109383$new_n59175_
-.subckt o2_x2 i0=$abc$109383$new_n59175_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59176_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52074_ q=$abc$109383$new_n59177_
-.subckt a2_x2 i0=$abc$109383$new_n59177_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59178_
+.subckt or21nand_x1 i0=$abc$109383$new_n57470_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59173_ nq=$abc$109383$new_n59174_
+.subckt or21nand_x1 i0=$abc$109383$new_n59174_ i1=$abc$109383$new_n59165_ i2=$abc$109383$new_n59163_ nq=$abc$109383$new_n59175_
+.subckt or2_x1 i0=$abc$109383$new_n59175_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59176_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52074_ nq=$abc$109383$new_n59177_
+.subckt and2_x1 i0=$abc$109383$new_n59177_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59178_
 .subckt nand2_x0 i0=$abc$109383$new_n59178_ i1=$abc$109383$new_n59176_ nq=$abc$109383$new_n59179_
-.subckt a2_x2 i0=$abc$109383$new_n59179_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107342
+.subckt and2_x1 i0=$abc$109383$new_n59179_ i1=$abc$109383$new_n58433_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107342
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n59181_
 .subckt nand3_x0 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.misa__r__extensions[16] nq=$abc$109383$new_n59182_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[16] nq=$abc$109383$new_n59183_
-.subckt ao22_x2 i0=$abc$109383$new_n59183_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59182_ q=$abc$109383$new_n59184_
+.subckt and21nor_x1 i0=$abc$109383$new_n59183_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59182_ nq=$abc$109383$new_n59184_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58985_ i2=$abc$109383$new_n58913_ i3=soc.cpu.minerva.exception.mepc__r__base[14] nq=$abc$109383$new_n59185_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58985_ i3=soc.cpu.minerva.exception.mcause__r__ecode[16] nq=$abc$109383$new_n59186_
-.subckt a2_x2 i0=$abc$109383$new_n59186_ i1=$abc$109383$new_n59185_ q=$abc$109383$new_n59187_
+.subckt and2_x1 i0=$abc$109383$new_n59186_ i1=$abc$109383$new_n59185_ q=$abc$109383$new_n59187_
 .subckt nand3_x0 i0=$abc$109383$new_n58535_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[16] nq=$abc$109383$new_n59188_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[14] nq=$abc$109383$new_n59189_
-.subckt ao22_x2 i0=$abc$109383$new_n59189_ i1=$abc$109383$new_n59156_ i2=$abc$109383$new_n59188_ q=$abc$109383$new_n59190_
+.subckt and21nor_x1 i0=$abc$109383$new_n59189_ i1=$abc$109383$new_n59156_ i2=$abc$109383$new_n59188_ nq=$abc$109383$new_n59190_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mscratch__r__value[16] nq=$abc$109383$new_n59191_
-.subckt ao22_x2 i0=$abc$109383$new_n59191_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59192_
-.subckt a2_x2 i0=$abc$109383$new_n59192_ i1=$abc$109383$new_n59190_ q=$abc$109383$new_n59193_
+.subckt and21nor_x1 i0=$abc$109383$new_n59191_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59192_
+.subckt and2_x1 i0=$abc$109383$new_n59192_ i1=$abc$109383$new_n59190_ q=$abc$109383$new_n59193_
 .subckt nand3_x0 i0=$abc$109383$new_n59193_ i1=$abc$109383$new_n59187_ i2=$abc$109383$new_n59184_ nq=$abc$109383$new_n59194_
 .subckt nand3_x0 i0=$abc$109383$new_n59194_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59195_
 .subckt nand2_x0 i0=$abc$109383$new_n53588_ i1=$abc$109383$new_n59067_ nq=$abc$109383$new_n59196_
-.subckt a2_x2 i0=$abc$109383$new_n59196_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59197_
-.subckt a2_x2 i0=$abc$109383$new_n56722_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59198_
-.subckt oa22_x2 i0=$abc$109383$new_n59198_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n59199_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[16] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[16] q=$abc$109383$new_n59200_
-.subckt ao22_x2 i0=$abc$109383$new_n59200_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59201_
-.subckt o2_x2 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20132_ q=$abc$109383$new_n59202_
-.subckt oa22_x2 i0=$abc$109383$new_n59202_ i1=$abc$109383$new_n59201_ i2=$abc$109383$new_n59199_ q=$abc$109383$new_n59203_
+.subckt and2_x1 i0=$abc$109383$new_n59196_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59197_
+.subckt and2_x1 i0=$abc$109383$new_n56722_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59198_
+.subckt or21nand_x1 i0=$abc$109383$new_n59198_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n59199_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[16] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[16] q=$abc$109383$new_n59200_
+.subckt and21nor_x1 i0=$abc$109383$new_n59200_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59201_
+.subckt or2_x1 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20132_ q=$abc$109383$new_n59202_
+.subckt or21nand_x1 i0=$abc$109383$new_n59202_ i1=$abc$109383$new_n59201_ i2=$abc$109383$new_n59199_ nq=$abc$109383$new_n59203_
 .subckt nand2_x0 i0=$abc$109383$new_n59203_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59204_
-.subckt oa22_x2 i0=$abc$109383$new_n57492_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59204_ q=$abc$109383$new_n59205_
-.subckt oa22_x2 i0=$abc$109383$new_n59205_ i1=$abc$109383$new_n59197_ i2=$abc$109383$new_n59195_ q=$abc$109383$new_n59206_
-.subckt o2_x2 i0=$abc$109383$new_n59206_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59207_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52094_ q=$abc$109383$new_n59208_
-.subckt a2_x2 i0=$abc$109383$new_n59208_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59209_
+.subckt or21nand_x1 i0=$abc$109383$new_n57492_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59204_ nq=$abc$109383$new_n59205_
+.subckt or21nand_x1 i0=$abc$109383$new_n59205_ i1=$abc$109383$new_n59197_ i2=$abc$109383$new_n59195_ nq=$abc$109383$new_n59206_
+.subckt or2_x1 i0=$abc$109383$new_n59206_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59207_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52094_ nq=$abc$109383$new_n59208_
+.subckt and2_x1 i0=$abc$109383$new_n59208_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59209_
 .subckt nand2_x0 i0=$abc$109383$new_n59209_ i1=$abc$109383$new_n59207_ nq=$abc$109383$new_n59210_
-.subckt a2_x2 i0=$abc$109383$new_n59210_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107346
+.subckt and2_x1 i0=$abc$109383$new_n59210_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107346
 .subckt nand3_x0 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.misa__r__extensions[17] nq=$abc$109383$new_n59212_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[17] nq=$abc$109383$new_n59213_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.mtvec__r__base[15] nq=$abc$109383$new_n59214_
 .subckt nand3_x0 i0=$abc$109383$new_n59214_ i1=$abc$109383$new_n59213_ i2=$abc$109383$new_n59212_ nq=$abc$109383$new_n59215_
-.subckt a3_x2 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58566_ i2=$abc$109383$new_n58790_ q=$abc$109383$new_n59216_
-.subckt oa22_x2 i0=soc.cpu.minerva.exception.mtval__r__value[17] i1=$abc$109383$new_n59216_ i2=$abc$109383$new_n58619_ q=$abc$109383$new_n59217_
+.subckt and3_x1 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58566_ i2=$abc$109383$new_n58790_ q=$abc$109383$new_n59216_
+.subckt or21nand_x1 i0=soc.cpu.minerva.exception.mtval__r__value[17] i1=$abc$109383$new_n59216_ i2=$abc$109383$new_n58619_ nq=$abc$109383$new_n59217_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58790_ i2=$abc$109383$new_n58545_ i3=soc.cpu.minerva.exception.mepc__r__base[15] nq=$abc$109383$new_n59218_
 .subckt nand4_x0 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58790_ i3=soc.cpu.minerva.exception.mcause__r__ecode[17] nq=$abc$109383$new_n59219_
 .subckt nand4_x0 i0=$abc$109383$new_n58792_ i1=$abc$109383$new_n58790_ i2=$abc$109383$new_n58840_ i3=soc.cpu.minerva.exception.mscratch__r__value[17] nq=$abc$109383$new_n59220_
 .subckt nand3_x0 i0=$abc$109383$new_n59220_ i1=$abc$109383$new_n59219_ i2=$abc$109383$new_n59218_ nq=$abc$109383$new_n59221_
-.subckt o3_x2 i0=$abc$109383$new_n59221_ i1=$abc$109383$new_n59217_ i2=$abc$109383$new_n59215_ q=$abc$109383$new_n59222_
+.subckt or3_x1 i0=$abc$109383$new_n59221_ i1=$abc$109383$new_n59217_ i2=$abc$109383$new_n59215_ q=$abc$109383$new_n59222_
 .subckt nand3_x0 i0=$abc$109383$new_n59222_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59223_
 .subckt nand2_x0 i0=$abc$109383$new_n15363_ i1=$abc$109383$new_n59067_ nq=$abc$109383$new_n59224_
-.subckt a2_x2 i0=$abc$109383$new_n59224_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59225_
-.subckt a2_x2 i0=$abc$109383$new_n56731_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59226_
-.subckt oa22_x2 i0=$abc$109383$new_n59226_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59227_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[17] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[17] q=$abc$109383$new_n59228_
-.subckt ao22_x2 i0=$abc$109383$new_n59228_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59229_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20139_ q=$abc$109383$new_n59230_
-.subckt oa22_x2 i0=$abc$109383$new_n59230_ i1=$abc$109383$new_n59229_ i2=$abc$109383$new_n59227_ q=$abc$109383$new_n59231_
+.subckt and2_x1 i0=$abc$109383$new_n59224_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59225_
+.subckt and2_x1 i0=$abc$109383$new_n56731_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59226_
+.subckt or21nand_x1 i0=$abc$109383$new_n59226_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59227_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[17] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[17] q=$abc$109383$new_n59228_
+.subckt and21nor_x1 i0=$abc$109383$new_n59228_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59229_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20139_ q=$abc$109383$new_n59230_
+.subckt or21nand_x1 i0=$abc$109383$new_n59230_ i1=$abc$109383$new_n59229_ i2=$abc$109383$new_n59227_ nq=$abc$109383$new_n59231_
 .subckt nand2_x0 i0=$abc$109383$new_n59231_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59232_
-.subckt oa22_x2 i0=$abc$109383$new_n57515_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59232_ q=$abc$109383$new_n59233_
-.subckt oa22_x2 i0=$abc$109383$new_n59233_ i1=$abc$109383$new_n59225_ i2=$abc$109383$new_n59223_ q=$abc$109383$new_n59234_
-.subckt o2_x2 i0=$abc$109383$new_n59234_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59235_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n40464_ q=$abc$109383$new_n59236_
-.subckt a2_x2 i0=$abc$109383$new_n59236_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59237_
+.subckt or21nand_x1 i0=$abc$109383$new_n57515_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59232_ nq=$abc$109383$new_n59233_
+.subckt or21nand_x1 i0=$abc$109383$new_n59233_ i1=$abc$109383$new_n59225_ i2=$abc$109383$new_n59223_ nq=$abc$109383$new_n59234_
+.subckt or2_x1 i0=$abc$109383$new_n59234_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59235_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n40464_ nq=$abc$109383$new_n59236_
+.subckt and2_x1 i0=$abc$109383$new_n59236_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59237_
 .subckt nand2_x0 i0=$abc$109383$new_n59237_ i1=$abc$109383$new_n59235_ nq=$abc$109383$new_n59238_
-.subckt a2_x2 i0=$abc$109383$new_n59238_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107350
+.subckt and2_x1 i0=$abc$109383$new_n59238_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107350
 .subckt nand2_x0 i0=$abc$109383$new_n58545_ i1=$abc$109383$new_n58542_ nq=$abc$109383$new_n59240_
 .subckt inv_x0 i=soc.cpu.minerva.exception.misa__r__extensions[18] nq=$abc$109383$new_n59241_
-.subckt ao22_x2 i0=$abc$109383$new_n59241_ i1=$abc$109383$new_n59240_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59242_
+.subckt and21nor_x1 i0=$abc$109383$new_n59241_ i1=$abc$109383$new_n59240_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59242_
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[18] nq=$abc$109383$new_n59243_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.mtvec__r__base[16] nq=$abc$109383$new_n59244_
-.subckt a2_x2 i0=$abc$109383$new_n59244_ i1=$abc$109383$new_n59243_ q=$abc$109383$new_n59245_
-.subckt a2_x2 i0=$abc$109383$new_n59245_ i1=$abc$109383$new_n59242_ q=$abc$109383$new_n59246_
+.subckt and2_x1 i0=$abc$109383$new_n59244_ i1=$abc$109383$new_n59243_ q=$abc$109383$new_n59245_
+.subckt and2_x1 i0=$abc$109383$new_n59245_ i1=$abc$109383$new_n59242_ q=$abc$109383$new_n59246_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[18] nq=$abc$109383$new_n59247_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[16] nq=$abc$109383$new_n59248_
-.subckt a2_x2 i0=$abc$109383$new_n59248_ i1=$abc$109383$new_n59247_ q=$abc$109383$new_n59249_
+.subckt and2_x1 i0=$abc$109383$new_n59248_ i1=$abc$109383$new_n59247_ q=$abc$109383$new_n59249_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[18] nq=$abc$109383$new_n59250_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[18] nq=$abc$109383$new_n59251_
-.subckt a2_x2 i0=$abc$109383$new_n59251_ i1=$abc$109383$new_n59250_ q=$abc$109383$new_n59252_
+.subckt and2_x1 i0=$abc$109383$new_n59251_ i1=$abc$109383$new_n59250_ q=$abc$109383$new_n59252_
 .subckt nand3_x0 i0=$abc$109383$new_n59252_ i1=$abc$109383$new_n59249_ i2=$abc$109383$new_n59246_ nq=$abc$109383$new_n59253_
 .subckt nand3_x0 i0=$abc$109383$new_n59253_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n29815_ nq=$abc$109383$new_n59254_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53634_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59255_
-.subckt a2_x2 i0=$abc$109383$new_n56740_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59256_
-.subckt oa22_x2 i0=$abc$109383$new_n59256_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59257_
-.subckt mx2_x2 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[18] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[18] q=$abc$109383$new_n59258_
-.subckt ao22_x2 i0=$abc$109383$new_n59258_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59259_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20145_ q=$abc$109383$new_n59260_
-.subckt oa22_x2 i0=$abc$109383$new_n59260_ i1=$abc$109383$new_n59259_ i2=$abc$109383$new_n59257_ q=$abc$109383$new_n59261_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53634_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59255_
+.subckt and2_x1 i0=$abc$109383$new_n56740_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59256_
+.subckt or21nand_x1 i0=$abc$109383$new_n59256_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59257_
+.subckt mux2_x1 cmd=$abc$109383$new_n58650_ i0=soc.cpu.minerva.gprf.mem._1_[18] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[18] q=$abc$109383$new_n59258_
+.subckt and21nor_x1 i0=$abc$109383$new_n59258_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59259_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20145_ q=$abc$109383$new_n59260_
+.subckt or21nand_x1 i0=$abc$109383$new_n59260_ i1=$abc$109383$new_n59259_ i2=$abc$109383$new_n59257_ nq=$abc$109383$new_n59261_
 .subckt nand2_x0 i0=$abc$109383$new_n59261_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59262_
-.subckt oa22_x2 i0=$abc$109383$new_n57539_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59262_ q=$abc$109383$new_n59263_
-.subckt oa22_x2 i0=$abc$109383$new_n59263_ i1=$abc$109383$new_n59255_ i2=$abc$109383$new_n59254_ q=$abc$109383$new_n59264_
-.subckt o2_x2 i0=$abc$109383$new_n59264_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59265_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52115_ q=$abc$109383$new_n59266_
-.subckt a2_x2 i0=$abc$109383$new_n59266_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59267_
+.subckt or21nand_x1 i0=$abc$109383$new_n57539_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59262_ nq=$abc$109383$new_n59263_
+.subckt or21nand_x1 i0=$abc$109383$new_n59263_ i1=$abc$109383$new_n59255_ i2=$abc$109383$new_n59254_ nq=$abc$109383$new_n59264_
+.subckt or2_x1 i0=$abc$109383$new_n59264_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59265_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52115_ nq=$abc$109383$new_n59266_
+.subckt and2_x1 i0=$abc$109383$new_n59266_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59267_
 .subckt nand2_x0 i0=$abc$109383$new_n59267_ i1=$abc$109383$new_n59265_ nq=$abc$109383$new_n59268_
-.subckt a2_x2 i0=$abc$109383$new_n59268_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107354
+.subckt and2_x1 i0=$abc$109383$new_n59268_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107354
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[19] nq=$abc$109383$new_n59270_
 .subckt nand4_x0 i0=$abc$109383$new_n58805_ i1=$abc$109383$new_n58634_ i2=$abc$109383$new_n59019_ i3=soc.cpu.minerva.exception.misa__r__extensions[19] nq=$abc$109383$new_n59271_
 .subckt nand4_x0 i0=$abc$109383$new_n58840_ i1=$abc$109383$new_n58561_ i2=$abc$109383$new_n58950_ i3=soc.cpu.minerva.exception.irq_mask__r__value[19] nq=$abc$109383$new_n59272_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58878_ i3=soc.cpu.minerva.exception.mtvec__r__base[17] nq=$abc$109383$new_n59273_
-.subckt a4_x2 i0=$abc$109383$new_n59273_ i1=$abc$109383$new_n59272_ i2=$abc$109383$new_n59271_ i3=$abc$109383$new_n59270_ q=$abc$109383$new_n59274_
+.subckt and4_x1 i0=$abc$109383$new_n59273_ i1=$abc$109383$new_n59272_ i2=$abc$109383$new_n59271_ i3=$abc$109383$new_n59270_ q=$abc$109383$new_n59274_
 .subckt nand3_x0 i0=$abc$109383$new_n59094_ i1=$abc$109383$new_n59093_ i2=soc.cpu.minerva.exception.mtval__r__value[19] nq=$abc$109383$new_n59275_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[17] nq=$abc$109383$new_n59276_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[19] nq=$abc$109383$new_n59277_
-.subckt a2_x2 i0=$abc$109383$new_n59277_ i1=$abc$109383$new_n59276_ q=$abc$109383$new_n59278_
+.subckt and2_x1 i0=$abc$109383$new_n59277_ i1=$abc$109383$new_n59276_ q=$abc$109383$new_n59278_
 .subckt nand4_x0 i0=$abc$109383$new_n59278_ i1=$abc$109383$new_n59275_ i2=$abc$109383$new_n59274_ i3=$abc$109383$new_n58669_ nq=$abc$109383$new_n59279_
 .subckt nand3_x0 i0=$abc$109383$new_n59279_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n30265_ nq=$abc$109383$new_n59280_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53670_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59281_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53670_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59281_
 .subckt nand2_x0 i0=$abc$109383$new_n56751_ i1=$abc$109383$new_n56576_ nq=$abc$109383$new_n59282_
 .subckt nand2_x0 i0=$abc$109383$new_n58776_ i1=$abc$109383$new_n59282_ nq=$abc$109383$new_n59283_
-.subckt mx2_x2 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[19] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[19] q=$abc$109383$new_n59284_
-.subckt oa22_x2 i0=$abc$109383$new_n59284_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58590_ q=$abc$109383$new_n59285_
-.subckt oa22_x2 i0=$abc$109383$new_n20151_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n59285_ q=$abc$109383$new_n59286_
-.subckt oa22_x2 i0=$abc$109383$new_n59286_ i1=$abc$109383$new_n59283_ i2=$abc$109383$new_n58656_ q=$abc$109383$new_n59287_
+.subckt mux2_x1 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[19] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[19] q=$abc$109383$new_n59284_
+.subckt or21nand_x1 i0=$abc$109383$new_n59284_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58590_ nq=$abc$109383$new_n59285_
+.subckt or21nand_x1 i0=$abc$109383$new_n20151_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n59285_ nq=$abc$109383$new_n59286_
+.subckt or21nand_x1 i0=$abc$109383$new_n59286_ i1=$abc$109383$new_n59283_ i2=$abc$109383$new_n58656_ nq=$abc$109383$new_n59287_
 .subckt nand2_x0 i0=$abc$109383$new_n59287_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59288_
-.subckt oa22_x2 i0=$abc$109383$new_n57560_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59288_ q=$abc$109383$new_n59289_
-.subckt oa22_x2 i0=$abc$109383$new_n59289_ i1=$abc$109383$new_n59281_ i2=$abc$109383$new_n59280_ q=$abc$109383$new_n59290_
-.subckt o2_x2 i0=$abc$109383$new_n59290_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59291_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52130_ q=$abc$109383$new_n59292_
-.subckt a2_x2 i0=$abc$109383$new_n59292_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59293_
+.subckt or21nand_x1 i0=$abc$109383$new_n57560_ i1=$abc$109383$new_n58931_ i2=$abc$109383$new_n59288_ nq=$abc$109383$new_n59289_
+.subckt or21nand_x1 i0=$abc$109383$new_n59289_ i1=$abc$109383$new_n59281_ i2=$abc$109383$new_n59280_ nq=$abc$109383$new_n59290_
+.subckt or2_x1 i0=$abc$109383$new_n59290_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59291_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52130_ nq=$abc$109383$new_n59292_
+.subckt and2_x1 i0=$abc$109383$new_n59292_ i1=$abc$109383$new_n59014_ q=$abc$109383$new_n59293_
 .subckt nand2_x0 i0=$abc$109383$new_n59293_ i1=$abc$109383$new_n59291_ nq=$abc$109383$new_n59294_
-.subckt a2_x2 i0=$abc$109383$new_n59294_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107358
+.subckt and2_x1 i0=$abc$109383$new_n59294_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107358
 .subckt inv_x0 i=soc.cpu.minerva.exception.misa__r__extensions[20] nq=$abc$109383$new_n59296_
-.subckt ao22_x2 i0=$abc$109383$new_n59296_ i1=$abc$109383$new_n59240_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59297_
+.subckt and21nor_x1 i0=$abc$109383$new_n59296_ i1=$abc$109383$new_n59240_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59297_
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[20] nq=$abc$109383$new_n59298_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.mtvec__r__base[18] nq=$abc$109383$new_n59299_
-.subckt a2_x2 i0=$abc$109383$new_n59299_ i1=$abc$109383$new_n59298_ q=$abc$109383$new_n59300_
-.subckt a2_x2 i0=$abc$109383$new_n59300_ i1=$abc$109383$new_n59297_ q=$abc$109383$new_n59301_
+.subckt and2_x1 i0=$abc$109383$new_n59299_ i1=$abc$109383$new_n59298_ q=$abc$109383$new_n59300_
+.subckt and2_x1 i0=$abc$109383$new_n59300_ i1=$abc$109383$new_n59297_ q=$abc$109383$new_n59301_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[18] nq=$abc$109383$new_n59302_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[20] nq=$abc$109383$new_n59303_
-.subckt a2_x2 i0=$abc$109383$new_n59303_ i1=$abc$109383$new_n59302_ q=$abc$109383$new_n59304_
+.subckt and2_x1 i0=$abc$109383$new_n59303_ i1=$abc$109383$new_n59302_ q=$abc$109383$new_n59304_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[20] nq=$abc$109383$new_n59305_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[20] nq=$abc$109383$new_n59306_
-.subckt a2_x2 i0=$abc$109383$new_n59306_ i1=$abc$109383$new_n59305_ q=$abc$109383$new_n59307_
+.subckt and2_x1 i0=$abc$109383$new_n59306_ i1=$abc$109383$new_n59305_ q=$abc$109383$new_n59307_
 .subckt nand3_x0 i0=$abc$109383$new_n59307_ i1=$abc$109383$new_n59304_ i2=$abc$109383$new_n59301_ nq=$abc$109383$new_n59308_
 .subckt nand3_x0 i0=$abc$109383$new_n59308_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n30265_ nq=$abc$109383$new_n59309_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53694_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59310_
-.subckt a2_x2 i0=$abc$109383$new_n56761_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59311_
-.subckt oa22_x2 i0=$abc$109383$new_n59311_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59312_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[20] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[20] q=$abc$109383$new_n59313_
-.subckt ao22_x2 i0=$abc$109383$new_n59313_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59314_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20158_ q=$abc$109383$new_n59315_
-.subckt oa22_x2 i0=$abc$109383$new_n59315_ i1=$abc$109383$new_n59314_ i2=$abc$109383$new_n59312_ q=$abc$109383$new_n59316_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53694_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59310_
+.subckt and2_x1 i0=$abc$109383$new_n56761_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59311_
+.subckt or21nand_x1 i0=$abc$109383$new_n59311_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59312_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[20] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[20] q=$abc$109383$new_n59313_
+.subckt and21nor_x1 i0=$abc$109383$new_n59313_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59314_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20158_ q=$abc$109383$new_n59315_
+.subckt or21nand_x1 i0=$abc$109383$new_n59315_ i1=$abc$109383$new_n59314_ i2=$abc$109383$new_n59312_ nq=$abc$109383$new_n59316_
 .subckt nand2_x0 i0=$abc$109383$new_n59316_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59317_
-.subckt oa22_x2 i0=$abc$109383$new_n57584_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59317_ q=$abc$109383$new_n59318_
-.subckt oa22_x2 i0=$abc$109383$new_n59318_ i1=$abc$109383$new_n59310_ i2=$abc$109383$new_n59309_ q=$abc$109383$new_n59319_
-.subckt o2_x2 i0=$abc$109383$new_n59319_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59320_
+.subckt or21nand_x1 i0=$abc$109383$new_n57584_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59317_ nq=$abc$109383$new_n59318_
+.subckt or21nand_x1 i0=$abc$109383$new_n59318_ i1=$abc$109383$new_n59310_ i2=$abc$109383$new_n59309_ nq=$abc$109383$new_n59319_
+.subckt or2_x1 i0=$abc$109383$new_n59319_ i1=$abc$109383$new_n58948_ q=$abc$109383$new_n59320_
 .subckt buf_x4 i=$abc$109383$new_n59013_ q=$abc$109383$new_n59321_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52145_ q=$abc$109383$new_n59322_
-.subckt a2_x2 i0=$abc$109383$new_n59322_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59323_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52145_ nq=$abc$109383$new_n59322_
+.subckt and2_x1 i0=$abc$109383$new_n59322_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59323_
 .subckt nand2_x0 i0=$abc$109383$new_n59323_ i1=$abc$109383$new_n59320_ nq=$abc$109383$new_n59324_
-.subckt a2_x2 i0=$abc$109383$new_n59324_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107362
+.subckt and2_x1 i0=$abc$109383$new_n59324_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107362
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58750_ i3=soc.cpu.minerva.exception.mtvec__r__base[19] nq=$abc$109383$new_n59326_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[21] nq=$abc$109383$new_n59327_
-.subckt ao22_x2 i0=$abc$109383$new_n59327_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59326_ q=$abc$109383$new_n59328_
+.subckt and21nor_x1 i0=$abc$109383$new_n59327_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59326_ nq=$abc$109383$new_n59328_
 .subckt nand3_x0 i0=$abc$109383$new_n58544_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.misa__r__extensions[21] nq=$abc$109383$new_n59329_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mcause__r__ecode[21] nq=$abc$109383$new_n59330_
-.subckt ao22_x2 i0=$abc$109383$new_n59330_ i1=$abc$109383$new_n58793_ i2=$abc$109383$new_n59329_ q=$abc$109383$new_n59331_
+.subckt and21nor_x1 i0=$abc$109383$new_n59330_ i1=$abc$109383$new_n58793_ i2=$abc$109383$new_n59329_ nq=$abc$109383$new_n59331_
 .subckt nand3_x0 i0=$abc$109383$new_n58535_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[21] nq=$abc$109383$new_n59332_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mscratch__r__value[21] nq=$abc$109383$new_n59333_
-.subckt ao22_x2 i0=$abc$109383$new_n59333_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n59332_ q=$abc$109383$new_n59334_
+.subckt and21nor_x1 i0=$abc$109383$new_n59333_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n59332_ nq=$abc$109383$new_n59334_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mepc__r__base[19] nq=$abc$109383$new_n59335_
-.subckt ao22_x2 i0=$abc$109383$new_n59335_ i1=$abc$109383$new_n58800_ i2=$abc$109383$new_n58668_ q=$abc$109383$new_n59336_
-.subckt a3_x2 i0=$abc$109383$new_n59336_ i1=$abc$109383$new_n59334_ i2=$abc$109383$new_n59331_ q=$abc$109383$new_n59337_
+.subckt and21nor_x1 i0=$abc$109383$new_n59335_ i1=$abc$109383$new_n58800_ i2=$abc$109383$new_n58668_ nq=$abc$109383$new_n59336_
+.subckt and3_x1 i0=$abc$109383$new_n59336_ i1=$abc$109383$new_n59334_ i2=$abc$109383$new_n59331_ q=$abc$109383$new_n59337_
 .subckt nand2_x0 i0=$abc$109383$new_n59337_ i1=$abc$109383$new_n59328_ nq=$abc$109383$new_n59338_
 .subckt nand3_x0 i0=$abc$109383$new_n59338_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n30265_ nq=$abc$109383$new_n59339_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53732_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59340_
-.subckt a2_x2 i0=$abc$109383$new_n56770_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59341_
-.subckt oa22_x2 i0=$abc$109383$new_n59341_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59342_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[21] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[21] q=$abc$109383$new_n59343_
-.subckt ao22_x2 i0=$abc$109383$new_n59343_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59344_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20164_ q=$abc$109383$new_n59345_
-.subckt oa22_x2 i0=$abc$109383$new_n59345_ i1=$abc$109383$new_n59344_ i2=$abc$109383$new_n59342_ q=$abc$109383$new_n59346_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53732_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59340_
+.subckt and2_x1 i0=$abc$109383$new_n56770_ i1=$abc$109383$new_n58993_ q=$abc$109383$new_n59341_
+.subckt or21nand_x1 i0=$abc$109383$new_n59341_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59342_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[21] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[21] q=$abc$109383$new_n59343_
+.subckt and21nor_x1 i0=$abc$109383$new_n59343_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59344_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20164_ q=$abc$109383$new_n59345_
+.subckt or21nand_x1 i0=$abc$109383$new_n59345_ i1=$abc$109383$new_n59344_ i2=$abc$109383$new_n59342_ nq=$abc$109383$new_n59346_
 .subckt nand2_x0 i0=$abc$109383$new_n59346_ i1=$abc$109383$new_n58992_ nq=$abc$109383$new_n59347_
-.subckt oa22_x2 i0=$abc$109383$new_n57607_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59347_ q=$abc$109383$new_n59348_
-.subckt oa22_x2 i0=$abc$109383$new_n59348_ i1=$abc$109383$new_n59340_ i2=$abc$109383$new_n59339_ q=$abc$109383$new_n59349_
-.subckt o2_x2 i0=$abc$109383$new_n59349_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59350_
-.subckt oa22_x2 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n41945_ q=$abc$109383$new_n59351_
-.subckt a2_x2 i0=$abc$109383$new_n59351_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59352_
+.subckt or21nand_x1 i0=$abc$109383$new_n57607_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59347_ nq=$abc$109383$new_n59348_
+.subckt or21nand_x1 i0=$abc$109383$new_n59348_ i1=$abc$109383$new_n59340_ i2=$abc$109383$new_n59339_ nq=$abc$109383$new_n59349_
+.subckt or2_x1 i0=$abc$109383$new_n59349_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59350_
+.subckt or21nand_x1 i0=$abc$109383$new_n59083_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n41945_ nq=$abc$109383$new_n59351_
+.subckt and2_x1 i0=$abc$109383$new_n59351_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59352_
 .subckt nand2_x0 i0=$abc$109383$new_n59352_ i1=$abc$109383$new_n59350_ nq=$abc$109383$new_n59353_
-.subckt a2_x2 i0=$abc$109383$new_n59353_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107366
+.subckt and2_x1 i0=$abc$109383$new_n59353_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107366
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[22] nq=$abc$109383$new_n59355_
 .subckt nand4_x0 i0=$abc$109383$new_n58805_ i1=$abc$109383$new_n58634_ i2=$abc$109383$new_n59019_ i3=soc.cpu.minerva.exception.misa__r__extensions[22] nq=$abc$109383$new_n59356_
 .subckt nand4_x0 i0=$abc$109383$new_n58840_ i1=$abc$109383$new_n58561_ i2=$abc$109383$new_n58950_ i3=soc.cpu.minerva.exception.irq_mask__r__value[22] nq=$abc$109383$new_n59357_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58878_ i3=soc.cpu.minerva.exception.mtvec__r__base[20] nq=$abc$109383$new_n59358_
-.subckt a4_x2 i0=$abc$109383$new_n59358_ i1=$abc$109383$new_n59357_ i2=$abc$109383$new_n59356_ i3=$abc$109383$new_n59355_ q=$abc$109383$new_n59359_
+.subckt and4_x1 i0=$abc$109383$new_n59358_ i1=$abc$109383$new_n59357_ i2=$abc$109383$new_n59356_ i3=$abc$109383$new_n59355_ q=$abc$109383$new_n59359_
 .subckt nand3_x0 i0=$abc$109383$new_n59094_ i1=$abc$109383$new_n59093_ i2=soc.cpu.minerva.exception.mtval__r__value[22] nq=$abc$109383$new_n59360_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[22] nq=$abc$109383$new_n59361_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[20] nq=$abc$109383$new_n59362_
-.subckt a2_x2 i0=$abc$109383$new_n59362_ i1=$abc$109383$new_n59361_ q=$abc$109383$new_n59363_
+.subckt and2_x1 i0=$abc$109383$new_n59362_ i1=$abc$109383$new_n59361_ q=$abc$109383$new_n59363_
 .subckt nand4_x0 i0=$abc$109383$new_n59363_ i1=$abc$109383$new_n59360_ i2=$abc$109383$new_n59359_ i3=$abc$109383$new_n58669_ nq=$abc$109383$new_n59364_
 .subckt nand3_x0 i0=$abc$109383$new_n59364_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n30265_ nq=$abc$109383$new_n59365_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53752_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59366_
-.subckt a2_x2 i0=$abc$109383$new_n56780_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59367_
-.subckt oa22_x2 i0=$abc$109383$new_n59367_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59368_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[22] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[22] q=$abc$109383$new_n59369_
-.subckt ao22_x2 i0=$abc$109383$new_n59369_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ q=$abc$109383$new_n59370_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20170_ q=$abc$109383$new_n59371_
-.subckt oa22_x2 i0=$abc$109383$new_n59371_ i1=$abc$109383$new_n59370_ i2=$abc$109383$new_n59368_ q=$abc$109383$new_n59372_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53752_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59366_
+.subckt and2_x1 i0=$abc$109383$new_n56780_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59367_
+.subckt or21nand_x1 i0=$abc$109383$new_n59367_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59368_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[22] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[22] q=$abc$109383$new_n59369_
+.subckt and21nor_x1 i0=$abc$109383$new_n59369_ i1=$abc$109383$new_n58647_ i2=$abc$109383$new_n58646_ nq=$abc$109383$new_n59370_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20170_ q=$abc$109383$new_n59371_
+.subckt or21nand_x1 i0=$abc$109383$new_n59371_ i1=$abc$109383$new_n59370_ i2=$abc$109383$new_n59368_ nq=$abc$109383$new_n59372_
 .subckt nand2_x0 i0=$abc$109383$new_n59372_ i1=$abc$109383$new_n58700_ nq=$abc$109383$new_n59373_
-.subckt oa22_x2 i0=$abc$109383$new_n57628_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59373_ q=$abc$109383$new_n59374_
-.subckt oa22_x2 i0=$abc$109383$new_n59374_ i1=$abc$109383$new_n59366_ i2=$abc$109383$new_n59365_ q=$abc$109383$new_n59375_
-.subckt o2_x2 i0=$abc$109383$new_n59375_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59376_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52176_ q=$abc$109383$new_n59377_
-.subckt a2_x2 i0=$abc$109383$new_n59377_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59378_
+.subckt or21nand_x1 i0=$abc$109383$new_n57628_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59373_ nq=$abc$109383$new_n59374_
+.subckt or21nand_x1 i0=$abc$109383$new_n59374_ i1=$abc$109383$new_n59366_ i2=$abc$109383$new_n59365_ nq=$abc$109383$new_n59375_
+.subckt or2_x1 i0=$abc$109383$new_n59375_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59376_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n59113_ i2=$abc$109383$new_n52176_ nq=$abc$109383$new_n59377_
+.subckt and2_x1 i0=$abc$109383$new_n59377_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59378_
 .subckt nand2_x0 i0=$abc$109383$new_n59378_ i1=$abc$109383$new_n59376_ nq=$abc$109383$new_n59379_
-.subckt a2_x2 i0=$abc$109383$new_n59379_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107370
+.subckt and2_x1 i0=$abc$109383$new_n59379_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107370
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[23] nq=$abc$109383$new_n59381_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[21] nq=$abc$109383$new_n59382_
 .subckt nand2_x0 i0=$abc$109383$new_n59382_ i1=$abc$109383$new_n59381_ nq=$abc$109383$new_n59383_
-.subckt a2_x2 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[23] q=$abc$109383$new_n59384_
+.subckt and2_x1 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[23] q=$abc$109383$new_n59384_
 .subckt nand3_x0 i0=$abc$109383$new_n59094_ i1=$abc$109383$new_n59093_ i2=soc.cpu.minerva.exception.mtval__r__value[23] nq=$abc$109383$new_n59385_
 .subckt nand4_x0 i0=$abc$109383$new_n58807_ i1=$abc$109383$new_n58805_ i2=$abc$109383$new_n58541_ i3=soc.cpu.minerva.exception.mtvec__r__base[21] nq=$abc$109383$new_n59386_
 .subckt nand4_x0 i0=$abc$109383$new_n58805_ i1=$abc$109383$new_n58541_ i2=$abc$109383$new_n59019_ i3=soc.cpu.minerva.exception.misa__r__extensions[23] nq=$abc$109383$new_n59387_
 .subckt nand4_x0 i0=$abc$109383$new_n58562_ i1=$abc$109383$new_n58561_ i2=$abc$109383$new_n58529_ i3=soc.cpu.minerva.exception.irq_mask__r__value[23] nq=$abc$109383$new_n59388_
-.subckt a3_x2 i0=$abc$109383$new_n59388_ i1=$abc$109383$new_n59387_ i2=$abc$109383$new_n59386_ q=$abc$109383$new_n59389_
+.subckt and3_x1 i0=$abc$109383$new_n59388_ i1=$abc$109383$new_n59387_ i2=$abc$109383$new_n59386_ q=$abc$109383$new_n59389_
 .subckt nand2_x0 i0=$abc$109383$new_n59389_ i1=$abc$109383$new_n59385_ nq=$abc$109383$new_n59390_
-.subckt o4_x2 i0=$abc$109383$new_n59390_ i1=$abc$109383$new_n59384_ i2=$abc$109383$new_n59383_ i3=$abc$109383$new_n58619_ q=$abc$109383$new_n59391_
+.subckt or4_x1 i0=$abc$109383$new_n59390_ i1=$abc$109383$new_n59384_ i2=$abc$109383$new_n59383_ i3=$abc$109383$new_n58619_ q=$abc$109383$new_n59391_
 .subckt nand3_x0 i0=$abc$109383$new_n59391_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n30265_ nq=$abc$109383$new_n59392_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n15388_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59393_
-.subckt a2_x2 i0=$abc$109383$new_n56790_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59394_
-.subckt oa22_x2 i0=$abc$109383$new_n59394_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59395_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[23] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[23] q=$abc$109383$new_n59396_
-.subckt ao22_x2 i0=$abc$109383$new_n59396_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ q=$abc$109383$new_n59397_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20176_ q=$abc$109383$new_n59398_
-.subckt oa22_x2 i0=$abc$109383$new_n59398_ i1=$abc$109383$new_n59397_ i2=$abc$109383$new_n59395_ q=$abc$109383$new_n59399_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n15388_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59393_
+.subckt and2_x1 i0=$abc$109383$new_n56790_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59394_
+.subckt or21nand_x1 i0=$abc$109383$new_n59394_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59395_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[23] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[23] q=$abc$109383$new_n59396_
+.subckt and21nor_x1 i0=$abc$109383$new_n59396_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ nq=$abc$109383$new_n59397_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20176_ q=$abc$109383$new_n59398_
+.subckt or21nand_x1 i0=$abc$109383$new_n59398_ i1=$abc$109383$new_n59397_ i2=$abc$109383$new_n59395_ nq=$abc$109383$new_n59399_
 .subckt nand2_x0 i0=$abc$109383$new_n59399_ i1=$abc$109383$new_n58700_ nq=$abc$109383$new_n59400_
-.subckt oa22_x2 i0=$abc$109383$new_n57650_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59400_ q=$abc$109383$new_n59401_
-.subckt oa22_x2 i0=$abc$109383$new_n59401_ i1=$abc$109383$new_n59393_ i2=$abc$109383$new_n59392_ q=$abc$109383$new_n59402_
-.subckt o2_x2 i0=$abc$109383$new_n59402_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59403_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n41767_ q=$abc$109383$new_n59404_
-.subckt a2_x2 i0=$abc$109383$new_n59404_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59405_
+.subckt or21nand_x1 i0=$abc$109383$new_n57650_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59400_ nq=$abc$109383$new_n59401_
+.subckt or21nand_x1 i0=$abc$109383$new_n59401_ i1=$abc$109383$new_n59393_ i2=$abc$109383$new_n59392_ nq=$abc$109383$new_n59402_
+.subckt or2_x1 i0=$abc$109383$new_n59402_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59403_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n41767_ nq=$abc$109383$new_n59404_
+.subckt and2_x1 i0=$abc$109383$new_n59404_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59405_
 .subckt nand2_x0 i0=$abc$109383$new_n59405_ i1=$abc$109383$new_n59403_ nq=$abc$109383$new_n59406_
-.subckt a2_x2 i0=$abc$109383$new_n59406_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107374
+.subckt and2_x1 i0=$abc$109383$new_n59406_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107374
 .subckt nand2_x0 i0=$abc$109383$new_n58554_ i1=soc.cpu.minerva.exception.mscratch__r__value[24] nq=$abc$109383$new_n59408_
 .subckt nand2_x0 i0=$abc$109383$new_n58680_ i1=soc.cpu.minerva.exception.mepc__r__base[22] nq=$abc$109383$new_n59409_
 .subckt nand2_x0 i0=$abc$109383$new_n59409_ i1=$abc$109383$new_n59408_ nq=$abc$109383$new_n59410_
-.subckt a2_x2 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[24] q=$abc$109383$new_n59411_
+.subckt and2_x1 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[24] q=$abc$109383$new_n59411_
 .subckt nand3_x0 i0=$abc$109383$new_n59094_ i1=$abc$109383$new_n59093_ i2=soc.cpu.minerva.exception.mtval__r__value[24] nq=$abc$109383$new_n59412_
 .subckt nand4_x0 i0=$abc$109383$new_n58807_ i1=$abc$109383$new_n58805_ i2=$abc$109383$new_n58541_ i3=soc.cpu.minerva.exception.mtvec__r__base[22] nq=$abc$109383$new_n59413_
 .subckt nand4_x0 i0=$abc$109383$new_n58805_ i1=$abc$109383$new_n58541_ i2=$abc$109383$new_n59019_ i3=soc.cpu.minerva.exception.misa__r__extensions[24] nq=$abc$109383$new_n59414_
 .subckt nand4_x0 i0=$abc$109383$new_n58562_ i1=$abc$109383$new_n58561_ i2=$abc$109383$new_n58529_ i3=soc.cpu.minerva.exception.irq_mask__r__value[24] nq=$abc$109383$new_n59415_
-.subckt a3_x2 i0=$abc$109383$new_n59415_ i1=$abc$109383$new_n59414_ i2=$abc$109383$new_n59413_ q=$abc$109383$new_n59416_
+.subckt and3_x1 i0=$abc$109383$new_n59415_ i1=$abc$109383$new_n59414_ i2=$abc$109383$new_n59413_ q=$abc$109383$new_n59416_
 .subckt nand2_x0 i0=$abc$109383$new_n59416_ i1=$abc$109383$new_n59412_ nq=$abc$109383$new_n59417_
-.subckt o4_x2 i0=$abc$109383$new_n59417_ i1=$abc$109383$new_n59411_ i2=$abc$109383$new_n59410_ i3=$abc$109383$new_n58619_ q=$abc$109383$new_n59418_
+.subckt or4_x1 i0=$abc$109383$new_n59417_ i1=$abc$109383$new_n59411_ i2=$abc$109383$new_n59410_ i3=$abc$109383$new_n58619_ q=$abc$109383$new_n59418_
 .subckt nand3_x0 i0=$abc$109383$new_n59418_ i1=$abc$109383$new_n59148_ i2=$abc$109383$new_n30265_ nq=$abc$109383$new_n59419_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53805_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59420_
-.subckt a2_x2 i0=$abc$109383$new_n56799_ i1=$abc$109383$new_n56575_ q=$abc$109383$new_n59421_
-.subckt oa22_x2 i0=$abc$109383$new_n59421_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59422_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[24] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[24] q=$abc$109383$new_n59423_
-.subckt ao22_x2 i0=$abc$109383$new_n59423_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ q=$abc$109383$new_n59424_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20182_ q=$abc$109383$new_n59425_
-.subckt oa22_x2 i0=$abc$109383$new_n59425_ i1=$abc$109383$new_n59424_ i2=$abc$109383$new_n59422_ q=$abc$109383$new_n59426_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53805_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59420_
+.subckt and2_x1 i0=$abc$109383$new_n56799_ i1=$abc$109383$new_n56575_ q=$abc$109383$new_n59421_
+.subckt or21nand_x1 i0=$abc$109383$new_n59421_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59422_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[24] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[24] q=$abc$109383$new_n59423_
+.subckt and21nor_x1 i0=$abc$109383$new_n59423_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ nq=$abc$109383$new_n59424_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20182_ q=$abc$109383$new_n59425_
+.subckt or21nand_x1 i0=$abc$109383$new_n59425_ i1=$abc$109383$new_n59424_ i2=$abc$109383$new_n59422_ nq=$abc$109383$new_n59426_
 .subckt nand2_x0 i0=$abc$109383$new_n59426_ i1=$abc$109383$new_n58700_ nq=$abc$109383$new_n59427_
-.subckt oa22_x2 i0=$abc$109383$new_n57673_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59427_ q=$abc$109383$new_n59428_
-.subckt oa22_x2 i0=$abc$109383$new_n59428_ i1=$abc$109383$new_n59420_ i2=$abc$109383$new_n59419_ q=$abc$109383$new_n59429_
-.subckt o2_x2 i0=$abc$109383$new_n59429_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59430_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52226_ q=$abc$109383$new_n59431_
-.subckt a2_x2 i0=$abc$109383$new_n59431_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59432_
+.subckt or21nand_x1 i0=$abc$109383$new_n57673_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59427_ nq=$abc$109383$new_n59428_
+.subckt or21nand_x1 i0=$abc$109383$new_n59428_ i1=$abc$109383$new_n59420_ i2=$abc$109383$new_n59419_ nq=$abc$109383$new_n59429_
+.subckt or2_x1 i0=$abc$109383$new_n59429_ i1=$abc$109383$new_n58746_ q=$abc$109383$new_n59430_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52226_ nq=$abc$109383$new_n59431_
+.subckt and2_x1 i0=$abc$109383$new_n59431_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59432_
 .subckt nand2_x0 i0=$abc$109383$new_n59432_ i1=$abc$109383$new_n59430_ nq=$abc$109383$new_n59433_
-.subckt a2_x2 i0=$abc$109383$new_n59433_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107378
-.subckt a3_x2 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.misa__r__extensions[25] q=$abc$109383$new_n59435_
-.subckt a3_x2 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[25] q=$abc$109383$new_n59436_
-.subckt a3_x2 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.mtvec__r__base[23] q=$abc$109383$new_n59437_
+.subckt and2_x1 i0=$abc$109383$new_n59433_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107378
+.subckt and3_x1 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58634_ i2=soc.cpu.minerva.exception.misa__r__extensions[25] q=$abc$109383$new_n59435_
+.subckt and3_x1 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[25] q=$abc$109383$new_n59436_
+.subckt and3_x1 i0=$abc$109383$new_n58548_ i1=$abc$109383$new_n58542_ i2=soc.cpu.minerva.exception.mtvec__r__base[23] q=$abc$109383$new_n59437_
 .subckt nor4_x0 i0=$abc$109383$new_n59437_ i1=$abc$109383$new_n59436_ i2=$abc$109383$new_n59435_ i3=$abc$109383$new_n58619_ nq=$abc$109383$new_n59438_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[25] nq=$abc$109383$new_n59439_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[25] nq=$abc$109383$new_n59440_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[23] nq=$abc$109383$new_n59441_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[25] nq=$abc$109383$new_n59442_
-.subckt a4_x2 i0=$abc$109383$new_n59442_ i1=$abc$109383$new_n59441_ i2=$abc$109383$new_n59440_ i3=$abc$109383$new_n59439_ q=$abc$109383$new_n59443_
-.subckt a2_x2 i0=$abc$109383$new_n59443_ i1=$abc$109383$new_n59438_ q=$abc$109383$new_n59444_
-.subckt a2_x2 i0=$abc$109383$new_n56808_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59445_
-.subckt oa22_x2 i0=$abc$109383$new_n59445_ i1=$abc$109383$new_n58776_ i2=$abc$109383$new_n58656_ q=$abc$109383$new_n59446_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[25] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[25] q=$abc$109383$new_n59447_
-.subckt ao22_x2 i0=$abc$109383$new_n59447_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n59448_
-.subckt o2_x2 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20188_ q=$abc$109383$new_n59449_
-.subckt oa22_x2 i0=$abc$109383$new_n59449_ i1=$abc$109383$new_n59448_ i2=$abc$109383$new_n59446_ q=$abc$109383$new_n59450_
+.subckt and4_x1 i0=$abc$109383$new_n59442_ i1=$abc$109383$new_n59441_ i2=$abc$109383$new_n59440_ i3=$abc$109383$new_n59439_ q=$abc$109383$new_n59443_
+.subckt and2_x1 i0=$abc$109383$new_n59443_ i1=$abc$109383$new_n59438_ q=$abc$109383$new_n59444_
+.subckt and2_x1 i0=$abc$109383$new_n56808_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59445_
+.subckt or21nand_x1 i0=$abc$109383$new_n59445_ i1=$abc$109383$new_n58776_ i2=$abc$109383$new_n58656_ nq=$abc$109383$new_n59446_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[25] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[25] q=$abc$109383$new_n59447_
+.subckt and21nor_x1 i0=$abc$109383$new_n59447_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n59448_
+.subckt or2_x1 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20188_ q=$abc$109383$new_n59449_
+.subckt or21nand_x1 i0=$abc$109383$new_n59449_ i1=$abc$109383$new_n59448_ i2=$abc$109383$new_n59446_ nq=$abc$109383$new_n59450_
 .subckt nand2_x0 i0=$abc$109383$new_n59450_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n59451_
-.subckt oa22_x2 i0=$abc$109383$new_n57695_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59451_ q=$abc$109383$new_n59452_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53839_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n59453_
-.subckt oa22_x2 i0=$abc$109383$new_n59453_ i1=$abc$109383$new_n59452_ i2=$abc$109383$new_n59444_ q=$abc$109383$new_n59454_
-.subckt o2_x2 i0=$abc$109383$new_n59454_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59455_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52238_ q=$abc$109383$new_n59456_
-.subckt a2_x2 i0=$abc$109383$new_n59456_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59457_
+.subckt or21nand_x1 i0=$abc$109383$new_n57695_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59451_ nq=$abc$109383$new_n59452_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53839_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n59453_
+.subckt or21nand_x1 i0=$abc$109383$new_n59453_ i1=$abc$109383$new_n59452_ i2=$abc$109383$new_n59444_ nq=$abc$109383$new_n59454_
+.subckt or2_x1 i0=$abc$109383$new_n59454_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59455_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52238_ nq=$abc$109383$new_n59456_
+.subckt and2_x1 i0=$abc$109383$new_n59456_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59457_
 .subckt nand2_x0 i0=$abc$109383$new_n59457_ i1=$abc$109383$new_n59455_ nq=$abc$109383$new_n59458_
-.subckt a2_x2 i0=$abc$109383$new_n59458_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107382
+.subckt and2_x1 i0=$abc$109383$new_n59458_ i1=$abc$109383$new_n59181_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107382
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n59460_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[26] nq=$abc$109383$new_n59461_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58750_ i3=soc.cpu.minerva.exception.mtvec__r__base[24] nq=$abc$109383$new_n59462_
-.subckt a3_x2 i0=$abc$109383$new_n59462_ i1=$abc$109383$new_n59461_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59463_
+.subckt and3_x1 i0=$abc$109383$new_n59462_ i1=$abc$109383$new_n59461_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59463_
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[26] nq=$abc$109383$new_n59464_
 .subckt nand2_x0 i0=$abc$109383$new_n58567_ i1=soc.cpu.minerva.exception.mtval__r__value[26] nq=$abc$109383$new_n59465_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[24] nq=$abc$109383$new_n59466_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[26] nq=$abc$109383$new_n59467_
-.subckt a4_x2 i0=$abc$109383$new_n59467_ i1=$abc$109383$new_n59466_ i2=$abc$109383$new_n59465_ i3=$abc$109383$new_n59464_ q=$abc$109383$new_n59468_
-.subckt a2_x2 i0=$abc$109383$new_n59468_ i1=$abc$109383$new_n59463_ q=$abc$109383$new_n59469_
+.subckt and4_x1 i0=$abc$109383$new_n59467_ i1=$abc$109383$new_n59466_ i2=$abc$109383$new_n59465_ i3=$abc$109383$new_n59464_ q=$abc$109383$new_n59468_
+.subckt and2_x1 i0=$abc$109383$new_n59468_ i1=$abc$109383$new_n59463_ q=$abc$109383$new_n59469_
 .subckt nand2_x0 i0=$abc$109383$new_n56817_ i1=$abc$109383$new_n56577_ nq=$abc$109383$new_n59470_
 .subckt nand2_x0 i0=$abc$109383$new_n58776_ i1=$abc$109383$new_n59470_ nq=$abc$109383$new_n59471_
-.subckt mx2_x2 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[26] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[26] q=$abc$109383$new_n59472_
-.subckt oa22_x2 i0=$abc$109383$new_n59472_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ q=$abc$109383$new_n59473_
-.subckt oa22_x2 i0=$abc$109383$new_n20194_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n59473_ q=$abc$109383$new_n59474_
-.subckt oa22_x2 i0=$abc$109383$new_n59474_ i1=$abc$109383$new_n59471_ i2=$abc$109383$new_n58656_ q=$abc$109383$new_n59475_
+.subckt mux2_x1 cmd=$abc$109383$new_n58609_ i0=soc.cpu.minerva.gprf.mem._1_[26] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[26] q=$abc$109383$new_n59472_
+.subckt or21nand_x1 i0=$abc$109383$new_n59472_ i1=$abc$109383$new_n58605_ i2=$abc$109383$new_n58591_ nq=$abc$109383$new_n59473_
+.subckt or21nand_x1 i0=$abc$109383$new_n20194_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n59473_ nq=$abc$109383$new_n59474_
+.subckt or21nand_x1 i0=$abc$109383$new_n59474_ i1=$abc$109383$new_n59471_ i2=$abc$109383$new_n58656_ nq=$abc$109383$new_n59475_
 .subckt nand2_x0 i0=$abc$109383$new_n59475_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n59476_
-.subckt oa22_x2 i0=$abc$109383$new_n57717_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59476_ q=$abc$109383$new_n59477_
-.subckt ao22_x2 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n53861_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n59478_
-.subckt oa22_x2 i0=$abc$109383$new_n59478_ i1=$abc$109383$new_n59477_ i2=$abc$109383$new_n59469_ q=$abc$109383$new_n59479_
-.subckt o2_x2 i0=$abc$109383$new_n59479_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59480_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52250_ q=$abc$109383$new_n59481_
-.subckt a2_x2 i0=$abc$109383$new_n59481_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59482_
+.subckt or21nand_x1 i0=$abc$109383$new_n57717_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59476_ nq=$abc$109383$new_n59477_
+.subckt and21nor_x1 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n53861_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n59478_
+.subckt or21nand_x1 i0=$abc$109383$new_n59478_ i1=$abc$109383$new_n59477_ i2=$abc$109383$new_n59469_ nq=$abc$109383$new_n59479_
+.subckt or2_x1 i0=$abc$109383$new_n59479_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59480_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52250_ nq=$abc$109383$new_n59481_
+.subckt and2_x1 i0=$abc$109383$new_n59481_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59482_
 .subckt nand2_x0 i0=$abc$109383$new_n59482_ i1=$abc$109383$new_n59480_ nq=$abc$109383$new_n59483_
-.subckt a2_x2 i0=$abc$109383$new_n59483_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107386
+.subckt and2_x1 i0=$abc$109383$new_n59483_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107386
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.mtvec__r__base[25] nq=$abc$109383$new_n59485_
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[27] nq=$abc$109383$new_n59486_
-.subckt a3_x2 i0=$abc$109383$new_n59486_ i1=$abc$109383$new_n59485_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59487_
+.subckt and3_x1 i0=$abc$109383$new_n59486_ i1=$abc$109383$new_n59485_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59487_
 .subckt nand3_x0 i0=$abc$109383$new_n59094_ i1=$abc$109383$new_n59093_ i2=soc.cpu.minerva.exception.mtval__r__value[27] nq=$abc$109383$new_n59488_
 .subckt nand2_x0 i0=$abc$109383$new_n59488_ i1=$abc$109383$new_n59487_ nq=$abc$109383$new_n59489_
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58844_ i2=$abc$109383$new_n58840_ i3=soc.cpu.minerva.exception.mscratch__r__value[27] nq=$abc$109383$new_n59490_
@@ -44766,1281 +44766,1281 @@
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58844_ i3=soc.cpu.minerva.exception.mcause__r__ecode[27] nq=$abc$109383$new_n59492_
 .subckt nand3_x0 i0=$abc$109383$new_n59492_ i1=$abc$109383$new_n59491_ i2=$abc$109383$new_n59490_ nq=$abc$109383$new_n59493_
 .subckt nor2_x0 i0=$abc$109383$new_n59493_ i1=$abc$109383$new_n59489_ nq=$abc$109383$new_n59494_
-.subckt ao22_x2 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53894_ i2=$abc$109383$new_n58975_ q=$abc$109383$new_n59495_
-.subckt a2_x2 i0=$abc$109383$new_n56826_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59496_
-.subckt oa22_x2 i0=$abc$109383$new_n59496_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ q=$abc$109383$new_n59497_
-.subckt mx2_x2 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[27] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[27] q=$abc$109383$new_n59498_
-.subckt ao22_x2 i0=$abc$109383$new_n59498_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ q=$abc$109383$new_n59499_
-.subckt o2_x2 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20200_ q=$abc$109383$new_n59500_
-.subckt oa22_x2 i0=$abc$109383$new_n59500_ i1=$abc$109383$new_n59499_ i2=$abc$109383$new_n59497_ q=$abc$109383$new_n59501_
+.subckt and21nor_x1 i0=$abc$109383$new_n59039_ i1=$abc$109383$new_n53894_ i2=$abc$109383$new_n58975_ nq=$abc$109383$new_n59495_
+.subckt and2_x1 i0=$abc$109383$new_n56826_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59496_
+.subckt or21nand_x1 i0=$abc$109383$new_n59496_ i1=$abc$109383$new_n59166_ i2=$abc$109383$new_n58726_ nq=$abc$109383$new_n59497_
+.subckt mux2_x1 cmd=$abc$109383$new_n58610_ i0=soc.cpu.minerva.gprf.mem._1_[27] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[27] q=$abc$109383$new_n59498_
+.subckt and21nor_x1 i0=$abc$109383$new_n59498_ i1=$abc$109383$new_n58614_ i2=$abc$109383$new_n58581_ nq=$abc$109383$new_n59499_
+.subckt or2_x1 i0=$abc$109383$new_n58653_ i1=$abc$109383$new_n20200_ q=$abc$109383$new_n59500_
+.subckt or21nand_x1 i0=$abc$109383$new_n59500_ i1=$abc$109383$new_n59499_ i2=$abc$109383$new_n59497_ nq=$abc$109383$new_n59501_
 .subckt nand2_x0 i0=$abc$109383$new_n59501_ i1=$abc$109383$new_n58700_ nq=$abc$109383$new_n59502_
-.subckt oa22_x2 i0=$abc$109383$new_n57739_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59502_ q=$abc$109383$new_n59503_
-.subckt oa22_x2 i0=$abc$109383$new_n59503_ i1=$abc$109383$new_n59495_ i2=$abc$109383$new_n59494_ q=$abc$109383$new_n59504_
-.subckt o2_x2 i0=$abc$109383$new_n59504_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59505_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52270_ q=$abc$109383$new_n59506_
-.subckt a2_x2 i0=$abc$109383$new_n59506_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59507_
+.subckt or21nand_x1 i0=$abc$109383$new_n57739_ i1=$abc$109383$new_n58780_ i2=$abc$109383$new_n59502_ nq=$abc$109383$new_n59503_
+.subckt or21nand_x1 i0=$abc$109383$new_n59503_ i1=$abc$109383$new_n59495_ i2=$abc$109383$new_n59494_ nq=$abc$109383$new_n59504_
+.subckt or2_x1 i0=$abc$109383$new_n59504_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59505_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52270_ nq=$abc$109383$new_n59506_
+.subckt and2_x1 i0=$abc$109383$new_n59506_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59507_
 .subckt nand2_x0 i0=$abc$109383$new_n59507_ i1=$abc$109383$new_n59505_ nq=$abc$109383$new_n59508_
-.subckt a2_x2 i0=$abc$109383$new_n59508_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107390
+.subckt and2_x1 i0=$abc$109383$new_n59508_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107390
 .subckt nand3_x0 i0=$abc$109383$new_n58536_ i1=$abc$109383$new_n58530_ i2=soc.cpu.minerva.exception.irq_mask__r__value[28] nq=$abc$109383$new_n59510_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58671_ i2=soc.cpu.minerva.exception.mtvec__r__base[26] nq=$abc$109383$new_n59511_
-.subckt a3_x2 i0=$abc$109383$new_n59511_ i1=$abc$109383$new_n59510_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59512_
+.subckt and3_x1 i0=$abc$109383$new_n59511_ i1=$abc$109383$new_n59510_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59512_
 .subckt nand2_x0 i0=$abc$109383$new_n58559_ i1=soc.cpu.minerva.exception.mcause__r__ecode[28] nq=$abc$109383$new_n59513_
 .subckt nand2_x0 i0=$abc$109383$new_n58677_ i1=soc.cpu.minerva.exception.mscratch__r__value[28] nq=$abc$109383$new_n59514_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[26] nq=$abc$109383$new_n59515_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[28] nq=$abc$109383$new_n59516_
-.subckt a4_x2 i0=$abc$109383$new_n59516_ i1=$abc$109383$new_n59515_ i2=$abc$109383$new_n59514_ i3=$abc$109383$new_n59513_ q=$abc$109383$new_n59517_
-.subckt a2_x2 i0=$abc$109383$new_n59517_ i1=$abc$109383$new_n59512_ q=$abc$109383$new_n59518_
-.subckt a2_x2 i0=$abc$109383$new_n56835_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59519_
-.subckt oa22_x2 i0=$abc$109383$new_n59519_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58656_ q=$abc$109383$new_n59520_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[28] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[28] q=$abc$109383$new_n59521_
-.subckt ao22_x2 i0=$abc$109383$new_n59521_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n59522_
-.subckt o2_x2 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20206_ q=$abc$109383$new_n59523_
-.subckt oa22_x2 i0=$abc$109383$new_n59523_ i1=$abc$109383$new_n59522_ i2=$abc$109383$new_n59520_ q=$abc$109383$new_n59524_
+.subckt and4_x1 i0=$abc$109383$new_n59516_ i1=$abc$109383$new_n59515_ i2=$abc$109383$new_n59514_ i3=$abc$109383$new_n59513_ q=$abc$109383$new_n59517_
+.subckt and2_x1 i0=$abc$109383$new_n59517_ i1=$abc$109383$new_n59512_ q=$abc$109383$new_n59518_
+.subckt and2_x1 i0=$abc$109383$new_n56835_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59519_
+.subckt or21nand_x1 i0=$abc$109383$new_n59519_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58656_ nq=$abc$109383$new_n59520_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[28] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[28] q=$abc$109383$new_n59521_
+.subckt and21nor_x1 i0=$abc$109383$new_n59521_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n59522_
+.subckt or2_x1 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20206_ q=$abc$109383$new_n59523_
+.subckt or21nand_x1 i0=$abc$109383$new_n59523_ i1=$abc$109383$new_n59522_ i2=$abc$109383$new_n59520_ nq=$abc$109383$new_n59524_
 .subckt nand2_x0 i0=$abc$109383$new_n59524_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n59525_
-.subckt oa22_x2 i0=$abc$109383$new_n57761_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59525_ q=$abc$109383$new_n59526_
-.subckt ao22_x2 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n53917_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n59527_
-.subckt oa22_x2 i0=$abc$109383$new_n59527_ i1=$abc$109383$new_n59526_ i2=$abc$109383$new_n59518_ q=$abc$109383$new_n59528_
-.subckt o2_x2 i0=$abc$109383$new_n59528_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59529_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52283_ q=$abc$109383$new_n59530_
-.subckt a2_x2 i0=$abc$109383$new_n59530_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59531_
+.subckt or21nand_x1 i0=$abc$109383$new_n57761_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59525_ nq=$abc$109383$new_n59526_
+.subckt and21nor_x1 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n53917_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n59527_
+.subckt or21nand_x1 i0=$abc$109383$new_n59527_ i1=$abc$109383$new_n59526_ i2=$abc$109383$new_n59518_ nq=$abc$109383$new_n59528_
+.subckt or2_x1 i0=$abc$109383$new_n59528_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59529_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n52283_ nq=$abc$109383$new_n59530_
+.subckt and2_x1 i0=$abc$109383$new_n59530_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59531_
 .subckt nand2_x0 i0=$abc$109383$new_n59531_ i1=$abc$109383$new_n59529_ nq=$abc$109383$new_n59532_
-.subckt a2_x2 i0=$abc$109383$new_n59532_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107394
+.subckt and2_x1 i0=$abc$109383$new_n59532_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107394
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58985_ i2=$abc$109383$new_n58840_ i3=soc.cpu.minerva.exception.mscratch__r__value[29] nq=$abc$109383$new_n59534_
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58844_ i3=soc.cpu.minerva.exception.mcause__r__ecode[29] nq=$abc$109383$new_n59535_
-.subckt a2_x2 i0=$abc$109383$new_n59535_ i1=$abc$109383$new_n59534_ q=$abc$109383$new_n59536_
+.subckt and2_x1 i0=$abc$109383$new_n59535_ i1=$abc$109383$new_n59534_ q=$abc$109383$new_n59536_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58566_ i2=$abc$109383$new_n58985_ i3=soc.cpu.minerva.exception.mtval__r__value[29] nq=$abc$109383$new_n59537_
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58632_ i2=soc.cpu.minerva.exception.irq_mask__r__value[29] nq=$abc$109383$new_n59538_
-.subckt a2_x2 i0=$abc$109383$new_n59538_ i1=$abc$109383$new_n58668_ q=$abc$109383$new_n59539_
+.subckt and2_x1 i0=$abc$109383$new_n59538_ i1=$abc$109383$new_n58668_ q=$abc$109383$new_n59539_
 .subckt nand4_x0 i0=$abc$109383$new_n58986_ i1=$abc$109383$new_n58985_ i2=$abc$109383$new_n58913_ i3=soc.cpu.minerva.exception.mepc__r__base[27] nq=$abc$109383$new_n59540_
 .subckt nand4_x0 i0=$abc$109383$new_n58808_ i1=$abc$109383$new_n58806_ i2=$abc$109383$new_n58750_ i3=soc.cpu.minerva.exception.mtvec__r__base[27] nq=$abc$109383$new_n59541_
-.subckt a4_x2 i0=$abc$109383$new_n59541_ i1=$abc$109383$new_n59540_ i2=$abc$109383$new_n59539_ i3=$abc$109383$new_n59537_ q=$abc$109383$new_n59542_
-.subckt a2_x2 i0=$abc$109383$new_n59542_ i1=$abc$109383$new_n59536_ q=$abc$109383$new_n59543_
-.subckt a2_x2 i0=$abc$109383$new_n56846_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59544_
-.subckt oa22_x2 i0=$abc$109383$new_n59544_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n59545_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[29] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[29] q=$abc$109383$new_n59546_
-.subckt ao22_x2 i0=$abc$109383$new_n59546_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n59547_
-.subckt o2_x2 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20212_ q=$abc$109383$new_n59548_
-.subckt oa22_x2 i0=$abc$109383$new_n59548_ i1=$abc$109383$new_n59547_ i2=$abc$109383$new_n59545_ q=$abc$109383$new_n59549_
+.subckt and4_x1 i0=$abc$109383$new_n59541_ i1=$abc$109383$new_n59540_ i2=$abc$109383$new_n59539_ i3=$abc$109383$new_n59537_ q=$abc$109383$new_n59542_
+.subckt and2_x1 i0=$abc$109383$new_n59542_ i1=$abc$109383$new_n59536_ q=$abc$109383$new_n59543_
+.subckt and2_x1 i0=$abc$109383$new_n56846_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59544_
+.subckt or21nand_x1 i0=$abc$109383$new_n59544_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n59545_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[29] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[29] q=$abc$109383$new_n59546_
+.subckt and21nor_x1 i0=$abc$109383$new_n59546_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n59547_
+.subckt or2_x1 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20212_ q=$abc$109383$new_n59548_
+.subckt or21nand_x1 i0=$abc$109383$new_n59548_ i1=$abc$109383$new_n59547_ i2=$abc$109383$new_n59545_ nq=$abc$109383$new_n59549_
 .subckt nand2_x0 i0=$abc$109383$new_n59549_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n59550_
-.subckt oa22_x2 i0=$abc$109383$new_n57783_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59550_ q=$abc$109383$new_n59551_
-.subckt ao22_x2 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n15391_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n59552_
-.subckt oa22_x2 i0=$abc$109383$new_n59552_ i1=$abc$109383$new_n59551_ i2=$abc$109383$new_n59543_ q=$abc$109383$new_n59553_
-.subckt o2_x2 i0=$abc$109383$new_n59553_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59554_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n42764_ q=$abc$109383$new_n59555_
-.subckt a2_x2 i0=$abc$109383$new_n59555_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59556_
+.subckt or21nand_x1 i0=$abc$109383$new_n57783_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59550_ nq=$abc$109383$new_n59551_
+.subckt and21nor_x1 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n15391_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n59552_
+.subckt or21nand_x1 i0=$abc$109383$new_n59552_ i1=$abc$109383$new_n59551_ i2=$abc$109383$new_n59543_ nq=$abc$109383$new_n59553_
+.subckt or2_x1 i0=$abc$109383$new_n59553_ i1=$abc$109383$new_n58866_ q=$abc$109383$new_n59554_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n42764_ nq=$abc$109383$new_n59555_
+.subckt and2_x1 i0=$abc$109383$new_n59555_ i1=$abc$109383$new_n59321_ q=$abc$109383$new_n59556_
 .subckt nand2_x0 i0=$abc$109383$new_n59556_ i1=$abc$109383$new_n59554_ nq=$abc$109383$new_n59557_
-.subckt a2_x2 i0=$abc$109383$new_n59557_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107398
+.subckt and2_x1 i0=$abc$109383$new_n59557_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107398
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[30] nq=$abc$109383$new_n59559_
 .subckt nand3_x0 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.misa__r__mxl[0] nq=$abc$109383$new_n59560_
 .subckt nand3_x0 i0=$abc$109383$new_n58674_ i1=$abc$109383$new_n58750_ i2=soc.cpu.minerva.exception.mtvec__r__base[28] nq=$abc$109383$new_n59561_
-.subckt a4_x2 i0=$abc$109383$new_n59561_ i1=$abc$109383$new_n59560_ i2=$abc$109383$new_n59559_ i3=$abc$109383$new_n58528_ q=$abc$109383$new_n59562_
+.subckt and4_x1 i0=$abc$109383$new_n59561_ i1=$abc$109383$new_n59560_ i2=$abc$109383$new_n59559_ i3=$abc$109383$new_n58528_ q=$abc$109383$new_n59562_
 .subckt nand2_x0 i0=$abc$109383$new_n58555_ i1=soc.cpu.minerva.exception.mscratch__r__value[30] nq=$abc$109383$new_n59563_
 .subckt nand2_x0 i0=$abc$109383$new_n58683_ i1=soc.cpu.minerva.exception.mcause__r__ecode[30] nq=$abc$109383$new_n59564_
 .subckt nand2_x0 i0=$abc$109383$new_n58681_ i1=soc.cpu.minerva.exception.mepc__r__base[28] nq=$abc$109383$new_n59565_
 .subckt nand2_x0 i0=$abc$109383$new_n58685_ i1=soc.cpu.minerva.exception.mtval__r__value[30] nq=$abc$109383$new_n59566_
-.subckt a4_x2 i0=$abc$109383$new_n59566_ i1=$abc$109383$new_n59565_ i2=$abc$109383$new_n59564_ i3=$abc$109383$new_n59563_ q=$abc$109383$new_n59567_
-.subckt a2_x2 i0=$abc$109383$new_n59567_ i1=$abc$109383$new_n59562_ q=$abc$109383$new_n59568_
-.subckt a2_x2 i0=$abc$109383$new_n56856_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59569_
-.subckt oa22_x2 i0=$abc$109383$new_n59569_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ q=$abc$109383$new_n59570_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[30] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[30] q=$abc$109383$new_n59571_
-.subckt ao22_x2 i0=$abc$109383$new_n59571_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n59572_
-.subckt o2_x2 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20218_ q=$abc$109383$new_n59573_
-.subckt oa22_x2 i0=$abc$109383$new_n59573_ i1=$abc$109383$new_n59572_ i2=$abc$109383$new_n59570_ q=$abc$109383$new_n59574_
+.subckt and4_x1 i0=$abc$109383$new_n59566_ i1=$abc$109383$new_n59565_ i2=$abc$109383$new_n59564_ i3=$abc$109383$new_n59563_ q=$abc$109383$new_n59567_
+.subckt and2_x1 i0=$abc$109383$new_n59567_ i1=$abc$109383$new_n59562_ q=$abc$109383$new_n59568_
+.subckt and2_x1 i0=$abc$109383$new_n56856_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59569_
+.subckt or21nand_x1 i0=$abc$109383$new_n59569_ i1=$abc$109383$new_n58643_ i2=$abc$109383$new_n58577_ nq=$abc$109383$new_n59570_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[30] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[30] q=$abc$109383$new_n59571_
+.subckt and21nor_x1 i0=$abc$109383$new_n59571_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n59572_
+.subckt or2_x1 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20218_ q=$abc$109383$new_n59573_
+.subckt or21nand_x1 i0=$abc$109383$new_n59573_ i1=$abc$109383$new_n59572_ i2=$abc$109383$new_n59570_ nq=$abc$109383$new_n59574_
 .subckt nand2_x0 i0=$abc$109383$new_n59574_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n59575_
-.subckt oa22_x2 i0=$abc$109383$new_n57805_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59575_ q=$abc$109383$new_n59576_
-.subckt ao22_x2 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n53972_ i2=$abc$109383$new_n58759_ q=$abc$109383$new_n59577_
-.subckt oa22_x2 i0=$abc$109383$new_n59577_ i1=$abc$109383$new_n59576_ i2=$abc$109383$new_n59568_ q=$abc$109383$new_n59578_
-.subckt o2_x2 i0=$abc$109383$new_n59578_ i1=$abc$109383$new_n58623_ q=$abc$109383$new_n59579_
-.subckt oa22_x2 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n55477_ q=$abc$109383$new_n59580_
-.subckt a2_x2 i0=$abc$109383$new_n59580_ i1=$abc$109383$new_n59013_ q=$abc$109383$new_n59581_
+.subckt or21nand_x1 i0=$abc$109383$new_n57805_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59575_ nq=$abc$109383$new_n59576_
+.subckt and21nor_x1 i0=$abc$109383$new_n59038_ i1=$abc$109383$new_n53972_ i2=$abc$109383$new_n58759_ nq=$abc$109383$new_n59577_
+.subckt or21nand_x1 i0=$abc$109383$new_n59577_ i1=$abc$109383$new_n59576_ i2=$abc$109383$new_n59568_ nq=$abc$109383$new_n59578_
+.subckt or2_x1 i0=$abc$109383$new_n59578_ i1=$abc$109383$new_n58623_ q=$abc$109383$new_n59579_
+.subckt or21nand_x1 i0=$abc$109383$new_n30155_ i1=$abc$109383$new_n52366_ i2=$abc$109383$new_n55477_ nq=$abc$109383$new_n59580_
+.subckt and2_x1 i0=$abc$109383$new_n59580_ i1=$abc$109383$new_n59013_ q=$abc$109383$new_n59581_
 .subckt nand2_x0 i0=$abc$109383$new_n59581_ i1=$abc$109383$new_n59579_ nq=$abc$109383$new_n59582_
-.subckt a2_x2 i0=$abc$109383$new_n59582_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107402
+.subckt and2_x1 i0=$abc$109383$new_n59582_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107402
 .subckt nand3_x0 i0=$abc$109383$new_n58880_ i1=$abc$109383$new_n58950_ i2=soc.cpu.minerva.exception.irq_mask__r__value[31] nq=$abc$109383$new_n59584_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtvec__r__base[29] nq=$abc$109383$new_n59585_
-.subckt ao22_x2 i0=$abc$109383$new_n59585_ i1=$abc$109383$new_n59156_ i2=$abc$109383$new_n59584_ q=$abc$109383$new_n59586_
+.subckt and21nor_x1 i0=$abc$109383$new_n59585_ i1=$abc$109383$new_n59156_ i2=$abc$109383$new_n59584_ nq=$abc$109383$new_n59586_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mscratch__r__value[31] nq=$abc$109383$new_n59587_
-.subckt ao22_x2 i0=$abc$109383$new_n59587_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58528_ q=$abc$109383$new_n59588_
-.subckt a2_x2 i0=$abc$109383$new_n59588_ i1=$abc$109383$new_n59586_ q=$abc$109383$new_n59589_
+.subckt and21nor_x1 i0=$abc$109383$new_n59587_ i1=$abc$109383$new_n58797_ i2=$abc$109383$new_n58528_ nq=$abc$109383$new_n59588_
+.subckt and2_x1 i0=$abc$109383$new_n59588_ i1=$abc$109383$new_n59586_ q=$abc$109383$new_n59589_
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58844_ i2=$abc$109383$new_n58672_ i3=soc.cpu.minerva.exception.mepc__r__base[29] nq=$abc$109383$new_n59590_
 .subckt nand4_x0 i0=$abc$109383$new_n58846_ i1=$abc$109383$new_n58845_ i2=$abc$109383$new_n58844_ i3=soc.cpu.minerva.exception.mcause__r__interrupt nq=$abc$109383$new_n59591_
 .subckt nand3_x0 i0=$abc$109383$new_n58913_ i1=$abc$109383$new_n58878_ i2=soc.cpu.minerva.exception.misa__r__mxl[1] nq=$abc$109383$new_n59592_
 .subckt inv_x0 i=soc.cpu.minerva.exception.mtval__r__value[31] nq=$abc$109383$new_n59593_
-.subckt ao22_x2 i0=$abc$109383$new_n59593_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59592_ q=$abc$109383$new_n59594_
-.subckt a3_x2 i0=$abc$109383$new_n59594_ i1=$abc$109383$new_n59591_ i2=$abc$109383$new_n59590_ q=$abc$109383$new_n59595_
-.subckt a2_x2 i0=$abc$109383$new_n59595_ i1=$abc$109383$new_n59589_ q=$abc$109383$new_n59596_
-.subckt oa22_x2 i0=$abc$109383$new_n58571_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n53669_ q=$abc$109383$new_n59597_
-.subckt a2_x2 i0=$abc$109383$new_n59597_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59598_
-.subckt a2_x2 i0=$abc$109383$new_n56865_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59599_
-.subckt oa22_x2 i0=$abc$109383$new_n59599_ i1=$abc$109383$new_n58776_ i2=$abc$109383$new_n58656_ q=$abc$109383$new_n59600_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[31] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[31] q=$abc$109383$new_n59601_
-.subckt ao22_x2 i0=$abc$109383$new_n59601_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ q=$abc$109383$new_n59602_
-.subckt o2_x2 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20224_ q=$abc$109383$new_n59603_
-.subckt oa22_x2 i0=$abc$109383$new_n59603_ i1=$abc$109383$new_n59602_ i2=$abc$109383$new_n59600_ q=$abc$109383$new_n59604_
+.subckt and21nor_x1 i0=$abc$109383$new_n59593_ i1=$abc$109383$new_n58810_ i2=$abc$109383$new_n59592_ nq=$abc$109383$new_n59594_
+.subckt and3_x1 i0=$abc$109383$new_n59594_ i1=$abc$109383$new_n59591_ i2=$abc$109383$new_n59590_ q=$abc$109383$new_n59595_
+.subckt and2_x1 i0=$abc$109383$new_n59595_ i1=$abc$109383$new_n59589_ q=$abc$109383$new_n59596_
+.subckt or21nand_x1 i0=$abc$109383$new_n58571_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n53669_ nq=$abc$109383$new_n59597_
+.subckt and2_x1 i0=$abc$109383$new_n59597_ i1=$abc$109383$new_n58747_ q=$abc$109383$new_n59598_
+.subckt and2_x1 i0=$abc$109383$new_n56865_ i1=$abc$109383$new_n58891_ q=$abc$109383$new_n59599_
+.subckt or21nand_x1 i0=$abc$109383$new_n59599_ i1=$abc$109383$new_n58776_ i2=$abc$109383$new_n58656_ nq=$abc$109383$new_n59600_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[31] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[31] q=$abc$109383$new_n59601_
+.subckt and21nor_x1 i0=$abc$109383$new_n59601_ i1=$abc$109383$new_n58692_ i2=$abc$109383$new_n58582_ nq=$abc$109383$new_n59602_
+.subckt or2_x1 i0=$abc$109383$new_n58761_ i1=$abc$109383$new_n20224_ q=$abc$109383$new_n59603_
+.subckt or21nand_x1 i0=$abc$109383$new_n59603_ i1=$abc$109383$new_n59602_ i2=$abc$109383$new_n59600_ nq=$abc$109383$new_n59604_
 .subckt nand2_x0 i0=$abc$109383$new_n59604_ i1=$abc$109383$new_n58701_ nq=$abc$109383$new_n59605_
-.subckt oa22_x2 i0=$abc$109383$new_n57827_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59605_ q=$abc$109383$new_n59606_
-.subckt oa22_x2 i0=$abc$109383$new_n59606_ i1=$abc$109383$new_n59598_ i2=$abc$109383$new_n59596_ q=$abc$109383$new_n59607_
+.subckt or21nand_x1 i0=$abc$109383$new_n57827_ i1=$abc$109383$new_n58824_ i2=$abc$109383$new_n59605_ nq=$abc$109383$new_n59606_
+.subckt or21nand_x1 i0=$abc$109383$new_n59606_ i1=$abc$109383$new_n59598_ i2=$abc$109383$new_n59596_ nq=$abc$109383$new_n59607_
 .subckt nor2_x0 i0=$abc$109383$new_n59607_ i1=$abc$109383$new_n58866_ nq=$abc$109383$new_n59608_
 .subckt buf_x4 i=$abc$109383$new_n18170_ q=$abc$109383$new_n59609_
-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=$abc$109383$new_n55476_ q=$abc$109383$new_n59610_
+.subckt or21nand_x1 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=$abc$109383$new_n55476_ nq=$abc$109383$new_n59610_
 .subckt nand2_x0 i0=$abc$109383$new_n59610_ i1=$abc$109383$new_n59014_ nq=$abc$109383$new_n59611_
-.subckt ao22_x2 i0=$abc$109383$new_n59611_ i1=$abc$109383$new_n59608_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107406
-.subckt ao22_x2 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__branch_target$62[2] q=$abc$109383$new_n59613_
-.subckt a3_x2 i0=$abc$109383$new_n53232_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n59614_
-.subckt ao22_x2 i0=$abc$109383$new_n59614_ i1=$abc$109383$new_n59613_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107410
+.subckt and21nor_x1 i0=$abc$109383$new_n59611_ i1=$abc$109383$new_n59608_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107406
+.subckt and21nor_x1 i0=$abc$109383$new_n30263_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__branch_target$62[2] nq=$abc$109383$new_n59613_
+.subckt and3_x1 i0=$abc$109383$new_n53232_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n59614_
+.subckt and21nor_x1 i0=$abc$109383$new_n59614_ i1=$abc$109383$new_n59613_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107410
 .subckt buf_x4 i=$abc$109383$new_n29815_ q=$abc$109383$new_n59616_
-.subckt a3_x2 i0=$abc$109383$new_n53265_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59617_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[3] q=$abc$109383$new_n59618_
-.subckt ao22_x2 i0=$abc$109383$new_n59618_ i1=$abc$109383$new_n59617_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107414
-.subckt nxr2_x1 i0=$abc$109383$new_n15319_ i1=$abc$109383$new_n30154_ nq=$abc$109383$new_n59620_
-.subckt nxr2_x1 i0=$abc$109383$new_n59620_ i1=$abc$109383$new_n53298_ nq=$abc$109383$new_n59621_
-.subckt a3_x2 i0=$abc$109383$new_n59621_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59622_
-.subckt ao22_x2 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[4] q=$abc$109383$new_n59623_
-.subckt ao22_x2 i0=$abc$109383$new_n59623_ i1=$abc$109383$new_n59622_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107418
+.subckt and3_x1 i0=$abc$109383$new_n53265_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59617_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[3] nq=$abc$109383$new_n59618_
+.subckt and21nor_x1 i0=$abc$109383$new_n59618_ i1=$abc$109383$new_n59617_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107414
+.subckt nexor2_x0 i0=$abc$109383$new_n15319_ i1=$abc$109383$new_n30154_ nq=$abc$109383$new_n59620_
+.subckt nexor2_x0 i0=$abc$109383$new_n59620_ i1=$abc$109383$new_n53298_ nq=$abc$109383$new_n59621_
+.subckt and3_x1 i0=$abc$109383$new_n59621_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59622_
+.subckt and21nor_x1 i0=$abc$109383$new_n30246_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[4] nq=$abc$109383$new_n59623_
+.subckt and21nor_x1 i0=$abc$109383$new_n59623_ i1=$abc$109383$new_n59622_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107418
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n59625_
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__branch_target$62[5] q=$abc$109383$new_n59626_
-.subckt nxr2_x1 i0=$abc$109383$new_n15459_ i1=soc.cpu.minerva.payload__pc$27[5] nq=$abc$109383$new_n59627_
-.subckt nxr2_x1 i0=$abc$109383$new_n59627_ i1=$abc$109383$new_n53326_ nq=$abc$109383$new_n59628_
-.subckt a3_x2 i0=$abc$109383$new_n59628_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n59629_
-.subckt ao22_x2 i0=$abc$109383$new_n59629_ i1=$abc$109383$new_n59626_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107422
-.subckt a3_x2 i0=$abc$109383$new_n53349_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59631_
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__branch_target$62[5] nq=$abc$109383$new_n59626_
+.subckt nexor2_x0 i0=$abc$109383$new_n15459_ i1=soc.cpu.minerva.payload__pc$27[5] nq=$abc$109383$new_n59627_
+.subckt nexor2_x0 i0=$abc$109383$new_n59627_ i1=$abc$109383$new_n53326_ nq=$abc$109383$new_n59628_
+.subckt and3_x1 i0=$abc$109383$new_n59628_ i1=$abc$109383$new_n30288_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n59629_
+.subckt and21nor_x1 i0=$abc$109383$new_n59629_ i1=$abc$109383$new_n59626_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107422
+.subckt and3_x1 i0=$abc$109383$new_n53349_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59631_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n59632_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[6] q=$abc$109383$new_n59633_
-.subckt ao22_x2 i0=$abc$109383$new_n59633_ i1=$abc$109383$new_n59631_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107426
-.subckt a3_x2 i0=$abc$109383$new_n53372_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59635_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[7] q=$abc$109383$new_n59636_
-.subckt ao22_x2 i0=$abc$109383$new_n59636_ i1=$abc$109383$new_n59635_ i2=$abc$109383$new_n58521_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107430
-.subckt nxr2_x1 i0=$abc$109383$new_n15393_ i1=$abc$109383$new_n30171_ nq=$abc$109383$new_n59638_
-.subckt nxr2_x1 i0=$abc$109383$new_n59638_ i1=$abc$109383$new_n53398_ nq=$abc$109383$new_n59639_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[6] nq=$abc$109383$new_n59633_
+.subckt and21nor_x1 i0=$abc$109383$new_n59633_ i1=$abc$109383$new_n59631_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107426
+.subckt and3_x1 i0=$abc$109383$new_n53372_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59635_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__branch_target$62[7] nq=$abc$109383$new_n59636_
+.subckt and21nor_x1 i0=$abc$109383$new_n59636_ i1=$abc$109383$new_n59635_ i2=$abc$109383$new_n58521_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107430
+.subckt nexor2_x0 i0=$abc$109383$new_n15393_ i1=$abc$109383$new_n30171_ nq=$abc$109383$new_n59638_
+.subckt nexor2_x0 i0=$abc$109383$new_n59638_ i1=$abc$109383$new_n53398_ nq=$abc$109383$new_n59639_
 .subckt nand3_x0 i0=$abc$109383$new_n59639_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n59640_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__branch_target$62[8] q=$abc$109383$new_n59641_
-.subckt a2_x2 i0=$abc$109383$new_n59641_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59642_
-.subckt a2_x2 i0=$abc$109383$new_n59642_ i1=$abc$109383$new_n59640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107434
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[9] q=$abc$109383$new_n59644_
-.subckt a2_x2 i0=$abc$109383$new_n59644_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n59645_
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__branch_target$62[8] nq=$abc$109383$new_n59641_
+.subckt and2_x1 i0=$abc$109383$new_n59641_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59642_
+.subckt and2_x1 i0=$abc$109383$new_n59642_ i1=$abc$109383$new_n59640_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107434
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[9] nq=$abc$109383$new_n59644_
+.subckt and2_x1 i0=$abc$109383$new_n59644_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n59645_
 .subckt buf_x4 i=$abc$109383$new_n53353_ q=$abc$109383$new_n59646_
-.subckt ao22_x2 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53422_ i2=$abc$109383$new_n59645_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107438
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[10] q=$abc$109383$new_n59648_
-.subckt a2_x2 i0=$abc$109383$new_n59648_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n59649_
-.subckt ao22_x2 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53443_ i2=$abc$109383$new_n59649_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107442
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[11] q=$abc$109383$new_n59651_
-.subckt a2_x2 i0=$abc$109383$new_n59651_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n59652_
-.subckt nxr2_x1 i0=$abc$109383$new_n15303_ i1=$abc$109383$new_n30184_ nq=$abc$109383$new_n59653_
-.subckt nxr2_x1 i0=$abc$109383$new_n59653_ i1=$abc$109383$new_n53461_ nq=$abc$109383$new_n59654_
-.subckt ao22_x2 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n59654_ i2=$abc$109383$new_n59652_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107446
+.subckt and21nor_x1 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53422_ i2=$abc$109383$new_n59645_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107438
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[10] nq=$abc$109383$new_n59648_
+.subckt and2_x1 i0=$abc$109383$new_n59648_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n59649_
+.subckt and21nor_x1 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53443_ i2=$abc$109383$new_n59649_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107442
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[11] nq=$abc$109383$new_n59651_
+.subckt and2_x1 i0=$abc$109383$new_n59651_ i1=$abc$109383$new_n54464_ q=$abc$109383$new_n59652_
+.subckt nexor2_x0 i0=$abc$109383$new_n15303_ i1=$abc$109383$new_n30184_ nq=$abc$109383$new_n59653_
+.subckt nexor2_x0 i0=$abc$109383$new_n59653_ i1=$abc$109383$new_n53461_ nq=$abc$109383$new_n59654_
+.subckt and21nor_x1 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n59654_ i2=$abc$109383$new_n59652_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107446
 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n59656_
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[12] q=$abc$109383$new_n59657_
-.subckt a2_x2 i0=$abc$109383$new_n59657_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59658_
-.subckt nxr2_x1 i0=$abc$109383$new_n53482_ i1=soc.cpu.minerva.payload__pc$27[12] nq=$abc$109383$new_n59659_
-.subckt nxr2_x1 i0=$abc$109383$new_n53487_ i1=$abc$109383$new_n59659_ nq=$abc$109383$new_n59660_
-.subckt ao22_x2 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n59660_ i2=$abc$109383$new_n59658_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107450
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[13] q=$abc$109383$new_n59662_
-.subckt a2_x2 i0=$abc$109383$new_n59662_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59663_
-.subckt ao22_x2 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53513_ i2=$abc$109383$new_n59663_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107454
-.subckt oa22_x2 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[14] q=$abc$109383$new_n59665_
-.subckt a2_x2 i0=$abc$109383$new_n59665_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59666_
-.subckt ao22_x2 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53538_ i2=$abc$109383$new_n59666_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107458
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[12] nq=$abc$109383$new_n59657_
+.subckt and2_x1 i0=$abc$109383$new_n59657_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59658_
+.subckt nexor2_x0 i0=$abc$109383$new_n53482_ i1=soc.cpu.minerva.payload__pc$27[12] nq=$abc$109383$new_n59659_
+.subckt nexor2_x0 i0=$abc$109383$new_n53487_ i1=$abc$109383$new_n59659_ nq=$abc$109383$new_n59660_
+.subckt and21nor_x1 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n59660_ i2=$abc$109383$new_n59658_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107450
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[13] nq=$abc$109383$new_n59662_
+.subckt and2_x1 i0=$abc$109383$new_n59662_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59663_
+.subckt and21nor_x1 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53513_ i2=$abc$109383$new_n59663_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107454
+.subckt or21nand_x1 i0=$abc$109383$new_n30137_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[14] nq=$abc$109383$new_n59665_
+.subckt and2_x1 i0=$abc$109383$new_n59665_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59666_
+.subckt and21nor_x1 i0=$abc$109383$new_n59646_ i1=$abc$109383$new_n53538_ i2=$abc$109383$new_n59666_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107458
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n59668_
-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n30135_ i2=soc.cpu.minerva.payload__branch_target$62[15] q=$abc$109383$new_n59669_
-.subckt a2_x2 i0=$abc$109383$new_n59669_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59670_
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 .subckt buf_x4 i=$abc$109383$new_n29825_ q=$abc$109383$new_n59672_
-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[16] q=$abc$109383$new_n59673_
-.subckt a2_x2 i0=$abc$109383$new_n59673_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59674_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[17] q=$abc$109383$new_n59676_
-.subckt a2_x2 i0=$abc$109383$new_n59676_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59677_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[18] q=$abc$109383$new_n59679_
-.subckt a2_x2 i0=$abc$109383$new_n59679_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59680_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[19] q=$abc$109383$new_n59682_
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 .subckt buf_x4 i=$abc$109383$new_n53353_ q=$abc$109383$new_n59684_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[20] q=$abc$109383$new_n59686_
-.subckt a2_x2 i0=$abc$109383$new_n59686_ i1=$abc$109383$new_n59656_ q=$abc$109383$new_n59687_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[21] q=$abc$109383$new_n59689_
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 .subckt buf_x4 i=$abc$109383$new_n27901_ q=$abc$109383$new_n59692_
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-.subckt a2_x2 i0=$abc$109383$new_n59693_ i1=$abc$109383$new_n59692_ q=$abc$109383$new_n59694_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[23] q=$abc$109383$new_n59696_
-.subckt a2_x2 i0=$abc$109383$new_n59696_ i1=$abc$109383$new_n59692_ q=$abc$109383$new_n59697_
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-.subckt oa22_x2 i0=$abc$109383$new_n59668_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[24] q=$abc$109383$new_n59699_
-.subckt a2_x2 i0=$abc$109383$new_n59699_ i1=$abc$109383$new_n59692_ q=$abc$109383$new_n59700_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59672_ i2=soc.cpu.minerva.payload__branch_target$62[25] q=$abc$109383$new_n59702_
-.subckt a2_x2 i0=$abc$109383$new_n59702_ i1=$abc$109383$new_n59692_ q=$abc$109383$new_n59703_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__branch_target$62[26] q=$abc$109383$new_n59705_
-.subckt a2_x2 i0=$abc$109383$new_n59705_ i1=$abc$109383$new_n59692_ q=$abc$109383$new_n59706_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__branch_target$62[27] q=$abc$109383$new_n59708_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__branch_target$62[28] q=$abc$109383$new_n59711_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__branch_target$62[29] q=$abc$109383$new_n59714_
-.subckt a2_x2 i0=$abc$109383$new_n59714_ i1=$abc$109383$new_n59692_ q=$abc$109383$new_n59715_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__branch_target$62[30] q=$abc$109383$new_n59717_
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-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__branch_target$62[31] q=$abc$109383$new_n59720_
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-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__branch_predict_taken$63 q=$abc$109383$new_n59723_
-.subckt a3_x2 i0=$abc$109383$new_n52656_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n59724_
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 .subckt nor3_x0 i0=$abc$109383$new_n58621_ i1=$abc$109383$new_n30152_ i2=$abc$109383$new_n42784_ nq=$abc$109383$new_n59726_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[0] q=$abc$109383$new_n59727_
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 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n59729_
 .subckt nand2_x0 i0=$abc$109383$new_n58641_ i1=$abc$109383$new_n58636_ nq=$abc$109383$new_n59730_
 .subckt nand2_x0 i0=$abc$109383$new_n58776_ i1=$abc$109383$new_n58644_ nq=$abc$109383$new_n59731_
-.subckt a2_x2 i0=$abc$109383$new_n59731_ i1=$abc$109383$new_n58580_ q=$abc$109383$new_n59732_
-.subckt mx2_x2 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[1] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[1] q=$abc$109383$new_n59733_
-.subckt oa22_x2 i0=$abc$109383$new_n59733_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58776_ q=$abc$109383$new_n59734_
-.subckt ao22_x2 i0=$abc$109383$new_n52559_ i1=$abc$109383$new_n52560_ i2=$abc$109383$new_n58615_ q=$abc$109383$new_n59735_
-.subckt ao22_x2 i0=$abc$109383$new_n59735_ i1=$abc$109383$new_n59734_ i2=$abc$109383$new_n59732_ q=$abc$109383$new_n59736_
-.subckt a3_x2 i0=$abc$109383$new_n58780_ i1=$abc$109383$new_n57126_ i2=$abc$109383$new_n57107_ q=$abc$109383$new_n59737_
-.subckt ao22_x2 i0=$abc$109383$new_n59737_ i1=$abc$109383$new_n59736_ i2=$abc$109383$new_n58701_ q=$abc$109383$new_n59738_
-.subckt oa22_x2 i0=$abc$109383$new_n17576_ i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n58669_ q=$abc$109383$new_n59739_
-.subckt ao22_x2 i0=$abc$109383$new_n59739_ i1=$abc$109383$new_n59738_ i2=$abc$109383$new_n59730_ q=$abc$109383$new_n59740_
-.subckt a3_x2 i0=$abc$109383$new_n59740_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59741_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[1] q=$abc$109383$new_n59742_
-.subckt ao22_x2 i0=$abc$109383$new_n59742_ i1=$abc$109383$new_n59741_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107538
-.subckt a4_x2 i0=$abc$109383$new_n58702_ i1=$abc$109383$new_n58688_ i2=$abc$109383$new_n56424_ i3=$abc$109383$new_n53208_ q=$abc$109383$new_n59744_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[2] q=$abc$109383$new_n59745_
-.subckt ao22_x2 i0=$abc$109383$new_n59745_ i1=$abc$109383$new_n59744_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107542
+.subckt and2_x1 i0=$abc$109383$new_n59731_ i1=$abc$109383$new_n58580_ q=$abc$109383$new_n59732_
+.subckt mux2_x1 cmd=$abc$109383$new_n58764_ i0=soc.cpu.minerva.gprf.mem._1_[1] i1=soc.cpu.minerva.gprf.mem.fwd_wp_data[1] q=$abc$109383$new_n59733_
+.subckt or21nand_x1 i0=$abc$109383$new_n59733_ i1=$abc$109383$new_n58761_ i2=$abc$109383$new_n58776_ nq=$abc$109383$new_n59734_
+.subckt and21nor_x1 i0=$abc$109383$new_n52559_ i1=$abc$109383$new_n52560_ i2=$abc$109383$new_n58615_ nq=$abc$109383$new_n59735_
+.subckt and21nor_x1 i0=$abc$109383$new_n59735_ i1=$abc$109383$new_n59734_ i2=$abc$109383$new_n59732_ nq=$abc$109383$new_n59736_
+.subckt and3_x1 i0=$abc$109383$new_n58780_ i1=$abc$109383$new_n57126_ i2=$abc$109383$new_n57107_ q=$abc$109383$new_n59737_
+.subckt and21nor_x1 i0=$abc$109383$new_n59737_ i1=$abc$109383$new_n59736_ i2=$abc$109383$new_n58701_ nq=$abc$109383$new_n59738_
+.subckt or21nand_x1 i0=$abc$109383$new_n17576_ i1=$abc$109383$new_n15312_ i2=$abc$109383$new_n58669_ nq=$abc$109383$new_n59739_
+.subckt and21nor_x1 i0=$abc$109383$new_n59739_ i1=$abc$109383$new_n59738_ i2=$abc$109383$new_n59730_ nq=$abc$109383$new_n59740_
+.subckt and3_x1 i0=$abc$109383$new_n59740_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n59741_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[1] nq=$abc$109383$new_n59742_
+.subckt and21nor_x1 i0=$abc$109383$new_n59742_ i1=$abc$109383$new_n59741_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107538
+.subckt and4_x1 i0=$abc$109383$new_n58702_ i1=$abc$109383$new_n58688_ i2=$abc$109383$new_n56424_ i3=$abc$109383$new_n53208_ q=$abc$109383$new_n59744_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[2] nq=$abc$109383$new_n59745_
+.subckt and21nor_x1 i0=$abc$109383$new_n59745_ i1=$abc$109383$new_n59744_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107542
 .subckt nand2_x0 i0=$abc$109383$new_n58724_ i1=$abc$109383$new_n58713_ nq=$abc$109383$new_n59747_
 .subckt nand2_x0 i0=$abc$109383$new_n58737_ i1=$abc$109383$new_n58736_ nq=$abc$109383$new_n59748_
-.subckt a4_x2 i0=$abc$109383$new_n59748_ i1=$abc$109383$new_n59747_ i2=$abc$109383$new_n56424_ i3=$abc$109383$new_n53208_ q=$abc$109383$new_n59749_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[3] q=$abc$109383$new_n59750_
-.subckt ao22_x2 i0=$abc$109383$new_n59750_ i1=$abc$109383$new_n59749_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107546
+.subckt and4_x1 i0=$abc$109383$new_n59748_ i1=$abc$109383$new_n59747_ i2=$abc$109383$new_n56424_ i3=$abc$109383$new_n53208_ q=$abc$109383$new_n59749_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=soc.cpu.minerva.payload__store_operand$46[3] nq=$abc$109383$new_n59750_
+.subckt and21nor_x1 i0=$abc$109383$new_n59750_ i1=$abc$109383$new_n59749_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107546
 .subckt nor2_x0 i0=$abc$109383$new_n58782_ i1=$abc$109383$new_n58758_ nq=$abc$109383$new_n59752_
 .subckt nor3_x0 i0=$abc$109383$new_n59752_ i1=$abc$109383$new_n30152_ i2=$abc$109383$new_n29942_ nq=$abc$109383$new_n59753_
-.subckt oa22_x2 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n52667_ i2=soc.cpu.minerva.payload__store_operand$46[4] q=$abc$109383$new_n59754_
+.subckt or21nand_x1 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n52667_ i2=soc.cpu.minerva.payload__store_operand$46[4] nq=$abc$109383$new_n59754_
 .subckt nand2_x0 i0=$abc$109383$new_n59754_ i1=$abc$109383$new_n28536_ nq=$abc$109383$new_n59755_
 .subckt nor2_x0 i0=$abc$109383$new_n59755_ i1=$abc$109383$new_n59753_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107550
-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__store_operand$46[5] q=$abc$109383$new_n59757_
-.subckt a2_x2 i0=$abc$109383$new_n59757_ i1=$abc$109383$new_n27536_ q=$abc$109383$new_n59758_
-.subckt a2_x2 i0=$abc$109383$new_n58826_ i1=$abc$109383$new_n58813_ q=$abc$109383$new_n59759_
-.subckt ao22_x2 i0=$abc$109383$new_n53354_ i1=$abc$109383$new_n59759_ i2=$abc$109383$new_n59758_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107554
-.subckt oa22_x2 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__store_operand$46[6] q=$abc$109383$new_n59761_
-.subckt a2_x2 i0=$abc$109383$new_n59761_ i1=$abc$109383$new_n27536_ q=$abc$109383$new_n59762_
-.subckt a2_x2 i0=$abc$109383$new_n58864_ i1=$abc$109383$new_n58853_ q=$abc$109383$new_n59763_
-.subckt ao22_x2 i0=$abc$109383$new_n53354_ i1=$abc$109383$new_n59763_ i2=$abc$109383$new_n59762_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107558
+.subckt or21nand_x1 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__store_operand$46[5] nq=$abc$109383$new_n59757_
+.subckt and2_x1 i0=$abc$109383$new_n59757_ i1=$abc$109383$new_n27536_ q=$abc$109383$new_n59758_
+.subckt and2_x1 i0=$abc$109383$new_n58826_ i1=$abc$109383$new_n58813_ q=$abc$109383$new_n59759_
+.subckt and21nor_x1 i0=$abc$109383$new_n53354_ i1=$abc$109383$new_n59759_ i2=$abc$109383$new_n59758_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107554
+.subckt or21nand_x1 i0=$abc$109383$new_n59609_ i1=$abc$109383$new_n59082_ i2=soc.cpu.minerva.payload__store_operand$46[6] nq=$abc$109383$new_n59761_
+.subckt and2_x1 i0=$abc$109383$new_n59761_ i1=$abc$109383$new_n27536_ q=$abc$109383$new_n59762_
+.subckt and2_x1 i0=$abc$109383$new_n58864_ i1=$abc$109383$new_n58853_ q=$abc$109383$new_n59763_
+.subckt and21nor_x1 i0=$abc$109383$new_n53354_ i1=$abc$109383$new_n59763_ i2=$abc$109383$new_n59762_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107558
 .subckt buf_x4 i=$abc$109383$new_n56434_ q=$abc$109383$new_n59765_
 .subckt nand2_x0 i0=$abc$109383$new_n58903_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59766_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[7] q=$abc$109383$new_n59767_
-.subckt a2_x2 i0=$abc$109383$new_n59767_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59768_
-.subckt a2_x2 i0=$abc$109383$new_n59768_ i1=$abc$109383$new_n59766_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107562
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[7] nq=$abc$109383$new_n59767_
+.subckt and2_x1 i0=$abc$109383$new_n59767_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59768_
+.subckt and2_x1 i0=$abc$109383$new_n59768_ i1=$abc$109383$new_n59766_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107562
 .subckt nand2_x0 i0=$abc$109383$new_n58934_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59770_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[8] q=$abc$109383$new_n59771_
-.subckt a2_x2 i0=$abc$109383$new_n59771_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59772_
-.subckt a2_x2 i0=$abc$109383$new_n59772_ i1=$abc$109383$new_n59770_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107566
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[8] nq=$abc$109383$new_n59771_
+.subckt and2_x1 i0=$abc$109383$new_n59771_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59772_
+.subckt and2_x1 i0=$abc$109383$new_n59772_ i1=$abc$109383$new_n59770_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107566
 .subckt nand2_x0 i0=$abc$109383$new_n58977_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59774_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[9] q=$abc$109383$new_n59775_
-.subckt a2_x2 i0=$abc$109383$new_n59775_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59776_
-.subckt a2_x2 i0=$abc$109383$new_n59776_ i1=$abc$109383$new_n59774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107570
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[9] nq=$abc$109383$new_n59775_
+.subckt and2_x1 i0=$abc$109383$new_n59775_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59776_
+.subckt and2_x1 i0=$abc$109383$new_n59776_ i1=$abc$109383$new_n59774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107570
 .subckt nand2_x0 i0=$abc$109383$new_n59003_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59778_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[10] q=$abc$109383$new_n59779_
-.subckt a2_x2 i0=$abc$109383$new_n59779_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59780_
-.subckt a2_x2 i0=$abc$109383$new_n59780_ i1=$abc$109383$new_n59778_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107574
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n58834_ i2=soc.cpu.minerva.payload__store_operand$46[10] nq=$abc$109383$new_n59779_
+.subckt and2_x1 i0=$abc$109383$new_n59779_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59780_
+.subckt and2_x1 i0=$abc$109383$new_n59780_ i1=$abc$109383$new_n59778_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107574
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[11] nq=$abc$109383$new_n59782_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n59782_ q=$abc$109383$new_n59783_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n59782_ nq=$abc$109383$new_n59783_
 .subckt nand2_x0 i0=$abc$109383$new_n59783_ i1=$abc$109383$new_n59049_ nq=$abc$109383$new_n59784_
-.subckt a2_x2 i0=$abc$109383$new_n59784_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107578
+.subckt and2_x1 i0=$abc$109383$new_n59784_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107578
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[12] nq=$abc$109383$new_n59786_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n59786_ q=$abc$109383$new_n59787_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n59786_ nq=$abc$109383$new_n59787_
 .subckt nand2_x0 i0=$abc$109383$new_n59787_ i1=$abc$109383$new_n59080_ nq=$abc$109383$new_n59788_
-.subckt a2_x2 i0=$abc$109383$new_n59788_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107582
+.subckt and2_x1 i0=$abc$109383$new_n59788_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107582
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[13] nq=$abc$109383$new_n59790_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n59790_ q=$abc$109383$new_n59791_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n56423_ i2=$abc$109383$new_n59790_ nq=$abc$109383$new_n59791_
 .subckt nand2_x0 i0=$abc$109383$new_n59791_ i1=$abc$109383$new_n59111_ nq=$abc$109383$new_n59792_
-.subckt a2_x2 i0=$abc$109383$new_n59792_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107586
+.subckt and2_x1 i0=$abc$109383$new_n59792_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107586
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[14] nq=$abc$109383$new_n59794_
 .subckt buf_x4 i=$abc$109383$new_n29996_ q=$abc$109383$new_n59795_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59794_ q=$abc$109383$new_n59796_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59794_ nq=$abc$109383$new_n59796_
 .subckt nand2_x0 i0=$abc$109383$new_n59796_ i1=$abc$109383$new_n59142_ nq=$abc$109383$new_n59797_
-.subckt a2_x2 i0=$abc$109383$new_n59797_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107590
+.subckt and2_x1 i0=$abc$109383$new_n59797_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107590
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[15] nq=$abc$109383$new_n59799_
-.subckt oa22_x2 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59799_ q=$abc$109383$new_n59800_
+.subckt or21nand_x1 i0=$abc$109383$new_n56485_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59799_ nq=$abc$109383$new_n59800_
 .subckt nand2_x0 i0=$abc$109383$new_n59800_ i1=$abc$109383$new_n59175_ nq=$abc$109383$new_n59801_
-.subckt a2_x2 i0=$abc$109383$new_n59801_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107594
+.subckt and2_x1 i0=$abc$109383$new_n59801_ i1=$abc$109383$new_n59460_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107594
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n59803_
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[16] nq=$abc$109383$new_n59804_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59804_ q=$abc$109383$new_n59805_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59804_ nq=$abc$109383$new_n59805_
 .subckt nand2_x0 i0=$abc$109383$new_n59805_ i1=$abc$109383$new_n59206_ nq=$abc$109383$new_n59806_
-.subckt a2_x2 i0=$abc$109383$new_n59806_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107598
+.subckt and2_x1 i0=$abc$109383$new_n59806_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107598
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[17] nq=$abc$109383$new_n59808_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59808_ q=$abc$109383$new_n59809_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59808_ nq=$abc$109383$new_n59809_
 .subckt nand2_x0 i0=$abc$109383$new_n59809_ i1=$abc$109383$new_n59234_ nq=$abc$109383$new_n59810_
-.subckt a2_x2 i0=$abc$109383$new_n59810_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107602
+.subckt and2_x1 i0=$abc$109383$new_n59810_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107602
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[18] nq=$abc$109383$new_n59812_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59812_ q=$abc$109383$new_n59813_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59812_ nq=$abc$109383$new_n59813_
 .subckt nand2_x0 i0=$abc$109383$new_n59813_ i1=$abc$109383$new_n59264_ nq=$abc$109383$new_n59814_
-.subckt a2_x2 i0=$abc$109383$new_n59814_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107606
+.subckt and2_x1 i0=$abc$109383$new_n59814_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107606
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[19] nq=$abc$109383$new_n59816_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59816_ q=$abc$109383$new_n59817_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59816_ nq=$abc$109383$new_n59817_
 .subckt nand2_x0 i0=$abc$109383$new_n59817_ i1=$abc$109383$new_n59290_ nq=$abc$109383$new_n59818_
-.subckt a2_x2 i0=$abc$109383$new_n59818_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107610
+.subckt and2_x1 i0=$abc$109383$new_n59818_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107610
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[20] nq=$abc$109383$new_n59820_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59820_ q=$abc$109383$new_n59821_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59820_ nq=$abc$109383$new_n59821_
 .subckt nand2_x0 i0=$abc$109383$new_n59821_ i1=$abc$109383$new_n59319_ nq=$abc$109383$new_n59822_
-.subckt a2_x2 i0=$abc$109383$new_n59822_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107614
+.subckt and2_x1 i0=$abc$109383$new_n59822_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107614
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[21] nq=$abc$109383$new_n59824_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59824_ q=$abc$109383$new_n59825_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59824_ nq=$abc$109383$new_n59825_
 .subckt nand2_x0 i0=$abc$109383$new_n59825_ i1=$abc$109383$new_n59349_ nq=$abc$109383$new_n59826_
-.subckt a2_x2 i0=$abc$109383$new_n59826_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107618
+.subckt and2_x1 i0=$abc$109383$new_n59826_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107618
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[22] nq=$abc$109383$new_n59828_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59828_ q=$abc$109383$new_n59829_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59828_ nq=$abc$109383$new_n59829_
 .subckt nand2_x0 i0=$abc$109383$new_n59829_ i1=$abc$109383$new_n59375_ nq=$abc$109383$new_n59830_
-.subckt a2_x2 i0=$abc$109383$new_n59830_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107622
+.subckt and2_x1 i0=$abc$109383$new_n59830_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107622
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[23] nq=$abc$109383$new_n59832_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59832_ q=$abc$109383$new_n59833_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n59795_ i2=$abc$109383$new_n59832_ nq=$abc$109383$new_n59833_
 .subckt nand2_x0 i0=$abc$109383$new_n59833_ i1=$abc$109383$new_n59402_ nq=$abc$109383$new_n59834_
-.subckt a2_x2 i0=$abc$109383$new_n59834_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107626
+.subckt and2_x1 i0=$abc$109383$new_n59834_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107626
 .subckt inv_x0 i=soc.cpu.minerva.payload__store_operand$46[24] nq=$abc$109383$new_n59836_
-.subckt oa22_x2 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n31803_ i2=$abc$109383$new_n59836_ q=$abc$109383$new_n59837_
+.subckt or21nand_x1 i0=$abc$109383$new_n53307_ i1=$abc$109383$new_n31803_ i2=$abc$109383$new_n59836_ nq=$abc$109383$new_n59837_
 .subckt nand2_x0 i0=$abc$109383$new_n59837_ i1=$abc$109383$new_n59429_ nq=$abc$109383$new_n59838_
-.subckt a2_x2 i0=$abc$109383$new_n59838_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107630
+.subckt and2_x1 i0=$abc$109383$new_n59838_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107630
 .subckt nand2_x0 i0=$abc$109383$new_n59454_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59840_
 .subckt buf_x4 i=$abc$109383$new_n30265_ q=$abc$109383$new_n59841_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[25] q=$abc$109383$new_n59842_
-.subckt a2_x2 i0=$abc$109383$new_n59842_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59843_
-.subckt a2_x2 i0=$abc$109383$new_n59843_ i1=$abc$109383$new_n59840_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107634
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[25] nq=$abc$109383$new_n59842_
+.subckt and2_x1 i0=$abc$109383$new_n59842_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59843_
+.subckt and2_x1 i0=$abc$109383$new_n59843_ i1=$abc$109383$new_n59840_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107634
 .subckt nand2_x0 i0=$abc$109383$new_n59479_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59845_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[26] q=$abc$109383$new_n59846_
-.subckt a2_x2 i0=$abc$109383$new_n59846_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59847_
-.subckt a2_x2 i0=$abc$109383$new_n59847_ i1=$abc$109383$new_n59845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107638
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[26] nq=$abc$109383$new_n59846_
+.subckt and2_x1 i0=$abc$109383$new_n59846_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59847_
+.subckt and2_x1 i0=$abc$109383$new_n59847_ i1=$abc$109383$new_n59845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107638
 .subckt nand2_x0 i0=$abc$109383$new_n59504_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59849_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[27] q=$abc$109383$new_n59850_
-.subckt a2_x2 i0=$abc$109383$new_n59850_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59851_
-.subckt a2_x2 i0=$abc$109383$new_n59851_ i1=$abc$109383$new_n59849_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107642
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[27] nq=$abc$109383$new_n59850_
+.subckt and2_x1 i0=$abc$109383$new_n59850_ i1=$abc$109383$new_n58939_ q=$abc$109383$new_n59851_
+.subckt and2_x1 i0=$abc$109383$new_n59851_ i1=$abc$109383$new_n59849_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107642
 .subckt nand2_x0 i0=$abc$109383$new_n59528_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59853_
 .subckt buf_x4 i=$abc$109383$new_n27891_ q=$abc$109383$new_n59854_
-.subckt oa22_x2 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[28] q=$abc$109383$new_n59855_
-.subckt a2_x2 i0=$abc$109383$new_n59855_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59856_
-.subckt a2_x2 i0=$abc$109383$new_n59856_ i1=$abc$109383$new_n59853_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107646
+.subckt or21nand_x1 i0=$abc$109383$new_n59009_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[28] nq=$abc$109383$new_n59855_
+.subckt and2_x1 i0=$abc$109383$new_n59855_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59856_
+.subckt and2_x1 i0=$abc$109383$new_n59856_ i1=$abc$109383$new_n59853_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107646
 .subckt nand2_x0 i0=$abc$109383$new_n59553_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59858_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[29] q=$abc$109383$new_n59859_
-.subckt a2_x2 i0=$abc$109383$new_n59859_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59860_
-.subckt a2_x2 i0=$abc$109383$new_n59860_ i1=$abc$109383$new_n59858_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107650
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[29] nq=$abc$109383$new_n59859_
+.subckt and2_x1 i0=$abc$109383$new_n59859_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59860_
+.subckt and2_x1 i0=$abc$109383$new_n59860_ i1=$abc$109383$new_n59858_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107650
 .subckt nand2_x0 i0=$abc$109383$new_n59578_ i1=$abc$109383$new_n59765_ nq=$abc$109383$new_n59862_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[30] q=$abc$109383$new_n59863_
-.subckt a2_x2 i0=$abc$109383$new_n59863_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59864_
-.subckt a2_x2 i0=$abc$109383$new_n59864_ i1=$abc$109383$new_n59862_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107654
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[30] nq=$abc$109383$new_n59863_
+.subckt and2_x1 i0=$abc$109383$new_n59863_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59864_
+.subckt and2_x1 i0=$abc$109383$new_n59864_ i1=$abc$109383$new_n59862_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107654
 .subckt nand2_x0 i0=$abc$109383$new_n59607_ i1=$abc$109383$new_n56435_ nq=$abc$109383$new_n59866_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[31] q=$abc$109383$new_n59867_
-.subckt a2_x2 i0=$abc$109383$new_n59867_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59868_
-.subckt a2_x2 i0=$abc$109383$new_n59868_ i1=$abc$109383$new_n59866_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107658
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=soc.cpu.minerva.payload__store_operand$46[31] nq=$abc$109383$new_n59867_
+.subckt and2_x1 i0=$abc$109383$new_n59867_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n59868_
+.subckt and2_x1 i0=$abc$109383$new_n59868_ i1=$abc$109383$new_n59866_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107658
 .subckt nor2_x0 i0=soc.cpu.minerva.payload__instruction$28[16] i1=soc.cpu.minerva.payload__instruction$28[15] nq=$abc$109383$new_n59870_
 .subckt nor3_x0 i0=soc.cpu.minerva.payload__instruction$28[19] i1=soc.cpu.minerva.payload__instruction$28[18] i2=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n59871_
 .subckt nand2_x0 i0=$abc$109383$new_n59871_ i1=$abc$109383$new_n59870_ nq=$abc$109383$new_n59872_
-.subckt ao22_x2 i0=$abc$109383$new_n15297_ i1=$abc$109383$new_n59872_ i2=$abc$109383$new_n54007_ q=$abc$109383$new_n59873_
+.subckt and21nor_x1 i0=$abc$109383$new_n15297_ i1=$abc$109383$new_n59872_ i2=$abc$109383$new_n54007_ nq=$abc$109383$new_n59873_
 .subckt buf_x4 i=$abc$109383$new_n59873_ q=$abc$109383$new_n59874_
 .subckt nand2_x0 i0=$abc$109383$new_n15420_ i1=$abc$109383$new_n15417_ nq=$abc$109383$new_n59875_
 .subckt nand2_x0 i0=$abc$109383$new_n15421_ i1=$abc$109383$new_n15419_ nq=$abc$109383$new_n59876_
 .subckt nor3_x0 i0=$abc$109383$new_n59876_ i1=$abc$109383$new_n59875_ i2=$abc$109383$new_n15415_ nq=$abc$109383$new_n59877_
-.subckt a3_x2 i0=$abc$109383$new_n59877_ i1=$abc$109383$new_n15416_ i2=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n59878_
+.subckt and3_x1 i0=$abc$109383$new_n59877_ i1=$abc$109383$new_n15416_ i2=soc.cpu.minerva.d.valid$1 q=$abc$109383$new_n59878_
 .subckt buf_x4 i=$abc$109383$new_n59878_ q=$abc$109383$new_n59879_
-.subckt a4_x2 i0=$abc$109383$new_n15490_ i1=$abc$109383$new_n15486_ i2=$abc$109383$new_n15494_ i3=soc.cpu.minerva.x.valid$1 q=$abc$109383$new_n59880_
+.subckt and4_x1 i0=$abc$109383$new_n15490_ i1=$abc$109383$new_n15486_ i2=$abc$109383$new_n15494_ i3=soc.cpu.minerva.x.valid$1 q=$abc$109383$new_n59880_
 .subckt buf_x4 i=$abc$109383$new_n59880_ q=$abc$109383$new_n59881_
-.subckt oa22_x2 i0=$abc$109383$new_n58588_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n59882_
+.subckt or21nand_x1 i0=$abc$109383$new_n58588_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n59882_
 .subckt nand2_x0 i0=$abc$109383$new_n19822_ i1=$abc$109383$new_n15233_ nq=$abc$109383$new_n59883_
 .subckt nand2_x0 i0=$abc$109383$new_n19817_ i1=$abc$109383$new_n15373_ nq=$abc$109383$new_n59884_
-.subckt ao22_x2 i0=$abc$109383$new_n15343_ i1=soc.cpu.minerva.payload__rd$123[0] i2=soc.cpu.minerva.m.valid$1 q=$abc$109383$new_n59885_
-.subckt nxr2_x1 i0=soc.cpu.minerva.payload__rd$123[4] i1=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n59886_
-.subckt ao22_x2 i0=soc.cpu.minerva.payload__instruction$28[15] i1=$abc$109383$new_n20302_ i2=$abc$109383$new_n59886_ q=$abc$109383$new_n59887_
+.subckt and21nor_x1 i0=$abc$109383$new_n15343_ i1=soc.cpu.minerva.payload__rd$123[0] i2=soc.cpu.minerva.m.valid$1 nq=$abc$109383$new_n59885_
+.subckt nexor2_x0 i0=soc.cpu.minerva.payload__rd$123[4] i1=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n59886_
+.subckt and21nor_x1 i0=soc.cpu.minerva.payload__instruction$28[15] i1=$abc$109383$new_n20302_ i2=$abc$109383$new_n59886_ nq=$abc$109383$new_n59887_
 .subckt nand4_x0 i0=$abc$109383$new_n59887_ i1=$abc$109383$new_n59885_ i2=$abc$109383$new_n59884_ i3=$abc$109383$new_n59883_ nq=$abc$109383$new_n59888_
 .subckt nand2_x0 i0=$abc$109383$new_n20495_ i1=soc.cpu.minerva.payload__instruction$28[18] nq=$abc$109383$new_n59889_
-.subckt nxr2_x1 i0=$abc$109383$new_n19816_ i1=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n59890_
-.subckt ao22_x2 i0=$abc$109383$new_n15233_ i1=$abc$109383$new_n19822_ i2=$abc$109383$new_n59890_ q=$abc$109383$new_n59891_
+.subckt nexor2_x0 i0=$abc$109383$new_n19816_ i1=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n59890_
+.subckt and21nor_x1 i0=$abc$109383$new_n15233_ i1=$abc$109383$new_n19822_ i2=$abc$109383$new_n59890_ nq=$abc$109383$new_n59891_
 .subckt nand2_x0 i0=$abc$109383$new_n59891_ i1=$abc$109383$new_n59889_ nq=$abc$109383$new_n59892_
 .subckt nor3_x0 i0=$abc$109383$new_n59892_ i1=$abc$109383$new_n59888_ i2=$abc$109383$new_n58593_ nq=$abc$109383$new_n59893_
 .subckt buf_x4 i=$abc$109383$new_n59893_ q=$abc$109383$new_n59894_
-.subckt ao22_x2 i0=$abc$109383$new_n19863_ i1=$abc$109383$new_n19869_ i2=$abc$109383$new_n59894_ q=$abc$109383$new_n59895_
-.subckt o3_x2 i0=$abc$109383$new_n59892_ i1=$abc$109383$new_n59888_ i2=$abc$109383$new_n58593_ q=$abc$109383$new_n59896_
+.subckt and21nor_x1 i0=$abc$109383$new_n19863_ i1=$abc$109383$new_n19869_ i2=$abc$109383$new_n59894_ nq=$abc$109383$new_n59895_
+.subckt or3_x1 i0=$abc$109383$new_n59892_ i1=$abc$109383$new_n59888_ i2=$abc$109383$new_n58593_ q=$abc$109383$new_n59896_
 .subckt buf_x4 i=$abc$109383$new_n59896_ q=$abc$109383$new_n59897_
 .subckt buf_x4 i=$abc$109383$new_n59897_ q=$abc$109383$new_n59898_
 .subckt nand2_x0 i0=soc.cpu.minerva.gprf.mem.fwd_wp_en i1=soc.cpu.minerva.gprf.mem.collision[0] nq=$abc$109383$new_n59899_
 .subckt buf_x4 i=$abc$109383$new_n59899_ q=$abc$109383$new_n59900_
 .subckt buf_x4 i=$abc$109383$new_n59900_ q=$abc$109383$new_n59901_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[0] i1=soc.cpu.minerva.gprf.mem._0_[0] q=$abc$109383$new_n59902_
-.subckt a2_x2 i0=$abc$109383$new_n59902_ i1=$abc$109383$new_n59898_ q=$abc$109383$new_n59903_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[0] i1=soc.cpu.minerva.gprf.mem._0_[0] q=$abc$109383$new_n59902_
+.subckt and2_x1 i0=$abc$109383$new_n59902_ i1=$abc$109383$new_n59898_ q=$abc$109383$new_n59903_
 .subckt nor2_x0 i0=$abc$109383$new_n59903_ i1=$abc$109383$new_n59895_ nq=$abc$109383$new_n59904_
 .subckt nand4_x0 i0=$abc$109383$new_n15490_ i1=$abc$109383$new_n15486_ i2=$abc$109383$new_n15494_ i3=$abc$109383$new_n28911_ nq=$abc$109383$new_n59905_
 .subckt buf_x4 i=$abc$109383$new_n59905_ q=$abc$109383$new_n59906_
 .subckt buf_x4 i=$abc$109383$new_n59906_ q=$abc$109383$new_n59907_
-.subckt oa22_x2 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n59904_ i2=$abc$109383$new_n59882_ q=$abc$109383$new_n59908_
+.subckt or21nand_x1 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n59904_ i2=$abc$109383$new_n59882_ nq=$abc$109383$new_n59908_
 .subckt nand3_x0 i0=$abc$109383$new_n59877_ i1=$abc$109383$new_n15416_ i2=$abc$109383$new_n29192_ nq=$abc$109383$new_n59909_
 .subckt buf_x4 i=$abc$109383$new_n59909_ q=$abc$109383$new_n59910_
-.subckt o3_x2 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n57096_ i2=$abc$109383$new_n57075_ q=$abc$109383$new_n59911_
+.subckt or3_x1 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n57096_ i2=$abc$109383$new_n57075_ q=$abc$109383$new_n59911_
 .subckt nand2_x0 i0=$abc$109383$new_n59911_ i1=$abc$109383$new_n59908_ nq=$abc$109383$new_n59912_
-.subckt a4_x2 i0=$abc$109383$new_n59912_ i1=$abc$109383$new_n59874_ i2=$abc$109383$new_n56424_ i3=$abc$109383$new_n53208_ q=$abc$109383$new_n59913_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=$abc$109383$new_n30304_ q=$abc$109383$new_n59914_
-.subckt ao22_x2 i0=$abc$109383$new_n59914_ i1=$abc$109383$new_n59913_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107662
+.subckt and4_x1 i0=$abc$109383$new_n59912_ i1=$abc$109383$new_n59874_ i2=$abc$109383$new_n56424_ i3=$abc$109383$new_n53208_ q=$abc$109383$new_n59913_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n56512_ i2=$abc$109383$new_n30304_ nq=$abc$109383$new_n59914_
+.subckt and21nor_x1 i0=$abc$109383$new_n59914_ i1=$abc$109383$new_n59913_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107662
 .subckt buf_x4 i=$abc$109383$new_n59879_ q=$abc$109383$new_n59916_
-.subckt ao22_x2 i0=$abc$109383$new_n52559_ i1=$abc$109383$new_n52560_ i2=$abc$109383$new_n59894_ q=$abc$109383$new_n59917_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[1] i1=soc.cpu.minerva.gprf.mem._0_[1] q=$abc$109383$new_n59918_
-.subckt oa22_x2 i0=$abc$109383$new_n59918_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59881_ q=$abc$109383$new_n59919_
-.subckt o2_x2 i0=$abc$109383$new_n59919_ i1=$abc$109383$new_n59917_ q=$abc$109383$new_n59920_
+.subckt and21nor_x1 i0=$abc$109383$new_n52559_ i1=$abc$109383$new_n52560_ i2=$abc$109383$new_n59894_ nq=$abc$109383$new_n59917_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[1] i1=soc.cpu.minerva.gprf.mem._0_[1] q=$abc$109383$new_n59918_
+.subckt or21nand_x1 i0=$abc$109383$new_n59918_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59881_ nq=$abc$109383$new_n59919_
+.subckt or2_x1 i0=$abc$109383$new_n59919_ i1=$abc$109383$new_n59917_ q=$abc$109383$new_n59920_
 .subckt nand2_x0 i0=$abc$109383$new_n59881_ i1=$abc$109383$new_n58644_ nq=$abc$109383$new_n59921_
-.subckt oa22_x2 i0=$abc$109383$new_n59921_ i1=$abc$109383$new_n59920_ i2=$abc$109383$new_n59916_ q=$abc$109383$new_n59922_
-.subckt oa22_x2 i0=$abc$109383$new_n57107_ i1=$abc$109383$new_n57126_ i2=$abc$109383$new_n59910_ q=$abc$109383$new_n59923_
-.subckt a2_x2 i0=$abc$109383$new_n59923_ i1=$abc$109383$new_n59874_ q=$abc$109383$new_n59924_
+.subckt or21nand_x1 i0=$abc$109383$new_n59921_ i1=$abc$109383$new_n59920_ i2=$abc$109383$new_n59916_ nq=$abc$109383$new_n59922_
+.subckt or21nand_x1 i0=$abc$109383$new_n57107_ i1=$abc$109383$new_n57126_ i2=$abc$109383$new_n59910_ nq=$abc$109383$new_n59923_
+.subckt and2_x1 i0=$abc$109383$new_n59923_ i1=$abc$109383$new_n59874_ q=$abc$109383$new_n59924_
 .subckt nand2_x0 i0=$abc$109383$new_n59924_ i1=$abc$109383$new_n59922_ nq=$abc$109383$new_n59925_
 .subckt nand3_x0 i0=$abc$109383$new_n59925_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n59926_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=$abc$109383$new_n29452_ q=$abc$109383$new_n59927_
-.subckt a3_x2 i0=$abc$109383$new_n59927_ i1=$abc$109383$new_n59926_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107666
-.subckt o2_x2 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n58694_ q=$abc$109383$new_n59929_
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=$abc$109383$new_n29452_ nq=$abc$109383$new_n59927_
+.subckt and3_x1 i0=$abc$109383$new_n59927_ i1=$abc$109383$new_n59926_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107666
+.subckt or2_x1 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n58694_ q=$abc$109383$new_n59929_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[2] nq=$abc$109383$new_n59930_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[2] nq=$abc$109383$new_n59931_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=$abc$109383$new_n59931_ i1=$abc$109383$new_n59930_ q=$abc$109383$new_n59932_
-.subckt oa22_x2 i0=$abc$109383$new_n59932_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59881_ q=$abc$109383$new_n59933_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=$abc$109383$new_n59931_ i1=$abc$109383$new_n59930_ q=$abc$109383$new_n59932_
+.subckt or21nand_x1 i0=$abc$109383$new_n59932_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59881_ nq=$abc$109383$new_n59933_
 .subckt nor2_x0 i0=$abc$109383$new_n59898_ i1=$abc$109383$new_n19916_ nq=$abc$109383$new_n59934_
-.subckt ao22_x2 i0=$abc$109383$new_n59934_ i1=$abc$109383$new_n59933_ i2=$abc$109383$new_n59929_ q=$abc$109383$new_n59935_
+.subckt and21nor_x1 i0=$abc$109383$new_n59934_ i1=$abc$109383$new_n59933_ i2=$abc$109383$new_n59929_ nq=$abc$109383$new_n59935_
 .subckt nand2_x0 i0=$abc$109383$new_n59935_ i1=$abc$109383$new_n59910_ nq=$abc$109383$new_n59936_
-.subckt ao22_x2 i0=$abc$109383$new_n57151_ i1=$abc$109383$new_n59910_ i2=$abc$109383$new_n59874_ q=$abc$109383$new_n59937_
+.subckt and21nor_x1 i0=$abc$109383$new_n57151_ i1=$abc$109383$new_n59910_ i2=$abc$109383$new_n59874_ nq=$abc$109383$new_n59937_
 .subckt nand2_x0 i0=$abc$109383$new_n59937_ i1=$abc$109383$new_n59936_ nq=$abc$109383$new_n59938_
 .subckt buf_x4 i=$abc$109383$new_n56523_ q=$abc$109383$new_n59939_
 .subckt buf_x4 i=$abc$109383$new_n53970_ q=$abc$109383$new_n59940_
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[2] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n59941_
-.subckt a4_x2 i0=$abc$109383$new_n59941_ i1=$abc$109383$new_n59938_ i2=$abc$109383$new_n52666_ i3=$abc$109383$new_n52667_ q=$abc$109383$new_n59942_
-.subckt ao22_x2 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29923_ i2=$abc$109383$new_n29749_ q=$abc$109383$new_n59943_
+.subckt and4_x1 i0=$abc$109383$new_n59941_ i1=$abc$109383$new_n59938_ i2=$abc$109383$new_n52666_ i3=$abc$109383$new_n52667_ q=$abc$109383$new_n59942_
+.subckt and21nor_x1 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29923_ i2=$abc$109383$new_n29749_ nq=$abc$109383$new_n59943_
 .subckt nor3_x0 i0=$abc$109383$new_n59943_ i1=$abc$109383$new_n59942_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107670
 .subckt nand2_x0 i0=$abc$109383$new_n59901_ i1=soc.cpu.minerva.gprf.mem._0_[3] nq=$abc$109383$new_n59945_
 .subckt nand3_x0 i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[3] i1=soc.cpu.minerva.gprf.mem.fwd_wp_en i2=soc.cpu.minerva.gprf.mem.collision[0] nq=$abc$109383$new_n59946_
-.subckt a2_x2 i0=$abc$109383$new_n59946_ i1=$abc$109383$new_n59898_ q=$abc$109383$new_n59947_
-.subckt oa22_x2 i0=$abc$109383$new_n59947_ i1=$abc$109383$new_n59945_ i2=$abc$109383$new_n59881_ q=$abc$109383$new_n59948_
-.subckt oa22_x2 i0=$abc$109383$new_n52568_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59948_ q=$abc$109383$new_n59949_
-.subckt o2_x2 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n58727_ q=$abc$109383$new_n59950_
+.subckt and2_x1 i0=$abc$109383$new_n59946_ i1=$abc$109383$new_n59898_ q=$abc$109383$new_n59947_
+.subckt or21nand_x1 i0=$abc$109383$new_n59947_ i1=$abc$109383$new_n59945_ i2=$abc$109383$new_n59881_ nq=$abc$109383$new_n59948_
+.subckt or21nand_x1 i0=$abc$109383$new_n52568_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59948_ nq=$abc$109383$new_n59949_
+.subckt or2_x1 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n58727_ q=$abc$109383$new_n59950_
 .subckt nand3_x0 i0=$abc$109383$new_n59950_ i1=$abc$109383$new_n59949_ i2=$abc$109383$new_n59910_ nq=$abc$109383$new_n59951_
 .subckt nand3_x0 i0=$abc$109383$new_n59916_ i1=$abc$109383$new_n57171_ i2=$abc$109383$new_n57155_ nq=$abc$109383$new_n59952_
 .subckt nand3_x0 i0=$abc$109383$new_n59952_ i1=$abc$109383$new_n59951_ i2=$abc$109383$new_n59874_ nq=$abc$109383$new_n59953_
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[3] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n59954_
-.subckt a4_x2 i0=$abc$109383$new_n59954_ i1=$abc$109383$new_n59953_ i2=$abc$109383$new_n52666_ i3=$abc$109383$new_n52667_ q=$abc$109383$new_n59955_
-.subckt ao22_x2 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29923_ i2=$abc$109383$new_n29746_ q=$abc$109383$new_n59956_
+.subckt and4_x1 i0=$abc$109383$new_n59954_ i1=$abc$109383$new_n59953_ i2=$abc$109383$new_n52666_ i3=$abc$109383$new_n52667_ q=$abc$109383$new_n59955_
+.subckt and21nor_x1 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29923_ i2=$abc$109383$new_n29746_ nq=$abc$109383$new_n59956_
 .subckt nor3_x0 i0=$abc$109383$new_n59956_ i1=$abc$109383$new_n59955_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107674
 .subckt buf_x4 i=$abc$109383$new_n53970_ q=$abc$109383$new_n59958_
-.subckt a3_x2 i0=$abc$109383$new_n59958_ i1=soc.cpu.minerva.payload__pc$27[4] i2=$abc$109383$new_n56523_ q=$abc$109383$new_n59959_
+.subckt and3_x1 i0=$abc$109383$new_n59958_ i1=soc.cpu.minerva.payload__pc$27[4] i2=$abc$109383$new_n56523_ q=$abc$109383$new_n59959_
 .subckt buf_x4 i=$abc$109383$new_n59879_ q=$abc$109383$new_n59960_
 .subckt nand2_x0 i0=$abc$109383$new_n59960_ i1=$abc$109383$new_n57202_ nq=$abc$109383$new_n59961_
-.subckt a2_x2 i0=$abc$109383$new_n59961_ i1=$abc$109383$new_n59874_ q=$abc$109383$new_n59962_
-.subckt o2_x2 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n58775_ q=$abc$109383$new_n59963_
-.subckt mx2_x2 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[4] i1=soc.cpu.minerva.gprf.mem._0_[4] q=$abc$109383$new_n59964_
-.subckt oa22_x2 i0=$abc$109383$new_n59964_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ q=$abc$109383$new_n59965_
-.subckt oa22_x2 i0=$abc$109383$new_n19955_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59965_ q=$abc$109383$new_n59966_
-.subckt oa22_x2 i0=$abc$109383$new_n59966_ i1=$abc$109383$new_n59963_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n59967_
-.subckt oa22_x2 i0=$abc$109383$new_n59967_ i1=$abc$109383$new_n59962_ i2=$abc$109383$new_n59959_ q=$abc$109383$new_n59968_
+.subckt and2_x1 i0=$abc$109383$new_n59961_ i1=$abc$109383$new_n59874_ q=$abc$109383$new_n59962_
+.subckt or2_x1 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n58775_ q=$abc$109383$new_n59963_
+.subckt mux2_x1 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[4] i1=soc.cpu.minerva.gprf.mem._0_[4] q=$abc$109383$new_n59964_
+.subckt or21nand_x1 i0=$abc$109383$new_n59964_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ nq=$abc$109383$new_n59965_
+.subckt or21nand_x1 i0=$abc$109383$new_n19955_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59965_ nq=$abc$109383$new_n59966_
+.subckt or21nand_x1 i0=$abc$109383$new_n59966_ i1=$abc$109383$new_n59963_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n59967_
+.subckt or21nand_x1 i0=$abc$109383$new_n59967_ i1=$abc$109383$new_n59962_ i2=$abc$109383$new_n59959_ nq=$abc$109383$new_n59968_
 .subckt nor3_x0 i0=$abc$109383$new_n59968_ i1=$abc$109383$new_n30152_ i2=$abc$109383$new_n29942_ nq=$abc$109383$new_n59969_
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n29275_ q=$abc$109383$new_n59970_
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n29275_ nq=$abc$109383$new_n59970_
 .subckt nand2_x0 i0=$abc$109383$new_n59970_ i1=$abc$109383$new_n28536_ nq=$abc$109383$new_n59971_
 .subckt nor2_x0 i0=$abc$109383$new_n59971_ i1=$abc$109383$new_n59969_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107678
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[5] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n59973_
-.subckt a3_x2 i0=$abc$109383$new_n59973_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n40103_ q=$abc$109383$new_n59974_
-.subckt a2_x2 i0=$abc$109383$new_n59871_ i1=$abc$109383$new_n59870_ q=$abc$109383$new_n59975_
-.subckt oa22_x2 i0=$abc$109383$new_n15410_ i1=$abc$109383$new_n59975_ i2=$abc$109383$new_n53970_ q=$abc$109383$new_n59976_
+.subckt and3_x1 i0=$abc$109383$new_n59973_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n40103_ q=$abc$109383$new_n59974_
+.subckt and2_x1 i0=$abc$109383$new_n59871_ i1=$abc$109383$new_n59870_ q=$abc$109383$new_n59975_
+.subckt or21nand_x1 i0=$abc$109383$new_n15410_ i1=$abc$109383$new_n59975_ i2=$abc$109383$new_n53970_ nq=$abc$109383$new_n59976_
 .subckt buf_x4 i=$abc$109383$new_n59880_ q=$abc$109383$new_n59977_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[5] nq=$abc$109383$new_n59978_
 .subckt buf_x4 i=$abc$109383$new_n59900_ q=$abc$109383$new_n59979_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n58815_ i1=$abc$109383$new_n59978_ q=$abc$109383$new_n59980_
-.subckt oa22_x2 i0=$abc$109383$new_n59980_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59977_ q=$abc$109383$new_n59981_
-.subckt oa22_x2 i0=$abc$109383$new_n52577_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59981_ q=$abc$109383$new_n59982_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n58815_ i1=$abc$109383$new_n59978_ q=$abc$109383$new_n59980_
+.subckt or21nand_x1 i0=$abc$109383$new_n59980_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59977_ nq=$abc$109383$new_n59981_
+.subckt or21nand_x1 i0=$abc$109383$new_n52577_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59981_ nq=$abc$109383$new_n59982_
 .subckt buf_x4 i=$abc$109383$new_n59905_ q=$abc$109383$new_n59983_
-.subckt ao22_x2 i0=$abc$109383$new_n58820_ i1=$abc$109383$new_n59983_ i2=$abc$109383$new_n59910_ q=$abc$109383$new_n59984_
-.subckt oa22_x2 i0=$abc$109383$new_n59984_ i1=$abc$109383$new_n59982_ i2=$abc$109383$new_n59976_ q=$abc$109383$new_n59985_
-.subckt oa22_x2 i0=$abc$109383$new_n57234_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n59985_ q=$abc$109383$new_n59986_
-.subckt a2_x2 i0=$abc$109383$new_n59986_ i1=$abc$109383$new_n59974_ q=$abc$109383$new_n59987_
-.subckt ao22_x2 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29923_ i2=$abc$109383$new_n29738_ q=$abc$109383$new_n59988_
+.subckt and21nor_x1 i0=$abc$109383$new_n58820_ i1=$abc$109383$new_n59983_ i2=$abc$109383$new_n59910_ nq=$abc$109383$new_n59984_
+.subckt or21nand_x1 i0=$abc$109383$new_n59984_ i1=$abc$109383$new_n59982_ i2=$abc$109383$new_n59976_ nq=$abc$109383$new_n59985_
+.subckt or21nand_x1 i0=$abc$109383$new_n57234_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n59985_ nq=$abc$109383$new_n59986_
+.subckt and2_x1 i0=$abc$109383$new_n59986_ i1=$abc$109383$new_n59974_ q=$abc$109383$new_n59987_
+.subckt and21nor_x1 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n29923_ i2=$abc$109383$new_n29738_ nq=$abc$109383$new_n59988_
 .subckt nor3_x0 i0=$abc$109383$new_n59988_ i1=$abc$109383$new_n59987_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107682
 .subckt buf_x4 i=$abc$109383$new_n59880_ q=$abc$109383$new_n59990_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[6] nq=$abc$109383$new_n59991_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=$abc$109383$new_n58854_ i1=$abc$109383$new_n59991_ q=$abc$109383$new_n59992_
-.subckt oa22_x2 i0=$abc$109383$new_n59992_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59990_ q=$abc$109383$new_n59993_
-.subckt oa22_x2 i0=$abc$109383$new_n52585_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59993_ q=$abc$109383$new_n59994_
-.subckt ao22_x2 i0=$abc$109383$new_n58859_ i1=$abc$109383$new_n59907_ i2=$abc$109383$new_n59910_ q=$abc$109383$new_n59995_
-.subckt oa22_x2 i0=$abc$109383$new_n59995_ i1=$abc$109383$new_n59994_ i2=$abc$109383$new_n59976_ q=$abc$109383$new_n59996_
-.subckt oa22_x2 i0=$abc$109383$new_n57256_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n59996_ q=$abc$109383$new_n59997_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=$abc$109383$new_n58854_ i1=$abc$109383$new_n59991_ q=$abc$109383$new_n59992_
+.subckt or21nand_x1 i0=$abc$109383$new_n59992_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59990_ nq=$abc$109383$new_n59993_
+.subckt or21nand_x1 i0=$abc$109383$new_n52585_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59993_ nq=$abc$109383$new_n59994_
+.subckt and21nor_x1 i0=$abc$109383$new_n58859_ i1=$abc$109383$new_n59907_ i2=$abc$109383$new_n59910_ nq=$abc$109383$new_n59995_
+.subckt or21nand_x1 i0=$abc$109383$new_n59995_ i1=$abc$109383$new_n59994_ i2=$abc$109383$new_n59976_ nq=$abc$109383$new_n59996_
+.subckt or21nand_x1 i0=$abc$109383$new_n57256_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n59996_ nq=$abc$109383$new_n59997_
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[6] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n59998_
-.subckt a3_x2 i0=$abc$109383$new_n59998_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n59999_
+.subckt and3_x1 i0=$abc$109383$new_n59998_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n59999_
 .subckt nand2_x0 i0=$abc$109383$new_n59999_ i1=$abc$109383$new_n59997_ nq=$abc$109383$new_n60000_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=$abc$109383$new_n29332_ q=$abc$109383$new_n60001_
-.subckt a2_x2 i0=$abc$109383$new_n60001_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60002_
-.subckt a2_x2 i0=$abc$109383$new_n60002_ i1=$abc$109383$new_n60000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107686
-.subckt ao22_x2 i0=$abc$109383$new_n58892_ i1=$abc$109383$new_n59983_ i2=$abc$109383$new_n59909_ q=$abc$109383$new_n60004_
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=$abc$109383$new_n29332_ nq=$abc$109383$new_n60001_
+.subckt and2_x1 i0=$abc$109383$new_n60001_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60002_
+.subckt and2_x1 i0=$abc$109383$new_n60002_ i1=$abc$109383$new_n60000_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107686
+.subckt and21nor_x1 i0=$abc$109383$new_n58892_ i1=$abc$109383$new_n59983_ i2=$abc$109383$new_n59909_ nq=$abc$109383$new_n60004_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[7] nq=$abc$109383$new_n60005_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=$abc$109383$new_n58894_ i1=$abc$109383$new_n60005_ q=$abc$109383$new_n60006_
-.subckt oa22_x2 i0=$abc$109383$new_n60006_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59990_ q=$abc$109383$new_n60007_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=$abc$109383$new_n58894_ i1=$abc$109383$new_n60005_ q=$abc$109383$new_n60006_
+.subckt or21nand_x1 i0=$abc$109383$new_n60006_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n59990_ nq=$abc$109383$new_n60007_
 .subckt buf_x4 i=$abc$109383$new_n59893_ q=$abc$109383$new_n60008_
-.subckt ao22_x2 i0=$abc$109383$new_n19994_ i1=$abc$109383$new_n20007_ i2=$abc$109383$new_n60008_ q=$abc$109383$new_n60009_
-.subckt ao22_x2 i0=$abc$109383$new_n60009_ i1=$abc$109383$new_n60007_ i2=$abc$109383$new_n60004_ q=$abc$109383$new_n60010_
-.subckt o2_x2 i0=$abc$109383$new_n60010_ i1=$abc$109383$new_n59976_ q=$abc$109383$new_n60011_
-.subckt oa22_x2 i0=$abc$109383$new_n57284_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60011_ q=$abc$109383$new_n60012_
+.subckt and21nor_x1 i0=$abc$109383$new_n19994_ i1=$abc$109383$new_n20007_ i2=$abc$109383$new_n60008_ nq=$abc$109383$new_n60009_
+.subckt and21nor_x1 i0=$abc$109383$new_n60009_ i1=$abc$109383$new_n60007_ i2=$abc$109383$new_n60004_ nq=$abc$109383$new_n60010_
+.subckt or2_x1 i0=$abc$109383$new_n60010_ i1=$abc$109383$new_n59976_ q=$abc$109383$new_n60011_
+.subckt or21nand_x1 i0=$abc$109383$new_n57284_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60011_ nq=$abc$109383$new_n60012_
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[7] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n60013_
-.subckt a3_x2 i0=$abc$109383$new_n60013_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n29816_ q=$abc$109383$new_n60014_
+.subckt and3_x1 i0=$abc$109383$new_n60013_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n29816_ q=$abc$109383$new_n60014_
 .subckt nand2_x0 i0=$abc$109383$new_n60014_ i1=$abc$109383$new_n60012_ nq=$abc$109383$new_n60015_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=$abc$109383$new_n29354_ q=$abc$109383$new_n60016_
-.subckt a2_x2 i0=$abc$109383$new_n60016_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60017_
-.subckt a2_x2 i0=$abc$109383$new_n60017_ i1=$abc$109383$new_n60015_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107690
-.subckt oa22_x2 i0=$abc$109383$new_n58924_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n60019_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[8] i1=soc.cpu.minerva.gprf.mem._0_[8] q=$abc$109383$new_n60020_
-.subckt ao22_x2 i0=$abc$109383$new_n60020_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n59907_ q=$abc$109383$new_n60021_
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=$abc$109383$new_n29354_ nq=$abc$109383$new_n60016_
+.subckt and2_x1 i0=$abc$109383$new_n60016_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60017_
+.subckt and2_x1 i0=$abc$109383$new_n60017_ i1=$abc$109383$new_n60015_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107690
+.subckt or21nand_x1 i0=$abc$109383$new_n58924_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n60019_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[8] i1=soc.cpu.minerva.gprf.mem._0_[8] q=$abc$109383$new_n60020_
+.subckt and21nor_x1 i0=$abc$109383$new_n60020_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n59907_ nq=$abc$109383$new_n60021_
 .subckt nand3_x0 i0=$abc$109383$new_n59894_ i1=$abc$109383$new_n20026_ i2=$abc$109383$new_n20012_ nq=$abc$109383$new_n60022_
-.subckt oa22_x2 i0=$abc$109383$new_n60022_ i1=$abc$109383$new_n60021_ i2=$abc$109383$new_n60019_ q=$abc$109383$new_n60023_
+.subckt or21nand_x1 i0=$abc$109383$new_n60022_ i1=$abc$109383$new_n60021_ i2=$abc$109383$new_n60019_ nq=$abc$109383$new_n60023_
 .subckt nand2_x0 i0=$abc$109383$new_n60023_ i1=$abc$109383$new_n59874_ nq=$abc$109383$new_n60024_
-.subckt oa22_x2 i0=$abc$109383$new_n57309_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60024_ q=$abc$109383$new_n60025_
+.subckt or21nand_x1 i0=$abc$109383$new_n57309_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60024_ nq=$abc$109383$new_n60025_
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[8] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n60026_
-.subckt a3_x2 i0=$abc$109383$new_n60026_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n56423_ q=$abc$109383$new_n60027_
-.subckt a2_x2 i0=$abc$109383$new_n60027_ i1=$abc$109383$new_n60025_ q=$abc$109383$new_n60028_
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n29510_ q=$abc$109383$new_n60029_
+.subckt and3_x1 i0=$abc$109383$new_n60026_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n56423_ q=$abc$109383$new_n60027_
+.subckt and2_x1 i0=$abc$109383$new_n60027_ i1=$abc$109383$new_n60025_ q=$abc$109383$new_n60028_
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n52667_ i2=$abc$109383$new_n29510_ nq=$abc$109383$new_n60029_
 .subckt nand2_x0 i0=$abc$109383$new_n60029_ i1=$abc$109383$new_n27432_ nq=$abc$109383$new_n60030_
 .subckt nor2_x0 i0=$abc$109383$new_n60030_ i1=$abc$109383$new_n60028_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107694
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[9] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n60032_
-.subckt a3_x2 i0=$abc$109383$new_n60032_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n31803_ q=$abc$109383$new_n60033_
-.subckt a2_x2 i0=$abc$109383$new_n56654_ i1=$abc$109383$new_n56577_ q=$abc$109383$new_n60034_
-.subckt oa22_x2 i0=$abc$109383$new_n60034_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n60035_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[9] i1=soc.cpu.minerva.gprf.mem._0_[9] q=$abc$109383$new_n60036_
-.subckt ao22_x2 i0=$abc$109383$new_n60036_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n59907_ q=$abc$109383$new_n60037_
+.subckt and3_x1 i0=$abc$109383$new_n60032_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n31803_ q=$abc$109383$new_n60033_
+.subckt and2_x1 i0=$abc$109383$new_n56654_ i1=$abc$109383$new_n56577_ q=$abc$109383$new_n60034_
+.subckt or21nand_x1 i0=$abc$109383$new_n60034_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n60035_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[9] i1=soc.cpu.minerva.gprf.mem._0_[9] q=$abc$109383$new_n60036_
+.subckt and21nor_x1 i0=$abc$109383$new_n60036_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n59907_ nq=$abc$109383$new_n60037_
 .subckt nand3_x0 i0=$abc$109383$new_n59894_ i1=$abc$109383$new_n20038_ i2=$abc$109383$new_n20036_ nq=$abc$109383$new_n60038_
-.subckt oa22_x2 i0=$abc$109383$new_n60038_ i1=$abc$109383$new_n60037_ i2=$abc$109383$new_n60035_ q=$abc$109383$new_n60039_
+.subckt or21nand_x1 i0=$abc$109383$new_n60038_ i1=$abc$109383$new_n60037_ i2=$abc$109383$new_n60035_ nq=$abc$109383$new_n60039_
 .subckt nand2_x0 i0=$abc$109383$new_n60039_ i1=$abc$109383$new_n59874_ nq=$abc$109383$new_n60040_
-.subckt oa22_x2 i0=$abc$109383$new_n58973_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60040_ q=$abc$109383$new_n60041_
+.subckt or21nand_x1 i0=$abc$109383$new_n58973_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60040_ nq=$abc$109383$new_n60041_
 .subckt nand2_x0 i0=$abc$109383$new_n60041_ i1=$abc$109383$new_n60033_ nq=$abc$109383$new_n60042_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=$abc$109383$new_n29532_ q=$abc$109383$new_n60043_
-.subckt a2_x2 i0=$abc$109383$new_n60043_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60044_
-.subckt a2_x2 i0=$abc$109383$new_n60044_ i1=$abc$109383$new_n60042_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107698
-.subckt oa22_x2 i0=$abc$109383$new_n58994_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n60046_
-.subckt mx2_x2 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[10] i1=soc.cpu.minerva.gprf.mem._0_[10] q=$abc$109383$new_n60047_
-.subckt ao22_x2 i0=$abc$109383$new_n60047_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59907_ q=$abc$109383$new_n60048_
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n59841_ i2=$abc$109383$new_n29532_ nq=$abc$109383$new_n60043_
+.subckt and2_x1 i0=$abc$109383$new_n60043_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60044_
+.subckt and2_x1 i0=$abc$109383$new_n60044_ i1=$abc$109383$new_n60042_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107698
+.subckt or21nand_x1 i0=$abc$109383$new_n58994_ i1=$abc$109383$new_n59881_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n60046_
+.subckt mux2_x1 cmd=$abc$109383$new_n59901_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[10] i1=soc.cpu.minerva.gprf.mem._0_[10] q=$abc$109383$new_n60047_
+.subckt and21nor_x1 i0=$abc$109383$new_n60047_ i1=$abc$109383$new_n59894_ i2=$abc$109383$new_n59907_ nq=$abc$109383$new_n60048_
 .subckt nand3_x0 i0=$abc$109383$new_n59894_ i1=$abc$109383$new_n20051_ i2=$abc$109383$new_n20043_ nq=$abc$109383$new_n60049_
-.subckt oa22_x2 i0=$abc$109383$new_n60049_ i1=$abc$109383$new_n60048_ i2=$abc$109383$new_n60046_ q=$abc$109383$new_n60050_
+.subckt or21nand_x1 i0=$abc$109383$new_n60049_ i1=$abc$109383$new_n60048_ i2=$abc$109383$new_n60046_ nq=$abc$109383$new_n60050_
 .subckt nand2_x0 i0=$abc$109383$new_n60050_ i1=$abc$109383$new_n59874_ nq=$abc$109383$new_n60051_
-.subckt oa22_x2 i0=$abc$109383$new_n57353_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60051_ q=$abc$109383$new_n60052_
+.subckt or21nand_x1 i0=$abc$109383$new_n57353_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60051_ nq=$abc$109383$new_n60052_
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[10] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n60053_
-.subckt a3_x2 i0=$abc$109383$new_n60053_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n29816_ q=$abc$109383$new_n60054_
+.subckt and3_x1 i0=$abc$109383$new_n60053_ i1=$abc$109383$new_n30268_ i2=$abc$109383$new_n29816_ q=$abc$109383$new_n60054_
 .subckt nand2_x0 i0=$abc$109383$new_n60054_ i1=$abc$109383$new_n60052_ nq=$abc$109383$new_n60055_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n29558_ q=$abc$109383$new_n60056_
-.subckt a2_x2 i0=$abc$109383$new_n60056_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60057_
-.subckt a2_x2 i0=$abc$109383$new_n60057_ i1=$abc$109383$new_n60055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107702
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n29558_ nq=$abc$109383$new_n60056_
+.subckt and2_x1 i0=$abc$109383$new_n60056_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60057_
+.subckt and2_x1 i0=$abc$109383$new_n60057_ i1=$abc$109383$new_n60055_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107702
 .subckt nand3_x0 i0=$abc$109383$new_n59940_ i1=soc.cpu.minerva.payload__pc$27[11] i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n60059_
-.subckt a3_x2 i0=$abc$109383$new_n60059_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n31803_ q=$abc$109383$new_n60060_
+.subckt and3_x1 i0=$abc$109383$new_n60059_ i1=$abc$109383$new_n30272_ i2=$abc$109383$new_n31803_ q=$abc$109383$new_n60060_
 .subckt nor2_x0 i0=$abc$109383$new_n59983_ i1=$abc$109383$new_n59041_ nq=$abc$109383$new_n60061_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[11] nq=$abc$109383$new_n60062_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[11] nq=$abc$109383$new_n60063_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n60063_ i1=$abc$109383$new_n60062_ q=$abc$109383$new_n60064_
-.subckt ao22_x2 i0=$abc$109383$new_n60064_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60065_
-.subckt oa22_x2 i0=$abc$109383$new_n20057_ i1=$abc$109383$new_n20066_ i2=$abc$109383$new_n59898_ q=$abc$109383$new_n60066_
-.subckt oa22_x2 i0=$abc$109383$new_n60066_ i1=$abc$109383$new_n60065_ i2=$abc$109383$new_n60061_ q=$abc$109383$new_n60067_
-.subckt oa22_x2 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n60067_ i2=$abc$109383$new_n59976_ q=$abc$109383$new_n60068_
-.subckt oa22_x2 i0=$abc$109383$new_n57377_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60068_ q=$abc$109383$new_n60069_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n60063_ i1=$abc$109383$new_n60062_ q=$abc$109383$new_n60064_
+.subckt and21nor_x1 i0=$abc$109383$new_n60064_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60065_
+.subckt or21nand_x1 i0=$abc$109383$new_n20057_ i1=$abc$109383$new_n20066_ i2=$abc$109383$new_n59898_ nq=$abc$109383$new_n60066_
+.subckt or21nand_x1 i0=$abc$109383$new_n60066_ i1=$abc$109383$new_n60065_ i2=$abc$109383$new_n60061_ nq=$abc$109383$new_n60067_
+.subckt or21nand_x1 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n60067_ i2=$abc$109383$new_n59976_ nq=$abc$109383$new_n60068_
+.subckt or21nand_x1 i0=$abc$109383$new_n57377_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60068_ nq=$abc$109383$new_n60069_
 .subckt nand2_x0 i0=$abc$109383$new_n60069_ i1=$abc$109383$new_n60060_ nq=$abc$109383$new_n60070_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n29582_ q=$abc$109383$new_n60071_
-.subckt a2_x2 i0=$abc$109383$new_n60071_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60072_
-.subckt a2_x2 i0=$abc$109383$new_n60072_ i1=$abc$109383$new_n60070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107706
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n29582_ nq=$abc$109383$new_n60071_
+.subckt and2_x1 i0=$abc$109383$new_n60071_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60072_
+.subckt and2_x1 i0=$abc$109383$new_n60072_ i1=$abc$109383$new_n60070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107706
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n60074_
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29707_ q=$abc$109383$new_n60075_
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29707_ nq=$abc$109383$new_n60075_
 .subckt buf_x4 i=$abc$109383$new_n56523_ q=$abc$109383$new_n60076_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[12] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60077_
 .subckt nand2_x0 i0=$abc$109383$new_n60077_ i1=$abc$109383$new_n59940_ nq=$abc$109383$new_n60078_
 .subckt nand3_x0 i0=$abc$109383$new_n60078_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60079_
 .subckt nand3_x0 i0=$abc$109383$new_n59975_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n15410_ nq=$abc$109383$new_n60080_
 .subckt buf_x4 i=$abc$109383$new_n60080_ q=$abc$109383$new_n60081_
-.subckt o2_x2 i0=$abc$109383$new_n59905_ i1=$abc$109383$new_n59070_ q=$abc$109383$new_n60082_
+.subckt or2_x1 i0=$abc$109383$new_n59905_ i1=$abc$109383$new_n59070_ q=$abc$109383$new_n60082_
 .subckt nand2_x0 i0=$abc$109383$new_n60082_ i1=$abc$109383$new_n59909_ nq=$abc$109383$new_n60083_
 .subckt buf_x4 i=$abc$109383$new_n59893_ q=$abc$109383$new_n60084_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[12] i1=soc.cpu.minerva.gprf.mem._0_[12] q=$abc$109383$new_n60085_
-.subckt ao22_x2 i0=$abc$109383$new_n60085_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60086_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[12] i1=soc.cpu.minerva.gprf.mem._0_[12] q=$abc$109383$new_n60085_
+.subckt and21nor_x1 i0=$abc$109383$new_n60085_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60086_
 .subckt nand3_x0 i0=$abc$109383$new_n60008_ i1=$abc$109383$new_n20079_ i2=$abc$109383$new_n20071_ nq=$abc$109383$new_n60087_
-.subckt oa22_x2 i0=$abc$109383$new_n60087_ i1=$abc$109383$new_n60086_ i2=$abc$109383$new_n60083_ q=$abc$109383$new_n60088_
+.subckt or21nand_x1 i0=$abc$109383$new_n60087_ i1=$abc$109383$new_n60086_ i2=$abc$109383$new_n60083_ nq=$abc$109383$new_n60088_
 .subckt nand2_x0 i0=$abc$109383$new_n60088_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60089_
-.subckt oa22_x2 i0=$abc$109383$new_n57402_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60089_ q=$abc$109383$new_n60090_
+.subckt or21nand_x1 i0=$abc$109383$new_n57402_ i1=$abc$109383$new_n59916_ i2=$abc$109383$new_n60089_ nq=$abc$109383$new_n60090_
 .subckt nand2_x0 i0=$abc$109383$new_n53970_ i1=$abc$109383$new_n56523_ nq=$abc$109383$new_n60091_
 .subckt buf_x4 i=$abc$109383$new_n60091_ q=$abc$109383$new_n60092_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60090_ i2=$abc$109383$new_n60079_ q=$abc$109383$new_n60093_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60090_ i2=$abc$109383$new_n60079_ nq=$abc$109383$new_n60093_
 .subckt nand2_x0 i0=$abc$109383$new_n60093_ i1=$abc$109383$new_n60075_ nq=$abc$109383$new_n60094_
-.subckt a2_x2 i0=$abc$109383$new_n60094_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107710
+.subckt and2_x1 i0=$abc$109383$new_n60094_ i1=$abc$109383$new_n59803_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107710
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n60096_
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29704_ q=$abc$109383$new_n60097_
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29704_ nq=$abc$109383$new_n60097_
 .subckt buf_x4 i=$abc$109383$new_n53970_ q=$abc$109383$new_n60098_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[13] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60099_
 .subckt nand2_x0 i0=$abc$109383$new_n60099_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60100_
 .subckt nand3_x0 i0=$abc$109383$new_n60100_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60101_
-.subckt oa22_x2 i0=$abc$109383$new_n59103_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n60102_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[13] i1=soc.cpu.minerva.gprf.mem._0_[13] q=$abc$109383$new_n60103_
-.subckt ao22_x2 i0=$abc$109383$new_n60103_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60104_
+.subckt or21nand_x1 i0=$abc$109383$new_n59103_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n60102_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[13] i1=soc.cpu.minerva.gprf.mem._0_[13] q=$abc$109383$new_n60103_
+.subckt and21nor_x1 i0=$abc$109383$new_n60103_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60104_
 .subckt nand3_x0 i0=$abc$109383$new_n60008_ i1=$abc$109383$new_n20093_ i2=$abc$109383$new_n20084_ nq=$abc$109383$new_n60105_
-.subckt oa22_x2 i0=$abc$109383$new_n60105_ i1=$abc$109383$new_n60104_ i2=$abc$109383$new_n60102_ q=$abc$109383$new_n60106_
+.subckt or21nand_x1 i0=$abc$109383$new_n60105_ i1=$abc$109383$new_n60104_ i2=$abc$109383$new_n60102_ nq=$abc$109383$new_n60106_
 .subckt nand2_x0 i0=$abc$109383$new_n60106_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60107_
 .subckt buf_x4 i=$abc$109383$new_n59879_ q=$abc$109383$new_n60108_
-.subckt oa22_x2 i0=$abc$109383$new_n57423_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60107_ q=$abc$109383$new_n60109_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60109_ i2=$abc$109383$new_n60101_ q=$abc$109383$new_n60110_
+.subckt or21nand_x1 i0=$abc$109383$new_n57423_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60107_ nq=$abc$109383$new_n60109_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60109_ i2=$abc$109383$new_n60101_ nq=$abc$109383$new_n60110_
 .subckt nand2_x0 i0=$abc$109383$new_n60110_ i1=$abc$109383$new_n60097_ nq=$abc$109383$new_n60111_
-.subckt a2_x2 i0=$abc$109383$new_n60111_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107714
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29699_ q=$abc$109383$new_n60113_
+.subckt and2_x1 i0=$abc$109383$new_n60111_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107714
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29699_ nq=$abc$109383$new_n60113_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[14] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60114_
 .subckt nand2_x0 i0=$abc$109383$new_n60114_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60115_
 .subckt nand3_x0 i0=$abc$109383$new_n60115_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60116_
 .subckt buf_x4 i=$abc$109383$new_n59878_ q=$abc$109383$new_n60117_
-.subckt oa22_x2 i0=$abc$109383$new_n59134_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60118_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[14] i1=soc.cpu.minerva.gprf.mem._0_[14] q=$abc$109383$new_n60119_
-.subckt ao22_x2 i0=$abc$109383$new_n60119_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60120_
+.subckt or21nand_x1 i0=$abc$109383$new_n59134_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60118_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[14] i1=soc.cpu.minerva.gprf.mem._0_[14] q=$abc$109383$new_n60119_
+.subckt and21nor_x1 i0=$abc$109383$new_n60119_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60120_
 .subckt nand3_x0 i0=$abc$109383$new_n60008_ i1=$abc$109383$new_n20107_ i2=$abc$109383$new_n20098_ nq=$abc$109383$new_n60121_
-.subckt oa22_x2 i0=$abc$109383$new_n60121_ i1=$abc$109383$new_n60120_ i2=$abc$109383$new_n60118_ q=$abc$109383$new_n60122_
+.subckt or21nand_x1 i0=$abc$109383$new_n60121_ i1=$abc$109383$new_n60120_ i2=$abc$109383$new_n60118_ nq=$abc$109383$new_n60122_
 .subckt nand2_x0 i0=$abc$109383$new_n60122_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60123_
-.subckt oa22_x2 i0=$abc$109383$new_n57446_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60123_ q=$abc$109383$new_n60124_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60124_ i2=$abc$109383$new_n60116_ q=$abc$109383$new_n60125_
+.subckt or21nand_x1 i0=$abc$109383$new_n57446_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60123_ nq=$abc$109383$new_n60124_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60124_ i2=$abc$109383$new_n60116_ nq=$abc$109383$new_n60125_
 .subckt nand2_x0 i0=$abc$109383$new_n60125_ i1=$abc$109383$new_n60113_ nq=$abc$109383$new_n60126_
-.subckt a2_x2 i0=$abc$109383$new_n60126_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107718
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29696_ q=$abc$109383$new_n60128_
+.subckt and2_x1 i0=$abc$109383$new_n60126_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107718
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29696_ nq=$abc$109383$new_n60128_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[15] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60129_
 .subckt nand2_x0 i0=$abc$109383$new_n60129_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60130_
 .subckt nand3_x0 i0=$abc$109383$new_n60130_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60131_
-.subckt oa22_x2 i0=$abc$109383$new_n59167_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60132_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[15] i1=soc.cpu.minerva.gprf.mem._0_[15] q=$abc$109383$new_n60133_
-.subckt ao22_x2 i0=$abc$109383$new_n60133_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60134_
+.subckt or21nand_x1 i0=$abc$109383$new_n59167_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60132_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[15] i1=soc.cpu.minerva.gprf.mem._0_[15] q=$abc$109383$new_n60133_
+.subckt and21nor_x1 i0=$abc$109383$new_n60133_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60134_
 .subckt nand3_x0 i0=$abc$109383$new_n60008_ i1=$abc$109383$new_n20120_ i2=$abc$109383$new_n20112_ nq=$abc$109383$new_n60135_
-.subckt oa22_x2 i0=$abc$109383$new_n60135_ i1=$abc$109383$new_n60134_ i2=$abc$109383$new_n60132_ q=$abc$109383$new_n60136_
+.subckt or21nand_x1 i0=$abc$109383$new_n60135_ i1=$abc$109383$new_n60134_ i2=$abc$109383$new_n60132_ nq=$abc$109383$new_n60136_
 .subckt nand2_x0 i0=$abc$109383$new_n60136_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60137_
-.subckt oa22_x2 i0=$abc$109383$new_n57470_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60137_ q=$abc$109383$new_n60138_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60138_ i2=$abc$109383$new_n60131_ q=$abc$109383$new_n60139_
+.subckt or21nand_x1 i0=$abc$109383$new_n57470_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60137_ nq=$abc$109383$new_n60138_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60138_ i2=$abc$109383$new_n60131_ nq=$abc$109383$new_n60139_
 .subckt nand2_x0 i0=$abc$109383$new_n60139_ i1=$abc$109383$new_n60128_ nq=$abc$109383$new_n60140_
-.subckt a2_x2 i0=$abc$109383$new_n60140_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107722
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29697_ q=$abc$109383$new_n60142_
+.subckt and2_x1 i0=$abc$109383$new_n60140_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107722
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29697_ nq=$abc$109383$new_n60142_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[16] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60143_
 .subckt nand2_x0 i0=$abc$109383$new_n60143_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60144_
 .subckt nand3_x0 i0=$abc$109383$new_n60144_ i1=$abc$109383$new_n58662_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60145_
-.subckt oa22_x2 i0=$abc$109383$new_n59198_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60146_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[16] i1=soc.cpu.minerva.gprf.mem._0_[16] q=$abc$109383$new_n60147_
-.subckt ao22_x2 i0=$abc$109383$new_n60147_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60148_
+.subckt or21nand_x1 i0=$abc$109383$new_n59198_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60146_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[16] i1=soc.cpu.minerva.gprf.mem._0_[16] q=$abc$109383$new_n60147_
+.subckt and21nor_x1 i0=$abc$109383$new_n60147_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60148_
 .subckt buf_x4 i=$abc$109383$new_n59897_ q=$abc$109383$new_n60149_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20132_ q=$abc$109383$new_n60150_
-.subckt oa22_x2 i0=$abc$109383$new_n60150_ i1=$abc$109383$new_n60148_ i2=$abc$109383$new_n60146_ q=$abc$109383$new_n60151_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20132_ q=$abc$109383$new_n60150_
+.subckt or21nand_x1 i0=$abc$109383$new_n60150_ i1=$abc$109383$new_n60148_ i2=$abc$109383$new_n60146_ nq=$abc$109383$new_n60151_
 .subckt nand2_x0 i0=$abc$109383$new_n60151_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60152_
-.subckt oa22_x2 i0=$abc$109383$new_n57492_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60152_ q=$abc$109383$new_n60153_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60153_ i2=$abc$109383$new_n60145_ q=$abc$109383$new_n60154_
+.subckt or21nand_x1 i0=$abc$109383$new_n57492_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60152_ nq=$abc$109383$new_n60153_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60153_ i2=$abc$109383$new_n60145_ nq=$abc$109383$new_n60154_
 .subckt nand2_x0 i0=$abc$109383$new_n60154_ i1=$abc$109383$new_n60142_ nq=$abc$109383$new_n60155_
-.subckt a2_x2 i0=$abc$109383$new_n60155_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107726
-.subckt oa22_x2 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29700_ q=$abc$109383$new_n60157_
+.subckt and2_x1 i0=$abc$109383$new_n60155_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107726
+.subckt or21nand_x1 i0=$abc$109383$new_n58906_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29700_ nq=$abc$109383$new_n60157_
 .subckt buf_x4 i=$abc$109383$new_n53209_ q=$abc$109383$new_n60158_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[17] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60159_
 .subckt nand2_x0 i0=$abc$109383$new_n60159_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60160_
 .subckt nand3_x0 i0=$abc$109383$new_n60160_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60161_
-.subckt oa22_x2 i0=$abc$109383$new_n59226_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60162_
+.subckt or21nand_x1 i0=$abc$109383$new_n59226_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60162_
 .subckt buf_x4 i=$abc$109383$new_n59900_ q=$abc$109383$new_n60163_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[17] i1=soc.cpu.minerva.gprf.mem._0_[17] q=$abc$109383$new_n60164_
-.subckt ao22_x2 i0=$abc$109383$new_n60164_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ q=$abc$109383$new_n60165_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20139_ q=$abc$109383$new_n60166_
-.subckt oa22_x2 i0=$abc$109383$new_n60166_ i1=$abc$109383$new_n60165_ i2=$abc$109383$new_n60162_ q=$abc$109383$new_n60167_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[17] i1=soc.cpu.minerva.gprf.mem._0_[17] q=$abc$109383$new_n60164_
+.subckt and21nor_x1 i0=$abc$109383$new_n60164_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59983_ nq=$abc$109383$new_n60165_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20139_ q=$abc$109383$new_n60166_
+.subckt or21nand_x1 i0=$abc$109383$new_n60166_ i1=$abc$109383$new_n60165_ i2=$abc$109383$new_n60162_ nq=$abc$109383$new_n60167_
 .subckt nand2_x0 i0=$abc$109383$new_n60167_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60168_
-.subckt oa22_x2 i0=$abc$109383$new_n57515_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60168_ q=$abc$109383$new_n60169_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60169_ i2=$abc$109383$new_n60161_ q=$abc$109383$new_n60170_
+.subckt or21nand_x1 i0=$abc$109383$new_n57515_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60168_ nq=$abc$109383$new_n60169_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60169_ i2=$abc$109383$new_n60161_ nq=$abc$109383$new_n60170_
 .subckt nand2_x0 i0=$abc$109383$new_n60170_ i1=$abc$109383$new_n60157_ nq=$abc$109383$new_n60171_
-.subckt a2_x2 i0=$abc$109383$new_n60171_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107730
+.subckt and2_x1 i0=$abc$109383$new_n60171_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107730
 .subckt buf_x4 i=$abc$109383$new_n30267_ q=$abc$109383$new_n60173_
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29705_ q=$abc$109383$new_n60174_
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29705_ nq=$abc$109383$new_n60174_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[18] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60175_
 .subckt nand2_x0 i0=$abc$109383$new_n60175_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60176_
 .subckt nand3_x0 i0=$abc$109383$new_n60176_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60177_
-.subckt oa22_x2 i0=$abc$109383$new_n59256_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60178_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[18] i1=soc.cpu.minerva.gprf.mem._0_[18] q=$abc$109383$new_n60179_
-.subckt ao22_x2 i0=$abc$109383$new_n60179_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60180_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20145_ q=$abc$109383$new_n60181_
-.subckt oa22_x2 i0=$abc$109383$new_n60181_ i1=$abc$109383$new_n60180_ i2=$abc$109383$new_n60178_ q=$abc$109383$new_n60182_
+.subckt or21nand_x1 i0=$abc$109383$new_n59256_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60178_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[18] i1=soc.cpu.minerva.gprf.mem._0_[18] q=$abc$109383$new_n60179_
+.subckt and21nor_x1 i0=$abc$109383$new_n60179_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60180_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20145_ q=$abc$109383$new_n60181_
+.subckt or21nand_x1 i0=$abc$109383$new_n60181_ i1=$abc$109383$new_n60180_ i2=$abc$109383$new_n60178_ nq=$abc$109383$new_n60182_
 .subckt nand2_x0 i0=$abc$109383$new_n60182_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60183_
-.subckt oa22_x2 i0=$abc$109383$new_n57539_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60183_ q=$abc$109383$new_n60184_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60184_ i2=$abc$109383$new_n60177_ q=$abc$109383$new_n60185_
+.subckt or21nand_x1 i0=$abc$109383$new_n57539_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60183_ nq=$abc$109383$new_n60184_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60184_ i2=$abc$109383$new_n60177_ nq=$abc$109383$new_n60185_
 .subckt nand2_x0 i0=$abc$109383$new_n60185_ i1=$abc$109383$new_n60174_ nq=$abc$109383$new_n60186_
-.subckt a2_x2 i0=$abc$109383$new_n60186_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107734
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29708_ q=$abc$109383$new_n60188_
+.subckt and2_x1 i0=$abc$109383$new_n60186_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107734
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29708_ nq=$abc$109383$new_n60188_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[19] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60189_
 .subckt nand2_x0 i0=$abc$109383$new_n60189_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60190_
 .subckt nand3_x0 i0=$abc$109383$new_n60190_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60191_
-.subckt a2_x2 i0=$abc$109383$new_n56751_ i1=$abc$109383$new_n56576_ q=$abc$109383$new_n60192_
-.subckt oa22_x2 i0=$abc$109383$new_n60192_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60193_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[19] i1=soc.cpu.minerva.gprf.mem._0_[19] q=$abc$109383$new_n60194_
-.subckt ao22_x2 i0=$abc$109383$new_n60194_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60195_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20151_ q=$abc$109383$new_n60196_
-.subckt oa22_x2 i0=$abc$109383$new_n60196_ i1=$abc$109383$new_n60195_ i2=$abc$109383$new_n60193_ q=$abc$109383$new_n60197_
+.subckt and2_x1 i0=$abc$109383$new_n56751_ i1=$abc$109383$new_n56576_ q=$abc$109383$new_n60192_
+.subckt or21nand_x1 i0=$abc$109383$new_n60192_ i1=$abc$109383$new_n59990_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60193_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[19] i1=soc.cpu.minerva.gprf.mem._0_[19] q=$abc$109383$new_n60194_
+.subckt and21nor_x1 i0=$abc$109383$new_n60194_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60195_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20151_ q=$abc$109383$new_n60196_
+.subckt or21nand_x1 i0=$abc$109383$new_n60196_ i1=$abc$109383$new_n60195_ i2=$abc$109383$new_n60193_ nq=$abc$109383$new_n60197_
 .subckt nand2_x0 i0=$abc$109383$new_n60197_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60198_
-.subckt oa22_x2 i0=$abc$109383$new_n57560_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60198_ q=$abc$109383$new_n60199_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60199_ i2=$abc$109383$new_n60191_ q=$abc$109383$new_n60200_
+.subckt or21nand_x1 i0=$abc$109383$new_n57560_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60198_ nq=$abc$109383$new_n60199_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60199_ i2=$abc$109383$new_n60191_ nq=$abc$109383$new_n60200_
 .subckt nand2_x0 i0=$abc$109383$new_n60200_ i1=$abc$109383$new_n60188_ nq=$abc$109383$new_n60201_
-.subckt a2_x2 i0=$abc$109383$new_n60201_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107738
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29714_ q=$abc$109383$new_n60203_
+.subckt and2_x1 i0=$abc$109383$new_n60201_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107738
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29714_ nq=$abc$109383$new_n60203_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[20] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60204_
 .subckt nand2_x0 i0=$abc$109383$new_n60204_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60205_
 .subckt nand3_x0 i0=$abc$109383$new_n60205_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n29826_ nq=$abc$109383$new_n60206_
-.subckt oa22_x2 i0=$abc$109383$new_n59311_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60207_
+.subckt or21nand_x1 i0=$abc$109383$new_n59311_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60207_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[20] nq=$abc$109383$new_n60208_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[20] nq=$abc$109383$new_n60209_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n60209_ i1=$abc$109383$new_n60208_ q=$abc$109383$new_n60210_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n60209_ i1=$abc$109383$new_n60208_ q=$abc$109383$new_n60210_
 .subckt nand2_x0 i0=$abc$109383$new_n60210_ i1=$abc$109383$new_n60149_ nq=$abc$109383$new_n60211_
-.subckt ao22_x2 i0=$abc$109383$new_n20158_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n60211_ q=$abc$109383$new_n60212_
-.subckt oa22_x2 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n60212_ i2=$abc$109383$new_n60207_ q=$abc$109383$new_n60213_
+.subckt and21nor_x1 i0=$abc$109383$new_n20158_ i1=$abc$109383$new_n59898_ i2=$abc$109383$new_n60211_ nq=$abc$109383$new_n60212_
+.subckt or21nand_x1 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n60212_ i2=$abc$109383$new_n60207_ nq=$abc$109383$new_n60213_
 .subckt nand2_x0 i0=$abc$109383$new_n60213_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60214_
-.subckt oa22_x2 i0=$abc$109383$new_n57584_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60214_ q=$abc$109383$new_n60215_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60215_ i2=$abc$109383$new_n60206_ q=$abc$109383$new_n60216_
+.subckt or21nand_x1 i0=$abc$109383$new_n57584_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60214_ nq=$abc$109383$new_n60215_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60215_ i2=$abc$109383$new_n60206_ nq=$abc$109383$new_n60216_
 .subckt nand2_x0 i0=$abc$109383$new_n60216_ i1=$abc$109383$new_n60203_ nq=$abc$109383$new_n60217_
-.subckt a2_x2 i0=$abc$109383$new_n60217_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107742
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29717_ q=$abc$109383$new_n60219_
+.subckt and2_x1 i0=$abc$109383$new_n60217_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107742
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60074_ i2=$abc$109383$new_n29717_ nq=$abc$109383$new_n60219_
 .subckt buf_x4 i=$abc$109383$new_n29825_ q=$abc$109383$new_n60220_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[21] i1=$abc$109383$new_n60076_ nq=$abc$109383$new_n60221_
 .subckt nand2_x0 i0=$abc$109383$new_n60221_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60222_
 .subckt nand3_x0 i0=$abc$109383$new_n60222_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60223_
-.subckt oa22_x2 i0=$abc$109383$new_n59341_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60224_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[21] i1=soc.cpu.minerva.gprf.mem._0_[21] q=$abc$109383$new_n60225_
-.subckt ao22_x2 i0=$abc$109383$new_n60225_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60226_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20164_ q=$abc$109383$new_n60227_
-.subckt oa22_x2 i0=$abc$109383$new_n60227_ i1=$abc$109383$new_n60226_ i2=$abc$109383$new_n60224_ q=$abc$109383$new_n60228_
+.subckt or21nand_x1 i0=$abc$109383$new_n59341_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60224_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[21] i1=soc.cpu.minerva.gprf.mem._0_[21] q=$abc$109383$new_n60225_
+.subckt and21nor_x1 i0=$abc$109383$new_n60225_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60226_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20164_ q=$abc$109383$new_n60227_
+.subckt or21nand_x1 i0=$abc$109383$new_n60227_ i1=$abc$109383$new_n60226_ i2=$abc$109383$new_n60224_ nq=$abc$109383$new_n60228_
 .subckt nand2_x0 i0=$abc$109383$new_n60228_ i1=$abc$109383$new_n60081_ nq=$abc$109383$new_n60229_
-.subckt oa22_x2 i0=$abc$109383$new_n57607_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60229_ q=$abc$109383$new_n60230_
-.subckt oa22_x2 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60230_ i2=$abc$109383$new_n60223_ q=$abc$109383$new_n60231_
+.subckt or21nand_x1 i0=$abc$109383$new_n57607_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60229_ nq=$abc$109383$new_n60230_
+.subckt or21nand_x1 i0=$abc$109383$new_n60092_ i1=$abc$109383$new_n60230_ i2=$abc$109383$new_n60223_ nq=$abc$109383$new_n60231_
 .subckt nand2_x0 i0=$abc$109383$new_n60231_ i1=$abc$109383$new_n60219_ nq=$abc$109383$new_n60232_
-.subckt a2_x2 i0=$abc$109383$new_n60232_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107746
+.subckt and2_x1 i0=$abc$109383$new_n60232_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107746
 .subckt buf_x4 i=$abc$109383$new_n29769_ q=$abc$109383$new_n60234_
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29721_ q=$abc$109383$new_n60235_
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29721_ nq=$abc$109383$new_n60235_
 .subckt buf_x4 i=$abc$109383$new_n56523_ q=$abc$109383$new_n60236_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[22] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60237_
 .subckt nand2_x0 i0=$abc$109383$new_n60237_ i1=$abc$109383$new_n60098_ nq=$abc$109383$new_n60238_
 .subckt nand3_x0 i0=$abc$109383$new_n60238_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60239_
-.subckt a3_x2 i0=$abc$109383$new_n59975_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n15410_ q=$abc$109383$new_n60240_
-.subckt mx2_x2 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[22] i1=soc.cpu.minerva.gprf.mem._0_[22] q=$abc$109383$new_n60241_
-.subckt oa22_x2 i0=$abc$109383$new_n60241_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ q=$abc$109383$new_n60242_
-.subckt oa22_x2 i0=$abc$109383$new_n20170_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n60242_ q=$abc$109383$new_n60243_
+.subckt and3_x1 i0=$abc$109383$new_n59975_ i1=$abc$109383$new_n54007_ i2=$abc$109383$new_n15410_ q=$abc$109383$new_n60240_
+.subckt mux2_x1 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[22] i1=soc.cpu.minerva.gprf.mem._0_[22] q=$abc$109383$new_n60241_
+.subckt or21nand_x1 i0=$abc$109383$new_n60241_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ nq=$abc$109383$new_n60242_
+.subckt or21nand_x1 i0=$abc$109383$new_n20170_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n60242_ nq=$abc$109383$new_n60243_
 .subckt nand2_x0 i0=$abc$109383$new_n56780_ i1=$abc$109383$new_n56577_ nq=$abc$109383$new_n60244_
 .subckt nand2_x0 i0=$abc$109383$new_n59881_ i1=$abc$109383$new_n60244_ nq=$abc$109383$new_n60245_
 .subckt nand2_x0 i0=$abc$109383$new_n60245_ i1=$abc$109383$new_n60243_ nq=$abc$109383$new_n60246_
-.subckt oa22_x2 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n60246_ i2=$abc$109383$new_n60240_ q=$abc$109383$new_n60247_
-.subckt oa22_x2 i0=$abc$109383$new_n57628_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60247_ q=$abc$109383$new_n60248_
+.subckt or21nand_x1 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n60246_ i2=$abc$109383$new_n60240_ nq=$abc$109383$new_n60247_
+.subckt or21nand_x1 i0=$abc$109383$new_n57628_ i1=$abc$109383$new_n60108_ i2=$abc$109383$new_n60247_ nq=$abc$109383$new_n60248_
 .subckt buf_x4 i=$abc$109383$new_n60091_ q=$abc$109383$new_n60249_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60248_ i2=$abc$109383$new_n60239_ q=$abc$109383$new_n60250_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60248_ i2=$abc$109383$new_n60239_ nq=$abc$109383$new_n60250_
 .subckt nand2_x0 i0=$abc$109383$new_n60250_ i1=$abc$109383$new_n60235_ nq=$abc$109383$new_n60251_
-.subckt a2_x2 i0=$abc$109383$new_n60251_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107750
+.subckt and2_x1 i0=$abc$109383$new_n60251_ i1=$abc$109383$new_n60096_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107750
 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n60253_
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29724_ q=$abc$109383$new_n60254_
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29724_ nq=$abc$109383$new_n60254_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[23] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60255_
 .subckt nand2_x0 i0=$abc$109383$new_n60255_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60256_
 .subckt nand3_x0 i0=$abc$109383$new_n60256_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60257_
-.subckt mx2_x2 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[23] i1=soc.cpu.minerva.gprf.mem._0_[23] q=$abc$109383$new_n60258_
-.subckt oa22_x2 i0=$abc$109383$new_n60258_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ q=$abc$109383$new_n60259_
-.subckt oa22_x2 i0=$abc$109383$new_n20176_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n60259_ q=$abc$109383$new_n60260_
+.subckt mux2_x1 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[23] i1=soc.cpu.minerva.gprf.mem._0_[23] q=$abc$109383$new_n60258_
+.subckt or21nand_x1 i0=$abc$109383$new_n60258_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ nq=$abc$109383$new_n60259_
+.subckt or21nand_x1 i0=$abc$109383$new_n20176_ i1=$abc$109383$new_n60008_ i2=$abc$109383$new_n60259_ nq=$abc$109383$new_n60260_
 .subckt nand2_x0 i0=$abc$109383$new_n56790_ i1=$abc$109383$new_n56577_ nq=$abc$109383$new_n60261_
 .subckt nand2_x0 i0=$abc$109383$new_n59881_ i1=$abc$109383$new_n60261_ nq=$abc$109383$new_n60262_
 .subckt nand2_x0 i0=$abc$109383$new_n60262_ i1=$abc$109383$new_n60260_ nq=$abc$109383$new_n60263_
-.subckt oa22_x2 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n60263_ i2=$abc$109383$new_n60240_ q=$abc$109383$new_n60264_
-.subckt oa22_x2 i0=$abc$109383$new_n57650_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60264_ q=$abc$109383$new_n60265_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60265_ i2=$abc$109383$new_n60257_ q=$abc$109383$new_n60266_
+.subckt or21nand_x1 i0=$abc$109383$new_n59910_ i1=$abc$109383$new_n60263_ i2=$abc$109383$new_n60240_ nq=$abc$109383$new_n60264_
+.subckt or21nand_x1 i0=$abc$109383$new_n57650_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60264_ nq=$abc$109383$new_n60265_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60265_ i2=$abc$109383$new_n60257_ nq=$abc$109383$new_n60266_
 .subckt nand2_x0 i0=$abc$109383$new_n60266_ i1=$abc$109383$new_n60254_ nq=$abc$109383$new_n60267_
-.subckt a2_x2 i0=$abc$109383$new_n60267_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107754
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29732_ q=$abc$109383$new_n60269_
+.subckt and2_x1 i0=$abc$109383$new_n60267_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107754
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29732_ nq=$abc$109383$new_n60269_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[24] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60270_
 .subckt nand2_x0 i0=$abc$109383$new_n60270_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60271_
 .subckt nand3_x0 i0=$abc$109383$new_n60271_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60272_
-.subckt oa22_x2 i0=$abc$109383$new_n59421_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60273_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[24] i1=soc.cpu.minerva.gprf.mem._0_[24] q=$abc$109383$new_n60274_
-.subckt ao22_x2 i0=$abc$109383$new_n60274_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60275_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20182_ q=$abc$109383$new_n60276_
-.subckt oa22_x2 i0=$abc$109383$new_n60276_ i1=$abc$109383$new_n60275_ i2=$abc$109383$new_n60273_ q=$abc$109383$new_n60277_
+.subckt or21nand_x1 i0=$abc$109383$new_n59421_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60273_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[24] i1=soc.cpu.minerva.gprf.mem._0_[24] q=$abc$109383$new_n60274_
+.subckt and21nor_x1 i0=$abc$109383$new_n60274_ i1=$abc$109383$new_n60084_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60275_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20182_ q=$abc$109383$new_n60276_
+.subckt or21nand_x1 i0=$abc$109383$new_n60276_ i1=$abc$109383$new_n60275_ i2=$abc$109383$new_n60273_ nq=$abc$109383$new_n60277_
 .subckt nand2_x0 i0=$abc$109383$new_n60277_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60278_
-.subckt oa22_x2 i0=$abc$109383$new_n57673_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60278_ q=$abc$109383$new_n60279_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60279_ i2=$abc$109383$new_n60272_ q=$abc$109383$new_n60280_
+.subckt or21nand_x1 i0=$abc$109383$new_n57673_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60278_ nq=$abc$109383$new_n60279_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60279_ i2=$abc$109383$new_n60272_ nq=$abc$109383$new_n60280_
 .subckt nand2_x0 i0=$abc$109383$new_n60280_ i1=$abc$109383$new_n60269_ nq=$abc$109383$new_n60281_
-.subckt a2_x2 i0=$abc$109383$new_n60281_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107758
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29735_ q=$abc$109383$new_n60283_
+.subckt and2_x1 i0=$abc$109383$new_n60281_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107758
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29735_ nq=$abc$109383$new_n60283_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[25] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60284_
 .subckt nand2_x0 i0=$abc$109383$new_n60284_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60285_
 .subckt nand3_x0 i0=$abc$109383$new_n60285_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60286_
-.subckt oa22_x2 i0=$abc$109383$new_n59445_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ q=$abc$109383$new_n60287_
+.subckt or21nand_x1 i0=$abc$109383$new_n59445_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n60117_ nq=$abc$109383$new_n60287_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem._0_[25] nq=$abc$109383$new_n60288_
 .subckt inv_x0 i=soc.cpu.minerva.gprf.mem.fwd_wp_data[25] nq=$abc$109383$new_n60289_
-.subckt mx2_x2 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n60289_ i1=$abc$109383$new_n60288_ q=$abc$109383$new_n60290_
+.subckt mux2_x1 cmd=$abc$109383$new_n59979_ i0=$abc$109383$new_n60289_ i1=$abc$109383$new_n60288_ q=$abc$109383$new_n60290_
 .subckt nand2_x0 i0=$abc$109383$new_n60290_ i1=$abc$109383$new_n60149_ nq=$abc$109383$new_n60291_
-.subckt ao22_x2 i0=$abc$109383$new_n20188_ i1=$abc$109383$new_n60149_ i2=$abc$109383$new_n60291_ q=$abc$109383$new_n60292_
-.subckt oa22_x2 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n60292_ i2=$abc$109383$new_n60287_ q=$abc$109383$new_n60293_
+.subckt and21nor_x1 i0=$abc$109383$new_n20188_ i1=$abc$109383$new_n60149_ i2=$abc$109383$new_n60291_ nq=$abc$109383$new_n60292_
+.subckt or21nand_x1 i0=$abc$109383$new_n59907_ i1=$abc$109383$new_n60292_ i2=$abc$109383$new_n60287_ nq=$abc$109383$new_n60293_
 .subckt nand2_x0 i0=$abc$109383$new_n60293_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60294_
-.subckt oa22_x2 i0=$abc$109383$new_n57695_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60294_ q=$abc$109383$new_n60295_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60295_ i2=$abc$109383$new_n60286_ q=$abc$109383$new_n60296_
+.subckt or21nand_x1 i0=$abc$109383$new_n57695_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60294_ nq=$abc$109383$new_n60295_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60295_ i2=$abc$109383$new_n60286_ nq=$abc$109383$new_n60296_
 .subckt nand2_x0 i0=$abc$109383$new_n60296_ i1=$abc$109383$new_n60283_ nq=$abc$109383$new_n60297_
-.subckt a2_x2 i0=$abc$109383$new_n60297_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107762
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29739_ q=$abc$109383$new_n60299_
+.subckt and2_x1 i0=$abc$109383$new_n60297_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107762
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29739_ nq=$abc$109383$new_n60299_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[26] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60300_
 .subckt nand2_x0 i0=$abc$109383$new_n60300_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60301_
 .subckt nand3_x0 i0=$abc$109383$new_n60301_ i1=$abc$109383$new_n60158_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60302_
-.subckt a2_x2 i0=$abc$109383$new_n56817_ i1=$abc$109383$new_n56576_ q=$abc$109383$new_n60303_
-.subckt oa22_x2 i0=$abc$109383$new_n60303_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ q=$abc$109383$new_n60304_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[26] i1=soc.cpu.minerva.gprf.mem._0_[26] q=$abc$109383$new_n60305_
-.subckt ao22_x2 i0=$abc$109383$new_n60305_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60306_
-.subckt o2_x2 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20194_ q=$abc$109383$new_n60307_
-.subckt oa22_x2 i0=$abc$109383$new_n60307_ i1=$abc$109383$new_n60306_ i2=$abc$109383$new_n60304_ q=$abc$109383$new_n60308_
+.subckt and2_x1 i0=$abc$109383$new_n56817_ i1=$abc$109383$new_n56576_ q=$abc$109383$new_n60303_
+.subckt or21nand_x1 i0=$abc$109383$new_n60303_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ nq=$abc$109383$new_n60304_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[26] i1=soc.cpu.minerva.gprf.mem._0_[26] q=$abc$109383$new_n60305_
+.subckt and21nor_x1 i0=$abc$109383$new_n60305_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60306_
+.subckt or2_x1 i0=$abc$109383$new_n60149_ i1=$abc$109383$new_n20194_ q=$abc$109383$new_n60307_
+.subckt or21nand_x1 i0=$abc$109383$new_n60307_ i1=$abc$109383$new_n60306_ i2=$abc$109383$new_n60304_ nq=$abc$109383$new_n60308_
 .subckt nand2_x0 i0=$abc$109383$new_n60308_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60309_
-.subckt oa22_x2 i0=$abc$109383$new_n57717_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60309_ q=$abc$109383$new_n60310_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60310_ i2=$abc$109383$new_n60302_ q=$abc$109383$new_n60311_
+.subckt or21nand_x1 i0=$abc$109383$new_n57717_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60309_ nq=$abc$109383$new_n60310_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60310_ i2=$abc$109383$new_n60302_ nq=$abc$109383$new_n60311_
 .subckt nand2_x0 i0=$abc$109383$new_n60311_ i1=$abc$109383$new_n60299_ nq=$abc$109383$new_n60312_
-.subckt a2_x2 i0=$abc$109383$new_n60312_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107766
-.subckt oa22_x2 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29742_ q=$abc$109383$new_n60314_
+.subckt and2_x1 i0=$abc$109383$new_n60312_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107766
+.subckt or21nand_x1 i0=$abc$109383$new_n60173_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29742_ nq=$abc$109383$new_n60314_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[27] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60315_
 .subckt nand2_x0 i0=$abc$109383$new_n60315_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60316_
 .subckt nand3_x0 i0=$abc$109383$new_n60316_ i1=$abc$109383$new_n53210_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60317_
 .subckt nand2_x0 i0=$abc$109383$new_n56826_ i1=$abc$109383$new_n56577_ nq=$abc$109383$new_n60318_
 .subckt nand2_x0 i0=$abc$109383$new_n59990_ i1=$abc$109383$new_n60318_ nq=$abc$109383$new_n60319_
-.subckt mx2_x2 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[27] i1=soc.cpu.minerva.gprf.mem._0_[27] q=$abc$109383$new_n60320_
-.subckt oa22_x2 i0=$abc$109383$new_n60320_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ q=$abc$109383$new_n60321_
-.subckt oa22_x2 i0=$abc$109383$new_n20200_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n60321_ q=$abc$109383$new_n60322_
-.subckt oa22_x2 i0=$abc$109383$new_n60322_ i1=$abc$109383$new_n60319_ i2=$abc$109383$new_n59879_ q=$abc$109383$new_n60323_
+.subckt mux2_x1 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[27] i1=soc.cpu.minerva.gprf.mem._0_[27] q=$abc$109383$new_n60320_
+.subckt or21nand_x1 i0=$abc$109383$new_n60320_ i1=$abc$109383$new_n59897_ i2=$abc$109383$new_n59880_ nq=$abc$109383$new_n60321_
+.subckt or21nand_x1 i0=$abc$109383$new_n20200_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n60321_ nq=$abc$109383$new_n60322_
+.subckt or21nand_x1 i0=$abc$109383$new_n60322_ i1=$abc$109383$new_n60319_ i2=$abc$109383$new_n59879_ nq=$abc$109383$new_n60323_
 .subckt nand2_x0 i0=$abc$109383$new_n60323_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60324_
-.subckt oa22_x2 i0=$abc$109383$new_n57739_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60324_ q=$abc$109383$new_n60325_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60325_ i2=$abc$109383$new_n60317_ q=$abc$109383$new_n60326_
+.subckt or21nand_x1 i0=$abc$109383$new_n57739_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60324_ nq=$abc$109383$new_n60325_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60325_ i2=$abc$109383$new_n60317_ nq=$abc$109383$new_n60326_
 .subckt nand2_x0 i0=$abc$109383$new_n60326_ i1=$abc$109383$new_n60314_ nq=$abc$109383$new_n60327_
-.subckt a2_x2 i0=$abc$109383$new_n60327_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107770
-.subckt oa22_x2 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29747_ q=$abc$109383$new_n60329_
+.subckt and2_x1 i0=$abc$109383$new_n60327_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107770
+.subckt or21nand_x1 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29747_ nq=$abc$109383$new_n60329_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[28] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60330_
 .subckt nand2_x0 i0=$abc$109383$new_n60330_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60331_
 .subckt nand3_x0 i0=$abc$109383$new_n60331_ i1=$abc$109383$new_n53210_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60332_
-.subckt oa22_x2 i0=$abc$109383$new_n59519_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ q=$abc$109383$new_n60333_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[28] i1=soc.cpu.minerva.gprf.mem._0_[28] q=$abc$109383$new_n60334_
-.subckt ao22_x2 i0=$abc$109383$new_n60334_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60335_
-.subckt o2_x2 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20206_ q=$abc$109383$new_n60336_
-.subckt oa22_x2 i0=$abc$109383$new_n60336_ i1=$abc$109383$new_n60335_ i2=$abc$109383$new_n60333_ q=$abc$109383$new_n60337_
+.subckt or21nand_x1 i0=$abc$109383$new_n59519_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ nq=$abc$109383$new_n60333_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[28] i1=soc.cpu.minerva.gprf.mem._0_[28] q=$abc$109383$new_n60334_
+.subckt and21nor_x1 i0=$abc$109383$new_n60334_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60335_
+.subckt or2_x1 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20206_ q=$abc$109383$new_n60336_
+.subckt or21nand_x1 i0=$abc$109383$new_n60336_ i1=$abc$109383$new_n60335_ i2=$abc$109383$new_n60333_ nq=$abc$109383$new_n60337_
 .subckt nand2_x0 i0=$abc$109383$new_n60337_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60338_
-.subckt oa22_x2 i0=$abc$109383$new_n57761_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60338_ q=$abc$109383$new_n60339_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60339_ i2=$abc$109383$new_n60332_ q=$abc$109383$new_n60340_
+.subckt or21nand_x1 i0=$abc$109383$new_n57761_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60338_ nq=$abc$109383$new_n60339_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60339_ i2=$abc$109383$new_n60332_ nq=$abc$109383$new_n60340_
 .subckt nand2_x0 i0=$abc$109383$new_n60340_ i1=$abc$109383$new_n60329_ nq=$abc$109383$new_n60341_
-.subckt a2_x2 i0=$abc$109383$new_n60341_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107774
-.subckt oa22_x2 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29750_ q=$abc$109383$new_n60343_
+.subckt and2_x1 i0=$abc$109383$new_n60341_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107774
+.subckt or21nand_x1 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29750_ nq=$abc$109383$new_n60343_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[29] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60344_
 .subckt nand2_x0 i0=$abc$109383$new_n60344_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60345_
 .subckt nand3_x0 i0=$abc$109383$new_n60345_ i1=$abc$109383$new_n53210_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60346_
-.subckt oa22_x2 i0=$abc$109383$new_n59544_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ q=$abc$109383$new_n60347_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[29] i1=soc.cpu.minerva.gprf.mem._0_[29] q=$abc$109383$new_n60348_
-.subckt ao22_x2 i0=$abc$109383$new_n60348_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60349_
-.subckt o2_x2 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20212_ q=$abc$109383$new_n60350_
-.subckt oa22_x2 i0=$abc$109383$new_n60350_ i1=$abc$109383$new_n60349_ i2=$abc$109383$new_n60347_ q=$abc$109383$new_n60351_
+.subckt or21nand_x1 i0=$abc$109383$new_n59544_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ nq=$abc$109383$new_n60347_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[29] i1=soc.cpu.minerva.gprf.mem._0_[29] q=$abc$109383$new_n60348_
+.subckt and21nor_x1 i0=$abc$109383$new_n60348_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60349_
+.subckt or2_x1 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20212_ q=$abc$109383$new_n60350_
+.subckt or21nand_x1 i0=$abc$109383$new_n60350_ i1=$abc$109383$new_n60349_ i2=$abc$109383$new_n60347_ nq=$abc$109383$new_n60351_
 .subckt nand2_x0 i0=$abc$109383$new_n60351_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60352_
-.subckt oa22_x2 i0=$abc$109383$new_n57783_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60352_ q=$abc$109383$new_n60353_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60353_ i2=$abc$109383$new_n60346_ q=$abc$109383$new_n60354_
+.subckt or21nand_x1 i0=$abc$109383$new_n57783_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60352_ nq=$abc$109383$new_n60353_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60353_ i2=$abc$109383$new_n60346_ nq=$abc$109383$new_n60354_
 .subckt nand2_x0 i0=$abc$109383$new_n60354_ i1=$abc$109383$new_n60343_ nq=$abc$109383$new_n60355_
-.subckt a2_x2 i0=$abc$109383$new_n60355_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107778
-.subckt oa22_x2 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29754_ q=$abc$109383$new_n60357_
+.subckt and2_x1 i0=$abc$109383$new_n60355_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107778
+.subckt or21nand_x1 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29754_ nq=$abc$109383$new_n60357_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[30] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60358_
 .subckt nand2_x0 i0=$abc$109383$new_n60358_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60359_
 .subckt nand3_x0 i0=$abc$109383$new_n60359_ i1=$abc$109383$new_n53210_ i2=$abc$109383$new_n60220_ nq=$abc$109383$new_n60360_
-.subckt oa22_x2 i0=$abc$109383$new_n59569_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ q=$abc$109383$new_n60361_
-.subckt mx2_x2 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[30] i1=soc.cpu.minerva.gprf.mem._0_[30] q=$abc$109383$new_n60362_
-.subckt ao22_x2 i0=$abc$109383$new_n60362_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60363_
-.subckt o2_x2 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20218_ q=$abc$109383$new_n60364_
-.subckt oa22_x2 i0=$abc$109383$new_n60364_ i1=$abc$109383$new_n60363_ i2=$abc$109383$new_n60361_ q=$abc$109383$new_n60365_
+.subckt or21nand_x1 i0=$abc$109383$new_n59569_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ nq=$abc$109383$new_n60361_
+.subckt mux2_x1 cmd=$abc$109383$new_n60163_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[30] i1=soc.cpu.minerva.gprf.mem._0_[30] q=$abc$109383$new_n60362_
+.subckt and21nor_x1 i0=$abc$109383$new_n60362_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60363_
+.subckt or2_x1 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20218_ q=$abc$109383$new_n60364_
+.subckt or21nand_x1 i0=$abc$109383$new_n60364_ i1=$abc$109383$new_n60363_ i2=$abc$109383$new_n60361_ nq=$abc$109383$new_n60365_
 .subckt nand2_x0 i0=$abc$109383$new_n60365_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60366_
-.subckt oa22_x2 i0=$abc$109383$new_n57805_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60366_ q=$abc$109383$new_n60367_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60367_ i2=$abc$109383$new_n60360_ q=$abc$109383$new_n60368_
+.subckt or21nand_x1 i0=$abc$109383$new_n57805_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60366_ nq=$abc$109383$new_n60367_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60367_ i2=$abc$109383$new_n60360_ nq=$abc$109383$new_n60368_
 .subckt nand2_x0 i0=$abc$109383$new_n60368_ i1=$abc$109383$new_n60357_ nq=$abc$109383$new_n60369_
-.subckt a2_x2 i0=$abc$109383$new_n60369_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107782
-.subckt oa22_x2 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29756_ q=$abc$109383$new_n60371_
+.subckt and2_x1 i0=$abc$109383$new_n60369_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107782
+.subckt or21nand_x1 i0=$abc$109383$new_n30288_ i1=$abc$109383$new_n60234_ i2=$abc$109383$new_n29756_ nq=$abc$109383$new_n60371_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__pc$27[31] i1=$abc$109383$new_n60236_ nq=$abc$109383$new_n60372_
 .subckt nand2_x0 i0=$abc$109383$new_n60372_ i1=$abc$109383$new_n59958_ nq=$abc$109383$new_n60373_
 .subckt nand3_x0 i0=$abc$109383$new_n60373_ i1=$abc$109383$new_n53210_ i2=$abc$109383$new_n58834_ nq=$abc$109383$new_n60374_
-.subckt oa22_x2 i0=$abc$109383$new_n59599_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ q=$abc$109383$new_n60375_
-.subckt mx2_x2 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[31] i1=soc.cpu.minerva.gprf.mem._0_[31] q=$abc$109383$new_n60376_
-.subckt ao22_x2 i0=$abc$109383$new_n60376_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ q=$abc$109383$new_n60377_
-.subckt o2_x2 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20224_ q=$abc$109383$new_n60378_
-.subckt oa22_x2 i0=$abc$109383$new_n60378_ i1=$abc$109383$new_n60377_ i2=$abc$109383$new_n60375_ q=$abc$109383$new_n60379_
+.subckt or21nand_x1 i0=$abc$109383$new_n59599_ i1=$abc$109383$new_n59977_ i2=$abc$109383$new_n59878_ nq=$abc$109383$new_n60375_
+.subckt mux2_x1 cmd=$abc$109383$new_n59900_ i0=soc.cpu.minerva.gprf.mem.fwd_wp_data[31] i1=soc.cpu.minerva.gprf.mem._0_[31] q=$abc$109383$new_n60376_
+.subckt and21nor_x1 i0=$abc$109383$new_n60376_ i1=$abc$109383$new_n59893_ i2=$abc$109383$new_n59906_ nq=$abc$109383$new_n60377_
+.subckt or2_x1 i0=$abc$109383$new_n59897_ i1=$abc$109383$new_n20224_ q=$abc$109383$new_n60378_
+.subckt or21nand_x1 i0=$abc$109383$new_n60378_ i1=$abc$109383$new_n60377_ i2=$abc$109383$new_n60375_ nq=$abc$109383$new_n60379_
 .subckt nand2_x0 i0=$abc$109383$new_n60379_ i1=$abc$109383$new_n60080_ nq=$abc$109383$new_n60380_
-.subckt oa22_x2 i0=$abc$109383$new_n57827_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60380_ q=$abc$109383$new_n60381_
-.subckt oa22_x2 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60381_ i2=$abc$109383$new_n60374_ q=$abc$109383$new_n60382_
+.subckt or21nand_x1 i0=$abc$109383$new_n57827_ i1=$abc$109383$new_n59960_ i2=$abc$109383$new_n60380_ nq=$abc$109383$new_n60381_
+.subckt or21nand_x1 i0=$abc$109383$new_n60249_ i1=$abc$109383$new_n60381_ i2=$abc$109383$new_n60374_ nq=$abc$109383$new_n60382_
 .subckt nand2_x0 i0=$abc$109383$new_n60382_ i1=$abc$109383$new_n60371_ nq=$abc$109383$new_n60383_
-.subckt a2_x2 i0=$abc$109383$new_n60383_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107786
-.subckt a2_x2 i0=$abc$109383$new_n15274_ i1=$abc$109383$new_n15330_ q=$abc$109383$new_n60385_
-.subckt a4_x2 i0=$abc$109383$new_n58845_ i1=$abc$109383$new_n58671_ i2=$abc$109383$new_n15350_ i3=$abc$109383$new_n60385_ q=$abc$109383$new_n60386_
-.subckt a3_x2 i0=$abc$109383$new_n60386_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60387_
+.subckt and2_x1 i0=$abc$109383$new_n60383_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107786
+.subckt and2_x1 i0=$abc$109383$new_n15274_ i1=$abc$109383$new_n15330_ q=$abc$109383$new_n60385_
+.subckt and4_x1 i0=$abc$109383$new_n58845_ i1=$abc$109383$new_n58671_ i2=$abc$109383$new_n15350_ i3=$abc$109383$new_n60385_ q=$abc$109383$new_n60386_
+.subckt and3_x1 i0=$abc$109383$new_n60386_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60387_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60388_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__mret$69 q=$abc$109383$new_n60389_
-.subckt ao22_x2 i0=$abc$109383$new_n60389_ i1=$abc$109383$new_n60387_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107790
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__ebreak$68 q=$abc$109383$new_n60391_
-.subckt a2_x2 i0=$abc$109383$new_n58539_ i1=$abc$109383$new_n58517_ q=$abc$109383$new_n60392_
-.subckt a4_x2 i0=$abc$109383$new_n60392_ i1=$abc$109383$new_n58672_ i2=$abc$109383$new_n15350_ i3=$abc$109383$new_n60385_ q=$abc$109383$new_n60393_
-.subckt a3_x2 i0=$abc$109383$new_n60393_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n60394_
-.subckt ao22_x2 i0=$abc$109383$new_n60394_ i1=$abc$109383$new_n60391_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107794
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__ecall$67 q=$abc$109383$new_n60396_
-.subckt a4_x2 i0=$abc$109383$new_n60392_ i1=$abc$109383$new_n58840_ i2=$abc$109383$new_n15350_ i3=$abc$109383$new_n60385_ q=$abc$109383$new_n60397_
-.subckt a3_x2 i0=$abc$109383$new_n60397_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n60398_
-.subckt ao22_x2 i0=$abc$109383$new_n60398_ i1=$abc$109383$new_n60396_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107798
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__mret$69 nq=$abc$109383$new_n60389_
+.subckt and21nor_x1 i0=$abc$109383$new_n60389_ i1=$abc$109383$new_n60387_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107790
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__ebreak$68 nq=$abc$109383$new_n60391_
+.subckt and2_x1 i0=$abc$109383$new_n58539_ i1=$abc$109383$new_n58517_ q=$abc$109383$new_n60392_
+.subckt and4_x1 i0=$abc$109383$new_n60392_ i1=$abc$109383$new_n58672_ i2=$abc$109383$new_n15350_ i3=$abc$109383$new_n60385_ q=$abc$109383$new_n60393_
+.subckt and3_x1 i0=$abc$109383$new_n60393_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n60394_
+.subckt and21nor_x1 i0=$abc$109383$new_n60394_ i1=$abc$109383$new_n60391_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107794
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__ecall$67 nq=$abc$109383$new_n60396_
+.subckt and4_x1 i0=$abc$109383$new_n60392_ i1=$abc$109383$new_n58840_ i2=$abc$109383$new_n15350_ i3=$abc$109383$new_n60385_ q=$abc$109383$new_n60397_
+.subckt and3_x1 i0=$abc$109383$new_n60397_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n30266_ q=$abc$109383$new_n60398_
+.subckt and21nor_x1 i0=$abc$109383$new_n60398_ i1=$abc$109383$new_n60396_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107798
 .subckt nand4_x0 i0=$abc$109383$new_n59975_ i1=$abc$109383$new_n30156_ i2=$abc$109383$new_n33877_ i3=$abc$109383$new_n30273_ nq=$abc$109383$new_n60400_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_we$66 q=$abc$109383$new_n60401_
-.subckt a3_x2 i0=$abc$109383$new_n60401_ i1=$abc$109383$new_n60400_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107802
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n58624_ i2=$abc$109383$new_n30271_ q=$abc$109383$new_n60403_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__branch_target$62[0] q=$abc$109383$new_n60404_
-.subckt ao22_x2 i0=$abc$109383$new_n60404_ i1=$abc$109383$new_n60403_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107806
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n15473_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60406_
-.subckt ao22_x2 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__branch_target$62[1] q=$abc$109383$new_n60407_
-.subckt ao22_x2 i0=$abc$109383$new_n60407_ i1=$abc$109383$new_n60406_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107810
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n53262_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60409_
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_we$66 nq=$abc$109383$new_n60401_
+.subckt and3_x1 i0=$abc$109383$new_n60401_ i1=$abc$109383$new_n60400_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107802
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n58624_ i2=$abc$109383$new_n30271_ q=$abc$109383$new_n60403_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__branch_target$62[0] nq=$abc$109383$new_n60404_
+.subckt and21nor_x1 i0=$abc$109383$new_n60404_ i1=$abc$109383$new_n60403_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107806
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n15473_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60406_
+.subckt and21nor_x1 i0=$abc$109383$new_n59632_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__branch_target$62[1] nq=$abc$109383$new_n60407_
+.subckt and21nor_x1 i0=$abc$109383$new_n60407_ i1=$abc$109383$new_n60406_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107810
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n53262_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60409_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n60410_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__csr_adr$65[2] q=$abc$109383$new_n60411_
-.subckt ao22_x2 i0=$abc$109383$new_n60411_ i1=$abc$109383$new_n60409_ i2=$abc$109383$new_n59729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107814
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__csr_adr$65[2] nq=$abc$109383$new_n60411_
+.subckt and21nor_x1 i0=$abc$109383$new_n60411_ i1=$abc$109383$new_n60409_ i2=$abc$109383$new_n59729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107814
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n60413_
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n53294_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60414_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__csr_adr$65[3] q=$abc$109383$new_n60415_
-.subckt ao22_x2 i0=$abc$109383$new_n60415_ i1=$abc$109383$new_n60414_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107818
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n53294_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60414_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__csr_adr$65[3] nq=$abc$109383$new_n60415_
+.subckt and21nor_x1 i0=$abc$109383$new_n60415_ i1=$abc$109383$new_n60414_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107818
 .subckt nand3_x0 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n15319_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n60417_
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[4] q=$abc$109383$new_n60418_
-.subckt a3_x2 i0=$abc$109383$new_n60418_ i1=$abc$109383$new_n60417_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107822
-.subckt ao22_x2 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n42784_ i2=$abc$109383$new_n15322_ q=$abc$109383$new_n60420_
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[4] nq=$abc$109383$new_n60418_
+.subckt and3_x1 i0=$abc$109383$new_n60418_ i1=$abc$109383$new_n60417_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107822
+.subckt and21nor_x1 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n42784_ i2=$abc$109383$new_n15322_ nq=$abc$109383$new_n60420_
 .subckt nand2_x0 i0=$abc$109383$new_n53920_ i1=$abc$109383$new_n56524_ nq=$abc$109383$new_n60421_
 .subckt nand3_x0 i0=$abc$109383$new_n54018_ i1=$abc$109383$new_n60421_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n60422_
 .subckt nand2_x0 i0=$abc$109383$new_n60422_ i1=$abc$109383$new_n27432_ nq=$abc$109383$new_n60423_
 .subckt nor2_x0 i0=$abc$109383$new_n60423_ i1=$abc$109383$new_n60420_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107826
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[6] q=$abc$109383$new_n60425_
-.subckt a3_x2 i0=$abc$109383$new_n60425_ i1=$abc$109383$new_n58868_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107830
-.subckt oa22_x2 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[7] q=$abc$109383$new_n60427_
-.subckt a3_x2 i0=$abc$109383$new_n60427_ i1=$abc$109383$new_n58907_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107834
-.subckt ao22_x2 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n42784_ i2=$abc$109383$new_n58037_ q=$abc$109383$new_n60429_
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[6] nq=$abc$109383$new_n60425_
+.subckt and3_x1 i0=$abc$109383$new_n60425_ i1=$abc$109383$new_n58868_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107830
+.subckt or21nand_x1 i0=$abc$109383$new_n30173_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[7] nq=$abc$109383$new_n60427_
+.subckt and3_x1 i0=$abc$109383$new_n60427_ i1=$abc$109383$new_n58907_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107834
+.subckt and21nor_x1 i0=$abc$109383$new_n30152_ i1=$abc$109383$new_n42784_ i2=$abc$109383$new_n58037_ nq=$abc$109383$new_n60429_
 .subckt nand2_x0 i0=$abc$109383$new_n53920_ i1=$abc$109383$new_n53915_ nq=$abc$109383$new_n60430_
 .subckt nand3_x0 i0=$abc$109383$new_n30138_ i1=$abc$109383$new_n60430_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n60431_
 .subckt nand2_x0 i0=$abc$109383$new_n60431_ i1=$abc$109383$new_n27432_ nq=$abc$109383$new_n60432_
 .subckt nor2_x0 i0=$abc$109383$new_n60432_ i1=$abc$109383$new_n60429_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107838
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[9] q=$abc$109383$new_n60434_
-.subckt a3_x2 i0=$abc$109383$new_n60434_ i1=$abc$109383$new_n58946_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107842
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[10] q=$abc$109383$new_n60436_
-.subckt a3_x2 i0=$abc$109383$new_n60436_ i1=$abc$109383$new_n59006_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107846
-.subckt mx2_x2 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53484_ i1=soc.cpu.minerva.payload__csr_adr$65[11] q=$abc$109383$new_n60438_
-.subckt a2_x2 i0=$abc$109383$new_n60438_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107850
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[9] nq=$abc$109383$new_n60434_
+.subckt and3_x1 i0=$abc$109383$new_n60434_ i1=$abc$109383$new_n58946_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107842
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__csr_adr$65[10] nq=$abc$109383$new_n60436_
+.subckt and3_x1 i0=$abc$109383$new_n60436_ i1=$abc$109383$new_n59006_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107846
+.subckt mux2_x1 cmd=$abc$109383$new_n53353_ i0=$abc$109383$new_n53484_ i1=soc.cpu.minerva.payload__csr_adr$65[11] q=$abc$109383$new_n60438_
+.subckt and2_x1 i0=$abc$109383$new_n60438_ i1=$abc$109383$new_n60253_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107850
 .subckt nand3_x0 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n58747_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n60440_
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=$abc$109383$new_n57185_ q=$abc$109383$new_n60441_
-.subckt a3_x2 i0=$abc$109383$new_n60441_ i1=$abc$109383$new_n60440_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107854
-.subckt a2_x2 i0=$abc$109383$new_n15268_ i1=$abc$109383$new_n15266_ q=$abc$109383$new_n60443_
-.subckt a2_x2 i0=$abc$109383$new_n30291_ i1=$abc$109383$new_n60443_ q=$abc$109383$new_n60444_
-.subckt a3_x2 i0=$abc$109383$new_n60444_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60445_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=$abc$109383$new_n53238_ q=$abc$109383$new_n60446_
-.subckt ao22_x2 i0=$abc$109383$new_n60446_ i1=$abc$109383$new_n60445_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107858
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=$abc$109383$new_n57185_ nq=$abc$109383$new_n60441_
+.subckt and3_x1 i0=$abc$109383$new_n60441_ i1=$abc$109383$new_n60440_ i2=$abc$109383$new_n55109_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107854
+.subckt and2_x1 i0=$abc$109383$new_n15268_ i1=$abc$109383$new_n15266_ q=$abc$109383$new_n60443_
+.subckt and2_x1 i0=$abc$109383$new_n30291_ i1=$abc$109383$new_n60443_ q=$abc$109383$new_n60444_
+.subckt and3_x1 i0=$abc$109383$new_n60444_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n59616_ q=$abc$109383$new_n60445_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=$abc$109383$new_n53238_ nq=$abc$109383$new_n60446_
+.subckt and21nor_x1 i0=$abc$109383$new_n60446_ i1=$abc$109383$new_n60445_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107858
 .subckt buf_x4 i=$abc$109383$new_n27603_ q=$abc$109383$new_n60448_
 .subckt nand3_x0 i0=$abc$109383$new_n56521_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n60449_
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__branch$61 q=$abc$109383$new_n60450_
-.subckt a3_x2 i0=$abc$109383$new_n60450_ i1=$abc$109383$new_n60449_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107862
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=$abc$109383$new_n58062_ q=$abc$109383$new_n60452_
-.subckt a3_x2 i0=$abc$109383$new_n15294_ i1=$abc$109383$new_n15329_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n60453_
-.subckt a2_x2 i0=$abc$109383$new_n15276_ i1=$abc$109383$new_n15265_ q=$abc$109383$new_n60454_
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n56536_ i2=soc.cpu.minerva.payload__branch$61 nq=$abc$109383$new_n60450_
+.subckt and3_x1 i0=$abc$109383$new_n60450_ i1=$abc$109383$new_n60449_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107862
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=$abc$109383$new_n58062_ nq=$abc$109383$new_n60452_
+.subckt and3_x1 i0=$abc$109383$new_n15294_ i1=$abc$109383$new_n15329_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n60453_
+.subckt and2_x1 i0=$abc$109383$new_n15276_ i1=$abc$109383$new_n15265_ q=$abc$109383$new_n60454_
 .subckt nand3_x0 i0=$abc$109383$new_n15350_ i1=$abc$109383$new_n60454_ i2=$abc$109383$new_n60453_ nq=$abc$109383$new_n60455_
 .subckt nand2_x0 i0=$abc$109383$new_n60455_ i1=$abc$109383$new_n15410_ nq=$abc$109383$new_n60456_
-.subckt a3_x2 i0=$abc$109383$new_n60456_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60457_
-.subckt ao22_x2 i0=$abc$109383$new_n60457_ i1=$abc$109383$new_n60452_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107866
-.subckt a3_x2 i0=$abc$109383$new_n56531_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n54000_ q=$abc$109383$new_n60459_
-.subckt a3_x2 i0=$abc$109383$new_n60459_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n60460_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__sext$58 q=$abc$109383$new_n60461_
-.subckt ao22_x2 i0=$abc$109383$new_n60461_ i1=$abc$109383$new_n60460_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107870
+.subckt and3_x1 i0=$abc$109383$new_n60456_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60457_
+.subckt and21nor_x1 i0=$abc$109383$new_n60457_ i1=$abc$109383$new_n60452_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107866
+.subckt and3_x1 i0=$abc$109383$new_n56531_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n54000_ q=$abc$109383$new_n60459_
+.subckt and3_x1 i0=$abc$109383$new_n60459_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n60460_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__sext$58 nq=$abc$109383$new_n60461_
+.subckt and21nor_x1 i0=$abc$109383$new_n60461_ i1=$abc$109383$new_n60460_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107870
 .subckt nand3_x0 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ i2=$abc$109383$new_n15349_ nq=$abc$109383$new_n60463_
 .subckt nand3_x0 i0=$abc$109383$new_n60463_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40104_ nq=$abc$109383$new_n60464_
-.subckt oa22_x2 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n29408_ q=$abc$109383$new_n60465_
-.subckt a2_x2 i0=$abc$109383$new_n60465_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60466_
-.subckt a2_x2 i0=$abc$109383$new_n60466_ i1=$abc$109383$new_n60464_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107874
-.subckt a2_x2 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ q=$abc$109383$new_n60468_
-.subckt a2_x2 i0=$abc$109383$new_n56526_ i1=$abc$109383$new_n56525_ q=$abc$109383$new_n60469_
-.subckt a4_x2 i0=$abc$109383$new_n56531_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n54000_ i3=$abc$109383$new_n15349_ q=$abc$109383$new_n60470_
-.subckt ao22_x2 i0=$abc$109383$new_n60470_ i1=$abc$109383$new_n60469_ i2=$abc$109383$new_n60468_ q=$abc$109383$new_n60471_
+.subckt or21nand_x1 i0=$abc$109383$new_n58625_ i1=$abc$109383$new_n40103_ i2=$abc$109383$new_n29408_ nq=$abc$109383$new_n60465_
+.subckt and2_x1 i0=$abc$109383$new_n60465_ i1=$abc$109383$new_n59854_ q=$abc$109383$new_n60466_
+.subckt and2_x1 i0=$abc$109383$new_n60466_ i1=$abc$109383$new_n60464_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107874
+.subckt and2_x1 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ q=$abc$109383$new_n60468_
+.subckt and2_x1 i0=$abc$109383$new_n56526_ i1=$abc$109383$new_n56525_ q=$abc$109383$new_n60469_
+.subckt and4_x1 i0=$abc$109383$new_n56531_ i1=$abc$109383$new_n56525_ i2=$abc$109383$new_n54000_ i3=$abc$109383$new_n15349_ q=$abc$109383$new_n60470_
+.subckt and21nor_x1 i0=$abc$109383$new_n60470_ i1=$abc$109383$new_n60469_ i2=$abc$109383$new_n60468_ nq=$abc$109383$new_n60471_
 .subckt nand2_x0 i0=$abc$109383$new_n60471_ i1=$abc$109383$new_n56522_ nq=$abc$109383$new_n60472_
 .subckt nand3_x0 i0=$abc$109383$new_n60472_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n60473_
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__shift$56 q=$abc$109383$new_n60474_
-.subckt a3_x2 i0=$abc$109383$new_n60474_ i1=$abc$109383$new_n60473_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107878
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__shift$56 nq=$abc$109383$new_n60474_
+.subckt and3_x1 i0=$abc$109383$new_n60474_ i1=$abc$109383$new_n60473_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107878
 .subckt nand2_x0 i0=$abc$109383$new_n15300_ i1=$abc$109383$new_n15346_ nq=$abc$109383$new_n60476_
-.subckt o4_x2 i0=$abc$109383$new_n53915_ i1=$abc$109383$new_n15467_ i2=$abc$109383$new_n53859_ i3=$abc$109383$new_n56524_ q=$abc$109383$new_n60477_
-.subckt o3_x2 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n54000_ i2=$abc$109383$new_n15263_ q=$abc$109383$new_n60478_
-.subckt ao22_x2 i0=$abc$109383$new_n60478_ i1=$abc$109383$new_n60477_ i2=$abc$109383$new_n15329_ q=$abc$109383$new_n60479_
-.subckt oa22_x2 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ i2=$abc$109383$new_n30289_ q=$abc$109383$new_n60480_
+.subckt or4_x1 i0=$abc$109383$new_n53915_ i1=$abc$109383$new_n15467_ i2=$abc$109383$new_n53859_ i3=$abc$109383$new_n56524_ q=$abc$109383$new_n60477_
+.subckt or3_x1 i0=$abc$109383$new_n52651_ i1=$abc$109383$new_n54000_ i2=$abc$109383$new_n15263_ q=$abc$109383$new_n60478_
+.subckt and21nor_x1 i0=$abc$109383$new_n60478_ i1=$abc$109383$new_n60477_ i2=$abc$109383$new_n15329_ nq=$abc$109383$new_n60479_
+.subckt or21nand_x1 i0=$abc$109383$new_n30274_ i1=$abc$109383$new_n30290_ i2=$abc$109383$new_n30289_ nq=$abc$109383$new_n60480_
 .subckt nor3_x0 i0=$abc$109383$new_n60480_ i1=$abc$109383$new_n60479_ i2=$abc$109383$new_n60476_ nq=$abc$109383$new_n60481_
-.subckt a3_x2 i0=$abc$109383$new_n60481_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n60482_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=$abc$109383$new_n57108_ q=$abc$109383$new_n60483_
-.subckt ao22_x2 i0=$abc$109383$new_n60483_ i1=$abc$109383$new_n60482_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107882
+.subckt and3_x1 i0=$abc$109383$new_n60481_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n60482_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=$abc$109383$new_n57108_ nq=$abc$109383$new_n60483_
+.subckt and21nor_x1 i0=$abc$109383$new_n60483_ i1=$abc$109383$new_n60482_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107882
 .subckt nand3_x0 i0=$abc$109383$new_n56528_ i1=$abc$109383$new_n54018_ i2=$abc$109383$new_n40817_ nq=$abc$109383$new_n60485_
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__compare$60 q=$abc$109383$new_n60486_
-.subckt a3_x2 i0=$abc$109383$new_n60486_ i1=$abc$109383$new_n60485_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107886
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__store$51 q=$abc$109383$new_n60488_
-.subckt a3_x2 i0=$abc$109383$new_n60488_ i1=$abc$109383$new_n58866_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107890
-.subckt o2_x2 i0=$abc$109383$new_n15346_ i1=$abc$109383$new_n15329_ q=$abc$109383$new_n60490_
-.subckt ao22_x2 i0=$abc$109383$new_n15349_ i1=soc.cpu.minerva.payload__instruction$28[12] i2=$abc$109383$new_n30273_ q=$abc$109383$new_n60491_
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__compare$60 nq=$abc$109383$new_n60486_
+.subckt and3_x1 i0=$abc$109383$new_n60486_ i1=$abc$109383$new_n60485_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107886
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__store$51 nq=$abc$109383$new_n60488_
+.subckt and3_x1 i0=$abc$109383$new_n60488_ i1=$abc$109383$new_n58866_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107890
+.subckt or2_x1 i0=$abc$109383$new_n15346_ i1=$abc$109383$new_n15329_ q=$abc$109383$new_n60490_
+.subckt and21nor_x1 i0=$abc$109383$new_n15349_ i1=soc.cpu.minerva.payload__instruction$28[12] i2=$abc$109383$new_n30273_ nq=$abc$109383$new_n60491_
 .subckt nor3_x0 i0=$abc$109383$new_n60491_ i1=$abc$109383$new_n58526_ i2=$abc$109383$new_n60490_ nq=$abc$109383$new_n60492_
-.subckt a3_x2 i0=$abc$109383$new_n60492_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n60493_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__load$50 q=$abc$109383$new_n60494_
-.subckt ao22_x2 i0=$abc$109383$new_n60494_ i1=$abc$109383$new_n60493_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107894
-.subckt a4_x2 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ i3=$abc$109383$new_n15349_ q=$abc$109383$new_n60496_
-.subckt a2_x2 i0=$abc$109383$new_n60471_ i1=$abc$109383$new_n56522_ q=$abc$109383$new_n60497_
+.subckt and3_x1 i0=$abc$109383$new_n60492_ i1=$abc$109383$new_n30142_ i2=$abc$109383$new_n58068_ q=$abc$109383$new_n60493_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__load$50 nq=$abc$109383$new_n60494_
+.subckt and21nor_x1 i0=$abc$109383$new_n60494_ i1=$abc$109383$new_n60493_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107894
+.subckt and4_x1 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ i3=$abc$109383$new_n15349_ q=$abc$109383$new_n60496_
+.subckt and2_x1 i0=$abc$109383$new_n60471_ i1=$abc$109383$new_n56522_ q=$abc$109383$new_n60497_
 .subckt nor2_x0 i0=$abc$109383$new_n60497_ i1=$abc$109383$new_n60496_ nq=$abc$109383$new_n60498_
 .subckt nand4_x0 i0=$abc$109383$new_n60498_ i1=$abc$109383$new_n56528_ i2=$abc$109383$new_n30138_ i3=$abc$109383$new_n40817_ nq=$abc$109383$new_n60499_
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__bypass_m$48 q=$abc$109383$new_n60500_
-.subckt a3_x2 i0=$abc$109383$new_n60500_ i1=$abc$109383$new_n60499_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107898
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__bypass_x$47 q=$abc$109383$new_n60502_
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__bypass_m$48 nq=$abc$109383$new_n60500_
+.subckt and3_x1 i0=$abc$109383$new_n60500_ i1=$abc$109383$new_n60499_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107898
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=soc.cpu.minerva.payload__bypass_x$47 nq=$abc$109383$new_n60502_
 .subckt nor3_x0 i0=$abc$109383$new_n56532_ i1=$abc$109383$new_n56530_ i2=$abc$109383$new_n56529_ nq=$abc$109383$new_n60503_
-.subckt mx2_x2 cmd=$abc$109383$new_n30273_ i0=soc.cpu.minerva.payload__instruction$28[12] i1=$abc$109383$new_n30289_ q=$abc$109383$new_n60504_
+.subckt mux2_x1 cmd=$abc$109383$new_n30273_ i0=soc.cpu.minerva.payload__instruction$28[12] i1=$abc$109383$new_n30289_ q=$abc$109383$new_n60504_
 .subckt nor3_x0 i0=$abc$109383$new_n60504_ i1=$abc$109383$new_n60479_ i2=$abc$109383$new_n60476_ nq=$abc$109383$new_n60505_
-.subckt o4_x2 i0=$abc$109383$new_n60505_ i1=$abc$109383$new_n60503_ i2=$abc$109383$new_n58669_ i3=$abc$109383$new_n53970_ q=$abc$109383$new_n60506_
-.subckt a3_x2 i0=$abc$109383$new_n60506_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60507_
-.subckt ao22_x2 i0=$abc$109383$new_n60507_ i1=$abc$109383$new_n60502_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107902
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=$abc$109383$new_n58063_ q=$abc$109383$new_n60509_
-.subckt a2_x2 i0=$abc$109383$new_n54007_ i1=$abc$109383$new_n15410_ q=$abc$109383$new_n60510_
-.subckt a3_x2 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n60510_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60511_
-.subckt ao22_x2 i0=$abc$109383$new_n60511_ i1=$abc$109383$new_n60509_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107906
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__rd_we$42 q=$abc$109383$new_n60513_
-.subckt a3_x2 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n15282_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60514_
-.subckt ao22_x2 i0=$abc$109383$new_n60514_ i1=$abc$109383$new_n60513_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107910
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__illegal$39 q=$abc$109383$new_n60516_
+.subckt or4_x1 i0=$abc$109383$new_n60505_ i1=$abc$109383$new_n60503_ i2=$abc$109383$new_n58669_ i3=$abc$109383$new_n53970_ q=$abc$109383$new_n60506_
+.subckt and3_x1 i0=$abc$109383$new_n60506_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60507_
+.subckt and21nor_x1 i0=$abc$109383$new_n60507_ i1=$abc$109383$new_n60502_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107902
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n58512_ i2=$abc$109383$new_n58063_ nq=$abc$109383$new_n60509_
+.subckt and2_x1 i0=$abc$109383$new_n54007_ i1=$abc$109383$new_n15410_ q=$abc$109383$new_n60510_
+.subckt and3_x1 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n60510_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60511_
+.subckt and21nor_x1 i0=$abc$109383$new_n60511_ i1=$abc$109383$new_n60509_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107906
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__rd_we$42 nq=$abc$109383$new_n60513_
+.subckt and3_x1 i0=$abc$109383$new_n30268_ i1=$abc$109383$new_n15282_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60514_
+.subckt and21nor_x1 i0=$abc$109383$new_n60514_ i1=$abc$109383$new_n60513_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107910
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__illegal$39 nq=$abc$109383$new_n60516_
 .subckt nand2_x0 i0=soc.cpu.minerva.payload__instruction$28[1] i1=soc.cpu.minerva.payload__instruction$28[0] nq=$abc$109383$new_n60517_
-.subckt a2_x2 i0=$abc$109383$new_n60455_ i1=$abc$109383$new_n15410_ q=$abc$109383$new_n60518_
+.subckt and2_x1 i0=$abc$109383$new_n60455_ i1=$abc$109383$new_n15410_ q=$abc$109383$new_n60518_
 .subckt nand3_x0 i0=$abc$109383$new_n58517_ i1=$abc$109383$new_n58516_ i2=$abc$109383$new_n58514_ nq=$abc$109383$new_n60519_
 .subckt nand3_x0 i0=$abc$109383$new_n15350_ i1=$abc$109383$new_n15274_ i2=$abc$109383$new_n15330_ nq=$abc$109383$new_n60520_
 .subckt nand2_x0 i0=$abc$109383$new_n58845_ i1=$abc$109383$new_n58547_ nq=$abc$109383$new_n60521_
-.subckt ao22_x2 i0=$abc$109383$new_n60521_ i1=$abc$109383$new_n60520_ i2=$abc$109383$new_n60519_ q=$abc$109383$new_n60522_
-.subckt o3_x2 i0=$abc$109383$new_n60491_ i1=$abc$109383$new_n58526_ i2=$abc$109383$new_n60490_ q=$abc$109383$new_n60523_
+.subckt and21nor_x1 i0=$abc$109383$new_n60521_ i1=$abc$109383$new_n60520_ i2=$abc$109383$new_n60519_ nq=$abc$109383$new_n60522_
+.subckt or3_x1 i0=$abc$109383$new_n60491_ i1=$abc$109383$new_n58526_ i2=$abc$109383$new_n60490_ q=$abc$109383$new_n60523_
 .subckt nand3_x0 i0=soc.cpu.minerva.payload__instruction$28[12] i1=$abc$109383$new_n30290_ i2=$abc$109383$new_n30289_ nq=$abc$109383$new_n60524_
-.subckt ao22_x2 i0=$abc$109383$new_n15269_ i1=$abc$109383$new_n60524_ i2=$abc$109383$new_n60523_ q=$abc$109383$new_n60525_
-.subckt a3_x2 i0=$abc$109383$new_n60525_ i1=$abc$109383$new_n58527_ i2=$abc$109383$new_n56521_ q=$abc$109383$new_n60526_
-.subckt a4_x2 i0=$abc$109383$new_n60526_ i1=$abc$109383$new_n60522_ i2=$abc$109383$new_n60518_ i3=$abc$109383$new_n56528_ q=$abc$109383$new_n60527_
+.subckt and21nor_x1 i0=$abc$109383$new_n15269_ i1=$abc$109383$new_n60524_ i2=$abc$109383$new_n60523_ nq=$abc$109383$new_n60525_
+.subckt and3_x1 i0=$abc$109383$new_n60525_ i1=$abc$109383$new_n58527_ i2=$abc$109383$new_n56521_ q=$abc$109383$new_n60526_
+.subckt and4_x1 i0=$abc$109383$new_n60526_ i1=$abc$109383$new_n60522_ i2=$abc$109383$new_n60518_ i3=$abc$109383$new_n56528_ q=$abc$109383$new_n60527_
 .subckt nor2_x0 i0=$abc$109383$new_n60470_ i1=$abc$109383$new_n60469_ nq=$abc$109383$new_n60528_
 .subckt nand4_x0 i0=$abc$109383$new_n15300_ i1=$abc$109383$new_n30274_ i2=$abc$109383$new_n30290_ i3=$abc$109383$new_n15346_ nq=$abc$109383$new_n60529_
-.subckt o2_x2 i0=$abc$109383$new_n60529_ i1=$abc$109383$new_n60528_ q=$abc$109383$new_n60530_
-.subckt a3_x2 i0=$abc$109383$new_n15350_ i1=$abc$109383$new_n15274_ i2=$abc$109383$new_n15330_ q=$abc$109383$new_n60531_
+.subckt or2_x1 i0=$abc$109383$new_n60529_ i1=$abc$109383$new_n60528_ q=$abc$109383$new_n60530_
+.subckt and3_x1 i0=$abc$109383$new_n15350_ i1=$abc$109383$new_n15274_ i2=$abc$109383$new_n15330_ q=$abc$109383$new_n60531_
 .subckt nand4_x0 i0=$abc$109383$new_n60392_ i1=$abc$109383$new_n60531_ i2=$abc$109383$new_n59019_ i3=$abc$109383$new_n15332_ nq=$abc$109383$new_n60532_
-.subckt a2_x2 i0=$abc$109383$new_n60532_ i1=$abc$109383$new_n60530_ q=$abc$109383$new_n60533_
-.subckt a2_x2 i0=$abc$109383$new_n60533_ i1=$abc$109383$new_n60527_ q=$abc$109383$new_n60534_
+.subckt and2_x1 i0=$abc$109383$new_n60532_ i1=$abc$109383$new_n60530_ q=$abc$109383$new_n60533_
+.subckt and2_x1 i0=$abc$109383$new_n60533_ i1=$abc$109383$new_n60527_ q=$abc$109383$new_n60534_
 .subckt nor4_x0 i0=$abc$109383$new_n60505_ i1=$abc$109383$new_n60503_ i2=$abc$109383$new_n58669_ i3=$abc$109383$new_n53970_ nq=$abc$109383$new_n60535_
-.subckt oa22_x2 i0=$abc$109383$new_n60535_ i1=$abc$109383$new_n60534_ i2=$abc$109383$new_n60517_ q=$abc$109383$new_n60536_
-.subckt a3_x2 i0=$abc$109383$new_n60536_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60537_
-.subckt ao22_x2 i0=$abc$109383$new_n60537_ i1=$abc$109383$new_n60516_ i2=$abc$109383$new_n60413_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107914
+.subckt or21nand_x1 i0=$abc$109383$new_n60535_ i1=$abc$109383$new_n60534_ i2=$abc$109383$new_n60517_ nq=$abc$109383$new_n60536_
+.subckt and3_x1 i0=$abc$109383$new_n60536_ i1=$abc$109383$new_n56424_ i2=$abc$109383$new_n53208_ q=$abc$109383$new_n60537_
+.subckt and21nor_x1 i0=$abc$109383$new_n60537_ i1=$abc$109383$new_n60516_ i2=$abc$109383$new_n60413_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107914
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n60539_
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__instruction$28[0] q=$abc$109383$new_n60540_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__instruction$34[0] q=$abc$109383$new_n60541_
-.subckt ao22_x2 i0=$abc$109383$new_n60541_ i1=$abc$109383$new_n60540_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107918
-.subckt a3_x2 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__instruction$28[1] q=$abc$109383$new_n60543_
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__instruction$28[0] q=$abc$109383$new_n60540_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60388_ i2=soc.cpu.minerva.payload__instruction$34[0] nq=$abc$109383$new_n60541_
+.subckt and21nor_x1 i0=$abc$109383$new_n60541_ i1=$abc$109383$new_n60540_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107918
+.subckt and3_x1 i0=$abc$109383$new_n30249_ i1=$abc$109383$new_n30238_ i2=soc.cpu.minerva.payload__instruction$28[1] q=$abc$109383$new_n60543_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60544_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[1] q=$abc$109383$new_n60545_
-.subckt ao22_x2 i0=$abc$109383$new_n60545_ i1=$abc$109383$new_n60543_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107922
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[1] nq=$abc$109383$new_n60545_
+.subckt and21nor_x1 i0=$abc$109383$new_n60545_ i1=$abc$109383$new_n60543_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107922
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n60547_
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n30238_ i2=$abc$109383$new_n15265_ q=$abc$109383$new_n60548_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[2] q=$abc$109383$new_n60549_
-.subckt ao22_x2 i0=$abc$109383$new_n60549_ i1=$abc$109383$new_n60548_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107926
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n30238_ i2=$abc$109383$new_n15265_ q=$abc$109383$new_n60548_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[2] nq=$abc$109383$new_n60549_
+.subckt and21nor_x1 i0=$abc$109383$new_n60549_ i1=$abc$109383$new_n60548_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107926
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n60551_
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[3] q=$abc$109383$new_n60552_
-.subckt ao22_x2 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[3] q=$abc$109383$new_n60553_
-.subckt ao22_x2 i0=$abc$109383$new_n60553_ i1=$abc$109383$new_n60552_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107930
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n15346_ q=$abc$109383$new_n60555_
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[3] q=$abc$109383$new_n60552_
+.subckt and21nor_x1 i0=$abc$109383$new_n60410_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[3] nq=$abc$109383$new_n60553_
+.subckt and21nor_x1 i0=$abc$109383$new_n60553_ i1=$abc$109383$new_n60552_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107930
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n15346_ q=$abc$109383$new_n60555_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n60556_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[4] q=$abc$109383$new_n60557_
-.subckt ao22_x2 i0=$abc$109383$new_n60557_ i1=$abc$109383$new_n60555_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107934
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[4] nq=$abc$109383$new_n60557_
+.subckt and21nor_x1 i0=$abc$109383$new_n60557_ i1=$abc$109383$new_n60555_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107934
 .subckt nand3_x0 i0=$abc$109383$new_n30156_ i1=$abc$109383$new_n33877_ i2=$abc$109383$new_n59939_ nq=$abc$109383$new_n60559_
-.subckt oa22_x2 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__instruction$34[5] q=$abc$109383$new_n60560_
-.subckt a3_x2 i0=$abc$109383$new_n60560_ i1=$abc$109383$new_n60559_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107938
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n60562_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[6] q=$abc$109383$new_n60563_
-.subckt ao22_x2 i0=$abc$109383$new_n60563_ i1=$abc$109383$new_n60562_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107942
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[7] q=$abc$109383$new_n60565_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[7] q=$abc$109383$new_n60566_
-.subckt ao22_x2 i0=$abc$109383$new_n60566_ i1=$abc$109383$new_n60565_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107946
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[8] q=$abc$109383$new_n60568_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[8] q=$abc$109383$new_n60569_
-.subckt ao22_x2 i0=$abc$109383$new_n60569_ i1=$abc$109383$new_n60568_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107950
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[9] q=$abc$109383$new_n60571_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[9] q=$abc$109383$new_n60572_
-.subckt ao22_x2 i0=$abc$109383$new_n60572_ i1=$abc$109383$new_n60571_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107954
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[10] q=$abc$109383$new_n60574_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[10] q=$abc$109383$new_n60575_
-.subckt ao22_x2 i0=$abc$109383$new_n60575_ i1=$abc$109383$new_n60574_ i2=$abc$109383$new_n60539_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107958
+.subckt or21nand_x1 i0=$abc$109383$new_n58828_ i1=$abc$109383$new_n29770_ i2=soc.cpu.minerva.payload__instruction$34[5] nq=$abc$109383$new_n60560_
+.subckt and3_x1 i0=$abc$109383$new_n60560_ i1=$abc$109383$new_n60559_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107938
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n60562_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[6] nq=$abc$109383$new_n60563_
+.subckt and21nor_x1 i0=$abc$109383$new_n60563_ i1=$abc$109383$new_n60562_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107942
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[7] q=$abc$109383$new_n60565_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[7] nq=$abc$109383$new_n60566_
+.subckt and21nor_x1 i0=$abc$109383$new_n60566_ i1=$abc$109383$new_n60565_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107946
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[8] q=$abc$109383$new_n60568_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[8] nq=$abc$109383$new_n60569_
+.subckt and21nor_x1 i0=$abc$109383$new_n60569_ i1=$abc$109383$new_n60568_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107950
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[9] q=$abc$109383$new_n60571_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[9] nq=$abc$109383$new_n60572_
+.subckt and21nor_x1 i0=$abc$109383$new_n60572_ i1=$abc$109383$new_n60571_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107954
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[10] q=$abc$109383$new_n60574_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[10] nq=$abc$109383$new_n60575_
+.subckt and21nor_x1 i0=$abc$109383$new_n60575_ i1=$abc$109383$new_n60574_ i2=$abc$109383$new_n60539_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107958
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n60577_
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[11] q=$abc$109383$new_n60578_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[11] q=$abc$109383$new_n60579_
-.subckt ao22_x2 i0=$abc$109383$new_n60579_ i1=$abc$109383$new_n60578_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107962
-.subckt a3_x2 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n30274_ q=$abc$109383$new_n60581_
+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=soc.cpu.minerva.payload__instruction$28[11] q=$abc$109383$new_n60578_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60544_ i2=soc.cpu.minerva.payload__instruction$34[11] nq=$abc$109383$new_n60579_
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+.subckt and3_x1 i0=$abc$109383$new_n60547_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n30274_ q=$abc$109383$new_n60581_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60582_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60582_ i2=$abc$109383$new_n52349_ q=$abc$109383$new_n60583_
-.subckt ao22_x2 i0=$abc$109383$new_n60583_ i1=$abc$109383$new_n60581_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107966
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 .subckt buf_x4 i=$abc$109383$new_n56302_ q=$abc$109383$new_n60585_
-.subckt mx2_x2 cmd=$abc$109383$new_n56434_ i0=$abc$109383$new_n52331_ i1=$abc$109383$new_n30273_ q=$abc$109383$new_n60586_
-.subckt a2_x2 i0=$abc$109383$new_n60586_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107970
+.subckt mux2_x1 cmd=$abc$109383$new_n56434_ i0=$abc$109383$new_n52331_ i1=$abc$109383$new_n30273_ q=$abc$109383$new_n60586_
+.subckt and2_x1 i0=$abc$109383$new_n60586_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107970
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n60588_
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n15349_ q=$abc$109383$new_n60589_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60582_ i2=$abc$109383$new_n55110_ q=$abc$109383$new_n60590_
-.subckt ao22_x2 i0=$abc$109383$new_n60590_ i1=$abc$109383$new_n60589_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107974
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60551_ i2=$abc$109383$new_n15349_ q=$abc$109383$new_n60589_
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 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n60592_
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[15] q=$abc$109383$new_n60593_
-.subckt ao22_x2 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[15] q=$abc$109383$new_n60594_
-.subckt ao22_x2 i0=$abc$109383$new_n60594_ i1=$abc$109383$new_n60593_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107978
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[16] q=$abc$109383$new_n60596_
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[15] q=$abc$109383$new_n60593_
+.subckt and21nor_x1 i0=$abc$109383$new_n60556_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[15] nq=$abc$109383$new_n60594_
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+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[16] q=$abc$109383$new_n60596_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n60597_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[16] q=$abc$109383$new_n60598_
-.subckt ao22_x2 i0=$abc$109383$new_n60598_ i1=$abc$109383$new_n60596_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107982
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[17] q=$abc$109383$new_n60600_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[17] q=$abc$109383$new_n60601_
-.subckt ao22_x2 i0=$abc$109383$new_n60601_ i1=$abc$109383$new_n60600_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107986
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[18] q=$abc$109383$new_n60603_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[18] q=$abc$109383$new_n60604_
-.subckt ao22_x2 i0=$abc$109383$new_n60604_ i1=$abc$109383$new_n60603_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107990
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[19] q=$abc$109383$new_n60606_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[19] q=$abc$109383$new_n60607_
-.subckt ao22_x2 i0=$abc$109383$new_n60607_ i1=$abc$109383$new_n60606_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107994
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n18217_ q=$abc$109383$new_n60609_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[20] q=$abc$109383$new_n60610_
-.subckt ao22_x2 i0=$abc$109383$new_n60610_ i1=$abc$109383$new_n60609_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$107998
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n17576_ q=$abc$109383$new_n60612_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[21] q=$abc$109383$new_n60613_
-.subckt ao22_x2 i0=$abc$109383$new_n60613_ i1=$abc$109383$new_n60612_ i2=$abc$109383$new_n60577_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108002
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[16] nq=$abc$109383$new_n60598_
+.subckt and21nor_x1 i0=$abc$109383$new_n60598_ i1=$abc$109383$new_n60596_ i2=$abc$109383$new_n60577_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107982
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[17] q=$abc$109383$new_n60600_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[17] nq=$abc$109383$new_n60601_
+.subckt and21nor_x1 i0=$abc$109383$new_n60601_ i1=$abc$109383$new_n60600_ i2=$abc$109383$new_n60577_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107986
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[18] q=$abc$109383$new_n60603_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[18] nq=$abc$109383$new_n60604_
+.subckt and21nor_x1 i0=$abc$109383$new_n60604_ i1=$abc$109383$new_n60603_ i2=$abc$109383$new_n60577_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107990
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=soc.cpu.minerva.payload__instruction$28[19] q=$abc$109383$new_n60606_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[19] nq=$abc$109383$new_n60607_
+.subckt and21nor_x1 i0=$abc$109383$new_n60607_ i1=$abc$109383$new_n60606_ i2=$abc$109383$new_n60577_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107994
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n18217_ q=$abc$109383$new_n60609_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[20] nq=$abc$109383$new_n60610_
+.subckt and21nor_x1 i0=$abc$109383$new_n60610_ i1=$abc$109383$new_n60609_ i2=$abc$109383$new_n60577_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$107998
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n17576_ q=$abc$109383$new_n60612_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[21] nq=$abc$109383$new_n60613_
+.subckt and21nor_x1 i0=$abc$109383$new_n60613_ i1=$abc$109383$new_n60612_ i2=$abc$109383$new_n60577_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108002
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n60615_
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n17628_ q=$abc$109383$new_n60616_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[22] q=$abc$109383$new_n60617_
-.subckt ao22_x2 i0=$abc$109383$new_n60617_ i1=$abc$109383$new_n60616_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108006
-.subckt a3_x2 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n15384_ q=$abc$109383$new_n60619_
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n17628_ q=$abc$109383$new_n60616_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60582_ i2=soc.cpu.minerva.payload__instruction$34[22] nq=$abc$109383$new_n60617_
+.subckt and21nor_x1 i0=$abc$109383$new_n60617_ i1=$abc$109383$new_n60616_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108006
+.subckt and3_x1 i0=$abc$109383$new_n60588_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n15384_ q=$abc$109383$new_n60619_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60620_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[23] q=$abc$109383$new_n60621_
-.subckt ao22_x2 i0=$abc$109383$new_n60621_ i1=$abc$109383$new_n60619_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108010
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[23] nq=$abc$109383$new_n60621_
+.subckt and21nor_x1 i0=$abc$109383$new_n60621_ i1=$abc$109383$new_n60619_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108010
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n60623_
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n15495_ q=$abc$109383$new_n60624_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[24] q=$abc$109383$new_n60625_
-.subckt ao22_x2 i0=$abc$109383$new_n60625_ i1=$abc$109383$new_n60624_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108014
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60592_ i2=$abc$109383$new_n15495_ q=$abc$109383$new_n60624_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[24] nq=$abc$109383$new_n60625_
+.subckt and21nor_x1 i0=$abc$109383$new_n60625_ i1=$abc$109383$new_n60624_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108014
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n60627_
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n56524_ q=$abc$109383$new_n60628_
-.subckt ao22_x2 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[25] q=$abc$109383$new_n60629_
-.subckt ao22_x2 i0=$abc$109383$new_n60629_ i1=$abc$109383$new_n60628_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108018
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n53859_ q=$abc$109383$new_n60631_
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n56524_ q=$abc$109383$new_n60628_
+.subckt and21nor_x1 i0=$abc$109383$new_n60597_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[25] nq=$abc$109383$new_n60629_
+.subckt and21nor_x1 i0=$abc$109383$new_n60629_ i1=$abc$109383$new_n60628_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108018
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n53859_ q=$abc$109383$new_n60631_
 .subckt buf_x4 i=$abc$109383$new_n30192_ q=$abc$109383$new_n60632_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[26] q=$abc$109383$new_n60633_
-.subckt ao22_x2 i0=$abc$109383$new_n60633_ i1=$abc$109383$new_n60631_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108022
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n15467_ q=$abc$109383$new_n60635_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[27] q=$abc$109383$new_n60636_
-.subckt ao22_x2 i0=$abc$109383$new_n60636_ i1=$abc$109383$new_n60635_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108026
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n53915_ q=$abc$109383$new_n60638_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[28] q=$abc$109383$new_n60639_
-.subckt ao22_x2 i0=$abc$109383$new_n60639_ i1=$abc$109383$new_n60638_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108030
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n15263_ q=$abc$109383$new_n60641_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[29] q=$abc$109383$new_n60642_
-.subckt ao22_x2 i0=$abc$109383$new_n60642_ i1=$abc$109383$new_n60641_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108034
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n54000_ q=$abc$109383$new_n60644_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[30] q=$abc$109383$new_n60645_
-.subckt ao22_x2 i0=$abc$109383$new_n60645_ i1=$abc$109383$new_n60644_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108038
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n52651_ q=$abc$109383$new_n60647_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[31] q=$abc$109383$new_n60648_
-.subckt ao22_x2 i0=$abc$109383$new_n60648_ i1=$abc$109383$new_n60647_ i2=$abc$109383$new_n60615_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108042
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[26] nq=$abc$109383$new_n60633_
+.subckt and21nor_x1 i0=$abc$109383$new_n60633_ i1=$abc$109383$new_n60631_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108022
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n15467_ q=$abc$109383$new_n60635_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[27] nq=$abc$109383$new_n60636_
+.subckt and21nor_x1 i0=$abc$109383$new_n60636_ i1=$abc$109383$new_n60635_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108026
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n53915_ q=$abc$109383$new_n60638_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[28] nq=$abc$109383$new_n60639_
+.subckt and21nor_x1 i0=$abc$109383$new_n60639_ i1=$abc$109383$new_n60638_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108030
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n15263_ q=$abc$109383$new_n60641_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[29] nq=$abc$109383$new_n60642_
+.subckt and21nor_x1 i0=$abc$109383$new_n60642_ i1=$abc$109383$new_n60641_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108034
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n54000_ q=$abc$109383$new_n60644_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[30] nq=$abc$109383$new_n60645_
+.subckt and21nor_x1 i0=$abc$109383$new_n60645_ i1=$abc$109383$new_n60644_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108038
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=$abc$109383$new_n52651_ q=$abc$109383$new_n60647_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$34[31] nq=$abc$109383$new_n60648_
+.subckt and21nor_x1 i0=$abc$109383$new_n60648_ i1=$abc$109383$new_n60647_ i2=$abc$109383$new_n60615_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108042
 .subckt buf_x4 i=$abc$109383$new_n58381_ q=$abc$109383$new_n60650_
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=soc.cpu.minerva.fetch.ibus_rdata[0] q=$abc$109383$new_n60651_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$28[0] q=$abc$109383$new_n60652_
-.subckt ao22_x2 i0=$abc$109383$new_n60652_ i1=$abc$109383$new_n60651_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108062
-.subckt a3_x2 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=soc.cpu.minerva.fetch.ibus_rdata[1] q=$abc$109383$new_n60654_
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=soc.cpu.minerva.fetch.ibus_rdata[0] q=$abc$109383$new_n60651_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60620_ i2=soc.cpu.minerva.payload__instruction$28[0] nq=$abc$109383$new_n60652_
+.subckt and21nor_x1 i0=$abc$109383$new_n60652_ i1=$abc$109383$new_n60651_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108062
+.subckt and3_x1 i0=$abc$109383$new_n60623_ i1=$abc$109383$new_n60627_ i2=soc.cpu.minerva.fetch.ibus_rdata[1] q=$abc$109383$new_n60654_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60655_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[1] q=$abc$109383$new_n60656_
-.subckt ao22_x2 i0=$abc$109383$new_n60656_ i1=$abc$109383$new_n60654_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108066
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[1] nq=$abc$109383$new_n60656_
+.subckt and21nor_x1 i0=$abc$109383$new_n60656_ i1=$abc$109383$new_n60654_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108066
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n60658_
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60627_ i2=soc.cpu.minerva.fetch.ibus_rdata[2] q=$abc$109383$new_n60659_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15265_ q=$abc$109383$new_n60660_
-.subckt ao22_x2 i0=$abc$109383$new_n60660_ i1=$abc$109383$new_n60659_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108070
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60627_ i2=soc.cpu.minerva.fetch.ibus_rdata[2] q=$abc$109383$new_n60659_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15265_ nq=$abc$109383$new_n60660_
+.subckt and21nor_x1 i0=$abc$109383$new_n60660_ i1=$abc$109383$new_n60659_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108070
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n60662_
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[3] q=$abc$109383$new_n60663_
-.subckt ao22_x2 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[3] q=$abc$109383$new_n60664_
-.subckt ao22_x2 i0=$abc$109383$new_n60664_ i1=$abc$109383$new_n60663_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108074
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[4] q=$abc$109383$new_n60666_
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[3] q=$abc$109383$new_n60663_
+.subckt and21nor_x1 i0=$abc$109383$new_n60632_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[3] nq=$abc$109383$new_n60664_
+.subckt and21nor_x1 i0=$abc$109383$new_n60664_ i1=$abc$109383$new_n60663_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108074
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[4] q=$abc$109383$new_n60666_
 .subckt buf_x4 i=$abc$109383$new_n17849_ q=$abc$109383$new_n60667_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15346_ q=$abc$109383$new_n60668_
-.subckt ao22_x2 i0=$abc$109383$new_n60668_ i1=$abc$109383$new_n60666_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108078
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[5] q=$abc$109383$new_n60670_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15329_ q=$abc$109383$new_n60671_
-.subckt ao22_x2 i0=$abc$109383$new_n60671_ i1=$abc$109383$new_n60670_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108082
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[6] q=$abc$109383$new_n60673_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15293_ q=$abc$109383$new_n60674_
-.subckt ao22_x2 i0=$abc$109383$new_n60674_ i1=$abc$109383$new_n60673_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108086
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[7] q=$abc$109383$new_n60676_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[7] q=$abc$109383$new_n60677_
-.subckt ao22_x2 i0=$abc$109383$new_n60677_ i1=$abc$109383$new_n60676_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108090
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[8] q=$abc$109383$new_n60679_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[8] q=$abc$109383$new_n60680_
-.subckt ao22_x2 i0=$abc$109383$new_n60680_ i1=$abc$109383$new_n60679_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108094
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[9] q=$abc$109383$new_n60682_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[9] q=$abc$109383$new_n60683_
-.subckt ao22_x2 i0=$abc$109383$new_n60683_ i1=$abc$109383$new_n60682_ i2=$abc$109383$new_n60650_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108098
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15346_ nq=$abc$109383$new_n60668_
+.subckt and21nor_x1 i0=$abc$109383$new_n60668_ i1=$abc$109383$new_n60666_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108078
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[5] q=$abc$109383$new_n60670_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15329_ nq=$abc$109383$new_n60671_
+.subckt and21nor_x1 i0=$abc$109383$new_n60671_ i1=$abc$109383$new_n60670_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108082
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[6] q=$abc$109383$new_n60673_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=$abc$109383$new_n15293_ nq=$abc$109383$new_n60674_
+.subckt and21nor_x1 i0=$abc$109383$new_n60674_ i1=$abc$109383$new_n60673_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108086
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[7] q=$abc$109383$new_n60676_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[7] nq=$abc$109383$new_n60677_
+.subckt and21nor_x1 i0=$abc$109383$new_n60677_ i1=$abc$109383$new_n60676_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108090
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[8] q=$abc$109383$new_n60679_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[8] nq=$abc$109383$new_n60680_
+.subckt and21nor_x1 i0=$abc$109383$new_n60680_ i1=$abc$109383$new_n60679_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108094
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[9] q=$abc$109383$new_n60682_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[9] nq=$abc$109383$new_n60683_
+.subckt and21nor_x1 i0=$abc$109383$new_n60683_ i1=$abc$109383$new_n60682_ i2=$abc$109383$new_n60650_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108098
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n60685_
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n60686_
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[10] q=$abc$109383$new_n60687_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[10] q=$abc$109383$new_n60688_
-.subckt ao22_x2 i0=$abc$109383$new_n60688_ i1=$abc$109383$new_n60687_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108102
-.subckt a3_x2 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[11] q=$abc$109383$new_n60690_
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[10] q=$abc$109383$new_n60687_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60655_ i2=soc.cpu.minerva.payload__instruction$28[10] nq=$abc$109383$new_n60688_
+.subckt and21nor_x1 i0=$abc$109383$new_n60688_ i1=$abc$109383$new_n60687_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108102
+.subckt and3_x1 i0=$abc$109383$new_n60658_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[11] q=$abc$109383$new_n60690_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60691_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60691_ i2=soc.cpu.minerva.payload__instruction$28[11] q=$abc$109383$new_n60692_
-.subckt ao22_x2 i0=$abc$109383$new_n60692_ i1=$abc$109383$new_n60690_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108106
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60691_ i2=soc.cpu.minerva.payload__instruction$28[11] nq=$abc$109383$new_n60692_
+.subckt and21nor_x1 i0=$abc$109383$new_n60692_ i1=$abc$109383$new_n60690_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108106
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n60694_
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[12] q=$abc$109383$new_n60695_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n30274_ q=$abc$109383$new_n60696_
-.subckt ao22_x2 i0=$abc$109383$new_n60696_ i1=$abc$109383$new_n60695_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108110
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60662_ i2=soc.cpu.minerva.fetch.ibus_rdata[12] q=$abc$109383$new_n60695_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n30274_ nq=$abc$109383$new_n60696_
+.subckt and21nor_x1 i0=$abc$109383$new_n60696_ i1=$abc$109383$new_n60695_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108110
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n60698_
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[13] q=$abc$109383$new_n60699_
-.subckt ao22_x2 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n30273_ q=$abc$109383$new_n60700_
-.subckt ao22_x2 i0=$abc$109383$new_n60700_ i1=$abc$109383$new_n60699_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108114
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[14] q=$abc$109383$new_n60702_
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[13] q=$abc$109383$new_n60699_
+.subckt and21nor_x1 i0=$abc$109383$new_n60667_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n30273_ nq=$abc$109383$new_n60700_
+.subckt and21nor_x1 i0=$abc$109383$new_n60700_ i1=$abc$109383$new_n60699_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108114
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[14] q=$abc$109383$new_n60702_
 .subckt buf_x4 i=$abc$109383$new_n17849_ q=$abc$109383$new_n60703_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n15349_ q=$abc$109383$new_n60704_
-.subckt ao22_x2 i0=$abc$109383$new_n60704_ i1=$abc$109383$new_n60702_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108118
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[15] q=$abc$109383$new_n60706_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[15] q=$abc$109383$new_n60707_
-.subckt ao22_x2 i0=$abc$109383$new_n60707_ i1=$abc$109383$new_n60706_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108122
-.subckt a3_x2 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[16] q=$abc$109383$new_n60709_
-.subckt ao22_x2 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[16] q=$abc$109383$new_n60710_
-.subckt ao22_x2 i0=$abc$109383$new_n60710_ i1=$abc$109383$new_n60709_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108126
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[17] q=$abc$109383$new_n60712_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[17] q=$abc$109383$new_n60713_
-.subckt ao22_x2 i0=$abc$109383$new_n60713_ i1=$abc$109383$new_n60712_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108130
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[18] q=$abc$109383$new_n60715_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[18] q=$abc$109383$new_n60716_
-.subckt ao22_x2 i0=$abc$109383$new_n60716_ i1=$abc$109383$new_n60715_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108134
-.subckt a3_x2 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[19] q=$abc$109383$new_n60718_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[19] q=$abc$109383$new_n60719_
-.subckt ao22_x2 i0=$abc$109383$new_n60719_ i1=$abc$109383$new_n60718_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108138
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[31] q=$abc$109383$new_n60721_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n52651_ q=$abc$109383$new_n60722_
-.subckt ao22_x2 i0=$abc$109383$new_n60722_ i1=$abc$109383$new_n60721_ i2=$abc$109383$new_n60686_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108142
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n15349_ nq=$abc$109383$new_n60704_
+.subckt and21nor_x1 i0=$abc$109383$new_n60704_ i1=$abc$109383$new_n60702_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108118
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[15] q=$abc$109383$new_n60706_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[15] nq=$abc$109383$new_n60707_
+.subckt and21nor_x1 i0=$abc$109383$new_n60707_ i1=$abc$109383$new_n60706_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108122
+.subckt and3_x1 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[16] q=$abc$109383$new_n60709_
+.subckt and21nor_x1 i0=$abc$109383$new_n59625_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[16] nq=$abc$109383$new_n60710_
+.subckt and21nor_x1 i0=$abc$109383$new_n60710_ i1=$abc$109383$new_n60709_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108126
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[17] q=$abc$109383$new_n60712_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[17] nq=$abc$109383$new_n60713_
+.subckt and21nor_x1 i0=$abc$109383$new_n60713_ i1=$abc$109383$new_n60712_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108130
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[18] q=$abc$109383$new_n60715_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[18] nq=$abc$109383$new_n60716_
+.subckt and21nor_x1 i0=$abc$109383$new_n60716_ i1=$abc$109383$new_n60715_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108134
+.subckt and3_x1 i0=$abc$109383$new_n52666_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[19] q=$abc$109383$new_n60718_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=soc.cpu.minerva.payload__instruction$28[19] nq=$abc$109383$new_n60719_
+.subckt and21nor_x1 i0=$abc$109383$new_n60719_ i1=$abc$109383$new_n60718_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108138
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[31] q=$abc$109383$new_n60721_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n52651_ nq=$abc$109383$new_n60722_
+.subckt and21nor_x1 i0=$abc$109383$new_n60722_ i1=$abc$109383$new_n60721_ i2=$abc$109383$new_n60686_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108142
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n60724_
-.subckt ao22_x2 i0=$abc$109383$new_n18218_ i1=$abc$109383$new_n18216_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108162
-.subckt ao22_x2 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108166
-.subckt ao22_x2 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108170
-.subckt ao22_x2 i0=$abc$109383$new_n18178_ i1=$abc$109383$new_n18177_ i2=$abc$109383$new_n30256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108174
-.subckt a3_x2 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[24] q=$abc$109383$new_n60729_
-.subckt ao22_x2 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=$abc$109383$new_n15495_ q=$abc$109383$new_n60730_
-.subckt ao22_x2 i0=$abc$109383$new_n60730_ i1=$abc$109383$new_n60729_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108178
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[25] q=$abc$109383$new_n60732_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n56524_ q=$abc$109383$new_n60733_
-.subckt ao22_x2 i0=$abc$109383$new_n60733_ i1=$abc$109383$new_n60732_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108182
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[26] q=$abc$109383$new_n60735_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n53859_ q=$abc$109383$new_n60736_
-.subckt ao22_x2 i0=$abc$109383$new_n60736_ i1=$abc$109383$new_n60735_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108186
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[27] q=$abc$109383$new_n60738_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n15467_ q=$abc$109383$new_n60739_
-.subckt ao22_x2 i0=$abc$109383$new_n60739_ i1=$abc$109383$new_n60738_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108190
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[28] q=$abc$109383$new_n60741_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n53915_ q=$abc$109383$new_n60742_
-.subckt ao22_x2 i0=$abc$109383$new_n60742_ i1=$abc$109383$new_n60741_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108194
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[29] q=$abc$109383$new_n60744_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n15263_ q=$abc$109383$new_n60745_
-.subckt ao22_x2 i0=$abc$109383$new_n60745_ i1=$abc$109383$new_n60744_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108198
-.subckt a3_x2 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[30] q=$abc$109383$new_n60747_
+.subckt and21nor_x1 i0=$abc$109383$new_n18218_ i1=$abc$109383$new_n18216_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108162
+.subckt and21nor_x1 i0=$abc$109383$new_n18699_ i1=$abc$109383$new_n18697_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108166
+.subckt and21nor_x1 i0=$abc$109383$new_n17850_ i1=$abc$109383$new_n17844_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108170
+.subckt and21nor_x1 i0=$abc$109383$new_n18178_ i1=$abc$109383$new_n18177_ i2=$abc$109383$new_n30256_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108174
+.subckt and3_x1 i0=$abc$109383$new_n30189_ i1=$abc$109383$new_n29196_ i2=soc.cpu.minerva.fetch.ibus_rdata[24] q=$abc$109383$new_n60729_
+.subckt and21nor_x1 i0=$abc$109383$new_n30193_ i1=$abc$109383$new_n30191_ i2=$abc$109383$new_n15495_ nq=$abc$109383$new_n60730_
+.subckt and21nor_x1 i0=$abc$109383$new_n60730_ i1=$abc$109383$new_n60729_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108178
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[25] q=$abc$109383$new_n60732_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n56524_ nq=$abc$109383$new_n60733_
+.subckt and21nor_x1 i0=$abc$109383$new_n60733_ i1=$abc$109383$new_n60732_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108182
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[26] q=$abc$109383$new_n60735_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n53859_ nq=$abc$109383$new_n60736_
+.subckt and21nor_x1 i0=$abc$109383$new_n60736_ i1=$abc$109383$new_n60735_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108186
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[27] q=$abc$109383$new_n60738_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n15467_ nq=$abc$109383$new_n60739_
+.subckt and21nor_x1 i0=$abc$109383$new_n60739_ i1=$abc$109383$new_n60738_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108190
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[28] q=$abc$109383$new_n60741_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n53915_ nq=$abc$109383$new_n60742_
+.subckt and21nor_x1 i0=$abc$109383$new_n60742_ i1=$abc$109383$new_n60741_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108194
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[29] q=$abc$109383$new_n60744_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60691_ i2=$abc$109383$new_n15263_ nq=$abc$109383$new_n60745_
+.subckt and21nor_x1 i0=$abc$109383$new_n60745_ i1=$abc$109383$new_n60744_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108198
+.subckt and3_x1 i0=$abc$109383$new_n60694_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.fetch.ibus_rdata[30] q=$abc$109383$new_n60747_
 .subckt buf_x4 i=$abc$109383$new_n29874_ q=$abc$109383$new_n60748_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60748_ i2=$abc$109383$new_n54000_ q=$abc$109383$new_n60749_
-.subckt ao22_x2 i0=$abc$109383$new_n60749_ i1=$abc$109383$new_n60747_ i2=$abc$109383$new_n60724_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108202
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60748_ i2=$abc$109383$new_n54000_ nq=$abc$109383$new_n60749_
+.subckt and21nor_x1 i0=$abc$109383$new_n60749_ i1=$abc$109383$new_n60747_ i2=$abc$109383$new_n60724_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108202
 .subckt buf_x4 i=soc.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n60751_
 .subckt buf_x4 i=soc.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n60752_
 .subckt nand2_x0 i0=$abc$109383$new_n60752_ i1=$abc$109383$new_n60751_ nq=$abc$109383$new_n60753_
 .subckt nand2_x0 i0=$abc$109383$new_n20240_ i1=$abc$109383$new_n14929_ nq=$abc$109383$new_n60754_
-.subckt o4_x2 i0=$abc$109383$new_n60754_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ i3=$abc$109383$new_n28114_ q=$abc$109383$new_n60755_
+.subckt or4_x1 i0=$abc$109383$new_n60754_ i1=$abc$109383$new_n28117_ i2=$abc$109383$new_n28115_ i3=$abc$109383$new_n28114_ q=$abc$109383$new_n60755_
 .subckt buf_x4 i=$abc$109383$new_n60755_ q=$abc$109383$new_n60756_
 .subckt inv_x1 i=$abc$109383$new_n60752_ nq=$abc$109383$new_n60757_
 .subckt inv_x0 i=soc.bridge.csr_bridge_1.cycle[2] nq=$abc$109383$new_n60758_
-.subckt a4_x2 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n60758_ i2=$abc$109383$new_n60757_ i3=soc.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n60759_
+.subckt and4_x1 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n60758_ i2=$abc$109383$new_n60757_ i3=soc.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n60759_
 .subckt nor3_x0 i0=soc.bridge.csr_bridge_1.cycle[2] i1=soc.bridge.csr_bridge_1.cycle[1] i2=soc.bridge.csr_bridge_1.cycle[0] nq=$abc$109383$new_n60760_
-.subckt a2_x2 i0=$abc$109383$new_n60760_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n60761_
+.subckt and2_x1 i0=$abc$109383$new_n60760_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n60761_
 .subckt inv_x1 i=soc.bridge.csr_bridge_1.cycle[0] nq=$abc$109383$new_n60762_
-.subckt a4_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n60758_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60762_ q=$abc$109383$new_n60763_
-.subckt a2_x2 i0=soc.bridge.csr_bridge_1.cycle[1] i1=soc.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n60764_
-.subckt a3_x2 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n60758_ q=$abc$109383$new_n60765_
+.subckt and4_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n60758_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60762_ q=$abc$109383$new_n60763_
+.subckt and2_x1 i0=soc.bridge.csr_bridge_1.cycle[1] i1=soc.bridge.csr_bridge_1.cycle[0] q=$abc$109383$new_n60764_
+.subckt and3_x1 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n60758_ q=$abc$109383$new_n60765_
 .subckt nor4_x0 i0=$abc$109383$new_n60765_ i1=$abc$109383$new_n60763_ i2=$abc$109383$new_n60761_ i3=$abc$109383$new_n60759_ nq=$abc$109383$new_n60766_
 .subckt nor4_x0 i0=$abc$109383$new_n60766_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60753_ i3=$abc$109383$new_n52647_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108204
-.subckt a2_x2 i0=soc.rx_fifo.r_rdy i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108286
-.subckt ao22_x2 i0=soc.rx.err__frame i1=soc.rx.err__overflow i2=$abc$109383$new_n27584_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108288
+.subckt and2_x1 i0=soc.rx_fifo.r_rdy i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108286
+.subckt and21nor_x1 i0=soc.rx.err__frame i1=soc.rx.err__overflow i2=$abc$109383$new_n27584_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108288
 .subckt buf_x4 i=soc.fsm_state q=$abc$109383$new_n60770_
 .subckt nor4_x0 i0=soc.bitno[3] i1=soc.bitno[2] i2=soc.bitno[1] i3=soc.bitno[0] nq=$abc$109383$new_n60771_
 .subckt inv_x0 i=soc.timer$123[7] nq=$abc$109383$new_n60772_
@@ -46050,104 +46050,104 @@
 .subckt inv_x0 i=soc.timer$123[5] nq=$abc$109383$new_n60776_
 .subckt inv_x0 i=soc.timer$123[6] nq=$abc$109383$new_n60777_
 .subckt nor4_x0 i0=soc.timer$123[3] i1=soc.timer$123[2] i2=soc.timer$123[1] i3=soc.timer$123[0] nq=$abc$109383$new_n60778_
-.subckt a4_x2 i0=$abc$109383$new_n60778_ i1=$abc$109383$new_n60777_ i2=$abc$109383$new_n60776_ i3=$abc$109383$new_n60775_ q=$abc$109383$new_n60779_
-.subckt a4_x2 i0=$abc$109383$new_n60779_ i1=$abc$109383$new_n60774_ i2=$abc$109383$new_n60773_ i3=$abc$109383$new_n60772_ q=$abc$109383$new_n60780_
+.subckt and4_x1 i0=$abc$109383$new_n60778_ i1=$abc$109383$new_n60777_ i2=$abc$109383$new_n60776_ i3=$abc$109383$new_n60775_ q=$abc$109383$new_n60779_
+.subckt and4_x1 i0=$abc$109383$new_n60779_ i1=$abc$109383$new_n60774_ i2=$abc$109383$new_n60773_ i3=$abc$109383$new_n60772_ q=$abc$109383$new_n60780_
 .subckt buf_x4 i=$abc$109383$new_n60780_ q=$abc$109383$new_n60781_
 .subckt nor2_x0 i0=soc.timer$123[11] i1=soc.timer$123[10] nq=$abc$109383$new_n60782_
 .subckt buf_x4 i=$abc$109383$new_n60782_ q=$abc$109383$new_n60783_
 .subckt nand4_x0 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n60771_ i3=$abc$109383$new_n60770_ nq=$abc$109383$new_n60784_
-.subckt o2_x2 i0=soc.tx_fifo.r_rdy i1=soc.fsm_state q=$abc$109383$new_n60785_
+.subckt or2_x1 i0=soc.tx_fifo.r_rdy i1=soc.fsm_state q=$abc$109383$new_n60785_
 .subckt buf_x4 i=$abc$109383$new_n60785_ q=$abc$109383$new_n60786_
-.subckt a2_x2 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n60787_
-.subckt a2_x2 i0=$abc$109383$new_n60787_ i1=$abc$109383$new_n60784_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108290
-.subckt mx2_x2 cmd=soc.bridge.csr_mux_1.uart_ev_enable__w_stb i0=soc.bridge._int_src.uart_ev_enable__r_data[0] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0] q=$abc$109383$new_n60789_
-.subckt a2_x2 i0=$abc$109383$new_n60789_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108294
-.subckt mx2_x2 cmd=soc.bridge.csr_mux_1.uart_ev_enable__w_stb i0=soc.bridge._int_src.uart_ev_enable__r_data[1] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1] q=$abc$109383$new_n60791_
-.subckt a2_x2 i0=$abc$109383$new_n60791_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108298
-.subckt mx2_x2 cmd=soc.bridge.csr_mux_1.uart_ev_enable__w_stb i0=soc.bridge._int_src.uart_ev_enable__r_data[2] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2] q=$abc$109383$new_n60793_
-.subckt a2_x2 i0=$abc$109383$new_n60793_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108302
+.subckt and2_x1 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n60787_
+.subckt and2_x1 i0=$abc$109383$new_n60787_ i1=$abc$109383$new_n60784_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108290
+.subckt mux2_x1 cmd=soc.bridge.csr_mux_1.uart_ev_enable__w_stb i0=soc.bridge._int_src.uart_ev_enable__r_data[0] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0] q=$abc$109383$new_n60789_
+.subckt and2_x1 i0=$abc$109383$new_n60789_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108294
+.subckt mux2_x1 cmd=soc.bridge.csr_mux_1.uart_ev_enable__w_stb i0=soc.bridge._int_src.uart_ev_enable__r_data[1] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1] q=$abc$109383$new_n60791_
+.subckt and2_x1 i0=$abc$109383$new_n60791_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108298
+.subckt mux2_x1 cmd=soc.bridge.csr_mux_1.uart_ev_enable__w_stb i0=soc.bridge._int_src.uart_ev_enable__r_data[2] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2] q=$abc$109383$new_n60793_
+.subckt and2_x1 i0=$abc$109383$new_n60793_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108302
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_pending__shadow[1] i1=soc.bridge.csr_mux_1.uart_ev_pending__w_stb nq=$abc$109383$new_n60795_
-.subckt a3_x2 i0=$abc$109383$new_n60795_ i1=soc.bridge._int_src.uart_ev_pending__r_data[1] i2=$abc$109383$new_n27584_ q=$abc$109383$new_n60796_
+.subckt and3_x1 i0=$abc$109383$new_n60795_ i1=soc.bridge._int_src.uart_ev_pending__r_data[1] i2=$abc$109383$new_n27584_ q=$abc$109383$new_n60796_
 .subckt inv_x0 i=soc.bridge._int_src._rx_err_ev_stb_r nq=$abc$109383$new_n60797_
-.subckt oa22_x2 i0=$abc$109383$new_n60797_ i1=$abc$109383$auto$rtlil.cc:2515:MuxGate$108288 i2=$abc$109383$new_n60796_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108306
+.subckt or21nand_x1 i0=$abc$109383$new_n60797_ i1=$abc$109383$auto$rtlil.cc:2515:MuxGate$108288 i2=$abc$109383$new_n60796_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108306
 .subckt buf_x4 i=$abc$109383$new_n29220_ q=$abc$109383$new_n60799_
 .subckt buf_x4 i=soc.tx_fifo.r_rdy q=$abc$109383$new_n60800_
 .subckt nor2_x0 i0=$abc$109383$new_n60800_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108308
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_rdy__shadow_en[0] i1=soc.bridge.csr_mux_0.uart_rx_rdy__shadow nq=$abc$109383$new_n60802_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[0] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60803_
-.subckt a2_x2 i0=$abc$109383$new_n60803_ i1=$abc$109383$new_n60802_ q=$abc$109383$new_n60804_
+.subckt and2_x1 i0=$abc$109383$new_n60803_ i1=$abc$109383$new_n60802_ q=$abc$109383$new_n60804_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[8] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[1] nq=$abc$109383$new_n60805_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[0] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60806_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_err__shadow[0] i1=soc.bridge.csr_mux_0.uart_rx_err__shadow_en[0] nq=$abc$109383$new_n60807_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_tx_rdy__shadow_en[0] i1=soc.bridge.csr_mux_0.uart_tx_rdy__shadow nq=$abc$109383$new_n60808_
-.subckt a4_x2 i0=$abc$109383$new_n60808_ i1=$abc$109383$new_n60807_ i2=$abc$109383$new_n60806_ i3=$abc$109383$new_n60805_ q=$abc$109383$new_n60809_
+.subckt and4_x1 i0=$abc$109383$new_n60808_ i1=$abc$109383$new_n60807_ i2=$abc$109383$new_n60806_ i3=$abc$109383$new_n60805_ q=$abc$109383$new_n60809_
 .subckt nand2_x0 i0=$abc$109383$new_n60809_ i1=$abc$109383$new_n60804_ nq=$abc$109383$new_n60810_
 .subckt buf_x4 i=$abc$109383$new_n21946_ q=$abc$109383$new_n60811_
 .subckt buf_x4 i=soc.bridge.csr_bridge_0.cycle[0] q=$abc$109383$new_n60812_
 .subckt buf_x4 i=$abc$109383$new_n21947_ q=$abc$109383$new_n60813_
 .subckt nand3_x0 i0=$abc$109383$new_n60813_ i1=$abc$109383$new_n60812_ i2=$abc$109383$new_n60811_ nq=$abc$109383$new_n60814_
 .subckt buf_x4 i=$abc$109383$new_n28118_ q=$abc$109383$new_n60815_
-.subckt o2_x2 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n60814_ q=$abc$109383$new_n60816_
+.subckt or2_x1 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n60814_ q=$abc$109383$new_n60816_
 .subckt buf_x4 i=$abc$109383$new_n60816_ q=$abc$109383$new_n60817_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n60818_
-.subckt a2_x2 i0=$abc$109383$new_n60818_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108312
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n60818_
+.subckt and2_x1 i0=$abc$109383$new_n60818_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108312
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[1] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60820_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[9] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[1] nq=$abc$109383$new_n60821_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[1] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60822_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_err__shadow[1] i1=soc.bridge.csr_mux_0.uart_rx_err__shadow_en[0] nq=$abc$109383$new_n60823_
 .subckt nand4_x0 i0=$abc$109383$new_n60823_ i1=$abc$109383$new_n60822_ i2=$abc$109383$new_n60821_ i3=$abc$109383$new_n60820_ nq=$abc$109383$new_n60824_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n60825_
-.subckt a2_x2 i0=$abc$109383$new_n60825_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108316
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n60825_
+.subckt and2_x1 i0=$abc$109383$new_n60825_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108316
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[10] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[1] nq=$abc$109383$new_n60827_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[2] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60828_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[2] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60829_
 .subckt nand3_x0 i0=$abc$109383$new_n60829_ i1=$abc$109383$new_n60828_ i2=$abc$109383$new_n60827_ nq=$abc$109383$new_n60830_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n60831_
-.subckt a2_x2 i0=$abc$109383$new_n60831_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108320
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n60831_
+.subckt and2_x1 i0=$abc$109383$new_n60831_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108320
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[11] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[1] nq=$abc$109383$new_n60833_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[3] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60834_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[3] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60835_
 .subckt nand3_x0 i0=$abc$109383$new_n60835_ i1=$abc$109383$new_n60834_ i2=$abc$109383$new_n60833_ nq=$abc$109383$new_n60836_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n60837_
-.subckt a2_x2 i0=$abc$109383$new_n60837_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108324
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n60837_
+.subckt and2_x1 i0=$abc$109383$new_n60837_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108324
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[4] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60839_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[4] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60840_
 .subckt nand2_x0 i0=$abc$109383$new_n60840_ i1=$abc$109383$new_n60839_ nq=$abc$109383$new_n60841_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n60842_
-.subckt a2_x2 i0=$abc$109383$new_n60842_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108328
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n60842_
+.subckt and2_x1 i0=$abc$109383$new_n60842_ i1=$abc$109383$new_n60585_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108328
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n60844_
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n60845_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[5] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60846_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[5] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60847_
 .subckt nand2_x0 i0=$abc$109383$new_n60847_ i1=$abc$109383$new_n60846_ nq=$abc$109383$new_n60848_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n60849_
-.subckt a2_x2 i0=$abc$109383$new_n60849_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108332
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n60849_
+.subckt and2_x1 i0=$abc$109383$new_n60849_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108332
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[6] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60851_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[6] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60852_
 .subckt nand2_x0 i0=$abc$109383$new_n60852_ i1=$abc$109383$new_n60851_ nq=$abc$109383$new_n60853_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n60854_
-.subckt a2_x2 i0=$abc$109383$new_n60854_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108336
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n60854_
+.subckt and2_x1 i0=$abc$109383$new_n60854_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108336
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_rx_data__shadow[7] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0] nq=$abc$109383$new_n60856_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_0.uart_divisor__shadow[7] i1=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0] nq=$abc$109383$new_n60857_
 .subckt nand2_x0 i0=$abc$109383$new_n60857_ i1=$abc$109383$new_n60856_ nq=$abc$109383$new_n60858_
-.subckt mx2_x2 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n60859_
-.subckt a2_x2 i0=$abc$109383$new_n60859_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108340
+.subckt mux2_x1 cmd=$abc$109383$new_n60817_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n60859_
+.subckt and2_x1 i0=$abc$109383$new_n60859_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108340
 .subckt nor2_x0 i0=soc.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n27993_ nq=$abc$109383$new_n60861_
 .subckt buf_x4 i=$abc$109383$new_n21951_ q=$abc$109383$new_n60862_
 .subckt buf_x4 i=$abc$109383$new_n21947_ q=$abc$109383$new_n60863_
 .subckt buf_x4 i=$abc$109383$new_n19800_ q=$abc$109383$new_n60864_
-.subckt a3_x2 i0=$abc$109383$new_n21964_ i1=$abc$109383$new_n60864_ i2=$abc$109383$new_n60863_ q=$abc$109383$new_n60865_
-.subckt nxr2_x1 i0=$abc$109383$new_n60865_ i1=$abc$109383$new_n60862_ nq=$abc$109383$new_n60866_
-.subckt a2_x2 i0=$abc$109383$new_n60866_ i1=$abc$109383$new_n60861_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108344
+.subckt and3_x1 i0=$abc$109383$new_n21964_ i1=$abc$109383$new_n60864_ i2=$abc$109383$new_n60863_ q=$abc$109383$new_n60865_
+.subckt nexor2_x0 i0=$abc$109383$new_n60865_ i1=$abc$109383$new_n60862_ nq=$abc$109383$new_n60866_
+.subckt and2_x1 i0=$abc$109383$new_n60866_ i1=$abc$109383$new_n60861_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108344
 .subckt nand4_x0 i0=$abc$109383$new_n21964_ i1=$abc$109383$new_n60864_ i2=$abc$109383$new_n60863_ i3=$abc$109383$new_n60812_ nq=$abc$109383$new_n60868_
 .subckt nand2_x0 i0=$abc$109383$new_n60868_ i1=$abc$109383$new_n60811_ nq=$abc$109383$new_n60869_
 .subckt buf_x4 i=$abc$109383$new_n60815_ q=$abc$109383$new_n60870_
 .subckt buf_x4 i=$abc$109383$new_n21942_ q=$abc$109383$new_n60871_
 .subckt nand2_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n60813_ nq=$abc$109383$new_n60872_
-.subckt ao22_x2 i0=$abc$109383$new_n60872_ i1=$abc$109383$new_n60870_ i2=$abc$109383$new_n60861_ q=$abc$109383$new_n60873_
-.subckt a2_x2 i0=$abc$109383$new_n60873_ i1=$abc$109383$new_n60869_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108348
-.subckt o2_x2 i0=soc.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n27421_ q=$abc$109383$new_n60875_
-.subckt ao22_x2 i0=$abc$109383$new_n60870_ i1=$abc$109383$new_n60872_ i2=$abc$109383$new_n60863_ q=$abc$109383$new_n60876_
+.subckt and21nor_x1 i0=$abc$109383$new_n60872_ i1=$abc$109383$new_n60870_ i2=$abc$109383$new_n60861_ nq=$abc$109383$new_n60873_
+.subckt and2_x1 i0=$abc$109383$new_n60873_ i1=$abc$109383$new_n60869_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108348
+.subckt or2_x1 i0=soc.bridge.csr_bridge_0.wb__ack i1=$abc$109383$new_n27421_ q=$abc$109383$new_n60875_
+.subckt and21nor_x1 i0=$abc$109383$new_n60870_ i1=$abc$109383$new_n60872_ i2=$abc$109383$new_n60863_ nq=$abc$109383$new_n60876_
 .subckt nor2_x0 i0=$abc$109383$new_n60876_ i1=$abc$109383$new_n60875_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108352
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_pending__shadow[0] i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow_en[0] nq=$abc$109383$new_n60878_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow_en[0] nq=$abc$109383$new_n60879_
@@ -46155,53 +46155,53 @@
 .subckt nand3_x0 i0=$abc$109383$new_n60880_ i1=$abc$109383$new_n60879_ i2=$abc$109383$new_n60878_ nq=$abc$109383$new_n60881_
 .subckt buf_x4 i=$abc$109383$new_n60758_ q=$abc$109383$new_n60882_
 .subckt buf_x4 i=$abc$109383$new_n60882_ q=$abc$109383$new_n60883_
-.subckt o2_x2 i0=$abc$109383$new_n60755_ i1=$abc$109383$new_n60883_ q=$abc$109383$new_n60884_
-.subckt mx2_x2 cmd=$abc$109383$new_n60884_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[24] q=$abc$109383$new_n60885_
-.subckt a2_x2 i0=$abc$109383$new_n60885_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108436
+.subckt or2_x1 i0=$abc$109383$new_n60755_ i1=$abc$109383$new_n60883_ q=$abc$109383$new_n60884_
+.subckt mux2_x1 cmd=$abc$109383$new_n60884_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[24] q=$abc$109383$new_n60885_
+.subckt and2_x1 i0=$abc$109383$new_n60885_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108436
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_pending__shadow_en[0] i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[1] nq=$abc$109383$new_n60887_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow_en[0] nq=$abc$109383$new_n60888_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[1] i1=soc.bridge.csr_mux_1.uart_ev_status__shadow_en[0] nq=$abc$109383$new_n60889_
 .subckt nand3_x0 i0=$abc$109383$new_n60889_ i1=$abc$109383$new_n60888_ i2=$abc$109383$new_n60887_ nq=$abc$109383$new_n60890_
-.subckt mx2_x2 cmd=$abc$109383$new_n60884_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[25] q=$abc$109383$new_n60891_
-.subckt a2_x2 i0=$abc$109383$new_n60891_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108440
+.subckt mux2_x1 cmd=$abc$109383$new_n60884_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[25] q=$abc$109383$new_n60891_
+.subckt and2_x1 i0=$abc$109383$new_n60891_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108440
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_pending__shadow_en[0] i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[2] nq=$abc$109383$new_n60893_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2] i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow_en[0] nq=$abc$109383$new_n60894_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[2] i1=soc.bridge.csr_mux_1.uart_ev_status__shadow_en[0] nq=$abc$109383$new_n60895_
 .subckt nand3_x0 i0=$abc$109383$new_n60895_ i1=$abc$109383$new_n60894_ i2=$abc$109383$new_n60893_ nq=$abc$109383$new_n60896_
-.subckt mx2_x2 cmd=$abc$109383$new_n60884_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[26] q=$abc$109383$new_n60897_
-.subckt a2_x2 i0=$abc$109383$new_n60897_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108444
+.subckt mux2_x1 cmd=$abc$109383$new_n60884_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[26] q=$abc$109383$new_n60897_
+.subckt and2_x1 i0=$abc$109383$new_n60897_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108444
 .subckt nor3_x0 i0=$abc$109383$new_n60875_ i1=$abc$109383$new_n60870_ i2=$abc$109383$new_n60863_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108446
-.subckt ao22_x2 i0=$abc$109383$new_n60756_ i1=soc.bridge.csr_bridge_1.cycle[2] i2=$abc$109383$new_n60762_ q=$abc$109383$new_n60900_
-.subckt o2_x2 i0=soc.bridge.csr_bridge_1.wb__ack i1=$abc$109383$new_n27993_ q=$abc$109383$new_n60901_
-.subckt a2_x2 i0=$abc$109383$new_n27466_ i1=$abc$109383$new_n23713_ q=$abc$109383$new_n60902_
-.subckt a2_x2 i0=$abc$109383$new_n60883_ i1=$abc$109383$new_n60751_ q=$abc$109383$new_n60903_
-.subckt a4_x2 i0=$abc$109383$new_n60903_ i1=$abc$109383$new_n60902_ i2=$abc$109383$new_n22002_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n60904_
+.subckt and21nor_x1 i0=$abc$109383$new_n60756_ i1=soc.bridge.csr_bridge_1.cycle[2] i2=$abc$109383$new_n60762_ nq=$abc$109383$new_n60900_
+.subckt or2_x1 i0=soc.bridge.csr_bridge_1.wb__ack i1=$abc$109383$new_n27993_ q=$abc$109383$new_n60901_
+.subckt and2_x1 i0=$abc$109383$new_n27466_ i1=$abc$109383$new_n23713_ q=$abc$109383$new_n60902_
+.subckt and2_x1 i0=$abc$109383$new_n60883_ i1=$abc$109383$new_n60751_ q=$abc$109383$new_n60903_
+.subckt and4_x1 i0=$abc$109383$new_n60903_ i1=$abc$109383$new_n60902_ i2=$abc$109383$new_n22002_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n60904_
 .subckt nor3_x0 i0=$abc$109383$new_n60904_ i1=$abc$109383$new_n60901_ i2=$abc$109383$new_n60900_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108450
 .subckt nand2_x0 i0=$abc$109383$new_n60883_ i1=$abc$109383$new_n60751_ nq=$abc$109383$new_n60906_
-.subckt ao22_x2 i0=$abc$109383$new_n60906_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60757_ q=$abc$109383$new_n60907_
-.subckt a2_x2 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n60882_ q=$abc$109383$new_n60908_
-.subckt a4_x2 i0=$abc$109383$new_n60908_ i1=$abc$109383$new_n60902_ i2=$abc$109383$new_n22002_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n60909_
+.subckt and21nor_x1 i0=$abc$109383$new_n60906_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60757_ nq=$abc$109383$new_n60907_
+.subckt and2_x1 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n60882_ q=$abc$109383$new_n60908_
+.subckt and4_x1 i0=$abc$109383$new_n60908_ i1=$abc$109383$new_n60902_ i2=$abc$109383$new_n22002_ i3=$abc$109383$new_n19648_ q=$abc$109383$new_n60909_
 .subckt nor3_x0 i0=$abc$109383$new_n60909_ i1=$abc$109383$new_n60907_ i2=$abc$109383$new_n60901_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108454
 .subckt nand2_x0 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n60883_ nq=$abc$109383$new_n60911_
-.subckt ao22_x2 i0=$abc$109383$new_n60911_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60883_ q=$abc$109383$new_n60912_
+.subckt and21nor_x1 i0=$abc$109383$new_n60911_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60883_ nq=$abc$109383$new_n60912_
 .subckt nor2_x0 i0=$abc$109383$new_n60912_ i1=$abc$109383$new_n60901_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108458
 .subckt nand3_x0 i0=$abc$109383$new_n19686_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19644_ nq=$abc$109383$new_n60914_
-.subckt o4_x2 i0=$abc$109383$new_n60914_ i1=$abc$109383$new_n60815_ i2=$abc$109383$new_n28113_ i3=$abc$109383$new_n22005_ q=$abc$109383$new_n60915_
-.subckt mx2_x2 cmd=$abc$109383$new_n60915_ i0=$abc$109383$new_n21805_ i1=soc.bridge.csr_mux_0.uart_tx_rdy__shadow q=$abc$109383$new_n60916_
-.subckt a2_x2 i0=$abc$109383$new_n60916_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108462
-.subckt a4_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n21947_ i2=$abc$109383$new_n21951_ i3=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n60918_
-.subckt a2_x2 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n60919_
-.subckt a3_x2 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n21947_ q=$abc$109383$new_n60920_
-.subckt a4_x2 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n21947_ i2=soc.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n21946_ q=$abc$109383$new_n60921_
+.subckt or4_x1 i0=$abc$109383$new_n60914_ i1=$abc$109383$new_n60815_ i2=$abc$109383$new_n28113_ i3=$abc$109383$new_n22005_ q=$abc$109383$new_n60915_
+.subckt mux2_x1 cmd=$abc$109383$new_n60915_ i0=$abc$109383$new_n21805_ i1=soc.bridge.csr_mux_0.uart_tx_rdy__shadow q=$abc$109383$new_n60916_
+.subckt and2_x1 i0=$abc$109383$new_n60916_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108462
+.subckt and4_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n21947_ i2=$abc$109383$new_n21951_ i3=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n60918_
+.subckt and2_x1 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n60919_
+.subckt and3_x1 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n21947_ q=$abc$109383$new_n60920_
+.subckt and4_x1 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n21947_ i2=soc.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n21946_ q=$abc$109383$new_n60921_
 .subckt nor4_x0 i0=$abc$109383$new_n60921_ i1=$abc$109383$new_n60920_ i2=$abc$109383$new_n60919_ i3=$abc$109383$new_n60918_ nq=$abc$109383$new_n60922_
 .subckt buf_x4 i=soc.bridge.csr_bridge_0.cycle[1] q=$abc$109383$new_n60923_
 .subckt nand2_x0 i0=$abc$109383$new_n60812_ i1=$abc$109383$new_n60923_ nq=$abc$109383$new_n60924_
-.subckt o4_x2 i0=$abc$109383$new_n60924_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n19645_ i3=$abc$109383$new_n27420_ q=$abc$109383$new_n60925_
+.subckt or4_x1 i0=$abc$109383$new_n60924_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n19645_ i3=$abc$109383$new_n27420_ q=$abc$109383$new_n60925_
 .subckt nor4_x0 i0=$abc$109383$new_n60925_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60870_ i3=$abc$109383$new_n27561_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108464
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__shadow[0] nq=$abc$109383$new_n60927_
-.subckt o4_x2 i0=$abc$109383$new_n60921_ i1=$abc$109383$new_n60920_ i2=$abc$109383$new_n60919_ i3=$abc$109383$new_n60918_ q=$abc$109383$new_n60928_
-.subckt a2_x2 i0=$abc$109383$new_n21938_ i1=$abc$109383$new_n14954_ q=$abc$109383$new_n60929_
-.subckt a3_x2 i0=$abc$109383$new_n60929_ i1=$abc$109383$new_n20884_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n60930_
+.subckt or4_x1 i0=$abc$109383$new_n60921_ i1=$abc$109383$new_n60920_ i2=$abc$109383$new_n60919_ i3=$abc$109383$new_n60918_ q=$abc$109383$new_n60928_
+.subckt and2_x1 i0=$abc$109383$new_n21938_ i1=$abc$109383$new_n14954_ q=$abc$109383$new_n60929_
+.subckt and3_x1 i0=$abc$109383$new_n60929_ i1=$abc$109383$new_n20884_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n60930_
 .subckt nand4_x0 i0=$abc$109383$new_n60930_ i1=$abc$109383$new_n60928_ i2=$abc$109383$new_n21964_ i3=$abc$109383$new_n60864_ nq=$abc$109383$new_n60931_
 .subckt nand2_x0 i0=$abc$109383$new_n60931_ i1=$abc$109383$new_n60927_ nq=$abc$109383$new_n60932_
 .subckt buf_x4 i=$abc$109383$new_n21947_ q=$abc$109383$new_n60933_
@@ -46209,20 +46209,20 @@
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20254_ nq=$abc$109383$new_n60935_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19778_ i2=$abc$109383$new_n60813_ nq=$abc$109383$new_n60936_
 .subckt nand4_x0 i0=$abc$109383$new_n20349_ i1=$abc$109383$new_n60813_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60937_
-.subckt a4_x2 i0=$abc$109383$new_n60937_ i1=$abc$109383$new_n60936_ i2=$abc$109383$new_n60935_ i3=$abc$109383$new_n60934_ q=$abc$109383$new_n60938_
-.subckt a4_x2 i0=$abc$109383$new_n60928_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19647_ i3=$abc$109383$new_n19800_ q=$abc$109383$new_n60939_
+.subckt and4_x1 i0=$abc$109383$new_n60937_ i1=$abc$109383$new_n60936_ i2=$abc$109383$new_n60935_ i3=$abc$109383$new_n60934_ q=$abc$109383$new_n60938_
+.subckt and4_x1 i0=$abc$109383$new_n60928_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19647_ i3=$abc$109383$new_n19800_ q=$abc$109383$new_n60939_
 .subckt nand3_x0 i0=$abc$109383$new_n60939_ i1=$abc$109383$new_n60938_ i2=$abc$109383$new_n60930_ nq=$abc$109383$new_n60940_
-.subckt a3_x2 i0=$abc$109383$new_n60940_ i1=$abc$109383$new_n60932_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108468
+.subckt and3_x1 i0=$abc$109383$new_n60940_ i1=$abc$109383$new_n60932_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108468
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__shadow[1] nq=$abc$109383$new_n60942_
 .subckt nand2_x0 i0=$abc$109383$new_n60931_ i1=$abc$109383$new_n60942_ nq=$abc$109383$new_n60943_
-.subckt a3_x2 i0=$abc$109383$new_n22002_ i1=$abc$109383$new_n19649_ i2=$abc$109383$new_n60864_ q=$abc$109383$new_n60944_
+.subckt and3_x1 i0=$abc$109383$new_n22002_ i1=$abc$109383$new_n19649_ i2=$abc$109383$new_n60864_ q=$abc$109383$new_n60944_
 .subckt nand4_x0 i0=$abc$109383$new_n20555_ i1=$abc$109383$new_n21947_ i2=$abc$109383$new_n21951_ i3=soc.bridge.csr_bridge_0.cycle[1] nq=$abc$109383$new_n60945_
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20273_ nq=$abc$109383$new_n60946_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19789_ i2=$abc$109383$new_n60933_ nq=$abc$109383$new_n60947_
 .subckt nand4_x0 i0=$abc$109383$new_n20365_ i1=$abc$109383$new_n21947_ i2=soc.bridge.csr_bridge_0.cycle[0] i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60948_
-.subckt a4_x2 i0=$abc$109383$new_n60948_ i1=$abc$109383$new_n60947_ i2=$abc$109383$new_n60946_ i3=$abc$109383$new_n60945_ q=$abc$109383$new_n60949_
+.subckt and4_x1 i0=$abc$109383$new_n60948_ i1=$abc$109383$new_n60947_ i2=$abc$109383$new_n60946_ i3=$abc$109383$new_n60945_ q=$abc$109383$new_n60949_
 .subckt nand4_x0 i0=$abc$109383$new_n60949_ i1=$abc$109383$new_n60930_ i2=$abc$109383$new_n60928_ i3=$abc$109383$new_n60944_ nq=$abc$109383$new_n60950_
-.subckt a3_x2 i0=$abc$109383$new_n60950_ i1=$abc$109383$new_n60943_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108472
+.subckt and3_x1 i0=$abc$109383$new_n60950_ i1=$abc$109383$new_n60943_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108472
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__shadow[2] nq=$abc$109383$new_n60952_
 .subckt nand2_x0 i0=$abc$109383$new_n60931_ i1=$abc$109383$new_n60952_ nq=$abc$109383$new_n60953_
 .subckt nand3_x0 i0=$abc$109383$new_n60929_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n29036_ nq=$abc$109383$new_n60954_
@@ -46231,36 +46231,36 @@
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19734_ i2=$abc$109383$new_n60933_ nq=$abc$109383$new_n60957_
 .subckt nand4_x0 i0=$abc$109383$new_n20370_ i1=$abc$109383$new_n60933_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60958_
 .subckt nand4_x0 i0=$abc$109383$new_n60958_ i1=$abc$109383$new_n60957_ i2=$abc$109383$new_n60956_ i3=$abc$109383$new_n60955_ nq=$abc$109383$new_n60959_
-.subckt o3_x2 i0=$abc$109383$new_n60959_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60870_ q=$abc$109383$new_n60960_
-.subckt ao22_x2 i0=$abc$109383$new_n60960_ i1=$abc$109383$new_n60954_ i2=$abc$109383$new_n57979_ q=$abc$109383$new_n60961_
-.subckt a2_x2 i0=$abc$109383$new_n60961_ i1=$abc$109383$new_n60953_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108476
+.subckt or3_x1 i0=$abc$109383$new_n60959_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60870_ q=$abc$109383$new_n60960_
+.subckt and21nor_x1 i0=$abc$109383$new_n60960_ i1=$abc$109383$new_n60954_ i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n60961_
+.subckt and2_x1 i0=$abc$109383$new_n60961_ i1=$abc$109383$new_n60953_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108476
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__shadow[3] nq=$abc$109383$new_n60963_
 .subckt nand2_x0 i0=$abc$109383$new_n60931_ i1=$abc$109383$new_n60963_ nq=$abc$109383$new_n60964_
 .subckt nand4_x0 i0=$abc$109383$new_n20563_ i1=$abc$109383$new_n60933_ i2=$abc$109383$new_n60862_ i3=$abc$109383$new_n60923_ nq=$abc$109383$new_n60965_
 .subckt nand4_x0 i0=$abc$109383$new_n20374_ i1=$abc$109383$new_n60933_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60966_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19757_ i2=$abc$109383$new_n60813_ nq=$abc$109383$new_n60967_
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20281_ nq=$abc$109383$new_n60968_
-.subckt a4_x2 i0=$abc$109383$new_n60968_ i1=$abc$109383$new_n60967_ i2=$abc$109383$new_n60966_ i3=$abc$109383$new_n60965_ q=$abc$109383$new_n60969_
+.subckt and4_x1 i0=$abc$109383$new_n60968_ i1=$abc$109383$new_n60967_ i2=$abc$109383$new_n60966_ i3=$abc$109383$new_n60965_ q=$abc$109383$new_n60969_
 .subckt nand3_x0 i0=$abc$109383$new_n60969_ i1=$abc$109383$new_n60939_ i2=$abc$109383$new_n60930_ nq=$abc$109383$new_n60970_
-.subckt a3_x2 i0=$abc$109383$new_n60970_ i1=$abc$109383$new_n60964_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108480
+.subckt and3_x1 i0=$abc$109383$new_n60970_ i1=$abc$109383$new_n60964_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108480
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__shadow[4] nq=$abc$109383$new_n60972_
 .subckt nand2_x0 i0=$abc$109383$new_n60931_ i1=$abc$109383$new_n60972_ nq=$abc$109383$new_n60973_
 .subckt nand4_x0 i0=$abc$109383$new_n20379_ i1=$abc$109383$new_n60933_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60974_
 .subckt nand4_x0 i0=$abc$109383$new_n20568_ i1=$abc$109383$new_n60933_ i2=$abc$109383$new_n60862_ i3=$abc$109383$new_n60923_ nq=$abc$109383$new_n60975_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19762_ i2=$abc$109383$new_n60813_ nq=$abc$109383$new_n60976_
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20285_ nq=$abc$109383$new_n60977_
-.subckt a4_x2 i0=$abc$109383$new_n60977_ i1=$abc$109383$new_n60976_ i2=$abc$109383$new_n60975_ i3=$abc$109383$new_n60974_ q=$abc$109383$new_n60978_
+.subckt and4_x1 i0=$abc$109383$new_n60977_ i1=$abc$109383$new_n60976_ i2=$abc$109383$new_n60975_ i3=$abc$109383$new_n60974_ q=$abc$109383$new_n60978_
 .subckt nand3_x0 i0=$abc$109383$new_n60978_ i1=$abc$109383$new_n60939_ i2=$abc$109383$new_n60930_ nq=$abc$109383$new_n60979_
-.subckt a3_x2 i0=$abc$109383$new_n60979_ i1=$abc$109383$new_n60973_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108484
+.subckt and3_x1 i0=$abc$109383$new_n60979_ i1=$abc$109383$new_n60973_ i2=$abc$109383$new_n60448_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108484
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n60981_
-.subckt a2_x2 i0=$abc$109383$new_n60931_ i1=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] q=$abc$109383$new_n60982_
+.subckt and2_x1 i0=$abc$109383$new_n60931_ i1=soc.bridge.csr_mux_0.uart_tx_data__shadow[5] q=$abc$109383$new_n60982_
 .subckt nand4_x0 i0=$abc$109383$new_n20572_ i1=$abc$109383$new_n60863_ i2=$abc$109383$new_n60862_ i3=$abc$109383$new_n60923_ nq=$abc$109383$new_n60983_
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20289_ nq=$abc$109383$new_n60984_
 .subckt nand4_x0 i0=$abc$109383$new_n20383_ i1=$abc$109383$new_n60813_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60985_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19765_ i2=$abc$109383$new_n60863_ nq=$abc$109383$new_n60986_
-.subckt a4_x2 i0=$abc$109383$new_n60986_ i1=$abc$109383$new_n60985_ i2=$abc$109383$new_n60984_ i3=$abc$109383$new_n60983_ q=$abc$109383$new_n60987_
+.subckt and4_x1 i0=$abc$109383$new_n60986_ i1=$abc$109383$new_n60985_ i2=$abc$109383$new_n60984_ i3=$abc$109383$new_n60983_ q=$abc$109383$new_n60987_
 .subckt nor4_x0 i0=$abc$109383$new_n60987_ i1=$abc$109383$new_n60954_ i2=$abc$109383$new_n60922_ i3=$abc$109383$new_n60870_ nq=$abc$109383$new_n60988_
-.subckt ao22_x2 i0=$abc$109383$new_n60988_ i1=$abc$109383$new_n60982_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108488
+.subckt and21nor_x1 i0=$abc$109383$new_n60988_ i1=$abc$109383$new_n60982_ i2=$abc$109383$new_n60981_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108488
 .subckt buf_x4 i=$abc$109383$new_n27603_ q=$abc$109383$new_n60990_
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__shadow[6] nq=$abc$109383$new_n60991_
 .subckt nand2_x0 i0=$abc$109383$new_n60931_ i1=$abc$109383$new_n60991_ nq=$abc$109383$new_n60992_
@@ -46268,188 +46268,188 @@
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20293_ nq=$abc$109383$new_n60994_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19770_ i2=$abc$109383$new_n60813_ nq=$abc$109383$new_n60995_
 .subckt nand4_x0 i0=$abc$109383$new_n20387_ i1=$abc$109383$new_n60813_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n60996_
-.subckt a4_x2 i0=$abc$109383$new_n60996_ i1=$abc$109383$new_n60995_ i2=$abc$109383$new_n60994_ i3=$abc$109383$new_n60993_ q=$abc$109383$new_n60997_
+.subckt and4_x1 i0=$abc$109383$new_n60996_ i1=$abc$109383$new_n60995_ i2=$abc$109383$new_n60994_ i3=$abc$109383$new_n60993_ q=$abc$109383$new_n60997_
 .subckt nand3_x0 i0=$abc$109383$new_n60997_ i1=$abc$109383$new_n60939_ i2=$abc$109383$new_n60930_ nq=$abc$109383$new_n60998_
-.subckt a3_x2 i0=$abc$109383$new_n60998_ i1=$abc$109383$new_n60992_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108492
-.subckt a2_x2 i0=$abc$109383$new_n60931_ i1=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] q=$abc$109383$new_n61000_
-.subckt a3_x2 i0=$abc$109383$new_n60930_ i1=$abc$109383$new_n21964_ i2=$abc$109383$new_n60864_ q=$abc$109383$new_n61001_
+.subckt and3_x1 i0=$abc$109383$new_n60998_ i1=$abc$109383$new_n60992_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108492
+.subckt and2_x1 i0=$abc$109383$new_n60931_ i1=soc.bridge.csr_mux_0.uart_tx_data__shadow[7] q=$abc$109383$new_n61000_
+.subckt and3_x1 i0=$abc$109383$new_n60930_ i1=$abc$109383$new_n21964_ i2=$abc$109383$new_n60864_ q=$abc$109383$new_n61001_
 .subckt nand4_x0 i0=$abc$109383$new_n20580_ i1=$abc$109383$new_n60863_ i2=$abc$109383$new_n60862_ i3=$abc$109383$new_n60923_ nq=$abc$109383$new_n61002_
 .subckt nand4_x0 i0=$abc$109383$new_n20391_ i1=$abc$109383$new_n60863_ i2=$abc$109383$new_n60812_ i3=$abc$109383$new_n60811_ nq=$abc$109383$new_n61003_
 .subckt nand2_x0 i0=$abc$109383$new_n21956_ i1=$abc$109383$new_n20297_ nq=$abc$109383$new_n61004_
 .subckt nand3_x0 i0=$abc$109383$new_n60871_ i1=$abc$109383$new_n19774_ i2=$abc$109383$new_n60863_ nq=$abc$109383$new_n61005_
 .subckt nand4_x0 i0=$abc$109383$new_n61005_ i1=$abc$109383$new_n61004_ i2=$abc$109383$new_n61003_ i3=$abc$109383$new_n61002_ nq=$abc$109383$new_n61006_
-.subckt a4_x2 i0=$abc$109383$new_n61006_ i1=$abc$109383$new_n60928_ i2=$abc$109383$new_n21964_ i3=$abc$109383$new_n60864_ q=$abc$109383$new_n61007_
-.subckt a2_x2 i0=$abc$109383$new_n61007_ i1=$abc$109383$new_n61001_ q=$abc$109383$new_n61008_
-.subckt ao22_x2 i0=$abc$109383$new_n61008_ i1=$abc$109383$new_n61000_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108496
+.subckt and4_x1 i0=$abc$109383$new_n61006_ i1=$abc$109383$new_n60928_ i2=$abc$109383$new_n21964_ i3=$abc$109383$new_n60864_ q=$abc$109383$new_n61007_
+.subckt and2_x1 i0=$abc$109383$new_n61007_ i1=$abc$109383$new_n61001_ q=$abc$109383$new_n61008_
+.subckt and21nor_x1 i0=$abc$109383$new_n61008_ i1=$abc$109383$new_n61000_ i2=$abc$109383$new_n60981_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108496
 .subckt nor3_x0 i0=$abc$109383$new_n60914_ i1=$abc$109383$new_n28119_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108498
 .subckt buf_x4 i=$abc$109383$new_n30188_ q=$abc$109383$new_n61011_
-.subckt a3_x2 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n61012_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[2] q=$abc$109383$new_n61013_
-.subckt ao22_x2 i0=$abc$109383$new_n61013_ i1=$abc$109383$new_n61012_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108502
+.subckt and3_x1 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n60698_ i2=soc.cpu.minerva.payload__pc$25[2] q=$abc$109383$new_n61012_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[2] nq=$abc$109383$new_n61013_
+.subckt and21nor_x1 i0=$abc$109383$new_n61013_ i1=$abc$109383$new_n61012_ i2=$abc$109383$new_n60981_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108502
 .subckt buf_x4 i=$abc$109383$new_n29195_ q=$abc$109383$new_n61015_
-.subckt a3_x2 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[3] q=$abc$109383$new_n61016_
-.subckt ao22_x2 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[3] q=$abc$109383$new_n61017_
-.subckt ao22_x2 i0=$abc$109383$new_n61017_ i1=$abc$109383$new_n61016_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108506
-.subckt a3_x2 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[4] q=$abc$109383$new_n61019_
+.subckt and3_x1 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[3] q=$abc$109383$new_n61016_
+.subckt and21nor_x1 i0=$abc$109383$new_n60703_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[3] nq=$abc$109383$new_n61017_
+.subckt and21nor_x1 i0=$abc$109383$new_n61017_ i1=$abc$109383$new_n61016_ i2=$abc$109383$new_n60981_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108506
+.subckt and3_x1 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[4] q=$abc$109383$new_n61019_
 .subckt buf_x4 i=$abc$109383$new_n17849_ q=$abc$109383$new_n61020_
-.subckt ao22_x2 i0=$abc$109383$new_n61020_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[4] q=$abc$109383$new_n61021_
-.subckt ao22_x2 i0=$abc$109383$new_n61021_ i1=$abc$109383$new_n61019_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108510
-.subckt a3_x2 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[5] q=$abc$109383$new_n61023_
-.subckt ao22_x2 i0=$abc$109383$new_n61020_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[5] q=$abc$109383$new_n61024_
-.subckt ao22_x2 i0=$abc$109383$new_n61024_ i1=$abc$109383$new_n61023_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108514
-.subckt a3_x2 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[6] q=$abc$109383$new_n61026_
-.subckt ao22_x2 i0=$abc$109383$new_n61020_ i1=$abc$109383$new_n60748_ i2=soc.cpu.minerva.payload__pc$27[6] q=$abc$109383$new_n61027_
-.subckt ao22_x2 i0=$abc$109383$new_n61027_ i1=$abc$109383$new_n61026_ i2=$abc$109383$new_n60981_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108518
-.subckt a3_x2 i0=$abc$109383$new_n61011_ i1=$abc$109383$new_n61015_ i2=soc.cpu.minerva.payload__pc$25[7] q=$abc$109383$new_n61029_
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-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n61088_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[24] q=$abc$109383$new_n61089_
-.subckt ao22_x2 i0=$abc$109383$new_n61089_ i1=$abc$109383$new_n61088_ i2=$abc$109383$new_n61073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108590
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[25] q=$abc$109383$new_n61091_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[25] q=$abc$109383$new_n61092_
-.subckt ao22_x2 i0=$abc$109383$new_n61092_ i1=$abc$109383$new_n61091_ i2=$abc$109383$new_n61073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108594
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[26] q=$abc$109383$new_n61094_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[26] q=$abc$109383$new_n61095_
-.subckt ao22_x2 i0=$abc$109383$new_n61095_ i1=$abc$109383$new_n61094_ i2=$abc$109383$new_n61073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108598
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n61097_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[27] q=$abc$109383$new_n61098_
-.subckt ao22_x2 i0=$abc$109383$new_n61098_ i1=$abc$109383$new_n61097_ i2=$abc$109383$new_n61073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108602
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[28] q=$abc$109383$new_n61100_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[28] q=$abc$109383$new_n61101_
-.subckt ao22_x2 i0=$abc$109383$new_n61101_ i1=$abc$109383$new_n61100_ i2=$abc$109383$new_n61073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108606
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[29] q=$abc$109383$new_n61103_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[29] q=$abc$109383$new_n61104_
-.subckt ao22_x2 i0=$abc$109383$new_n61104_ i1=$abc$109383$new_n61103_ i2=$abc$109383$new_n61073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108610
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n61050_ i2=soc.cpu.minerva.payload__pc$25[22] q=$abc$109383$new_n61082_
+.subckt and21nor_x1 i0=$abc$109383$new_n61055_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[22] nq=$abc$109383$new_n61083_
+.subckt and21nor_x1 i0=$abc$109383$new_n61083_ i1=$abc$109383$new_n61082_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108582
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[23] q=$abc$109383$new_n61085_
+.subckt and21nor_x1 i0=$abc$109383$new_n61055_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[23] nq=$abc$109383$new_n61086_
+.subckt and21nor_x1 i0=$abc$109383$new_n61086_ i1=$abc$109383$new_n61085_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108586
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[24] q=$abc$109383$new_n61088_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[24] nq=$abc$109383$new_n61089_
+.subckt and21nor_x1 i0=$abc$109383$new_n61089_ i1=$abc$109383$new_n61088_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108590
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[25] q=$abc$109383$new_n61091_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[25] nq=$abc$109383$new_n61092_
+.subckt and21nor_x1 i0=$abc$109383$new_n61092_ i1=$abc$109383$new_n61091_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108594
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[26] q=$abc$109383$new_n61094_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[26] nq=$abc$109383$new_n61095_
+.subckt and21nor_x1 i0=$abc$109383$new_n61095_ i1=$abc$109383$new_n61094_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108598
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[27] q=$abc$109383$new_n61097_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[27] nq=$abc$109383$new_n61098_
+.subckt and21nor_x1 i0=$abc$109383$new_n61098_ i1=$abc$109383$new_n61097_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108602
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[28] q=$abc$109383$new_n61100_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[28] nq=$abc$109383$new_n61101_
+.subckt and21nor_x1 i0=$abc$109383$new_n61101_ i1=$abc$109383$new_n61100_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108606
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[29] q=$abc$109383$new_n61103_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[29] nq=$abc$109383$new_n61104_
+.subckt and21nor_x1 i0=$abc$109383$new_n61104_ i1=$abc$109383$new_n61103_ i2=$abc$109383$new_n61073_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108610
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n61106_
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[30] q=$abc$109383$new_n61107_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[30] q=$abc$109383$new_n61108_
-.subckt ao22_x2 i0=$abc$109383$new_n61108_ i1=$abc$109383$new_n61107_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108614
-.subckt a3_x2 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[31] q=$abc$109383$new_n61110_
-.subckt ao22_x2 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n29222_ i2=soc.cpu.minerva.payload__pc$27[31] q=$abc$109383$new_n61111_
-.subckt ao22_x2 i0=$abc$109383$new_n61111_ i1=$abc$109383$new_n61110_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108618
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[30] q=$abc$109383$new_n61107_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n61078_ i2=soc.cpu.minerva.payload__pc$27[30] nq=$abc$109383$new_n61108_
+.subckt and21nor_x1 i0=$abc$109383$new_n61108_ i1=$abc$109383$new_n61107_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108614
+.subckt and3_x1 i0=$abc$109383$new_n61081_ i1=$abc$109383$new_n31807_ i2=soc.cpu.minerva.payload__pc$25[31] q=$abc$109383$new_n61110_
+.subckt and21nor_x1 i0=$abc$109383$new_n30151_ i1=$abc$109383$new_n29222_ i2=soc.cpu.minerva.payload__pc$27[31] nq=$abc$109383$new_n61111_
+.subckt and21nor_x1 i0=$abc$109383$new_n61111_ i1=$abc$109383$new_n61110_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108618
 .subckt nor4_x0 i0=$abc$109383$new_n28119_ i1=$abc$109383$new_n28112_ i2=$abc$109383$new_n19688_ i3=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108620
 .subckt nand4_x0 i0=$abc$109383$new_n22006_ i1=$abc$109383$new_n22003_ i2=$abc$109383$new_n20268_ i3=$abc$109383$new_n27825_ nq=$abc$109383$new_n61114_
-.subckt a2_x2 i0=soc.bridge.csr_mux_0.uart_rx_rdy__shadow i1=$abc$109383$new_n27525_ q=$abc$109383$new_n61115_
-.subckt ao22_x2 i0=$abc$109383$auto$rtlil.cc:2515:MuxGate$103916 i1=$abc$109383$new_n61115_ i2=$abc$109383$new_n61114_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108624
+.subckt and2_x1 i0=soc.bridge.csr_mux_0.uart_rx_rdy__shadow i1=$abc$109383$new_n27525_ q=$abc$109383$new_n61115_
+.subckt and21nor_x1 i0=$abc$109383$auto$rtlil.cc:2515:MuxGate$103916 i1=$abc$109383$new_n61115_ i2=$abc$109383$new_n61114_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108624
 .subckt nand3_x0 i0=$abc$109383$new_n27587_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n28044_ nq=$abc$109383$new_n61117_
 .subckt nor3_x0 i0=$abc$109383$new_n61117_ i1=$abc$109383$new_n28119_ i2=$abc$109383$new_n19688_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108626
 .subckt nand2_x0 i0=$abc$109383$new_n20884_ i1=$abc$109383$new_n19644_ nq=$abc$109383$new_n61119_
-.subckt o3_x2 i0=$abc$109383$new_n28119_ i1=$abc$109383$new_n61119_ i2=$abc$109383$new_n28563_ q=$abc$109383$new_n61120_
+.subckt or3_x1 i0=$abc$109383$new_n28119_ i1=$abc$109383$new_n61119_ i2=$abc$109383$new_n28563_ q=$abc$109383$new_n61120_
 .subckt buf_x4 i=$abc$109383$new_n61120_ q=$abc$109383$new_n61121_
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[0] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[0] q=$abc$109383$new_n61122_
-.subckt a2_x2 i0=$abc$109383$new_n61122_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108630
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[1] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[1] q=$abc$109383$new_n61124_
-.subckt a2_x2 i0=$abc$109383$new_n61124_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108634
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[2] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[2] q=$abc$109383$new_n61126_
-.subckt a2_x2 i0=$abc$109383$new_n61126_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108638
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[0] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[0] q=$abc$109383$new_n61122_
+.subckt and2_x1 i0=$abc$109383$new_n61122_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108630
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[1] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[1] q=$abc$109383$new_n61124_
+.subckt and2_x1 i0=$abc$109383$new_n61124_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108634
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[2] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[2] q=$abc$109383$new_n61126_
+.subckt and2_x1 i0=$abc$109383$new_n61126_ i1=$abc$109383$new_n60845_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108638
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61128_
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[3] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[3] q=$abc$109383$new_n61129_
-.subckt a2_x2 i0=$abc$109383$new_n61129_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108642
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[4] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[4] q=$abc$109383$new_n61131_
-.subckt a2_x2 i0=$abc$109383$new_n61131_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108646
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[5] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[5] q=$abc$109383$new_n61133_
-.subckt a2_x2 i0=$abc$109383$new_n61133_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108650
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[6] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[6] q=$abc$109383$new_n61135_
-.subckt a2_x2 i0=$abc$109383$new_n61135_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108654
-.subckt mx2_x2 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[7] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[7] q=$abc$109383$new_n61137_
-.subckt a2_x2 i0=$abc$109383$new_n61137_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108658
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[3] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[3] q=$abc$109383$new_n61129_
+.subckt and2_x1 i0=$abc$109383$new_n61129_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108642
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[4] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[4] q=$abc$109383$new_n61131_
+.subckt and2_x1 i0=$abc$109383$new_n61131_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108646
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[5] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[5] q=$abc$109383$new_n61133_
+.subckt and2_x1 i0=$abc$109383$new_n61133_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108650
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[6] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[6] q=$abc$109383$new_n61135_
+.subckt and2_x1 i0=$abc$109383$new_n61135_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108654
+.subckt mux2_x1 cmd=$abc$109383$new_n61121_ i0=soc.bridge.csr_mux_0.uart_rx_data__r_data[7] i1=soc.bridge.csr_mux_0.uart_rx_data__shadow[7] q=$abc$109383$new_n61137_
+.subckt and2_x1 i0=$abc$109383$new_n61137_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108658
 .subckt nor4_x0 i0=$abc$109383$new_n60925_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60870_ i3=$abc$109383$new_n19688_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108660
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[8] nq=$abc$109383$new_n61140_
 .subckt nor4_x0 i0=$abc$109383$new_n22005_ i1=$abc$109383$new_n28563_ i2=$abc$109383$new_n19683_ i3=$abc$109383$new_n19645_ nq=$abc$109383$new_n61141_
 .subckt nand2_x0 i0=$abc$109383$new_n61141_ i1=$abc$109383$new_n22003_ nq=$abc$109383$new_n61142_
-.subckt a2_x2 i0=soc.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n21946_ q=$abc$109383$new_n61143_
-.subckt a4_x2 i0=$abc$109383$new_n61143_ i1=$abc$109383$new_n21937_ i2=$abc$109383$new_n20884_ i3=$abc$109383$new_n27607_ q=$abc$109383$new_n61144_
+.subckt and2_x1 i0=soc.bridge.csr_bridge_0.cycle[0] i1=$abc$109383$new_n21946_ q=$abc$109383$new_n61143_
+.subckt and4_x1 i0=$abc$109383$new_n61143_ i1=$abc$109383$new_n21937_ i2=$abc$109383$new_n20884_ i3=$abc$109383$new_n27607_ q=$abc$109383$new_n61144_
 .subckt nand2_x0 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n60939_ nq=$abc$109383$new_n61145_
-.subckt a3_x2 i0=$abc$109383$new_n61145_ i1=$abc$109383$new_n61142_ i2=$abc$109383$new_n61140_ q=$abc$109383$new_n61146_
+.subckt and3_x1 i0=$abc$109383$new_n61145_ i1=$abc$109383$new_n61142_ i2=$abc$109383$new_n61140_ q=$abc$109383$new_n61146_
 .subckt nand4_x0 i0=$abc$109383$new_n61143_ i1=$abc$109383$new_n27466_ i2=$abc$109383$new_n20884_ i3=$abc$109383$new_n27607_ nq=$abc$109383$new_n61147_
 .subckt nand2_x0 i0=$abc$109383$new_n61147_ i1=soc.divisor[8] nq=$abc$109383$new_n61148_
 .subckt nand4_x0 i0=$abc$109383$new_n60937_ i1=$abc$109383$new_n60936_ i2=$abc$109383$new_n60935_ i3=$abc$109383$new_n60934_ nq=$abc$109383$new_n61149_
-.subckt a2_x2 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n61149_ q=$abc$109383$new_n61150_
+.subckt and2_x1 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n61149_ q=$abc$109383$new_n61150_
 .subckt nand4_x0 i0=$abc$109383$new_n61150_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19648_ i3=$abc$109383$new_n60864_ nq=$abc$109383$new_n61151_
-.subckt a2_x2 i0=$abc$109383$new_n61151_ i1=$abc$109383$new_n61148_ q=$abc$109383$new_n61152_
-.subckt a2_x2 i0=$abc$109383$new_n61141_ i1=$abc$109383$new_n22003_ q=$abc$109383$new_n61153_
-.subckt a2_x2 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n60939_ q=$abc$109383$new_n61154_
-.subckt ao22_x2 i0=$abc$109383$new_n61154_ i1=$abc$109383$new_n61153_ i2=$abc$109383$new_n61152_ q=$abc$109383$new_n61155_
+.subckt and2_x1 i0=$abc$109383$new_n61151_ i1=$abc$109383$new_n61148_ q=$abc$109383$new_n61152_
+.subckt and2_x1 i0=$abc$109383$new_n61141_ i1=$abc$109383$new_n22003_ q=$abc$109383$new_n61153_
+.subckt and2_x1 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n60939_ q=$abc$109383$new_n61154_
+.subckt and21nor_x1 i0=$abc$109383$new_n61154_ i1=$abc$109383$new_n61153_ i2=$abc$109383$new_n61152_ nq=$abc$109383$new_n61155_
 .subckt nor3_x0 i0=$abc$109383$new_n61155_ i1=$abc$109383$new_n61146_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108664
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[9] nq=$abc$109383$new_n61157_
-.subckt a3_x2 i0=$abc$109383$new_n61145_ i1=$abc$109383$new_n61142_ i2=$abc$109383$new_n61157_ q=$abc$109383$new_n61158_
-.subckt o2_x2 i0=$abc$109383$new_n60949_ i1=$abc$109383$new_n60815_ q=$abc$109383$new_n61159_
-.subckt mx2_x2 cmd=$abc$109383$new_n61147_ i0=$abc$109383$new_n61159_ i1=$abc$109383$new_n28003_ q=$abc$109383$new_n61160_
-.subckt ao22_x2 i0=$abc$109383$new_n61153_ i1=$abc$109383$new_n61154_ i2=$abc$109383$new_n61160_ q=$abc$109383$new_n61161_
+.subckt and3_x1 i0=$abc$109383$new_n61145_ i1=$abc$109383$new_n61142_ i2=$abc$109383$new_n61157_ q=$abc$109383$new_n61158_
+.subckt or2_x1 i0=$abc$109383$new_n60949_ i1=$abc$109383$new_n60815_ q=$abc$109383$new_n61159_
+.subckt mux2_x1 cmd=$abc$109383$new_n61147_ i0=$abc$109383$new_n61159_ i1=$abc$109383$new_n28003_ q=$abc$109383$new_n61160_
+.subckt and21nor_x1 i0=$abc$109383$new_n61153_ i1=$abc$109383$new_n61154_ i2=$abc$109383$new_n61160_ nq=$abc$109383$new_n61161_
 .subckt nor3_x0 i0=$abc$109383$new_n61161_ i1=$abc$109383$new_n61158_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108668
-.subckt a4_x2 i0=$abc$109383$new_n60959_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19647_ i3=$abc$109383$new_n60864_ q=$abc$109383$new_n61163_
-.subckt mx2_x2 cmd=$abc$109383$new_n61147_ i0=$abc$109383$new_n61163_ i1=soc.divisor[10] q=$abc$109383$new_n61164_
-.subckt o4_x2 i0=$abc$109383$new_n22005_ i1=$abc$109383$new_n14954_ i2=$abc$109383$new_n19782_ i3=$abc$109383$new_n19644_ q=$abc$109383$new_n61165_
-.subckt o3_x2 i0=$abc$109383$new_n61165_ i1=$abc$109383$new_n60815_ i2=$abc$109383$new_n28113_ q=$abc$109383$new_n61166_
-.subckt o3_x2 i0=$abc$109383$new_n61147_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60815_ q=$abc$109383$new_n61167_
-.subckt a2_x2 i0=$abc$109383$new_n61167_ i1=$abc$109383$new_n61166_ q=$abc$109383$new_n61168_
-.subckt mx2_x2 cmd=$abc$109383$new_n61168_ i0=$abc$109383$new_n61164_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[10] q=$abc$109383$new_n61169_
-.subckt a2_x2 i0=$abc$109383$new_n61169_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108672
+.subckt and4_x1 i0=$abc$109383$new_n60959_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19647_ i3=$abc$109383$new_n60864_ q=$abc$109383$new_n61163_
+.subckt mux2_x1 cmd=$abc$109383$new_n61147_ i0=$abc$109383$new_n61163_ i1=soc.divisor[10] q=$abc$109383$new_n61164_
+.subckt or4_x1 i0=$abc$109383$new_n22005_ i1=$abc$109383$new_n14954_ i2=$abc$109383$new_n19782_ i3=$abc$109383$new_n19644_ q=$abc$109383$new_n61165_
+.subckt or3_x1 i0=$abc$109383$new_n61165_ i1=$abc$109383$new_n60815_ i2=$abc$109383$new_n28113_ q=$abc$109383$new_n61166_
+.subckt or3_x1 i0=$abc$109383$new_n61147_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60815_ q=$abc$109383$new_n61167_
+.subckt and2_x1 i0=$abc$109383$new_n61167_ i1=$abc$109383$new_n61166_ q=$abc$109383$new_n61168_
+.subckt mux2_x1 cmd=$abc$109383$new_n61168_ i0=$abc$109383$new_n61164_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[10] q=$abc$109383$new_n61169_
+.subckt and2_x1 i0=$abc$109383$new_n61169_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108672
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[11] nq=$abc$109383$new_n61171_
-.subckt a3_x2 i0=$abc$109383$new_n61145_ i1=$abc$109383$new_n61142_ i2=$abc$109383$new_n61171_ q=$abc$109383$new_n61172_
+.subckt and3_x1 i0=$abc$109383$new_n61145_ i1=$abc$109383$new_n61142_ i2=$abc$109383$new_n61171_ q=$abc$109383$new_n61172_
 .subckt nand2_x0 i0=$abc$109383$new_n61147_ i1=soc.divisor[11] nq=$abc$109383$new_n61173_
 .subckt nand4_x0 i0=$abc$109383$new_n60968_ i1=$abc$109383$new_n60967_ i2=$abc$109383$new_n60966_ i3=$abc$109383$new_n60965_ nq=$abc$109383$new_n61174_
-.subckt a2_x2 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n61174_ q=$abc$109383$new_n61175_
+.subckt and2_x1 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n61174_ q=$abc$109383$new_n61175_
 .subckt nand4_x0 i0=$abc$109383$new_n61175_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19648_ i3=$abc$109383$new_n60864_ nq=$abc$109383$new_n61176_
-.subckt a2_x2 i0=$abc$109383$new_n61176_ i1=$abc$109383$new_n61173_ q=$abc$109383$new_n61177_
-.subckt ao22_x2 i0=$abc$109383$new_n61153_ i1=$abc$109383$new_n61154_ i2=$abc$109383$new_n61177_ q=$abc$109383$new_n61178_
+.subckt and2_x1 i0=$abc$109383$new_n61176_ i1=$abc$109383$new_n61173_ q=$abc$109383$new_n61177_
+.subckt and21nor_x1 i0=$abc$109383$new_n61153_ i1=$abc$109383$new_n61154_ i2=$abc$109383$new_n61177_ nq=$abc$109383$new_n61178_
 .subckt nor3_x0 i0=$abc$109383$new_n61178_ i1=$abc$109383$new_n61172_ i2=$abc$109383$new_n55006_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108676
 .subckt nor3_x0 i0=$abc$109383$new_n60901_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60883_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108678
 .subckt nand4_x0 i0=$abc$109383$new_n20541_ i1=$abc$109383$new_n60882_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60762_ nq=$abc$109383$new_n61181_
@@ -46457,1666 +46457,1666 @@
 .subckt nand4_x0 i0=$abc$109383$new_n20349_ i1=$abc$109383$new_n60882_ i2=$abc$109383$new_n60757_ i3=$abc$109383$new_n60751_ nq=$abc$109383$new_n61183_
 .subckt nand3_x0 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n19778_ i2=$abc$109383$new_n60882_ nq=$abc$109383$new_n61184_
 .subckt nand4_x0 i0=$abc$109383$new_n61184_ i1=$abc$109383$new_n61183_ i2=$abc$109383$new_n61182_ i3=$abc$109383$new_n61181_ nq=$abc$109383$new_n61185_
-.subckt o4_x2 i0=$abc$109383$new_n60765_ i1=$abc$109383$new_n60763_ i2=$abc$109383$new_n60761_ i3=$abc$109383$new_n60759_ q=$abc$109383$new_n61186_
+.subckt or4_x1 i0=$abc$109383$new_n60765_ i1=$abc$109383$new_n60763_ i2=$abc$109383$new_n60761_ i3=$abc$109383$new_n60759_ q=$abc$109383$new_n61186_
 .subckt nand4_x0 i0=$abc$109383$new_n61186_ i1=$abc$109383$new_n60902_ i2=$abc$109383$new_n22002_ i3=$abc$109383$new_n19647_ nq=$abc$109383$new_n61187_
-.subckt mx2_x2 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61185_ i1=soc.bridge._int_src.uart_ev_enable__r_data[0] q=$abc$109383$new_n61188_
+.subckt mux2_x1 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61185_ i1=soc.bridge._int_src.uart_ev_enable__r_data[0] q=$abc$109383$new_n61188_
 .subckt nor2_x0 i0=$abc$109383$new_n60752_ i1=$abc$109383$new_n60751_ nq=$abc$109383$new_n61189_
 .subckt nand3_x0 i0=$abc$109383$new_n61189_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n29036_ nq=$abc$109383$new_n61190_
 .subckt nand2_x0 i0=$abc$109383$new_n60760_ i1=$abc$109383$new_n21954_ nq=$abc$109383$new_n61191_
-.subckt a3_x2 i0=$abc$109383$new_n60758_ i1=$abc$109383$new_n60752_ i2=$abc$109383$new_n60762_ q=$abc$109383$new_n61192_
+.subckt and3_x1 i0=$abc$109383$new_n60758_ i1=$abc$109383$new_n60752_ i2=$abc$109383$new_n60762_ q=$abc$109383$new_n61192_
 .subckt nand2_x0 i0=$abc$109383$new_n61192_ i1=$abc$109383$new_n21950_ nq=$abc$109383$new_n61193_
-.subckt a3_x2 i0=$abc$109383$new_n60882_ i1=$abc$109383$new_n60757_ i2=$abc$109383$new_n60751_ q=$abc$109383$new_n61194_
+.subckt and3_x1 i0=$abc$109383$new_n60882_ i1=$abc$109383$new_n60757_ i2=$abc$109383$new_n60751_ q=$abc$109383$new_n61194_
 .subckt nand2_x0 i0=$abc$109383$new_n61194_ i1=$abc$109383$new_n21945_ nq=$abc$109383$new_n61195_
 .subckt nand2_x0 i0=$abc$109383$new_n60908_ i1=$abc$109383$new_n21940_ nq=$abc$109383$new_n61196_
-.subckt a4_x2 i0=$abc$109383$new_n61196_ i1=$abc$109383$new_n61195_ i2=$abc$109383$new_n61193_ i3=$abc$109383$new_n61191_ q=$abc$109383$new_n61197_
-.subckt o2_x2 i0=$abc$109383$new_n61197_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61198_
-.subckt o2_x2 i0=$abc$109383$new_n60766_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61199_
-.subckt oa22_x2 i0=$abc$109383$new_n61199_ i1=$abc$109383$new_n61198_ i2=$abc$109383$new_n61190_ q=$abc$109383$new_n61200_
-.subckt mx2_x2 cmd=$abc$109383$new_n61200_ i0=$abc$109383$new_n61188_ i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0] q=$abc$109383$new_n61201_
-.subckt a2_x2 i0=$abc$109383$new_n61201_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108858
+.subckt and4_x1 i0=$abc$109383$new_n61196_ i1=$abc$109383$new_n61195_ i2=$abc$109383$new_n61193_ i3=$abc$109383$new_n61191_ q=$abc$109383$new_n61197_
+.subckt or2_x1 i0=$abc$109383$new_n61197_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61198_
+.subckt or2_x1 i0=$abc$109383$new_n60766_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61199_
+.subckt or21nand_x1 i0=$abc$109383$new_n61199_ i1=$abc$109383$new_n61198_ i2=$abc$109383$new_n61190_ nq=$abc$109383$new_n61200_
+.subckt mux2_x1 cmd=$abc$109383$new_n61200_ i0=$abc$109383$new_n61188_ i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0] q=$abc$109383$new_n61201_
+.subckt and2_x1 i0=$abc$109383$new_n61201_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108858
 .subckt nand4_x0 i0=$abc$109383$new_n20365_ i1=$abc$109383$new_n60882_ i2=$abc$109383$new_n60757_ i3=$abc$109383$new_n60751_ nq=$abc$109383$new_n61203_
 .subckt nand3_x0 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n19789_ i2=$abc$109383$new_n60883_ nq=$abc$109383$new_n61204_
 .subckt nand2_x0 i0=$abc$109383$new_n60760_ i1=$abc$109383$new_n20273_ nq=$abc$109383$new_n61205_
 .subckt nand4_x0 i0=$abc$109383$new_n20555_ i1=$abc$109383$new_n60882_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60762_ nq=$abc$109383$new_n61206_
 .subckt nand4_x0 i0=$abc$109383$new_n61206_ i1=$abc$109383$new_n61205_ i2=$abc$109383$new_n61204_ i3=$abc$109383$new_n61203_ nq=$abc$109383$new_n61207_
-.subckt mx2_x2 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61207_ i1=soc.bridge._int_src.uart_ev_enable__r_data[1] q=$abc$109383$new_n61208_
-.subckt mx2_x2 cmd=$abc$109383$new_n61200_ i0=$abc$109383$new_n61208_ i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1] q=$abc$109383$new_n61209_
-.subckt a2_x2 i0=$abc$109383$new_n61209_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108862
+.subckt mux2_x1 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61207_ i1=soc.bridge._int_src.uart_ev_enable__r_data[1] q=$abc$109383$new_n61208_
+.subckt mux2_x1 cmd=$abc$109383$new_n61200_ i0=$abc$109383$new_n61208_ i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1] q=$abc$109383$new_n61209_
+.subckt and2_x1 i0=$abc$109383$new_n61209_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108862
 .subckt nand4_x0 i0=$abc$109383$new_n20559_ i1=$abc$109383$new_n60882_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60762_ nq=$abc$109383$new_n61211_
 .subckt nand2_x0 i0=$abc$109383$new_n60760_ i1=$abc$109383$new_n20277_ nq=$abc$109383$new_n61212_
 .subckt nand3_x0 i0=$abc$109383$new_n60764_ i1=$abc$109383$new_n19734_ i2=$abc$109383$new_n60883_ nq=$abc$109383$new_n61213_
 .subckt nand4_x0 i0=$abc$109383$new_n20370_ i1=$abc$109383$new_n60882_ i2=$abc$109383$new_n60757_ i3=$abc$109383$new_n60751_ nq=$abc$109383$new_n61214_
 .subckt nand4_x0 i0=$abc$109383$new_n61214_ i1=$abc$109383$new_n61213_ i2=$abc$109383$new_n61212_ i3=$abc$109383$new_n61211_ nq=$abc$109383$new_n61215_
-.subckt mx2_x2 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61215_ i1=soc.bridge._int_src.uart_ev_enable__r_data[2] q=$abc$109383$new_n61216_
-.subckt mx2_x2 cmd=$abc$109383$new_n61200_ i0=$abc$109383$new_n61216_ i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2] q=$abc$109383$new_n61217_
-.subckt a2_x2 i0=$abc$109383$new_n61217_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108866
+.subckt mux2_x1 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61215_ i1=soc.bridge._int_src.uart_ev_enable__r_data[2] q=$abc$109383$new_n61216_
+.subckt mux2_x1 cmd=$abc$109383$new_n61200_ i0=$abc$109383$new_n61216_ i1=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2] q=$abc$109383$new_n61217_
+.subckt and2_x1 i0=$abc$109383$new_n61217_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108866
 .subckt nor4_x0 i0=$abc$109383$new_n19684_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n28950_ i3=$abc$109383$new_n28943_ nq=$abc$109383$new_n61219_
-.subckt a3_x2 i0=$abc$109383$new_n61219_ i1=$abc$109383$new_n28940_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108868
+.subckt and3_x1 i0=$abc$109383$new_n61219_ i1=$abc$109383$new_n28940_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108868
 .subckt nor4_x0 i0=$abc$109383$new_n60766_ i1=$abc$109383$new_n60756_ i2=$abc$109383$new_n60753_ i3=$abc$109383$new_n61117_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108870
-.subckt mx2_x2 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61185_ i1=soc.bridge._int_src.uart_ev_pending__r_data[0] q=$abc$109383$new_n61222_
+.subckt mux2_x1 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61185_ i1=soc.bridge._int_src.uart_ev_pending__r_data[0] q=$abc$109383$new_n61222_
 .subckt nand3_x0 i0=$abc$109383$new_n61189_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19645_ nq=$abc$109383$new_n61223_
-.subckt oa22_x2 i0=$abc$109383$new_n61199_ i1=$abc$109383$new_n61198_ i2=$abc$109383$new_n61223_ q=$abc$109383$new_n61224_
-.subckt mx2_x2 cmd=$abc$109383$new_n61224_ i0=$abc$109383$new_n61222_ i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[0] q=$abc$109383$new_n61225_
-.subckt a2_x2 i0=$abc$109383$new_n61225_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108874
+.subckt or21nand_x1 i0=$abc$109383$new_n61199_ i1=$abc$109383$new_n61198_ i2=$abc$109383$new_n61223_ nq=$abc$109383$new_n61224_
+.subckt mux2_x1 cmd=$abc$109383$new_n61224_ i0=$abc$109383$new_n61222_ i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[0] q=$abc$109383$new_n61225_
+.subckt and2_x1 i0=$abc$109383$new_n61225_ i1=$abc$109383$new_n61128_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108874
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61227_
-.subckt mx2_x2 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61207_ i1=soc.bridge._int_src.uart_ev_pending__r_data[1] q=$abc$109383$new_n61228_
-.subckt mx2_x2 cmd=$abc$109383$new_n61224_ i0=$abc$109383$new_n61228_ i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[1] q=$abc$109383$new_n61229_
-.subckt a2_x2 i0=$abc$109383$new_n61229_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108878
-.subckt mx2_x2 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61215_ i1=soc.bridge._int_src.uart_ev_pending__r_data[2] q=$abc$109383$new_n61231_
-.subckt mx2_x2 cmd=$abc$109383$new_n61224_ i0=$abc$109383$new_n61231_ i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[2] q=$abc$109383$new_n61232_
-.subckt a2_x2 i0=$abc$109383$new_n61232_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108882
+.subckt mux2_x1 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61207_ i1=soc.bridge._int_src.uart_ev_pending__r_data[1] q=$abc$109383$new_n61228_
+.subckt mux2_x1 cmd=$abc$109383$new_n61224_ i0=$abc$109383$new_n61228_ i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[1] q=$abc$109383$new_n61229_
+.subckt and2_x1 i0=$abc$109383$new_n61229_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108878
+.subckt mux2_x1 cmd=$abc$109383$new_n61187_ i0=$abc$109383$new_n61215_ i1=soc.bridge._int_src.uart_ev_pending__r_data[2] q=$abc$109383$new_n61231_
+.subckt mux2_x1 cmd=$abc$109383$new_n61224_ i0=$abc$109383$new_n61231_ i1=soc.bridge.csr_mux_1.uart_ev_pending__shadow[2] q=$abc$109383$new_n61232_
+.subckt and2_x1 i0=$abc$109383$new_n61232_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108882
 .subckt nor4_x0 i0=$abc$109383$new_n61197_ i1=$abc$109383$new_n61190_ i2=$abc$109383$new_n60756_ i3=$abc$109383$new_n28494_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108884
 .subckt nor4_x0 i0=$abc$109383$new_n61223_ i1=$abc$109383$new_n61197_ i2=$abc$109383$new_n60756_ i3=$abc$109383$new_n28494_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108886
-.subckt o4_x2 i0=$abc$109383$new_n19682_ i1=$abc$109383$new_n19644_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60751_ q=$abc$109383$new_n61236_
+.subckt or4_x1 i0=$abc$109383$new_n19682_ i1=$abc$109383$new_n19644_ i2=$abc$109383$new_n60752_ i3=$abc$109383$new_n60751_ q=$abc$109383$new_n61236_
 .subckt nor3_x0 i0=$abc$109383$new_n61236_ i1=$abc$109383$new_n61197_ i2=$abc$109383$new_n60755_ nq=$abc$109383$new_n61237_
-.subckt mx2_x2 cmd=$abc$109383$new_n61237_ i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[0] i1=soc.bridge._int_src.uart_ev_pending__r_data[0] q=$abc$109383$new_n61238_
-.subckt a2_x2 i0=$abc$109383$new_n61238_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108890
-.subckt mx2_x2 cmd=$abc$109383$new_n61237_ i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[1] i1=soc.bridge._int_src._rx_err_ev_stb_r q=$abc$109383$new_n61240_
-.subckt a2_x2 i0=$abc$109383$new_n61240_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108894
-.subckt mx2_x2 cmd=$abc$109383$new_n61237_ i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[2] i1=soc.bridge._int_src._tx_mty_ev_stb_r q=$abc$109383$new_n61242_
-.subckt a2_x2 i0=$abc$109383$new_n61242_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108898
+.subckt mux2_x1 cmd=$abc$109383$new_n61237_ i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[0] i1=soc.bridge._int_src.uart_ev_pending__r_data[0] q=$abc$109383$new_n61238_
+.subckt and2_x1 i0=$abc$109383$new_n61238_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108890
+.subckt mux2_x1 cmd=$abc$109383$new_n61237_ i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[1] i1=soc.bridge._int_src._rx_err_ev_stb_r q=$abc$109383$new_n61240_
+.subckt and2_x1 i0=$abc$109383$new_n61240_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108894
+.subckt mux2_x1 cmd=$abc$109383$new_n61237_ i0=soc.bridge.csr_mux_1.uart_ev_status__shadow[2] i1=soc.bridge._int_src._tx_mty_ev_stb_r q=$abc$109383$new_n61242_
+.subckt and2_x1 i0=$abc$109383$new_n61242_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$108898
 .subckt nor4_x0 i0=$abc$109383$new_n61236_ i1=$abc$109383$new_n61197_ i2=$abc$109383$new_n60756_ i3=$abc$109383$new_n28494_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$108900
-.subckt o2_x2 i0=$abc$109383$new_n28643_ i1=$abc$109383$new_n44275_ q=$abc$109383$new_n61245_
-.subckt a2_x2 i0=$abc$109383$new_n28643_ i1=$abc$109383$new_n44275_ q=$abc$109383$new_n61246_
-.subckt ao22_x2 i0=$abc$109383$new_n52664_ i1=$abc$109383$new_n61246_ i2=$abc$109383$new_n57979_ q=$abc$109383$new_n61247_
-.subckt a2_x2 i0=$abc$109383$new_n61247_ i1=$abc$109383$new_n61245_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109016
+.subckt or2_x1 i0=$abc$109383$new_n28643_ i1=$abc$109383$new_n44275_ q=$abc$109383$new_n61245_
+.subckt and2_x1 i0=$abc$109383$new_n28643_ i1=$abc$109383$new_n44275_ q=$abc$109383$new_n61246_
+.subckt and21nor_x1 i0=$abc$109383$new_n52664_ i1=$abc$109383$new_n61246_ i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n61247_
+.subckt and2_x1 i0=$abc$109383$new_n61247_ i1=$abc$109383$new_n61245_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109016
 .subckt nor2_x0 i0=$abc$109383$new_n28494_ i1=soc.hb_ctr[0] nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109018
 .subckt nand2_x0 i0=soc.hb_ctr[1] i1=soc.hb_ctr[0] nq=$abc$109383$new_n61250_
-.subckt o2_x2 i0=soc.hb_ctr[1] i1=soc.hb_ctr[0] q=$abc$109383$new_n61251_
-.subckt a3_x2 i0=$abc$109383$new_n61251_ i1=$abc$109383$new_n61250_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109020
+.subckt or2_x1 i0=soc.hb_ctr[1] i1=soc.hb_ctr[0] q=$abc$109383$new_n61251_
+.subckt and3_x1 i0=$abc$109383$new_n61251_ i1=$abc$109383$new_n61250_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109020
 .subckt nand3_x0 i0=soc.hb_ctr[2] i1=soc.hb_ctr[1] i2=soc.hb_ctr[0] nq=$abc$109383$new_n61253_
-.subckt oa22_x2 i0=soc.hb_ctr[0] i1=soc.hb_ctr[1] i2=soc.hb_ctr[2] q=$abc$109383$new_n61254_
-.subckt a3_x2 i0=$abc$109383$new_n61254_ i1=$abc$109383$new_n61253_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109022
+.subckt or21nand_x1 i0=soc.hb_ctr[0] i1=soc.hb_ctr[1] i2=soc.hb_ctr[2] nq=$abc$109383$new_n61254_
+.subckt and3_x1 i0=$abc$109383$new_n61254_ i1=$abc$109383$new_n61253_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109022
 .subckt nand4_x0 i0=soc.hb_ctr[3] i1=soc.hb_ctr[2] i2=soc.hb_ctr[1] i3=soc.hb_ctr[0] nq=$abc$109383$new_n61256_
-.subckt a3_x2 i0=soc.hb_ctr[2] i1=soc.hb_ctr[1] i2=soc.hb_ctr[0] q=$abc$109383$new_n61257_
-.subckt ao22_x2 i0=$abc$109383$new_n61257_ i1=soc.hb_ctr[3] i2=$abc$109383$new_n57979_ q=$abc$109383$new_n61258_
-.subckt a2_x2 i0=$abc$109383$new_n61258_ i1=$abc$109383$new_n61256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109024
-.subckt a4_x2 i0=soc.hb_ctr[3] i1=soc.hb_ctr[2] i2=soc.hb_ctr[1] i3=soc.hb_ctr[0] q=$abc$109383$new_n61260_
+.subckt and3_x1 i0=soc.hb_ctr[2] i1=soc.hb_ctr[1] i2=soc.hb_ctr[0] q=$abc$109383$new_n61257_
+.subckt and21nor_x1 i0=$abc$109383$new_n61257_ i1=soc.hb_ctr[3] i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n61258_
+.subckt and2_x1 i0=$abc$109383$new_n61258_ i1=$abc$109383$new_n61256_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109024
+.subckt and4_x1 i0=soc.hb_ctr[3] i1=soc.hb_ctr[2] i2=soc.hb_ctr[1] i3=soc.hb_ctr[0] q=$abc$109383$new_n61260_
 .subckt nand2_x0 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[4] nq=$abc$109383$new_n61261_
-.subckt ao22_x2 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[4] i2=$abc$109383$new_n57979_ q=$abc$109383$new_n61262_
-.subckt a2_x2 i0=$abc$109383$new_n61262_ i1=$abc$109383$new_n61261_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109026
+.subckt and21nor_x1 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[4] i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n61262_
+.subckt and2_x1 i0=$abc$109383$new_n61262_ i1=$abc$109383$new_n61261_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109026
 .subckt nand3_x0 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[5] i2=soc.hb_ctr[4] nq=$abc$109383$new_n61264_
-.subckt oa22_x2 i0=soc.hb_ctr[4] i1=$abc$109383$new_n61260_ i2=soc.hb_ctr[5] q=$abc$109383$new_n61265_
-.subckt a3_x2 i0=$abc$109383$new_n61265_ i1=$abc$109383$new_n61264_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109028
+.subckt or21nand_x1 i0=soc.hb_ctr[4] i1=$abc$109383$new_n61260_ i2=soc.hb_ctr[5] nq=$abc$109383$new_n61265_
+.subckt and3_x1 i0=$abc$109383$new_n61265_ i1=$abc$109383$new_n61264_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109028
 .subckt nand4_x0 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[6] i2=soc.hb_ctr[5] i3=soc.hb_ctr[4] nq=$abc$109383$new_n61267_
-.subckt a3_x2 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[5] i2=soc.hb_ctr[4] q=$abc$109383$new_n61268_
-.subckt ao22_x2 i0=$abc$109383$new_n61268_ i1=soc.hb_ctr[6] i2=$abc$109383$new_n57979_ q=$abc$109383$new_n61269_
-.subckt a2_x2 i0=$abc$109383$new_n61269_ i1=$abc$109383$new_n61267_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109030
-.subckt a4_x2 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[6] i2=soc.hb_ctr[5] i3=soc.hb_ctr[4] q=$abc$109383$new_n61271_
+.subckt and3_x1 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[5] i2=soc.hb_ctr[4] q=$abc$109383$new_n61268_
+.subckt and21nor_x1 i0=$abc$109383$new_n61268_ i1=soc.hb_ctr[6] i2=$abc$109383$new_n57979_ nq=$abc$109383$new_n61269_
+.subckt and2_x1 i0=$abc$109383$new_n61269_ i1=$abc$109383$new_n61267_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109030
+.subckt and4_x1 i0=$abc$109383$new_n61260_ i1=soc.hb_ctr[6] i2=soc.hb_ctr[5] i3=soc.hb_ctr[4] q=$abc$109383$new_n61271_
 .subckt nand2_x0 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[7] nq=$abc$109383$new_n61272_
 .subckt buf_x4 i=$abc$109383$new_n27535_ q=$abc$109383$new_n61273_
-.subckt ao22_x2 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[7] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61274_
-.subckt a2_x2 i0=$abc$109383$new_n61274_ i1=$abc$109383$new_n61272_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109032
+.subckt and21nor_x1 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[7] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61274_
+.subckt and2_x1 i0=$abc$109383$new_n61274_ i1=$abc$109383$new_n61272_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109032
 .subckt nand3_x0 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[8] i2=soc.hb_ctr[7] nq=$abc$109383$new_n61276_
-.subckt oa22_x2 i0=soc.hb_ctr[7] i1=$abc$109383$new_n61271_ i2=soc.hb_ctr[8] q=$abc$109383$new_n61277_
-.subckt a3_x2 i0=$abc$109383$new_n61277_ i1=$abc$109383$new_n61276_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109034
+.subckt or21nand_x1 i0=soc.hb_ctr[7] i1=$abc$109383$new_n61271_ i2=soc.hb_ctr[8] nq=$abc$109383$new_n61277_
+.subckt and3_x1 i0=$abc$109383$new_n61277_ i1=$abc$109383$new_n61276_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109034
 .subckt nand4_x0 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[9] i2=soc.hb_ctr[8] i3=soc.hb_ctr[7] nq=$abc$109383$new_n61279_
-.subckt a3_x2 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[8] i2=soc.hb_ctr[7] q=$abc$109383$new_n61280_
-.subckt ao22_x2 i0=$abc$109383$new_n61280_ i1=soc.hb_ctr[9] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61281_
-.subckt a2_x2 i0=$abc$109383$new_n61281_ i1=$abc$109383$new_n61279_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109036
-.subckt a4_x2 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[9] i2=soc.hb_ctr[8] i3=soc.hb_ctr[7] q=$abc$109383$new_n61283_
+.subckt and3_x1 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[8] i2=soc.hb_ctr[7] q=$abc$109383$new_n61280_
+.subckt and21nor_x1 i0=$abc$109383$new_n61280_ i1=soc.hb_ctr[9] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61281_
+.subckt and2_x1 i0=$abc$109383$new_n61281_ i1=$abc$109383$new_n61279_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109036
+.subckt and4_x1 i0=$abc$109383$new_n61271_ i1=soc.hb_ctr[9] i2=soc.hb_ctr[8] i3=soc.hb_ctr[7] q=$abc$109383$new_n61283_
 .subckt nand2_x0 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[10] nq=$abc$109383$new_n61284_
-.subckt ao22_x2 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[10] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61285_
-.subckt a2_x2 i0=$abc$109383$new_n61285_ i1=$abc$109383$new_n61284_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109038
+.subckt and21nor_x1 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[10] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61285_
+.subckt and2_x1 i0=$abc$109383$new_n61285_ i1=$abc$109383$new_n61284_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109038
 .subckt nand3_x0 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[11] i2=soc.hb_ctr[10] nq=$abc$109383$new_n61287_
-.subckt oa22_x2 i0=soc.hb_ctr[10] i1=$abc$109383$new_n61283_ i2=soc.hb_ctr[11] q=$abc$109383$new_n61288_
-.subckt a3_x2 i0=$abc$109383$new_n61288_ i1=$abc$109383$new_n61287_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109040
+.subckt or21nand_x1 i0=soc.hb_ctr[10] i1=$abc$109383$new_n61283_ i2=soc.hb_ctr[11] nq=$abc$109383$new_n61288_
+.subckt and3_x1 i0=$abc$109383$new_n61288_ i1=$abc$109383$new_n61287_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109040
 .subckt nand4_x0 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[12] i2=soc.hb_ctr[11] i3=soc.hb_ctr[10] nq=$abc$109383$new_n61290_
-.subckt a3_x2 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[11] i2=soc.hb_ctr[10] q=$abc$109383$new_n61291_
-.subckt ao22_x2 i0=$abc$109383$new_n61291_ i1=soc.hb_ctr[12] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61292_
-.subckt a2_x2 i0=$abc$109383$new_n61292_ i1=$abc$109383$new_n61290_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109042
-.subckt a4_x2 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[12] i2=soc.hb_ctr[11] i3=soc.hb_ctr[10] q=$abc$109383$new_n61294_
+.subckt and3_x1 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[11] i2=soc.hb_ctr[10] q=$abc$109383$new_n61291_
+.subckt and21nor_x1 i0=$abc$109383$new_n61291_ i1=soc.hb_ctr[12] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61292_
+.subckt and2_x1 i0=$abc$109383$new_n61292_ i1=$abc$109383$new_n61290_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109042
+.subckt and4_x1 i0=$abc$109383$new_n61283_ i1=soc.hb_ctr[12] i2=soc.hb_ctr[11] i3=soc.hb_ctr[10] q=$abc$109383$new_n61294_
 .subckt nand2_x0 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[13] nq=$abc$109383$new_n61295_
-.subckt ao22_x2 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[13] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61296_
-.subckt a2_x2 i0=$abc$109383$new_n61296_ i1=$abc$109383$new_n61295_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109044
+.subckt and21nor_x1 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[13] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61296_
+.subckt and2_x1 i0=$abc$109383$new_n61296_ i1=$abc$109383$new_n61295_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109044
 .subckt nand3_x0 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[14] i2=soc.hb_ctr[13] nq=$abc$109383$new_n61298_
-.subckt oa22_x2 i0=soc.hb_ctr[13] i1=$abc$109383$new_n61294_ i2=soc.hb_ctr[14] q=$abc$109383$new_n61299_
-.subckt a3_x2 i0=$abc$109383$new_n61299_ i1=$abc$109383$new_n61298_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109046
+.subckt or21nand_x1 i0=soc.hb_ctr[13] i1=$abc$109383$new_n61294_ i2=soc.hb_ctr[14] nq=$abc$109383$new_n61299_
+.subckt and3_x1 i0=$abc$109383$new_n61299_ i1=$abc$109383$new_n61298_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109046
 .subckt nand4_x0 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[15] i2=soc.hb_ctr[14] i3=soc.hb_ctr[13] nq=$abc$109383$new_n61301_
-.subckt a3_x2 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[14] i2=soc.hb_ctr[13] q=$abc$109383$new_n61302_
-.subckt ao22_x2 i0=$abc$109383$new_n61302_ i1=soc.hb_ctr[15] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61303_
-.subckt a2_x2 i0=$abc$109383$new_n61303_ i1=$abc$109383$new_n61301_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109048
-.subckt a4_x2 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[15] i2=soc.hb_ctr[14] i3=soc.hb_ctr[13] q=$abc$109383$new_n61305_
+.subckt and3_x1 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[14] i2=soc.hb_ctr[13] q=$abc$109383$new_n61302_
+.subckt and21nor_x1 i0=$abc$109383$new_n61302_ i1=soc.hb_ctr[15] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61303_
+.subckt and2_x1 i0=$abc$109383$new_n61303_ i1=$abc$109383$new_n61301_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109048
+.subckt and4_x1 i0=$abc$109383$new_n61294_ i1=soc.hb_ctr[15] i2=soc.hb_ctr[14] i3=soc.hb_ctr[13] q=$abc$109383$new_n61305_
 .subckt nand2_x0 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[16] nq=$abc$109383$new_n61306_
-.subckt ao22_x2 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[16] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61307_
-.subckt a2_x2 i0=$abc$109383$new_n61307_ i1=$abc$109383$new_n61306_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109050
+.subckt and21nor_x1 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[16] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61307_
+.subckt and2_x1 i0=$abc$109383$new_n61307_ i1=$abc$109383$new_n61306_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109050
 .subckt nand3_x0 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[17] i2=soc.hb_ctr[16] nq=$abc$109383$new_n61309_
-.subckt oa22_x2 i0=soc.hb_ctr[16] i1=$abc$109383$new_n61305_ i2=soc.hb_ctr[17] q=$abc$109383$new_n61310_
-.subckt a3_x2 i0=$abc$109383$new_n61310_ i1=$abc$109383$new_n61309_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109052
+.subckt or21nand_x1 i0=soc.hb_ctr[16] i1=$abc$109383$new_n61305_ i2=soc.hb_ctr[17] nq=$abc$109383$new_n61310_
+.subckt and3_x1 i0=$abc$109383$new_n61310_ i1=$abc$109383$new_n61309_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109052
 .subckt nand4_x0 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[18] i2=soc.hb_ctr[17] i3=soc.hb_ctr[16] nq=$abc$109383$new_n61312_
-.subckt a3_x2 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[17] i2=soc.hb_ctr[16] q=$abc$109383$new_n61313_
-.subckt ao22_x2 i0=$abc$109383$new_n61313_ i1=soc.hb_ctr[18] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61314_
-.subckt a2_x2 i0=$abc$109383$new_n61314_ i1=$abc$109383$new_n61312_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109054
-.subckt a4_x2 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[18] i2=soc.hb_ctr[17] i3=soc.hb_ctr[16] q=$abc$109383$new_n61316_
+.subckt and3_x1 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[17] i2=soc.hb_ctr[16] q=$abc$109383$new_n61313_
+.subckt and21nor_x1 i0=$abc$109383$new_n61313_ i1=soc.hb_ctr[18] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61314_
+.subckt and2_x1 i0=$abc$109383$new_n61314_ i1=$abc$109383$new_n61312_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109054
+.subckt and4_x1 i0=$abc$109383$new_n61305_ i1=soc.hb_ctr[18] i2=soc.hb_ctr[17] i3=soc.hb_ctr[16] q=$abc$109383$new_n61316_
 .subckt nand2_x0 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[19] nq=$abc$109383$new_n61317_
-.subckt ao22_x2 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[19] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61318_
-.subckt a2_x2 i0=$abc$109383$new_n61318_ i1=$abc$109383$new_n61317_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109056
+.subckt and21nor_x1 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[19] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61318_
+.subckt and2_x1 i0=$abc$109383$new_n61318_ i1=$abc$109383$new_n61317_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109056
 .subckt nand3_x0 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[20] i2=soc.hb_ctr[19] nq=$abc$109383$new_n61320_
-.subckt oa22_x2 i0=soc.hb_ctr[19] i1=$abc$109383$new_n61316_ i2=soc.hb_ctr[20] q=$abc$109383$new_n61321_
-.subckt a3_x2 i0=$abc$109383$new_n61321_ i1=$abc$109383$new_n61320_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109058
+.subckt or21nand_x1 i0=soc.hb_ctr[19] i1=$abc$109383$new_n61316_ i2=soc.hb_ctr[20] nq=$abc$109383$new_n61321_
+.subckt and3_x1 i0=$abc$109383$new_n61321_ i1=$abc$109383$new_n61320_ i2=$abc$109383$new_n60990_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109058
 .subckt nand4_x0 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[21] i2=soc.hb_ctr[20] i3=soc.hb_ctr[19] nq=$abc$109383$new_n61323_
-.subckt a3_x2 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[20] i2=soc.hb_ctr[19] q=$abc$109383$new_n61324_
-.subckt ao22_x2 i0=$abc$109383$new_n61324_ i1=soc.hb_ctr[21] i2=$abc$109383$new_n61273_ q=$abc$109383$new_n61325_
-.subckt a2_x2 i0=$abc$109383$new_n61325_ i1=$abc$109383$new_n61323_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109060
-.subckt a4_x2 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[21] i2=soc.hb_ctr[20] i3=soc.hb_ctr[19] q=$abc$109383$new_n61327_
+.subckt and3_x1 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[20] i2=soc.hb_ctr[19] q=$abc$109383$new_n61324_
+.subckt and21nor_x1 i0=$abc$109383$new_n61324_ i1=soc.hb_ctr[21] i2=$abc$109383$new_n61273_ nq=$abc$109383$new_n61325_
+.subckt and2_x1 i0=$abc$109383$new_n61325_ i1=$abc$109383$new_n61323_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109060
+.subckt and4_x1 i0=$abc$109383$new_n61316_ i1=soc.hb_ctr[21] i2=soc.hb_ctr[20] i3=soc.hb_ctr[19] q=$abc$109383$new_n61327_
 .subckt nand2_x0 i0=$abc$109383$new_n61327_ i1=soc.hb_ctr[22] nq=$abc$109383$new_n61328_
-.subckt ao22_x2 i0=$abc$109383$new_n61327_ i1=soc.hb_ctr[22] i2=$abc$109383$new_n28054_ q=$abc$109383$new_n61329_
-.subckt a2_x2 i0=$abc$109383$new_n61329_ i1=$abc$109383$new_n61328_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109062
+.subckt and21nor_x1 i0=$abc$109383$new_n61327_ i1=soc.hb_ctr[22] i2=$abc$109383$new_n28054_ nq=$abc$109383$new_n61329_
+.subckt and2_x1 i0=$abc$109383$new_n61329_ i1=$abc$109383$new_n61328_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109062
 .subckt inv_x0 i=soc.hb_ctr[22] nq=$abc$109383$new_n61331_
-.subckt ao22_x2 i0=$abc$109383$new_n61331_ i1=$abc$109383$new_n61323_ i2=soc.hb_ctr[23] q=$abc$109383$new_n61332_
+.subckt and21nor_x1 i0=$abc$109383$new_n61331_ i1=$abc$109383$new_n61323_ i2=soc.hb_ctr[23] nq=$abc$109383$new_n61332_
 .subckt inv_x0 i=soc.hb_ctr[23] nq=$abc$109383$new_n61333_
-.subckt a3_x2 i0=$abc$109383$new_n61327_ i1=$abc$109383$new_n61333_ i2=soc.hb_ctr[22] q=$abc$109383$new_n61334_
-.subckt ao22_x2 i0=$abc$109383$new_n61334_ i1=$abc$109383$new_n61332_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109064
+.subckt and3_x1 i0=$abc$109383$new_n61327_ i1=$abc$109383$new_n61333_ i2=soc.hb_ctr[22] q=$abc$109383$new_n61334_
+.subckt and21nor_x1 i0=$abc$109383$new_n61334_ i1=$abc$109383$new_n61332_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109064
 .subckt inv_x0 i=soc.fsm_state nq=$abc$109383$new_n61336_
-.subckt oa22_x2 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60780_ i2=$abc$109383$new_n61336_ q=$abc$109383$new_n61337_
+.subckt or21nand_x1 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60780_ i2=$abc$109383$new_n61336_ nq=$abc$109383$new_n61337_
 .subckt buf_x4 i=$abc$109383$new_n61337_ q=$abc$109383$new_n61338_
 .subckt nand3_x0 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n60786_ i2=soc.divisor[0] nq=$abc$109383$new_n61339_
 .subckt buf_x4 i=soc.fsm_state q=$abc$109383$new_n61340_
-.subckt o3_x2 i0=$abc$109383$new_n60800_ i1=soc.timer$123[0] i2=$abc$109383$new_n61340_ q=$abc$109383$new_n61341_
-.subckt a2_x2 i0=$abc$109383$new_n61341_ i1=$abc$109383$new_n27603_ q=$abc$109383$new_n61342_
+.subckt or3_x1 i0=$abc$109383$new_n60800_ i1=soc.timer$123[0] i2=$abc$109383$new_n61340_ q=$abc$109383$new_n61341_
+.subckt and2_x1 i0=$abc$109383$new_n61341_ i1=$abc$109383$new_n27603_ q=$abc$109383$new_n61342_
 .subckt buf_x4 i=$abc$109383$new_n61337_ q=$abc$109383$new_n61343_
 .subckt inv_x0 i=soc.timer$123[0] nq=$abc$109383$new_n61344_
-.subckt ao22_x2 i0=$abc$109383$new_n61344_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61342_ q=$abc$109383$new_n61345_
-.subckt a2_x2 i0=$abc$109383$new_n61345_ i1=$abc$109383$new_n61339_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109068
-.subckt o3_x2 i0=$abc$109383$new_n60800_ i1=soc.timer$123[1] i2=$abc$109383$new_n60770_ q=$abc$109383$new_n61347_
-.subckt a2_x2 i0=$abc$109383$new_n61347_ i1=$abc$109383$new_n27536_ q=$abc$109383$new_n61348_
-.subckt xr2_x1 i0=soc.timer$123[1] i1=soc.timer$123[0] q=$abc$109383$new_n61349_
+.subckt and21nor_x1 i0=$abc$109383$new_n61344_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61342_ nq=$abc$109383$new_n61345_
+.subckt and2_x1 i0=$abc$109383$new_n61345_ i1=$abc$109383$new_n61339_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109068
+.subckt or3_x1 i0=$abc$109383$new_n60800_ i1=soc.timer$123[1] i2=$abc$109383$new_n60770_ q=$abc$109383$new_n61347_
+.subckt and2_x1 i0=$abc$109383$new_n61347_ i1=$abc$109383$new_n27536_ q=$abc$109383$new_n61348_
+.subckt xor2_x0 i0=soc.timer$123[1] i1=soc.timer$123[0] q=$abc$109383$new_n61349_
 .subckt nand2_x0 i0=$abc$109383$new_n61349_ i1=$abc$109383$new_n60770_ nq=$abc$109383$new_n61350_
 .subckt nand4_x0 i0=$abc$109383$new_n60779_ i1=$abc$109383$new_n60774_ i2=$abc$109383$new_n60773_ i3=$abc$109383$new_n60772_ nq=$abc$109383$new_n61351_
-.subckt o2_x2 i0=soc.timer$123[11] i1=soc.timer$123[10] q=$abc$109383$new_n61352_
-.subckt ao22_x2 i0=$abc$109383$new_n61352_ i1=$abc$109383$new_n61351_ i2=soc.fsm_state q=$abc$109383$new_n61353_
+.subckt or2_x1 i0=soc.timer$123[11] i1=soc.timer$123[10] q=$abc$109383$new_n61352_
+.subckt and21nor_x1 i0=$abc$109383$new_n61352_ i1=$abc$109383$new_n61351_ i2=soc.fsm_state nq=$abc$109383$new_n61353_
 .subckt buf_x4 i=$abc$109383$new_n61353_ q=$abc$109383$new_n61354_
 .subckt nor2_x0 i0=soc.tx_fifo.r_rdy i1=soc.fsm_state nq=$abc$109383$new_n61355_
-.subckt ao22_x2 i0=$abc$109383$new_n61355_ i1=$abc$109383$new_n61354_ i2=$abc$109383$new_n61350_ q=$abc$109383$new_n61356_
-.subckt nxr2_x1 i0=soc.divisor[1] i1=soc.divisor[0] nq=$abc$109383$new_n61357_
-.subckt a2_x2 i0=$abc$109383$new_n61343_ i1=$abc$109383$new_n61357_ q=$abc$109383$new_n61358_
-.subckt ao22_x2 i0=$abc$109383$new_n61358_ i1=$abc$109383$new_n61356_ i2=$abc$109383$new_n61348_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109072
-.subckt nxr2_x1 i0=$abc$109383$new_n27933_ i1=$abc$109383$new_n27923_ nq=$abc$109383$new_n61360_
+.subckt and21nor_x1 i0=$abc$109383$new_n61355_ i1=$abc$109383$new_n61354_ i2=$abc$109383$new_n61350_ nq=$abc$109383$new_n61356_
+.subckt nexor2_x0 i0=soc.divisor[1] i1=soc.divisor[0] nq=$abc$109383$new_n61357_
+.subckt and2_x1 i0=$abc$109383$new_n61343_ i1=$abc$109383$new_n61357_ q=$abc$109383$new_n61358_
+.subckt and21nor_x1 i0=$abc$109383$new_n61358_ i1=$abc$109383$new_n61356_ i2=$abc$109383$new_n61348_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109072
+.subckt nexor2_x0 i0=$abc$109383$new_n27933_ i1=$abc$109383$new_n27923_ nq=$abc$109383$new_n61360_
 .subckt nand3_x0 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n60786_ i2=$abc$109383$new_n61360_ nq=$abc$109383$new_n61361_
 .subckt inv_x0 i=soc.timer$123[2] nq=$abc$109383$new_n61362_
-.subckt ao22_x2 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n61362_ i2=$abc$109383$new_n27584_ q=$abc$109383$new_n61363_
+.subckt and21nor_x1 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n61362_ i2=$abc$109383$new_n27584_ nq=$abc$109383$new_n61363_
 .subckt nor2_x0 i0=soc.timer$123[1] i1=soc.timer$123[0] nq=$abc$109383$new_n61364_
-.subckt nxr2_x1 i0=$abc$109383$new_n61364_ i1=soc.timer$123[2] nq=$abc$109383$new_n61365_
-.subckt ao22_x2 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61365_ i2=$abc$109383$new_n61363_ q=$abc$109383$new_n61366_
+.subckt nexor2_x0 i0=$abc$109383$new_n61364_ i1=soc.timer$123[2] nq=$abc$109383$new_n61365_
+.subckt and21nor_x1 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61365_ i2=$abc$109383$new_n61363_ nq=$abc$109383$new_n61366_
 .subckt nand2_x0 i0=$abc$109383$new_n61366_ i1=$abc$109383$new_n61361_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109076
 .subckt nand2_x0 i0=$abc$109383$new_n61355_ i1=soc.timer$123[3] nq=$abc$109383$new_n61368_
 .subckt nand2_x0 i0=$abc$109383$new_n60800_ i1=$abc$109383$new_n61336_ nq=$abc$109383$new_n61369_
-.subckt ao22_x2 i0=$abc$109383$new_n27948_ i1=$abc$109383$new_n61369_ i2=$abc$109383$new_n61368_ q=$abc$109383$new_n61370_
+.subckt and21nor_x1 i0=$abc$109383$new_n27948_ i1=$abc$109383$new_n61369_ i2=$abc$109383$new_n61368_ nq=$abc$109383$new_n61370_
 .subckt nand2_x0 i0=$abc$109383$new_n61370_ i1=$abc$109383$new_n28649_ nq=$abc$109383$new_n61371_
 .subckt inv_x0 i=soc.timer$123[3] nq=$abc$109383$new_n61372_
 .subckt nor3_x0 i0=soc.timer$123[2] i1=soc.timer$123[1] i2=soc.timer$123[0] nq=$abc$109383$new_n61373_
-.subckt nxr2_x1 i0=$abc$109383$new_n61373_ i1=$abc$109383$new_n61372_ nq=$abc$109383$new_n61374_
-.subckt a2_x2 i0=$abc$109383$new_n61374_ i1=$abc$109383$new_n60770_ q=$abc$109383$new_n61375_
+.subckt nexor2_x0 i0=$abc$109383$new_n61373_ i1=$abc$109383$new_n61372_ nq=$abc$109383$new_n61374_
+.subckt and2_x1 i0=$abc$109383$new_n61374_ i1=$abc$109383$new_n60770_ q=$abc$109383$new_n61375_
 .subckt nand3_x0 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n27948_ nq=$abc$109383$new_n61376_
-.subckt oa22_x2 i0=$abc$109383$new_n61376_ i1=$abc$109383$new_n61375_ i2=$abc$109383$new_n61371_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109080
-.subckt nxr2_x1 i0=$abc$109383$new_n60778_ i1=soc.timer$123[4] nq=$abc$109383$new_n61378_
-.subckt nxr2_x1 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27945_ nq=$abc$109383$new_n61379_
+.subckt or21nand_x1 i0=$abc$109383$new_n61376_ i1=$abc$109383$new_n61375_ i2=$abc$109383$new_n61371_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109080
+.subckt nexor2_x0 i0=$abc$109383$new_n60778_ i1=soc.timer$123[4] nq=$abc$109383$new_n61378_
+.subckt nexor2_x0 i0=$abc$109383$new_n27960_ i1=$abc$109383$new_n27945_ nq=$abc$109383$new_n61379_
 .subckt buf_x4 i=$abc$109383$new_n60785_ q=$abc$109383$new_n61380_
 .subckt nand2_x0 i0=$abc$109383$new_n61380_ i1=$abc$109383$new_n61379_ nq=$abc$109383$new_n61381_
-.subckt mx2_x2 cmd=$abc$109383$new_n61354_ i0=$abc$109383$new_n61381_ i1=$abc$109383$new_n61378_ q=$abc$109383$new_n61382_
-.subckt ao22_x2 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n60775_ i2=$abc$109383$new_n56430_ q=$abc$109383$new_n61383_
+.subckt mux2_x1 cmd=$abc$109383$new_n61354_ i0=$abc$109383$new_n61381_ i1=$abc$109383$new_n61378_ q=$abc$109383$new_n61382_
+.subckt and21nor_x1 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n60775_ i2=$abc$109383$new_n56430_ nq=$abc$109383$new_n61383_
 .subckt nand2_x0 i0=$abc$109383$new_n61383_ i1=$abc$109383$new_n61382_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109084
-.subckt nxr2_x1 i0=$abc$109383$new_n27971_ i1=$abc$109383$new_n27958_ nq=$abc$109383$new_n61385_
-.subckt a2_x2 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n61385_ q=$abc$109383$new_n61386_
+.subckt nexor2_x0 i0=$abc$109383$new_n27971_ i1=$abc$109383$new_n27958_ nq=$abc$109383$new_n61385_
+.subckt and2_x1 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n61385_ q=$abc$109383$new_n61386_
 .subckt nand2_x0 i0=$abc$109383$new_n61386_ i1=$abc$109383$new_n61338_ nq=$abc$109383$new_n61387_
-.subckt ao22_x2 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n60776_ i2=$abc$109383$new_n27584_ q=$abc$109383$new_n61388_
-.subckt a2_x2 i0=$abc$109383$new_n60778_ i1=$abc$109383$new_n60775_ q=$abc$109383$new_n61389_
-.subckt nxr2_x1 i0=$abc$109383$new_n61389_ i1=soc.timer$123[5] nq=$abc$109383$new_n61390_
-.subckt ao22_x2 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61390_ i2=$abc$109383$new_n61388_ q=$abc$109383$new_n61391_
+.subckt and21nor_x1 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n60776_ i2=$abc$109383$new_n27584_ nq=$abc$109383$new_n61388_
+.subckt and2_x1 i0=$abc$109383$new_n60778_ i1=$abc$109383$new_n60775_ q=$abc$109383$new_n61389_
+.subckt nexor2_x0 i0=$abc$109383$new_n61389_ i1=soc.timer$123[5] nq=$abc$109383$new_n61390_
+.subckt and21nor_x1 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61390_ i2=$abc$109383$new_n61388_ nq=$abc$109383$new_n61391_
 .subckt nand2_x0 i0=$abc$109383$new_n61391_ i1=$abc$109383$new_n61387_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109088
-.subckt nxr2_x1 i0=$abc$109383$new_n27983_ i1=$abc$109383$new_n27969_ nq=$abc$109383$new_n61393_
+.subckt nexor2_x0 i0=$abc$109383$new_n27983_ i1=$abc$109383$new_n27969_ nq=$abc$109383$new_n61393_
 .subckt nand3_x0 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n60786_ i2=$abc$109383$new_n61393_ nq=$abc$109383$new_n61394_
-.subckt ao22_x2 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n60777_ i2=$abc$109383$new_n27584_ q=$abc$109383$new_n61395_
-.subckt a3_x2 i0=$abc$109383$new_n60778_ i1=$abc$109383$new_n60776_ i2=$abc$109383$new_n60775_ q=$abc$109383$new_n61396_
-.subckt nxr2_x1 i0=$abc$109383$new_n61396_ i1=soc.timer$123[6] nq=$abc$109383$new_n61397_
-.subckt ao22_x2 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61397_ i2=$abc$109383$new_n61395_ q=$abc$109383$new_n61398_
+.subckt and21nor_x1 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n60777_ i2=$abc$109383$new_n27584_ nq=$abc$109383$new_n61395_
+.subckt and3_x1 i0=$abc$109383$new_n60778_ i1=$abc$109383$new_n60776_ i2=$abc$109383$new_n60775_ q=$abc$109383$new_n61396_
+.subckt nexor2_x0 i0=$abc$109383$new_n61396_ i1=soc.timer$123[6] nq=$abc$109383$new_n61397_
+.subckt and21nor_x1 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61397_ i2=$abc$109383$new_n61395_ nq=$abc$109383$new_n61398_
 .subckt nand2_x0 i0=$abc$109383$new_n61398_ i1=$abc$109383$new_n61394_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109092
-.subckt nxr2_x1 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n27981_ nq=$abc$109383$new_n61400_
+.subckt nexor2_x0 i0=$abc$109383$new_n27996_ i1=$abc$109383$new_n27981_ nq=$abc$109383$new_n61400_
 .subckt nand3_x0 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n60786_ i2=$abc$109383$new_n61400_ nq=$abc$109383$new_n61401_
-.subckt ao22_x2 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n60772_ i2=$abc$109383$new_n27584_ q=$abc$109383$new_n61402_
-.subckt nxr2_x1 i0=$abc$109383$new_n60779_ i1=soc.timer$123[7] nq=$abc$109383$new_n61403_
-.subckt ao22_x2 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61403_ i2=$abc$109383$new_n61402_ q=$abc$109383$new_n61404_
+.subckt and21nor_x1 i0=$abc$109383$new_n60785_ i1=$abc$109383$new_n60772_ i2=$abc$109383$new_n27584_ nq=$abc$109383$new_n61402_
+.subckt nexor2_x0 i0=$abc$109383$new_n60779_ i1=soc.timer$123[7] nq=$abc$109383$new_n61403_
+.subckt and21nor_x1 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n61403_ i2=$abc$109383$new_n61402_ nq=$abc$109383$new_n61404_
 .subckt nand2_x0 i0=$abc$109383$new_n61404_ i1=$abc$109383$new_n61401_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109096
 .subckt buf_x4 i=$abc$109383$new_n61355_ q=$abc$109383$new_n61406_
-.subckt a2_x2 i0=$abc$109383$new_n61406_ i1=soc.timer$123[8] q=$abc$109383$new_n61407_
-.subckt nxr2_x1 i0=$abc$109383$new_n28010_ i1=$abc$109383$new_n28021_ nq=$abc$109383$new_n61408_
+.subckt and2_x1 i0=$abc$109383$new_n61406_ i1=soc.timer$123[8] q=$abc$109383$new_n61407_
+.subckt nexor2_x0 i0=$abc$109383$new_n28010_ i1=$abc$109383$new_n28021_ nq=$abc$109383$new_n61408_
 .subckt nand3_x0 i0=$abc$109383$new_n61343_ i1=$abc$109383$new_n61380_ i2=$abc$109383$new_n61408_ nq=$abc$109383$new_n61409_
-.subckt a2_x2 i0=$abc$109383$new_n60779_ i1=$abc$109383$new_n60772_ q=$abc$109383$new_n61410_
-.subckt nxr2_x1 i0=$abc$109383$new_n61410_ i1=$abc$109383$new_n60773_ nq=$abc$109383$new_n61411_
+.subckt and2_x1 i0=$abc$109383$new_n60779_ i1=$abc$109383$new_n60772_ q=$abc$109383$new_n61410_
+.subckt nexor2_x0 i0=$abc$109383$new_n61410_ i1=$abc$109383$new_n60773_ nq=$abc$109383$new_n61411_
 .subckt nand2_x0 i0=$abc$109383$new_n61411_ i1=$abc$109383$new_n61354_ nq=$abc$109383$new_n61412_
 .subckt nand2_x0 i0=$abc$109383$new_n61412_ i1=$abc$109383$new_n61409_ nq=$abc$109383$new_n61413_
-.subckt ao22_x2 i0=$abc$109383$new_n61413_ i1=$abc$109383$new_n61407_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109100
-.subckt nxr2_x1 i0=$abc$109383$new_n28022_ i1=$abc$109383$new_n28003_ nq=$abc$109383$new_n61415_
+.subckt and21nor_x1 i0=$abc$109383$new_n61413_ i1=$abc$109383$new_n61407_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109100
+.subckt nexor2_x0 i0=$abc$109383$new_n28022_ i1=$abc$109383$new_n28003_ nq=$abc$109383$new_n61415_
 .subckt nand3_x0 i0=$abc$109383$new_n61338_ i1=$abc$109383$new_n60786_ i2=$abc$109383$new_n61415_ nq=$abc$109383$new_n61416_
 .subckt nand3_x0 i0=$abc$109383$new_n60779_ i1=$abc$109383$new_n60773_ i2=$abc$109383$new_n60772_ nq=$abc$109383$new_n61417_
 .subckt nand2_x0 i0=$abc$109383$new_n61417_ i1=soc.timer$123[9] nq=$abc$109383$new_n61418_
 .subckt nand2_x0 i0=$abc$109383$new_n61352_ i1=$abc$109383$new_n60781_ nq=$abc$109383$new_n61419_
-.subckt oa22_x2 i0=$abc$109383$new_n61419_ i1=$abc$109383$new_n61418_ i2=$abc$109383$new_n61336_ q=$abc$109383$new_n61420_
-.subckt ao22_x2 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n60774_ i2=$abc$109383$new_n28649_ q=$abc$109383$new_n61421_
+.subckt or21nand_x1 i0=$abc$109383$new_n61419_ i1=$abc$109383$new_n61418_ i2=$abc$109383$new_n61336_ nq=$abc$109383$new_n61420_
+.subckt and21nor_x1 i0=$abc$109383$new_n60786_ i1=$abc$109383$new_n60774_ i2=$abc$109383$new_n28649_ nq=$abc$109383$new_n61421_
 .subckt nand3_x0 i0=$abc$109383$new_n61421_ i1=$abc$109383$new_n61420_ i2=$abc$109383$new_n61416_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109104
-.subckt a2_x2 i0=$abc$109383$new_n61406_ i1=soc.timer$123[10] q=$abc$109383$new_n61423_
+.subckt and2_x1 i0=$abc$109383$new_n61406_ i1=soc.timer$123[10] q=$abc$109383$new_n61423_
 .subckt nand2_x0 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n28035_ nq=$abc$109383$new_n61424_
 .subckt inv_x0 i=soc.timer$123[10] nq=$abc$109383$new_n61425_
-.subckt nxr2_x1 i0=$abc$109383$new_n60781_ i1=$abc$109383$new_n61425_ nq=$abc$109383$new_n61426_
-.subckt a2_x2 i0=$abc$109383$new_n61426_ i1=$abc$109383$new_n60770_ q=$abc$109383$new_n61427_
-.subckt nxr2_x1 i0=$abc$109383$new_n28034_ i1=$abc$109383$new_n28040_ nq=$abc$109383$new_n61428_
-.subckt a2_x2 i0=$abc$109383$new_n60800_ i1=$abc$109383$new_n61336_ q=$abc$109383$new_n61429_
-.subckt a2_x2 i0=$abc$109383$new_n61429_ i1=$abc$109383$new_n61428_ q=$abc$109383$new_n61430_
-.subckt ao22_x2 i0=$abc$109383$new_n61430_ i1=$abc$109383$new_n61427_ i2=$abc$109383$new_n61424_ q=$abc$109383$new_n61431_
-.subckt ao22_x2 i0=$abc$109383$new_n61431_ i1=$abc$109383$new_n61423_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109108
-.subckt oa22_x2 i0=$abc$109383$new_n61355_ i1=soc.timer$123[11] i2=$abc$109383$new_n27420_ q=$abc$109383$new_n61433_
-.subckt a2_x2 i0=soc.timer$123[11] i1=soc.fsm_state q=$abc$109383$new_n61434_
-.subckt ao22_x2 i0=soc.timer$123[10] i1=$abc$109383$new_n61351_ i2=$abc$109383$new_n61434_ q=$abc$109383$new_n61435_
-.subckt o2_x2 i0=$abc$109383$new_n61435_ i1=$abc$109383$new_n61433_ q=$abc$109383$new_n61436_
+.subckt nexor2_x0 i0=$abc$109383$new_n60781_ i1=$abc$109383$new_n61425_ nq=$abc$109383$new_n61426_
+.subckt and2_x1 i0=$abc$109383$new_n61426_ i1=$abc$109383$new_n60770_ q=$abc$109383$new_n61427_
+.subckt nexor2_x0 i0=$abc$109383$new_n28034_ i1=$abc$109383$new_n28040_ nq=$abc$109383$new_n61428_
+.subckt and2_x1 i0=$abc$109383$new_n60800_ i1=$abc$109383$new_n61336_ q=$abc$109383$new_n61429_
+.subckt and2_x1 i0=$abc$109383$new_n61429_ i1=$abc$109383$new_n61428_ q=$abc$109383$new_n61430_
+.subckt and21nor_x1 i0=$abc$109383$new_n61430_ i1=$abc$109383$new_n61427_ i2=$abc$109383$new_n61424_ nq=$abc$109383$new_n61431_
+.subckt and21nor_x1 i0=$abc$109383$new_n61431_ i1=$abc$109383$new_n61423_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109108
+.subckt or21nand_x1 i0=$abc$109383$new_n61355_ i1=soc.timer$123[11] i2=$abc$109383$new_n27420_ nq=$abc$109383$new_n61433_
+.subckt and2_x1 i0=soc.timer$123[11] i1=soc.fsm_state q=$abc$109383$new_n61434_
+.subckt and21nor_x1 i0=soc.timer$123[10] i1=$abc$109383$new_n61351_ i2=$abc$109383$new_n61434_ nq=$abc$109383$new_n61435_
+.subckt or2_x1 i0=$abc$109383$new_n61435_ i1=$abc$109383$new_n61433_ q=$abc$109383$new_n61436_
 .subckt nand3_x0 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n60770_ nq=$abc$109383$new_n61437_
 .subckt nand2_x0 i0=$abc$109383$new_n61369_ i1=$abc$109383$new_n61437_ nq=$abc$109383$new_n61438_
-.subckt oa22_x2 i0=$abc$109383$new_n28042_ i1=$abc$109383$new_n61438_ i2=$abc$109383$new_n61436_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109112
+.subckt or21nand_x1 i0=$abc$109383$new_n28042_ i1=$abc$109383$new_n61438_ i2=$abc$109383$new_n61436_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109112
 .subckt inv_x0 i=soc.bitno[0] nq=$abc$109383$new_n61440_
-.subckt oa22_x2 i0=$abc$109383$new_n61336_ i1=$abc$109383$new_n60800_ i2=soc.bitno[0] q=$abc$109383$new_n61441_
-.subckt a3_x2 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n61340_ q=$abc$109383$new_n61442_
-.subckt mx2_x2 cmd=$abc$109383$new_n61442_ i0=$abc$109383$new_n61441_ i1=$abc$109383$new_n61440_ q=$abc$109383$new_n61443_
-.subckt a2_x2 i0=$abc$109383$new_n61443_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109116
+.subckt or21nand_x1 i0=$abc$109383$new_n61336_ i1=$abc$109383$new_n60800_ i2=soc.bitno[0] nq=$abc$109383$new_n61441_
+.subckt and3_x1 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n61340_ q=$abc$109383$new_n61442_
+.subckt mux2_x1 cmd=$abc$109383$new_n61442_ i0=$abc$109383$new_n61441_ i1=$abc$109383$new_n61440_ q=$abc$109383$new_n61443_
+.subckt and2_x1 i0=$abc$109383$new_n61443_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109116
 .subckt inv_x0 i=soc.bitno[1] nq=$abc$109383$new_n61445_
 .subckt inv_x0 i=$abc$109383$new_n60800_ nq=$abc$109383$new_n61446_
-.subckt ao22_x2 i0=$abc$109383$new_n61340_ i1=$abc$109383$new_n61446_ i2=soc.bitno[1] q=$abc$109383$new_n61447_
-.subckt a4_x2 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n61440_ i3=$abc$109383$new_n61340_ q=$abc$109383$new_n61448_
-.subckt mx2_x2 cmd=$abc$109383$new_n61448_ i0=$abc$109383$new_n61447_ i1=$abc$109383$new_n61445_ q=$abc$109383$new_n61449_
-.subckt a2_x2 i0=$abc$109383$new_n61449_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109120
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.bitno[2] q=$abc$109383$new_n61451_
+.subckt and21nor_x1 i0=$abc$109383$new_n61340_ i1=$abc$109383$new_n61446_ i2=soc.bitno[1] nq=$abc$109383$new_n61447_
+.subckt and4_x1 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=$abc$109383$new_n61440_ i3=$abc$109383$new_n61340_ q=$abc$109383$new_n61448_
+.subckt mux2_x1 cmd=$abc$109383$new_n61448_ i0=$abc$109383$new_n61447_ i1=$abc$109383$new_n61445_ q=$abc$109383$new_n61449_
+.subckt and2_x1 i0=$abc$109383$new_n61449_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109120
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.bitno[2] nq=$abc$109383$new_n61451_
 .subckt inv_x0 i=soc.bitno[2] nq=$abc$109383$new_n61452_
 .subckt nor2_x0 i0=soc.bitno[1] i1=soc.bitno[0] nq=$abc$109383$new_n61453_
-.subckt nxr2_x1 i0=$abc$109383$new_n61453_ i1=$abc$109383$new_n61452_ nq=$abc$109383$new_n61454_
-.subckt a4_x2 i0=$abc$109383$new_n61454_ i1=$abc$109383$new_n60783_ i2=$abc$109383$new_n60781_ i3=$abc$109383$new_n60770_ q=$abc$109383$new_n61455_
-.subckt ao22_x2 i0=$abc$109383$new_n61455_ i1=$abc$109383$new_n61451_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109124
-.subckt oa22_x2 i0=$abc$109383$new_n61343_ i1=$abc$109383$new_n60786_ i2=soc.bitno[3] q=$abc$109383$new_n61457_
+.subckt nexor2_x0 i0=$abc$109383$new_n61453_ i1=$abc$109383$new_n61452_ nq=$abc$109383$new_n61454_
+.subckt and4_x1 i0=$abc$109383$new_n61454_ i1=$abc$109383$new_n60783_ i2=$abc$109383$new_n60781_ i3=$abc$109383$new_n60770_ q=$abc$109383$new_n61455_
+.subckt and21nor_x1 i0=$abc$109383$new_n61455_ i1=$abc$109383$new_n61451_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109124
+.subckt or21nand_x1 i0=$abc$109383$new_n61343_ i1=$abc$109383$new_n60786_ i2=soc.bitno[3] nq=$abc$109383$new_n61457_
 .subckt nor3_x0 i0=soc.bitno[2] i1=soc.bitno[1] i2=soc.bitno[0] nq=$abc$109383$new_n61458_
-.subckt nxr2_x1 i0=$abc$109383$new_n61458_ i1=soc.bitno[3] nq=$abc$109383$new_n61459_
+.subckt nexor2_x0 i0=$abc$109383$new_n61458_ i1=soc.bitno[3] nq=$abc$109383$new_n61459_
 .subckt nand4_x0 i0=$abc$109383$new_n61459_ i1=$abc$109383$new_n60783_ i2=$abc$109383$new_n60781_ i3=$abc$109383$new_n60770_ nq=$abc$109383$new_n61460_
-.subckt a2_x2 i0=$abc$109383$new_n61460_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n61461_
-.subckt a2_x2 i0=$abc$109383$new_n61461_ i1=$abc$109383$new_n61457_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109128
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__start q=$abc$109383$new_n61463_
-.subckt a4_x2 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=soc.shreg__data[0] i3=$abc$109383$new_n60770_ q=$abc$109383$new_n61464_
-.subckt ao22_x2 i0=$abc$109383$new_n61464_ i1=$abc$109383$new_n61463_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109132
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[0] q=$abc$109383$new_n61466_
-.subckt mx2_x2 cmd=$abc$109383$new_n61340_ i0=soc.data[0] i1=soc.shreg__data[1] q=$abc$109383$new_n61467_
-.subckt a3_x2 i0=$abc$109383$new_n61467_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61468_
-.subckt ao22_x2 i0=$abc$109383$new_n61468_ i1=$abc$109383$new_n61466_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109136
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[1] q=$abc$109383$new_n61470_
-.subckt mx2_x2 cmd=$abc$109383$new_n61340_ i0=soc.data[1] i1=soc.shreg__data[2] q=$abc$109383$new_n61471_
-.subckt a3_x2 i0=$abc$109383$new_n61471_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61472_
-.subckt ao22_x2 i0=$abc$109383$new_n61472_ i1=$abc$109383$new_n61470_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109140
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[2] q=$abc$109383$new_n61474_
-.subckt mx2_x2 cmd=$abc$109383$new_n61340_ i0=soc.data[2] i1=soc.shreg__data[3] q=$abc$109383$new_n61475_
-.subckt a3_x2 i0=$abc$109383$new_n61475_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61476_
-.subckt ao22_x2 i0=$abc$109383$new_n61476_ i1=$abc$109383$new_n61474_ i2=$abc$109383$new_n61106_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109144
+.subckt and2_x1 i0=$abc$109383$new_n61460_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n61461_
+.subckt and2_x1 i0=$abc$109383$new_n61461_ i1=$abc$109383$new_n61457_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109128
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__start nq=$abc$109383$new_n61463_
+.subckt and4_x1 i0=$abc$109383$new_n60783_ i1=$abc$109383$new_n60781_ i2=soc.shreg__data[0] i3=$abc$109383$new_n60770_ q=$abc$109383$new_n61464_
+.subckt and21nor_x1 i0=$abc$109383$new_n61464_ i1=$abc$109383$new_n61463_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109132
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[0] nq=$abc$109383$new_n61466_
+.subckt mux2_x1 cmd=$abc$109383$new_n61340_ i0=soc.data[0] i1=soc.shreg__data[1] q=$abc$109383$new_n61467_
+.subckt and3_x1 i0=$abc$109383$new_n61467_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61468_
+.subckt and21nor_x1 i0=$abc$109383$new_n61468_ i1=$abc$109383$new_n61466_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109136
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[1] nq=$abc$109383$new_n61470_
+.subckt mux2_x1 cmd=$abc$109383$new_n61340_ i0=soc.data[1] i1=soc.shreg__data[2] q=$abc$109383$new_n61471_
+.subckt and3_x1 i0=$abc$109383$new_n61471_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61472_
+.subckt and21nor_x1 i0=$abc$109383$new_n61472_ i1=$abc$109383$new_n61470_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109140
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[2] nq=$abc$109383$new_n61474_
+.subckt mux2_x1 cmd=$abc$109383$new_n61340_ i0=soc.data[2] i1=soc.shreg__data[3] q=$abc$109383$new_n61475_
+.subckt and3_x1 i0=$abc$109383$new_n61475_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61476_
+.subckt and21nor_x1 i0=$abc$109383$new_n61476_ i1=$abc$109383$new_n61474_ i2=$abc$109383$new_n61106_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109144
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n61478_
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[3] q=$abc$109383$new_n61479_
-.subckt mx2_x2 cmd=$abc$109383$new_n61340_ i0=soc.data[3] i1=soc.shreg__data[4] q=$abc$109383$new_n61480_
-.subckt a3_x2 i0=$abc$109383$new_n61480_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61481_
-.subckt ao22_x2 i0=$abc$109383$new_n61481_ i1=$abc$109383$new_n61479_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109148
-.subckt ao22_x2 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[4] q=$abc$109383$new_n61483_
-.subckt mx2_x2 cmd=$abc$109383$new_n61340_ i0=soc.data[4] i1=soc.shreg__data[5] q=$abc$109383$new_n61484_
-.subckt a3_x2 i0=$abc$109383$new_n61484_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61485_
-.subckt ao22_x2 i0=$abc$109383$new_n61485_ i1=$abc$109383$new_n61483_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109152
-.subckt ao22_x2 i0=$abc$109383$new_n61353_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[5] q=$abc$109383$new_n61487_
-.subckt mx2_x2 cmd=$abc$109383$new_n61340_ i0=soc.data[5] i1=soc.shreg__data[6] q=$abc$109383$new_n61488_
-.subckt a3_x2 i0=$abc$109383$new_n61488_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61489_
-.subckt ao22_x2 i0=$abc$109383$new_n61489_ i1=$abc$109383$new_n61487_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109156
-.subckt ao22_x2 i0=$abc$109383$new_n61353_ i1=$abc$109383$new_n61355_ i2=soc.shreg__data[6] q=$abc$109383$new_n61491_
-.subckt mx2_x2 cmd=soc.fsm_state i0=soc.data[6] i1=soc.shreg__data[7] q=$abc$109383$new_n61492_
-.subckt a3_x2 i0=$abc$109383$new_n61492_ i1=$abc$109383$new_n61337_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61493_
-.subckt ao22_x2 i0=$abc$109383$new_n61493_ i1=$abc$109383$new_n61491_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109160
-.subckt ao22_x2 i0=$abc$109383$new_n61353_ i1=$abc$109383$new_n61355_ i2=soc.shreg__data[7] q=$abc$109383$new_n61495_
-.subckt mx2_x2 cmd=soc.fsm_state i0=soc.data[7] i1=soc.shreg__stop q=$abc$109383$new_n61496_
-.subckt a3_x2 i0=$abc$109383$new_n61496_ i1=$abc$109383$new_n61337_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61497_
-.subckt ao22_x2 i0=$abc$109383$new_n61497_ i1=$abc$109383$new_n61495_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109164
-.subckt oa22_x2 i0=$abc$109383$new_n61336_ i1=$abc$109383$new_n60800_ i2=soc.shreg__stop q=$abc$109383$new_n61499_
-.subckt a2_x2 i0=$abc$109383$new_n61499_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n61500_
-.subckt a2_x2 i0=$abc$109383$new_n61500_ i1=$abc$109383$new_n61437_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109168
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[3] nq=$abc$109383$new_n61479_
+.subckt mux2_x1 cmd=$abc$109383$new_n61340_ i0=soc.data[3] i1=soc.shreg__data[4] q=$abc$109383$new_n61480_
+.subckt and3_x1 i0=$abc$109383$new_n61480_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61481_
+.subckt and21nor_x1 i0=$abc$109383$new_n61481_ i1=$abc$109383$new_n61479_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109148
+.subckt and21nor_x1 i0=$abc$109383$new_n61354_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[4] nq=$abc$109383$new_n61483_
+.subckt mux2_x1 cmd=$abc$109383$new_n61340_ i0=soc.data[4] i1=soc.shreg__data[5] q=$abc$109383$new_n61484_
+.subckt and3_x1 i0=$abc$109383$new_n61484_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61485_
+.subckt and21nor_x1 i0=$abc$109383$new_n61485_ i1=$abc$109383$new_n61483_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109152
+.subckt and21nor_x1 i0=$abc$109383$new_n61353_ i1=$abc$109383$new_n61406_ i2=soc.shreg__data[5] nq=$abc$109383$new_n61487_
+.subckt mux2_x1 cmd=$abc$109383$new_n61340_ i0=soc.data[5] i1=soc.shreg__data[6] q=$abc$109383$new_n61488_
+.subckt and3_x1 i0=$abc$109383$new_n61488_ i1=$abc$109383$new_n61343_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61489_
+.subckt and21nor_x1 i0=$abc$109383$new_n61489_ i1=$abc$109383$new_n61487_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109156
+.subckt and21nor_x1 i0=$abc$109383$new_n61353_ i1=$abc$109383$new_n61355_ i2=soc.shreg__data[6] nq=$abc$109383$new_n61491_
+.subckt mux2_x1 cmd=soc.fsm_state i0=soc.data[6] i1=soc.shreg__data[7] q=$abc$109383$new_n61492_
+.subckt and3_x1 i0=$abc$109383$new_n61492_ i1=$abc$109383$new_n61337_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61493_
+.subckt and21nor_x1 i0=$abc$109383$new_n61493_ i1=$abc$109383$new_n61491_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109160
+.subckt and21nor_x1 i0=$abc$109383$new_n61353_ i1=$abc$109383$new_n61355_ i2=soc.shreg__data[7] nq=$abc$109383$new_n61495_
+.subckt mux2_x1 cmd=soc.fsm_state i0=soc.data[7] i1=soc.shreg__stop q=$abc$109383$new_n61496_
+.subckt and3_x1 i0=$abc$109383$new_n61496_ i1=$abc$109383$new_n61337_ i2=$abc$109383$new_n61380_ q=$abc$109383$new_n61497_
+.subckt and21nor_x1 i0=$abc$109383$new_n61497_ i1=$abc$109383$new_n61495_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109164
+.subckt or21nand_x1 i0=$abc$109383$new_n61336_ i1=$abc$109383$new_n60800_ i2=soc.shreg__stop nq=$abc$109383$new_n61499_
+.subckt and2_x1 i0=$abc$109383$new_n61499_ i1=$abc$109383$new_n27848_ q=$abc$109383$new_n61500_
+.subckt and2_x1 i0=$abc$109383$new_n61500_ i1=$abc$109383$new_n61437_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109168
 .subckt inv_x0 i=soc.shreg__start nq=$abc$109383$new_n61502_
 .subckt inv_x0 i=soc.o nq=$abc$109383$new_n61503_
-.subckt mx2_x2 cmd=$abc$109383$new_n61442_ i0=$abc$109383$new_n61503_ i1=$abc$109383$new_n61502_ q=$abc$109383$new_n61504_
+.subckt mux2_x1 cmd=$abc$109383$new_n61442_ i0=$abc$109383$new_n61503_ i1=$abc$109383$new_n61502_ q=$abc$109383$new_n61504_
 .subckt nand2_x0 i0=$abc$109383$new_n61504_ i1=$abc$109383$new_n28536_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109172
 .subckt buf_x4 i=soc.bridge.csr_mux_0.uart_divisor__w_stb q=$abc$109383$new_n61506_
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[0] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[0] q=$abc$109383$new_n61507_
-.subckt a2_x2 i0=$abc$109383$new_n61507_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109176
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[1] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[1] q=$abc$109383$new_n61509_
-.subckt a2_x2 i0=$abc$109383$new_n61509_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109180
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[2] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[2] q=$abc$109383$new_n61511_
-.subckt o2_x2 i0=$abc$109383$new_n61511_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109184
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[3] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[3] q=$abc$109383$new_n61513_
-.subckt o2_x2 i0=$abc$109383$new_n61513_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109188
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[4] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[4] q=$abc$109383$new_n61515_
-.subckt o2_x2 i0=$abc$109383$new_n61515_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109192
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[5] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[5] q=$abc$109383$new_n61517_
-.subckt o2_x2 i0=$abc$109383$new_n61517_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109196
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[6] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[6] q=$abc$109383$new_n61519_
-.subckt o2_x2 i0=$abc$109383$new_n61519_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109200
-.subckt mx2_x2 cmd=soc.bridge.csr_mux_0.uart_divisor__w_stb i0=soc.divisor[7] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[7] q=$abc$109383$new_n61521_
-.subckt o2_x2 i0=$abc$109383$new_n61521_ i1=$abc$109383$new_n28455_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109204
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[8] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[8] q=$abc$109383$new_n61523_
-.subckt a2_x2 i0=$abc$109383$new_n61523_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109208
-.subckt mx2_x2 cmd=soc.bridge.csr_mux_0.uart_divisor__w_stb i0=soc.divisor[9] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[9] q=$abc$109383$new_n61525_
-.subckt o2_x2 i0=$abc$109383$new_n61525_ i1=$abc$109383$new_n28455_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109212
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[0] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[0] q=$abc$109383$new_n61507_
+.subckt and2_x1 i0=$abc$109383$new_n61507_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109176
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[1] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[1] q=$abc$109383$new_n61509_
+.subckt and2_x1 i0=$abc$109383$new_n61509_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109180
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[2] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[2] q=$abc$109383$new_n61511_
+.subckt or2_x1 i0=$abc$109383$new_n61511_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109184
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[3] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[3] q=$abc$109383$new_n61513_
+.subckt or2_x1 i0=$abc$109383$new_n61513_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109188
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[4] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[4] q=$abc$109383$new_n61515_
+.subckt or2_x1 i0=$abc$109383$new_n61515_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109192
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[5] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[5] q=$abc$109383$new_n61517_
+.subckt or2_x1 i0=$abc$109383$new_n61517_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109196
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[6] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[6] q=$abc$109383$new_n61519_
+.subckt or2_x1 i0=$abc$109383$new_n61519_ i1=$abc$109383$new_n28494_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109200
+.subckt mux2_x1 cmd=soc.bridge.csr_mux_0.uart_divisor__w_stb i0=soc.divisor[7] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[7] q=$abc$109383$new_n61521_
+.subckt or2_x1 i0=$abc$109383$new_n61521_ i1=$abc$109383$new_n28455_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109204
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[8] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[8] q=$abc$109383$new_n61523_
+.subckt and2_x1 i0=$abc$109383$new_n61523_ i1=$abc$109383$new_n61227_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109208
+.subckt mux2_x1 cmd=soc.bridge.csr_mux_0.uart_divisor__w_stb i0=soc.divisor[9] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[9] q=$abc$109383$new_n61525_
+.subckt or2_x1 i0=$abc$109383$new_n61525_ i1=$abc$109383$new_n28455_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109212
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61527_
-.subckt mx2_x2 cmd=$abc$109383$new_n61506_ i0=soc.divisor[10] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[10] q=$abc$109383$new_n61528_
-.subckt a2_x2 i0=$abc$109383$new_n61528_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109216
-.subckt mx2_x2 cmd=soc.bridge.csr_mux_0.uart_divisor__w_stb i0=soc.divisor[11] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[11] q=$abc$109383$new_n61530_
-.subckt o2_x2 i0=$abc$109383$new_n61530_ i1=$abc$109383$new_n28455_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109220
-.subckt mx2_x2 cmd=$abc$109383$new_n54068_ i0=$abc$109383$new_n55130_ i1=$abc$109383$new_n54039_ q=$abc$109383$new_n61532_
+.subckt mux2_x1 cmd=$abc$109383$new_n61506_ i0=soc.divisor[10] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[10] q=$abc$109383$new_n61528_
+.subckt and2_x1 i0=$abc$109383$new_n61528_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109216
+.subckt mux2_x1 cmd=soc.bridge.csr_mux_0.uart_divisor__w_stb i0=soc.divisor[11] i1=soc.bridge.csr_mux_0.uart_divisor__shadow[11] q=$abc$109383$new_n61530_
+.subckt or2_x1 i0=$abc$109383$new_n61530_ i1=$abc$109383$new_n28455_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109220
+.subckt mux2_x1 cmd=$abc$109383$new_n54068_ i0=$abc$109383$new_n55130_ i1=$abc$109383$new_n54039_ q=$abc$109383$new_n61532_
 .subckt nand2_x0 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n55140_ nq=$abc$109383$new_n61533_
-.subckt a2_x2 i0=$abc$109383$new_n61533_ i1=$abc$109383$new_n61532_ q=$abc$109383$new_n61534_
+.subckt and2_x1 i0=$abc$109383$new_n61533_ i1=$abc$109383$new_n61532_ q=$abc$109383$new_n61534_
 .subckt nand2_x0 i0=$abc$109383$new_n61534_ i1=$abc$109383$new_n55490_ nq=$abc$109383$new_n61535_
-.subckt oa22_x2 i0=$abc$109383$new_n54059_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n61535_ q=$abc$109383$new_n61536_
-.subckt ao22_x2 i0=$abc$109383$new_n61532_ i1=soc.cpu.minerva.divider.quotient[0] i2=$abc$109383$new_n28054_ q=$abc$109383$new_n61537_
-.subckt a2_x2 i0=$abc$109383$new_n61537_ i1=$abc$109383$new_n61536_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109320
-.subckt oa22_x2 i0=$abc$109383$new_n55715_ i1=soc.cpu.minerva.divider.divisor[0] i2=soc.cpu.minerva.divider.quotient[31] q=$abc$109383$new_n61539_
+.subckt or21nand_x1 i0=$abc$109383$new_n54059_ i1=$abc$109383$new_n55746_ i2=$abc$109383$new_n61535_ nq=$abc$109383$new_n61536_
+.subckt and21nor_x1 i0=$abc$109383$new_n61532_ i1=soc.cpu.minerva.divider.quotient[0] i2=$abc$109383$new_n28054_ nq=$abc$109383$new_n61537_
+.subckt and2_x1 i0=$abc$109383$new_n61537_ i1=$abc$109383$new_n61536_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109320
+.subckt or21nand_x1 i0=$abc$109383$new_n55715_ i1=soc.cpu.minerva.divider.divisor[0] i2=soc.cpu.minerva.divider.quotient[31] nq=$abc$109383$new_n61539_
 .subckt nand3_x0 i0=$abc$109383$new_n55746_ i1=soc.cpu.minerva.divider.divisor[0] i2=soc.cpu.minerva.divider.quotient[31] nq=$abc$109383$new_n61540_
 .subckt nand3_x0 i0=$abc$109383$new_n61540_ i1=$abc$109383$new_n61539_ i2=$abc$109383$new_n54059_ nq=$abc$109383$new_n61541_
-.subckt a2_x2 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n61542_
+.subckt and2_x1 i0=$abc$109383$new_n30304_ i1=$abc$109383$new_n55140_ q=$abc$109383$new_n61542_
 .subckt nand4_x0 i0=$abc$109383$new_n61542_ i1=$abc$109383$new_n55145_ i2=$abc$109383$new_n55477_ i3=$abc$109383$new_n55476_ nq=$abc$109383$new_n61543_
-.subckt a2_x2 i0=$abc$109383$new_n61543_ i1=$abc$109383$new_n61532_ q=$abc$109383$new_n61544_
+.subckt and2_x1 i0=$abc$109383$new_n61543_ i1=$abc$109383$new_n61532_ q=$abc$109383$new_n61544_
 .subckt nand2_x0 i0=$abc$109383$new_n61544_ i1=$abc$109383$new_n61541_ nq=$abc$109383$new_n61545_
-.subckt ao22_x2 i0=$abc$109383$new_n61532_ i1=soc.cpu.minerva.divider.remainder[0] i2=$abc$109383$new_n28054_ q=$abc$109383$new_n61546_
-.subckt a2_x2 i0=$abc$109383$new_n61546_ i1=$abc$109383$new_n61545_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109324
+.subckt and21nor_x1 i0=$abc$109383$new_n61532_ i1=soc.cpu.minerva.divider.remainder[0] i2=$abc$109383$new_n28054_ nq=$abc$109383$new_n61546_
+.subckt and2_x1 i0=$abc$109383$new_n61546_ i1=$abc$109383$new_n61545_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109324
 .subckt nand2_x0 i0=$abc$109383$new_n61144_ i1=$abc$109383$new_n28044_ nq=$abc$109383$new_n61548_
 .subckt nor3_x0 i0=$abc$109383$new_n61548_ i1=$abc$109383$new_n60870_ i2=$abc$109383$new_n28113_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109326
-.subckt o4_x2 i0=$abc$109383$new_n19684_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n60923_ i3=$abc$109383$new_n27993_ q=$abc$109383$new_n61550_
+.subckt or4_x1 i0=$abc$109383$new_n19684_ i1=$abc$109383$new_n19646_ i2=$abc$109383$new_n60923_ i3=$abc$109383$new_n27993_ q=$abc$109383$new_n61550_
 .subckt nor3_x0 i0=$abc$109383$new_n61550_ i1=$abc$109383$new_n28119_ i2=$abc$109383$new_n19688_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$109328
 .subckt nand4_x0 i0=$abc$109383$new_n15150_ i1=$abc$109383$new_n14921_ i2=$abc$109383$new_n15155_ i3=$abc$109383$new_n15160_ nq=$abc$109383$new_n61552_
 .subckt nor3_x0 i0=soc.rom.spimemio.state[5] i1=$abc$109383$new_n15111_ i2=$abc$109383$new_n15104_ nq=$abc$109383$new_n61553_
 .subckt nor2_x0 i0=soc.rom.spimemio.state[11] i1=soc.rom.spimemio.state[8] nq=$abc$109383$new_n61554_
-.subckt a3_x2 i0=$abc$109383$new_n61554_ i1=$abc$109383$new_n22656_ i2=$abc$109383$new_n61553_ q=$abc$109383$new_n61555_
-.subckt a2_x2 i0=$abc$109383$new_n61555_ i1=$abc$109383$new_n15162_ q=$abc$109383$new_n61556_
+.subckt and3_x1 i0=$abc$109383$new_n61554_ i1=$abc$109383$new_n22656_ i2=$abc$109383$new_n61553_ q=$abc$109383$new_n61555_
+.subckt and2_x1 i0=$abc$109383$new_n61555_ i1=$abc$109383$new_n15162_ q=$abc$109383$new_n61556_
 .subckt nand2_x0 i0=$abc$109383$new_n61556_ i1=$abc$109383$new_n61552_ nq=$abc$109383$new_n61557_
-.subckt a2_x2 i0=$abc$109383$new_n61557_ i1=$abc$109383$new_n15038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109330
-.subckt a3_x2 i0=$abc$109383$new_n27447_ i1=$abc$109383$new_n19782_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n61559_
-.subckt a2_x2 i0=$abc$109383$new_n61559_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109364
-.subckt a2_x2 i0=$abc$109383$new_n27443_ i1=$abc$109383$new_n27433_ q=$abc$109383$new_n61561_
-.subckt a3_x2 i0=$abc$109383$new_n61561_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n61562_
-.subckt a2_x2 i0=$abc$109383$new_n61562_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109366
-.subckt a2_x2 i0=$abc$109383$new_n27436_ i1=$abc$109383$new_n27434_ q=$abc$109383$new_n61564_
-.subckt a3_x2 i0=$abc$109383$new_n61564_ i1=$abc$109383$new_n19684_ i2=$abc$109383$new_n29036_ q=$abc$109383$new_n61565_
-.subckt a2_x2 i0=$abc$109383$new_n61565_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109368
-.subckt a2_x2 i0=$abc$109383$new_n28530_ i1=$abc$109383$new_n27622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109370
+.subckt and2_x1 i0=$abc$109383$new_n61557_ i1=$abc$109383$new_n15038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109330
+.subckt and3_x1 i0=$abc$109383$new_n27447_ i1=$abc$109383$new_n19782_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n61559_
+.subckt and2_x1 i0=$abc$109383$new_n61559_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109364
+.subckt and2_x1 i0=$abc$109383$new_n27443_ i1=$abc$109383$new_n27433_ q=$abc$109383$new_n61561_
+.subckt and3_x1 i0=$abc$109383$new_n61561_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n27607_ q=$abc$109383$new_n61562_
+.subckt and2_x1 i0=$abc$109383$new_n61562_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109366
+.subckt and2_x1 i0=$abc$109383$new_n27436_ i1=$abc$109383$new_n27434_ q=$abc$109383$new_n61564_
+.subckt and3_x1 i0=$abc$109383$new_n61564_ i1=$abc$109383$new_n19684_ i2=$abc$109383$new_n29036_ q=$abc$109383$new_n61565_
+.subckt and2_x1 i0=$abc$109383$new_n61565_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109368
+.subckt and2_x1 i0=$abc$109383$new_n28530_ i1=$abc$109383$new_n27622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109370
 .subckt nand2_x0 i0=$abc$109383$new_n27436_ i1=$abc$109383$new_n27433_ nq=$abc$109383$new_n61568_
 .subckt nor3_x0 i0=$abc$109383$new_n61568_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n19644_ nq=$abc$109383$new_n61569_
-.subckt a2_x2 i0=$abc$109383$new_n61569_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109372
+.subckt and2_x1 i0=$abc$109383$new_n61569_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109372
 .subckt nor4_x0 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27435_ nq=$abc$109383$new_n61571_
-.subckt a2_x2 i0=$abc$109383$new_n61571_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109374
+.subckt and2_x1 i0=$abc$109383$new_n61571_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109374
 .subckt nor4_x0 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27443_ i3=$abc$109383$new_n27433_ nq=$abc$109383$new_n61573_
-.subckt a2_x2 i0=$abc$109383$new_n61573_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109376
-.subckt a2_x2 i0=$abc$109383$new_n28530_ i1=$abc$109383$new_n27537_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109378
-.subckt oa22_x2 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n15010_ i2=$abc$109383$new_n14997_ q=$abc$109383$new_n61576_
-.subckt a2_x2 i0=soc.rom.spimemio.xfer.count[0] i1=$abc$109383$new_n14993_ q=$abc$109383$new_n61577_
-.subckt a2_x2 i0=$abc$109383$new_n14997_ i1=$abc$109383$new_n15230_ q=$abc$109383$new_n61578_
-.subckt oa22_x2 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n61578_ i2=$abc$109383$new_n61577_ q=$abc$109383$new_n61579_
+.subckt and2_x1 i0=$abc$109383$new_n61573_ i1=$abc$109383$new_n28530_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109376
+.subckt and2_x1 i0=$abc$109383$new_n28530_ i1=$abc$109383$new_n27537_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109378
+.subckt or21nand_x1 i0=$abc$109383$new_n15191_ i1=$abc$109383$new_n15010_ i2=$abc$109383$new_n14997_ nq=$abc$109383$new_n61576_
+.subckt and2_x1 i0=soc.rom.spimemio.xfer.count[0] i1=$abc$109383$new_n14993_ q=$abc$109383$new_n61577_
+.subckt and2_x1 i0=$abc$109383$new_n14997_ i1=$abc$109383$new_n15230_ q=$abc$109383$new_n61578_
+.subckt or21nand_x1 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n61578_ i2=$abc$109383$new_n61577_ nq=$abc$109383$new_n61579_
 .subckt nand3_x0 i0=$abc$109383$new_n20638_ i1=$abc$109383$new_n61579_ i2=$abc$109383$new_n15010_ nq=$abc$109383$new_n61580_
 .subckt nand2_x0 i0=$abc$109383$new_n61580_ i1=$abc$109383$new_n61576_ nq=$abc$109383$new_n61581_
-.subckt a3_x2 i0=$abc$109383$new_n61581_ i1=$abc$109383$new_n28459_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109382
-.subckt a4_x2 i0=soc.cpu.minerva.exception.irq_mask__r__value[0] i1=soc.timer.bridge._int_src.timer_ev_enable__r_data i2=soc.timer.bridge._int_src.timer_ev_pending__r_data i3=$abc$109383$new_n27942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91416
+.subckt and3_x1 i0=$abc$109383$new_n61581_ i1=$abc$109383$new_n28459_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$109382
+.subckt and4_x1 i0=soc.cpu.minerva.exception.irq_mask__r__value[0] i1=soc.timer.bridge._int_src.timer_ev_enable__r_data i2=soc.timer.bridge._int_src.timer_ev_pending__r_data i3=$abc$109383$new_n27942_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91416
 .subckt nand2_x0 i0=soc.bridge._int_src.uart_ev_pending__r_data[2] i1=soc.bridge._int_src.uart_ev_enable__r_data[2] nq=$abc$109383$new_n61584_
 .subckt nand2_x0 i0=soc.bridge._int_src.uart_ev_pending__r_data[1] i1=soc.bridge._int_src.uart_ev_enable__r_data[1] nq=$abc$109383$new_n61585_
 .subckt nand2_x0 i0=soc.bridge._int_src.uart_ev_pending__r_data[0] i1=soc.bridge._int_src.uart_ev_enable__r_data[0] nq=$abc$109383$new_n61586_
 .subckt nand3_x0 i0=$abc$109383$new_n61586_ i1=$abc$109383$new_n61585_ i2=$abc$109383$new_n61584_ nq=$abc$109383$new_n61587_
-.subckt a2_x2 i0=soc.cpu.minerva.exception.irq_mask__r__value[1] i1=$abc$109383$new_n27848_ q=$abc$109383$new_n61588_
-.subckt a2_x2 i0=$abc$109383$new_n61588_ i1=$abc$109383$new_n61587_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91418
-.subckt o2_x2 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n60863_ q=$abc$109383$new_n61590_
+.subckt and2_x1 i0=soc.cpu.minerva.exception.irq_mask__r__value[1] i1=$abc$109383$new_n27848_ q=$abc$109383$new_n61588_
+.subckt and2_x1 i0=$abc$109383$new_n61588_ i1=$abc$109383$new_n61587_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$91418
+.subckt or2_x1 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n60863_ q=$abc$109383$new_n61590_
 .subckt buf_x4 i=$abc$109383$new_n61590_ q=$abc$109383$new_n61591_
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n61592_
-.subckt a2_x2 i0=$abc$109383$new_n61592_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92382
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n61594_
-.subckt a2_x2 i0=$abc$109383$new_n61594_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92386
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n61596_
-.subckt a2_x2 i0=$abc$109383$new_n61596_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92390
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n61598_
-.subckt a2_x2 i0=$abc$109383$new_n61598_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92394
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n61600_
-.subckt a2_x2 i0=$abc$109383$new_n61600_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92398
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n61602_
-.subckt a2_x2 i0=$abc$109383$new_n61602_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92402
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n61604_
-.subckt a2_x2 i0=$abc$109383$new_n61604_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92406
-.subckt mx2_x2 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n61606_
-.subckt a2_x2 i0=$abc$109383$new_n61606_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92410
-.subckt o3_x2 i0=$abc$109383$new_n60800_ i1=soc.bridge._int_src._tx_mty_ev_stb_r i2=$abc$109383$new_n28376_ q=$abc$109383$new_n61608_
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n61592_
+.subckt and2_x1 i0=$abc$109383$new_n61592_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92382
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n61594_
+.subckt and2_x1 i0=$abc$109383$new_n61594_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92386
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n61596_
+.subckt and2_x1 i0=$abc$109383$new_n61596_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92390
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n61598_
+.subckt and2_x1 i0=$abc$109383$new_n61598_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92394
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n61600_
+.subckt and2_x1 i0=$abc$109383$new_n61600_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92398
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n61602_
+.subckt and2_x1 i0=$abc$109383$new_n61602_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92402
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n61604_
+.subckt and2_x1 i0=$abc$109383$new_n61604_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92406
+.subckt mux2_x1 cmd=$abc$109383$new_n61591_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n61606_
+.subckt and2_x1 i0=$abc$109383$new_n61606_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$92410
+.subckt or3_x1 i0=$abc$109383$new_n60800_ i1=soc.bridge._int_src._tx_mty_ev_stb_r i2=$abc$109383$new_n28376_ q=$abc$109383$new_n61608_
 .subckt nand2_x0 i0=soc.bridge.csr_mux_1.uart_ev_pending__shadow[2] i1=soc.bridge.csr_mux_1.uart_ev_pending__w_stb nq=$abc$109383$new_n61609_
 .subckt nand3_x0 i0=$abc$109383$new_n61609_ i1=soc.bridge._int_src.uart_ev_pending__r_data[2] i2=$abc$109383$new_n28536_ nq=$abc$109383$new_n61610_
 .subckt nand2_x0 i0=$abc$109383$new_n61610_ i1=$abc$109383$new_n61608_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$92414
-.subckt o2_x2 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n60872_ q=$abc$109383$new_n61612_
+.subckt or2_x1 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n60872_ q=$abc$109383$new_n61612_
 .subckt buf_x4 i=$abc$109383$new_n61612_ q=$abc$109383$new_n61613_
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[16] q=$abc$109383$new_n61614_
-.subckt a2_x2 i0=$abc$109383$new_n61614_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93010
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[16] q=$abc$109383$new_n61614_
+.subckt and2_x1 i0=$abc$109383$new_n61614_ i1=$abc$109383$new_n61527_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93010
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61616_
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[17] q=$abc$109383$new_n61617_
-.subckt a2_x2 i0=$abc$109383$new_n61617_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93014
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n61619_
-.subckt a2_x2 i0=$abc$109383$new_n61619_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93018
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[19] q=$abc$109383$new_n61621_
-.subckt a2_x2 i0=$abc$109383$new_n61621_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93022
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[20] q=$abc$109383$new_n61623_
-.subckt a2_x2 i0=$abc$109383$new_n61623_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93026
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[21] q=$abc$109383$new_n61625_
-.subckt a2_x2 i0=$abc$109383$new_n61625_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93030
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[22] q=$abc$109383$new_n61627_
-.subckt a2_x2 i0=$abc$109383$new_n61627_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93034
-.subckt mx2_x2 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[23] q=$abc$109383$new_n61629_
-.subckt a2_x2 i0=$abc$109383$new_n61629_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93038
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[17] q=$abc$109383$new_n61617_
+.subckt and2_x1 i0=$abc$109383$new_n61617_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93014
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[18] q=$abc$109383$new_n61619_
+.subckt and2_x1 i0=$abc$109383$new_n61619_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93018
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[19] q=$abc$109383$new_n61621_
+.subckt and2_x1 i0=$abc$109383$new_n61621_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93022
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[20] q=$abc$109383$new_n61623_
+.subckt and2_x1 i0=$abc$109383$new_n61623_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93026
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[21] q=$abc$109383$new_n61625_
+.subckt and2_x1 i0=$abc$109383$new_n61625_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93030
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[22] q=$abc$109383$new_n61627_
+.subckt and2_x1 i0=$abc$109383$new_n61627_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93034
+.subckt mux2_x1 cmd=$abc$109383$new_n61613_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[23] q=$abc$109383$new_n61629_
+.subckt and2_x1 i0=$abc$109383$new_n61629_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93038
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[0] nq=$abc$109383$new_n61631_
 .subckt nand4_x0 i0=$abc$109383$new_n60928_ i1=$abc$109383$new_n22002_ i2=$abc$109383$new_n19647_ i3=$abc$109383$new_n60864_ nq=$abc$109383$new_n61632_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60938_ i1=$abc$109383$new_n27915_ q=$abc$109383$new_n61633_
-.subckt o2_x2 i0=$abc$109383$new_n60922_ i1=$abc$109383$new_n60815_ q=$abc$109383$new_n61634_
-.subckt o2_x2 i0=$abc$109383$new_n28118_ i1=$abc$109383$new_n28113_ q=$abc$109383$new_n61635_
-.subckt oa22_x2 i0=$abc$109383$new_n61635_ i1=$abc$109383$new_n61634_ i2=$abc$109383$new_n61165_ q=$abc$109383$new_n61636_
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60938_ i1=$abc$109383$new_n27915_ q=$abc$109383$new_n61633_
+.subckt or2_x1 i0=$abc$109383$new_n60922_ i1=$abc$109383$new_n60815_ q=$abc$109383$new_n61634_
+.subckt or2_x1 i0=$abc$109383$new_n28118_ i1=$abc$109383$new_n28113_ q=$abc$109383$new_n61635_
+.subckt or21nand_x1 i0=$abc$109383$new_n61635_ i1=$abc$109383$new_n61634_ i2=$abc$109383$new_n61165_ nq=$abc$109383$new_n61636_
 .subckt buf_x4 i=$abc$109383$new_n61636_ q=$abc$109383$new_n61637_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61633_ i1=$abc$109383$new_n61631_ q=$abc$109383$new_n61638_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61633_ i1=$abc$109383$new_n61631_ q=$abc$109383$new_n61638_
 .subckt nor2_x0 i0=$abc$109383$new_n61638_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$93298
 .subckt nand4_x0 i0=$abc$109383$new_n60948_ i1=$abc$109383$new_n60947_ i2=$abc$109383$new_n60946_ i3=$abc$109383$new_n60945_ nq=$abc$109383$new_n61640_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n61640_ i1=soc.divisor[1] q=$abc$109383$new_n61641_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61641_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[1] q=$abc$109383$new_n61642_
-.subckt a2_x2 i0=$abc$109383$new_n61642_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93302
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n61640_ i1=soc.divisor[1] q=$abc$109383$new_n61641_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61641_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[1] q=$abc$109383$new_n61642_
+.subckt and2_x1 i0=$abc$109383$new_n61642_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93302
 .subckt nor3_x0 i0=$abc$109383$new_n60959_ i1=$abc$109383$new_n60922_ i2=$abc$109383$new_n60870_ nq=$abc$109383$new_n61644_
-.subckt ao22_x2 i0=$abc$109383$new_n60922_ i1=$abc$109383$new_n60870_ i2=$abc$109383$new_n27923_ q=$abc$109383$new_n61645_
+.subckt and21nor_x1 i0=$abc$109383$new_n60922_ i1=$abc$109383$new_n60870_ i2=$abc$109383$new_n27923_ nq=$abc$109383$new_n61645_
 .subckt nor2_x0 i0=$abc$109383$new_n61645_ i1=$abc$109383$new_n61644_ nq=$abc$109383$new_n61646_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61646_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[2] q=$abc$109383$new_n61647_
-.subckt a2_x2 i0=$abc$109383$new_n61647_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93306
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61646_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[2] q=$abc$109383$new_n61647_
+.subckt and2_x1 i0=$abc$109383$new_n61647_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93306
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[3] nq=$abc$109383$new_n61649_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60969_ i1=$abc$109383$new_n27931_ q=$abc$109383$new_n61650_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61650_ i1=$abc$109383$new_n61649_ q=$abc$109383$new_n61651_
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60969_ i1=$abc$109383$new_n27931_ q=$abc$109383$new_n61650_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61650_ i1=$abc$109383$new_n61649_ q=$abc$109383$new_n61651_
 .subckt nor2_x0 i0=$abc$109383$new_n61651_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$93310
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[4] nq=$abc$109383$new_n61653_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60978_ i1=$abc$109383$new_n27945_ q=$abc$109383$new_n61654_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61654_ i1=$abc$109383$new_n61653_ q=$abc$109383$new_n61655_
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60978_ i1=$abc$109383$new_n27945_ q=$abc$109383$new_n61654_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61654_ i1=$abc$109383$new_n61653_ q=$abc$109383$new_n61655_
 .subckt nor2_x0 i0=$abc$109383$new_n61655_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$93314
 .subckt nand4_x0 i0=$abc$109383$new_n60986_ i1=$abc$109383$new_n60985_ i2=$abc$109383$new_n60984_ i3=$abc$109383$new_n60983_ nq=$abc$109383$new_n61657_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n61657_ i1=soc.divisor[5] q=$abc$109383$new_n61658_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61658_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[5] q=$abc$109383$new_n61659_
-.subckt a2_x2 i0=$abc$109383$new_n61659_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93318
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n61657_ i1=soc.divisor[5] q=$abc$109383$new_n61658_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61658_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[5] q=$abc$109383$new_n61659_
+.subckt and2_x1 i0=$abc$109383$new_n61659_ i1=$abc$109383$new_n61616_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93318
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_divisor__shadow[6] nq=$abc$109383$new_n61661_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60997_ i1=$abc$109383$new_n27969_ q=$abc$109383$new_n61662_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61662_ i1=$abc$109383$new_n61661_ q=$abc$109383$new_n61663_
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n60997_ i1=$abc$109383$new_n27969_ q=$abc$109383$new_n61662_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61662_ i1=$abc$109383$new_n61661_ q=$abc$109383$new_n61663_
 .subckt nor2_x0 i0=$abc$109383$new_n61663_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$93322
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61665_
-.subckt mx2_x2 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n61006_ i1=soc.divisor[7] q=$abc$109383$new_n61666_
-.subckt mx2_x2 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61666_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[7] q=$abc$109383$new_n61667_
-.subckt a2_x2 i0=$abc$109383$new_n61667_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93326
+.subckt mux2_x1 cmd=$abc$109383$new_n61632_ i0=$abc$109383$new_n61006_ i1=soc.divisor[7] q=$abc$109383$new_n61666_
+.subckt mux2_x1 cmd=$abc$109383$new_n61637_ i0=$abc$109383$new_n61666_ i1=soc.bridge.csr_mux_0.uart_divisor__shadow[7] q=$abc$109383$new_n61667_
+.subckt and2_x1 i0=$abc$109383$new_n61667_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93326
 .subckt nand3_x0 i0=$abc$109383$new_n60883_ i1=$abc$109383$new_n60757_ i2=$abc$109383$new_n60751_ nq=$abc$109383$new_n61669_
-.subckt o2_x2 i0=$abc$109383$new_n61669_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61670_
-.subckt mx2_x2 cmd=$abc$109383$new_n61670_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[0] q=$abc$109383$new_n61671_
-.subckt a2_x2 i0=$abc$109383$new_n61671_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93330
-.subckt mx2_x2 cmd=$abc$109383$new_n61670_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[1] q=$abc$109383$new_n61673_
-.subckt a2_x2 i0=$abc$109383$new_n61673_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93334
-.subckt mx2_x2 cmd=$abc$109383$new_n61670_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[2] q=$abc$109383$new_n61675_
-.subckt a2_x2 i0=$abc$109383$new_n61675_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93338
+.subckt or2_x1 i0=$abc$109383$new_n61669_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61670_
+.subckt mux2_x1 cmd=$abc$109383$new_n61670_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[0] q=$abc$109383$new_n61671_
+.subckt and2_x1 i0=$abc$109383$new_n61671_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93330
+.subckt mux2_x1 cmd=$abc$109383$new_n61670_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[1] q=$abc$109383$new_n61673_
+.subckt and2_x1 i0=$abc$109383$new_n61673_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93334
+.subckt mux2_x1 cmd=$abc$109383$new_n61670_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[2] q=$abc$109383$new_n61675_
+.subckt and2_x1 i0=$abc$109383$new_n61675_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93338
 .subckt nand3_x0 i0=$abc$109383$new_n60883_ i1=$abc$109383$new_n60752_ i2=$abc$109383$new_n60762_ nq=$abc$109383$new_n61677_
-.subckt o2_x2 i0=$abc$109383$new_n61677_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61678_
-.subckt mx2_x2 cmd=$abc$109383$new_n61678_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[8] q=$abc$109383$new_n61679_
-.subckt a2_x2 i0=$abc$109383$new_n61679_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93342
-.subckt mx2_x2 cmd=$abc$109383$new_n61678_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[9] q=$abc$109383$new_n61681_
-.subckt a2_x2 i0=$abc$109383$new_n61681_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93346
-.subckt mx2_x2 cmd=$abc$109383$new_n61678_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[10] q=$abc$109383$new_n61683_
-.subckt a2_x2 i0=$abc$109383$new_n61683_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93350
-.subckt o2_x2 i0=$abc$109383$new_n60911_ i1=$abc$109383$new_n60756_ q=$abc$109383$new_n61685_
-.subckt mx2_x2 cmd=$abc$109383$new_n61685_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[16] q=$abc$109383$new_n61686_
-.subckt a2_x2 i0=$abc$109383$new_n61686_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93354
-.subckt mx2_x2 cmd=$abc$109383$new_n61685_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[17] q=$abc$109383$new_n61688_
-.subckt a2_x2 i0=$abc$109383$new_n61688_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93358
-.subckt mx2_x2 cmd=$abc$109383$new_n61685_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[18] q=$abc$109383$new_n61690_
-.subckt a2_x2 i0=$abc$109383$new_n61690_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93362
+.subckt or2_x1 i0=$abc$109383$new_n61677_ i1=$abc$109383$new_n60755_ q=$abc$109383$new_n61678_
+.subckt mux2_x1 cmd=$abc$109383$new_n61678_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[8] q=$abc$109383$new_n61679_
+.subckt and2_x1 i0=$abc$109383$new_n61679_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93342
+.subckt mux2_x1 cmd=$abc$109383$new_n61678_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[9] q=$abc$109383$new_n61681_
+.subckt and2_x1 i0=$abc$109383$new_n61681_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93346
+.subckt mux2_x1 cmd=$abc$109383$new_n61678_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[10] q=$abc$109383$new_n61683_
+.subckt and2_x1 i0=$abc$109383$new_n61683_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93350
+.subckt or2_x1 i0=$abc$109383$new_n60911_ i1=$abc$109383$new_n60756_ q=$abc$109383$new_n61685_
+.subckt mux2_x1 cmd=$abc$109383$new_n61685_ i0=$abc$109383$new_n60881_ i1=soc.bridge.csr_bridge_1.wb__dat_r[16] q=$abc$109383$new_n61686_
+.subckt and2_x1 i0=$abc$109383$new_n61686_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93354
+.subckt mux2_x1 cmd=$abc$109383$new_n61685_ i0=$abc$109383$new_n60890_ i1=soc.bridge.csr_bridge_1.wb__dat_r[17] q=$abc$109383$new_n61688_
+.subckt and2_x1 i0=$abc$109383$new_n61688_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93358
+.subckt mux2_x1 cmd=$abc$109383$new_n61685_ i0=$abc$109383$new_n60896_ i1=soc.bridge.csr_bridge_1.wb__dat_r[18] q=$abc$109383$new_n61690_
+.subckt and2_x1 i0=$abc$109383$new_n61690_ i1=$abc$109383$new_n61665_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93362
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61692_
 .subckt nand3_x0 i0=$abc$109383$new_n60813_ i1=$abc$109383$new_n60862_ i2=$abc$109383$new_n60923_ nq=$abc$109383$new_n61693_
-.subckt o2_x2 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n61693_ q=$abc$109383$new_n61694_
+.subckt or2_x1 i0=$abc$109383$new_n60815_ i1=$abc$109383$new_n61693_ q=$abc$109383$new_n61694_
 .subckt buf_x4 i=$abc$109383$new_n61694_ q=$abc$109383$new_n61695_
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[8] q=$abc$109383$new_n61696_
-.subckt a2_x2 i0=$abc$109383$new_n61696_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93366
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[9] q=$abc$109383$new_n61698_
-.subckt a2_x2 i0=$abc$109383$new_n61698_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93370
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[10] q=$abc$109383$new_n61700_
-.subckt a2_x2 i0=$abc$109383$new_n61700_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93374
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[11] q=$abc$109383$new_n61702_
-.subckt a2_x2 i0=$abc$109383$new_n61702_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93378
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[12] q=$abc$109383$new_n61704_
-.subckt a2_x2 i0=$abc$109383$new_n61704_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93382
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[13] q=$abc$109383$new_n61706_
-.subckt a2_x2 i0=$abc$109383$new_n61706_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93386
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[14] q=$abc$109383$new_n61708_
-.subckt a2_x2 i0=$abc$109383$new_n61708_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93390
-.subckt mx2_x2 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[15] q=$abc$109383$new_n61710_
-.subckt a2_x2 i0=$abc$109383$new_n61710_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93394
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60810_ i1=soc.bridge.csr_bridge_0.wb__dat_r[8] q=$abc$109383$new_n61696_
+.subckt and2_x1 i0=$abc$109383$new_n61696_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93366
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60824_ i1=soc.bridge.csr_bridge_0.wb__dat_r[9] q=$abc$109383$new_n61698_
+.subckt and2_x1 i0=$abc$109383$new_n61698_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93370
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60830_ i1=soc.bridge.csr_bridge_0.wb__dat_r[10] q=$abc$109383$new_n61700_
+.subckt and2_x1 i0=$abc$109383$new_n61700_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93374
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60836_ i1=soc.bridge.csr_bridge_0.wb__dat_r[11] q=$abc$109383$new_n61702_
+.subckt and2_x1 i0=$abc$109383$new_n61702_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93378
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60841_ i1=soc.bridge.csr_bridge_0.wb__dat_r[12] q=$abc$109383$new_n61704_
+.subckt and2_x1 i0=$abc$109383$new_n61704_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93382
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60848_ i1=soc.bridge.csr_bridge_0.wb__dat_r[13] q=$abc$109383$new_n61706_
+.subckt and2_x1 i0=$abc$109383$new_n61706_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93386
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60853_ i1=soc.bridge.csr_bridge_0.wb__dat_r[14] q=$abc$109383$new_n61708_
+.subckt and2_x1 i0=$abc$109383$new_n61708_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93390
+.subckt mux2_x1 cmd=$abc$109383$new_n61695_ i0=$abc$109383$new_n60858_ i1=soc.bridge.csr_bridge_0.wb__dat_r[15] q=$abc$109383$new_n61710_
+.subckt and2_x1 i0=$abc$109383$new_n61710_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$93394
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n57135_ nq=$abc$109383$new_n61712_
 .subckt buf_x4 i=$abc$109383$new_n56917_ q=$abc$109383$new_n61713_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[2] q=$abc$109383$new_n61714_
-.subckt ao22_x2 i0=$abc$109383$new_n61714_ i1=$abc$109383$new_n61712_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94582
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[2] nq=$abc$109383$new_n61714_
+.subckt and21nor_x1 i0=$abc$109383$new_n61714_ i1=$abc$109383$new_n61712_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94582
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[3] nq=$abc$109383$new_n61716_
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n61716_ nq=$abc$109383$new_n61717_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[3] q=$abc$109383$new_n61718_
-.subckt ao22_x2 i0=$abc$109383$new_n61718_ i1=$abc$109383$new_n61717_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94586
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[3] nq=$abc$109383$new_n61718_
+.subckt and21nor_x1 i0=$abc$109383$new_n61718_ i1=$abc$109383$new_n61717_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94586
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n30150_ nq=$abc$109383$new_n61720_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[4] q=$abc$109383$new_n61721_
-.subckt ao22_x2 i0=$abc$109383$new_n61721_ i1=$abc$109383$new_n61720_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94590
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[4] nq=$abc$109383$new_n61721_
+.subckt and21nor_x1 i0=$abc$109383$new_n61721_ i1=$abc$109383$new_n61720_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94590
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n57210_ nq=$abc$109383$new_n61723_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[5] q=$abc$109383$new_n61724_
-.subckt ao22_x2 i0=$abc$109383$new_n61724_ i1=$abc$109383$new_n61723_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94594
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[5] nq=$abc$109383$new_n61724_
+.subckt and21nor_x1 i0=$abc$109383$new_n61724_ i1=$abc$109383$new_n61723_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94594
 .subckt nor3_x0 i0=$abc$109383$new_n58491_ i1=$abc$109383$new_n58490_ i2=$abc$109383$new_n57240_ nq=$abc$109383$new_n61726_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[6] q=$abc$109383$new_n61727_
-.subckt ao22_x2 i0=$abc$109383$new_n61727_ i1=$abc$109383$new_n61726_ i2=$abc$109383$new_n61478_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94598
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[6] nq=$abc$109383$new_n61727_
+.subckt and21nor_x1 i0=$abc$109383$new_n61727_ i1=$abc$109383$new_n61726_ i2=$abc$109383$new_n61478_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94598
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n61729_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[7] nq=$abc$109383$new_n61730_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n61731_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n61732_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61730_ nq=$abc$109383$new_n61733_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[7] q=$abc$109383$new_n61734_
-.subckt ao22_x2 i0=$abc$109383$new_n61734_ i1=$abc$109383$new_n61733_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94602
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[7] nq=$abc$109383$new_n61734_
+.subckt and21nor_x1 i0=$abc$109383$new_n61734_ i1=$abc$109383$new_n61733_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94602
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[8] nq=$abc$109383$new_n61736_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61736_ nq=$abc$109383$new_n61737_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[8] q=$abc$109383$new_n61738_
-.subckt ao22_x2 i0=$abc$109383$new_n61738_ i1=$abc$109383$new_n61737_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94606
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[8] nq=$abc$109383$new_n61738_
+.subckt and21nor_x1 i0=$abc$109383$new_n61738_ i1=$abc$109383$new_n61737_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94606
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[9] nq=$abc$109383$new_n61740_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61740_ nq=$abc$109383$new_n61741_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[9] q=$abc$109383$new_n61742_
-.subckt ao22_x2 i0=$abc$109383$new_n61742_ i1=$abc$109383$new_n61741_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94610
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[9] nq=$abc$109383$new_n61742_
+.subckt and21nor_x1 i0=$abc$109383$new_n61742_ i1=$abc$109383$new_n61741_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94610
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[10] nq=$abc$109383$new_n61744_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61744_ nq=$abc$109383$new_n61745_
-.subckt ao22_x2 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[10] q=$abc$109383$new_n61746_
-.subckt ao22_x2 i0=$abc$109383$new_n61746_ i1=$abc$109383$new_n61745_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94614
+.subckt and21nor_x1 i0=$abc$109383$new_n58509_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[10] nq=$abc$109383$new_n61746_
+.subckt and21nor_x1 i0=$abc$109383$new_n61746_ i1=$abc$109383$new_n61745_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94614
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[11] nq=$abc$109383$new_n61748_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61748_ nq=$abc$109383$new_n61749_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n61750_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[11] q=$abc$109383$new_n61751_
-.subckt ao22_x2 i0=$abc$109383$new_n61751_ i1=$abc$109383$new_n61749_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94618
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61713_ i2=soc.cpu.minerva.payload__pc$71[11] nq=$abc$109383$new_n61751_
+.subckt and21nor_x1 i0=$abc$109383$new_n61751_ i1=$abc$109383$new_n61749_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94618
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[12] nq=$abc$109383$new_n61753_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61753_ nq=$abc$109383$new_n61754_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n61755_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[12] q=$abc$109383$new_n61756_
-.subckt ao22_x2 i0=$abc$109383$new_n61756_ i1=$abc$109383$new_n61754_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94622
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[12] nq=$abc$109383$new_n61756_
+.subckt and21nor_x1 i0=$abc$109383$new_n61756_ i1=$abc$109383$new_n61754_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94622
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[13] nq=$abc$109383$new_n61758_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61758_ nq=$abc$109383$new_n61759_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[13] q=$abc$109383$new_n61760_
-.subckt ao22_x2 i0=$abc$109383$new_n61760_ i1=$abc$109383$new_n61759_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94626
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[13] nq=$abc$109383$new_n61760_
+.subckt and21nor_x1 i0=$abc$109383$new_n61760_ i1=$abc$109383$new_n61759_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94626
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[14] nq=$abc$109383$new_n61762_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61762_ nq=$abc$109383$new_n61763_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[14] q=$abc$109383$new_n61764_
-.subckt ao22_x2 i0=$abc$109383$new_n61764_ i1=$abc$109383$new_n61763_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94630
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[14] nq=$abc$109383$new_n61764_
+.subckt and21nor_x1 i0=$abc$109383$new_n61764_ i1=$abc$109383$new_n61763_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94630
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[15] nq=$abc$109383$new_n61766_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61766_ nq=$abc$109383$new_n61767_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[15] q=$abc$109383$new_n61768_
-.subckt ao22_x2 i0=$abc$109383$new_n61768_ i1=$abc$109383$new_n61767_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94634
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[15] nq=$abc$109383$new_n61768_
+.subckt and21nor_x1 i0=$abc$109383$new_n61768_ i1=$abc$109383$new_n61767_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94634
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[16] nq=$abc$109383$new_n61770_
 .subckt nor3_x0 i0=$abc$109383$new_n61732_ i1=$abc$109383$new_n61731_ i2=$abc$109383$new_n61770_ nq=$abc$109383$new_n61771_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[16] q=$abc$109383$new_n61772_
-.subckt ao22_x2 i0=$abc$109383$new_n61772_ i1=$abc$109383$new_n61771_ i2=$abc$109383$new_n61729_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94638
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[16] nq=$abc$109383$new_n61772_
+.subckt and21nor_x1 i0=$abc$109383$new_n61772_ i1=$abc$109383$new_n61771_ i2=$abc$109383$new_n61729_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94638
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n61774_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[17] nq=$abc$109383$new_n61775_
 .subckt buf_x4 i=$abc$109383$new_n58031_ q=$abc$109383$new_n61776_
 .subckt buf_x4 i=$abc$109383$new_n57057_ q=$abc$109383$new_n61777_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61775_ nq=$abc$109383$new_n61778_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[17] q=$abc$109383$new_n61779_
-.subckt ao22_x2 i0=$abc$109383$new_n61779_ i1=$abc$109383$new_n61778_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94642
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[17] nq=$abc$109383$new_n61779_
+.subckt and21nor_x1 i0=$abc$109383$new_n61779_ i1=$abc$109383$new_n61778_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94642
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[18] nq=$abc$109383$new_n61781_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61781_ nq=$abc$109383$new_n61782_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[18] q=$abc$109383$new_n61783_
-.subckt ao22_x2 i0=$abc$109383$new_n61783_ i1=$abc$109383$new_n61782_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94646
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[18] nq=$abc$109383$new_n61783_
+.subckt and21nor_x1 i0=$abc$109383$new_n61783_ i1=$abc$109383$new_n61782_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94646
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[19] nq=$abc$109383$new_n61785_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61785_ nq=$abc$109383$new_n61786_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[19] q=$abc$109383$new_n61787_
-.subckt ao22_x2 i0=$abc$109383$new_n61787_ i1=$abc$109383$new_n61786_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94650
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[19] nq=$abc$109383$new_n61787_
+.subckt and21nor_x1 i0=$abc$109383$new_n61787_ i1=$abc$109383$new_n61786_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94650
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[20] nq=$abc$109383$new_n61789_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61789_ nq=$abc$109383$new_n61790_
-.subckt ao22_x2 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[20] q=$abc$109383$new_n61791_
-.subckt ao22_x2 i0=$abc$109383$new_n61791_ i1=$abc$109383$new_n61790_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94654
+.subckt and21nor_x1 i0=$abc$109383$new_n61750_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[20] nq=$abc$109383$new_n61791_
+.subckt and21nor_x1 i0=$abc$109383$new_n61791_ i1=$abc$109383$new_n61790_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94654
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[21] nq=$abc$109383$new_n61793_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61793_ nq=$abc$109383$new_n61794_
 .subckt buf_x4 i=$abc$109383$new_n29199_ q=$abc$109383$new_n61795_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[21] q=$abc$109383$new_n61796_
-.subckt ao22_x2 i0=$abc$109383$new_n61796_ i1=$abc$109383$new_n61794_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94658
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61755_ i2=soc.cpu.minerva.payload__pc$71[21] nq=$abc$109383$new_n61796_
+.subckt and21nor_x1 i0=$abc$109383$new_n61796_ i1=$abc$109383$new_n61794_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94658
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[22] nq=$abc$109383$new_n61798_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61798_ nq=$abc$109383$new_n61799_
 .subckt buf_x4 i=$abc$109383$new_n29208_ q=$abc$109383$new_n61800_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[22] q=$abc$109383$new_n61801_
-.subckt ao22_x2 i0=$abc$109383$new_n61801_ i1=$abc$109383$new_n61799_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94662
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[22] nq=$abc$109383$new_n61801_
+.subckt and21nor_x1 i0=$abc$109383$new_n61801_ i1=$abc$109383$new_n61799_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94662
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[23] nq=$abc$109383$new_n61803_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61803_ nq=$abc$109383$new_n61804_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[23] q=$abc$109383$new_n61805_
-.subckt ao22_x2 i0=$abc$109383$new_n61805_ i1=$abc$109383$new_n61804_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94666
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[23] nq=$abc$109383$new_n61805_
+.subckt and21nor_x1 i0=$abc$109383$new_n61805_ i1=$abc$109383$new_n61804_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94666
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[24] nq=$abc$109383$new_n61807_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61807_ nq=$abc$109383$new_n61808_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[24] q=$abc$109383$new_n61809_
-.subckt ao22_x2 i0=$abc$109383$new_n61809_ i1=$abc$109383$new_n61808_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94670
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[24] nq=$abc$109383$new_n61809_
+.subckt and21nor_x1 i0=$abc$109383$new_n61809_ i1=$abc$109383$new_n61808_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94670
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[25] nq=$abc$109383$new_n61811_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61811_ nq=$abc$109383$new_n61812_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[25] q=$abc$109383$new_n61813_
-.subckt ao22_x2 i0=$abc$109383$new_n61813_ i1=$abc$109383$new_n61812_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94674
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[25] nq=$abc$109383$new_n61813_
+.subckt and21nor_x1 i0=$abc$109383$new_n61813_ i1=$abc$109383$new_n61812_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94674
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[26] nq=$abc$109383$new_n61815_
 .subckt nor3_x0 i0=$abc$109383$new_n61777_ i1=$abc$109383$new_n61776_ i2=$abc$109383$new_n61815_ nq=$abc$109383$new_n61816_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[26] q=$abc$109383$new_n61817_
-.subckt ao22_x2 i0=$abc$109383$new_n61817_ i1=$abc$109383$new_n61816_ i2=$abc$109383$new_n61774_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94678
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[26] nq=$abc$109383$new_n61817_
+.subckt and21nor_x1 i0=$abc$109383$new_n61817_ i1=$abc$109383$new_n61816_ i2=$abc$109383$new_n61774_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94678
 .subckt buf_x4 i=$abc$109383$new_n60685_ q=$abc$109383$new_n61819_
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[27] nq=$abc$109383$new_n61820_
 .subckt nor3_x0 i0=$abc$109383$new_n58061_ i1=$abc$109383$new_n58060_ i2=$abc$109383$new_n61820_ nq=$abc$109383$new_n61821_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[27] q=$abc$109383$new_n61822_
-.subckt ao22_x2 i0=$abc$109383$new_n61822_ i1=$abc$109383$new_n61821_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94682
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[27] nq=$abc$109383$new_n61822_
+.subckt and21nor_x1 i0=$abc$109383$new_n61822_ i1=$abc$109383$new_n61821_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94682
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[28] nq=$abc$109383$new_n61824_
 .subckt nor3_x0 i0=$abc$109383$new_n58061_ i1=$abc$109383$new_n58060_ i2=$abc$109383$new_n61824_ nq=$abc$109383$new_n61825_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[28] q=$abc$109383$new_n61826_
-.subckt ao22_x2 i0=$abc$109383$new_n61826_ i1=$abc$109383$new_n61825_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94686
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[28] nq=$abc$109383$new_n61826_
+.subckt and21nor_x1 i0=$abc$109383$new_n61826_ i1=$abc$109383$new_n61825_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94686
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[29] nq=$abc$109383$new_n61828_
 .subckt nor3_x0 i0=$abc$109383$new_n58061_ i1=$abc$109383$new_n58060_ i2=$abc$109383$new_n61828_ nq=$abc$109383$new_n61829_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[29] q=$abc$109383$new_n61830_
-.subckt ao22_x2 i0=$abc$109383$new_n61830_ i1=$abc$109383$new_n61829_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94690
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[29] nq=$abc$109383$new_n61830_
+.subckt and21nor_x1 i0=$abc$109383$new_n61830_ i1=$abc$109383$new_n61829_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94690
 .subckt inv_x0 i=soc.cpu.minerva.payload__pc$32[30] nq=$abc$109383$new_n61832_
 .subckt nor3_x0 i0=$abc$109383$new_n58061_ i1=$abc$109383$new_n58060_ i2=$abc$109383$new_n61832_ nq=$abc$109383$new_n61833_
-.subckt ao22_x2 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[30] q=$abc$109383$new_n61834_
-.subckt ao22_x2 i0=$abc$109383$new_n61834_ i1=$abc$109383$new_n61833_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94694
+.subckt and21nor_x1 i0=$abc$109383$new_n61795_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[30] nq=$abc$109383$new_n61834_
+.subckt and21nor_x1 i0=$abc$109383$new_n61834_ i1=$abc$109383$new_n61833_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94694
 .subckt nor3_x0 i0=$abc$109383$new_n58061_ i1=$abc$109383$new_n58060_ i2=$abc$109383$new_n57811_ nq=$abc$109383$new_n61836_
-.subckt ao22_x2 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[31] q=$abc$109383$new_n61837_
-.subckt ao22_x2 i0=$abc$109383$new_n61837_ i1=$abc$109383$new_n61836_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94698
-.subckt o2_x2 i0=soc.rom.spimemio.state[11] i1=soc.rom.spimemio.state[8] q=$abc$109383$new_n61839_
+.subckt and21nor_x1 i0=$abc$109383$new_n29871_ i1=$abc$109383$new_n61800_ i2=soc.cpu.minerva.payload__pc$71[31] nq=$abc$109383$new_n61837_
+.subckt and21nor_x1 i0=$abc$109383$new_n61837_ i1=$abc$109383$new_n61836_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94698
+.subckt or2_x1 i0=soc.rom.spimemio.state[11] i1=soc.rom.spimemio.state[8] q=$abc$109383$new_n61839_
 .subckt nand3_x0 i0=$abc$109383$new_n15161_ i1=soc.rom.spimemio.state[3] i2=soc.rom.spimemio.rd_wait nq=$abc$109383$new_n61840_
 .subckt nor4_x0 i0=soc.rom.spimemio.state[11] i1=soc.rom.spimemio.state[8] i2=soc.rom.spimemio.state[3] i3=soc.rom.spimemio.state[0] nq=$abc$109383$new_n61841_
 .subckt nand3_x0 i0=$abc$109383$new_n61841_ i1=$abc$109383$new_n22665_ i2=$abc$109383$new_n22655_ nq=$abc$109383$new_n61842_
 .subckt nand2_x0 i0=$abc$109383$new_n61842_ i1=$abc$109383$new_n61840_ nq=$abc$109383$new_n61843_
-.subckt oa22_x2 i0=$abc$109383$new_n28452_ i1=$abc$109383$new_n28451_ i2=$abc$109383$new_n15161_ q=$abc$109383$new_n61844_
-.subckt oa22_x2 i0=soc.rom.spimemio.state[9] i1=$abc$109383$new_n61844_ i2=$abc$109383$new_n61843_ q=$abc$109383$new_n61845_
-.subckt mx2_x2 cmd=$abc$109383$new_n61845_ i0=$abc$109383$new_n61839_ i1=soc.rom.spimemio.din_tag[0] q=$abc$109383$new_n61846_
-.subckt a2_x2 i0=$abc$109383$new_n61846_ i1=$abc$109383$new_n15041_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94926
-.subckt o2_x2 i0=soc.rom.spimemio.state[11] i1=soc.rom.spimemio.state[5] q=$abc$109383$new_n61848_
-.subckt mx2_x2 cmd=$abc$109383$new_n61845_ i0=$abc$109383$new_n61848_ i1=soc.rom.spimemio.din_tag[1] q=$abc$109383$new_n61849_
-.subckt a2_x2 i0=$abc$109383$new_n61849_ i1=$abc$109383$new_n15041_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94930
+.subckt or21nand_x1 i0=$abc$109383$new_n28452_ i1=$abc$109383$new_n28451_ i2=$abc$109383$new_n15161_ nq=$abc$109383$new_n61844_
+.subckt or21nand_x1 i0=soc.rom.spimemio.state[9] i1=$abc$109383$new_n61844_ i2=$abc$109383$new_n61843_ nq=$abc$109383$new_n61845_
+.subckt mux2_x1 cmd=$abc$109383$new_n61845_ i0=$abc$109383$new_n61839_ i1=soc.rom.spimemio.din_tag[0] q=$abc$109383$new_n61846_
+.subckt and2_x1 i0=$abc$109383$new_n61846_ i1=$abc$109383$new_n15041_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94926
+.subckt or2_x1 i0=soc.rom.spimemio.state[11] i1=soc.rom.spimemio.state[5] q=$abc$109383$new_n61848_
+.subckt mux2_x1 cmd=$abc$109383$new_n61845_ i0=$abc$109383$new_n61848_ i1=soc.rom.spimemio.din_tag[1] q=$abc$109383$new_n61849_
+.subckt and2_x1 i0=$abc$109383$new_n61849_ i1=$abc$109383$new_n15041_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$94930
 .subckt nand3_x0 i0=$abc$109383$new_n15185_ i1=$abc$109383$new_n15151_ i2=$abc$109383$new_n14738_ nq=$abc$109383$new_n61851_
-.subckt a2_x2 i0=$abc$109383$new_n14737_ i1=soc.rom.spimemio.din_tag[2] q=$abc$109383$new_n61852_
+.subckt and2_x1 i0=$abc$109383$new_n14737_ i1=soc.rom.spimemio.din_tag[2] q=$abc$109383$new_n61852_
 .subckt nand2_x0 i0=$abc$109383$new_n61852_ i1=$abc$109383$new_n61845_ nq=$abc$109383$new_n61853_
 .subckt nand2_x0 i0=$abc$109383$new_n61853_ i1=$abc$109383$new_n61851_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$94934
-.subckt a4_x2 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n28934_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n44285_ q=$abc$109383$new_n61855_
+.subckt and4_x1 i0=$abc$109383$new_n44286_ i1=$abc$109383$new_n28934_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n44285_ q=$abc$109383$new_n61855_
 .subckt buf_x4 i=$abc$109383$new_n61855_ q=$abc$109383$new_n61856_
-.subckt ao22_x2 i0=$abc$109383$new_n61856_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[8] i2=$abc$109383$new_n27536_ q=$abc$109383$new_n61857_
+.subckt and21nor_x1 i0=$abc$109383$new_n61856_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[8] i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n61857_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29114_ nq=$abc$109383$new_n61858_
-.subckt a2_x2 i0=$abc$109383$new_n61858_ i1=$abc$109383$new_n61857_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95626
-.subckt ao22_x2 i0=$abc$109383$new_n61856_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[9] i2=$abc$109383$new_n27536_ q=$abc$109383$new_n61860_
+.subckt and2_x1 i0=$abc$109383$new_n61858_ i1=$abc$109383$new_n61857_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95626
+.subckt and21nor_x1 i0=$abc$109383$new_n61856_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[9] i2=$abc$109383$new_n27536_ nq=$abc$109383$new_n61860_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29124_ nq=$abc$109383$new_n61861_
-.subckt a2_x2 i0=$abc$109383$new_n61861_ i1=$abc$109383$new_n61860_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95630
-.subckt ao22_x2 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[10] i2=$abc$109383$new_n28169_ q=$abc$109383$new_n61863_
+.subckt and2_x1 i0=$abc$109383$new_n61861_ i1=$abc$109383$new_n61860_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95630
+.subckt and21nor_x1 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[10] i2=$abc$109383$new_n28169_ nq=$abc$109383$new_n61863_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29133_ nq=$abc$109383$new_n61864_
-.subckt a2_x2 i0=$abc$109383$new_n61864_ i1=$abc$109383$new_n61863_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95634
-.subckt ao22_x2 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[11] i2=$abc$109383$new_n28169_ q=$abc$109383$new_n61866_
+.subckt and2_x1 i0=$abc$109383$new_n61864_ i1=$abc$109383$new_n61863_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95634
+.subckt and21nor_x1 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[11] i2=$abc$109383$new_n28169_ nq=$abc$109383$new_n61866_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29142_ nq=$abc$109383$new_n61867_
-.subckt a2_x2 i0=$abc$109383$new_n61867_ i1=$abc$109383$new_n61866_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95638
-.subckt ao22_x2 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[12] i2=$abc$109383$new_n28169_ q=$abc$109383$new_n61869_
+.subckt and2_x1 i0=$abc$109383$new_n61867_ i1=$abc$109383$new_n61866_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95638
+.subckt and21nor_x1 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[12] i2=$abc$109383$new_n28169_ nq=$abc$109383$new_n61869_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29151_ nq=$abc$109383$new_n61870_
-.subckt a2_x2 i0=$abc$109383$new_n61870_ i1=$abc$109383$new_n61869_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95642
-.subckt ao22_x2 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[13] i2=$abc$109383$new_n28169_ q=$abc$109383$new_n61872_
+.subckt and2_x1 i0=$abc$109383$new_n61870_ i1=$abc$109383$new_n61869_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95642
+.subckt and21nor_x1 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[13] i2=$abc$109383$new_n28169_ nq=$abc$109383$new_n61872_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29160_ nq=$abc$109383$new_n61873_
-.subckt a2_x2 i0=$abc$109383$new_n61873_ i1=$abc$109383$new_n61872_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95646
-.subckt ao22_x2 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[14] i2=$abc$109383$new_n28169_ q=$abc$109383$new_n61875_
+.subckt and2_x1 i0=$abc$109383$new_n61873_ i1=$abc$109383$new_n61872_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95646
+.subckt and21nor_x1 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[14] i2=$abc$109383$new_n28169_ nq=$abc$109383$new_n61875_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29169_ nq=$abc$109383$new_n61876_
-.subckt a2_x2 i0=$abc$109383$new_n61876_ i1=$abc$109383$new_n61875_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95650
-.subckt ao22_x2 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[15] i2=$abc$109383$new_n28169_ q=$abc$109383$new_n61878_
+.subckt and2_x1 i0=$abc$109383$new_n61876_ i1=$abc$109383$new_n61875_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95650
+.subckt and21nor_x1 i0=$abc$109383$new_n61855_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[15] i2=$abc$109383$new_n28169_ nq=$abc$109383$new_n61878_
 .subckt nand2_x0 i0=$abc$109383$new_n61856_ i1=$abc$109383$new_n29178_ nq=$abc$109383$new_n61879_
-.subckt a2_x2 i0=$abc$109383$new_n61879_ i1=$abc$109383$new_n61878_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95654
+.subckt and2_x1 i0=$abc$109383$new_n61879_ i1=$abc$109383$new_n61878_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95654
 .subckt nand3_x0 i0=$abc$109383$new_n29113_ i1=$abc$109383$new_n29112_ i2=$abc$109383$new_n29111_ nq=$abc$109383$new_n61881_
 .subckt nand3_x0 i0=$abc$109383$new_n29096_ i1=$abc$109383$new_n29099_ i2=$abc$109383$new_n28926_ nq=$abc$109383$new_n61882_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61881_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n61883_
-.subckt a2_x2 i0=$abc$109383$new_n61883_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95658
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61881_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n61883_
+.subckt and2_x1 i0=$abc$109383$new_n61883_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95658
 .subckt nand3_x0 i0=$abc$109383$new_n29123_ i1=$abc$109383$new_n29122_ i2=$abc$109383$new_n29121_ nq=$abc$109383$new_n61885_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61885_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n61886_
-.subckt a2_x2 i0=$abc$109383$new_n61886_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95662
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61885_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n61886_
+.subckt and2_x1 i0=$abc$109383$new_n61886_ i1=$abc$109383$new_n61692_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95662
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61888_
 .subckt nand3_x0 i0=$abc$109383$new_n29132_ i1=$abc$109383$new_n29131_ i2=$abc$109383$new_n29130_ nq=$abc$109383$new_n61889_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61889_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n61890_
-.subckt a2_x2 i0=$abc$109383$new_n61890_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95666
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61889_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n61890_
+.subckt and2_x1 i0=$abc$109383$new_n61890_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95666
 .subckt nand3_x0 i0=$abc$109383$new_n29141_ i1=$abc$109383$new_n29140_ i2=$abc$109383$new_n29139_ nq=$abc$109383$new_n61892_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61892_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n61893_
-.subckt a2_x2 i0=$abc$109383$new_n61893_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95670
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61892_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n61893_
+.subckt and2_x1 i0=$abc$109383$new_n61893_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95670
 .subckt nand3_x0 i0=$abc$109383$new_n29150_ i1=$abc$109383$new_n29149_ i2=$abc$109383$new_n29148_ nq=$abc$109383$new_n61895_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61895_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n61896_
-.subckt a2_x2 i0=$abc$109383$new_n61896_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95674
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61895_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n61896_
+.subckt and2_x1 i0=$abc$109383$new_n61896_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95674
 .subckt nand3_x0 i0=$abc$109383$new_n29159_ i1=$abc$109383$new_n29158_ i2=$abc$109383$new_n29157_ nq=$abc$109383$new_n61898_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61898_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n61899_
-.subckt a2_x2 i0=$abc$109383$new_n61899_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95678
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61898_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n61899_
+.subckt and2_x1 i0=$abc$109383$new_n61899_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95678
 .subckt nand3_x0 i0=$abc$109383$new_n29168_ i1=$abc$109383$new_n29167_ i2=$abc$109383$new_n29166_ nq=$abc$109383$new_n61901_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61901_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n61902_
-.subckt a2_x2 i0=$abc$109383$new_n61902_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95682
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61901_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n61902_
+.subckt and2_x1 i0=$abc$109383$new_n61902_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95682
 .subckt nand3_x0 i0=$abc$109383$new_n29177_ i1=$abc$109383$new_n29176_ i2=$abc$109383$new_n29175_ nq=$abc$109383$new_n61904_
-.subckt mx2_x2 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61904_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n61905_
-.subckt a2_x2 i0=$abc$109383$new_n61905_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95686
+.subckt mux2_x1 cmd=$abc$109383$new_n61882_ i0=$abc$109383$new_n61904_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n61905_
+.subckt and2_x1 i0=$abc$109383$new_n61905_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95686
 .subckt nand4_x0 i0=$abc$109383$new_n28920_ i1=$abc$109383$new_n50395_ i2=$abc$109383$new_n19647_ i3=soc.gpio.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n61907_
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61881_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n61908_
-.subckt a2_x2 i0=$abc$109383$new_n61908_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95706
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61885_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n61910_
-.subckt a2_x2 i0=$abc$109383$new_n61910_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95710
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61889_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n61912_
-.subckt a2_x2 i0=$abc$109383$new_n61912_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95714
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61892_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n61914_
-.subckt a2_x2 i0=$abc$109383$new_n61914_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95718
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61881_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n61908_
+.subckt and2_x1 i0=$abc$109383$new_n61908_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95706
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61885_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n61910_
+.subckt and2_x1 i0=$abc$109383$new_n61910_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95710
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61889_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n61912_
+.subckt and2_x1 i0=$abc$109383$new_n61912_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95714
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61892_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n61914_
+.subckt and2_x1 i0=$abc$109383$new_n61914_ i1=$abc$109383$new_n61888_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95718
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61916_
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61895_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n61917_
-.subckt a2_x2 i0=$abc$109383$new_n61917_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95722
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61898_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n61919_
-.subckt a2_x2 i0=$abc$109383$new_n61919_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95726
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61901_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n61921_
-.subckt a2_x2 i0=$abc$109383$new_n61921_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95730
-.subckt mx2_x2 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61904_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n61923_
-.subckt a2_x2 i0=$abc$109383$new_n61923_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95734
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61895_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n61917_
+.subckt and2_x1 i0=$abc$109383$new_n61917_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95722
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61898_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n61919_
+.subckt and2_x1 i0=$abc$109383$new_n61919_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95726
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61901_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n61921_
+.subckt and2_x1 i0=$abc$109383$new_n61921_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95730
+.subckt mux2_x1 cmd=$abc$109383$new_n61907_ i0=$abc$109383$new_n61904_ i1=soc.gpio.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n61923_
+.subckt and2_x1 i0=$abc$109383$new_n61923_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$95734
 .subckt nand4_x0 i0=$abc$109383$new_n27575_ i1=$abc$109383$new_n27427_ i2=$abc$109383$new_n19687_ i3=$abc$109383$new_n27569_ nq=$abc$109383$new_n61925_
-.subckt mx2_x2 cmd=$abc$109383$new_n61925_ i0=$abc$109383$new_n27661_ i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[16] q=$abc$109383$new_n61926_
-.subckt a2_x2 i0=$abc$109383$new_n61926_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96250
+.subckt mux2_x1 cmd=$abc$109383$new_n61925_ i0=$abc$109383$new_n27661_ i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[16] q=$abc$109383$new_n61926_
+.subckt and2_x1 i0=$abc$109383$new_n61926_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96250
 .subckt nand4_x0 i0=$abc$109383$new_n27570_ i1=$abc$109383$new_n27640_ i2=$abc$109383$new_n27639_ i3=$abc$109383$new_n19749_ nq=$abc$109383$new_n61928_
 .subckt nand2_x0 i0=$abc$109383$new_n61928_ i1=$abc$109383$new_n45997_ nq=$abc$109383$new_n61929_
-.subckt ao22_x2 i0=$abc$109383$new_n61928_ i1=$abc$109383$new_n27661_ i2=$abc$109383$new_n28054_ q=$abc$109383$new_n61930_
-.subckt a2_x2 i0=$abc$109383$new_n61930_ i1=$abc$109383$new_n61929_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96254
+.subckt and21nor_x1 i0=$abc$109383$new_n61928_ i1=$abc$109383$new_n27661_ i2=$abc$109383$new_n28054_ nq=$abc$109383$new_n61930_
+.subckt and2_x1 i0=$abc$109383$new_n61930_ i1=$abc$109383$new_n61929_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96254
 .subckt nand3_x0 i0=$abc$109383$new_n27573_ i1=$abc$109383$new_n27427_ i2=$abc$109383$new_n19687_ nq=$abc$109383$new_n61932_
-.subckt mx2_x2 cmd=$abc$109383$new_n61932_ i0=$abc$109383$new_n27661_ i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[0] q=$abc$109383$new_n61933_
-.subckt a2_x2 i0=$abc$109383$new_n61933_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96258
+.subckt mux2_x1 cmd=$abc$109383$new_n61932_ i0=$abc$109383$new_n27661_ i1=soc.timer.bridge.csr_bridge_1.wb__dat_r[0] q=$abc$109383$new_n61933_
+.subckt and2_x1 i0=$abc$109383$new_n61933_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96258
 .subckt nand3_x0 i0=$abc$109383$new_n27472_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n27560_ nq=$abc$109383$new_n61935_
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[8] q=$abc$109383$new_n61936_
-.subckt a2_x2 i0=$abc$109383$new_n61936_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96262
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[9] q=$abc$109383$new_n61938_
-.subckt a2_x2 i0=$abc$109383$new_n61938_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96266
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[10] q=$abc$109383$new_n61940_
-.subckt a2_x2 i0=$abc$109383$new_n61940_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96270
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[11] q=$abc$109383$new_n61942_
-.subckt a2_x2 i0=$abc$109383$new_n61942_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96274
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[8] q=$abc$109383$new_n61936_
+.subckt and2_x1 i0=$abc$109383$new_n61936_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96262
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[9] q=$abc$109383$new_n61938_
+.subckt and2_x1 i0=$abc$109383$new_n61938_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96266
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[10] q=$abc$109383$new_n61940_
+.subckt and2_x1 i0=$abc$109383$new_n61940_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96270
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[11] q=$abc$109383$new_n61942_
+.subckt and2_x1 i0=$abc$109383$new_n61942_ i1=$abc$109383$new_n61916_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96274
 .subckt buf_x4 i=$abc$109383$new_n60844_ q=$abc$109383$new_n61944_
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[12] q=$abc$109383$new_n61945_
-.subckt a2_x2 i0=$abc$109383$new_n61945_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96278
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[13] q=$abc$109383$new_n61947_
-.subckt a2_x2 i0=$abc$109383$new_n61947_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96282
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[14] q=$abc$109383$new_n61949_
-.subckt a2_x2 i0=$abc$109383$new_n61949_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96286
-.subckt mx2_x2 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[15] q=$abc$109383$new_n61951_
-.subckt a2_x2 i0=$abc$109383$new_n61951_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96290
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[12] q=$abc$109383$new_n61945_
+.subckt and2_x1 i0=$abc$109383$new_n61945_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96278
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[13] q=$abc$109383$new_n61947_
+.subckt and2_x1 i0=$abc$109383$new_n61947_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96282
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[14] q=$abc$109383$new_n61949_
+.subckt and2_x1 i0=$abc$109383$new_n61949_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96286
+.subckt mux2_x1 cmd=$abc$109383$new_n61935_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[15] q=$abc$109383$new_n61951_
+.subckt and2_x1 i0=$abc$109383$new_n61951_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96290
 .subckt nand3_x0 i0=$abc$109383$new_n27470_ i1=$abc$109383$new_n27426_ i2=$abc$109383$new_n27560_ nq=$abc$109383$new_n61953_
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n61954_
-.subckt a2_x2 i0=$abc$109383$new_n61954_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96294
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n61956_
-.subckt a2_x2 i0=$abc$109383$new_n61956_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96298
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n61958_
-.subckt a2_x2 i0=$abc$109383$new_n61958_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96302
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n61960_
-.subckt a2_x2 i0=$abc$109383$new_n61960_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96306
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n61962_
-.subckt a2_x2 i0=$abc$109383$new_n61962_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96310
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n61964_
-.subckt a2_x2 i0=$abc$109383$new_n61964_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96314
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n61954_
+.subckt and2_x1 i0=$abc$109383$new_n61954_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96294
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n61956_
+.subckt and2_x1 i0=$abc$109383$new_n61956_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96298
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n61958_
+.subckt and2_x1 i0=$abc$109383$new_n61958_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96302
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n61960_
+.subckt and2_x1 i0=$abc$109383$new_n61960_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96306
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n61962_
+.subckt and2_x1 i0=$abc$109383$new_n61962_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96310
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n61964_
+.subckt and2_x1 i0=$abc$109383$new_n61964_ i1=$abc$109383$new_n61944_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96314
 .subckt buf_x4 i=$abc$109383$new_n27430_ q=$abc$109383$new_n61966_
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n61967_
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n61968_
-.subckt a2_x2 i0=$abc$109383$new_n61968_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96318
-.subckt mx2_x2 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n61970_
-.subckt a2_x2 i0=$abc$109383$new_n61970_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96322
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n61968_
+.subckt and2_x1 i0=$abc$109383$new_n61968_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96318
+.subckt mux2_x1 cmd=$abc$109383$new_n61953_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n61970_
+.subckt and2_x1 i0=$abc$109383$new_n61970_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96322
 .subckt nand3_x0 i0=$abc$109383$new_n27426_ i1=$abc$109383$new_n27560_ i2=soc.timer.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n61972_
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n61973_
-.subckt a2_x2 i0=$abc$109383$new_n61973_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96326
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n61975_
-.subckt a2_x2 i0=$abc$109383$new_n61975_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96330
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n61977_
-.subckt a2_x2 i0=$abc$109383$new_n61977_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96334
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n61979_
-.subckt a2_x2 i0=$abc$109383$new_n61979_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96338
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n61981_
-.subckt a2_x2 i0=$abc$109383$new_n61981_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96342
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n61983_
-.subckt a2_x2 i0=$abc$109383$new_n61983_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96346
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n61985_
-.subckt a2_x2 i0=$abc$109383$new_n61985_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96350
-.subckt mx2_x2 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n61987_
-.subckt a2_x2 i0=$abc$109383$new_n61987_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96354
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27690_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n61973_
+.subckt and2_x1 i0=$abc$109383$new_n61973_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96326
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27703_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n61975_
+.subckt and2_x1 i0=$abc$109383$new_n61975_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96330
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27716_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n61977_
+.subckt and2_x1 i0=$abc$109383$new_n61977_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96334
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27729_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n61979_
+.subckt and2_x1 i0=$abc$109383$new_n61979_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96338
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27742_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n61981_
+.subckt and2_x1 i0=$abc$109383$new_n61981_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96342
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27755_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n61983_
+.subckt and2_x1 i0=$abc$109383$new_n61983_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96346
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27768_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n61985_
+.subckt and2_x1 i0=$abc$109383$new_n61985_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96350
+.subckt mux2_x1 cmd=$abc$109383$new_n61972_ i0=$abc$109383$new_n27781_ i1=soc.timer.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n61987_
+.subckt and2_x1 i0=$abc$109383$new_n61987_ i1=$abc$109383$new_n61967_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96354
 .subckt nand3_x0 i0=$abc$109383$new_n20637_ i1=$abc$109383$new_n15218_ i2=$abc$109383$new_n15207_ nq=$abc$109383$new_n61989_
 .subckt nand2_x0 i0=$abc$109383$new_n61989_ i1=soc.rom.spimemio.xfer.count[1] nq=$abc$109383$new_n61990_
 .subckt nand2_x0 i0=$abc$109383$new_n20637_ i1=$abc$109383$new_n15218_ nq=$abc$109383$new_n61991_
-.subckt a2_x2 i0=$abc$109383$new_n19707_ i1=$abc$109383$new_n15207_ q=$abc$109383$new_n61992_
-.subckt a2_x2 i0=soc.rom.spimemio.xfer.count[1] i1=$abc$109383$new_n14993_ q=$abc$109383$new_n61993_
-.subckt a2_x2 i0=$abc$109383$new_n14981_ i1=$abc$109383$new_n15230_ q=$abc$109383$new_n61994_
-.subckt oa22_x2 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n61994_ i2=$abc$109383$new_n61993_ q=$abc$109383$new_n61995_
+.subckt and2_x1 i0=$abc$109383$new_n19707_ i1=$abc$109383$new_n15207_ q=$abc$109383$new_n61992_
+.subckt and2_x1 i0=soc.rom.spimemio.xfer.count[1] i1=$abc$109383$new_n14993_ q=$abc$109383$new_n61993_
+.subckt and2_x1 i0=$abc$109383$new_n14981_ i1=$abc$109383$new_n15230_ q=$abc$109383$new_n61994_
+.subckt or21nand_x1 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n61994_ i2=$abc$109383$new_n61993_ nq=$abc$109383$new_n61995_
 .subckt nand2_x0 i0=$abc$109383$new_n61995_ i1=$abc$109383$new_n61992_ nq=$abc$109383$new_n61996_
-.subckt oa22_x2 i0=$abc$109383$new_n15005_ i1=$abc$109383$new_n15004_ i2=$abc$109383$new_n19707_ q=$abc$109383$new_n61997_
-.subckt oa22_x2 i0=$abc$109383$new_n61997_ i1=$abc$109383$new_n61996_ i2=$abc$109383$new_n61991_ q=$abc$109383$new_n61998_
+.subckt or21nand_x1 i0=$abc$109383$new_n15005_ i1=$abc$109383$new_n15004_ i2=$abc$109383$new_n19707_ nq=$abc$109383$new_n61997_
+.subckt or21nand_x1 i0=$abc$109383$new_n61997_ i1=$abc$109383$new_n61996_ i2=$abc$109383$new_n61991_ nq=$abc$109383$new_n61998_
 .subckt nand2_x0 i0=$abc$109383$new_n61998_ i1=$abc$109383$new_n61990_ nq=$abc$109383$new_n61999_
-.subckt a3_x2 i0=$abc$109383$new_n61999_ i1=$abc$109383$new_n22660_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96470
-.subckt oa22_x2 i0=$abc$109383$new_n20637_ i1=$abc$109383$new_n15218_ i2=soc.rom.spimemio.xfer.count[2] q=$abc$109383$new_n62001_
-.subckt a4_x2 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n14997_ i2=$abc$109383$new_n14981_ i3=$abc$109383$new_n15230_ q=$abc$109383$new_n62002_
-.subckt nxr2_x1 i0=$abc$109383$new_n62002_ i1=$abc$109383$new_n14983_ nq=$abc$109383$new_n62003_
-.subckt a2_x2 i0=$abc$109383$new_n62003_ i1=$abc$109383$new_n15010_ q=$abc$109383$new_n62004_
-.subckt mx2_x2 cmd=$abc$109383$new_n14993_ i0=$abc$109383$new_n14990_ i1=$abc$109383$new_n14983_ q=$abc$109383$new_n62005_
+.subckt and3_x1 i0=$abc$109383$new_n61999_ i1=$abc$109383$new_n22660_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96470
+.subckt or21nand_x1 i0=$abc$109383$new_n20637_ i1=$abc$109383$new_n15218_ i2=soc.rom.spimemio.xfer.count[2] nq=$abc$109383$new_n62001_
+.subckt and4_x1 i0=$abc$109383$new_n14986_ i1=$abc$109383$new_n14997_ i2=$abc$109383$new_n14981_ i3=$abc$109383$new_n15230_ q=$abc$109383$new_n62002_
+.subckt nexor2_x0 i0=$abc$109383$new_n62002_ i1=$abc$109383$new_n14983_ nq=$abc$109383$new_n62003_
+.subckt and2_x1 i0=$abc$109383$new_n62003_ i1=$abc$109383$new_n15010_ q=$abc$109383$new_n62004_
+.subckt mux2_x1 cmd=$abc$109383$new_n14993_ i0=$abc$109383$new_n14990_ i1=$abc$109383$new_n14983_ q=$abc$109383$new_n62005_
 .subckt nand2_x0 i0=$abc$109383$new_n15022_ i1=$abc$109383$new_n15189_ nq=$abc$109383$new_n62006_
-.subckt ao22_x2 i0=$abc$109383$new_n62006_ i1=$abc$109383$new_n62005_ i2=$abc$109383$new_n20638_ q=$abc$109383$new_n62007_
+.subckt and21nor_x1 i0=$abc$109383$new_n62006_ i1=$abc$109383$new_n62005_ i2=$abc$109383$new_n20638_ nq=$abc$109383$new_n62007_
 .subckt nand3_x0 i0=$abc$109383$new_n15016_ i1=$abc$109383$new_n14986_ i2=$abc$109383$new_n14983_ nq=$abc$109383$new_n62008_
-.subckt ao22_x2 i0=$abc$109383$new_n14980_ i1=$abc$109383$new_n14992_ i2=$abc$109383$new_n62008_ q=$abc$109383$new_n62009_
+.subckt and21nor_x1 i0=$abc$109383$new_n14980_ i1=$abc$109383$new_n14992_ i2=$abc$109383$new_n62008_ nq=$abc$109383$new_n62009_
 .subckt nand2_x0 i0=$abc$109383$new_n62009_ i1=$abc$109383$new_n62007_ nq=$abc$109383$new_n62010_
-.subckt ao22_x2 i0=$abc$109383$new_n62010_ i1=$abc$109383$new_n62004_ i2=$abc$109383$new_n62001_ q=$abc$109383$new_n62011_
-.subckt a3_x2 i0=$abc$109383$new_n62011_ i1=$abc$109383$new_n22660_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96474
+.subckt and21nor_x1 i0=$abc$109383$new_n62010_ i1=$abc$109383$new_n62004_ i2=$abc$109383$new_n62001_ nq=$abc$109383$new_n62011_
+.subckt and3_x1 i0=$abc$109383$new_n62011_ i1=$abc$109383$new_n22660_ i2=$abc$109383$new_n15117_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$96474
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62013_
 .subckt nand2_x0 i0=$abc$109383$new_n28142_ i1=$abc$109383$new_n28129_ nq=$abc$109383$new_n62014_
 .subckt buf_x4 i=$abc$109383$new_n62014_ q=$abc$109383$new_n62015_
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[8] q=$abc$109383$new_n62016_
-.subckt a2_x2 i0=$abc$109383$new_n62016_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97146
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[9] q=$abc$109383$new_n62018_
-.subckt a2_x2 i0=$abc$109383$new_n62018_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97150
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[10] q=$abc$109383$new_n62020_
-.subckt a2_x2 i0=$abc$109383$new_n62020_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97154
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[11] q=$abc$109383$new_n62022_
-.subckt a2_x2 i0=$abc$109383$new_n62022_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97158
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[12] q=$abc$109383$new_n62024_
-.subckt a2_x2 i0=$abc$109383$new_n62024_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97162
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[13] q=$abc$109383$new_n62026_
-.subckt a2_x2 i0=$abc$109383$new_n62026_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97166
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[14] q=$abc$109383$new_n62028_
-.subckt a2_x2 i0=$abc$109383$new_n62028_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97170
-.subckt mx2_x2 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[15] q=$abc$109383$new_n62030_
-.subckt a2_x2 i0=$abc$109383$new_n62030_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97174
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[8] q=$abc$109383$new_n62016_
+.subckt and2_x1 i0=$abc$109383$new_n62016_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97146
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[9] q=$abc$109383$new_n62018_
+.subckt and2_x1 i0=$abc$109383$new_n62018_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97150
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[10] q=$abc$109383$new_n62020_
+.subckt and2_x1 i0=$abc$109383$new_n62020_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97154
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[11] q=$abc$109383$new_n62022_
+.subckt and2_x1 i0=$abc$109383$new_n62022_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97158
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[12] q=$abc$109383$new_n62024_
+.subckt and2_x1 i0=$abc$109383$new_n62024_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97162
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[13] q=$abc$109383$new_n62026_
+.subckt and2_x1 i0=$abc$109383$new_n62026_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97166
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[14] q=$abc$109383$new_n62028_
+.subckt and2_x1 i0=$abc$109383$new_n62028_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97170
+.subckt mux2_x1 cmd=$abc$109383$new_n62015_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[15] q=$abc$109383$new_n62030_
+.subckt and2_x1 i0=$abc$109383$new_n62030_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97174
 .subckt nand2_x0 i0=$abc$109383$new_n28139_ i1=$abc$109383$new_n28129_ nq=$abc$109383$new_n62032_
 .subckt buf_x4 i=$abc$109383$new_n62032_ q=$abc$109383$new_n62033_
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n62034_
-.subckt a2_x2 i0=$abc$109383$new_n62034_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97178
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n62036_
-.subckt a2_x2 i0=$abc$109383$new_n62036_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97182
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[0] q=$abc$109383$new_n62034_
+.subckt and2_x1 i0=$abc$109383$new_n62034_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97178
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[1] q=$abc$109383$new_n62036_
+.subckt and2_x1 i0=$abc$109383$new_n62036_ i1=$abc$109383$new_n62013_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97182
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62038_
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n62039_
-.subckt a2_x2 i0=$abc$109383$new_n62039_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97186
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n62041_
-.subckt a2_x2 i0=$abc$109383$new_n62041_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97190
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n62043_
-.subckt a2_x2 i0=$abc$109383$new_n62043_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97194
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n62045_
-.subckt a2_x2 i0=$abc$109383$new_n62045_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97198
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n62047_
-.subckt a2_x2 i0=$abc$109383$new_n62047_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97202
-.subckt mx2_x2 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n62049_
-.subckt a2_x2 i0=$abc$109383$new_n62049_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97206
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[2] q=$abc$109383$new_n62039_
+.subckt and2_x1 i0=$abc$109383$new_n62039_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97186
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[3] q=$abc$109383$new_n62041_
+.subckt and2_x1 i0=$abc$109383$new_n62041_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97190
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[4] q=$abc$109383$new_n62043_
+.subckt and2_x1 i0=$abc$109383$new_n62043_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97194
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[5] q=$abc$109383$new_n62045_
+.subckt and2_x1 i0=$abc$109383$new_n62045_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97198
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[6] q=$abc$109383$new_n62047_
+.subckt and2_x1 i0=$abc$109383$new_n62047_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97202
+.subckt mux2_x1 cmd=$abc$109383$new_n62033_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[7] q=$abc$109383$new_n62049_
+.subckt and2_x1 i0=$abc$109383$new_n62049_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97206
 .subckt nand2_x0 i0=$abc$109383$new_n28129_ i1=soc.rom.bridge.csr_bridge_0.cycle[2] nq=$abc$109383$new_n62051_
 .subckt buf_x4 i=$abc$109383$new_n62051_ q=$abc$109383$new_n62052_
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n62053_
-.subckt a2_x2 i0=$abc$109383$new_n62053_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97210
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n62055_
-.subckt a2_x2 i0=$abc$109383$new_n62055_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97214
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n62057_
-.subckt a2_x2 i0=$abc$109383$new_n62057_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97218
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n62059_
-.subckt a2_x2 i0=$abc$109383$new_n62059_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97222
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28397_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[24] q=$abc$109383$new_n62053_
+.subckt and2_x1 i0=$abc$109383$new_n62053_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97210
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28405_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[25] q=$abc$109383$new_n62055_
+.subckt and2_x1 i0=$abc$109383$new_n62055_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97214
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28412_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[26] q=$abc$109383$new_n62057_
+.subckt and2_x1 i0=$abc$109383$new_n62057_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97218
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28419_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[27] q=$abc$109383$new_n62059_
+.subckt and2_x1 i0=$abc$109383$new_n62059_ i1=$abc$109383$new_n62038_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97222
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62061_
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n62062_
-.subckt a2_x2 i0=$abc$109383$new_n62062_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97226
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n62064_
-.subckt a2_x2 i0=$abc$109383$new_n62064_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97230
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n62066_
-.subckt a2_x2 i0=$abc$109383$new_n62066_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97234
-.subckt mx2_x2 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n62068_
-.subckt a2_x2 i0=$abc$109383$new_n62068_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97238
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28427_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[28] q=$abc$109383$new_n62062_
+.subckt and2_x1 i0=$abc$109383$new_n62062_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97226
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28434_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[29] q=$abc$109383$new_n62064_
+.subckt and2_x1 i0=$abc$109383$new_n62064_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97230
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28441_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[30] q=$abc$109383$new_n62066_
+.subckt and2_x1 i0=$abc$109383$new_n62066_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97234
+.subckt mux2_x1 cmd=$abc$109383$new_n62052_ i0=$abc$109383$new_n28448_ i1=soc.rom.bridge.csr_bridge_0.wb__dat_r[31] q=$abc$109383$new_n62068_
+.subckt and2_x1 i0=$abc$109383$new_n62068_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97238
 .subckt buf_x4 i=$abc$109383$new_n28661_ q=$abc$109383$new_n62070_
-.subckt ao22_x2 i0=$abc$109383$new_n28845_ i1=$abc$109383$new_n28844_ i2=$abc$109383$new_n27429_ q=$abc$109383$new_n62071_
+.subckt and21nor_x1 i0=$abc$109383$new_n28845_ i1=$abc$109383$new_n28844_ i2=$abc$109383$new_n27429_ nq=$abc$109383$new_n62071_
 .subckt buf_x4 i=$abc$109383$new_n62071_ q=$abc$109383$new_n62072_
 .subckt buf_x4 i=$abc$109383$new_n62072_ q=$abc$109383$new_n62073_
-.subckt mx2_x2 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[0] i1=soc.hyperram.sr[0] q=$abc$109383$new_n62074_
-.subckt a3_x2 i0=$abc$109383$new_n62074_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97274
-.subckt mx2_x2 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[3] i1=soc.hyperram.sr[3] q=$abc$109383$new_n62076_
-.subckt a3_x2 i0=$abc$109383$new_n62076_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97278
-.subckt mx2_x2 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[4] i1=soc.hyperram.sr[4] q=$abc$109383$new_n62078_
-.subckt a3_x2 i0=$abc$109383$new_n62078_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97282
-.subckt mx2_x2 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[5] i1=soc.hyperram.sr[5] q=$abc$109383$new_n62080_
-.subckt a3_x2 i0=$abc$109383$new_n62080_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97286
-.subckt mx2_x2 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[6] i1=soc.hyperram.sr[6] q=$abc$109383$new_n62082_
-.subckt a3_x2 i0=$abc$109383$new_n62082_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97290
-.subckt mx2_x2 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[7] i1=soc.hyperram.sr[7] q=$abc$109383$new_n62084_
-.subckt a3_x2 i0=$abc$109383$new_n62084_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97294
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[0] i1=soc.hyperram.sr[8] q=$abc$109383$new_n62086_
-.subckt a3_x2 i0=$abc$109383$new_n62086_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97298
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[1] i1=soc.hyperram.sr[9] q=$abc$109383$new_n62088_
-.subckt a3_x2 i0=$abc$109383$new_n62088_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97302
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[2] i1=soc.hyperram.sr[10] q=$abc$109383$new_n62090_
-.subckt a3_x2 i0=$abc$109383$new_n62090_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97306
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[3] i1=soc.hyperram.sr[11] q=$abc$109383$new_n62092_
-.subckt a3_x2 i0=$abc$109383$new_n62092_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97310
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[4] i1=soc.hyperram.sr[12] q=$abc$109383$new_n62094_
-.subckt a3_x2 i0=$abc$109383$new_n62094_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97314
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[5] i1=soc.hyperram.sr[13] q=$abc$109383$new_n62096_
-.subckt a3_x2 i0=$abc$109383$new_n62096_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97318
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[6] i1=soc.hyperram.sr[14] q=$abc$109383$new_n62098_
-.subckt a3_x2 i0=$abc$109383$new_n62098_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97322
-.subckt mx2_x2 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[7] i1=soc.hyperram.sr[15] q=$abc$109383$new_n62100_
-.subckt a3_x2 i0=$abc$109383$new_n62100_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97326
-.subckt mx2_x2 cmd=soc.hyperram.clk_phase[0] i0=soc.hyperram.dqi[1] i1=soc.hyperram.sr[1] q=$abc$109383$new_n62102_
-.subckt mx2_x2 cmd=$abc$109383$new_n28840_ i0=$abc$109383$new_n62102_ i1=$abc$109383$new_n19646_ q=$abc$109383$new_n62103_
-.subckt a2_x2 i0=$abc$109383$new_n62103_ i1=$abc$109383$new_n62073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97330
-.subckt mx2_x2 cmd=soc.hyperram.clk_phase[0] i0=soc.hyperram.dqi[2] i1=soc.hyperram.sr[2] q=$abc$109383$new_n62105_
-.subckt mx2_x2 cmd=$abc$109383$new_n28840_ i0=$abc$109383$new_n62105_ i1=$abc$109383$new_n19684_ q=$abc$109383$new_n62106_
-.subckt a2_x2 i0=$abc$109383$new_n62106_ i1=$abc$109383$new_n62073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97334
-.subckt a3_x2 i0=$abc$109383$new_n27453_ i1=$abc$109383$new_n27645_ i2=$abc$109383$new_n27493_ q=$abc$109383$new_n62108_
+.subckt mux2_x1 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[0] i1=soc.hyperram.sr[0] q=$abc$109383$new_n62074_
+.subckt and3_x1 i0=$abc$109383$new_n62074_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97274
+.subckt mux2_x1 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[3] i1=soc.hyperram.sr[3] q=$abc$109383$new_n62076_
+.subckt and3_x1 i0=$abc$109383$new_n62076_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97278
+.subckt mux2_x1 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[4] i1=soc.hyperram.sr[4] q=$abc$109383$new_n62078_
+.subckt and3_x1 i0=$abc$109383$new_n62078_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97282
+.subckt mux2_x1 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[5] i1=soc.hyperram.sr[5] q=$abc$109383$new_n62080_
+.subckt and3_x1 i0=$abc$109383$new_n62080_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97286
+.subckt mux2_x1 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[6] i1=soc.hyperram.sr[6] q=$abc$109383$new_n62082_
+.subckt and3_x1 i0=$abc$109383$new_n62082_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97290
+.subckt mux2_x1 cmd=$abc$109383$new_n28533_ i0=soc.hyperram.dqi[7] i1=soc.hyperram.sr[7] q=$abc$109383$new_n62084_
+.subckt and3_x1 i0=$abc$109383$new_n62084_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97294
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[0] i1=soc.hyperram.sr[8] q=$abc$109383$new_n62086_
+.subckt and3_x1 i0=$abc$109383$new_n62086_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97298
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[1] i1=soc.hyperram.sr[9] q=$abc$109383$new_n62088_
+.subckt and3_x1 i0=$abc$109383$new_n62088_ i1=$abc$109383$new_n62073_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97302
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[2] i1=soc.hyperram.sr[10] q=$abc$109383$new_n62090_
+.subckt and3_x1 i0=$abc$109383$new_n62090_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97306
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[3] i1=soc.hyperram.sr[11] q=$abc$109383$new_n62092_
+.subckt and3_x1 i0=$abc$109383$new_n62092_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n62070_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97310
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[4] i1=soc.hyperram.sr[12] q=$abc$109383$new_n62094_
+.subckt and3_x1 i0=$abc$109383$new_n62094_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97314
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[5] i1=soc.hyperram.sr[13] q=$abc$109383$new_n62096_
+.subckt and3_x1 i0=$abc$109383$new_n62096_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97318
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[6] i1=soc.hyperram.sr[14] q=$abc$109383$new_n62098_
+.subckt and3_x1 i0=$abc$109383$new_n62098_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97322
+.subckt mux2_x1 cmd=$abc$109383$new_n28660_ i0=soc.hyperram.sr[7] i1=soc.hyperram.sr[15] q=$abc$109383$new_n62100_
+.subckt and3_x1 i0=$abc$109383$new_n62100_ i1=$abc$109383$new_n62072_ i2=$abc$109383$new_n28712_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97326
+.subckt mux2_x1 cmd=soc.hyperram.clk_phase[0] i0=soc.hyperram.dqi[1] i1=soc.hyperram.sr[1] q=$abc$109383$new_n62102_
+.subckt mux2_x1 cmd=$abc$109383$new_n28840_ i0=$abc$109383$new_n62102_ i1=$abc$109383$new_n19646_ q=$abc$109383$new_n62103_
+.subckt and2_x1 i0=$abc$109383$new_n62103_ i1=$abc$109383$new_n62073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97330
+.subckt mux2_x1 cmd=soc.hyperram.clk_phase[0] i0=soc.hyperram.dqi[2] i1=soc.hyperram.sr[2] q=$abc$109383$new_n62105_
+.subckt mux2_x1 cmd=$abc$109383$new_n28840_ i0=$abc$109383$new_n62105_ i1=$abc$109383$new_n19684_ q=$abc$109383$new_n62106_
+.subckt and2_x1 i0=$abc$109383$new_n62106_ i1=$abc$109383$new_n62073_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$97334
+.subckt and3_x1 i0=$abc$109383$new_n27453_ i1=$abc$109383$new_n27645_ i2=$abc$109383$new_n27493_ q=$abc$109383$new_n62108_
 .subckt nand3_x0 i0=$abc$109383$new_n61561_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n29036_ nq=$abc$109383$new_n62109_
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62108_ i1=soc.timer.bridge_timer_ctr__r_data[16] q=$abc$109383$new_n62110_
-.subckt a2_x2 i0=$abc$109383$new_n27622_ i1=$abc$109383$new_n27475_ q=$abc$109383$new_n62111_
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62108_ i1=soc.timer.bridge_timer_ctr__r_data[16] q=$abc$109383$new_n62110_
+.subckt and2_x1 i0=$abc$109383$new_n27622_ i1=$abc$109383$new_n27475_ q=$abc$109383$new_n62111_
 .subckt nand4_x0 i0=$abc$109383$new_n61562_ i1=$abc$109383$new_n27491_ i2=$abc$109383$new_n27426_ i3=$abc$109383$new_n21937_ nq=$abc$109383$new_n62112_
-.subckt oa22_x2 i0=$abc$109383$new_n27608_ i1=$abc$109383$new_n62112_ i2=$abc$109383$new_n62111_ q=$abc$109383$new_n62113_
+.subckt or21nand_x1 i0=$abc$109383$new_n27608_ i1=$abc$109383$new_n62112_ i2=$abc$109383$new_n62111_ nq=$abc$109383$new_n62113_
 .subckt buf_x4 i=$abc$109383$new_n62113_ q=$abc$109383$new_n62114_
-.subckt mx2_x2 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62110_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[16] q=$abc$109383$new_n62115_
-.subckt a2_x2 i0=$abc$109383$new_n62115_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98394
-.subckt a4_x2 i0=$abc$109383$new_n27486_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27638_ q=$abc$109383$new_n62117_
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62117_ i1=soc.timer.bridge_timer_ctr__r_data[17] q=$abc$109383$new_n62118_
-.subckt mx2_x2 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62118_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[17] q=$abc$109383$new_n62119_
-.subckt a2_x2 i0=$abc$109383$new_n62119_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98398
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_ctr__r_data[18] q=$abc$109383$new_n62121_
-.subckt mx2_x2 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62121_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[18] q=$abc$109383$new_n62122_
-.subckt a2_x2 i0=$abc$109383$new_n62122_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98402
-.subckt a3_x2 i0=$abc$109383$new_n27509_ i1=$abc$109383$new_n27645_ i2=$abc$109383$new_n27493_ q=$abc$109383$new_n62124_
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62124_ i1=soc.timer.bridge_timer_ctr__r_data[19] q=$abc$109383$new_n62125_
-.subckt mx2_x2 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62125_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[19] q=$abc$109383$new_n62126_
-.subckt a2_x2 i0=$abc$109383$new_n62126_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98406
+.subckt mux2_x1 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62110_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[16] q=$abc$109383$new_n62115_
+.subckt and2_x1 i0=$abc$109383$new_n62115_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98394
+.subckt and4_x1 i0=$abc$109383$new_n27486_ i1=$abc$109383$new_n27494_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n27638_ q=$abc$109383$new_n62117_
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62117_ i1=soc.timer.bridge_timer_ctr__r_data[17] q=$abc$109383$new_n62118_
+.subckt mux2_x1 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62118_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[17] q=$abc$109383$new_n62119_
+.subckt and2_x1 i0=$abc$109383$new_n62119_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98398
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_ctr__r_data[18] q=$abc$109383$new_n62121_
+.subckt mux2_x1 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62121_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[18] q=$abc$109383$new_n62122_
+.subckt and2_x1 i0=$abc$109383$new_n62122_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98402
+.subckt and3_x1 i0=$abc$109383$new_n27509_ i1=$abc$109383$new_n27645_ i2=$abc$109383$new_n27493_ q=$abc$109383$new_n62124_
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62124_ i1=soc.timer.bridge_timer_ctr__r_data[19] q=$abc$109383$new_n62125_
+.subckt mux2_x1 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62125_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[19] q=$abc$109383$new_n62126_
+.subckt and2_x1 i0=$abc$109383$new_n62126_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98406
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[20] nq=$abc$109383$new_n62128_
 .subckt nand2_x0 i0=$abc$109383$new_n62114_ i1=$abc$109383$new_n62128_ nq=$abc$109383$new_n62129_
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n27519_ i1=soc.timer.bridge_timer_ctr__r_data[20] q=$abc$109383$new_n62130_
-.subckt ao22_x2 i0=$abc$109383$new_n62130_ i1=$abc$109383$new_n62114_ i2=$abc$109383$new_n28054_ q=$abc$109383$new_n62131_
-.subckt a2_x2 i0=$abc$109383$new_n62131_ i1=$abc$109383$new_n62129_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98410
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n27519_ i1=soc.timer.bridge_timer_ctr__r_data[20] q=$abc$109383$new_n62130_
+.subckt and21nor_x1 i0=$abc$109383$new_n62130_ i1=$abc$109383$new_n62114_ i2=$abc$109383$new_n28054_ nq=$abc$109383$new_n62131_
+.subckt and2_x1 i0=$abc$109383$new_n62131_ i1=$abc$109383$new_n62129_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98410
 .subckt nand4_x0 i0=$abc$109383$new_n61562_ i1=$abc$109383$new_n27531_ i2=$abc$109383$new_n27427_ i3=$abc$109383$new_n27561_ nq=$abc$109383$new_n62133_
 .subckt nand2_x0 i0=$abc$109383$new_n62109_ i1=soc.timer.bridge_timer_ctr__r_data[21] nq=$abc$109383$new_n62134_
 .subckt nand2_x0 i0=$abc$109383$new_n62134_ i1=$abc$109383$new_n62133_ nq=$abc$109383$new_n62135_
-.subckt mx2_x2 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62135_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21] q=$abc$109383$new_n62136_
-.subckt a2_x2 i0=$abc$109383$new_n62136_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98414
+.subckt mux2_x1 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62135_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21] q=$abc$109383$new_n62136_
+.subckt and2_x1 i0=$abc$109383$new_n62136_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98414
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[22] nq=$abc$109383$new_n62138_
 .subckt nand2_x0 i0=$abc$109383$new_n62114_ i1=$abc$109383$new_n62138_ nq=$abc$109383$new_n62139_
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_ctr__r_data[22] q=$abc$109383$new_n62140_
-.subckt ao22_x2 i0=$abc$109383$new_n62140_ i1=$abc$109383$new_n62114_ i2=$abc$109383$new_n28054_ q=$abc$109383$new_n62141_
-.subckt a2_x2 i0=$abc$109383$new_n62141_ i1=$abc$109383$new_n62139_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98418
-.subckt a3_x2 i0=$abc$109383$new_n27556_ i1=$abc$109383$new_n27426_ i2=$abc$109383$new_n21937_ q=$abc$109383$new_n62143_
-.subckt mx2_x2 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_ctr__r_data[23] q=$abc$109383$new_n62144_
-.subckt mx2_x2 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62144_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[23] q=$abc$109383$new_n62145_
-.subckt a2_x2 i0=$abc$109383$new_n62145_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98422
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_ctr__r_data[22] q=$abc$109383$new_n62140_
+.subckt and21nor_x1 i0=$abc$109383$new_n62140_ i1=$abc$109383$new_n62114_ i2=$abc$109383$new_n28054_ nq=$abc$109383$new_n62141_
+.subckt and2_x1 i0=$abc$109383$new_n62141_ i1=$abc$109383$new_n62139_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98418
+.subckt and3_x1 i0=$abc$109383$new_n27556_ i1=$abc$109383$new_n27426_ i2=$abc$109383$new_n21937_ q=$abc$109383$new_n62143_
+.subckt mux2_x1 cmd=$abc$109383$new_n62109_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_ctr__r_data[23] q=$abc$109383$new_n62144_
+.subckt mux2_x1 cmd=$abc$109383$new_n62114_ i0=$abc$109383$new_n62144_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[23] q=$abc$109383$new_n62145_
+.subckt and2_x1 i0=$abc$109383$new_n62145_ i1=$abc$109383$new_n62061_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98422
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62147_
 .subckt nand3_x0 i0=$abc$109383$new_n61564_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n27607_ nq=$abc$109383$new_n62148_
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62108_ i1=soc.timer.bridge_timer_ctr__r_data[8] q=$abc$109383$new_n62149_
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62108_ i1=soc.timer.bridge_timer_ctr__r_data[8] q=$abc$109383$new_n62149_
 .subckt nand2_x0 i0=$abc$109383$new_n27463_ i1=$abc$109383$new_n27437_ nq=$abc$109383$new_n62150_
-.subckt a3_x2 i0=$abc$109383$new_n19682_ i1=$abc$109383$new_n27607_ i2=$abc$109383$new_n27434_ q=$abc$109383$new_n62151_
-.subckt ao22_x2 i0=$abc$109383$new_n27437_ i1=$abc$109383$new_n27593_ i2=$abc$109383$new_n62151_ q=$abc$109383$new_n62152_
+.subckt and3_x1 i0=$abc$109383$new_n19682_ i1=$abc$109383$new_n27607_ i2=$abc$109383$new_n27434_ q=$abc$109383$new_n62151_
+.subckt and21nor_x1 i0=$abc$109383$new_n27437_ i1=$abc$109383$new_n27593_ i2=$abc$109383$new_n62151_ nq=$abc$109383$new_n62152_
 .subckt nand2_x0 i0=$abc$109383$new_n62152_ i1=$abc$109383$new_n62150_ nq=$abc$109383$new_n62153_
 .subckt buf_x4 i=$abc$109383$new_n62153_ q=$abc$109383$new_n62154_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62149_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8] q=$abc$109383$new_n62155_
-.subckt a2_x2 i0=$abc$109383$new_n62155_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98426
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62117_ i1=soc.timer.bridge_timer_ctr__r_data[9] q=$abc$109383$new_n62157_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62157_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9] q=$abc$109383$new_n62158_
-.subckt a2_x2 i0=$abc$109383$new_n62158_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98430
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_ctr__r_data[10] q=$abc$109383$new_n62160_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62160_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10] q=$abc$109383$new_n62161_
-.subckt a2_x2 i0=$abc$109383$new_n62161_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98434
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62124_ i1=soc.timer.bridge_timer_ctr__r_data[11] q=$abc$109383$new_n62163_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62163_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11] q=$abc$109383$new_n62164_
-.subckt a2_x2 i0=$abc$109383$new_n62164_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98438
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n27519_ i1=soc.timer.bridge_timer_ctr__r_data[12] q=$abc$109383$new_n62166_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62166_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12] q=$abc$109383$new_n62167_
-.subckt a2_x2 i0=$abc$109383$new_n62167_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98442
-.subckt a3_x2 i0=$abc$109383$new_n27531_ i1=$abc$109383$new_n27426_ i2=$abc$109383$new_n21937_ q=$abc$109383$new_n62169_
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_ctr__r_data[13] q=$abc$109383$new_n62170_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62170_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13] q=$abc$109383$new_n62171_
-.subckt a2_x2 i0=$abc$109383$new_n62171_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98446
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62149_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8] q=$abc$109383$new_n62155_
+.subckt and2_x1 i0=$abc$109383$new_n62155_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98426
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62117_ i1=soc.timer.bridge_timer_ctr__r_data[9] q=$abc$109383$new_n62157_
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62157_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9] q=$abc$109383$new_n62158_
+.subckt and2_x1 i0=$abc$109383$new_n62158_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98430
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_ctr__r_data[10] q=$abc$109383$new_n62160_
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62160_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10] q=$abc$109383$new_n62161_
+.subckt and2_x1 i0=$abc$109383$new_n62161_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98434
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62124_ i1=soc.timer.bridge_timer_ctr__r_data[11] q=$abc$109383$new_n62163_
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62163_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11] q=$abc$109383$new_n62164_
+.subckt and2_x1 i0=$abc$109383$new_n62164_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98438
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n27519_ i1=soc.timer.bridge_timer_ctr__r_data[12] q=$abc$109383$new_n62166_
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62166_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12] q=$abc$109383$new_n62167_
+.subckt and2_x1 i0=$abc$109383$new_n62167_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98442
+.subckt and3_x1 i0=$abc$109383$new_n27531_ i1=$abc$109383$new_n27426_ i2=$abc$109383$new_n21937_ q=$abc$109383$new_n62169_
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_ctr__r_data[13] q=$abc$109383$new_n62170_
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62170_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13] q=$abc$109383$new_n62171_
+.subckt and2_x1 i0=$abc$109383$new_n62171_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98446
 .subckt nand2_x0 i0=$abc$109383$new_n27622_ i1=$abc$109383$new_n27475_ nq=$abc$109383$new_n62173_
-.subckt a3_x2 i0=$abc$109383$new_n62150_ i1=$abc$109383$new_n62173_ i2=$abc$109383$new_n62151_ q=$abc$109383$new_n62174_
+.subckt and3_x1 i0=$abc$109383$new_n62150_ i1=$abc$109383$new_n62173_ i2=$abc$109383$new_n62151_ q=$abc$109383$new_n62174_
 .subckt nor2_x0 i0=$abc$109383$new_n62174_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[14] nq=$abc$109383$new_n62175_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[14] nq=$abc$109383$new_n62176_
 .subckt nand4_x0 i0=$abc$109383$new_n27547_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n27665_ i3=$abc$109383$new_n29107_ nq=$abc$109383$new_n62177_
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62177_ i1=$abc$109383$new_n62176_ q=$abc$109383$new_n62178_
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62177_ i1=$abc$109383$new_n62176_ q=$abc$109383$new_n62178_
 .subckt nand4_x0 i0=$abc$109383$new_n62178_ i1=$abc$109383$new_n62150_ i2=$abc$109383$new_n62173_ i3=$abc$109383$new_n62151_ nq=$abc$109383$new_n62179_
 .subckt nand2_x0 i0=$abc$109383$new_n62179_ i1=$abc$109383$new_n27432_ nq=$abc$109383$new_n62180_
 .subckt nor2_x0 i0=$abc$109383$new_n62180_ i1=$abc$109383$new_n62175_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98450
-.subckt mx2_x2 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_ctr__r_data[15] q=$abc$109383$new_n62182_
-.subckt mx2_x2 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62182_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15] q=$abc$109383$new_n62183_
-.subckt a2_x2 i0=$abc$109383$new_n62183_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98454
+.subckt mux2_x1 cmd=$abc$109383$new_n62148_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_ctr__r_data[15] q=$abc$109383$new_n62182_
+.subckt mux2_x1 cmd=$abc$109383$new_n62154_ i0=$abc$109383$new_n62182_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15] q=$abc$109383$new_n62183_
+.subckt and2_x1 i0=$abc$109383$new_n62183_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98454
 .subckt nand3_x0 i0=$abc$109383$new_n27448_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n29036_ nq=$abc$109383$new_n62185_
-.subckt mx2_x2 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62108_ i1=soc.timer.bridge_timer_ctr__r_data[24] q=$abc$109383$new_n62186_
+.subckt mux2_x1 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62108_ i1=soc.timer.bridge_timer_ctr__r_data[24] q=$abc$109383$new_n62186_
 .subckt nand4_x0 i0=$abc$109383$new_n61559_ i1=$abc$109383$new_n27458_ i2=$abc$109383$new_n27425_ i3=$abc$109383$new_n21937_ nq=$abc$109383$new_n62187_
-.subckt mx2_x2 cmd=$abc$109383$new_n27622_ i0=$abc$109383$new_n62187_ i1=$abc$109383$new_n27475_ q=$abc$109383$new_n62188_
+.subckt mux2_x1 cmd=$abc$109383$new_n27622_ i0=$abc$109383$new_n62187_ i1=$abc$109383$new_n27475_ q=$abc$109383$new_n62188_
 .subckt buf_x4 i=$abc$109383$new_n62188_ q=$abc$109383$new_n62189_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62186_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24] q=$abc$109383$new_n62190_
-.subckt a2_x2 i0=$abc$109383$new_n62190_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98458
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62186_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24] q=$abc$109383$new_n62190_
+.subckt and2_x1 i0=$abc$109383$new_n62190_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98458
 .subckt nand4_x0 i0=$abc$109383$new_n61559_ i1=$abc$109383$new_n27486_ i2=$abc$109383$new_n27566_ i3=$abc$109383$new_n27561_ nq=$abc$109383$new_n62192_
 .subckt nand2_x0 i0=$abc$109383$new_n62185_ i1=soc.timer.bridge_timer_ctr__r_data[25] nq=$abc$109383$new_n62193_
 .subckt nand2_x0 i0=$abc$109383$new_n62193_ i1=$abc$109383$new_n62192_ nq=$abc$109383$new_n62194_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62194_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25] q=$abc$109383$new_n62195_
-.subckt a2_x2 i0=$abc$109383$new_n62195_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98462
-.subckt mx2_x2 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_ctr__r_data[26] q=$abc$109383$new_n62197_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62197_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26] q=$abc$109383$new_n62198_
-.subckt a2_x2 i0=$abc$109383$new_n62198_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98466
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62194_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25] q=$abc$109383$new_n62195_
+.subckt and2_x1 i0=$abc$109383$new_n62195_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98462
+.subckt mux2_x1 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_ctr__r_data[26] q=$abc$109383$new_n62197_
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62197_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26] q=$abc$109383$new_n62198_
+.subckt and2_x1 i0=$abc$109383$new_n62198_ i1=$abc$109383$new_n62147_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98466
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62200_
-.subckt mx2_x2 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62124_ i1=soc.timer.bridge_timer_ctr__r_data[27] q=$abc$109383$new_n62201_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62201_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27] q=$abc$109383$new_n62202_
-.subckt a2_x2 i0=$abc$109383$new_n62202_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98470
+.subckt mux2_x1 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62124_ i1=soc.timer.bridge_timer_ctr__r_data[27] q=$abc$109383$new_n62201_
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62201_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27] q=$abc$109383$new_n62202_
+.subckt and2_x1 i0=$abc$109383$new_n62202_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98470
 .subckt nand2_x0 i0=$abc$109383$new_n62187_ i1=$abc$109383$new_n27608_ nq=$abc$109383$new_n62204_
-.subckt oa22_x2 i0=$abc$109383$new_n62204_ i1=$abc$109383$new_n62173_ i2=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28] q=$abc$109383$new_n62205_
+.subckt or21nand_x1 i0=$abc$109383$new_n62204_ i1=$abc$109383$new_n62173_ i2=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28] nq=$abc$109383$new_n62205_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[28] nq=$abc$109383$new_n62206_
 .subckt nand4_x0 i0=$abc$109383$new_n27518_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n27665_ i3=$abc$109383$new_n44268_ nq=$abc$109383$new_n62207_
-.subckt mx2_x2 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62207_ i1=$abc$109383$new_n62206_ q=$abc$109383$new_n62208_
+.subckt mux2_x1 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62207_ i1=$abc$109383$new_n62206_ q=$abc$109383$new_n62208_
 .subckt nand3_x0 i0=$abc$109383$new_n62208_ i1=$abc$109383$new_n62204_ i2=$abc$109383$new_n62173_ nq=$abc$109383$new_n62209_
-.subckt a3_x2 i0=$abc$109383$new_n62209_ i1=$abc$109383$new_n62205_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98474
-.subckt mx2_x2 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_ctr__r_data[29] q=$abc$109383$new_n62211_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62211_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29] q=$abc$109383$new_n62212_
-.subckt a2_x2 i0=$abc$109383$new_n62212_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98478
-.subckt mx2_x2 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_ctr__r_data[30] q=$abc$109383$new_n62214_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62214_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30] q=$abc$109383$new_n62215_
-.subckt a2_x2 i0=$abc$109383$new_n62215_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98482
+.subckt and3_x1 i0=$abc$109383$new_n62209_ i1=$abc$109383$new_n62205_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98474
+.subckt mux2_x1 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_ctr__r_data[29] q=$abc$109383$new_n62211_
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62211_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29] q=$abc$109383$new_n62212_
+.subckt and2_x1 i0=$abc$109383$new_n62212_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98478
+.subckt mux2_x1 cmd=$abc$109383$new_n62185_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_ctr__r_data[30] q=$abc$109383$new_n62214_
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62214_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30] q=$abc$109383$new_n62215_
+.subckt and2_x1 i0=$abc$109383$new_n62215_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98482
 .subckt nand4_x0 i0=$abc$109383$new_n61559_ i1=$abc$109383$new_n27556_ i2=$abc$109383$new_n27566_ i3=$abc$109383$new_n27561_ nq=$abc$109383$new_n62217_
 .subckt nand2_x0 i0=$abc$109383$new_n62185_ i1=soc.timer.bridge_timer_ctr__r_data[31] nq=$abc$109383$new_n62218_
 .subckt nand2_x0 i0=$abc$109383$new_n62218_ i1=$abc$109383$new_n62217_ nq=$abc$109383$new_n62219_
-.subckt mx2_x2 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62219_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31] q=$abc$109383$new_n62220_
-.subckt a2_x2 i0=$abc$109383$new_n62220_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98486
+.subckt mux2_x1 cmd=$abc$109383$new_n62189_ i0=$abc$109383$new_n62219_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31] q=$abc$109383$new_n62220_
+.subckt and2_x1 i0=$abc$109383$new_n62220_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98486
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[8] nq=$abc$109383$new_n62222_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[8] nq=$abc$109383$new_n62223_
 .subckt nand4_x0 i0=$abc$109383$new_n27453_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n27665_ i3=$abc$109383$new_n44268_ nq=$abc$109383$new_n62224_
-.subckt o4_x2 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27443_ i3=$abc$109383$new_n27442_ q=$abc$109383$new_n62225_
+.subckt or4_x1 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27443_ i3=$abc$109383$new_n27442_ q=$abc$109383$new_n62225_
 .subckt buf_x4 i=$abc$109383$new_n62225_ q=$abc$109383$new_n62226_
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62224_ i1=$abc$109383$new_n62223_ q=$abc$109383$new_n62227_
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62224_ i1=$abc$109383$new_n62223_ q=$abc$109383$new_n62227_
 .subckt nand4_x0 i0=$abc$109383$new_n27474_ i1=$abc$109383$new_n27537_ i2=$abc$109383$new_n27425_ i3=$abc$109383$new_n21937_ nq=$abc$109383$new_n62228_
 .subckt nand4_x0 i0=$abc$109383$new_n61573_ i1=$abc$109383$new_n27491_ i2=$abc$109383$new_n27426_ i3=$abc$109383$new_n27560_ nq=$abc$109383$new_n62229_
-.subckt a2_x2 i0=$abc$109383$new_n62229_ i1=$abc$109383$new_n62228_ q=$abc$109383$new_n62230_
+.subckt and2_x1 i0=$abc$109383$new_n62229_ i1=$abc$109383$new_n62228_ q=$abc$109383$new_n62230_
 .subckt buf_x4 i=$abc$109383$new_n62230_ q=$abc$109383$new_n62231_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62227_ i1=$abc$109383$new_n62222_ q=$abc$109383$new_n62232_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62227_ i1=$abc$109383$new_n62222_ q=$abc$109383$new_n62232_
 .subckt nor2_x0 i0=$abc$109383$new_n62232_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98618
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[9] nq=$abc$109383$new_n62234_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[9] nq=$abc$109383$new_n62235_
 .subckt nand4_x0 i0=$abc$109383$new_n27486_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n27665_ i3=$abc$109383$new_n29107_ nq=$abc$109383$new_n62236_
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62236_ i1=$abc$109383$new_n62235_ q=$abc$109383$new_n62237_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62237_ i1=$abc$109383$new_n62234_ q=$abc$109383$new_n62238_
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62236_ i1=$abc$109383$new_n62235_ q=$abc$109383$new_n62237_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62237_ i1=$abc$109383$new_n62234_ q=$abc$109383$new_n62238_
 .subckt nor2_x0 i0=$abc$109383$new_n62238_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98622
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[10] nq=$abc$109383$new_n62240_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[10] nq=$abc$109383$new_n62241_
 .subckt nand4_x0 i0=$abc$109383$new_n27499_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n27665_ i3=$abc$109383$new_n29107_ nq=$abc$109383$new_n62242_
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62242_ i1=$abc$109383$new_n62241_ q=$abc$109383$new_n62243_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62243_ i1=$abc$109383$new_n62240_ q=$abc$109383$new_n62244_
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62242_ i1=$abc$109383$new_n62241_ q=$abc$109383$new_n62243_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62243_ i1=$abc$109383$new_n62240_ q=$abc$109383$new_n62244_
 .subckt nor2_x0 i0=$abc$109383$new_n62244_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98626
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[11] nq=$abc$109383$new_n62246_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[11] nq=$abc$109383$new_n62247_
 .subckt nand4_x0 i0=$abc$109383$new_n27509_ i1=$abc$109383$new_n44269_ i2=$abc$109383$new_n27493_ i3=$abc$109383$new_n44268_ nq=$abc$109383$new_n62248_
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62248_ i1=$abc$109383$new_n62247_ q=$abc$109383$new_n62249_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62249_ i1=$abc$109383$new_n62246_ q=$abc$109383$new_n62250_
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62248_ i1=$abc$109383$new_n62247_ q=$abc$109383$new_n62249_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62249_ i1=$abc$109383$new_n62246_ q=$abc$109383$new_n62250_
 .subckt nor2_x0 i0=$abc$109383$new_n62250_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98630
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[12] nq=$abc$109383$new_n62252_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[12] nq=$abc$109383$new_n62253_
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62207_ i1=$abc$109383$new_n62253_ q=$abc$109383$new_n62254_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62254_ i1=$abc$109383$new_n62252_ q=$abc$109383$new_n62255_
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62207_ i1=$abc$109383$new_n62253_ q=$abc$109383$new_n62254_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62254_ i1=$abc$109383$new_n62252_ q=$abc$109383$new_n62255_
 .subckt nor2_x0 i0=$abc$109383$new_n62255_ i1=$abc$109383$new_n60799_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98634
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_reload__r_data[13] q=$abc$109383$new_n62257_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62257_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13] q=$abc$109383$new_n62258_
-.subckt a2_x2 i0=$abc$109383$new_n62258_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98638
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_reload__r_data[13] q=$abc$109383$new_n62257_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62257_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13] q=$abc$109383$new_n62258_
+.subckt and2_x1 i0=$abc$109383$new_n62258_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98638
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[14] nq=$abc$109383$new_n62260_
 .subckt nand3_x0 i0=$abc$109383$new_n62229_ i1=$abc$109383$new_n62228_ i2=$abc$109383$new_n62260_ nq=$abc$109383$new_n62261_
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_reload__r_data[14] q=$abc$109383$new_n62262_
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_reload__r_data[14] q=$abc$109383$new_n62262_
 .subckt nand2_x0 i0=$abc$109383$new_n61573_ i1=$abc$109383$new_n27539_ nq=$abc$109383$new_n62263_
 .subckt nand2_x0 i0=$abc$109383$new_n27538_ i1=$abc$109383$new_n27537_ nq=$abc$109383$new_n62264_
-.subckt oa22_x2 i0=$abc$109383$new_n62264_ i1=$abc$109383$new_n62263_ i2=$abc$109383$new_n62262_ q=$abc$109383$new_n62265_
-.subckt a3_x2 i0=$abc$109383$new_n62265_ i1=$abc$109383$new_n62261_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98642
-.subckt mx2_x2 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_reload__r_data[15] q=$abc$109383$new_n62267_
-.subckt mx2_x2 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62267_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15] q=$abc$109383$new_n62268_
-.subckt a2_x2 i0=$abc$109383$new_n62268_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98646
+.subckt or21nand_x1 i0=$abc$109383$new_n62264_ i1=$abc$109383$new_n62263_ i2=$abc$109383$new_n62262_ nq=$abc$109383$new_n62265_
+.subckt and3_x1 i0=$abc$109383$new_n62265_ i1=$abc$109383$new_n62261_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98642
+.subckt mux2_x1 cmd=$abc$109383$new_n62226_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_reload__r_data[15] q=$abc$109383$new_n62267_
+.subckt mux2_x1 cmd=$abc$109383$new_n62231_ i0=$abc$109383$new_n62267_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15] q=$abc$109383$new_n62268_
+.subckt and2_x1 i0=$abc$109383$new_n62268_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98646
 .subckt buf_x4 i=$abc$109383$new_n29220_ q=$abc$109383$new_n62270_
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[24] nq=$abc$109383$new_n62271_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[24] nq=$abc$109383$new_n62272_
-.subckt o3_x2 i0=$abc$109383$new_n61568_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n19644_ q=$abc$109383$new_n62273_
+.subckt or3_x1 i0=$abc$109383$new_n61568_ i1=$abc$109383$new_n19682_ i2=$abc$109383$new_n19644_ q=$abc$109383$new_n62273_
 .subckt buf_x4 i=$abc$109383$new_n62273_ q=$abc$109383$new_n62274_
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62224_ i1=$abc$109383$new_n62272_ q=$abc$109383$new_n62275_
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62224_ i1=$abc$109383$new_n62272_ q=$abc$109383$new_n62275_
 .subckt nand4_x0 i0=$abc$109383$new_n61569_ i1=$abc$109383$new_n27491_ i2=$abc$109383$new_n27426_ i3=$abc$109383$new_n27560_ nq=$abc$109383$new_n62276_
-.subckt a2_x2 i0=$abc$109383$new_n62276_ i1=$abc$109383$new_n62228_ q=$abc$109383$new_n62277_
+.subckt and2_x1 i0=$abc$109383$new_n62276_ i1=$abc$109383$new_n62228_ q=$abc$109383$new_n62277_
 .subckt buf_x4 i=$abc$109383$new_n62277_ q=$abc$109383$new_n62278_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62275_ i1=$abc$109383$new_n62271_ q=$abc$109383$new_n62279_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62275_ i1=$abc$109383$new_n62271_ q=$abc$109383$new_n62279_
 .subckt nor2_x0 i0=$abc$109383$new_n62279_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98650
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62117_ i1=soc.timer.bridge_timer_reload__r_data[25] q=$abc$109383$new_n62281_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62281_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25] q=$abc$109383$new_n62282_
-.subckt a2_x2 i0=$abc$109383$new_n62282_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98654
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_reload__r_data[26] q=$abc$109383$new_n62284_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62284_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26] q=$abc$109383$new_n62285_
-.subckt a2_x2 i0=$abc$109383$new_n62285_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98658
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62117_ i1=soc.timer.bridge_timer_reload__r_data[25] q=$abc$109383$new_n62281_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62281_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25] q=$abc$109383$new_n62282_
+.subckt and2_x1 i0=$abc$109383$new_n62282_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98654
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n27500_ i1=soc.timer.bridge_timer_reload__r_data[26] q=$abc$109383$new_n62284_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62284_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26] q=$abc$109383$new_n62285_
+.subckt and2_x1 i0=$abc$109383$new_n62285_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98658
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[27] nq=$abc$109383$new_n62287_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[27] nq=$abc$109383$new_n62288_
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62248_ i1=$abc$109383$new_n62288_ q=$abc$109383$new_n62289_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62289_ i1=$abc$109383$new_n62287_ q=$abc$109383$new_n62290_
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62248_ i1=$abc$109383$new_n62288_ q=$abc$109383$new_n62289_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62289_ i1=$abc$109383$new_n62287_ q=$abc$109383$new_n62290_
 .subckt nor2_x0 i0=$abc$109383$new_n62290_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$98662
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n27519_ i1=soc.timer.bridge_timer_reload__r_data[28] q=$abc$109383$new_n62292_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62292_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28] q=$abc$109383$new_n62293_
-.subckt a2_x2 i0=$abc$109383$new_n62293_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98666
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_reload__r_data[29] q=$abc$109383$new_n62295_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62295_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29] q=$abc$109383$new_n62296_
-.subckt a2_x2 i0=$abc$109383$new_n62296_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98670
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n27519_ i1=soc.timer.bridge_timer_reload__r_data[28] q=$abc$109383$new_n62292_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62292_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28] q=$abc$109383$new_n62293_
+.subckt and2_x1 i0=$abc$109383$new_n62293_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98666
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_reload__r_data[29] q=$abc$109383$new_n62295_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62295_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29] q=$abc$109383$new_n62296_
+.subckt and2_x1 i0=$abc$109383$new_n62296_ i1=$abc$109383$new_n62200_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98670
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62298_
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_reload__r_data[30] q=$abc$109383$new_n62299_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62299_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30] q=$abc$109383$new_n62300_
-.subckt a2_x2 i0=$abc$109383$new_n62300_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98674
-.subckt mx2_x2 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_reload__r_data[31] q=$abc$109383$new_n62302_
-.subckt mx2_x2 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62302_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31] q=$abc$109383$new_n62303_
-.subckt a2_x2 i0=$abc$109383$new_n62303_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98678
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n27548_ i1=soc.timer.bridge_timer_reload__r_data[30] q=$abc$109383$new_n62299_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62299_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30] q=$abc$109383$new_n62300_
+.subckt and2_x1 i0=$abc$109383$new_n62300_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98674
+.subckt mux2_x1 cmd=$abc$109383$new_n62274_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_reload__r_data[31] q=$abc$109383$new_n62302_
+.subckt mux2_x1 cmd=$abc$109383$new_n62278_ i0=$abc$109383$new_n62302_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31] q=$abc$109383$new_n62303_
+.subckt and2_x1 i0=$abc$109383$new_n62303_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$98678
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[16] nq=$abc$109383$new_n62305_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[16] nq=$abc$109383$new_n62306_
-.subckt o4_x2 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27434_ q=$abc$109383$new_n62307_
+.subckt or4_x1 i0=$abc$109383$new_n19782_ i1=$abc$109383$new_n19643_ i2=$abc$109383$new_n27436_ i3=$abc$109383$new_n27434_ q=$abc$109383$new_n62307_
 .subckt buf_x4 i=$abc$109383$new_n62307_ q=$abc$109383$new_n62308_
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62224_ i1=$abc$109383$new_n62306_ q=$abc$109383$new_n62309_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62224_ i1=$abc$109383$new_n62306_ q=$abc$109383$new_n62309_
 .subckt nand4_x0 i0=$abc$109383$new_n61571_ i1=$abc$109383$new_n27491_ i2=$abc$109383$new_n27426_ i3=$abc$109383$new_n27560_ nq=$abc$109383$new_n62310_
-.subckt a2_x2 i0=$abc$109383$new_n62310_ i1=$abc$109383$new_n62228_ q=$abc$109383$new_n62311_
+.subckt and2_x1 i0=$abc$109383$new_n62310_ i1=$abc$109383$new_n62228_ q=$abc$109383$new_n62311_
 .subckt buf_x4 i=$abc$109383$new_n62311_ q=$abc$109383$new_n62312_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62309_ i1=$abc$109383$new_n62305_ q=$abc$109383$new_n62313_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62309_ i1=$abc$109383$new_n62305_ q=$abc$109383$new_n62313_
 .subckt nor2_x0 i0=$abc$109383$new_n62313_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99002
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[17] nq=$abc$109383$new_n62315_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[17] nq=$abc$109383$new_n62316_
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62236_ i1=$abc$109383$new_n62316_ q=$abc$109383$new_n62317_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62317_ i1=$abc$109383$new_n62315_ q=$abc$109383$new_n62318_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62236_ i1=$abc$109383$new_n62316_ q=$abc$109383$new_n62317_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62317_ i1=$abc$109383$new_n62315_ q=$abc$109383$new_n62318_
 .subckt nor2_x0 i0=$abc$109383$new_n62318_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99006
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[18] nq=$abc$109383$new_n62320_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[18] nq=$abc$109383$new_n62321_
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62242_ i1=$abc$109383$new_n62321_ q=$abc$109383$new_n62322_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62322_ i1=$abc$109383$new_n62320_ q=$abc$109383$new_n62323_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62242_ i1=$abc$109383$new_n62321_ q=$abc$109383$new_n62322_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62322_ i1=$abc$109383$new_n62320_ q=$abc$109383$new_n62323_
 .subckt nor2_x0 i0=$abc$109383$new_n62323_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99010
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[19] nq=$abc$109383$new_n62325_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[19] nq=$abc$109383$new_n62326_
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62248_ i1=$abc$109383$new_n62326_ q=$abc$109383$new_n62327_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62327_ i1=$abc$109383$new_n62325_ q=$abc$109383$new_n62328_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62248_ i1=$abc$109383$new_n62326_ q=$abc$109383$new_n62327_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62327_ i1=$abc$109383$new_n62325_ q=$abc$109383$new_n62328_
 .subckt nor2_x0 i0=$abc$109383$new_n62328_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99014
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[20] nq=$abc$109383$new_n62330_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[20] nq=$abc$109383$new_n62331_
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62207_ i1=$abc$109383$new_n62331_ q=$abc$109383$new_n62332_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62332_ i1=$abc$109383$new_n62330_ q=$abc$109383$new_n62333_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62207_ i1=$abc$109383$new_n62331_ q=$abc$109383$new_n62332_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62332_ i1=$abc$109383$new_n62330_ q=$abc$109383$new_n62333_
 .subckt nor2_x0 i0=$abc$109383$new_n62333_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99018
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_reload__r_data[21] q=$abc$109383$new_n62335_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62335_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21] q=$abc$109383$new_n62336_
-.subckt a2_x2 i0=$abc$109383$new_n62336_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99022
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62169_ i1=soc.timer.bridge_timer_reload__r_data[21] q=$abc$109383$new_n62335_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62335_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21] q=$abc$109383$new_n62336_
+.subckt and2_x1 i0=$abc$109383$new_n62336_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99022
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_reload__shadow[22] nq=$abc$109383$new_n62338_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[22] nq=$abc$109383$new_n62339_
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62177_ i1=$abc$109383$new_n62339_ q=$abc$109383$new_n62340_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62340_ i1=$abc$109383$new_n62338_ q=$abc$109383$new_n62341_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62177_ i1=$abc$109383$new_n62339_ q=$abc$109383$new_n62340_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62340_ i1=$abc$109383$new_n62338_ q=$abc$109383$new_n62341_
 .subckt nor2_x0 i0=$abc$109383$new_n62341_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99026
-.subckt mx2_x2 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_reload__r_data[23] q=$abc$109383$new_n62343_
-.subckt mx2_x2 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62343_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23] q=$abc$109383$new_n62344_
-.subckt a2_x2 i0=$abc$109383$new_n62344_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99030
-.subckt a2_x2 i0=$abc$109383$new_n60800_ i1=$abc$109383$new_n60770_ q=$abc$109383$new_n62346_
-.subckt ao22_x2 i0=$abc$109383$new_n62346_ i1=$abc$109383$new_n21736_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99482
-.subckt a3_x2 i0=$abc$109383$new_n19684_ i1=$abc$109383$new_n29036_ i2=$abc$109383$new_n27525_ q=$abc$109383$new_n62348_
-.subckt a3_x2 i0=$abc$109383$new_n27575_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n27568_ q=$abc$109383$new_n62349_
-.subckt a4_x2 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n27568_ i2=$abc$109383$new_n27567_ i3=soc.timer.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n62350_
-.subckt a2_x2 i0=$abc$109383$new_n27578_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n62351_
-.subckt a4_x2 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n27568_ i2=soc.timer.bridge.csr_bridge_1.cycle[0] i3=$abc$109383$new_n27572_ q=$abc$109383$new_n62352_
-.subckt o4_x2 i0=$abc$109383$new_n62352_ i1=$abc$109383$new_n62351_ i2=$abc$109383$new_n62350_ i3=$abc$109383$new_n62349_ q=$abc$109383$new_n62353_
-.subckt a4_x2 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27575_ i2=$abc$109383$new_n27427_ i3=$abc$109383$new_n19688_ q=$abc$109383$new_n62354_
-.subckt a2_x2 i0=$abc$109383$new_n62354_ i1=$abc$109383$new_n62348_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99548
-.subckt a2_x2 i0=$abc$109383$new_n21805_ i1=soc.bridge.csr_mux_0.uart_tx_data__w_stb q=$abc$109383$new_n62356_
-.subckt nxr2_x1 i0=$abc$109383$new_n62356_ i1=$abc$109383$new_n21755_ nq=$abc$109383$new_n62357_
-.subckt nxr2_x1 i0=$abc$109383$new_n62357_ i1=soc.tx_fifo.unbuffered.level[0] nq=$abc$109383$new_n62358_
-.subckt a2_x2 i0=$abc$109383$new_n62358_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99552
-.subckt a2_x2 i0=$abc$109383$new_n62357_ i1=soc.tx_fifo.unbuffered.level[1] q=$abc$109383$new_n62360_
+.subckt mux2_x1 cmd=$abc$109383$new_n62308_ i0=$abc$109383$new_n62143_ i1=soc.timer.bridge_timer_reload__r_data[23] q=$abc$109383$new_n62343_
+.subckt mux2_x1 cmd=$abc$109383$new_n62312_ i0=$abc$109383$new_n62343_ i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23] q=$abc$109383$new_n62344_
+.subckt and2_x1 i0=$abc$109383$new_n62344_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99030
+.subckt and2_x1 i0=$abc$109383$new_n60800_ i1=$abc$109383$new_n60770_ q=$abc$109383$new_n62346_
+.subckt and21nor_x1 i0=$abc$109383$new_n62346_ i1=$abc$109383$new_n21736_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99482
+.subckt and3_x1 i0=$abc$109383$new_n19684_ i1=$abc$109383$new_n29036_ i2=$abc$109383$new_n27525_ q=$abc$109383$new_n62348_
+.subckt and3_x1 i0=$abc$109383$new_n27575_ i1=$abc$109383$new_n19736_ i2=$abc$109383$new_n27568_ q=$abc$109383$new_n62349_
+.subckt and4_x1 i0=$abc$109383$new_n20544_ i1=$abc$109383$new_n27568_ i2=$abc$109383$new_n27567_ i3=soc.timer.bridge.csr_bridge_1.cycle[1] q=$abc$109383$new_n62350_
+.subckt and2_x1 i0=$abc$109383$new_n27578_ i1=$abc$109383$new_n20259_ q=$abc$109383$new_n62351_
+.subckt and4_x1 i0=$abc$109383$new_n20355_ i1=$abc$109383$new_n27568_ i2=soc.timer.bridge.csr_bridge_1.cycle[0] i3=$abc$109383$new_n27572_ q=$abc$109383$new_n62352_
+.subckt or4_x1 i0=$abc$109383$new_n62352_ i1=$abc$109383$new_n62351_ i2=$abc$109383$new_n62350_ i3=$abc$109383$new_n62349_ q=$abc$109383$new_n62353_
+.subckt and4_x1 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27575_ i2=$abc$109383$new_n27427_ i3=$abc$109383$new_n19688_ q=$abc$109383$new_n62354_
+.subckt and2_x1 i0=$abc$109383$new_n62354_ i1=$abc$109383$new_n62348_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99548
+.subckt and2_x1 i0=$abc$109383$new_n21805_ i1=soc.bridge.csr_mux_0.uart_tx_data__w_stb q=$abc$109383$new_n62356_
+.subckt nexor2_x0 i0=$abc$109383$new_n62356_ i1=$abc$109383$new_n21755_ nq=$abc$109383$new_n62357_
+.subckt nexor2_x0 i0=$abc$109383$new_n62357_ i1=soc.tx_fifo.unbuffered.level[0] nq=$abc$109383$new_n62358_
+.subckt and2_x1 i0=$abc$109383$new_n62358_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99552
+.subckt and2_x1 i0=$abc$109383$new_n62357_ i1=soc.tx_fifo.unbuffered.level[1] q=$abc$109383$new_n62360_
 .subckt nand2_x0 i0=$abc$109383$new_n21805_ i1=soc.bridge.csr_mux_0.uart_tx_data__w_stb nq=$abc$109383$new_n62361_
-.subckt a2_x2 i0=$abc$109383$new_n62361_ i1=$abc$109383$new_n21755_ q=$abc$109383$new_n62362_
-.subckt a2_x2 i0=$abc$109383$new_n62356_ i1=$abc$109383$new_n21739_ q=$abc$109383$new_n62363_
-.subckt nxr2_x1 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] nq=$abc$109383$new_n62364_
-.subckt mx2_x2 cmd=$abc$109383$new_n62364_ i0=$abc$109383$new_n62363_ i1=$abc$109383$new_n62362_ q=$abc$109383$new_n62365_
-.subckt ao22_x2 i0=$abc$109383$new_n62365_ i1=$abc$109383$new_n62360_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99556
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21753_ i1=$abc$109383$new_n21727_ q=$abc$109383$new_n62367_
-.subckt a2_x2 i0=$abc$109383$new_n62367_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99560
-.subckt a2_x2 i0=$abc$109383$new_n21728_ i1=soc.tx_fifo.unbuffered.consume[0] q=$abc$109383$new_n62369_
-.subckt mx2_x2 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n62369_ i1=$abc$109383$new_n21730_ q=$abc$109383$new_n62370_
-.subckt a2_x2 i0=$abc$109383$new_n62370_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99564
-.subckt a4_x2 i0=$abc$109383$new_n21805_ i1=$abc$109383$new_n21825_ i2=$abc$109383$new_n21804_ i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb q=$abc$109383$new_n62372_
-.subckt a2_x2 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] q=$abc$109383$new_n62373_
+.subckt and2_x1 i0=$abc$109383$new_n62361_ i1=$abc$109383$new_n21755_ q=$abc$109383$new_n62362_
+.subckt and2_x1 i0=$abc$109383$new_n62356_ i1=$abc$109383$new_n21739_ q=$abc$109383$new_n62363_
+.subckt nexor2_x0 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] nq=$abc$109383$new_n62364_
+.subckt mux2_x1 cmd=$abc$109383$new_n62364_ i0=$abc$109383$new_n62363_ i1=$abc$109383$new_n62362_ q=$abc$109383$new_n62365_
+.subckt and21nor_x1 i0=$abc$109383$new_n62365_ i1=$abc$109383$new_n62360_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99556
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n21753_ i1=$abc$109383$new_n21727_ q=$abc$109383$new_n62367_
+.subckt and2_x1 i0=$abc$109383$new_n62367_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99560
+.subckt and2_x1 i0=$abc$109383$new_n21728_ i1=soc.tx_fifo.unbuffered.consume[0] q=$abc$109383$new_n62369_
+.subckt mux2_x1 cmd=$abc$109383$new_n21739_ i0=$abc$109383$new_n62369_ i1=$abc$109383$new_n21730_ q=$abc$109383$new_n62370_
+.subckt and2_x1 i0=$abc$109383$new_n62370_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99564
+.subckt and4_x1 i0=$abc$109383$new_n21805_ i1=$abc$109383$new_n21825_ i2=$abc$109383$new_n21804_ i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb q=$abc$109383$new_n62372_
+.subckt and2_x1 i0=soc.tx_fifo.unbuffered.level[1] i1=soc.tx_fifo.unbuffered.level[0] q=$abc$109383$new_n62373_
 .subckt inv_x0 i=soc.bridge.csr_mux_0.uart_tx_data__w_stb nq=$abc$109383$new_n62374_
-.subckt ao22_x2 i0=$abc$109383$new_n62374_ i1=$abc$109383$new_n62373_ i2=soc.tx_fifo.unbuffered.produce[0] q=$abc$109383$new_n62375_
-.subckt ao22_x2 i0=$abc$109383$new_n62375_ i1=$abc$109383$new_n62372_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99568
-.subckt a4_x2 i0=$abc$109383$new_n21805_ i1=soc.tx_fifo.unbuffered.produce[0] i2=$abc$109383$new_n21804_ i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb q=$abc$109383$new_n62377_
-.subckt ao22_x2 i0=$abc$109383$new_n62374_ i1=$abc$109383$new_n62373_ i2=soc.tx_fifo.unbuffered.produce[1] q=$abc$109383$new_n62378_
-.subckt ao22_x2 i0=$abc$109383$new_n62378_ i1=$abc$109383$new_n62377_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99572
+.subckt and21nor_x1 i0=$abc$109383$new_n62374_ i1=$abc$109383$new_n62373_ i2=soc.tx_fifo.unbuffered.produce[0] nq=$abc$109383$new_n62375_
+.subckt and21nor_x1 i0=$abc$109383$new_n62375_ i1=$abc$109383$new_n62372_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99568
+.subckt and4_x1 i0=$abc$109383$new_n21805_ i1=soc.tx_fifo.unbuffered.produce[0] i2=$abc$109383$new_n21804_ i3=soc.bridge.csr_mux_0.uart_tx_data__w_stb q=$abc$109383$new_n62377_
+.subckt and21nor_x1 i0=$abc$109383$new_n62374_ i1=$abc$109383$new_n62373_ i2=soc.tx_fifo.unbuffered.produce[1] nq=$abc$109383$new_n62378_
+.subckt and21nor_x1 i0=$abc$109383$new_n62378_ i1=$abc$109383$new_n62377_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99572
 .subckt buf_x4 i=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62380_
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[0] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62381_
-.subckt o2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb i1=$abc$109383$new_n27598_ q=$abc$109383$new_n62382_
+.subckt or2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb i1=$abc$109383$new_n27598_ q=$abc$109383$new_n62382_
 .subckt buf_x4 i=$abc$109383$new_n62382_ q=$abc$109383$new_n62383_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[0] nq=$abc$109383$new_n62384_
-.subckt ao22_x2 i0=$abc$109383$new_n62384_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62381_ q=$abc$109383$new_n62385_
+.subckt and21nor_x1 i0=$abc$109383$new_n62384_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62381_ nq=$abc$109383$new_n62385_
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb nq=$abc$109383$new_n62386_
 .subckt nand2_x0 i0=$abc$109383$new_n62386_ i1=$abc$109383$new_n27598_ nq=$abc$109383$new_n62387_
 .subckt buf_x4 i=$abc$109383$new_n62387_ q=$abc$109383$new_n62388_
 .subckt buf_x4 i=$abc$109383$new_n27797_ q=$abc$109383$new_n62389_
 .subckt nor4_x0 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[0] nq=$abc$109383$new_n62390_
-.subckt o2_x2 i0=$abc$109383$new_n62390_ i1=$abc$109383$new_n62388_ q=$abc$109383$new_n62391_
-.subckt ao22_x2 i0=soc.timer.bridge_timer_ctr__r_data[0] i1=$abc$109383$new_n62391_ i2=$abc$109383$new_n62385_ q=$abc$109383$new_n62392_
+.subckt or2_x1 i0=$abc$109383$new_n62390_ i1=$abc$109383$new_n62388_ q=$abc$109383$new_n62391_
+.subckt and21nor_x1 i0=soc.timer.bridge_timer_ctr__r_data[0] i1=$abc$109383$new_n62391_ i2=$abc$109383$new_n62385_ nq=$abc$109383$new_n62392_
 .subckt nor2_x0 i0=$abc$109383$new_n62392_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99688
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[1] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62394_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[1] nq=$abc$109383$new_n62395_
-.subckt ao22_x2 i0=$abc$109383$new_n62395_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62394_ q=$abc$109383$new_n62396_
-.subckt nxr2_x1 i0=soc.timer.bridge_timer_ctr__r_data[1] i1=soc.timer.bridge_timer_ctr__r_data[0] nq=$abc$109383$new_n62397_
+.subckt and21nor_x1 i0=$abc$109383$new_n62395_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62394_ nq=$abc$109383$new_n62396_
+.subckt nexor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[1] i1=soc.timer.bridge_timer_ctr__r_data[0] nq=$abc$109383$new_n62397_
 .subckt nand3_x0 i0=$abc$109383$new_n62397_ i1=$abc$109383$new_n62386_ i2=$abc$109383$new_n27598_ nq=$abc$109383$new_n62398_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[1] nq=$abc$109383$new_n62399_
-.subckt ao22_x2 i0=$abc$109383$new_n62399_ i1=$abc$109383$new_n62398_ i2=$abc$109383$new_n62396_ q=$abc$109383$new_n62400_
+.subckt and21nor_x1 i0=$abc$109383$new_n62399_ i1=$abc$109383$new_n62398_ i2=$abc$109383$new_n62396_ nq=$abc$109383$new_n62400_
 .subckt nor2_x0 i0=$abc$109383$new_n62400_ i1=$abc$109383$new_n62270_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99692
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[2] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62402_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[2] nq=$abc$109383$new_n62403_
-.subckt ao22_x2 i0=$abc$109383$new_n62403_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62402_ q=$abc$109383$new_n62404_
-.subckt a2_x2 i0=$abc$109383$new_n62386_ i1=$abc$109383$new_n27598_ q=$abc$109383$new_n62405_
+.subckt and21nor_x1 i0=$abc$109383$new_n62403_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62402_ nq=$abc$109383$new_n62404_
+.subckt and2_x1 i0=$abc$109383$new_n62386_ i1=$abc$109383$new_n27598_ q=$abc$109383$new_n62405_
 .subckt buf_x4 i=$abc$109383$new_n62405_ q=$abc$109383$new_n62406_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[1] i1=soc.timer.bridge_timer_ctr__r_data[0] nq=$abc$109383$new_n62407_
-.subckt nxr2_x1 i0=$abc$109383$new_n62407_ i1=$abc$109383$new_n62403_ nq=$abc$109383$new_n62408_
+.subckt nexor2_x0 i0=$abc$109383$new_n62407_ i1=$abc$109383$new_n62403_ nq=$abc$109383$new_n62408_
 .subckt nand2_x0 i0=$abc$109383$new_n62408_ i1=$abc$109383$new_n62406_ nq=$abc$109383$new_n62409_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[2] nq=$abc$109383$new_n62410_
-.subckt ao22_x2 i0=$abc$109383$new_n62410_ i1=$abc$109383$new_n62409_ i2=$abc$109383$new_n62404_ q=$abc$109383$new_n62411_
+.subckt and21nor_x1 i0=$abc$109383$new_n62410_ i1=$abc$109383$new_n62409_ i2=$abc$109383$new_n62404_ nq=$abc$109383$new_n62411_
 .subckt nor2_x0 i0=$abc$109383$new_n62411_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99696
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[3] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62413_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[3] nq=$abc$109383$new_n62414_
-.subckt ao22_x2 i0=$abc$109383$new_n62414_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62413_ q=$abc$109383$new_n62415_
+.subckt and21nor_x1 i0=$abc$109383$new_n62414_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62413_ nq=$abc$109383$new_n62415_
 .subckt nor3_x0 i0=soc.timer.bridge_timer_ctr__r_data[2] i1=soc.timer.bridge_timer_ctr__r_data[1] i2=soc.timer.bridge_timer_ctr__r_data[0] nq=$abc$109383$new_n62416_
-.subckt nxr2_x1 i0=$abc$109383$new_n62416_ i1=$abc$109383$new_n62414_ nq=$abc$109383$new_n62417_
+.subckt nexor2_x0 i0=$abc$109383$new_n62416_ i1=$abc$109383$new_n62414_ nq=$abc$109383$new_n62417_
 .subckt nand2_x0 i0=$abc$109383$new_n62417_ i1=$abc$109383$new_n62406_ nq=$abc$109383$new_n62418_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[3] nq=$abc$109383$new_n62419_
-.subckt ao22_x2 i0=$abc$109383$new_n62419_ i1=$abc$109383$new_n62418_ i2=$abc$109383$new_n62415_ q=$abc$109383$new_n62420_
+.subckt and21nor_x1 i0=$abc$109383$new_n62419_ i1=$abc$109383$new_n62418_ i2=$abc$109383$new_n62415_ nq=$abc$109383$new_n62420_
 .subckt nor2_x0 i0=$abc$109383$new_n62420_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99700
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[4] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62422_
-.subckt ao22_x2 i0=$abc$109383$new_n27790_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62422_ q=$abc$109383$new_n62423_
-.subckt nxr2_x1 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27790_ nq=$abc$109383$new_n62424_
+.subckt and21nor_x1 i0=$abc$109383$new_n27790_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62422_ nq=$abc$109383$new_n62423_
+.subckt nexor2_x0 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27790_ nq=$abc$109383$new_n62424_
 .subckt nand2_x0 i0=$abc$109383$new_n62424_ i1=$abc$109383$new_n62406_ nq=$abc$109383$new_n62425_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[4] nq=$abc$109383$new_n62426_
-.subckt ao22_x2 i0=$abc$109383$new_n62426_ i1=$abc$109383$new_n62425_ i2=$abc$109383$new_n62423_ q=$abc$109383$new_n62427_
+.subckt and21nor_x1 i0=$abc$109383$new_n62426_ i1=$abc$109383$new_n62425_ i2=$abc$109383$new_n62423_ nq=$abc$109383$new_n62427_
 .subckt nor2_x0 i0=$abc$109383$new_n62427_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99704
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[5] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62429_
-.subckt ao22_x2 i0=$abc$109383$new_n27791_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62429_ q=$abc$109383$new_n62430_
-.subckt a2_x2 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27790_ q=$abc$109383$new_n62431_
-.subckt nxr2_x1 i0=$abc$109383$new_n62431_ i1=$abc$109383$new_n27791_ nq=$abc$109383$new_n62432_
+.subckt and21nor_x1 i0=$abc$109383$new_n27791_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62429_ nq=$abc$109383$new_n62430_
+.subckt and2_x1 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27790_ q=$abc$109383$new_n62431_
+.subckt nexor2_x0 i0=$abc$109383$new_n62431_ i1=$abc$109383$new_n27791_ nq=$abc$109383$new_n62432_
 .subckt nand2_x0 i0=$abc$109383$new_n62432_ i1=$abc$109383$new_n62406_ nq=$abc$109383$new_n62433_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[5] nq=$abc$109383$new_n62434_
-.subckt ao22_x2 i0=$abc$109383$new_n62434_ i1=$abc$109383$new_n62433_ i2=$abc$109383$new_n62430_ q=$abc$109383$new_n62435_
+.subckt and21nor_x1 i0=$abc$109383$new_n62434_ i1=$abc$109383$new_n62433_ i2=$abc$109383$new_n62430_ nq=$abc$109383$new_n62435_
 .subckt nor2_x0 i0=$abc$109383$new_n62435_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99708
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[6] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62437_
-.subckt ao22_x2 i0=$abc$109383$new_n27792_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62437_ q=$abc$109383$new_n62438_
-.subckt a3_x2 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27791_ i2=$abc$109383$new_n27790_ q=$abc$109383$new_n62439_
-.subckt nxr2_x1 i0=$abc$109383$new_n62439_ i1=$abc$109383$new_n27792_ nq=$abc$109383$new_n62440_
+.subckt and21nor_x1 i0=$abc$109383$new_n27792_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62437_ nq=$abc$109383$new_n62438_
+.subckt and3_x1 i0=$abc$109383$new_n27793_ i1=$abc$109383$new_n27791_ i2=$abc$109383$new_n27790_ q=$abc$109383$new_n62439_
+.subckt nexor2_x0 i0=$abc$109383$new_n62439_ i1=$abc$109383$new_n27792_ nq=$abc$109383$new_n62440_
 .subckt nand2_x0 i0=$abc$109383$new_n62440_ i1=$abc$109383$new_n62406_ nq=$abc$109383$new_n62441_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[6] nq=$abc$109383$new_n62442_
-.subckt ao22_x2 i0=$abc$109383$new_n62442_ i1=$abc$109383$new_n62441_ i2=$abc$109383$new_n62438_ q=$abc$109383$new_n62443_
+.subckt and21nor_x1 i0=$abc$109383$new_n62442_ i1=$abc$109383$new_n62441_ i2=$abc$109383$new_n62438_ nq=$abc$109383$new_n62443_
 .subckt nor2_x0 i0=$abc$109383$new_n62443_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99712
 .subckt buf_x4 i=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62445_
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62446_
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62446_
 .subckt nor2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb i1=soc.timer.bridge_timer_en__r_data nq=$abc$109383$new_n62447_
 .subckt buf_x4 i=$abc$109383$new_n62447_ q=$abc$109383$new_n62448_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[7] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62446_ q=$abc$109383$new_n62449_
-.subckt nxr2_x1 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27787_ nq=$abc$109383$new_n62450_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[7] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62446_ nq=$abc$109383$new_n62449_
+.subckt nexor2_x0 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27787_ nq=$abc$109383$new_n62450_
 .subckt nor3_x0 i0=$abc$109383$new_n27809_ i1=$abc$109383$new_n27799_ i2=$abc$109383$new_n27796_ nq=$abc$109383$new_n62451_
-.subckt mx2_x2 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62450_ i1=soc.timer.bridge_timer_reload__r_data[7] q=$abc$109383$new_n62452_
-.subckt oa22_x2 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62452_ i2=$abc$109383$new_n62449_ q=$abc$109383$new_n62453_
-.subckt a2_x2 i0=$abc$109383$new_n62453_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99716
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62455_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[8] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62455_ q=$abc$109383$new_n62456_
-.subckt a2_x2 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27787_ q=$abc$109383$new_n62457_
-.subckt nxr2_x1 i0=$abc$109383$new_n62457_ i1=$abc$109383$new_n27789_ nq=$abc$109383$new_n62458_
-.subckt mx2_x2 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62458_ i1=soc.timer.bridge_timer_reload__r_data[8] q=$abc$109383$new_n62459_
-.subckt oa22_x2 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62459_ i2=$abc$109383$new_n62456_ q=$abc$109383$new_n62460_
-.subckt a2_x2 i0=$abc$109383$new_n62460_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99720
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62462_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[9] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62462_ q=$abc$109383$new_n62463_
-.subckt a3_x2 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27789_ i2=$abc$109383$new_n27787_ q=$abc$109383$new_n62464_
-.subckt nxr2_x1 i0=$abc$109383$new_n62464_ i1=$abc$109383$new_n27788_ nq=$abc$109383$new_n62465_
-.subckt mx2_x2 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62465_ i1=soc.timer.bridge_timer_reload__r_data[9] q=$abc$109383$new_n62466_
-.subckt oa22_x2 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62466_ i2=$abc$109383$new_n62463_ q=$abc$109383$new_n62467_
-.subckt a2_x2 i0=$abc$109383$new_n62467_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99724
+.subckt mux2_x1 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62450_ i1=soc.timer.bridge_timer_reload__r_data[7] q=$abc$109383$new_n62452_
+.subckt or21nand_x1 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62452_ i2=$abc$109383$new_n62449_ nq=$abc$109383$new_n62453_
+.subckt and2_x1 i0=$abc$109383$new_n62453_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99716
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62455_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[8] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62455_ nq=$abc$109383$new_n62456_
+.subckt and2_x1 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27787_ q=$abc$109383$new_n62457_
+.subckt nexor2_x0 i0=$abc$109383$new_n62457_ i1=$abc$109383$new_n27789_ nq=$abc$109383$new_n62458_
+.subckt mux2_x1 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62458_ i1=soc.timer.bridge_timer_reload__r_data[8] q=$abc$109383$new_n62459_
+.subckt or21nand_x1 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62459_ i2=$abc$109383$new_n62456_ nq=$abc$109383$new_n62460_
+.subckt and2_x1 i0=$abc$109383$new_n62460_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99720
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62462_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[9] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62462_ nq=$abc$109383$new_n62463_
+.subckt and3_x1 i0=$abc$109383$new_n27794_ i1=$abc$109383$new_n27789_ i2=$abc$109383$new_n27787_ q=$abc$109383$new_n62464_
+.subckt nexor2_x0 i0=$abc$109383$new_n62464_ i1=$abc$109383$new_n27788_ nq=$abc$109383$new_n62465_
+.subckt mux2_x1 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62465_ i1=soc.timer.bridge_timer_reload__r_data[9] q=$abc$109383$new_n62466_
+.subckt or21nand_x1 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62466_ i2=$abc$109383$new_n62463_ nq=$abc$109383$new_n62467_
+.subckt and2_x1 i0=$abc$109383$new_n62467_ i1=$abc$109383$new_n62298_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99724
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62469_
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62470_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[10] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62470_ q=$abc$109383$new_n62471_
-.subckt nxr2_x1 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27784_ nq=$abc$109383$new_n62472_
-.subckt mx2_x2 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62472_ i1=soc.timer.bridge_timer_reload__r_data[10] q=$abc$109383$new_n62473_
-.subckt oa22_x2 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62473_ i2=$abc$109383$new_n62471_ q=$abc$109383$new_n62474_
-.subckt a2_x2 i0=$abc$109383$new_n62474_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99728
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62476_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[11] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62476_ q=$abc$109383$new_n62477_
-.subckt a2_x2 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27784_ q=$abc$109383$new_n62478_
-.subckt nxr2_x1 i0=$abc$109383$new_n62478_ i1=$abc$109383$new_n27785_ nq=$abc$109383$new_n62479_
-.subckt a2_x2 i0=$abc$109383$new_n62479_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62480_
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62470_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[10] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62470_ nq=$abc$109383$new_n62471_
+.subckt nexor2_x0 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27784_ nq=$abc$109383$new_n62472_
+.subckt mux2_x1 cmd=$abc$109383$new_n62451_ i0=$abc$109383$new_n62472_ i1=soc.timer.bridge_timer_reload__r_data[10] q=$abc$109383$new_n62473_
+.subckt or21nand_x1 i0=$abc$109383$new_n62406_ i1=$abc$109383$new_n62473_ i2=$abc$109383$new_n62471_ nq=$abc$109383$new_n62474_
+.subckt and2_x1 i0=$abc$109383$new_n62474_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99728
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11] i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62476_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[11] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62476_ nq=$abc$109383$new_n62477_
+.subckt and2_x1 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27784_ q=$abc$109383$new_n62478_
+.subckt nexor2_x0 i0=$abc$109383$new_n62478_ i1=$abc$109383$new_n27785_ nq=$abc$109383$new_n62479_
+.subckt and2_x1 i0=$abc$109383$new_n62479_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62480_
 .subckt buf_x4 i=$abc$109383$new_n27800_ q=$abc$109383$new_n62481_
 .subckt buf_x4 i=$abc$109383$new_n27810_ q=$abc$109383$new_n62482_
-.subckt o4_x2 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[11] q=$abc$109383$new_n62483_
-.subckt oa22_x2 i0=$abc$109383$new_n62483_ i1=$abc$109383$new_n62480_ i2=$abc$109383$new_n62477_ q=$abc$109383$new_n62484_
-.subckt a2_x2 i0=$abc$109383$new_n62484_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99732
+.subckt or4_x1 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[11] q=$abc$109383$new_n62483_
+.subckt or21nand_x1 i0=$abc$109383$new_n62483_ i1=$abc$109383$new_n62480_ i2=$abc$109383$new_n62477_ nq=$abc$109383$new_n62484_
+.subckt and2_x1 i0=$abc$109383$new_n62484_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99732
 .subckt buf_x4 i=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62486_
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62487_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[12] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62487_ q=$abc$109383$new_n62488_
-.subckt a3_x2 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27785_ i2=$abc$109383$new_n27784_ q=$abc$109383$new_n62489_
-.subckt nxr2_x1 i0=$abc$109383$new_n62489_ i1=$abc$109383$new_n27786_ nq=$abc$109383$new_n62490_
-.subckt a2_x2 i0=$abc$109383$new_n62490_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62491_
-.subckt o4_x2 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[12] q=$abc$109383$new_n62492_
-.subckt oa22_x2 i0=$abc$109383$new_n62492_ i1=$abc$109383$new_n62491_ i2=$abc$109383$new_n62488_ q=$abc$109383$new_n62493_
-.subckt a2_x2 i0=$abc$109383$new_n62493_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99736
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62495_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[13] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62495_ q=$abc$109383$new_n62496_
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62487_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[12] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62487_ nq=$abc$109383$new_n62488_
+.subckt and3_x1 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27785_ i2=$abc$109383$new_n27784_ q=$abc$109383$new_n62489_
+.subckt nexor2_x0 i0=$abc$109383$new_n62489_ i1=$abc$109383$new_n27786_ nq=$abc$109383$new_n62490_
+.subckt and2_x1 i0=$abc$109383$new_n62490_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62491_
+.subckt or4_x1 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[12] q=$abc$109383$new_n62492_
+.subckt or21nand_x1 i0=$abc$109383$new_n62492_ i1=$abc$109383$new_n62491_ i2=$abc$109383$new_n62488_ nq=$abc$109383$new_n62493_
+.subckt and2_x1 i0=$abc$109383$new_n62493_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99736
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62495_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[13] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62495_ nq=$abc$109383$new_n62496_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[13] nq=$abc$109383$new_n62497_
-.subckt a4_x2 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27786_ i2=$abc$109383$new_n27785_ i3=$abc$109383$new_n27784_ q=$abc$109383$new_n62498_
+.subckt and4_x1 i0=$abc$109383$new_n27795_ i1=$abc$109383$new_n27786_ i2=$abc$109383$new_n27785_ i3=$abc$109383$new_n27784_ q=$abc$109383$new_n62498_
 .subckt buf_x4 i=$abc$109383$new_n62498_ q=$abc$109383$new_n62499_
-.subckt nxr2_x1 i0=$abc$109383$new_n62499_ i1=$abc$109383$new_n62497_ nq=$abc$109383$new_n62500_
-.subckt a2_x2 i0=$abc$109383$new_n62500_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62501_
-.subckt o4_x2 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[13] q=$abc$109383$new_n62502_
-.subckt oa22_x2 i0=$abc$109383$new_n62502_ i1=$abc$109383$new_n62501_ i2=$abc$109383$new_n62496_ q=$abc$109383$new_n62503_
-.subckt a2_x2 i0=$abc$109383$new_n62503_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99740
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[14] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62505_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[14] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62505_ q=$abc$109383$new_n62506_
-.subckt a2_x2 i0=$abc$109383$new_n62499_ i1=$abc$109383$new_n62497_ q=$abc$109383$new_n62507_
-.subckt nxr2_x1 i0=$abc$109383$new_n62507_ i1=$abc$109383$new_n62176_ nq=$abc$109383$new_n62508_
-.subckt a2_x2 i0=$abc$109383$new_n62508_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62509_
-.subckt o4_x2 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[14] q=$abc$109383$new_n62510_
-.subckt oa22_x2 i0=$abc$109383$new_n62510_ i1=$abc$109383$new_n62509_ i2=$abc$109383$new_n62506_ q=$abc$109383$new_n62511_
-.subckt a2_x2 i0=$abc$109383$new_n62511_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99744
-.subckt a2_x2 i0=$abc$109383$new_n62448_ i1=soc.timer.bridge_timer_ctr__r_data[15] q=$abc$109383$new_n62513_
-.subckt mx2_x2 cmd=$abc$109383$new_n62445_ i0=$abc$109383$new_n27598_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15] q=$abc$109383$new_n62514_
+.subckt nexor2_x0 i0=$abc$109383$new_n62499_ i1=$abc$109383$new_n62497_ nq=$abc$109383$new_n62500_
+.subckt and2_x1 i0=$abc$109383$new_n62500_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62501_
+.subckt or4_x1 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[13] q=$abc$109383$new_n62502_
+.subckt or21nand_x1 i0=$abc$109383$new_n62502_ i1=$abc$109383$new_n62501_ i2=$abc$109383$new_n62496_ nq=$abc$109383$new_n62503_
+.subckt and2_x1 i0=$abc$109383$new_n62503_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99740
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[14] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62505_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[14] i1=$abc$109383$new_n62448_ i2=$abc$109383$new_n62505_ nq=$abc$109383$new_n62506_
+.subckt and2_x1 i0=$abc$109383$new_n62499_ i1=$abc$109383$new_n62497_ q=$abc$109383$new_n62507_
+.subckt nexor2_x0 i0=$abc$109383$new_n62507_ i1=$abc$109383$new_n62176_ nq=$abc$109383$new_n62508_
+.subckt and2_x1 i0=$abc$109383$new_n62508_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62509_
+.subckt or4_x1 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[14] q=$abc$109383$new_n62510_
+.subckt or21nand_x1 i0=$abc$109383$new_n62510_ i1=$abc$109383$new_n62509_ i2=$abc$109383$new_n62506_ nq=$abc$109383$new_n62511_
+.subckt and2_x1 i0=$abc$109383$new_n62511_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99744
+.subckt and2_x1 i0=$abc$109383$new_n62448_ i1=soc.timer.bridge_timer_ctr__r_data[15] q=$abc$109383$new_n62513_
+.subckt mux2_x1 cmd=$abc$109383$new_n62445_ i0=$abc$109383$new_n27598_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15] q=$abc$109383$new_n62514_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[15] nq=$abc$109383$new_n62515_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[14] i1=soc.timer.bridge_timer_ctr__r_data[13] nq=$abc$109383$new_n62516_
-.subckt oa22_x2 i0=$abc$109383$new_n62516_ i1=$abc$109383$new_n62499_ i2=$abc$109383$new_n62515_ q=$abc$109383$new_n62517_
+.subckt or21nand_x1 i0=$abc$109383$new_n62516_ i1=$abc$109383$new_n62499_ i2=$abc$109383$new_n62515_ nq=$abc$109383$new_n62517_
 .subckt nand2_x0 i0=$abc$109383$new_n62517_ i1=$abc$109383$new_n62386_ nq=$abc$109383$new_n62518_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[15] nq=$abc$109383$new_n62519_
-.subckt a3_x2 i0=$abc$109383$new_n27808_ i1=$abc$109383$new_n27804_ i2=$abc$109383$new_n62519_ q=$abc$109383$new_n62520_
+.subckt and3_x1 i0=$abc$109383$new_n27808_ i1=$abc$109383$new_n27804_ i2=$abc$109383$new_n62519_ q=$abc$109383$new_n62520_
 .subckt nor3_x0 i0=$abc$109383$new_n62520_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ nq=$abc$109383$new_n62521_
-.subckt ao22_x2 i0=$abc$109383$new_n62521_ i1=$abc$109383$new_n62518_ i2=$abc$109383$new_n62514_ q=$abc$109383$new_n62522_
-.subckt ao22_x2 i0=$abc$109383$new_n62522_ i1=$abc$109383$new_n62513_ i2=$abc$109383$new_n61819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99748
+.subckt and21nor_x1 i0=$abc$109383$new_n62521_ i1=$abc$109383$new_n62518_ i2=$abc$109383$new_n62514_ nq=$abc$109383$new_n62522_
+.subckt and21nor_x1 i0=$abc$109383$new_n62522_ i1=$abc$109383$new_n62513_ i2=$abc$109383$new_n61819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99748
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[16] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62524_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[16] nq=$abc$109383$new_n62525_
-.subckt ao22_x2 i0=$abc$109383$new_n62525_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62524_ q=$abc$109383$new_n62526_
+.subckt and21nor_x1 i0=$abc$109383$new_n62525_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62524_ nq=$abc$109383$new_n62526_
 .subckt nor4_x0 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[16] nq=$abc$109383$new_n62527_
-.subckt o2_x2 i0=$abc$109383$new_n62527_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62528_
+.subckt or2_x1 i0=$abc$109383$new_n62527_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62528_
 .subckt nor3_x0 i0=soc.timer.bridge_timer_ctr__r_data[15] i1=soc.timer.bridge_timer_ctr__r_data[14] i2=soc.timer.bridge_timer_ctr__r_data[13] nq=$abc$109383$new_n62529_
-.subckt a2_x2 i0=$abc$109383$new_n62529_ i1=$abc$109383$new_n62499_ q=$abc$109383$new_n62530_
-.subckt nxr2_x1 i0=$abc$109383$new_n62530_ i1=soc.timer.bridge_timer_ctr__r_data[16] nq=$abc$109383$new_n62531_
-.subckt ao22_x2 i0=$abc$109383$new_n62531_ i1=$abc$109383$new_n62528_ i2=$abc$109383$new_n62526_ q=$abc$109383$new_n62532_
+.subckt and2_x1 i0=$abc$109383$new_n62529_ i1=$abc$109383$new_n62499_ q=$abc$109383$new_n62530_
+.subckt nexor2_x0 i0=$abc$109383$new_n62530_ i1=soc.timer.bridge_timer_ctr__r_data[16] nq=$abc$109383$new_n62531_
+.subckt and21nor_x1 i0=$abc$109383$new_n62531_ i1=$abc$109383$new_n62528_ i2=$abc$109383$new_n62526_ nq=$abc$109383$new_n62532_
 .subckt nor2_x0 i0=$abc$109383$new_n62532_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99752
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[17] i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62534_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[17] nq=$abc$109383$new_n62535_
-.subckt ao22_x2 i0=$abc$109383$new_n62535_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62534_ q=$abc$109383$new_n62536_
+.subckt and21nor_x1 i0=$abc$109383$new_n62535_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62534_ nq=$abc$109383$new_n62536_
 .subckt nor4_x0 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[17] nq=$abc$109383$new_n62537_
-.subckt o2_x2 i0=$abc$109383$new_n62537_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62538_
-.subckt a3_x2 i0=$abc$109383$new_n62529_ i1=$abc$109383$new_n62499_ i2=$abc$109383$new_n62525_ q=$abc$109383$new_n62539_
-.subckt nxr2_x1 i0=$abc$109383$new_n62539_ i1=soc.timer.bridge_timer_ctr__r_data[17] nq=$abc$109383$new_n62540_
-.subckt ao22_x2 i0=$abc$109383$new_n62540_ i1=$abc$109383$new_n62538_ i2=$abc$109383$new_n62536_ q=$abc$109383$new_n62541_
+.subckt or2_x1 i0=$abc$109383$new_n62537_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62538_
+.subckt and3_x1 i0=$abc$109383$new_n62529_ i1=$abc$109383$new_n62499_ i2=$abc$109383$new_n62525_ q=$abc$109383$new_n62539_
+.subckt nexor2_x0 i0=$abc$109383$new_n62539_ i1=soc.timer.bridge_timer_ctr__r_data[17] nq=$abc$109383$new_n62540_
+.subckt and21nor_x1 i0=$abc$109383$new_n62540_ i1=$abc$109383$new_n62538_ i2=$abc$109383$new_n62536_ nq=$abc$109383$new_n62541_
 .subckt nor2_x0 i0=$abc$109383$new_n62541_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99756
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[18] i1=$abc$109383$new_n62445_ nq=$abc$109383$new_n62543_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[18] nq=$abc$109383$new_n62544_
-.subckt ao22_x2 i0=$abc$109383$new_n62544_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62543_ q=$abc$109383$new_n62545_
+.subckt and21nor_x1 i0=$abc$109383$new_n62544_ i1=$abc$109383$new_n62383_ i2=$abc$109383$new_n62543_ nq=$abc$109383$new_n62545_
 .subckt nor4_x0 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[18] nq=$abc$109383$new_n62546_
-.subckt o2_x2 i0=$abc$109383$new_n62546_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62547_
+.subckt or2_x1 i0=$abc$109383$new_n62546_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62547_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[17] i1=soc.timer.bridge_timer_ctr__r_data[16] nq=$abc$109383$new_n62548_
-.subckt a3_x2 i0=$abc$109383$new_n62548_ i1=$abc$109383$new_n62529_ i2=$abc$109383$new_n62499_ q=$abc$109383$new_n62549_
-.subckt nxr2_x1 i0=$abc$109383$new_n62549_ i1=soc.timer.bridge_timer_ctr__r_data[18] nq=$abc$109383$new_n62550_
-.subckt ao22_x2 i0=$abc$109383$new_n62550_ i1=$abc$109383$new_n62547_ i2=$abc$109383$new_n62545_ q=$abc$109383$new_n62551_
+.subckt and3_x1 i0=$abc$109383$new_n62548_ i1=$abc$109383$new_n62529_ i2=$abc$109383$new_n62499_ q=$abc$109383$new_n62549_
+.subckt nexor2_x0 i0=$abc$109383$new_n62549_ i1=soc.timer.bridge_timer_ctr__r_data[18] nq=$abc$109383$new_n62550_
+.subckt and21nor_x1 i0=$abc$109383$new_n62550_ i1=$abc$109383$new_n62547_ i2=$abc$109383$new_n62545_ nq=$abc$109383$new_n62551_
 .subckt nor2_x0 i0=$abc$109383$new_n62551_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99760
 .subckt nand2_x0 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[19] i1=$abc$109383$new_n62445_ nq=$abc$109383$new_n62553_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[19] nq=$abc$109383$new_n62554_
-.subckt ao22_x2 i0=$abc$109383$new_n62554_ i1=$abc$109383$new_n62382_ i2=$abc$109383$new_n62553_ q=$abc$109383$new_n62555_
+.subckt and21nor_x1 i0=$abc$109383$new_n62554_ i1=$abc$109383$new_n62382_ i2=$abc$109383$new_n62553_ nq=$abc$109383$new_n62555_
 .subckt nor4_x0 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[19] nq=$abc$109383$new_n62556_
-.subckt o2_x2 i0=$abc$109383$new_n62556_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62557_
-.subckt a4_x2 i0=$abc$109383$new_n62548_ i1=$abc$109383$new_n62529_ i2=$abc$109383$new_n62499_ i3=$abc$109383$new_n62544_ q=$abc$109383$new_n62558_
-.subckt nxr2_x1 i0=$abc$109383$new_n62558_ i1=soc.timer.bridge_timer_ctr__r_data[19] nq=$abc$109383$new_n62559_
-.subckt ao22_x2 i0=$abc$109383$new_n62559_ i1=$abc$109383$new_n62557_ i2=$abc$109383$new_n62555_ q=$abc$109383$new_n62560_
+.subckt or2_x1 i0=$abc$109383$new_n62556_ i1=$abc$109383$new_n62387_ q=$abc$109383$new_n62557_
+.subckt and4_x1 i0=$abc$109383$new_n62548_ i1=$abc$109383$new_n62529_ i2=$abc$109383$new_n62499_ i3=$abc$109383$new_n62544_ q=$abc$109383$new_n62558_
+.subckt nexor2_x0 i0=$abc$109383$new_n62558_ i1=soc.timer.bridge_timer_ctr__r_data[19] nq=$abc$109383$new_n62559_
+.subckt and21nor_x1 i0=$abc$109383$new_n62559_ i1=$abc$109383$new_n62557_ i2=$abc$109383$new_n62555_ nq=$abc$109383$new_n62560_
 .subckt nor2_x0 i0=$abc$109383$new_n62560_ i1=$abc$109383$new_n30149_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99764
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[20] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62562_
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[20] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62562_
 .subckt buf_x4 i=$abc$109383$new_n62447_ q=$abc$109383$new_n62563_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[20] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62562_ q=$abc$109383$new_n62564_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[20] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62562_ nq=$abc$109383$new_n62564_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[20] nq=$abc$109383$new_n62565_
 .subckt nor2_x0 i0=$abc$109383$new_n62565_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62566_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[20] nq=$abc$109383$new_n62567_
-.subckt a2_x2 i0=$abc$109383$new_n62558_ i1=$abc$109383$new_n62554_ q=$abc$109383$new_n62568_
-.subckt nxr2_x1 i0=$abc$109383$new_n62568_ i1=$abc$109383$new_n62567_ nq=$abc$109383$new_n62569_
-.subckt oa22_x2 i0=$abc$109383$new_n62569_ i1=$abc$109383$new_n62566_ i2=$abc$109383$new_n62564_ q=$abc$109383$new_n62570_
-.subckt a2_x2 i0=$abc$109383$new_n62570_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99768
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62572_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[21] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62572_ q=$abc$109383$new_n62573_
-.subckt o4_x2 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[21] q=$abc$109383$new_n62574_
-.subckt a2_x2 i0=$abc$109383$new_n62574_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62575_
+.subckt and2_x1 i0=$abc$109383$new_n62558_ i1=$abc$109383$new_n62554_ q=$abc$109383$new_n62568_
+.subckt nexor2_x0 i0=$abc$109383$new_n62568_ i1=$abc$109383$new_n62567_ nq=$abc$109383$new_n62569_
+.subckt or21nand_x1 i0=$abc$109383$new_n62569_ i1=$abc$109383$new_n62566_ i2=$abc$109383$new_n62564_ nq=$abc$109383$new_n62570_
+.subckt and2_x1 i0=$abc$109383$new_n62570_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99768
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62572_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[21] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62572_ nq=$abc$109383$new_n62573_
+.subckt or4_x1 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27800_ i2=$abc$109383$new_n27797_ i3=soc.timer.bridge_timer_reload__r_data[21] q=$abc$109383$new_n62574_
+.subckt and2_x1 i0=$abc$109383$new_n62574_ i1=$abc$109383$new_n62405_ q=$abc$109383$new_n62575_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[21] nq=$abc$109383$new_n62576_
-.subckt a4_x2 i0=$abc$109383$new_n27803_ i1=$abc$109383$new_n62548_ i2=$abc$109383$new_n62529_ i3=$abc$109383$new_n62499_ q=$abc$109383$new_n62577_
-.subckt nxr2_x1 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62576_ nq=$abc$109383$new_n62578_
-.subckt oa22_x2 i0=$abc$109383$new_n62578_ i1=$abc$109383$new_n62575_ i2=$abc$109383$new_n62573_ q=$abc$109383$new_n62579_
-.subckt a2_x2 i0=$abc$109383$new_n62579_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99772
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[22] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62581_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[22] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62581_ q=$abc$109383$new_n62582_
+.subckt and4_x1 i0=$abc$109383$new_n27803_ i1=$abc$109383$new_n62548_ i2=$abc$109383$new_n62529_ i3=$abc$109383$new_n62499_ q=$abc$109383$new_n62577_
+.subckt nexor2_x0 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62576_ nq=$abc$109383$new_n62578_
+.subckt or21nand_x1 i0=$abc$109383$new_n62578_ i1=$abc$109383$new_n62575_ i2=$abc$109383$new_n62573_ nq=$abc$109383$new_n62579_
+.subckt and2_x1 i0=$abc$109383$new_n62579_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99772
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[22] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62581_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[22] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62581_ nq=$abc$109383$new_n62582_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n27798_ i3=soc.timer.bridge_timer_reload__r_data[22] nq=$abc$109383$new_n62583_
 .subckt nor2_x0 i0=$abc$109383$new_n62583_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62584_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[22] nq=$abc$109383$new_n62585_
-.subckt a2_x2 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62576_ q=$abc$109383$new_n62586_
-.subckt nxr2_x1 i0=$abc$109383$new_n62586_ i1=$abc$109383$new_n62585_ nq=$abc$109383$new_n62587_
-.subckt oa22_x2 i0=$abc$109383$new_n62587_ i1=$abc$109383$new_n62584_ i2=$abc$109383$new_n62582_ q=$abc$109383$new_n62588_
-.subckt a2_x2 i0=$abc$109383$new_n62588_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99776
+.subckt and2_x1 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62576_ q=$abc$109383$new_n62586_
+.subckt nexor2_x0 i0=$abc$109383$new_n62586_ i1=$abc$109383$new_n62585_ nq=$abc$109383$new_n62587_
+.subckt or21nand_x1 i0=$abc$109383$new_n62587_ i1=$abc$109383$new_n62584_ i2=$abc$109383$new_n62582_ nq=$abc$109383$new_n62588_
+.subckt and2_x1 i0=$abc$109383$new_n62588_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99776
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[23] nq=$abc$109383$new_n62590_
 .subckt nand2_x0 i0=$abc$109383$new_n62590_ i1=$abc$109383$new_n62380_ nq=$abc$109383$new_n62591_
-.subckt o3_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb i1=$abc$109383$new_n27598_ i2=soc.timer.bridge_timer_ctr__r_data[23] q=$abc$109383$new_n62592_
-.subckt a2_x2 i0=$abc$109383$new_n62592_ i1=$abc$109383$new_n27603_ q=$abc$109383$new_n62593_
-.subckt a2_x2 i0=$abc$109383$new_n62593_ i1=$abc$109383$new_n62591_ q=$abc$109383$new_n62594_
+.subckt or3_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb i1=$abc$109383$new_n27598_ i2=soc.timer.bridge_timer_ctr__r_data[23] q=$abc$109383$new_n62592_
+.subckt and2_x1 i0=$abc$109383$new_n62592_ i1=$abc$109383$new_n27603_ q=$abc$109383$new_n62593_
+.subckt and2_x1 i0=$abc$109383$new_n62593_ i1=$abc$109383$new_n62591_ q=$abc$109383$new_n62594_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[22] i1=soc.timer.bridge_timer_ctr__r_data[21] nq=$abc$109383$new_n62595_
-.subckt oa22_x2 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n27805_ q=$abc$109383$new_n62596_
+.subckt or21nand_x1 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n27805_ nq=$abc$109383$new_n62596_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[23] nq=$abc$109383$new_n62597_
-.subckt o4_x2 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27797_ i3=$abc$109383$new_n62597_ q=$abc$109383$new_n62598_
+.subckt or4_x1 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n27801_ i2=$abc$109383$new_n27797_ i3=$abc$109383$new_n62597_ q=$abc$109383$new_n62598_
 .subckt nand3_x0 i0=$abc$109383$new_n62598_ i1=$abc$109383$new_n62596_ i2=$abc$109383$new_n62406_ nq=$abc$109383$new_n62599_
-.subckt o2_x2 i0=soc.timer.bridge_timer_ctr__r_data[22] i1=soc.timer.bridge_timer_ctr__r_data[21] q=$abc$109383$new_n62600_
+.subckt or2_x1 i0=soc.timer.bridge_timer_ctr__r_data[22] i1=soc.timer.bridge_timer_ctr__r_data[21] q=$abc$109383$new_n62600_
 .subckt nand4_x0 i0=$abc$109383$new_n27803_ i1=$abc$109383$new_n62548_ i2=$abc$109383$new_n62529_ i3=$abc$109383$new_n62499_ nq=$abc$109383$new_n62601_
 .subckt nor4_x0 i0=$abc$109383$new_n62601_ i1=$abc$109383$new_n62451_ i2=$abc$109383$new_n62600_ i3=soc.timer.bridge_timer_ctr__r_data[23] nq=$abc$109383$new_n62602_
-.subckt ao22_x2 i0=$abc$109383$new_n62602_ i1=$abc$109383$new_n62599_ i2=$abc$109383$new_n62594_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99780
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62604_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[24] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62604_ q=$abc$109383$new_n62605_
+.subckt and21nor_x1 i0=$abc$109383$new_n62602_ i1=$abc$109383$new_n62599_ i2=$abc$109383$new_n62594_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$99780
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62604_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[24] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62604_ nq=$abc$109383$new_n62605_
 .subckt nor4_x0 i0=$abc$109383$new_n27811_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[24] nq=$abc$109383$new_n62606_
 .subckt nor2_x0 i0=$abc$109383$new_n62606_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62607_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[24] nq=$abc$109383$new_n62608_
-.subckt a3_x2 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n27805_ q=$abc$109383$new_n62609_
-.subckt nxr2_x1 i0=$abc$109383$new_n62609_ i1=$abc$109383$new_n62608_ nq=$abc$109383$new_n62610_
-.subckt oa22_x2 i0=$abc$109383$new_n62610_ i1=$abc$109383$new_n62607_ i2=$abc$109383$new_n62605_ q=$abc$109383$new_n62611_
-.subckt a2_x2 i0=$abc$109383$new_n62611_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99784
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62613_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[25] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62613_ q=$abc$109383$new_n62614_
+.subckt and3_x1 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n27805_ q=$abc$109383$new_n62609_
+.subckt nexor2_x0 i0=$abc$109383$new_n62609_ i1=$abc$109383$new_n62608_ nq=$abc$109383$new_n62610_
+.subckt or21nand_x1 i0=$abc$109383$new_n62610_ i1=$abc$109383$new_n62607_ i2=$abc$109383$new_n62605_ nq=$abc$109383$new_n62611_
+.subckt and2_x1 i0=$abc$109383$new_n62611_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99784
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62613_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[25] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62613_ nq=$abc$109383$new_n62614_
 .subckt nor4_x0 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[25] nq=$abc$109383$new_n62615_
 .subckt nor2_x0 i0=$abc$109383$new_n62615_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62616_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[25] nq=$abc$109383$new_n62617_
-.subckt a4_x2 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n62608_ i3=$abc$109383$new_n27805_ q=$abc$109383$new_n62618_
-.subckt nxr2_x1 i0=$abc$109383$new_n62618_ i1=$abc$109383$new_n62617_ nq=$abc$109383$new_n62619_
-.subckt oa22_x2 i0=$abc$109383$new_n62619_ i1=$abc$109383$new_n62616_ i2=$abc$109383$new_n62614_ q=$abc$109383$new_n62620_
-.subckt a2_x2 i0=$abc$109383$new_n62620_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99788
+.subckt and4_x1 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n62608_ i3=$abc$109383$new_n27805_ q=$abc$109383$new_n62618_
+.subckt nexor2_x0 i0=$abc$109383$new_n62618_ i1=$abc$109383$new_n62617_ nq=$abc$109383$new_n62619_
+.subckt or21nand_x1 i0=$abc$109383$new_n62619_ i1=$abc$109383$new_n62616_ i2=$abc$109383$new_n62614_ nq=$abc$109383$new_n62620_
+.subckt and2_x1 i0=$abc$109383$new_n62620_ i1=$abc$109383$new_n62469_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99788
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62622_
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62623_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[26] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62623_ q=$abc$109383$new_n62624_
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62623_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[26] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62623_ nq=$abc$109383$new_n62624_
 .subckt nor4_x0 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[26] nq=$abc$109383$new_n62625_
 .subckt nor2_x0 i0=$abc$109383$new_n62625_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62626_
 .subckt inv_x1 i=soc.timer.bridge_timer_ctr__r_data[26] nq=$abc$109383$new_n62627_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[24] i1=soc.timer.bridge_timer_ctr__r_data[25] nq=$abc$109383$new_n62628_
-.subckt a4_x2 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n62628_ i3=$abc$109383$new_n27805_ q=$abc$109383$new_n62629_
-.subckt nxr2_x1 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62627_ nq=$abc$109383$new_n62630_
-.subckt oa22_x2 i0=$abc$109383$new_n62630_ i1=$abc$109383$new_n62626_ i2=$abc$109383$new_n62624_ q=$abc$109383$new_n62631_
-.subckt a2_x2 i0=$abc$109383$new_n62631_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99792
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62633_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[27] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62633_ q=$abc$109383$new_n62634_
+.subckt and4_x1 i0=$abc$109383$new_n62577_ i1=$abc$109383$new_n62595_ i2=$abc$109383$new_n62628_ i3=$abc$109383$new_n27805_ q=$abc$109383$new_n62629_
+.subckt nexor2_x0 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62627_ nq=$abc$109383$new_n62630_
+.subckt or21nand_x1 i0=$abc$109383$new_n62630_ i1=$abc$109383$new_n62626_ i2=$abc$109383$new_n62624_ nq=$abc$109383$new_n62631_
+.subckt and2_x1 i0=$abc$109383$new_n62631_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99792
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27] i1=$abc$109383$new_n62486_ q=$abc$109383$new_n62633_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[27] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62633_ nq=$abc$109383$new_n62634_
 .subckt nor4_x0 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[27] nq=$abc$109383$new_n62635_
 .subckt nor2_x0 i0=$abc$109383$new_n62635_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62636_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[27] nq=$abc$109383$new_n62637_
-.subckt a2_x2 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62627_ q=$abc$109383$new_n62638_
-.subckt nxr2_x1 i0=$abc$109383$new_n62638_ i1=$abc$109383$new_n62637_ nq=$abc$109383$new_n62639_
-.subckt oa22_x2 i0=$abc$109383$new_n62639_ i1=$abc$109383$new_n62636_ i2=$abc$109383$new_n62634_ q=$abc$109383$new_n62640_
-.subckt a2_x2 i0=$abc$109383$new_n62640_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99796
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28] i1=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62642_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[28] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62642_ q=$abc$109383$new_n62643_
+.subckt and2_x1 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62627_ q=$abc$109383$new_n62638_
+.subckt nexor2_x0 i0=$abc$109383$new_n62638_ i1=$abc$109383$new_n62637_ nq=$abc$109383$new_n62639_
+.subckt or21nand_x1 i0=$abc$109383$new_n62639_ i1=$abc$109383$new_n62636_ i2=$abc$109383$new_n62634_ nq=$abc$109383$new_n62640_
+.subckt and2_x1 i0=$abc$109383$new_n62640_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99796
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28] i1=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62642_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[28] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62642_ nq=$abc$109383$new_n62643_
 .subckt nor4_x0 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[28] nq=$abc$109383$new_n62644_
 .subckt nor2_x0 i0=$abc$109383$new_n62644_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62645_
-.subckt a3_x2 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62637_ i2=$abc$109383$new_n62627_ q=$abc$109383$new_n62646_
-.subckt nxr2_x1 i0=$abc$109383$new_n62646_ i1=$abc$109383$new_n62206_ nq=$abc$109383$new_n62647_
-.subckt oa22_x2 i0=$abc$109383$new_n62647_ i1=$abc$109383$new_n62645_ i2=$abc$109383$new_n62643_ q=$abc$109383$new_n62648_
-.subckt a2_x2 i0=$abc$109383$new_n62648_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99800
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29] i1=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62650_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[29] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62650_ q=$abc$109383$new_n62651_
+.subckt and3_x1 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62637_ i2=$abc$109383$new_n62627_ q=$abc$109383$new_n62646_
+.subckt nexor2_x0 i0=$abc$109383$new_n62646_ i1=$abc$109383$new_n62206_ nq=$abc$109383$new_n62647_
+.subckt or21nand_x1 i0=$abc$109383$new_n62647_ i1=$abc$109383$new_n62645_ i2=$abc$109383$new_n62643_ nq=$abc$109383$new_n62648_
+.subckt and2_x1 i0=$abc$109383$new_n62648_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99800
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29] i1=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62650_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[29] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62650_ nq=$abc$109383$new_n62651_
 .subckt nor4_x0 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[29] nq=$abc$109383$new_n62652_
 .subckt nor2_x0 i0=$abc$109383$new_n62652_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62653_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[29] nq=$abc$109383$new_n62654_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[28] i1=soc.timer.bridge_timer_ctr__r_data[27] nq=$abc$109383$new_n62655_
-.subckt a3_x2 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62655_ i2=$abc$109383$new_n62627_ q=$abc$109383$new_n62656_
-.subckt nxr2_x1 i0=$abc$109383$new_n62656_ i1=$abc$109383$new_n62654_ nq=$abc$109383$new_n62657_
-.subckt oa22_x2 i0=$abc$109383$new_n62657_ i1=$abc$109383$new_n62653_ i2=$abc$109383$new_n62651_ q=$abc$109383$new_n62658_
-.subckt a2_x2 i0=$abc$109383$new_n62658_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99804
-.subckt a2_x2 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30] i1=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62660_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[30] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62660_ q=$abc$109383$new_n62661_
+.subckt and3_x1 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62655_ i2=$abc$109383$new_n62627_ q=$abc$109383$new_n62656_
+.subckt nexor2_x0 i0=$abc$109383$new_n62656_ i1=$abc$109383$new_n62654_ nq=$abc$109383$new_n62657_
+.subckt or21nand_x1 i0=$abc$109383$new_n62657_ i1=$abc$109383$new_n62653_ i2=$abc$109383$new_n62651_ nq=$abc$109383$new_n62658_
+.subckt and2_x1 i0=$abc$109383$new_n62658_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99804
+.subckt and2_x1 i0=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30] i1=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb q=$abc$109383$new_n62660_
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[30] i1=$abc$109383$new_n62563_ i2=$abc$109383$new_n62660_ nq=$abc$109383$new_n62661_
 .subckt nor4_x0 i0=$abc$109383$new_n62482_ i1=$abc$109383$new_n62481_ i2=$abc$109383$new_n62389_ i3=soc.timer.bridge_timer_reload__r_data[30] nq=$abc$109383$new_n62662_
 .subckt nor2_x0 i0=$abc$109383$new_n62662_ i1=$abc$109383$new_n62388_ nq=$abc$109383$new_n62663_
 .subckt inv_x0 i=soc.timer.bridge_timer_ctr__r_data[30] nq=$abc$109383$new_n62664_
-.subckt a4_x2 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62655_ i2=$abc$109383$new_n62654_ i3=$abc$109383$new_n62627_ q=$abc$109383$new_n62665_
-.subckt nxr2_x1 i0=$abc$109383$new_n62665_ i1=$abc$109383$new_n62664_ nq=$abc$109383$new_n62666_
-.subckt oa22_x2 i0=$abc$109383$new_n62666_ i1=$abc$109383$new_n62663_ i2=$abc$109383$new_n62661_ q=$abc$109383$new_n62667_
-.subckt a2_x2 i0=$abc$109383$new_n62667_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99808
-.subckt a2_x2 i0=$abc$109383$new_n62448_ i1=soc.timer.bridge_timer_ctr__r_data[31] q=$abc$109383$new_n62669_
+.subckt and4_x1 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62655_ i2=$abc$109383$new_n62654_ i3=$abc$109383$new_n62627_ q=$abc$109383$new_n62665_
+.subckt nexor2_x0 i0=$abc$109383$new_n62665_ i1=$abc$109383$new_n62664_ nq=$abc$109383$new_n62666_
+.subckt or21nand_x1 i0=$abc$109383$new_n62666_ i1=$abc$109383$new_n62663_ i2=$abc$109383$new_n62661_ nq=$abc$109383$new_n62667_
+.subckt and2_x1 i0=$abc$109383$new_n62667_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99808
+.subckt and2_x1 i0=$abc$109383$new_n62448_ i1=soc.timer.bridge_timer_ctr__r_data[31] q=$abc$109383$new_n62669_
 .subckt inv_x0 i=soc.timer.bridge_timer_reload__r_data[31] nq=$abc$109383$new_n62670_
 .subckt nor4_x0 i0=$abc$109383$new_n27810_ i1=$abc$109383$new_n27799_ i2=$abc$109383$new_n27796_ i3=$abc$109383$new_n62670_ nq=$abc$109383$new_n62671_
-.subckt o2_x2 i0=$abc$109383$new_n62671_ i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62672_
+.subckt or2_x1 i0=$abc$109383$new_n62671_ i1=$abc$109383$new_n62445_ q=$abc$109383$new_n62672_
 .subckt nor2_x0 i0=soc.timer.bridge_timer_ctr__r_data[30] i1=soc.timer.bridge_timer_ctr__r_data[29] nq=$abc$109383$new_n62673_
 .subckt nand4_x0 i0=$abc$109383$new_n62629_ i1=$abc$109383$new_n62655_ i2=$abc$109383$new_n62673_ i3=$abc$109383$new_n62627_ nq=$abc$109383$new_n62674_
-.subckt oa22_x2 i0=soc.timer.bridge_timer_ctr__r_data[31] i1=$abc$109383$new_n62674_ i2=$abc$109383$new_n62672_ q=$abc$109383$new_n62675_
-.subckt mx2_x2 cmd=$abc$109383$new_n62445_ i0=$abc$109383$new_n27598_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31] q=$abc$109383$new_n62676_
-.subckt oa22_x2 i0=$abc$109383$new_n62676_ i1=$abc$109383$new_n62675_ i2=$abc$109383$new_n62669_ q=$abc$109383$new_n62677_
-.subckt a2_x2 i0=$abc$109383$new_n62677_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99812
+.subckt or21nand_x1 i0=soc.timer.bridge_timer_ctr__r_data[31] i1=$abc$109383$new_n62674_ i2=$abc$109383$new_n62672_ nq=$abc$109383$new_n62675_
+.subckt mux2_x1 cmd=$abc$109383$new_n62445_ i0=$abc$109383$new_n27598_ i1=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31] q=$abc$109383$new_n62676_
+.subckt or21nand_x1 i0=$abc$109383$new_n62676_ i1=$abc$109383$new_n62675_ i2=$abc$109383$new_n62669_ nq=$abc$109383$new_n62677_
+.subckt and2_x1 i0=$abc$109383$new_n62677_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99812
 .subckt buf_x4 i=soc.timer.bridge.csr_mux_0.timer_reload__w_stb q=$abc$109383$new_n62679_
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[0] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[0] q=$abc$109383$new_n62680_
-.subckt a2_x2 i0=$abc$109383$new_n62680_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99816
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[1] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[1] q=$abc$109383$new_n62682_
-.subckt a2_x2 i0=$abc$109383$new_n62682_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99820
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[2] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2] q=$abc$109383$new_n62684_
-.subckt a2_x2 i0=$abc$109383$new_n62684_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99824
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[3] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[3] q=$abc$109383$new_n62686_
-.subckt a2_x2 i0=$abc$109383$new_n62686_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99828
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[0] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[0] q=$abc$109383$new_n62680_
+.subckt and2_x1 i0=$abc$109383$new_n62680_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99816
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[1] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[1] q=$abc$109383$new_n62682_
+.subckt and2_x1 i0=$abc$109383$new_n62682_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99820
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[2] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2] q=$abc$109383$new_n62684_
+.subckt and2_x1 i0=$abc$109383$new_n62684_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99824
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[3] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[3] q=$abc$109383$new_n62686_
+.subckt and2_x1 i0=$abc$109383$new_n62686_ i1=$abc$109383$new_n62622_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99828
 .subckt buf_x4 i=$abc$109383$new_n61966_ q=$abc$109383$new_n62688_
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[4] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4] q=$abc$109383$new_n62689_
-.subckt a2_x2 i0=$abc$109383$new_n62689_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99832
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[5] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5] q=$abc$109383$new_n62691_
-.subckt a2_x2 i0=$abc$109383$new_n62691_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99836
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[6] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6] q=$abc$109383$new_n62693_
-.subckt a2_x2 i0=$abc$109383$new_n62693_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99840
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[7] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7] q=$abc$109383$new_n62695_
-.subckt a2_x2 i0=$abc$109383$new_n62695_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99844
-.subckt mx2_x2 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[8] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[8] q=$abc$109383$new_n62697_
-.subckt a2_x2 i0=$abc$109383$new_n62697_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99848
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[4] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4] q=$abc$109383$new_n62689_
+.subckt and2_x1 i0=$abc$109383$new_n62689_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99832
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[5] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5] q=$abc$109383$new_n62691_
+.subckt and2_x1 i0=$abc$109383$new_n62691_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99836
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[6] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6] q=$abc$109383$new_n62693_
+.subckt and2_x1 i0=$abc$109383$new_n62693_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99840
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[7] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7] q=$abc$109383$new_n62695_
+.subckt and2_x1 i0=$abc$109383$new_n62695_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99844
+.subckt mux2_x1 cmd=$abc$109383$new_n62679_ i0=soc.timer.bridge_timer_reload__r_data[8] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[8] q=$abc$109383$new_n62697_
+.subckt and2_x1 i0=$abc$109383$new_n62697_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99848
 .subckt buf_x4 i=soc.timer.bridge.csr_mux_0.timer_reload__w_stb q=$abc$109383$new_n62699_
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[9] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[9] q=$abc$109383$new_n62700_
-.subckt a2_x2 i0=$abc$109383$new_n62700_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99852
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[10] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[10] q=$abc$109383$new_n62702_
-.subckt a2_x2 i0=$abc$109383$new_n62702_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99856
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[11] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[11] q=$abc$109383$new_n62704_
-.subckt a2_x2 i0=$abc$109383$new_n62704_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99860
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[12] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[12] q=$abc$109383$new_n62706_
-.subckt a2_x2 i0=$abc$109383$new_n62706_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99864
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[13] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13] q=$abc$109383$new_n62708_
-.subckt a2_x2 i0=$abc$109383$new_n62708_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99868
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[9] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[9] q=$abc$109383$new_n62700_
+.subckt and2_x1 i0=$abc$109383$new_n62700_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99852
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[10] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[10] q=$abc$109383$new_n62702_
+.subckt and2_x1 i0=$abc$109383$new_n62702_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99856
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[11] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[11] q=$abc$109383$new_n62704_
+.subckt and2_x1 i0=$abc$109383$new_n62704_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99860
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[12] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[12] q=$abc$109383$new_n62706_
+.subckt and2_x1 i0=$abc$109383$new_n62706_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99864
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[13] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13] q=$abc$109383$new_n62708_
+.subckt and2_x1 i0=$abc$109383$new_n62708_ i1=$abc$109383$new_n62688_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99868
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n62710_
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[14] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[14] q=$abc$109383$new_n62711_
-.subckt a2_x2 i0=$abc$109383$new_n62711_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99872
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[15] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15] q=$abc$109383$new_n62713_
-.subckt a2_x2 i0=$abc$109383$new_n62713_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99876
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[16] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[16] q=$abc$109383$new_n62715_
-.subckt a2_x2 i0=$abc$109383$new_n62715_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99880
-.subckt mx2_x2 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[17] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[17] q=$abc$109383$new_n62717_
-.subckt a2_x2 i0=$abc$109383$new_n62717_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99884
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[14] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[14] q=$abc$109383$new_n62711_
+.subckt and2_x1 i0=$abc$109383$new_n62711_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99872
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[15] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15] q=$abc$109383$new_n62713_
+.subckt and2_x1 i0=$abc$109383$new_n62713_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99876
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[16] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[16] q=$abc$109383$new_n62715_
+.subckt and2_x1 i0=$abc$109383$new_n62715_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99880
+.subckt mux2_x1 cmd=$abc$109383$new_n62699_ i0=soc.timer.bridge_timer_reload__r_data[17] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[17] q=$abc$109383$new_n62717_
+.subckt and2_x1 i0=$abc$109383$new_n62717_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99884
 .subckt buf_x4 i=soc.timer.bridge.csr_mux_0.timer_reload__w_stb q=$abc$109383$new_n62719_
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[18] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[18] q=$abc$109383$new_n62720_
-.subckt a2_x2 i0=$abc$109383$new_n62720_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99888
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[19] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[19] q=$abc$109383$new_n62722_
-.subckt a2_x2 i0=$abc$109383$new_n62722_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99892
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[20] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[20] q=$abc$109383$new_n62724_
-.subckt a2_x2 i0=$abc$109383$new_n62724_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99896
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[21] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21] q=$abc$109383$new_n62726_
-.subckt a2_x2 i0=$abc$109383$new_n62726_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99900
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[22] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[22] q=$abc$109383$new_n62728_
-.subckt a2_x2 i0=$abc$109383$new_n62728_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99904
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[23] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23] q=$abc$109383$new_n62730_
-.subckt a2_x2 i0=$abc$109383$new_n62730_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99908
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[18] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[18] q=$abc$109383$new_n62720_
+.subckt and2_x1 i0=$abc$109383$new_n62720_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99888
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[19] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[19] q=$abc$109383$new_n62722_
+.subckt and2_x1 i0=$abc$109383$new_n62722_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99892
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[20] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[20] q=$abc$109383$new_n62724_
+.subckt and2_x1 i0=$abc$109383$new_n62724_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99896
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[21] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21] q=$abc$109383$new_n62726_
+.subckt and2_x1 i0=$abc$109383$new_n62726_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99900
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[22] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[22] q=$abc$109383$new_n62728_
+.subckt and2_x1 i0=$abc$109383$new_n62728_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99904
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[23] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23] q=$abc$109383$new_n62730_
+.subckt and2_x1 i0=$abc$109383$new_n62730_ i1=$abc$109383$new_n62710_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99908
 .subckt buf_x4 i=$abc$109383$new_n27431_ q=$abc$109383$new_n62732_
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[24] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[24] q=$abc$109383$new_n62733_
-.subckt a2_x2 i0=$abc$109383$new_n62733_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99912
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[25] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25] q=$abc$109383$new_n62735_
-.subckt a2_x2 i0=$abc$109383$new_n62735_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99916
-.subckt mx2_x2 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[26] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26] q=$abc$109383$new_n62737_
-.subckt a2_x2 i0=$abc$109383$new_n62737_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99920
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[27] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[27] q=$abc$109383$new_n62739_
-.subckt a2_x2 i0=$abc$109383$new_n62739_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99924
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[28] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28] q=$abc$109383$new_n62741_
-.subckt a2_x2 i0=$abc$109383$new_n62741_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99928
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[29] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29] q=$abc$109383$new_n62743_
-.subckt a2_x2 i0=$abc$109383$new_n62743_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99932
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[30] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30] q=$abc$109383$new_n62745_
-.subckt a2_x2 i0=$abc$109383$new_n62745_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99936
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[31] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31] q=$abc$109383$new_n62747_
-.subckt a2_x2 i0=$abc$109383$new_n62747_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99940
-.subckt mx2_x2 cmd=soc.timer.bridge.csr_mux_0.timer_en__w_stb i0=$abc$109383$new_n27598_ i1=soc.timer.bridge.csr_mux_0.timer_en__shadow q=$abc$109383$new_n62749_
-.subckt a2_x2 i0=$abc$109383$new_n62749_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99944
-.subckt a2_x2 i0=$abc$109383$new_n62348_ i1=$abc$109383$new_n27562_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99962
-.subckt mx2_x2 cmd=$abc$109383$new_n27582_ i0=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow i1=soc.timer.bridge._int_src.timer_ev_status__r_data q=$abc$109383$new_n62752_
-.subckt a2_x2 i0=$abc$109383$new_n62752_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99966
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[24] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[24] q=$abc$109383$new_n62733_
+.subckt and2_x1 i0=$abc$109383$new_n62733_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99912
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[25] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25] q=$abc$109383$new_n62735_
+.subckt and2_x1 i0=$abc$109383$new_n62735_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99916
+.subckt mux2_x1 cmd=$abc$109383$new_n62719_ i0=soc.timer.bridge_timer_reload__r_data[26] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26] q=$abc$109383$new_n62737_
+.subckt and2_x1 i0=$abc$109383$new_n62737_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99920
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[27] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[27] q=$abc$109383$new_n62739_
+.subckt and2_x1 i0=$abc$109383$new_n62739_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99924
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[28] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28] q=$abc$109383$new_n62741_
+.subckt and2_x1 i0=$abc$109383$new_n62741_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99928
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[29] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29] q=$abc$109383$new_n62743_
+.subckt and2_x1 i0=$abc$109383$new_n62743_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99932
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[30] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30] q=$abc$109383$new_n62745_
+.subckt and2_x1 i0=$abc$109383$new_n62745_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99936
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_0.timer_reload__w_stb i0=soc.timer.bridge_timer_reload__r_data[31] i1=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31] q=$abc$109383$new_n62747_
+.subckt and2_x1 i0=$abc$109383$new_n62747_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99940
+.subckt mux2_x1 cmd=soc.timer.bridge.csr_mux_0.timer_en__w_stb i0=$abc$109383$new_n27598_ i1=soc.timer.bridge.csr_mux_0.timer_en__shadow q=$abc$109383$new_n62749_
+.subckt and2_x1 i0=$abc$109383$new_n62749_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99944
+.subckt and2_x1 i0=$abc$109383$new_n62348_ i1=$abc$109383$new_n27562_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99962
+.subckt mux2_x1 cmd=$abc$109383$new_n27582_ i0=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow i1=soc.timer.bridge._int_src.timer_ev_status__r_data q=$abc$109383$new_n62752_
+.subckt and2_x1 i0=$abc$109383$new_n62752_ i1=$abc$109383$new_n62732_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99966
 .subckt nor2_x0 i0=soc.timer.bridge.csr_bridge_1.cycle[0] i1=soc.timer.bridge.csr_bridge_1.cycle[1] nq=$abc$109383$new_n62754_
-.subckt a3_x2 i0=$abc$109383$new_n62754_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19645_ q=$abc$109383$new_n62755_
-.subckt a4_x2 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n27427_ i2=$abc$109383$new_n19688_ i3=$abc$109383$new_n27603_ q=$abc$109383$new_n62756_
-.subckt a2_x2 i0=$abc$109383$new_n62756_ i1=$abc$109383$new_n62755_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99968
-.subckt a3_x2 i0=$abc$109383$new_n62754_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n29036_ q=$abc$109383$new_n62758_
-.subckt a2_x2 i0=$abc$109383$new_n62758_ i1=$abc$109383$new_n62756_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99970
+.subckt and3_x1 i0=$abc$109383$new_n62754_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19645_ q=$abc$109383$new_n62755_
+.subckt and4_x1 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n27427_ i2=$abc$109383$new_n19688_ i3=$abc$109383$new_n27603_ q=$abc$109383$new_n62756_
+.subckt and2_x1 i0=$abc$109383$new_n62756_ i1=$abc$109383$new_n62755_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99968
+.subckt and3_x1 i0=$abc$109383$new_n62754_ i1=$abc$109383$new_n19683_ i2=$abc$109383$new_n29036_ q=$abc$109383$new_n62758_
+.subckt and2_x1 i0=$abc$109383$new_n62758_ i1=$abc$109383$new_n62756_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99970
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow nq=$abc$109383$new_n62760_
 .subckt nand3_x0 i0=$abc$109383$new_n62754_ i1=$abc$109383$new_n27587_ i2=$abc$109383$new_n19645_ nq=$abc$109383$new_n62761_
 .subckt nand3_x0 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n19687_ nq=$abc$109383$new_n62762_
 .subckt nand3_x0 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n19687_ nq=$abc$109383$new_n62763_
-.subckt oa22_x2 i0=$abc$109383$new_n62763_ i1=$abc$109383$new_n62762_ i2=$abc$109383$new_n62761_ q=$abc$109383$new_n62764_
+.subckt or21nand_x1 i0=$abc$109383$new_n62763_ i1=$abc$109383$new_n62762_ i2=$abc$109383$new_n62761_ nq=$abc$109383$new_n62764_
 .subckt nand2_x0 i0=$abc$109383$new_n62764_ i1=$abc$109383$new_n62760_ nq=$abc$109383$new_n62765_
 .subckt inv_x0 i=soc.timer.bridge._int_src.timer_ev_pending__r_data nq=$abc$109383$new_n62766_
 .subckt nand2_x0 i0=$abc$109383$new_n27578_ i1=$abc$109383$new_n20254_ nq=$abc$109383$new_n62767_
 .subckt nand4_x0 i0=$abc$109383$new_n20541_ i1=$abc$109383$new_n27569_ i2=$abc$109383$new_n27567_ i3=soc.timer.bridge.csr_bridge_1.cycle[1] nq=$abc$109383$new_n62768_
 .subckt nand3_x0 i0=$abc$109383$new_n27575_ i1=$abc$109383$new_n19778_ i2=$abc$109383$new_n27569_ nq=$abc$109383$new_n62769_
 .subckt nand4_x0 i0=$abc$109383$new_n20349_ i1=$abc$109383$new_n27569_ i2=soc.timer.bridge.csr_bridge_1.cycle[0] i3=$abc$109383$new_n27572_ nq=$abc$109383$new_n62770_
-.subckt a4_x2 i0=$abc$109383$new_n62770_ i1=$abc$109383$new_n62769_ i2=$abc$109383$new_n62768_ i3=$abc$109383$new_n62767_ q=$abc$109383$new_n62771_
+.subckt and4_x1 i0=$abc$109383$new_n62770_ i1=$abc$109383$new_n62769_ i2=$abc$109383$new_n62768_ i3=$abc$109383$new_n62767_ q=$abc$109383$new_n62771_
 .subckt nand4_x0 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n44265_ i2=$abc$109383$new_n27639_ i3=$abc$109383$new_n19749_ nq=$abc$109383$new_n62772_
-.subckt mx2_x2 cmd=$abc$109383$new_n62772_ i0=$abc$109383$new_n62771_ i1=$abc$109383$new_n62766_ q=$abc$109383$new_n62773_
-.subckt a4_x2 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27640_ i2=$abc$109383$new_n27639_ i3=$abc$109383$new_n19749_ q=$abc$109383$new_n62774_
-.subckt a4_x2 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n44265_ i2=$abc$109383$new_n29107_ i3=$abc$109383$new_n19749_ q=$abc$109383$new_n62775_
-.subckt ao22_x2 i0=$abc$109383$new_n62775_ i1=$abc$109383$new_n62774_ i2=$abc$109383$new_n62755_ q=$abc$109383$new_n62776_
+.subckt mux2_x1 cmd=$abc$109383$new_n62772_ i0=$abc$109383$new_n62771_ i1=$abc$109383$new_n62766_ q=$abc$109383$new_n62773_
+.subckt and4_x1 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27640_ i2=$abc$109383$new_n27639_ i3=$abc$109383$new_n19749_ q=$abc$109383$new_n62774_
+.subckt and4_x1 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n44265_ i2=$abc$109383$new_n29107_ i3=$abc$109383$new_n19749_ q=$abc$109383$new_n62775_
+.subckt and21nor_x1 i0=$abc$109383$new_n62775_ i1=$abc$109383$new_n62774_ i2=$abc$109383$new_n62755_ nq=$abc$109383$new_n62776_
 .subckt nand2_x0 i0=$abc$109383$new_n62776_ i1=$abc$109383$new_n62773_ nq=$abc$109383$new_n62777_
-.subckt a3_x2 i0=$abc$109383$new_n62777_ i1=$abc$109383$new_n62765_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99974
-.subckt a2_x2 i0=$abc$109383$new_n62354_ i1=$abc$109383$new_n27604_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99976
+.subckt and3_x1 i0=$abc$109383$new_n62777_ i1=$abc$109383$new_n62765_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99974
+.subckt and2_x1 i0=$abc$109383$new_n62354_ i1=$abc$109383$new_n27604_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99976
 .subckt inv_x0 i=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow nq=$abc$109383$new_n62780_
 .subckt nand3_x0 i0=$abc$109383$new_n62754_ i1=$abc$109383$new_n19684_ i2=$abc$109383$new_n29036_ nq=$abc$109383$new_n62781_
-.subckt oa22_x2 i0=$abc$109383$new_n62763_ i1=$abc$109383$new_n62762_ i2=$abc$109383$new_n62781_ q=$abc$109383$new_n62782_
+.subckt or21nand_x1 i0=$abc$109383$new_n62763_ i1=$abc$109383$new_n62762_ i2=$abc$109383$new_n62781_ nq=$abc$109383$new_n62782_
 .subckt nand2_x0 i0=$abc$109383$new_n62782_ i1=$abc$109383$new_n62780_ nq=$abc$109383$new_n62783_
-.subckt a3_x2 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n19687_ q=$abc$109383$new_n62784_
-.subckt a3_x2 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n19687_ q=$abc$109383$new_n62785_
-.subckt ao22_x2 i0=$abc$109383$new_n62785_ i1=$abc$109383$new_n62784_ i2=$abc$109383$new_n62758_ q=$abc$109383$new_n62786_
+.subckt and3_x1 i0=$abc$109383$new_n62353_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n19687_ q=$abc$109383$new_n62784_
+.subckt and3_x1 i0=$abc$109383$new_n27580_ i1=$abc$109383$new_n27566_ i2=$abc$109383$new_n19687_ q=$abc$109383$new_n62785_
+.subckt and21nor_x1 i0=$abc$109383$new_n62785_ i1=$abc$109383$new_n62784_ i2=$abc$109383$new_n62758_ nq=$abc$109383$new_n62786_
 .subckt inv_x0 i=soc.timer.bridge._int_src.timer_ev_enable__r_data nq=$abc$109383$new_n62787_
-.subckt mx2_x2 cmd=$abc$109383$new_n62772_ i0=$abc$109383$new_n62771_ i1=$abc$109383$new_n62787_ q=$abc$109383$new_n62788_
+.subckt mux2_x1 cmd=$abc$109383$new_n62772_ i0=$abc$109383$new_n62771_ i1=$abc$109383$new_n62787_ q=$abc$109383$new_n62788_
 .subckt nand2_x0 i0=$abc$109383$new_n62788_ i1=$abc$109383$new_n62786_ nq=$abc$109383$new_n62789_
-.subckt a3_x2 i0=$abc$109383$new_n62789_ i1=$abc$109383$new_n62783_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99980
+.subckt and3_x1 i0=$abc$109383$new_n62789_ i1=$abc$109383$new_n62783_ i2=$abc$109383$new_n28044_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$99980
 .subckt buf_x4 i=$abc$109383$new_n15117_ q=$abc$109383$new_n62791_
 .subckt nand3_x0 i0=$abc$109383$new_n14976_ i1=soc.rom.spimemio.xfer.xfer_ddr i2=$abc$109383$new_n62791_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$100640
 .subckt inv_x0 i=soc.rom.spimemio.xfer.flash_csb nq=$abc$109383$new_n62793_
 .subckt nand2_x0 i0=$abc$109383$new_n62793_ i1=$abc$109383$new_n62791_ nq=$abc$109383$new_n62794_
-.subckt a2_x2 i0=$abc$109383$new_n62794_ i1=$abc$109383$new_n28459_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101022
+.subckt and2_x1 i0=$abc$109383$new_n62794_ i1=$abc$109383$new_n28459_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101022
 .subckt nand3_x0 i0=$abc$109383$new_n28459_ i1=$abc$109383$new_n15205_ i2=$abc$109383$new_n62791_ nq=$abc$109383$new_n62796_
 .subckt inv_x0 i=soc.rom.spimemio.din_qspi nq=$abc$109383$new_n62797_
-.subckt a2_x2 i0=soc.rom.spimemio.din_ddr i1=$abc$109383$new_n15117_ q=$abc$109383$new_n62798_
+.subckt and2_x1 i0=soc.rom.spimemio.din_ddr i1=$abc$109383$new_n15117_ q=$abc$109383$new_n62798_
 .subckt nand3_x0 i0=$abc$109383$new_n62798_ i1=$abc$109383$new_n15103_ i2=$abc$109383$new_n62797_ nq=$abc$109383$new_n62799_
 .subckt nand2_x0 i0=$abc$109383$new_n62799_ i1=$abc$109383$new_n62796_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101026
 .subckt nand3_x0 i0=$abc$109383$new_n28459_ i1=soc.rom.spimemio.xfer.xfer_ddr i2=$abc$109383$new_n62791_ nq=$abc$109383$new_n62801_
 .subckt nand3_x0 i0=$abc$109383$new_n62798_ i1=$abc$109383$new_n15103_ i2=soc.rom.spimemio.din_qspi nq=$abc$109383$new_n62802_
 .subckt nand2_x0 i0=$abc$109383$new_n62802_ i1=$abc$109383$new_n62801_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101030
 .subckt inv_x0 i=$abc$109383$new_n15117_ nq=$abc$109383$new_n62804_
-.subckt oa22_x2 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=$abc$109383$new_n62804_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101032
-.subckt a2_x2 i0=$abc$109383$new_n15217_ i1=soc.rom.spimemio.xfer.xfer_ddr q=$abc$109383$new_n62806_
-.subckt ao22_x2 i0=$abc$109383$new_n62806_ i1=$abc$109383$new_n20396_ i2=soc.rom.spimemio.xfer.count[3] q=$abc$109383$new_n62807_
-.subckt a2_x2 i0=$abc$109383$new_n15019_ i1=$abc$109383$new_n15018_ q=$abc$109383$new_n62808_
-.subckt mx2_x2 cmd=$abc$109383$new_n14993_ i0=$abc$109383$new_n62808_ i1=soc.rom.spimemio.xfer.count[3] q=$abc$109383$new_n62809_
+.subckt or21nand_x1 i0=$abc$109383$new_n15030_ i1=$abc$109383$new_n15001_ i2=$abc$109383$new_n62804_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101032
+.subckt and2_x1 i0=$abc$109383$new_n15217_ i1=soc.rom.spimemio.xfer.xfer_ddr q=$abc$109383$new_n62806_
+.subckt and21nor_x1 i0=$abc$109383$new_n62806_ i1=$abc$109383$new_n20396_ i2=soc.rom.spimemio.xfer.count[3] nq=$abc$109383$new_n62807_
+.subckt and2_x1 i0=$abc$109383$new_n15019_ i1=$abc$109383$new_n15018_ q=$abc$109383$new_n62808_
+.subckt mux2_x1 cmd=$abc$109383$new_n14993_ i0=$abc$109383$new_n62808_ i1=soc.rom.spimemio.xfer.count[3] q=$abc$109383$new_n62809_
 .subckt nand2_x0 i0=$abc$109383$new_n15023_ i1=$abc$109383$new_n62809_ nq=$abc$109383$new_n62810_
-.subckt o2_x2 i0=$abc$109383$new_n14989_ i1=$abc$109383$new_n14980_ q=$abc$109383$new_n62811_
+.subckt or2_x1 i0=$abc$109383$new_n14989_ i1=$abc$109383$new_n14980_ q=$abc$109383$new_n62811_
 .subckt nand2_x0 i0=$abc$109383$new_n15010_ i1=soc.rom.spimemio.xfer.count[3] nq=$abc$109383$new_n62812_
-.subckt oa22_x2 i0=$abc$109383$new_n14983_ i1=$abc$109383$new_n62002_ i2=$abc$109383$new_n62812_ q=$abc$109383$new_n62813_
+.subckt or21nand_x1 i0=$abc$109383$new_n14983_ i1=$abc$109383$new_n62002_ i2=$abc$109383$new_n62812_ nq=$abc$109383$new_n62813_
 .subckt nand3_x0 i0=$abc$109383$new_n15019_ i1=$abc$109383$new_n15016_ i2=$abc$109383$new_n15018_ nq=$abc$109383$new_n62814_
-.subckt a2_x2 i0=$abc$109383$new_n62814_ i1=$abc$109383$new_n62813_ q=$abc$109383$new_n62815_
+.subckt and2_x1 i0=$abc$109383$new_n62814_ i1=$abc$109383$new_n62813_ q=$abc$109383$new_n62815_
 .subckt nand3_x0 i0=$abc$109383$new_n62815_ i1=$abc$109383$new_n62811_ i2=$abc$109383$new_n62810_ nq=$abc$109383$new_n62816_
-.subckt oa22_x2 i0=$abc$109383$new_n20638_ i1=$abc$109383$new_n62816_ i2=$abc$109383$new_n62807_ q=$abc$109383$new_n62817_
-.subckt ao22_x2 i0=$abc$109383$new_n62817_ i1=$abc$109383$new_n15102_ i2=$abc$109383$new_n62791_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101036
-.subckt ao22_x2 i0=$abc$109383$new_n15101_ i1=$abc$109383$new_n20396_ i2=$abc$109383$new_n15117_ q=$abc$109383$new_n62819_
-.subckt a4_x2 i0=$abc$109383$new_n22732_ i1=$abc$109383$new_n15030_ i2=$abc$109383$new_n15001_ i3=soc.rom.spimemio.din_rd q=$abc$109383$new_n62820_
-.subckt a2_x2 i0=$abc$109383$new_n62820_ i1=soc.rom.spimemio.din_data[0] q=$abc$109383$new_n62821_
-.subckt xr2_x1 i0=$abc$109383$new_n15230_ i1=soc.rom.spimemio.xfer.dummy_count[0] q=$abc$109383$new_n62822_
-.subckt a2_x2 i0=$abc$109383$new_n62822_ i1=$abc$109383$new_n15036_ q=$abc$109383$new_n62823_
-.subckt ao22_x2 i0=$abc$109383$new_n62823_ i1=$abc$109383$new_n62821_ i2=$abc$109383$new_n62819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101040
+.subckt or21nand_x1 i0=$abc$109383$new_n20638_ i1=$abc$109383$new_n62816_ i2=$abc$109383$new_n62807_ nq=$abc$109383$new_n62817_
+.subckt and21nor_x1 i0=$abc$109383$new_n62817_ i1=$abc$109383$new_n15102_ i2=$abc$109383$new_n62791_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101036
+.subckt and21nor_x1 i0=$abc$109383$new_n15101_ i1=$abc$109383$new_n20396_ i2=$abc$109383$new_n15117_ nq=$abc$109383$new_n62819_
+.subckt and4_x1 i0=$abc$109383$new_n22732_ i1=$abc$109383$new_n15030_ i2=$abc$109383$new_n15001_ i3=soc.rom.spimemio.din_rd q=$abc$109383$new_n62820_
+.subckt and2_x1 i0=$abc$109383$new_n62820_ i1=soc.rom.spimemio.din_data[0] q=$abc$109383$new_n62821_
+.subckt xor2_x0 i0=$abc$109383$new_n15230_ i1=soc.rom.spimemio.xfer.dummy_count[0] q=$abc$109383$new_n62822_
+.subckt and2_x1 i0=$abc$109383$new_n62822_ i1=$abc$109383$new_n15036_ q=$abc$109383$new_n62823_
+.subckt and21nor_x1 i0=$abc$109383$new_n62823_ i1=$abc$109383$new_n62821_ i2=$abc$109383$new_n62819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101040
 .subckt inv_x0 i=soc.rom.spimemio.xfer.dummy_count[1] nq=$abc$109383$new_n62825_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.dummy_count[0] nq=$abc$109383$new_n62826_
-.subckt a2_x2 i0=$abc$109383$new_n15230_ i1=$abc$109383$new_n62826_ q=$abc$109383$new_n62827_
-.subckt nxr2_x1 i0=$abc$109383$new_n62827_ i1=$abc$109383$new_n62825_ nq=$abc$109383$new_n62828_
-.subckt a2_x2 i0=$abc$109383$new_n62828_ i1=$abc$109383$new_n22660_ q=$abc$109383$new_n62829_
-.subckt a2_x2 i0=$abc$109383$new_n62820_ i1=soc.rom.spimemio.din_data[1] q=$abc$109383$new_n62830_
-.subckt ao22_x2 i0=$abc$109383$new_n62830_ i1=$abc$109383$new_n62829_ i2=$abc$109383$new_n62819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101044
+.subckt and2_x1 i0=$abc$109383$new_n15230_ i1=$abc$109383$new_n62826_ q=$abc$109383$new_n62827_
+.subckt nexor2_x0 i0=$abc$109383$new_n62827_ i1=$abc$109383$new_n62825_ nq=$abc$109383$new_n62828_
+.subckt and2_x1 i0=$abc$109383$new_n62828_ i1=$abc$109383$new_n22660_ q=$abc$109383$new_n62829_
+.subckt and2_x1 i0=$abc$109383$new_n62820_ i1=soc.rom.spimemio.din_data[1] q=$abc$109383$new_n62830_
+.subckt and21nor_x1 i0=$abc$109383$new_n62830_ i1=$abc$109383$new_n62829_ i2=$abc$109383$new_n62819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101044
 .subckt inv_x0 i=soc.rom.spimemio.xfer.dummy_count[2] nq=$abc$109383$new_n62832_
-.subckt a3_x2 i0=$abc$109383$new_n15230_ i1=$abc$109383$new_n62825_ i2=$abc$109383$new_n62826_ q=$abc$109383$new_n62833_
-.subckt nxr2_x1 i0=$abc$109383$new_n62833_ i1=$abc$109383$new_n62832_ nq=$abc$109383$new_n62834_
-.subckt a2_x2 i0=$abc$109383$new_n62834_ i1=$abc$109383$new_n22660_ q=$abc$109383$new_n62835_
-.subckt a2_x2 i0=$abc$109383$new_n62820_ i1=soc.rom.spimemio.din_data[2] q=$abc$109383$new_n62836_
-.subckt ao22_x2 i0=$abc$109383$new_n62836_ i1=$abc$109383$new_n62835_ i2=$abc$109383$new_n62819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101048
+.subckt and3_x1 i0=$abc$109383$new_n15230_ i1=$abc$109383$new_n62825_ i2=$abc$109383$new_n62826_ q=$abc$109383$new_n62833_
+.subckt nexor2_x0 i0=$abc$109383$new_n62833_ i1=$abc$109383$new_n62832_ nq=$abc$109383$new_n62834_
+.subckt and2_x1 i0=$abc$109383$new_n62834_ i1=$abc$109383$new_n22660_ q=$abc$109383$new_n62835_
+.subckt and2_x1 i0=$abc$109383$new_n62820_ i1=soc.rom.spimemio.din_data[2] q=$abc$109383$new_n62836_
+.subckt and21nor_x1 i0=$abc$109383$new_n62836_ i1=$abc$109383$new_n62835_ i2=$abc$109383$new_n62819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101048
 .subckt nand3_x0 i0=$abc$109383$new_n22732_ i1=$abc$109383$new_n15030_ i2=$abc$109383$new_n15001_ nq=$abc$109383$new_n62838_
 .subckt inv_x0 i=soc.rom.spimemio.xfer.dummy_count[3] nq=$abc$109383$new_n62839_
 .subckt nor2_x0 i0=soc.rom.spimemio.xfer.dummy_count[2] i1=soc.rom.spimemio.xfer.dummy_count[1] nq=$abc$109383$new_n62840_
-.subckt a3_x2 i0=$abc$109383$new_n62840_ i1=$abc$109383$new_n15230_ i2=$abc$109383$new_n62826_ q=$abc$109383$new_n62841_
-.subckt nxr2_x1 i0=$abc$109383$new_n62841_ i1=$abc$109383$new_n62839_ nq=$abc$109383$new_n62842_
-.subckt a2_x2 i0=$abc$109383$new_n62842_ i1=$abc$109383$new_n62838_ q=$abc$109383$new_n62843_
-.subckt a3_x2 i0=$abc$109383$new_n15102_ i1=soc.rom.spimemio.din_data[3] i2=soc.rom.spimemio.din_rd q=$abc$109383$new_n62844_
-.subckt ao22_x2 i0=$abc$109383$new_n62844_ i1=$abc$109383$new_n62843_ i2=$abc$109383$new_n62819_ q=$abc$109383$auto$rtlil.cc:2515:MuxGate$101052
+.subckt and3_x1 i0=$abc$109383$new_n62840_ i1=$abc$109383$new_n15230_ i2=$abc$109383$new_n62826_ q=$abc$109383$new_n62841_
+.subckt nexor2_x0 i0=$abc$109383$new_n62841_ i1=$abc$109383$new_n62839_ nq=$abc$109383$new_n62842_
+.subckt and2_x1 i0=$abc$109383$new_n62842_ i1=$abc$109383$new_n62838_ q=$abc$109383$new_n62843_
+.subckt and3_x1 i0=$abc$109383$new_n15102_ i1=soc.rom.spimemio.din_data[3] i2=soc.rom.spimemio.din_rd q=$abc$109383$new_n62844_
+.subckt and21nor_x1 i0=$abc$109383$new_n62844_ i1=$abc$109383$new_n62843_ i2=$abc$109383$new_n62819_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101052
 .subckt nand2_x0 i0=$abc$109383$new_n15103_ i1=soc.rom.spimemio.din_qspi nq=$abc$109383$new_n62846_
 .subckt nand3_x0 i0=$abc$109383$new_n28459_ i1=$abc$109383$new_n15190_ i2=$abc$109383$new_n62791_ nq=$abc$109383$new_n62847_
 .subckt nand2_x0 i0=$abc$109383$new_n62847_ i1=$abc$109383$new_n62846_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$101056
@@ -48132,7356 +48132,7356 @@
 .subckt nand3_x0 i0=$abc$109383$new_n28459_ i1=soc.rom.spimemio.xfer.xfer_tag[2] i2=$abc$109383$new_n62791_ nq=$abc$109383$new_n62858_
 .subckt nand2_x0 i0=$abc$109383$new_n15103_ i1=soc.rom.spimemio.din_tag[2] nq=$abc$109383$new_n62859_
 .subckt nand2_x0 i0=$abc$109383$new_n62859_ i1=$abc$109383$new_n62858_ nq=$abc$109383$auto$rtlil.cc:2515:MuxGate$105874
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91400 q=soc.ram.ram[9][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91402 q=soc.ram.ram[9][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91404 q=soc.ram.ram[9][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91406 q=soc.ram.ram[9][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91408 q=soc.ram.ram[9][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91410 q=soc.ram.ram[9][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91412 q=soc.ram.ram[9][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91414 q=soc.ram.ram[9][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91416 q=soc.cpu.minerva.exception.irq_pending__r__value[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91418 q=soc.cpu.minerva.exception.irq_pending__r__value[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91420 q=soc.cpu.minerva.gprf.mem._mem[17][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91422 q=soc.cpu.minerva.gprf.mem._mem[17][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91424 q=soc.cpu.minerva.gprf.mem._mem[17][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91426 q=soc.cpu.minerva.gprf.mem._mem[17][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91428 q=soc.cpu.minerva.gprf.mem._mem[17][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91430 q=soc.cpu.minerva.gprf.mem._mem[17][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91432 q=soc.cpu.minerva.gprf.mem._mem[17][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91434 q=soc.cpu.minerva.gprf.mem._mem[17][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91436 q=soc.cpu.minerva.gprf.mem._mem[17][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91438 q=soc.cpu.minerva.gprf.mem._mem[17][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91440 q=soc.cpu.minerva.gprf.mem._mem[17][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91442 q=soc.cpu.minerva.gprf.mem._mem[17][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91444 q=soc.cpu.minerva.gprf.mem._mem[17][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91446 q=soc.cpu.minerva.gprf.mem._mem[17][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91448 q=soc.cpu.minerva.gprf.mem._mem[17][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91450 q=soc.cpu.minerva.gprf.mem._mem[17][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91452 q=soc.cpu.minerva.gprf.mem._mem[17][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91454 q=soc.cpu.minerva.gprf.mem._mem[17][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91456 q=soc.cpu.minerva.gprf.mem._mem[17][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91458 q=soc.cpu.minerva.gprf.mem._mem[17][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91460 q=soc.cpu.minerva.gprf.mem._mem[17][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91462 q=soc.cpu.minerva.gprf.mem._mem[17][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91464 q=soc.cpu.minerva.gprf.mem._mem[17][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91466 q=soc.cpu.minerva.gprf.mem._mem[17][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91468 q=soc.cpu.minerva.gprf.mem._mem[17][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91470 q=soc.cpu.minerva.gprf.mem._mem[17][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91472 q=soc.cpu.minerva.gprf.mem._mem[17][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91474 q=soc.cpu.minerva.gprf.mem._mem[17][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91476 q=soc.cpu.minerva.gprf.mem._mem[17][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91478 q=soc.cpu.minerva.gprf.mem._mem[17][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91480 q=soc.cpu.minerva.gprf.mem._mem[17][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91482 q=soc.cpu.minerva.gprf.mem._mem[17][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91484 q=soc.ram.ram[76][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91486 q=soc.ram.ram[76][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91488 q=soc.ram.ram[76][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91490 q=soc.ram.ram[76][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91492 q=soc.ram.ram[76][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91494 q=soc.ram.ram[76][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91496 q=soc.ram.ram[76][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91498 q=soc.ram.ram[76][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91500 q=soc.ram.ram[75][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91502 q=soc.ram.ram[75][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91504 q=soc.ram.ram[75][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91506 q=soc.ram.ram[75][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91508 q=soc.ram.ram[75][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91510 q=soc.ram.ram[75][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91512 q=soc.ram.ram[75][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91514 q=soc.ram.ram[75][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91516 q=soc.ram.ram[104][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91518 q=soc.ram.ram[104][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91520 q=soc.ram.ram[104][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91522 q=soc.ram.ram[104][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91524 q=soc.ram.ram[104][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91526 q=soc.ram.ram[104][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91528 q=soc.ram.ram[104][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91530 q=soc.ram.ram[104][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91532 q=soc.ram.ram[70][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91534 q=soc.ram.ram[70][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91536 q=soc.ram.ram[70][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91538 q=soc.ram.ram[70][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91540 q=soc.ram.ram[70][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91542 q=soc.ram.ram[70][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91544 q=soc.ram.ram[70][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91546 q=soc.ram.ram[70][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91548 q=soc.ram.ram[33][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91550 q=soc.ram.ram[33][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91552 q=soc.ram.ram[33][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91554 q=soc.ram.ram[33][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91556 q=soc.ram.ram[33][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91558 q=soc.ram.ram[33][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91560 q=soc.ram.ram[33][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91562 q=soc.ram.ram[33][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91564 q=soc.ram.ram[74][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91566 q=soc.ram.ram[74][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91568 q=soc.ram.ram[74][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91570 q=soc.ram.ram[74][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91572 q=soc.ram.ram[74][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91574 q=soc.ram.ram[74][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91576 q=soc.ram.ram[74][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91578 q=soc.ram.ram[74][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91580 q=soc.ram.ram[74][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91582 q=soc.ram.ram[74][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91584 q=soc.ram.ram[74][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91586 q=soc.ram.ram[74][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91588 q=soc.ram.ram[74][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91590 q=soc.ram.ram[74][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91592 q=soc.ram.ram[74][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91594 q=soc.ram.ram[74][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91596 q=soc.ram.ram[75][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91598 q=soc.ram.ram[75][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91600 q=soc.ram.ram[75][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91602 q=soc.ram.ram[75][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91604 q=soc.ram.ram[75][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91606 q=soc.ram.ram[75][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91608 q=soc.ram.ram[75][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91610 q=soc.ram.ram[75][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91612 q=soc.ram.ram[75][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91614 q=soc.ram.ram[75][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91616 q=soc.ram.ram[75][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91618 q=soc.ram.ram[75][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91620 q=soc.ram.ram[75][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91622 q=soc.ram.ram[75][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91624 q=soc.ram.ram[75][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91626 q=soc.ram.ram[75][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91628 q=soc.ram.ram[127][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91630 q=soc.ram.ram[127][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91632 q=soc.ram.ram[127][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91634 q=soc.ram.ram[127][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91636 q=soc.ram.ram[127][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91638 q=soc.ram.ram[127][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91640 q=soc.ram.ram[127][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91642 q=soc.ram.ram[127][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91644 q=soc.ram.ram[93][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91646 q=soc.ram.ram[93][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91648 q=soc.ram.ram[93][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91650 q=soc.ram.ram[93][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91652 q=soc.ram.ram[93][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91654 q=soc.ram.ram[93][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91656 q=soc.ram.ram[93][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91658 q=soc.ram.ram[93][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91660 q=soc.ram.ram[126][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91662 q=soc.ram.ram[126][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91664 q=soc.ram.ram[126][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91666 q=soc.ram.ram[126][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91668 q=soc.ram.ram[126][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91670 q=soc.ram.ram[126][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91672 q=soc.ram.ram[126][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91674 q=soc.ram.ram[126][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91676 q=soc.ram.ram[126][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91678 q=soc.ram.ram[126][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91680 q=soc.ram.ram[126][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91682 q=soc.ram.ram[126][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91684 q=soc.ram.ram[126][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91686 q=soc.ram.ram[126][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91688 q=soc.ram.ram[126][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91690 q=soc.ram.ram[126][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91692 q=soc.ram.ram[126][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91694 q=soc.ram.ram[126][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91696 q=soc.ram.ram[126][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91698 q=soc.ram.ram[126][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91700 q=soc.ram.ram[126][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91702 q=soc.ram.ram[126][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91704 q=soc.ram.ram[126][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91706 q=soc.ram.ram[126][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91708 q=soc.ram.ram[18][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91710 q=soc.ram.ram[18][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91712 q=soc.ram.ram[18][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91714 q=soc.ram.ram[18][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91716 q=soc.ram.ram[18][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91718 q=soc.ram.ram[18][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91720 q=soc.ram.ram[18][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91722 q=soc.ram.ram[18][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91724 q=soc.ram.ram[18][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91726 q=soc.ram.ram[18][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91728 q=soc.ram.ram[18][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91730 q=soc.ram.ram[18][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91732 q=soc.ram.ram[18][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91734 q=soc.ram.ram[18][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91736 q=soc.ram.ram[18][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91738 q=soc.ram.ram[18][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91740 q=soc.ram.ram[12][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91742 q=soc.ram.ram[12][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91744 q=soc.ram.ram[12][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91746 q=soc.ram.ram[12][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91748 q=soc.ram.ram[12][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91750 q=soc.ram.ram[12][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91752 q=soc.ram.ram[12][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91754 q=soc.ram.ram[12][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91756 q=soc.ram.ram[74][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91758 q=soc.ram.ram[74][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91760 q=soc.ram.ram[74][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91762 q=soc.ram.ram[74][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91764 q=soc.ram.ram[74][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91766 q=soc.ram.ram[74][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91768 q=soc.ram.ram[74][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91770 q=soc.ram.ram[74][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91772 q=soc.ram.ram[73][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91774 q=soc.ram.ram[73][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91776 q=soc.ram.ram[73][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91778 q=soc.ram.ram[73][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91780 q=soc.ram.ram[73][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91782 q=soc.ram.ram[73][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91784 q=soc.ram.ram[73][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91786 q=soc.ram.ram[73][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91788 q=soc.ram.ram[127][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91790 q=soc.ram.ram[127][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91792 q=soc.ram.ram[127][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91794 q=soc.ram.ram[127][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91796 q=soc.ram.ram[127][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91798 q=soc.ram.ram[127][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91800 q=soc.ram.ram[127][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91802 q=soc.ram.ram[127][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91804 q=soc.ram.ram[127][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91806 q=soc.ram.ram[127][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91808 q=soc.ram.ram[127][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91810 q=soc.ram.ram[127][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91812 q=soc.ram.ram[127][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91814 q=soc.ram.ram[127][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91816 q=soc.ram.ram[127][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91818 q=soc.ram.ram[127][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91820 q=soc.ram.ram[73][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91822 q=soc.ram.ram[73][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91824 q=soc.ram.ram[73][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91826 q=soc.ram.ram[73][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91828 q=soc.ram.ram[73][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91830 q=soc.ram.ram[73][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91832 q=soc.ram.ram[73][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91834 q=soc.ram.ram[73][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91836 q=soc.ram.ram[72][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91838 q=soc.ram.ram[72][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91840 q=soc.ram.ram[72][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91842 q=soc.ram.ram[72][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91844 q=soc.ram.ram[72][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91846 q=soc.ram.ram[72][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91848 q=soc.ram.ram[72][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91850 q=soc.ram.ram[72][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91852 q=soc.ram.ram[72][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91854 q=soc.ram.ram[72][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91856 q=soc.ram.ram[72][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91858 q=soc.ram.ram[72][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91860 q=soc.ram.ram[72][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91862 q=soc.ram.ram[72][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91864 q=soc.ram.ram[72][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91866 q=soc.ram.ram[72][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91868 q=soc.ram.ram[104][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91870 q=soc.ram.ram[104][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91872 q=soc.ram.ram[104][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91874 q=soc.ram.ram[104][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91876 q=soc.ram.ram[104][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91878 q=soc.ram.ram[104][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91880 q=soc.ram.ram[104][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91882 q=soc.ram.ram[104][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91884 q=soc.ram.ram[73][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91886 q=soc.ram.ram[73][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91888 q=soc.ram.ram[73][18]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92152 q=soc.cpu.minerva.gprf.mem._mem[15][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92154 q=soc.cpu.minerva.gprf.mem._mem[15][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92156 q=soc.cpu.minerva.gprf.mem._mem[15][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92158 q=soc.cpu.minerva.gprf.mem._mem[15][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92160 q=soc.cpu.minerva.gprf.mem._mem[15][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92162 q=soc.cpu.minerva.gprf.mem._mem[15][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92164 q=soc.cpu.minerva.gprf.mem._mem[15][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92166 q=soc.cpu.minerva.gprf.mem._mem[15][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92168 q=soc.cpu.minerva.gprf.mem._mem[15][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92170 q=soc.cpu.minerva.gprf.mem._mem[15][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92172 q=soc.ram.ram[70][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92174 q=soc.ram.ram[70][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92176 q=soc.ram.ram[70][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92178 q=soc.ram.ram[70][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92180 q=soc.ram.ram[70][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92182 q=soc.ram.ram[70][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92184 q=soc.ram.ram[70][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92186 q=soc.ram.ram[70][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92188 q=soc.ram.ram[6][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92190 q=soc.ram.ram[6][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92192 q=soc.ram.ram[6][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92194 q=soc.ram.ram[6][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92196 q=soc.ram.ram[6][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92198 q=soc.ram.ram[6][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92200 q=soc.ram.ram[6][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92202 q=soc.ram.ram[6][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92204 q=soc.ram.ram[104][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92206 q=soc.ram.ram[104][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92208 q=soc.ram.ram[104][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92210 q=soc.ram.ram[104][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92212 q=soc.ram.ram[104][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92214 q=soc.ram.ram[104][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92216 q=soc.ram.ram[104][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92218 q=soc.ram.ram[104][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92220 q=soc.ram.ram[68][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92222 q=soc.ram.ram[68][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92224 q=soc.ram.ram[68][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92226 q=soc.ram.ram[68][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92228 q=soc.ram.ram[68][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92230 q=soc.ram.ram[68][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92232 q=soc.ram.ram[68][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92234 q=soc.ram.ram[68][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92236 q=soc.ram.ram[68][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92238 q=soc.ram.ram[68][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92240 q=soc.ram.ram[68][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92242 q=soc.ram.ram[68][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92244 q=soc.ram.ram[68][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92246 q=soc.ram.ram[68][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92248 q=soc.ram.ram[68][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92250 q=soc.ram.ram[68][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92252 q=soc.ram.ram[69][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92254 q=soc.ram.ram[69][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92256 q=soc.ram.ram[69][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92258 q=soc.ram.ram[69][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92260 q=soc.ram.ram[69][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92262 q=soc.ram.ram[69][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92264 q=soc.ram.ram[69][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92266 q=soc.ram.ram[69][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92268 q=soc.ram.ram[6][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92270 q=soc.ram.ram[6][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92272 q=soc.ram.ram[6][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92274 q=soc.ram.ram[6][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92276 q=soc.ram.ram[6][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92278 q=soc.ram.ram[6][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92280 q=soc.ram.ram[6][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92282 q=soc.ram.ram[6][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92284 q=soc.ram.ram[6][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92286 q=soc.ram.ram[6][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92288 q=soc.ram.ram[6][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92290 q=soc.ram.ram[6][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92292 q=soc.ram.ram[6][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92294 q=soc.ram.ram[6][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92296 q=soc.ram.ram[6][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92298 q=soc.ram.ram[6][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92300 q=soc.ram.ram[67][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92302 q=soc.ram.ram[67][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92304 q=soc.ram.ram[67][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92306 q=soc.ram.ram[67][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92308 q=soc.ram.ram[67][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92310 q=soc.ram.ram[67][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92312 q=soc.ram.ram[67][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92314 q=soc.ram.ram[67][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92316 q=soc.ram.ram[67][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92318 q=soc.ram.ram[67][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92320 q=soc.ram.ram[67][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92322 q=soc.ram.ram[67][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92324 q=soc.ram.ram[67][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92326 q=soc.ram.ram[67][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92328 q=soc.ram.ram[67][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92330 q=soc.ram.ram[67][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92332 q=soc.ram.ram[69][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92334 q=soc.ram.ram[69][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92336 q=soc.ram.ram[69][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92338 q=soc.ram.ram[69][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92340 q=soc.ram.ram[69][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92342 q=soc.ram.ram[69][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92344 q=soc.ram.ram[69][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92346 q=soc.ram.ram[69][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92348 q=soc.ram.ram[68][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92350 q=soc.ram.ram[68][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92352 q=soc.ram.ram[68][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92354 q=soc.ram.ram[68][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92356 q=soc.ram.ram[68][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92358 q=soc.ram.ram[68][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92360 q=soc.ram.ram[68][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92362 q=soc.ram.ram[68][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92364 q=soc.ram.ram[69][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92366 q=soc.ram.ram[69][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92368 q=soc.ram.ram[69][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92370 q=soc.ram.ram[69][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92372 q=soc.ram.ram[69][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92374 q=soc.ram.ram[69][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92376 q=soc.ram.ram[69][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92378 q=soc.ram.ram[69][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92382 q=soc.bridge.csr_bridge_0.wb__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92386 q=soc.bridge.csr_bridge_0.wb__dat_r[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92390 q=soc.bridge.csr_bridge_0.wb__dat_r[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92394 q=soc.bridge.csr_bridge_0.wb__dat_r[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92398 q=soc.bridge.csr_bridge_0.wb__dat_r[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92402 q=soc.bridge.csr_bridge_0.wb__dat_r[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92406 q=soc.bridge.csr_bridge_0.wb__dat_r[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92410 q=soc.bridge.csr_bridge_0.wb__dat_r[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92414 q=soc.bridge._int_src.uart_ev_pending__r_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92416 q=soc.ram.ram[25][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92418 q=soc.ram.ram[25][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92420 q=soc.ram.ram[25][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92422 q=soc.ram.ram[25][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92424 q=soc.ram.ram[25][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92426 q=soc.ram.ram[25][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92428 q=soc.ram.ram[25][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92430 q=soc.ram.ram[25][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92432 q=soc.ram.ram[34][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92434 q=soc.ram.ram[34][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92436 q=soc.ram.ram[34][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92438 q=soc.ram.ram[34][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92440 q=soc.ram.ram[34][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92442 q=soc.ram.ram[34][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92444 q=soc.ram.ram[34][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92446 q=soc.ram.ram[34][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92448 q=soc.ram.ram[24][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92450 q=soc.ram.ram[24][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92452 q=soc.ram.ram[24][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92454 q=soc.ram.ram[24][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92456 q=soc.ram.ram[24][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92458 q=soc.ram.ram[24][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92460 q=soc.ram.ram[24][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92462 q=soc.ram.ram[24][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92464 q=soc.ram.ram[24][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92466 q=soc.ram.ram[24][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92468 q=soc.ram.ram[24][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92470 q=soc.ram.ram[24][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92472 q=soc.ram.ram[24][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92474 q=soc.ram.ram[24][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92476 q=soc.ram.ram[24][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92478 q=soc.ram.ram[24][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92480 q=soc.cpu.minerva.gprf.mem._mem[14][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92482 q=soc.cpu.minerva.gprf.mem._mem[14][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92484 q=soc.cpu.minerva.gprf.mem._mem[14][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92486 q=soc.cpu.minerva.gprf.mem._mem[14][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92488 q=soc.cpu.minerva.gprf.mem._mem[14][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92490 q=soc.cpu.minerva.gprf.mem._mem[14][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92492 q=soc.cpu.minerva.gprf.mem._mem[14][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92494 q=soc.cpu.minerva.gprf.mem._mem[14][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92496 q=soc.cpu.minerva.gprf.mem._mem[14][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92498 q=soc.cpu.minerva.gprf.mem._mem[14][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92500 q=soc.cpu.minerva.gprf.mem._mem[14][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92502 q=soc.cpu.minerva.gprf.mem._mem[14][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92504 q=soc.cpu.minerva.gprf.mem._mem[14][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92506 q=soc.cpu.minerva.gprf.mem._mem[14][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92508 q=soc.cpu.minerva.gprf.mem._mem[14][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92510 q=soc.cpu.minerva.gprf.mem._mem[14][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92512 q=soc.cpu.minerva.gprf.mem._mem[14][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92514 q=soc.cpu.minerva.gprf.mem._mem[14][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92516 q=soc.cpu.minerva.gprf.mem._mem[14][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92518 q=soc.cpu.minerva.gprf.mem._mem[14][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92520 q=soc.cpu.minerva.gprf.mem._mem[14][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92522 q=soc.cpu.minerva.gprf.mem._mem[14][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92524 q=soc.cpu.minerva.gprf.mem._mem[14][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92526 q=soc.cpu.minerva.gprf.mem._mem[14][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92528 q=soc.cpu.minerva.gprf.mem._mem[14][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92530 q=soc.cpu.minerva.gprf.mem._mem[14][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92532 q=soc.cpu.minerva.gprf.mem._mem[14][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92534 q=soc.cpu.minerva.gprf.mem._mem[14][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92536 q=soc.cpu.minerva.gprf.mem._mem[14][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92538 q=soc.cpu.minerva.gprf.mem._mem[14][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92540 q=soc.cpu.minerva.gprf.mem._mem[14][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92542 q=soc.cpu.minerva.gprf.mem._mem[14][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92544 q=soc.ram.ram[18][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92546 q=soc.ram.ram[18][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92548 q=soc.ram.ram[18][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92550 q=soc.ram.ram[18][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92552 q=soc.ram.ram[18][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92554 q=soc.ram.ram[18][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92556 q=soc.ram.ram[18][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92558 q=soc.ram.ram[18][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92560 q=soc.ram.ram[127][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92562 q=soc.ram.ram[127][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92564 q=soc.ram.ram[127][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92566 q=soc.ram.ram[127][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92568 q=soc.ram.ram[127][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92570 q=soc.ram.ram[127][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92572 q=soc.ram.ram[127][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92574 q=soc.ram.ram[127][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92576 q=soc.ram.ram[119][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92578 q=soc.ram.ram[119][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92580 q=soc.ram.ram[119][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92582 q=soc.ram.ram[119][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92584 q=soc.ram.ram[119][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92586 q=soc.ram.ram[119][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92588 q=soc.ram.ram[119][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92590 q=soc.ram.ram[119][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92592 q=soc.ram.ram[39][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92594 q=soc.ram.ram[39][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92596 q=soc.ram.ram[39][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92598 q=soc.ram.ram[39][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92600 q=soc.ram.ram[39][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92602 q=soc.ram.ram[39][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92604 q=soc.ram.ram[39][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92606 q=soc.ram.ram[39][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92608 q=soc.ram.ram[81][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92610 q=soc.ram.ram[81][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92612 q=soc.ram.ram[81][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92614 q=soc.ram.ram[81][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92616 q=soc.ram.ram[81][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92618 q=soc.ram.ram[81][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92620 q=soc.ram.ram[81][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92622 q=soc.ram.ram[81][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92624 q=soc.ram.ram[39][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92626 q=soc.ram.ram[39][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92628 q=soc.ram.ram[39][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92630 q=soc.ram.ram[39][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92632 q=soc.ram.ram[39][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92634 q=soc.ram.ram[39][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92636 q=soc.ram.ram[39][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92638 q=soc.ram.ram[39][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92640 q=soc.ram.ram[80][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92642 q=soc.ram.ram[80][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92644 q=soc.ram.ram[80][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92646 q=soc.ram.ram[80][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92648 q=soc.ram.ram[80][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92650 q=soc.ram.ram[80][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92652 q=soc.ram.ram[80][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92654 q=soc.ram.ram[80][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92656 q=soc.ram.ram[39][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92658 q=soc.ram.ram[39][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92660 q=soc.ram.ram[39][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92662 q=soc.ram.ram[39][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92664 q=soc.ram.ram[39][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92666 q=soc.ram.ram[39][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92668 q=soc.ram.ram[39][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92670 q=soc.ram.ram[39][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92672 q=soc.ram.ram[7][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92674 q=soc.ram.ram[7][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92676 q=soc.ram.ram[7][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92678 q=soc.ram.ram[7][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92680 q=soc.ram.ram[7][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92682 q=soc.ram.ram[7][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92684 q=soc.ram.ram[7][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92686 q=soc.ram.ram[7][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92688 q=soc.ram.ram[38][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92690 q=soc.ram.ram[38][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92692 q=soc.ram.ram[38][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92694 q=soc.ram.ram[38][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92696 q=soc.ram.ram[38][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92698 q=soc.ram.ram[38][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92700 q=soc.ram.ram[38][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92702 q=soc.ram.ram[38][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92704 q=soc.ram.ram[78][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92706 q=soc.ram.ram[78][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92708 q=soc.ram.ram[78][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92710 q=soc.ram.ram[78][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92712 q=soc.ram.ram[78][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92714 q=soc.ram.ram[78][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92716 q=soc.ram.ram[78][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92718 q=soc.ram.ram[78][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92720 q=soc.ram.ram[38][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92722 q=soc.ram.ram[38][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92724 q=soc.ram.ram[38][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92726 q=soc.ram.ram[38][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92728 q=soc.ram.ram[38][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92730 q=soc.ram.ram[38][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92732 q=soc.ram.ram[38][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92734 q=soc.ram.ram[38][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92736 q=soc.ram.ram[77][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92738 q=soc.ram.ram[77][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92740 q=soc.ram.ram[77][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92742 q=soc.ram.ram[77][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92744 q=soc.ram.ram[77][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92746 q=soc.ram.ram[77][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92748 q=soc.ram.ram[77][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92750 q=soc.ram.ram[77][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92752 q=soc.ram.ram[38][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92754 q=soc.ram.ram[38][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92756 q=soc.ram.ram[38][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92758 q=soc.ram.ram[38][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92760 q=soc.ram.ram[38][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92762 q=soc.ram.ram[38][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92764 q=soc.ram.ram[38][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92766 q=soc.ram.ram[38][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92768 q=soc.ram.ram[103][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92770 q=soc.ram.ram[103][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92772 q=soc.ram.ram[103][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92774 q=soc.ram.ram[103][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92776 q=soc.ram.ram[103][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92778 q=soc.ram.ram[103][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92780 q=soc.ram.ram[103][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92782 q=soc.ram.ram[103][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92784 q=soc.ram.ram[88][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92786 q=soc.ram.ram[88][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92788 q=soc.ram.ram[88][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92790 q=soc.ram.ram[88][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92792 q=soc.ram.ram[88][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92794 q=soc.ram.ram[88][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92796 q=soc.ram.ram[88][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92798 q=soc.ram.ram[88][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92800 q=soc.ram.ram[41][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92802 q=soc.ram.ram[41][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92804 q=soc.ram.ram[41][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92806 q=soc.ram.ram[41][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92808 q=soc.ram.ram[41][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92810 q=soc.ram.ram[41][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92812 q=soc.ram.ram[41][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92814 q=soc.ram.ram[41][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92816 q=soc.ram.ram[40][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92818 q=soc.ram.ram[40][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92820 q=soc.ram.ram[40][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92822 q=soc.ram.ram[40][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92824 q=soc.ram.ram[40][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92826 q=soc.ram.ram[40][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92828 q=soc.ram.ram[40][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92830 q=soc.ram.ram[40][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92832 q=soc.ram.ram[87][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92834 q=soc.ram.ram[87][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92836 q=soc.ram.ram[87][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92838 q=soc.ram.ram[87][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92840 q=soc.ram.ram[87][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92842 q=soc.ram.ram[87][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92844 q=soc.ram.ram[87][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92846 q=soc.ram.ram[87][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92848 q=soc.ram.ram[86][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92850 q=soc.ram.ram[86][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92852 q=soc.ram.ram[86][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92854 q=soc.ram.ram[86][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92856 q=soc.ram.ram[86][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92858 q=soc.ram.ram[86][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92860 q=soc.ram.ram[86][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92862 q=soc.ram.ram[86][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92864 q=soc.ram.ram[40][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92866 q=soc.ram.ram[40][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92868 q=soc.ram.ram[40][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92870 q=soc.ram.ram[40][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92872 q=soc.ram.ram[40][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92874 q=soc.ram.ram[40][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92876 q=soc.ram.ram[40][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92878 q=soc.ram.ram[40][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92880 q=soc.ram.ram[40][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92882 q=soc.ram.ram[40][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92884 q=soc.ram.ram[40][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92886 q=soc.ram.ram[40][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92888 q=soc.ram.ram[40][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92890 q=soc.ram.ram[40][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92892 q=soc.ram.ram[40][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92894 q=soc.ram.ram[40][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92896 q=soc.ram.ram[85][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92898 q=soc.ram.ram[85][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92900 q=soc.ram.ram[85][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92902 q=soc.ram.ram[85][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92904 q=soc.ram.ram[85][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92906 q=soc.ram.ram[85][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92908 q=soc.ram.ram[85][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92910 q=soc.ram.ram[85][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92912 q=soc.ram.ram[3][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92914 q=soc.ram.ram[3][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92916 q=soc.ram.ram[3][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92918 q=soc.ram.ram[3][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92920 q=soc.ram.ram[3][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92922 q=soc.ram.ram[3][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92924 q=soc.ram.ram[3][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92926 q=soc.ram.ram[3][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92928 q=soc.ram.ram[84][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92930 q=soc.ram.ram[84][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92932 q=soc.ram.ram[84][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92934 q=soc.ram.ram[84][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92936 q=soc.ram.ram[84][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92938 q=soc.ram.ram[84][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92940 q=soc.ram.ram[84][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92942 q=soc.ram.ram[84][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92944 q=soc.ram.ram[3][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92946 q=soc.ram.ram[3][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92948 q=soc.ram.ram[3][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92950 q=soc.ram.ram[3][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92952 q=soc.ram.ram[3][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92954 q=soc.ram.ram[3][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92956 q=soc.ram.ram[3][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92958 q=soc.ram.ram[3][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92960 q=soc.ram.ram[83][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92962 q=soc.ram.ram[83][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92964 q=soc.ram.ram[83][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92966 q=soc.ram.ram[83][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92968 q=soc.ram.ram[83][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92970 q=soc.ram.ram[83][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92972 q=soc.ram.ram[83][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92974 q=soc.ram.ram[83][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92976 q=soc.ram.ram[3][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92978 q=soc.ram.ram[3][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92980 q=soc.ram.ram[3][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92982 q=soc.ram.ram[3][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92984 q=soc.ram.ram[3][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92986 q=soc.ram.ram[3][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92988 q=soc.ram.ram[3][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92990 q=soc.ram.ram[3][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92992 q=soc.ram.ram[82][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92994 q=soc.ram.ram[82][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92996 q=soc.ram.ram[82][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92998 q=soc.ram.ram[82][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93000 q=soc.ram.ram[82][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93002 q=soc.ram.ram[82][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93004 q=soc.ram.ram[82][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93006 q=soc.ram.ram[82][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93010 q=soc.bridge.csr_bridge_0.wb__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93014 q=soc.bridge.csr_bridge_0.wb__dat_r[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93018 q=soc.bridge.csr_bridge_0.wb__dat_r[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93022 q=soc.bridge.csr_bridge_0.wb__dat_r[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93026 q=soc.bridge.csr_bridge_0.wb__dat_r[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93030 q=soc.bridge.csr_bridge_0.wb__dat_r[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93034 q=soc.bridge.csr_bridge_0.wb__dat_r[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93038 q=soc.bridge.csr_bridge_0.wb__dat_r[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93040 q=soc.ram.ram[62][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93042 q=soc.ram.ram[62][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93044 q=soc.ram.ram[62][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93046 q=soc.ram.ram[62][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93048 q=soc.ram.ram[62][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93050 q=soc.ram.ram[62][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93052 q=soc.ram.ram[62][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93054 q=soc.ram.ram[62][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93056 q=soc.ram.ram[63][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93058 q=soc.ram.ram[63][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93060 q=soc.ram.ram[63][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93062 q=soc.ram.ram[63][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93064 q=soc.ram.ram[63][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93066 q=soc.ram.ram[63][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93068 q=soc.ram.ram[63][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93070 q=soc.ram.ram[63][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93072 q=soc.ram.ram[64][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93074 q=soc.ram.ram[64][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93076 q=soc.ram.ram[64][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93078 q=soc.ram.ram[64][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93080 q=soc.ram.ram[64][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93082 q=soc.ram.ram[64][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93084 q=soc.ram.ram[64][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93086 q=soc.ram.ram[64][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93088 q=soc.ram.ram[64][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93090 q=soc.ram.ram[64][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93092 q=soc.ram.ram[64][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93094 q=soc.ram.ram[64][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93096 q=soc.ram.ram[64][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93098 q=soc.ram.ram[64][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93100 q=soc.ram.ram[64][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93102 q=soc.ram.ram[64][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93104 q=soc.ram.ram[63][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93106 q=soc.ram.ram[63][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93108 q=soc.ram.ram[63][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93110 q=soc.ram.ram[63][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93112 q=soc.ram.ram[63][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93114 q=soc.ram.ram[63][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93116 q=soc.ram.ram[63][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93118 q=soc.ram.ram[63][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93120 q=soc.ram.ram[62][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93122 q=soc.ram.ram[62][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93124 q=soc.ram.ram[62][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93126 q=soc.ram.ram[62][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93128 q=soc.ram.ram[62][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93130 q=soc.ram.ram[62][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93132 q=soc.ram.ram[62][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93134 q=soc.ram.ram[62][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93136 q=soc.ram.ram[64][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93138 q=soc.ram.ram[64][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93140 q=soc.ram.ram[64][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93142 q=soc.ram.ram[64][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93144 q=soc.ram.ram[64][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93146 q=soc.ram.ram[64][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93148 q=soc.ram.ram[64][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93150 q=soc.ram.ram[64][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93152 q=soc.ram.ram[65][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93154 q=soc.ram.ram[65][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93156 q=soc.ram.ram[65][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93158 q=soc.ram.ram[65][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93160 q=soc.ram.ram[65][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93162 q=soc.ram.ram[65][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93164 q=soc.ram.ram[65][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93166 q=soc.ram.ram[65][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93168 q=soc.ram.ram[63][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93170 q=soc.ram.ram[63][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93172 q=soc.ram.ram[63][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93174 q=soc.ram.ram[63][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93176 q=soc.ram.ram[63][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93178 q=soc.ram.ram[63][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93180 q=soc.ram.ram[63][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93182 q=soc.ram.ram[63][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93184 q=soc.ram.ram[65][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93186 q=soc.ram.ram[65][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93188 q=soc.ram.ram[65][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93190 q=soc.ram.ram[65][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93192 q=soc.ram.ram[65][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93194 q=soc.ram.ram[65][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93196 q=soc.ram.ram[65][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93198 q=soc.ram.ram[65][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93200 q=soc.ram.ram[65][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93202 q=soc.ram.ram[65][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93204 q=soc.ram.ram[65][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93206 q=soc.ram.ram[65][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93208 q=soc.ram.ram[65][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93210 q=soc.ram.ram[65][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93212 q=soc.ram.ram[65][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93214 q=soc.ram.ram[65][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93216 q=soc.ram.ram[66][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93218 q=soc.ram.ram[66][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93220 q=soc.ram.ram[66][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93222 q=soc.ram.ram[66][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93224 q=soc.ram.ram[66][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93226 q=soc.ram.ram[66][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93228 q=soc.ram.ram[66][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93230 q=soc.ram.ram[66][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93232 q=soc.ram.ram[66][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93234 q=soc.ram.ram[66][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93236 q=soc.ram.ram[66][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93238 q=soc.ram.ram[66][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93240 q=soc.ram.ram[66][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93242 q=soc.ram.ram[66][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93244 q=soc.ram.ram[66][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93246 q=soc.ram.ram[66][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93248 q=soc.ram.ram[66][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93250 q=soc.ram.ram[66][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93252 q=soc.ram.ram[66][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93254 q=soc.ram.ram[66][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93256 q=soc.ram.ram[66][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93258 q=soc.ram.ram[66][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93260 q=soc.ram.ram[66][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93262 q=soc.ram.ram[66][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93264 q=soc.ram.ram[67][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93266 q=soc.ram.ram[67][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93268 q=soc.ram.ram[67][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93270 q=soc.ram.ram[67][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93272 q=soc.ram.ram[67][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93274 q=soc.ram.ram[67][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93276 q=soc.ram.ram[67][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93278 q=soc.ram.ram[67][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93280 q=soc.ram.ram[35][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93282 q=soc.ram.ram[35][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93284 q=soc.ram.ram[35][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93286 q=soc.ram.ram[35][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93288 q=soc.ram.ram[35][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93290 q=soc.ram.ram[35][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93292 q=soc.ram.ram[35][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93294 q=soc.ram.ram[35][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93298 q=soc.bridge.csr_mux_0.uart_divisor__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93302 q=soc.bridge.csr_mux_0.uart_divisor__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93306 q=soc.bridge.csr_mux_0.uart_divisor__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93310 q=soc.bridge.csr_mux_0.uart_divisor__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93314 q=soc.bridge.csr_mux_0.uart_divisor__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93318 q=soc.bridge.csr_mux_0.uart_divisor__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93322 q=soc.bridge.csr_mux_0.uart_divisor__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93326 q=soc.bridge.csr_mux_0.uart_divisor__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93330 q=soc.bridge.csr_bridge_1.wb__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93334 q=soc.bridge.csr_bridge_1.wb__dat_r[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93338 q=soc.bridge.csr_bridge_1.wb__dat_r[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93342 q=soc.bridge.csr_bridge_1.wb__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93346 q=soc.bridge.csr_bridge_1.wb__dat_r[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93350 q=soc.bridge.csr_bridge_1.wb__dat_r[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93354 q=soc.bridge.csr_bridge_1.wb__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93358 q=soc.bridge.csr_bridge_1.wb__dat_r[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93362 q=soc.bridge.csr_bridge_1.wb__dat_r[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93366 q=soc.bridge.csr_bridge_0.wb__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93370 q=soc.bridge.csr_bridge_0.wb__dat_r[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93374 q=soc.bridge.csr_bridge_0.wb__dat_r[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93378 q=soc.bridge.csr_bridge_0.wb__dat_r[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93382 q=soc.bridge.csr_bridge_0.wb__dat_r[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93386 q=soc.bridge.csr_bridge_0.wb__dat_r[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93390 q=soc.bridge.csr_bridge_0.wb__dat_r[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93394 q=soc.bridge.csr_bridge_0.wb__dat_r[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93396 q=soc.ram.ram[62][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93398 q=soc.ram.ram[62][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93400 q=soc.ram.ram[62][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93402 q=soc.ram.ram[62][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93404 q=soc.ram.ram[62][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93406 q=soc.ram.ram[62][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93408 q=soc.ram.ram[62][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93410 q=soc.ram.ram[62][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93412 q=soc.ram.ram[61][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93414 q=soc.ram.ram[61][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93416 q=soc.ram.ram[61][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93418 q=soc.ram.ram[61][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93420 q=soc.ram.ram[61][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93422 q=soc.ram.ram[61][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93424 q=soc.ram.ram[61][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93426 q=soc.ram.ram[61][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93428 q=soc.ram.ram[61][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93430 q=soc.ram.ram[61][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93432 q=soc.ram.ram[61][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93434 q=soc.ram.ram[61][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93436 q=soc.ram.ram[61][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93438 q=soc.ram.ram[61][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93440 q=soc.ram.ram[61][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93442 q=soc.ram.ram[61][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93444 q=soc.ram.ram[61][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93446 q=soc.ram.ram[61][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93448 q=soc.ram.ram[61][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93450 q=soc.ram.ram[61][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93452 q=soc.ram.ram[61][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93454 q=soc.ram.ram[61][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93456 q=soc.ram.ram[61][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93458 q=soc.ram.ram[61][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93460 q=soc.ram.ram[60][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93462 q=soc.ram.ram[60][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93464 q=soc.ram.ram[60][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93466 q=soc.ram.ram[60][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93468 q=soc.ram.ram[60][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93470 q=soc.ram.ram[60][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93472 q=soc.ram.ram[60][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93474 q=soc.ram.ram[60][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93476 q=soc.ram.ram[60][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93478 q=soc.ram.ram[60][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93480 q=soc.ram.ram[60][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93482 q=soc.ram.ram[60][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93484 q=soc.ram.ram[60][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93486 q=soc.ram.ram[60][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93488 q=soc.ram.ram[60][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93490 q=soc.ram.ram[60][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93492 q=soc.ram.ram[60][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93494 q=soc.ram.ram[60][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93496 q=soc.ram.ram[60][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93498 q=soc.ram.ram[60][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93500 q=soc.ram.ram[60][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93502 q=soc.ram.ram[60][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93504 q=soc.ram.ram[60][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93506 q=soc.ram.ram[60][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93508 q=soc.ram.ram[21][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93510 q=soc.ram.ram[21][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93512 q=soc.ram.ram[21][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93514 q=soc.ram.ram[21][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93516 q=soc.ram.ram[21][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93518 q=soc.ram.ram[21][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93520 q=soc.ram.ram[21][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93522 q=soc.ram.ram[21][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93524 q=soc.ram.ram[99][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93526 q=soc.ram.ram[99][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93528 q=soc.ram.ram[99][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93530 q=soc.ram.ram[99][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93532 q=soc.ram.ram[99][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93534 q=soc.ram.ram[99][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93536 q=soc.ram.ram[99][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93538 q=soc.ram.ram[99][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93540 q=soc.ram.ram[22][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93542 q=soc.ram.ram[22][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93544 q=soc.ram.ram[22][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93546 q=soc.ram.ram[22][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93548 q=soc.ram.ram[22][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93550 q=soc.ram.ram[22][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93552 q=soc.ram.ram[22][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93554 q=soc.ram.ram[22][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93556 q=soc.ram.ram[25][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93558 q=soc.ram.ram[25][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93560 q=soc.ram.ram[25][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93562 q=soc.ram.ram[25][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93564 q=soc.ram.ram[25][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93566 q=soc.ram.ram[25][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93568 q=soc.ram.ram[25][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93570 q=soc.ram.ram[25][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93572 q=soc.ram.ram[36][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93574 q=soc.ram.ram[36][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93576 q=soc.ram.ram[36][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93578 q=soc.ram.ram[36][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93580 q=soc.ram.ram[36][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93582 q=soc.ram.ram[36][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93584 q=soc.ram.ram[36][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93586 q=soc.ram.ram[36][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93588 q=soc.ram.ram[5][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93590 q=soc.ram.ram[5][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93592 q=soc.ram.ram[5][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93594 q=soc.ram.ram[5][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93596 q=soc.ram.ram[5][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93598 q=soc.ram.ram[5][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93600 q=soc.ram.ram[5][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93602 q=soc.ram.ram[5][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93604 q=soc.ram.ram[5][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93606 q=soc.ram.ram[5][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93608 q=soc.ram.ram[5][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93610 q=soc.ram.ram[5][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93612 q=soc.ram.ram[5][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93614 q=soc.ram.ram[5][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93616 q=soc.ram.ram[5][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93618 q=soc.ram.ram[5][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93620 q=soc.ram.ram[37][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93622 q=soc.ram.ram[37][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93624 q=soc.ram.ram[37][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93626 q=soc.ram.ram[37][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93628 q=soc.ram.ram[37][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93630 q=soc.ram.ram[37][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93632 q=soc.ram.ram[37][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93634 q=soc.ram.ram[37][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93636 q=soc.ram.ram[74][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93638 q=soc.ram.ram[74][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93640 q=soc.ram.ram[74][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93642 q=soc.ram.ram[74][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93644 q=soc.ram.ram[74][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93646 q=soc.ram.ram[74][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93648 q=soc.ram.ram[74][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93650 q=soc.ram.ram[74][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93652 q=soc.ram.ram[37][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93654 q=soc.ram.ram[37][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93656 q=soc.ram.ram[37][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93658 q=soc.ram.ram[37][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93660 q=soc.ram.ram[37][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93662 q=soc.ram.ram[37][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93664 q=soc.ram.ram[37][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93666 q=soc.ram.ram[37][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93668 q=soc.ram.ram[5][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93670 q=soc.ram.ram[5][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93672 q=soc.ram.ram[5][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93674 q=soc.ram.ram[5][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93676 q=soc.ram.ram[5][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93678 q=soc.ram.ram[5][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93680 q=soc.ram.ram[5][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93682 q=soc.ram.ram[5][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93684 q=soc.ram.ram[59][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93686 q=soc.ram.ram[59][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93688 q=soc.ram.ram[59][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93690 q=soc.ram.ram[59][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93692 q=soc.ram.ram[59][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93694 q=soc.ram.ram[59][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93696 q=soc.ram.ram[59][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93698 q=soc.ram.ram[59][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93700 q=soc.ram.ram[59][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93702 q=soc.ram.ram[59][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93704 q=soc.ram.ram[59][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93706 q=soc.ram.ram[59][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93708 q=soc.ram.ram[59][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93710 q=soc.ram.ram[59][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93712 q=soc.ram.ram[59][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93714 q=soc.ram.ram[59][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93716 q=soc.ram.ram[59][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93718 q=soc.ram.ram[59][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93720 q=soc.ram.ram[59][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93722 q=soc.ram.ram[59][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93724 q=soc.ram.ram[59][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93726 q=soc.ram.ram[59][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93728 q=soc.ram.ram[59][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93730 q=soc.ram.ram[59][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93732 q=soc.ram.ram[58][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93734 q=soc.ram.ram[58][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93736 q=soc.ram.ram[58][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93738 q=soc.ram.ram[58][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93740 q=soc.ram.ram[58][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93742 q=soc.ram.ram[58][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93744 q=soc.ram.ram[58][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93746 q=soc.ram.ram[58][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93748 q=soc.ram.ram[75][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93750 q=soc.ram.ram[75][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93752 q=soc.ram.ram[75][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93754 q=soc.ram.ram[75][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93756 q=soc.ram.ram[75][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93758 q=soc.ram.ram[75][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93760 q=soc.ram.ram[75][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93762 q=soc.ram.ram[75][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93764 q=soc.ram.ram[58][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93766 q=soc.ram.ram[58][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93768 q=soc.ram.ram[58][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93770 q=soc.ram.ram[58][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93772 q=soc.ram.ram[58][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93774 q=soc.ram.ram[58][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93776 q=soc.ram.ram[58][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93778 q=soc.ram.ram[58][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93780 q=soc.ram.ram[58][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93782 q=soc.ram.ram[58][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93784 q=soc.ram.ram[58][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93786 q=soc.ram.ram[58][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93788 q=soc.ram.ram[58][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93790 q=soc.ram.ram[58][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93792 q=soc.ram.ram[58][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93794 q=soc.ram.ram[58][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93796 q=soc.ram.ram[57][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93798 q=soc.ram.ram[57][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93800 q=soc.ram.ram[57][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93802 q=soc.ram.ram[57][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93804 q=soc.ram.ram[57][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93806 q=soc.ram.ram[57][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93808 q=soc.ram.ram[57][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93810 q=soc.ram.ram[57][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93812 q=soc.ram.ram[46][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93814 q=soc.ram.ram[46][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93816 q=soc.ram.ram[46][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93818 q=soc.ram.ram[46][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93820 q=soc.ram.ram[46][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93822 q=soc.ram.ram[46][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93824 q=soc.ram.ram[46][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93826 q=soc.ram.ram[46][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93828 q=soc.ram.ram[57][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93830 q=soc.ram.ram[57][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93832 q=soc.ram.ram[57][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93834 q=soc.ram.ram[57][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93836 q=soc.ram.ram[57][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93838 q=soc.ram.ram[57][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93840 q=soc.ram.ram[57][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93842 q=soc.ram.ram[57][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93844 q=soc.ram.ram[57][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93846 q=soc.ram.ram[57][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93848 q=soc.ram.ram[57][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93850 q=soc.ram.ram[57][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93852 q=soc.ram.ram[57][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93854 q=soc.ram.ram[57][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93856 q=soc.ram.ram[57][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93858 q=soc.ram.ram[57][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93860 q=soc.ram.ram[56][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93862 q=soc.ram.ram[56][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93864 q=soc.ram.ram[56][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93866 q=soc.ram.ram[56][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93868 q=soc.ram.ram[56][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93870 q=soc.ram.ram[56][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93872 q=soc.ram.ram[56][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93874 q=soc.ram.ram[56][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93876 q=soc.ram.ram[56][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93878 q=soc.ram.ram[56][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93880 q=soc.ram.ram[56][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93882 q=soc.ram.ram[56][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93884 q=soc.ram.ram[56][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93886 q=soc.ram.ram[56][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93888 q=soc.ram.ram[56][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93890 q=soc.ram.ram[56][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93892 q=soc.ram.ram[37][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93894 q=soc.ram.ram[37][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93896 q=soc.ram.ram[37][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93898 q=soc.ram.ram[37][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93900 q=soc.ram.ram[37][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93902 q=soc.ram.ram[37][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93904 q=soc.ram.ram[37][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93906 q=soc.ram.ram[37][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93908 q=soc.ram.ram[56][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93910 q=soc.ram.ram[56][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93912 q=soc.ram.ram[56][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93914 q=soc.ram.ram[56][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93916 q=soc.ram.ram[56][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93918 q=soc.ram.ram[56][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93920 q=soc.ram.ram[56][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93922 q=soc.ram.ram[56][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93924 q=soc.ram.ram[55][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93926 q=soc.ram.ram[55][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93928 q=soc.ram.ram[55][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93930 q=soc.ram.ram[55][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93932 q=soc.ram.ram[55][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93934 q=soc.ram.ram[55][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93936 q=soc.ram.ram[55][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93938 q=soc.ram.ram[55][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93940 q=soc.ram.ram[55][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93942 q=soc.ram.ram[55][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93944 q=soc.ram.ram[55][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93946 q=soc.ram.ram[55][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93948 q=soc.ram.ram[55][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93950 q=soc.ram.ram[55][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93952 q=soc.ram.ram[55][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93954 q=soc.ram.ram[55][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93956 q=soc.ram.ram[55][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93958 q=soc.ram.ram[55][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93960 q=soc.ram.ram[55][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93962 q=soc.ram.ram[55][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93964 q=soc.ram.ram[55][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93966 q=soc.ram.ram[55][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93968 q=soc.ram.ram[55][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93970 q=soc.ram.ram[55][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93972 q=soc.ram.ram[54][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93974 q=soc.ram.ram[54][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93976 q=soc.ram.ram[54][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93978 q=soc.ram.ram[54][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93980 q=soc.ram.ram[54][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93982 q=soc.ram.ram[54][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93984 q=soc.ram.ram[54][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93986 q=soc.ram.ram[54][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93988 q=soc.ram.ram[54][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93990 q=soc.ram.ram[54][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93992 q=soc.ram.ram[54][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93994 q=soc.ram.ram[54][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93996 q=soc.ram.ram[54][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93998 q=soc.ram.ram[54][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94000 q=soc.ram.ram[54][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94002 q=soc.ram.ram[54][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94004 q=soc.ram.ram[53][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94006 q=soc.ram.ram[53][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94008 q=soc.ram.ram[53][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94010 q=soc.ram.ram[53][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94012 q=soc.ram.ram[53][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94014 q=soc.ram.ram[53][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94016 q=soc.ram.ram[53][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94018 q=soc.ram.ram[53][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94020 q=soc.ram.ram[53][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94022 q=soc.ram.ram[53][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94024 q=soc.ram.ram[53][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94026 q=soc.ram.ram[53][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94028 q=soc.ram.ram[53][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94030 q=soc.ram.ram[53][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94032 q=soc.ram.ram[53][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94034 q=soc.ram.ram[53][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94036 q=soc.ram.ram[53][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94038 q=soc.ram.ram[53][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94040 q=soc.ram.ram[53][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94042 q=soc.ram.ram[53][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94044 q=soc.ram.ram[53][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94046 q=soc.ram.ram[53][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94048 q=soc.ram.ram[53][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94050 q=soc.ram.ram[53][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94052 q=soc.ram.ram[54][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94054 q=soc.ram.ram[54][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94056 q=soc.ram.ram[54][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94058 q=soc.ram.ram[54][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94060 q=soc.ram.ram[54][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94062 q=soc.ram.ram[54][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94064 q=soc.ram.ram[54][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94066 q=soc.ram.ram[54][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94068 q=soc.ram.ram[76][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94070 q=soc.ram.ram[76][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94072 q=soc.ram.ram[76][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94074 q=soc.ram.ram[76][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94076 q=soc.ram.ram[76][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94078 q=soc.ram.ram[76][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94080 q=soc.ram.ram[76][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94082 q=soc.ram.ram[76][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94084 q=soc.cpu.minerva.gprf.mem._mem[13][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94086 q=soc.cpu.minerva.gprf.mem._mem[13][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94088 q=soc.cpu.minerva.gprf.mem._mem[13][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94090 q=soc.cpu.minerva.gprf.mem._mem[13][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94092 q=soc.cpu.minerva.gprf.mem._mem[13][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94094 q=soc.cpu.minerva.gprf.mem._mem[13][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94096 q=soc.cpu.minerva.gprf.mem._mem[13][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94098 q=soc.cpu.minerva.gprf.mem._mem[13][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94100 q=soc.cpu.minerva.gprf.mem._mem[13][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94102 q=soc.cpu.minerva.gprf.mem._mem[13][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94104 q=soc.cpu.minerva.gprf.mem._mem[13][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94106 q=soc.cpu.minerva.gprf.mem._mem[13][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94108 q=soc.cpu.minerva.gprf.mem._mem[13][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94110 q=soc.cpu.minerva.gprf.mem._mem[13][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94112 q=soc.cpu.minerva.gprf.mem._mem[13][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94114 q=soc.cpu.minerva.gprf.mem._mem[13][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94116 q=soc.cpu.minerva.gprf.mem._mem[13][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94118 q=soc.cpu.minerva.gprf.mem._mem[13][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94120 q=soc.cpu.minerva.gprf.mem._mem[13][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94122 q=soc.cpu.minerva.gprf.mem._mem[13][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94124 q=soc.cpu.minerva.gprf.mem._mem[13][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94126 q=soc.cpu.minerva.gprf.mem._mem[13][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94128 q=soc.cpu.minerva.gprf.mem._mem[13][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94130 q=soc.cpu.minerva.gprf.mem._mem[13][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94132 q=soc.cpu.minerva.gprf.mem._mem[13][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94134 q=soc.cpu.minerva.gprf.mem._mem[13][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94136 q=soc.cpu.minerva.gprf.mem._mem[13][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94138 q=soc.cpu.minerva.gprf.mem._mem[13][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94140 q=soc.cpu.minerva.gprf.mem._mem[13][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94142 q=soc.cpu.minerva.gprf.mem._mem[13][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94144 q=soc.cpu.minerva.gprf.mem._mem[13][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94146 q=soc.cpu.minerva.gprf.mem._mem[13][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94148 q=soc.ram.ram[8][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94150 q=soc.ram.ram[8][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94152 q=soc.ram.ram[8][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94154 q=soc.ram.ram[8][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94156 q=soc.ram.ram[8][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94158 q=soc.ram.ram[8][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94160 q=soc.ram.ram[8][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94162 q=soc.ram.ram[8][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94164 q=soc.ram.ram[103][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94166 q=soc.ram.ram[103][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94168 q=soc.ram.ram[103][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94170 q=soc.ram.ram[103][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94172 q=soc.ram.ram[103][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94174 q=soc.ram.ram[103][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94176 q=soc.ram.ram[103][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94178 q=soc.ram.ram[103][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94180 q=soc.ram.ram[92][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94182 q=soc.ram.ram[92][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94184 q=soc.ram.ram[92][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94186 q=soc.ram.ram[92][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94188 q=soc.ram.ram[92][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94190 q=soc.ram.ram[92][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94192 q=soc.ram.ram[92][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94194 q=soc.ram.ram[92][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94196 q=soc.ram.ram[12][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94198 q=soc.ram.ram[12][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94200 q=soc.ram.ram[12][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94202 q=soc.ram.ram[12][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94204 q=soc.ram.ram[12][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94206 q=soc.ram.ram[12][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94208 q=soc.ram.ram[12][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94210 q=soc.ram.ram[12][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94212 q=soc.ram.ram[42][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94214 q=soc.ram.ram[42][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94216 q=soc.ram.ram[42][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94218 q=soc.ram.ram[42][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94220 q=soc.ram.ram[42][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94222 q=soc.ram.ram[42][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94224 q=soc.ram.ram[42][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94226 q=soc.ram.ram[42][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94228 q=soc.ram.ram[92][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94230 q=soc.ram.ram[92][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94232 q=soc.ram.ram[92][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94234 q=soc.ram.ram[92][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94236 q=soc.ram.ram[92][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94238 q=soc.ram.ram[92][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94240 q=soc.ram.ram[92][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94242 q=soc.ram.ram[92][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94244 q=soc.ram.ram[42][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94246 q=soc.ram.ram[42][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94248 q=soc.ram.ram[42][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94250 q=soc.ram.ram[42][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94252 q=soc.ram.ram[42][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94254 q=soc.ram.ram[42][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94256 q=soc.ram.ram[42][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94258 q=soc.ram.ram[42][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94260 q=soc.ram.ram[91][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94262 q=soc.ram.ram[91][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94264 q=soc.ram.ram[91][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94266 q=soc.ram.ram[91][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94268 q=soc.ram.ram[91][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94270 q=soc.ram.ram[91][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94272 q=soc.ram.ram[91][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94274 q=soc.ram.ram[91][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94276 q=soc.ram.ram[41][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94278 q=soc.ram.ram[41][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94280 q=soc.ram.ram[41][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94282 q=soc.ram.ram[41][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94284 q=soc.ram.ram[41][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94286 q=soc.ram.ram[41][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94288 q=soc.ram.ram[41][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94290 q=soc.ram.ram[41][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94292 q=soc.ram.ram[90][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94294 q=soc.ram.ram[90][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94296 q=soc.ram.ram[90][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94298 q=soc.ram.ram[90][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94300 q=soc.ram.ram[90][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94302 q=soc.ram.ram[90][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94304 q=soc.ram.ram[90][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94306 q=soc.ram.ram[90][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94308 q=soc.ram.ram[41][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94310 q=soc.ram.ram[41][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94312 q=soc.ram.ram[41][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94314 q=soc.ram.ram[41][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94316 q=soc.ram.ram[41][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94318 q=soc.ram.ram[41][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94320 q=soc.ram.ram[41][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94322 q=soc.ram.ram[41][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94324 q=soc.ram.ram[12][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94326 q=soc.ram.ram[12][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94328 q=soc.ram.ram[12][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94330 q=soc.ram.ram[12][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94332 q=soc.ram.ram[12][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94334 q=soc.ram.ram[12][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94336 q=soc.ram.ram[12][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94338 q=soc.ram.ram[12][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94340 q=soc.ram.ram[103][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94342 q=soc.ram.ram[103][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94344 q=soc.ram.ram[103][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94346 q=soc.ram.ram[103][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94348 q=soc.ram.ram[103][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94350 q=soc.ram.ram[103][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94352 q=soc.ram.ram[103][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94354 q=soc.ram.ram[103][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94356 q=soc.ram.ram[44][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94358 q=soc.ram.ram[44][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94360 q=soc.ram.ram[44][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94362 q=soc.ram.ram[44][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94364 q=soc.ram.ram[44][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94366 q=soc.ram.ram[44][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94368 q=soc.ram.ram[44][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94370 q=soc.ram.ram[44][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94372 q=soc.ram.ram[0][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94374 q=soc.ram.ram[0][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94376 q=soc.ram.ram[0][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94378 q=soc.ram.ram[0][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94380 q=soc.ram.ram[0][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94382 q=soc.ram.ram[0][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94384 q=soc.ram.ram[0][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94386 q=soc.ram.ram[0][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94388 q=soc.ram.ram[98][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94390 q=soc.ram.ram[98][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94392 q=soc.ram.ram[98][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94394 q=soc.ram.ram[98][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94396 q=soc.ram.ram[98][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94398 q=soc.ram.ram[98][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94400 q=soc.ram.ram[98][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94402 q=soc.ram.ram[98][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94404 q=soc.ram.ram[44][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94406 q=soc.ram.ram[44][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94408 q=soc.ram.ram[44][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94410 q=soc.ram.ram[44][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94412 q=soc.ram.ram[44][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94414 q=soc.ram.ram[44][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94416 q=soc.ram.ram[44][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94418 q=soc.ram.ram[44][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94420 q=soc.ram.ram[44][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94422 q=soc.ram.ram[44][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94424 q=soc.ram.ram[44][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94426 q=soc.ram.ram[44][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94428 q=soc.ram.ram[44][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94430 q=soc.ram.ram[44][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94432 q=soc.ram.ram[44][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94434 q=soc.ram.ram[44][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94436 q=soc.ram.ram[97][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94438 q=soc.ram.ram[97][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94440 q=soc.ram.ram[97][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94442 q=soc.ram.ram[97][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94444 q=soc.ram.ram[97][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94446 q=soc.ram.ram[97][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94448 q=soc.ram.ram[97][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94450 q=soc.ram.ram[97][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94452 q=soc.ram.ram[43][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94454 q=soc.ram.ram[43][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94456 q=soc.ram.ram[43][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94458 q=soc.ram.ram[43][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94460 q=soc.ram.ram[43][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94462 q=soc.ram.ram[43][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94464 q=soc.ram.ram[43][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94466 q=soc.ram.ram[43][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94468 q=soc.ram.ram[96][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94470 q=soc.ram.ram[96][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94472 q=soc.ram.ram[96][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94474 q=soc.ram.ram[96][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94476 q=soc.ram.ram[96][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94478 q=soc.ram.ram[96][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94480 q=soc.ram.ram[96][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94482 q=soc.ram.ram[96][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94484 q=soc.ram.ram[43][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94486 q=soc.ram.ram[43][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94488 q=soc.ram.ram[43][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94490 q=soc.ram.ram[43][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94492 q=soc.ram.ram[43][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94494 q=soc.ram.ram[43][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94496 q=soc.ram.ram[43][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94498 q=soc.ram.ram[43][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94500 q=soc.ram.ram[95][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94502 q=soc.ram.ram[95][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94504 q=soc.ram.ram[95][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94506 q=soc.ram.ram[95][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94508 q=soc.ram.ram[95][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94510 q=soc.ram.ram[95][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94512 q=soc.ram.ram[95][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94514 q=soc.ram.ram[95][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94516 q=soc.ram.ram[43][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94518 q=soc.ram.ram[43][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94520 q=soc.ram.ram[43][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94522 q=soc.ram.ram[43][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94524 q=soc.ram.ram[43][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94526 q=soc.ram.ram[43][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94528 q=soc.ram.ram[43][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94530 q=soc.ram.ram[43][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94532 q=soc.ram.ram[94][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94534 q=soc.ram.ram[94][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94536 q=soc.ram.ram[94][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94538 q=soc.ram.ram[94][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94540 q=soc.ram.ram[94][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94542 q=soc.ram.ram[94][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94544 q=soc.ram.ram[94][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94546 q=soc.ram.ram[94][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94548 q=soc.ram.ram[42][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94550 q=soc.ram.ram[42][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94552 q=soc.ram.ram[42][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94554 q=soc.ram.ram[42][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94556 q=soc.ram.ram[42][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94558 q=soc.ram.ram[42][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94560 q=soc.ram.ram[42][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94562 q=soc.ram.ram[42][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94564 q=soc.ram.ram[93][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94566 q=soc.ram.ram[93][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94568 q=soc.ram.ram[93][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94570 q=soc.ram.ram[93][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94572 q=soc.ram.ram[93][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94574 q=soc.ram.ram[93][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94576 q=soc.ram.ram[93][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94578 q=soc.ram.ram[93][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94582 q=soc.cpu.minerva.payload__pc$71[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94586 q=soc.cpu.minerva.payload__pc$71[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94590 q=soc.cpu.minerva.payload__pc$71[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94594 q=soc.cpu.minerva.payload__pc$71[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94598 q=soc.cpu.minerva.payload__pc$71[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94602 q=soc.cpu.minerva.payload__pc$71[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94606 q=soc.cpu.minerva.payload__pc$71[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94610 q=soc.cpu.minerva.payload__pc$71[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94614 q=soc.cpu.minerva.payload__pc$71[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94618 q=soc.cpu.minerva.payload__pc$71[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94622 q=soc.cpu.minerva.payload__pc$71[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94626 q=soc.cpu.minerva.payload__pc$71[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94630 q=soc.cpu.minerva.payload__pc$71[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94634 q=soc.cpu.minerva.payload__pc$71[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94638 q=soc.cpu.minerva.payload__pc$71[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94642 q=soc.cpu.minerva.payload__pc$71[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94646 q=soc.cpu.minerva.payload__pc$71[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94650 q=soc.cpu.minerva.payload__pc$71[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94654 q=soc.cpu.minerva.payload__pc$71[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94658 q=soc.cpu.minerva.payload__pc$71[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94662 q=soc.cpu.minerva.payload__pc$71[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94666 q=soc.cpu.minerva.payload__pc$71[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94670 q=soc.cpu.minerva.payload__pc$71[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94674 q=soc.cpu.minerva.payload__pc$71[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94678 q=soc.cpu.minerva.payload__pc$71[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94682 q=soc.cpu.minerva.payload__pc$71[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94686 q=soc.cpu.minerva.payload__pc$71[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94690 q=soc.cpu.minerva.payload__pc$71[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94694 q=soc.cpu.minerva.payload__pc$71[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94698 q=soc.cpu.minerva.payload__pc$71[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94700 q=soc.cpu.minerva.gprf.mem._mem[12][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94702 q=soc.cpu.minerva.gprf.mem._mem[12][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94704 q=soc.cpu.minerva.gprf.mem._mem[12][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94706 q=soc.cpu.minerva.gprf.mem._mem[12][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94708 q=soc.cpu.minerva.gprf.mem._mem[12][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94710 q=soc.cpu.minerva.gprf.mem._mem[12][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94712 q=soc.cpu.minerva.gprf.mem._mem[12][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94714 q=soc.cpu.minerva.gprf.mem._mem[12][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94716 q=soc.cpu.minerva.gprf.mem._mem[12][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94718 q=soc.cpu.minerva.gprf.mem._mem[12][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94720 q=soc.cpu.minerva.gprf.mem._mem[12][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94722 q=soc.cpu.minerva.gprf.mem._mem[12][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94724 q=soc.cpu.minerva.gprf.mem._mem[12][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94726 q=soc.cpu.minerva.gprf.mem._mem[12][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94728 q=soc.cpu.minerva.gprf.mem._mem[12][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94730 q=soc.cpu.minerva.gprf.mem._mem[12][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94732 q=soc.cpu.minerva.gprf.mem._mem[12][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94734 q=soc.cpu.minerva.gprf.mem._mem[12][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94736 q=soc.cpu.minerva.gprf.mem._mem[12][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94738 q=soc.cpu.minerva.gprf.mem._mem[12][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94740 q=soc.cpu.minerva.gprf.mem._mem[12][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94742 q=soc.cpu.minerva.gprf.mem._mem[12][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94744 q=soc.cpu.minerva.gprf.mem._mem[12][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94746 q=soc.cpu.minerva.gprf.mem._mem[12][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94748 q=soc.cpu.minerva.gprf.mem._mem[12][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94750 q=soc.cpu.minerva.gprf.mem._mem[12][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94752 q=soc.cpu.minerva.gprf.mem._mem[12][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94754 q=soc.cpu.minerva.gprf.mem._mem[12][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94756 q=soc.cpu.minerva.gprf.mem._mem[12][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94758 q=soc.cpu.minerva.gprf.mem._mem[12][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94760 q=soc.cpu.minerva.gprf.mem._mem[12][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94762 q=soc.cpu.minerva.gprf.mem._mem[12][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94764 q=soc.ram.ram[13][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94766 q=soc.ram.ram[13][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94768 q=soc.ram.ram[13][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94770 q=soc.ram.ram[13][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94772 q=soc.ram.ram[13][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94774 q=soc.ram.ram[13][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94776 q=soc.ram.ram[13][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94778 q=soc.ram.ram[13][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94780 q=soc.ram.ram[102][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94782 q=soc.ram.ram[102][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94784 q=soc.ram.ram[102][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94786 q=soc.ram.ram[102][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94788 q=soc.ram.ram[102][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94790 q=soc.ram.ram[102][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94792 q=soc.ram.ram[102][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94794 q=soc.ram.ram[102][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94796 q=soc.cpu.minerva.gprf.mem._mem[11][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94798 q=soc.cpu.minerva.gprf.mem._mem[11][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94800 q=soc.cpu.minerva.gprf.mem._mem[11][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94802 q=soc.cpu.minerva.gprf.mem._mem[11][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94804 q=soc.cpu.minerva.gprf.mem._mem[11][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94806 q=soc.cpu.minerva.gprf.mem._mem[11][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94808 q=soc.cpu.minerva.gprf.mem._mem[11][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94810 q=soc.cpu.minerva.gprf.mem._mem[11][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94812 q=soc.cpu.minerva.gprf.mem._mem[11][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94814 q=soc.cpu.minerva.gprf.mem._mem[11][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94816 q=soc.cpu.minerva.gprf.mem._mem[11][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94818 q=soc.cpu.minerva.gprf.mem._mem[11][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94820 q=soc.cpu.minerva.gprf.mem._mem[11][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94822 q=soc.cpu.minerva.gprf.mem._mem[11][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94824 q=soc.cpu.minerva.gprf.mem._mem[11][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94826 q=soc.cpu.minerva.gprf.mem._mem[11][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94828 q=soc.cpu.minerva.gprf.mem._mem[11][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94830 q=soc.cpu.minerva.gprf.mem._mem[11][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94832 q=soc.cpu.minerva.gprf.mem._mem[11][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94834 q=soc.cpu.minerva.gprf.mem._mem[11][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94836 q=soc.cpu.minerva.gprf.mem._mem[11][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94838 q=soc.cpu.minerva.gprf.mem._mem[11][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94840 q=soc.cpu.minerva.gprf.mem._mem[11][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94842 q=soc.cpu.minerva.gprf.mem._mem[11][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94844 q=soc.cpu.minerva.gprf.mem._mem[11][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94846 q=soc.cpu.minerva.gprf.mem._mem[11][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94848 q=soc.cpu.minerva.gprf.mem._mem[11][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94850 q=soc.cpu.minerva.gprf.mem._mem[11][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94852 q=soc.cpu.minerva.gprf.mem._mem[11][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94854 q=soc.cpu.minerva.gprf.mem._mem[11][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94856 q=soc.cpu.minerva.gprf.mem._mem[11][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94858 q=soc.cpu.minerva.gprf.mem._mem[11][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94860 q=soc.cpu.minerva.gprf.mem._mem[18][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94862 q=soc.cpu.minerva.gprf.mem._mem[18][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94864 q=soc.cpu.minerva.gprf.mem._mem[18][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94866 q=soc.cpu.minerva.gprf.mem._mem[18][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94868 q=soc.cpu.minerva.gprf.mem._mem[18][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94870 q=soc.cpu.minerva.gprf.mem._mem[18][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94872 q=soc.cpu.minerva.gprf.mem._mem[18][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94874 q=soc.cpu.minerva.gprf.mem._mem[18][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94876 q=soc.cpu.minerva.gprf.mem._mem[18][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94878 q=soc.cpu.minerva.gprf.mem._mem[18][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94880 q=soc.cpu.minerva.gprf.mem._mem[18][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94882 q=soc.cpu.minerva.gprf.mem._mem[18][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94884 q=soc.cpu.minerva.gprf.mem._mem[18][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94886 q=soc.cpu.minerva.gprf.mem._mem[18][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94888 q=soc.cpu.minerva.gprf.mem._mem[18][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94890 q=soc.cpu.minerva.gprf.mem._mem[18][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94892 q=soc.cpu.minerva.gprf.mem._mem[18][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94894 q=soc.cpu.minerva.gprf.mem._mem[18][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94896 q=soc.cpu.minerva.gprf.mem._mem[18][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94898 q=soc.cpu.minerva.gprf.mem._mem[18][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94900 q=soc.cpu.minerva.gprf.mem._mem[18][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94902 q=soc.cpu.minerva.gprf.mem._mem[18][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94904 q=soc.cpu.minerva.gprf.mem._mem[18][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94906 q=soc.cpu.minerva.gprf.mem._mem[18][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94908 q=soc.cpu.minerva.gprf.mem._mem[18][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94910 q=soc.cpu.minerva.gprf.mem._mem[18][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94912 q=soc.cpu.minerva.gprf.mem._mem[18][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94914 q=soc.cpu.minerva.gprf.mem._mem[18][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94916 q=soc.cpu.minerva.gprf.mem._mem[18][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94918 q=soc.cpu.minerva.gprf.mem._mem[18][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94920 q=soc.cpu.minerva.gprf.mem._mem[18][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94922 q=soc.cpu.minerva.gprf.mem._mem[18][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94926 q=soc.rom.spimemio.din_tag[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94930 q=soc.rom.spimemio.din_tag[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94934 q=soc.rom.spimemio.din_tag[2]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95064 q=soc.ram.ram[50][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95066 q=soc.ram.ram[50][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95068 q=soc.ram.ram[50][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95070 q=soc.ram.ram[50][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95072 q=soc.ram.ram[50][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95074 q=soc.ram.ram[50][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95076 q=soc.ram.ram[50][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95078 q=soc.ram.ram[50][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95080 q=soc.ram.ram[2][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95082 q=soc.ram.ram[2][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95084 q=soc.ram.ram[2][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95086 q=soc.ram.ram[2][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95088 q=soc.ram.ram[2][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95090 q=soc.ram.ram[2][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95092 q=soc.ram.ram[2][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95094 q=soc.ram.ram[2][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95096 q=soc.ram.ram[51][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95098 q=soc.ram.ram[51][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95100 q=soc.ram.ram[51][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95102 q=soc.ram.ram[51][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95104 q=soc.ram.ram[51][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95106 q=soc.ram.ram[51][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95108 q=soc.ram.ram[51][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95110 q=soc.ram.ram[51][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95112 q=soc.ram.ram[2][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95114 q=soc.ram.ram[2][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95116 q=soc.ram.ram[2][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95118 q=soc.ram.ram[2][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95120 q=soc.ram.ram[2][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95122 q=soc.ram.ram[2][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95124 q=soc.ram.ram[2][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95126 q=soc.ram.ram[2][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95128 q=soc.ram.ram[52][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95130 q=soc.ram.ram[52][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95132 q=soc.ram.ram[52][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95134 q=soc.ram.ram[52][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95136 q=soc.ram.ram[52][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95138 q=soc.ram.ram[52][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95140 q=soc.ram.ram[52][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95142 q=soc.ram.ram[52][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95144 q=soc.ram.ram[30][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95146 q=soc.ram.ram[30][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95148 q=soc.ram.ram[30][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95150 q=soc.ram.ram[30][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95152 q=soc.ram.ram[30][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95154 q=soc.ram.ram[30][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95156 q=soc.ram.ram[30][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95158 q=soc.ram.ram[30][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95160 q=soc.ram.ram[53][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95162 q=soc.ram.ram[53][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95164 q=soc.ram.ram[53][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95166 q=soc.ram.ram[53][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95168 q=soc.ram.ram[53][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95170 q=soc.ram.ram[53][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95172 q=soc.ram.ram[53][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95174 q=soc.ram.ram[53][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95176 q=soc.ram.ram[91][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95178 q=soc.ram.ram[91][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95180 q=soc.ram.ram[91][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95182 q=soc.ram.ram[91][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95184 q=soc.ram.ram[91][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95186 q=soc.ram.ram[91][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95188 q=soc.ram.ram[91][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95190 q=soc.ram.ram[91][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95192 q=soc.ram.ram[30][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95194 q=soc.ram.ram[30][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95196 q=soc.ram.ram[30][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95198 q=soc.ram.ram[30][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95200 q=soc.ram.ram[30][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95202 q=soc.ram.ram[30][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95204 q=soc.ram.ram[30][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95206 q=soc.ram.ram[30][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95208 q=soc.ram.ram[54][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95210 q=soc.ram.ram[54][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95212 q=soc.ram.ram[54][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95214 q=soc.ram.ram[54][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95216 q=soc.ram.ram[54][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95218 q=soc.ram.ram[54][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95220 q=soc.ram.ram[54][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95222 q=soc.ram.ram[54][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95224 q=soc.ram.ram[30][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95226 q=soc.ram.ram[30][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95228 q=soc.ram.ram[30][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95230 q=soc.ram.ram[30][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95232 q=soc.ram.ram[30][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95234 q=soc.ram.ram[30][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95236 q=soc.ram.ram[30][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95238 q=soc.ram.ram[30][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95240 q=soc.ram.ram[55][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95242 q=soc.ram.ram[55][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95244 q=soc.ram.ram[55][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95246 q=soc.ram.ram[55][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95248 q=soc.ram.ram[55][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95250 q=soc.ram.ram[55][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95252 q=soc.ram.ram[55][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95254 q=soc.ram.ram[55][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95256 q=soc.ram.ram[31][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95258 q=soc.ram.ram[31][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95260 q=soc.ram.ram[31][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95262 q=soc.ram.ram[31][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95264 q=soc.ram.ram[31][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95266 q=soc.ram.ram[31][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95268 q=soc.ram.ram[31][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95270 q=soc.ram.ram[31][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95272 q=soc.ram.ram[56][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95274 q=soc.ram.ram[56][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95276 q=soc.ram.ram[56][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95278 q=soc.ram.ram[56][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95280 q=soc.ram.ram[56][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95282 q=soc.ram.ram[56][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95284 q=soc.ram.ram[56][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95286 q=soc.ram.ram[56][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95288 q=soc.ram.ram[31][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95290 q=soc.ram.ram[31][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95292 q=soc.ram.ram[31][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95294 q=soc.ram.ram[31][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95296 q=soc.ram.ram[31][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95298 q=soc.ram.ram[31][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95300 q=soc.ram.ram[31][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95302 q=soc.ram.ram[31][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95304 q=soc.ram.ram[57][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95306 q=soc.ram.ram[57][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95308 q=soc.ram.ram[57][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95310 q=soc.ram.ram[57][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95312 q=soc.ram.ram[57][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95314 q=soc.ram.ram[57][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95316 q=soc.ram.ram[57][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95318 q=soc.ram.ram[57][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95320 q=soc.ram.ram[31][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95322 q=soc.ram.ram[31][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95324 q=soc.ram.ram[31][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95326 q=soc.ram.ram[31][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95328 q=soc.ram.ram[31][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95330 q=soc.ram.ram[31][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95332 q=soc.ram.ram[31][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95334 q=soc.ram.ram[31][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95336 q=soc.ram.ram[58][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95338 q=soc.ram.ram[58][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95340 q=soc.ram.ram[58][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95342 q=soc.ram.ram[58][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95344 q=soc.ram.ram[58][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95346 q=soc.ram.ram[58][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95348 q=soc.ram.ram[58][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95350 q=soc.ram.ram[58][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95352 q=soc.ram.ram[32][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95354 q=soc.ram.ram[32][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95356 q=soc.ram.ram[32][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95358 q=soc.ram.ram[32][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95360 q=soc.ram.ram[32][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95362 q=soc.ram.ram[32][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95364 q=soc.ram.ram[32][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95366 q=soc.ram.ram[32][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95368 q=soc.ram.ram[5][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95370 q=soc.ram.ram[5][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95372 q=soc.ram.ram[5][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95374 q=soc.ram.ram[5][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95376 q=soc.ram.ram[5][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95378 q=soc.ram.ram[5][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95380 q=soc.ram.ram[5][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95382 q=soc.ram.ram[5][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95384 q=soc.ram.ram[92][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95386 q=soc.ram.ram[92][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95388 q=soc.ram.ram[92][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95390 q=soc.ram.ram[92][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95392 q=soc.ram.ram[92][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95394 q=soc.ram.ram[92][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95396 q=soc.ram.ram[92][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95398 q=soc.ram.ram[92][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95400 q=soc.ram.ram[109][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95402 q=soc.ram.ram[109][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95404 q=soc.ram.ram[109][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95406 q=soc.ram.ram[109][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95408 q=soc.ram.ram[109][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95410 q=soc.ram.ram[109][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95412 q=soc.ram.ram[109][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95414 q=soc.ram.ram[109][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95416 q=soc.ram.ram[22][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95418 q=soc.ram.ram[22][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95420 q=soc.ram.ram[22][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95422 q=soc.ram.ram[22][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95424 q=soc.ram.ram[22][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95426 q=soc.ram.ram[22][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95428 q=soc.ram.ram[22][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95430 q=soc.ram.ram[22][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95432 q=soc.ram.ram[28][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95434 q=soc.ram.ram[28][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95436 q=soc.ram.ram[28][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95438 q=soc.ram.ram[28][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95440 q=soc.ram.ram[28][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95442 q=soc.ram.ram[28][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95444 q=soc.ram.ram[28][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95446 q=soc.ram.ram[28][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95448 q=soc.ram.ram[89][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95450 q=soc.ram.ram[89][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95452 q=soc.ram.ram[89][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95454 q=soc.ram.ram[89][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95456 q=soc.ram.ram[89][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95458 q=soc.ram.ram[89][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95460 q=soc.ram.ram[89][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95462 q=soc.ram.ram[89][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95464 q=soc.ram.ram[25][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95466 q=soc.ram.ram[25][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95468 q=soc.ram.ram[25][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95470 q=soc.ram.ram[25][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95472 q=soc.ram.ram[25][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95474 q=soc.ram.ram[25][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95476 q=soc.ram.ram[25][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95478 q=soc.ram.ram[25][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95480 q=soc.ram.ram[17][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95482 q=soc.ram.ram[17][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95484 q=soc.ram.ram[17][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95486 q=soc.ram.ram[17][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95488 q=soc.ram.ram[17][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95490 q=soc.ram.ram[17][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95492 q=soc.ram.ram[17][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95494 q=soc.ram.ram[17][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95496 q=soc.ram.ram[105][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95498 q=soc.ram.ram[105][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95500 q=soc.ram.ram[105][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95502 q=soc.ram.ram[105][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95504 q=soc.ram.ram[105][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95506 q=soc.ram.ram[105][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95508 q=soc.ram.ram[105][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95510 q=soc.ram.ram[105][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95512 q=soc.ram.ram[17][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95514 q=soc.ram.ram[17][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95516 q=soc.ram.ram[17][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95518 q=soc.ram.ram[17][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95520 q=soc.ram.ram[17][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95522 q=soc.ram.ram[17][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95524 q=soc.ram.ram[17][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95526 q=soc.ram.ram[17][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95528 q=soc.cpu.minerva.gprf.mem._mem[10][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95530 q=soc.cpu.minerva.gprf.mem._mem[10][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95532 q=soc.cpu.minerva.gprf.mem._mem[10][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95534 q=soc.cpu.minerva.gprf.mem._mem[10][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95536 q=soc.cpu.minerva.gprf.mem._mem[10][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95538 q=soc.cpu.minerva.gprf.mem._mem[10][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95540 q=soc.cpu.minerva.gprf.mem._mem[10][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95542 q=soc.cpu.minerva.gprf.mem._mem[10][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95544 q=soc.cpu.minerva.gprf.mem._mem[10][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95546 q=soc.cpu.minerva.gprf.mem._mem[10][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95548 q=soc.cpu.minerva.gprf.mem._mem[10][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95550 q=soc.cpu.minerva.gprf.mem._mem[10][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95552 q=soc.cpu.minerva.gprf.mem._mem[10][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95554 q=soc.cpu.minerva.gprf.mem._mem[10][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95556 q=soc.cpu.minerva.gprf.mem._mem[10][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95558 q=soc.cpu.minerva.gprf.mem._mem[10][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95560 q=soc.cpu.minerva.gprf.mem._mem[10][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95562 q=soc.cpu.minerva.gprf.mem._mem[10][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95564 q=soc.cpu.minerva.gprf.mem._mem[10][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95566 q=soc.cpu.minerva.gprf.mem._mem[10][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95568 q=soc.cpu.minerva.gprf.mem._mem[10][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95570 q=soc.cpu.minerva.gprf.mem._mem[10][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95572 q=soc.cpu.minerva.gprf.mem._mem[10][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95574 q=soc.cpu.minerva.gprf.mem._mem[10][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95576 q=soc.cpu.minerva.gprf.mem._mem[10][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95578 q=soc.cpu.minerva.gprf.mem._mem[10][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95580 q=soc.cpu.minerva.gprf.mem._mem[10][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95582 q=soc.cpu.minerva.gprf.mem._mem[10][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95584 q=soc.cpu.minerva.gprf.mem._mem[10][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95586 q=soc.cpu.minerva.gprf.mem._mem[10][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95588 q=soc.cpu.minerva.gprf.mem._mem[10][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95590 q=soc.cpu.minerva.gprf.mem._mem[10][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95592 q=soc.ram.ram[25][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95594 q=soc.ram.ram[25][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95596 q=soc.ram.ram[25][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95598 q=soc.ram.ram[25][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95600 q=soc.ram.ram[25][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95602 q=soc.ram.ram[25][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95604 q=soc.ram.ram[25][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95606 q=soc.ram.ram[25][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95608 q=soc.ram.ram[17][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95610 q=soc.ram.ram[17][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95612 q=soc.ram.ram[17][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95614 q=soc.ram.ram[17][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95616 q=soc.ram.ram[17][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95618 q=soc.ram.ram[17][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95620 q=soc.ram.ram[17][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95622 q=soc.ram.ram[17][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95626 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95630 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95634 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95638 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95642 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95646 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95650 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95654 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95658 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95662 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95666 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95670 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95674 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95678 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95682 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95686 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95688 q=soc.ram.ram[102][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95690 q=soc.ram.ram[102][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95692 q=soc.ram.ram[102][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95694 q=soc.ram.ram[102][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95696 q=soc.ram.ram[102][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95698 q=soc.ram.ram[102][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95700 q=soc.ram.ram[102][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95702 q=soc.ram.ram[102][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95706 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95710 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95714 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95718 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95722 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95726 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95730 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95734 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95736 q=soc.ram.ram[16][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95738 q=soc.ram.ram[16][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95740 q=soc.ram.ram[16][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95742 q=soc.ram.ram[16][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95744 q=soc.ram.ram[16][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95746 q=soc.ram.ram[16][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95748 q=soc.ram.ram[16][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95750 q=soc.ram.ram[16][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95752 q=soc.ram.ram[23][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95754 q=soc.ram.ram[23][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95756 q=soc.ram.ram[23][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95758 q=soc.ram.ram[23][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95760 q=soc.ram.ram[23][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95762 q=soc.ram.ram[23][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95764 q=soc.ram.ram[23][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95766 q=soc.ram.ram[23][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95768 q=soc.ram.ram[125][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95770 q=soc.ram.ram[125][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95772 q=soc.ram.ram[125][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95774 q=soc.ram.ram[125][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95776 q=soc.ram.ram[125][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95778 q=soc.ram.ram[125][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95780 q=soc.ram.ram[125][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95782 q=soc.ram.ram[125][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95784 q=soc.ram.ram[125][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95786 q=soc.ram.ram[125][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95788 q=soc.ram.ram[125][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95790 q=soc.ram.ram[125][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95792 q=soc.ram.ram[125][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95794 q=soc.ram.ram[125][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95796 q=soc.ram.ram[125][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95798 q=soc.ram.ram[125][15]
-.subckt sff1_x4 ck=io_in[0] i=soc.rom.spimemio.xfer.xfer_tag[0] q=soc.rom.spimemio.dout_tag[0]
-.subckt sff1_x4 ck=io_in[0] i=soc.rom.spimemio.xfer.xfer_tag[1] q=soc.rom.spimemio.dout_tag[1]
-.subckt sff1_x4 ck=io_in[0] i=soc.rom.spimemio.xfer.xfer_tag[2] q=soc.rom.spimemio.dout_tag[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95800 q=soc.ram.ram[83][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95802 q=soc.ram.ram[83][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95804 q=soc.ram.ram[83][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95806 q=soc.ram.ram[83][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95808 q=soc.ram.ram[83][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95810 q=soc.ram.ram[83][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95812 q=soc.ram.ram[83][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95814 q=soc.ram.ram[83][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95816 q=soc.ram.ram[83][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95818 q=soc.ram.ram[83][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95820 q=soc.ram.ram[83][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95822 q=soc.ram.ram[83][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95824 q=soc.ram.ram[83][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95826 q=soc.ram.ram[83][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95828 q=soc.ram.ram[83][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95830 q=soc.ram.ram[83][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95832 q=soc.ram.ram[84][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95834 q=soc.ram.ram[84][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95836 q=soc.ram.ram[84][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95838 q=soc.ram.ram[84][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95840 q=soc.ram.ram[84][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95842 q=soc.ram.ram[84][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95844 q=soc.ram.ram[84][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95846 q=soc.ram.ram[84][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95848 q=soc.ram.ram[84][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95850 q=soc.ram.ram[84][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95852 q=soc.ram.ram[84][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95854 q=soc.ram.ram[84][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95856 q=soc.ram.ram[84][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95858 q=soc.ram.ram[84][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95860 q=soc.ram.ram[84][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95862 q=soc.ram.ram[84][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95864 q=soc.ram.ram[84][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95866 q=soc.ram.ram[84][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95868 q=soc.ram.ram[84][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95870 q=soc.ram.ram[84][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95872 q=soc.ram.ram[84][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95874 q=soc.ram.ram[84][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95876 q=soc.ram.ram[84][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95878 q=soc.ram.ram[84][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95880 q=soc.ram.ram[85][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95882 q=soc.ram.ram[85][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95884 q=soc.ram.ram[85][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95886 q=soc.ram.ram[85][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95888 q=soc.ram.ram[85][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95890 q=soc.ram.ram[85][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95892 q=soc.ram.ram[85][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95894 q=soc.ram.ram[85][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95896 q=soc.ram.ram[85][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95898 q=soc.ram.ram[85][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95900 q=soc.ram.ram[85][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95902 q=soc.ram.ram[85][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95904 q=soc.ram.ram[85][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95906 q=soc.ram.ram[85][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95908 q=soc.ram.ram[85][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95910 q=soc.ram.ram[85][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95912 q=soc.ram.ram[85][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95914 q=soc.ram.ram[85][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95916 q=soc.ram.ram[85][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95918 q=soc.ram.ram[85][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95920 q=soc.ram.ram[85][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95922 q=soc.ram.ram[85][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95924 q=soc.ram.ram[85][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95926 q=soc.ram.ram[85][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95928 q=soc.ram.ram[86][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95930 q=soc.ram.ram[86][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95932 q=soc.ram.ram[86][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95934 q=soc.ram.ram[86][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95936 q=soc.ram.ram[86][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95938 q=soc.ram.ram[86][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95940 q=soc.ram.ram[86][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95942 q=soc.ram.ram[86][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95944 q=soc.ram.ram[86][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95946 q=soc.ram.ram[86][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95948 q=soc.ram.ram[86][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95950 q=soc.ram.ram[86][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95952 q=soc.ram.ram[86][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95954 q=soc.ram.ram[86][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95956 q=soc.ram.ram[86][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95958 q=soc.ram.ram[86][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95960 q=soc.ram.ram[86][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95962 q=soc.ram.ram[86][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95964 q=soc.ram.ram[86][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95966 q=soc.ram.ram[86][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95968 q=soc.ram.ram[86][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95970 q=soc.ram.ram[86][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95972 q=soc.ram.ram[86][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95974 q=soc.ram.ram[86][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95976 q=soc.ram.ram[87][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95978 q=soc.ram.ram[87][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95980 q=soc.ram.ram[87][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95982 q=soc.ram.ram[87][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95984 q=soc.ram.ram[87][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95986 q=soc.ram.ram[87][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95988 q=soc.ram.ram[87][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95990 q=soc.ram.ram[87][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95992 q=soc.ram.ram[87][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95994 q=soc.ram.ram[87][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95996 q=soc.ram.ram[87][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95998 q=soc.ram.ram[87][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96000 q=soc.ram.ram[87][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96002 q=soc.ram.ram[87][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96004 q=soc.ram.ram[87][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96006 q=soc.ram.ram[87][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96008 q=soc.ram.ram[87][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96010 q=soc.ram.ram[87][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96012 q=soc.ram.ram[87][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96014 q=soc.ram.ram[87][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96016 q=soc.ram.ram[87][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96018 q=soc.ram.ram[87][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96020 q=soc.ram.ram[87][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96022 q=soc.ram.ram[87][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96024 q=soc.ram.ram[88][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96026 q=soc.ram.ram[88][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96028 q=soc.ram.ram[88][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96030 q=soc.ram.ram[88][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96032 q=soc.ram.ram[88][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96034 q=soc.ram.ram[88][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96036 q=soc.ram.ram[88][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96038 q=soc.ram.ram[88][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96040 q=soc.ram.ram[88][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96042 q=soc.ram.ram[88][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96044 q=soc.ram.ram[88][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96046 q=soc.ram.ram[88][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96048 q=soc.ram.ram[88][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96050 q=soc.ram.ram[88][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96052 q=soc.ram.ram[88][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96054 q=soc.ram.ram[88][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96056 q=soc.ram.ram[88][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96058 q=soc.ram.ram[88][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96060 q=soc.ram.ram[88][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96062 q=soc.ram.ram[88][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96064 q=soc.ram.ram[88][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96066 q=soc.ram.ram[88][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96068 q=soc.ram.ram[88][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96070 q=soc.ram.ram[88][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96072 q=soc.ram.ram[89][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96074 q=soc.ram.ram[89][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96076 q=soc.ram.ram[89][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96078 q=soc.ram.ram[89][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96080 q=soc.ram.ram[89][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96082 q=soc.ram.ram[89][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96084 q=soc.ram.ram[89][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96086 q=soc.ram.ram[89][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96088 q=soc.ram.ram[89][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96090 q=soc.ram.ram[89][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96092 q=soc.ram.ram[89][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96094 q=soc.ram.ram[89][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96096 q=soc.ram.ram[89][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96098 q=soc.ram.ram[89][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96100 q=soc.ram.ram[89][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96102 q=soc.ram.ram[89][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96104 q=soc.ram.ram[89][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96106 q=soc.ram.ram[89][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96108 q=soc.ram.ram[89][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96110 q=soc.ram.ram[89][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96112 q=soc.ram.ram[89][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96114 q=soc.ram.ram[89][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96116 q=soc.ram.ram[89][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96118 q=soc.ram.ram[89][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96120 q=soc.ram.ram[8][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96122 q=soc.ram.ram[8][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96124 q=soc.ram.ram[8][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96126 q=soc.ram.ram[8][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96128 q=soc.ram.ram[8][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96130 q=soc.ram.ram[8][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96132 q=soc.ram.ram[8][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96134 q=soc.ram.ram[8][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96136 q=soc.ram.ram[8][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96138 q=soc.ram.ram[8][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96140 q=soc.ram.ram[8][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96142 q=soc.ram.ram[8][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96144 q=soc.ram.ram[8][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96146 q=soc.ram.ram[8][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96148 q=soc.ram.ram[8][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96150 q=soc.ram.ram[8][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96152 q=soc.ram.ram[8][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96154 q=soc.ram.ram[8][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96156 q=soc.ram.ram[8][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96158 q=soc.ram.ram[8][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96160 q=soc.ram.ram[8][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96162 q=soc.ram.ram[8][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96164 q=soc.ram.ram[8][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96166 q=soc.ram.ram[8][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96168 q=soc.ram.ram[90][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96170 q=soc.ram.ram[90][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96172 q=soc.ram.ram[90][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96174 q=soc.ram.ram[90][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96176 q=soc.ram.ram[90][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96178 q=soc.ram.ram[90][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96180 q=soc.ram.ram[90][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96182 q=soc.ram.ram[90][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96184 q=soc.ram.ram[90][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96186 q=soc.ram.ram[90][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96188 q=soc.ram.ram[90][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96190 q=soc.ram.ram[90][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96192 q=soc.ram.ram[90][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96194 q=soc.ram.ram[90][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96196 q=soc.ram.ram[90][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96198 q=soc.ram.ram[90][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96200 q=soc.ram.ram[90][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96202 q=soc.ram.ram[90][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96204 q=soc.ram.ram[90][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96206 q=soc.ram.ram[90][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96208 q=soc.ram.ram[90][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96210 q=soc.ram.ram[90][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96212 q=soc.ram.ram[90][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96214 q=soc.ram.ram[90][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96216 q=soc.ram.ram[91][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96218 q=soc.ram.ram[91][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96220 q=soc.ram.ram[91][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96222 q=soc.ram.ram[91][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96224 q=soc.ram.ram[91][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96226 q=soc.ram.ram[91][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96228 q=soc.ram.ram[91][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96230 q=soc.ram.ram[91][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96232 q=soc.ram.ram[91][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96234 q=soc.ram.ram[91][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96236 q=soc.ram.ram[91][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96238 q=soc.ram.ram[91][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96240 q=soc.ram.ram[91][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96242 q=soc.ram.ram[91][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96244 q=soc.ram.ram[91][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96246 q=soc.ram.ram[91][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96250 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96254 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96258 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96262 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96266 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96270 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96274 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96278 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96282 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96286 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96290 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96294 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96298 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96302 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96306 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96310 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96314 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96318 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96322 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96326 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96330 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96334 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96338 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96342 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96346 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96350 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96354 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96356 q=soc.ram.ram[100][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96358 q=soc.ram.ram[100][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96360 q=soc.ram.ram[100][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96362 q=soc.ram.ram[100][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96364 q=soc.ram.ram[100][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96366 q=soc.ram.ram[100][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96368 q=soc.ram.ram[100][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96370 q=soc.ram.ram[100][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96372 q=soc.ram.ram[27][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96374 q=soc.ram.ram[27][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96376 q=soc.ram.ram[27][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96378 q=soc.ram.ram[27][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96380 q=soc.ram.ram[27][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96382 q=soc.ram.ram[27][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96384 q=soc.ram.ram[27][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96386 q=soc.ram.ram[27][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96388 q=soc.ram.ram[32][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96390 q=soc.ram.ram[32][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96392 q=soc.ram.ram[32][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96394 q=soc.ram.ram[32][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96396 q=soc.ram.ram[32][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96398 q=soc.ram.ram[32][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96400 q=soc.ram.ram[32][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96402 q=soc.ram.ram[32][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96404 q=soc.ram.ram[15][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96406 q=soc.ram.ram[15][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96408 q=soc.ram.ram[15][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96410 q=soc.ram.ram[15][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96412 q=soc.ram.ram[15][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96414 q=soc.ram.ram[15][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96416 q=soc.ram.ram[15][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96418 q=soc.ram.ram[15][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96420 q=soc.ram.ram[22][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96422 q=soc.ram.ram[22][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96424 q=soc.ram.ram[22][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96426 q=soc.ram.ram[22][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96428 q=soc.ram.ram[22][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96430 q=soc.ram.ram[22][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96432 q=soc.ram.ram[22][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96434 q=soc.ram.ram[22][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96436 q=soc.ram.ram[27][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96438 q=soc.ram.ram[27][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96440 q=soc.ram.ram[27][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96442 q=soc.ram.ram[27][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96444 q=soc.ram.ram[27][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96446 q=soc.ram.ram[27][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96448 q=soc.ram.ram[27][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96450 q=soc.ram.ram[27][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96452 q=soc.ram.ram[40][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96454 q=soc.ram.ram[40][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96456 q=soc.ram.ram[40][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96458 q=soc.ram.ram[40][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96460 q=soc.ram.ram[40][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96462 q=soc.ram.ram[40][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96464 q=soc.ram.ram[40][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96466 q=soc.ram.ram[40][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96470 q=soc.rom.spimemio.xfer.count[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96474 q=soc.rom.spimemio.xfer.count[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96476 q=soc.ram.ram[26][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96478 q=soc.ram.ram[26][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96480 q=soc.ram.ram[26][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96482 q=soc.ram.ram[26][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96484 q=soc.ram.ram[26][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96486 q=soc.ram.ram[26][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96488 q=soc.ram.ram[26][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96490 q=soc.ram.ram[26][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96492 q=soc.ram.ram[24][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96494 q=soc.ram.ram[24][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96496 q=soc.ram.ram[24][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96498 q=soc.ram.ram[24][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96500 q=soc.ram.ram[24][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96502 q=soc.ram.ram[24][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96504 q=soc.ram.ram[24][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96506 q=soc.ram.ram[24][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96508 q=soc.ram.ram[39][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96510 q=soc.ram.ram[39][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96512 q=soc.ram.ram[39][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96514 q=soc.ram.ram[39][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96516 q=soc.ram.ram[39][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96518 q=soc.ram.ram[39][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96520 q=soc.ram.ram[39][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96522 q=soc.ram.ram[39][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96524 q=soc.ram.ram[3][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96526 q=soc.ram.ram[3][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96528 q=soc.ram.ram[3][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96530 q=soc.ram.ram[3][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96532 q=soc.ram.ram[3][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96534 q=soc.ram.ram[3][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96536 q=soc.ram.ram[3][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96538 q=soc.ram.ram[3][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96540 q=soc.ram.ram[26][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96542 q=soc.ram.ram[26][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96544 q=soc.ram.ram[26][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96546 q=soc.ram.ram[26][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96548 q=soc.ram.ram[26][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96550 q=soc.ram.ram[26][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96552 q=soc.ram.ram[26][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96554 q=soc.ram.ram[26][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96556 q=soc.ram.ram[38][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96558 q=soc.ram.ram[38][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96560 q=soc.ram.ram[38][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96562 q=soc.ram.ram[38][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96564 q=soc.ram.ram[38][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96566 q=soc.ram.ram[38][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96568 q=soc.ram.ram[38][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96570 q=soc.ram.ram[38][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96572 q=soc.ram.ram[23][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96574 q=soc.ram.ram[23][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96576 q=soc.ram.ram[23][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96578 q=soc.ram.ram[23][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96580 q=soc.ram.ram[23][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96582 q=soc.ram.ram[23][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96584 q=soc.ram.ram[23][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96586 q=soc.ram.ram[23][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96588 q=soc.ram.ram[15][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96590 q=soc.ram.ram[15][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96592 q=soc.ram.ram[15][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96594 q=soc.ram.ram[15][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96596 q=soc.ram.ram[15][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96598 q=soc.ram.ram[15][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96600 q=soc.ram.ram[15][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96602 q=soc.ram.ram[15][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96604 q=soc.ram.ram[20][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96606 q=soc.ram.ram[20][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96608 q=soc.ram.ram[20][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96610 q=soc.ram.ram[20][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96612 q=soc.ram.ram[20][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96614 q=soc.ram.ram[20][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96616 q=soc.ram.ram[20][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96618 q=soc.ram.ram[20][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96620 q=soc.ram.ram[31][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96622 q=soc.ram.ram[31][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96624 q=soc.ram.ram[31][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96626 q=soc.ram.ram[31][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96628 q=soc.ram.ram[31][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96630 q=soc.ram.ram[31][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96632 q=soc.ram.ram[31][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96634 q=soc.ram.ram[31][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96636 q=soc.ram.ram[49][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96638 q=soc.ram.ram[49][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96640 q=soc.ram.ram[49][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96642 q=soc.ram.ram[49][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96644 q=soc.ram.ram[49][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96646 q=soc.ram.ram[49][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96648 q=soc.ram.ram[49][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96650 q=soc.ram.ram[49][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96652 q=soc.rom.spimemio.rd_addr[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96654 q=soc.rom.spimemio.rd_addr[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96656 q=soc.rom.spimemio.rd_addr[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96658 q=soc.rom.spimemio.rd_addr[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96660 q=soc.rom.spimemio.rd_addr[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96662 q=soc.rom.spimemio.rd_addr[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96664 q=soc.rom.spimemio.rd_addr[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96666 q=soc.rom.spimemio.rd_addr[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96668 q=soc.rom.spimemio.rd_addr[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96670 q=soc.rom.spimemio.rd_addr[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96672 q=soc.rom.spimemio.rd_addr[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96674 q=soc.rom.spimemio.rd_addr[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96676 q=soc.rom.spimemio.rd_addr[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96678 q=soc.rom.spimemio.rd_addr[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96680 q=soc.rom.spimemio.rd_addr[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96682 q=soc.rom.spimemio.rd_addr[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96684 q=soc.rom.spimemio.rd_addr[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96686 q=soc.rom.spimemio.rd_addr[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96688 q=soc.rom.spimemio.rd_addr[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96690 q=soc.rom.spimemio.rd_addr[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96692 q=soc.rom.spimemio.rd_addr[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96694 q=soc.rom.spimemio.rd_addr[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96696 q=soc.ram.ram[23][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96698 q=soc.ram.ram[23][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96700 q=soc.ram.ram[23][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96702 q=soc.ram.ram[23][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96704 q=soc.ram.ram[23][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96706 q=soc.ram.ram[23][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96708 q=soc.ram.ram[23][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96710 q=soc.ram.ram[23][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96712 q=soc.ram.ram[15][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96714 q=soc.ram.ram[15][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96716 q=soc.ram.ram[15][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96718 q=soc.ram.ram[15][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96720 q=soc.ram.ram[15][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96722 q=soc.ram.ram[15][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96724 q=soc.ram.ram[15][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96726 q=soc.ram.ram[15][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96728 q=soc.rom.spimemio.buffer[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96730 q=soc.rom.spimemio.buffer[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96732 q=soc.rom.spimemio.buffer[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96734 q=soc.rom.spimemio.buffer[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96736 q=soc.rom.spimemio.buffer[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96738 q=soc.rom.spimemio.buffer[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96740 q=soc.rom.spimemio.buffer[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96742 q=soc.rom.spimemio.buffer[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96744 q=soc.ram.ram[30][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96746 q=soc.ram.ram[30][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96748 q=soc.ram.ram[30][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96750 q=soc.ram.ram[30][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96752 q=soc.ram.ram[30][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96754 q=soc.ram.ram[30][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96756 q=soc.ram.ram[30][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96758 q=soc.ram.ram[30][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96760 q=soc.rom.spimemio.buffer[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96762 q=soc.rom.spimemio.buffer[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96764 q=soc.rom.spimemio.buffer[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96766 q=soc.rom.spimemio.buffer[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96768 q=soc.rom.spimemio.buffer[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96770 q=soc.rom.spimemio.buffer[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96772 q=soc.rom.spimemio.buffer[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96774 q=soc.rom.spimemio.buffer[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96776 q=soc.ram.ram[59][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96778 q=soc.ram.ram[59][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96780 q=soc.ram.ram[59][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96782 q=soc.ram.ram[59][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96784 q=soc.ram.ram[59][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96786 q=soc.ram.ram[59][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96788 q=soc.ram.ram[59][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96790 q=soc.ram.ram[59][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96792 q=soc.ram.ram[21][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96794 q=soc.ram.ram[21][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96796 q=soc.ram.ram[21][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96798 q=soc.ram.ram[21][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96800 q=soc.ram.ram[21][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96802 q=soc.ram.ram[21][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96804 q=soc.ram.ram[21][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96806 q=soc.ram.ram[21][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96808 q=soc.ram.ram[23][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96810 q=soc.ram.ram[23][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96812 q=soc.ram.ram[23][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96814 q=soc.ram.ram[23][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96816 q=soc.ram.ram[23][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96818 q=soc.ram.ram[23][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96820 q=soc.ram.ram[23][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96822 q=soc.ram.ram[23][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96824 q=soc.ram.ram[16][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96826 q=soc.ram.ram[16][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96828 q=soc.ram.ram[16][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96830 q=soc.ram.ram[16][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96832 q=soc.ram.ram[16][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96834 q=soc.ram.ram[16][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96836 q=soc.ram.ram[16][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96838 q=soc.ram.ram[16][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96840 q=soc.cpu.minerva.gprf.mem._mem[9][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96842 q=soc.cpu.minerva.gprf.mem._mem[9][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96844 q=soc.cpu.minerva.gprf.mem._mem[9][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96846 q=soc.cpu.minerva.gprf.mem._mem[9][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96848 q=soc.cpu.minerva.gprf.mem._mem[9][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96850 q=soc.cpu.minerva.gprf.mem._mem[9][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96852 q=soc.cpu.minerva.gprf.mem._mem[9][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96854 q=soc.cpu.minerva.gprf.mem._mem[9][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96856 q=soc.cpu.minerva.gprf.mem._mem[9][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96858 q=soc.cpu.minerva.gprf.mem._mem[9][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96860 q=soc.cpu.minerva.gprf.mem._mem[9][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96862 q=soc.cpu.minerva.gprf.mem._mem[9][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96864 q=soc.cpu.minerva.gprf.mem._mem[9][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96866 q=soc.cpu.minerva.gprf.mem._mem[9][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96868 q=soc.cpu.minerva.gprf.mem._mem[9][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96870 q=soc.cpu.minerva.gprf.mem._mem[9][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96872 q=soc.cpu.minerva.gprf.mem._mem[9][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96874 q=soc.cpu.minerva.gprf.mem._mem[9][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96876 q=soc.cpu.minerva.gprf.mem._mem[9][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96878 q=soc.cpu.minerva.gprf.mem._mem[9][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96880 q=soc.cpu.minerva.gprf.mem._mem[9][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96882 q=soc.cpu.minerva.gprf.mem._mem[9][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96884 q=soc.cpu.minerva.gprf.mem._mem[9][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96886 q=soc.cpu.minerva.gprf.mem._mem[9][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96888 q=soc.cpu.minerva.gprf.mem._mem[9][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96890 q=soc.cpu.minerva.gprf.mem._mem[9][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96892 q=soc.cpu.minerva.gprf.mem._mem[9][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96894 q=soc.cpu.minerva.gprf.mem._mem[9][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96896 q=soc.cpu.minerva.gprf.mem._mem[9][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96898 q=soc.cpu.minerva.gprf.mem._mem[9][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96900 q=soc.cpu.minerva.gprf.mem._mem[9][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96902 q=soc.cpu.minerva.gprf.mem._mem[9][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96904 q=soc.ram.ram[2][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96906 q=soc.ram.ram[2][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96908 q=soc.ram.ram[2][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96910 q=soc.ram.ram[2][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96912 q=soc.ram.ram[2][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96914 q=soc.ram.ram[2][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96916 q=soc.ram.ram[2][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96918 q=soc.ram.ram[2][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96920 q=soc.ram.ram[26][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96922 q=soc.ram.ram[26][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96924 q=soc.ram.ram[26][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96926 q=soc.ram.ram[26][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96928 q=soc.ram.ram[26][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96930 q=soc.ram.ram[26][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96932 q=soc.ram.ram[26][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96934 q=soc.ram.ram[26][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96936 q=soc.ram.ram[69][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96938 q=soc.ram.ram[69][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96940 q=soc.ram.ram[69][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96942 q=soc.ram.ram[69][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96944 q=soc.ram.ram[69][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96946 q=soc.ram.ram[69][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96948 q=soc.ram.ram[69][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96950 q=soc.ram.ram[69][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96952 q=soc.ram.ram[14][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96954 q=soc.ram.ram[14][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96956 q=soc.ram.ram[14][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96958 q=soc.ram.ram[14][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96960 q=soc.ram.ram[14][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96962 q=soc.ram.ram[14][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96964 q=soc.ram.ram[14][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96966 q=soc.ram.ram[14][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96968 q=soc.ram.ram[20][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96970 q=soc.ram.ram[20][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96972 q=soc.ram.ram[20][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96974 q=soc.ram.ram[20][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96976 q=soc.ram.ram[20][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96978 q=soc.ram.ram[20][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96980 q=soc.ram.ram[20][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96982 q=soc.ram.ram[20][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96984 q=soc.ram.ram[26][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96986 q=soc.ram.ram[26][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96988 q=soc.ram.ram[26][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96990 q=soc.ram.ram[26][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96992 q=soc.ram.ram[26][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96994 q=soc.ram.ram[26][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96996 q=soc.ram.ram[26][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96998 q=soc.ram.ram[26][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97000 q=soc.ram.ram[21][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97002 q=soc.ram.ram[21][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97004 q=soc.ram.ram[21][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97006 q=soc.ram.ram[21][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97008 q=soc.ram.ram[21][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97010 q=soc.ram.ram[21][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97012 q=soc.ram.ram[21][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97014 q=soc.ram.ram[21][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97016 q=soc.ram.ram[16][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97018 q=soc.ram.ram[16][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97020 q=soc.ram.ram[16][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97022 q=soc.ram.ram[16][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97024 q=soc.ram.ram[16][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97026 q=soc.ram.ram[16][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97028 q=soc.ram.ram[16][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97030 q=soc.ram.ram[16][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97032 q=soc.ram.ram[20][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97034 q=soc.ram.ram[20][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97036 q=soc.ram.ram[20][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97038 q=soc.ram.ram[20][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97040 q=soc.ram.ram[20][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97042 q=soc.ram.ram[20][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97044 q=soc.ram.ram[20][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97046 q=soc.ram.ram[20][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97048 q=soc.ram.ram[37][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97050 q=soc.ram.ram[37][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97052 q=soc.ram.ram[37][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97054 q=soc.ram.ram[37][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97056 q=soc.ram.ram[37][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97058 q=soc.ram.ram[37][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97060 q=soc.ram.ram[37][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97062 q=soc.ram.ram[37][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97064 q=soc.ram.ram[22][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97066 q=soc.ram.ram[22][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97068 q=soc.ram.ram[22][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97070 q=soc.ram.ram[22][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97072 q=soc.ram.ram[22][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97074 q=soc.ram.ram[22][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97076 q=soc.ram.ram[22][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97078 q=soc.ram.ram[22][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97080 q=soc.ram.ram[19][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97082 q=soc.ram.ram[19][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97084 q=soc.ram.ram[19][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97086 q=soc.ram.ram[19][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97088 q=soc.ram.ram[19][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97090 q=soc.ram.ram[19][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97092 q=soc.ram.ram[19][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97094 q=soc.ram.ram[19][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97096 q=soc.ram.ram[79][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97098 q=soc.ram.ram[79][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97100 q=soc.ram.ram[79][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97102 q=soc.ram.ram[79][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97104 q=soc.ram.ram[79][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97106 q=soc.ram.ram[79][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97108 q=soc.ram.ram[79][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97110 q=soc.ram.ram[79][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97112 q=soc.ram.ram[14][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97114 q=soc.ram.ram[14][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97116 q=soc.ram.ram[14][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97118 q=soc.ram.ram[14][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97120 q=soc.ram.ram[14][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97122 q=soc.ram.ram[14][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97124 q=soc.ram.ram[14][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97126 q=soc.ram.ram[14][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97128 q=soc.ram.ram[20][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97130 q=soc.ram.ram[20][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97132 q=soc.ram.ram[20][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97134 q=soc.ram.ram[20][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97136 q=soc.ram.ram[20][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97138 q=soc.ram.ram[20][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97140 q=soc.ram.ram[20][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97142 q=soc.ram.ram[20][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97146 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97150 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97154 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97158 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97162 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97166 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97170 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97174 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97178 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97182 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97186 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97190 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97194 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97198 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97202 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97206 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97210 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97214 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97218 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97222 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97226 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97230 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97234 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97238 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97240 q=soc.ram.ram[1][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97242 q=soc.ram.ram[1][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97244 q=soc.ram.ram[1][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97246 q=soc.ram.ram[1][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97248 q=soc.ram.ram[1][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97250 q=soc.ram.ram[1][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97252 q=soc.ram.ram[1][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97254 q=soc.ram.ram[1][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97256 q=soc.ram.ram[29][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97258 q=soc.ram.ram[29][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97260 q=soc.ram.ram[29][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97262 q=soc.ram.ram[29][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97264 q=soc.ram.ram[29][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97266 q=soc.ram.ram[29][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97268 q=soc.ram.ram[29][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97270 q=soc.ram.ram[29][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97274 q=soc.hyperram.sr[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97278 q=soc.hyperram.sr[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97282 q=soc.hyperram.sr[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97286 q=soc.hyperram.sr[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97290 q=soc.hyperram.sr[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97294 q=soc.hyperram.sr[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97298 q=soc.hyperram.sr[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97302 q=soc.hyperram.sr[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97306 q=soc.hyperram.sr[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97310 q=soc.hyperram.sr[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97314 q=soc.hyperram.sr[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97318 q=soc.hyperram.sr[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97322 q=soc.hyperram.sr[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97326 q=soc.hyperram.sr[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97330 q=soc.hyperram.sr[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97334 q=soc.hyperram.sr[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97336 q=soc.ram.ram[83][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97338 q=soc.ram.ram[83][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97340 q=soc.ram.ram[83][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97342 q=soc.ram.ram[83][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97344 q=soc.ram.ram[83][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97346 q=soc.ram.ram[83][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97348 q=soc.ram.ram[83][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97350 q=soc.ram.ram[83][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97352 q=soc.ram.ram[118][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97354 q=soc.ram.ram[118][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97356 q=soc.ram.ram[118][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97358 q=soc.ram.ram[118][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97360 q=soc.ram.ram[118][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97362 q=soc.ram.ram[118][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97364 q=soc.ram.ram[118][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97366 q=soc.ram.ram[118][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97368 q=soc.ram.ram[125][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97370 q=soc.ram.ram[125][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97372 q=soc.ram.ram[125][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97374 q=soc.ram.ram[125][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97376 q=soc.ram.ram[125][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97378 q=soc.ram.ram[125][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97380 q=soc.ram.ram[125][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97382 q=soc.ram.ram[125][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97384 q=soc.ram.ram[124][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97386 q=soc.ram.ram[124][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97388 q=soc.ram.ram[124][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97390 q=soc.ram.ram[124][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97392 q=soc.ram.ram[124][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97394 q=soc.ram.ram[124][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97396 q=soc.ram.ram[124][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97398 q=soc.ram.ram[124][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97400 q=soc.ram.ram[123][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97402 q=soc.ram.ram[123][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97404 q=soc.ram.ram[123][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97406 q=soc.ram.ram[123][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97408 q=soc.ram.ram[123][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97410 q=soc.ram.ram[123][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97412 q=soc.ram.ram[123][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97414 q=soc.ram.ram[123][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97416 q=soc.ram.ram[51][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97418 q=soc.ram.ram[51][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97420 q=soc.ram.ram[51][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97422 q=soc.ram.ram[51][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97424 q=soc.ram.ram[51][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97426 q=soc.ram.ram[51][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97428 q=soc.ram.ram[51][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97430 q=soc.ram.ram[51][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97432 q=soc.ram.ram[50][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97434 q=soc.ram.ram[50][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97436 q=soc.ram.ram[50][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97438 q=soc.ram.ram[50][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97440 q=soc.ram.ram[50][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97442 q=soc.ram.ram[50][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97444 q=soc.ram.ram[50][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97446 q=soc.ram.ram[50][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97448 q=soc.ram.ram[122][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97450 q=soc.ram.ram[122][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97452 q=soc.ram.ram[122][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97454 q=soc.ram.ram[122][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97456 q=soc.ram.ram[122][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97458 q=soc.ram.ram[122][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97460 q=soc.ram.ram[122][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97462 q=soc.ram.ram[122][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97464 q=soc.ram.ram[51][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97466 q=soc.ram.ram[51][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97468 q=soc.ram.ram[51][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97470 q=soc.ram.ram[51][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97472 q=soc.ram.ram[51][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97474 q=soc.ram.ram[51][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97476 q=soc.ram.ram[51][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97478 q=soc.ram.ram[51][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97480 q=soc.ram.ram[126][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97482 q=soc.ram.ram[126][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97484 q=soc.ram.ram[126][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97486 q=soc.ram.ram[126][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97488 q=soc.ram.ram[126][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97490 q=soc.ram.ram[126][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97492 q=soc.ram.ram[126][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97494 q=soc.ram.ram[126][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97496 q=soc.ram.ram[52][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97498 q=soc.ram.ram[52][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97500 q=soc.ram.ram[52][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97502 q=soc.ram.ram[52][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97504 q=soc.ram.ram[52][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97506 q=soc.ram.ram[52][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97508 q=soc.ram.ram[52][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97510 q=soc.ram.ram[52][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97512 q=soc.ram.ram[120][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97514 q=soc.ram.ram[120][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97516 q=soc.ram.ram[120][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97518 q=soc.ram.ram[120][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97520 q=soc.ram.ram[120][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97522 q=soc.ram.ram[120][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97524 q=soc.ram.ram[120][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97526 q=soc.ram.ram[120][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97528 q=soc.ram.ram[11][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97530 q=soc.ram.ram[11][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97532 q=soc.ram.ram[11][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97534 q=soc.ram.ram[11][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97536 q=soc.ram.ram[11][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97538 q=soc.ram.ram[11][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97540 q=soc.ram.ram[11][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97542 q=soc.ram.ram[11][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97544 q=soc.ram.ram[52][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97546 q=soc.ram.ram[52][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97548 q=soc.ram.ram[52][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97550 q=soc.ram.ram[52][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97552 q=soc.ram.ram[52][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97554 q=soc.ram.ram[52][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97556 q=soc.ram.ram[52][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97558 q=soc.ram.ram[52][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97560 q=soc.ram.ram[52][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97562 q=soc.ram.ram[52][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97564 q=soc.ram.ram[52][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97566 q=soc.ram.ram[52][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97568 q=soc.ram.ram[52][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97570 q=soc.ram.ram[52][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97572 q=soc.ram.ram[52][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97574 q=soc.ram.ram[52][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97576 q=soc.ram.ram[51][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97578 q=soc.ram.ram[51][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97580 q=soc.ram.ram[51][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97582 q=soc.ram.ram[51][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97584 q=soc.ram.ram[51][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97586 q=soc.ram.ram[51][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97588 q=soc.ram.ram[51][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97590 q=soc.ram.ram[51][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97592 q=soc.ram.ram[50][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97594 q=soc.ram.ram[50][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97596 q=soc.ram.ram[50][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97598 q=soc.ram.ram[50][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97600 q=soc.ram.ram[50][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97602 q=soc.ram.ram[50][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97604 q=soc.ram.ram[50][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97606 q=soc.ram.ram[50][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97608 q=soc.ram.ram[50][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97610 q=soc.ram.ram[50][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97612 q=soc.ram.ram[50][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97614 q=soc.ram.ram[50][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97616 q=soc.ram.ram[50][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97618 q=soc.ram.ram[50][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97620 q=soc.ram.ram[50][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97622 q=soc.ram.ram[50][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97624 q=soc.ram.ram[121][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97626 q=soc.ram.ram[121][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97628 q=soc.ram.ram[121][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97630 q=soc.ram.ram[121][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97632 q=soc.ram.ram[121][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97634 q=soc.ram.ram[121][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97636 q=soc.ram.ram[121][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97638 q=soc.ram.ram[121][7]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[0] q=$\soc.ram.ram$rdreg[0]$q[0]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[1] q=$\soc.ram.ram$rdreg[0]$q[1]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[2] q=$\soc.ram.ram$rdreg[0]$q[2]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[3] q=$\soc.ram.ram$rdreg[0]$q[3]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[4] q=$\soc.ram.ram$rdreg[0]$q[4]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[5] q=$\soc.ram.ram$rdreg[0]$q[5]
-.subckt sff1_x4 ck=io_in[0] i=soc.ram.ram_r_addr[6] q=$\soc.ram.ram$rdreg[0]$q[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97640 q=soc.ram.ram[92][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97642 q=soc.ram.ram[92][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97644 q=soc.ram.ram[92][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97646 q=soc.ram.ram[92][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97648 q=soc.ram.ram[92][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97650 q=soc.ram.ram[92][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97652 q=soc.ram.ram[92][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97654 q=soc.ram.ram[92][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97656 q=soc.ram.ram[9][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97658 q=soc.ram.ram[9][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97660 q=soc.ram.ram[9][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97662 q=soc.ram.ram[9][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97664 q=soc.ram.ram[9][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97666 q=soc.ram.ram[9][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97668 q=soc.ram.ram[9][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97670 q=soc.ram.ram[9][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97672 q=soc.ram.ram[36][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97674 q=soc.ram.ram[36][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97676 q=soc.ram.ram[36][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97678 q=soc.ram.ram[36][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97680 q=soc.ram.ram[36][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97682 q=soc.ram.ram[36][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97684 q=soc.ram.ram[36][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97686 q=soc.ram.ram[36][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97688 q=soc.ram.ram[72][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97690 q=soc.ram.ram[72][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97692 q=soc.ram.ram[72][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97694 q=soc.ram.ram[72][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97696 q=soc.ram.ram[72][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97698 q=soc.ram.ram[72][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97700 q=soc.ram.ram[72][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97702 q=soc.ram.ram[72][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97704 q=soc.ram.ram[36][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97706 q=soc.ram.ram[36][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97708 q=soc.ram.ram[36][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97710 q=soc.ram.ram[36][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97712 q=soc.ram.ram[36][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97714 q=soc.ram.ram[36][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97716 q=soc.ram.ram[36][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97718 q=soc.ram.ram[36][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97720 q=soc.ram.ram[71][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97722 q=soc.ram.ram[71][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97724 q=soc.ram.ram[71][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97726 q=soc.ram.ram[71][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97728 q=soc.ram.ram[71][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97730 q=soc.ram.ram[71][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97732 q=soc.ram.ram[71][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97734 q=soc.ram.ram[71][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97736 q=soc.ram.ram[36][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97738 q=soc.ram.ram[36][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97740 q=soc.ram.ram[36][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97742 q=soc.ram.ram[36][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97744 q=soc.ram.ram[36][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97746 q=soc.ram.ram[36][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97748 q=soc.ram.ram[36][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97750 q=soc.ram.ram[36][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97752 q=soc.ram.ram[70][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97754 q=soc.ram.ram[70][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97756 q=soc.ram.ram[70][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97758 q=soc.ram.ram[70][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97760 q=soc.ram.ram[70][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97762 q=soc.ram.ram[70][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97764 q=soc.ram.ram[70][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97766 q=soc.ram.ram[70][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97768 q=soc.ram.ram[35][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97770 q=soc.ram.ram[35][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97772 q=soc.ram.ram[35][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97774 q=soc.ram.ram[35][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97776 q=soc.ram.ram[35][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97778 q=soc.ram.ram[35][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97780 q=soc.ram.ram[35][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97782 q=soc.ram.ram[35][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97784 q=soc.ram.ram[6][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97786 q=soc.ram.ram[6][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97788 q=soc.ram.ram[6][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97790 q=soc.ram.ram[6][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97792 q=soc.ram.ram[6][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97794 q=soc.ram.ram[6][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97796 q=soc.ram.ram[6][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97798 q=soc.ram.ram[6][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97800 q=soc.ram.ram[35][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97802 q=soc.ram.ram[35][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97804 q=soc.ram.ram[35][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97806 q=soc.ram.ram[35][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97808 q=soc.ram.ram[35][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97810 q=soc.ram.ram[35][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97812 q=soc.ram.ram[35][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97814 q=soc.ram.ram[35][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97816 q=soc.ram.ram[68][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97818 q=soc.ram.ram[68][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97820 q=soc.ram.ram[68][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97822 q=soc.ram.ram[68][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97824 q=soc.ram.ram[68][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97826 q=soc.ram.ram[68][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97828 q=soc.ram.ram[68][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97830 q=soc.ram.ram[68][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97832 q=soc.ram.ram[35][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97834 q=soc.ram.ram[35][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97836 q=soc.ram.ram[35][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97838 q=soc.ram.ram[35][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97840 q=soc.ram.ram[35][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97842 q=soc.ram.ram[35][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97844 q=soc.ram.ram[35][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97846 q=soc.ram.ram[35][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97848 q=soc.ram.ram[67][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97850 q=soc.ram.ram[67][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97852 q=soc.ram.ram[67][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97854 q=soc.ram.ram[67][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97856 q=soc.ram.ram[67][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97858 q=soc.ram.ram[67][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97860 q=soc.ram.ram[67][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97862 q=soc.ram.ram[67][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97864 q=soc.ram.ram[34][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97866 q=soc.ram.ram[34][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97868 q=soc.ram.ram[34][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97870 q=soc.ram.ram[34][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97872 q=soc.ram.ram[34][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97874 q=soc.ram.ram[34][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97876 q=soc.ram.ram[34][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97878 q=soc.ram.ram[34][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97880 q=soc.ram.ram[66][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97882 q=soc.ram.ram[66][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97884 q=soc.ram.ram[66][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97886 q=soc.ram.ram[66][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97888 q=soc.ram.ram[66][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97890 q=soc.ram.ram[66][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97892 q=soc.ram.ram[66][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97894 q=soc.ram.ram[66][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97896 q=soc.ram.ram[34][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97898 q=soc.ram.ram[34][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97900 q=soc.ram.ram[34][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97902 q=soc.ram.ram[34][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97904 q=soc.ram.ram[34][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97906 q=soc.ram.ram[34][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97908 q=soc.ram.ram[34][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97910 q=soc.ram.ram[34][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97912 q=soc.ram.ram[65][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97914 q=soc.ram.ram[65][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97916 q=soc.ram.ram[65][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97918 q=soc.ram.ram[65][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97920 q=soc.ram.ram[65][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97922 q=soc.ram.ram[65][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97924 q=soc.ram.ram[65][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97926 q=soc.ram.ram[65][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97928 q=soc.ram.ram[34][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97930 q=soc.ram.ram[34][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97932 q=soc.ram.ram[34][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97934 q=soc.ram.ram[34][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97936 q=soc.ram.ram[34][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97938 q=soc.ram.ram[34][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97940 q=soc.ram.ram[34][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97942 q=soc.ram.ram[34][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97944 q=soc.ram.ram[64][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97946 q=soc.ram.ram[64][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97948 q=soc.ram.ram[64][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97950 q=soc.ram.ram[64][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97952 q=soc.ram.ram[64][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97954 q=soc.ram.ram[64][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97956 q=soc.ram.ram[64][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97958 q=soc.ram.ram[64][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97960 q=soc.ram.ram[33][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97962 q=soc.ram.ram[33][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97964 q=soc.ram.ram[33][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97966 q=soc.ram.ram[33][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97968 q=soc.ram.ram[33][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97970 q=soc.ram.ram[33][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97972 q=soc.ram.ram[33][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97974 q=soc.ram.ram[33][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97976 q=soc.ram.ram[63][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97978 q=soc.ram.ram[63][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97980 q=soc.ram.ram[63][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97982 q=soc.ram.ram[63][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97984 q=soc.ram.ram[63][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97986 q=soc.ram.ram[63][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97988 q=soc.ram.ram[63][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97990 q=soc.ram.ram[63][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97992 q=soc.ram.ram[33][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97994 q=soc.ram.ram[33][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97996 q=soc.ram.ram[33][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97998 q=soc.ram.ram[33][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98000 q=soc.ram.ram[33][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98002 q=soc.ram.ram[33][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98004 q=soc.ram.ram[33][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98006 q=soc.ram.ram[33][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98008 q=soc.ram.ram[62][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98010 q=soc.ram.ram[62][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98012 q=soc.ram.ram[62][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98014 q=soc.ram.ram[62][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98016 q=soc.ram.ram[62][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98018 q=soc.ram.ram[62][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98020 q=soc.ram.ram[62][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98022 q=soc.ram.ram[62][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98024 q=soc.ram.ram[33][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98026 q=soc.ram.ram[33][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98028 q=soc.ram.ram[33][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98030 q=soc.ram.ram[33][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98032 q=soc.ram.ram[33][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98034 q=soc.ram.ram[33][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98036 q=soc.ram.ram[33][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98038 q=soc.ram.ram[33][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98040 q=soc.ram.ram[61][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98042 q=soc.ram.ram[61][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98044 q=soc.ram.ram[61][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98046 q=soc.ram.ram[61][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98048 q=soc.ram.ram[61][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98050 q=soc.ram.ram[61][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98052 q=soc.ram.ram[61][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98054 q=soc.ram.ram[61][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98056 q=soc.ram.ram[32][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98058 q=soc.ram.ram[32][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98060 q=soc.ram.ram[32][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98062 q=soc.ram.ram[32][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98064 q=soc.ram.ram[32][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98066 q=soc.ram.ram[32][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98068 q=soc.ram.ram[32][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98070 q=soc.ram.ram[32][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98072 q=soc.ram.ram[60][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98074 q=soc.ram.ram[60][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98076 q=soc.ram.ram[60][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98078 q=soc.ram.ram[60][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98080 q=soc.ram.ram[60][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98082 q=soc.ram.ram[60][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98084 q=soc.ram.ram[60][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98086 q=soc.ram.ram[60][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98088 q=soc.ram.ram[32][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98090 q=soc.ram.ram[32][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98092 q=soc.ram.ram[32][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98094 q=soc.ram.ram[32][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98096 q=soc.ram.ram[32][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98098 q=soc.ram.ram[32][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98100 q=soc.ram.ram[32][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98102 q=soc.ram.ram[32][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98104 q=soc.ram.ram[47][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98106 q=soc.ram.ram[47][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98108 q=soc.ram.ram[47][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98110 q=soc.ram.ram[47][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98112 q=soc.ram.ram[47][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98114 q=soc.ram.ram[47][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98116 q=soc.ram.ram[47][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98118 q=soc.ram.ram[47][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98120 q=soc.ram.ram[77][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98122 q=soc.ram.ram[77][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98124 q=soc.ram.ram[77][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98126 q=soc.ram.ram[77][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98128 q=soc.ram.ram[77][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98130 q=soc.ram.ram[77][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98132 q=soc.ram.ram[77][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98134 q=soc.ram.ram[77][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98136 q=soc.ram.ram[77][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98138 q=soc.ram.ram[77][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98140 q=soc.ram.ram[77][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98142 q=soc.ram.ram[77][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98144 q=soc.ram.ram[77][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98146 q=soc.ram.ram[77][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98148 q=soc.ram.ram[77][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98150 q=soc.ram.ram[77][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98152 q=soc.ram.ram[77][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98154 q=soc.ram.ram[77][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98156 q=soc.ram.ram[77][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98158 q=soc.ram.ram[77][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98160 q=soc.ram.ram[77][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98162 q=soc.ram.ram[77][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98164 q=soc.ram.ram[77][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98166 q=soc.ram.ram[77][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98168 q=soc.ram.ram[45][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98170 q=soc.ram.ram[45][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98172 q=soc.ram.ram[45][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98174 q=soc.ram.ram[45][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98176 q=soc.ram.ram[45][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98178 q=soc.ram.ram[45][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98180 q=soc.ram.ram[45][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98182 q=soc.ram.ram[45][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98184 q=soc.ram.ram[101][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98186 q=soc.ram.ram[101][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98188 q=soc.ram.ram[101][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98190 q=soc.ram.ram[101][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98192 q=soc.ram.ram[101][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98194 q=soc.ram.ram[101][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98196 q=soc.ram.ram[101][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98198 q=soc.ram.ram[101][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98200 q=soc.ram.ram[45][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98202 q=soc.ram.ram[45][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98204 q=soc.ram.ram[45][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98206 q=soc.ram.ram[45][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98208 q=soc.ram.ram[45][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98210 q=soc.ram.ram[45][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98212 q=soc.ram.ram[45][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98214 q=soc.ram.ram[45][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98216 q=soc.ram.ram[48][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98218 q=soc.ram.ram[48][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98220 q=soc.ram.ram[48][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98222 q=soc.ram.ram[48][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98224 q=soc.ram.ram[48][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98226 q=soc.ram.ram[48][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98228 q=soc.ram.ram[48][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98230 q=soc.ram.ram[48][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98232 q=soc.cpu.minerva.gprf.mem._mem[0][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98234 q=soc.cpu.minerva.gprf.mem._mem[0][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98236 q=soc.cpu.minerva.gprf.mem._mem[0][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98238 q=soc.cpu.minerva.gprf.mem._mem[0][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98240 q=soc.cpu.minerva.gprf.mem._mem[0][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98242 q=soc.cpu.minerva.gprf.mem._mem[0][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98244 q=soc.cpu.minerva.gprf.mem._mem[0][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98246 q=soc.cpu.minerva.gprf.mem._mem[0][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98248 q=soc.cpu.minerva.gprf.mem._mem[0][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98250 q=soc.cpu.minerva.gprf.mem._mem[0][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98252 q=soc.cpu.minerva.gprf.mem._mem[0][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98254 q=soc.cpu.minerva.gprf.mem._mem[0][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98256 q=soc.cpu.minerva.gprf.mem._mem[0][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98258 q=soc.cpu.minerva.gprf.mem._mem[0][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98260 q=soc.cpu.minerva.gprf.mem._mem[0][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98262 q=soc.cpu.minerva.gprf.mem._mem[0][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98264 q=soc.cpu.minerva.gprf.mem._mem[0][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98266 q=soc.cpu.minerva.gprf.mem._mem[0][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98268 q=soc.cpu.minerva.gprf.mem._mem[0][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98270 q=soc.cpu.minerva.gprf.mem._mem[0][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98272 q=soc.cpu.minerva.gprf.mem._mem[0][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98274 q=soc.cpu.minerva.gprf.mem._mem[0][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98276 q=soc.cpu.minerva.gprf.mem._mem[0][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98278 q=soc.cpu.minerva.gprf.mem._mem[0][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98280 q=soc.cpu.minerva.gprf.mem._mem[0][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98282 q=soc.cpu.minerva.gprf.mem._mem[0][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98284 q=soc.cpu.minerva.gprf.mem._mem[0][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98286 q=soc.cpu.minerva.gprf.mem._mem[0][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98288 q=soc.cpu.minerva.gprf.mem._mem[0][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98290 q=soc.cpu.minerva.gprf.mem._mem[0][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98292 q=soc.cpu.minerva.gprf.mem._mem[0][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98294 q=soc.cpu.minerva.gprf.mem._mem[0][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98296 q=soc.ram.ram[108][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98298 q=soc.ram.ram[108][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98300 q=soc.ram.ram[108][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98302 q=soc.ram.ram[108][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98304 q=soc.ram.ram[108][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98306 q=soc.ram.ram[108][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98308 q=soc.ram.ram[108][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98310 q=soc.ram.ram[108][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98312 q=soc.ram.ram[47][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98314 q=soc.ram.ram[47][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98316 q=soc.ram.ram[47][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98318 q=soc.ram.ram[47][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98320 q=soc.ram.ram[47][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98322 q=soc.ram.ram[47][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98324 q=soc.ram.ram[47][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98326 q=soc.ram.ram[47][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98328 q=soc.ram.ram[10][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98330 q=soc.ram.ram[10][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98332 q=soc.ram.ram[10][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98334 q=soc.ram.ram[10][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98336 q=soc.ram.ram[10][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98338 q=soc.ram.ram[10][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98340 q=soc.ram.ram[10][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98342 q=soc.ram.ram[10][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98344 q=soc.ram.ram[78][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98346 q=soc.ram.ram[78][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98348 q=soc.ram.ram[78][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98350 q=soc.ram.ram[78][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98352 q=soc.ram.ram[78][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98354 q=soc.ram.ram[78][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98356 q=soc.ram.ram[78][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98358 q=soc.ram.ram[78][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98360 q=soc.ram.ram[78][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98362 q=soc.ram.ram[78][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98364 q=soc.ram.ram[78][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98366 q=soc.ram.ram[78][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98368 q=soc.ram.ram[78][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98370 q=soc.ram.ram[78][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98372 q=soc.ram.ram[78][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98374 q=soc.ram.ram[78][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98376 q=soc.ram.ram[27][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98378 q=soc.ram.ram[27][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98380 q=soc.ram.ram[27][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98382 q=soc.ram.ram[27][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98384 q=soc.ram.ram[27][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98386 q=soc.ram.ram[27][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98388 q=soc.ram.ram[27][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98390 q=soc.ram.ram[27][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98394 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98398 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98402 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98406 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98410 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98414 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98418 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98422 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98426 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98430 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98434 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98438 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98442 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98446 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98450 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98454 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98458 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98462 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98466 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98470 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98474 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98478 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98482 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98486 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98488 q=soc.ram.ram[48][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98490 q=soc.ram.ram[48][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98492 q=soc.ram.ram[48][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98494 q=soc.ram.ram[48][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98496 q=soc.ram.ram[48][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98498 q=soc.ram.ram[48][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98500 q=soc.ram.ram[48][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98502 q=soc.ram.ram[48][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98504 q=soc.ram.ram[102][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98506 q=soc.ram.ram[102][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98508 q=soc.ram.ram[102][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98510 q=soc.ram.ram[102][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98512 q=soc.ram.ram[102][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98514 q=soc.ram.ram[102][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98516 q=soc.ram.ram[102][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98518 q=soc.ram.ram[102][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98520 q=soc.ram.ram[110][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98522 q=soc.ram.ram[110][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98524 q=soc.ram.ram[110][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98526 q=soc.ram.ram[110][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98528 q=soc.ram.ram[110][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98530 q=soc.ram.ram[110][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98532 q=soc.ram.ram[110][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98534 q=soc.ram.ram[110][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98536 q=soc.ram.ram[48][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98538 q=soc.ram.ram[48][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98540 q=soc.ram.ram[48][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98542 q=soc.ram.ram[48][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98544 q=soc.ram.ram[48][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98546 q=soc.ram.ram[48][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98548 q=soc.ram.ram[48][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98550 q=soc.ram.ram[48][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98552 q=soc.ram.ram[111][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98554 q=soc.ram.ram[111][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98556 q=soc.ram.ram[111][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98558 q=soc.ram.ram[111][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98560 q=soc.ram.ram[111][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98562 q=soc.ram.ram[111][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98564 q=soc.ram.ram[111][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98566 q=soc.ram.ram[111][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98568 q=soc.ram.ram[79][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98570 q=soc.ram.ram[79][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98572 q=soc.ram.ram[79][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98574 q=soc.ram.ram[79][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98576 q=soc.ram.ram[79][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98578 q=soc.ram.ram[79][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98580 q=soc.ram.ram[79][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98582 q=soc.ram.ram[79][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98584 q=soc.ram.ram[78][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98586 q=soc.ram.ram[78][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98588 q=soc.ram.ram[78][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98590 q=soc.ram.ram[78][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98592 q=soc.ram.ram[78][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98594 q=soc.ram.ram[78][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98596 q=soc.ram.ram[78][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98598 q=soc.ram.ram[78][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98600 q=soc.ram.ram[27][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98602 q=soc.ram.ram[27][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98604 q=soc.ram.ram[27][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98606 q=soc.ram.ram[27][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98608 q=soc.ram.ram[27][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98610 q=soc.ram.ram[27][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98612 q=soc.ram.ram[27][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98614 q=soc.ram.ram[27][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98618 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98622 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98626 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98630 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98634 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98638 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98642 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98646 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98650 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98654 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98658 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98662 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98666 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98670 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98674 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98678 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98680 q=soc.ram.ram[13][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98682 q=soc.ram.ram[13][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98684 q=soc.ram.ram[13][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98686 q=soc.ram.ram[13][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98688 q=soc.ram.ram[13][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98690 q=soc.ram.ram[13][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98692 q=soc.ram.ram[13][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98694 q=soc.ram.ram[13][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98696 q=soc.ram.ram[42][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98698 q=soc.ram.ram[42][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98700 q=soc.ram.ram[42][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98702 q=soc.ram.ram[42][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98704 q=soc.ram.ram[42][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98706 q=soc.ram.ram[42][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98708 q=soc.ram.ram[42][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98710 q=soc.ram.ram[42][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98712 q=soc.ram.ram[114][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98714 q=soc.ram.ram[114][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98716 q=soc.ram.ram[114][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98718 q=soc.ram.ram[114][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98720 q=soc.ram.ram[114][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98722 q=soc.ram.ram[114][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98724 q=soc.ram.ram[114][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98726 q=soc.ram.ram[114][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98728 q=soc.ram.ram[112][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98730 q=soc.ram.ram[112][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98732 q=soc.ram.ram[112][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98734 q=soc.ram.ram[112][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98736 q=soc.ram.ram[112][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98738 q=soc.ram.ram[112][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98740 q=soc.ram.ram[112][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98742 q=soc.ram.ram[112][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98744 q=soc.ram.ram[4][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98746 q=soc.ram.ram[4][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98748 q=soc.ram.ram[4][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98750 q=soc.ram.ram[4][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98752 q=soc.ram.ram[4][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98754 q=soc.ram.ram[4][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98756 q=soc.ram.ram[4][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98758 q=soc.ram.ram[4][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98760 q=soc.ram.ram[115][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98762 q=soc.ram.ram[115][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98764 q=soc.ram.ram[115][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98766 q=soc.ram.ram[115][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98768 q=soc.ram.ram[115][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98770 q=soc.ram.ram[115][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98772 q=soc.ram.ram[115][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98774 q=soc.ram.ram[115][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98776 q=soc.ram.ram[113][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98778 q=soc.ram.ram[113][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98780 q=soc.ram.ram[113][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98782 q=soc.ram.ram[113][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98784 q=soc.ram.ram[113][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98786 q=soc.ram.ram[113][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98788 q=soc.ram.ram[113][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98790 q=soc.ram.ram[113][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98792 q=soc.ram.ram[49][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98794 q=soc.ram.ram[49][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98796 q=soc.ram.ram[49][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98798 q=soc.ram.ram[49][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98800 q=soc.ram.ram[49][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98802 q=soc.ram.ram[49][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98804 q=soc.ram.ram[49][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98806 q=soc.ram.ram[49][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98808 q=soc.ram.ram[49][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98810 q=soc.ram.ram[49][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98812 q=soc.ram.ram[49][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98814 q=soc.ram.ram[49][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98816 q=soc.ram.ram[49][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98818 q=soc.ram.ram[49][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98820 q=soc.ram.ram[49][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98822 q=soc.ram.ram[49][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98824 q=soc.ram.ram[49][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98826 q=soc.ram.ram[49][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98828 q=soc.ram.ram[49][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98830 q=soc.ram.ram[49][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98832 q=soc.ram.ram[49][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98834 q=soc.ram.ram[49][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98836 q=soc.ram.ram[49][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98838 q=soc.ram.ram[49][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98840 q=soc.ram.ram[81][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98842 q=soc.ram.ram[81][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98844 q=soc.ram.ram[81][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98846 q=soc.ram.ram[81][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98848 q=soc.ram.ram[81][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98850 q=soc.ram.ram[81][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98852 q=soc.ram.ram[81][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98854 q=soc.ram.ram[81][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98856 q=soc.ram.ram[80][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98858 q=soc.ram.ram[80][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98860 q=soc.ram.ram[80][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98862 q=soc.ram.ram[80][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98864 q=soc.ram.ram[80][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98866 q=soc.ram.ram[80][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98868 q=soc.ram.ram[80][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98870 q=soc.ram.ram[80][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98872 q=soc.ram.ram[80][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98874 q=soc.ram.ram[80][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98876 q=soc.ram.ram[80][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98878 q=soc.ram.ram[80][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98880 q=soc.ram.ram[80][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98882 q=soc.ram.ram[80][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98884 q=soc.ram.ram[80][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98886 q=soc.ram.ram[80][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98888 q=soc.ram.ram[80][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98890 q=soc.ram.ram[80][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98892 q=soc.ram.ram[80][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98894 q=soc.ram.ram[80][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98896 q=soc.ram.ram[80][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98898 q=soc.ram.ram[80][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98900 q=soc.ram.ram[80][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98902 q=soc.ram.ram[80][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98904 q=soc.ram.ram[7][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98906 q=soc.ram.ram[7][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98908 q=soc.ram.ram[7][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98910 q=soc.ram.ram[7][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98912 q=soc.ram.ram[7][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98914 q=soc.ram.ram[7][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98916 q=soc.ram.ram[7][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98918 q=soc.ram.ram[7][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98920 q=soc.ram.ram[7][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98922 q=soc.ram.ram[7][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98924 q=soc.ram.ram[7][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98926 q=soc.ram.ram[7][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98928 q=soc.ram.ram[7][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98930 q=soc.ram.ram[7][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98932 q=soc.ram.ram[7][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98934 q=soc.ram.ram[7][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98936 q=soc.ram.ram[7][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98938 q=soc.ram.ram[7][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98940 q=soc.ram.ram[7][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98942 q=soc.ram.ram[7][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98944 q=soc.ram.ram[7][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98946 q=soc.ram.ram[7][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98948 q=soc.ram.ram[7][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98950 q=soc.ram.ram[7][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98952 q=soc.ram.ram[79][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98954 q=soc.ram.ram[79][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98956 q=soc.ram.ram[79][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98958 q=soc.ram.ram[79][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98960 q=soc.ram.ram[79][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98962 q=soc.ram.ram[79][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98964 q=soc.ram.ram[79][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98966 q=soc.ram.ram[79][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98968 q=soc.ram.ram[79][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98970 q=soc.ram.ram[79][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98972 q=soc.ram.ram[79][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98974 q=soc.ram.ram[79][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98976 q=soc.ram.ram[79][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98978 q=soc.ram.ram[79][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98980 q=soc.ram.ram[79][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98982 q=soc.ram.ram[79][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98984 q=soc.ram.ram[41][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98986 q=soc.ram.ram[41][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98988 q=soc.ram.ram[41][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98990 q=soc.ram.ram[41][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98992 q=soc.ram.ram[41][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98994 q=soc.ram.ram[41][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98996 q=soc.ram.ram[41][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98998 q=soc.ram.ram[41][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99002 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99006 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99010 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99014 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99018 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99022 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99026 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99030 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99032 q=soc.ram.ram[12][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99034 q=soc.ram.ram[12][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99036 q=soc.ram.ram[12][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99038 q=soc.ram.ram[12][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99040 q=soc.ram.ram[12][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99042 q=soc.ram.ram[12][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99044 q=soc.ram.ram[12][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99046 q=soc.ram.ram[12][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99048 q=soc.ram.ram[4][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99050 q=soc.ram.ram[4][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99052 q=soc.ram.ram[4][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99054 q=soc.ram.ram[4][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99056 q=soc.ram.ram[4][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99058 q=soc.ram.ram[4][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99060 q=soc.ram.ram[4][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99062 q=soc.ram.ram[4][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99064 q=soc.ram.ram[4][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99066 q=soc.ram.ram[4][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99068 q=soc.ram.ram[4][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99070 q=soc.ram.ram[4][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99072 q=soc.ram.ram[4][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99074 q=soc.ram.ram[4][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99076 q=soc.ram.ram[4][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99078 q=soc.ram.ram[4][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99080 q=soc.ram.ram[117][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99082 q=soc.ram.ram[117][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99084 q=soc.ram.ram[117][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99086 q=soc.ram.ram[117][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99088 q=soc.ram.ram[117][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99090 q=soc.ram.ram[117][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99092 q=soc.ram.ram[117][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99094 q=soc.ram.ram[117][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99096 q=soc.ram.ram[116][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99098 q=soc.ram.ram[116][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99100 q=soc.ram.ram[116][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99102 q=soc.ram.ram[116][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99104 q=soc.ram.ram[116][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99106 q=soc.ram.ram[116][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99108 q=soc.ram.ram[116][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99110 q=soc.ram.ram[116][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99112 q=soc.ram.ram[82][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99114 q=soc.ram.ram[82][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99116 q=soc.ram.ram[82][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99118 q=soc.ram.ram[82][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99120 q=soc.ram.ram[82][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99122 q=soc.ram.ram[82][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99124 q=soc.ram.ram[82][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99126 q=soc.ram.ram[82][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99128 q=soc.ram.ram[82][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99130 q=soc.ram.ram[82][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99132 q=soc.ram.ram[82][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99134 q=soc.ram.ram[82][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99136 q=soc.ram.ram[82][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99138 q=soc.ram.ram[82][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99140 q=soc.ram.ram[82][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99142 q=soc.ram.ram[82][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99144 q=soc.ram.ram[82][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99146 q=soc.ram.ram[82][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99148 q=soc.ram.ram[82][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99150 q=soc.ram.ram[82][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99152 q=soc.ram.ram[82][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99154 q=soc.ram.ram[82][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99156 q=soc.ram.ram[82][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99158 q=soc.ram.ram[82][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99160 q=soc.ram.ram[81][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99162 q=soc.ram.ram[81][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99164 q=soc.ram.ram[81][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99166 q=soc.ram.ram[81][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99168 q=soc.ram.ram[81][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99170 q=soc.ram.ram[81][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99172 q=soc.ram.ram[81][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99174 q=soc.ram.ram[81][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99176 q=soc.ram.ram[81][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99178 q=soc.ram.ram[81][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99180 q=soc.ram.ram[81][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99182 q=soc.ram.ram[81][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99184 q=soc.ram.ram[81][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99186 q=soc.ram.ram[81][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99188 q=soc.ram.ram[81][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99190 q=soc.ram.ram[81][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99192 q=soc.ram.ram[76][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99194 q=soc.ram.ram[76][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99196 q=soc.ram.ram[76][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99198 q=soc.ram.ram[76][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99200 q=soc.ram.ram[76][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99202 q=soc.ram.ram[76][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99204 q=soc.ram.ram[76][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99206 q=soc.ram.ram[76][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99208 q=soc.ram.ram[107][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99210 q=soc.ram.ram[107][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99212 q=soc.ram.ram[107][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99214 q=soc.ram.ram[107][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99216 q=soc.ram.ram[107][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99218 q=soc.ram.ram[107][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99220 q=soc.ram.ram[107][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99222 q=soc.ram.ram[107][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99224 q=soc.cpu.minerva.gprf.mem._mem[8][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99226 q=soc.cpu.minerva.gprf.mem._mem[8][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99228 q=soc.cpu.minerva.gprf.mem._mem[8][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99230 q=soc.cpu.minerva.gprf.mem._mem[8][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99232 q=soc.cpu.minerva.gprf.mem._mem[8][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99234 q=soc.cpu.minerva.gprf.mem._mem[8][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99236 q=soc.cpu.minerva.gprf.mem._mem[8][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99238 q=soc.cpu.minerva.gprf.mem._mem[8][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99240 q=soc.cpu.minerva.gprf.mem._mem[8][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99242 q=soc.cpu.minerva.gprf.mem._mem[8][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99244 q=soc.cpu.minerva.gprf.mem._mem[8][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99246 q=soc.cpu.minerva.gprf.mem._mem[8][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99248 q=soc.cpu.minerva.gprf.mem._mem[8][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99250 q=soc.cpu.minerva.gprf.mem._mem[8][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99252 q=soc.cpu.minerva.gprf.mem._mem[8][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99254 q=soc.cpu.minerva.gprf.mem._mem[8][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99256 q=soc.cpu.minerva.gprf.mem._mem[8][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99258 q=soc.cpu.minerva.gprf.mem._mem[8][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99260 q=soc.cpu.minerva.gprf.mem._mem[8][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99262 q=soc.cpu.minerva.gprf.mem._mem[8][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99264 q=soc.cpu.minerva.gprf.mem._mem[8][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99266 q=soc.cpu.minerva.gprf.mem._mem[8][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99268 q=soc.cpu.minerva.gprf.mem._mem[8][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99270 q=soc.cpu.minerva.gprf.mem._mem[8][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99272 q=soc.cpu.minerva.gprf.mem._mem[8][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99274 q=soc.cpu.minerva.gprf.mem._mem[8][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99276 q=soc.cpu.minerva.gprf.mem._mem[8][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99278 q=soc.cpu.minerva.gprf.mem._mem[8][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99280 q=soc.cpu.minerva.gprf.mem._mem[8][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99282 q=soc.cpu.minerva.gprf.mem._mem[8][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99284 q=soc.cpu.minerva.gprf.mem._mem[8][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99286 q=soc.cpu.minerva.gprf.mem._mem[8][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99288 q=soc.ram.ram[101][16]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99292 q=soc.ram.ram[101][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99294 q=soc.ram.ram[101][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99296 q=soc.ram.ram[101][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99298 q=soc.ram.ram[101][21]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99302 q=soc.ram.ram[101][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99304 q=soc.ram.ram[102][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99306 q=soc.ram.ram[102][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99308 q=soc.ram.ram[102][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99310 q=soc.ram.ram[102][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99312 q=soc.ram.ram[102][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99314 q=soc.ram.ram[102][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99316 q=soc.ram.ram[102][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99318 q=soc.ram.ram[102][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99320 q=soc.ram.ram[43][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99322 q=soc.ram.ram[43][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99324 q=soc.ram.ram[43][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99326 q=soc.ram.ram[43][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99328 q=soc.ram.ram[43][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99330 q=soc.ram.ram[43][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99332 q=soc.ram.ram[43][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99334 q=soc.ram.ram[43][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99336 q=soc.ram.ram[45][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99338 q=soc.ram.ram[45][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99340 q=soc.ram.ram[45][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99342 q=soc.ram.ram[45][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99344 q=soc.ram.ram[45][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99346 q=soc.ram.ram[45][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99348 q=soc.ram.ram[45][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99350 q=soc.ram.ram[45][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99352 q=soc.ram.ram[13][8]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99356 q=soc.ram.ram[13][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99358 q=soc.ram.ram[13][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99360 q=soc.ram.ram[13][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99362 q=soc.ram.ram[13][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99364 q=soc.ram.ram[13][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99366 q=soc.ram.ram[13][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99368 q=soc.cpu.minerva.gprf.mem._mem[7][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99370 q=soc.cpu.minerva.gprf.mem._mem[7][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99372 q=soc.cpu.minerva.gprf.mem._mem[7][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99374 q=soc.cpu.minerva.gprf.mem._mem[7][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99376 q=soc.cpu.minerva.gprf.mem._mem[7][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99378 q=soc.cpu.minerva.gprf.mem._mem[7][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99380 q=soc.cpu.minerva.gprf.mem._mem[7][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99382 q=soc.cpu.minerva.gprf.mem._mem[7][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99384 q=soc.cpu.minerva.gprf.mem._mem[7][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99386 q=soc.cpu.minerva.gprf.mem._mem[7][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99388 q=soc.cpu.minerva.gprf.mem._mem[7][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99390 q=soc.cpu.minerva.gprf.mem._mem[7][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99392 q=soc.cpu.minerva.gprf.mem._mem[7][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99394 q=soc.cpu.minerva.gprf.mem._mem[7][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99396 q=soc.cpu.minerva.gprf.mem._mem[7][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99398 q=soc.cpu.minerva.gprf.mem._mem[7][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99400 q=soc.cpu.minerva.gprf.mem._mem[7][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99402 q=soc.cpu.minerva.gprf.mem._mem[7][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99404 q=soc.cpu.minerva.gprf.mem._mem[7][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99406 q=soc.cpu.minerva.gprf.mem._mem[7][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99408 q=soc.cpu.minerva.gprf.mem._mem[7][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99410 q=soc.cpu.minerva.gprf.mem._mem[7][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99412 q=soc.cpu.minerva.gprf.mem._mem[7][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99414 q=soc.cpu.minerva.gprf.mem._mem[7][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99416 q=soc.cpu.minerva.gprf.mem._mem[7][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99418 q=soc.cpu.minerva.gprf.mem._mem[7][25]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99422 q=soc.cpu.minerva.gprf.mem._mem[7][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99424 q=soc.cpu.minerva.gprf.mem._mem[7][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99426 q=soc.cpu.minerva.gprf.mem._mem[7][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99428 q=soc.cpu.minerva.gprf.mem._mem[7][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99430 q=soc.cpu.minerva.gprf.mem._mem[7][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99432 q=soc.ram.ram[101][8]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99464 q=soc.ram.ram[108][16]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99472 q=soc.ram.ram[108][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99474 q=soc.ram.ram[108][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99476 q=soc.ram.ram[108][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99478 q=soc.ram.ram[108][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99482 q=soc.tx_fifo.r_rdy
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99484 q=soc.cpu.minerva.gprf.mem._mem[28][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99486 q=soc.cpu.minerva.gprf.mem._mem[28][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99488 q=soc.cpu.minerva.gprf.mem._mem[28][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99490 q=soc.cpu.minerva.gprf.mem._mem[28][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99492 q=soc.cpu.minerva.gprf.mem._mem[28][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99494 q=soc.cpu.minerva.gprf.mem._mem[28][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99496 q=soc.cpu.minerva.gprf.mem._mem[28][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99498 q=soc.cpu.minerva.gprf.mem._mem[28][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99500 q=soc.cpu.minerva.gprf.mem._mem[28][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99502 q=soc.cpu.minerva.gprf.mem._mem[28][9]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99868 q=soc.timer.bridge_timer_reload__r_data[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99872 q=soc.timer.bridge_timer_reload__r_data[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99876 q=soc.timer.bridge_timer_reload__r_data[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99880 q=soc.timer.bridge_timer_reload__r_data[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99884 q=soc.timer.bridge_timer_reload__r_data[17]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99892 q=soc.timer.bridge_timer_reload__r_data[19]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99900 q=soc.timer.bridge_timer_reload__r_data[21]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99966 q=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99968 q=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow_en[0]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99976 q=soc.timer.bridge.csr_mux_1.timer_ev_pending__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99980 q=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100024 q=soc.ram.ram[1][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100026 q=soc.ram.ram[1][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100028 q=soc.ram.ram[1][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100030 q=soc.ram.ram[16][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100032 q=soc.ram.ram[16][25]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100036 q=soc.ram.ram[16][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100038 q=soc.ram.ram[16][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100040 q=soc.ram.ram[16][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100042 q=soc.ram.ram[16][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100044 q=soc.ram.ram[16][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100046 q=soc.cpu.minerva.gprf.mem._mem[5][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100048 q=soc.cpu.minerva.gprf.mem._mem[5][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100050 q=soc.cpu.minerva.gprf.mem._mem[5][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100052 q=soc.cpu.minerva.gprf.mem._mem[5][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100054 q=soc.cpu.minerva.gprf.mem._mem[5][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100056 q=soc.cpu.minerva.gprf.mem._mem[5][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100058 q=soc.cpu.minerva.gprf.mem._mem[5][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100060 q=soc.cpu.minerva.gprf.mem._mem[5][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100062 q=soc.cpu.minerva.gprf.mem._mem[5][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100064 q=soc.cpu.minerva.gprf.mem._mem[5][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100066 q=soc.cpu.minerva.gprf.mem._mem[5][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100068 q=soc.cpu.minerva.gprf.mem._mem[5][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100070 q=soc.cpu.minerva.gprf.mem._mem[5][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100072 q=soc.cpu.minerva.gprf.mem._mem[5][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100074 q=soc.cpu.minerva.gprf.mem._mem[5][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100076 q=soc.cpu.minerva.gprf.mem._mem[5][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100078 q=soc.cpu.minerva.gprf.mem._mem[5][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100080 q=soc.cpu.minerva.gprf.mem._mem[5][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100082 q=soc.cpu.minerva.gprf.mem._mem[5][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100084 q=soc.cpu.minerva.gprf.mem._mem[5][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100086 q=soc.cpu.minerva.gprf.mem._mem[5][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100088 q=soc.cpu.minerva.gprf.mem._mem[5][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100090 q=soc.cpu.minerva.gprf.mem._mem[5][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100092 q=soc.cpu.minerva.gprf.mem._mem[5][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100094 q=soc.cpu.minerva.gprf.mem._mem[5][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100096 q=soc.cpu.minerva.gprf.mem._mem[5][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100098 q=soc.cpu.minerva.gprf.mem._mem[5][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100100 q=soc.cpu.minerva.gprf.mem._mem[5][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100102 q=soc.cpu.minerva.gprf.mem._mem[5][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100104 q=soc.cpu.minerva.gprf.mem._mem[5][29]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100108 q=soc.cpu.minerva.gprf.mem._mem[5][31]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100122 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100130 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100134 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100138 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100142 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100144 q=soc.timer.bridge.csr_mux_0.timer_reload__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100146 q=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100150 q=soc.timer.bridge.csr_mux_0.timer_en__shadow
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100156 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100160 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100164 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100168 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100172 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100176 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100180 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100184 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100186 q=soc.ram.ram[106][24]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100200 q=soc.ram.ram[106][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100204 q=soc.timer.bridge.csr_bridge_1.cycle[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100208 q=soc.timer.bridge.csr_bridge_1.cycle[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100212 q=soc.timer.bridge.csr_bridge_1.cycle[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100214 q=soc.timer.bridge.csr_bridge_0.wb__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100218 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100220 q=soc.ram.ram[46][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100222 q=soc.ram.ram[46][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100224 q=soc.ram.ram[46][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100226 q=soc.ram.ram[46][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100228 q=soc.ram.ram[46][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100230 q=soc.ram.ram[46][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100232 q=soc.ram.ram[46][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100234 q=soc.ram.ram[46][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100238 q=soc.timer.bridge.csr_bridge_0.cycle[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100242 q=soc.timer.bridge.csr_bridge_0.cycle[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100246 q=soc.timer.bridge.csr_bridge_0.cycle[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100250 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100254 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100258 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100262 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100266 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100270 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100274 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100278 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100280 q=soc.timer.bridge._int_src.timer_ev_status__r_data
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100284 q=soc.timer.bridge._int_src.timer_ev_pending__r_data
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100288 q=soc.timer.bridge._int_src.timer_ev_enable__r_data
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100290 q=soc.cpu.minerva.gprf.mem._mem[30][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100292 q=soc.cpu.minerva.gprf.mem._mem[30][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100294 q=soc.cpu.minerva.gprf.mem._mem[30][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100296 q=soc.cpu.minerva.gprf.mem._mem[30][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100298 q=soc.cpu.minerva.gprf.mem._mem[30][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100300 q=soc.cpu.minerva.gprf.mem._mem[30][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100302 q=soc.cpu.minerva.gprf.mem._mem[30][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100304 q=soc.cpu.minerva.gprf.mem._mem[30][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100306 q=soc.cpu.minerva.gprf.mem._mem[30][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100308 q=soc.cpu.minerva.gprf.mem._mem[30][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100310 q=soc.cpu.minerva.gprf.mem._mem[30][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100312 q=soc.cpu.minerva.gprf.mem._mem[30][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100314 q=soc.cpu.minerva.gprf.mem._mem[30][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100316 q=soc.cpu.minerva.gprf.mem._mem[30][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100318 q=soc.cpu.minerva.gprf.mem._mem[30][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100320 q=soc.cpu.minerva.gprf.mem._mem[30][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100322 q=soc.cpu.minerva.gprf.mem._mem[30][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100324 q=soc.cpu.minerva.gprf.mem._mem[30][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100326 q=soc.cpu.minerva.gprf.mem._mem[30][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100328 q=soc.cpu.minerva.gprf.mem._mem[30][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100330 q=soc.cpu.minerva.gprf.mem._mem[30][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100332 q=soc.cpu.minerva.gprf.mem._mem[30][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100334 q=soc.cpu.minerva.gprf.mem._mem[30][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100336 q=soc.cpu.minerva.gprf.mem._mem[30][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100338 q=soc.cpu.minerva.gprf.mem._mem[30][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100340 q=soc.cpu.minerva.gprf.mem._mem[30][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100342 q=soc.cpu.minerva.gprf.mem._mem[30][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100344 q=soc.cpu.minerva.gprf.mem._mem[30][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100346 q=soc.cpu.minerva.gprf.mem._mem[30][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100348 q=soc.cpu.minerva.gprf.mem._mem[30][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100350 q=soc.cpu.minerva.gprf.mem._mem[30][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100352 q=soc.cpu.minerva.gprf.mem._mem[30][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100354 q=soc.ram.ram[108][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100356 q=soc.ram.ram[108][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100358 q=soc.ram.ram[108][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100360 q=soc.ram.ram[108][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100362 q=soc.ram.ram[108][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100364 q=soc.ram.ram[108][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100366 q=soc.ram.ram[108][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100368 q=soc.ram.ram[108][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100372 q=soc.rx_fifo.r_rdy
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100376 q=soc.rx_fifo.unbuffered.level[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100380 q=soc.rx_fifo.unbuffered.level[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100384 q=soc.rx_fifo.unbuffered.consume[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100388 q=soc.rx_fifo.unbuffered.consume[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100392 q=soc.rx_fifo.unbuffered.produce[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100396 q=soc.rx_fifo.unbuffered.produce[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100398 q=soc.rom.spimemio.xfer.obuffer[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100400 q=soc.rom.spimemio.xfer.obuffer[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100402 q=soc.rom.spimemio.xfer.obuffer[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100404 q=soc.rom.spimemio.xfer.obuffer[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100406 q=soc.rom.spimemio.xfer.obuffer[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100408 q=soc.rom.spimemio.xfer.obuffer[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100410 q=soc.rom.spimemio.xfer.obuffer[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100412 q=soc.cpu.minerva.gprf.mem._mem[2][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100414 q=soc.cpu.minerva.gprf.mem._mem[2][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100416 q=soc.cpu.minerva.gprf.mem._mem[2][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100418 q=soc.cpu.minerva.gprf.mem._mem[2][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100420 q=soc.cpu.minerva.gprf.mem._mem[2][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100422 q=soc.cpu.minerva.gprf.mem._mem[2][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100424 q=soc.cpu.minerva.gprf.mem._mem[2][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100426 q=soc.cpu.minerva.gprf.mem._mem[2][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100428 q=soc.cpu.minerva.gprf.mem._mem[2][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100430 q=soc.cpu.minerva.gprf.mem._mem[2][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100432 q=soc.cpu.minerva.gprf.mem._mem[2][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100434 q=soc.cpu.minerva.gprf.mem._mem[2][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100436 q=soc.cpu.minerva.gprf.mem._mem[2][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100438 q=soc.cpu.minerva.gprf.mem._mem[2][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100440 q=soc.cpu.minerva.gprf.mem._mem[2][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100442 q=soc.cpu.minerva.gprf.mem._mem[2][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100444 q=soc.cpu.minerva.gprf.mem._mem[2][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100446 q=soc.cpu.minerva.gprf.mem._mem[2][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100448 q=soc.cpu.minerva.gprf.mem._mem[2][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100450 q=soc.cpu.minerva.gprf.mem._mem[2][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100452 q=soc.cpu.minerva.gprf.mem._mem[2][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100454 q=soc.cpu.minerva.gprf.mem._mem[2][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100456 q=soc.cpu.minerva.gprf.mem._mem[2][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100458 q=soc.cpu.minerva.gprf.mem._mem[2][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100460 q=soc.cpu.minerva.gprf.mem._mem[2][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100462 q=soc.cpu.minerva.gprf.mem._mem[2][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100464 q=soc.cpu.minerva.gprf.mem._mem[2][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100466 q=soc.cpu.minerva.gprf.mem._mem[2][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100468 q=soc.cpu.minerva.gprf.mem._mem[2][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100470 q=soc.cpu.minerva.gprf.mem._mem[2][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100472 q=soc.cpu.minerva.gprf.mem._mem[2][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100474 q=soc.cpu.minerva.gprf.mem._mem[2][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100476 q=soc.ram.ram[108][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100478 q=soc.ram.ram[108][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100480 q=soc.ram.ram[108][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100482 q=soc.ram.ram[108][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100484 q=soc.ram.ram[108][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100486 q=soc.ram.ram[108][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100488 q=soc.ram.ram[108][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100490 q=soc.ram.ram[108][31]
-.subckt sff1_x4 ck=io_in[0] i=io_in[28] q=soc.rx.U$$0.stage0
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100494 q=soc.rx.bitno[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100498 q=soc.rx.bitno[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100502 q=soc.rx.bitno[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100506 q=soc.rx.bitno[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100510 q=soc.rx.timer[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100514 q=soc.rx.timer[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100518 q=soc.rx.timer[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100522 q=soc.rx.timer[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100526 q=soc.rx.timer[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100530 q=soc.rx.timer[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100534 q=soc.rx.timer[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100538 q=soc.rx.timer[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100542 q=soc.rx.timer[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100546 q=soc.rx.timer[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100550 q=soc.rx.timer[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100554 q=soc.rx.timer[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100558 q=soc.rx.fsm_state[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100562 q=soc.rx.fsm_state[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100566 q=soc.rx.shreg__stop
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100570 q=soc.rx.shreg__data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100574 q=soc.rx.shreg__data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100578 q=soc.rx.shreg__data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100582 q=soc.rx.shreg__data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100586 q=soc.rx.shreg__data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100590 q=soc.rx.shreg__data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100594 q=soc.rx.shreg__data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100598 q=soc.rx.shreg__data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100602 q=soc.rx.shreg__start
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100610 q=soc.rx.data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100614 q=soc.rx.data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100618 q=soc.rx.data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100622 q=soc.rx.data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100626 q=soc.rx.data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100630 q=soc.rx.data[6]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100638 q=soc.rx.err__frame
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100640 q=soc.rom.spimemio.xfer.last_fetch
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100644 q=soc.rx.err__overflow
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100648 q=soc.rx.rdy
-.subckt sff1_x4 ck=io_in[0] i=soc.rx.U$$0.stage0 q=soc.rx.U$$0.stage1
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100652 q=soc.cpu.minerva.gprf.mem._mem[19][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100654 q=soc.cpu.minerva.gprf.mem._mem[19][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100656 q=soc.cpu.minerva.gprf.mem._mem[19][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100658 q=soc.cpu.minerva.gprf.mem._mem[19][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100660 q=soc.cpu.minerva.gprf.mem._mem[19][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100662 q=soc.cpu.minerva.gprf.mem._mem[19][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100664 q=soc.cpu.minerva.gprf.mem._mem[19][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100666 q=soc.cpu.minerva.gprf.mem._mem[19][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100668 q=soc.cpu.minerva.gprf.mem._mem[19][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100670 q=soc.cpu.minerva.gprf.mem._mem[19][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100672 q=soc.cpu.minerva.gprf.mem._mem[19][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100674 q=soc.cpu.minerva.gprf.mem._mem[19][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100676 q=soc.cpu.minerva.gprf.mem._mem[19][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100678 q=soc.cpu.minerva.gprf.mem._mem[19][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100680 q=soc.cpu.minerva.gprf.mem._mem[19][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100682 q=soc.cpu.minerva.gprf.mem._mem[19][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100684 q=soc.cpu.minerva.gprf.mem._mem[19][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100686 q=soc.cpu.minerva.gprf.mem._mem[19][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100688 q=soc.cpu.minerva.gprf.mem._mem[19][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100690 q=soc.cpu.minerva.gprf.mem._mem[19][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100692 q=soc.cpu.minerva.gprf.mem._mem[19][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100694 q=soc.cpu.minerva.gprf.mem._mem[19][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100696 q=soc.cpu.minerva.gprf.mem._mem[19][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100698 q=soc.cpu.minerva.gprf.mem._mem[19][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100700 q=soc.cpu.minerva.gprf.mem._mem[19][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100702 q=soc.cpu.minerva.gprf.mem._mem[19][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100704 q=soc.cpu.minerva.gprf.mem._mem[19][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100706 q=soc.cpu.minerva.gprf.mem._mem[19][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100708 q=soc.cpu.minerva.gprf.mem._mem[19][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100710 q=soc.cpu.minerva.gprf.mem._mem[19][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100712 q=soc.cpu.minerva.gprf.mem._mem[19][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100716 q=soc.rom.read_active
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100718 q=soc.ram.bus__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100720 q=soc.ram.ram[19][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100722 q=soc.ram.ram[19][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100724 q=soc.ram.ram[19][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100726 q=soc.ram.ram[19][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100728 q=soc.ram.ram[19][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100730 q=soc.ram.ram[19][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100732 q=soc.ram.ram[19][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100734 q=soc.ram.ram[19][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100738 q=soc.bridge.csr_mux_0.uart_rx_err__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100742 q=soc.bridge.csr_mux_0.uart_rx_err__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100744 q=soc.ram.ram[1][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100746 q=soc.ram.ram[1][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100748 q=soc.ram.ram[1][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100750 q=soc.ram.ram[1][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100752 q=soc.ram.ram[1][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100754 q=soc.ram.ram[1][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100756 q=soc.ram.ram[1][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100758 q=soc.ram.ram[1][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100760 q=soc.rom.bridge.csr_bridge_0.wb__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100762 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100766 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100770 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100774 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100778 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100782 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100786 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100790 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100794 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100796 q=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100798 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100802 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100806 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100810 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100814 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100818 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100822 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100826 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100830 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100832 q=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100834 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100838 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100842 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100846 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100850 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100854 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100858 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100862 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100866 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100868 q=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100870 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100874 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100878 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100882 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100886 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100890 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100894 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100898 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100902 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100904 q=soc.cpu.minerva.gprf.mem._mem[22][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100906 q=soc.cpu.minerva.gprf.mem._mem[22][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100908 q=soc.cpu.minerva.gprf.mem._mem[22][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100910 q=soc.cpu.minerva.gprf.mem._mem[22][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100912 q=soc.cpu.minerva.gprf.mem._mem[22][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100914 q=soc.cpu.minerva.gprf.mem._mem[22][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100916 q=soc.cpu.minerva.gprf.mem._mem[22][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100918 q=soc.cpu.minerva.gprf.mem._mem[22][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100920 q=soc.cpu.minerva.gprf.mem._mem[22][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100922 q=soc.cpu.minerva.gprf.mem._mem[22][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100924 q=soc.cpu.minerva.gprf.mem._mem[22][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100926 q=soc.cpu.minerva.gprf.mem._mem[22][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100928 q=soc.cpu.minerva.gprf.mem._mem[22][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100930 q=soc.cpu.minerva.gprf.mem._mem[22][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100932 q=soc.cpu.minerva.gprf.mem._mem[22][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100934 q=soc.cpu.minerva.gprf.mem._mem[22][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100936 q=soc.cpu.minerva.gprf.mem._mem[22][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100938 q=soc.cpu.minerva.gprf.mem._mem[22][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100940 q=soc.cpu.minerva.gprf.mem._mem[22][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100942 q=soc.cpu.minerva.gprf.mem._mem[22][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100944 q=soc.cpu.minerva.gprf.mem._mem[22][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100946 q=soc.cpu.minerva.gprf.mem._mem[22][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100948 q=soc.cpu.minerva.gprf.mem._mem[22][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100950 q=soc.cpu.minerva.gprf.mem._mem[22][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100952 q=soc.cpu.minerva.gprf.mem._mem[22][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100954 q=soc.cpu.minerva.gprf.mem._mem[22][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100956 q=soc.cpu.minerva.gprf.mem._mem[22][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100958 q=soc.cpu.minerva.gprf.mem._mem[22][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100960 q=soc.cpu.minerva.gprf.mem._mem[22][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100962 q=soc.cpu.minerva.gprf.mem._mem[22][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100964 q=soc.cpu.minerva.gprf.mem._mem[22][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100966 q=soc.cpu.minerva.gprf.mem._mem[22][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100970 q=soc.rom.bridge.csr_bridge_0.cycle[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100974 q=soc.rom.bridge.csr_bridge_0.cycle[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100978 q=soc.rom.bridge.csr_bridge_0.cycle[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100982 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100986 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100990 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100994 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100998 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101002 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101006 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101010 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101012 q=soc.rom.data_bus__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101014 q=soc.rom.spimemio.softreset
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101018 q=soc.rom.spimemio.xfer.flash_clk
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101022 q=soc.rom.spimemio.xfer.flash_csb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101026 q=soc.rom.spimemio.xfer.xfer_dspi
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101030 q=soc.rom.spimemio.xfer.xfer_ddr
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101032 q=soc.rom.spimemio.xfer.fetch
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101036 q=soc.rom.spimemio.xfer.count[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101040 q=soc.rom.spimemio.xfer.dummy_count[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101044 q=soc.rom.spimemio.xfer.dummy_count[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101048 q=soc.rom.spimemio.xfer.dummy_count[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101052 q=soc.rom.spimemio.xfer.dummy_count[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101056 q=soc.rom.spimemio.xfer.xfer_qspi
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101060 q=soc.rom.spimemio.xfer.xfer_rd
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101062 q=soc.rom.spimemio.dout_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101064 q=soc.rom.spimemio.dout_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101066 q=soc.rom.spimemio.dout_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101068 q=soc.rom.spimemio.dout_data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101070 q=soc.rom.spimemio.dout_data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101072 q=soc.rom.spimemio.dout_data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101074 q=soc.rom.spimemio.dout_data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101076 q=soc.rom.spimemio.dout_data[7]
-.subckt sff1_x4 ck=io_in[0] i=soc.rom.spimemio.xfer.xfer_ddr q=soc.rom.spimemio.xfer.xfer_ddr_q
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101080 q=soc.rom.spimemio.config_do[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101084 q=soc.rom.spimemio.config_do[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101088 q=soc.rom.spimemio.config_do[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101092 q=soc.rom.spimemio.config_do[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101096 q=soc.rom.spimemio.config_clk
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101100 q=soc.rom.spimemio.config_csb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101104 q=soc.rom.spimemio.config_oe[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101108 q=soc.rom.spimemio.config_oe[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101112 q=soc.rom.spimemio.config_oe[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101116 q=soc.rom.spimemio.config_oe[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101120 q=soc.rom.cfgreg_do[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101124 q=soc.rom.cfgreg_do[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101128 q=soc.rom.cfgreg_do[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101132 q=soc.rom.cfgreg_do[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101136 q=soc.rom.spimemio.config_cont
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101140 q=soc.rom.spimemio.config_qspi
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101144 q=soc.rom.spimemio.config_ddr
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101148 q=soc.rom.spimemio.config_en
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101150 q=soc.rom.spimemio.buffer[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101152 q=soc.rom.spimemio.buffer[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101154 q=soc.rom.spimemio.buffer[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101156 q=soc.rom.spimemio.buffer[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101158 q=soc.rom.spimemio.buffer[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101160 q=soc.rom.spimemio.buffer[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101162 q=soc.rom.spimemio.buffer[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101164 q=soc.rom.spimemio.buffer[23]
-.subckt sff1_x4 ck=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io3_do q=soc.rom.spimemio.xfer_io3_90
-.subckt sff1_x4 ck=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io2_do q=soc.rom.spimemio.xfer_io2_90
-.subckt sff1_x4 ck=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io1_do q=soc.rom.spimemio.xfer_io1_90
-.subckt sff1_x4 ck=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io0_do q=soc.rom.spimemio.xfer_io0_90
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101176 q=soc.rom.spimemio.rd_inc
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101180 q=soc.rom.spimemio.rd_wait
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101184 q=soc.rom.spimemio.rd_valid
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101186 q=soc.rom.spimemio.din_ddr
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101190 q=soc.rom.spimemio.din_rd
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101192 q=soc.rom.spimemio.din_qspi
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101196 q=soc.rom.spimemio.xfer.obuffer[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101198 q=soc.rom.spimemio.xfer.resetn
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101200 q=soc.decoder.data_bus__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101202 q=soc.decoder.data_bus__dat_r[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101204 q=soc.decoder.data_bus__dat_r[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101206 q=soc.decoder.data_bus__dat_r[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101208 q=soc.decoder.data_bus__dat_r[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101210 q=soc.decoder.data_bus__dat_r[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101212 q=soc.decoder.data_bus__dat_r[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101214 q=soc.decoder.data_bus__dat_r[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101216 q=soc.decoder.data_bus__dat_r[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101218 q=soc.decoder.data_bus__dat_r[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101220 q=soc.decoder.data_bus__dat_r[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101222 q=soc.decoder.data_bus__dat_r[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101224 q=soc.decoder.data_bus__dat_r[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101226 q=soc.decoder.data_bus__dat_r[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101228 q=soc.decoder.data_bus__dat_r[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101230 q=soc.decoder.data_bus__dat_r[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101232 q=soc.decoder.data_bus__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101234 q=soc.decoder.data_bus__dat_r[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101236 q=soc.decoder.data_bus__dat_r[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101238 q=soc.decoder.data_bus__dat_r[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101240 q=soc.decoder.data_bus__dat_r[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101242 q=soc.decoder.data_bus__dat_r[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101244 q=soc.decoder.data_bus__dat_r[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101246 q=soc.decoder.data_bus__dat_r[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101248 q=soc.decoder.data_bus__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101250 q=soc.decoder.data_bus__dat_r[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101252 q=soc.decoder.data_bus__dat_r[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101254 q=soc.decoder.data_bus__dat_r[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101256 q=soc.decoder.data_bus__dat_r[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101258 q=soc.decoder.data_bus__dat_r[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101260 q=soc.decoder.data_bus__dat_r[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101262 q=soc.decoder.data_bus__dat_r[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101264 q=soc.rom.bridge.csr_mux_0.rom_cfg3__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101266 q=soc.cpu.minerva.gprf.mem._mem[20][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101268 q=soc.cpu.minerva.gprf.mem._mem[20][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101270 q=soc.cpu.minerva.gprf.mem._mem[20][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101272 q=soc.cpu.minerva.gprf.mem._mem[20][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101274 q=soc.cpu.minerva.gprf.mem._mem[20][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101276 q=soc.cpu.minerva.gprf.mem._mem[20][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101278 q=soc.cpu.minerva.gprf.mem._mem[20][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101280 q=soc.cpu.minerva.gprf.mem._mem[20][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101282 q=soc.cpu.minerva.gprf.mem._mem[20][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101284 q=soc.cpu.minerva.gprf.mem._mem[20][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101286 q=soc.cpu.minerva.gprf.mem._mem[20][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101288 q=soc.cpu.minerva.gprf.mem._mem[20][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101290 q=soc.cpu.minerva.gprf.mem._mem[20][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101292 q=soc.cpu.minerva.gprf.mem._mem[20][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101294 q=soc.cpu.minerva.gprf.mem._mem[20][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101296 q=soc.cpu.minerva.gprf.mem._mem[20][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101298 q=soc.cpu.minerva.gprf.mem._mem[20][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101300 q=soc.cpu.minerva.gprf.mem._mem[20][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101302 q=soc.cpu.minerva.gprf.mem._mem[20][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101304 q=soc.cpu.minerva.gprf.mem._mem[20][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101306 q=soc.cpu.minerva.gprf.mem._mem[20][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101308 q=soc.cpu.minerva.gprf.mem._mem[20][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101310 q=soc.cpu.minerva.gprf.mem._mem[20][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101312 q=soc.cpu.minerva.gprf.mem._mem[20][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101314 q=soc.cpu.minerva.gprf.mem._mem[20][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101316 q=soc.cpu.minerva.gprf.mem._mem[20][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101318 q=soc.cpu.minerva.gprf.mem._mem[20][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101320 q=soc.cpu.minerva.gprf.mem._mem[20][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101322 q=soc.cpu.minerva.gprf.mem._mem[20][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101324 q=soc.cpu.minerva.gprf.mem._mem[20][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101326 q=soc.cpu.minerva.gprf.mem._mem[20][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101328 q=soc.cpu.minerva.gprf.mem._mem[20][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101330 q=soc.ram.ram[14][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101332 q=soc.ram.ram[14][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101334 q=soc.ram.ram[14][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101336 q=soc.ram.ram[14][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101338 q=soc.ram.ram[14][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101340 q=soc.ram.ram[14][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101342 q=soc.ram.ram[14][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101344 q=soc.ram.ram[14][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101346 q=soc.ram.ram[104][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101348 q=soc.ram.ram[104][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101350 q=soc.ram.ram[104][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101352 q=soc.ram.ram[104][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101354 q=soc.ram.ram[104][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101356 q=soc.ram.ram[104][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101358 q=soc.ram.ram[104][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101360 q=soc.ram.ram[104][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101362 q=soc.ram.ram[46][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101364 q=soc.ram.ram[46][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101366 q=soc.ram.ram[46][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101368 q=soc.ram.ram[46][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101370 q=soc.ram.ram[46][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101372 q=soc.ram.ram[46][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101374 q=soc.ram.ram[46][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101376 q=soc.ram.ram[46][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101378 q=soc.ram.ram[105][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101380 q=soc.ram.ram[105][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101382 q=soc.ram.ram[105][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101384 q=soc.ram.ram[105][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101386 q=soc.ram.ram[105][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101388 q=soc.ram.ram[105][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101390 q=soc.ram.ram[105][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101392 q=soc.ram.ram[105][23]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[0] q=soc.cpu.minerva.gprf.mem._0_[0]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[1] q=soc.cpu.minerva.gprf.mem._0_[1]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[2] q=soc.cpu.minerva.gprf.mem._0_[2]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[3] q=soc.cpu.minerva.gprf.mem._0_[3]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[4] q=soc.cpu.minerva.gprf.mem._0_[4]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[5] q=soc.cpu.minerva.gprf.mem._0_[5]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[6] q=soc.cpu.minerva.gprf.mem._0_[6]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[7] q=soc.cpu.minerva.gprf.mem._0_[7]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[8] q=soc.cpu.minerva.gprf.mem._0_[8]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[9] q=soc.cpu.minerva.gprf.mem._0_[9]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[10] q=soc.cpu.minerva.gprf.mem._0_[10]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[11] q=soc.cpu.minerva.gprf.mem._0_[11]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[12] q=soc.cpu.minerva.gprf.mem._0_[12]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[13] q=soc.cpu.minerva.gprf.mem._0_[13]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[14] q=soc.cpu.minerva.gprf.mem._0_[14]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[15] q=soc.cpu.minerva.gprf.mem._0_[15]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[16] q=soc.cpu.minerva.gprf.mem._0_[16]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[17] q=soc.cpu.minerva.gprf.mem._0_[17]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[18] q=soc.cpu.minerva.gprf.mem._0_[18]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[19] q=soc.cpu.minerva.gprf.mem._0_[19]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[20] q=soc.cpu.minerva.gprf.mem._0_[20]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[21] q=soc.cpu.minerva.gprf.mem._0_[21]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[22] q=soc.cpu.minerva.gprf.mem._0_[22]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[23] q=soc.cpu.minerva.gprf.mem._0_[23]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[24] q=soc.cpu.minerva.gprf.mem._0_[24]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[25] q=soc.cpu.minerva.gprf.mem._0_[25]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[26] q=soc.cpu.minerva.gprf.mem._0_[26]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[27] q=soc.cpu.minerva.gprf.mem._0_[27]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[28] q=soc.cpu.minerva.gprf.mem._0_[28]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[29] q=soc.cpu.minerva.gprf.mem._0_[29]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[30] q=soc.cpu.minerva.gprf.mem._0_[30]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[31] q=soc.cpu.minerva.gprf.mem._0_[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101394 q=soc.ram.ram[118][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101396 q=soc.ram.ram[118][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101398 q=soc.ram.ram[118][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101400 q=soc.ram.ram[118][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101402 q=soc.ram.ram[118][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101404 q=soc.ram.ram[118][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101406 q=soc.ram.ram[118][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101408 q=soc.ram.ram[118][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101410 q=soc.ram.ram[118][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101412 q=soc.ram.ram[118][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101414 q=soc.ram.ram[118][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101416 q=soc.ram.ram[118][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101418 q=soc.ram.ram[118][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101420 q=soc.ram.ram[118][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101422 q=soc.ram.ram[118][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101424 q=soc.ram.ram[118][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101426 q=soc.ram.ram[118][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101428 q=soc.ram.ram[118][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101430 q=soc.ram.ram[118][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101432 q=soc.ram.ram[118][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101434 q=soc.ram.ram[118][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101436 q=soc.ram.ram[118][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101438 q=soc.ram.ram[118][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101440 q=soc.ram.ram[118][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101442 q=soc.ram.ram[117][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101444 q=soc.ram.ram[117][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101446 q=soc.ram.ram[117][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101448 q=soc.ram.ram[117][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101450 q=soc.ram.ram[117][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101452 q=soc.ram.ram[117][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101454 q=soc.ram.ram[117][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101456 q=soc.ram.ram[117][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101458 q=soc.ram.ram[117][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101460 q=soc.ram.ram[117][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101462 q=soc.ram.ram[117][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101464 q=soc.ram.ram[117][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101466 q=soc.ram.ram[117][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101468 q=soc.ram.ram[117][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101470 q=soc.ram.ram[117][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101472 q=soc.ram.ram[117][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101474 q=soc.ram.ram[117][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101476 q=soc.ram.ram[117][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101478 q=soc.ram.ram[117][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101480 q=soc.ram.ram[117][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101482 q=soc.ram.ram[117][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101484 q=soc.ram.ram[117][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101486 q=soc.ram.ram[117][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101488 q=soc.ram.ram[117][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101490 q=soc.ram.ram[116][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101492 q=soc.ram.ram[116][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101494 q=soc.ram.ram[116][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101496 q=soc.ram.ram[116][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101498 q=soc.ram.ram[116][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101500 q=soc.ram.ram[116][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101502 q=soc.ram.ram[116][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101504 q=soc.ram.ram[116][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101506 q=soc.ram.ram[116][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101508 q=soc.ram.ram[116][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101510 q=soc.ram.ram[116][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101512 q=soc.ram.ram[116][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101514 q=soc.ram.ram[116][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101516 q=soc.ram.ram[116][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101518 q=soc.ram.ram[116][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101520 q=soc.ram.ram[116][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101522 q=soc.ram.ram[116][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101524 q=soc.ram.ram[116][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101526 q=soc.ram.ram[116][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101528 q=soc.ram.ram[116][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101530 q=soc.ram.ram[116][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101532 q=soc.ram.ram[116][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101534 q=soc.ram.ram[116][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101536 q=soc.ram.ram[116][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101538 q=soc.ram.ram[115][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101540 q=soc.ram.ram[115][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101542 q=soc.ram.ram[115][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101544 q=soc.ram.ram[115][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101546 q=soc.ram.ram[115][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101548 q=soc.ram.ram[115][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101550 q=soc.ram.ram[115][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101552 q=soc.ram.ram[115][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101554 q=soc.ram.ram[115][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101556 q=soc.ram.ram[115][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101558 q=soc.ram.ram[115][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101560 q=soc.ram.ram[115][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101562 q=soc.ram.ram[115][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101564 q=soc.ram.ram[115][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101566 q=soc.ram.ram[115][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101568 q=soc.ram.ram[115][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101570 q=soc.ram.ram[115][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101572 q=soc.ram.ram[115][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101574 q=soc.ram.ram[115][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101576 q=soc.ram.ram[115][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101578 q=soc.ram.ram[115][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101580 q=soc.ram.ram[115][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101582 q=soc.ram.ram[115][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101584 q=soc.ram.ram[115][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101586 q=soc.ram.ram[114][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101588 q=soc.ram.ram[114][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101590 q=soc.ram.ram[114][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101592 q=soc.ram.ram[114][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101594 q=soc.ram.ram[114][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101596 q=soc.ram.ram[114][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101598 q=soc.ram.ram[114][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101600 q=soc.ram.ram[114][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101602 q=soc.ram.ram[114][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101604 q=soc.ram.ram[114][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101606 q=soc.ram.ram[114][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101608 q=soc.ram.ram[114][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101610 q=soc.ram.ram[114][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101612 q=soc.ram.ram[114][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101614 q=soc.ram.ram[114][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101616 q=soc.ram.ram[114][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101618 q=soc.ram.ram[114][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101620 q=soc.ram.ram[114][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101622 q=soc.ram.ram[114][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101624 q=soc.ram.ram[114][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101626 q=soc.ram.ram[114][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101628 q=soc.ram.ram[114][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101630 q=soc.ram.ram[114][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101632 q=soc.ram.ram[114][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101634 q=soc.ram.ram[113][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101636 q=soc.ram.ram[113][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101638 q=soc.ram.ram[113][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101640 q=soc.ram.ram[113][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101642 q=soc.ram.ram[113][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101644 q=soc.ram.ram[113][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101646 q=soc.ram.ram[113][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101648 q=soc.ram.ram[113][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101650 q=soc.ram.ram[113][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101652 q=soc.ram.ram[113][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101654 q=soc.ram.ram[113][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101656 q=soc.ram.ram[113][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101658 q=soc.ram.ram[113][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101660 q=soc.ram.ram[113][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101662 q=soc.ram.ram[113][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101664 q=soc.ram.ram[113][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101666 q=soc.ram.ram[113][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101668 q=soc.ram.ram[113][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101670 q=soc.ram.ram[113][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101672 q=soc.ram.ram[113][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101674 q=soc.ram.ram[113][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101676 q=soc.ram.ram[113][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101678 q=soc.ram.ram[113][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101680 q=soc.ram.ram[113][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101682 q=soc.ram.ram[112][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101684 q=soc.ram.ram[112][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101686 q=soc.ram.ram[112][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101688 q=soc.ram.ram[112][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101690 q=soc.ram.ram[112][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101692 q=soc.ram.ram[112][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101694 q=soc.ram.ram[112][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101696 q=soc.ram.ram[112][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101698 q=soc.ram.ram[112][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101700 q=soc.ram.ram[112][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101702 q=soc.ram.ram[112][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101704 q=soc.ram.ram[112][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101706 q=soc.ram.ram[112][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101708 q=soc.ram.ram[112][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101710 q=soc.ram.ram[112][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101712 q=soc.ram.ram[112][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101714 q=soc.ram.ram[112][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101716 q=soc.ram.ram[112][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101718 q=soc.ram.ram[112][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101720 q=soc.ram.ram[112][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101722 q=soc.ram.ram[112][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101724 q=soc.ram.ram[112][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101726 q=soc.ram.ram[112][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101728 q=soc.ram.ram[112][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101730 q=soc.ram.ram[111][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101732 q=soc.ram.ram[111][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101734 q=soc.ram.ram[111][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101736 q=soc.ram.ram[111][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101738 q=soc.ram.ram[111][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101740 q=soc.ram.ram[111][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101742 q=soc.ram.ram[111][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101744 q=soc.ram.ram[111][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101746 q=soc.ram.ram[111][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101748 q=soc.ram.ram[111][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101750 q=soc.ram.ram[111][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101752 q=soc.ram.ram[111][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101754 q=soc.ram.ram[111][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101756 q=soc.ram.ram[111][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101758 q=soc.ram.ram[111][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101760 q=soc.ram.ram[111][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101762 q=soc.ram.ram[111][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101764 q=soc.ram.ram[111][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101766 q=soc.ram.ram[111][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101768 q=soc.ram.ram[111][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101770 q=soc.ram.ram[111][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101772 q=soc.ram.ram[111][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101774 q=soc.ram.ram[111][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101776 q=soc.ram.ram[111][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101778 q=soc.ram.ram[110][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101780 q=soc.ram.ram[110][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101782 q=soc.ram.ram[110][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101784 q=soc.ram.ram[110][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101786 q=soc.ram.ram[110][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101788 q=soc.ram.ram[110][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101790 q=soc.ram.ram[110][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101792 q=soc.ram.ram[110][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101794 q=soc.ram.ram[110][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101796 q=soc.ram.ram[110][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101798 q=soc.ram.ram[110][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101800 q=soc.ram.ram[110][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101802 q=soc.ram.ram[110][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101804 q=soc.ram.ram[110][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101806 q=soc.ram.ram[110][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101808 q=soc.ram.ram[110][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101810 q=soc.ram.ram[110][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101812 q=soc.ram.ram[110][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101814 q=soc.ram.ram[110][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101816 q=soc.ram.ram[110][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101818 q=soc.ram.ram[110][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101820 q=soc.ram.ram[110][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101822 q=soc.ram.ram[110][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101824 q=soc.ram.ram[110][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101826 q=soc.ram.ram[10][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101828 q=soc.ram.ram[10][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101830 q=soc.ram.ram[10][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101832 q=soc.ram.ram[10][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101834 q=soc.ram.ram[10][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101836 q=soc.ram.ram[10][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101838 q=soc.ram.ram[10][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101840 q=soc.ram.ram[10][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101842 q=soc.ram.ram[10][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101844 q=soc.ram.ram[10][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101846 q=soc.ram.ram[10][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101848 q=soc.ram.ram[10][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101850 q=soc.ram.ram[10][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101852 q=soc.ram.ram[10][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101854 q=soc.ram.ram[10][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101856 q=soc.ram.ram[10][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101858 q=soc.ram.ram[10][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101860 q=soc.ram.ram[10][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101862 q=soc.ram.ram[10][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101864 q=soc.ram.ram[10][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101866 q=soc.ram.ram[10][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101868 q=soc.ram.ram[10][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101870 q=soc.ram.ram[10][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101872 q=soc.ram.ram[10][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101874 q=soc.ram.ram[109][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101876 q=soc.ram.ram[109][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101878 q=soc.ram.ram[109][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101880 q=soc.ram.ram[109][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101882 q=soc.ram.ram[109][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101884 q=soc.ram.ram[109][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101886 q=soc.ram.ram[109][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101888 q=soc.ram.ram[109][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101890 q=soc.ram.ram[109][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101892 q=soc.ram.ram[109][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101894 q=soc.ram.ram[109][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101896 q=soc.ram.ram[109][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101898 q=soc.ram.ram[109][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101900 q=soc.ram.ram[109][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101902 q=soc.ram.ram[109][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101904 q=soc.ram.ram[109][15]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[0] q=soc.cpu.minerva.gprf.mem._1_[0]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[1] q=soc.cpu.minerva.gprf.mem._1_[1]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[2] q=soc.cpu.minerva.gprf.mem._1_[2]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[3] q=soc.cpu.minerva.gprf.mem._1_[3]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[4] q=soc.cpu.minerva.gprf.mem._1_[4]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[5] q=soc.cpu.minerva.gprf.mem._1_[5]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[6] q=soc.cpu.minerva.gprf.mem._1_[6]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[7] q=soc.cpu.minerva.gprf.mem._1_[7]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[8] q=soc.cpu.minerva.gprf.mem._1_[8]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[9] q=soc.cpu.minerva.gprf.mem._1_[9]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[10] q=soc.cpu.minerva.gprf.mem._1_[10]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[11] q=soc.cpu.minerva.gprf.mem._1_[11]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[12] q=soc.cpu.minerva.gprf.mem._1_[12]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[13] q=soc.cpu.minerva.gprf.mem._1_[13]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[14] q=soc.cpu.minerva.gprf.mem._1_[14]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[15] q=soc.cpu.minerva.gprf.mem._1_[15]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[16] q=soc.cpu.minerva.gprf.mem._1_[16]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[17] q=soc.cpu.minerva.gprf.mem._1_[17]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[18] q=soc.cpu.minerva.gprf.mem._1_[18]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[19] q=soc.cpu.minerva.gprf.mem._1_[19]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[20] q=soc.cpu.minerva.gprf.mem._1_[20]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[21] q=soc.cpu.minerva.gprf.mem._1_[21]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[22] q=soc.cpu.minerva.gprf.mem._1_[22]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[23] q=soc.cpu.minerva.gprf.mem._1_[23]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[24] q=soc.cpu.minerva.gprf.mem._1_[24]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[25] q=soc.cpu.minerva.gprf.mem._1_[25]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[26] q=soc.cpu.minerva.gprf.mem._1_[26]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[27] q=soc.cpu.minerva.gprf.mem._1_[27]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[28] q=soc.cpu.minerva.gprf.mem._1_[28]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[29] q=soc.cpu.minerva.gprf.mem._1_[29]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[30] q=soc.cpu.minerva.gprf.mem._1_[30]
-.subckt sff1_x4 ck=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[31] q=soc.cpu.minerva.gprf.mem._1_[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101906 q=soc.ram.ram[109][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101908 q=soc.ram.ram[109][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101910 q=soc.ram.ram[109][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101912 q=soc.ram.ram[109][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101914 q=soc.ram.ram[109][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101916 q=soc.ram.ram[109][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101918 q=soc.ram.ram[109][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101920 q=soc.ram.ram[109][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101922 q=soc.ram.ram[107][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101924 q=soc.ram.ram[107][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101926 q=soc.ram.ram[107][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101928 q=soc.ram.ram[107][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101930 q=soc.ram.ram[107][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101932 q=soc.ram.ram[107][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101934 q=soc.ram.ram[107][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101936 q=soc.ram.ram[107][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101938 q=soc.hyperram.dqi[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101940 q=soc.hyperram.dqi[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101942 q=soc.hyperram.dqi[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101944 q=soc.hyperram.dqi[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101946 q=soc.hyperram.dqi[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101948 q=soc.hyperram.dqi[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101950 q=soc.hyperram.dqi[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101952 q=soc.hyperram.dqi[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101954 q=soc.ram.ram[123][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101956 q=soc.ram.ram[123][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101958 q=soc.ram.ram[123][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101960 q=soc.ram.ram[123][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101962 q=soc.ram.ram[123][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101964 q=soc.ram.ram[123][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101966 q=soc.ram.ram[123][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101968 q=soc.ram.ram[123][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101970 q=soc.ram.ram[122][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101972 q=soc.ram.ram[122][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101974 q=soc.ram.ram[122][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101976 q=soc.ram.ram[122][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101978 q=soc.ram.ram[122][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101980 q=soc.ram.ram[122][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101982 q=soc.ram.ram[122][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101984 q=soc.ram.ram[122][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101986 q=soc.timer.bridge.csr_mux_0.timer_en__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101990 q=soc.hyperram.clk$32
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101992 q=soc.hyperram.clk_phase[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101994 q=soc.hyperram.clk_phase[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101998 q=soc.hyperram.sr[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102002 q=soc.hyperram.sr[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102006 q=soc.hyperram.sr[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102010 q=soc.hyperram.sr[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102014 q=soc.hyperram.sr[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102018 q=soc.hyperram.sr[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102022 q=soc.hyperram.sr[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102026 q=soc.hyperram.sr[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102030 q=soc.hyperram.sr[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102034 q=soc.hyperram.sr[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102038 q=soc.hyperram.sr[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102042 q=soc.hyperram.sr[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102046 q=soc.hyperram.sr[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102050 q=soc.hyperram.sr[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102054 q=soc.hyperram.sr[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102058 q=soc.hyperram.sr[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102062 q=soc.hyperram.sr[32]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102066 q=soc.hyperram.sr[33]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102070 q=soc.hyperram.sr[34]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102074 q=soc.hyperram.sr[35]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102078 q=soc.hyperram.sr[36]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102082 q=soc.hyperram.sr[37]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102086 q=soc.hyperram.sr[38]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102090 q=soc.hyperram.sr[39]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102094 q=soc.hyperram_$signal$61
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102098 q=soc.hyperram_$signal$64
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102102 q=soc.hyperram_$signal$67
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102106 q=soc.hyperram_$signal$70
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102110 q=soc.hyperram_$signal$73
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102114 q=soc.hyperram_$signal$76
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102118 q=soc.hyperram_$signal$79
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102122 q=soc.hyperram_$signal$82
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102126 q=soc.hyperram.counter[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102130 q=soc.hyperram.counter[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102134 q=soc.hyperram.counter[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102138 q=soc.hyperram.counter[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102142 q=soc.hyperram.counter[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102146 q=soc.hyperram.counter[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102150 q=soc.hyperram.counter[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102154 q=soc.hyperram.cs
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102158 q=soc.hyperram.dq_oe
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102162 q=soc.hyperram.rwds_oe
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102166 q=soc.hyperram.$signal$4
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102170 q=soc.hyperram.bus__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102174 q=soc.gpio_$signal
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102178 q=soc.gpio_$signal$87
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102182 q=soc.gpio_$signal$90
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102186 q=soc.gpio_$signal$93
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102190 q=soc.gpio_$signal$96
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102194 q=soc.gpio_$signal$99
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102198 q=soc.gpio_$signal$102
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102202 q=soc.gpio_$signal$105
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102206 q=soc.gpio.oe_buf[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102210 q=soc.gpio.oe_buf[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102214 q=soc.gpio.oe_buf[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102218 q=soc.gpio.oe_buf[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102222 q=soc.gpio.oe_buf[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102226 q=soc.gpio.oe_buf[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102230 q=soc.gpio.oe_buf[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102234 q=soc.gpio.oe_buf[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102236 q=soc.cpu.minerva.m.valid$1
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102238 q=soc.gpio.bridge.csr_bridge_0.wb__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102240 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102244 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102248 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102252 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102256 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102260 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102264 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102268 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102272 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102274 q=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102276 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102280 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102284 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102288 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102292 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102296 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102300 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102304 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102308 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102310 q=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102314 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102318 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102322 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102326 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102330 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102334 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102338 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102342 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102344 q=soc.ram.ram[106][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102346 q=soc.ram.ram[106][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102348 q=soc.ram.ram[106][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102350 q=soc.ram.ram[106][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102352 q=soc.ram.ram[106][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102354 q=soc.ram.ram[106][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102356 q=soc.ram.ram[106][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102358 q=soc.ram.ram[106][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102362 q=soc.gpio.bridge.csr_bridge_0.cycle[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102366 q=soc.gpio.bridge.csr_bridge_0.cycle[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102370 q=soc.gpio.bridge.csr_bridge_0.cycle[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102374 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102378 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102382 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102386 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102390 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102394 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102398 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102402 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102404 q=soc.gpio.bridge_gpio_din__r_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102406 q=soc.gpio.bridge_gpio_din__r_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102408 q=soc.gpio.bridge_gpio_din__r_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102410 q=soc.gpio.bridge_gpio_din__r_data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102412 q=soc.gpio.bridge_gpio_din__r_data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102414 q=soc.gpio.bridge_gpio_din__r_data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102416 q=soc.gpio.bridge_gpio_din__r_data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102418 q=soc.gpio.bridge_gpio_din__r_data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102422 q=soc.cpu.minerva.x.valid$1
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102426 q=soc.cpu.minerva.shifter.m_direction
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102430 q=soc.cpu.minerva.shifter.m_result$9[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102434 q=soc.cpu.minerva.shifter.m_result$9[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102438 q=soc.cpu.minerva.shifter.m_result$9[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102442 q=soc.cpu.minerva.shifter.m_result$9[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102446 q=soc.cpu.minerva.shifter.m_result$9[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102450 q=soc.cpu.minerva.shifter.m_result$9[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102454 q=soc.cpu.minerva.shifter.m_result$9[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102458 q=soc.cpu.minerva.shifter.m_result$9[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102462 q=soc.cpu.minerva.shifter.m_result$9[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102466 q=soc.cpu.minerva.shifter.m_result$9[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102470 q=soc.cpu.minerva.shifter.m_result$9[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102474 q=soc.cpu.minerva.shifter.m_result$9[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102478 q=soc.cpu.minerva.shifter.m_result$9[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102482 q=soc.cpu.minerva.shifter.m_result$9[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102486 q=soc.cpu.minerva.shifter.m_result$9[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102490 q=soc.cpu.minerva.shifter.m_result$9[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102494 q=soc.cpu.minerva.shifter.m_result$9[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102498 q=soc.cpu.minerva.shifter.m_result$9[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102502 q=soc.cpu.minerva.shifter.m_result$9[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102506 q=soc.cpu.minerva.shifter.m_result$9[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102510 q=soc.cpu.minerva.shifter.m_result$9[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102514 q=soc.cpu.minerva.shifter.m_result$9[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102518 q=soc.cpu.minerva.shifter.m_result$9[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102522 q=soc.cpu.minerva.shifter.m_result$9[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102526 q=soc.cpu.minerva.shifter.m_result$9[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102530 q=soc.cpu.minerva.shifter.m_result$9[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102534 q=soc.cpu.minerva.shifter.m_result$9[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102538 q=soc.cpu.minerva.shifter.m_result$9[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102542 q=soc.cpu.minerva.shifter.m_result$9[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102546 q=soc.cpu.minerva.shifter.m_result$9[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102550 q=soc.cpu.minerva.shifter.m_result$9[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102554 q=soc.cpu.minerva.shifter.m_result$9[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102558 q=soc.cpu.minerva.payload__pc$32[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102562 q=soc.cpu.minerva.payload__pc$32[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102566 q=soc.cpu.minerva.payload__pc$32[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102570 q=soc.cpu.minerva.payload__pc$32[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102574 q=soc.cpu.minerva.payload__pc$32[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102578 q=soc.cpu.minerva.payload__pc$32[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102582 q=soc.cpu.minerva.payload__pc$32[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102586 q=soc.cpu.minerva.payload__pc$32[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102590 q=soc.cpu.minerva.payload__pc$32[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102594 q=soc.cpu.minerva.payload__pc$32[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102598 q=soc.cpu.minerva.payload__pc$32[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102602 q=soc.cpu.minerva.payload__pc$32[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102606 q=soc.cpu.minerva.payload__pc$32[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102610 q=soc.cpu.minerva.payload__pc$32[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102614 q=soc.cpu.minerva.payload__pc$32[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102618 q=soc.cpu.minerva.payload__pc$32[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102622 q=soc.cpu.minerva.payload__pc$32[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102626 q=soc.cpu.minerva.payload__pc$32[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102630 q=soc.cpu.minerva.payload__pc$32[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102634 q=soc.cpu.minerva.payload__pc$32[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102638 q=soc.cpu.minerva.payload__pc$32[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102642 q=soc.cpu.minerva.payload__pc$32[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102646 q=soc.cpu.minerva.payload__pc$32[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102650 q=soc.cpu.minerva.payload__pc$32[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102654 q=soc.cpu.minerva.payload__pc$32[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102658 q=soc.cpu.minerva.payload__pc$32[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102662 q=soc.cpu.minerva.payload__pc$32[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102666 q=soc.cpu.minerva.payload__pc$32[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102670 q=soc.cpu.minerva.payload__pc$32[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102674 q=soc.cpu.minerva.payload__pc$32[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102676 q=soc.cpu.minerva.gprf.mem._mem[3][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102678 q=soc.cpu.minerva.gprf.mem._mem[3][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102680 q=soc.cpu.minerva.gprf.mem._mem[3][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102682 q=soc.cpu.minerva.gprf.mem._mem[3][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102684 q=soc.cpu.minerva.gprf.mem._mem[3][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102686 q=soc.cpu.minerva.gprf.mem._mem[3][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102688 q=soc.cpu.minerva.gprf.mem._mem[3][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102690 q=soc.cpu.minerva.gprf.mem._mem[3][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102692 q=soc.cpu.minerva.gprf.mem._mem[3][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102694 q=soc.cpu.minerva.gprf.mem._mem[3][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102696 q=soc.cpu.minerva.gprf.mem._mem[3][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102698 q=soc.cpu.minerva.gprf.mem._mem[3][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102700 q=soc.cpu.minerva.gprf.mem._mem[3][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102702 q=soc.cpu.minerva.gprf.mem._mem[3][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102704 q=soc.cpu.minerva.gprf.mem._mem[3][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102706 q=soc.cpu.minerva.gprf.mem._mem[3][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102708 q=soc.cpu.minerva.gprf.mem._mem[3][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102710 q=soc.cpu.minerva.gprf.mem._mem[3][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102712 q=soc.cpu.minerva.gprf.mem._mem[3][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102714 q=soc.cpu.minerva.gprf.mem._mem[3][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102716 q=soc.cpu.minerva.gprf.mem._mem[3][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102718 q=soc.cpu.minerva.gprf.mem._mem[3][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102720 q=soc.cpu.minerva.gprf.mem._mem[3][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102722 q=soc.cpu.minerva.gprf.mem._mem[3][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102724 q=soc.cpu.minerva.gprf.mem._mem[3][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102726 q=soc.cpu.minerva.gprf.mem._mem[3][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102728 q=soc.cpu.minerva.gprf.mem._mem[3][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102730 q=soc.cpu.minerva.gprf.mem._mem[3][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102732 q=soc.cpu.minerva.gprf.mem._mem[3][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102734 q=soc.cpu.minerva.gprf.mem._mem[3][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102736 q=soc.cpu.minerva.gprf.mem._mem[3][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102738 q=soc.cpu.minerva.gprf.mem._mem[3][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102742 q=soc.cpu.minerva.multiplier.x_low
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102746 q=soc.cpu.minerva.multiplier.x_src1_signed
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102750 q=soc.cpu.minerva.multiplier.x_src2_signed
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102754 q=soc.cpu.minerva.multiplier.m_low
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102758 q=soc.cpu.minerva.multiplier.m_prod[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102762 q=soc.cpu.minerva.multiplier.m_prod[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102766 q=soc.cpu.minerva.multiplier.m_prod[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102770 q=soc.cpu.minerva.multiplier.m_prod[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102774 q=soc.cpu.minerva.multiplier.m_prod[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102778 q=soc.cpu.minerva.multiplier.m_prod[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102782 q=soc.cpu.minerva.multiplier.m_prod[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102786 q=soc.cpu.minerva.multiplier.m_prod[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102790 q=soc.cpu.minerva.multiplier.m_prod[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102794 q=soc.cpu.minerva.multiplier.m_prod[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102798 q=soc.cpu.minerva.multiplier.m_prod[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102802 q=soc.cpu.minerva.multiplier.m_prod[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102806 q=soc.cpu.minerva.multiplier.m_prod[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102810 q=soc.cpu.minerva.multiplier.m_prod[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102814 q=soc.cpu.minerva.multiplier.m_prod[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102818 q=soc.cpu.minerva.multiplier.m_prod[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102822 q=soc.cpu.minerva.multiplier.m_prod[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102826 q=soc.cpu.minerva.multiplier.m_prod[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102830 q=soc.cpu.minerva.multiplier.m_prod[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102834 q=soc.cpu.minerva.multiplier.m_prod[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102838 q=soc.cpu.minerva.multiplier.m_prod[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102842 q=soc.cpu.minerva.multiplier.m_prod[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102846 q=soc.cpu.minerva.multiplier.m_prod[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102850 q=soc.cpu.minerva.multiplier.m_prod[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102854 q=soc.cpu.minerva.multiplier.m_prod[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102858 q=soc.cpu.minerva.multiplier.m_prod[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102862 q=soc.cpu.minerva.multiplier.m_prod[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102866 q=soc.cpu.minerva.multiplier.m_prod[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102870 q=soc.cpu.minerva.multiplier.m_prod[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102874 q=soc.cpu.minerva.multiplier.m_prod[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102878 q=soc.cpu.minerva.multiplier.m_prod[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102882 q=soc.cpu.minerva.multiplier.m_prod[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102886 q=soc.cpu.minerva.multiplier.m_prod[32]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102890 q=soc.cpu.minerva.multiplier.m_prod[33]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102894 q=soc.cpu.minerva.multiplier.m_prod[34]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102898 q=soc.cpu.minerva.multiplier.m_prod[35]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102902 q=soc.cpu.minerva.multiplier.m_prod[36]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102906 q=soc.cpu.minerva.multiplier.m_prod[37]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102910 q=soc.cpu.minerva.multiplier.m_prod[38]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102914 q=soc.cpu.minerva.multiplier.m_prod[39]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102918 q=soc.cpu.minerva.multiplier.m_prod[40]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102922 q=soc.cpu.minerva.multiplier.m_prod[41]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102926 q=soc.cpu.minerva.multiplier.m_prod[42]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102930 q=soc.cpu.minerva.multiplier.m_prod[43]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102934 q=soc.cpu.minerva.multiplier.m_prod[44]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102938 q=soc.cpu.minerva.multiplier.m_prod[45]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102942 q=soc.cpu.minerva.multiplier.m_prod[46]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102946 q=soc.cpu.minerva.multiplier.m_prod[47]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102950 q=soc.cpu.minerva.multiplier.m_prod[48]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102954 q=soc.cpu.minerva.multiplier.m_prod[49]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102958 q=soc.cpu.minerva.multiplier.m_prod[50]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102962 q=soc.cpu.minerva.multiplier.m_prod[51]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102966 q=soc.cpu.minerva.multiplier.m_prod[52]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102970 q=soc.cpu.minerva.multiplier.m_prod[53]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102974 q=soc.cpu.minerva.multiplier.m_prod[54]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102978 q=soc.cpu.minerva.multiplier.m_prod[55]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102982 q=soc.cpu.minerva.multiplier.m_prod[56]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102986 q=soc.cpu.minerva.multiplier.m_prod[57]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102990 q=soc.cpu.minerva.multiplier.m_prod[58]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102994 q=soc.cpu.minerva.multiplier.m_prod[59]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102998 q=soc.cpu.minerva.multiplier.m_prod[60]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103002 q=soc.cpu.minerva.multiplier.m_prod[61]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103006 q=soc.cpu.minerva.multiplier.m_prod[62]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103010 q=soc.cpu.minerva.multiplier.m_prod[63]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103014 q=soc.cpu.minerva.multiplier.w_result[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103018 q=soc.cpu.minerva.multiplier.w_result[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103022 q=soc.cpu.minerva.multiplier.w_result[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103026 q=soc.cpu.minerva.multiplier.w_result[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103030 q=soc.cpu.minerva.multiplier.w_result[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103034 q=soc.cpu.minerva.multiplier.w_result[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103038 q=soc.cpu.minerva.multiplier.w_result[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103042 q=soc.cpu.minerva.multiplier.w_result[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103046 q=soc.cpu.minerva.multiplier.w_result[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103050 q=soc.cpu.minerva.multiplier.w_result[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103054 q=soc.cpu.minerva.multiplier.w_result[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103058 q=soc.cpu.minerva.multiplier.w_result[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103062 q=soc.cpu.minerva.multiplier.w_result[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103066 q=soc.cpu.minerva.multiplier.w_result[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103070 q=soc.cpu.minerva.multiplier.w_result[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103074 q=soc.cpu.minerva.multiplier.w_result[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103078 q=soc.cpu.minerva.multiplier.w_result[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103082 q=soc.cpu.minerva.multiplier.w_result[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103086 q=soc.cpu.minerva.multiplier.w_result[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103090 q=soc.cpu.minerva.multiplier.w_result[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103094 q=soc.cpu.minerva.multiplier.w_result[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103098 q=soc.cpu.minerva.multiplier.w_result[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103102 q=soc.cpu.minerva.multiplier.w_result[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103106 q=soc.cpu.minerva.multiplier.w_result[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103110 q=soc.cpu.minerva.multiplier.w_result[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103114 q=soc.cpu.minerva.multiplier.w_result[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103118 q=soc.cpu.minerva.multiplier.w_result[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103122 q=soc.cpu.minerva.multiplier.w_result[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103126 q=soc.cpu.minerva.multiplier.w_result[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103130 q=soc.cpu.minerva.multiplier.w_result[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103134 q=soc.cpu.minerva.multiplier.w_result[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103138 q=soc.cpu.minerva.multiplier.w_result[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[0] q=soc.rom.spimemio.state[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[1] q=soc.rom.spimemio.state[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[2] q=soc.rom.spimemio.state[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[3] q=soc.rom.spimemio.state[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[4] q=soc.rom.spimemio.state[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[5] q=soc.rom.spimemio.state[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[6] q=soc.rom.spimemio.state[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[7] q=soc.rom.spimemio.state[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[8] q=soc.rom.spimemio.state[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[9] q=soc.rom.spimemio.state[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[10] q=soc.rom.spimemio.state[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[11] q=soc.rom.spimemio.state[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[12] q=soc.rom.spimemio.state[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103140 q=soc.ram.ram[106][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103142 q=soc.ram.ram[106][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103144 q=soc.ram.ram[106][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103146 q=soc.ram.ram[106][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103148 q=soc.ram.ram[106][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103150 q=soc.ram.ram[106][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103152 q=soc.ram.ram[106][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103154 q=soc.ram.ram[106][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103156 q=soc.ram.ram[45][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103158 q=soc.ram.ram[45][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103160 q=soc.ram.ram[45][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103162 q=soc.ram.ram[45][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103164 q=soc.ram.ram[45][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103166 q=soc.ram.ram[45][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103168 q=soc.ram.ram[45][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103170 q=soc.ram.ram[45][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103172 q=soc.ram.ram[47][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103174 q=soc.ram.ram[47][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103176 q=soc.ram.ram[47][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103178 q=soc.ram.ram[47][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103180 q=soc.ram.ram[47][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103182 q=soc.ram.ram[47][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103184 q=soc.ram.ram[47][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103186 q=soc.ram.ram[47][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103188 q=soc.cpu.minerva.gprf.mem.collision[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103190 q=soc.cpu.minerva.gprf.mem.collision[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103194 q=soc.cpu.minerva.loadstore.dbus__stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103198 q=soc.cpu.minerva.loadstore.m_load_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103202 q=soc.cpu.minerva.loadstore.m_load_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103206 q=soc.cpu.minerva.loadstore.m_load_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103210 q=soc.cpu.minerva.loadstore.m_load_data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103214 q=soc.cpu.minerva.loadstore.m_load_data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103218 q=soc.cpu.minerva.loadstore.m_load_data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103222 q=soc.cpu.minerva.loadstore.m_load_data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103226 q=soc.cpu.minerva.loadstore.m_load_data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103230 q=soc.cpu.minerva.loadstore.m_load_data[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103234 q=soc.cpu.minerva.loadstore.m_load_data[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103238 q=soc.cpu.minerva.loadstore.m_load_data[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103242 q=soc.cpu.minerva.loadstore.m_load_data[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103246 q=soc.cpu.minerva.loadstore.m_load_data[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103250 q=soc.cpu.minerva.loadstore.m_load_data[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103254 q=soc.cpu.minerva.loadstore.m_load_data[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103258 q=soc.cpu.minerva.loadstore.m_load_data[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103262 q=soc.cpu.minerva.loadstore.m_load_data[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103266 q=soc.cpu.minerva.loadstore.m_load_data[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103270 q=soc.cpu.minerva.loadstore.m_load_data[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103274 q=soc.cpu.minerva.loadstore.m_load_data[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103278 q=soc.cpu.minerva.loadstore.m_load_data[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103282 q=soc.cpu.minerva.loadstore.m_load_data[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103286 q=soc.cpu.minerva.loadstore.m_load_data[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103290 q=soc.cpu.minerva.loadstore.m_load_data[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103294 q=soc.cpu.minerva.loadstore.m_load_data[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103298 q=soc.cpu.minerva.loadstore.m_load_data[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103302 q=soc.cpu.minerva.loadstore.m_load_data[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103306 q=soc.cpu.minerva.loadstore.m_load_data[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103310 q=soc.cpu.minerva.loadstore.m_load_data[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103314 q=soc.cpu.minerva.loadstore.m_load_data[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103318 q=soc.cpu.minerva.loadstore.m_load_data[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103322 q=soc.cpu.minerva.loadstore.m_load_data[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103326 q=soc.cpu.minerva.loadstore.dbus__adr[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103330 q=soc.cpu.minerva.loadstore.dbus__adr[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103334 q=soc.cpu.minerva.loadstore.dbus__adr[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103338 q=soc.cpu.minerva.loadstore.dbus__adr[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103342 q=soc.cpu.minerva.loadstore.dbus__adr[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103346 q=soc.cpu.minerva.loadstore.dbus__adr[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103350 q=soc.cpu.minerva.loadstore.dbus__adr[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103354 q=soc.cpu.minerva.loadstore.dbus__adr[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103358 q=soc.cpu.minerva.loadstore.dbus__adr[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103362 q=soc.cpu.minerva.loadstore.dbus__adr[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103366 q=soc.cpu.minerva.loadstore.dbus__adr[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103370 q=soc.cpu.minerva.loadstore.dbus__adr[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103374 q=soc.cpu.minerva.loadstore.dbus__adr[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103378 q=soc.cpu.minerva.loadstore.dbus__adr[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103382 q=soc.cpu.minerva.loadstore.dbus__adr[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103386 q=soc.cpu.minerva.loadstore.dbus__adr[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103390 q=soc.cpu.minerva.loadstore.dbus__adr[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103394 q=soc.cpu.minerva.loadstore.dbus__adr[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103398 q=soc.cpu.minerva.loadstore.dbus__adr[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103402 q=soc.cpu.minerva.loadstore.dbus__adr[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103406 q=soc.cpu.minerva.loadstore.dbus__adr[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103410 q=soc.cpu.minerva.loadstore.dbus__adr[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103414 q=soc.cpu.minerva.loadstore.dbus__adr[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103418 q=soc.cpu.minerva.loadstore.dbus__adr[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103422 q=soc.cpu.minerva.loadstore.dbus__adr[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103426 q=soc.cpu.minerva.loadstore.dbus__adr[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103430 q=soc.cpu.minerva.loadstore.dbus__adr[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103434 q=soc.cpu.minerva.loadstore.dbus__adr[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103438 q=soc.cpu.minerva.loadstore.dbus__adr[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103442 q=soc.cpu.minerva.loadstore.dbus__adr[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103446 q=soc.cpu.minerva.loadstore.dbus__sel[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103450 q=soc.cpu.minerva.loadstore.dbus__sel[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103454 q=soc.cpu.minerva.loadstore.dbus__sel[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103458 q=soc.cpu.minerva.loadstore.dbus__sel[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103462 q=soc.cpu.minerva.loadstore.dbus__we
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103466 q=soc.cpu.minerva.loadstore.dbus__dat_w[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103470 q=soc.cpu.minerva.loadstore.dbus__dat_w[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103474 q=soc.cpu.minerva.loadstore.dbus__dat_w[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103478 q=soc.cpu.minerva.loadstore.dbus__dat_w[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103482 q=soc.cpu.minerva.loadstore.dbus__dat_w[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103486 q=soc.cpu.minerva.loadstore.dbus__dat_w[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103490 q=soc.cpu.minerva.loadstore.dbus__dat_w[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103494 q=soc.cpu.minerva.loadstore.dbus__dat_w[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103498 q=soc.cpu.minerva.loadstore.dbus__dat_w[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103502 q=soc.cpu.minerva.loadstore.dbus__dat_w[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103506 q=soc.cpu.minerva.loadstore.dbus__dat_w[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103510 q=soc.cpu.minerva.loadstore.dbus__dat_w[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103514 q=soc.cpu.minerva.loadstore.dbus__dat_w[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103518 q=soc.cpu.minerva.loadstore.dbus__dat_w[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103522 q=soc.cpu.minerva.loadstore.dbus__dat_w[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103526 q=soc.cpu.minerva.loadstore.dbus__dat_w[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103530 q=soc.cpu.minerva.loadstore.dbus__dat_w[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103534 q=soc.cpu.minerva.loadstore.dbus__dat_w[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103538 q=soc.cpu.minerva.loadstore.dbus__dat_w[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103542 q=soc.cpu.minerva.loadstore.dbus__dat_w[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103546 q=soc.cpu.minerva.loadstore.dbus__dat_w[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103550 q=soc.cpu.minerva.loadstore.dbus__dat_w[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103554 q=soc.cpu.minerva.loadstore.dbus__dat_w[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103558 q=soc.cpu.minerva.loadstore.dbus__dat_w[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103562 q=soc.cpu.minerva.loadstore.dbus__dat_w[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103566 q=soc.cpu.minerva.loadstore.dbus__dat_w[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103570 q=soc.cpu.minerva.loadstore.dbus__dat_w[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103574 q=soc.cpu.minerva.loadstore.dbus__dat_w[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103578 q=soc.cpu.minerva.loadstore.dbus__dat_w[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103582 q=soc.cpu.minerva.loadstore.dbus__dat_w[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103586 q=soc.cpu.minerva.loadstore.dbus__dat_w[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103590 q=soc.cpu.minerva.loadstore.dbus__dat_w[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103592 q=soc.cpu.minerva.loadstore.dbus__cyc
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103594 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103596 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103598 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103600 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103602 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103604 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103606 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103608 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103610 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103612 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103614 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103616 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103618 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103620 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103622 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103624 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103626 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103628 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103630 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103632 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103634 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103636 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103638 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103640 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103642 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103644 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103646 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103648 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103650 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103652 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103654 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103656 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103658 q=soc.cpu.minerva.gprf.mem.fwd_wp_en
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103660 q=soc.ram.ram[0][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103662 q=soc.ram.ram[0][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103664 q=soc.ram.ram[0][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103666 q=soc.ram.ram[0][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103668 q=soc.ram.ram[0][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103670 q=soc.ram.ram[0][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103672 q=soc.ram.ram[0][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103674 q=soc.ram.ram[0][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103676 q=soc.ram.ram[119][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103678 q=soc.ram.ram[119][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103680 q=soc.ram.ram[119][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103682 q=soc.ram.ram[119][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103684 q=soc.ram.ram[119][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103686 q=soc.ram.ram[119][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103688 q=soc.ram.ram[119][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103690 q=soc.ram.ram[119][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103692 q=soc.ram.ram[119][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103694 q=soc.ram.ram[119][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103696 q=soc.ram.ram[119][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103698 q=soc.ram.ram[119][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103700 q=soc.ram.ram[119][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103702 q=soc.ram.ram[119][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103704 q=soc.ram.ram[119][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103706 q=soc.ram.ram[119][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103708 q=soc.ram.ram[119][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103710 q=soc.ram.ram[119][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103712 q=soc.ram.ram[119][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103714 q=soc.ram.ram[119][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103716 q=soc.ram.ram[119][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103718 q=soc.ram.ram[119][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103720 q=soc.ram.ram[119][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103722 q=soc.ram.ram[119][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103724 q=soc.ram.ram[11][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103726 q=soc.ram.ram[11][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103728 q=soc.ram.ram[11][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103730 q=soc.ram.ram[11][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103732 q=soc.ram.ram[11][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103734 q=soc.ram.ram[11][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103736 q=soc.ram.ram[11][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103738 q=soc.ram.ram[11][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103740 q=soc.ram.ram[11][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103742 q=soc.ram.ram[11][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103744 q=soc.ram.ram[11][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103746 q=soc.ram.ram[11][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103748 q=soc.ram.ram[11][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103750 q=soc.ram.ram[11][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103752 q=soc.ram.ram[11][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103754 q=soc.ram.ram[11][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103756 q=soc.ram.ram[11][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103758 q=soc.ram.ram[11][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103760 q=soc.ram.ram[11][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103762 q=soc.ram.ram[11][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103764 q=soc.ram.ram[11][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103766 q=soc.ram.ram[11][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103768 q=soc.ram.ram[11][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103770 q=soc.ram.ram[11][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103772 q=soc.ram.ram[120][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103774 q=soc.ram.ram[120][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103776 q=soc.ram.ram[120][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103778 q=soc.ram.ram[120][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103780 q=soc.ram.ram[120][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103782 q=soc.ram.ram[120][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103784 q=soc.ram.ram[120][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103786 q=soc.ram.ram[120][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103788 q=soc.ram.ram[120][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103790 q=soc.ram.ram[120][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103792 q=soc.ram.ram[120][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103794 q=soc.ram.ram[120][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103796 q=soc.ram.ram[120][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103798 q=soc.ram.ram[120][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103800 q=soc.ram.ram[120][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103802 q=soc.ram.ram[120][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103804 q=soc.ram.ram[120][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103806 q=soc.ram.ram[120][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103808 q=soc.ram.ram[120][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103810 q=soc.ram.ram[120][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103812 q=soc.ram.ram[120][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103814 q=soc.ram.ram[120][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103816 q=soc.ram.ram[120][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103818 q=soc.ram.ram[120][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103820 q=soc.ram.ram[121][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103822 q=soc.ram.ram[121][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103824 q=soc.ram.ram[121][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103826 q=soc.ram.ram[121][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103828 q=soc.ram.ram[121][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103830 q=soc.ram.ram[121][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103832 q=soc.ram.ram[121][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103834 q=soc.ram.ram[121][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103836 q=soc.ram.ram[121][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103838 q=soc.ram.ram[121][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103840 q=soc.ram.ram[121][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103842 q=soc.ram.ram[121][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103844 q=soc.ram.ram[121][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103846 q=soc.ram.ram[121][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103848 q=soc.ram.ram[121][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103850 q=soc.ram.ram[121][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103852 q=soc.ram.ram[121][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103854 q=soc.ram.ram[121][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103856 q=soc.ram.ram[121][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103858 q=soc.ram.ram[121][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103860 q=soc.ram.ram[121][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103862 q=soc.ram.ram[121][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103864 q=soc.ram.ram[121][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103866 q=soc.ram.ram[121][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103868 q=soc.ram.ram[122][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103870 q=soc.ram.ram[122][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103872 q=soc.ram.ram[122][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103874 q=soc.ram.ram[122][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103876 q=soc.ram.ram[122][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103878 q=soc.ram.ram[122][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103880 q=soc.ram.ram[122][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103882 q=soc.ram.ram[122][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103884 q=soc.ram.ram[28][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103886 q=soc.ram.ram[28][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103888 q=soc.ram.ram[28][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103890 q=soc.ram.ram[28][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103892 q=soc.ram.ram[28][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103894 q=soc.ram.ram[28][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103896 q=soc.ram.ram[28][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103898 q=soc.ram.ram[28][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103900 q=soc.ram.ram[28][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103902 q=soc.ram.ram[28][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103904 q=soc.ram.ram[28][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103906 q=soc.ram.ram[28][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103908 q=soc.ram.ram[28][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103910 q=soc.ram.ram[28][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103912 q=soc.ram.ram[28][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103914 q=soc.ram.ram[28][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103916 q=soc.bridge.csr_mux_0.uart_rx_rdy__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103920 q=soc.cpu.minerva.fetch.ibus__stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103924 q=soc.cpu.minerva.fetch.ibus_rdata[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103928 q=soc.cpu.minerva.fetch.ibus_rdata[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103932 q=soc.cpu.minerva.fetch.ibus_rdata[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103936 q=soc.cpu.minerva.fetch.ibus_rdata[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103940 q=soc.cpu.minerva.fetch.ibus_rdata[4]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105066 q=soc.cpu.minerva.gprf.mem._mem[23][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105068 q=soc.cpu.minerva.gprf.mem._mem[23][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105070 q=soc.cpu.minerva.gprf.mem._mem[23][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105072 q=soc.cpu.minerva.gprf.mem._mem[23][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105074 q=soc.cpu.minerva.gprf.mem._mem[23][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105076 q=soc.cpu.minerva.gprf.mem._mem[23][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105078 q=soc.cpu.minerva.gprf.mem._mem[23][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105080 q=soc.cpu.minerva.gprf.mem._mem[23][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105082 q=soc.cpu.minerva.gprf.mem._mem[23][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105084 q=soc.cpu.minerva.gprf.mem._mem[23][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105086 q=soc.cpu.minerva.gprf.mem._mem[23][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105088 q=soc.cpu.minerva.gprf.mem._mem[23][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105090 q=soc.cpu.minerva.gprf.mem._mem[23][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105092 q=soc.cpu.minerva.gprf.mem._mem[23][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105094 q=soc.cpu.minerva.gprf.mem._mem[23][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105096 q=soc.cpu.minerva.gprf.mem._mem[23][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105098 q=soc.cpu.minerva.gprf.mem._mem[23][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105100 q=soc.cpu.minerva.gprf.mem._mem[23][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105102 q=soc.cpu.minerva.gprf.mem._mem[23][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105104 q=soc.cpu.minerva.gprf.mem._mem[23][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105106 q=soc.cpu.minerva.gprf.mem._mem[23][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105108 q=soc.cpu.minerva.gprf.mem._mem[23][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105110 q=soc.cpu.minerva.gprf.mem._mem[23][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105112 q=soc.cpu.minerva.gprf.mem._mem[23][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105114 q=soc.cpu.minerva.gprf.mem._mem[23][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105116 q=soc.cpu.minerva.gprf.mem._mem[23][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105118 q=soc.cpu.minerva.gprf.mem._mem[23][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105120 q=soc.cpu.minerva.gprf.mem._mem[23][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105122 q=soc.cpu.minerva.gprf.mem._mem[23][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105124 q=soc.cpu.minerva.gprf.mem._mem[23][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105126 q=soc.cpu.minerva.gprf.mem._mem[23][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105128 q=soc.cpu.minerva.gprf.mem._mem[21][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105130 q=soc.cpu.minerva.gprf.mem._mem[21][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105132 q=soc.cpu.minerva.gprf.mem._mem[21][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105134 q=soc.cpu.minerva.gprf.mem._mem[21][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105136 q=soc.cpu.minerva.gprf.mem._mem[21][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105138 q=soc.cpu.minerva.gprf.mem._mem[21][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105140 q=soc.cpu.minerva.gprf.mem._mem[21][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105142 q=soc.cpu.minerva.gprf.mem._mem[21][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105144 q=soc.cpu.minerva.gprf.mem._mem[21][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105146 q=soc.cpu.minerva.gprf.mem._mem[21][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105148 q=soc.cpu.minerva.gprf.mem._mem[21][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105150 q=soc.cpu.minerva.gprf.mem._mem[21][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105152 q=soc.cpu.minerva.gprf.mem._mem[21][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105154 q=soc.cpu.minerva.gprf.mem._mem[21][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105156 q=soc.cpu.minerva.gprf.mem._mem[21][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105158 q=soc.cpu.minerva.gprf.mem._mem[21][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105160 q=soc.cpu.minerva.gprf.mem._mem[21][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105162 q=soc.cpu.minerva.gprf.mem._mem[21][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105164 q=soc.cpu.minerva.gprf.mem._mem[21][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105166 q=soc.cpu.minerva.gprf.mem._mem[21][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105168 q=soc.cpu.minerva.gprf.mem._mem[21][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105170 q=soc.cpu.minerva.gprf.mem._mem[21][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105172 q=soc.cpu.minerva.gprf.mem._mem[21][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105174 q=soc.cpu.minerva.gprf.mem._mem[21][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105176 q=soc.cpu.minerva.gprf.mem._mem[21][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105178 q=soc.cpu.minerva.gprf.mem._mem[21][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105180 q=soc.cpu.minerva.gprf.mem._mem[21][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105182 q=soc.cpu.minerva.gprf.mem._mem[21][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105184 q=soc.cpu.minerva.gprf.mem._mem[21][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105186 q=soc.cpu.minerva.gprf.mem._mem[21][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105188 q=soc.cpu.minerva.gprf.mem._mem[21][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105190 q=soc.cpu.minerva.gprf.mem._mem[21][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105194 q=soc.cpu.minerva.divider.m_modulus
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105198 q=soc.cpu.minerva.divider.m_negative
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105202 q=soc.cpu.minerva.divider.quotient[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105206 q=soc.cpu.minerva.divider.quotient[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105210 q=soc.cpu.minerva.divider.quotient[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105214 q=soc.cpu.minerva.divider.quotient[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105218 q=soc.cpu.minerva.divider.quotient[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105222 q=soc.cpu.minerva.divider.quotient[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105226 q=soc.cpu.minerva.divider.quotient[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105230 q=soc.cpu.minerva.divider.quotient[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105234 q=soc.cpu.minerva.divider.quotient[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105238 q=soc.cpu.minerva.divider.quotient[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105242 q=soc.cpu.minerva.divider.quotient[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105246 q=soc.cpu.minerva.divider.quotient[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105250 q=soc.cpu.minerva.divider.quotient[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105254 q=soc.cpu.minerva.divider.quotient[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105258 q=soc.cpu.minerva.divider.quotient[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105262 q=soc.cpu.minerva.divider.quotient[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105266 q=soc.cpu.minerva.divider.quotient[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105270 q=soc.cpu.minerva.divider.quotient[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105274 q=soc.cpu.minerva.divider.quotient[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105278 q=soc.cpu.minerva.divider.quotient[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105282 q=soc.cpu.minerva.divider.quotient[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105286 q=soc.cpu.minerva.divider.quotient[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105290 q=soc.cpu.minerva.divider.quotient[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105294 q=soc.cpu.minerva.divider.quotient[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105298 q=soc.cpu.minerva.divider.quotient[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105302 q=soc.cpu.minerva.divider.quotient[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105306 q=soc.cpu.minerva.divider.quotient[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105310 q=soc.cpu.minerva.divider.quotient[28]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105322 q=soc.cpu.minerva.divider.quotient[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105326 q=soc.cpu.minerva.divider.remainder[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105330 q=soc.cpu.minerva.divider.remainder[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105334 q=soc.cpu.minerva.divider.remainder[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105338 q=soc.cpu.minerva.divider.remainder[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105342 q=soc.cpu.minerva.divider.remainder[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105346 q=soc.cpu.minerva.divider.remainder[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105350 q=soc.cpu.minerva.divider.remainder[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105354 q=soc.cpu.minerva.divider.remainder[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105358 q=soc.cpu.minerva.divider.remainder[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105362 q=soc.cpu.minerva.divider.remainder[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105366 q=soc.cpu.minerva.divider.remainder[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105370 q=soc.cpu.minerva.divider.remainder[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105374 q=soc.cpu.minerva.divider.remainder[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105378 q=soc.cpu.minerva.divider.remainder[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105382 q=soc.cpu.minerva.divider.remainder[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105386 q=soc.cpu.minerva.divider.remainder[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105390 q=soc.cpu.minerva.divider.remainder[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105394 q=soc.cpu.minerva.divider.remainder[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105398 q=soc.cpu.minerva.divider.remainder[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105402 q=soc.cpu.minerva.divider.remainder[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105406 q=soc.cpu.minerva.divider.remainder[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105410 q=soc.cpu.minerva.divider.remainder[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105414 q=soc.cpu.minerva.divider.remainder[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105418 q=soc.cpu.minerva.divider.remainder[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105422 q=soc.cpu.minerva.divider.remainder[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105426 q=soc.cpu.minerva.divider.remainder[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105430 q=soc.cpu.minerva.divider.remainder[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105434 q=soc.cpu.minerva.divider.remainder[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105438 q=soc.cpu.minerva.divider.remainder[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105442 q=soc.cpu.minerva.divider.remainder[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105446 q=soc.cpu.minerva.divider.remainder[31]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105454 q=soc.cpu.minerva.divider.divisor[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105458 q=soc.cpu.minerva.divider.divisor[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105462 q=soc.cpu.minerva.divider.divisor[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105466 q=soc.cpu.minerva.divider.divisor[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105470 q=soc.cpu.minerva.divider.divisor[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105474 q=soc.cpu.minerva.divider.divisor[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105478 q=soc.cpu.minerva.divider.divisor[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105482 q=soc.cpu.minerva.divider.divisor[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105486 q=soc.cpu.minerva.divider.divisor[9]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105498 q=soc.cpu.minerva.divider.divisor[12]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105646 q=soc.cpu.minerva.payload__pc$25[13]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105658 q=soc.cpu.minerva.payload__pc$25[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105662 q=soc.cpu.minerva.payload__pc$25[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105666 q=soc.cpu.minerva.payload__pc$25[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105670 q=soc.cpu.minerva.payload__pc$25[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105674 q=soc.cpu.minerva.payload__pc$25[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105678 q=soc.cpu.minerva.payload__pc$25[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105682 q=soc.cpu.minerva.payload__pc$25[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105686 q=soc.cpu.minerva.payload__pc$25[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105690 q=soc.cpu.minerva.payload__pc$25[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105694 q=soc.cpu.minerva.payload__pc$25[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105698 q=soc.cpu.minerva.payload__pc$25[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105702 q=soc.cpu.minerva.payload__pc$25[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105706 q=soc.cpu.minerva.payload__pc$25[28]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105842 q=soc.ram.ram[96][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105844 q=soc.ram.ram[96][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105846 q=soc.ram.ram[96][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105848 q=soc.ram.ram[96][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105850 q=soc.ram.ram[96][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105852 q=soc.ram.ram[96][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105854 q=soc.ram.ram[96][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105856 q=soc.ram.ram[96][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105858 q=soc.ram.ram[96][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105860 q=soc.ram.ram[96][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105862 q=soc.ram.ram[96][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105866 q=soc.rom.spimemio.xfer.xfer_tag[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105870 q=soc.rom.spimemio.xfer.xfer_tag[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105874 q=soc.rom.spimemio.xfer.xfer_tag[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105876 q=soc.ram.ram[96][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105878 q=soc.ram.ram[96][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105880 q=soc.ram.ram[96][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105882 q=soc.ram.ram[96][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105884 q=soc.ram.ram[96][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105886 q=soc.ram.ram[96][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105888 q=soc.ram.ram[96][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105890 q=soc.ram.ram[96][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105892 q=soc.ram.ram[95][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105894 q=soc.ram.ram[95][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105896 q=soc.ram.ram[95][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105898 q=soc.ram.ram[95][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105900 q=soc.ram.ram[95][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105902 q=soc.ram.ram[95][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105904 q=soc.ram.ram[95][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105906 q=soc.ram.ram[95][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105908 q=soc.ram.ram[95][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105910 q=soc.ram.ram[95][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105912 q=soc.ram.ram[95][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105914 q=soc.ram.ram[95][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105916 q=soc.ram.ram[95][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105918 q=soc.ram.ram[95][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105920 q=soc.ram.ram[95][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105922 q=soc.ram.ram[95][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105924 q=soc.ram.ram[95][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105926 q=soc.ram.ram[95][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105928 q=soc.ram.ram[95][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105930 q=soc.ram.ram[95][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105932 q=soc.ram.ram[95][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105934 q=soc.ram.ram[95][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105936 q=soc.ram.ram[95][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105938 q=soc.ram.ram[95][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105940 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105942 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105944 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105946 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105948 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105950 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105952 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105954 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105956 q=soc.ram.ram[94][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105958 q=soc.ram.ram[94][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105960 q=soc.ram.ram[94][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105962 q=soc.ram.ram[94][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105964 q=soc.ram.ram[94][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105966 q=soc.ram.ram[94][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105968 q=soc.ram.ram[94][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105970 q=soc.ram.ram[94][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105972 q=soc.rx_fifo.unbuffered.storage[1][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105974 q=soc.rx_fifo.unbuffered.storage[1][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105976 q=soc.rx_fifo.unbuffered.storage[1][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105978 q=soc.rx_fifo.unbuffered.storage[1][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105980 q=soc.rx_fifo.unbuffered.storage[1][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105982 q=soc.rx_fifo.unbuffered.storage[1][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105984 q=soc.rx_fifo.unbuffered.storage[1][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105986 q=soc.rx_fifo.unbuffered.storage[1][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105988 q=soc.ram.ram[94][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105990 q=soc.ram.ram[94][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105992 q=soc.ram.ram[94][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105994 q=soc.ram.ram[94][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105996 q=soc.ram.ram[94][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105998 q=soc.ram.ram[94][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106000 q=soc.ram.ram[94][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106002 q=soc.ram.ram[94][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106004 q=soc.rx_fifo.unbuffered.storage[0][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106006 q=soc.rx_fifo.unbuffered.storage[0][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106008 q=soc.rx_fifo.unbuffered.storage[0][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106010 q=soc.rx_fifo.unbuffered.storage[0][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106012 q=soc.rx_fifo.unbuffered.storage[0][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106014 q=soc.rx_fifo.unbuffered.storage[0][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106016 q=soc.rx_fifo.unbuffered.storage[0][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106018 q=soc.rx_fifo.unbuffered.storage[0][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106020 q=soc.ram.ram[94][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106022 q=soc.ram.ram[94][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106024 q=soc.ram.ram[94][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106026 q=soc.ram.ram[94][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106028 q=soc.ram.ram[94][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106030 q=soc.ram.ram[94][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106032 q=soc.ram.ram[94][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106034 q=soc.ram.ram[94][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106036 q=soc.ram.ram[9][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106038 q=soc.ram.ram[9][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106040 q=soc.ram.ram[9][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106042 q=soc.ram.ram[9][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106044 q=soc.ram.ram[9][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106046 q=soc.ram.ram[9][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106048 q=soc.ram.ram[9][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106050 q=soc.ram.ram[9][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106052 q=soc.cpu.minerva.gprf.mem._mem[6][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106054 q=soc.cpu.minerva.gprf.mem._mem[6][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106056 q=soc.cpu.minerva.gprf.mem._mem[6][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106058 q=soc.cpu.minerva.gprf.mem._mem[6][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106060 q=soc.cpu.minerva.gprf.mem._mem[6][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106062 q=soc.cpu.minerva.gprf.mem._mem[6][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106064 q=soc.cpu.minerva.gprf.mem._mem[6][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106066 q=soc.cpu.minerva.gprf.mem._mem[6][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106068 q=soc.cpu.minerva.gprf.mem._mem[6][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106070 q=soc.cpu.minerva.gprf.mem._mem[6][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106072 q=soc.cpu.minerva.gprf.mem._mem[6][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106074 q=soc.cpu.minerva.gprf.mem._mem[6][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106076 q=soc.cpu.minerva.gprf.mem._mem[6][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106078 q=soc.cpu.minerva.gprf.mem._mem[6][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106080 q=soc.cpu.minerva.gprf.mem._mem[6][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106082 q=soc.cpu.minerva.gprf.mem._mem[6][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106084 q=soc.cpu.minerva.gprf.mem._mem[6][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106086 q=soc.cpu.minerva.gprf.mem._mem[6][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106088 q=soc.cpu.minerva.gprf.mem._mem[6][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106090 q=soc.cpu.minerva.gprf.mem._mem[6][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106092 q=soc.cpu.minerva.gprf.mem._mem[6][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106094 q=soc.cpu.minerva.gprf.mem._mem[6][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106096 q=soc.cpu.minerva.gprf.mem._mem[6][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106098 q=soc.cpu.minerva.gprf.mem._mem[6][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106100 q=soc.cpu.minerva.gprf.mem._mem[6][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106102 q=soc.cpu.minerva.gprf.mem._mem[6][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106104 q=soc.cpu.minerva.gprf.mem._mem[6][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106106 q=soc.cpu.minerva.gprf.mem._mem[6][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106108 q=soc.cpu.minerva.gprf.mem._mem[6][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106110 q=soc.cpu.minerva.gprf.mem._mem[6][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106112 q=soc.cpu.minerva.gprf.mem._mem[6][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106114 q=soc.cpu.minerva.gprf.mem._mem[6][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106116 q=soc.cpu.minerva.gprf.mem._mem[1][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106118 q=soc.cpu.minerva.gprf.mem._mem[1][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106120 q=soc.cpu.minerva.gprf.mem._mem[1][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106122 q=soc.cpu.minerva.gprf.mem._mem[1][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106124 q=soc.cpu.minerva.gprf.mem._mem[1][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106126 q=soc.cpu.minerva.gprf.mem._mem[1][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106128 q=soc.cpu.minerva.gprf.mem._mem[1][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106130 q=soc.cpu.minerva.gprf.mem._mem[1][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106132 q=soc.cpu.minerva.gprf.mem._mem[1][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106134 q=soc.cpu.minerva.gprf.mem._mem[1][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106136 q=soc.cpu.minerva.gprf.mem._mem[1][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106138 q=soc.cpu.minerva.gprf.mem._mem[1][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106140 q=soc.cpu.minerva.gprf.mem._mem[1][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106142 q=soc.cpu.minerva.gprf.mem._mem[1][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106144 q=soc.cpu.minerva.gprf.mem._mem[1][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106146 q=soc.cpu.minerva.gprf.mem._mem[1][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106148 q=soc.cpu.minerva.gprf.mem._mem[1][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106150 q=soc.cpu.minerva.gprf.mem._mem[1][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106152 q=soc.cpu.minerva.gprf.mem._mem[1][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106154 q=soc.cpu.minerva.gprf.mem._mem[1][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106156 q=soc.cpu.minerva.gprf.mem._mem[1][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106158 q=soc.cpu.minerva.gprf.mem._mem[1][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106160 q=soc.cpu.minerva.gprf.mem._mem[1][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106162 q=soc.cpu.minerva.gprf.mem._mem[1][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106164 q=soc.cpu.minerva.gprf.mem._mem[1][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106166 q=soc.cpu.minerva.gprf.mem._mem[1][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106168 q=soc.cpu.minerva.gprf.mem._mem[1][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106170 q=soc.cpu.minerva.gprf.mem._mem[1][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106172 q=soc.cpu.minerva.gprf.mem._mem[1][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106174 q=soc.cpu.minerva.gprf.mem._mem[1][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106176 q=soc.cpu.minerva.gprf.mem._mem[1][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106178 q=soc.cpu.minerva.gprf.mem._mem[1][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106180 q=soc.ram.ram[98][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106182 q=soc.ram.ram[98][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106184 q=soc.ram.ram[98][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106186 q=soc.ram.ram[98][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106188 q=soc.ram.ram[98][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106190 q=soc.ram.ram[98][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106192 q=soc.ram.ram[98][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106194 q=soc.ram.ram[98][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106196 q=soc.ram.ram[98][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106198 q=soc.ram.ram[98][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106200 q=soc.ram.ram[98][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106202 q=soc.ram.ram[98][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106204 q=soc.ram.ram[98][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106206 q=soc.ram.ram[98][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106208 q=soc.ram.ram[98][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106210 q=soc.ram.ram[98][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106212 q=soc.ram.ram[99][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106214 q=soc.ram.ram[99][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106216 q=soc.ram.ram[99][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106218 q=soc.ram.ram[99][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106220 q=soc.ram.ram[99][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106222 q=soc.ram.ram[99][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106224 q=soc.ram.ram[99][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106226 q=soc.ram.ram[99][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106228 q=soc.ram.ram[98][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106230 q=soc.ram.ram[98][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106232 q=soc.ram.ram[98][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106234 q=soc.ram.ram[98][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106236 q=soc.ram.ram[98][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106238 q=soc.ram.ram[98][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106240 q=soc.ram.ram[98][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106242 q=soc.ram.ram[98][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106246 q=soc.cpu.minerva.d.valid$1
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106248 q=soc.ram.ram[9][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106250 q=soc.ram.ram[9][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106252 q=soc.ram.ram[9][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106254 q=soc.ram.ram[9][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106256 q=soc.ram.ram[9][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106258 q=soc.ram.ram[9][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106260 q=soc.ram.ram[9][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106262 q=soc.ram.ram[9][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106264 q=soc.ram.ram[99][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106266 q=soc.ram.ram[99][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106268 q=soc.ram.ram[99][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106270 q=soc.ram.ram[99][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106272 q=soc.ram.ram[99][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106274 q=soc.ram.ram[99][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106276 q=soc.ram.ram[99][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106278 q=soc.ram.ram[99][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106280 q=soc.ram.ram[99][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106282 q=soc.ram.ram[99][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106284 q=soc.ram.ram[99][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106286 q=soc.ram.ram[99][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106288 q=soc.ram.ram[99][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106290 q=soc.ram.ram[99][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106292 q=soc.ram.ram[99][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106294 q=soc.ram.ram[99][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106298 q=soc.cpu.minerva.adder.x_sub
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106300 q=soc.ram.ram[1][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106302 q=soc.ram.ram[1][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106304 q=soc.ram.ram[1][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106306 q=soc.ram.ram[1][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106308 q=soc.ram.ram[1][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106310 q=soc.ram.ram[1][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106312 q=soc.ram.ram[1][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106314 q=soc.ram.ram[1][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106316 q=soc.ram.ram[106][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106318 q=soc.ram.ram[106][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106320 q=soc.ram.ram[106][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106322 q=soc.ram.ram[106][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106324 q=soc.ram.ram[106][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106326 q=soc.ram.ram[106][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106328 q=soc.ram.ram[106][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106330 q=soc.ram.ram[106][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106334 q=soc.cpu.minerva.a.valid
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106338 q=soc.cpu.minerva.payload__multiply$134
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106342 q=soc.cpu.minerva.m_payload__exception
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106346 q=soc.cpu.minerva.payload__result$129[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106350 q=soc.cpu.minerva.payload__result$129[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106354 q=soc.cpu.minerva.payload__result$129[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106358 q=soc.cpu.minerva.payload__result$129[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106362 q=soc.cpu.minerva.payload__result$129[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106366 q=soc.cpu.minerva.payload__result$129[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106370 q=soc.cpu.minerva.payload__result$129[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106374 q=soc.cpu.minerva.payload__result$129[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106378 q=soc.cpu.minerva.payload__result$129[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106382 q=soc.cpu.minerva.payload__result$129[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106386 q=soc.cpu.minerva.payload__result$129[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106390 q=soc.cpu.minerva.payload__result$129[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106394 q=soc.cpu.minerva.payload__result$129[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106398 q=soc.cpu.minerva.payload__result$129[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106402 q=soc.cpu.minerva.payload__result$129[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106406 q=soc.cpu.minerva.payload__result$129[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106410 q=soc.cpu.minerva.payload__result$129[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106414 q=soc.cpu.minerva.payload__result$129[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106418 q=soc.cpu.minerva.payload__result$129[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106422 q=soc.cpu.minerva.payload__result$129[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106426 q=soc.cpu.minerva.payload__result$129[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106430 q=soc.cpu.minerva.payload__result$129[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106434 q=soc.cpu.minerva.payload__result$129[22]
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-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107958 q=soc.cpu.minerva.payload__instruction$34[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107962 q=soc.cpu.minerva.payload__instruction$34[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107966 q=soc.cpu.minerva.payload__instruction$34[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107970 q=soc.cpu.minerva.payload__instruction$34[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107974 q=soc.cpu.minerva.payload__instruction$34[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107978 q=soc.cpu.minerva.payload__instruction$34[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107982 q=soc.cpu.minerva.payload__instruction$34[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107986 q=soc.cpu.minerva.payload__instruction$34[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107990 q=soc.cpu.minerva.payload__instruction$34[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107994 q=soc.cpu.minerva.payload__instruction$34[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107998 q=soc.cpu.minerva.payload__instruction$34[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108002 q=soc.cpu.minerva.payload__instruction$34[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108006 q=soc.cpu.minerva.payload__instruction$34[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108010 q=soc.cpu.minerva.payload__instruction$34[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108014 q=soc.cpu.minerva.payload__instruction$34[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108018 q=soc.cpu.minerva.payload__instruction$34[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108022 q=soc.cpu.minerva.payload__instruction$34[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108026 q=soc.cpu.minerva.payload__instruction$34[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108030 q=soc.cpu.minerva.payload__instruction$34[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108034 q=soc.cpu.minerva.payload__instruction$34[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108038 q=soc.cpu.minerva.payload__instruction$34[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108042 q=soc.cpu.minerva.payload__instruction$34[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108044 q=soc.ram.ram[19][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108046 q=soc.ram.ram[19][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108048 q=soc.ram.ram[19][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108050 q=soc.ram.ram[19][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108052 q=soc.ram.ram[19][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108054 q=soc.ram.ram[19][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108056 q=soc.ram.ram[19][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108058 q=soc.ram.ram[19][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108062 q=soc.cpu.minerva.payload__instruction$28[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108066 q=soc.cpu.minerva.payload__instruction$28[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108070 q=soc.cpu.minerva.payload__instruction$28[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108074 q=soc.cpu.minerva.payload__instruction$28[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108078 q=soc.cpu.minerva.payload__instruction$28[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108082 q=soc.cpu.minerva.payload__instruction$28[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108086 q=soc.cpu.minerva.payload__instruction$28[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108090 q=soc.cpu.minerva.payload__instruction$28[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108094 q=soc.cpu.minerva.payload__instruction$28[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108098 q=soc.cpu.minerva.payload__instruction$28[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108102 q=soc.cpu.minerva.payload__instruction$28[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108106 q=soc.cpu.minerva.payload__instruction$28[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108110 q=soc.cpu.minerva.payload__instruction$28[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108114 q=soc.cpu.minerva.payload__instruction$28[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108118 q=soc.cpu.minerva.payload__instruction$28[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108122 q=soc.cpu.minerva.payload__instruction$28[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108126 q=soc.cpu.minerva.payload__instruction$28[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108130 q=soc.cpu.minerva.payload__instruction$28[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108134 q=soc.cpu.minerva.payload__instruction$28[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108138 q=soc.cpu.minerva.payload__instruction$28[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108142 q=soc.cpu.minerva.csrf_rp__addr[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108144 q=soc.ram.ram[15][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108146 q=soc.ram.ram[15][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108148 q=soc.ram.ram[15][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108150 q=soc.ram.ram[15][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108152 q=soc.ram.ram[15][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108154 q=soc.ram.ram[15][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108156 q=soc.ram.ram[15][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108158 q=soc.ram.ram[15][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108162 q=soc.cpu.minerva.csrf_rp__addr[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108166 q=soc.cpu.minerva.csrf_rp__addr[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108170 q=soc.cpu.minerva.csrf_rp__addr[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108174 q=soc.cpu.minerva.csrf_rp__addr[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108178 q=soc.cpu.minerva.csrf_rp__addr[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108182 q=soc.cpu.minerva.csrf_rp__addr[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108186 q=soc.cpu.minerva.csrf_rp__addr[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108190 q=soc.cpu.minerva.csrf_rp__addr[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108194 q=soc.cpu.minerva.csrf_rp__addr[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108198 q=soc.cpu.minerva.csrf_rp__addr[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108202 q=soc.cpu.minerva.csrf_rp__addr[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108204 q=soc.bridge.csr_mux_1.uart_ev_enable__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108206 q=soc.ram.ram[122][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108208 q=soc.ram.ram[122][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108210 q=soc.ram.ram[122][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108212 q=soc.ram.ram[122][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108214 q=soc.ram.ram[122][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108216 q=soc.ram.ram[122][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108218 q=soc.ram.ram[122][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108220 q=soc.ram.ram[122][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108222 q=soc.cpu.minerva.gprf.mem._mem[31][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108224 q=soc.cpu.minerva.gprf.mem._mem[31][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108226 q=soc.cpu.minerva.gprf.mem._mem[31][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108228 q=soc.cpu.minerva.gprf.mem._mem[31][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108230 q=soc.cpu.minerva.gprf.mem._mem[31][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108232 q=soc.cpu.minerva.gprf.mem._mem[31][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108234 q=soc.cpu.minerva.gprf.mem._mem[31][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108236 q=soc.cpu.minerva.gprf.mem._mem[31][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108238 q=soc.cpu.minerva.gprf.mem._mem[31][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108240 q=soc.cpu.minerva.gprf.mem._mem[31][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108242 q=soc.cpu.minerva.gprf.mem._mem[31][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108244 q=soc.cpu.minerva.gprf.mem._mem[31][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108246 q=soc.cpu.minerva.gprf.mem._mem[31][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108248 q=soc.cpu.minerva.gprf.mem._mem[31][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108250 q=soc.cpu.minerva.gprf.mem._mem[31][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108252 q=soc.cpu.minerva.gprf.mem._mem[31][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108254 q=soc.cpu.minerva.gprf.mem._mem[31][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108256 q=soc.cpu.minerva.gprf.mem._mem[31][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108258 q=soc.cpu.minerva.gprf.mem._mem[31][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108260 q=soc.cpu.minerva.gprf.mem._mem[31][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108262 q=soc.cpu.minerva.gprf.mem._mem[31][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108264 q=soc.cpu.minerva.gprf.mem._mem[31][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108266 q=soc.cpu.minerva.gprf.mem._mem[31][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108268 q=soc.cpu.minerva.gprf.mem._mem[31][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108270 q=soc.cpu.minerva.gprf.mem._mem[31][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108272 q=soc.cpu.minerva.gprf.mem._mem[31][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108274 q=soc.cpu.minerva.gprf.mem._mem[31][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108276 q=soc.cpu.minerva.gprf.mem._mem[31][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108278 q=soc.cpu.minerva.gprf.mem._mem[31][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108280 q=soc.cpu.minerva.gprf.mem._mem[31][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108282 q=soc.cpu.minerva.gprf.mem._mem[31][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108284 q=soc.cpu.minerva.gprf.mem._mem[31][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108286 q=soc.bridge._int_src.uart_ev_pending__r_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108288 q=soc.bridge._int_src._rx_err_ev_stb_r
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108290 q=soc.fsm_state
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108294 q=soc.bridge._int_src.uart_ev_enable__r_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108298 q=soc.bridge._int_src.uart_ev_enable__r_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108302 q=soc.bridge._int_src.uart_ev_enable__r_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108306 q=soc.bridge._int_src.uart_ev_pending__r_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108308 q=soc.bridge._int_src._tx_mty_ev_stb_r
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108312 q=soc.bridge.csr_bridge_0.wb__dat_r[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108316 q=soc.bridge.csr_bridge_0.wb__dat_r[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108320 q=soc.bridge.csr_bridge_0.wb__dat_r[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108324 q=soc.bridge.csr_bridge_0.wb__dat_r[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108328 q=soc.bridge.csr_bridge_0.wb__dat_r[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108332 q=soc.bridge.csr_bridge_0.wb__dat_r[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108336 q=soc.bridge.csr_bridge_0.wb__dat_r[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108340 q=soc.bridge.csr_bridge_0.wb__dat_r[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108344 q=soc.bridge.csr_bridge_0.cycle[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108348 q=soc.bridge.csr_bridge_0.cycle[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108352 q=soc.bridge.csr_bridge_0.cycle[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108354 q=soc.ram.ram[93][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108356 q=soc.ram.ram[93][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108358 q=soc.ram.ram[93][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108360 q=soc.ram.ram[93][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108362 q=soc.ram.ram[93][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108364 q=soc.ram.ram[93][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108366 q=soc.ram.ram[93][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108368 q=soc.ram.ram[93][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108370 q=soc.cpu.minerva.gprf.mem._mem[24][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108372 q=soc.cpu.minerva.gprf.mem._mem[24][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108374 q=soc.cpu.minerva.gprf.mem._mem[24][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108376 q=soc.cpu.minerva.gprf.mem._mem[24][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108378 q=soc.cpu.minerva.gprf.mem._mem[24][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108380 q=soc.cpu.minerva.gprf.mem._mem[24][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108382 q=soc.cpu.minerva.gprf.mem._mem[24][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108384 q=soc.cpu.minerva.gprf.mem._mem[24][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108386 q=soc.cpu.minerva.gprf.mem._mem[24][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108388 q=soc.cpu.minerva.gprf.mem._mem[24][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108390 q=soc.cpu.minerva.gprf.mem._mem[24][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108392 q=soc.cpu.minerva.gprf.mem._mem[24][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108394 q=soc.cpu.minerva.gprf.mem._mem[24][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108396 q=soc.cpu.minerva.gprf.mem._mem[24][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108398 q=soc.cpu.minerva.gprf.mem._mem[24][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108400 q=soc.cpu.minerva.gprf.mem._mem[24][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108402 q=soc.cpu.minerva.gprf.mem._mem[24][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108404 q=soc.cpu.minerva.gprf.mem._mem[24][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108406 q=soc.cpu.minerva.gprf.mem._mem[24][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108408 q=soc.cpu.minerva.gprf.mem._mem[24][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108410 q=soc.cpu.minerva.gprf.mem._mem[24][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108412 q=soc.cpu.minerva.gprf.mem._mem[24][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108414 q=soc.cpu.minerva.gprf.mem._mem[24][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108416 q=soc.cpu.minerva.gprf.mem._mem[24][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108418 q=soc.cpu.minerva.gprf.mem._mem[24][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108420 q=soc.cpu.minerva.gprf.mem._mem[24][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108422 q=soc.cpu.minerva.gprf.mem._mem[24][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108424 q=soc.cpu.minerva.gprf.mem._mem[24][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108426 q=soc.cpu.minerva.gprf.mem._mem[24][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108428 q=soc.cpu.minerva.gprf.mem._mem[24][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108430 q=soc.cpu.minerva.gprf.mem._mem[24][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108432 q=soc.cpu.minerva.gprf.mem._mem[24][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108436 q=soc.bridge.csr_bridge_1.wb__dat_r[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108440 q=soc.bridge.csr_bridge_1.wb__dat_r[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108444 q=soc.bridge.csr_bridge_1.wb__dat_r[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108446 q=soc.bridge.csr_bridge_0.wb__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108450 q=soc.bridge.csr_bridge_1.cycle[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108454 q=soc.bridge.csr_bridge_1.cycle[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108458 q=soc.bridge.csr_bridge_1.cycle[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108462 q=soc.bridge.csr_mux_0.uart_tx_rdy__shadow
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108464 q=soc.bridge.csr_mux_0.uart_tx_data__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108468 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108472 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108476 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108480 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108484 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108488 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108492 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108496 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108498 q=soc.bridge.csr_mux_0.uart_tx_rdy__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108502 q=soc.cpu.minerva.payload__pc$27[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108506 q=soc.cpu.minerva.payload__pc$27[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108510 q=soc.cpu.minerva.payload__pc$27[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108514 q=soc.cpu.minerva.payload__pc$27[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108518 q=soc.cpu.minerva.payload__pc$27[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108522 q=soc.cpu.minerva.payload__pc$27[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108526 q=soc.cpu.minerva.payload__pc$27[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108530 q=soc.cpu.minerva.payload__pc$27[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108534 q=soc.cpu.minerva.payload__pc$27[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108538 q=soc.cpu.minerva.payload__pc$27[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108542 q=soc.cpu.minerva.payload__pc$27[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108546 q=soc.cpu.minerva.payload__pc$27[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108550 q=soc.cpu.minerva.payload__pc$27[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108554 q=soc.cpu.minerva.payload__pc$27[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108558 q=soc.cpu.minerva.payload__pc$27[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108562 q=soc.cpu.minerva.payload__pc$27[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108566 q=soc.cpu.minerva.payload__pc$27[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108570 q=soc.cpu.minerva.payload__pc$27[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108574 q=soc.cpu.minerva.payload__pc$27[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108578 q=soc.cpu.minerva.payload__pc$27[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108582 q=soc.cpu.minerva.payload__pc$27[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108586 q=soc.cpu.minerva.payload__pc$27[23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108590 q=soc.cpu.minerva.payload__pc$27[24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108594 q=soc.cpu.minerva.payload__pc$27[25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108598 q=soc.cpu.minerva.payload__pc$27[26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108602 q=soc.cpu.minerva.payload__pc$27[27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108606 q=soc.cpu.minerva.payload__pc$27[28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108610 q=soc.cpu.minerva.payload__pc$27[29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108614 q=soc.cpu.minerva.payload__pc$27[30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108618 q=soc.cpu.minerva.payload__pc$27[31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108620 q=soc.bridge.csr_mux_0.uart_rx_err__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108624 q=soc.bridge.csr_mux_0.uart_rx_rdy__shadow
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108626 q=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108630 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108634 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108638 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108642 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108646 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108650 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108654 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108658 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108660 q=soc.bridge.csr_mux_0.uart_divisor__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108664 q=soc.bridge.csr_mux_0.uart_divisor__shadow[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108668 q=soc.bridge.csr_mux_0.uart_divisor__shadow[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108672 q=soc.bridge.csr_mux_0.uart_divisor__shadow[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108676 q=soc.bridge.csr_mux_0.uart_divisor__shadow[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108678 q=soc.bridge.csr_bridge_1.wb__ack
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108680 q=soc.ram.ram[13][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108682 q=soc.ram.ram[13][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108684 q=soc.ram.ram[13][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108686 q=soc.ram.ram[13][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108688 q=soc.ram.ram[13][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108690 q=soc.ram.ram[13][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108692 q=soc.ram.ram[13][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108694 q=soc.ram.ram[13][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108696 q=soc.ram.ram[101][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108698 q=soc.ram.ram[101][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108700 q=soc.ram.ram[101][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108702 q=soc.ram.ram[101][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108704 q=soc.ram.ram[101][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108706 q=soc.ram.ram[101][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108708 q=soc.ram.ram[101][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108710 q=soc.ram.ram[101][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108712 q=soc.cpu.minerva.gprf.mem._mem[29][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108714 q=soc.cpu.minerva.gprf.mem._mem[29][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108716 q=soc.cpu.minerva.gprf.mem._mem[29][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108718 q=soc.cpu.minerva.gprf.mem._mem[29][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108720 q=soc.cpu.minerva.gprf.mem._mem[29][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108722 q=soc.cpu.minerva.gprf.mem._mem[29][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108724 q=soc.cpu.minerva.gprf.mem._mem[29][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108726 q=soc.cpu.minerva.gprf.mem._mem[29][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108728 q=soc.cpu.minerva.gprf.mem._mem[29][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108730 q=soc.cpu.minerva.gprf.mem._mem[29][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108732 q=soc.cpu.minerva.gprf.mem._mem[29][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108734 q=soc.cpu.minerva.gprf.mem._mem[29][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108736 q=soc.cpu.minerva.gprf.mem._mem[29][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108738 q=soc.cpu.minerva.gprf.mem._mem[29][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108740 q=soc.cpu.minerva.gprf.mem._mem[29][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108742 q=soc.cpu.minerva.gprf.mem._mem[29][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108744 q=soc.cpu.minerva.gprf.mem._mem[29][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108746 q=soc.cpu.minerva.gprf.mem._mem[29][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108748 q=soc.cpu.minerva.gprf.mem._mem[29][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108750 q=soc.cpu.minerva.gprf.mem._mem[29][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108752 q=soc.cpu.minerva.gprf.mem._mem[29][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108754 q=soc.cpu.minerva.gprf.mem._mem[29][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108756 q=soc.cpu.minerva.gprf.mem._mem[29][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108758 q=soc.cpu.minerva.gprf.mem._mem[29][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108760 q=soc.cpu.minerva.gprf.mem._mem[29][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108762 q=soc.cpu.minerva.gprf.mem._mem[29][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108764 q=soc.cpu.minerva.gprf.mem._mem[29][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108766 q=soc.cpu.minerva.gprf.mem._mem[29][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108768 q=soc.cpu.minerva.gprf.mem._mem[29][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108770 q=soc.cpu.minerva.gprf.mem._mem[29][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108772 q=soc.cpu.minerva.gprf.mem._mem[29][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108774 q=soc.cpu.minerva.gprf.mem._mem[29][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108776 q=soc.cpu.minerva.gprf.mem._mem[27][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108778 q=soc.cpu.minerva.gprf.mem._mem[27][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108780 q=soc.cpu.minerva.gprf.mem._mem[27][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108782 q=soc.cpu.minerva.gprf.mem._mem[27][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108784 q=soc.cpu.minerva.gprf.mem._mem[27][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108786 q=soc.cpu.minerva.gprf.mem._mem[27][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108788 q=soc.cpu.minerva.gprf.mem._mem[27][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108790 q=soc.cpu.minerva.gprf.mem._mem[27][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108792 q=soc.cpu.minerva.gprf.mem._mem[27][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108794 q=soc.cpu.minerva.gprf.mem._mem[27][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108796 q=soc.cpu.minerva.gprf.mem._mem[27][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108798 q=soc.cpu.minerva.gprf.mem._mem[27][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108800 q=soc.cpu.minerva.gprf.mem._mem[27][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108802 q=soc.cpu.minerva.gprf.mem._mem[27][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108804 q=soc.cpu.minerva.gprf.mem._mem[27][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108806 q=soc.cpu.minerva.gprf.mem._mem[27][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108808 q=soc.cpu.minerva.gprf.mem._mem[27][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108810 q=soc.cpu.minerva.gprf.mem._mem[27][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108812 q=soc.cpu.minerva.gprf.mem._mem[27][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108814 q=soc.cpu.minerva.gprf.mem._mem[27][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108816 q=soc.cpu.minerva.gprf.mem._mem[27][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108818 q=soc.cpu.minerva.gprf.mem._mem[27][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108820 q=soc.cpu.minerva.gprf.mem._mem[27][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108822 q=soc.cpu.minerva.gprf.mem._mem[27][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108824 q=soc.cpu.minerva.gprf.mem._mem[27][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108826 q=soc.cpu.minerva.gprf.mem._mem[27][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108828 q=soc.cpu.minerva.gprf.mem._mem[27][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108830 q=soc.cpu.minerva.gprf.mem._mem[27][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108832 q=soc.cpu.minerva.gprf.mem._mem[27][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108834 q=soc.cpu.minerva.gprf.mem._mem[27][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108836 q=soc.cpu.minerva.gprf.mem._mem[27][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108838 q=soc.cpu.minerva.gprf.mem._mem[27][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108840 q=soc.ram.ram[0][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108842 q=soc.ram.ram[0][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108844 q=soc.ram.ram[0][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108846 q=soc.ram.ram[0][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108848 q=soc.ram.ram[0][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108850 q=soc.ram.ram[0][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108852 q=soc.ram.ram[0][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108854 q=soc.ram.ram[0][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108858 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108862 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108866 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108868 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108870 q=soc.bridge.csr_mux_1.uart_ev_pending__w_stb
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108874 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108878 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108882 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108884 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108886 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108890 q=soc.bridge.csr_mux_1.uart_ev_status__shadow[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108894 q=soc.bridge.csr_mux_1.uart_ev_status__shadow[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108898 q=soc.bridge.csr_mux_1.uart_ev_status__shadow[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108900 q=soc.bridge.csr_mux_1.uart_ev_status__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108902 q=soc.ram.ram[123][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108904 q=soc.ram.ram[123][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108906 q=soc.ram.ram[123][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108908 q=soc.ram.ram[123][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108910 q=soc.ram.ram[123][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108912 q=soc.ram.ram[123][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108914 q=soc.ram.ram[123][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108916 q=soc.ram.ram[123][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108918 q=soc.ram.ram[123][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108920 q=soc.ram.ram[123][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108922 q=soc.ram.ram[123][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108924 q=soc.ram.ram[123][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108926 q=soc.ram.ram[123][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108928 q=soc.ram.ram[123][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108930 q=soc.ram.ram[123][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108932 q=soc.ram.ram[123][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108934 q=soc.ram.ram[124][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108936 q=soc.ram.ram[124][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108938 q=soc.ram.ram[124][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108940 q=soc.ram.ram[124][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108942 q=soc.ram.ram[124][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108944 q=soc.ram.ram[124][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108946 q=soc.ram.ram[124][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108948 q=soc.ram.ram[124][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108950 q=soc.ram.ram[124][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108952 q=soc.ram.ram[124][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108954 q=soc.ram.ram[124][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108956 q=soc.ram.ram[124][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108958 q=soc.ram.ram[124][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108960 q=soc.ram.ram[124][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108962 q=soc.ram.ram[124][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108964 q=soc.ram.ram[124][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108966 q=soc.ram.ram[124][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108968 q=soc.ram.ram[124][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108970 q=soc.ram.ram[124][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108972 q=soc.ram.ram[124][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108974 q=soc.ram.ram[124][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108976 q=soc.ram.ram[124][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108978 q=soc.ram.ram[124][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108980 q=soc.ram.ram[124][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108982 q=soc.ram.ram[125][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108984 q=soc.ram.ram[125][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108986 q=soc.ram.ram[125][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108988 q=soc.ram.ram[125][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108990 q=soc.ram.ram[125][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108992 q=soc.ram.ram[125][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108994 q=soc.ram.ram[125][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108996 q=soc.ram.ram[125][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108998 q=soc.ram.ram[107][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109000 q=soc.ram.ram[107][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109002 q=soc.ram.ram[107][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109004 q=soc.ram.ram[107][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109006 q=soc.ram.ram[107][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109008 q=soc.ram.ram[107][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109010 q=soc.ram.ram[107][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109012 q=soc.ram.ram[107][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109016 q=soc.arbiter.grant
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109018 q=soc.hb_ctr[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109020 q=soc.hb_ctr[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109022 q=soc.hb_ctr[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109024 q=soc.hb_ctr[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109026 q=soc.hb_ctr[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109028 q=soc.hb_ctr[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109030 q=soc.hb_ctr[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109032 q=soc.hb_ctr[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109034 q=soc.hb_ctr[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109036 q=soc.hb_ctr[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109038 q=soc.hb_ctr[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109040 q=soc.hb_ctr[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109042 q=soc.hb_ctr[12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109044 q=soc.hb_ctr[13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109046 q=soc.hb_ctr[14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109048 q=soc.hb_ctr[15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109050 q=soc.hb_ctr[16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109052 q=soc.hb_ctr[17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109054 q=soc.hb_ctr[18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109056 q=soc.hb_ctr[19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109058 q=soc.hb_ctr[20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109060 q=soc.hb_ctr[21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109062 q=soc.hb_ctr[22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109064 q=soc.hb_ctr[23]
-.subckt sff1_x4 ck=io_in[0] i=soc.rst_sync0 q=soc.rst_sync1
-.subckt sff1_x4 ck=io_in[0] i=soc.$109 q=soc.rst_sync0
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109068 q=soc.timer$123[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109072 q=soc.timer$123[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109076 q=soc.timer$123[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109080 q=soc.timer$123[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109084 q=soc.timer$123[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109088 q=soc.timer$123[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109092 q=soc.timer$123[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109096 q=soc.timer$123[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109100 q=soc.timer$123[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109104 q=soc.timer$123[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109108 q=soc.timer$123[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109112 q=soc.timer$123[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109116 q=soc.bitno[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109120 q=soc.bitno[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109124 q=soc.bitno[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109128 q=soc.bitno[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109132 q=soc.shreg__start
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109136 q=soc.shreg__data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109140 q=soc.shreg__data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109144 q=soc.shreg__data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109148 q=soc.shreg__data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109152 q=soc.shreg__data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109156 q=soc.shreg__data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109160 q=soc.shreg__data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109164 q=soc.shreg__data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109168 q=soc.shreg__stop
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109172 q=soc.o
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109176 q=soc.divisor[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109180 q=soc.divisor[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109184 q=soc.divisor[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109188 q=soc.divisor[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109192 q=soc.divisor[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109196 q=soc.divisor[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109200 q=soc.divisor[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109204 q=soc.divisor[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109208 q=soc.divisor[8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109212 q=soc.divisor[9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109216 q=soc.divisor[10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109220 q=soc.divisor[11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109222 q=soc.ram.ram[107][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109224 q=soc.ram.ram[107][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109226 q=soc.ram.ram[107][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109228 q=soc.ram.ram[107][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109230 q=soc.ram.ram[107][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109232 q=soc.ram.ram[107][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109234 q=soc.ram.ram[107][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109236 q=soc.ram.ram[107][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109238 q=soc.cpu.minerva.gprf.mem._mem[25][0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109240 q=soc.cpu.minerva.gprf.mem._mem[25][1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109242 q=soc.cpu.minerva.gprf.mem._mem[25][2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109244 q=soc.cpu.minerva.gprf.mem._mem[25][3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109246 q=soc.cpu.minerva.gprf.mem._mem[25][4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109248 q=soc.cpu.minerva.gprf.mem._mem[25][5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109250 q=soc.cpu.minerva.gprf.mem._mem[25][6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109252 q=soc.cpu.minerva.gprf.mem._mem[25][7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109254 q=soc.cpu.minerva.gprf.mem._mem[25][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109256 q=soc.cpu.minerva.gprf.mem._mem[25][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109258 q=soc.cpu.minerva.gprf.mem._mem[25][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109260 q=soc.cpu.minerva.gprf.mem._mem[25][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109262 q=soc.cpu.minerva.gprf.mem._mem[25][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109264 q=soc.cpu.minerva.gprf.mem._mem[25][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109266 q=soc.cpu.minerva.gprf.mem._mem[25][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109268 q=soc.cpu.minerva.gprf.mem._mem[25][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109270 q=soc.cpu.minerva.gprf.mem._mem[25][16]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109272 q=soc.cpu.minerva.gprf.mem._mem[25][17]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109274 q=soc.cpu.minerva.gprf.mem._mem[25][18]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109276 q=soc.cpu.minerva.gprf.mem._mem[25][19]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109278 q=soc.cpu.minerva.gprf.mem._mem[25][20]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109280 q=soc.cpu.minerva.gprf.mem._mem[25][21]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109282 q=soc.cpu.minerva.gprf.mem._mem[25][22]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109284 q=soc.cpu.minerva.gprf.mem._mem[25][23]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109286 q=soc.cpu.minerva.gprf.mem._mem[25][24]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109288 q=soc.cpu.minerva.gprf.mem._mem[25][25]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109290 q=soc.cpu.minerva.gprf.mem._mem[25][26]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109292 q=soc.cpu.minerva.gprf.mem._mem[25][27]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109294 q=soc.cpu.minerva.gprf.mem._mem[25][28]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109296 q=soc.cpu.minerva.gprf.mem._mem[25][29]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109298 q=soc.cpu.minerva.gprf.mem._mem[25][30]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109300 q=soc.cpu.minerva.gprf.mem._mem[25][31]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109302 q=soc.ram.ram[100][8]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109304 q=soc.ram.ram[100][9]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109306 q=soc.ram.ram[100][10]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109308 q=soc.ram.ram[100][11]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109310 q=soc.ram.ram[100][12]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109312 q=soc.ram.ram[100][13]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109314 q=soc.ram.ram[100][14]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109316 q=soc.ram.ram[100][15]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109320 q=soc.cpu.minerva.divider.quotient[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109324 q=soc.cpu.minerva.divider.remainder[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109326 q=soc.bridge.csr_mux_0.uart_divisor__shadow_en[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109328 q=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109330 q=soc.rom.spimemio.din_valid
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109334 q=soc.rom.spimemio.din_data[7]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109338 q=soc.rom.spimemio.din_data[6]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109342 q=soc.rom.spimemio.din_data[5]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109346 q=soc.rom.spimemio.din_data[4]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109350 q=soc.rom.spimemio.din_data[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109354 q=soc.rom.spimemio.din_data[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109358 q=soc.rom.spimemio.din_data[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109362 q=soc.rom.spimemio.din_data[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109364 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109366 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109368 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109370 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109372 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109374 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109376 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109378 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0]
-.subckt sff1_x4 ck=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109382 q=soc.rom.spimemio.xfer.count[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91400 q=soc.ram.ram[9][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91402 q=soc.ram.ram[9][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91404 q=soc.ram.ram[9][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91406 q=soc.ram.ram[9][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91408 q=soc.ram.ram[9][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91410 q=soc.ram.ram[9][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91412 q=soc.ram.ram[9][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91414 q=soc.ram.ram[9][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91416 q=soc.cpu.minerva.exception.irq_pending__r__value[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91418 q=soc.cpu.minerva.exception.irq_pending__r__value[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91420 q=soc.cpu.minerva.gprf.mem._mem[17][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91422 q=soc.cpu.minerva.gprf.mem._mem[17][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91424 q=soc.cpu.minerva.gprf.mem._mem[17][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91426 q=soc.cpu.minerva.gprf.mem._mem[17][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91428 q=soc.cpu.minerva.gprf.mem._mem[17][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91430 q=soc.cpu.minerva.gprf.mem._mem[17][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91432 q=soc.cpu.minerva.gprf.mem._mem[17][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91434 q=soc.cpu.minerva.gprf.mem._mem[17][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91436 q=soc.cpu.minerva.gprf.mem._mem[17][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91438 q=soc.cpu.minerva.gprf.mem._mem[17][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91440 q=soc.cpu.minerva.gprf.mem._mem[17][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91442 q=soc.cpu.minerva.gprf.mem._mem[17][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91444 q=soc.cpu.minerva.gprf.mem._mem[17][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91446 q=soc.cpu.minerva.gprf.mem._mem[17][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91448 q=soc.cpu.minerva.gprf.mem._mem[17][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91450 q=soc.cpu.minerva.gprf.mem._mem[17][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91452 q=soc.cpu.minerva.gprf.mem._mem[17][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91454 q=soc.cpu.minerva.gprf.mem._mem[17][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91456 q=soc.cpu.minerva.gprf.mem._mem[17][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91458 q=soc.cpu.minerva.gprf.mem._mem[17][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91460 q=soc.cpu.minerva.gprf.mem._mem[17][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91462 q=soc.cpu.minerva.gprf.mem._mem[17][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91464 q=soc.cpu.minerva.gprf.mem._mem[17][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91466 q=soc.cpu.minerva.gprf.mem._mem[17][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91468 q=soc.cpu.minerva.gprf.mem._mem[17][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91470 q=soc.cpu.minerva.gprf.mem._mem[17][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91472 q=soc.cpu.minerva.gprf.mem._mem[17][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91474 q=soc.cpu.minerva.gprf.mem._mem[17][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91476 q=soc.cpu.minerva.gprf.mem._mem[17][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91478 q=soc.cpu.minerva.gprf.mem._mem[17][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91480 q=soc.cpu.minerva.gprf.mem._mem[17][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91482 q=soc.cpu.minerva.gprf.mem._mem[17][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91484 q=soc.ram.ram[76][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91486 q=soc.ram.ram[76][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91488 q=soc.ram.ram[76][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91490 q=soc.ram.ram[76][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91492 q=soc.ram.ram[76][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91494 q=soc.ram.ram[76][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91496 q=soc.ram.ram[76][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91498 q=soc.ram.ram[76][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91500 q=soc.ram.ram[75][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91502 q=soc.ram.ram[75][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91504 q=soc.ram.ram[75][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91506 q=soc.ram.ram[75][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91508 q=soc.ram.ram[75][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91510 q=soc.ram.ram[75][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91512 q=soc.ram.ram[75][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91514 q=soc.ram.ram[75][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91516 q=soc.ram.ram[104][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91518 q=soc.ram.ram[104][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91520 q=soc.ram.ram[104][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91522 q=soc.ram.ram[104][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91524 q=soc.ram.ram[104][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91526 q=soc.ram.ram[104][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91528 q=soc.ram.ram[104][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91530 q=soc.ram.ram[104][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91532 q=soc.ram.ram[70][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91534 q=soc.ram.ram[70][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91536 q=soc.ram.ram[70][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91538 q=soc.ram.ram[70][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91540 q=soc.ram.ram[70][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91542 q=soc.ram.ram[70][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91544 q=soc.ram.ram[70][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91546 q=soc.ram.ram[70][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91548 q=soc.ram.ram[33][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91550 q=soc.ram.ram[33][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91552 q=soc.ram.ram[33][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91554 q=soc.ram.ram[33][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91556 q=soc.ram.ram[33][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91558 q=soc.ram.ram[33][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91560 q=soc.ram.ram[33][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91562 q=soc.ram.ram[33][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91564 q=soc.ram.ram[74][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91566 q=soc.ram.ram[74][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91568 q=soc.ram.ram[74][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91570 q=soc.ram.ram[74][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91572 q=soc.ram.ram[74][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91574 q=soc.ram.ram[74][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91576 q=soc.ram.ram[74][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91578 q=soc.ram.ram[74][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91580 q=soc.ram.ram[74][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91582 q=soc.ram.ram[74][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91584 q=soc.ram.ram[74][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91586 q=soc.ram.ram[74][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91588 q=soc.ram.ram[74][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91590 q=soc.ram.ram[74][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91592 q=soc.ram.ram[74][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91594 q=soc.ram.ram[74][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91596 q=soc.ram.ram[75][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91598 q=soc.ram.ram[75][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91600 q=soc.ram.ram[75][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91602 q=soc.ram.ram[75][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91604 q=soc.ram.ram[75][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91606 q=soc.ram.ram[75][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91608 q=soc.ram.ram[75][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91610 q=soc.ram.ram[75][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91612 q=soc.ram.ram[75][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91614 q=soc.ram.ram[75][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91616 q=soc.ram.ram[75][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91618 q=soc.ram.ram[75][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91620 q=soc.ram.ram[75][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91622 q=soc.ram.ram[75][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91624 q=soc.ram.ram[75][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91626 q=soc.ram.ram[75][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91628 q=soc.ram.ram[127][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91630 q=soc.ram.ram[127][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91632 q=soc.ram.ram[127][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91634 q=soc.ram.ram[127][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91636 q=soc.ram.ram[127][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91638 q=soc.ram.ram[127][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91640 q=soc.ram.ram[127][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91642 q=soc.ram.ram[127][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91644 q=soc.ram.ram[93][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91646 q=soc.ram.ram[93][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91648 q=soc.ram.ram[93][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91650 q=soc.ram.ram[93][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91652 q=soc.ram.ram[93][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91654 q=soc.ram.ram[93][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91656 q=soc.ram.ram[93][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91658 q=soc.ram.ram[93][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91660 q=soc.ram.ram[126][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91662 q=soc.ram.ram[126][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91664 q=soc.ram.ram[126][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91666 q=soc.ram.ram[126][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91668 q=soc.ram.ram[126][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91670 q=soc.ram.ram[126][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91672 q=soc.ram.ram[126][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91674 q=soc.ram.ram[126][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91676 q=soc.ram.ram[126][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91678 q=soc.ram.ram[126][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91680 q=soc.ram.ram[126][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91682 q=soc.ram.ram[126][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91684 q=soc.ram.ram[126][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91686 q=soc.ram.ram[126][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91688 q=soc.ram.ram[126][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91690 q=soc.ram.ram[126][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91692 q=soc.ram.ram[126][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91694 q=soc.ram.ram[126][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91696 q=soc.ram.ram[126][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91698 q=soc.ram.ram[126][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91700 q=soc.ram.ram[126][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91702 q=soc.ram.ram[126][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91704 q=soc.ram.ram[126][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91706 q=soc.ram.ram[126][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91708 q=soc.ram.ram[18][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91710 q=soc.ram.ram[18][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91712 q=soc.ram.ram[18][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91714 q=soc.ram.ram[18][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91716 q=soc.ram.ram[18][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91718 q=soc.ram.ram[18][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91720 q=soc.ram.ram[18][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91722 q=soc.ram.ram[18][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91724 q=soc.ram.ram[18][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91726 q=soc.ram.ram[18][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91728 q=soc.ram.ram[18][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91730 q=soc.ram.ram[18][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91732 q=soc.ram.ram[18][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91734 q=soc.ram.ram[18][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91736 q=soc.ram.ram[18][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91738 q=soc.ram.ram[18][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91740 q=soc.ram.ram[12][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91742 q=soc.ram.ram[12][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91744 q=soc.ram.ram[12][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91746 q=soc.ram.ram[12][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91748 q=soc.ram.ram[12][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91750 q=soc.ram.ram[12][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91752 q=soc.ram.ram[12][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91754 q=soc.ram.ram[12][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91756 q=soc.ram.ram[74][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91758 q=soc.ram.ram[74][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91760 q=soc.ram.ram[74][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91762 q=soc.ram.ram[74][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91764 q=soc.ram.ram[74][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91766 q=soc.ram.ram[74][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91768 q=soc.ram.ram[74][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91770 q=soc.ram.ram[74][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91772 q=soc.ram.ram[73][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91774 q=soc.ram.ram[73][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91776 q=soc.ram.ram[73][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91778 q=soc.ram.ram[73][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91780 q=soc.ram.ram[73][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91782 q=soc.ram.ram[73][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91784 q=soc.ram.ram[73][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91786 q=soc.ram.ram[73][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91788 q=soc.ram.ram[127][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91790 q=soc.ram.ram[127][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91792 q=soc.ram.ram[127][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91794 q=soc.ram.ram[127][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91796 q=soc.ram.ram[127][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91798 q=soc.ram.ram[127][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91800 q=soc.ram.ram[127][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91802 q=soc.ram.ram[127][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91804 q=soc.ram.ram[127][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91806 q=soc.ram.ram[127][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91808 q=soc.ram.ram[127][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91810 q=soc.ram.ram[127][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91812 q=soc.ram.ram[127][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91814 q=soc.ram.ram[127][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91816 q=soc.ram.ram[127][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91818 q=soc.ram.ram[127][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91820 q=soc.ram.ram[73][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91822 q=soc.ram.ram[73][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91824 q=soc.ram.ram[73][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91826 q=soc.ram.ram[73][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91828 q=soc.ram.ram[73][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91830 q=soc.ram.ram[73][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91832 q=soc.ram.ram[73][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91834 q=soc.ram.ram[73][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91836 q=soc.ram.ram[72][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91838 q=soc.ram.ram[72][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91840 q=soc.ram.ram[72][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91842 q=soc.ram.ram[72][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91844 q=soc.ram.ram[72][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91846 q=soc.ram.ram[72][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91848 q=soc.ram.ram[72][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91850 q=soc.ram.ram[72][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91852 q=soc.ram.ram[72][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91854 q=soc.ram.ram[72][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91856 q=soc.ram.ram[72][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91858 q=soc.ram.ram[72][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91860 q=soc.ram.ram[72][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91862 q=soc.ram.ram[72][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91864 q=soc.ram.ram[72][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91866 q=soc.ram.ram[72][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91868 q=soc.ram.ram[104][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91870 q=soc.ram.ram[104][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91872 q=soc.ram.ram[104][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91874 q=soc.ram.ram[104][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91876 q=soc.ram.ram[104][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91878 q=soc.ram.ram[104][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91880 q=soc.ram.ram[104][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91882 q=soc.ram.ram[104][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91884 q=soc.ram.ram[73][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91886 q=soc.ram.ram[73][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91888 q=soc.ram.ram[73][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91890 q=soc.ram.ram[73][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91892 q=soc.ram.ram[73][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91894 q=soc.ram.ram[73][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91896 q=soc.ram.ram[73][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91898 q=soc.ram.ram[73][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91900 q=soc.ram.ram[71][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91902 q=soc.ram.ram[71][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91904 q=soc.ram.ram[71][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91906 q=soc.ram.ram[71][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91908 q=soc.ram.ram[71][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91910 q=soc.ram.ram[71][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91912 q=soc.ram.ram[71][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91914 q=soc.ram.ram[71][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91916 q=soc.ram.ram[71][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91918 q=soc.ram.ram[71][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91920 q=soc.ram.ram[71][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91922 q=soc.ram.ram[71][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91924 q=soc.ram.ram[71][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91926 q=soc.ram.ram[71][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91928 q=soc.ram.ram[71][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91930 q=soc.ram.ram[71][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91932 q=soc.ram.ram[71][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91934 q=soc.ram.ram[71][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91936 q=soc.ram.ram[71][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91938 q=soc.ram.ram[71][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91940 q=soc.ram.ram[71][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91942 q=soc.ram.ram[71][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91944 q=soc.ram.ram[71][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91946 q=soc.ram.ram[71][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91948 q=soc.cpu.minerva.gprf.mem._mem[16][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91950 q=soc.cpu.minerva.gprf.mem._mem[16][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91952 q=soc.cpu.minerva.gprf.mem._mem[16][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91954 q=soc.cpu.minerva.gprf.mem._mem[16][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91956 q=soc.cpu.minerva.gprf.mem._mem[16][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91958 q=soc.cpu.minerva.gprf.mem._mem[16][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91960 q=soc.cpu.minerva.gprf.mem._mem[16][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91962 q=soc.cpu.minerva.gprf.mem._mem[16][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91964 q=soc.cpu.minerva.gprf.mem._mem[16][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91966 q=soc.cpu.minerva.gprf.mem._mem[16][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91968 q=soc.cpu.minerva.gprf.mem._mem[16][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91970 q=soc.cpu.minerva.gprf.mem._mem[16][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91972 q=soc.cpu.minerva.gprf.mem._mem[16][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91974 q=soc.cpu.minerva.gprf.mem._mem[16][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91976 q=soc.cpu.minerva.gprf.mem._mem[16][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91978 q=soc.cpu.minerva.gprf.mem._mem[16][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91980 q=soc.cpu.minerva.gprf.mem._mem[16][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91982 q=soc.cpu.minerva.gprf.mem._mem[16][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91984 q=soc.cpu.minerva.gprf.mem._mem[16][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91986 q=soc.cpu.minerva.gprf.mem._mem[16][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91988 q=soc.cpu.minerva.gprf.mem._mem[16][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91990 q=soc.cpu.minerva.gprf.mem._mem[16][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91992 q=soc.cpu.minerva.gprf.mem._mem[16][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91994 q=soc.cpu.minerva.gprf.mem._mem[16][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91996 q=soc.cpu.minerva.gprf.mem._mem[16][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$91998 q=soc.cpu.minerva.gprf.mem._mem[16][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92000 q=soc.cpu.minerva.gprf.mem._mem[16][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92002 q=soc.cpu.minerva.gprf.mem._mem[16][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92004 q=soc.cpu.minerva.gprf.mem._mem[16][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92006 q=soc.cpu.minerva.gprf.mem._mem[16][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92008 q=soc.cpu.minerva.gprf.mem._mem[16][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92010 q=soc.cpu.minerva.gprf.mem._mem[16][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92012 q=soc.ram.ram[72][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92014 q=soc.ram.ram[72][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92016 q=soc.ram.ram[72][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92018 q=soc.ram.ram[72][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92020 q=soc.ram.ram[72][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92022 q=soc.ram.ram[72][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92024 q=soc.ram.ram[72][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92026 q=soc.ram.ram[72][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92028 q=soc.ram.ram[21][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92030 q=soc.ram.ram[21][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92032 q=soc.ram.ram[21][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92034 q=soc.ram.ram[21][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92036 q=soc.ram.ram[21][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92038 q=soc.ram.ram[21][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92040 q=soc.ram.ram[21][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92042 q=soc.ram.ram[21][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92044 q=soc.ram.ram[28][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92046 q=soc.ram.ram[28][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92048 q=soc.ram.ram[28][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92050 q=soc.ram.ram[28][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92052 q=soc.ram.ram[28][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92054 q=soc.ram.ram[28][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92056 q=soc.ram.ram[28][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92058 q=soc.ram.ram[28][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92060 q=soc.ram.ram[24][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92062 q=soc.ram.ram[24][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92064 q=soc.ram.ram[24][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92066 q=soc.ram.ram[24][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92068 q=soc.ram.ram[24][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92070 q=soc.ram.ram[24][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92072 q=soc.ram.ram[24][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92074 q=soc.ram.ram[24][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92076 q=soc.ram.ram[73][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92078 q=soc.ram.ram[73][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92080 q=soc.ram.ram[73][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92082 q=soc.ram.ram[73][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92084 q=soc.ram.ram[73][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92086 q=soc.ram.ram[73][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92088 q=soc.ram.ram[73][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92090 q=soc.ram.ram[73][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92092 q=soc.ram.ram[70][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92094 q=soc.ram.ram[70][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92096 q=soc.ram.ram[70][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92098 q=soc.ram.ram[70][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92100 q=soc.ram.ram[70][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92102 q=soc.ram.ram[70][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92104 q=soc.ram.ram[70][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92106 q=soc.ram.ram[70][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92108 q=soc.cpu.minerva.gprf.mem._mem[15][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92110 q=soc.cpu.minerva.gprf.mem._mem[15][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92112 q=soc.cpu.minerva.gprf.mem._mem[15][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92114 q=soc.cpu.minerva.gprf.mem._mem[15][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92116 q=soc.cpu.minerva.gprf.mem._mem[15][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92118 q=soc.cpu.minerva.gprf.mem._mem[15][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92120 q=soc.cpu.minerva.gprf.mem._mem[15][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92122 q=soc.cpu.minerva.gprf.mem._mem[15][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92124 q=soc.cpu.minerva.gprf.mem._mem[15][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92126 q=soc.cpu.minerva.gprf.mem._mem[15][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92128 q=soc.cpu.minerva.gprf.mem._mem[15][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92130 q=soc.cpu.minerva.gprf.mem._mem[15][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92132 q=soc.cpu.minerva.gprf.mem._mem[15][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92134 q=soc.cpu.minerva.gprf.mem._mem[15][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92136 q=soc.cpu.minerva.gprf.mem._mem[15][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92138 q=soc.cpu.minerva.gprf.mem._mem[15][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92140 q=soc.cpu.minerva.gprf.mem._mem[15][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92142 q=soc.cpu.minerva.gprf.mem._mem[15][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92144 q=soc.cpu.minerva.gprf.mem._mem[15][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92146 q=soc.cpu.minerva.gprf.mem._mem[15][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92148 q=soc.cpu.minerva.gprf.mem._mem[15][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92150 q=soc.cpu.minerva.gprf.mem._mem[15][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92152 q=soc.cpu.minerva.gprf.mem._mem[15][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92154 q=soc.cpu.minerva.gprf.mem._mem[15][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92156 q=soc.cpu.minerva.gprf.mem._mem[15][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92158 q=soc.cpu.minerva.gprf.mem._mem[15][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92160 q=soc.cpu.minerva.gprf.mem._mem[15][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92162 q=soc.cpu.minerva.gprf.mem._mem[15][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92164 q=soc.cpu.minerva.gprf.mem._mem[15][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92166 q=soc.cpu.minerva.gprf.mem._mem[15][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92168 q=soc.cpu.minerva.gprf.mem._mem[15][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92170 q=soc.cpu.minerva.gprf.mem._mem[15][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92172 q=soc.ram.ram[70][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92174 q=soc.ram.ram[70][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92176 q=soc.ram.ram[70][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92178 q=soc.ram.ram[70][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92180 q=soc.ram.ram[70][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92182 q=soc.ram.ram[70][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92184 q=soc.ram.ram[70][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92186 q=soc.ram.ram[70][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92188 q=soc.ram.ram[6][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92190 q=soc.ram.ram[6][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92192 q=soc.ram.ram[6][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92194 q=soc.ram.ram[6][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92196 q=soc.ram.ram[6][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92198 q=soc.ram.ram[6][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92200 q=soc.ram.ram[6][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92202 q=soc.ram.ram[6][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92204 q=soc.ram.ram[104][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92206 q=soc.ram.ram[104][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92208 q=soc.ram.ram[104][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92210 q=soc.ram.ram[104][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92212 q=soc.ram.ram[104][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92214 q=soc.ram.ram[104][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92216 q=soc.ram.ram[104][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92218 q=soc.ram.ram[104][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92220 q=soc.ram.ram[68][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92222 q=soc.ram.ram[68][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92224 q=soc.ram.ram[68][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92226 q=soc.ram.ram[68][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92228 q=soc.ram.ram[68][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92230 q=soc.ram.ram[68][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92232 q=soc.ram.ram[68][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92234 q=soc.ram.ram[68][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92236 q=soc.ram.ram[68][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92238 q=soc.ram.ram[68][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92240 q=soc.ram.ram[68][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92242 q=soc.ram.ram[68][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92244 q=soc.ram.ram[68][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92246 q=soc.ram.ram[68][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92248 q=soc.ram.ram[68][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92250 q=soc.ram.ram[68][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92252 q=soc.ram.ram[69][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92254 q=soc.ram.ram[69][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92256 q=soc.ram.ram[69][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92258 q=soc.ram.ram[69][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92260 q=soc.ram.ram[69][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92262 q=soc.ram.ram[69][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92264 q=soc.ram.ram[69][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92266 q=soc.ram.ram[69][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92268 q=soc.ram.ram[6][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92270 q=soc.ram.ram[6][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92272 q=soc.ram.ram[6][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92274 q=soc.ram.ram[6][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92276 q=soc.ram.ram[6][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92278 q=soc.ram.ram[6][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92280 q=soc.ram.ram[6][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92282 q=soc.ram.ram[6][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92284 q=soc.ram.ram[6][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92286 q=soc.ram.ram[6][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92288 q=soc.ram.ram[6][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92290 q=soc.ram.ram[6][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92292 q=soc.ram.ram[6][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92294 q=soc.ram.ram[6][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92296 q=soc.ram.ram[6][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92298 q=soc.ram.ram[6][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92300 q=soc.ram.ram[67][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92302 q=soc.ram.ram[67][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92304 q=soc.ram.ram[67][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92306 q=soc.ram.ram[67][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92308 q=soc.ram.ram[67][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92310 q=soc.ram.ram[67][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92312 q=soc.ram.ram[67][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92314 q=soc.ram.ram[67][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92316 q=soc.ram.ram[67][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92318 q=soc.ram.ram[67][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92320 q=soc.ram.ram[67][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92322 q=soc.ram.ram[67][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92324 q=soc.ram.ram[67][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92326 q=soc.ram.ram[67][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92328 q=soc.ram.ram[67][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92330 q=soc.ram.ram[67][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92332 q=soc.ram.ram[69][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92334 q=soc.ram.ram[69][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92336 q=soc.ram.ram[69][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92338 q=soc.ram.ram[69][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92340 q=soc.ram.ram[69][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92342 q=soc.ram.ram[69][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92344 q=soc.ram.ram[69][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92346 q=soc.ram.ram[69][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92348 q=soc.ram.ram[68][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92350 q=soc.ram.ram[68][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92352 q=soc.ram.ram[68][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92354 q=soc.ram.ram[68][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92356 q=soc.ram.ram[68][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92358 q=soc.ram.ram[68][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92360 q=soc.ram.ram[68][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92362 q=soc.ram.ram[68][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92364 q=soc.ram.ram[69][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92366 q=soc.ram.ram[69][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92368 q=soc.ram.ram[69][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92370 q=soc.ram.ram[69][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92372 q=soc.ram.ram[69][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92374 q=soc.ram.ram[69][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92376 q=soc.ram.ram[69][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92378 q=soc.ram.ram[69][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92382 q=soc.bridge.csr_bridge_0.wb__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92386 q=soc.bridge.csr_bridge_0.wb__dat_r[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92390 q=soc.bridge.csr_bridge_0.wb__dat_r[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92394 q=soc.bridge.csr_bridge_0.wb__dat_r[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92398 q=soc.bridge.csr_bridge_0.wb__dat_r[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92402 q=soc.bridge.csr_bridge_0.wb__dat_r[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92406 q=soc.bridge.csr_bridge_0.wb__dat_r[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92410 q=soc.bridge.csr_bridge_0.wb__dat_r[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92414 q=soc.bridge._int_src.uart_ev_pending__r_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92416 q=soc.ram.ram[25][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92418 q=soc.ram.ram[25][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92420 q=soc.ram.ram[25][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92422 q=soc.ram.ram[25][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92424 q=soc.ram.ram[25][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92426 q=soc.ram.ram[25][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92428 q=soc.ram.ram[25][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92430 q=soc.ram.ram[25][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92432 q=soc.ram.ram[34][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92434 q=soc.ram.ram[34][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92436 q=soc.ram.ram[34][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92438 q=soc.ram.ram[34][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92440 q=soc.ram.ram[34][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92442 q=soc.ram.ram[34][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92444 q=soc.ram.ram[34][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92446 q=soc.ram.ram[34][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92448 q=soc.ram.ram[24][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92450 q=soc.ram.ram[24][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92452 q=soc.ram.ram[24][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92454 q=soc.ram.ram[24][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92456 q=soc.ram.ram[24][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92458 q=soc.ram.ram[24][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92460 q=soc.ram.ram[24][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92462 q=soc.ram.ram[24][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92464 q=soc.ram.ram[24][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92466 q=soc.ram.ram[24][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92468 q=soc.ram.ram[24][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92470 q=soc.ram.ram[24][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92472 q=soc.ram.ram[24][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92474 q=soc.ram.ram[24][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92476 q=soc.ram.ram[24][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92478 q=soc.ram.ram[24][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92480 q=soc.cpu.minerva.gprf.mem._mem[14][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92482 q=soc.cpu.minerva.gprf.mem._mem[14][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92484 q=soc.cpu.minerva.gprf.mem._mem[14][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92486 q=soc.cpu.minerva.gprf.mem._mem[14][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92488 q=soc.cpu.minerva.gprf.mem._mem[14][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92490 q=soc.cpu.minerva.gprf.mem._mem[14][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92492 q=soc.cpu.minerva.gprf.mem._mem[14][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92494 q=soc.cpu.minerva.gprf.mem._mem[14][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92496 q=soc.cpu.minerva.gprf.mem._mem[14][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92498 q=soc.cpu.minerva.gprf.mem._mem[14][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92500 q=soc.cpu.minerva.gprf.mem._mem[14][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92502 q=soc.cpu.minerva.gprf.mem._mem[14][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92504 q=soc.cpu.minerva.gprf.mem._mem[14][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92506 q=soc.cpu.minerva.gprf.mem._mem[14][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92508 q=soc.cpu.minerva.gprf.mem._mem[14][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92510 q=soc.cpu.minerva.gprf.mem._mem[14][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92512 q=soc.cpu.minerva.gprf.mem._mem[14][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92514 q=soc.cpu.minerva.gprf.mem._mem[14][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92516 q=soc.cpu.minerva.gprf.mem._mem[14][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92518 q=soc.cpu.minerva.gprf.mem._mem[14][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92520 q=soc.cpu.minerva.gprf.mem._mem[14][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92522 q=soc.cpu.minerva.gprf.mem._mem[14][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92524 q=soc.cpu.minerva.gprf.mem._mem[14][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92526 q=soc.cpu.minerva.gprf.mem._mem[14][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92528 q=soc.cpu.minerva.gprf.mem._mem[14][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92530 q=soc.cpu.minerva.gprf.mem._mem[14][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92532 q=soc.cpu.minerva.gprf.mem._mem[14][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92534 q=soc.cpu.minerva.gprf.mem._mem[14][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92536 q=soc.cpu.minerva.gprf.mem._mem[14][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92538 q=soc.cpu.minerva.gprf.mem._mem[14][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92540 q=soc.cpu.minerva.gprf.mem._mem[14][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92542 q=soc.cpu.minerva.gprf.mem._mem[14][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92544 q=soc.ram.ram[18][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92546 q=soc.ram.ram[18][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92548 q=soc.ram.ram[18][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92550 q=soc.ram.ram[18][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92552 q=soc.ram.ram[18][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92554 q=soc.ram.ram[18][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92556 q=soc.ram.ram[18][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92558 q=soc.ram.ram[18][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92560 q=soc.ram.ram[127][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92562 q=soc.ram.ram[127][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92564 q=soc.ram.ram[127][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92566 q=soc.ram.ram[127][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92568 q=soc.ram.ram[127][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92570 q=soc.ram.ram[127][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92572 q=soc.ram.ram[127][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92574 q=soc.ram.ram[127][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92576 q=soc.ram.ram[119][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92578 q=soc.ram.ram[119][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92580 q=soc.ram.ram[119][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92582 q=soc.ram.ram[119][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92584 q=soc.ram.ram[119][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92586 q=soc.ram.ram[119][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92588 q=soc.ram.ram[119][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92590 q=soc.ram.ram[119][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92592 q=soc.ram.ram[39][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92594 q=soc.ram.ram[39][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92596 q=soc.ram.ram[39][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92598 q=soc.ram.ram[39][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92600 q=soc.ram.ram[39][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92602 q=soc.ram.ram[39][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92604 q=soc.ram.ram[39][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92606 q=soc.ram.ram[39][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92608 q=soc.ram.ram[81][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92610 q=soc.ram.ram[81][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92612 q=soc.ram.ram[81][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92614 q=soc.ram.ram[81][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92616 q=soc.ram.ram[81][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92618 q=soc.ram.ram[81][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92620 q=soc.ram.ram[81][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92622 q=soc.ram.ram[81][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92624 q=soc.ram.ram[39][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92626 q=soc.ram.ram[39][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92628 q=soc.ram.ram[39][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92630 q=soc.ram.ram[39][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92632 q=soc.ram.ram[39][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92634 q=soc.ram.ram[39][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92636 q=soc.ram.ram[39][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92638 q=soc.ram.ram[39][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92640 q=soc.ram.ram[80][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92642 q=soc.ram.ram[80][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92644 q=soc.ram.ram[80][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92646 q=soc.ram.ram[80][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92648 q=soc.ram.ram[80][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92650 q=soc.ram.ram[80][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92652 q=soc.ram.ram[80][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92654 q=soc.ram.ram[80][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92656 q=soc.ram.ram[39][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92658 q=soc.ram.ram[39][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92660 q=soc.ram.ram[39][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92662 q=soc.ram.ram[39][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92664 q=soc.ram.ram[39][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92666 q=soc.ram.ram[39][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92668 q=soc.ram.ram[39][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92670 q=soc.ram.ram[39][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92672 q=soc.ram.ram[7][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92674 q=soc.ram.ram[7][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92676 q=soc.ram.ram[7][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92678 q=soc.ram.ram[7][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92680 q=soc.ram.ram[7][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92682 q=soc.ram.ram[7][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92684 q=soc.ram.ram[7][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92686 q=soc.ram.ram[7][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92688 q=soc.ram.ram[38][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92690 q=soc.ram.ram[38][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92692 q=soc.ram.ram[38][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92694 q=soc.ram.ram[38][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92696 q=soc.ram.ram[38][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92698 q=soc.ram.ram[38][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92700 q=soc.ram.ram[38][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92702 q=soc.ram.ram[38][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92704 q=soc.ram.ram[78][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92706 q=soc.ram.ram[78][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92708 q=soc.ram.ram[78][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92710 q=soc.ram.ram[78][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92712 q=soc.ram.ram[78][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92714 q=soc.ram.ram[78][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92716 q=soc.ram.ram[78][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92718 q=soc.ram.ram[78][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92720 q=soc.ram.ram[38][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92722 q=soc.ram.ram[38][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92724 q=soc.ram.ram[38][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92726 q=soc.ram.ram[38][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92728 q=soc.ram.ram[38][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92730 q=soc.ram.ram[38][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92732 q=soc.ram.ram[38][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92734 q=soc.ram.ram[38][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92736 q=soc.ram.ram[77][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92738 q=soc.ram.ram[77][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92740 q=soc.ram.ram[77][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92742 q=soc.ram.ram[77][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92744 q=soc.ram.ram[77][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92746 q=soc.ram.ram[77][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92748 q=soc.ram.ram[77][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92750 q=soc.ram.ram[77][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92752 q=soc.ram.ram[38][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92754 q=soc.ram.ram[38][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92756 q=soc.ram.ram[38][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92758 q=soc.ram.ram[38][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92760 q=soc.ram.ram[38][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92762 q=soc.ram.ram[38][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92764 q=soc.ram.ram[38][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92766 q=soc.ram.ram[38][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92768 q=soc.ram.ram[103][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92770 q=soc.ram.ram[103][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92772 q=soc.ram.ram[103][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92774 q=soc.ram.ram[103][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92776 q=soc.ram.ram[103][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92778 q=soc.ram.ram[103][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92780 q=soc.ram.ram[103][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92782 q=soc.ram.ram[103][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92784 q=soc.ram.ram[88][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92786 q=soc.ram.ram[88][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92788 q=soc.ram.ram[88][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92790 q=soc.ram.ram[88][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92792 q=soc.ram.ram[88][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92794 q=soc.ram.ram[88][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92796 q=soc.ram.ram[88][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92798 q=soc.ram.ram[88][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92800 q=soc.ram.ram[41][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92802 q=soc.ram.ram[41][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92804 q=soc.ram.ram[41][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92806 q=soc.ram.ram[41][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92808 q=soc.ram.ram[41][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92810 q=soc.ram.ram[41][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92812 q=soc.ram.ram[41][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92814 q=soc.ram.ram[41][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92816 q=soc.ram.ram[40][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92818 q=soc.ram.ram[40][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92820 q=soc.ram.ram[40][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92822 q=soc.ram.ram[40][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92824 q=soc.ram.ram[40][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92826 q=soc.ram.ram[40][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92828 q=soc.ram.ram[40][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92830 q=soc.ram.ram[40][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92832 q=soc.ram.ram[87][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92834 q=soc.ram.ram[87][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92836 q=soc.ram.ram[87][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92838 q=soc.ram.ram[87][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92840 q=soc.ram.ram[87][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92842 q=soc.ram.ram[87][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92844 q=soc.ram.ram[87][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92846 q=soc.ram.ram[87][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92848 q=soc.ram.ram[86][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92850 q=soc.ram.ram[86][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92852 q=soc.ram.ram[86][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92854 q=soc.ram.ram[86][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92856 q=soc.ram.ram[86][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92858 q=soc.ram.ram[86][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92860 q=soc.ram.ram[86][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92862 q=soc.ram.ram[86][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92864 q=soc.ram.ram[40][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92866 q=soc.ram.ram[40][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92868 q=soc.ram.ram[40][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92870 q=soc.ram.ram[40][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92872 q=soc.ram.ram[40][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92874 q=soc.ram.ram[40][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92876 q=soc.ram.ram[40][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92878 q=soc.ram.ram[40][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92880 q=soc.ram.ram[40][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92882 q=soc.ram.ram[40][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92884 q=soc.ram.ram[40][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92886 q=soc.ram.ram[40][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92888 q=soc.ram.ram[40][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92890 q=soc.ram.ram[40][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92892 q=soc.ram.ram[40][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92894 q=soc.ram.ram[40][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92896 q=soc.ram.ram[85][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92898 q=soc.ram.ram[85][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92900 q=soc.ram.ram[85][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92902 q=soc.ram.ram[85][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92904 q=soc.ram.ram[85][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92906 q=soc.ram.ram[85][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92908 q=soc.ram.ram[85][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92910 q=soc.ram.ram[85][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92912 q=soc.ram.ram[3][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92914 q=soc.ram.ram[3][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92916 q=soc.ram.ram[3][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92918 q=soc.ram.ram[3][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92920 q=soc.ram.ram[3][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92922 q=soc.ram.ram[3][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92924 q=soc.ram.ram[3][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92926 q=soc.ram.ram[3][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92928 q=soc.ram.ram[84][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92930 q=soc.ram.ram[84][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92932 q=soc.ram.ram[84][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92934 q=soc.ram.ram[84][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92936 q=soc.ram.ram[84][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92938 q=soc.ram.ram[84][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92940 q=soc.ram.ram[84][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92942 q=soc.ram.ram[84][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92944 q=soc.ram.ram[3][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92946 q=soc.ram.ram[3][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92948 q=soc.ram.ram[3][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92950 q=soc.ram.ram[3][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92952 q=soc.ram.ram[3][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92954 q=soc.ram.ram[3][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92956 q=soc.ram.ram[3][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92958 q=soc.ram.ram[3][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92960 q=soc.ram.ram[83][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92962 q=soc.ram.ram[83][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92964 q=soc.ram.ram[83][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92966 q=soc.ram.ram[83][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92968 q=soc.ram.ram[83][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92970 q=soc.ram.ram[83][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92972 q=soc.ram.ram[83][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92974 q=soc.ram.ram[83][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92976 q=soc.ram.ram[3][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92978 q=soc.ram.ram[3][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92980 q=soc.ram.ram[3][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92982 q=soc.ram.ram[3][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92984 q=soc.ram.ram[3][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92986 q=soc.ram.ram[3][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92988 q=soc.ram.ram[3][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92990 q=soc.ram.ram[3][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92992 q=soc.ram.ram[82][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92994 q=soc.ram.ram[82][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92996 q=soc.ram.ram[82][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$92998 q=soc.ram.ram[82][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93000 q=soc.ram.ram[82][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93002 q=soc.ram.ram[82][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93004 q=soc.ram.ram[82][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93006 q=soc.ram.ram[82][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93010 q=soc.bridge.csr_bridge_0.wb__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93014 q=soc.bridge.csr_bridge_0.wb__dat_r[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93018 q=soc.bridge.csr_bridge_0.wb__dat_r[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93022 q=soc.bridge.csr_bridge_0.wb__dat_r[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93026 q=soc.bridge.csr_bridge_0.wb__dat_r[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93030 q=soc.bridge.csr_bridge_0.wb__dat_r[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93034 q=soc.bridge.csr_bridge_0.wb__dat_r[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93038 q=soc.bridge.csr_bridge_0.wb__dat_r[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93040 q=soc.ram.ram[62][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93042 q=soc.ram.ram[62][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93044 q=soc.ram.ram[62][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93046 q=soc.ram.ram[62][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93048 q=soc.ram.ram[62][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93050 q=soc.ram.ram[62][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93052 q=soc.ram.ram[62][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93054 q=soc.ram.ram[62][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93056 q=soc.ram.ram[63][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93058 q=soc.ram.ram[63][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93060 q=soc.ram.ram[63][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93062 q=soc.ram.ram[63][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93064 q=soc.ram.ram[63][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93066 q=soc.ram.ram[63][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93068 q=soc.ram.ram[63][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93070 q=soc.ram.ram[63][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93072 q=soc.ram.ram[64][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93074 q=soc.ram.ram[64][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93076 q=soc.ram.ram[64][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93078 q=soc.ram.ram[64][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93080 q=soc.ram.ram[64][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93082 q=soc.ram.ram[64][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93084 q=soc.ram.ram[64][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93086 q=soc.ram.ram[64][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93088 q=soc.ram.ram[64][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93090 q=soc.ram.ram[64][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93092 q=soc.ram.ram[64][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93094 q=soc.ram.ram[64][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93096 q=soc.ram.ram[64][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93098 q=soc.ram.ram[64][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93100 q=soc.ram.ram[64][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93102 q=soc.ram.ram[64][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93104 q=soc.ram.ram[63][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93106 q=soc.ram.ram[63][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93108 q=soc.ram.ram[63][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93110 q=soc.ram.ram[63][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93112 q=soc.ram.ram[63][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93114 q=soc.ram.ram[63][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93116 q=soc.ram.ram[63][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93118 q=soc.ram.ram[63][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93120 q=soc.ram.ram[62][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93122 q=soc.ram.ram[62][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93124 q=soc.ram.ram[62][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93126 q=soc.ram.ram[62][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93128 q=soc.ram.ram[62][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93130 q=soc.ram.ram[62][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93132 q=soc.ram.ram[62][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93134 q=soc.ram.ram[62][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93136 q=soc.ram.ram[64][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93138 q=soc.ram.ram[64][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93140 q=soc.ram.ram[64][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93142 q=soc.ram.ram[64][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93144 q=soc.ram.ram[64][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93146 q=soc.ram.ram[64][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93148 q=soc.ram.ram[64][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93150 q=soc.ram.ram[64][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93152 q=soc.ram.ram[65][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93154 q=soc.ram.ram[65][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93156 q=soc.ram.ram[65][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93158 q=soc.ram.ram[65][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93160 q=soc.ram.ram[65][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93162 q=soc.ram.ram[65][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93164 q=soc.ram.ram[65][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93166 q=soc.ram.ram[65][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93168 q=soc.ram.ram[63][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93170 q=soc.ram.ram[63][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93172 q=soc.ram.ram[63][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93174 q=soc.ram.ram[63][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93176 q=soc.ram.ram[63][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93178 q=soc.ram.ram[63][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93180 q=soc.ram.ram[63][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93182 q=soc.ram.ram[63][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93184 q=soc.ram.ram[65][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93186 q=soc.ram.ram[65][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93188 q=soc.ram.ram[65][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93190 q=soc.ram.ram[65][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93192 q=soc.ram.ram[65][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93194 q=soc.ram.ram[65][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93196 q=soc.ram.ram[65][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93198 q=soc.ram.ram[65][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93200 q=soc.ram.ram[65][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93202 q=soc.ram.ram[65][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93204 q=soc.ram.ram[65][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93206 q=soc.ram.ram[65][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93208 q=soc.ram.ram[65][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93210 q=soc.ram.ram[65][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93212 q=soc.ram.ram[65][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93214 q=soc.ram.ram[65][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93216 q=soc.ram.ram[66][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93218 q=soc.ram.ram[66][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93220 q=soc.ram.ram[66][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93222 q=soc.ram.ram[66][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93224 q=soc.ram.ram[66][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93226 q=soc.ram.ram[66][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93228 q=soc.ram.ram[66][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93230 q=soc.ram.ram[66][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93232 q=soc.ram.ram[66][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93234 q=soc.ram.ram[66][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93236 q=soc.ram.ram[66][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93238 q=soc.ram.ram[66][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93240 q=soc.ram.ram[66][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93242 q=soc.ram.ram[66][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93244 q=soc.ram.ram[66][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93246 q=soc.ram.ram[66][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93248 q=soc.ram.ram[66][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93250 q=soc.ram.ram[66][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93252 q=soc.ram.ram[66][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93254 q=soc.ram.ram[66][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93256 q=soc.ram.ram[66][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93258 q=soc.ram.ram[66][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93260 q=soc.ram.ram[66][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93262 q=soc.ram.ram[66][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93264 q=soc.ram.ram[67][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93266 q=soc.ram.ram[67][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93268 q=soc.ram.ram[67][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93270 q=soc.ram.ram[67][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93272 q=soc.ram.ram[67][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93274 q=soc.ram.ram[67][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93276 q=soc.ram.ram[67][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93278 q=soc.ram.ram[67][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93280 q=soc.ram.ram[35][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93282 q=soc.ram.ram[35][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93284 q=soc.ram.ram[35][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93286 q=soc.ram.ram[35][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93288 q=soc.ram.ram[35][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93290 q=soc.ram.ram[35][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93292 q=soc.ram.ram[35][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93294 q=soc.ram.ram[35][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93298 q=soc.bridge.csr_mux_0.uart_divisor__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93302 q=soc.bridge.csr_mux_0.uart_divisor__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93306 q=soc.bridge.csr_mux_0.uart_divisor__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93310 q=soc.bridge.csr_mux_0.uart_divisor__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93314 q=soc.bridge.csr_mux_0.uart_divisor__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93318 q=soc.bridge.csr_mux_0.uart_divisor__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93322 q=soc.bridge.csr_mux_0.uart_divisor__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93326 q=soc.bridge.csr_mux_0.uart_divisor__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93330 q=soc.bridge.csr_bridge_1.wb__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93334 q=soc.bridge.csr_bridge_1.wb__dat_r[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93338 q=soc.bridge.csr_bridge_1.wb__dat_r[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93342 q=soc.bridge.csr_bridge_1.wb__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93346 q=soc.bridge.csr_bridge_1.wb__dat_r[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93350 q=soc.bridge.csr_bridge_1.wb__dat_r[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93354 q=soc.bridge.csr_bridge_1.wb__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93358 q=soc.bridge.csr_bridge_1.wb__dat_r[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93362 q=soc.bridge.csr_bridge_1.wb__dat_r[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93366 q=soc.bridge.csr_bridge_0.wb__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93370 q=soc.bridge.csr_bridge_0.wb__dat_r[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93374 q=soc.bridge.csr_bridge_0.wb__dat_r[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93378 q=soc.bridge.csr_bridge_0.wb__dat_r[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93382 q=soc.bridge.csr_bridge_0.wb__dat_r[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93386 q=soc.bridge.csr_bridge_0.wb__dat_r[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93390 q=soc.bridge.csr_bridge_0.wb__dat_r[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93394 q=soc.bridge.csr_bridge_0.wb__dat_r[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93396 q=soc.ram.ram[62][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93398 q=soc.ram.ram[62][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93400 q=soc.ram.ram[62][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93402 q=soc.ram.ram[62][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93404 q=soc.ram.ram[62][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93406 q=soc.ram.ram[62][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93408 q=soc.ram.ram[62][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93410 q=soc.ram.ram[62][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93412 q=soc.ram.ram[61][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93414 q=soc.ram.ram[61][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93416 q=soc.ram.ram[61][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93418 q=soc.ram.ram[61][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93420 q=soc.ram.ram[61][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93422 q=soc.ram.ram[61][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93424 q=soc.ram.ram[61][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93426 q=soc.ram.ram[61][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93428 q=soc.ram.ram[61][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93430 q=soc.ram.ram[61][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93432 q=soc.ram.ram[61][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93434 q=soc.ram.ram[61][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93436 q=soc.ram.ram[61][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93438 q=soc.ram.ram[61][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93440 q=soc.ram.ram[61][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93442 q=soc.ram.ram[61][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93444 q=soc.ram.ram[61][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93446 q=soc.ram.ram[61][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93448 q=soc.ram.ram[61][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93450 q=soc.ram.ram[61][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93452 q=soc.ram.ram[61][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93454 q=soc.ram.ram[61][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93456 q=soc.ram.ram[61][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93458 q=soc.ram.ram[61][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93460 q=soc.ram.ram[60][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93462 q=soc.ram.ram[60][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93464 q=soc.ram.ram[60][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93466 q=soc.ram.ram[60][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93468 q=soc.ram.ram[60][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93470 q=soc.ram.ram[60][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93472 q=soc.ram.ram[60][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93474 q=soc.ram.ram[60][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93476 q=soc.ram.ram[60][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93478 q=soc.ram.ram[60][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93480 q=soc.ram.ram[60][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93482 q=soc.ram.ram[60][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93484 q=soc.ram.ram[60][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93486 q=soc.ram.ram[60][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93488 q=soc.ram.ram[60][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93490 q=soc.ram.ram[60][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93492 q=soc.ram.ram[60][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93494 q=soc.ram.ram[60][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93496 q=soc.ram.ram[60][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93498 q=soc.ram.ram[60][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93500 q=soc.ram.ram[60][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93502 q=soc.ram.ram[60][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93504 q=soc.ram.ram[60][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93506 q=soc.ram.ram[60][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93508 q=soc.ram.ram[21][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93510 q=soc.ram.ram[21][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93512 q=soc.ram.ram[21][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93514 q=soc.ram.ram[21][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93516 q=soc.ram.ram[21][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93518 q=soc.ram.ram[21][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93520 q=soc.ram.ram[21][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93522 q=soc.ram.ram[21][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93524 q=soc.ram.ram[99][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93526 q=soc.ram.ram[99][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93528 q=soc.ram.ram[99][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93530 q=soc.ram.ram[99][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93532 q=soc.ram.ram[99][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93534 q=soc.ram.ram[99][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93536 q=soc.ram.ram[99][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93538 q=soc.ram.ram[99][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93540 q=soc.ram.ram[22][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93542 q=soc.ram.ram[22][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93544 q=soc.ram.ram[22][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93546 q=soc.ram.ram[22][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93548 q=soc.ram.ram[22][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93550 q=soc.ram.ram[22][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93552 q=soc.ram.ram[22][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93554 q=soc.ram.ram[22][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93556 q=soc.ram.ram[25][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93558 q=soc.ram.ram[25][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93560 q=soc.ram.ram[25][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93562 q=soc.ram.ram[25][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93564 q=soc.ram.ram[25][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93566 q=soc.ram.ram[25][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93568 q=soc.ram.ram[25][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93570 q=soc.ram.ram[25][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93572 q=soc.ram.ram[36][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93574 q=soc.ram.ram[36][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93576 q=soc.ram.ram[36][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93578 q=soc.ram.ram[36][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93580 q=soc.ram.ram[36][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93582 q=soc.ram.ram[36][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93584 q=soc.ram.ram[36][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93586 q=soc.ram.ram[36][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93588 q=soc.ram.ram[5][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93590 q=soc.ram.ram[5][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93592 q=soc.ram.ram[5][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93594 q=soc.ram.ram[5][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93596 q=soc.ram.ram[5][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93598 q=soc.ram.ram[5][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93600 q=soc.ram.ram[5][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93602 q=soc.ram.ram[5][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93604 q=soc.ram.ram[5][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93606 q=soc.ram.ram[5][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93608 q=soc.ram.ram[5][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93610 q=soc.ram.ram[5][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93612 q=soc.ram.ram[5][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93614 q=soc.ram.ram[5][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93616 q=soc.ram.ram[5][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93618 q=soc.ram.ram[5][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93620 q=soc.ram.ram[37][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93622 q=soc.ram.ram[37][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93624 q=soc.ram.ram[37][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93626 q=soc.ram.ram[37][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93628 q=soc.ram.ram[37][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93630 q=soc.ram.ram[37][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93632 q=soc.ram.ram[37][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93634 q=soc.ram.ram[37][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93636 q=soc.ram.ram[74][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93638 q=soc.ram.ram[74][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93640 q=soc.ram.ram[74][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93642 q=soc.ram.ram[74][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93644 q=soc.ram.ram[74][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93646 q=soc.ram.ram[74][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93648 q=soc.ram.ram[74][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93650 q=soc.ram.ram[74][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93652 q=soc.ram.ram[37][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93654 q=soc.ram.ram[37][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93656 q=soc.ram.ram[37][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93658 q=soc.ram.ram[37][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93660 q=soc.ram.ram[37][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93662 q=soc.ram.ram[37][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93664 q=soc.ram.ram[37][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93666 q=soc.ram.ram[37][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93668 q=soc.ram.ram[5][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93670 q=soc.ram.ram[5][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93672 q=soc.ram.ram[5][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93674 q=soc.ram.ram[5][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93676 q=soc.ram.ram[5][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93678 q=soc.ram.ram[5][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93680 q=soc.ram.ram[5][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93682 q=soc.ram.ram[5][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93684 q=soc.ram.ram[59][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93686 q=soc.ram.ram[59][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93688 q=soc.ram.ram[59][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93690 q=soc.ram.ram[59][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93692 q=soc.ram.ram[59][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93694 q=soc.ram.ram[59][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93696 q=soc.ram.ram[59][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93698 q=soc.ram.ram[59][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93700 q=soc.ram.ram[59][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93702 q=soc.ram.ram[59][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93704 q=soc.ram.ram[59][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93706 q=soc.ram.ram[59][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93708 q=soc.ram.ram[59][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93710 q=soc.ram.ram[59][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93712 q=soc.ram.ram[59][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93714 q=soc.ram.ram[59][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93716 q=soc.ram.ram[59][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93718 q=soc.ram.ram[59][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93720 q=soc.ram.ram[59][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93722 q=soc.ram.ram[59][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93724 q=soc.ram.ram[59][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93726 q=soc.ram.ram[59][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93728 q=soc.ram.ram[59][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93730 q=soc.ram.ram[59][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93732 q=soc.ram.ram[58][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93734 q=soc.ram.ram[58][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93736 q=soc.ram.ram[58][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93738 q=soc.ram.ram[58][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93740 q=soc.ram.ram[58][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93742 q=soc.ram.ram[58][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93744 q=soc.ram.ram[58][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93746 q=soc.ram.ram[58][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93748 q=soc.ram.ram[75][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93750 q=soc.ram.ram[75][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93752 q=soc.ram.ram[75][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93754 q=soc.ram.ram[75][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93756 q=soc.ram.ram[75][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93758 q=soc.ram.ram[75][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93760 q=soc.ram.ram[75][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93762 q=soc.ram.ram[75][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93764 q=soc.ram.ram[58][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93766 q=soc.ram.ram[58][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93768 q=soc.ram.ram[58][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93770 q=soc.ram.ram[58][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93772 q=soc.ram.ram[58][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93774 q=soc.ram.ram[58][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93776 q=soc.ram.ram[58][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93778 q=soc.ram.ram[58][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93780 q=soc.ram.ram[58][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93782 q=soc.ram.ram[58][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93784 q=soc.ram.ram[58][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93786 q=soc.ram.ram[58][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93788 q=soc.ram.ram[58][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93790 q=soc.ram.ram[58][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93792 q=soc.ram.ram[58][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93794 q=soc.ram.ram[58][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93796 q=soc.ram.ram[57][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93798 q=soc.ram.ram[57][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93800 q=soc.ram.ram[57][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93802 q=soc.ram.ram[57][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93804 q=soc.ram.ram[57][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93806 q=soc.ram.ram[57][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93808 q=soc.ram.ram[57][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93810 q=soc.ram.ram[57][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93812 q=soc.ram.ram[46][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93814 q=soc.ram.ram[46][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93816 q=soc.ram.ram[46][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93818 q=soc.ram.ram[46][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93820 q=soc.ram.ram[46][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93822 q=soc.ram.ram[46][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93824 q=soc.ram.ram[46][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93826 q=soc.ram.ram[46][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93828 q=soc.ram.ram[57][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93830 q=soc.ram.ram[57][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93832 q=soc.ram.ram[57][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93834 q=soc.ram.ram[57][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93836 q=soc.ram.ram[57][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93838 q=soc.ram.ram[57][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93840 q=soc.ram.ram[57][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93842 q=soc.ram.ram[57][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93844 q=soc.ram.ram[57][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93846 q=soc.ram.ram[57][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93848 q=soc.ram.ram[57][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93850 q=soc.ram.ram[57][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93852 q=soc.ram.ram[57][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93854 q=soc.ram.ram[57][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93856 q=soc.ram.ram[57][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93858 q=soc.ram.ram[57][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93860 q=soc.ram.ram[56][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93862 q=soc.ram.ram[56][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93864 q=soc.ram.ram[56][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93866 q=soc.ram.ram[56][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93868 q=soc.ram.ram[56][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93870 q=soc.ram.ram[56][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93872 q=soc.ram.ram[56][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93874 q=soc.ram.ram[56][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93876 q=soc.ram.ram[56][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93878 q=soc.ram.ram[56][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93880 q=soc.ram.ram[56][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93882 q=soc.ram.ram[56][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93884 q=soc.ram.ram[56][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93886 q=soc.ram.ram[56][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93888 q=soc.ram.ram[56][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93890 q=soc.ram.ram[56][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93892 q=soc.ram.ram[37][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93894 q=soc.ram.ram[37][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93896 q=soc.ram.ram[37][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93898 q=soc.ram.ram[37][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93900 q=soc.ram.ram[37][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93902 q=soc.ram.ram[37][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93904 q=soc.ram.ram[37][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93906 q=soc.ram.ram[37][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93908 q=soc.ram.ram[56][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93910 q=soc.ram.ram[56][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93912 q=soc.ram.ram[56][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93914 q=soc.ram.ram[56][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93916 q=soc.ram.ram[56][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93918 q=soc.ram.ram[56][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93920 q=soc.ram.ram[56][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93922 q=soc.ram.ram[56][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93924 q=soc.ram.ram[55][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93926 q=soc.ram.ram[55][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93928 q=soc.ram.ram[55][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93930 q=soc.ram.ram[55][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93932 q=soc.ram.ram[55][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93934 q=soc.ram.ram[55][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93936 q=soc.ram.ram[55][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93938 q=soc.ram.ram[55][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93940 q=soc.ram.ram[55][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93942 q=soc.ram.ram[55][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93944 q=soc.ram.ram[55][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93946 q=soc.ram.ram[55][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93948 q=soc.ram.ram[55][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93950 q=soc.ram.ram[55][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93952 q=soc.ram.ram[55][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93954 q=soc.ram.ram[55][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93956 q=soc.ram.ram[55][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93958 q=soc.ram.ram[55][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93960 q=soc.ram.ram[55][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93962 q=soc.ram.ram[55][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93964 q=soc.ram.ram[55][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93966 q=soc.ram.ram[55][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93968 q=soc.ram.ram[55][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93970 q=soc.ram.ram[55][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93972 q=soc.ram.ram[54][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93974 q=soc.ram.ram[54][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93976 q=soc.ram.ram[54][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93978 q=soc.ram.ram[54][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93980 q=soc.ram.ram[54][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93982 q=soc.ram.ram[54][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93984 q=soc.ram.ram[54][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93986 q=soc.ram.ram[54][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93988 q=soc.ram.ram[54][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93990 q=soc.ram.ram[54][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93992 q=soc.ram.ram[54][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93994 q=soc.ram.ram[54][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93996 q=soc.ram.ram[54][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$93998 q=soc.ram.ram[54][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94000 q=soc.ram.ram[54][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94002 q=soc.ram.ram[54][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94004 q=soc.ram.ram[53][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94006 q=soc.ram.ram[53][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94008 q=soc.ram.ram[53][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94010 q=soc.ram.ram[53][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94012 q=soc.ram.ram[53][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94014 q=soc.ram.ram[53][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94016 q=soc.ram.ram[53][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94018 q=soc.ram.ram[53][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94020 q=soc.ram.ram[53][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94022 q=soc.ram.ram[53][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94024 q=soc.ram.ram[53][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94026 q=soc.ram.ram[53][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94028 q=soc.ram.ram[53][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94030 q=soc.ram.ram[53][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94032 q=soc.ram.ram[53][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94034 q=soc.ram.ram[53][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94036 q=soc.ram.ram[53][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94038 q=soc.ram.ram[53][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94040 q=soc.ram.ram[53][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94042 q=soc.ram.ram[53][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94044 q=soc.ram.ram[53][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94046 q=soc.ram.ram[53][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94048 q=soc.ram.ram[53][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94050 q=soc.ram.ram[53][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94052 q=soc.ram.ram[54][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94054 q=soc.ram.ram[54][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94056 q=soc.ram.ram[54][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94058 q=soc.ram.ram[54][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94060 q=soc.ram.ram[54][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94062 q=soc.ram.ram[54][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94064 q=soc.ram.ram[54][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94066 q=soc.ram.ram[54][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94068 q=soc.ram.ram[76][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94070 q=soc.ram.ram[76][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94072 q=soc.ram.ram[76][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94074 q=soc.ram.ram[76][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94076 q=soc.ram.ram[76][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94078 q=soc.ram.ram[76][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94080 q=soc.ram.ram[76][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94082 q=soc.ram.ram[76][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94084 q=soc.cpu.minerva.gprf.mem._mem[13][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94086 q=soc.cpu.minerva.gprf.mem._mem[13][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94088 q=soc.cpu.minerva.gprf.mem._mem[13][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94090 q=soc.cpu.minerva.gprf.mem._mem[13][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94092 q=soc.cpu.minerva.gprf.mem._mem[13][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94094 q=soc.cpu.minerva.gprf.mem._mem[13][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94096 q=soc.cpu.minerva.gprf.mem._mem[13][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94098 q=soc.cpu.minerva.gprf.mem._mem[13][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94100 q=soc.cpu.minerva.gprf.mem._mem[13][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94102 q=soc.cpu.minerva.gprf.mem._mem[13][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94104 q=soc.cpu.minerva.gprf.mem._mem[13][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94106 q=soc.cpu.minerva.gprf.mem._mem[13][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94108 q=soc.cpu.minerva.gprf.mem._mem[13][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94110 q=soc.cpu.minerva.gprf.mem._mem[13][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94112 q=soc.cpu.minerva.gprf.mem._mem[13][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94114 q=soc.cpu.minerva.gprf.mem._mem[13][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94116 q=soc.cpu.minerva.gprf.mem._mem[13][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94118 q=soc.cpu.minerva.gprf.mem._mem[13][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94120 q=soc.cpu.minerva.gprf.mem._mem[13][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94122 q=soc.cpu.minerva.gprf.mem._mem[13][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94124 q=soc.cpu.minerva.gprf.mem._mem[13][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94126 q=soc.cpu.minerva.gprf.mem._mem[13][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94128 q=soc.cpu.minerva.gprf.mem._mem[13][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94130 q=soc.cpu.minerva.gprf.mem._mem[13][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94132 q=soc.cpu.minerva.gprf.mem._mem[13][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94134 q=soc.cpu.minerva.gprf.mem._mem[13][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94136 q=soc.cpu.minerva.gprf.mem._mem[13][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94138 q=soc.cpu.minerva.gprf.mem._mem[13][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94140 q=soc.cpu.minerva.gprf.mem._mem[13][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94142 q=soc.cpu.minerva.gprf.mem._mem[13][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94144 q=soc.cpu.minerva.gprf.mem._mem[13][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94146 q=soc.cpu.minerva.gprf.mem._mem[13][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94148 q=soc.ram.ram[8][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94150 q=soc.ram.ram[8][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94152 q=soc.ram.ram[8][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94154 q=soc.ram.ram[8][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94156 q=soc.ram.ram[8][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94158 q=soc.ram.ram[8][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94160 q=soc.ram.ram[8][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94162 q=soc.ram.ram[8][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94164 q=soc.ram.ram[103][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94166 q=soc.ram.ram[103][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94168 q=soc.ram.ram[103][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94170 q=soc.ram.ram[103][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94172 q=soc.ram.ram[103][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94174 q=soc.ram.ram[103][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94176 q=soc.ram.ram[103][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94178 q=soc.ram.ram[103][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94180 q=soc.ram.ram[92][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94182 q=soc.ram.ram[92][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94184 q=soc.ram.ram[92][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94186 q=soc.ram.ram[92][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94188 q=soc.ram.ram[92][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94190 q=soc.ram.ram[92][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94192 q=soc.ram.ram[92][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94194 q=soc.ram.ram[92][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94196 q=soc.ram.ram[12][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94198 q=soc.ram.ram[12][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94200 q=soc.ram.ram[12][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94202 q=soc.ram.ram[12][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94204 q=soc.ram.ram[12][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94206 q=soc.ram.ram[12][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94208 q=soc.ram.ram[12][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94210 q=soc.ram.ram[12][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94212 q=soc.ram.ram[42][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94214 q=soc.ram.ram[42][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94216 q=soc.ram.ram[42][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94218 q=soc.ram.ram[42][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94220 q=soc.ram.ram[42][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94222 q=soc.ram.ram[42][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94224 q=soc.ram.ram[42][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94226 q=soc.ram.ram[42][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94228 q=soc.ram.ram[92][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94230 q=soc.ram.ram[92][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94232 q=soc.ram.ram[92][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94234 q=soc.ram.ram[92][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94236 q=soc.ram.ram[92][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94238 q=soc.ram.ram[92][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94240 q=soc.ram.ram[92][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94242 q=soc.ram.ram[92][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94244 q=soc.ram.ram[42][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94246 q=soc.ram.ram[42][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94248 q=soc.ram.ram[42][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94250 q=soc.ram.ram[42][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94252 q=soc.ram.ram[42][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94254 q=soc.ram.ram[42][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94256 q=soc.ram.ram[42][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94258 q=soc.ram.ram[42][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94260 q=soc.ram.ram[91][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94262 q=soc.ram.ram[91][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94264 q=soc.ram.ram[91][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94266 q=soc.ram.ram[91][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94268 q=soc.ram.ram[91][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94270 q=soc.ram.ram[91][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94272 q=soc.ram.ram[91][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94274 q=soc.ram.ram[91][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94276 q=soc.ram.ram[41][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94278 q=soc.ram.ram[41][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94280 q=soc.ram.ram[41][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94282 q=soc.ram.ram[41][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94284 q=soc.ram.ram[41][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94286 q=soc.ram.ram[41][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94288 q=soc.ram.ram[41][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94290 q=soc.ram.ram[41][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94292 q=soc.ram.ram[90][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94294 q=soc.ram.ram[90][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94296 q=soc.ram.ram[90][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94298 q=soc.ram.ram[90][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94300 q=soc.ram.ram[90][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94302 q=soc.ram.ram[90][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94304 q=soc.ram.ram[90][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94306 q=soc.ram.ram[90][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94308 q=soc.ram.ram[41][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94310 q=soc.ram.ram[41][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94312 q=soc.ram.ram[41][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94314 q=soc.ram.ram[41][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94316 q=soc.ram.ram[41][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94318 q=soc.ram.ram[41][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94320 q=soc.ram.ram[41][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94322 q=soc.ram.ram[41][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94324 q=soc.ram.ram[12][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94326 q=soc.ram.ram[12][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94328 q=soc.ram.ram[12][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94330 q=soc.ram.ram[12][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94332 q=soc.ram.ram[12][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94334 q=soc.ram.ram[12][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94336 q=soc.ram.ram[12][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94338 q=soc.ram.ram[12][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94340 q=soc.ram.ram[103][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94342 q=soc.ram.ram[103][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94344 q=soc.ram.ram[103][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94346 q=soc.ram.ram[103][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94348 q=soc.ram.ram[103][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94350 q=soc.ram.ram[103][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94352 q=soc.ram.ram[103][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94354 q=soc.ram.ram[103][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94356 q=soc.ram.ram[44][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94358 q=soc.ram.ram[44][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94360 q=soc.ram.ram[44][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94362 q=soc.ram.ram[44][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94364 q=soc.ram.ram[44][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94366 q=soc.ram.ram[44][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94368 q=soc.ram.ram[44][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94370 q=soc.ram.ram[44][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94372 q=soc.ram.ram[0][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94374 q=soc.ram.ram[0][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94376 q=soc.ram.ram[0][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94378 q=soc.ram.ram[0][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94380 q=soc.ram.ram[0][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94382 q=soc.ram.ram[0][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94384 q=soc.ram.ram[0][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94386 q=soc.ram.ram[0][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94388 q=soc.ram.ram[98][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94390 q=soc.ram.ram[98][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94392 q=soc.ram.ram[98][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94394 q=soc.ram.ram[98][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94396 q=soc.ram.ram[98][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94398 q=soc.ram.ram[98][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94400 q=soc.ram.ram[98][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94402 q=soc.ram.ram[98][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94404 q=soc.ram.ram[44][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94406 q=soc.ram.ram[44][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94408 q=soc.ram.ram[44][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94410 q=soc.ram.ram[44][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94412 q=soc.ram.ram[44][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94414 q=soc.ram.ram[44][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94416 q=soc.ram.ram[44][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94418 q=soc.ram.ram[44][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94420 q=soc.ram.ram[44][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94422 q=soc.ram.ram[44][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94424 q=soc.ram.ram[44][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94426 q=soc.ram.ram[44][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94428 q=soc.ram.ram[44][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94430 q=soc.ram.ram[44][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94432 q=soc.ram.ram[44][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94434 q=soc.ram.ram[44][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94436 q=soc.ram.ram[97][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94438 q=soc.ram.ram[97][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94440 q=soc.ram.ram[97][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94442 q=soc.ram.ram[97][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94444 q=soc.ram.ram[97][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94446 q=soc.ram.ram[97][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94448 q=soc.ram.ram[97][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94450 q=soc.ram.ram[97][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94452 q=soc.ram.ram[43][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94454 q=soc.ram.ram[43][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94456 q=soc.ram.ram[43][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94458 q=soc.ram.ram[43][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94460 q=soc.ram.ram[43][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94462 q=soc.ram.ram[43][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94464 q=soc.ram.ram[43][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94466 q=soc.ram.ram[43][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94468 q=soc.ram.ram[96][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94470 q=soc.ram.ram[96][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94472 q=soc.ram.ram[96][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94474 q=soc.ram.ram[96][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94476 q=soc.ram.ram[96][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94478 q=soc.ram.ram[96][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94480 q=soc.ram.ram[96][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94482 q=soc.ram.ram[96][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94484 q=soc.ram.ram[43][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94486 q=soc.ram.ram[43][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94488 q=soc.ram.ram[43][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94490 q=soc.ram.ram[43][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94492 q=soc.ram.ram[43][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94494 q=soc.ram.ram[43][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94496 q=soc.ram.ram[43][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94498 q=soc.ram.ram[43][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94500 q=soc.ram.ram[95][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94502 q=soc.ram.ram[95][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94504 q=soc.ram.ram[95][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94506 q=soc.ram.ram[95][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94508 q=soc.ram.ram[95][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94510 q=soc.ram.ram[95][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94512 q=soc.ram.ram[95][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94514 q=soc.ram.ram[95][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94516 q=soc.ram.ram[43][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94518 q=soc.ram.ram[43][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94520 q=soc.ram.ram[43][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94522 q=soc.ram.ram[43][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94524 q=soc.ram.ram[43][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94526 q=soc.ram.ram[43][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94528 q=soc.ram.ram[43][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94530 q=soc.ram.ram[43][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94532 q=soc.ram.ram[94][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94534 q=soc.ram.ram[94][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94536 q=soc.ram.ram[94][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94538 q=soc.ram.ram[94][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94540 q=soc.ram.ram[94][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94542 q=soc.ram.ram[94][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94544 q=soc.ram.ram[94][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94546 q=soc.ram.ram[94][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94548 q=soc.ram.ram[42][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94550 q=soc.ram.ram[42][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94552 q=soc.ram.ram[42][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94554 q=soc.ram.ram[42][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94556 q=soc.ram.ram[42][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94558 q=soc.ram.ram[42][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94560 q=soc.ram.ram[42][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94562 q=soc.ram.ram[42][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94564 q=soc.ram.ram[93][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94566 q=soc.ram.ram[93][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94568 q=soc.ram.ram[93][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94570 q=soc.ram.ram[93][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94572 q=soc.ram.ram[93][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94574 q=soc.ram.ram[93][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94576 q=soc.ram.ram[93][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94578 q=soc.ram.ram[93][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94582 q=soc.cpu.minerva.payload__pc$71[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94586 q=soc.cpu.minerva.payload__pc$71[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94590 q=soc.cpu.minerva.payload__pc$71[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94594 q=soc.cpu.minerva.payload__pc$71[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94598 q=soc.cpu.minerva.payload__pc$71[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94602 q=soc.cpu.minerva.payload__pc$71[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94606 q=soc.cpu.minerva.payload__pc$71[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94610 q=soc.cpu.minerva.payload__pc$71[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94614 q=soc.cpu.minerva.payload__pc$71[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94618 q=soc.cpu.minerva.payload__pc$71[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94622 q=soc.cpu.minerva.payload__pc$71[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94626 q=soc.cpu.minerva.payload__pc$71[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94630 q=soc.cpu.minerva.payload__pc$71[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94634 q=soc.cpu.minerva.payload__pc$71[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94638 q=soc.cpu.minerva.payload__pc$71[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94642 q=soc.cpu.minerva.payload__pc$71[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94646 q=soc.cpu.minerva.payload__pc$71[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94650 q=soc.cpu.minerva.payload__pc$71[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94654 q=soc.cpu.minerva.payload__pc$71[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94658 q=soc.cpu.minerva.payload__pc$71[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94662 q=soc.cpu.minerva.payload__pc$71[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94666 q=soc.cpu.minerva.payload__pc$71[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94670 q=soc.cpu.minerva.payload__pc$71[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94674 q=soc.cpu.minerva.payload__pc$71[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94678 q=soc.cpu.minerva.payload__pc$71[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94682 q=soc.cpu.minerva.payload__pc$71[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94686 q=soc.cpu.minerva.payload__pc$71[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94690 q=soc.cpu.minerva.payload__pc$71[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94694 q=soc.cpu.minerva.payload__pc$71[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94698 q=soc.cpu.minerva.payload__pc$71[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94700 q=soc.cpu.minerva.gprf.mem._mem[12][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94702 q=soc.cpu.minerva.gprf.mem._mem[12][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94704 q=soc.cpu.minerva.gprf.mem._mem[12][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94706 q=soc.cpu.minerva.gprf.mem._mem[12][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94708 q=soc.cpu.minerva.gprf.mem._mem[12][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94710 q=soc.cpu.minerva.gprf.mem._mem[12][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94712 q=soc.cpu.minerva.gprf.mem._mem[12][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94714 q=soc.cpu.minerva.gprf.mem._mem[12][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94716 q=soc.cpu.minerva.gprf.mem._mem[12][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94718 q=soc.cpu.minerva.gprf.mem._mem[12][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94720 q=soc.cpu.minerva.gprf.mem._mem[12][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94722 q=soc.cpu.minerva.gprf.mem._mem[12][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94724 q=soc.cpu.minerva.gprf.mem._mem[12][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94726 q=soc.cpu.minerva.gprf.mem._mem[12][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94728 q=soc.cpu.minerva.gprf.mem._mem[12][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94730 q=soc.cpu.minerva.gprf.mem._mem[12][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94732 q=soc.cpu.minerva.gprf.mem._mem[12][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94734 q=soc.cpu.minerva.gprf.mem._mem[12][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94736 q=soc.cpu.minerva.gprf.mem._mem[12][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94738 q=soc.cpu.minerva.gprf.mem._mem[12][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94740 q=soc.cpu.minerva.gprf.mem._mem[12][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94742 q=soc.cpu.minerva.gprf.mem._mem[12][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94744 q=soc.cpu.minerva.gprf.mem._mem[12][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94746 q=soc.cpu.minerva.gprf.mem._mem[12][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94748 q=soc.cpu.minerva.gprf.mem._mem[12][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94750 q=soc.cpu.minerva.gprf.mem._mem[12][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94752 q=soc.cpu.minerva.gprf.mem._mem[12][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94754 q=soc.cpu.minerva.gprf.mem._mem[12][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94756 q=soc.cpu.minerva.gprf.mem._mem[12][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94758 q=soc.cpu.minerva.gprf.mem._mem[12][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94760 q=soc.cpu.minerva.gprf.mem._mem[12][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94762 q=soc.cpu.minerva.gprf.mem._mem[12][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94764 q=soc.ram.ram[13][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94766 q=soc.ram.ram[13][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94768 q=soc.ram.ram[13][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94770 q=soc.ram.ram[13][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94772 q=soc.ram.ram[13][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94774 q=soc.ram.ram[13][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94776 q=soc.ram.ram[13][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94778 q=soc.ram.ram[13][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94780 q=soc.ram.ram[102][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94782 q=soc.ram.ram[102][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94784 q=soc.ram.ram[102][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94786 q=soc.ram.ram[102][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94788 q=soc.ram.ram[102][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94790 q=soc.ram.ram[102][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94792 q=soc.ram.ram[102][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94794 q=soc.ram.ram[102][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94796 q=soc.cpu.minerva.gprf.mem._mem[11][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94798 q=soc.cpu.minerva.gprf.mem._mem[11][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94800 q=soc.cpu.minerva.gprf.mem._mem[11][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94802 q=soc.cpu.minerva.gprf.mem._mem[11][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94804 q=soc.cpu.minerva.gprf.mem._mem[11][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94806 q=soc.cpu.minerva.gprf.mem._mem[11][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94808 q=soc.cpu.minerva.gprf.mem._mem[11][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94810 q=soc.cpu.minerva.gprf.mem._mem[11][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94812 q=soc.cpu.minerva.gprf.mem._mem[11][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94814 q=soc.cpu.minerva.gprf.mem._mem[11][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94816 q=soc.cpu.minerva.gprf.mem._mem[11][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94818 q=soc.cpu.minerva.gprf.mem._mem[11][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94820 q=soc.cpu.minerva.gprf.mem._mem[11][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94822 q=soc.cpu.minerva.gprf.mem._mem[11][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94824 q=soc.cpu.minerva.gprf.mem._mem[11][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94826 q=soc.cpu.minerva.gprf.mem._mem[11][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94828 q=soc.cpu.minerva.gprf.mem._mem[11][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94830 q=soc.cpu.minerva.gprf.mem._mem[11][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94832 q=soc.cpu.minerva.gprf.mem._mem[11][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94834 q=soc.cpu.minerva.gprf.mem._mem[11][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94836 q=soc.cpu.minerva.gprf.mem._mem[11][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94838 q=soc.cpu.minerva.gprf.mem._mem[11][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94840 q=soc.cpu.minerva.gprf.mem._mem[11][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94842 q=soc.cpu.minerva.gprf.mem._mem[11][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94844 q=soc.cpu.minerva.gprf.mem._mem[11][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94846 q=soc.cpu.minerva.gprf.mem._mem[11][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94848 q=soc.cpu.minerva.gprf.mem._mem[11][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94850 q=soc.cpu.minerva.gprf.mem._mem[11][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94852 q=soc.cpu.minerva.gprf.mem._mem[11][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94854 q=soc.cpu.minerva.gprf.mem._mem[11][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94856 q=soc.cpu.minerva.gprf.mem._mem[11][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94858 q=soc.cpu.minerva.gprf.mem._mem[11][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94860 q=soc.cpu.minerva.gprf.mem._mem[18][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94862 q=soc.cpu.minerva.gprf.mem._mem[18][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94864 q=soc.cpu.minerva.gprf.mem._mem[18][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94866 q=soc.cpu.minerva.gprf.mem._mem[18][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94868 q=soc.cpu.minerva.gprf.mem._mem[18][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94870 q=soc.cpu.minerva.gprf.mem._mem[18][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94872 q=soc.cpu.minerva.gprf.mem._mem[18][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94874 q=soc.cpu.minerva.gprf.mem._mem[18][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94876 q=soc.cpu.minerva.gprf.mem._mem[18][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94878 q=soc.cpu.minerva.gprf.mem._mem[18][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94880 q=soc.cpu.minerva.gprf.mem._mem[18][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94882 q=soc.cpu.minerva.gprf.mem._mem[18][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94884 q=soc.cpu.minerva.gprf.mem._mem[18][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94886 q=soc.cpu.minerva.gprf.mem._mem[18][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94888 q=soc.cpu.minerva.gprf.mem._mem[18][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94890 q=soc.cpu.minerva.gprf.mem._mem[18][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94892 q=soc.cpu.minerva.gprf.mem._mem[18][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94894 q=soc.cpu.minerva.gprf.mem._mem[18][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94896 q=soc.cpu.minerva.gprf.mem._mem[18][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94898 q=soc.cpu.minerva.gprf.mem._mem[18][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94900 q=soc.cpu.minerva.gprf.mem._mem[18][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94902 q=soc.cpu.minerva.gprf.mem._mem[18][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94904 q=soc.cpu.minerva.gprf.mem._mem[18][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94906 q=soc.cpu.minerva.gprf.mem._mem[18][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94908 q=soc.cpu.minerva.gprf.mem._mem[18][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94910 q=soc.cpu.minerva.gprf.mem._mem[18][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94912 q=soc.cpu.minerva.gprf.mem._mem[18][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94914 q=soc.cpu.minerva.gprf.mem._mem[18][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94916 q=soc.cpu.minerva.gprf.mem._mem[18][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94918 q=soc.cpu.minerva.gprf.mem._mem[18][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94920 q=soc.cpu.minerva.gprf.mem._mem[18][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94922 q=soc.cpu.minerva.gprf.mem._mem[18][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94926 q=soc.rom.spimemio.din_tag[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94930 q=soc.rom.spimemio.din_tag[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94934 q=soc.rom.spimemio.din_tag[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94936 q=soc.ram.ram[46][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94938 q=soc.ram.ram[46][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94940 q=soc.ram.ram[46][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94942 q=soc.ram.ram[46][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94944 q=soc.ram.ram[46][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94946 q=soc.ram.ram[46][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94948 q=soc.ram.ram[46][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94950 q=soc.ram.ram[46][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94952 q=soc.ram.ram[29][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94954 q=soc.ram.ram[29][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94956 q=soc.ram.ram[29][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94958 q=soc.ram.ram[29][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94960 q=soc.ram.ram[29][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94962 q=soc.ram.ram[29][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94964 q=soc.ram.ram[29][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94966 q=soc.ram.ram[29][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94968 q=soc.ram.ram[47][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94970 q=soc.ram.ram[47][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94972 q=soc.ram.ram[47][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94974 q=soc.ram.ram[47][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94976 q=soc.ram.ram[47][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94978 q=soc.ram.ram[47][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94980 q=soc.ram.ram[47][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94982 q=soc.ram.ram[47][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94984 q=soc.ram.ram[29][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94986 q=soc.ram.ram[29][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94988 q=soc.ram.ram[29][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94990 q=soc.ram.ram[29][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94992 q=soc.ram.ram[29][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94994 q=soc.ram.ram[29][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94996 q=soc.ram.ram[29][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$94998 q=soc.ram.ram[29][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95000 q=soc.ram.ram[48][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95002 q=soc.ram.ram[48][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95004 q=soc.ram.ram[48][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95006 q=soc.ram.ram[48][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95008 q=soc.ram.ram[48][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95010 q=soc.ram.ram[48][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95012 q=soc.ram.ram[48][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95014 q=soc.ram.ram[48][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95016 q=soc.ram.ram[29][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95018 q=soc.ram.ram[29][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95020 q=soc.ram.ram[29][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95022 q=soc.ram.ram[29][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95024 q=soc.ram.ram[29][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95026 q=soc.ram.ram[29][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95028 q=soc.ram.ram[29][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95030 q=soc.ram.ram[29][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95032 q=soc.ram.ram[4][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95034 q=soc.ram.ram[4][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95036 q=soc.ram.ram[4][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95038 q=soc.ram.ram[4][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95040 q=soc.ram.ram[4][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95042 q=soc.ram.ram[4][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95044 q=soc.ram.ram[4][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95046 q=soc.ram.ram[4][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95048 q=soc.ram.ram[2][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95050 q=soc.ram.ram[2][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95052 q=soc.ram.ram[2][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95054 q=soc.ram.ram[2][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95056 q=soc.ram.ram[2][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95058 q=soc.ram.ram[2][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95060 q=soc.ram.ram[2][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95062 q=soc.ram.ram[2][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95064 q=soc.ram.ram[50][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95066 q=soc.ram.ram[50][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95068 q=soc.ram.ram[50][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95070 q=soc.ram.ram[50][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95072 q=soc.ram.ram[50][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95074 q=soc.ram.ram[50][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95076 q=soc.ram.ram[50][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95078 q=soc.ram.ram[50][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95080 q=soc.ram.ram[2][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95082 q=soc.ram.ram[2][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95084 q=soc.ram.ram[2][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95086 q=soc.ram.ram[2][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95088 q=soc.ram.ram[2][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95090 q=soc.ram.ram[2][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95092 q=soc.ram.ram[2][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95094 q=soc.ram.ram[2][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95096 q=soc.ram.ram[51][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95098 q=soc.ram.ram[51][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95100 q=soc.ram.ram[51][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95102 q=soc.ram.ram[51][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95104 q=soc.ram.ram[51][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95106 q=soc.ram.ram[51][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95108 q=soc.ram.ram[51][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95110 q=soc.ram.ram[51][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95112 q=soc.ram.ram[2][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95114 q=soc.ram.ram[2][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95116 q=soc.ram.ram[2][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95118 q=soc.ram.ram[2][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95120 q=soc.ram.ram[2][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95122 q=soc.ram.ram[2][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95124 q=soc.ram.ram[2][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95126 q=soc.ram.ram[2][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95128 q=soc.ram.ram[52][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95130 q=soc.ram.ram[52][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95132 q=soc.ram.ram[52][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95134 q=soc.ram.ram[52][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95136 q=soc.ram.ram[52][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95138 q=soc.ram.ram[52][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95140 q=soc.ram.ram[52][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95142 q=soc.ram.ram[52][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95144 q=soc.ram.ram[30][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95146 q=soc.ram.ram[30][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95148 q=soc.ram.ram[30][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95150 q=soc.ram.ram[30][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95152 q=soc.ram.ram[30][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95154 q=soc.ram.ram[30][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95156 q=soc.ram.ram[30][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95158 q=soc.ram.ram[30][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95160 q=soc.ram.ram[53][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95162 q=soc.ram.ram[53][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95164 q=soc.ram.ram[53][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95166 q=soc.ram.ram[53][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95168 q=soc.ram.ram[53][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95170 q=soc.ram.ram[53][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95172 q=soc.ram.ram[53][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95174 q=soc.ram.ram[53][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95176 q=soc.ram.ram[91][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95178 q=soc.ram.ram[91][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95180 q=soc.ram.ram[91][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95182 q=soc.ram.ram[91][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95184 q=soc.ram.ram[91][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95186 q=soc.ram.ram[91][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95188 q=soc.ram.ram[91][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95190 q=soc.ram.ram[91][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95192 q=soc.ram.ram[30][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95194 q=soc.ram.ram[30][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95196 q=soc.ram.ram[30][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95198 q=soc.ram.ram[30][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95200 q=soc.ram.ram[30][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95202 q=soc.ram.ram[30][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95204 q=soc.ram.ram[30][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95206 q=soc.ram.ram[30][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95208 q=soc.ram.ram[54][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95210 q=soc.ram.ram[54][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95212 q=soc.ram.ram[54][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95214 q=soc.ram.ram[54][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95216 q=soc.ram.ram[54][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95218 q=soc.ram.ram[54][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95220 q=soc.ram.ram[54][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95222 q=soc.ram.ram[54][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95224 q=soc.ram.ram[30][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95226 q=soc.ram.ram[30][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95228 q=soc.ram.ram[30][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95230 q=soc.ram.ram[30][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95232 q=soc.ram.ram[30][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95234 q=soc.ram.ram[30][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95236 q=soc.ram.ram[30][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95238 q=soc.ram.ram[30][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95240 q=soc.ram.ram[55][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95242 q=soc.ram.ram[55][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95244 q=soc.ram.ram[55][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95246 q=soc.ram.ram[55][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95248 q=soc.ram.ram[55][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95250 q=soc.ram.ram[55][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95252 q=soc.ram.ram[55][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95254 q=soc.ram.ram[55][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95256 q=soc.ram.ram[31][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95258 q=soc.ram.ram[31][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95260 q=soc.ram.ram[31][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95262 q=soc.ram.ram[31][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95264 q=soc.ram.ram[31][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95266 q=soc.ram.ram[31][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95268 q=soc.ram.ram[31][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95270 q=soc.ram.ram[31][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95272 q=soc.ram.ram[56][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95274 q=soc.ram.ram[56][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95276 q=soc.ram.ram[56][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95278 q=soc.ram.ram[56][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95280 q=soc.ram.ram[56][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95282 q=soc.ram.ram[56][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95284 q=soc.ram.ram[56][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95286 q=soc.ram.ram[56][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95288 q=soc.ram.ram[31][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95290 q=soc.ram.ram[31][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95292 q=soc.ram.ram[31][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95294 q=soc.ram.ram[31][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95296 q=soc.ram.ram[31][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95298 q=soc.ram.ram[31][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95300 q=soc.ram.ram[31][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95302 q=soc.ram.ram[31][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95304 q=soc.ram.ram[57][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95306 q=soc.ram.ram[57][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95308 q=soc.ram.ram[57][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95310 q=soc.ram.ram[57][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95312 q=soc.ram.ram[57][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95314 q=soc.ram.ram[57][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95316 q=soc.ram.ram[57][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95318 q=soc.ram.ram[57][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95320 q=soc.ram.ram[31][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95322 q=soc.ram.ram[31][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95324 q=soc.ram.ram[31][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95326 q=soc.ram.ram[31][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95328 q=soc.ram.ram[31][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95330 q=soc.ram.ram[31][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95332 q=soc.ram.ram[31][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95334 q=soc.ram.ram[31][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95336 q=soc.ram.ram[58][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95338 q=soc.ram.ram[58][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95340 q=soc.ram.ram[58][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95342 q=soc.ram.ram[58][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95344 q=soc.ram.ram[58][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95346 q=soc.ram.ram[58][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95348 q=soc.ram.ram[58][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95350 q=soc.ram.ram[58][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95352 q=soc.ram.ram[32][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95354 q=soc.ram.ram[32][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95356 q=soc.ram.ram[32][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95358 q=soc.ram.ram[32][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95360 q=soc.ram.ram[32][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95362 q=soc.ram.ram[32][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95364 q=soc.ram.ram[32][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95366 q=soc.ram.ram[32][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95368 q=soc.ram.ram[5][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95370 q=soc.ram.ram[5][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95372 q=soc.ram.ram[5][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95374 q=soc.ram.ram[5][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95376 q=soc.ram.ram[5][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95378 q=soc.ram.ram[5][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95380 q=soc.ram.ram[5][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95382 q=soc.ram.ram[5][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95384 q=soc.ram.ram[92][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95386 q=soc.ram.ram[92][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95388 q=soc.ram.ram[92][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95390 q=soc.ram.ram[92][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95392 q=soc.ram.ram[92][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95394 q=soc.ram.ram[92][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95396 q=soc.ram.ram[92][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95398 q=soc.ram.ram[92][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95400 q=soc.ram.ram[109][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95402 q=soc.ram.ram[109][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95404 q=soc.ram.ram[109][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95406 q=soc.ram.ram[109][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95408 q=soc.ram.ram[109][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95410 q=soc.ram.ram[109][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95412 q=soc.ram.ram[109][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95414 q=soc.ram.ram[109][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95416 q=soc.ram.ram[22][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95418 q=soc.ram.ram[22][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95420 q=soc.ram.ram[22][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95422 q=soc.ram.ram[22][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95424 q=soc.ram.ram[22][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95426 q=soc.ram.ram[22][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95428 q=soc.ram.ram[22][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95430 q=soc.ram.ram[22][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95432 q=soc.ram.ram[28][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95434 q=soc.ram.ram[28][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95436 q=soc.ram.ram[28][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95438 q=soc.ram.ram[28][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95440 q=soc.ram.ram[28][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95442 q=soc.ram.ram[28][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95444 q=soc.ram.ram[28][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95446 q=soc.ram.ram[28][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95448 q=soc.ram.ram[89][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95450 q=soc.ram.ram[89][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95452 q=soc.ram.ram[89][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95454 q=soc.ram.ram[89][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95456 q=soc.ram.ram[89][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95458 q=soc.ram.ram[89][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95460 q=soc.ram.ram[89][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95462 q=soc.ram.ram[89][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95464 q=soc.ram.ram[25][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95466 q=soc.ram.ram[25][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95468 q=soc.ram.ram[25][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95470 q=soc.ram.ram[25][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95472 q=soc.ram.ram[25][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95474 q=soc.ram.ram[25][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95476 q=soc.ram.ram[25][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95478 q=soc.ram.ram[25][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95480 q=soc.ram.ram[17][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95482 q=soc.ram.ram[17][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95484 q=soc.ram.ram[17][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95486 q=soc.ram.ram[17][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95488 q=soc.ram.ram[17][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95490 q=soc.ram.ram[17][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95492 q=soc.ram.ram[17][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95494 q=soc.ram.ram[17][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95496 q=soc.ram.ram[105][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95498 q=soc.ram.ram[105][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95500 q=soc.ram.ram[105][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95502 q=soc.ram.ram[105][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95504 q=soc.ram.ram[105][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95506 q=soc.ram.ram[105][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95508 q=soc.ram.ram[105][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95510 q=soc.ram.ram[105][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95512 q=soc.ram.ram[17][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95514 q=soc.ram.ram[17][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95516 q=soc.ram.ram[17][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95518 q=soc.ram.ram[17][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95520 q=soc.ram.ram[17][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95522 q=soc.ram.ram[17][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95524 q=soc.ram.ram[17][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95526 q=soc.ram.ram[17][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95528 q=soc.cpu.minerva.gprf.mem._mem[10][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95530 q=soc.cpu.minerva.gprf.mem._mem[10][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95532 q=soc.cpu.minerva.gprf.mem._mem[10][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95534 q=soc.cpu.minerva.gprf.mem._mem[10][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95536 q=soc.cpu.minerva.gprf.mem._mem[10][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95538 q=soc.cpu.minerva.gprf.mem._mem[10][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95540 q=soc.cpu.minerva.gprf.mem._mem[10][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95542 q=soc.cpu.minerva.gprf.mem._mem[10][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95544 q=soc.cpu.minerva.gprf.mem._mem[10][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95546 q=soc.cpu.minerva.gprf.mem._mem[10][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95548 q=soc.cpu.minerva.gprf.mem._mem[10][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95550 q=soc.cpu.minerva.gprf.mem._mem[10][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95552 q=soc.cpu.minerva.gprf.mem._mem[10][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95554 q=soc.cpu.minerva.gprf.mem._mem[10][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95556 q=soc.cpu.minerva.gprf.mem._mem[10][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95558 q=soc.cpu.minerva.gprf.mem._mem[10][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95560 q=soc.cpu.minerva.gprf.mem._mem[10][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95562 q=soc.cpu.minerva.gprf.mem._mem[10][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95564 q=soc.cpu.minerva.gprf.mem._mem[10][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95566 q=soc.cpu.minerva.gprf.mem._mem[10][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95568 q=soc.cpu.minerva.gprf.mem._mem[10][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95570 q=soc.cpu.minerva.gprf.mem._mem[10][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95572 q=soc.cpu.minerva.gprf.mem._mem[10][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95574 q=soc.cpu.minerva.gprf.mem._mem[10][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95576 q=soc.cpu.minerva.gprf.mem._mem[10][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95578 q=soc.cpu.minerva.gprf.mem._mem[10][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95580 q=soc.cpu.minerva.gprf.mem._mem[10][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95582 q=soc.cpu.minerva.gprf.mem._mem[10][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95584 q=soc.cpu.minerva.gprf.mem._mem[10][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95586 q=soc.cpu.minerva.gprf.mem._mem[10][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95588 q=soc.cpu.minerva.gprf.mem._mem[10][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95590 q=soc.cpu.minerva.gprf.mem._mem[10][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95592 q=soc.ram.ram[25][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95594 q=soc.ram.ram[25][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95596 q=soc.ram.ram[25][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95598 q=soc.ram.ram[25][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95600 q=soc.ram.ram[25][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95602 q=soc.ram.ram[25][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95604 q=soc.ram.ram[25][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95606 q=soc.ram.ram[25][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95608 q=soc.ram.ram[17][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95610 q=soc.ram.ram[17][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95612 q=soc.ram.ram[17][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95614 q=soc.ram.ram[17][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95616 q=soc.ram.ram[17][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95618 q=soc.ram.ram[17][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95620 q=soc.ram.ram[17][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95622 q=soc.ram.ram[17][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95626 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95630 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95634 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95638 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95642 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95646 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95650 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95654 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95658 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95662 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95666 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95670 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95674 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95678 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95682 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95686 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95688 q=soc.ram.ram[102][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95690 q=soc.ram.ram[102][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95692 q=soc.ram.ram[102][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95694 q=soc.ram.ram[102][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95696 q=soc.ram.ram[102][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95698 q=soc.ram.ram[102][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95700 q=soc.ram.ram[102][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95702 q=soc.ram.ram[102][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95706 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95710 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95714 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95718 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95722 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95726 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95730 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95734 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95736 q=soc.ram.ram[16][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95738 q=soc.ram.ram[16][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95740 q=soc.ram.ram[16][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95742 q=soc.ram.ram[16][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95744 q=soc.ram.ram[16][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95746 q=soc.ram.ram[16][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95748 q=soc.ram.ram[16][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95750 q=soc.ram.ram[16][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95752 q=soc.ram.ram[23][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95754 q=soc.ram.ram[23][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95756 q=soc.ram.ram[23][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95758 q=soc.ram.ram[23][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95760 q=soc.ram.ram[23][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95762 q=soc.ram.ram[23][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95764 q=soc.ram.ram[23][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95766 q=soc.ram.ram[23][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95768 q=soc.ram.ram[125][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95770 q=soc.ram.ram[125][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95772 q=soc.ram.ram[125][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95774 q=soc.ram.ram[125][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95776 q=soc.ram.ram[125][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95778 q=soc.ram.ram[125][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95780 q=soc.ram.ram[125][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95782 q=soc.ram.ram[125][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95784 q=soc.ram.ram[125][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95786 q=soc.ram.ram[125][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95788 q=soc.ram.ram[125][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95790 q=soc.ram.ram[125][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95792 q=soc.ram.ram[125][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95794 q=soc.ram.ram[125][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95796 q=soc.ram.ram[125][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95798 q=soc.ram.ram[125][15]
+.subckt dff_x1 clk=io_in[0] i=soc.rom.spimemio.xfer.xfer_tag[0] q=soc.rom.spimemio.dout_tag[0]
+.subckt dff_x1 clk=io_in[0] i=soc.rom.spimemio.xfer.xfer_tag[1] q=soc.rom.spimemio.dout_tag[1]
+.subckt dff_x1 clk=io_in[0] i=soc.rom.spimemio.xfer.xfer_tag[2] q=soc.rom.spimemio.dout_tag[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95800 q=soc.ram.ram[83][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95802 q=soc.ram.ram[83][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95804 q=soc.ram.ram[83][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95806 q=soc.ram.ram[83][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95808 q=soc.ram.ram[83][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95810 q=soc.ram.ram[83][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95812 q=soc.ram.ram[83][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95814 q=soc.ram.ram[83][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95816 q=soc.ram.ram[83][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95818 q=soc.ram.ram[83][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95820 q=soc.ram.ram[83][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95822 q=soc.ram.ram[83][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95824 q=soc.ram.ram[83][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95826 q=soc.ram.ram[83][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95828 q=soc.ram.ram[83][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95830 q=soc.ram.ram[83][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95832 q=soc.ram.ram[84][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95834 q=soc.ram.ram[84][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95836 q=soc.ram.ram[84][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95838 q=soc.ram.ram[84][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95840 q=soc.ram.ram[84][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95842 q=soc.ram.ram[84][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95844 q=soc.ram.ram[84][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95846 q=soc.ram.ram[84][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95848 q=soc.ram.ram[84][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95850 q=soc.ram.ram[84][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95852 q=soc.ram.ram[84][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95854 q=soc.ram.ram[84][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95856 q=soc.ram.ram[84][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95858 q=soc.ram.ram[84][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95860 q=soc.ram.ram[84][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95862 q=soc.ram.ram[84][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95864 q=soc.ram.ram[84][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95866 q=soc.ram.ram[84][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95868 q=soc.ram.ram[84][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95870 q=soc.ram.ram[84][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95872 q=soc.ram.ram[84][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95874 q=soc.ram.ram[84][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95876 q=soc.ram.ram[84][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95878 q=soc.ram.ram[84][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95880 q=soc.ram.ram[85][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95882 q=soc.ram.ram[85][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95884 q=soc.ram.ram[85][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95886 q=soc.ram.ram[85][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95888 q=soc.ram.ram[85][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95890 q=soc.ram.ram[85][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95892 q=soc.ram.ram[85][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95894 q=soc.ram.ram[85][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95896 q=soc.ram.ram[85][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95898 q=soc.ram.ram[85][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95900 q=soc.ram.ram[85][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95902 q=soc.ram.ram[85][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95904 q=soc.ram.ram[85][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95906 q=soc.ram.ram[85][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95908 q=soc.ram.ram[85][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95910 q=soc.ram.ram[85][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95912 q=soc.ram.ram[85][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95914 q=soc.ram.ram[85][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95916 q=soc.ram.ram[85][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95918 q=soc.ram.ram[85][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95920 q=soc.ram.ram[85][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95922 q=soc.ram.ram[85][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95924 q=soc.ram.ram[85][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95926 q=soc.ram.ram[85][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95928 q=soc.ram.ram[86][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95930 q=soc.ram.ram[86][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95932 q=soc.ram.ram[86][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95934 q=soc.ram.ram[86][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95936 q=soc.ram.ram[86][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95938 q=soc.ram.ram[86][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95940 q=soc.ram.ram[86][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95942 q=soc.ram.ram[86][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95944 q=soc.ram.ram[86][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95946 q=soc.ram.ram[86][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95948 q=soc.ram.ram[86][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95950 q=soc.ram.ram[86][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95952 q=soc.ram.ram[86][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95954 q=soc.ram.ram[86][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95956 q=soc.ram.ram[86][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95958 q=soc.ram.ram[86][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95960 q=soc.ram.ram[86][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95962 q=soc.ram.ram[86][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95964 q=soc.ram.ram[86][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95966 q=soc.ram.ram[86][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95968 q=soc.ram.ram[86][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95970 q=soc.ram.ram[86][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95972 q=soc.ram.ram[86][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95974 q=soc.ram.ram[86][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95976 q=soc.ram.ram[87][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95978 q=soc.ram.ram[87][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95980 q=soc.ram.ram[87][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95982 q=soc.ram.ram[87][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95984 q=soc.ram.ram[87][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95986 q=soc.ram.ram[87][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95988 q=soc.ram.ram[87][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95990 q=soc.ram.ram[87][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95992 q=soc.ram.ram[87][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95994 q=soc.ram.ram[87][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95996 q=soc.ram.ram[87][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$95998 q=soc.ram.ram[87][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96000 q=soc.ram.ram[87][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96002 q=soc.ram.ram[87][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96004 q=soc.ram.ram[87][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96006 q=soc.ram.ram[87][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96008 q=soc.ram.ram[87][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96010 q=soc.ram.ram[87][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96012 q=soc.ram.ram[87][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96014 q=soc.ram.ram[87][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96016 q=soc.ram.ram[87][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96018 q=soc.ram.ram[87][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96020 q=soc.ram.ram[87][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96022 q=soc.ram.ram[87][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96024 q=soc.ram.ram[88][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96026 q=soc.ram.ram[88][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96028 q=soc.ram.ram[88][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96030 q=soc.ram.ram[88][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96032 q=soc.ram.ram[88][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96034 q=soc.ram.ram[88][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96036 q=soc.ram.ram[88][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96038 q=soc.ram.ram[88][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96040 q=soc.ram.ram[88][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96042 q=soc.ram.ram[88][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96044 q=soc.ram.ram[88][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96046 q=soc.ram.ram[88][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96048 q=soc.ram.ram[88][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96050 q=soc.ram.ram[88][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96052 q=soc.ram.ram[88][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96054 q=soc.ram.ram[88][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96056 q=soc.ram.ram[88][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96058 q=soc.ram.ram[88][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96060 q=soc.ram.ram[88][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96062 q=soc.ram.ram[88][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96064 q=soc.ram.ram[88][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96066 q=soc.ram.ram[88][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96068 q=soc.ram.ram[88][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96070 q=soc.ram.ram[88][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96072 q=soc.ram.ram[89][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96074 q=soc.ram.ram[89][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96076 q=soc.ram.ram[89][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96078 q=soc.ram.ram[89][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96080 q=soc.ram.ram[89][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96082 q=soc.ram.ram[89][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96084 q=soc.ram.ram[89][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96086 q=soc.ram.ram[89][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96088 q=soc.ram.ram[89][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96090 q=soc.ram.ram[89][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96092 q=soc.ram.ram[89][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96094 q=soc.ram.ram[89][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96096 q=soc.ram.ram[89][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96098 q=soc.ram.ram[89][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96100 q=soc.ram.ram[89][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96102 q=soc.ram.ram[89][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96104 q=soc.ram.ram[89][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96106 q=soc.ram.ram[89][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96108 q=soc.ram.ram[89][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96110 q=soc.ram.ram[89][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96112 q=soc.ram.ram[89][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96114 q=soc.ram.ram[89][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96116 q=soc.ram.ram[89][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96118 q=soc.ram.ram[89][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96120 q=soc.ram.ram[8][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96122 q=soc.ram.ram[8][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96124 q=soc.ram.ram[8][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96126 q=soc.ram.ram[8][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96128 q=soc.ram.ram[8][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96130 q=soc.ram.ram[8][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96132 q=soc.ram.ram[8][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96134 q=soc.ram.ram[8][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96136 q=soc.ram.ram[8][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96138 q=soc.ram.ram[8][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96140 q=soc.ram.ram[8][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96142 q=soc.ram.ram[8][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96144 q=soc.ram.ram[8][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96146 q=soc.ram.ram[8][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96148 q=soc.ram.ram[8][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96150 q=soc.ram.ram[8][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96152 q=soc.ram.ram[8][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96154 q=soc.ram.ram[8][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96156 q=soc.ram.ram[8][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96158 q=soc.ram.ram[8][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96160 q=soc.ram.ram[8][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96162 q=soc.ram.ram[8][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96164 q=soc.ram.ram[8][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96166 q=soc.ram.ram[8][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96168 q=soc.ram.ram[90][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96170 q=soc.ram.ram[90][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96172 q=soc.ram.ram[90][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96174 q=soc.ram.ram[90][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96176 q=soc.ram.ram[90][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96178 q=soc.ram.ram[90][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96180 q=soc.ram.ram[90][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96182 q=soc.ram.ram[90][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96184 q=soc.ram.ram[90][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96186 q=soc.ram.ram[90][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96188 q=soc.ram.ram[90][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96190 q=soc.ram.ram[90][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96192 q=soc.ram.ram[90][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96194 q=soc.ram.ram[90][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96196 q=soc.ram.ram[90][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96198 q=soc.ram.ram[90][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96200 q=soc.ram.ram[90][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96202 q=soc.ram.ram[90][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96204 q=soc.ram.ram[90][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96206 q=soc.ram.ram[90][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96208 q=soc.ram.ram[90][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96210 q=soc.ram.ram[90][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96212 q=soc.ram.ram[90][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96214 q=soc.ram.ram[90][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96216 q=soc.ram.ram[91][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96218 q=soc.ram.ram[91][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96220 q=soc.ram.ram[91][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96222 q=soc.ram.ram[91][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96224 q=soc.ram.ram[91][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96226 q=soc.ram.ram[91][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96228 q=soc.ram.ram[91][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96230 q=soc.ram.ram[91][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96232 q=soc.ram.ram[91][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96234 q=soc.ram.ram[91][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96236 q=soc.ram.ram[91][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96238 q=soc.ram.ram[91][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96240 q=soc.ram.ram[91][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96242 q=soc.ram.ram[91][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96244 q=soc.ram.ram[91][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96246 q=soc.ram.ram[91][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96250 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96254 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96258 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96262 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96266 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96270 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96274 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96278 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96282 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96286 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96290 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96294 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96298 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96302 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96306 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96310 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96314 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96318 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96322 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96326 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96330 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96334 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96338 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96342 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96346 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96350 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96354 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96356 q=soc.ram.ram[100][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96358 q=soc.ram.ram[100][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96360 q=soc.ram.ram[100][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96362 q=soc.ram.ram[100][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96364 q=soc.ram.ram[100][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96366 q=soc.ram.ram[100][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96368 q=soc.ram.ram[100][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96370 q=soc.ram.ram[100][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96372 q=soc.ram.ram[27][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96374 q=soc.ram.ram[27][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96376 q=soc.ram.ram[27][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96378 q=soc.ram.ram[27][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96380 q=soc.ram.ram[27][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96382 q=soc.ram.ram[27][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96384 q=soc.ram.ram[27][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96386 q=soc.ram.ram[27][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96388 q=soc.ram.ram[32][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96390 q=soc.ram.ram[32][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96392 q=soc.ram.ram[32][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96394 q=soc.ram.ram[32][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96396 q=soc.ram.ram[32][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96398 q=soc.ram.ram[32][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96400 q=soc.ram.ram[32][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96402 q=soc.ram.ram[32][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96404 q=soc.ram.ram[15][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96406 q=soc.ram.ram[15][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96408 q=soc.ram.ram[15][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96410 q=soc.ram.ram[15][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96412 q=soc.ram.ram[15][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96414 q=soc.ram.ram[15][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96416 q=soc.ram.ram[15][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96418 q=soc.ram.ram[15][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96420 q=soc.ram.ram[22][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96422 q=soc.ram.ram[22][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96424 q=soc.ram.ram[22][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96426 q=soc.ram.ram[22][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96428 q=soc.ram.ram[22][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96430 q=soc.ram.ram[22][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96432 q=soc.ram.ram[22][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96434 q=soc.ram.ram[22][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96436 q=soc.ram.ram[27][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96438 q=soc.ram.ram[27][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96440 q=soc.ram.ram[27][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96442 q=soc.ram.ram[27][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96444 q=soc.ram.ram[27][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96446 q=soc.ram.ram[27][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96448 q=soc.ram.ram[27][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96450 q=soc.ram.ram[27][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96452 q=soc.ram.ram[40][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96454 q=soc.ram.ram[40][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96456 q=soc.ram.ram[40][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96458 q=soc.ram.ram[40][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96460 q=soc.ram.ram[40][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96462 q=soc.ram.ram[40][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96464 q=soc.ram.ram[40][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96466 q=soc.ram.ram[40][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96470 q=soc.rom.spimemio.xfer.count[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96474 q=soc.rom.spimemio.xfer.count[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96476 q=soc.ram.ram[26][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96478 q=soc.ram.ram[26][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96480 q=soc.ram.ram[26][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96482 q=soc.ram.ram[26][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96484 q=soc.ram.ram[26][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96486 q=soc.ram.ram[26][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96488 q=soc.ram.ram[26][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96490 q=soc.ram.ram[26][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96492 q=soc.ram.ram[24][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96494 q=soc.ram.ram[24][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96496 q=soc.ram.ram[24][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96498 q=soc.ram.ram[24][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96500 q=soc.ram.ram[24][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96502 q=soc.ram.ram[24][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96504 q=soc.ram.ram[24][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96506 q=soc.ram.ram[24][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96508 q=soc.ram.ram[39][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96510 q=soc.ram.ram[39][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96512 q=soc.ram.ram[39][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96514 q=soc.ram.ram[39][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96516 q=soc.ram.ram[39][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96518 q=soc.ram.ram[39][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96520 q=soc.ram.ram[39][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96522 q=soc.ram.ram[39][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96524 q=soc.ram.ram[3][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96526 q=soc.ram.ram[3][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96528 q=soc.ram.ram[3][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96530 q=soc.ram.ram[3][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96532 q=soc.ram.ram[3][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96534 q=soc.ram.ram[3][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96536 q=soc.ram.ram[3][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96538 q=soc.ram.ram[3][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96540 q=soc.ram.ram[26][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96542 q=soc.ram.ram[26][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96544 q=soc.ram.ram[26][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96546 q=soc.ram.ram[26][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96548 q=soc.ram.ram[26][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96550 q=soc.ram.ram[26][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96552 q=soc.ram.ram[26][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96554 q=soc.ram.ram[26][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96556 q=soc.ram.ram[38][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96558 q=soc.ram.ram[38][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96560 q=soc.ram.ram[38][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96562 q=soc.ram.ram[38][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96564 q=soc.ram.ram[38][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96566 q=soc.ram.ram[38][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96568 q=soc.ram.ram[38][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96570 q=soc.ram.ram[38][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96572 q=soc.ram.ram[23][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96574 q=soc.ram.ram[23][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96576 q=soc.ram.ram[23][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96578 q=soc.ram.ram[23][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96580 q=soc.ram.ram[23][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96582 q=soc.ram.ram[23][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96584 q=soc.ram.ram[23][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96586 q=soc.ram.ram[23][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96588 q=soc.ram.ram[15][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96590 q=soc.ram.ram[15][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96592 q=soc.ram.ram[15][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96594 q=soc.ram.ram[15][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96596 q=soc.ram.ram[15][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96598 q=soc.ram.ram[15][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96600 q=soc.ram.ram[15][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96602 q=soc.ram.ram[15][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96604 q=soc.ram.ram[20][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96606 q=soc.ram.ram[20][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96608 q=soc.ram.ram[20][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96610 q=soc.ram.ram[20][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96612 q=soc.ram.ram[20][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96614 q=soc.ram.ram[20][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96616 q=soc.ram.ram[20][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96618 q=soc.ram.ram[20][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96620 q=soc.ram.ram[31][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96622 q=soc.ram.ram[31][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96624 q=soc.ram.ram[31][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96626 q=soc.ram.ram[31][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96628 q=soc.ram.ram[31][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96630 q=soc.ram.ram[31][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96632 q=soc.ram.ram[31][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96634 q=soc.ram.ram[31][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96636 q=soc.ram.ram[49][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96638 q=soc.ram.ram[49][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96640 q=soc.ram.ram[49][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96642 q=soc.ram.ram[49][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96644 q=soc.ram.ram[49][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96646 q=soc.ram.ram[49][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96648 q=soc.ram.ram[49][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96650 q=soc.ram.ram[49][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96652 q=soc.rom.spimemio.rd_addr[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96654 q=soc.rom.spimemio.rd_addr[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96656 q=soc.rom.spimemio.rd_addr[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96658 q=soc.rom.spimemio.rd_addr[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96660 q=soc.rom.spimemio.rd_addr[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96662 q=soc.rom.spimemio.rd_addr[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96664 q=soc.rom.spimemio.rd_addr[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96666 q=soc.rom.spimemio.rd_addr[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96668 q=soc.rom.spimemio.rd_addr[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96670 q=soc.rom.spimemio.rd_addr[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96672 q=soc.rom.spimemio.rd_addr[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96674 q=soc.rom.spimemio.rd_addr[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96676 q=soc.rom.spimemio.rd_addr[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96678 q=soc.rom.spimemio.rd_addr[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96680 q=soc.rom.spimemio.rd_addr[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96682 q=soc.rom.spimemio.rd_addr[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96684 q=soc.rom.spimemio.rd_addr[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96686 q=soc.rom.spimemio.rd_addr[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96688 q=soc.rom.spimemio.rd_addr[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96690 q=soc.rom.spimemio.rd_addr[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96692 q=soc.rom.spimemio.rd_addr[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96694 q=soc.rom.spimemio.rd_addr[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96696 q=soc.ram.ram[23][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96698 q=soc.ram.ram[23][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96700 q=soc.ram.ram[23][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96702 q=soc.ram.ram[23][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96704 q=soc.ram.ram[23][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96706 q=soc.ram.ram[23][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96708 q=soc.ram.ram[23][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96710 q=soc.ram.ram[23][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96712 q=soc.ram.ram[15][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96714 q=soc.ram.ram[15][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96716 q=soc.ram.ram[15][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96718 q=soc.ram.ram[15][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96720 q=soc.ram.ram[15][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96722 q=soc.ram.ram[15][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96724 q=soc.ram.ram[15][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96726 q=soc.ram.ram[15][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96728 q=soc.rom.spimemio.buffer[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96730 q=soc.rom.spimemio.buffer[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96732 q=soc.rom.spimemio.buffer[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96734 q=soc.rom.spimemio.buffer[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96736 q=soc.rom.spimemio.buffer[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96738 q=soc.rom.spimemio.buffer[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96740 q=soc.rom.spimemio.buffer[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96742 q=soc.rom.spimemio.buffer[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96744 q=soc.ram.ram[30][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96746 q=soc.ram.ram[30][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96748 q=soc.ram.ram[30][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96750 q=soc.ram.ram[30][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96752 q=soc.ram.ram[30][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96754 q=soc.ram.ram[30][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96756 q=soc.ram.ram[30][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96758 q=soc.ram.ram[30][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96760 q=soc.rom.spimemio.buffer[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96762 q=soc.rom.spimemio.buffer[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96764 q=soc.rom.spimemio.buffer[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96766 q=soc.rom.spimemio.buffer[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96768 q=soc.rom.spimemio.buffer[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96770 q=soc.rom.spimemio.buffer[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96772 q=soc.rom.spimemio.buffer[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96774 q=soc.rom.spimemio.buffer[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96776 q=soc.ram.ram[59][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96778 q=soc.ram.ram[59][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96780 q=soc.ram.ram[59][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96782 q=soc.ram.ram[59][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96784 q=soc.ram.ram[59][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96786 q=soc.ram.ram[59][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96788 q=soc.ram.ram[59][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96790 q=soc.ram.ram[59][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96792 q=soc.ram.ram[21][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96794 q=soc.ram.ram[21][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96796 q=soc.ram.ram[21][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96798 q=soc.ram.ram[21][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96800 q=soc.ram.ram[21][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96802 q=soc.ram.ram[21][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96804 q=soc.ram.ram[21][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96806 q=soc.ram.ram[21][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96808 q=soc.ram.ram[23][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96810 q=soc.ram.ram[23][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96812 q=soc.ram.ram[23][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96814 q=soc.ram.ram[23][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96816 q=soc.ram.ram[23][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96818 q=soc.ram.ram[23][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96820 q=soc.ram.ram[23][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96822 q=soc.ram.ram[23][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96824 q=soc.ram.ram[16][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96826 q=soc.ram.ram[16][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96828 q=soc.ram.ram[16][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96830 q=soc.ram.ram[16][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96832 q=soc.ram.ram[16][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96834 q=soc.ram.ram[16][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96836 q=soc.ram.ram[16][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96838 q=soc.ram.ram[16][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96840 q=soc.cpu.minerva.gprf.mem._mem[9][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96842 q=soc.cpu.minerva.gprf.mem._mem[9][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96844 q=soc.cpu.minerva.gprf.mem._mem[9][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96846 q=soc.cpu.minerva.gprf.mem._mem[9][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96848 q=soc.cpu.minerva.gprf.mem._mem[9][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96850 q=soc.cpu.minerva.gprf.mem._mem[9][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96852 q=soc.cpu.minerva.gprf.mem._mem[9][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96854 q=soc.cpu.minerva.gprf.mem._mem[9][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96856 q=soc.cpu.minerva.gprf.mem._mem[9][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96858 q=soc.cpu.minerva.gprf.mem._mem[9][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96860 q=soc.cpu.minerva.gprf.mem._mem[9][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96862 q=soc.cpu.minerva.gprf.mem._mem[9][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96864 q=soc.cpu.minerva.gprf.mem._mem[9][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96866 q=soc.cpu.minerva.gprf.mem._mem[9][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96868 q=soc.cpu.minerva.gprf.mem._mem[9][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96870 q=soc.cpu.minerva.gprf.mem._mem[9][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96872 q=soc.cpu.minerva.gprf.mem._mem[9][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96874 q=soc.cpu.minerva.gprf.mem._mem[9][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96876 q=soc.cpu.minerva.gprf.mem._mem[9][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96878 q=soc.cpu.minerva.gprf.mem._mem[9][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96880 q=soc.cpu.minerva.gprf.mem._mem[9][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96882 q=soc.cpu.minerva.gprf.mem._mem[9][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96884 q=soc.cpu.minerva.gprf.mem._mem[9][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96886 q=soc.cpu.minerva.gprf.mem._mem[9][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96888 q=soc.cpu.minerva.gprf.mem._mem[9][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96890 q=soc.cpu.minerva.gprf.mem._mem[9][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96892 q=soc.cpu.minerva.gprf.mem._mem[9][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96894 q=soc.cpu.minerva.gprf.mem._mem[9][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96896 q=soc.cpu.minerva.gprf.mem._mem[9][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96898 q=soc.cpu.minerva.gprf.mem._mem[9][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96900 q=soc.cpu.minerva.gprf.mem._mem[9][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96902 q=soc.cpu.minerva.gprf.mem._mem[9][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96904 q=soc.ram.ram[2][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96906 q=soc.ram.ram[2][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96908 q=soc.ram.ram[2][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96910 q=soc.ram.ram[2][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96912 q=soc.ram.ram[2][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96914 q=soc.ram.ram[2][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96916 q=soc.ram.ram[2][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96918 q=soc.ram.ram[2][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96920 q=soc.ram.ram[26][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96922 q=soc.ram.ram[26][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96924 q=soc.ram.ram[26][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96926 q=soc.ram.ram[26][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96928 q=soc.ram.ram[26][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96930 q=soc.ram.ram[26][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96932 q=soc.ram.ram[26][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96934 q=soc.ram.ram[26][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96936 q=soc.ram.ram[69][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96938 q=soc.ram.ram[69][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96940 q=soc.ram.ram[69][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96942 q=soc.ram.ram[69][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96944 q=soc.ram.ram[69][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96946 q=soc.ram.ram[69][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96948 q=soc.ram.ram[69][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96950 q=soc.ram.ram[69][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96952 q=soc.ram.ram[14][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96954 q=soc.ram.ram[14][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96956 q=soc.ram.ram[14][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96958 q=soc.ram.ram[14][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96960 q=soc.ram.ram[14][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96962 q=soc.ram.ram[14][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96964 q=soc.ram.ram[14][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96966 q=soc.ram.ram[14][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96968 q=soc.ram.ram[20][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96970 q=soc.ram.ram[20][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96972 q=soc.ram.ram[20][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96974 q=soc.ram.ram[20][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96976 q=soc.ram.ram[20][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96978 q=soc.ram.ram[20][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96980 q=soc.ram.ram[20][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96982 q=soc.ram.ram[20][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96984 q=soc.ram.ram[26][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96986 q=soc.ram.ram[26][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96988 q=soc.ram.ram[26][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96990 q=soc.ram.ram[26][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96992 q=soc.ram.ram[26][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96994 q=soc.ram.ram[26][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96996 q=soc.ram.ram[26][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$96998 q=soc.ram.ram[26][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97000 q=soc.ram.ram[21][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97002 q=soc.ram.ram[21][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97004 q=soc.ram.ram[21][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97006 q=soc.ram.ram[21][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97008 q=soc.ram.ram[21][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97010 q=soc.ram.ram[21][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97012 q=soc.ram.ram[21][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97014 q=soc.ram.ram[21][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97016 q=soc.ram.ram[16][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97018 q=soc.ram.ram[16][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97020 q=soc.ram.ram[16][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97022 q=soc.ram.ram[16][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97024 q=soc.ram.ram[16][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97026 q=soc.ram.ram[16][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97028 q=soc.ram.ram[16][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97030 q=soc.ram.ram[16][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97032 q=soc.ram.ram[20][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97034 q=soc.ram.ram[20][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97036 q=soc.ram.ram[20][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97038 q=soc.ram.ram[20][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97040 q=soc.ram.ram[20][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97042 q=soc.ram.ram[20][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97044 q=soc.ram.ram[20][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97046 q=soc.ram.ram[20][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97048 q=soc.ram.ram[37][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97050 q=soc.ram.ram[37][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97052 q=soc.ram.ram[37][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97054 q=soc.ram.ram[37][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97056 q=soc.ram.ram[37][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97058 q=soc.ram.ram[37][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97060 q=soc.ram.ram[37][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97062 q=soc.ram.ram[37][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97064 q=soc.ram.ram[22][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97066 q=soc.ram.ram[22][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97068 q=soc.ram.ram[22][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97070 q=soc.ram.ram[22][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97072 q=soc.ram.ram[22][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97074 q=soc.ram.ram[22][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97076 q=soc.ram.ram[22][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97078 q=soc.ram.ram[22][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97080 q=soc.ram.ram[19][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97082 q=soc.ram.ram[19][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97084 q=soc.ram.ram[19][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97086 q=soc.ram.ram[19][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97088 q=soc.ram.ram[19][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97090 q=soc.ram.ram[19][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97092 q=soc.ram.ram[19][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97094 q=soc.ram.ram[19][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97096 q=soc.ram.ram[79][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97098 q=soc.ram.ram[79][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97100 q=soc.ram.ram[79][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97102 q=soc.ram.ram[79][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97104 q=soc.ram.ram[79][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97106 q=soc.ram.ram[79][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97108 q=soc.ram.ram[79][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97110 q=soc.ram.ram[79][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97112 q=soc.ram.ram[14][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97114 q=soc.ram.ram[14][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97116 q=soc.ram.ram[14][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97118 q=soc.ram.ram[14][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97120 q=soc.ram.ram[14][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97122 q=soc.ram.ram[14][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97124 q=soc.ram.ram[14][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97126 q=soc.ram.ram[14][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97128 q=soc.ram.ram[20][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97130 q=soc.ram.ram[20][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97132 q=soc.ram.ram[20][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97134 q=soc.ram.ram[20][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97136 q=soc.ram.ram[20][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97138 q=soc.ram.ram[20][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97140 q=soc.ram.ram[20][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97142 q=soc.ram.ram[20][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97146 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97150 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97154 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97158 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97162 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97166 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97170 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97174 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97178 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97182 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97186 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97190 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97194 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97198 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97202 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97206 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97210 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97214 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97218 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97222 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97226 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97230 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97234 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97238 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97240 q=soc.ram.ram[1][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97242 q=soc.ram.ram[1][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97244 q=soc.ram.ram[1][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97246 q=soc.ram.ram[1][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97248 q=soc.ram.ram[1][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97250 q=soc.ram.ram[1][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97252 q=soc.ram.ram[1][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97254 q=soc.ram.ram[1][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97256 q=soc.ram.ram[29][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97258 q=soc.ram.ram[29][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97260 q=soc.ram.ram[29][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97262 q=soc.ram.ram[29][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97264 q=soc.ram.ram[29][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97266 q=soc.ram.ram[29][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97268 q=soc.ram.ram[29][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97270 q=soc.ram.ram[29][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97274 q=soc.hyperram.sr[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97278 q=soc.hyperram.sr[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97282 q=soc.hyperram.sr[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97286 q=soc.hyperram.sr[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97290 q=soc.hyperram.sr[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97294 q=soc.hyperram.sr[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97298 q=soc.hyperram.sr[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97302 q=soc.hyperram.sr[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97306 q=soc.hyperram.sr[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97310 q=soc.hyperram.sr[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97314 q=soc.hyperram.sr[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97318 q=soc.hyperram.sr[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97322 q=soc.hyperram.sr[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97326 q=soc.hyperram.sr[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97330 q=soc.hyperram.sr[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97334 q=soc.hyperram.sr[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97336 q=soc.ram.ram[83][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97338 q=soc.ram.ram[83][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97340 q=soc.ram.ram[83][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97342 q=soc.ram.ram[83][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97344 q=soc.ram.ram[83][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97346 q=soc.ram.ram[83][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97348 q=soc.ram.ram[83][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97350 q=soc.ram.ram[83][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97352 q=soc.ram.ram[118][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97354 q=soc.ram.ram[118][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97356 q=soc.ram.ram[118][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97358 q=soc.ram.ram[118][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97360 q=soc.ram.ram[118][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97362 q=soc.ram.ram[118][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97364 q=soc.ram.ram[118][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97366 q=soc.ram.ram[118][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97368 q=soc.ram.ram[125][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97370 q=soc.ram.ram[125][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97372 q=soc.ram.ram[125][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97374 q=soc.ram.ram[125][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97376 q=soc.ram.ram[125][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97378 q=soc.ram.ram[125][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97380 q=soc.ram.ram[125][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97382 q=soc.ram.ram[125][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97384 q=soc.ram.ram[124][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97386 q=soc.ram.ram[124][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97388 q=soc.ram.ram[124][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97390 q=soc.ram.ram[124][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97392 q=soc.ram.ram[124][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97394 q=soc.ram.ram[124][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97396 q=soc.ram.ram[124][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97398 q=soc.ram.ram[124][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97400 q=soc.ram.ram[123][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97402 q=soc.ram.ram[123][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97404 q=soc.ram.ram[123][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97406 q=soc.ram.ram[123][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97408 q=soc.ram.ram[123][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97410 q=soc.ram.ram[123][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97412 q=soc.ram.ram[123][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97414 q=soc.ram.ram[123][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97416 q=soc.ram.ram[51][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97418 q=soc.ram.ram[51][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97420 q=soc.ram.ram[51][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97422 q=soc.ram.ram[51][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97424 q=soc.ram.ram[51][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97426 q=soc.ram.ram[51][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97428 q=soc.ram.ram[51][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97430 q=soc.ram.ram[51][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97432 q=soc.ram.ram[50][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97434 q=soc.ram.ram[50][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97436 q=soc.ram.ram[50][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97438 q=soc.ram.ram[50][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97440 q=soc.ram.ram[50][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97442 q=soc.ram.ram[50][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97444 q=soc.ram.ram[50][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97446 q=soc.ram.ram[50][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97448 q=soc.ram.ram[122][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97450 q=soc.ram.ram[122][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97452 q=soc.ram.ram[122][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97454 q=soc.ram.ram[122][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97456 q=soc.ram.ram[122][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97458 q=soc.ram.ram[122][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97460 q=soc.ram.ram[122][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97462 q=soc.ram.ram[122][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97464 q=soc.ram.ram[51][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97466 q=soc.ram.ram[51][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97468 q=soc.ram.ram[51][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97470 q=soc.ram.ram[51][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97472 q=soc.ram.ram[51][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97474 q=soc.ram.ram[51][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97476 q=soc.ram.ram[51][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97478 q=soc.ram.ram[51][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97480 q=soc.ram.ram[126][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97482 q=soc.ram.ram[126][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97484 q=soc.ram.ram[126][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97486 q=soc.ram.ram[126][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97488 q=soc.ram.ram[126][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97490 q=soc.ram.ram[126][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97492 q=soc.ram.ram[126][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97494 q=soc.ram.ram[126][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97496 q=soc.ram.ram[52][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97498 q=soc.ram.ram[52][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97500 q=soc.ram.ram[52][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97502 q=soc.ram.ram[52][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97504 q=soc.ram.ram[52][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97506 q=soc.ram.ram[52][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97508 q=soc.ram.ram[52][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97510 q=soc.ram.ram[52][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97512 q=soc.ram.ram[120][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97514 q=soc.ram.ram[120][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97516 q=soc.ram.ram[120][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97518 q=soc.ram.ram[120][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97520 q=soc.ram.ram[120][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97522 q=soc.ram.ram[120][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97524 q=soc.ram.ram[120][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97526 q=soc.ram.ram[120][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97528 q=soc.ram.ram[11][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97530 q=soc.ram.ram[11][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97532 q=soc.ram.ram[11][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97534 q=soc.ram.ram[11][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97536 q=soc.ram.ram[11][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97538 q=soc.ram.ram[11][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97540 q=soc.ram.ram[11][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97542 q=soc.ram.ram[11][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97544 q=soc.ram.ram[52][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97546 q=soc.ram.ram[52][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97548 q=soc.ram.ram[52][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97550 q=soc.ram.ram[52][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97552 q=soc.ram.ram[52][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97554 q=soc.ram.ram[52][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97556 q=soc.ram.ram[52][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97558 q=soc.ram.ram[52][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97560 q=soc.ram.ram[52][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97562 q=soc.ram.ram[52][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97564 q=soc.ram.ram[52][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97566 q=soc.ram.ram[52][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97568 q=soc.ram.ram[52][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97570 q=soc.ram.ram[52][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97572 q=soc.ram.ram[52][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97574 q=soc.ram.ram[52][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97576 q=soc.ram.ram[51][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97578 q=soc.ram.ram[51][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97580 q=soc.ram.ram[51][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97582 q=soc.ram.ram[51][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97584 q=soc.ram.ram[51][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97586 q=soc.ram.ram[51][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97588 q=soc.ram.ram[51][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97590 q=soc.ram.ram[51][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97592 q=soc.ram.ram[50][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97594 q=soc.ram.ram[50][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97596 q=soc.ram.ram[50][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97598 q=soc.ram.ram[50][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97600 q=soc.ram.ram[50][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97602 q=soc.ram.ram[50][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97604 q=soc.ram.ram[50][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97606 q=soc.ram.ram[50][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97608 q=soc.ram.ram[50][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97610 q=soc.ram.ram[50][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97612 q=soc.ram.ram[50][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97614 q=soc.ram.ram[50][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97616 q=soc.ram.ram[50][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97618 q=soc.ram.ram[50][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97620 q=soc.ram.ram[50][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97622 q=soc.ram.ram[50][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97624 q=soc.ram.ram[121][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97626 q=soc.ram.ram[121][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97628 q=soc.ram.ram[121][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97630 q=soc.ram.ram[121][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97632 q=soc.ram.ram[121][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97634 q=soc.ram.ram[121][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97636 q=soc.ram.ram[121][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97638 q=soc.ram.ram[121][7]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[0] q=$\soc.ram.ram$rdreg[0]$q[0]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[1] q=$\soc.ram.ram$rdreg[0]$q[1]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[2] q=$\soc.ram.ram$rdreg[0]$q[2]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[3] q=$\soc.ram.ram$rdreg[0]$q[3]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[4] q=$\soc.ram.ram$rdreg[0]$q[4]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[5] q=$\soc.ram.ram$rdreg[0]$q[5]
+.subckt dff_x1 clk=io_in[0] i=soc.ram.ram_r_addr[6] q=$\soc.ram.ram$rdreg[0]$q[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97640 q=soc.ram.ram[92][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97642 q=soc.ram.ram[92][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97644 q=soc.ram.ram[92][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97646 q=soc.ram.ram[92][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97648 q=soc.ram.ram[92][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97650 q=soc.ram.ram[92][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97652 q=soc.ram.ram[92][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97654 q=soc.ram.ram[92][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97656 q=soc.ram.ram[9][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97658 q=soc.ram.ram[9][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97660 q=soc.ram.ram[9][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97662 q=soc.ram.ram[9][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97664 q=soc.ram.ram[9][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97666 q=soc.ram.ram[9][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97668 q=soc.ram.ram[9][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97670 q=soc.ram.ram[9][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97672 q=soc.ram.ram[36][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97674 q=soc.ram.ram[36][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97676 q=soc.ram.ram[36][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97678 q=soc.ram.ram[36][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97680 q=soc.ram.ram[36][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97682 q=soc.ram.ram[36][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97684 q=soc.ram.ram[36][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97686 q=soc.ram.ram[36][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97688 q=soc.ram.ram[72][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97690 q=soc.ram.ram[72][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97692 q=soc.ram.ram[72][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97694 q=soc.ram.ram[72][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97696 q=soc.ram.ram[72][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97698 q=soc.ram.ram[72][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97700 q=soc.ram.ram[72][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97702 q=soc.ram.ram[72][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97704 q=soc.ram.ram[36][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97706 q=soc.ram.ram[36][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97708 q=soc.ram.ram[36][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97710 q=soc.ram.ram[36][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97712 q=soc.ram.ram[36][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97714 q=soc.ram.ram[36][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97716 q=soc.ram.ram[36][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97718 q=soc.ram.ram[36][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97720 q=soc.ram.ram[71][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97722 q=soc.ram.ram[71][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97724 q=soc.ram.ram[71][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97726 q=soc.ram.ram[71][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97728 q=soc.ram.ram[71][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97730 q=soc.ram.ram[71][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97732 q=soc.ram.ram[71][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97734 q=soc.ram.ram[71][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97736 q=soc.ram.ram[36][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97738 q=soc.ram.ram[36][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97740 q=soc.ram.ram[36][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97742 q=soc.ram.ram[36][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97744 q=soc.ram.ram[36][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97746 q=soc.ram.ram[36][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97748 q=soc.ram.ram[36][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97750 q=soc.ram.ram[36][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97752 q=soc.ram.ram[70][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97754 q=soc.ram.ram[70][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97756 q=soc.ram.ram[70][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97758 q=soc.ram.ram[70][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97760 q=soc.ram.ram[70][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97762 q=soc.ram.ram[70][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97764 q=soc.ram.ram[70][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97766 q=soc.ram.ram[70][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97768 q=soc.ram.ram[35][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97770 q=soc.ram.ram[35][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97772 q=soc.ram.ram[35][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97774 q=soc.ram.ram[35][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97776 q=soc.ram.ram[35][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97778 q=soc.ram.ram[35][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97780 q=soc.ram.ram[35][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97782 q=soc.ram.ram[35][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97784 q=soc.ram.ram[6][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97786 q=soc.ram.ram[6][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97788 q=soc.ram.ram[6][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97790 q=soc.ram.ram[6][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97792 q=soc.ram.ram[6][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97794 q=soc.ram.ram[6][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97796 q=soc.ram.ram[6][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97798 q=soc.ram.ram[6][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97800 q=soc.ram.ram[35][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97802 q=soc.ram.ram[35][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97804 q=soc.ram.ram[35][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97806 q=soc.ram.ram[35][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97808 q=soc.ram.ram[35][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97810 q=soc.ram.ram[35][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97812 q=soc.ram.ram[35][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97814 q=soc.ram.ram[35][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97816 q=soc.ram.ram[68][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97818 q=soc.ram.ram[68][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97820 q=soc.ram.ram[68][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97822 q=soc.ram.ram[68][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97824 q=soc.ram.ram[68][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97826 q=soc.ram.ram[68][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97828 q=soc.ram.ram[68][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97830 q=soc.ram.ram[68][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97832 q=soc.ram.ram[35][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97834 q=soc.ram.ram[35][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97836 q=soc.ram.ram[35][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97838 q=soc.ram.ram[35][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97840 q=soc.ram.ram[35][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97842 q=soc.ram.ram[35][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97844 q=soc.ram.ram[35][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97846 q=soc.ram.ram[35][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97848 q=soc.ram.ram[67][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97850 q=soc.ram.ram[67][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97852 q=soc.ram.ram[67][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97854 q=soc.ram.ram[67][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97856 q=soc.ram.ram[67][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97858 q=soc.ram.ram[67][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97860 q=soc.ram.ram[67][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97862 q=soc.ram.ram[67][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97864 q=soc.ram.ram[34][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97866 q=soc.ram.ram[34][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97868 q=soc.ram.ram[34][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97870 q=soc.ram.ram[34][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97872 q=soc.ram.ram[34][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97874 q=soc.ram.ram[34][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97876 q=soc.ram.ram[34][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97878 q=soc.ram.ram[34][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97880 q=soc.ram.ram[66][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97882 q=soc.ram.ram[66][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97884 q=soc.ram.ram[66][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97886 q=soc.ram.ram[66][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97888 q=soc.ram.ram[66][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97890 q=soc.ram.ram[66][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97892 q=soc.ram.ram[66][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97894 q=soc.ram.ram[66][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97896 q=soc.ram.ram[34][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97898 q=soc.ram.ram[34][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97900 q=soc.ram.ram[34][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97902 q=soc.ram.ram[34][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97904 q=soc.ram.ram[34][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97906 q=soc.ram.ram[34][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97908 q=soc.ram.ram[34][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97910 q=soc.ram.ram[34][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97912 q=soc.ram.ram[65][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97914 q=soc.ram.ram[65][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97916 q=soc.ram.ram[65][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97918 q=soc.ram.ram[65][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97920 q=soc.ram.ram[65][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97922 q=soc.ram.ram[65][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97924 q=soc.ram.ram[65][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97926 q=soc.ram.ram[65][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97928 q=soc.ram.ram[34][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97930 q=soc.ram.ram[34][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97932 q=soc.ram.ram[34][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97934 q=soc.ram.ram[34][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97936 q=soc.ram.ram[34][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97938 q=soc.ram.ram[34][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97940 q=soc.ram.ram[34][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97942 q=soc.ram.ram[34][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97944 q=soc.ram.ram[64][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97946 q=soc.ram.ram[64][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97948 q=soc.ram.ram[64][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97950 q=soc.ram.ram[64][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97952 q=soc.ram.ram[64][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97954 q=soc.ram.ram[64][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97956 q=soc.ram.ram[64][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97958 q=soc.ram.ram[64][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97960 q=soc.ram.ram[33][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97962 q=soc.ram.ram[33][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97964 q=soc.ram.ram[33][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97966 q=soc.ram.ram[33][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97968 q=soc.ram.ram[33][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97970 q=soc.ram.ram[33][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97972 q=soc.ram.ram[33][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97974 q=soc.ram.ram[33][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97976 q=soc.ram.ram[63][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97978 q=soc.ram.ram[63][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97980 q=soc.ram.ram[63][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97982 q=soc.ram.ram[63][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97984 q=soc.ram.ram[63][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97986 q=soc.ram.ram[63][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97988 q=soc.ram.ram[63][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97990 q=soc.ram.ram[63][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97992 q=soc.ram.ram[33][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97994 q=soc.ram.ram[33][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97996 q=soc.ram.ram[33][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$97998 q=soc.ram.ram[33][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98000 q=soc.ram.ram[33][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98002 q=soc.ram.ram[33][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98004 q=soc.ram.ram[33][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98006 q=soc.ram.ram[33][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98008 q=soc.ram.ram[62][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98010 q=soc.ram.ram[62][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98012 q=soc.ram.ram[62][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98014 q=soc.ram.ram[62][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98016 q=soc.ram.ram[62][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98018 q=soc.ram.ram[62][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98020 q=soc.ram.ram[62][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98022 q=soc.ram.ram[62][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98024 q=soc.ram.ram[33][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98026 q=soc.ram.ram[33][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98028 q=soc.ram.ram[33][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98030 q=soc.ram.ram[33][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98032 q=soc.ram.ram[33][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98034 q=soc.ram.ram[33][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98036 q=soc.ram.ram[33][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98038 q=soc.ram.ram[33][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98040 q=soc.ram.ram[61][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98042 q=soc.ram.ram[61][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98044 q=soc.ram.ram[61][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98046 q=soc.ram.ram[61][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98048 q=soc.ram.ram[61][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98050 q=soc.ram.ram[61][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98052 q=soc.ram.ram[61][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98054 q=soc.ram.ram[61][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98056 q=soc.ram.ram[32][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98058 q=soc.ram.ram[32][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98060 q=soc.ram.ram[32][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98062 q=soc.ram.ram[32][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98064 q=soc.ram.ram[32][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98066 q=soc.ram.ram[32][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98068 q=soc.ram.ram[32][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98070 q=soc.ram.ram[32][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98072 q=soc.ram.ram[60][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98074 q=soc.ram.ram[60][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98076 q=soc.ram.ram[60][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98078 q=soc.ram.ram[60][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98080 q=soc.ram.ram[60][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98082 q=soc.ram.ram[60][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98084 q=soc.ram.ram[60][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98086 q=soc.ram.ram[60][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98088 q=soc.ram.ram[32][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98090 q=soc.ram.ram[32][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98092 q=soc.ram.ram[32][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98094 q=soc.ram.ram[32][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98096 q=soc.ram.ram[32][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98098 q=soc.ram.ram[32][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98100 q=soc.ram.ram[32][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98102 q=soc.ram.ram[32][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98104 q=soc.ram.ram[47][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98106 q=soc.ram.ram[47][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98108 q=soc.ram.ram[47][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98110 q=soc.ram.ram[47][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98112 q=soc.ram.ram[47][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98114 q=soc.ram.ram[47][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98116 q=soc.ram.ram[47][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98118 q=soc.ram.ram[47][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98120 q=soc.ram.ram[77][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98122 q=soc.ram.ram[77][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98124 q=soc.ram.ram[77][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98126 q=soc.ram.ram[77][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98128 q=soc.ram.ram[77][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98130 q=soc.ram.ram[77][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98132 q=soc.ram.ram[77][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98134 q=soc.ram.ram[77][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98136 q=soc.ram.ram[77][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98138 q=soc.ram.ram[77][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98140 q=soc.ram.ram[77][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98142 q=soc.ram.ram[77][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98144 q=soc.ram.ram[77][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98146 q=soc.ram.ram[77][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98148 q=soc.ram.ram[77][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98150 q=soc.ram.ram[77][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98152 q=soc.ram.ram[77][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98154 q=soc.ram.ram[77][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98156 q=soc.ram.ram[77][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98158 q=soc.ram.ram[77][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98160 q=soc.ram.ram[77][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98162 q=soc.ram.ram[77][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98164 q=soc.ram.ram[77][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98166 q=soc.ram.ram[77][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98168 q=soc.ram.ram[45][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98170 q=soc.ram.ram[45][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98172 q=soc.ram.ram[45][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98174 q=soc.ram.ram[45][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98176 q=soc.ram.ram[45][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98178 q=soc.ram.ram[45][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98180 q=soc.ram.ram[45][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98182 q=soc.ram.ram[45][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98184 q=soc.ram.ram[101][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98186 q=soc.ram.ram[101][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98188 q=soc.ram.ram[101][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98190 q=soc.ram.ram[101][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98192 q=soc.ram.ram[101][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98194 q=soc.ram.ram[101][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98196 q=soc.ram.ram[101][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98198 q=soc.ram.ram[101][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98200 q=soc.ram.ram[45][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98202 q=soc.ram.ram[45][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98204 q=soc.ram.ram[45][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98206 q=soc.ram.ram[45][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98208 q=soc.ram.ram[45][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98210 q=soc.ram.ram[45][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98212 q=soc.ram.ram[45][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98214 q=soc.ram.ram[45][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98216 q=soc.ram.ram[48][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98218 q=soc.ram.ram[48][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98220 q=soc.ram.ram[48][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98222 q=soc.ram.ram[48][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98224 q=soc.ram.ram[48][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98226 q=soc.ram.ram[48][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98228 q=soc.ram.ram[48][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98230 q=soc.ram.ram[48][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98232 q=soc.cpu.minerva.gprf.mem._mem[0][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98234 q=soc.cpu.minerva.gprf.mem._mem[0][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98236 q=soc.cpu.minerva.gprf.mem._mem[0][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98238 q=soc.cpu.minerva.gprf.mem._mem[0][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98240 q=soc.cpu.minerva.gprf.mem._mem[0][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98242 q=soc.cpu.minerva.gprf.mem._mem[0][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98244 q=soc.cpu.minerva.gprf.mem._mem[0][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98246 q=soc.cpu.minerva.gprf.mem._mem[0][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98248 q=soc.cpu.minerva.gprf.mem._mem[0][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98250 q=soc.cpu.minerva.gprf.mem._mem[0][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98252 q=soc.cpu.minerva.gprf.mem._mem[0][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98254 q=soc.cpu.minerva.gprf.mem._mem[0][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98256 q=soc.cpu.minerva.gprf.mem._mem[0][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98258 q=soc.cpu.minerva.gprf.mem._mem[0][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98260 q=soc.cpu.minerva.gprf.mem._mem[0][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98262 q=soc.cpu.minerva.gprf.mem._mem[0][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98264 q=soc.cpu.minerva.gprf.mem._mem[0][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98266 q=soc.cpu.minerva.gprf.mem._mem[0][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98268 q=soc.cpu.minerva.gprf.mem._mem[0][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98270 q=soc.cpu.minerva.gprf.mem._mem[0][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98272 q=soc.cpu.minerva.gprf.mem._mem[0][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98274 q=soc.cpu.minerva.gprf.mem._mem[0][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98276 q=soc.cpu.minerva.gprf.mem._mem[0][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98278 q=soc.cpu.minerva.gprf.mem._mem[0][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98280 q=soc.cpu.minerva.gprf.mem._mem[0][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98282 q=soc.cpu.minerva.gprf.mem._mem[0][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98284 q=soc.cpu.minerva.gprf.mem._mem[0][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98286 q=soc.cpu.minerva.gprf.mem._mem[0][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98288 q=soc.cpu.minerva.gprf.mem._mem[0][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98290 q=soc.cpu.minerva.gprf.mem._mem[0][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98292 q=soc.cpu.minerva.gprf.mem._mem[0][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98294 q=soc.cpu.minerva.gprf.mem._mem[0][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98296 q=soc.ram.ram[108][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98298 q=soc.ram.ram[108][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98300 q=soc.ram.ram[108][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98302 q=soc.ram.ram[108][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98304 q=soc.ram.ram[108][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98306 q=soc.ram.ram[108][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98308 q=soc.ram.ram[108][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98310 q=soc.ram.ram[108][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98312 q=soc.ram.ram[47][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98314 q=soc.ram.ram[47][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98316 q=soc.ram.ram[47][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98318 q=soc.ram.ram[47][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98320 q=soc.ram.ram[47][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98322 q=soc.ram.ram[47][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98324 q=soc.ram.ram[47][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98326 q=soc.ram.ram[47][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98328 q=soc.ram.ram[10][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98330 q=soc.ram.ram[10][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98332 q=soc.ram.ram[10][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98334 q=soc.ram.ram[10][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98336 q=soc.ram.ram[10][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98338 q=soc.ram.ram[10][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98340 q=soc.ram.ram[10][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98342 q=soc.ram.ram[10][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98344 q=soc.ram.ram[78][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98346 q=soc.ram.ram[78][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98348 q=soc.ram.ram[78][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98350 q=soc.ram.ram[78][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98352 q=soc.ram.ram[78][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98354 q=soc.ram.ram[78][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98356 q=soc.ram.ram[78][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98358 q=soc.ram.ram[78][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98360 q=soc.ram.ram[78][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98362 q=soc.ram.ram[78][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98364 q=soc.ram.ram[78][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98366 q=soc.ram.ram[78][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98368 q=soc.ram.ram[78][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98370 q=soc.ram.ram[78][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98372 q=soc.ram.ram[78][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98374 q=soc.ram.ram[78][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98376 q=soc.ram.ram[27][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98378 q=soc.ram.ram[27][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98380 q=soc.ram.ram[27][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98382 q=soc.ram.ram[27][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98384 q=soc.ram.ram[27][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98386 q=soc.ram.ram[27][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98388 q=soc.ram.ram[27][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98390 q=soc.ram.ram[27][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98394 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98398 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98402 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98406 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98410 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98414 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98418 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98422 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98426 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98430 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98434 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98438 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98442 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98446 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98450 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98454 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98458 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98462 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98466 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98470 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98474 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98478 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98482 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98486 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98488 q=soc.ram.ram[48][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98490 q=soc.ram.ram[48][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98492 q=soc.ram.ram[48][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98494 q=soc.ram.ram[48][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98496 q=soc.ram.ram[48][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98498 q=soc.ram.ram[48][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98500 q=soc.ram.ram[48][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98502 q=soc.ram.ram[48][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98504 q=soc.ram.ram[102][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98506 q=soc.ram.ram[102][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98508 q=soc.ram.ram[102][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98510 q=soc.ram.ram[102][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98512 q=soc.ram.ram[102][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98514 q=soc.ram.ram[102][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98516 q=soc.ram.ram[102][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98518 q=soc.ram.ram[102][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98520 q=soc.ram.ram[110][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98522 q=soc.ram.ram[110][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98524 q=soc.ram.ram[110][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98526 q=soc.ram.ram[110][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98528 q=soc.ram.ram[110][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98530 q=soc.ram.ram[110][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98532 q=soc.ram.ram[110][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98534 q=soc.ram.ram[110][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98536 q=soc.ram.ram[48][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98538 q=soc.ram.ram[48][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98540 q=soc.ram.ram[48][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98542 q=soc.ram.ram[48][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98544 q=soc.ram.ram[48][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98546 q=soc.ram.ram[48][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98548 q=soc.ram.ram[48][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98550 q=soc.ram.ram[48][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98552 q=soc.ram.ram[111][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98554 q=soc.ram.ram[111][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98556 q=soc.ram.ram[111][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98558 q=soc.ram.ram[111][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98560 q=soc.ram.ram[111][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98562 q=soc.ram.ram[111][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98564 q=soc.ram.ram[111][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98566 q=soc.ram.ram[111][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98568 q=soc.ram.ram[79][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98570 q=soc.ram.ram[79][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98572 q=soc.ram.ram[79][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98574 q=soc.ram.ram[79][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98576 q=soc.ram.ram[79][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98578 q=soc.ram.ram[79][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98580 q=soc.ram.ram[79][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98582 q=soc.ram.ram[79][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98584 q=soc.ram.ram[78][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98586 q=soc.ram.ram[78][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98588 q=soc.ram.ram[78][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98590 q=soc.ram.ram[78][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98592 q=soc.ram.ram[78][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98594 q=soc.ram.ram[78][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98596 q=soc.ram.ram[78][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98598 q=soc.ram.ram[78][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98600 q=soc.ram.ram[27][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98602 q=soc.ram.ram[27][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98604 q=soc.ram.ram[27][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98606 q=soc.ram.ram[27][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98608 q=soc.ram.ram[27][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98610 q=soc.ram.ram[27][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98612 q=soc.ram.ram[27][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98614 q=soc.ram.ram[27][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98618 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98622 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98626 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98630 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98634 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98638 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98642 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98646 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98650 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98654 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98658 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98662 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98666 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98670 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98674 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98678 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98680 q=soc.ram.ram[13][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98682 q=soc.ram.ram[13][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98684 q=soc.ram.ram[13][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98686 q=soc.ram.ram[13][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98688 q=soc.ram.ram[13][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98690 q=soc.ram.ram[13][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98692 q=soc.ram.ram[13][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98694 q=soc.ram.ram[13][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98696 q=soc.ram.ram[42][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98698 q=soc.ram.ram[42][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98700 q=soc.ram.ram[42][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98702 q=soc.ram.ram[42][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98704 q=soc.ram.ram[42][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98706 q=soc.ram.ram[42][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98708 q=soc.ram.ram[42][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98710 q=soc.ram.ram[42][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98712 q=soc.ram.ram[114][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98714 q=soc.ram.ram[114][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98716 q=soc.ram.ram[114][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98718 q=soc.ram.ram[114][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98720 q=soc.ram.ram[114][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98722 q=soc.ram.ram[114][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98724 q=soc.ram.ram[114][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98726 q=soc.ram.ram[114][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98728 q=soc.ram.ram[112][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98730 q=soc.ram.ram[112][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98732 q=soc.ram.ram[112][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98734 q=soc.ram.ram[112][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98736 q=soc.ram.ram[112][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98738 q=soc.ram.ram[112][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98740 q=soc.ram.ram[112][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98742 q=soc.ram.ram[112][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98744 q=soc.ram.ram[4][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98746 q=soc.ram.ram[4][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98748 q=soc.ram.ram[4][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98750 q=soc.ram.ram[4][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98752 q=soc.ram.ram[4][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98754 q=soc.ram.ram[4][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98756 q=soc.ram.ram[4][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98758 q=soc.ram.ram[4][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98760 q=soc.ram.ram[115][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98762 q=soc.ram.ram[115][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98764 q=soc.ram.ram[115][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98766 q=soc.ram.ram[115][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98768 q=soc.ram.ram[115][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98770 q=soc.ram.ram[115][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98772 q=soc.ram.ram[115][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98774 q=soc.ram.ram[115][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98776 q=soc.ram.ram[113][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98778 q=soc.ram.ram[113][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98780 q=soc.ram.ram[113][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98782 q=soc.ram.ram[113][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98784 q=soc.ram.ram[113][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98786 q=soc.ram.ram[113][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98788 q=soc.ram.ram[113][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98790 q=soc.ram.ram[113][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98792 q=soc.ram.ram[49][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98794 q=soc.ram.ram[49][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98796 q=soc.ram.ram[49][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98798 q=soc.ram.ram[49][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98800 q=soc.ram.ram[49][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98802 q=soc.ram.ram[49][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98804 q=soc.ram.ram[49][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98806 q=soc.ram.ram[49][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98808 q=soc.ram.ram[49][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98810 q=soc.ram.ram[49][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98812 q=soc.ram.ram[49][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98814 q=soc.ram.ram[49][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98816 q=soc.ram.ram[49][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98818 q=soc.ram.ram[49][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98820 q=soc.ram.ram[49][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98822 q=soc.ram.ram[49][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98824 q=soc.ram.ram[49][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98826 q=soc.ram.ram[49][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98828 q=soc.ram.ram[49][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98830 q=soc.ram.ram[49][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98832 q=soc.ram.ram[49][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98834 q=soc.ram.ram[49][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98836 q=soc.ram.ram[49][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98838 q=soc.ram.ram[49][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98840 q=soc.ram.ram[81][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98842 q=soc.ram.ram[81][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98844 q=soc.ram.ram[81][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98846 q=soc.ram.ram[81][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98848 q=soc.ram.ram[81][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98850 q=soc.ram.ram[81][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98852 q=soc.ram.ram[81][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98854 q=soc.ram.ram[81][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98856 q=soc.ram.ram[80][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98858 q=soc.ram.ram[80][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98860 q=soc.ram.ram[80][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98862 q=soc.ram.ram[80][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98864 q=soc.ram.ram[80][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98866 q=soc.ram.ram[80][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98868 q=soc.ram.ram[80][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98870 q=soc.ram.ram[80][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98872 q=soc.ram.ram[80][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98874 q=soc.ram.ram[80][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98876 q=soc.ram.ram[80][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98878 q=soc.ram.ram[80][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98880 q=soc.ram.ram[80][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98882 q=soc.ram.ram[80][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98884 q=soc.ram.ram[80][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98886 q=soc.ram.ram[80][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98888 q=soc.ram.ram[80][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98890 q=soc.ram.ram[80][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98892 q=soc.ram.ram[80][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98894 q=soc.ram.ram[80][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98896 q=soc.ram.ram[80][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98898 q=soc.ram.ram[80][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98900 q=soc.ram.ram[80][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98902 q=soc.ram.ram[80][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98904 q=soc.ram.ram[7][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98906 q=soc.ram.ram[7][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98908 q=soc.ram.ram[7][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98910 q=soc.ram.ram[7][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98912 q=soc.ram.ram[7][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98914 q=soc.ram.ram[7][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98916 q=soc.ram.ram[7][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98918 q=soc.ram.ram[7][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98920 q=soc.ram.ram[7][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98922 q=soc.ram.ram[7][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98924 q=soc.ram.ram[7][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98926 q=soc.ram.ram[7][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98928 q=soc.ram.ram[7][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98930 q=soc.ram.ram[7][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98932 q=soc.ram.ram[7][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98934 q=soc.ram.ram[7][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98936 q=soc.ram.ram[7][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98938 q=soc.ram.ram[7][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98940 q=soc.ram.ram[7][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98942 q=soc.ram.ram[7][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98944 q=soc.ram.ram[7][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98946 q=soc.ram.ram[7][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98948 q=soc.ram.ram[7][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98950 q=soc.ram.ram[7][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98952 q=soc.ram.ram[79][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98954 q=soc.ram.ram[79][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98956 q=soc.ram.ram[79][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98958 q=soc.ram.ram[79][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98960 q=soc.ram.ram[79][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98962 q=soc.ram.ram[79][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98964 q=soc.ram.ram[79][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98966 q=soc.ram.ram[79][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98968 q=soc.ram.ram[79][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98970 q=soc.ram.ram[79][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98972 q=soc.ram.ram[79][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98974 q=soc.ram.ram[79][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98976 q=soc.ram.ram[79][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98978 q=soc.ram.ram[79][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98980 q=soc.ram.ram[79][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98982 q=soc.ram.ram[79][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98984 q=soc.ram.ram[41][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98986 q=soc.ram.ram[41][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98988 q=soc.ram.ram[41][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98990 q=soc.ram.ram[41][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98992 q=soc.ram.ram[41][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98994 q=soc.ram.ram[41][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98996 q=soc.ram.ram[41][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$98998 q=soc.ram.ram[41][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99002 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99006 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99010 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99014 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99018 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99022 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99026 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99030 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99032 q=soc.ram.ram[12][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99034 q=soc.ram.ram[12][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99036 q=soc.ram.ram[12][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99038 q=soc.ram.ram[12][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99040 q=soc.ram.ram[12][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99042 q=soc.ram.ram[12][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99044 q=soc.ram.ram[12][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99046 q=soc.ram.ram[12][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99048 q=soc.ram.ram[4][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99050 q=soc.ram.ram[4][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99052 q=soc.ram.ram[4][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99054 q=soc.ram.ram[4][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99056 q=soc.ram.ram[4][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99058 q=soc.ram.ram[4][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99060 q=soc.ram.ram[4][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99062 q=soc.ram.ram[4][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99064 q=soc.ram.ram[4][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99066 q=soc.ram.ram[4][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99068 q=soc.ram.ram[4][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99070 q=soc.ram.ram[4][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99072 q=soc.ram.ram[4][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99074 q=soc.ram.ram[4][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99076 q=soc.ram.ram[4][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99078 q=soc.ram.ram[4][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99080 q=soc.ram.ram[117][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99082 q=soc.ram.ram[117][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99084 q=soc.ram.ram[117][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99086 q=soc.ram.ram[117][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99088 q=soc.ram.ram[117][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99090 q=soc.ram.ram[117][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99092 q=soc.ram.ram[117][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99094 q=soc.ram.ram[117][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99096 q=soc.ram.ram[116][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99098 q=soc.ram.ram[116][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99100 q=soc.ram.ram[116][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99102 q=soc.ram.ram[116][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99104 q=soc.ram.ram[116][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99106 q=soc.ram.ram[116][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99108 q=soc.ram.ram[116][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99110 q=soc.ram.ram[116][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99112 q=soc.ram.ram[82][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99114 q=soc.ram.ram[82][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99116 q=soc.ram.ram[82][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99118 q=soc.ram.ram[82][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99120 q=soc.ram.ram[82][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99122 q=soc.ram.ram[82][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99124 q=soc.ram.ram[82][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99126 q=soc.ram.ram[82][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99128 q=soc.ram.ram[82][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99130 q=soc.ram.ram[82][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99132 q=soc.ram.ram[82][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99134 q=soc.ram.ram[82][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99136 q=soc.ram.ram[82][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99138 q=soc.ram.ram[82][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99140 q=soc.ram.ram[82][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99142 q=soc.ram.ram[82][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99144 q=soc.ram.ram[82][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99146 q=soc.ram.ram[82][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99148 q=soc.ram.ram[82][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99150 q=soc.ram.ram[82][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99152 q=soc.ram.ram[82][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99154 q=soc.ram.ram[82][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99156 q=soc.ram.ram[82][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99158 q=soc.ram.ram[82][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99160 q=soc.ram.ram[81][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99162 q=soc.ram.ram[81][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99164 q=soc.ram.ram[81][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99166 q=soc.ram.ram[81][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99168 q=soc.ram.ram[81][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99170 q=soc.ram.ram[81][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99172 q=soc.ram.ram[81][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99174 q=soc.ram.ram[81][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99176 q=soc.ram.ram[81][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99178 q=soc.ram.ram[81][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99180 q=soc.ram.ram[81][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99182 q=soc.ram.ram[81][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99184 q=soc.ram.ram[81][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99186 q=soc.ram.ram[81][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99188 q=soc.ram.ram[81][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99190 q=soc.ram.ram[81][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99192 q=soc.ram.ram[76][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99194 q=soc.ram.ram[76][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99196 q=soc.ram.ram[76][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99198 q=soc.ram.ram[76][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99200 q=soc.ram.ram[76][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99202 q=soc.ram.ram[76][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99204 q=soc.ram.ram[76][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99206 q=soc.ram.ram[76][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99208 q=soc.ram.ram[107][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99210 q=soc.ram.ram[107][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99212 q=soc.ram.ram[107][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99214 q=soc.ram.ram[107][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99216 q=soc.ram.ram[107][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99218 q=soc.ram.ram[107][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99220 q=soc.ram.ram[107][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99222 q=soc.ram.ram[107][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99224 q=soc.cpu.minerva.gprf.mem._mem[8][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99226 q=soc.cpu.minerva.gprf.mem._mem[8][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99228 q=soc.cpu.minerva.gprf.mem._mem[8][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99230 q=soc.cpu.minerva.gprf.mem._mem[8][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99232 q=soc.cpu.minerva.gprf.mem._mem[8][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99234 q=soc.cpu.minerva.gprf.mem._mem[8][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99236 q=soc.cpu.minerva.gprf.mem._mem[8][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99238 q=soc.cpu.minerva.gprf.mem._mem[8][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99240 q=soc.cpu.minerva.gprf.mem._mem[8][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99242 q=soc.cpu.minerva.gprf.mem._mem[8][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99244 q=soc.cpu.minerva.gprf.mem._mem[8][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99246 q=soc.cpu.minerva.gprf.mem._mem[8][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99248 q=soc.cpu.minerva.gprf.mem._mem[8][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99250 q=soc.cpu.minerva.gprf.mem._mem[8][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99252 q=soc.cpu.minerva.gprf.mem._mem[8][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99254 q=soc.cpu.minerva.gprf.mem._mem[8][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99256 q=soc.cpu.minerva.gprf.mem._mem[8][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99258 q=soc.cpu.minerva.gprf.mem._mem[8][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99260 q=soc.cpu.minerva.gprf.mem._mem[8][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99262 q=soc.cpu.minerva.gprf.mem._mem[8][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99264 q=soc.cpu.minerva.gprf.mem._mem[8][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99266 q=soc.cpu.minerva.gprf.mem._mem[8][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99268 q=soc.cpu.minerva.gprf.mem._mem[8][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99270 q=soc.cpu.minerva.gprf.mem._mem[8][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99272 q=soc.cpu.minerva.gprf.mem._mem[8][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99274 q=soc.cpu.minerva.gprf.mem._mem[8][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99276 q=soc.cpu.minerva.gprf.mem._mem[8][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99278 q=soc.cpu.minerva.gprf.mem._mem[8][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99280 q=soc.cpu.minerva.gprf.mem._mem[8][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99282 q=soc.cpu.minerva.gprf.mem._mem[8][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99284 q=soc.cpu.minerva.gprf.mem._mem[8][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99286 q=soc.cpu.minerva.gprf.mem._mem[8][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99288 q=soc.ram.ram[101][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99290 q=soc.ram.ram[101][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99292 q=soc.ram.ram[101][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99294 q=soc.ram.ram[101][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99296 q=soc.ram.ram[101][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99298 q=soc.ram.ram[101][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99300 q=soc.ram.ram[101][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99302 q=soc.ram.ram[101][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99304 q=soc.ram.ram[102][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99306 q=soc.ram.ram[102][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99308 q=soc.ram.ram[102][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99310 q=soc.ram.ram[102][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99312 q=soc.ram.ram[102][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99314 q=soc.ram.ram[102][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99316 q=soc.ram.ram[102][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99318 q=soc.ram.ram[102][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99320 q=soc.ram.ram[43][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99322 q=soc.ram.ram[43][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99324 q=soc.ram.ram[43][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99326 q=soc.ram.ram[43][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99328 q=soc.ram.ram[43][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99330 q=soc.ram.ram[43][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99332 q=soc.ram.ram[43][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99334 q=soc.ram.ram[43][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99336 q=soc.ram.ram[45][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99338 q=soc.ram.ram[45][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99340 q=soc.ram.ram[45][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99342 q=soc.ram.ram[45][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99344 q=soc.ram.ram[45][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99346 q=soc.ram.ram[45][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99348 q=soc.ram.ram[45][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99350 q=soc.ram.ram[45][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99352 q=soc.ram.ram[13][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99354 q=soc.ram.ram[13][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99356 q=soc.ram.ram[13][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99358 q=soc.ram.ram[13][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99360 q=soc.ram.ram[13][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99362 q=soc.ram.ram[13][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99364 q=soc.ram.ram[13][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99366 q=soc.ram.ram[13][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99368 q=soc.cpu.minerva.gprf.mem._mem[7][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99370 q=soc.cpu.minerva.gprf.mem._mem[7][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99372 q=soc.cpu.minerva.gprf.mem._mem[7][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99374 q=soc.cpu.minerva.gprf.mem._mem[7][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99376 q=soc.cpu.minerva.gprf.mem._mem[7][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99378 q=soc.cpu.minerva.gprf.mem._mem[7][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99380 q=soc.cpu.minerva.gprf.mem._mem[7][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99382 q=soc.cpu.minerva.gprf.mem._mem[7][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99384 q=soc.cpu.minerva.gprf.mem._mem[7][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99386 q=soc.cpu.minerva.gprf.mem._mem[7][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99388 q=soc.cpu.minerva.gprf.mem._mem[7][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99390 q=soc.cpu.minerva.gprf.mem._mem[7][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99392 q=soc.cpu.minerva.gprf.mem._mem[7][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99394 q=soc.cpu.minerva.gprf.mem._mem[7][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99396 q=soc.cpu.minerva.gprf.mem._mem[7][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99398 q=soc.cpu.minerva.gprf.mem._mem[7][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99400 q=soc.cpu.minerva.gprf.mem._mem[7][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99402 q=soc.cpu.minerva.gprf.mem._mem[7][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99404 q=soc.cpu.minerva.gprf.mem._mem[7][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99406 q=soc.cpu.minerva.gprf.mem._mem[7][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99408 q=soc.cpu.minerva.gprf.mem._mem[7][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99410 q=soc.cpu.minerva.gprf.mem._mem[7][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99412 q=soc.cpu.minerva.gprf.mem._mem[7][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99414 q=soc.cpu.minerva.gprf.mem._mem[7][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99416 q=soc.cpu.minerva.gprf.mem._mem[7][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99418 q=soc.cpu.minerva.gprf.mem._mem[7][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99420 q=soc.cpu.minerva.gprf.mem._mem[7][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99422 q=soc.cpu.minerva.gprf.mem._mem[7][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99424 q=soc.cpu.minerva.gprf.mem._mem[7][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99426 q=soc.cpu.minerva.gprf.mem._mem[7][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99428 q=soc.cpu.minerva.gprf.mem._mem[7][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99430 q=soc.cpu.minerva.gprf.mem._mem[7][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99432 q=soc.ram.ram[101][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99434 q=soc.ram.ram[101][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99436 q=soc.ram.ram[101][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99438 q=soc.ram.ram[101][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99440 q=soc.ram.ram[101][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99442 q=soc.ram.ram[101][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99444 q=soc.ram.ram[101][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99446 q=soc.ram.ram[101][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99448 q=soc.ram.ram[76][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99450 q=soc.ram.ram[76][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99452 q=soc.ram.ram[76][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99454 q=soc.ram.ram[76][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99456 q=soc.ram.ram[76][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99458 q=soc.ram.ram[76][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99460 q=soc.ram.ram[76][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99462 q=soc.ram.ram[76][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99464 q=soc.ram.ram[108][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99466 q=soc.ram.ram[108][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99468 q=soc.ram.ram[108][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99470 q=soc.ram.ram[108][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99472 q=soc.ram.ram[108][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99474 q=soc.ram.ram[108][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99476 q=soc.ram.ram[108][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99478 q=soc.ram.ram[108][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99482 q=soc.tx_fifo.r_rdy
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99484 q=soc.cpu.minerva.gprf.mem._mem[28][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99486 q=soc.cpu.minerva.gprf.mem._mem[28][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99488 q=soc.cpu.minerva.gprf.mem._mem[28][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99490 q=soc.cpu.minerva.gprf.mem._mem[28][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99492 q=soc.cpu.minerva.gprf.mem._mem[28][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99494 q=soc.cpu.minerva.gprf.mem._mem[28][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99496 q=soc.cpu.minerva.gprf.mem._mem[28][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99498 q=soc.cpu.minerva.gprf.mem._mem[28][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99500 q=soc.cpu.minerva.gprf.mem._mem[28][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99502 q=soc.cpu.minerva.gprf.mem._mem[28][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99504 q=soc.cpu.minerva.gprf.mem._mem[28][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99506 q=soc.cpu.minerva.gprf.mem._mem[28][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99508 q=soc.cpu.minerva.gprf.mem._mem[28][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99510 q=soc.cpu.minerva.gprf.mem._mem[28][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99512 q=soc.cpu.minerva.gprf.mem._mem[28][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99514 q=soc.cpu.minerva.gprf.mem._mem[28][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99516 q=soc.cpu.minerva.gprf.mem._mem[28][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99518 q=soc.cpu.minerva.gprf.mem._mem[28][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99520 q=soc.cpu.minerva.gprf.mem._mem[28][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99522 q=soc.cpu.minerva.gprf.mem._mem[28][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99524 q=soc.cpu.minerva.gprf.mem._mem[28][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99526 q=soc.cpu.minerva.gprf.mem._mem[28][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99528 q=soc.cpu.minerva.gprf.mem._mem[28][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99530 q=soc.cpu.minerva.gprf.mem._mem[28][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99532 q=soc.cpu.minerva.gprf.mem._mem[28][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99534 q=soc.cpu.minerva.gprf.mem._mem[28][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99536 q=soc.cpu.minerva.gprf.mem._mem[28][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99538 q=soc.cpu.minerva.gprf.mem._mem[28][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99540 q=soc.cpu.minerva.gprf.mem._mem[28][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99542 q=soc.cpu.minerva.gprf.mem._mem[28][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99544 q=soc.cpu.minerva.gprf.mem._mem[28][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99546 q=soc.cpu.minerva.gprf.mem._mem[28][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99548 q=soc.timer.bridge.csr_mux_1.timer_ev_enable__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99552 q=soc.tx_fifo.unbuffered.level[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99556 q=soc.tx_fifo.unbuffered.level[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99560 q=soc.tx_fifo.unbuffered.consume[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99564 q=soc.tx_fifo.unbuffered.consume[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99568 q=soc.tx_fifo.unbuffered.produce[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99572 q=soc.tx_fifo.unbuffered.produce[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99574 q=soc.tx_fifo.unbuffered.storage[2][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99576 q=soc.tx_fifo.unbuffered.storage[2][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99578 q=soc.tx_fifo.unbuffered.storage[2][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99580 q=soc.tx_fifo.unbuffered.storage[2][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99582 q=soc.tx_fifo.unbuffered.storage[2][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99584 q=soc.tx_fifo.unbuffered.storage[2][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99586 q=soc.tx_fifo.unbuffered.storage[2][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99588 q=soc.tx_fifo.unbuffered.storage[2][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99590 q=soc.ram.ram[100][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99592 q=soc.ram.ram[100][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99594 q=soc.ram.ram[100][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99596 q=soc.ram.ram[100][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99598 q=soc.ram.ram[100][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99600 q=soc.ram.ram[100][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99602 q=soc.ram.ram[100][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99604 q=soc.ram.ram[100][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99606 q=soc.cpu.minerva.gprf.mem._mem[4][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99608 q=soc.cpu.minerva.gprf.mem._mem[4][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99610 q=soc.cpu.minerva.gprf.mem._mem[4][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99612 q=soc.cpu.minerva.gprf.mem._mem[4][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99614 q=soc.cpu.minerva.gprf.mem._mem[4][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99616 q=soc.cpu.minerva.gprf.mem._mem[4][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99618 q=soc.cpu.minerva.gprf.mem._mem[4][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99620 q=soc.cpu.minerva.gprf.mem._mem[4][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99622 q=soc.cpu.minerva.gprf.mem._mem[4][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99624 q=soc.cpu.minerva.gprf.mem._mem[4][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99626 q=soc.cpu.minerva.gprf.mem._mem[4][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99628 q=soc.cpu.minerva.gprf.mem._mem[4][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99630 q=soc.cpu.minerva.gprf.mem._mem[4][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99632 q=soc.cpu.minerva.gprf.mem._mem[4][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99634 q=soc.cpu.minerva.gprf.mem._mem[4][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99636 q=soc.cpu.minerva.gprf.mem._mem[4][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99638 q=soc.cpu.minerva.gprf.mem._mem[4][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99640 q=soc.cpu.minerva.gprf.mem._mem[4][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99642 q=soc.cpu.minerva.gprf.mem._mem[4][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99644 q=soc.cpu.minerva.gprf.mem._mem[4][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99646 q=soc.cpu.minerva.gprf.mem._mem[4][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99648 q=soc.cpu.minerva.gprf.mem._mem[4][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99650 q=soc.cpu.minerva.gprf.mem._mem[4][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99652 q=soc.cpu.minerva.gprf.mem._mem[4][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99654 q=soc.cpu.minerva.gprf.mem._mem[4][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99656 q=soc.cpu.minerva.gprf.mem._mem[4][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99658 q=soc.cpu.minerva.gprf.mem._mem[4][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99660 q=soc.cpu.minerva.gprf.mem._mem[4][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99662 q=soc.cpu.minerva.gprf.mem._mem[4][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99664 q=soc.cpu.minerva.gprf.mem._mem[4][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99666 q=soc.cpu.minerva.gprf.mem._mem[4][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99668 q=soc.cpu.minerva.gprf.mem._mem[4][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99670 q=soc.ram.ram[100][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99672 q=soc.ram.ram[100][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99674 q=soc.ram.ram[100][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99676 q=soc.ram.ram[100][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99678 q=soc.ram.ram[100][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99680 q=soc.ram.ram[100][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99682 q=soc.ram.ram[100][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99684 q=soc.ram.ram[100][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99688 q=soc.timer.bridge_timer_ctr__r_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99692 q=soc.timer.bridge_timer_ctr__r_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99696 q=soc.timer.bridge_timer_ctr__r_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99700 q=soc.timer.bridge_timer_ctr__r_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99704 q=soc.timer.bridge_timer_ctr__r_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99708 q=soc.timer.bridge_timer_ctr__r_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99712 q=soc.timer.bridge_timer_ctr__r_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99716 q=soc.timer.bridge_timer_ctr__r_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99720 q=soc.timer.bridge_timer_ctr__r_data[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99724 q=soc.timer.bridge_timer_ctr__r_data[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99728 q=soc.timer.bridge_timer_ctr__r_data[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99732 q=soc.timer.bridge_timer_ctr__r_data[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99736 q=soc.timer.bridge_timer_ctr__r_data[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99740 q=soc.timer.bridge_timer_ctr__r_data[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99744 q=soc.timer.bridge_timer_ctr__r_data[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99748 q=soc.timer.bridge_timer_ctr__r_data[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99752 q=soc.timer.bridge_timer_ctr__r_data[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99756 q=soc.timer.bridge_timer_ctr__r_data[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99760 q=soc.timer.bridge_timer_ctr__r_data[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99764 q=soc.timer.bridge_timer_ctr__r_data[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99768 q=soc.timer.bridge_timer_ctr__r_data[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99772 q=soc.timer.bridge_timer_ctr__r_data[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99776 q=soc.timer.bridge_timer_ctr__r_data[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99780 q=soc.timer.bridge_timer_ctr__r_data[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99784 q=soc.timer.bridge_timer_ctr__r_data[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99788 q=soc.timer.bridge_timer_ctr__r_data[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99792 q=soc.timer.bridge_timer_ctr__r_data[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99796 q=soc.timer.bridge_timer_ctr__r_data[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99800 q=soc.timer.bridge_timer_ctr__r_data[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99804 q=soc.timer.bridge_timer_ctr__r_data[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99808 q=soc.timer.bridge_timer_ctr__r_data[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99812 q=soc.timer.bridge_timer_ctr__r_data[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99816 q=soc.timer.bridge_timer_reload__r_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99820 q=soc.timer.bridge_timer_reload__r_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99824 q=soc.timer.bridge_timer_reload__r_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99828 q=soc.timer.bridge_timer_reload__r_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99832 q=soc.timer.bridge_timer_reload__r_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99836 q=soc.timer.bridge_timer_reload__r_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99840 q=soc.timer.bridge_timer_reload__r_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99844 q=soc.timer.bridge_timer_reload__r_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99848 q=soc.timer.bridge_timer_reload__r_data[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99852 q=soc.timer.bridge_timer_reload__r_data[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99856 q=soc.timer.bridge_timer_reload__r_data[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99860 q=soc.timer.bridge_timer_reload__r_data[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99864 q=soc.timer.bridge_timer_reload__r_data[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99868 q=soc.timer.bridge_timer_reload__r_data[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99872 q=soc.timer.bridge_timer_reload__r_data[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99876 q=soc.timer.bridge_timer_reload__r_data[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99880 q=soc.timer.bridge_timer_reload__r_data[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99884 q=soc.timer.bridge_timer_reload__r_data[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99888 q=soc.timer.bridge_timer_reload__r_data[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99892 q=soc.timer.bridge_timer_reload__r_data[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99896 q=soc.timer.bridge_timer_reload__r_data[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99900 q=soc.timer.bridge_timer_reload__r_data[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99904 q=soc.timer.bridge_timer_reload__r_data[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99908 q=soc.timer.bridge_timer_reload__r_data[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99912 q=soc.timer.bridge_timer_reload__r_data[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99916 q=soc.timer.bridge_timer_reload__r_data[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99920 q=soc.timer.bridge_timer_reload__r_data[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99924 q=soc.timer.bridge_timer_reload__r_data[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99928 q=soc.timer.bridge_timer_reload__r_data[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99932 q=soc.timer.bridge_timer_reload__r_data[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99936 q=soc.timer.bridge_timer_reload__r_data[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99940 q=soc.timer.bridge_timer_reload__r_data[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99944 q=soc.timer.bridge_timer_en__r_data
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99946 q=soc.ram.ram[105][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99948 q=soc.ram.ram[105][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99950 q=soc.ram.ram[105][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99952 q=soc.ram.ram[105][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99954 q=soc.ram.ram[105][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99956 q=soc.ram.ram[105][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99958 q=soc.ram.ram[105][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99960 q=soc.ram.ram[105][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99962 q=soc.timer.bridge.csr_mux_0.timer_ctr__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99966 q=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99968 q=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99970 q=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99974 q=soc.timer.bridge.csr_mux_1.timer_ev_pending__shadow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99976 q=soc.timer.bridge.csr_mux_1.timer_ev_pending__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99980 q=soc.timer.bridge.csr_mux_1.timer_ev_enable__shadow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99982 q=soc.ram.ram[17][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99984 q=soc.ram.ram[17][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99986 q=soc.ram.ram[17][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99988 q=soc.ram.ram[17][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99990 q=soc.ram.ram[17][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99992 q=soc.ram.ram[17][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99994 q=soc.ram.ram[17][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99996 q=soc.ram.ram[17][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$99998 q=soc.ram.ram[103][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100000 q=soc.ram.ram[103][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100002 q=soc.ram.ram[103][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100004 q=soc.ram.ram[103][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100006 q=soc.ram.ram[103][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100008 q=soc.ram.ram[103][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100010 q=soc.ram.ram[103][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100012 q=soc.ram.ram[103][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100014 q=soc.ram.ram[1][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100016 q=soc.ram.ram[1][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100018 q=soc.ram.ram[1][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100020 q=soc.ram.ram[1][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100022 q=soc.ram.ram[1][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100024 q=soc.ram.ram[1][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100026 q=soc.ram.ram[1][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100028 q=soc.ram.ram[1][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100030 q=soc.ram.ram[16][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100032 q=soc.ram.ram[16][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100034 q=soc.ram.ram[16][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100036 q=soc.ram.ram[16][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100038 q=soc.ram.ram[16][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100040 q=soc.ram.ram[16][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100042 q=soc.ram.ram[16][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100044 q=soc.ram.ram[16][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100046 q=soc.cpu.minerva.gprf.mem._mem[5][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100048 q=soc.cpu.minerva.gprf.mem._mem[5][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100050 q=soc.cpu.minerva.gprf.mem._mem[5][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100052 q=soc.cpu.minerva.gprf.mem._mem[5][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100054 q=soc.cpu.minerva.gprf.mem._mem[5][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100056 q=soc.cpu.minerva.gprf.mem._mem[5][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100058 q=soc.cpu.minerva.gprf.mem._mem[5][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100060 q=soc.cpu.minerva.gprf.mem._mem[5][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100062 q=soc.cpu.minerva.gprf.mem._mem[5][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100064 q=soc.cpu.minerva.gprf.mem._mem[5][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100066 q=soc.cpu.minerva.gprf.mem._mem[5][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100068 q=soc.cpu.minerva.gprf.mem._mem[5][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100070 q=soc.cpu.minerva.gprf.mem._mem[5][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100072 q=soc.cpu.minerva.gprf.mem._mem[5][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100074 q=soc.cpu.minerva.gprf.mem._mem[5][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100076 q=soc.cpu.minerva.gprf.mem._mem[5][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100078 q=soc.cpu.minerva.gprf.mem._mem[5][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100080 q=soc.cpu.minerva.gprf.mem._mem[5][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100082 q=soc.cpu.minerva.gprf.mem._mem[5][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100084 q=soc.cpu.minerva.gprf.mem._mem[5][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100086 q=soc.cpu.minerva.gprf.mem._mem[5][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100088 q=soc.cpu.minerva.gprf.mem._mem[5][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100090 q=soc.cpu.minerva.gprf.mem._mem[5][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100092 q=soc.cpu.minerva.gprf.mem._mem[5][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100094 q=soc.cpu.minerva.gprf.mem._mem[5][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100096 q=soc.cpu.minerva.gprf.mem._mem[5][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100098 q=soc.cpu.minerva.gprf.mem._mem[5][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100100 q=soc.cpu.minerva.gprf.mem._mem[5][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100102 q=soc.cpu.minerva.gprf.mem._mem[5][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100104 q=soc.cpu.minerva.gprf.mem._mem[5][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100106 q=soc.cpu.minerva.gprf.mem._mem[5][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100108 q=soc.cpu.minerva.gprf.mem._mem[5][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100110 q=soc.timer.bridge.csr_bridge_1.wb__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100114 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100118 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100122 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100126 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100130 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100134 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100138 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100142 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100144 q=soc.timer.bridge.csr_mux_0.timer_reload__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100146 q=soc.timer.bridge.csr_mux_1.timer_ev_status__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100150 q=soc.timer.bridge.csr_mux_0.timer_en__shadow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100152 q=soc.timer.bridge.csr_mux_0.timer_en__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100156 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100160 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100164 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100168 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100172 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100176 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100180 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100184 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100186 q=soc.ram.ram[106][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100188 q=soc.ram.ram[106][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100190 q=soc.ram.ram[106][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100192 q=soc.ram.ram[106][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100194 q=soc.ram.ram[106][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100196 q=soc.ram.ram[106][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100198 q=soc.ram.ram[106][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100200 q=soc.ram.ram[106][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100204 q=soc.timer.bridge.csr_bridge_1.cycle[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100208 q=soc.timer.bridge.csr_bridge_1.cycle[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100212 q=soc.timer.bridge.csr_bridge_1.cycle[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100214 q=soc.timer.bridge.csr_bridge_0.wb__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100218 q=soc.timer.bridge.csr_bridge_1.wb__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100220 q=soc.ram.ram[46][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100222 q=soc.ram.ram[46][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100224 q=soc.ram.ram[46][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100226 q=soc.ram.ram[46][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100228 q=soc.ram.ram[46][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100230 q=soc.ram.ram[46][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100232 q=soc.ram.ram[46][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100234 q=soc.ram.ram[46][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100238 q=soc.timer.bridge.csr_bridge_0.cycle[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100242 q=soc.timer.bridge.csr_bridge_0.cycle[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100246 q=soc.timer.bridge.csr_bridge_0.cycle[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100250 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100254 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100258 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100262 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100266 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100270 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100274 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100278 q=soc.timer.bridge.csr_bridge_0.wb__dat_r[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100280 q=soc.timer.bridge._int_src.timer_ev_status__r_data
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100284 q=soc.timer.bridge._int_src.timer_ev_pending__r_data
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100288 q=soc.timer.bridge._int_src.timer_ev_enable__r_data
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100290 q=soc.cpu.minerva.gprf.mem._mem[30][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100292 q=soc.cpu.minerva.gprf.mem._mem[30][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100294 q=soc.cpu.minerva.gprf.mem._mem[30][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100296 q=soc.cpu.minerva.gprf.mem._mem[30][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100298 q=soc.cpu.minerva.gprf.mem._mem[30][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100300 q=soc.cpu.minerva.gprf.mem._mem[30][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100302 q=soc.cpu.minerva.gprf.mem._mem[30][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100304 q=soc.cpu.minerva.gprf.mem._mem[30][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100306 q=soc.cpu.minerva.gprf.mem._mem[30][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100308 q=soc.cpu.minerva.gprf.mem._mem[30][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100310 q=soc.cpu.minerva.gprf.mem._mem[30][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100312 q=soc.cpu.minerva.gprf.mem._mem[30][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100314 q=soc.cpu.minerva.gprf.mem._mem[30][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100316 q=soc.cpu.minerva.gprf.mem._mem[30][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100318 q=soc.cpu.minerva.gprf.mem._mem[30][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100320 q=soc.cpu.minerva.gprf.mem._mem[30][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100322 q=soc.cpu.minerva.gprf.mem._mem[30][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100324 q=soc.cpu.minerva.gprf.mem._mem[30][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100326 q=soc.cpu.minerva.gprf.mem._mem[30][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100328 q=soc.cpu.minerva.gprf.mem._mem[30][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100330 q=soc.cpu.minerva.gprf.mem._mem[30][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100332 q=soc.cpu.minerva.gprf.mem._mem[30][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100334 q=soc.cpu.minerva.gprf.mem._mem[30][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100336 q=soc.cpu.minerva.gprf.mem._mem[30][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100338 q=soc.cpu.minerva.gprf.mem._mem[30][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100340 q=soc.cpu.minerva.gprf.mem._mem[30][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100342 q=soc.cpu.minerva.gprf.mem._mem[30][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100344 q=soc.cpu.minerva.gprf.mem._mem[30][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100346 q=soc.cpu.minerva.gprf.mem._mem[30][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100348 q=soc.cpu.minerva.gprf.mem._mem[30][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100350 q=soc.cpu.minerva.gprf.mem._mem[30][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100352 q=soc.cpu.minerva.gprf.mem._mem[30][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100354 q=soc.ram.ram[108][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100356 q=soc.ram.ram[108][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100358 q=soc.ram.ram[108][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100360 q=soc.ram.ram[108][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100362 q=soc.ram.ram[108][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100364 q=soc.ram.ram[108][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100366 q=soc.ram.ram[108][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100368 q=soc.ram.ram[108][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100372 q=soc.rx_fifo.r_rdy
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100376 q=soc.rx_fifo.unbuffered.level[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100380 q=soc.rx_fifo.unbuffered.level[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100384 q=soc.rx_fifo.unbuffered.consume[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100388 q=soc.rx_fifo.unbuffered.consume[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100392 q=soc.rx_fifo.unbuffered.produce[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100396 q=soc.rx_fifo.unbuffered.produce[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100398 q=soc.rom.spimemio.xfer.obuffer[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100400 q=soc.rom.spimemio.xfer.obuffer[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100402 q=soc.rom.spimemio.xfer.obuffer[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100404 q=soc.rom.spimemio.xfer.obuffer[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100406 q=soc.rom.spimemio.xfer.obuffer[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100408 q=soc.rom.spimemio.xfer.obuffer[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100410 q=soc.rom.spimemio.xfer.obuffer[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100412 q=soc.cpu.minerva.gprf.mem._mem[2][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100414 q=soc.cpu.minerva.gprf.mem._mem[2][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100416 q=soc.cpu.minerva.gprf.mem._mem[2][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100418 q=soc.cpu.minerva.gprf.mem._mem[2][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100420 q=soc.cpu.minerva.gprf.mem._mem[2][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100422 q=soc.cpu.minerva.gprf.mem._mem[2][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100424 q=soc.cpu.minerva.gprf.mem._mem[2][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100426 q=soc.cpu.minerva.gprf.mem._mem[2][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100428 q=soc.cpu.minerva.gprf.mem._mem[2][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100430 q=soc.cpu.minerva.gprf.mem._mem[2][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100432 q=soc.cpu.minerva.gprf.mem._mem[2][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100434 q=soc.cpu.minerva.gprf.mem._mem[2][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100436 q=soc.cpu.minerva.gprf.mem._mem[2][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100438 q=soc.cpu.minerva.gprf.mem._mem[2][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100440 q=soc.cpu.minerva.gprf.mem._mem[2][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100442 q=soc.cpu.minerva.gprf.mem._mem[2][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100444 q=soc.cpu.minerva.gprf.mem._mem[2][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100446 q=soc.cpu.minerva.gprf.mem._mem[2][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100448 q=soc.cpu.minerva.gprf.mem._mem[2][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100450 q=soc.cpu.minerva.gprf.mem._mem[2][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100452 q=soc.cpu.minerva.gprf.mem._mem[2][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100454 q=soc.cpu.minerva.gprf.mem._mem[2][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100456 q=soc.cpu.minerva.gprf.mem._mem[2][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100458 q=soc.cpu.minerva.gprf.mem._mem[2][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100460 q=soc.cpu.minerva.gprf.mem._mem[2][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100462 q=soc.cpu.minerva.gprf.mem._mem[2][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100464 q=soc.cpu.minerva.gprf.mem._mem[2][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100466 q=soc.cpu.minerva.gprf.mem._mem[2][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100468 q=soc.cpu.minerva.gprf.mem._mem[2][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100470 q=soc.cpu.minerva.gprf.mem._mem[2][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100472 q=soc.cpu.minerva.gprf.mem._mem[2][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100474 q=soc.cpu.minerva.gprf.mem._mem[2][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100476 q=soc.ram.ram[108][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100478 q=soc.ram.ram[108][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100480 q=soc.ram.ram[108][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100482 q=soc.ram.ram[108][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100484 q=soc.ram.ram[108][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100486 q=soc.ram.ram[108][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100488 q=soc.ram.ram[108][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100490 q=soc.ram.ram[108][31]
+.subckt dff_x1 clk=io_in[0] i=io_in[28] q=soc.rx.U$$0.stage0
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100494 q=soc.rx.bitno[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100498 q=soc.rx.bitno[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100502 q=soc.rx.bitno[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100506 q=soc.rx.bitno[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100510 q=soc.rx.timer[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100514 q=soc.rx.timer[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100518 q=soc.rx.timer[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100522 q=soc.rx.timer[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100526 q=soc.rx.timer[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100530 q=soc.rx.timer[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100534 q=soc.rx.timer[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100538 q=soc.rx.timer[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100542 q=soc.rx.timer[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100546 q=soc.rx.timer[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100550 q=soc.rx.timer[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100554 q=soc.rx.timer[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100558 q=soc.rx.fsm_state[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100562 q=soc.rx.fsm_state[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100566 q=soc.rx.shreg__stop
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100570 q=soc.rx.shreg__data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100574 q=soc.rx.shreg__data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100578 q=soc.rx.shreg__data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100582 q=soc.rx.shreg__data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100586 q=soc.rx.shreg__data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100590 q=soc.rx.shreg__data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100594 q=soc.rx.shreg__data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100598 q=soc.rx.shreg__data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100602 q=soc.rx.shreg__start
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100606 q=soc.rx.data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100610 q=soc.rx.data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100614 q=soc.rx.data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100618 q=soc.rx.data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100622 q=soc.rx.data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100626 q=soc.rx.data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100630 q=soc.rx.data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100634 q=soc.rx.data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100638 q=soc.rx.err__frame
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100640 q=soc.rom.spimemio.xfer.last_fetch
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100644 q=soc.rx.err__overflow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100648 q=soc.rx.rdy
+.subckt dff_x1 clk=io_in[0] i=soc.rx.U$$0.stage0 q=soc.rx.U$$0.stage1
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100650 q=soc.cpu.minerva.gprf.mem._mem[19][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100652 q=soc.cpu.minerva.gprf.mem._mem[19][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100654 q=soc.cpu.minerva.gprf.mem._mem[19][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100656 q=soc.cpu.minerva.gprf.mem._mem[19][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100658 q=soc.cpu.minerva.gprf.mem._mem[19][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100660 q=soc.cpu.minerva.gprf.mem._mem[19][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100662 q=soc.cpu.minerva.gprf.mem._mem[19][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100664 q=soc.cpu.minerva.gprf.mem._mem[19][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100666 q=soc.cpu.minerva.gprf.mem._mem[19][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100668 q=soc.cpu.minerva.gprf.mem._mem[19][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100670 q=soc.cpu.minerva.gprf.mem._mem[19][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100672 q=soc.cpu.minerva.gprf.mem._mem[19][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100674 q=soc.cpu.minerva.gprf.mem._mem[19][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100676 q=soc.cpu.minerva.gprf.mem._mem[19][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100678 q=soc.cpu.minerva.gprf.mem._mem[19][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100680 q=soc.cpu.minerva.gprf.mem._mem[19][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100682 q=soc.cpu.minerva.gprf.mem._mem[19][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100684 q=soc.cpu.minerva.gprf.mem._mem[19][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100686 q=soc.cpu.minerva.gprf.mem._mem[19][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100688 q=soc.cpu.minerva.gprf.mem._mem[19][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100690 q=soc.cpu.minerva.gprf.mem._mem[19][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100692 q=soc.cpu.minerva.gprf.mem._mem[19][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100694 q=soc.cpu.minerva.gprf.mem._mem[19][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100696 q=soc.cpu.minerva.gprf.mem._mem[19][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100698 q=soc.cpu.minerva.gprf.mem._mem[19][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100700 q=soc.cpu.minerva.gprf.mem._mem[19][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100702 q=soc.cpu.minerva.gprf.mem._mem[19][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100704 q=soc.cpu.minerva.gprf.mem._mem[19][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100706 q=soc.cpu.minerva.gprf.mem._mem[19][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100708 q=soc.cpu.minerva.gprf.mem._mem[19][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100710 q=soc.cpu.minerva.gprf.mem._mem[19][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100712 q=soc.cpu.minerva.gprf.mem._mem[19][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100716 q=soc.rom.read_active
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100718 q=soc.ram.bus__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100720 q=soc.ram.ram[19][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100722 q=soc.ram.ram[19][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100724 q=soc.ram.ram[19][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100726 q=soc.ram.ram[19][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100728 q=soc.ram.ram[19][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100730 q=soc.ram.ram[19][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100732 q=soc.ram.ram[19][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100734 q=soc.ram.ram[19][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100738 q=soc.bridge.csr_mux_0.uart_rx_err__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100742 q=soc.bridge.csr_mux_0.uart_rx_err__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100744 q=soc.ram.ram[1][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100746 q=soc.ram.ram[1][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100748 q=soc.ram.ram[1][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100750 q=soc.ram.ram[1][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100752 q=soc.ram.ram[1][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100754 q=soc.ram.ram[1][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100756 q=soc.ram.ram[1][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100758 q=soc.ram.ram[1][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100760 q=soc.rom.bridge.csr_bridge_0.wb__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100762 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow_en
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100766 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100770 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100774 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100778 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100782 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100786 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100790 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100794 q=soc.rom.bridge.csr_mux_0.rom_cfg0__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100796 q=soc.rom.bridge.csr_mux_0.rom_cfg0__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100798 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow_en
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100802 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100806 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100810 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100814 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100818 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100822 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100826 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100830 q=soc.rom.bridge.csr_mux_0.rom_cfg1__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100832 q=soc.rom.bridge.csr_mux_0.rom_cfg1__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100834 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow_en
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100838 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100842 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100846 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100850 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100854 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100858 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100862 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100866 q=soc.rom.bridge.csr_mux_0.rom_cfg2__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100868 q=soc.rom.bridge.csr_mux_0.rom_cfg2__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100870 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow_en
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100874 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100878 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100882 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100886 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100890 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100894 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100898 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100902 q=soc.rom.bridge.csr_mux_0.rom_cfg3__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100904 q=soc.cpu.minerva.gprf.mem._mem[22][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100906 q=soc.cpu.minerva.gprf.mem._mem[22][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100908 q=soc.cpu.minerva.gprf.mem._mem[22][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100910 q=soc.cpu.minerva.gprf.mem._mem[22][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100912 q=soc.cpu.minerva.gprf.mem._mem[22][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100914 q=soc.cpu.minerva.gprf.mem._mem[22][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100916 q=soc.cpu.minerva.gprf.mem._mem[22][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100918 q=soc.cpu.minerva.gprf.mem._mem[22][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100920 q=soc.cpu.minerva.gprf.mem._mem[22][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100922 q=soc.cpu.minerva.gprf.mem._mem[22][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100924 q=soc.cpu.minerva.gprf.mem._mem[22][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100926 q=soc.cpu.minerva.gprf.mem._mem[22][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100928 q=soc.cpu.minerva.gprf.mem._mem[22][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100930 q=soc.cpu.minerva.gprf.mem._mem[22][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100932 q=soc.cpu.minerva.gprf.mem._mem[22][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100934 q=soc.cpu.minerva.gprf.mem._mem[22][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100936 q=soc.cpu.minerva.gprf.mem._mem[22][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100938 q=soc.cpu.minerva.gprf.mem._mem[22][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100940 q=soc.cpu.minerva.gprf.mem._mem[22][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100942 q=soc.cpu.minerva.gprf.mem._mem[22][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100944 q=soc.cpu.minerva.gprf.mem._mem[22][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100946 q=soc.cpu.minerva.gprf.mem._mem[22][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100948 q=soc.cpu.minerva.gprf.mem._mem[22][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100950 q=soc.cpu.minerva.gprf.mem._mem[22][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100952 q=soc.cpu.minerva.gprf.mem._mem[22][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100954 q=soc.cpu.minerva.gprf.mem._mem[22][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100956 q=soc.cpu.minerva.gprf.mem._mem[22][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100958 q=soc.cpu.minerva.gprf.mem._mem[22][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100960 q=soc.cpu.minerva.gprf.mem._mem[22][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100962 q=soc.cpu.minerva.gprf.mem._mem[22][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100964 q=soc.cpu.minerva.gprf.mem._mem[22][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100966 q=soc.cpu.minerva.gprf.mem._mem[22][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100970 q=soc.rom.bridge.csr_bridge_0.cycle[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100974 q=soc.rom.bridge.csr_bridge_0.cycle[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100978 q=soc.rom.bridge.csr_bridge_0.cycle[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100982 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100986 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100990 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100994 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$100998 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101002 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101006 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101010 q=soc.rom.bridge.csr_bridge_0.wb__dat_r[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101012 q=soc.rom.data_bus__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101014 q=soc.rom.spimemio.softreset
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101018 q=soc.rom.spimemio.xfer.flash_clk
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101022 q=soc.rom.spimemio.xfer.flash_csb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101026 q=soc.rom.spimemio.xfer.xfer_dspi
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101030 q=soc.rom.spimemio.xfer.xfer_ddr
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101032 q=soc.rom.spimemio.xfer.fetch
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101036 q=soc.rom.spimemio.xfer.count[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101040 q=soc.rom.spimemio.xfer.dummy_count[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101044 q=soc.rom.spimemio.xfer.dummy_count[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101048 q=soc.rom.spimemio.xfer.dummy_count[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101052 q=soc.rom.spimemio.xfer.dummy_count[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101056 q=soc.rom.spimemio.xfer.xfer_qspi
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101060 q=soc.rom.spimemio.xfer.xfer_rd
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101062 q=soc.rom.spimemio.dout_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101064 q=soc.rom.spimemio.dout_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101066 q=soc.rom.spimemio.dout_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101068 q=soc.rom.spimemio.dout_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101070 q=soc.rom.spimemio.dout_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101072 q=soc.rom.spimemio.dout_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101074 q=soc.rom.spimemio.dout_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101076 q=soc.rom.spimemio.dout_data[7]
+.subckt dff_x1 clk=io_in[0] i=soc.rom.spimemio.xfer.xfer_ddr q=soc.rom.spimemio.xfer.xfer_ddr_q
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101080 q=soc.rom.spimemio.config_do[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101084 q=soc.rom.spimemio.config_do[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101088 q=soc.rom.spimemio.config_do[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101092 q=soc.rom.spimemio.config_do[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101096 q=soc.rom.spimemio.config_clk
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101100 q=soc.rom.spimemio.config_csb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101104 q=soc.rom.spimemio.config_oe[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101108 q=soc.rom.spimemio.config_oe[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101112 q=soc.rom.spimemio.config_oe[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101116 q=soc.rom.spimemio.config_oe[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101120 q=soc.rom.cfgreg_do[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101124 q=soc.rom.cfgreg_do[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101128 q=soc.rom.cfgreg_do[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101132 q=soc.rom.cfgreg_do[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101136 q=soc.rom.spimemio.config_cont
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101140 q=soc.rom.spimemio.config_qspi
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101144 q=soc.rom.spimemio.config_ddr
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101148 q=soc.rom.spimemio.config_en
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101150 q=soc.rom.spimemio.buffer[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101152 q=soc.rom.spimemio.buffer[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101154 q=soc.rom.spimemio.buffer[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101156 q=soc.rom.spimemio.buffer[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101158 q=soc.rom.spimemio.buffer[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101160 q=soc.rom.spimemio.buffer[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101162 q=soc.rom.spimemio.buffer[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101164 q=soc.rom.spimemio.buffer[23]
+.subckt dff_x1 clk=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io3_do q=soc.rom.spimemio.xfer_io3_90
+.subckt dff_x1 clk=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io2_do q=soc.rom.spimemio.xfer_io2_90
+.subckt dff_x1 clk=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io1_do q=soc.rom.spimemio.xfer_io1_90
+.subckt dff_x1 clk=$abc$109383$auto$rtlil.cc:2506:NotGate$101166 i=soc.rom.spimemio.xfer.flash_io0_do q=soc.rom.spimemio.xfer_io0_90
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101176 q=soc.rom.spimemio.rd_inc
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101180 q=soc.rom.spimemio.rd_wait
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101184 q=soc.rom.spimemio.rd_valid
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101186 q=soc.rom.spimemio.din_ddr
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101190 q=soc.rom.spimemio.din_rd
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101192 q=soc.rom.spimemio.din_qspi
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101196 q=soc.rom.spimemio.xfer.obuffer[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101198 q=soc.rom.spimemio.xfer.resetn
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101200 q=soc.decoder.data_bus__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101202 q=soc.decoder.data_bus__dat_r[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101204 q=soc.decoder.data_bus__dat_r[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101206 q=soc.decoder.data_bus__dat_r[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101208 q=soc.decoder.data_bus__dat_r[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101210 q=soc.decoder.data_bus__dat_r[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101212 q=soc.decoder.data_bus__dat_r[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101214 q=soc.decoder.data_bus__dat_r[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101216 q=soc.decoder.data_bus__dat_r[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101218 q=soc.decoder.data_bus__dat_r[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101220 q=soc.decoder.data_bus__dat_r[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101222 q=soc.decoder.data_bus__dat_r[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101224 q=soc.decoder.data_bus__dat_r[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101226 q=soc.decoder.data_bus__dat_r[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101228 q=soc.decoder.data_bus__dat_r[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101230 q=soc.decoder.data_bus__dat_r[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101232 q=soc.decoder.data_bus__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101234 q=soc.decoder.data_bus__dat_r[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101236 q=soc.decoder.data_bus__dat_r[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101238 q=soc.decoder.data_bus__dat_r[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101240 q=soc.decoder.data_bus__dat_r[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101242 q=soc.decoder.data_bus__dat_r[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101244 q=soc.decoder.data_bus__dat_r[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101246 q=soc.decoder.data_bus__dat_r[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101248 q=soc.decoder.data_bus__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101250 q=soc.decoder.data_bus__dat_r[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101252 q=soc.decoder.data_bus__dat_r[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101254 q=soc.decoder.data_bus__dat_r[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101256 q=soc.decoder.data_bus__dat_r[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101258 q=soc.decoder.data_bus__dat_r[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101260 q=soc.decoder.data_bus__dat_r[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101262 q=soc.decoder.data_bus__dat_r[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101264 q=soc.rom.bridge.csr_mux_0.rom_cfg3__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101266 q=soc.cpu.minerva.gprf.mem._mem[20][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101268 q=soc.cpu.minerva.gprf.mem._mem[20][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101270 q=soc.cpu.minerva.gprf.mem._mem[20][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101272 q=soc.cpu.minerva.gprf.mem._mem[20][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101274 q=soc.cpu.minerva.gprf.mem._mem[20][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101276 q=soc.cpu.minerva.gprf.mem._mem[20][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101278 q=soc.cpu.minerva.gprf.mem._mem[20][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101280 q=soc.cpu.minerva.gprf.mem._mem[20][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101282 q=soc.cpu.minerva.gprf.mem._mem[20][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101284 q=soc.cpu.minerva.gprf.mem._mem[20][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101286 q=soc.cpu.minerva.gprf.mem._mem[20][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101288 q=soc.cpu.minerva.gprf.mem._mem[20][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101290 q=soc.cpu.minerva.gprf.mem._mem[20][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101292 q=soc.cpu.minerva.gprf.mem._mem[20][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101294 q=soc.cpu.minerva.gprf.mem._mem[20][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101296 q=soc.cpu.minerva.gprf.mem._mem[20][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101298 q=soc.cpu.minerva.gprf.mem._mem[20][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101300 q=soc.cpu.minerva.gprf.mem._mem[20][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101302 q=soc.cpu.minerva.gprf.mem._mem[20][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101304 q=soc.cpu.minerva.gprf.mem._mem[20][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101306 q=soc.cpu.minerva.gprf.mem._mem[20][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101308 q=soc.cpu.minerva.gprf.mem._mem[20][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101310 q=soc.cpu.minerva.gprf.mem._mem[20][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101312 q=soc.cpu.minerva.gprf.mem._mem[20][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101314 q=soc.cpu.minerva.gprf.mem._mem[20][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101316 q=soc.cpu.minerva.gprf.mem._mem[20][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101318 q=soc.cpu.minerva.gprf.mem._mem[20][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101320 q=soc.cpu.minerva.gprf.mem._mem[20][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101322 q=soc.cpu.minerva.gprf.mem._mem[20][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101324 q=soc.cpu.minerva.gprf.mem._mem[20][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101326 q=soc.cpu.minerva.gprf.mem._mem[20][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101328 q=soc.cpu.minerva.gprf.mem._mem[20][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101330 q=soc.ram.ram[14][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101332 q=soc.ram.ram[14][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101334 q=soc.ram.ram[14][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101336 q=soc.ram.ram[14][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101338 q=soc.ram.ram[14][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101340 q=soc.ram.ram[14][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101342 q=soc.ram.ram[14][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101344 q=soc.ram.ram[14][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101346 q=soc.ram.ram[104][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101348 q=soc.ram.ram[104][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101350 q=soc.ram.ram[104][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101352 q=soc.ram.ram[104][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101354 q=soc.ram.ram[104][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101356 q=soc.ram.ram[104][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101358 q=soc.ram.ram[104][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101360 q=soc.ram.ram[104][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101362 q=soc.ram.ram[46][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101364 q=soc.ram.ram[46][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101366 q=soc.ram.ram[46][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101368 q=soc.ram.ram[46][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101370 q=soc.ram.ram[46][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101372 q=soc.ram.ram[46][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101374 q=soc.ram.ram[46][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101376 q=soc.ram.ram[46][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101378 q=soc.ram.ram[105][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101380 q=soc.ram.ram[105][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101382 q=soc.ram.ram[105][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101384 q=soc.ram.ram[105][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101386 q=soc.ram.ram[105][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101388 q=soc.ram.ram[105][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101390 q=soc.ram.ram[105][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101392 q=soc.ram.ram[105][23]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[0] q=soc.cpu.minerva.gprf.mem._0_[0]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[1] q=soc.cpu.minerva.gprf.mem._0_[1]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[2] q=soc.cpu.minerva.gprf.mem._0_[2]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[3] q=soc.cpu.minerva.gprf.mem._0_[3]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[4] q=soc.cpu.minerva.gprf.mem._0_[4]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[5] q=soc.cpu.minerva.gprf.mem._0_[5]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[6] q=soc.cpu.minerva.gprf.mem._0_[6]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[7] q=soc.cpu.minerva.gprf.mem._0_[7]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[8] q=soc.cpu.minerva.gprf.mem._0_[8]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[9] q=soc.cpu.minerva.gprf.mem._0_[9]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[10] q=soc.cpu.minerva.gprf.mem._0_[10]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[11] q=soc.cpu.minerva.gprf.mem._0_[11]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[12] q=soc.cpu.minerva.gprf.mem._0_[12]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[13] q=soc.cpu.minerva.gprf.mem._0_[13]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[14] q=soc.cpu.minerva.gprf.mem._0_[14]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[15] q=soc.cpu.minerva.gprf.mem._0_[15]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[16] q=soc.cpu.minerva.gprf.mem._0_[16]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[17] q=soc.cpu.minerva.gprf.mem._0_[17]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[18] q=soc.cpu.minerva.gprf.mem._0_[18]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[19] q=soc.cpu.minerva.gprf.mem._0_[19]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[20] q=soc.cpu.minerva.gprf.mem._0_[20]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[21] q=soc.cpu.minerva.gprf.mem._0_[21]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[22] q=soc.cpu.minerva.gprf.mem._0_[22]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[23] q=soc.cpu.minerva.gprf.mem._0_[23]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[24] q=soc.cpu.minerva.gprf.mem._0_[24]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[25] q=soc.cpu.minerva.gprf.mem._0_[25]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[26] q=soc.cpu.minerva.gprf.mem._0_[26]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[27] q=soc.cpu.minerva.gprf.mem._0_[27]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[28] q=soc.cpu.minerva.gprf.mem._0_[28]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[29] q=soc.cpu.minerva.gprf.mem._0_[29]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[30] q=soc.cpu.minerva.gprf.mem._0_[30]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[1]$d[31] q=soc.cpu.minerva.gprf.mem._0_[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101394 q=soc.ram.ram[118][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101396 q=soc.ram.ram[118][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101398 q=soc.ram.ram[118][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101400 q=soc.ram.ram[118][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101402 q=soc.ram.ram[118][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101404 q=soc.ram.ram[118][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101406 q=soc.ram.ram[118][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101408 q=soc.ram.ram[118][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101410 q=soc.ram.ram[118][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101412 q=soc.ram.ram[118][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101414 q=soc.ram.ram[118][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101416 q=soc.ram.ram[118][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101418 q=soc.ram.ram[118][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101420 q=soc.ram.ram[118][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101422 q=soc.ram.ram[118][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101424 q=soc.ram.ram[118][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101426 q=soc.ram.ram[118][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101428 q=soc.ram.ram[118][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101430 q=soc.ram.ram[118][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101432 q=soc.ram.ram[118][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101434 q=soc.ram.ram[118][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101436 q=soc.ram.ram[118][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101438 q=soc.ram.ram[118][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101440 q=soc.ram.ram[118][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101442 q=soc.ram.ram[117][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101444 q=soc.ram.ram[117][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101446 q=soc.ram.ram[117][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101448 q=soc.ram.ram[117][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101450 q=soc.ram.ram[117][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101452 q=soc.ram.ram[117][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101454 q=soc.ram.ram[117][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101456 q=soc.ram.ram[117][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101458 q=soc.ram.ram[117][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101460 q=soc.ram.ram[117][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101462 q=soc.ram.ram[117][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101464 q=soc.ram.ram[117][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101466 q=soc.ram.ram[117][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101468 q=soc.ram.ram[117][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101470 q=soc.ram.ram[117][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101472 q=soc.ram.ram[117][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101474 q=soc.ram.ram[117][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101476 q=soc.ram.ram[117][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101478 q=soc.ram.ram[117][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101480 q=soc.ram.ram[117][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101482 q=soc.ram.ram[117][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101484 q=soc.ram.ram[117][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101486 q=soc.ram.ram[117][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101488 q=soc.ram.ram[117][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101490 q=soc.ram.ram[116][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101492 q=soc.ram.ram[116][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101494 q=soc.ram.ram[116][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101496 q=soc.ram.ram[116][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101498 q=soc.ram.ram[116][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101500 q=soc.ram.ram[116][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101502 q=soc.ram.ram[116][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101504 q=soc.ram.ram[116][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101506 q=soc.ram.ram[116][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101508 q=soc.ram.ram[116][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101510 q=soc.ram.ram[116][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101512 q=soc.ram.ram[116][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101514 q=soc.ram.ram[116][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101516 q=soc.ram.ram[116][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101518 q=soc.ram.ram[116][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101520 q=soc.ram.ram[116][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101522 q=soc.ram.ram[116][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101524 q=soc.ram.ram[116][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101526 q=soc.ram.ram[116][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101528 q=soc.ram.ram[116][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101530 q=soc.ram.ram[116][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101532 q=soc.ram.ram[116][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101534 q=soc.ram.ram[116][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101536 q=soc.ram.ram[116][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101538 q=soc.ram.ram[115][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101540 q=soc.ram.ram[115][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101542 q=soc.ram.ram[115][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101544 q=soc.ram.ram[115][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101546 q=soc.ram.ram[115][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101548 q=soc.ram.ram[115][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101550 q=soc.ram.ram[115][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101552 q=soc.ram.ram[115][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101554 q=soc.ram.ram[115][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101556 q=soc.ram.ram[115][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101558 q=soc.ram.ram[115][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101560 q=soc.ram.ram[115][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101562 q=soc.ram.ram[115][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101564 q=soc.ram.ram[115][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101566 q=soc.ram.ram[115][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101568 q=soc.ram.ram[115][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101570 q=soc.ram.ram[115][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101572 q=soc.ram.ram[115][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101574 q=soc.ram.ram[115][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101576 q=soc.ram.ram[115][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101578 q=soc.ram.ram[115][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101580 q=soc.ram.ram[115][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101582 q=soc.ram.ram[115][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101584 q=soc.ram.ram[115][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101586 q=soc.ram.ram[114][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101588 q=soc.ram.ram[114][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101590 q=soc.ram.ram[114][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101592 q=soc.ram.ram[114][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101594 q=soc.ram.ram[114][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101596 q=soc.ram.ram[114][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101598 q=soc.ram.ram[114][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101600 q=soc.ram.ram[114][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101602 q=soc.ram.ram[114][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101604 q=soc.ram.ram[114][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101606 q=soc.ram.ram[114][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101608 q=soc.ram.ram[114][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101610 q=soc.ram.ram[114][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101612 q=soc.ram.ram[114][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101614 q=soc.ram.ram[114][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101616 q=soc.ram.ram[114][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101618 q=soc.ram.ram[114][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101620 q=soc.ram.ram[114][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101622 q=soc.ram.ram[114][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101624 q=soc.ram.ram[114][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101626 q=soc.ram.ram[114][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101628 q=soc.ram.ram[114][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101630 q=soc.ram.ram[114][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101632 q=soc.ram.ram[114][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101634 q=soc.ram.ram[113][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101636 q=soc.ram.ram[113][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101638 q=soc.ram.ram[113][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101640 q=soc.ram.ram[113][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101642 q=soc.ram.ram[113][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101644 q=soc.ram.ram[113][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101646 q=soc.ram.ram[113][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101648 q=soc.ram.ram[113][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101650 q=soc.ram.ram[113][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101652 q=soc.ram.ram[113][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101654 q=soc.ram.ram[113][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101656 q=soc.ram.ram[113][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101658 q=soc.ram.ram[113][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101660 q=soc.ram.ram[113][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101662 q=soc.ram.ram[113][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101664 q=soc.ram.ram[113][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101666 q=soc.ram.ram[113][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101668 q=soc.ram.ram[113][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101670 q=soc.ram.ram[113][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101672 q=soc.ram.ram[113][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101674 q=soc.ram.ram[113][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101676 q=soc.ram.ram[113][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101678 q=soc.ram.ram[113][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101680 q=soc.ram.ram[113][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101682 q=soc.ram.ram[112][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101684 q=soc.ram.ram[112][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101686 q=soc.ram.ram[112][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101688 q=soc.ram.ram[112][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101690 q=soc.ram.ram[112][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101692 q=soc.ram.ram[112][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101694 q=soc.ram.ram[112][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101696 q=soc.ram.ram[112][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101698 q=soc.ram.ram[112][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101700 q=soc.ram.ram[112][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101702 q=soc.ram.ram[112][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101704 q=soc.ram.ram[112][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101706 q=soc.ram.ram[112][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101708 q=soc.ram.ram[112][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101710 q=soc.ram.ram[112][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101712 q=soc.ram.ram[112][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101714 q=soc.ram.ram[112][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101716 q=soc.ram.ram[112][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101718 q=soc.ram.ram[112][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101720 q=soc.ram.ram[112][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101722 q=soc.ram.ram[112][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101724 q=soc.ram.ram[112][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101726 q=soc.ram.ram[112][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101728 q=soc.ram.ram[112][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101730 q=soc.ram.ram[111][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101732 q=soc.ram.ram[111][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101734 q=soc.ram.ram[111][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101736 q=soc.ram.ram[111][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101738 q=soc.ram.ram[111][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101740 q=soc.ram.ram[111][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101742 q=soc.ram.ram[111][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101744 q=soc.ram.ram[111][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101746 q=soc.ram.ram[111][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101748 q=soc.ram.ram[111][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101750 q=soc.ram.ram[111][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101752 q=soc.ram.ram[111][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101754 q=soc.ram.ram[111][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101756 q=soc.ram.ram[111][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101758 q=soc.ram.ram[111][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101760 q=soc.ram.ram[111][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101762 q=soc.ram.ram[111][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101764 q=soc.ram.ram[111][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101766 q=soc.ram.ram[111][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101768 q=soc.ram.ram[111][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101770 q=soc.ram.ram[111][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101772 q=soc.ram.ram[111][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101774 q=soc.ram.ram[111][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101776 q=soc.ram.ram[111][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101778 q=soc.ram.ram[110][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101780 q=soc.ram.ram[110][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101782 q=soc.ram.ram[110][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101784 q=soc.ram.ram[110][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101786 q=soc.ram.ram[110][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101788 q=soc.ram.ram[110][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101790 q=soc.ram.ram[110][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101792 q=soc.ram.ram[110][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101794 q=soc.ram.ram[110][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101796 q=soc.ram.ram[110][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101798 q=soc.ram.ram[110][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101800 q=soc.ram.ram[110][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101802 q=soc.ram.ram[110][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101804 q=soc.ram.ram[110][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101806 q=soc.ram.ram[110][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101808 q=soc.ram.ram[110][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101810 q=soc.ram.ram[110][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101812 q=soc.ram.ram[110][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101814 q=soc.ram.ram[110][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101816 q=soc.ram.ram[110][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101818 q=soc.ram.ram[110][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101820 q=soc.ram.ram[110][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101822 q=soc.ram.ram[110][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101824 q=soc.ram.ram[110][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101826 q=soc.ram.ram[10][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101828 q=soc.ram.ram[10][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101830 q=soc.ram.ram[10][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101832 q=soc.ram.ram[10][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101834 q=soc.ram.ram[10][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101836 q=soc.ram.ram[10][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101838 q=soc.ram.ram[10][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101840 q=soc.ram.ram[10][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101842 q=soc.ram.ram[10][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101844 q=soc.ram.ram[10][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101846 q=soc.ram.ram[10][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101848 q=soc.ram.ram[10][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101850 q=soc.ram.ram[10][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101852 q=soc.ram.ram[10][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101854 q=soc.ram.ram[10][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101856 q=soc.ram.ram[10][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101858 q=soc.ram.ram[10][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101860 q=soc.ram.ram[10][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101862 q=soc.ram.ram[10][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101864 q=soc.ram.ram[10][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101866 q=soc.ram.ram[10][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101868 q=soc.ram.ram[10][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101870 q=soc.ram.ram[10][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101872 q=soc.ram.ram[10][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101874 q=soc.ram.ram[109][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101876 q=soc.ram.ram[109][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101878 q=soc.ram.ram[109][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101880 q=soc.ram.ram[109][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101882 q=soc.ram.ram[109][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101884 q=soc.ram.ram[109][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101886 q=soc.ram.ram[109][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101888 q=soc.ram.ram[109][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101890 q=soc.ram.ram[109][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101892 q=soc.ram.ram[109][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101894 q=soc.ram.ram[109][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101896 q=soc.ram.ram[109][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101898 q=soc.ram.ram[109][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101900 q=soc.ram.ram[109][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101902 q=soc.ram.ram[109][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101904 q=soc.ram.ram[109][15]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[0] q=soc.cpu.minerva.gprf.mem._1_[0]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[1] q=soc.cpu.minerva.gprf.mem._1_[1]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[2] q=soc.cpu.minerva.gprf.mem._1_[2]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[3] q=soc.cpu.minerva.gprf.mem._1_[3]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[4] q=soc.cpu.minerva.gprf.mem._1_[4]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[5] q=soc.cpu.minerva.gprf.mem._1_[5]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[6] q=soc.cpu.minerva.gprf.mem._1_[6]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[7] q=soc.cpu.minerva.gprf.mem._1_[7]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[8] q=soc.cpu.minerva.gprf.mem._1_[8]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[9] q=soc.cpu.minerva.gprf.mem._1_[9]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[10] q=soc.cpu.minerva.gprf.mem._1_[10]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[11] q=soc.cpu.minerva.gprf.mem._1_[11]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[12] q=soc.cpu.minerva.gprf.mem._1_[12]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[13] q=soc.cpu.minerva.gprf.mem._1_[13]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[14] q=soc.cpu.minerva.gprf.mem._1_[14]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[15] q=soc.cpu.minerva.gprf.mem._1_[15]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[16] q=soc.cpu.minerva.gprf.mem._1_[16]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[17] q=soc.cpu.minerva.gprf.mem._1_[17]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[18] q=soc.cpu.minerva.gprf.mem._1_[18]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[19] q=soc.cpu.minerva.gprf.mem._1_[19]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[20] q=soc.cpu.minerva.gprf.mem._1_[20]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[21] q=soc.cpu.minerva.gprf.mem._1_[21]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[22] q=soc.cpu.minerva.gprf.mem._1_[22]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[23] q=soc.cpu.minerva.gprf.mem._1_[23]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[24] q=soc.cpu.minerva.gprf.mem._1_[24]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[25] q=soc.cpu.minerva.gprf.mem._1_[25]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[26] q=soc.cpu.minerva.gprf.mem._1_[26]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[27] q=soc.cpu.minerva.gprf.mem._1_[27]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[28] q=soc.cpu.minerva.gprf.mem._1_[28]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[29] q=soc.cpu.minerva.gprf.mem._1_[29]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[30] q=soc.cpu.minerva.gprf.mem._1_[30]
+.subckt dff_x1 clk=io_in[0] i=$\soc.cpu.minerva.gprf.mem._mem$rdreg[0]$d[31] q=soc.cpu.minerva.gprf.mem._1_[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101906 q=soc.ram.ram[109][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101908 q=soc.ram.ram[109][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101910 q=soc.ram.ram[109][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101912 q=soc.ram.ram[109][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101914 q=soc.ram.ram[109][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101916 q=soc.ram.ram[109][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101918 q=soc.ram.ram[109][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101920 q=soc.ram.ram[109][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101922 q=soc.ram.ram[107][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101924 q=soc.ram.ram[107][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101926 q=soc.ram.ram[107][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101928 q=soc.ram.ram[107][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101930 q=soc.ram.ram[107][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101932 q=soc.ram.ram[107][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101934 q=soc.ram.ram[107][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101936 q=soc.ram.ram[107][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101938 q=soc.hyperram.dqi[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101940 q=soc.hyperram.dqi[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101942 q=soc.hyperram.dqi[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101944 q=soc.hyperram.dqi[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101946 q=soc.hyperram.dqi[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101948 q=soc.hyperram.dqi[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101950 q=soc.hyperram.dqi[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101952 q=soc.hyperram.dqi[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101954 q=soc.ram.ram[123][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101956 q=soc.ram.ram[123][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101958 q=soc.ram.ram[123][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101960 q=soc.ram.ram[123][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101962 q=soc.ram.ram[123][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101964 q=soc.ram.ram[123][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101966 q=soc.ram.ram[123][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101968 q=soc.ram.ram[123][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101970 q=soc.ram.ram[122][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101972 q=soc.ram.ram[122][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101974 q=soc.ram.ram[122][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101976 q=soc.ram.ram[122][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101978 q=soc.ram.ram[122][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101980 q=soc.ram.ram[122][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101982 q=soc.ram.ram[122][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101984 q=soc.ram.ram[122][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101986 q=soc.timer.bridge.csr_mux_0.timer_en__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101990 q=soc.hyperram.clk$32
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101992 q=soc.hyperram.clk_phase[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101994 q=soc.hyperram.clk_phase[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$101998 q=soc.hyperram.sr[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102002 q=soc.hyperram.sr[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102006 q=soc.hyperram.sr[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102010 q=soc.hyperram.sr[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102014 q=soc.hyperram.sr[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102018 q=soc.hyperram.sr[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102022 q=soc.hyperram.sr[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102026 q=soc.hyperram.sr[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102030 q=soc.hyperram.sr[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102034 q=soc.hyperram.sr[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102038 q=soc.hyperram.sr[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102042 q=soc.hyperram.sr[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102046 q=soc.hyperram.sr[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102050 q=soc.hyperram.sr[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102054 q=soc.hyperram.sr[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102058 q=soc.hyperram.sr[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102062 q=soc.hyperram.sr[32]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102066 q=soc.hyperram.sr[33]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102070 q=soc.hyperram.sr[34]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102074 q=soc.hyperram.sr[35]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102078 q=soc.hyperram.sr[36]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102082 q=soc.hyperram.sr[37]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102086 q=soc.hyperram.sr[38]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102090 q=soc.hyperram.sr[39]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102094 q=soc.hyperram_$signal$61
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102098 q=soc.hyperram_$signal$64
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102102 q=soc.hyperram_$signal$67
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102106 q=soc.hyperram_$signal$70
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102110 q=soc.hyperram_$signal$73
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102114 q=soc.hyperram_$signal$76
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102118 q=soc.hyperram_$signal$79
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102122 q=soc.hyperram_$signal$82
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102126 q=soc.hyperram.counter[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102130 q=soc.hyperram.counter[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102134 q=soc.hyperram.counter[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102138 q=soc.hyperram.counter[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102142 q=soc.hyperram.counter[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102146 q=soc.hyperram.counter[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102150 q=soc.hyperram.counter[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102154 q=soc.hyperram.cs
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102158 q=soc.hyperram.dq_oe
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102162 q=soc.hyperram.rwds_oe
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102166 q=soc.hyperram.$signal$4
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102170 q=soc.hyperram.bus__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102174 q=soc.gpio_$signal
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102178 q=soc.gpio_$signal$87
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102182 q=soc.gpio_$signal$90
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102186 q=soc.gpio_$signal$93
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102190 q=soc.gpio_$signal$96
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102194 q=soc.gpio_$signal$99
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102198 q=soc.gpio_$signal$102
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102202 q=soc.gpio_$signal$105
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102206 q=soc.gpio.oe_buf[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102210 q=soc.gpio.oe_buf[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102214 q=soc.gpio.oe_buf[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102218 q=soc.gpio.oe_buf[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102222 q=soc.gpio.oe_buf[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102226 q=soc.gpio.oe_buf[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102230 q=soc.gpio.oe_buf[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102234 q=soc.gpio.oe_buf[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102236 q=soc.cpu.minerva.m.valid$1
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102238 q=soc.gpio.bridge.csr_bridge_0.wb__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102240 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102244 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102248 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102252 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102256 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102260 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102264 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102268 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102272 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102274 q=soc.gpio.bridge.csr_mux_0.gpio_dout__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102276 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102280 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102284 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102288 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102292 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102296 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102300 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102304 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102308 q=soc.gpio.bridge.csr_mux_0.gpio_oe__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102310 q=soc.gpio.bridge.csr_mux_0.gpio_oe__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102314 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102318 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102322 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102326 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102330 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102334 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102338 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102342 q=soc.gpio.bridge.csr_mux_0.gpio_din__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102344 q=soc.ram.ram[106][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102346 q=soc.ram.ram[106][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102348 q=soc.ram.ram[106][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102350 q=soc.ram.ram[106][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102352 q=soc.ram.ram[106][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102354 q=soc.ram.ram[106][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102356 q=soc.ram.ram[106][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102358 q=soc.ram.ram[106][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102362 q=soc.gpio.bridge.csr_bridge_0.cycle[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102366 q=soc.gpio.bridge.csr_bridge_0.cycle[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102370 q=soc.gpio.bridge.csr_bridge_0.cycle[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102374 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102378 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102382 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102386 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102390 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102394 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102398 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102402 q=soc.gpio.bridge.csr_bridge_0.wb__dat_r[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102404 q=soc.gpio.bridge_gpio_din__r_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102406 q=soc.gpio.bridge_gpio_din__r_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102408 q=soc.gpio.bridge_gpio_din__r_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102410 q=soc.gpio.bridge_gpio_din__r_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102412 q=soc.gpio.bridge_gpio_din__r_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102414 q=soc.gpio.bridge_gpio_din__r_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102416 q=soc.gpio.bridge_gpio_din__r_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102418 q=soc.gpio.bridge_gpio_din__r_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102422 q=soc.cpu.minerva.x.valid$1
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102426 q=soc.cpu.minerva.shifter.m_direction
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102430 q=soc.cpu.minerva.shifter.m_result$9[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102434 q=soc.cpu.minerva.shifter.m_result$9[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102438 q=soc.cpu.minerva.shifter.m_result$9[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102442 q=soc.cpu.minerva.shifter.m_result$9[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102446 q=soc.cpu.minerva.shifter.m_result$9[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102450 q=soc.cpu.minerva.shifter.m_result$9[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102454 q=soc.cpu.minerva.shifter.m_result$9[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102458 q=soc.cpu.minerva.shifter.m_result$9[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102462 q=soc.cpu.minerva.shifter.m_result$9[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102466 q=soc.cpu.minerva.shifter.m_result$9[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102470 q=soc.cpu.minerva.shifter.m_result$9[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102474 q=soc.cpu.minerva.shifter.m_result$9[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102478 q=soc.cpu.minerva.shifter.m_result$9[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102482 q=soc.cpu.minerva.shifter.m_result$9[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102486 q=soc.cpu.minerva.shifter.m_result$9[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102490 q=soc.cpu.minerva.shifter.m_result$9[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102494 q=soc.cpu.minerva.shifter.m_result$9[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102498 q=soc.cpu.minerva.shifter.m_result$9[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102502 q=soc.cpu.minerva.shifter.m_result$9[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102506 q=soc.cpu.minerva.shifter.m_result$9[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102510 q=soc.cpu.minerva.shifter.m_result$9[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102514 q=soc.cpu.minerva.shifter.m_result$9[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102518 q=soc.cpu.minerva.shifter.m_result$9[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102522 q=soc.cpu.minerva.shifter.m_result$9[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102526 q=soc.cpu.minerva.shifter.m_result$9[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102530 q=soc.cpu.minerva.shifter.m_result$9[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102534 q=soc.cpu.minerva.shifter.m_result$9[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102538 q=soc.cpu.minerva.shifter.m_result$9[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102542 q=soc.cpu.minerva.shifter.m_result$9[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102546 q=soc.cpu.minerva.shifter.m_result$9[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102550 q=soc.cpu.minerva.shifter.m_result$9[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102554 q=soc.cpu.minerva.shifter.m_result$9[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102558 q=soc.cpu.minerva.payload__pc$32[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102562 q=soc.cpu.minerva.payload__pc$32[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102566 q=soc.cpu.minerva.payload__pc$32[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102570 q=soc.cpu.minerva.payload__pc$32[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102574 q=soc.cpu.minerva.payload__pc$32[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102578 q=soc.cpu.minerva.payload__pc$32[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102582 q=soc.cpu.minerva.payload__pc$32[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102586 q=soc.cpu.minerva.payload__pc$32[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102590 q=soc.cpu.minerva.payload__pc$32[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102594 q=soc.cpu.minerva.payload__pc$32[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102598 q=soc.cpu.minerva.payload__pc$32[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102602 q=soc.cpu.minerva.payload__pc$32[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102606 q=soc.cpu.minerva.payload__pc$32[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102610 q=soc.cpu.minerva.payload__pc$32[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102614 q=soc.cpu.minerva.payload__pc$32[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102618 q=soc.cpu.minerva.payload__pc$32[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102622 q=soc.cpu.minerva.payload__pc$32[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102626 q=soc.cpu.minerva.payload__pc$32[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102630 q=soc.cpu.minerva.payload__pc$32[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102634 q=soc.cpu.minerva.payload__pc$32[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102638 q=soc.cpu.minerva.payload__pc$32[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102642 q=soc.cpu.minerva.payload__pc$32[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102646 q=soc.cpu.minerva.payload__pc$32[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102650 q=soc.cpu.minerva.payload__pc$32[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102654 q=soc.cpu.minerva.payload__pc$32[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102658 q=soc.cpu.minerva.payload__pc$32[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102662 q=soc.cpu.minerva.payload__pc$32[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102666 q=soc.cpu.minerva.payload__pc$32[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102670 q=soc.cpu.minerva.payload__pc$32[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102674 q=soc.cpu.minerva.payload__pc$32[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102676 q=soc.cpu.minerva.gprf.mem._mem[3][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102678 q=soc.cpu.minerva.gprf.mem._mem[3][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102680 q=soc.cpu.minerva.gprf.mem._mem[3][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102682 q=soc.cpu.minerva.gprf.mem._mem[3][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102684 q=soc.cpu.minerva.gprf.mem._mem[3][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102686 q=soc.cpu.minerva.gprf.mem._mem[3][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102688 q=soc.cpu.minerva.gprf.mem._mem[3][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102690 q=soc.cpu.minerva.gprf.mem._mem[3][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102692 q=soc.cpu.minerva.gprf.mem._mem[3][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102694 q=soc.cpu.minerva.gprf.mem._mem[3][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102696 q=soc.cpu.minerva.gprf.mem._mem[3][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102698 q=soc.cpu.minerva.gprf.mem._mem[3][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102700 q=soc.cpu.minerva.gprf.mem._mem[3][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102702 q=soc.cpu.minerva.gprf.mem._mem[3][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102704 q=soc.cpu.minerva.gprf.mem._mem[3][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102706 q=soc.cpu.minerva.gprf.mem._mem[3][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102708 q=soc.cpu.minerva.gprf.mem._mem[3][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102710 q=soc.cpu.minerva.gprf.mem._mem[3][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102712 q=soc.cpu.minerva.gprf.mem._mem[3][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102714 q=soc.cpu.minerva.gprf.mem._mem[3][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102716 q=soc.cpu.minerva.gprf.mem._mem[3][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102718 q=soc.cpu.minerva.gprf.mem._mem[3][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102720 q=soc.cpu.minerva.gprf.mem._mem[3][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102722 q=soc.cpu.minerva.gprf.mem._mem[3][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102724 q=soc.cpu.minerva.gprf.mem._mem[3][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102726 q=soc.cpu.minerva.gprf.mem._mem[3][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102728 q=soc.cpu.minerva.gprf.mem._mem[3][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102730 q=soc.cpu.minerva.gprf.mem._mem[3][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102732 q=soc.cpu.minerva.gprf.mem._mem[3][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102734 q=soc.cpu.minerva.gprf.mem._mem[3][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102736 q=soc.cpu.minerva.gprf.mem._mem[3][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102738 q=soc.cpu.minerva.gprf.mem._mem[3][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102742 q=soc.cpu.minerva.multiplier.x_low
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102746 q=soc.cpu.minerva.multiplier.x_src1_signed
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102750 q=soc.cpu.minerva.multiplier.x_src2_signed
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102754 q=soc.cpu.minerva.multiplier.m_low
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102758 q=soc.cpu.minerva.multiplier.m_prod[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102762 q=soc.cpu.minerva.multiplier.m_prod[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102766 q=soc.cpu.minerva.multiplier.m_prod[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102770 q=soc.cpu.minerva.multiplier.m_prod[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102774 q=soc.cpu.minerva.multiplier.m_prod[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102778 q=soc.cpu.minerva.multiplier.m_prod[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102782 q=soc.cpu.minerva.multiplier.m_prod[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102786 q=soc.cpu.minerva.multiplier.m_prod[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102790 q=soc.cpu.minerva.multiplier.m_prod[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102794 q=soc.cpu.minerva.multiplier.m_prod[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102798 q=soc.cpu.minerva.multiplier.m_prod[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102802 q=soc.cpu.minerva.multiplier.m_prod[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102806 q=soc.cpu.minerva.multiplier.m_prod[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102810 q=soc.cpu.minerva.multiplier.m_prod[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102814 q=soc.cpu.minerva.multiplier.m_prod[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102818 q=soc.cpu.minerva.multiplier.m_prod[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102822 q=soc.cpu.minerva.multiplier.m_prod[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102826 q=soc.cpu.minerva.multiplier.m_prod[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102830 q=soc.cpu.minerva.multiplier.m_prod[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102834 q=soc.cpu.minerva.multiplier.m_prod[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102838 q=soc.cpu.minerva.multiplier.m_prod[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102842 q=soc.cpu.minerva.multiplier.m_prod[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102846 q=soc.cpu.minerva.multiplier.m_prod[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102850 q=soc.cpu.minerva.multiplier.m_prod[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102854 q=soc.cpu.minerva.multiplier.m_prod[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102858 q=soc.cpu.minerva.multiplier.m_prod[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102862 q=soc.cpu.minerva.multiplier.m_prod[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102866 q=soc.cpu.minerva.multiplier.m_prod[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102870 q=soc.cpu.minerva.multiplier.m_prod[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102874 q=soc.cpu.minerva.multiplier.m_prod[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102878 q=soc.cpu.minerva.multiplier.m_prod[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102882 q=soc.cpu.minerva.multiplier.m_prod[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102886 q=soc.cpu.minerva.multiplier.m_prod[32]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102890 q=soc.cpu.minerva.multiplier.m_prod[33]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102894 q=soc.cpu.minerva.multiplier.m_prod[34]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102898 q=soc.cpu.minerva.multiplier.m_prod[35]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102902 q=soc.cpu.minerva.multiplier.m_prod[36]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102906 q=soc.cpu.minerva.multiplier.m_prod[37]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102910 q=soc.cpu.minerva.multiplier.m_prod[38]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102914 q=soc.cpu.minerva.multiplier.m_prod[39]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102918 q=soc.cpu.minerva.multiplier.m_prod[40]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102922 q=soc.cpu.minerva.multiplier.m_prod[41]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102926 q=soc.cpu.minerva.multiplier.m_prod[42]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102930 q=soc.cpu.minerva.multiplier.m_prod[43]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102934 q=soc.cpu.minerva.multiplier.m_prod[44]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102938 q=soc.cpu.minerva.multiplier.m_prod[45]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102942 q=soc.cpu.minerva.multiplier.m_prod[46]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102946 q=soc.cpu.minerva.multiplier.m_prod[47]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102950 q=soc.cpu.minerva.multiplier.m_prod[48]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102954 q=soc.cpu.minerva.multiplier.m_prod[49]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102958 q=soc.cpu.minerva.multiplier.m_prod[50]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102962 q=soc.cpu.minerva.multiplier.m_prod[51]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102966 q=soc.cpu.minerva.multiplier.m_prod[52]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102970 q=soc.cpu.minerva.multiplier.m_prod[53]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102974 q=soc.cpu.minerva.multiplier.m_prod[54]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102978 q=soc.cpu.minerva.multiplier.m_prod[55]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102982 q=soc.cpu.minerva.multiplier.m_prod[56]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102986 q=soc.cpu.minerva.multiplier.m_prod[57]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102990 q=soc.cpu.minerva.multiplier.m_prod[58]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102994 q=soc.cpu.minerva.multiplier.m_prod[59]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$102998 q=soc.cpu.minerva.multiplier.m_prod[60]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103002 q=soc.cpu.minerva.multiplier.m_prod[61]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103006 q=soc.cpu.minerva.multiplier.m_prod[62]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103010 q=soc.cpu.minerva.multiplier.m_prod[63]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103014 q=soc.cpu.minerva.multiplier.w_result[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103018 q=soc.cpu.minerva.multiplier.w_result[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103022 q=soc.cpu.minerva.multiplier.w_result[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103026 q=soc.cpu.minerva.multiplier.w_result[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103030 q=soc.cpu.minerva.multiplier.w_result[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103034 q=soc.cpu.minerva.multiplier.w_result[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103038 q=soc.cpu.minerva.multiplier.w_result[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103042 q=soc.cpu.minerva.multiplier.w_result[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103046 q=soc.cpu.minerva.multiplier.w_result[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103050 q=soc.cpu.minerva.multiplier.w_result[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103054 q=soc.cpu.minerva.multiplier.w_result[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103058 q=soc.cpu.minerva.multiplier.w_result[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103062 q=soc.cpu.minerva.multiplier.w_result[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103066 q=soc.cpu.minerva.multiplier.w_result[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103070 q=soc.cpu.minerva.multiplier.w_result[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103074 q=soc.cpu.minerva.multiplier.w_result[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103078 q=soc.cpu.minerva.multiplier.w_result[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103082 q=soc.cpu.minerva.multiplier.w_result[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103086 q=soc.cpu.minerva.multiplier.w_result[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103090 q=soc.cpu.minerva.multiplier.w_result[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103094 q=soc.cpu.minerva.multiplier.w_result[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103098 q=soc.cpu.minerva.multiplier.w_result[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103102 q=soc.cpu.minerva.multiplier.w_result[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103106 q=soc.cpu.minerva.multiplier.w_result[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103110 q=soc.cpu.minerva.multiplier.w_result[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103114 q=soc.cpu.minerva.multiplier.w_result[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103118 q=soc.cpu.minerva.multiplier.w_result[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103122 q=soc.cpu.minerva.multiplier.w_result[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103126 q=soc.cpu.minerva.multiplier.w_result[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103130 q=soc.cpu.minerva.multiplier.w_result[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103134 q=soc.cpu.minerva.multiplier.w_result[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103138 q=soc.cpu.minerva.multiplier.w_result[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[0] q=soc.rom.spimemio.state[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[1] q=soc.rom.spimemio.state[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[2] q=soc.rom.spimemio.state[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[3] q=soc.rom.spimemio.state[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[4] q=soc.rom.spimemio.state[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[5] q=soc.rom.spimemio.state[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[6] q=soc.rom.spimemio.state[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[7] q=soc.rom.spimemio.state[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[8] q=soc.rom.spimemio.state[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[9] q=soc.rom.spimemio.state[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[10] q=soc.rom.spimemio.state[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[11] q=soc.rom.spimemio.state[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$abc$66684$auto$fsm_map.cc:170:map_fsm$10550[12] q=soc.rom.spimemio.state[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103140 q=soc.ram.ram[106][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103142 q=soc.ram.ram[106][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103144 q=soc.ram.ram[106][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103146 q=soc.ram.ram[106][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103148 q=soc.ram.ram[106][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103150 q=soc.ram.ram[106][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103152 q=soc.ram.ram[106][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103154 q=soc.ram.ram[106][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103156 q=soc.ram.ram[45][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103158 q=soc.ram.ram[45][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103160 q=soc.ram.ram[45][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103162 q=soc.ram.ram[45][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103164 q=soc.ram.ram[45][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103166 q=soc.ram.ram[45][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103168 q=soc.ram.ram[45][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103170 q=soc.ram.ram[45][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103172 q=soc.ram.ram[47][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103174 q=soc.ram.ram[47][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103176 q=soc.ram.ram[47][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103178 q=soc.ram.ram[47][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103180 q=soc.ram.ram[47][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103182 q=soc.ram.ram[47][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103184 q=soc.ram.ram[47][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103186 q=soc.ram.ram[47][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103188 q=soc.cpu.minerva.gprf.mem.collision[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103190 q=soc.cpu.minerva.gprf.mem.collision[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103194 q=soc.cpu.minerva.loadstore.dbus__stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103198 q=soc.cpu.minerva.loadstore.m_load_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103202 q=soc.cpu.minerva.loadstore.m_load_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103206 q=soc.cpu.minerva.loadstore.m_load_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103210 q=soc.cpu.minerva.loadstore.m_load_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103214 q=soc.cpu.minerva.loadstore.m_load_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103218 q=soc.cpu.minerva.loadstore.m_load_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103222 q=soc.cpu.minerva.loadstore.m_load_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103226 q=soc.cpu.minerva.loadstore.m_load_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103230 q=soc.cpu.minerva.loadstore.m_load_data[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103234 q=soc.cpu.minerva.loadstore.m_load_data[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103238 q=soc.cpu.minerva.loadstore.m_load_data[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103242 q=soc.cpu.minerva.loadstore.m_load_data[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103246 q=soc.cpu.minerva.loadstore.m_load_data[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103250 q=soc.cpu.minerva.loadstore.m_load_data[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103254 q=soc.cpu.minerva.loadstore.m_load_data[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103258 q=soc.cpu.minerva.loadstore.m_load_data[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103262 q=soc.cpu.minerva.loadstore.m_load_data[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103266 q=soc.cpu.minerva.loadstore.m_load_data[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103270 q=soc.cpu.minerva.loadstore.m_load_data[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103274 q=soc.cpu.minerva.loadstore.m_load_data[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103278 q=soc.cpu.minerva.loadstore.m_load_data[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103282 q=soc.cpu.minerva.loadstore.m_load_data[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103286 q=soc.cpu.minerva.loadstore.m_load_data[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103290 q=soc.cpu.minerva.loadstore.m_load_data[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103294 q=soc.cpu.minerva.loadstore.m_load_data[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103298 q=soc.cpu.minerva.loadstore.m_load_data[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103302 q=soc.cpu.minerva.loadstore.m_load_data[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103306 q=soc.cpu.minerva.loadstore.m_load_data[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103310 q=soc.cpu.minerva.loadstore.m_load_data[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103314 q=soc.cpu.minerva.loadstore.m_load_data[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103318 q=soc.cpu.minerva.loadstore.m_load_data[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103322 q=soc.cpu.minerva.loadstore.m_load_data[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103326 q=soc.cpu.minerva.loadstore.dbus__adr[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103330 q=soc.cpu.minerva.loadstore.dbus__adr[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103334 q=soc.cpu.minerva.loadstore.dbus__adr[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103338 q=soc.cpu.minerva.loadstore.dbus__adr[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103342 q=soc.cpu.minerva.loadstore.dbus__adr[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103346 q=soc.cpu.minerva.loadstore.dbus__adr[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103350 q=soc.cpu.minerva.loadstore.dbus__adr[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103354 q=soc.cpu.minerva.loadstore.dbus__adr[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103358 q=soc.cpu.minerva.loadstore.dbus__adr[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103362 q=soc.cpu.minerva.loadstore.dbus__adr[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103366 q=soc.cpu.minerva.loadstore.dbus__adr[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103370 q=soc.cpu.minerva.loadstore.dbus__adr[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103374 q=soc.cpu.minerva.loadstore.dbus__adr[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103378 q=soc.cpu.minerva.loadstore.dbus__adr[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103382 q=soc.cpu.minerva.loadstore.dbus__adr[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103386 q=soc.cpu.minerva.loadstore.dbus__adr[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103390 q=soc.cpu.minerva.loadstore.dbus__adr[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103394 q=soc.cpu.minerva.loadstore.dbus__adr[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103398 q=soc.cpu.minerva.loadstore.dbus__adr[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103402 q=soc.cpu.minerva.loadstore.dbus__adr[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103406 q=soc.cpu.minerva.loadstore.dbus__adr[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103410 q=soc.cpu.minerva.loadstore.dbus__adr[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103414 q=soc.cpu.minerva.loadstore.dbus__adr[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103418 q=soc.cpu.minerva.loadstore.dbus__adr[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103422 q=soc.cpu.minerva.loadstore.dbus__adr[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103426 q=soc.cpu.minerva.loadstore.dbus__adr[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103430 q=soc.cpu.minerva.loadstore.dbus__adr[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103434 q=soc.cpu.minerva.loadstore.dbus__adr[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103438 q=soc.cpu.minerva.loadstore.dbus__adr[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103442 q=soc.cpu.minerva.loadstore.dbus__adr[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103446 q=soc.cpu.minerva.loadstore.dbus__sel[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103450 q=soc.cpu.minerva.loadstore.dbus__sel[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103454 q=soc.cpu.minerva.loadstore.dbus__sel[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103458 q=soc.cpu.minerva.loadstore.dbus__sel[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103462 q=soc.cpu.minerva.loadstore.dbus__we
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103466 q=soc.cpu.minerva.loadstore.dbus__dat_w[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103470 q=soc.cpu.minerva.loadstore.dbus__dat_w[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103474 q=soc.cpu.minerva.loadstore.dbus__dat_w[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103478 q=soc.cpu.minerva.loadstore.dbus__dat_w[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103482 q=soc.cpu.minerva.loadstore.dbus__dat_w[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103486 q=soc.cpu.minerva.loadstore.dbus__dat_w[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103490 q=soc.cpu.minerva.loadstore.dbus__dat_w[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103494 q=soc.cpu.minerva.loadstore.dbus__dat_w[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103498 q=soc.cpu.minerva.loadstore.dbus__dat_w[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103502 q=soc.cpu.minerva.loadstore.dbus__dat_w[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103506 q=soc.cpu.minerva.loadstore.dbus__dat_w[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103510 q=soc.cpu.minerva.loadstore.dbus__dat_w[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103514 q=soc.cpu.minerva.loadstore.dbus__dat_w[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103518 q=soc.cpu.minerva.loadstore.dbus__dat_w[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103522 q=soc.cpu.minerva.loadstore.dbus__dat_w[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103526 q=soc.cpu.minerva.loadstore.dbus__dat_w[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103530 q=soc.cpu.minerva.loadstore.dbus__dat_w[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103534 q=soc.cpu.minerva.loadstore.dbus__dat_w[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103538 q=soc.cpu.minerva.loadstore.dbus__dat_w[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103542 q=soc.cpu.minerva.loadstore.dbus__dat_w[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103546 q=soc.cpu.minerva.loadstore.dbus__dat_w[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103550 q=soc.cpu.minerva.loadstore.dbus__dat_w[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103554 q=soc.cpu.minerva.loadstore.dbus__dat_w[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103558 q=soc.cpu.minerva.loadstore.dbus__dat_w[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103562 q=soc.cpu.minerva.loadstore.dbus__dat_w[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103566 q=soc.cpu.minerva.loadstore.dbus__dat_w[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103570 q=soc.cpu.minerva.loadstore.dbus__dat_w[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103574 q=soc.cpu.minerva.loadstore.dbus__dat_w[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103578 q=soc.cpu.minerva.loadstore.dbus__dat_w[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103582 q=soc.cpu.minerva.loadstore.dbus__dat_w[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103586 q=soc.cpu.minerva.loadstore.dbus__dat_w[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103590 q=soc.cpu.minerva.loadstore.dbus__dat_w[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103592 q=soc.cpu.minerva.loadstore.dbus__cyc
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103594 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103596 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103598 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103600 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103602 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103604 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103606 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103608 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103610 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103612 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103614 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103616 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103618 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103620 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103622 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103624 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103626 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103628 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103630 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103632 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103634 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103636 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103638 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103640 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103642 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103644 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103646 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103648 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103650 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103652 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103654 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103656 q=soc.cpu.minerva.gprf.mem.fwd_wp_data[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103658 q=soc.cpu.minerva.gprf.mem.fwd_wp_en
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103660 q=soc.ram.ram[0][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103662 q=soc.ram.ram[0][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103664 q=soc.ram.ram[0][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103666 q=soc.ram.ram[0][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103668 q=soc.ram.ram[0][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103670 q=soc.ram.ram[0][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103672 q=soc.ram.ram[0][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103674 q=soc.ram.ram[0][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103676 q=soc.ram.ram[119][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103678 q=soc.ram.ram[119][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103680 q=soc.ram.ram[119][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103682 q=soc.ram.ram[119][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103684 q=soc.ram.ram[119][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103686 q=soc.ram.ram[119][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103688 q=soc.ram.ram[119][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103690 q=soc.ram.ram[119][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103692 q=soc.ram.ram[119][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103694 q=soc.ram.ram[119][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103696 q=soc.ram.ram[119][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103698 q=soc.ram.ram[119][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103700 q=soc.ram.ram[119][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103702 q=soc.ram.ram[119][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103704 q=soc.ram.ram[119][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103706 q=soc.ram.ram[119][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103708 q=soc.ram.ram[119][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103710 q=soc.ram.ram[119][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103712 q=soc.ram.ram[119][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103714 q=soc.ram.ram[119][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103716 q=soc.ram.ram[119][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103718 q=soc.ram.ram[119][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103720 q=soc.ram.ram[119][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103722 q=soc.ram.ram[119][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103724 q=soc.ram.ram[11][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103726 q=soc.ram.ram[11][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103728 q=soc.ram.ram[11][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103730 q=soc.ram.ram[11][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103732 q=soc.ram.ram[11][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103734 q=soc.ram.ram[11][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103736 q=soc.ram.ram[11][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103738 q=soc.ram.ram[11][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103740 q=soc.ram.ram[11][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103742 q=soc.ram.ram[11][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103744 q=soc.ram.ram[11][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103746 q=soc.ram.ram[11][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103748 q=soc.ram.ram[11][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103750 q=soc.ram.ram[11][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103752 q=soc.ram.ram[11][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103754 q=soc.ram.ram[11][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103756 q=soc.ram.ram[11][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103758 q=soc.ram.ram[11][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103760 q=soc.ram.ram[11][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103762 q=soc.ram.ram[11][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103764 q=soc.ram.ram[11][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103766 q=soc.ram.ram[11][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103768 q=soc.ram.ram[11][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103770 q=soc.ram.ram[11][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103772 q=soc.ram.ram[120][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103774 q=soc.ram.ram[120][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103776 q=soc.ram.ram[120][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103778 q=soc.ram.ram[120][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103780 q=soc.ram.ram[120][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103782 q=soc.ram.ram[120][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103784 q=soc.ram.ram[120][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103786 q=soc.ram.ram[120][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103788 q=soc.ram.ram[120][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103790 q=soc.ram.ram[120][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103792 q=soc.ram.ram[120][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103794 q=soc.ram.ram[120][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103796 q=soc.ram.ram[120][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103798 q=soc.ram.ram[120][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103800 q=soc.ram.ram[120][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103802 q=soc.ram.ram[120][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103804 q=soc.ram.ram[120][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103806 q=soc.ram.ram[120][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103808 q=soc.ram.ram[120][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103810 q=soc.ram.ram[120][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103812 q=soc.ram.ram[120][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103814 q=soc.ram.ram[120][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103816 q=soc.ram.ram[120][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103818 q=soc.ram.ram[120][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103820 q=soc.ram.ram[121][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103822 q=soc.ram.ram[121][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103824 q=soc.ram.ram[121][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103826 q=soc.ram.ram[121][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103828 q=soc.ram.ram[121][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103830 q=soc.ram.ram[121][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103832 q=soc.ram.ram[121][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103834 q=soc.ram.ram[121][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103836 q=soc.ram.ram[121][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103838 q=soc.ram.ram[121][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103840 q=soc.ram.ram[121][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103842 q=soc.ram.ram[121][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103844 q=soc.ram.ram[121][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103846 q=soc.ram.ram[121][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103848 q=soc.ram.ram[121][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103850 q=soc.ram.ram[121][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103852 q=soc.ram.ram[121][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103854 q=soc.ram.ram[121][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103856 q=soc.ram.ram[121][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103858 q=soc.ram.ram[121][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103860 q=soc.ram.ram[121][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103862 q=soc.ram.ram[121][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103864 q=soc.ram.ram[121][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103866 q=soc.ram.ram[121][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103868 q=soc.ram.ram[122][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103870 q=soc.ram.ram[122][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103872 q=soc.ram.ram[122][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103874 q=soc.ram.ram[122][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103876 q=soc.ram.ram[122][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103878 q=soc.ram.ram[122][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103880 q=soc.ram.ram[122][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103882 q=soc.ram.ram[122][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103884 q=soc.ram.ram[28][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103886 q=soc.ram.ram[28][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103888 q=soc.ram.ram[28][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103890 q=soc.ram.ram[28][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103892 q=soc.ram.ram[28][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103894 q=soc.ram.ram[28][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103896 q=soc.ram.ram[28][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103898 q=soc.ram.ram[28][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103900 q=soc.ram.ram[28][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103902 q=soc.ram.ram[28][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103904 q=soc.ram.ram[28][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103906 q=soc.ram.ram[28][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103908 q=soc.ram.ram[28][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103910 q=soc.ram.ram[28][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103912 q=soc.ram.ram[28][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103914 q=soc.ram.ram[28][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103916 q=soc.bridge.csr_mux_0.uart_rx_rdy__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103920 q=soc.cpu.minerva.fetch.ibus__stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103924 q=soc.cpu.minerva.fetch.ibus_rdata[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103928 q=soc.cpu.minerva.fetch.ibus_rdata[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103932 q=soc.cpu.minerva.fetch.ibus_rdata[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103936 q=soc.cpu.minerva.fetch.ibus_rdata[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103940 q=soc.cpu.minerva.fetch.ibus_rdata[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103944 q=soc.cpu.minerva.fetch.ibus_rdata[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103948 q=soc.cpu.minerva.fetch.ibus_rdata[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103952 q=soc.cpu.minerva.fetch.ibus_rdata[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103956 q=soc.cpu.minerva.fetch.ibus_rdata[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103960 q=soc.cpu.minerva.fetch.ibus_rdata[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103964 q=soc.cpu.minerva.fetch.ibus_rdata[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103968 q=soc.cpu.minerva.fetch.ibus_rdata[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103972 q=soc.cpu.minerva.fetch.ibus_rdata[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103976 q=soc.cpu.minerva.fetch.ibus_rdata[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103980 q=soc.cpu.minerva.fetch.ibus_rdata[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103984 q=soc.cpu.minerva.fetch.ibus_rdata[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103988 q=soc.cpu.minerva.fetch.ibus_rdata[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103992 q=soc.cpu.minerva.fetch.ibus_rdata[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$103996 q=soc.cpu.minerva.fetch.ibus_rdata[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104000 q=soc.cpu.minerva.fetch.ibus_rdata[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104004 q=soc.cpu.minerva.fetch.ibus_rdata[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104008 q=soc.cpu.minerva.fetch.ibus_rdata[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104012 q=soc.cpu.minerva.fetch.ibus_rdata[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104016 q=soc.cpu.minerva.fetch.ibus_rdata[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104020 q=soc.cpu.minerva.fetch.ibus_rdata[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104024 q=soc.cpu.minerva.fetch.ibus_rdata[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104028 q=soc.cpu.minerva.fetch.ibus_rdata[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104032 q=soc.cpu.minerva.fetch.ibus_rdata[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104036 q=soc.cpu.minerva.fetch.ibus_rdata[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104040 q=soc.cpu.minerva.fetch.ibus_rdata[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104044 q=soc.cpu.minerva.fetch.ibus_rdata[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104048 q=soc.cpu.minerva.fetch.ibus_rdata[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104052 q=soc.cpu.minerva.fetch.ibus__adr[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104056 q=soc.cpu.minerva.fetch.ibus__adr[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104060 q=soc.cpu.minerva.fetch.ibus__adr[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104064 q=soc.cpu.minerva.fetch.ibus__adr[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104068 q=soc.cpu.minerva.fetch.ibus__adr[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104072 q=soc.cpu.minerva.fetch.ibus__adr[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104076 q=soc.cpu.minerva.fetch.ibus__adr[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104080 q=soc.cpu.minerva.fetch.ibus__adr[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104084 q=soc.cpu.minerva.fetch.ibus__adr[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104088 q=soc.cpu.minerva.fetch.ibus__adr[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104092 q=soc.cpu.minerva.fetch.ibus__adr[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104096 q=soc.cpu.minerva.fetch.ibus__adr[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104100 q=soc.cpu.minerva.fetch.ibus__adr[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104104 q=soc.cpu.minerva.fetch.ibus__adr[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104108 q=soc.cpu.minerva.fetch.ibus__adr[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104112 q=soc.cpu.minerva.fetch.ibus__adr[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104116 q=soc.cpu.minerva.fetch.ibus__adr[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104120 q=soc.cpu.minerva.fetch.ibus__adr[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104124 q=soc.cpu.minerva.fetch.ibus__adr[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104128 q=soc.cpu.minerva.fetch.ibus__adr[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104132 q=soc.cpu.minerva.fetch.ibus__adr[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104136 q=soc.cpu.minerva.fetch.ibus__adr[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104140 q=soc.cpu.minerva.fetch.ibus__adr[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104144 q=soc.cpu.minerva.fetch.ibus__adr[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104148 q=soc.cpu.minerva.fetch.ibus__adr[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104152 q=soc.cpu.minerva.fetch.ibus__adr[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104156 q=soc.cpu.minerva.fetch.ibus__adr[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104160 q=soc.cpu.minerva.fetch.ibus__adr[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104164 q=soc.cpu.minerva.fetch.ibus__adr[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104168 q=soc.cpu.minerva.fetch.ibus__adr[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104170 q=soc.cpu.minerva.fetch.ibus__cyc
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104174 q=soc.cpu.minerva.f.valid$1
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104176 q=soc.cpu.minerva.gprf.mem._mem[26][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104178 q=soc.cpu.minerva.gprf.mem._mem[26][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104180 q=soc.cpu.minerva.gprf.mem._mem[26][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104182 q=soc.cpu.minerva.gprf.mem._mem[26][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104184 q=soc.cpu.minerva.gprf.mem._mem[26][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104186 q=soc.cpu.minerva.gprf.mem._mem[26][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104188 q=soc.cpu.minerva.gprf.mem._mem[26][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104190 q=soc.cpu.minerva.gprf.mem._mem[26][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104192 q=soc.cpu.minerva.gprf.mem._mem[26][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104194 q=soc.cpu.minerva.gprf.mem._mem[26][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104196 q=soc.cpu.minerva.gprf.mem._mem[26][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104198 q=soc.cpu.minerva.gprf.mem._mem[26][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104200 q=soc.cpu.minerva.gprf.mem._mem[26][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104202 q=soc.cpu.minerva.gprf.mem._mem[26][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104204 q=soc.cpu.minerva.gprf.mem._mem[26][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104206 q=soc.cpu.minerva.gprf.mem._mem[26][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104208 q=soc.cpu.minerva.gprf.mem._mem[26][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104210 q=soc.cpu.minerva.gprf.mem._mem[26][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104212 q=soc.cpu.minerva.gprf.mem._mem[26][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104214 q=soc.cpu.minerva.gprf.mem._mem[26][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104216 q=soc.cpu.minerva.gprf.mem._mem[26][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104218 q=soc.cpu.minerva.gprf.mem._mem[26][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104220 q=soc.cpu.minerva.gprf.mem._mem[26][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104222 q=soc.cpu.minerva.gprf.mem._mem[26][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104224 q=soc.cpu.minerva.gprf.mem._mem[26][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104226 q=soc.cpu.minerva.gprf.mem._mem[26][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104228 q=soc.cpu.minerva.gprf.mem._mem[26][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104230 q=soc.cpu.minerva.gprf.mem._mem[26][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104232 q=soc.cpu.minerva.gprf.mem._mem[26][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104234 q=soc.cpu.minerva.gprf.mem._mem[26][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104236 q=soc.cpu.minerva.gprf.mem._mem[26][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104238 q=soc.cpu.minerva.gprf.mem._mem[26][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104240 q=soc.ram.ram[14][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104242 q=soc.ram.ram[14][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104244 q=soc.ram.ram[14][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104246 q=soc.ram.ram[14][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104248 q=soc.ram.ram[14][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104250 q=soc.ram.ram[14][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104252 q=soc.ram.ram[14][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104254 q=soc.ram.ram[14][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104256 q=soc.ram.ram[19][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104258 q=soc.ram.ram[19][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104260 q=soc.ram.ram[19][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104262 q=soc.ram.ram[19][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104264 q=soc.ram.ram[19][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104266 q=soc.ram.ram[19][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104268 q=soc.ram.ram[19][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104270 q=soc.ram.ram[19][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104272 q=soc.ram.ram[0][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104274 q=soc.ram.ram[0][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104276 q=soc.ram.ram[0][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104278 q=soc.ram.ram[0][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104280 q=soc.ram.ram[0][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104282 q=soc.ram.ram[0][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104284 q=soc.ram.ram[0][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104286 q=soc.ram.ram[0][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104288 q=soc.cpu.minerva.divider.fsm_state
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104292 q=soc.cpu.minerva.exception.mstatus__r__mpp[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104296 q=soc.cpu.minerva.exception.mstatus__r__mpp[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104298 q=soc.cpu.minerva.exception.mstatus__r__mpie
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104300 q=soc.cpu.minerva.exception.mstatus__r__mie
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104304 q=soc.cpu.minerva.exception.misa__r__mxl[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104308 q=soc.cpu.minerva.exception.misa__r__mxl[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104310 q=soc.ram.ram[93][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104312 q=soc.ram.ram[93][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104314 q=soc.ram.ram[93][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104316 q=soc.ram.ram[93][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104318 q=soc.ram.ram[93][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104320 q=soc.ram.ram[93][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104322 q=soc.ram.ram[93][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104324 q=soc.ram.ram[93][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104328 q=soc.cpu.minerva.exception.misa__r__extensions[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104332 q=soc.cpu.minerva.exception.misa__r__extensions[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104336 q=soc.cpu.minerva.exception.misa__r__extensions[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104340 q=soc.cpu.minerva.exception.misa__r__extensions[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104344 q=soc.cpu.minerva.exception.misa__r__extensions[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104348 q=soc.cpu.minerva.exception.misa__r__extensions[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104352 q=soc.cpu.minerva.exception.misa__r__extensions[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104356 q=soc.cpu.minerva.exception.misa__r__extensions[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104360 q=soc.cpu.minerva.exception.misa__r__extensions[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104364 q=soc.cpu.minerva.exception.misa__r__extensions[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104368 q=soc.cpu.minerva.exception.misa__r__extensions[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104372 q=soc.cpu.minerva.exception.misa__r__extensions[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104376 q=soc.cpu.minerva.exception.misa__r__extensions[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104380 q=soc.cpu.minerva.exception.misa__r__extensions[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104384 q=soc.cpu.minerva.exception.misa__r__extensions[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104388 q=soc.cpu.minerva.exception.misa__r__extensions[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104392 q=soc.cpu.minerva.exception.misa__r__extensions[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104396 q=soc.cpu.minerva.exception.misa__r__extensions[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104400 q=soc.cpu.minerva.exception.misa__r__extensions[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104404 q=soc.cpu.minerva.exception.misa__r__extensions[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104408 q=soc.cpu.minerva.exception.misa__r__extensions[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104412 q=soc.cpu.minerva.exception.misa__r__extensions[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104416 q=soc.cpu.minerva.exception.misa__r__extensions[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104420 q=soc.cpu.minerva.exception.misa__r__extensions[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104424 q=soc.cpu.minerva.exception.misa__r__extensions[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104428 q=soc.cpu.minerva.exception.misa__r__extensions[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104432 q=soc.cpu.minerva.exception.mie__r__meie
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104436 q=soc.cpu.minerva.exception.mie__r__mtie
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104440 q=soc.cpu.minerva.exception.mie__r__msie
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104444 q=soc.cpu.minerva.exception.mtvec__r__base[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104448 q=soc.cpu.minerva.exception.mtvec__r__base[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104452 q=soc.cpu.minerva.exception.mtvec__r__base[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104456 q=soc.cpu.minerva.exception.mtvec__r__base[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104460 q=soc.cpu.minerva.exception.mtvec__r__base[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104464 q=soc.cpu.minerva.exception.mtvec__r__base[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104468 q=soc.cpu.minerva.exception.mtvec__r__base[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104472 q=soc.cpu.minerva.exception.mtvec__r__base[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104476 q=soc.cpu.minerva.exception.mtvec__r__base[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104480 q=soc.cpu.minerva.exception.mtvec__r__base[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104484 q=soc.cpu.minerva.exception.mtvec__r__base[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104488 q=soc.cpu.minerva.exception.mtvec__r__base[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104492 q=soc.cpu.minerva.exception.mtvec__r__base[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104496 q=soc.cpu.minerva.exception.mtvec__r__base[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104500 q=soc.cpu.minerva.exception.mtvec__r__base[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104504 q=soc.cpu.minerva.exception.mtvec__r__base[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104508 q=soc.cpu.minerva.exception.mtvec__r__base[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104512 q=soc.cpu.minerva.exception.mtvec__r__base[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104516 q=soc.cpu.minerva.exception.mtvec__r__base[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104520 q=soc.cpu.minerva.exception.mtvec__r__base[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104524 q=soc.cpu.minerva.exception.mtvec__r__base[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104528 q=soc.cpu.minerva.exception.mtvec__r__base[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104532 q=soc.cpu.minerva.exception.mtvec__r__base[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104536 q=soc.cpu.minerva.exception.mtvec__r__base[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104540 q=soc.cpu.minerva.exception.mtvec__r__base[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104544 q=soc.cpu.minerva.exception.mtvec__r__base[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104548 q=soc.cpu.minerva.exception.mtvec__r__base[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104552 q=soc.cpu.minerva.exception.mtvec__r__base[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104556 q=soc.cpu.minerva.exception.mtvec__r__base[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104560 q=soc.cpu.minerva.exception.mtvec__r__base[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104564 q=soc.cpu.minerva.exception.mtvec__r__mode[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104568 q=soc.cpu.minerva.exception.mtvec__r__mode[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104572 q=soc.cpu.minerva.exception.mscratch__r__value[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104576 q=soc.cpu.minerva.exception.mscratch__r__value[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104580 q=soc.cpu.minerva.exception.mscratch__r__value[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104584 q=soc.cpu.minerva.exception.mscratch__r__value[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104588 q=soc.cpu.minerva.exception.mscratch__r__value[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104592 q=soc.cpu.minerva.exception.mscratch__r__value[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104596 q=soc.cpu.minerva.exception.mscratch__r__value[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104600 q=soc.cpu.minerva.exception.mscratch__r__value[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104604 q=soc.cpu.minerva.exception.mscratch__r__value[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104608 q=soc.cpu.minerva.exception.mscratch__r__value[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104612 q=soc.cpu.minerva.exception.mscratch__r__value[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104616 q=soc.cpu.minerva.exception.mscratch__r__value[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104620 q=soc.cpu.minerva.exception.mscratch__r__value[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104624 q=soc.cpu.minerva.exception.mscratch__r__value[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104628 q=soc.cpu.minerva.exception.mscratch__r__value[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104632 q=soc.cpu.minerva.exception.mscratch__r__value[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104636 q=soc.cpu.minerva.exception.mscratch__r__value[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104640 q=soc.cpu.minerva.exception.mscratch__r__value[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104644 q=soc.cpu.minerva.exception.mscratch__r__value[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104648 q=soc.cpu.minerva.exception.mscratch__r__value[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104652 q=soc.cpu.minerva.exception.mscratch__r__value[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104656 q=soc.cpu.minerva.exception.mscratch__r__value[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104660 q=soc.cpu.minerva.exception.mscratch__r__value[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104664 q=soc.cpu.minerva.exception.mscratch__r__value[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104668 q=soc.cpu.minerva.exception.mscratch__r__value[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104672 q=soc.cpu.minerva.exception.mscratch__r__value[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104676 q=soc.cpu.minerva.exception.mscratch__r__value[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104680 q=soc.cpu.minerva.exception.mscratch__r__value[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104684 q=soc.cpu.minerva.exception.mscratch__r__value[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104688 q=soc.cpu.minerva.exception.mscratch__r__value[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104692 q=soc.cpu.minerva.exception.mscratch__r__value[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104696 q=soc.cpu.minerva.exception.mscratch__r__value[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104698 q=soc.cpu.minerva.exception.mepc__r__base[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104700 q=soc.cpu.minerva.exception.mepc__r__base[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104702 q=soc.cpu.minerva.exception.mepc__r__base[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104704 q=soc.cpu.minerva.exception.mepc__r__base[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104706 q=soc.cpu.minerva.exception.mepc__r__base[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104708 q=soc.cpu.minerva.exception.mepc__r__base[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104710 q=soc.cpu.minerva.exception.mepc__r__base[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104712 q=soc.cpu.minerva.exception.mepc__r__base[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104714 q=soc.cpu.minerva.exception.mepc__r__base[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104716 q=soc.cpu.minerva.exception.mepc__r__base[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104718 q=soc.cpu.minerva.exception.mepc__r__base[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104720 q=soc.cpu.minerva.exception.mepc__r__base[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104722 q=soc.cpu.minerva.exception.mepc__r__base[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104724 q=soc.cpu.minerva.exception.mepc__r__base[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104726 q=soc.cpu.minerva.exception.mepc__r__base[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104728 q=soc.cpu.minerva.exception.mepc__r__base[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104730 q=soc.cpu.minerva.exception.mepc__r__base[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104732 q=soc.cpu.minerva.exception.mepc__r__base[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104734 q=soc.cpu.minerva.exception.mepc__r__base[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104736 q=soc.cpu.minerva.exception.mepc__r__base[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104738 q=soc.cpu.minerva.exception.mepc__r__base[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104740 q=soc.cpu.minerva.exception.mepc__r__base[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104742 q=soc.cpu.minerva.exception.mepc__r__base[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104744 q=soc.cpu.minerva.exception.mepc__r__base[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104746 q=soc.cpu.minerva.exception.mepc__r__base[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104748 q=soc.cpu.minerva.exception.mepc__r__base[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104750 q=soc.cpu.minerva.exception.mepc__r__base[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104752 q=soc.cpu.minerva.exception.mepc__r__base[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104754 q=soc.cpu.minerva.exception.mepc__r__base[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104756 q=soc.cpu.minerva.exception.mepc__r__base[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104758 q=soc.cpu.minerva.exception.mcause__r__interrupt
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104760 q=soc.cpu.minerva.exception.mcause__r__ecode[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104762 q=soc.cpu.minerva.exception.mcause__r__ecode[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104764 q=soc.cpu.minerva.exception.mcause__r__ecode[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104766 q=soc.cpu.minerva.exception.mcause__r__ecode[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104768 q=soc.cpu.minerva.exception.mcause__r__ecode[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104770 q=soc.cpu.minerva.exception.mcause__r__ecode[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104772 q=soc.cpu.minerva.exception.mcause__r__ecode[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104774 q=soc.cpu.minerva.exception.mcause__r__ecode[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104776 q=soc.cpu.minerva.exception.mcause__r__ecode[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104778 q=soc.cpu.minerva.exception.mcause__r__ecode[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104780 q=soc.cpu.minerva.exception.mcause__r__ecode[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104782 q=soc.cpu.minerva.exception.mcause__r__ecode[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104784 q=soc.cpu.minerva.exception.mcause__r__ecode[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104786 q=soc.cpu.minerva.exception.mcause__r__ecode[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104788 q=soc.cpu.minerva.exception.mcause__r__ecode[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104790 q=soc.cpu.minerva.exception.mcause__r__ecode[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104792 q=soc.cpu.minerva.exception.mcause__r__ecode[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104794 q=soc.cpu.minerva.exception.mcause__r__ecode[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104796 q=soc.cpu.minerva.exception.mcause__r__ecode[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104798 q=soc.cpu.minerva.exception.mcause__r__ecode[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104800 q=soc.cpu.minerva.exception.mcause__r__ecode[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104802 q=soc.cpu.minerva.exception.mcause__r__ecode[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104804 q=soc.cpu.minerva.exception.mcause__r__ecode[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104806 q=soc.cpu.minerva.exception.mcause__r__ecode[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104808 q=soc.cpu.minerva.exception.mcause__r__ecode[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104810 q=soc.cpu.minerva.exception.mcause__r__ecode[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104812 q=soc.cpu.minerva.exception.mcause__r__ecode[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104814 q=soc.cpu.minerva.exception.mcause__r__ecode[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104816 q=soc.cpu.minerva.exception.mcause__r__ecode[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104818 q=soc.cpu.minerva.exception.mcause__r__ecode[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104820 q=soc.cpu.minerva.exception.mcause__r__ecode[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104822 q=soc.cpu.minerva.exception.mtval__r__value[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104824 q=soc.cpu.minerva.exception.mtval__r__value[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104826 q=soc.cpu.minerva.exception.mtval__r__value[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104828 q=soc.cpu.minerva.exception.mtval__r__value[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104830 q=soc.cpu.minerva.exception.mtval__r__value[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104832 q=soc.cpu.minerva.exception.mtval__r__value[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104834 q=soc.cpu.minerva.exception.mtval__r__value[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104836 q=soc.cpu.minerva.exception.mtval__r__value[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104838 q=soc.cpu.minerva.exception.mtval__r__value[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104840 q=soc.cpu.minerva.exception.mtval__r__value[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104842 q=soc.cpu.minerva.exception.mtval__r__value[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104844 q=soc.cpu.minerva.exception.mtval__r__value[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104846 q=soc.cpu.minerva.exception.mtval__r__value[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104848 q=soc.cpu.minerva.exception.mtval__r__value[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104850 q=soc.cpu.minerva.exception.mtval__r__value[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104852 q=soc.cpu.minerva.exception.mtval__r__value[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104854 q=soc.cpu.minerva.exception.mtval__r__value[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104856 q=soc.cpu.minerva.exception.mtval__r__value[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104858 q=soc.cpu.minerva.exception.mtval__r__value[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104860 q=soc.cpu.minerva.exception.mtval__r__value[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104862 q=soc.cpu.minerva.exception.mtval__r__value[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104864 q=soc.cpu.minerva.exception.mtval__r__value[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104866 q=soc.cpu.minerva.exception.mtval__r__value[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104868 q=soc.cpu.minerva.exception.mtval__r__value[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104870 q=soc.cpu.minerva.exception.mtval__r__value[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104872 q=soc.cpu.minerva.exception.mtval__r__value[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104874 q=soc.cpu.minerva.exception.mtval__r__value[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104876 q=soc.cpu.minerva.exception.mtval__r__value[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104878 q=soc.cpu.minerva.exception.mtval__r__value[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104880 q=soc.cpu.minerva.exception.mtval__r__value[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104882 q=soc.cpu.minerva.exception.mtval__r__value[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104884 q=soc.cpu.minerva.exception.mtval__r__value[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104886 q=soc.cpu.minerva.exception.mip__r__meip
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104890 q=soc.cpu.minerva.exception.irq_mask__r__value[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104894 q=soc.cpu.minerva.exception.irq_mask__r__value[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104898 q=soc.cpu.minerva.exception.irq_mask__r__value[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104902 q=soc.cpu.minerva.exception.irq_mask__r__value[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104906 q=soc.cpu.minerva.exception.irq_mask__r__value[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104910 q=soc.cpu.minerva.exception.irq_mask__r__value[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104914 q=soc.cpu.minerva.exception.irq_mask__r__value[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104918 q=soc.cpu.minerva.exception.irq_mask__r__value[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104922 q=soc.cpu.minerva.exception.irq_mask__r__value[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104926 q=soc.cpu.minerva.exception.irq_mask__r__value[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104930 q=soc.cpu.minerva.exception.irq_mask__r__value[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104934 q=soc.cpu.minerva.exception.irq_mask__r__value[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104938 q=soc.cpu.minerva.exception.irq_mask__r__value[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104942 q=soc.cpu.minerva.exception.irq_mask__r__value[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104946 q=soc.cpu.minerva.exception.irq_mask__r__value[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104950 q=soc.cpu.minerva.exception.irq_mask__r__value[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104954 q=soc.cpu.minerva.exception.irq_mask__r__value[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104958 q=soc.cpu.minerva.exception.irq_mask__r__value[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104962 q=soc.cpu.minerva.exception.irq_mask__r__value[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104966 q=soc.cpu.minerva.exception.irq_mask__r__value[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104970 q=soc.cpu.minerva.exception.irq_mask__r__value[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104974 q=soc.cpu.minerva.exception.irq_mask__r__value[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104978 q=soc.cpu.minerva.exception.irq_mask__r__value[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104982 q=soc.cpu.minerva.exception.irq_mask__r__value[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104986 q=soc.cpu.minerva.exception.irq_mask__r__value[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104990 q=soc.cpu.minerva.exception.irq_mask__r__value[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104994 q=soc.cpu.minerva.exception.irq_mask__r__value[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$104998 q=soc.cpu.minerva.exception.irq_mask__r__value[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105002 q=soc.cpu.minerva.exception.irq_mask__r__value[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105006 q=soc.cpu.minerva.exception.irq_mask__r__value[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105010 q=soc.cpu.minerva.exception.irq_mask__r__value[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105014 q=soc.cpu.minerva.exception.irq_mask__r__value[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105016 q=soc.ram.ram[44][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105018 q=soc.ram.ram[44][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105020 q=soc.ram.ram[44][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105022 q=soc.ram.ram[44][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105024 q=soc.ram.ram[44][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105026 q=soc.ram.ram[44][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105028 q=soc.ram.ram[44][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105030 q=soc.ram.ram[44][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105032 q=soc.ram.ram[18][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105034 q=soc.ram.ram[18][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105036 q=soc.ram.ram[18][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105038 q=soc.ram.ram[18][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105040 q=soc.ram.ram[18][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105042 q=soc.ram.ram[18][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105044 q=soc.ram.ram[18][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105046 q=soc.ram.ram[18][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105048 q=soc.ram.ram[105][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105050 q=soc.ram.ram[105][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105052 q=soc.ram.ram[105][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105054 q=soc.ram.ram[105][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105056 q=soc.ram.ram[105][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105058 q=soc.ram.ram[105][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105060 q=soc.ram.ram[105][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105062 q=soc.ram.ram[105][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105064 q=soc.cpu.minerva.gprf.mem._mem[23][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105066 q=soc.cpu.minerva.gprf.mem._mem[23][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105068 q=soc.cpu.minerva.gprf.mem._mem[23][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105070 q=soc.cpu.minerva.gprf.mem._mem[23][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105072 q=soc.cpu.minerva.gprf.mem._mem[23][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105074 q=soc.cpu.minerva.gprf.mem._mem[23][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105076 q=soc.cpu.minerva.gprf.mem._mem[23][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105078 q=soc.cpu.minerva.gprf.mem._mem[23][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105080 q=soc.cpu.minerva.gprf.mem._mem[23][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105082 q=soc.cpu.minerva.gprf.mem._mem[23][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105084 q=soc.cpu.minerva.gprf.mem._mem[23][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105086 q=soc.cpu.minerva.gprf.mem._mem[23][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105088 q=soc.cpu.minerva.gprf.mem._mem[23][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105090 q=soc.cpu.minerva.gprf.mem._mem[23][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105092 q=soc.cpu.minerva.gprf.mem._mem[23][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105094 q=soc.cpu.minerva.gprf.mem._mem[23][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105096 q=soc.cpu.minerva.gprf.mem._mem[23][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105098 q=soc.cpu.minerva.gprf.mem._mem[23][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105100 q=soc.cpu.minerva.gprf.mem._mem[23][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105102 q=soc.cpu.minerva.gprf.mem._mem[23][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105104 q=soc.cpu.minerva.gprf.mem._mem[23][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105106 q=soc.cpu.minerva.gprf.mem._mem[23][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105108 q=soc.cpu.minerva.gprf.mem._mem[23][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105110 q=soc.cpu.minerva.gprf.mem._mem[23][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105112 q=soc.cpu.minerva.gprf.mem._mem[23][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105114 q=soc.cpu.minerva.gprf.mem._mem[23][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105116 q=soc.cpu.minerva.gprf.mem._mem[23][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105118 q=soc.cpu.minerva.gprf.mem._mem[23][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105120 q=soc.cpu.minerva.gprf.mem._mem[23][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105122 q=soc.cpu.minerva.gprf.mem._mem[23][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105124 q=soc.cpu.minerva.gprf.mem._mem[23][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105126 q=soc.cpu.minerva.gprf.mem._mem[23][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105128 q=soc.cpu.minerva.gprf.mem._mem[21][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105130 q=soc.cpu.minerva.gprf.mem._mem[21][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105132 q=soc.cpu.minerva.gprf.mem._mem[21][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105134 q=soc.cpu.minerva.gprf.mem._mem[21][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105136 q=soc.cpu.minerva.gprf.mem._mem[21][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105138 q=soc.cpu.minerva.gprf.mem._mem[21][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105140 q=soc.cpu.minerva.gprf.mem._mem[21][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105142 q=soc.cpu.minerva.gprf.mem._mem[21][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105144 q=soc.cpu.minerva.gprf.mem._mem[21][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105146 q=soc.cpu.minerva.gprf.mem._mem[21][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105148 q=soc.cpu.minerva.gprf.mem._mem[21][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105150 q=soc.cpu.minerva.gprf.mem._mem[21][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105152 q=soc.cpu.minerva.gprf.mem._mem[21][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105154 q=soc.cpu.minerva.gprf.mem._mem[21][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105156 q=soc.cpu.minerva.gprf.mem._mem[21][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105158 q=soc.cpu.minerva.gprf.mem._mem[21][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105160 q=soc.cpu.minerva.gprf.mem._mem[21][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105162 q=soc.cpu.minerva.gprf.mem._mem[21][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105164 q=soc.cpu.minerva.gprf.mem._mem[21][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105166 q=soc.cpu.minerva.gprf.mem._mem[21][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105168 q=soc.cpu.minerva.gprf.mem._mem[21][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105170 q=soc.cpu.minerva.gprf.mem._mem[21][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105172 q=soc.cpu.minerva.gprf.mem._mem[21][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105174 q=soc.cpu.minerva.gprf.mem._mem[21][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105176 q=soc.cpu.minerva.gprf.mem._mem[21][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105178 q=soc.cpu.minerva.gprf.mem._mem[21][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105180 q=soc.cpu.minerva.gprf.mem._mem[21][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105182 q=soc.cpu.minerva.gprf.mem._mem[21][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105184 q=soc.cpu.minerva.gprf.mem._mem[21][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105186 q=soc.cpu.minerva.gprf.mem._mem[21][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105188 q=soc.cpu.minerva.gprf.mem._mem[21][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105190 q=soc.cpu.minerva.gprf.mem._mem[21][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105194 q=soc.cpu.minerva.divider.m_modulus
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105198 q=soc.cpu.minerva.divider.m_negative
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105202 q=soc.cpu.minerva.divider.quotient[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105206 q=soc.cpu.minerva.divider.quotient[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105210 q=soc.cpu.minerva.divider.quotient[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105214 q=soc.cpu.minerva.divider.quotient[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105218 q=soc.cpu.minerva.divider.quotient[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105222 q=soc.cpu.minerva.divider.quotient[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105226 q=soc.cpu.minerva.divider.quotient[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105230 q=soc.cpu.minerva.divider.quotient[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105234 q=soc.cpu.minerva.divider.quotient[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105238 q=soc.cpu.minerva.divider.quotient[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105242 q=soc.cpu.minerva.divider.quotient[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105246 q=soc.cpu.minerva.divider.quotient[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105250 q=soc.cpu.minerva.divider.quotient[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105254 q=soc.cpu.minerva.divider.quotient[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105258 q=soc.cpu.minerva.divider.quotient[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105262 q=soc.cpu.minerva.divider.quotient[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105266 q=soc.cpu.minerva.divider.quotient[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105270 q=soc.cpu.minerva.divider.quotient[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105274 q=soc.cpu.minerva.divider.quotient[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105278 q=soc.cpu.minerva.divider.quotient[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105282 q=soc.cpu.minerva.divider.quotient[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105286 q=soc.cpu.minerva.divider.quotient[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105290 q=soc.cpu.minerva.divider.quotient[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105294 q=soc.cpu.minerva.divider.quotient[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105298 q=soc.cpu.minerva.divider.quotient[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105302 q=soc.cpu.minerva.divider.quotient[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105306 q=soc.cpu.minerva.divider.quotient[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105310 q=soc.cpu.minerva.divider.quotient[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105314 q=soc.cpu.minerva.divider.quotient[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105318 q=soc.cpu.minerva.divider.quotient[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105322 q=soc.cpu.minerva.divider.quotient[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105326 q=soc.cpu.minerva.divider.remainder[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105330 q=soc.cpu.minerva.divider.remainder[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105334 q=soc.cpu.minerva.divider.remainder[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105338 q=soc.cpu.minerva.divider.remainder[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105342 q=soc.cpu.minerva.divider.remainder[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105346 q=soc.cpu.minerva.divider.remainder[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105350 q=soc.cpu.minerva.divider.remainder[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105354 q=soc.cpu.minerva.divider.remainder[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105358 q=soc.cpu.minerva.divider.remainder[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105362 q=soc.cpu.minerva.divider.remainder[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105366 q=soc.cpu.minerva.divider.remainder[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105370 q=soc.cpu.minerva.divider.remainder[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105374 q=soc.cpu.minerva.divider.remainder[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105378 q=soc.cpu.minerva.divider.remainder[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105382 q=soc.cpu.minerva.divider.remainder[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105386 q=soc.cpu.minerva.divider.remainder[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105390 q=soc.cpu.minerva.divider.remainder[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105394 q=soc.cpu.minerva.divider.remainder[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105398 q=soc.cpu.minerva.divider.remainder[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105402 q=soc.cpu.minerva.divider.remainder[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105406 q=soc.cpu.minerva.divider.remainder[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105410 q=soc.cpu.minerva.divider.remainder[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105414 q=soc.cpu.minerva.divider.remainder[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105418 q=soc.cpu.minerva.divider.remainder[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105422 q=soc.cpu.minerva.divider.remainder[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105426 q=soc.cpu.minerva.divider.remainder[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105430 q=soc.cpu.minerva.divider.remainder[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105434 q=soc.cpu.minerva.divider.remainder[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105438 q=soc.cpu.minerva.divider.remainder[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105442 q=soc.cpu.minerva.divider.remainder[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105446 q=soc.cpu.minerva.divider.remainder[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105450 q=soc.cpu.minerva.divider.divisor[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105454 q=soc.cpu.minerva.divider.divisor[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105458 q=soc.cpu.minerva.divider.divisor[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105462 q=soc.cpu.minerva.divider.divisor[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105466 q=soc.cpu.minerva.divider.divisor[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105470 q=soc.cpu.minerva.divider.divisor[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105474 q=soc.cpu.minerva.divider.divisor[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105478 q=soc.cpu.minerva.divider.divisor[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105482 q=soc.cpu.minerva.divider.divisor[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105486 q=soc.cpu.minerva.divider.divisor[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105490 q=soc.cpu.minerva.divider.divisor[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105494 q=soc.cpu.minerva.divider.divisor[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105498 q=soc.cpu.minerva.divider.divisor[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105502 q=soc.cpu.minerva.divider.divisor[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105506 q=soc.cpu.minerva.divider.divisor[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105510 q=soc.cpu.minerva.divider.divisor[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105514 q=soc.cpu.minerva.divider.divisor[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105518 q=soc.cpu.minerva.divider.divisor[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105522 q=soc.cpu.minerva.divider.divisor[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105526 q=soc.cpu.minerva.divider.divisor[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105530 q=soc.cpu.minerva.divider.divisor[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105534 q=soc.cpu.minerva.divider.divisor[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105538 q=soc.cpu.minerva.divider.divisor[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105542 q=soc.cpu.minerva.divider.divisor[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105546 q=soc.cpu.minerva.divider.divisor[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105550 q=soc.cpu.minerva.divider.divisor[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105554 q=soc.cpu.minerva.divider.divisor[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105558 q=soc.cpu.minerva.divider.divisor[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105562 q=soc.cpu.minerva.divider.divisor[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105566 q=soc.cpu.minerva.divider.divisor[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105570 q=soc.cpu.minerva.divider.divisor[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105574 q=soc.cpu.minerva.divider.divisor[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105578 q=soc.cpu.minerva.divider.timer[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105582 q=soc.cpu.minerva.divider.timer[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105586 q=soc.cpu.minerva.divider.timer[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105590 q=soc.cpu.minerva.divider.timer[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105594 q=soc.cpu.minerva.divider.timer[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105598 q=soc.cpu.minerva.divider.timer[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105602 q=soc.cpu.minerva.payload__pc$25[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105606 q=soc.cpu.minerva.payload__pc$25[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105610 q=soc.cpu.minerva.payload__pc$25[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105614 q=soc.cpu.minerva.payload__pc$25[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105618 q=soc.cpu.minerva.payload__pc$25[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105622 q=soc.cpu.minerva.payload__pc$25[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105626 q=soc.cpu.minerva.payload__pc$25[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105630 q=soc.cpu.minerva.payload__pc$25[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105634 q=soc.cpu.minerva.payload__pc$25[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105638 q=soc.cpu.minerva.payload__pc$25[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105642 q=soc.cpu.minerva.payload__pc$25[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105646 q=soc.cpu.minerva.payload__pc$25[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105650 q=soc.cpu.minerva.payload__pc$25[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105654 q=soc.cpu.minerva.payload__pc$25[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105658 q=soc.cpu.minerva.payload__pc$25[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105662 q=soc.cpu.minerva.payload__pc$25[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105666 q=soc.cpu.minerva.payload__pc$25[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105670 q=soc.cpu.minerva.payload__pc$25[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105674 q=soc.cpu.minerva.payload__pc$25[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105678 q=soc.cpu.minerva.payload__pc$25[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105682 q=soc.cpu.minerva.payload__pc$25[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105686 q=soc.cpu.minerva.payload__pc$25[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105690 q=soc.cpu.minerva.payload__pc$25[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105694 q=soc.cpu.minerva.payload__pc$25[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105698 q=soc.cpu.minerva.payload__pc$25[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105702 q=soc.cpu.minerva.payload__pc$25[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105706 q=soc.cpu.minerva.payload__pc$25[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105710 q=soc.cpu.minerva.payload__pc$25[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105714 q=soc.cpu.minerva.payload__pc$25[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105718 q=soc.cpu.minerva.payload__pc$25[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105720 q=soc.data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105722 q=soc.data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105724 q=soc.data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105726 q=soc.data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105728 q=soc.data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105730 q=soc.data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105732 q=soc.data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105734 q=soc.data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105736 q=soc.ram.ram[97][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105738 q=soc.ram.ram[97][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105740 q=soc.ram.ram[97][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105742 q=soc.ram.ram[97][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105744 q=soc.ram.ram[97][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105746 q=soc.ram.ram[97][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105748 q=soc.ram.ram[97][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105750 q=soc.ram.ram[97][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105752 q=soc.tx_fifo.unbuffered.storage[1][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105754 q=soc.tx_fifo.unbuffered.storage[1][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105756 q=soc.tx_fifo.unbuffered.storage[1][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105758 q=soc.tx_fifo.unbuffered.storage[1][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105760 q=soc.tx_fifo.unbuffered.storage[1][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105762 q=soc.tx_fifo.unbuffered.storage[1][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105764 q=soc.tx_fifo.unbuffered.storage[1][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105766 q=soc.tx_fifo.unbuffered.storage[1][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105768 q=soc.ram.ram[97][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105770 q=soc.ram.ram[97][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105772 q=soc.ram.ram[97][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105774 q=soc.ram.ram[97][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105776 q=soc.ram.ram[97][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105778 q=soc.ram.ram[97][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105780 q=soc.ram.ram[97][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105782 q=soc.ram.ram[97][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105784 q=soc.tx_fifo.unbuffered.storage[0][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105786 q=soc.tx_fifo.unbuffered.storage[0][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105788 q=soc.tx_fifo.unbuffered.storage[0][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105790 q=soc.tx_fifo.unbuffered.storage[0][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105792 q=soc.tx_fifo.unbuffered.storage[0][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105794 q=soc.tx_fifo.unbuffered.storage[0][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105796 q=soc.tx_fifo.unbuffered.storage[0][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105798 q=soc.tx_fifo.unbuffered.storage[0][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105800 q=soc.ram.ram[97][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105802 q=soc.ram.ram[97][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105804 q=soc.ram.ram[97][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105806 q=soc.ram.ram[97][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105808 q=soc.ram.ram[97][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105810 q=soc.ram.ram[97][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105812 q=soc.ram.ram[97][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105814 q=soc.ram.ram[97][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105816 q=soc.rx_fifo.unbuffered.storage[2][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105818 q=soc.rx_fifo.unbuffered.storage[2][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105820 q=soc.rx_fifo.unbuffered.storage[2][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105822 q=soc.rx_fifo.unbuffered.storage[2][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105824 q=soc.rx_fifo.unbuffered.storage[2][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105826 q=soc.rx_fifo.unbuffered.storage[2][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105828 q=soc.rx_fifo.unbuffered.storage[2][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105830 q=soc.rx_fifo.unbuffered.storage[2][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105832 q=soc.ram.ram[96][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105834 q=soc.ram.ram[96][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105836 q=soc.ram.ram[96][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105838 q=soc.ram.ram[96][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105840 q=soc.ram.ram[96][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105842 q=soc.ram.ram[96][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105844 q=soc.ram.ram[96][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105846 q=soc.ram.ram[96][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105848 q=soc.ram.ram[96][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105850 q=soc.ram.ram[96][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105852 q=soc.ram.ram[96][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105854 q=soc.ram.ram[96][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105856 q=soc.ram.ram[96][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105858 q=soc.ram.ram[96][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105860 q=soc.ram.ram[96][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105862 q=soc.ram.ram[96][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105866 q=soc.rom.spimemio.xfer.xfer_tag[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105870 q=soc.rom.spimemio.xfer.xfer_tag[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105874 q=soc.rom.spimemio.xfer.xfer_tag[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105876 q=soc.ram.ram[96][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105878 q=soc.ram.ram[96][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105880 q=soc.ram.ram[96][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105882 q=soc.ram.ram[96][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105884 q=soc.ram.ram[96][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105886 q=soc.ram.ram[96][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105888 q=soc.ram.ram[96][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105890 q=soc.ram.ram[96][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105892 q=soc.ram.ram[95][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105894 q=soc.ram.ram[95][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105896 q=soc.ram.ram[95][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105898 q=soc.ram.ram[95][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105900 q=soc.ram.ram[95][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105902 q=soc.ram.ram[95][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105904 q=soc.ram.ram[95][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105906 q=soc.ram.ram[95][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105908 q=soc.ram.ram[95][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105910 q=soc.ram.ram[95][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105912 q=soc.ram.ram[95][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105914 q=soc.ram.ram[95][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105916 q=soc.ram.ram[95][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105918 q=soc.ram.ram[95][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105920 q=soc.ram.ram[95][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105922 q=soc.ram.ram[95][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105924 q=soc.ram.ram[95][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105926 q=soc.ram.ram[95][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105928 q=soc.ram.ram[95][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105930 q=soc.ram.ram[95][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105932 q=soc.ram.ram[95][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105934 q=soc.ram.ram[95][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105936 q=soc.ram.ram[95][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105938 q=soc.ram.ram[95][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105940 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105942 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105944 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105946 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105948 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105950 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105952 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105954 q=soc.bridge.csr_mux_0.uart_rx_data__r_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105956 q=soc.ram.ram[94][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105958 q=soc.ram.ram[94][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105960 q=soc.ram.ram[94][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105962 q=soc.ram.ram[94][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105964 q=soc.ram.ram[94][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105966 q=soc.ram.ram[94][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105968 q=soc.ram.ram[94][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105970 q=soc.ram.ram[94][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105972 q=soc.rx_fifo.unbuffered.storage[1][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105974 q=soc.rx_fifo.unbuffered.storage[1][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105976 q=soc.rx_fifo.unbuffered.storage[1][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105978 q=soc.rx_fifo.unbuffered.storage[1][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105980 q=soc.rx_fifo.unbuffered.storage[1][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105982 q=soc.rx_fifo.unbuffered.storage[1][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105984 q=soc.rx_fifo.unbuffered.storage[1][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105986 q=soc.rx_fifo.unbuffered.storage[1][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105988 q=soc.ram.ram[94][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105990 q=soc.ram.ram[94][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105992 q=soc.ram.ram[94][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105994 q=soc.ram.ram[94][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105996 q=soc.ram.ram[94][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$105998 q=soc.ram.ram[94][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106000 q=soc.ram.ram[94][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106002 q=soc.ram.ram[94][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106004 q=soc.rx_fifo.unbuffered.storage[0][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106006 q=soc.rx_fifo.unbuffered.storage[0][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106008 q=soc.rx_fifo.unbuffered.storage[0][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106010 q=soc.rx_fifo.unbuffered.storage[0][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106012 q=soc.rx_fifo.unbuffered.storage[0][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106014 q=soc.rx_fifo.unbuffered.storage[0][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106016 q=soc.rx_fifo.unbuffered.storage[0][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106018 q=soc.rx_fifo.unbuffered.storage[0][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106020 q=soc.ram.ram[94][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106022 q=soc.ram.ram[94][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106024 q=soc.ram.ram[94][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106026 q=soc.ram.ram[94][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106028 q=soc.ram.ram[94][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106030 q=soc.ram.ram[94][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106032 q=soc.ram.ram[94][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106034 q=soc.ram.ram[94][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106036 q=soc.ram.ram[9][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106038 q=soc.ram.ram[9][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106040 q=soc.ram.ram[9][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106042 q=soc.ram.ram[9][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106044 q=soc.ram.ram[9][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106046 q=soc.ram.ram[9][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106048 q=soc.ram.ram[9][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106050 q=soc.ram.ram[9][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106052 q=soc.cpu.minerva.gprf.mem._mem[6][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106054 q=soc.cpu.minerva.gprf.mem._mem[6][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106056 q=soc.cpu.minerva.gprf.mem._mem[6][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106058 q=soc.cpu.minerva.gprf.mem._mem[6][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106060 q=soc.cpu.minerva.gprf.mem._mem[6][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106062 q=soc.cpu.minerva.gprf.mem._mem[6][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106064 q=soc.cpu.minerva.gprf.mem._mem[6][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106066 q=soc.cpu.minerva.gprf.mem._mem[6][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106068 q=soc.cpu.minerva.gprf.mem._mem[6][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106070 q=soc.cpu.minerva.gprf.mem._mem[6][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106072 q=soc.cpu.minerva.gprf.mem._mem[6][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106074 q=soc.cpu.minerva.gprf.mem._mem[6][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106076 q=soc.cpu.minerva.gprf.mem._mem[6][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106078 q=soc.cpu.minerva.gprf.mem._mem[6][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106080 q=soc.cpu.minerva.gprf.mem._mem[6][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106082 q=soc.cpu.minerva.gprf.mem._mem[6][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106084 q=soc.cpu.minerva.gprf.mem._mem[6][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106086 q=soc.cpu.minerva.gprf.mem._mem[6][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106088 q=soc.cpu.minerva.gprf.mem._mem[6][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106090 q=soc.cpu.minerva.gprf.mem._mem[6][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106092 q=soc.cpu.minerva.gprf.mem._mem[6][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106094 q=soc.cpu.minerva.gprf.mem._mem[6][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106096 q=soc.cpu.minerva.gprf.mem._mem[6][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106098 q=soc.cpu.minerva.gprf.mem._mem[6][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106100 q=soc.cpu.minerva.gprf.mem._mem[6][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106102 q=soc.cpu.minerva.gprf.mem._mem[6][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106104 q=soc.cpu.minerva.gprf.mem._mem[6][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106106 q=soc.cpu.minerva.gprf.mem._mem[6][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106108 q=soc.cpu.minerva.gprf.mem._mem[6][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106110 q=soc.cpu.minerva.gprf.mem._mem[6][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106112 q=soc.cpu.minerva.gprf.mem._mem[6][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106114 q=soc.cpu.minerva.gprf.mem._mem[6][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106116 q=soc.cpu.minerva.gprf.mem._mem[1][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106118 q=soc.cpu.minerva.gprf.mem._mem[1][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106120 q=soc.cpu.minerva.gprf.mem._mem[1][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106122 q=soc.cpu.minerva.gprf.mem._mem[1][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106124 q=soc.cpu.minerva.gprf.mem._mem[1][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106126 q=soc.cpu.minerva.gprf.mem._mem[1][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106128 q=soc.cpu.minerva.gprf.mem._mem[1][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106130 q=soc.cpu.minerva.gprf.mem._mem[1][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106132 q=soc.cpu.minerva.gprf.mem._mem[1][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106134 q=soc.cpu.minerva.gprf.mem._mem[1][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106136 q=soc.cpu.minerva.gprf.mem._mem[1][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106138 q=soc.cpu.minerva.gprf.mem._mem[1][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106140 q=soc.cpu.minerva.gprf.mem._mem[1][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106142 q=soc.cpu.minerva.gprf.mem._mem[1][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106144 q=soc.cpu.minerva.gprf.mem._mem[1][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106146 q=soc.cpu.minerva.gprf.mem._mem[1][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106148 q=soc.cpu.minerva.gprf.mem._mem[1][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106150 q=soc.cpu.minerva.gprf.mem._mem[1][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106152 q=soc.cpu.minerva.gprf.mem._mem[1][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106154 q=soc.cpu.minerva.gprf.mem._mem[1][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106156 q=soc.cpu.minerva.gprf.mem._mem[1][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106158 q=soc.cpu.minerva.gprf.mem._mem[1][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106160 q=soc.cpu.minerva.gprf.mem._mem[1][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106162 q=soc.cpu.minerva.gprf.mem._mem[1][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106164 q=soc.cpu.minerva.gprf.mem._mem[1][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106166 q=soc.cpu.minerva.gprf.mem._mem[1][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106168 q=soc.cpu.minerva.gprf.mem._mem[1][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106170 q=soc.cpu.minerva.gprf.mem._mem[1][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106172 q=soc.cpu.minerva.gprf.mem._mem[1][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106174 q=soc.cpu.minerva.gprf.mem._mem[1][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106176 q=soc.cpu.minerva.gprf.mem._mem[1][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106178 q=soc.cpu.minerva.gprf.mem._mem[1][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106180 q=soc.ram.ram[98][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106182 q=soc.ram.ram[98][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106184 q=soc.ram.ram[98][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106186 q=soc.ram.ram[98][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106188 q=soc.ram.ram[98][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106190 q=soc.ram.ram[98][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106192 q=soc.ram.ram[98][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106194 q=soc.ram.ram[98][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106196 q=soc.ram.ram[98][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106198 q=soc.ram.ram[98][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106200 q=soc.ram.ram[98][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106202 q=soc.ram.ram[98][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106204 q=soc.ram.ram[98][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106206 q=soc.ram.ram[98][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106208 q=soc.ram.ram[98][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106210 q=soc.ram.ram[98][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106212 q=soc.ram.ram[99][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106214 q=soc.ram.ram[99][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106216 q=soc.ram.ram[99][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106218 q=soc.ram.ram[99][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106220 q=soc.ram.ram[99][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106222 q=soc.ram.ram[99][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106224 q=soc.ram.ram[99][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106226 q=soc.ram.ram[99][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106228 q=soc.ram.ram[98][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106230 q=soc.ram.ram[98][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106232 q=soc.ram.ram[98][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106234 q=soc.ram.ram[98][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106236 q=soc.ram.ram[98][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106238 q=soc.ram.ram[98][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106240 q=soc.ram.ram[98][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106242 q=soc.ram.ram[98][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106246 q=soc.cpu.minerva.d.valid$1
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106248 q=soc.ram.ram[9][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106250 q=soc.ram.ram[9][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106252 q=soc.ram.ram[9][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106254 q=soc.ram.ram[9][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106256 q=soc.ram.ram[9][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106258 q=soc.ram.ram[9][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106260 q=soc.ram.ram[9][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106262 q=soc.ram.ram[9][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106264 q=soc.ram.ram[99][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106266 q=soc.ram.ram[99][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106268 q=soc.ram.ram[99][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106270 q=soc.ram.ram[99][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106272 q=soc.ram.ram[99][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106274 q=soc.ram.ram[99][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106276 q=soc.ram.ram[99][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106278 q=soc.ram.ram[99][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106280 q=soc.ram.ram[99][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106282 q=soc.ram.ram[99][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106284 q=soc.ram.ram[99][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106286 q=soc.ram.ram[99][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106288 q=soc.ram.ram[99][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106290 q=soc.ram.ram[99][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106292 q=soc.ram.ram[99][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106294 q=soc.ram.ram[99][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106298 q=soc.cpu.minerva.adder.x_sub
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106300 q=soc.ram.ram[1][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106302 q=soc.ram.ram[1][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106304 q=soc.ram.ram[1][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106306 q=soc.ram.ram[1][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106308 q=soc.ram.ram[1][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106310 q=soc.ram.ram[1][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106312 q=soc.ram.ram[1][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106314 q=soc.ram.ram[1][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106316 q=soc.ram.ram[106][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106318 q=soc.ram.ram[106][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106320 q=soc.ram.ram[106][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106322 q=soc.ram.ram[106][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106324 q=soc.ram.ram[106][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106326 q=soc.ram.ram[106][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106328 q=soc.ram.ram[106][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106330 q=soc.ram.ram[106][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106334 q=soc.cpu.minerva.a.valid
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106338 q=soc.cpu.minerva.payload__multiply$134
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106342 q=soc.cpu.minerva.m_payload__exception
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106346 q=soc.cpu.minerva.payload__result$129[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106350 q=soc.cpu.minerva.payload__result$129[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106354 q=soc.cpu.minerva.payload__result$129[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106358 q=soc.cpu.minerva.payload__result$129[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106362 q=soc.cpu.minerva.payload__result$129[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106366 q=soc.cpu.minerva.payload__result$129[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106370 q=soc.cpu.minerva.payload__result$129[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106374 q=soc.cpu.minerva.payload__result$129[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106378 q=soc.cpu.minerva.payload__result$129[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106382 q=soc.cpu.minerva.payload__result$129[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106386 q=soc.cpu.minerva.payload__result$129[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106390 q=soc.cpu.minerva.payload__result$129[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106394 q=soc.cpu.minerva.payload__result$129[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106398 q=soc.cpu.minerva.payload__result$129[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106402 q=soc.cpu.minerva.payload__result$129[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106406 q=soc.cpu.minerva.payload__result$129[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106410 q=soc.cpu.minerva.payload__result$129[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106414 q=soc.cpu.minerva.payload__result$129[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106418 q=soc.cpu.minerva.payload__result$129[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106422 q=soc.cpu.minerva.payload__result$129[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106426 q=soc.cpu.minerva.payload__result$129[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106430 q=soc.cpu.minerva.payload__result$129[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106434 q=soc.cpu.minerva.payload__result$129[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106438 q=soc.cpu.minerva.payload__result$129[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106442 q=soc.cpu.minerva.payload__result$129[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106446 q=soc.cpu.minerva.payload__result$129[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106450 q=soc.cpu.minerva.payload__result$129[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106454 q=soc.cpu.minerva.payload__result$129[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106458 q=soc.cpu.minerva.payload__result$129[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106462 q=soc.cpu.minerva.payload__result$129[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106466 q=soc.cpu.minerva.payload__result$129[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106470 q=soc.cpu.minerva.payload__result$129[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106474 q=soc.cpu.minerva.payload__rd_we$125
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106478 q=soc.cpu.minerva.payload__load_data$132[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106482 q=soc.cpu.minerva.payload__load_data$132[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106486 q=soc.cpu.minerva.payload__load_data$132[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106490 q=soc.cpu.minerva.payload__load_data$132[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106494 q=soc.cpu.minerva.payload__load_data$132[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106498 q=soc.cpu.minerva.payload__load_data$132[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106502 q=soc.cpu.minerva.payload__load_data$132[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106506 q=soc.cpu.minerva.payload__load_data$132[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106510 q=soc.cpu.minerva.payload__load_data$132[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106514 q=soc.cpu.minerva.payload__load_data$132[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106518 q=soc.cpu.minerva.payload__load_data$132[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106522 q=soc.cpu.minerva.payload__load_data$132[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106526 q=soc.cpu.minerva.payload__load_data$132[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106530 q=soc.cpu.minerva.payload__load_data$132[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106534 q=soc.cpu.minerva.payload__load_data$132[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106538 q=soc.cpu.minerva.payload__load_data$132[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106542 q=soc.cpu.minerva.payload__load_data$132[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106546 q=soc.cpu.minerva.payload__load_data$132[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106550 q=soc.cpu.minerva.payload__load_data$132[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106554 q=soc.cpu.minerva.payload__load_data$132[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106558 q=soc.cpu.minerva.payload__load_data$132[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106562 q=soc.cpu.minerva.payload__load_data$132[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106566 q=soc.cpu.minerva.payload__load_data$132[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106570 q=soc.cpu.minerva.payload__load_data$132[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106574 q=soc.cpu.minerva.payload__load_data$132[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106578 q=soc.cpu.minerva.payload__load_data$132[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106582 q=soc.cpu.minerva.payload__load_data$132[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106586 q=soc.cpu.minerva.payload__load_data$132[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106590 q=soc.cpu.minerva.payload__load_data$132[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106594 q=soc.cpu.minerva.payload__load_data$132[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106598 q=soc.cpu.minerva.payload__load_data$132[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106602 q=soc.cpu.minerva.payload__load_data$132[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106606 q=soc.cpu.minerva.payload__funct3$127[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106610 q=soc.cpu.minerva.payload__funct3$127[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106614 q=soc.cpu.minerva.payload__funct3$127[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106618 q=soc.cpu.minerva.payload__load$131
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106622 q=soc.cpu.minerva.payload__rd$123[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106626 q=soc.cpu.minerva.payload__rd$123[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106630 q=soc.cpu.minerva.payload__rd$123[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106634 q=soc.cpu.minerva.payload__rd$123[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106638 q=soc.cpu.minerva.payload__rd$123[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106642 q=soc.cpu.minerva.payload__divide$106
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106646 q=soc.cpu.minerva.payload__multiply$104
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106650 q=soc.cpu.minerva.payload__result$93[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106654 q=soc.cpu.minerva.payload__result$93[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106658 q=soc.cpu.minerva.payload__result$93[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106662 q=soc.cpu.minerva.payload__result$93[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106666 q=soc.cpu.minerva.payload__result$93[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106670 q=soc.cpu.minerva.payload__result$93[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106674 q=soc.cpu.minerva.payload__result$93[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106678 q=soc.cpu.minerva.payload__result$93[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106682 q=soc.cpu.minerva.payload__result$93[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106686 q=soc.cpu.minerva.payload__result$93[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106690 q=soc.cpu.minerva.payload__result$93[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106694 q=soc.cpu.minerva.payload__result$93[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106698 q=soc.cpu.minerva.payload__result$93[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106702 q=soc.cpu.minerva.payload__result$93[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106706 q=soc.cpu.minerva.payload__result$93[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106710 q=soc.cpu.minerva.payload__result$93[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106714 q=soc.cpu.minerva.payload__result$93[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106718 q=soc.cpu.minerva.payload__result$93[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106722 q=soc.cpu.minerva.payload__result$93[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106726 q=soc.cpu.minerva.payload__result$93[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106730 q=soc.cpu.minerva.payload__result$93[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106734 q=soc.cpu.minerva.payload__result$93[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106738 q=soc.cpu.minerva.payload__result$93[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106742 q=soc.cpu.minerva.payload__result$93[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106746 q=soc.cpu.minerva.payload__result$93[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106750 q=soc.cpu.minerva.payload__result$93[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106754 q=soc.cpu.minerva.payload__result$93[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106758 q=soc.cpu.minerva.payload__result$93[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106762 q=soc.cpu.minerva.payload__result$93[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106766 q=soc.cpu.minerva.payload__result$93[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106770 q=soc.cpu.minerva.payload__result$93[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106774 q=soc.cpu.minerva.payload__result$93[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106778 q=soc.cpu.minerva.payload__csr_result$117[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106782 q=soc.cpu.minerva.payload__csr_result$117[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106786 q=soc.cpu.minerva.payload__csr_result$117[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106790 q=soc.cpu.minerva.payload__csr_result$117[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106794 q=soc.cpu.minerva.payload__csr_result$117[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106798 q=soc.cpu.minerva.payload__csr_result$117[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106802 q=soc.cpu.minerva.payload__csr_result$117[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106806 q=soc.cpu.minerva.payload__csr_result$117[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106810 q=soc.cpu.minerva.payload__csr_result$117[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106814 q=soc.cpu.minerva.payload__csr_result$117[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106818 q=soc.cpu.minerva.payload__csr_result$117[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106822 q=soc.cpu.minerva.payload__csr_result$117[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106826 q=soc.cpu.minerva.payload__csr_result$117[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106830 q=soc.cpu.minerva.payload__csr_result$117[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106834 q=soc.cpu.minerva.payload__csr_result$117[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106838 q=soc.cpu.minerva.payload__csr_result$117[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106842 q=soc.cpu.minerva.payload__csr_result$117[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106846 q=soc.cpu.minerva.payload__csr_result$117[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106850 q=soc.cpu.minerva.payload__csr_result$117[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106854 q=soc.cpu.minerva.payload__csr_result$117[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106858 q=soc.cpu.minerva.payload__csr_result$117[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106862 q=soc.cpu.minerva.payload__csr_result$117[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106866 q=soc.cpu.minerva.payload__csr_result$117[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106870 q=soc.cpu.minerva.payload__csr_result$117[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106874 q=soc.cpu.minerva.payload__csr_result$117[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106878 q=soc.cpu.minerva.payload__csr_result$117[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106882 q=soc.cpu.minerva.payload__csr_result$117[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106886 q=soc.cpu.minerva.payload__csr_result$117[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106890 q=soc.cpu.minerva.payload__csr_result$117[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106894 q=soc.cpu.minerva.payload__csr_result$117[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106898 q=soc.cpu.minerva.payload__csr_result$117[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106902 q=soc.cpu.minerva.payload__csr_result$117[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106906 q=soc.cpu.minerva.payload__csr_we$116
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106910 q=soc.cpu.minerva.payload__csr_adr$114[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106914 q=soc.cpu.minerva.payload__csr_adr$114[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106918 q=soc.cpu.minerva.payload__csr_adr$114[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106922 q=soc.cpu.minerva.payload__csr_adr$114[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106926 q=soc.cpu.minerva.payload__csr_adr$114[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106930 q=soc.cpu.minerva.payload__csr_adr$114[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106934 q=soc.cpu.minerva.payload__csr_adr$114[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106938 q=soc.cpu.minerva.payload__csr_adr$114[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106942 q=soc.cpu.minerva.payload__csr_adr$114[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106946 q=soc.cpu.minerva.payload__csr_adr$114[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106950 q=soc.cpu.minerva.payload__csr_adr$114[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106954 q=soc.cpu.minerva.payload__csr_adr$114[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106958 q=soc.cpu.minerva.payload__csr$112
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106962 q=soc.cpu.minerva.payload__branch_predict_taken$110
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106966 q=soc.cpu.minerva.payload__branch_target$109[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106970 q=soc.cpu.minerva.payload__branch_target$109[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106974 q=soc.cpu.minerva.payload__branch_target$109[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106978 q=soc.cpu.minerva.payload__branch_target$109[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106982 q=soc.cpu.minerva.payload__branch_target$109[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106986 q=soc.cpu.minerva.payload__branch_target$109[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106990 q=soc.cpu.minerva.payload__branch_target$109[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106994 q=soc.cpu.minerva.payload__branch_target$109[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$106998 q=soc.cpu.minerva.payload__branch_target$109[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107002 q=soc.cpu.minerva.payload__branch_target$109[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107006 q=soc.cpu.minerva.payload__branch_target$109[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107010 q=soc.cpu.minerva.payload__branch_target$109[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107014 q=soc.cpu.minerva.payload__branch_target$109[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107018 q=soc.cpu.minerva.payload__branch_target$109[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107022 q=soc.cpu.minerva.payload__branch_target$109[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107026 q=soc.cpu.minerva.payload__branch_target$109[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107030 q=soc.cpu.minerva.payload__branch_target$109[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107034 q=soc.cpu.minerva.payload__branch_target$109[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107038 q=soc.cpu.minerva.payload__branch_target$109[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107042 q=soc.cpu.minerva.payload__branch_target$109[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107046 q=soc.cpu.minerva.payload__branch_target$109[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107050 q=soc.cpu.minerva.payload__branch_target$109[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107054 q=soc.cpu.minerva.payload__branch_target$109[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107058 q=soc.cpu.minerva.payload__branch_target$109[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107062 q=soc.cpu.minerva.payload__branch_target$109[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107066 q=soc.cpu.minerva.payload__branch_target$109[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107070 q=soc.cpu.minerva.payload__branch_target$109[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107074 q=soc.cpu.minerva.payload__branch_target$109[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107078 q=soc.cpu.minerva.payload__branch_target$109[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107082 q=soc.cpu.minerva.payload__branch_target$109[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107086 q=soc.cpu.minerva.payload__branch_target$109[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107090 q=soc.cpu.minerva.payload__branch_target$109[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107094 q=soc.cpu.minerva.payload__branch_taken
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107098 q=soc.cpu.minerva.payload__condition_met$107
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107102 q=soc.cpu.minerva.payload__mret$118
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107106 q=soc.cpu.minerva.payload__shift$95
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107110 q=soc.cpu.minerva.payload__compare$102
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107114 q=soc.cpu.minerva.payload__store$99
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107118 q=soc.cpu.minerva.payload__load$97
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107122 q=soc.cpu.minerva.payload__bypass_m$90
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107126 q=soc.cpu.minerva.payload__rd_we$88
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107130 q=soc.cpu.minerva.payload__ebreak$84
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107134 q=soc.cpu.minerva.payload__ecall$82
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107138 q=soc.cpu.minerva.payload__loadstore_misaligned$80
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107142 q=soc.cpu.minerva.payload__illegal$79
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107146 q=soc.cpu.minerva.payload__instruction$73[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107150 q=soc.cpu.minerva.payload__instruction$73[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107154 q=soc.cpu.minerva.payload__instruction$73[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107158 q=soc.cpu.minerva.payload__instruction$73[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107162 q=soc.cpu.minerva.payload__instruction$73[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107166 q=soc.cpu.minerva.payload__instruction$73[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107170 q=soc.cpu.minerva.payload__instruction$73[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107174 q=soc.cpu.minerva.payload__instruction$73[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107178 q=soc.cpu.minerva.payload__instruction$73[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107182 q=soc.cpu.minerva.payload__instruction$73[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107186 q=soc.cpu.minerva.payload__instruction$73[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107190 q=soc.cpu.minerva.payload__instruction$73[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107194 q=soc.cpu.minerva.payload__instruction$73[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107198 q=soc.cpu.minerva.payload__instruction$73[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107202 q=soc.cpu.minerva.payload__instruction$73[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107206 q=soc.cpu.minerva.payload__instruction$73[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107210 q=soc.cpu.minerva.payload__instruction$73[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107214 q=soc.cpu.minerva.payload__instruction$73[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107218 q=soc.cpu.minerva.payload__instruction$73[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107222 q=soc.cpu.minerva.payload__instruction$73[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107226 q=soc.cpu.minerva.payload__instruction$73[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107230 q=soc.cpu.minerva.payload__instruction$73[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107234 q=soc.cpu.minerva.payload__instruction$73[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107238 q=soc.cpu.minerva.payload__instruction$73[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107242 q=soc.cpu.minerva.payload__instruction$73[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107246 q=soc.cpu.minerva.payload__instruction$73[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107250 q=soc.cpu.minerva.payload__instruction$73[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107254 q=soc.cpu.minerva.payload__instruction$73[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107258 q=soc.cpu.minerva.payload__instruction$73[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107262 q=soc.cpu.minerva.payload__instruction$73[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107266 q=soc.cpu.minerva.payload__instruction$73[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107270 q=soc.cpu.minerva.payload__instruction$73[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107274 q=soc.cpu.minerva.payload__divide$55
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107278 q=soc.cpu.minerva.payload__multiply$54
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107282 q=soc.cpu.minerva.payload__src2$45[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107286 q=soc.cpu.minerva.payload__src2$45[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107290 q=soc.cpu.minerva.payload__src2$45[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107294 q=soc.cpu.minerva.payload__src2$45[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107298 q=soc.cpu.minerva.payload__src2$45[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107302 q=soc.cpu.minerva.payload__src2$45[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107306 q=soc.cpu.minerva.payload__src2$45[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107310 q=soc.cpu.minerva.payload__src2$45[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107314 q=soc.cpu.minerva.payload__src2$45[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107318 q=soc.cpu.minerva.payload__src2$45[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107322 q=soc.cpu.minerva.payload__src2$45[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107326 q=soc.cpu.minerva.payload__src2$45[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107330 q=soc.cpu.minerva.payload__src2$45[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107334 q=soc.cpu.minerva.payload__src2$45[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107338 q=soc.cpu.minerva.payload__src2$45[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107342 q=soc.cpu.minerva.payload__src2$45[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107346 q=soc.cpu.minerva.payload__src2$45[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107350 q=soc.cpu.minerva.payload__src2$45[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107354 q=soc.cpu.minerva.payload__src2$45[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107358 q=soc.cpu.minerva.payload__src2$45[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107362 q=soc.cpu.minerva.payload__src2$45[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107366 q=soc.cpu.minerva.payload__src2$45[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107370 q=soc.cpu.minerva.payload__src2$45[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107374 q=soc.cpu.minerva.payload__src2$45[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107378 q=soc.cpu.minerva.payload__src2$45[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107382 q=soc.cpu.minerva.payload__src2$45[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107386 q=soc.cpu.minerva.payload__src2$45[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107390 q=soc.cpu.minerva.payload__src2$45[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107394 q=soc.cpu.minerva.payload__src2$45[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107398 q=soc.cpu.minerva.payload__src2$45[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107402 q=soc.cpu.minerva.payload__src2$45[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107406 q=soc.cpu.minerva.payload__src2$45[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107410 q=soc.cpu.minerva.payload__branch_target$62[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107414 q=soc.cpu.minerva.payload__branch_target$62[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107418 q=soc.cpu.minerva.payload__branch_target$62[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107422 q=soc.cpu.minerva.payload__branch_target$62[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107426 q=soc.cpu.minerva.payload__branch_target$62[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107430 q=soc.cpu.minerva.payload__branch_target$62[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107434 q=soc.cpu.minerva.payload__branch_target$62[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107438 q=soc.cpu.minerva.payload__branch_target$62[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107442 q=soc.cpu.minerva.payload__branch_target$62[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107446 q=soc.cpu.minerva.payload__branch_target$62[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107450 q=soc.cpu.minerva.payload__branch_target$62[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107454 q=soc.cpu.minerva.payload__branch_target$62[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107458 q=soc.cpu.minerva.payload__branch_target$62[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107462 q=soc.cpu.minerva.payload__branch_target$62[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107466 q=soc.cpu.minerva.payload__branch_target$62[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107470 q=soc.cpu.minerva.payload__branch_target$62[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107474 q=soc.cpu.minerva.payload__branch_target$62[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107478 q=soc.cpu.minerva.payload__branch_target$62[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107482 q=soc.cpu.minerva.payload__branch_target$62[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107486 q=soc.cpu.minerva.payload__branch_target$62[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107490 q=soc.cpu.minerva.payload__branch_target$62[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107494 q=soc.cpu.minerva.payload__branch_target$62[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107498 q=soc.cpu.minerva.payload__branch_target$62[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107502 q=soc.cpu.minerva.payload__branch_target$62[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107506 q=soc.cpu.minerva.payload__branch_target$62[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107510 q=soc.cpu.minerva.payload__branch_target$62[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107514 q=soc.cpu.minerva.payload__branch_target$62[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107518 q=soc.cpu.minerva.payload__branch_target$62[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107522 q=soc.cpu.minerva.payload__branch_target$62[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107526 q=soc.cpu.minerva.payload__branch_target$62[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107530 q=soc.cpu.minerva.payload__branch_predict_taken$63
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107534 q=soc.cpu.minerva.payload__store_operand$46[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107538 q=soc.cpu.minerva.payload__store_operand$46[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107542 q=soc.cpu.minerva.payload__store_operand$46[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107546 q=soc.cpu.minerva.payload__store_operand$46[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107550 q=soc.cpu.minerva.payload__store_operand$46[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107554 q=soc.cpu.minerva.payload__store_operand$46[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107558 q=soc.cpu.minerva.payload__store_operand$46[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107562 q=soc.cpu.minerva.payload__store_operand$46[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107566 q=soc.cpu.minerva.payload__store_operand$46[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107570 q=soc.cpu.minerva.payload__store_operand$46[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107574 q=soc.cpu.minerva.payload__store_operand$46[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107578 q=soc.cpu.minerva.payload__store_operand$46[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107582 q=soc.cpu.minerva.payload__store_operand$46[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107586 q=soc.cpu.minerva.payload__store_operand$46[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107590 q=soc.cpu.minerva.payload__store_operand$46[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107594 q=soc.cpu.minerva.payload__store_operand$46[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107598 q=soc.cpu.minerva.payload__store_operand$46[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107602 q=soc.cpu.minerva.payload__store_operand$46[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107606 q=soc.cpu.minerva.payload__store_operand$46[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107610 q=soc.cpu.minerva.payload__store_operand$46[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107614 q=soc.cpu.minerva.payload__store_operand$46[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107618 q=soc.cpu.minerva.payload__store_operand$46[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107622 q=soc.cpu.minerva.payload__store_operand$46[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107626 q=soc.cpu.minerva.payload__store_operand$46[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107630 q=soc.cpu.minerva.payload__store_operand$46[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107634 q=soc.cpu.minerva.payload__store_operand$46[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107638 q=soc.cpu.minerva.payload__store_operand$46[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107642 q=soc.cpu.minerva.payload__store_operand$46[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107646 q=soc.cpu.minerva.payload__store_operand$46[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107650 q=soc.cpu.minerva.payload__store_operand$46[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107654 q=soc.cpu.minerva.payload__store_operand$46[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107658 q=soc.cpu.minerva.payload__store_operand$46[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107662 q=soc.cpu.minerva.payload__src1$44[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107666 q=soc.cpu.minerva.payload__src1$44[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107670 q=soc.cpu.minerva.payload__src1$44[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107674 q=soc.cpu.minerva.payload__src1$44[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107678 q=soc.cpu.minerva.payload__src1$44[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107682 q=soc.cpu.minerva.payload__src1$44[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107686 q=soc.cpu.minerva.payload__src1$44[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107690 q=soc.cpu.minerva.payload__src1$44[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107694 q=soc.cpu.minerva.payload__src1$44[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107698 q=soc.cpu.minerva.payload__src1$44[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107702 q=soc.cpu.minerva.payload__src1$44[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107706 q=soc.cpu.minerva.payload__src1$44[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107710 q=soc.cpu.minerva.payload__src1$44[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107714 q=soc.cpu.minerva.payload__src1$44[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107718 q=soc.cpu.minerva.payload__src1$44[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107722 q=soc.cpu.minerva.payload__src1$44[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107726 q=soc.cpu.minerva.payload__src1$44[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107730 q=soc.cpu.minerva.payload__src1$44[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107734 q=soc.cpu.minerva.payload__src1$44[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107738 q=soc.cpu.minerva.payload__src1$44[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107742 q=soc.cpu.minerva.payload__src1$44[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107746 q=soc.cpu.minerva.payload__src1$44[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107750 q=soc.cpu.minerva.payload__src1$44[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107754 q=soc.cpu.minerva.payload__src1$44[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107758 q=soc.cpu.minerva.payload__src1$44[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107762 q=soc.cpu.minerva.payload__src1$44[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107766 q=soc.cpu.minerva.payload__src1$44[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107770 q=soc.cpu.minerva.payload__src1$44[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107774 q=soc.cpu.minerva.payload__src1$44[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107778 q=soc.cpu.minerva.payload__src1$44[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107782 q=soc.cpu.minerva.payload__src1$44[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107786 q=soc.cpu.minerva.payload__src1$44[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107790 q=soc.cpu.minerva.payload__mret$69
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107794 q=soc.cpu.minerva.payload__ebreak$68
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107798 q=soc.cpu.minerva.payload__ecall$67
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107802 q=soc.cpu.minerva.payload__csr_we$66
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107806 q=soc.cpu.minerva.payload__branch_target$62[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107810 q=soc.cpu.minerva.payload__branch_target$62[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107814 q=soc.cpu.minerva.payload__csr_adr$65[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107818 q=soc.cpu.minerva.payload__csr_adr$65[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107822 q=soc.cpu.minerva.payload__csr_adr$65[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107826 q=soc.cpu.minerva.payload__csr_adr$65[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107830 q=soc.cpu.minerva.payload__csr_adr$65[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107834 q=soc.cpu.minerva.payload__csr_adr$65[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107838 q=soc.cpu.minerva.payload__csr_adr$65[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107842 q=soc.cpu.minerva.payload__csr_adr$65[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107846 q=soc.cpu.minerva.payload__csr_adr$65[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107850 q=soc.cpu.minerva.payload__csr_adr$65[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107854 q=soc.cpu.minerva.payload__csr$64
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107858 q=soc.cpu.minerva.payload__fence_i
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107862 q=soc.cpu.minerva.payload__branch$61
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107866 q=soc.cpu.minerva.payload__jump$59
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107870 q=soc.cpu.minerva.payload__sext$58
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107874 q=soc.cpu.minerva.payload__direction$57
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107878 q=soc.cpu.minerva.payload__shift$56
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107882 q=soc.cpu.minerva.payload__logic$53
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107886 q=soc.cpu.minerva.payload__compare$60
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107890 q=soc.cpu.minerva.payload__store$51
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107894 q=soc.cpu.minerva.payload__load$50
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107898 q=soc.cpu.minerva.payload__bypass_m$48
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107902 q=soc.cpu.minerva.payload__bypass_x$47
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107906 q=soc.cpu.minerva.payload__rs1_re$43
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107910 q=soc.cpu.minerva.payload__rd_we$42
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107914 q=soc.cpu.minerva.payload__illegal$39
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107918 q=soc.cpu.minerva.payload__instruction$34[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107922 q=soc.cpu.minerva.payload__instruction$34[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107926 q=soc.cpu.minerva.payload__instruction$34[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107930 q=soc.cpu.minerva.payload__instruction$34[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107934 q=soc.cpu.minerva.payload__instruction$34[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107938 q=soc.cpu.minerva.payload__instruction$34[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107942 q=soc.cpu.minerva.payload__instruction$34[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107946 q=soc.cpu.minerva.payload__instruction$34[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107950 q=soc.cpu.minerva.payload__instruction$34[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107954 q=soc.cpu.minerva.payload__instruction$34[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107958 q=soc.cpu.minerva.payload__instruction$34[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107962 q=soc.cpu.minerva.payload__instruction$34[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107966 q=soc.cpu.minerva.payload__instruction$34[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107970 q=soc.cpu.minerva.payload__instruction$34[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107974 q=soc.cpu.minerva.payload__instruction$34[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107978 q=soc.cpu.minerva.payload__instruction$34[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107982 q=soc.cpu.minerva.payload__instruction$34[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107986 q=soc.cpu.minerva.payload__instruction$34[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107990 q=soc.cpu.minerva.payload__instruction$34[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107994 q=soc.cpu.minerva.payload__instruction$34[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$107998 q=soc.cpu.minerva.payload__instruction$34[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108002 q=soc.cpu.minerva.payload__instruction$34[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108006 q=soc.cpu.minerva.payload__instruction$34[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108010 q=soc.cpu.minerva.payload__instruction$34[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108014 q=soc.cpu.minerva.payload__instruction$34[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108018 q=soc.cpu.minerva.payload__instruction$34[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108022 q=soc.cpu.minerva.payload__instruction$34[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108026 q=soc.cpu.minerva.payload__instruction$34[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108030 q=soc.cpu.minerva.payload__instruction$34[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108034 q=soc.cpu.minerva.payload__instruction$34[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108038 q=soc.cpu.minerva.payload__instruction$34[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108042 q=soc.cpu.minerva.payload__instruction$34[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108044 q=soc.ram.ram[19][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108046 q=soc.ram.ram[19][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108048 q=soc.ram.ram[19][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108050 q=soc.ram.ram[19][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108052 q=soc.ram.ram[19][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108054 q=soc.ram.ram[19][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108056 q=soc.ram.ram[19][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108058 q=soc.ram.ram[19][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108062 q=soc.cpu.minerva.payload__instruction$28[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108066 q=soc.cpu.minerva.payload__instruction$28[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108070 q=soc.cpu.minerva.payload__instruction$28[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108074 q=soc.cpu.minerva.payload__instruction$28[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108078 q=soc.cpu.minerva.payload__instruction$28[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108082 q=soc.cpu.minerva.payload__instruction$28[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108086 q=soc.cpu.minerva.payload__instruction$28[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108090 q=soc.cpu.minerva.payload__instruction$28[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108094 q=soc.cpu.minerva.payload__instruction$28[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108098 q=soc.cpu.minerva.payload__instruction$28[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108102 q=soc.cpu.minerva.payload__instruction$28[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108106 q=soc.cpu.minerva.payload__instruction$28[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108110 q=soc.cpu.minerva.payload__instruction$28[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108114 q=soc.cpu.minerva.payload__instruction$28[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108118 q=soc.cpu.minerva.payload__instruction$28[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108122 q=soc.cpu.minerva.payload__instruction$28[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108126 q=soc.cpu.minerva.payload__instruction$28[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108130 q=soc.cpu.minerva.payload__instruction$28[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108134 q=soc.cpu.minerva.payload__instruction$28[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108138 q=soc.cpu.minerva.payload__instruction$28[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108142 q=soc.cpu.minerva.csrf_rp__addr[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108144 q=soc.ram.ram[15][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108146 q=soc.ram.ram[15][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108148 q=soc.ram.ram[15][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108150 q=soc.ram.ram[15][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108152 q=soc.ram.ram[15][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108154 q=soc.ram.ram[15][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108156 q=soc.ram.ram[15][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108158 q=soc.ram.ram[15][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108162 q=soc.cpu.minerva.csrf_rp__addr[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108166 q=soc.cpu.minerva.csrf_rp__addr[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108170 q=soc.cpu.minerva.csrf_rp__addr[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108174 q=soc.cpu.minerva.csrf_rp__addr[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108178 q=soc.cpu.minerva.csrf_rp__addr[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108182 q=soc.cpu.minerva.csrf_rp__addr[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108186 q=soc.cpu.minerva.csrf_rp__addr[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108190 q=soc.cpu.minerva.csrf_rp__addr[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108194 q=soc.cpu.minerva.csrf_rp__addr[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108198 q=soc.cpu.minerva.csrf_rp__addr[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108202 q=soc.cpu.minerva.csrf_rp__addr[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108204 q=soc.bridge.csr_mux_1.uart_ev_enable__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108206 q=soc.ram.ram[122][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108208 q=soc.ram.ram[122][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108210 q=soc.ram.ram[122][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108212 q=soc.ram.ram[122][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108214 q=soc.ram.ram[122][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108216 q=soc.ram.ram[122][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108218 q=soc.ram.ram[122][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108220 q=soc.ram.ram[122][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108222 q=soc.cpu.minerva.gprf.mem._mem[31][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108224 q=soc.cpu.minerva.gprf.mem._mem[31][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108226 q=soc.cpu.minerva.gprf.mem._mem[31][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108228 q=soc.cpu.minerva.gprf.mem._mem[31][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108230 q=soc.cpu.minerva.gprf.mem._mem[31][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108232 q=soc.cpu.minerva.gprf.mem._mem[31][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108234 q=soc.cpu.minerva.gprf.mem._mem[31][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108236 q=soc.cpu.minerva.gprf.mem._mem[31][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108238 q=soc.cpu.minerva.gprf.mem._mem[31][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108240 q=soc.cpu.minerva.gprf.mem._mem[31][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108242 q=soc.cpu.minerva.gprf.mem._mem[31][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108244 q=soc.cpu.minerva.gprf.mem._mem[31][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108246 q=soc.cpu.minerva.gprf.mem._mem[31][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108248 q=soc.cpu.minerva.gprf.mem._mem[31][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108250 q=soc.cpu.minerva.gprf.mem._mem[31][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108252 q=soc.cpu.minerva.gprf.mem._mem[31][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108254 q=soc.cpu.minerva.gprf.mem._mem[31][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108256 q=soc.cpu.minerva.gprf.mem._mem[31][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108258 q=soc.cpu.minerva.gprf.mem._mem[31][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108260 q=soc.cpu.minerva.gprf.mem._mem[31][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108262 q=soc.cpu.minerva.gprf.mem._mem[31][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108264 q=soc.cpu.minerva.gprf.mem._mem[31][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108266 q=soc.cpu.minerva.gprf.mem._mem[31][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108268 q=soc.cpu.minerva.gprf.mem._mem[31][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108270 q=soc.cpu.minerva.gprf.mem._mem[31][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108272 q=soc.cpu.minerva.gprf.mem._mem[31][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108274 q=soc.cpu.minerva.gprf.mem._mem[31][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108276 q=soc.cpu.minerva.gprf.mem._mem[31][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108278 q=soc.cpu.minerva.gprf.mem._mem[31][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108280 q=soc.cpu.minerva.gprf.mem._mem[31][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108282 q=soc.cpu.minerva.gprf.mem._mem[31][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108284 q=soc.cpu.minerva.gprf.mem._mem[31][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108286 q=soc.bridge._int_src.uart_ev_pending__r_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108288 q=soc.bridge._int_src._rx_err_ev_stb_r
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108290 q=soc.fsm_state
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108294 q=soc.bridge._int_src.uart_ev_enable__r_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108298 q=soc.bridge._int_src.uart_ev_enable__r_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108302 q=soc.bridge._int_src.uart_ev_enable__r_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108306 q=soc.bridge._int_src.uart_ev_pending__r_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108308 q=soc.bridge._int_src._tx_mty_ev_stb_r
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108312 q=soc.bridge.csr_bridge_0.wb__dat_r[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108316 q=soc.bridge.csr_bridge_0.wb__dat_r[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108320 q=soc.bridge.csr_bridge_0.wb__dat_r[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108324 q=soc.bridge.csr_bridge_0.wb__dat_r[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108328 q=soc.bridge.csr_bridge_0.wb__dat_r[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108332 q=soc.bridge.csr_bridge_0.wb__dat_r[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108336 q=soc.bridge.csr_bridge_0.wb__dat_r[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108340 q=soc.bridge.csr_bridge_0.wb__dat_r[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108344 q=soc.bridge.csr_bridge_0.cycle[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108348 q=soc.bridge.csr_bridge_0.cycle[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108352 q=soc.bridge.csr_bridge_0.cycle[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108354 q=soc.ram.ram[93][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108356 q=soc.ram.ram[93][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108358 q=soc.ram.ram[93][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108360 q=soc.ram.ram[93][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108362 q=soc.ram.ram[93][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108364 q=soc.ram.ram[93][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108366 q=soc.ram.ram[93][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108368 q=soc.ram.ram[93][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108370 q=soc.cpu.minerva.gprf.mem._mem[24][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108372 q=soc.cpu.minerva.gprf.mem._mem[24][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108374 q=soc.cpu.minerva.gprf.mem._mem[24][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108376 q=soc.cpu.minerva.gprf.mem._mem[24][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108378 q=soc.cpu.minerva.gprf.mem._mem[24][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108380 q=soc.cpu.minerva.gprf.mem._mem[24][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108382 q=soc.cpu.minerva.gprf.mem._mem[24][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108384 q=soc.cpu.minerva.gprf.mem._mem[24][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108386 q=soc.cpu.minerva.gprf.mem._mem[24][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108388 q=soc.cpu.minerva.gprf.mem._mem[24][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108390 q=soc.cpu.minerva.gprf.mem._mem[24][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108392 q=soc.cpu.minerva.gprf.mem._mem[24][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108394 q=soc.cpu.minerva.gprf.mem._mem[24][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108396 q=soc.cpu.minerva.gprf.mem._mem[24][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108398 q=soc.cpu.minerva.gprf.mem._mem[24][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108400 q=soc.cpu.minerva.gprf.mem._mem[24][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108402 q=soc.cpu.minerva.gprf.mem._mem[24][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108404 q=soc.cpu.minerva.gprf.mem._mem[24][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108406 q=soc.cpu.minerva.gprf.mem._mem[24][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108408 q=soc.cpu.minerva.gprf.mem._mem[24][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108410 q=soc.cpu.minerva.gprf.mem._mem[24][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108412 q=soc.cpu.minerva.gprf.mem._mem[24][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108414 q=soc.cpu.minerva.gprf.mem._mem[24][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108416 q=soc.cpu.minerva.gprf.mem._mem[24][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108418 q=soc.cpu.minerva.gprf.mem._mem[24][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108420 q=soc.cpu.minerva.gprf.mem._mem[24][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108422 q=soc.cpu.minerva.gprf.mem._mem[24][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108424 q=soc.cpu.minerva.gprf.mem._mem[24][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108426 q=soc.cpu.minerva.gprf.mem._mem[24][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108428 q=soc.cpu.minerva.gprf.mem._mem[24][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108430 q=soc.cpu.minerva.gprf.mem._mem[24][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108432 q=soc.cpu.minerva.gprf.mem._mem[24][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108436 q=soc.bridge.csr_bridge_1.wb__dat_r[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108440 q=soc.bridge.csr_bridge_1.wb__dat_r[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108444 q=soc.bridge.csr_bridge_1.wb__dat_r[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108446 q=soc.bridge.csr_bridge_0.wb__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108450 q=soc.bridge.csr_bridge_1.cycle[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108454 q=soc.bridge.csr_bridge_1.cycle[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108458 q=soc.bridge.csr_bridge_1.cycle[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108462 q=soc.bridge.csr_mux_0.uart_tx_rdy__shadow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108464 q=soc.bridge.csr_mux_0.uart_tx_data__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108468 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108472 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108476 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108480 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108484 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108488 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108492 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108496 q=soc.bridge.csr_mux_0.uart_tx_data__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108498 q=soc.bridge.csr_mux_0.uart_tx_rdy__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108502 q=soc.cpu.minerva.payload__pc$27[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108506 q=soc.cpu.minerva.payload__pc$27[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108510 q=soc.cpu.minerva.payload__pc$27[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108514 q=soc.cpu.minerva.payload__pc$27[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108518 q=soc.cpu.minerva.payload__pc$27[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108522 q=soc.cpu.minerva.payload__pc$27[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108526 q=soc.cpu.minerva.payload__pc$27[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108530 q=soc.cpu.minerva.payload__pc$27[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108534 q=soc.cpu.minerva.payload__pc$27[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108538 q=soc.cpu.minerva.payload__pc$27[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108542 q=soc.cpu.minerva.payload__pc$27[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108546 q=soc.cpu.minerva.payload__pc$27[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108550 q=soc.cpu.minerva.payload__pc$27[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108554 q=soc.cpu.minerva.payload__pc$27[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108558 q=soc.cpu.minerva.payload__pc$27[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108562 q=soc.cpu.minerva.payload__pc$27[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108566 q=soc.cpu.minerva.payload__pc$27[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108570 q=soc.cpu.minerva.payload__pc$27[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108574 q=soc.cpu.minerva.payload__pc$27[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108578 q=soc.cpu.minerva.payload__pc$27[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108582 q=soc.cpu.minerva.payload__pc$27[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108586 q=soc.cpu.minerva.payload__pc$27[23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108590 q=soc.cpu.minerva.payload__pc$27[24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108594 q=soc.cpu.minerva.payload__pc$27[25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108598 q=soc.cpu.minerva.payload__pc$27[26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108602 q=soc.cpu.minerva.payload__pc$27[27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108606 q=soc.cpu.minerva.payload__pc$27[28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108610 q=soc.cpu.minerva.payload__pc$27[29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108614 q=soc.cpu.minerva.payload__pc$27[30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108618 q=soc.cpu.minerva.payload__pc$27[31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108620 q=soc.bridge.csr_mux_0.uart_rx_err__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108624 q=soc.bridge.csr_mux_0.uart_rx_rdy__shadow
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108626 q=soc.bridge.csr_mux_0.uart_rx_data__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108630 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108634 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108638 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108642 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108646 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108650 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108654 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108658 q=soc.bridge.csr_mux_0.uart_rx_data__shadow[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108660 q=soc.bridge.csr_mux_0.uart_divisor__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108664 q=soc.bridge.csr_mux_0.uart_divisor__shadow[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108668 q=soc.bridge.csr_mux_0.uart_divisor__shadow[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108672 q=soc.bridge.csr_mux_0.uart_divisor__shadow[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108676 q=soc.bridge.csr_mux_0.uart_divisor__shadow[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108678 q=soc.bridge.csr_bridge_1.wb__ack
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108680 q=soc.ram.ram[13][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108682 q=soc.ram.ram[13][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108684 q=soc.ram.ram[13][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108686 q=soc.ram.ram[13][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108688 q=soc.ram.ram[13][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108690 q=soc.ram.ram[13][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108692 q=soc.ram.ram[13][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108694 q=soc.ram.ram[13][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108696 q=soc.ram.ram[101][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108698 q=soc.ram.ram[101][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108700 q=soc.ram.ram[101][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108702 q=soc.ram.ram[101][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108704 q=soc.ram.ram[101][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108706 q=soc.ram.ram[101][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108708 q=soc.ram.ram[101][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108710 q=soc.ram.ram[101][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108712 q=soc.cpu.minerva.gprf.mem._mem[29][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108714 q=soc.cpu.minerva.gprf.mem._mem[29][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108716 q=soc.cpu.minerva.gprf.mem._mem[29][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108718 q=soc.cpu.minerva.gprf.mem._mem[29][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108720 q=soc.cpu.minerva.gprf.mem._mem[29][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108722 q=soc.cpu.minerva.gprf.mem._mem[29][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108724 q=soc.cpu.minerva.gprf.mem._mem[29][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108726 q=soc.cpu.minerva.gprf.mem._mem[29][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108728 q=soc.cpu.minerva.gprf.mem._mem[29][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108730 q=soc.cpu.minerva.gprf.mem._mem[29][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108732 q=soc.cpu.minerva.gprf.mem._mem[29][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108734 q=soc.cpu.minerva.gprf.mem._mem[29][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108736 q=soc.cpu.minerva.gprf.mem._mem[29][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108738 q=soc.cpu.minerva.gprf.mem._mem[29][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108740 q=soc.cpu.minerva.gprf.mem._mem[29][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108742 q=soc.cpu.minerva.gprf.mem._mem[29][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108744 q=soc.cpu.minerva.gprf.mem._mem[29][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108746 q=soc.cpu.minerva.gprf.mem._mem[29][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108748 q=soc.cpu.minerva.gprf.mem._mem[29][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108750 q=soc.cpu.minerva.gprf.mem._mem[29][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108752 q=soc.cpu.minerva.gprf.mem._mem[29][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108754 q=soc.cpu.minerva.gprf.mem._mem[29][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108756 q=soc.cpu.minerva.gprf.mem._mem[29][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108758 q=soc.cpu.minerva.gprf.mem._mem[29][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108760 q=soc.cpu.minerva.gprf.mem._mem[29][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108762 q=soc.cpu.minerva.gprf.mem._mem[29][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108764 q=soc.cpu.minerva.gprf.mem._mem[29][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108766 q=soc.cpu.minerva.gprf.mem._mem[29][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108768 q=soc.cpu.minerva.gprf.mem._mem[29][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108770 q=soc.cpu.minerva.gprf.mem._mem[29][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108772 q=soc.cpu.minerva.gprf.mem._mem[29][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108774 q=soc.cpu.minerva.gprf.mem._mem[29][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108776 q=soc.cpu.minerva.gprf.mem._mem[27][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108778 q=soc.cpu.minerva.gprf.mem._mem[27][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108780 q=soc.cpu.minerva.gprf.mem._mem[27][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108782 q=soc.cpu.minerva.gprf.mem._mem[27][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108784 q=soc.cpu.minerva.gprf.mem._mem[27][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108786 q=soc.cpu.minerva.gprf.mem._mem[27][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108788 q=soc.cpu.minerva.gprf.mem._mem[27][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108790 q=soc.cpu.minerva.gprf.mem._mem[27][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108792 q=soc.cpu.minerva.gprf.mem._mem[27][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108794 q=soc.cpu.minerva.gprf.mem._mem[27][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108796 q=soc.cpu.minerva.gprf.mem._mem[27][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108798 q=soc.cpu.minerva.gprf.mem._mem[27][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108800 q=soc.cpu.minerva.gprf.mem._mem[27][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108802 q=soc.cpu.minerva.gprf.mem._mem[27][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108804 q=soc.cpu.minerva.gprf.mem._mem[27][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108806 q=soc.cpu.minerva.gprf.mem._mem[27][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108808 q=soc.cpu.minerva.gprf.mem._mem[27][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108810 q=soc.cpu.minerva.gprf.mem._mem[27][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108812 q=soc.cpu.minerva.gprf.mem._mem[27][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108814 q=soc.cpu.minerva.gprf.mem._mem[27][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108816 q=soc.cpu.minerva.gprf.mem._mem[27][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108818 q=soc.cpu.minerva.gprf.mem._mem[27][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108820 q=soc.cpu.minerva.gprf.mem._mem[27][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108822 q=soc.cpu.minerva.gprf.mem._mem[27][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108824 q=soc.cpu.minerva.gprf.mem._mem[27][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108826 q=soc.cpu.minerva.gprf.mem._mem[27][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108828 q=soc.cpu.minerva.gprf.mem._mem[27][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108830 q=soc.cpu.minerva.gprf.mem._mem[27][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108832 q=soc.cpu.minerva.gprf.mem._mem[27][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108834 q=soc.cpu.minerva.gprf.mem._mem[27][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108836 q=soc.cpu.minerva.gprf.mem._mem[27][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108838 q=soc.cpu.minerva.gprf.mem._mem[27][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108840 q=soc.ram.ram[0][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108842 q=soc.ram.ram[0][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108844 q=soc.ram.ram[0][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108846 q=soc.ram.ram[0][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108848 q=soc.ram.ram[0][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108850 q=soc.ram.ram[0][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108852 q=soc.ram.ram[0][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108854 q=soc.ram.ram[0][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108858 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108862 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108866 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108868 q=soc.gpio.bridge.csr_mux_0.gpio_dout__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108870 q=soc.bridge.csr_mux_1.uart_ev_pending__w_stb
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108874 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108878 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108882 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108884 q=soc.bridge.csr_mux_1.uart_ev_enable__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108886 q=soc.bridge.csr_mux_1.uart_ev_pending__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108890 q=soc.bridge.csr_mux_1.uart_ev_status__shadow[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108894 q=soc.bridge.csr_mux_1.uart_ev_status__shadow[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108898 q=soc.bridge.csr_mux_1.uart_ev_status__shadow[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108900 q=soc.bridge.csr_mux_1.uart_ev_status__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108902 q=soc.ram.ram[123][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108904 q=soc.ram.ram[123][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108906 q=soc.ram.ram[123][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108908 q=soc.ram.ram[123][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108910 q=soc.ram.ram[123][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108912 q=soc.ram.ram[123][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108914 q=soc.ram.ram[123][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108916 q=soc.ram.ram[123][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108918 q=soc.ram.ram[123][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108920 q=soc.ram.ram[123][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108922 q=soc.ram.ram[123][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108924 q=soc.ram.ram[123][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108926 q=soc.ram.ram[123][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108928 q=soc.ram.ram[123][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108930 q=soc.ram.ram[123][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108932 q=soc.ram.ram[123][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108934 q=soc.ram.ram[124][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108936 q=soc.ram.ram[124][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108938 q=soc.ram.ram[124][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108940 q=soc.ram.ram[124][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108942 q=soc.ram.ram[124][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108944 q=soc.ram.ram[124][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108946 q=soc.ram.ram[124][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108948 q=soc.ram.ram[124][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108950 q=soc.ram.ram[124][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108952 q=soc.ram.ram[124][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108954 q=soc.ram.ram[124][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108956 q=soc.ram.ram[124][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108958 q=soc.ram.ram[124][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108960 q=soc.ram.ram[124][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108962 q=soc.ram.ram[124][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108964 q=soc.ram.ram[124][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108966 q=soc.ram.ram[124][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108968 q=soc.ram.ram[124][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108970 q=soc.ram.ram[124][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108972 q=soc.ram.ram[124][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108974 q=soc.ram.ram[124][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108976 q=soc.ram.ram[124][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108978 q=soc.ram.ram[124][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108980 q=soc.ram.ram[124][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108982 q=soc.ram.ram[125][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108984 q=soc.ram.ram[125][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108986 q=soc.ram.ram[125][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108988 q=soc.ram.ram[125][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108990 q=soc.ram.ram[125][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108992 q=soc.ram.ram[125][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108994 q=soc.ram.ram[125][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108996 q=soc.ram.ram[125][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$108998 q=soc.ram.ram[107][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109000 q=soc.ram.ram[107][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109002 q=soc.ram.ram[107][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109004 q=soc.ram.ram[107][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109006 q=soc.ram.ram[107][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109008 q=soc.ram.ram[107][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109010 q=soc.ram.ram[107][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109012 q=soc.ram.ram[107][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109016 q=soc.arbiter.grant
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109018 q=soc.hb_ctr[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109020 q=soc.hb_ctr[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109022 q=soc.hb_ctr[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109024 q=soc.hb_ctr[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109026 q=soc.hb_ctr[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109028 q=soc.hb_ctr[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109030 q=soc.hb_ctr[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109032 q=soc.hb_ctr[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109034 q=soc.hb_ctr[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109036 q=soc.hb_ctr[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109038 q=soc.hb_ctr[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109040 q=soc.hb_ctr[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109042 q=soc.hb_ctr[12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109044 q=soc.hb_ctr[13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109046 q=soc.hb_ctr[14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109048 q=soc.hb_ctr[15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109050 q=soc.hb_ctr[16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109052 q=soc.hb_ctr[17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109054 q=soc.hb_ctr[18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109056 q=soc.hb_ctr[19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109058 q=soc.hb_ctr[20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109060 q=soc.hb_ctr[21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109062 q=soc.hb_ctr[22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109064 q=soc.hb_ctr[23]
+.subckt dff_x1 clk=io_in[0] i=soc.rst_sync0 q=soc.rst_sync1
+.subckt dff_x1 clk=io_in[0] i=soc.$109 q=soc.rst_sync0
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109068 q=soc.timer$123[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109072 q=soc.timer$123[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109076 q=soc.timer$123[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109080 q=soc.timer$123[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109084 q=soc.timer$123[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109088 q=soc.timer$123[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109092 q=soc.timer$123[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109096 q=soc.timer$123[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109100 q=soc.timer$123[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109104 q=soc.timer$123[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109108 q=soc.timer$123[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109112 q=soc.timer$123[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109116 q=soc.bitno[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109120 q=soc.bitno[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109124 q=soc.bitno[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109128 q=soc.bitno[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109132 q=soc.shreg__start
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109136 q=soc.shreg__data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109140 q=soc.shreg__data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109144 q=soc.shreg__data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109148 q=soc.shreg__data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109152 q=soc.shreg__data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109156 q=soc.shreg__data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109160 q=soc.shreg__data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109164 q=soc.shreg__data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109168 q=soc.shreg__stop
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109172 q=soc.o
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109176 q=soc.divisor[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109180 q=soc.divisor[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109184 q=soc.divisor[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109188 q=soc.divisor[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109192 q=soc.divisor[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109196 q=soc.divisor[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109200 q=soc.divisor[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109204 q=soc.divisor[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109208 q=soc.divisor[8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109212 q=soc.divisor[9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109216 q=soc.divisor[10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109220 q=soc.divisor[11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109222 q=soc.ram.ram[107][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109224 q=soc.ram.ram[107][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109226 q=soc.ram.ram[107][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109228 q=soc.ram.ram[107][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109230 q=soc.ram.ram[107][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109232 q=soc.ram.ram[107][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109234 q=soc.ram.ram[107][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109236 q=soc.ram.ram[107][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109238 q=soc.cpu.minerva.gprf.mem._mem[25][0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109240 q=soc.cpu.minerva.gprf.mem._mem[25][1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109242 q=soc.cpu.minerva.gprf.mem._mem[25][2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109244 q=soc.cpu.minerva.gprf.mem._mem[25][3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109246 q=soc.cpu.minerva.gprf.mem._mem[25][4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109248 q=soc.cpu.minerva.gprf.mem._mem[25][5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109250 q=soc.cpu.minerva.gprf.mem._mem[25][6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109252 q=soc.cpu.minerva.gprf.mem._mem[25][7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109254 q=soc.cpu.minerva.gprf.mem._mem[25][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109256 q=soc.cpu.minerva.gprf.mem._mem[25][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109258 q=soc.cpu.minerva.gprf.mem._mem[25][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109260 q=soc.cpu.minerva.gprf.mem._mem[25][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109262 q=soc.cpu.minerva.gprf.mem._mem[25][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109264 q=soc.cpu.minerva.gprf.mem._mem[25][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109266 q=soc.cpu.minerva.gprf.mem._mem[25][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109268 q=soc.cpu.minerva.gprf.mem._mem[25][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109270 q=soc.cpu.minerva.gprf.mem._mem[25][16]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109272 q=soc.cpu.minerva.gprf.mem._mem[25][17]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109274 q=soc.cpu.minerva.gprf.mem._mem[25][18]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109276 q=soc.cpu.minerva.gprf.mem._mem[25][19]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109278 q=soc.cpu.minerva.gprf.mem._mem[25][20]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109280 q=soc.cpu.minerva.gprf.mem._mem[25][21]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109282 q=soc.cpu.minerva.gprf.mem._mem[25][22]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109284 q=soc.cpu.minerva.gprf.mem._mem[25][23]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109286 q=soc.cpu.minerva.gprf.mem._mem[25][24]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109288 q=soc.cpu.minerva.gprf.mem._mem[25][25]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109290 q=soc.cpu.minerva.gprf.mem._mem[25][26]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109292 q=soc.cpu.minerva.gprf.mem._mem[25][27]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109294 q=soc.cpu.minerva.gprf.mem._mem[25][28]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109296 q=soc.cpu.minerva.gprf.mem._mem[25][29]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109298 q=soc.cpu.minerva.gprf.mem._mem[25][30]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109300 q=soc.cpu.minerva.gprf.mem._mem[25][31]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109302 q=soc.ram.ram[100][8]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109304 q=soc.ram.ram[100][9]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109306 q=soc.ram.ram[100][10]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109308 q=soc.ram.ram[100][11]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109310 q=soc.ram.ram[100][12]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109312 q=soc.ram.ram[100][13]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109314 q=soc.ram.ram[100][14]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109316 q=soc.ram.ram[100][15]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109320 q=soc.cpu.minerva.divider.quotient[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109324 q=soc.cpu.minerva.divider.remainder[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109326 q=soc.bridge.csr_mux_0.uart_divisor__shadow_en[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109328 q=soc.bridge.csr_mux_0.uart_divisor__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109330 q=soc.rom.spimemio.din_valid
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109334 q=soc.rom.spimemio.din_data[7]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109338 q=soc.rom.spimemio.din_data[6]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109342 q=soc.rom.spimemio.din_data[5]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109346 q=soc.rom.spimemio.din_data[4]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109350 q=soc.rom.spimemio.din_data[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109354 q=soc.rom.spimemio.din_data[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109358 q=soc.rom.spimemio.din_data[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109362 q=soc.rom.spimemio.din_data[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109364 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109366 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109368 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109370 q=soc.timer.bridge.csr_mux_0.timer_ctr__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109372 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[3]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109374 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[2]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109376 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[1]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109378 q=soc.timer.bridge.csr_mux_0.timer_reload__shadow_en[0]
+.subckt dff_x1 clk=io_in[0] i=$abc$109383$auto$rtlil.cc:2515:MuxGate$109382 q=soc.rom.spimemio.xfer.count[0]
 .subckt buf_x1 i=$true q=io_oeb[0]
 .subckt buf_x1 i=$false q=io_out[0]
 .subckt buf_x1 i=soc.rom.$22 q=io_oeb[5]