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[RFC] Refine design of CIR_BitOp
#1392
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CIR_BitOp
CIR_BitOp
I'm a bit confused, is this about direct LLVM lowering or through MLIR. I recommend solving one problem at a time.
Looks like you cannot get rid of the cast anyways? If the llvm counter part usually expectes 32-bit integer you have to make it fit.
This is probably best tho seems orthogonal to the above point. |
There are two ways to lower builtins: (a) we map them to CIR operations or (b) we use a thin wrapper that can directly translate to any existing LLVM intrinsic via |
When I try to add support for
__lzcnt
#1382, I encountered some issues.The first problem is how to treat
is_poison_zero
.__builtin_clz
returns undefined if input is 0, while__lzcnt
returns the width of the input if input is 0. However, current implementation ofCIR_ClzOp
always lower tollvm.ctlz. {{%.*}} true
which allows undefined result. If lowering cir dialect to math dialect and then to llvmir dialect, it will bemath.ctlz
and"llvm.intr.ctlz"(%0) <{is_zero_poison = false}> : (i16) -> i16
which doesn't allow undefined result.The second problem is the return type. LLVM IR and Microsoft intrinsics require that the type of result matches the type of input, while gcc intrinsics always returns a signed 32-bit integer. If we design
CIR_ClzOp
to return a signed 32-bit integer, there will be two redundant CastOp when implementing__lzcnt
. If we designCIR_ClzOp
to return an integer whose type matches the input, there will be no problem for both__builtin_clz
and__lzcnt
The last problem is about new IR design. The first way to solve the problem is how I showed in #1382 which modified the result type of
CIR_BitOp
base class, added a new IRCIR_LzcntOp
. We can get a clean codegen and a complex lowering. If we want to support__builtin_clzg
, we need to add another CIR. Another way to solve the problem is to reserve three Op in CIR,CountLeadingZerosOp
,CountTrailingZerosOp
andCtPopOp
. Their definition is similar to LLVM IR.The text was updated successfully, but these errors were encountered: