From 00a4f4c27a8873ba1c9cae95be391df35a93f3f7 Mon Sep 17 00:00:00 2001
From: Meinhard Kissich <privat@meinhard-kissich.at>
Date: Wed, 3 Apr 2024 17:53:59 +0200
Subject: [PATCH] Remove buf dly in simulation

---
 rtl/fazyrv_pc.sv      | 2 +-
 rtl/fazyrv_shftreg.sv | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/rtl/fazyrv_pc.sv b/rtl/fazyrv_pc.sv
index 7046268..1d6f0c8 100644
--- a/rtl/fazyrv_pc.sv
+++ b/rtl/fazyrv_pc.sv
@@ -105,7 +105,7 @@ logic [31:0] pc_dlyd;
 `ifdef SKY130
   sky130_fd_sc_hd__dlygate4sd3_1 i_buf[31:0] ( .X(pc_dlyd), .A(pc_r) );
 `elsif SIM
-  buf #1 i_buf[31:0] (pc_dlyd, pc_r);
+  buf i_buf[31:0] (pc_dlyd, pc_r);
 `else
   assign pc_dlyd = pc_r; 
 `endif
diff --git a/rtl/fazyrv_shftreg.sv b/rtl/fazyrv_shftreg.sv
index fe4c234..bba63c1 100644
--- a/rtl/fazyrv_shftreg.sv
+++ b/rtl/fazyrv_shftreg.sv
@@ -44,7 +44,7 @@ logic [31-CHUNKSIZE:0] reg_dlyd;
 `ifdef SKY130
   sky130_fd_sc_hd__dlygate4sd3_1 i_buf[31-CHUNKSIZE:0] ( .X(reg_dlyd), .A(reg_r[31:CHUNKSIZE]) );
 `elsif SIM
-  buf #1 i_buf[31-CHUNKSIZE:0] (reg_dlyd, reg_r[31:CHUNKSIZE]);
+  buf i_buf[31-CHUNKSIZE:0] (reg_dlyd, reg_r[31:CHUNKSIZE]);
 `else
   assign reg_dlyd = reg_r[31:CHUNKSIZE];
 `endif