diff --git a/README.md b/README.md index 626f383..9f2b864 100644 --- a/README.md +++ b/README.md @@ -3,7 +3,7 @@ ## Brief __ICM-20948 is 9-axis IMU sensor.__ -__TAG - `ICM-20948` `SPI` `STM32 HAL`__ +__TAG - `ICM-20948` `AK09916` `SPI` `STM32 HAL`__ |Axis|Not Recommended for New Designs|Recommended for New Designs| |:---:|:---:|:---:| diff --git a/icm20948.c b/icm20948.c index a58d8cb..c3791d1 100644 --- a/icm20948.c +++ b/icm20948.c @@ -13,128 +13,27 @@ static float gyro_scale_factor; static float accel_scale_factor; -/* Static Functions List */ -/** @note cs_high() - * cs_low() - * - * select_user_bank(userbank ub) - * - * read_single_icm20948_reg(userbank ub, uint8_t reg) - * write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) - * - * read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) - * write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) - * - * read_single_ak09916_reg(uint8_t reg); - * write_single_ak09916_reg(uint8_t reg, uint8_t val) - * - * read_multiple_ak09916_reg(uint8_t reg, uint8_t len) -*/ -static void cs_high() -{ - HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, SET); -} - -static void cs_low() -{ - HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, RESET); -} - -static void select_user_bank(userbank ub) -{ - uint8_t write_reg[2]; - write_reg[0] = WRITE | REG_BANK_SEL; - write_reg[1] = ub; - - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 10); - cs_high(); -} - -static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg) -{ - uint8_t read_reg = READ | reg; - uint8_t reg_val; - select_user_bank(ub); - - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); - HAL_SPI_Receive(ICM20948_SPI, ®_val, 1, 1000); - cs_high(); - - return reg_val; -} +/* Static Functions */ +static void cs_high(); +static void cs_low(); -static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) -{ - uint8_t write_reg[2]; - write_reg[0] = WRITE | reg; - write_reg[1] = val; +static void select_user_bank(userbank ub); - select_user_bank(ub); +static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg); +static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val); +static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len); +static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len); - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 1000); - cs_high(); -} +static uint8_t read_single_ak09916_reg(uint8_t reg); +static void write_single_ak09916_reg(uint8_t reg, uint8_t val); +static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len); -static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) -{ - uint8_t read_reg = READ | reg; - static uint8_t reg_val[6]; - select_user_bank(ub); - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); - HAL_SPI_Receive(ICM20948_SPI, reg_val, len, 1000); - cs_high(); - - return reg_val; -} - -static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) -{ - uint8_t write_reg = WRITE | reg; - select_user_bank(ub); - - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, &write_reg, 1, 1000); - HAL_SPI_Transmit(ICM20948_SPI, val, len, 1000); - cs_high(); -} - -static uint8_t read_single_ak09916_reg(uint8_t reg) -{ - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); - - HAL_Delay(1); - return read_single_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00); -} - -static void write_single_ak09916_reg(uint8_t reg, uint8_t val) -{ - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, WRITE | MAG_SLAVE_ADDR); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_DO, val); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); -} - -static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len) -{ - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x80 | len); - - HAL_Delay(1); - return read_multiple_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00, len); -} - - -/* ICM-20948 Main Functions */ +/* Main Functions */ void icm20948_init() { + while(!icm20948_who_am_i()); + icm20948_device_reset(); icm20948_wakeup(); @@ -156,6 +55,18 @@ void icm20948_init() icm20948_accel_full_scale_select(_16g); } +void ak09916_init() +{ + icm20948_i2c_master_reset(); + icm20948_i2c_master_enable(); + icm20948_i2c_master_clk_frq(7); + + while(!ak09916_who_am_i()); + + ak09916_soft_reset(); + ak09916_operation_mode_setting(continuous_measurement_100hz); +} + void icm20948_gyro_read(axises* data) { uint8_t* temp = read_multiple_icm20948_reg(ub_0, B0_GYRO_XOUT_H, 6); @@ -171,7 +82,28 @@ void icm20948_accel_read(axises* data) data->x = (int16_t)(temp[0] << 8 | temp[1]); data->y = (int16_t)(temp[2] << 8 | temp[3]); - data->z = (int16_t)(temp[4] << 8 | temp[5]); + data->z = (int16_t)(temp[4] << 8 | temp[5]) + accel_scale_factor; + // Add scale factor because calibraiton function offset gravity acceleration. +} + +bool ak09916_mag_read(axises* data) +{ + uint8_t* temp; + uint8_t drdy, hofl; // data ready, overflow + + drdy = read_single_ak09916_reg(MAG_ST1) & 0x01; + if(!drdy) return false; + + temp = read_multiple_ak09916_reg(MAG_HXL, 6); + + hofl = read_single_ak09916_reg(MAG_ST2) & 0x08; + if(hofl) return false; + + data->x = (int16_t)(temp[1] << 8 | temp[0]); + data->y = (int16_t)(temp[3] << 8 | temp[2]); + data->z = (int16_t)(temp[5] << 8 | temp[4]); + + return true; } void icm20948_gyro_read_dps(axises* data) @@ -192,8 +124,21 @@ void icm20948_accel_read_g(axises* data) data->z /= accel_scale_factor; } +bool ak09916_mag_read_uT(axises* data) +{ + axises temp; + bool new_data = ak09916_mag_read(&temp); + if(!new_data) return false; + + data->x = (float)(temp.x * 0.15); + data->y = (float)(temp.y * 0.15); + data->z = (float)(temp.z * 0.15); -/* ICM-20948 Sub Functions */ + return true; +} + + +/* Sub Functions */ bool icm20948_who_am_i() { uint8_t icm20948_id = read_single_icm20948_reg(ub_0, B0_WHO_AM_I); @@ -204,12 +149,28 @@ bool icm20948_who_am_i() return false; } +bool ak09916_who_am_i() +{ + uint8_t ak09916_id = read_single_ak09916_reg(MAG_WIA2); + + if(ak09916_id == AK09916_ID) + return true; + else + return false; +} + void icm20948_device_reset() { write_single_icm20948_reg(ub_0, B0_PWR_MGMT_1, 0x80 | 0x41); HAL_Delay(100); } +void ak09916_soft_reset() +{ + write_single_ak09916_reg(MAG_CNTL3, 0x01); + HAL_Delay(100); +} + void icm20948_wakeup() { uint8_t new_val = read_single_icm20948_reg(ub_0, B0_PWR_MGMT_1); @@ -304,6 +265,12 @@ void icm20948_accel_sample_rate_divider(uint16_t divider) write_single_icm20948_reg(ub_2, B2_ACCEL_SMPLRT_DIV_2, divider_2); } +void ak09916_operation_mode_setting(operation_mode mode) +{ + write_single_ak09916_reg(MAG_CNTL2, mode); + HAL_Delay(100); +} + void icm20948_gyro_calibration() { axises temp; @@ -449,70 +416,104 @@ void icm20948_accel_full_scale_select(accel_full_scale full_scale) } -/* AK09916 Main Functions */ -void ak009916_init() +/* Static Functions */ +static void cs_high() { - icm20948_i2c_master_reset(); - icm20948_i2c_master_enable(); - icm20948_i2c_master_clk_frq(7); - - ak09916_soft_reset(); - ak09916_operation_mode_setting(continuous_measurement_100hz); + HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, SET); } -bool ak09916_mag_read(axises* data) +static void cs_low() { - uint8_t* temp; - uint8_t drdy, hofl; // data ready, overflow + HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, RESET); +} - drdy = read_single_ak09916_reg(MAG_ST1) & 0x01; - if(!drdy) return false; +static void select_user_bank(userbank ub) +{ + uint8_t write_reg[2]; + write_reg[0] = WRITE | REG_BANK_SEL; + write_reg[1] = ub; - temp = read_multiple_ak09916_reg(MAG_HXL, 6); + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 10); + cs_high(); +} - hofl = read_single_ak09916_reg(MAG_ST2) & 0x08; - if(hofl) return false; +static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg) +{ + uint8_t read_reg = READ | reg; + uint8_t reg_val; + select_user_bank(ub); - data->x = (int16_t)(temp[1] << 8 | temp[0]); - data->y = (int16_t)(temp[3] << 8 | temp[2]); - data->z = (int16_t)(temp[5] << 8 | temp[4]); + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); + HAL_SPI_Receive(ICM20948_SPI, ®_val, 1, 1000); + cs_high(); - return true; + return reg_val; } -bool ak09916_mag_read_uT(axises* data) +static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) { - axises temp; - bool new_data = ak09916_mag_read(&temp); - if(!new_data) return false; + uint8_t write_reg[2]; + write_reg[0] = WRITE | reg; + write_reg[1] = val; - data->x = (float)(temp.x * 0.15); - data->y = (float)(temp.y * 0.15); - data->z = (float)(temp.z * 0.15); + select_user_bank(ub); - return true; -} + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 1000); + cs_high(); +} +static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) +{ + uint8_t read_reg = READ | reg; + static uint8_t reg_val[6]; + select_user_bank(ub); -/* AK09916 Sub Functions */ -bool ak09916_who_am_i() + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); + HAL_SPI_Receive(ICM20948_SPI, reg_val, len, 1000); + cs_high(); + + return reg_val; +} + +static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) { - uint8_t ak09916_id = read_single_ak09916_reg(MAG_WIA2); + uint8_t write_reg = WRITE | reg; + select_user_bank(ub); - if(ak09916_id == AK09916_ID) - return true; - else - return false; + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, &write_reg, 1, 1000); + HAL_SPI_Transmit(ICM20948_SPI, val, len, 1000); + cs_high(); } -void ak09916_soft_reset() +static uint8_t read_single_ak09916_reg(uint8_t reg) { - write_single_ak09916_reg(MAG_CNTL3, 0x01); - HAL_Delay(100); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); + + HAL_Delay(1); + return read_single_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00); } -void ak09916_operation_mode_setting(operation_mode mode) +static void write_single_ak09916_reg(uint8_t reg, uint8_t val) { - write_single_ak09916_reg(MAG_CNTL2, mode); - HAL_Delay(100); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, WRITE | MAG_SLAVE_ADDR); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_DO, val); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); } + +static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len) +{ + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x80 | len); + + HAL_Delay(1); + return read_multiple_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00, len); +} \ No newline at end of file diff --git a/icm20948.h b/icm20948.h index 8c060d2..c5dea4b 100644 --- a/icm20948.h +++ b/icm20948.h @@ -15,11 +15,8 @@ /* User Configuration */ - -// SPI Interface #define ICM20948_SPI (&hspi1) -// CS Pin #define ICM20948_SPI_CS_PIN_PORT GPIOA #define ICM20948_SPI_CS_PIN_NUMBER GPIO_PIN_4 @@ -72,20 +69,30 @@ typedef enum } operation_mode; -/* ICM-20948 Main Functions */ +/* Main Functions */ + +// sensor init function. +// if sensor id is wrong, it is stuck in while. void icm20948_init(); +void ak09916_init(); -void icm20948_gyro_read(axises* data); // 16bits ADC value -void icm20948_accel_read(axises* data); // 16bits ADC value +// 16 bits ADC value. raw data. +void icm20948_gyro_read(axises* data); +void icm20948_accel_read(axises* data); +bool ak09916_mag_read(axises* data); -void icm20948_gyro_read_dps(axises* data); +// Convert 16 bits ADC value to their unit. +void icm20948_gyro_read_dps(axises* data); void icm20948_accel_read_g(axises* data); +bool ak09916_mag_read_uT(axises* data); -/* ICM-20948 Sub Functions */ +/* Sub Functions */ bool icm20948_who_am_i(); +bool ak09916_who_am_i(); void icm20948_device_reset(); +void ak09916_soft_reset(); void icm20948_wakeup(); void icm20948_sleep(); @@ -105,7 +112,9 @@ void icm20948_accel_low_pass_filter(uint8_t config); // 0 - 7 // Output Data Rate = 1.125kHz / (1 + divider) void icm20948_gyro_sample_rate_divider(uint8_t divider); void icm20948_accel_sample_rate_divider(uint16_t divider); +void ak09916_operation_mode_setting(operation_mode mode); +// Calibration before select full scale. void icm20948_gyro_calibration(); void icm20948_accel_calibration(); @@ -113,20 +122,6 @@ void icm20948_gyro_full_scale_select(gyro_full_scale full_scale); void icm20948_accel_full_scale_select(accel_full_scale full_scale); -/* AK09916 Main Functions */ -void ak009916_init(); - -bool ak09916_mag_read(axises* data); // 16bits ADC value -bool ak09916_mag_read_uT(axises* data); - - -/* AK09916 Sub Functions */ -bool ak09916_who_am_i(); - -void ak09916_soft_reset(); -void ak09916_operation_mode_setting(operation_mode mode); - - /* ICM-20948 Registers */ #define ICM20948_ID 0xEA #define REG_BANK_SEL 0x7F diff --git a/reference/[DataSheet] AK09916.pdf b/reference/[DataSheet] AK09916.pdf new file mode 100644 index 0000000..ca5d66e Binary files /dev/null and b/reference/[DataSheet] AK09916.pdf differ diff --git a/reference/[DataSheet] ICM-20948.pdf b/reference/[DataSheet] ICM-20948.pdf new file mode 100644 index 0000000..e8dc8e3 Binary files /dev/null and b/reference/[DataSheet] ICM-20948.pdf differ diff --git a/reference/[Schematic] ICM-20948.pdf b/reference/[Schematic] ICM-20948.pdf new file mode 100644 index 0000000..81477df Binary files /dev/null and b/reference/[Schematic] ICM-20948.pdf differ diff --git a/stm32f411_fw_icm20948/Core/Src/main.c b/stm32f411_fw_icm20948/Core/Src/main.c index 55d6346..1572790 100644 --- a/stm32f411_fw_icm20948/Core/Src/main.c +++ b/stm32f411_fw_icm20948/Core/Src/main.c @@ -46,14 +46,11 @@ /* Private variables ---------------------------------------------------------*/ /* USER CODE BEGIN PV */ + axises my_gyro; axises my_accel; axises my_mag; -axises my_mag2; -uint8_t mag_data[6]; -uint8_t* temp2; -uint8_t status; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -99,7 +96,7 @@ int main(void) /* USER CODE BEGIN 2 */ icm20948_init(); - ak009916_init(); + ak09916_init(); /* USER CODE END 2 */ @@ -112,10 +109,9 @@ int main(void) /* USER CODE BEGIN 3 */ - icm20948_gyro_read(&my_gyro); - icm20948_accel_read(&my_accel); - ak09916_mag_read(&my_mag); - ak09916_mag_read_uT(&my_mag2); + icm20948_gyro_read_dps(&my_gyro); + icm20948_accel_read_g(&my_accel); + ak09916_mag_read_uT(&my_mag); } diff --git a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.bin b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.bin index 1354dd7..9f2f812 100644 Binary files a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.bin and b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.bin differ diff --git a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.elf b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.elf index f840670..481f1d2 100644 Binary files a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.elf and b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.elf differ diff --git a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.list b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.list index 3b49738..c28d4ff 100644 --- a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.list +++ b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000198 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00003408 08000198 08000198 00010198 2**3 + 1 .text 00003530 08000198 08000198 00010198 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000014 080035a0 080035a0 000135a0 2**2 + 2 .rodata 00000014 080036c8 080036c8 000136c8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 080035b4 080035b4 0002000c 2**0 + 3 .ARM.extab 00000000 080036dc 080036dc 0002000c 2**0 CONTENTS - 4 .ARM 00000008 080035b4 080035b4 000135b4 2**2 + 4 .ARM 00000008 080036dc 080036dc 000136dc 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 080035bc 080035bc 0002000c 2**0 + 5 .preinit_array 00000000 080036e4 080036e4 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 080035bc 080035bc 000135bc 2**2 + 6 .init_array 00000004 080036e4 080036e4 000136e4 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 080035c0 080035c0 000135c0 2**2 + 7 .fini_array 00000004 080036e8 080036e8 000136e8 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 0000000c 20000000 080035c4 00020000 2**2 + 8 .data 0000000c 20000000 080036ec 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000000c8 2000000c 080035d0 0002000c 2**2 + 9 .bss 000000ac 2000000c 080036f8 0002000c 2**2 ALLOC - 10 ._user_heap_stack 00000604 200000d4 080035d0 000200d4 2**0 + 10 ._user_heap_stack 00000600 200000b8 080036f8 000200b8 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0002000c 2**0 CONTENTS, READONLY - 12 .debug_info 000079b0 00000000 00000000 0002003c 2**0 + 12 .debug_info 0000795f 00000000 00000000 0002003c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00001761 00000000 00000000 000279ec 2**0 + 13 .debug_abbrev 0000172d 00000000 00000000 0002799b 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00000758 00000000 00000000 00029150 2**3 + 14 .debug_aranges 00000758 00000000 00000000 000290c8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_ranges 00000690 00000000 00000000 000298a8 2**3 + 15 .debug_ranges 00000690 00000000 00000000 00029820 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 000150d1 00000000 00000000 00029f38 2**0 + 16 .debug_macro 000150cf 00000000 00000000 00029eb0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00008232 00000000 00000000 0003f009 2**0 + 17 .debug_line 00008264 00000000 00000000 0003ef7f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 00081a62 00000000 00000000 0004723b 2**0 + 18 .debug_str 00081a50 00000000 00000000 000471e3 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000053 00000000 00000000 000c8c9d 2**0 + 19 .comment 00000053 00000000 00000000 000c8c33 2**0 CONTENTS, READONLY - 20 .debug_frame 00001d10 00000000 00000000 000c8cf0 2**2 + 20 .debug_frame 00001d10 00000000 00000000 000c8c88 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -62,7 +62,7 @@ Disassembly of section .text: 80001ae: bd10 pop {r4, pc} 80001b0: 2000000c .word 0x2000000c 80001b4: 00000000 .word 0x00000000 - 80001b8: 08003588 .word 0x08003588 + 80001b8: 080036b0 .word 0x080036b0 080001bc : 80001bc: b508 push {r3, lr} @@ -74,7 +74,7 @@ Disassembly of section .text: 80001ca: bd08 pop {r3, pc} 80001cc: 00000000 .word 0x00000000 80001d0: 20000010 .word 0x20000010 - 80001d4: 08003588 .word 0x08003588 + 80001d4: 080036b0 .word 0x080036b0 080001d8 <__aeabi_dmul>: 80001d8: b570 push {r4, r5, r6, lr} @@ -950,14 +950,14 @@ void MX_GPIO_Init(void) 8000ba6: 2201 movs r2, #1 8000ba8: f44f 5100 mov.w r1, #8192 ; 0x2000 8000bac: 4815 ldr r0, [pc, #84] ; (8000c04 ) - 8000bae: f000 fccb bl 8001548 + 8000bae: f000 fcc5 bl 800153c /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(SPI1_CS_GPIO_Port, SPI1_CS_Pin, GPIO_PIN_SET); 8000bb2: 2201 movs r2, #1 8000bb4: 2110 movs r1, #16 8000bb6: 4814 ldr r0, [pc, #80] ; (8000c08 ) - 8000bb8: f000 fcc6 bl 8001548 + 8000bb8: f000 fcc0 bl 800153c /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = LED_Pin; @@ -976,7 +976,7 @@ void MX_GPIO_Init(void) 8000bce: f107 030c add.w r3, r7, #12 8000bd2: 4619 mov r1, r3 8000bd4: 480b ldr r0, [pc, #44] ; (8000c04 ) - 8000bd6: f000 fb33 bl 8001240 + 8000bd6: f000 fb2d bl 8001234 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = SPI1_CS_Pin; @@ -995,7 +995,7 @@ void MX_GPIO_Init(void) 8000bea: f107 030c add.w r3, r7, #12 8000bee: 4619 mov r1, r3 8000bf0: 4805 ldr r0, [pc, #20] ; (8000c08 ) - 8000bf2: f000 fb25 bl 8001240 + 8000bf2: f000 fb1f bl 8001234 } 8000bf6: bf00 nop @@ -1022,14 +1022,14 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8000c10: f000 f99a bl 8000f48 + 8000c10: f000 f994 bl 8000f3c /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8000c14: f000 f81e bl 8000c54 + 8000c14: f000 f818 bl 8000c48 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ @@ -1038,7086 +1038,7241 @@ int main(void) MX_GPIO_Init(); 8000c18: f7ff ff90 bl 8000b3c MX_SPI1_Init(); - 8000c1c: f000 f888 bl 8000d30 + 8000c1c: f000 f882 bl 8000d24 /* USER CODE BEGIN 2 */ icm20948_init(); - 8000c20: f001 ffb3 bl 8002b8a - ak009916_init(); - 8000c24: f002 fba6 bl 8003374 + 8000c20: f001 fe62 bl 80028e8 + ak09916_init(); + 8000c24: f001 fe8e bl 8002944 { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ - icm20948_gyro_read(&my_gyro); - 8000c28: 4806 ldr r0, [pc, #24] ; (8000c44 ) - 8000c2a: f001 ffd3 bl 8002bd4 - icm20948_accel_read(&my_accel); - 8000c2e: 4806 ldr r0, [pc, #24] ; (8000c48 ) - 8000c30: f002 f813 bl 8002c5a - ak09916_mag_read(&my_mag); - 8000c34: 4805 ldr r0, [pc, #20] ; (8000c4c ) - 8000c36: f002 fbad bl 8003394 - ak09916_mag_read_uT(&my_mag2); - 8000c3a: 4805 ldr r0, [pc, #20] ; (8000c50 ) - 8000c3c: f002 fc08 bl 8003450 - icm20948_gyro_read(&my_gyro); - 8000c40: e7f2 b.n 8000c28 - 8000c42: bf00 nop - 8000c44: 20000068 .word 0x20000068 - 8000c48: 2000003c .word 0x2000003c - 8000c4c: 20000054 .word 0x20000054 - 8000c50: 20000048 .word 0x20000048 - -08000c54 : + icm20948_gyro_read_dps(&my_gyro); + 8000c28: 4804 ldr r0, [pc, #16] ; (8000c3c ) + 8000c2a: f001 ff8d bl 8002b48 + icm20948_accel_read_g(&my_accel); + 8000c2e: 4804 ldr r0, [pc, #16] ; (8000c40 ) + 8000c30: f001 ffb8 bl 8002ba4 + ak09916_mag_read_uT(&my_mag); + 8000c34: 4803 ldr r0, [pc, #12] ; (8000c44 ) + 8000c36: f001 ffe3 bl 8002c00 + icm20948_gyro_read_dps(&my_gyro); + 8000c3a: e7f5 b.n 8000c28 + 8000c3c: 20000050 .word 0x20000050 + 8000c40: 20000038 .word 0x20000038 + 8000c44: 20000044 .word 0x20000044 + +08000c48 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8000c54: b580 push {r7, lr} - 8000c56: b094 sub sp, #80 ; 0x50 - 8000c58: af00 add r7, sp, #0 + 8000c48: b580 push {r7, lr} + 8000c4a: b094 sub sp, #80 ; 0x50 + 8000c4c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8000c5a: f107 0320 add.w r3, r7, #32 - 8000c5e: 2230 movs r2, #48 ; 0x30 - 8000c60: 2100 movs r1, #0 - 8000c62: 4618 mov r0, r3 - 8000c64: f002 fc88 bl 8003578 + 8000c4e: f107 0320 add.w r3, r7, #32 + 8000c52: 2230 movs r2, #48 ; 0x30 + 8000c54: 2100 movs r1, #0 + 8000c56: 4618 mov r0, r3 + 8000c58: f002 fd22 bl 80036a0 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8000c68: f107 030c add.w r3, r7, #12 - 8000c6c: 2200 movs r2, #0 - 8000c6e: 601a str r2, [r3, #0] - 8000c70: 605a str r2, [r3, #4] - 8000c72: 609a str r2, [r3, #8] - 8000c74: 60da str r2, [r3, #12] - 8000c76: 611a str r2, [r3, #16] + 8000c5c: f107 030c add.w r3, r7, #12 + 8000c60: 2200 movs r2, #0 + 8000c62: 601a str r2, [r3, #0] + 8000c64: 605a str r2, [r3, #4] + 8000c66: 609a str r2, [r3, #8] + 8000c68: 60da str r2, [r3, #12] + 8000c6a: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); - 8000c78: 2300 movs r3, #0 - 8000c7a: 60bb str r3, [r7, #8] - 8000c7c: 4b27 ldr r3, [pc, #156] ; (8000d1c ) + 8000c6c: 2300 movs r3, #0 + 8000c6e: 60bb str r3, [r7, #8] + 8000c70: 4b27 ldr r3, [pc, #156] ; (8000d10 ) + 8000c72: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000c74: 4a26 ldr r2, [pc, #152] ; (8000d10 ) + 8000c76: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8000c7a: 6413 str r3, [r2, #64] ; 0x40 + 8000c7c: 4b24 ldr r3, [pc, #144] ; (8000d10 ) 8000c7e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000c80: 4a26 ldr r2, [pc, #152] ; (8000d1c ) - 8000c82: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000c86: 6413 str r3, [r2, #64] ; 0x40 - 8000c88: 4b24 ldr r3, [pc, #144] ; (8000d1c ) - 8000c8a: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000c8c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000c90: 60bb str r3, [r7, #8] - 8000c92: 68bb ldr r3, [r7, #8] + 8000c80: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8000c84: 60bb str r3, [r7, #8] + 8000c86: 68bb ldr r3, [r7, #8] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8000c94: 2300 movs r3, #0 - 8000c96: 607b str r3, [r7, #4] - 8000c98: 4b21 ldr r3, [pc, #132] ; (8000d20 ) + 8000c88: 2300 movs r3, #0 + 8000c8a: 607b str r3, [r7, #4] + 8000c8c: 4b21 ldr r3, [pc, #132] ; (8000d14 ) + 8000c8e: 681b ldr r3, [r3, #0] + 8000c90: 4a20 ldr r2, [pc, #128] ; (8000d14 ) + 8000c92: f443 4340 orr.w r3, r3, #49152 ; 0xc000 + 8000c96: 6013 str r3, [r2, #0] + 8000c98: 4b1e ldr r3, [pc, #120] ; (8000d14 ) 8000c9a: 681b ldr r3, [r3, #0] - 8000c9c: 4a20 ldr r2, [pc, #128] ; (8000d20 ) - 8000c9e: f443 4340 orr.w r3, r3, #49152 ; 0xc000 - 8000ca2: 6013 str r3, [r2, #0] - 8000ca4: 4b1e ldr r3, [pc, #120] ; (8000d20 ) - 8000ca6: 681b ldr r3, [r3, #0] - 8000ca8: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8000cac: 607b str r3, [r7, #4] - 8000cae: 687b ldr r3, [r7, #4] + 8000c9c: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8000ca0: 607b str r3, [r7, #4] + 8000ca2: 687b ldr r3, [r7, #4] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8000cb0: 2301 movs r3, #1 - 8000cb2: 623b str r3, [r7, #32] + 8000ca4: 2301 movs r3, #1 + 8000ca6: 623b str r3, [r7, #32] RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8000cb4: f44f 3380 mov.w r3, #65536 ; 0x10000 - 8000cb8: 627b str r3, [r7, #36] ; 0x24 + 8000ca8: f44f 3380 mov.w r3, #65536 ; 0x10000 + 8000cac: 627b str r3, [r7, #36] ; 0x24 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8000cba: 2302 movs r3, #2 - 8000cbc: 63bb str r3, [r7, #56] ; 0x38 + 8000cae: 2302 movs r3, #2 + 8000cb0: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8000cbe: f44f 0380 mov.w r3, #4194304 ; 0x400000 - 8000cc2: 63fb str r3, [r7, #60] ; 0x3c + 8000cb2: f44f 0380 mov.w r3, #4194304 ; 0x400000 + 8000cb6: 63fb str r3, [r7, #60] ; 0x3c RCC_OscInitStruct.PLL.PLLM = 12; - 8000cc4: 230c movs r3, #12 - 8000cc6: 643b str r3, [r7, #64] ; 0x40 + 8000cb8: 230c movs r3, #12 + 8000cba: 643b str r3, [r7, #64] ; 0x40 RCC_OscInitStruct.PLL.PLLN = 96; - 8000cc8: 2360 movs r3, #96 ; 0x60 - 8000cca: 647b str r3, [r7, #68] ; 0x44 + 8000cbc: 2360 movs r3, #96 ; 0x60 + 8000cbe: 647b str r3, [r7, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 8000ccc: 2302 movs r3, #2 - 8000cce: 64bb str r3, [r7, #72] ; 0x48 + 8000cc0: 2302 movs r3, #2 + 8000cc2: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLQ = 4; - 8000cd0: 2304 movs r3, #4 - 8000cd2: 64fb str r3, [r7, #76] ; 0x4c + 8000cc4: 2304 movs r3, #4 + 8000cc6: 64fb str r3, [r7, #76] ; 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8000cd4: f107 0320 add.w r3, r7, #32 - 8000cd8: 4618 mov r0, r3 - 8000cda: f000 fc4f bl 800157c - 8000cde: 4603 mov r3, r0 - 8000ce0: 2b00 cmp r3, #0 - 8000ce2: d001 beq.n 8000ce8 + 8000cc8: f107 0320 add.w r3, r7, #32 + 8000ccc: 4618 mov r0, r3 + 8000cce: f000 fc4f bl 8001570 + 8000cd2: 4603 mov r3, r0 + 8000cd4: 2b00 cmp r3, #0 + 8000cd6: d001 beq.n 8000cdc { Error_Handler(); - 8000ce4: f000 f81e bl 8000d24 + 8000cd8: f000 f81e bl 8000d18 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000ce8: 230f movs r3, #15 - 8000cea: 60fb str r3, [r7, #12] + 8000cdc: 230f movs r3, #15 + 8000cde: 60fb str r3, [r7, #12] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8000cec: 2302 movs r3, #2 - 8000cee: 613b str r3, [r7, #16] + 8000ce0: 2302 movs r3, #2 + 8000ce2: 613b str r3, [r7, #16] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000cf0: 2300 movs r3, #0 - 8000cf2: 617b str r3, [r7, #20] + 8000ce4: 2300 movs r3, #0 + 8000ce6: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 8000cf4: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8000cf8: 61bb str r3, [r7, #24] + 8000ce8: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8000cec: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8000cfa: 2300 movs r3, #0 - 8000cfc: 61fb str r3, [r7, #28] + 8000cee: 2300 movs r3, #0 + 8000cf0: 61fb str r3, [r7, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) - 8000cfe: f107 030c add.w r3, r7, #12 - 8000d02: 2103 movs r1, #3 - 8000d04: 4618 mov r0, r3 - 8000d06: f000 feb1 bl 8001a6c - 8000d0a: 4603 mov r3, r0 - 8000d0c: 2b00 cmp r3, #0 - 8000d0e: d001 beq.n 8000d14 + 8000cf2: f107 030c add.w r3, r7, #12 + 8000cf6: 2103 movs r1, #3 + 8000cf8: 4618 mov r0, r3 + 8000cfa: f000 feb1 bl 8001a60 + 8000cfe: 4603 mov r3, r0 + 8000d00: 2b00 cmp r3, #0 + 8000d02: d001 beq.n 8000d08 { Error_Handler(); - 8000d10: f000 f808 bl 8000d24 + 8000d04: f000 f808 bl 8000d18 } } - 8000d14: bf00 nop - 8000d16: 3750 adds r7, #80 ; 0x50 - 8000d18: 46bd mov sp, r7 - 8000d1a: bd80 pop {r7, pc} - 8000d1c: 40023800 .word 0x40023800 - 8000d20: 40007000 .word 0x40007000 - -08000d24 : + 8000d08: bf00 nop + 8000d0a: 3750 adds r7, #80 ; 0x50 + 8000d0c: 46bd mov sp, r7 + 8000d0e: bd80 pop {r7, pc} + 8000d10: 40023800 .word 0x40023800 + 8000d14: 40007000 .word 0x40007000 + +08000d18 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8000d24: b480 push {r7} - 8000d26: af00 add r7, sp, #0 + 8000d18: b480 push {r7} + 8000d1a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8000d28: b672 cpsid i + 8000d1c: b672 cpsid i } - 8000d2a: bf00 nop + 8000d1e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8000d2c: e7fe b.n 8000d2c + 8000d20: e7fe b.n 8000d20 ... -08000d30 : +08000d24 : SPI_HandleTypeDef hspi1; /* SPI1 init function */ void MX_SPI1_Init(void) { - 8000d30: b580 push {r7, lr} - 8000d32: af00 add r7, sp, #0 + 8000d24: b580 push {r7, lr} + 8000d26: af00 add r7, sp, #0 /* USER CODE END SPI1_Init 0 */ /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ hspi1.Instance = SPI1; - 8000d34: 4b17 ldr r3, [pc, #92] ; (8000d94 ) - 8000d36: 4a18 ldr r2, [pc, #96] ; (8000d98 ) - 8000d38: 601a str r2, [r3, #0] + 8000d28: 4b17 ldr r3, [pc, #92] ; (8000d88 ) + 8000d2a: 4a18 ldr r2, [pc, #96] ; (8000d8c ) + 8000d2c: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; - 8000d3a: 4b16 ldr r3, [pc, #88] ; (8000d94 ) - 8000d3c: f44f 7282 mov.w r2, #260 ; 0x104 - 8000d40: 605a str r2, [r3, #4] + 8000d2e: 4b16 ldr r3, [pc, #88] ; (8000d88 ) + 8000d30: f44f 7282 mov.w r2, #260 ; 0x104 + 8000d34: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; - 8000d42: 4b14 ldr r3, [pc, #80] ; (8000d94 ) - 8000d44: 2200 movs r2, #0 - 8000d46: 609a str r2, [r3, #8] + 8000d36: 4b14 ldr r3, [pc, #80] ; (8000d88 ) + 8000d38: 2200 movs r2, #0 + 8000d3a: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - 8000d48: 4b12 ldr r3, [pc, #72] ; (8000d94 ) - 8000d4a: 2200 movs r2, #0 - 8000d4c: 60da str r2, [r3, #12] + 8000d3c: 4b12 ldr r3, [pc, #72] ; (8000d88 ) + 8000d3e: 2200 movs r2, #0 + 8000d40: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; - 8000d4e: 4b11 ldr r3, [pc, #68] ; (8000d94 ) - 8000d50: 2202 movs r2, #2 - 8000d52: 611a str r2, [r3, #16] + 8000d42: 4b11 ldr r3, [pc, #68] ; (8000d88 ) + 8000d44: 2202 movs r2, #2 + 8000d46: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; - 8000d54: 4b0f ldr r3, [pc, #60] ; (8000d94 ) - 8000d56: 2201 movs r2, #1 - 8000d58: 615a str r2, [r3, #20] + 8000d48: 4b0f ldr r3, [pc, #60] ; (8000d88 ) + 8000d4a: 2201 movs r2, #1 + 8000d4c: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; - 8000d5a: 4b0e ldr r3, [pc, #56] ; (8000d94 ) - 8000d5c: f44f 7200 mov.w r2, #512 ; 0x200 - 8000d60: 619a str r2, [r3, #24] + 8000d4e: 4b0e ldr r3, [pc, #56] ; (8000d88 ) + 8000d50: f44f 7200 mov.w r2, #512 ; 0x200 + 8000d54: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; - 8000d62: 4b0c ldr r3, [pc, #48] ; (8000d94 ) - 8000d64: 2218 movs r2, #24 - 8000d66: 61da str r2, [r3, #28] + 8000d56: 4b0c ldr r3, [pc, #48] ; (8000d88 ) + 8000d58: 2218 movs r2, #24 + 8000d5a: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - 8000d68: 4b0a ldr r3, [pc, #40] ; (8000d94 ) - 8000d6a: 2200 movs r2, #0 - 8000d6c: 621a str r2, [r3, #32] + 8000d5c: 4b0a ldr r3, [pc, #40] ; (8000d88 ) + 8000d5e: 2200 movs r2, #0 + 8000d60: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; - 8000d6e: 4b09 ldr r3, [pc, #36] ; (8000d94 ) - 8000d70: 2200 movs r2, #0 - 8000d72: 625a str r2, [r3, #36] ; 0x24 + 8000d62: 4b09 ldr r3, [pc, #36] ; (8000d88 ) + 8000d64: 2200 movs r2, #0 + 8000d66: 625a str r2, [r3, #36] ; 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8000d74: 4b07 ldr r3, [pc, #28] ; (8000d94 ) - 8000d76: 2200 movs r2, #0 - 8000d78: 629a str r2, [r3, #40] ; 0x28 + 8000d68: 4b07 ldr r3, [pc, #28] ; (8000d88 ) + 8000d6a: 2200 movs r2, #0 + 8000d6c: 629a str r2, [r3, #40] ; 0x28 hspi1.Init.CRCPolynomial = 10; - 8000d7a: 4b06 ldr r3, [pc, #24] ; (8000d94 ) - 8000d7c: 220a movs r2, #10 - 8000d7e: 62da str r2, [r3, #44] ; 0x2c + 8000d6e: 4b06 ldr r3, [pc, #24] ; (8000d88 ) + 8000d70: 220a movs r2, #10 + 8000d72: 62da str r2, [r3, #44] ; 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) - 8000d80: 4804 ldr r0, [pc, #16] ; (8000d94 ) - 8000d82: f001 f80f bl 8001da4 - 8000d86: 4603 mov r3, r0 - 8000d88: 2b00 cmp r3, #0 - 8000d8a: d001 beq.n 8000d90 + 8000d74: 4804 ldr r0, [pc, #16] ; (8000d88 ) + 8000d76: f001 f80f bl 8001d98 + 8000d7a: 4603 mov r3, r0 + 8000d7c: 2b00 cmp r3, #0 + 8000d7e: d001 beq.n 8000d84 { Error_Handler(); - 8000d8c: f7ff ffca bl 8000d24 + 8000d80: f7ff ffca bl 8000d18 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } - 8000d90: bf00 nop - 8000d92: bd80 pop {r7, pc} - 8000d94: 20000078 .word 0x20000078 - 8000d98: 40013000 .word 0x40013000 + 8000d84: bf00 nop + 8000d86: bd80 pop {r7, pc} + 8000d88: 2000005c .word 0x2000005c + 8000d8c: 40013000 .word 0x40013000 -08000d9c : +08000d90 : void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) { - 8000d9c: b580 push {r7, lr} - 8000d9e: b08a sub sp, #40 ; 0x28 - 8000da0: af00 add r7, sp, #0 - 8000da2: 6078 str r0, [r7, #4] + 8000d90: b580 push {r7, lr} + 8000d92: b08a sub sp, #40 ; 0x28 + 8000d94: af00 add r7, sp, #0 + 8000d96: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000da4: f107 0314 add.w r3, r7, #20 - 8000da8: 2200 movs r2, #0 - 8000daa: 601a str r2, [r3, #0] - 8000dac: 605a str r2, [r3, #4] - 8000dae: 609a str r2, [r3, #8] - 8000db0: 60da str r2, [r3, #12] - 8000db2: 611a str r2, [r3, #16] + 8000d98: f107 0314 add.w r3, r7, #20 + 8000d9c: 2200 movs r2, #0 + 8000d9e: 601a str r2, [r3, #0] + 8000da0: 605a str r2, [r3, #4] + 8000da2: 609a str r2, [r3, #8] + 8000da4: 60da str r2, [r3, #12] + 8000da6: 611a str r2, [r3, #16] if(spiHandle->Instance==SPI1) - 8000db4: 687b ldr r3, [r7, #4] - 8000db6: 681b ldr r3, [r3, #0] - 8000db8: 4a19 ldr r2, [pc, #100] ; (8000e20 ) - 8000dba: 4293 cmp r3, r2 - 8000dbc: d12b bne.n 8000e16 + 8000da8: 687b ldr r3, [r7, #4] + 8000daa: 681b ldr r3, [r3, #0] + 8000dac: 4a19 ldr r2, [pc, #100] ; (8000e14 ) + 8000dae: 4293 cmp r3, r2 + 8000db0: d12b bne.n 8000e0a { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* SPI1 clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); - 8000dbe: 2300 movs r3, #0 - 8000dc0: 613b str r3, [r7, #16] - 8000dc2: 4b18 ldr r3, [pc, #96] ; (8000e24 ) + 8000db2: 2300 movs r3, #0 + 8000db4: 613b str r3, [r7, #16] + 8000db6: 4b18 ldr r3, [pc, #96] ; (8000e18 ) + 8000db8: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000dba: 4a17 ldr r2, [pc, #92] ; (8000e18 ) + 8000dbc: f443 5380 orr.w r3, r3, #4096 ; 0x1000 + 8000dc0: 6453 str r3, [r2, #68] ; 0x44 + 8000dc2: 4b15 ldr r3, [pc, #84] ; (8000e18 ) 8000dc4: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000dc6: 4a17 ldr r2, [pc, #92] ; (8000e24 ) - 8000dc8: f443 5380 orr.w r3, r3, #4096 ; 0x1000 - 8000dcc: 6453 str r3, [r2, #68] ; 0x44 - 8000dce: 4b15 ldr r3, [pc, #84] ; (8000e24 ) - 8000dd0: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000dd2: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8000dd6: 613b str r3, [r7, #16] - 8000dd8: 693b ldr r3, [r7, #16] + 8000dc6: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8000dca: 613b str r3, [r7, #16] + 8000dcc: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000dda: 2300 movs r3, #0 - 8000ddc: 60fb str r3, [r7, #12] - 8000dde: 4b11 ldr r3, [pc, #68] ; (8000e24 ) + 8000dce: 2300 movs r3, #0 + 8000dd0: 60fb str r3, [r7, #12] + 8000dd2: 4b11 ldr r3, [pc, #68] ; (8000e18 ) + 8000dd4: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000dd6: 4a10 ldr r2, [pc, #64] ; (8000e18 ) + 8000dd8: f043 0301 orr.w r3, r3, #1 + 8000ddc: 6313 str r3, [r2, #48] ; 0x30 + 8000dde: 4b0e ldr r3, [pc, #56] ; (8000e18 ) 8000de0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000de2: 4a10 ldr r2, [pc, #64] ; (8000e24 ) - 8000de4: f043 0301 orr.w r3, r3, #1 - 8000de8: 6313 str r3, [r2, #48] ; 0x30 - 8000dea: 4b0e ldr r3, [pc, #56] ; (8000e24 ) - 8000dec: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000dee: f003 0301 and.w r3, r3, #1 - 8000df2: 60fb str r3, [r7, #12] - 8000df4: 68fb ldr r3, [r7, #12] + 8000de2: f003 0301 and.w r3, r3, #1 + 8000de6: 60fb str r3, [r7, #12] + 8000de8: 68fb ldr r3, [r7, #12] /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; - 8000df6: 23e0 movs r3, #224 ; 0xe0 - 8000df8: 617b str r3, [r7, #20] + 8000dea: 23e0 movs r3, #224 ; 0xe0 + 8000dec: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000dfa: 2302 movs r3, #2 - 8000dfc: 61bb str r3, [r7, #24] + 8000dee: 2302 movs r3, #2 + 8000df0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000dfe: 2300 movs r3, #0 - 8000e00: 61fb str r3, [r7, #28] + 8000df2: 2300 movs r3, #0 + 8000df4: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000e02: 2303 movs r3, #3 - 8000e04: 623b str r3, [r7, #32] + 8000df6: 2303 movs r3, #3 + 8000df8: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; - 8000e06: 2305 movs r3, #5 - 8000e08: 627b str r3, [r7, #36] ; 0x24 + 8000dfa: 2305 movs r3, #5 + 8000dfc: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000e0a: f107 0314 add.w r3, r7, #20 - 8000e0e: 4619 mov r1, r3 - 8000e10: 4805 ldr r0, [pc, #20] ; (8000e28 ) - 8000e12: f000 fa15 bl 8001240 + 8000dfe: f107 0314 add.w r3, r7, #20 + 8000e02: 4619 mov r1, r3 + 8000e04: 4805 ldr r0, [pc, #20] ; (8000e1c ) + 8000e06: f000 fa15 bl 8001234 /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } - 8000e16: bf00 nop - 8000e18: 3728 adds r7, #40 ; 0x28 - 8000e1a: 46bd mov sp, r7 - 8000e1c: bd80 pop {r7, pc} - 8000e1e: bf00 nop - 8000e20: 40013000 .word 0x40013000 - 8000e24: 40023800 .word 0x40023800 - 8000e28: 40020000 .word 0x40020000 - -08000e2c : + 8000e0a: bf00 nop + 8000e0c: 3728 adds r7, #40 ; 0x28 + 8000e0e: 46bd mov sp, r7 + 8000e10: bd80 pop {r7, pc} + 8000e12: bf00 nop + 8000e14: 40013000 .word 0x40013000 + 8000e18: 40023800 .word 0x40023800 + 8000e1c: 40020000 .word 0x40020000 + +08000e20 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8000e2c: b480 push {r7} - 8000e2e: b083 sub sp, #12 - 8000e30: af00 add r7, sp, #0 + 8000e20: b480 push {r7} + 8000e22: b083 sub sp, #12 + 8000e24: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000e32: 2300 movs r3, #0 - 8000e34: 607b str r3, [r7, #4] - 8000e36: 4b10 ldr r3, [pc, #64] ; (8000e78 ) + 8000e26: 2300 movs r3, #0 + 8000e28: 607b str r3, [r7, #4] + 8000e2a: 4b10 ldr r3, [pc, #64] ; (8000e6c ) + 8000e2c: 6c5b ldr r3, [r3, #68] ; 0x44 + 8000e2e: 4a0f ldr r2, [pc, #60] ; (8000e6c ) + 8000e30: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8000e34: 6453 str r3, [r2, #68] ; 0x44 + 8000e36: 4b0d ldr r3, [pc, #52] ; (8000e6c ) 8000e38: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000e3a: 4a0f ldr r2, [pc, #60] ; (8000e78 ) - 8000e3c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8000e40: 6453 str r3, [r2, #68] ; 0x44 - 8000e42: 4b0d ldr r3, [pc, #52] ; (8000e78 ) - 8000e44: 6c5b ldr r3, [r3, #68] ; 0x44 - 8000e46: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8000e4a: 607b str r3, [r7, #4] - 8000e4c: 687b ldr r3, [r7, #4] + 8000e3a: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8000e3e: 607b str r3, [r7, #4] + 8000e40: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 8000e4e: 2300 movs r3, #0 - 8000e50: 603b str r3, [r7, #0] - 8000e52: 4b09 ldr r3, [pc, #36] ; (8000e78 ) + 8000e42: 2300 movs r3, #0 + 8000e44: 603b str r3, [r7, #0] + 8000e46: 4b09 ldr r3, [pc, #36] ; (8000e6c ) + 8000e48: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000e4a: 4a08 ldr r2, [pc, #32] ; (8000e6c ) + 8000e4c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8000e50: 6413 str r3, [r2, #64] ; 0x40 + 8000e52: 4b06 ldr r3, [pc, #24] ; (8000e6c ) 8000e54: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000e56: 4a08 ldr r2, [pc, #32] ; (8000e78 ) - 8000e58: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000e5c: 6413 str r3, [r2, #64] ; 0x40 - 8000e5e: 4b06 ldr r3, [pc, #24] ; (8000e78 ) - 8000e60: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000e62: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000e66: 603b str r3, [r7, #0] - 8000e68: 683b ldr r3, [r7, #0] + 8000e56: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8000e5a: 603b str r3, [r7, #0] + 8000e5c: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } + 8000e5e: bf00 nop + 8000e60: 370c adds r7, #12 + 8000e62: 46bd mov sp, r7 + 8000e64: f85d 7b04 ldr.w r7, [sp], #4 + 8000e68: 4770 bx lr 8000e6a: bf00 nop - 8000e6c: 370c adds r7, #12 - 8000e6e: 46bd mov sp, r7 - 8000e70: f85d 7b04 ldr.w r7, [sp], #4 - 8000e74: 4770 bx lr - 8000e76: bf00 nop - 8000e78: 40023800 .word 0x40023800 - -08000e7c : + 8000e6c: 40023800 .word 0x40023800 + +08000e70 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8000e7c: b480 push {r7} - 8000e7e: af00 add r7, sp, #0 + 8000e70: b480 push {r7} + 8000e72: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8000e80: e7fe b.n 8000e80 + 8000e74: e7fe b.n 8000e74 -08000e82 : +08000e76 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8000e82: b480 push {r7} - 8000e84: af00 add r7, sp, #0 + 8000e76: b480 push {r7} + 8000e78: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8000e86: e7fe b.n 8000e86 + 8000e7a: e7fe b.n 8000e7a -08000e88 : +08000e7c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8000e88: b480 push {r7} - 8000e8a: af00 add r7, sp, #0 + 8000e7c: b480 push {r7} + 8000e7e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8000e8c: e7fe b.n 8000e8c + 8000e80: e7fe b.n 8000e80 -08000e8e : +08000e82 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 8000e8e: b480 push {r7} - 8000e90: af00 add r7, sp, #0 + 8000e82: b480 push {r7} + 8000e84: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8000e92: e7fe b.n 8000e92 + 8000e86: e7fe b.n 8000e86 -08000e94 : +08000e88 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8000e94: b480 push {r7} - 8000e96: af00 add r7, sp, #0 + 8000e88: b480 push {r7} + 8000e8a: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8000e98: e7fe b.n 8000e98 + 8000e8c: e7fe b.n 8000e8c -08000e9a : +08000e8e : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8000e9a: b480 push {r7} - 8000e9c: af00 add r7, sp, #0 + 8000e8e: b480 push {r7} + 8000e90: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8000e9e: bf00 nop - 8000ea0: 46bd mov sp, r7 - 8000ea2: f85d 7b04 ldr.w r7, [sp], #4 - 8000ea6: 4770 bx lr + 8000e92: bf00 nop + 8000e94: 46bd mov sp, r7 + 8000e96: f85d 7b04 ldr.w r7, [sp], #4 + 8000e9a: 4770 bx lr -08000ea8 : +08000e9c : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8000ea8: b480 push {r7} - 8000eaa: af00 add r7, sp, #0 + 8000e9c: b480 push {r7} + 8000e9e: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8000eac: bf00 nop - 8000eae: 46bd mov sp, r7 - 8000eb0: f85d 7b04 ldr.w r7, [sp], #4 - 8000eb4: 4770 bx lr + 8000ea0: bf00 nop + 8000ea2: 46bd mov sp, r7 + 8000ea4: f85d 7b04 ldr.w r7, [sp], #4 + 8000ea8: 4770 bx lr -08000eb6 : +08000eaa : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8000eb6: b480 push {r7} - 8000eb8: af00 add r7, sp, #0 + 8000eaa: b480 push {r7} + 8000eac: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8000eba: bf00 nop - 8000ebc: 46bd mov sp, r7 - 8000ebe: f85d 7b04 ldr.w r7, [sp], #4 - 8000ec2: 4770 bx lr + 8000eae: bf00 nop + 8000eb0: 46bd mov sp, r7 + 8000eb2: f85d 7b04 ldr.w r7, [sp], #4 + 8000eb6: 4770 bx lr -08000ec4 : +08000eb8 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8000ec4: b580 push {r7, lr} - 8000ec6: af00 add r7, sp, #0 + 8000eb8: b580 push {r7, lr} + 8000eba: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8000ec8: f000 f890 bl 8000fec + 8000ebc: f000 f890 bl 8000fe0 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8000ecc: bf00 nop - 8000ece: bd80 pop {r7, pc} + 8000ec0: bf00 nop + 8000ec2: bd80 pop {r7, pc} -08000ed0 : +08000ec4 : * configuration. * @param None * @retval None */ void SystemInit(void) { - 8000ed0: b480 push {r7} - 8000ed2: af00 add r7, sp, #0 + 8000ec4: b480 push {r7} + 8000ec6: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - 8000ed4: 4b06 ldr r3, [pc, #24] ; (8000ef0 ) - 8000ed6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8000eda: 4a05 ldr r2, [pc, #20] ; (8000ef0 ) - 8000edc: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 8000ee0: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 8000ec8: 4b06 ldr r3, [pc, #24] ; (8000ee4 ) + 8000eca: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8000ece: 4a05 ldr r2, [pc, #20] ; (8000ee4 ) + 8000ed0: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8000ed4: f8c2 3088 str.w r3, [r2, #136] ; 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8000ee4: bf00 nop - 8000ee6: 46bd mov sp, r7 - 8000ee8: f85d 7b04 ldr.w r7, [sp], #4 - 8000eec: 4770 bx lr - 8000eee: bf00 nop - 8000ef0: e000ed00 .word 0xe000ed00 + 8000ed8: bf00 nop + 8000eda: 46bd mov sp, r7 + 8000edc: f85d 7b04 ldr.w r7, [sp], #4 + 8000ee0: 4770 bx lr + 8000ee2: bf00 nop + 8000ee4: e000ed00 .word 0xe000ed00 -08000ef4 : +08000ee8 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ - 8000ef4: f8df d034 ldr.w sp, [pc, #52] ; 8000f2c + 8000ee8: f8df d034 ldr.w sp, [pc, #52] ; 8000f20 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8000ef8: 480d ldr r0, [pc, #52] ; (8000f30 ) + 8000eec: 480d ldr r0, [pc, #52] ; (8000f24 ) ldr r1, =_edata - 8000efa: 490e ldr r1, [pc, #56] ; (8000f34 ) + 8000eee: 490e ldr r1, [pc, #56] ; (8000f28 ) ldr r2, =_sidata - 8000efc: 4a0e ldr r2, [pc, #56] ; (8000f38 ) + 8000ef0: 4a0e ldr r2, [pc, #56] ; (8000f2c ) movs r3, #0 - 8000efe: 2300 movs r3, #0 + 8000ef2: 2300 movs r3, #0 b LoopCopyDataInit - 8000f00: e002 b.n 8000f08 + 8000ef4: e002 b.n 8000efc -08000f02 : +08000ef6 : CopyDataInit: ldr r4, [r2, r3] - 8000f02: 58d4 ldr r4, [r2, r3] + 8000ef6: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8000f04: 50c4 str r4, [r0, r3] + 8000ef8: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8000f06: 3304 adds r3, #4 + 8000efa: 3304 adds r3, #4 -08000f08 : +08000efc : LoopCopyDataInit: adds r4, r0, r3 - 8000f08: 18c4 adds r4, r0, r3 + 8000efc: 18c4 adds r4, r0, r3 cmp r4, r1 - 8000f0a: 428c cmp r4, r1 + 8000efe: 428c cmp r4, r1 bcc CopyDataInit - 8000f0c: d3f9 bcc.n 8000f02 + 8000f00: d3f9 bcc.n 8000ef6 /* Zero fill the bss segment. */ ldr r2, =_sbss - 8000f0e: 4a0b ldr r2, [pc, #44] ; (8000f3c ) + 8000f02: 4a0b ldr r2, [pc, #44] ; (8000f30 ) ldr r4, =_ebss - 8000f10: 4c0b ldr r4, [pc, #44] ; (8000f40 ) + 8000f04: 4c0b ldr r4, [pc, #44] ; (8000f34 ) movs r3, #0 - 8000f12: 2300 movs r3, #0 + 8000f06: 2300 movs r3, #0 b LoopFillZerobss - 8000f14: e001 b.n 8000f1a + 8000f08: e001 b.n 8000f0e -08000f16 : +08000f0a : FillZerobss: str r3, [r2] - 8000f16: 6013 str r3, [r2, #0] + 8000f0a: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8000f18: 3204 adds r2, #4 + 8000f0c: 3204 adds r2, #4 -08000f1a : +08000f0e : LoopFillZerobss: cmp r2, r4 - 8000f1a: 42a2 cmp r2, r4 + 8000f0e: 42a2 cmp r2, r4 bcc FillZerobss - 8000f1c: d3fb bcc.n 8000f16 + 8000f10: d3fb bcc.n 8000f0a /* Call the clock system intitialization function.*/ bl SystemInit - 8000f1e: f7ff ffd7 bl 8000ed0 + 8000f12: f7ff ffd7 bl 8000ec4 /* Call static constructors */ bl __libc_init_array - 8000f22: f002 fb05 bl 8003530 <__libc_init_array> + 8000f16: f002 fb9f bl 8003658 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8000f26: f7ff fe71 bl 8000c0c
+ 8000f1a: f7ff fe77 bl 8000c0c
bx lr - 8000f2a: 4770 bx lr + 8000f1e: 4770 bx lr ldr sp, =_estack /* set stack pointer */ - 8000f2c: 20020000 .word 0x20020000 + 8000f20: 20020000 .word 0x20020000 ldr r0, =_sdata - 8000f30: 20000000 .word 0x20000000 + 8000f24: 20000000 .word 0x20000000 ldr r1, =_edata - 8000f34: 2000000c .word 0x2000000c + 8000f28: 2000000c .word 0x2000000c ldr r2, =_sidata - 8000f38: 080035c4 .word 0x080035c4 + 8000f2c: 080036ec .word 0x080036ec ldr r2, =_sbss - 8000f3c: 2000000c .word 0x2000000c + 8000f30: 2000000c .word 0x2000000c ldr r4, =_ebss - 8000f40: 200000d4 .word 0x200000d4 + 8000f34: 200000b8 .word 0x200000b8 -08000f44 : +08000f38 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8000f44: e7fe b.n 8000f44 + 8000f38: e7fe b.n 8000f38 ... -08000f48 : +08000f3c : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8000f48: b580 push {r7, lr} - 8000f4a: af00 add r7, sp, #0 + 8000f3c: b580 push {r7, lr} + 8000f3e: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - 8000f4c: 4b0e ldr r3, [pc, #56] ; (8000f88 ) - 8000f4e: 681b ldr r3, [r3, #0] - 8000f50: 4a0d ldr r2, [pc, #52] ; (8000f88 ) - 8000f52: f443 7300 orr.w r3, r3, #512 ; 0x200 - 8000f56: 6013 str r3, [r2, #0] + 8000f40: 4b0e ldr r3, [pc, #56] ; (8000f7c ) + 8000f42: 681b ldr r3, [r3, #0] + 8000f44: 4a0d ldr r2, [pc, #52] ; (8000f7c ) + 8000f46: f443 7300 orr.w r3, r3, #512 ; 0x200 + 8000f4a: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); - 8000f58: 4b0b ldr r3, [pc, #44] ; (8000f88 ) - 8000f5a: 681b ldr r3, [r3, #0] - 8000f5c: 4a0a ldr r2, [pc, #40] ; (8000f88 ) - 8000f5e: f443 6380 orr.w r3, r3, #1024 ; 0x400 - 8000f62: 6013 str r3, [r2, #0] + 8000f4c: 4b0b ldr r3, [pc, #44] ; (8000f7c ) + 8000f4e: 681b ldr r3, [r3, #0] + 8000f50: 4a0a ldr r2, [pc, #40] ; (8000f7c ) + 8000f52: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 8000f56: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8000f64: 4b08 ldr r3, [pc, #32] ; (8000f88 ) - 8000f66: 681b ldr r3, [r3, #0] - 8000f68: 4a07 ldr r2, [pc, #28] ; (8000f88 ) - 8000f6a: f443 7380 orr.w r3, r3, #256 ; 0x100 - 8000f6e: 6013 str r3, [r2, #0] + 8000f58: 4b08 ldr r3, [pc, #32] ; (8000f7c ) + 8000f5a: 681b ldr r3, [r3, #0] + 8000f5c: 4a07 ldr r2, [pc, #28] ; (8000f7c ) + 8000f5e: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8000f62: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8000f70: 2003 movs r0, #3 - 8000f72: f000 f931 bl 80011d8 + 8000f64: 2003 movs r0, #3 + 8000f66: f000 f931 bl 80011cc /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 8000f76: 2000 movs r0, #0 - 8000f78: f000 f808 bl 8000f8c + 8000f6a: 2000 movs r0, #0 + 8000f6c: f000 f808 bl 8000f80 /* Init the low level hardware */ HAL_MspInit(); - 8000f7c: f7ff ff56 bl 8000e2c + 8000f70: f7ff ff56 bl 8000e20 /* Return function status */ return HAL_OK; - 8000f80: 2300 movs r3, #0 + 8000f74: 2300 movs r3, #0 } - 8000f82: 4618 mov r0, r3 - 8000f84: bd80 pop {r7, pc} - 8000f86: bf00 nop - 8000f88: 40023c00 .word 0x40023c00 + 8000f76: 4618 mov r0, r3 + 8000f78: bd80 pop {r7, pc} + 8000f7a: bf00 nop + 8000f7c: 40023c00 .word 0x40023c00 -08000f8c : +08000f80 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8000f8c: b580 push {r7, lr} - 8000f8e: b082 sub sp, #8 - 8000f90: af00 add r7, sp, #0 - 8000f92: 6078 str r0, [r7, #4] + 8000f80: b580 push {r7, lr} + 8000f82: b082 sub sp, #8 + 8000f84: af00 add r7, sp, #0 + 8000f86: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8000f94: 4b12 ldr r3, [pc, #72] ; (8000fe0 ) - 8000f96: 681a ldr r2, [r3, #0] - 8000f98: 4b12 ldr r3, [pc, #72] ; (8000fe4 ) - 8000f9a: 781b ldrb r3, [r3, #0] - 8000f9c: 4619 mov r1, r3 - 8000f9e: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8000fa2: fbb3 f3f1 udiv r3, r3, r1 - 8000fa6: fbb2 f3f3 udiv r3, r2, r3 - 8000faa: 4618 mov r0, r3 - 8000fac: f000 f93b bl 8001226 - 8000fb0: 4603 mov r3, r0 - 8000fb2: 2b00 cmp r3, #0 - 8000fb4: d001 beq.n 8000fba + 8000f88: 4b12 ldr r3, [pc, #72] ; (8000fd4 ) + 8000f8a: 681a ldr r2, [r3, #0] + 8000f8c: 4b12 ldr r3, [pc, #72] ; (8000fd8 ) + 8000f8e: 781b ldrb r3, [r3, #0] + 8000f90: 4619 mov r1, r3 + 8000f92: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8000f96: fbb3 f3f1 udiv r3, r3, r1 + 8000f9a: fbb2 f3f3 udiv r3, r2, r3 + 8000f9e: 4618 mov r0, r3 + 8000fa0: f000 f93b bl 800121a + 8000fa4: 4603 mov r3, r0 + 8000fa6: 2b00 cmp r3, #0 + 8000fa8: d001 beq.n 8000fae { return HAL_ERROR; - 8000fb6: 2301 movs r3, #1 - 8000fb8: e00e b.n 8000fd8 + 8000faa: 2301 movs r3, #1 + 8000fac: e00e b.n 8000fcc } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8000fba: 687b ldr r3, [r7, #4] - 8000fbc: 2b0f cmp r3, #15 - 8000fbe: d80a bhi.n 8000fd6 + 8000fae: 687b ldr r3, [r7, #4] + 8000fb0: 2b0f cmp r3, #15 + 8000fb2: d80a bhi.n 8000fca { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8000fc0: 2200 movs r2, #0 - 8000fc2: 6879 ldr r1, [r7, #4] - 8000fc4: f04f 30ff mov.w r0, #4294967295 - 8000fc8: f000 f911 bl 80011ee + 8000fb4: 2200 movs r2, #0 + 8000fb6: 6879 ldr r1, [r7, #4] + 8000fb8: f04f 30ff mov.w r0, #4294967295 + 8000fbc: f000 f911 bl 80011e2 uwTickPrio = TickPriority; - 8000fcc: 4a06 ldr r2, [pc, #24] ; (8000fe8 ) - 8000fce: 687b ldr r3, [r7, #4] - 8000fd0: 6013 str r3, [r2, #0] + 8000fc0: 4a06 ldr r2, [pc, #24] ; (8000fdc ) + 8000fc2: 687b ldr r3, [r7, #4] + 8000fc4: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8000fd2: 2300 movs r3, #0 - 8000fd4: e000 b.n 8000fd8 + 8000fc6: 2300 movs r3, #0 + 8000fc8: e000 b.n 8000fcc return HAL_ERROR; - 8000fd6: 2301 movs r3, #1 + 8000fca: 2301 movs r3, #1 } - 8000fd8: 4618 mov r0, r3 - 8000fda: 3708 adds r7, #8 - 8000fdc: 46bd mov sp, r7 - 8000fde: bd80 pop {r7, pc} - 8000fe0: 20000000 .word 0x20000000 - 8000fe4: 20000008 .word 0x20000008 - 8000fe8: 20000004 .word 0x20000004 - -08000fec : + 8000fcc: 4618 mov r0, r3 + 8000fce: 3708 adds r7, #8 + 8000fd0: 46bd mov sp, r7 + 8000fd2: bd80 pop {r7, pc} + 8000fd4: 20000000 .word 0x20000000 + 8000fd8: 20000008 .word 0x20000008 + 8000fdc: 20000004 .word 0x20000004 + +08000fe0 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8000fec: b480 push {r7} - 8000fee: af00 add r7, sp, #0 + 8000fe0: b480 push {r7} + 8000fe2: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8000ff0: 4b06 ldr r3, [pc, #24] ; (800100c ) - 8000ff2: 781b ldrb r3, [r3, #0] - 8000ff4: 461a mov r2, r3 - 8000ff6: 4b06 ldr r3, [pc, #24] ; (8001010 ) - 8000ff8: 681b ldr r3, [r3, #0] - 8000ffa: 4413 add r3, r2 - 8000ffc: 4a04 ldr r2, [pc, #16] ; (8001010 ) - 8000ffe: 6013 str r3, [r2, #0] + 8000fe4: 4b06 ldr r3, [pc, #24] ; (8001000 ) + 8000fe6: 781b ldrb r3, [r3, #0] + 8000fe8: 461a mov r2, r3 + 8000fea: 4b06 ldr r3, [pc, #24] ; (8001004 ) + 8000fec: 681b ldr r3, [r3, #0] + 8000fee: 4413 add r3, r2 + 8000ff0: 4a04 ldr r2, [pc, #16] ; (8001004 ) + 8000ff2: 6013 str r3, [r2, #0] } - 8001000: bf00 nop - 8001002: 46bd mov sp, r7 - 8001004: f85d 7b04 ldr.w r7, [sp], #4 - 8001008: 4770 bx lr - 800100a: bf00 nop - 800100c: 20000008 .word 0x20000008 - 8001010: 200000d0 .word 0x200000d0 - -08001014 : + 8000ff4: bf00 nop + 8000ff6: 46bd mov sp, r7 + 8000ff8: f85d 7b04 ldr.w r7, [sp], #4 + 8000ffc: 4770 bx lr + 8000ffe: bf00 nop + 8001000: 20000008 .word 0x20000008 + 8001004: 200000b4 .word 0x200000b4 + +08001008 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8001014: b480 push {r7} - 8001016: af00 add r7, sp, #0 + 8001008: b480 push {r7} + 800100a: af00 add r7, sp, #0 return uwTick; - 8001018: 4b03 ldr r3, [pc, #12] ; (8001028 ) - 800101a: 681b ldr r3, [r3, #0] + 800100c: 4b03 ldr r3, [pc, #12] ; (800101c ) + 800100e: 681b ldr r3, [r3, #0] } - 800101c: 4618 mov r0, r3 - 800101e: 46bd mov sp, r7 - 8001020: f85d 7b04 ldr.w r7, [sp], #4 - 8001024: 4770 bx lr - 8001026: bf00 nop - 8001028: 200000d0 .word 0x200000d0 - -0800102c : + 8001010: 4618 mov r0, r3 + 8001012: 46bd mov sp, r7 + 8001014: f85d 7b04 ldr.w r7, [sp], #4 + 8001018: 4770 bx lr + 800101a: bf00 nop + 800101c: 200000b4 .word 0x200000b4 + +08001020 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 800102c: b580 push {r7, lr} - 800102e: b084 sub sp, #16 - 8001030: af00 add r7, sp, #0 - 8001032: 6078 str r0, [r7, #4] + 8001020: b580 push {r7, lr} + 8001022: b084 sub sp, #16 + 8001024: af00 add r7, sp, #0 + 8001026: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8001034: f7ff ffee bl 8001014 - 8001038: 60b8 str r0, [r7, #8] + 8001028: f7ff ffee bl 8001008 + 800102c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 800103a: 687b ldr r3, [r7, #4] - 800103c: 60fb str r3, [r7, #12] + 800102e: 687b ldr r3, [r7, #4] + 8001030: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 800103e: 68fb ldr r3, [r7, #12] - 8001040: f1b3 3fff cmp.w r3, #4294967295 - 8001044: d005 beq.n 8001052 + 8001032: 68fb ldr r3, [r7, #12] + 8001034: f1b3 3fff cmp.w r3, #4294967295 + 8001038: d005 beq.n 8001046 { wait += (uint32_t)(uwTickFreq); - 8001046: 4b0a ldr r3, [pc, #40] ; (8001070 ) - 8001048: 781b ldrb r3, [r3, #0] - 800104a: 461a mov r2, r3 - 800104c: 68fb ldr r3, [r7, #12] - 800104e: 4413 add r3, r2 - 8001050: 60fb str r3, [r7, #12] + 800103a: 4b0a ldr r3, [pc, #40] ; (8001064 ) + 800103c: 781b ldrb r3, [r3, #0] + 800103e: 461a mov r2, r3 + 8001040: 68fb ldr r3, [r7, #12] + 8001042: 4413 add r3, r2 + 8001044: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) - 8001052: bf00 nop - 8001054: f7ff ffde bl 8001014 - 8001058: 4602 mov r2, r0 - 800105a: 68bb ldr r3, [r7, #8] - 800105c: 1ad3 subs r3, r2, r3 - 800105e: 68fa ldr r2, [r7, #12] - 8001060: 429a cmp r2, r3 - 8001062: d8f7 bhi.n 8001054 + 8001046: bf00 nop + 8001048: f7ff ffde bl 8001008 + 800104c: 4602 mov r2, r0 + 800104e: 68bb ldr r3, [r7, #8] + 8001050: 1ad3 subs r3, r2, r3 + 8001052: 68fa ldr r2, [r7, #12] + 8001054: 429a cmp r2, r3 + 8001056: d8f7 bhi.n 8001048 { } } - 8001064: bf00 nop - 8001066: bf00 nop - 8001068: 3710 adds r7, #16 - 800106a: 46bd mov sp, r7 - 800106c: bd80 pop {r7, pc} - 800106e: bf00 nop - 8001070: 20000008 .word 0x20000008 - -08001074 <__NVIC_SetPriorityGrouping>: + 8001058: bf00 nop + 800105a: bf00 nop + 800105c: 3710 adds r7, #16 + 800105e: 46bd mov sp, r7 + 8001060: bd80 pop {r7, pc} + 8001062: bf00 nop + 8001064: 20000008 .word 0x20000008 + +08001068 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8001074: b480 push {r7} - 8001076: b085 sub sp, #20 - 8001078: af00 add r7, sp, #0 - 800107a: 6078 str r0, [r7, #4] + 8001068: b480 push {r7} + 800106a: b085 sub sp, #20 + 800106c: af00 add r7, sp, #0 + 800106e: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 800107c: 687b ldr r3, [r7, #4] - 800107e: f003 0307 and.w r3, r3, #7 - 8001082: 60fb str r3, [r7, #12] + 8001070: 687b ldr r3, [r7, #4] + 8001072: f003 0307 and.w r3, r3, #7 + 8001076: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8001084: 4b0c ldr r3, [pc, #48] ; (80010b8 <__NVIC_SetPriorityGrouping+0x44>) - 8001086: 68db ldr r3, [r3, #12] - 8001088: 60bb str r3, [r7, #8] + 8001078: 4b0c ldr r3, [pc, #48] ; (80010ac <__NVIC_SetPriorityGrouping+0x44>) + 800107a: 68db ldr r3, [r3, #12] + 800107c: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 800108a: 68ba ldr r2, [r7, #8] - 800108c: f64f 03ff movw r3, #63743 ; 0xf8ff - 8001090: 4013 ands r3, r2 - 8001092: 60bb str r3, [r7, #8] + 800107e: 68ba ldr r2, [r7, #8] + 8001080: f64f 03ff movw r3, #63743 ; 0xf8ff + 8001084: 4013 ands r3, r2 + 8001086: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8001094: 68fb ldr r3, [r7, #12] - 8001096: 021a lsls r2, r3, #8 + 8001088: 68fb ldr r3, [r7, #12] + 800108a: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8001098: 68bb ldr r3, [r7, #8] - 800109a: 4313 orrs r3, r2 + 800108c: 68bb ldr r3, [r7, #8] + 800108e: 4313 orrs r3, r2 reg_value = (reg_value | - 800109c: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 - 80010a0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80010a4: 60bb str r3, [r7, #8] + 8001090: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 + 8001094: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8001098: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 80010a6: 4a04 ldr r2, [pc, #16] ; (80010b8 <__NVIC_SetPriorityGrouping+0x44>) - 80010a8: 68bb ldr r3, [r7, #8] - 80010aa: 60d3 str r3, [r2, #12] + 800109a: 4a04 ldr r2, [pc, #16] ; (80010ac <__NVIC_SetPriorityGrouping+0x44>) + 800109c: 68bb ldr r3, [r7, #8] + 800109e: 60d3 str r3, [r2, #12] } - 80010ac: bf00 nop - 80010ae: 3714 adds r7, #20 - 80010b0: 46bd mov sp, r7 - 80010b2: f85d 7b04 ldr.w r7, [sp], #4 - 80010b6: 4770 bx lr - 80010b8: e000ed00 .word 0xe000ed00 - -080010bc <__NVIC_GetPriorityGrouping>: + 80010a0: bf00 nop + 80010a2: 3714 adds r7, #20 + 80010a4: 46bd mov sp, r7 + 80010a6: f85d 7b04 ldr.w r7, [sp], #4 + 80010aa: 4770 bx lr + 80010ac: e000ed00 .word 0xe000ed00 + +080010b0 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 80010bc: b480 push {r7} - 80010be: af00 add r7, sp, #0 + 80010b0: b480 push {r7} + 80010b2: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 80010c0: 4b04 ldr r3, [pc, #16] ; (80010d4 <__NVIC_GetPriorityGrouping+0x18>) - 80010c2: 68db ldr r3, [r3, #12] - 80010c4: 0a1b lsrs r3, r3, #8 - 80010c6: f003 0307 and.w r3, r3, #7 + 80010b4: 4b04 ldr r3, [pc, #16] ; (80010c8 <__NVIC_GetPriorityGrouping+0x18>) + 80010b6: 68db ldr r3, [r3, #12] + 80010b8: 0a1b lsrs r3, r3, #8 + 80010ba: f003 0307 and.w r3, r3, #7 } - 80010ca: 4618 mov r0, r3 - 80010cc: 46bd mov sp, r7 - 80010ce: f85d 7b04 ldr.w r7, [sp], #4 - 80010d2: 4770 bx lr - 80010d4: e000ed00 .word 0xe000ed00 + 80010be: 4618 mov r0, r3 + 80010c0: 46bd mov sp, r7 + 80010c2: f85d 7b04 ldr.w r7, [sp], #4 + 80010c6: 4770 bx lr + 80010c8: e000ed00 .word 0xe000ed00 -080010d8 <__NVIC_SetPriority>: +080010cc <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 80010d8: b480 push {r7} - 80010da: b083 sub sp, #12 - 80010dc: af00 add r7, sp, #0 - 80010de: 4603 mov r3, r0 - 80010e0: 6039 str r1, [r7, #0] - 80010e2: 71fb strb r3, [r7, #7] + 80010cc: b480 push {r7} + 80010ce: b083 sub sp, #12 + 80010d0: af00 add r7, sp, #0 + 80010d2: 4603 mov r3, r0 + 80010d4: 6039 str r1, [r7, #0] + 80010d6: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 80010e4: f997 3007 ldrsb.w r3, [r7, #7] - 80010e8: 2b00 cmp r3, #0 - 80010ea: db0a blt.n 8001102 <__NVIC_SetPriority+0x2a> + 80010d8: f997 3007 ldrsb.w r3, [r7, #7] + 80010dc: 2b00 cmp r3, #0 + 80010de: db0a blt.n 80010f6 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80010ec: 683b ldr r3, [r7, #0] - 80010ee: b2da uxtb r2, r3 - 80010f0: 490c ldr r1, [pc, #48] ; (8001124 <__NVIC_SetPriority+0x4c>) - 80010f2: f997 3007 ldrsb.w r3, [r7, #7] - 80010f6: 0112 lsls r2, r2, #4 - 80010f8: b2d2 uxtb r2, r2 - 80010fa: 440b add r3, r1 - 80010fc: f883 2300 strb.w r2, [r3, #768] ; 0x300 + 80010e0: 683b ldr r3, [r7, #0] + 80010e2: b2da uxtb r2, r3 + 80010e4: 490c ldr r1, [pc, #48] ; (8001118 <__NVIC_SetPriority+0x4c>) + 80010e6: f997 3007 ldrsb.w r3, [r7, #7] + 80010ea: 0112 lsls r2, r2, #4 + 80010ec: b2d2 uxtb r2, r2 + 80010ee: 440b add r3, r1 + 80010f0: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8001100: e00a b.n 8001118 <__NVIC_SetPriority+0x40> + 80010f4: e00a b.n 800110c <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8001102: 683b ldr r3, [r7, #0] - 8001104: b2da uxtb r2, r3 - 8001106: 4908 ldr r1, [pc, #32] ; (8001128 <__NVIC_SetPriority+0x50>) - 8001108: 79fb ldrb r3, [r7, #7] - 800110a: f003 030f and.w r3, r3, #15 - 800110e: 3b04 subs r3, #4 - 8001110: 0112 lsls r2, r2, #4 - 8001112: b2d2 uxtb r2, r2 - 8001114: 440b add r3, r1 - 8001116: 761a strb r2, [r3, #24] + 80010f6: 683b ldr r3, [r7, #0] + 80010f8: b2da uxtb r2, r3 + 80010fa: 4908 ldr r1, [pc, #32] ; (800111c <__NVIC_SetPriority+0x50>) + 80010fc: 79fb ldrb r3, [r7, #7] + 80010fe: f003 030f and.w r3, r3, #15 + 8001102: 3b04 subs r3, #4 + 8001104: 0112 lsls r2, r2, #4 + 8001106: b2d2 uxtb r2, r2 + 8001108: 440b add r3, r1 + 800110a: 761a strb r2, [r3, #24] } - 8001118: bf00 nop - 800111a: 370c adds r7, #12 - 800111c: 46bd mov sp, r7 - 800111e: f85d 7b04 ldr.w r7, [sp], #4 - 8001122: 4770 bx lr - 8001124: e000e100 .word 0xe000e100 - 8001128: e000ed00 .word 0xe000ed00 - -0800112c : + 800110c: bf00 nop + 800110e: 370c adds r7, #12 + 8001110: 46bd mov sp, r7 + 8001112: f85d 7b04 ldr.w r7, [sp], #4 + 8001116: 4770 bx lr + 8001118: e000e100 .word 0xe000e100 + 800111c: e000ed00 .word 0xe000ed00 + +08001120 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 800112c: b480 push {r7} - 800112e: b089 sub sp, #36 ; 0x24 - 8001130: af00 add r7, sp, #0 - 8001132: 60f8 str r0, [r7, #12] - 8001134: 60b9 str r1, [r7, #8] - 8001136: 607a str r2, [r7, #4] + 8001120: b480 push {r7} + 8001122: b089 sub sp, #36 ; 0x24 + 8001124: af00 add r7, sp, #0 + 8001126: 60f8 str r0, [r7, #12] + 8001128: 60b9 str r1, [r7, #8] + 800112a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8001138: 68fb ldr r3, [r7, #12] - 800113a: f003 0307 and.w r3, r3, #7 - 800113e: 61fb str r3, [r7, #28] + 800112c: 68fb ldr r3, [r7, #12] + 800112e: f003 0307 and.w r3, r3, #7 + 8001132: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8001140: 69fb ldr r3, [r7, #28] - 8001142: f1c3 0307 rsb r3, r3, #7 - 8001146: 2b04 cmp r3, #4 - 8001148: bf28 it cs - 800114a: 2304 movcs r3, #4 - 800114c: 61bb str r3, [r7, #24] + 8001134: 69fb ldr r3, [r7, #28] + 8001136: f1c3 0307 rsb r3, r3, #7 + 800113a: 2b04 cmp r3, #4 + 800113c: bf28 it cs + 800113e: 2304 movcs r3, #4 + 8001140: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 800114e: 69fb ldr r3, [r7, #28] - 8001150: 3304 adds r3, #4 - 8001152: 2b06 cmp r3, #6 - 8001154: d902 bls.n 800115c - 8001156: 69fb ldr r3, [r7, #28] - 8001158: 3b03 subs r3, #3 - 800115a: e000 b.n 800115e - 800115c: 2300 movs r3, #0 - 800115e: 617b str r3, [r7, #20] + 8001142: 69fb ldr r3, [r7, #28] + 8001144: 3304 adds r3, #4 + 8001146: 2b06 cmp r3, #6 + 8001148: d902 bls.n 8001150 + 800114a: 69fb ldr r3, [r7, #28] + 800114c: 3b03 subs r3, #3 + 800114e: e000 b.n 8001152 + 8001150: 2300 movs r3, #0 + 8001152: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8001160: f04f 32ff mov.w r2, #4294967295 - 8001164: 69bb ldr r3, [r7, #24] - 8001166: fa02 f303 lsl.w r3, r2, r3 - 800116a: 43da mvns r2, r3 - 800116c: 68bb ldr r3, [r7, #8] - 800116e: 401a ands r2, r3 - 8001170: 697b ldr r3, [r7, #20] - 8001172: 409a lsls r2, r3 + 8001154: f04f 32ff mov.w r2, #4294967295 + 8001158: 69bb ldr r3, [r7, #24] + 800115a: fa02 f303 lsl.w r3, r2, r3 + 800115e: 43da mvns r2, r3 + 8001160: 68bb ldr r3, [r7, #8] + 8001162: 401a ands r2, r3 + 8001164: 697b ldr r3, [r7, #20] + 8001166: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8001174: f04f 31ff mov.w r1, #4294967295 - 8001178: 697b ldr r3, [r7, #20] - 800117a: fa01 f303 lsl.w r3, r1, r3 - 800117e: 43d9 mvns r1, r3 - 8001180: 687b ldr r3, [r7, #4] - 8001182: 400b ands r3, r1 + 8001168: f04f 31ff mov.w r1, #4294967295 + 800116c: 697b ldr r3, [r7, #20] + 800116e: fa01 f303 lsl.w r3, r1, r3 + 8001172: 43d9 mvns r1, r3 + 8001174: 687b ldr r3, [r7, #4] + 8001176: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8001184: 4313 orrs r3, r2 + 8001178: 4313 orrs r3, r2 ); } - 8001186: 4618 mov r0, r3 - 8001188: 3724 adds r7, #36 ; 0x24 - 800118a: 46bd mov sp, r7 - 800118c: f85d 7b04 ldr.w r7, [sp], #4 - 8001190: 4770 bx lr + 800117a: 4618 mov r0, r3 + 800117c: 3724 adds r7, #36 ; 0x24 + 800117e: 46bd mov sp, r7 + 8001180: f85d 7b04 ldr.w r7, [sp], #4 + 8001184: 4770 bx lr ... -08001194 : +08001188 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8001194: b580 push {r7, lr} - 8001196: b082 sub sp, #8 - 8001198: af00 add r7, sp, #0 - 800119a: 6078 str r0, [r7, #4] + 8001188: b580 push {r7, lr} + 800118a: b082 sub sp, #8 + 800118c: af00 add r7, sp, #0 + 800118e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 800119c: 687b ldr r3, [r7, #4] - 800119e: 3b01 subs r3, #1 - 80011a0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 80011a4: d301 bcc.n 80011aa + 8001190: 687b ldr r3, [r7, #4] + 8001192: 3b01 subs r3, #1 + 8001194: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8001198: d301 bcc.n 800119e { return (1UL); /* Reload value impossible */ - 80011a6: 2301 movs r3, #1 - 80011a8: e00f b.n 80011ca + 800119a: 2301 movs r3, #1 + 800119c: e00f b.n 80011be } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 80011aa: 4a0a ldr r2, [pc, #40] ; (80011d4 ) - 80011ac: 687b ldr r3, [r7, #4] - 80011ae: 3b01 subs r3, #1 - 80011b0: 6053 str r3, [r2, #4] + 800119e: 4a0a ldr r2, [pc, #40] ; (80011c8 ) + 80011a0: 687b ldr r3, [r7, #4] + 80011a2: 3b01 subs r3, #1 + 80011a4: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 80011b2: 210f movs r1, #15 - 80011b4: f04f 30ff mov.w r0, #4294967295 - 80011b8: f7ff ff8e bl 80010d8 <__NVIC_SetPriority> + 80011a6: 210f movs r1, #15 + 80011a8: f04f 30ff mov.w r0, #4294967295 + 80011ac: f7ff ff8e bl 80010cc <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 80011bc: 4b05 ldr r3, [pc, #20] ; (80011d4 ) - 80011be: 2200 movs r2, #0 - 80011c0: 609a str r2, [r3, #8] + 80011b0: 4b05 ldr r3, [pc, #20] ; (80011c8 ) + 80011b2: 2200 movs r2, #0 + 80011b4: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 80011c2: 4b04 ldr r3, [pc, #16] ; (80011d4 ) - 80011c4: 2207 movs r2, #7 - 80011c6: 601a str r2, [r3, #0] + 80011b6: 4b04 ldr r3, [pc, #16] ; (80011c8 ) + 80011b8: 2207 movs r2, #7 + 80011ba: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 80011c8: 2300 movs r3, #0 + 80011bc: 2300 movs r3, #0 } - 80011ca: 4618 mov r0, r3 - 80011cc: 3708 adds r7, #8 - 80011ce: 46bd mov sp, r7 - 80011d0: bd80 pop {r7, pc} - 80011d2: bf00 nop - 80011d4: e000e010 .word 0xe000e010 - -080011d8 : + 80011be: 4618 mov r0, r3 + 80011c0: 3708 adds r7, #8 + 80011c2: 46bd mov sp, r7 + 80011c4: bd80 pop {r7, pc} + 80011c6: bf00 nop + 80011c8: e000e010 .word 0xe000e010 + +080011cc : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 80011d8: b580 push {r7, lr} - 80011da: b082 sub sp, #8 - 80011dc: af00 add r7, sp, #0 - 80011de: 6078 str r0, [r7, #4] + 80011cc: b580 push {r7, lr} + 80011ce: b082 sub sp, #8 + 80011d0: af00 add r7, sp, #0 + 80011d2: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 80011e0: 6878 ldr r0, [r7, #4] - 80011e2: f7ff ff47 bl 8001074 <__NVIC_SetPriorityGrouping> + 80011d4: 6878 ldr r0, [r7, #4] + 80011d6: f7ff ff47 bl 8001068 <__NVIC_SetPriorityGrouping> } - 80011e6: bf00 nop - 80011e8: 3708 adds r7, #8 - 80011ea: 46bd mov sp, r7 - 80011ec: bd80 pop {r7, pc} + 80011da: bf00 nop + 80011dc: 3708 adds r7, #8 + 80011de: 46bd mov sp, r7 + 80011e0: bd80 pop {r7, pc} -080011ee : +080011e2 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 80011ee: b580 push {r7, lr} - 80011f0: b086 sub sp, #24 - 80011f2: af00 add r7, sp, #0 - 80011f4: 4603 mov r3, r0 - 80011f6: 60b9 str r1, [r7, #8] - 80011f8: 607a str r2, [r7, #4] - 80011fa: 73fb strb r3, [r7, #15] + 80011e2: b580 push {r7, lr} + 80011e4: b086 sub sp, #24 + 80011e6: af00 add r7, sp, #0 + 80011e8: 4603 mov r3, r0 + 80011ea: 60b9 str r1, [r7, #8] + 80011ec: 607a str r2, [r7, #4] + 80011ee: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 80011fc: 2300 movs r3, #0 - 80011fe: 617b str r3, [r7, #20] + 80011f0: 2300 movs r3, #0 + 80011f2: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8001200: f7ff ff5c bl 80010bc <__NVIC_GetPriorityGrouping> - 8001204: 6178 str r0, [r7, #20] + 80011f4: f7ff ff5c bl 80010b0 <__NVIC_GetPriorityGrouping> + 80011f8: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8001206: 687a ldr r2, [r7, #4] - 8001208: 68b9 ldr r1, [r7, #8] - 800120a: 6978 ldr r0, [r7, #20] - 800120c: f7ff ff8e bl 800112c - 8001210: 4602 mov r2, r0 - 8001212: f997 300f ldrsb.w r3, [r7, #15] - 8001216: 4611 mov r1, r2 - 8001218: 4618 mov r0, r3 - 800121a: f7ff ff5d bl 80010d8 <__NVIC_SetPriority> + 80011fa: 687a ldr r2, [r7, #4] + 80011fc: 68b9 ldr r1, [r7, #8] + 80011fe: 6978 ldr r0, [r7, #20] + 8001200: f7ff ff8e bl 8001120 + 8001204: 4602 mov r2, r0 + 8001206: f997 300f ldrsb.w r3, [r7, #15] + 800120a: 4611 mov r1, r2 + 800120c: 4618 mov r0, r3 + 800120e: f7ff ff5d bl 80010cc <__NVIC_SetPriority> } - 800121e: bf00 nop - 8001220: 3718 adds r7, #24 - 8001222: 46bd mov sp, r7 - 8001224: bd80 pop {r7, pc} + 8001212: bf00 nop + 8001214: 3718 adds r7, #24 + 8001216: 46bd mov sp, r7 + 8001218: bd80 pop {r7, pc} -08001226 : +0800121a : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8001226: b580 push {r7, lr} - 8001228: b082 sub sp, #8 - 800122a: af00 add r7, sp, #0 - 800122c: 6078 str r0, [r7, #4] + 800121a: b580 push {r7, lr} + 800121c: b082 sub sp, #8 + 800121e: af00 add r7, sp, #0 + 8001220: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 800122e: 6878 ldr r0, [r7, #4] - 8001230: f7ff ffb0 bl 8001194 - 8001234: 4603 mov r3, r0 + 8001222: 6878 ldr r0, [r7, #4] + 8001224: f7ff ffb0 bl 8001188 + 8001228: 4603 mov r3, r0 } - 8001236: 4618 mov r0, r3 - 8001238: 3708 adds r7, #8 - 800123a: 46bd mov sp, r7 - 800123c: bd80 pop {r7, pc} + 800122a: 4618 mov r0, r3 + 800122c: 3708 adds r7, #8 + 800122e: 46bd mov sp, r7 + 8001230: bd80 pop {r7, pc} ... -08001240 : +08001234 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8001240: b480 push {r7} - 8001242: b089 sub sp, #36 ; 0x24 - 8001244: af00 add r7, sp, #0 - 8001246: 6078 str r0, [r7, #4] - 8001248: 6039 str r1, [r7, #0] + 8001234: b480 push {r7} + 8001236: b089 sub sp, #36 ; 0x24 + 8001238: af00 add r7, sp, #0 + 800123a: 6078 str r0, [r7, #4] + 800123c: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; - 800124a: 2300 movs r3, #0 - 800124c: 617b str r3, [r7, #20] + 800123e: 2300 movs r3, #0 + 8001240: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 800124e: 2300 movs r3, #0 - 8001250: 613b str r3, [r7, #16] + 8001242: 2300 movs r3, #0 + 8001244: 613b str r3, [r7, #16] uint32_t temp = 0x00U; - 8001252: 2300 movs r3, #0 - 8001254: 61bb str r3, [r7, #24] + 8001246: 2300 movs r3, #0 + 8001248: 61bb str r3, [r7, #24] assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) - 8001256: 2300 movs r3, #0 - 8001258: 61fb str r3, [r7, #28] - 800125a: e159 b.n 8001510 + 800124a: 2300 movs r3, #0 + 800124c: 61fb str r3, [r7, #28] + 800124e: e159 b.n 8001504 { /* Get the IO position */ ioposition = 0x01U << position; - 800125c: 2201 movs r2, #1 - 800125e: 69fb ldr r3, [r7, #28] - 8001260: fa02 f303 lsl.w r3, r2, r3 - 8001264: 617b str r3, [r7, #20] + 8001250: 2201 movs r2, #1 + 8001252: 69fb ldr r3, [r7, #28] + 8001254: fa02 f303 lsl.w r3, r2, r3 + 8001258: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8001266: 683b ldr r3, [r7, #0] - 8001268: 681b ldr r3, [r3, #0] - 800126a: 697a ldr r2, [r7, #20] - 800126c: 4013 ands r3, r2 - 800126e: 613b str r3, [r7, #16] + 800125a: 683b ldr r3, [r7, #0] + 800125c: 681b ldr r3, [r3, #0] + 800125e: 697a ldr r2, [r7, #20] + 8001260: 4013 ands r3, r2 + 8001262: 613b str r3, [r7, #16] if(iocurrent == ioposition) - 8001270: 693a ldr r2, [r7, #16] - 8001272: 697b ldr r3, [r7, #20] - 8001274: 429a cmp r2, r3 - 8001276: f040 8148 bne.w 800150a + 8001264: 693a ldr r2, [r7, #16] + 8001266: 697b ldr r3, [r7, #20] + 8001268: 429a cmp r2, r3 + 800126a: f040 8148 bne.w 80014fe { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ + 800126e: 683b ldr r3, [r7, #0] + 8001270: 685b ldr r3, [r3, #4] + 8001272: f003 0303 and.w r3, r3, #3 + 8001276: 2b01 cmp r3, #1 + 8001278: d005 beq.n 8001286 + (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 800127a: 683b ldr r3, [r7, #0] 800127c: 685b ldr r3, [r3, #4] 800127e: f003 0303 and.w r3, r3, #3 - 8001282: 2b01 cmp r3, #1 - 8001284: d005 beq.n 8001292 - (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8001286: 683b ldr r3, [r7, #0] - 8001288: 685b ldr r3, [r3, #4] - 800128a: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ - 800128e: 2b02 cmp r3, #2 - 8001290: d130 bne.n 80012f4 + 8001282: 2b02 cmp r3, #2 + 8001284: d130 bne.n 80012e8 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8001292: 687b ldr r3, [r7, #4] - 8001294: 689b ldr r3, [r3, #8] - 8001296: 61bb str r3, [r7, #24] + 8001286: 687b ldr r3, [r7, #4] + 8001288: 689b ldr r3, [r3, #8] + 800128a: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); - 8001298: 69fb ldr r3, [r7, #28] - 800129a: 005b lsls r3, r3, #1 - 800129c: 2203 movs r2, #3 - 800129e: fa02 f303 lsl.w r3, r2, r3 - 80012a2: 43db mvns r3, r3 - 80012a4: 69ba ldr r2, [r7, #24] - 80012a6: 4013 ands r3, r2 - 80012a8: 61bb str r3, [r7, #24] + 800128c: 69fb ldr r3, [r7, #28] + 800128e: 005b lsls r3, r3, #1 + 8001290: 2203 movs r2, #3 + 8001292: fa02 f303 lsl.w r3, r2, r3 + 8001296: 43db mvns r3, r3 + 8001298: 69ba ldr r2, [r7, #24] + 800129a: 4013 ands r3, r2 + 800129c: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); - 80012aa: 683b ldr r3, [r7, #0] - 80012ac: 68da ldr r2, [r3, #12] - 80012ae: 69fb ldr r3, [r7, #28] - 80012b0: 005b lsls r3, r3, #1 - 80012b2: fa02 f303 lsl.w r3, r2, r3 - 80012b6: 69ba ldr r2, [r7, #24] - 80012b8: 4313 orrs r3, r2 - 80012ba: 61bb str r3, [r7, #24] + 800129e: 683b ldr r3, [r7, #0] + 80012a0: 68da ldr r2, [r3, #12] + 80012a2: 69fb ldr r3, [r7, #28] + 80012a4: 005b lsls r3, r3, #1 + 80012a6: fa02 f303 lsl.w r3, r2, r3 + 80012aa: 69ba ldr r2, [r7, #24] + 80012ac: 4313 orrs r3, r2 + 80012ae: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; - 80012bc: 687b ldr r3, [r7, #4] - 80012be: 69ba ldr r2, [r7, #24] - 80012c0: 609a str r2, [r3, #8] + 80012b0: 687b ldr r3, [r7, #4] + 80012b2: 69ba ldr r2, [r7, #24] + 80012b4: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 80012c2: 687b ldr r3, [r7, #4] - 80012c4: 685b ldr r3, [r3, #4] - 80012c6: 61bb str r3, [r7, #24] + 80012b6: 687b ldr r3, [r7, #4] + 80012b8: 685b ldr r3, [r3, #4] + 80012ba: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 80012c8: 2201 movs r2, #1 - 80012ca: 69fb ldr r3, [r7, #28] - 80012cc: fa02 f303 lsl.w r3, r2, r3 - 80012d0: 43db mvns r3, r3 - 80012d2: 69ba ldr r2, [r7, #24] - 80012d4: 4013 ands r3, r2 - 80012d6: 61bb str r3, [r7, #24] + 80012bc: 2201 movs r2, #1 + 80012be: 69fb ldr r3, [r7, #28] + 80012c0: fa02 f303 lsl.w r3, r2, r3 + 80012c4: 43db mvns r3, r3 + 80012c6: 69ba ldr r2, [r7, #24] + 80012c8: 4013 ands r3, r2 + 80012ca: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 80012d8: 683b ldr r3, [r7, #0] - 80012da: 685b ldr r3, [r3, #4] - 80012dc: 091b lsrs r3, r3, #4 - 80012de: f003 0201 and.w r2, r3, #1 - 80012e2: 69fb ldr r3, [r7, #28] - 80012e4: fa02 f303 lsl.w r3, r2, r3 - 80012e8: 69ba ldr r2, [r7, #24] - 80012ea: 4313 orrs r3, r2 - 80012ec: 61bb str r3, [r7, #24] + 80012cc: 683b ldr r3, [r7, #0] + 80012ce: 685b ldr r3, [r3, #4] + 80012d0: 091b lsrs r3, r3, #4 + 80012d2: f003 0201 and.w r2, r3, #1 + 80012d6: 69fb ldr r3, [r7, #28] + 80012d8: fa02 f303 lsl.w r3, r2, r3 + 80012dc: 69ba ldr r2, [r7, #24] + 80012de: 4313 orrs r3, r2 + 80012e0: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; - 80012ee: 687b ldr r3, [r7, #4] - 80012f0: 69ba ldr r2, [r7, #24] - 80012f2: 605a str r2, [r3, #4] + 80012e2: 687b ldr r3, [r7, #4] + 80012e4: 69ba ldr r2, [r7, #24] + 80012e6: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 80012f4: 683b ldr r3, [r7, #0] - 80012f6: 685b ldr r3, [r3, #4] - 80012f8: f003 0303 and.w r3, r3, #3 - 80012fc: 2b03 cmp r3, #3 - 80012fe: d017 beq.n 8001330 + 80012e8: 683b ldr r3, [r7, #0] + 80012ea: 685b ldr r3, [r3, #4] + 80012ec: f003 0303 and.w r3, r3, #3 + 80012f0: 2b03 cmp r3, #3 + 80012f2: d017 beq.n 8001324 { /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8001300: 687b ldr r3, [r7, #4] - 8001302: 68db ldr r3, [r3, #12] - 8001304: 61bb str r3, [r7, #24] + 80012f4: 687b ldr r3, [r7, #4] + 80012f6: 68db ldr r3, [r3, #12] + 80012f8: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); - 8001306: 69fb ldr r3, [r7, #28] - 8001308: 005b lsls r3, r3, #1 - 800130a: 2203 movs r2, #3 - 800130c: fa02 f303 lsl.w r3, r2, r3 - 8001310: 43db mvns r3, r3 - 8001312: 69ba ldr r2, [r7, #24] - 8001314: 4013 ands r3, r2 - 8001316: 61bb str r3, [r7, #24] + 80012fa: 69fb ldr r3, [r7, #28] + 80012fc: 005b lsls r3, r3, #1 + 80012fe: 2203 movs r2, #3 + 8001300: fa02 f303 lsl.w r3, r2, r3 + 8001304: 43db mvns r3, r3 + 8001306: 69ba ldr r2, [r7, #24] + 8001308: 4013 ands r3, r2 + 800130a: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 8001318: 683b ldr r3, [r7, #0] - 800131a: 689a ldr r2, [r3, #8] - 800131c: 69fb ldr r3, [r7, #28] - 800131e: 005b lsls r3, r3, #1 - 8001320: fa02 f303 lsl.w r3, r2, r3 - 8001324: 69ba ldr r2, [r7, #24] - 8001326: 4313 orrs r3, r2 - 8001328: 61bb str r3, [r7, #24] + 800130c: 683b ldr r3, [r7, #0] + 800130e: 689a ldr r2, [r3, #8] + 8001310: 69fb ldr r3, [r7, #28] + 8001312: 005b lsls r3, r3, #1 + 8001314: fa02 f303 lsl.w r3, r2, r3 + 8001318: 69ba ldr r2, [r7, #24] + 800131a: 4313 orrs r3, r2 + 800131c: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; - 800132a: 687b ldr r3, [r7, #4] - 800132c: 69ba ldr r2, [r7, #24] - 800132e: 60da str r2, [r3, #12] + 800131e: 687b ldr r3, [r7, #4] + 8001320: 69ba ldr r2, [r7, #24] + 8001322: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8001330: 683b ldr r3, [r7, #0] - 8001332: 685b ldr r3, [r3, #4] - 8001334: f003 0303 and.w r3, r3, #3 - 8001338: 2b02 cmp r3, #2 - 800133a: d123 bne.n 8001384 + 8001324: 683b ldr r3, [r7, #0] + 8001326: 685b ldr r3, [r3, #4] + 8001328: f003 0303 and.w r3, r3, #3 + 800132c: 2b02 cmp r3, #2 + 800132e: d123 bne.n 8001378 { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 800133c: 69fb ldr r3, [r7, #28] - 800133e: 08da lsrs r2, r3, #3 - 8001340: 687b ldr r3, [r7, #4] - 8001342: 3208 adds r2, #8 - 8001344: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 8001348: 61bb str r3, [r7, #24] + 8001330: 69fb ldr r3, [r7, #28] + 8001332: 08da lsrs r2, r3, #3 + 8001334: 687b ldr r3, [r7, #4] + 8001336: 3208 adds r2, #8 + 8001338: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 800133c: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; - 800134a: 69fb ldr r3, [r7, #28] - 800134c: f003 0307 and.w r3, r3, #7 - 8001350: 009b lsls r3, r3, #2 - 8001352: 220f movs r2, #15 - 8001354: fa02 f303 lsl.w r3, r2, r3 - 8001358: 43db mvns r3, r3 - 800135a: 69ba ldr r2, [r7, #24] - 800135c: 4013 ands r3, r2 - 800135e: 61bb str r3, [r7, #24] + 800133e: 69fb ldr r3, [r7, #28] + 8001340: f003 0307 and.w r3, r3, #7 + 8001344: 009b lsls r3, r3, #2 + 8001346: 220f movs r2, #15 + 8001348: fa02 f303 lsl.w r3, r2, r3 + 800134c: 43db mvns r3, r3 + 800134e: 69ba ldr r2, [r7, #24] + 8001350: 4013 ands r3, r2 + 8001352: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); - 8001360: 683b ldr r3, [r7, #0] - 8001362: 691a ldr r2, [r3, #16] - 8001364: 69fb ldr r3, [r7, #28] - 8001366: f003 0307 and.w r3, r3, #7 - 800136a: 009b lsls r3, r3, #2 - 800136c: fa02 f303 lsl.w r3, r2, r3 - 8001370: 69ba ldr r2, [r7, #24] - 8001372: 4313 orrs r3, r2 - 8001374: 61bb str r3, [r7, #24] + 8001354: 683b ldr r3, [r7, #0] + 8001356: 691a ldr r2, [r3, #16] + 8001358: 69fb ldr r3, [r7, #28] + 800135a: f003 0307 and.w r3, r3, #7 + 800135e: 009b lsls r3, r3, #2 + 8001360: fa02 f303 lsl.w r3, r2, r3 + 8001364: 69ba ldr r2, [r7, #24] + 8001366: 4313 orrs r3, r2 + 8001368: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; - 8001376: 69fb ldr r3, [r7, #28] - 8001378: 08da lsrs r2, r3, #3 - 800137a: 687b ldr r3, [r7, #4] - 800137c: 3208 adds r2, #8 - 800137e: 69b9 ldr r1, [r7, #24] - 8001380: f843 1022 str.w r1, [r3, r2, lsl #2] + 800136a: 69fb ldr r3, [r7, #28] + 800136c: 08da lsrs r2, r3, #3 + 800136e: 687b ldr r3, [r7, #4] + 8001370: 3208 adds r2, #8 + 8001372: 69b9 ldr r1, [r7, #24] + 8001374: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8001384: 687b ldr r3, [r7, #4] - 8001386: 681b ldr r3, [r3, #0] - 8001388: 61bb str r3, [r7, #24] + 8001378: 687b ldr r3, [r7, #4] + 800137a: 681b ldr r3, [r3, #0] + 800137c: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); - 800138a: 69fb ldr r3, [r7, #28] - 800138c: 005b lsls r3, r3, #1 - 800138e: 2203 movs r2, #3 - 8001390: fa02 f303 lsl.w r3, r2, r3 - 8001394: 43db mvns r3, r3 - 8001396: 69ba ldr r2, [r7, #24] - 8001398: 4013 ands r3, r2 - 800139a: 61bb str r3, [r7, #24] + 800137e: 69fb ldr r3, [r7, #28] + 8001380: 005b lsls r3, r3, #1 + 8001382: 2203 movs r2, #3 + 8001384: fa02 f303 lsl.w r3, r2, r3 + 8001388: 43db mvns r3, r3 + 800138a: 69ba ldr r2, [r7, #24] + 800138c: 4013 ands r3, r2 + 800138e: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 800139c: 683b ldr r3, [r7, #0] - 800139e: 685b ldr r3, [r3, #4] - 80013a0: f003 0203 and.w r2, r3, #3 - 80013a4: 69fb ldr r3, [r7, #28] - 80013a6: 005b lsls r3, r3, #1 - 80013a8: fa02 f303 lsl.w r3, r2, r3 - 80013ac: 69ba ldr r2, [r7, #24] - 80013ae: 4313 orrs r3, r2 - 80013b0: 61bb str r3, [r7, #24] + 8001390: 683b ldr r3, [r7, #0] + 8001392: 685b ldr r3, [r3, #4] + 8001394: f003 0203 and.w r2, r3, #3 + 8001398: 69fb ldr r3, [r7, #28] + 800139a: 005b lsls r3, r3, #1 + 800139c: fa02 f303 lsl.w r3, r2, r3 + 80013a0: 69ba ldr r2, [r7, #24] + 80013a2: 4313 orrs r3, r2 + 80013a4: 61bb str r3, [r7, #24] GPIOx->MODER = temp; - 80013b2: 687b ldr r3, [r7, #4] - 80013b4: 69ba ldr r2, [r7, #24] - 80013b6: 601a str r2, [r3, #0] + 80013a6: 687b ldr r3, [r7, #4] + 80013a8: 69ba ldr r2, [r7, #24] + 80013aa: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 80013b8: 683b ldr r3, [r7, #0] - 80013ba: 685b ldr r3, [r3, #4] - 80013bc: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80013c0: 2b00 cmp r3, #0 - 80013c2: f000 80a2 beq.w 800150a + 80013ac: 683b ldr r3, [r7, #0] + 80013ae: 685b ldr r3, [r3, #4] + 80013b0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80013b4: 2b00 cmp r3, #0 + 80013b6: f000 80a2 beq.w 80014fe { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80013c6: 2300 movs r3, #0 - 80013c8: 60fb str r3, [r7, #12] - 80013ca: 4b57 ldr r3, [pc, #348] ; (8001528 ) + 80013ba: 2300 movs r3, #0 + 80013bc: 60fb str r3, [r7, #12] + 80013be: 4b57 ldr r3, [pc, #348] ; (800151c ) + 80013c0: 6c5b ldr r3, [r3, #68] ; 0x44 + 80013c2: 4a56 ldr r2, [pc, #344] ; (800151c ) + 80013c4: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 80013c8: 6453 str r3, [r2, #68] ; 0x44 + 80013ca: 4b54 ldr r3, [pc, #336] ; (800151c ) 80013cc: 6c5b ldr r3, [r3, #68] ; 0x44 - 80013ce: 4a56 ldr r2, [pc, #344] ; (8001528 ) - 80013d0: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80013d4: 6453 str r3, [r2, #68] ; 0x44 - 80013d6: 4b54 ldr r3, [pc, #336] ; (8001528 ) - 80013d8: 6c5b ldr r3, [r3, #68] ; 0x44 - 80013da: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 80013de: 60fb str r3, [r7, #12] - 80013e0: 68fb ldr r3, [r7, #12] + 80013ce: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 80013d2: 60fb str r3, [r7, #12] + 80013d4: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; - 80013e2: 4a52 ldr r2, [pc, #328] ; (800152c ) - 80013e4: 69fb ldr r3, [r7, #28] - 80013e6: 089b lsrs r3, r3, #2 - 80013e8: 3302 adds r3, #2 - 80013ea: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80013ee: 61bb str r3, [r7, #24] + 80013d6: 4a52 ldr r2, [pc, #328] ; (8001520 ) + 80013d8: 69fb ldr r3, [r7, #28] + 80013da: 089b lsrs r3, r3, #2 + 80013dc: 3302 adds r3, #2 + 80013de: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80013e2: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); - 80013f0: 69fb ldr r3, [r7, #28] - 80013f2: f003 0303 and.w r3, r3, #3 - 80013f6: 009b lsls r3, r3, #2 - 80013f8: 220f movs r2, #15 - 80013fa: fa02 f303 lsl.w r3, r2, r3 - 80013fe: 43db mvns r3, r3 - 8001400: 69ba ldr r2, [r7, #24] - 8001402: 4013 ands r3, r2 - 8001404: 61bb str r3, [r7, #24] + 80013e4: 69fb ldr r3, [r7, #28] + 80013e6: f003 0303 and.w r3, r3, #3 + 80013ea: 009b lsls r3, r3, #2 + 80013ec: 220f movs r2, #15 + 80013ee: fa02 f303 lsl.w r3, r2, r3 + 80013f2: 43db mvns r3, r3 + 80013f4: 69ba ldr r2, [r7, #24] + 80013f6: 4013 ands r3, r2 + 80013f8: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); - 8001406: 687b ldr r3, [r7, #4] - 8001408: 4a49 ldr r2, [pc, #292] ; (8001530 ) - 800140a: 4293 cmp r3, r2 - 800140c: d019 beq.n 8001442 - 800140e: 687b ldr r3, [r7, #4] - 8001410: 4a48 ldr r2, [pc, #288] ; (8001534 ) - 8001412: 4293 cmp r3, r2 - 8001414: d013 beq.n 800143e - 8001416: 687b ldr r3, [r7, #4] - 8001418: 4a47 ldr r2, [pc, #284] ; (8001538 ) - 800141a: 4293 cmp r3, r2 - 800141c: d00d beq.n 800143a - 800141e: 687b ldr r3, [r7, #4] - 8001420: 4a46 ldr r2, [pc, #280] ; (800153c ) - 8001422: 4293 cmp r3, r2 - 8001424: d007 beq.n 8001436 - 8001426: 687b ldr r3, [r7, #4] - 8001428: 4a45 ldr r2, [pc, #276] ; (8001540 ) - 800142a: 4293 cmp r3, r2 - 800142c: d101 bne.n 8001432 - 800142e: 2304 movs r3, #4 - 8001430: e008 b.n 8001444 - 8001432: 2307 movs r3, #7 - 8001434: e006 b.n 8001444 - 8001436: 2303 movs r3, #3 - 8001438: e004 b.n 8001444 - 800143a: 2302 movs r3, #2 - 800143c: e002 b.n 8001444 - 800143e: 2301 movs r3, #1 - 8001440: e000 b.n 8001444 - 8001442: 2300 movs r3, #0 - 8001444: 69fa ldr r2, [r7, #28] - 8001446: f002 0203 and.w r2, r2, #3 - 800144a: 0092 lsls r2, r2, #2 - 800144c: 4093 lsls r3, r2 - 800144e: 69ba ldr r2, [r7, #24] - 8001450: 4313 orrs r3, r2 - 8001452: 61bb str r3, [r7, #24] + 80013fa: 687b ldr r3, [r7, #4] + 80013fc: 4a49 ldr r2, [pc, #292] ; (8001524 ) + 80013fe: 4293 cmp r3, r2 + 8001400: d019 beq.n 8001436 + 8001402: 687b ldr r3, [r7, #4] + 8001404: 4a48 ldr r2, [pc, #288] ; (8001528 ) + 8001406: 4293 cmp r3, r2 + 8001408: d013 beq.n 8001432 + 800140a: 687b ldr r3, [r7, #4] + 800140c: 4a47 ldr r2, [pc, #284] ; (800152c ) + 800140e: 4293 cmp r3, r2 + 8001410: d00d beq.n 800142e + 8001412: 687b ldr r3, [r7, #4] + 8001414: 4a46 ldr r2, [pc, #280] ; (8001530 ) + 8001416: 4293 cmp r3, r2 + 8001418: d007 beq.n 800142a + 800141a: 687b ldr r3, [r7, #4] + 800141c: 4a45 ldr r2, [pc, #276] ; (8001534 ) + 800141e: 4293 cmp r3, r2 + 8001420: d101 bne.n 8001426 + 8001422: 2304 movs r3, #4 + 8001424: e008 b.n 8001438 + 8001426: 2307 movs r3, #7 + 8001428: e006 b.n 8001438 + 800142a: 2303 movs r3, #3 + 800142c: e004 b.n 8001438 + 800142e: 2302 movs r3, #2 + 8001430: e002 b.n 8001438 + 8001432: 2301 movs r3, #1 + 8001434: e000 b.n 8001438 + 8001436: 2300 movs r3, #0 + 8001438: 69fa ldr r2, [r7, #28] + 800143a: f002 0203 and.w r2, r2, #3 + 800143e: 0092 lsls r2, r2, #2 + 8001440: 4093 lsls r3, r2 + 8001442: 69ba ldr r2, [r7, #24] + 8001444: 4313 orrs r3, r2 + 8001446: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; - 8001454: 4935 ldr r1, [pc, #212] ; (800152c ) - 8001456: 69fb ldr r3, [r7, #28] - 8001458: 089b lsrs r3, r3, #2 - 800145a: 3302 adds r3, #2 - 800145c: 69ba ldr r2, [r7, #24] - 800145e: f841 2023 str.w r2, [r1, r3, lsl #2] + 8001448: 4935 ldr r1, [pc, #212] ; (8001520 ) + 800144a: 69fb ldr r3, [r7, #28] + 800144c: 089b lsrs r3, r3, #2 + 800144e: 3302 adds r3, #2 + 8001450: 69ba ldr r2, [r7, #24] + 8001452: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8001462: 4b38 ldr r3, [pc, #224] ; (8001544 ) - 8001464: 681b ldr r3, [r3, #0] - 8001466: 61bb str r3, [r7, #24] + 8001456: 4b38 ldr r3, [pc, #224] ; (8001538 ) + 8001458: 681b ldr r3, [r3, #0] + 800145a: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8001468: 693b ldr r3, [r7, #16] - 800146a: 43db mvns r3, r3 - 800146c: 69ba ldr r2, [r7, #24] - 800146e: 4013 ands r3, r2 - 8001470: 61bb str r3, [r7, #24] + 800145c: 693b ldr r3, [r7, #16] + 800145e: 43db mvns r3, r3 + 8001460: 69ba ldr r2, [r7, #24] + 8001462: 4013 ands r3, r2 + 8001464: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8001472: 683b ldr r3, [r7, #0] - 8001474: 685b ldr r3, [r3, #4] - 8001476: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 800147a: 2b00 cmp r3, #0 - 800147c: d003 beq.n 8001486 + 8001466: 683b ldr r3, [r7, #0] + 8001468: 685b ldr r3, [r3, #4] + 800146a: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 800146e: 2b00 cmp r3, #0 + 8001470: d003 beq.n 800147a { temp |= iocurrent; - 800147e: 69ba ldr r2, [r7, #24] - 8001480: 693b ldr r3, [r7, #16] - 8001482: 4313 orrs r3, r2 - 8001484: 61bb str r3, [r7, #24] + 8001472: 69ba ldr r2, [r7, #24] + 8001474: 693b ldr r3, [r7, #16] + 8001476: 4313 orrs r3, r2 + 8001478: 61bb str r3, [r7, #24] } EXTI->IMR = temp; - 8001486: 4a2f ldr r2, [pc, #188] ; (8001544 ) - 8001488: 69bb ldr r3, [r7, #24] - 800148a: 6013 str r3, [r2, #0] + 800147a: 4a2f ldr r2, [pc, #188] ; (8001538 ) + 800147c: 69bb ldr r3, [r7, #24] + 800147e: 6013 str r3, [r2, #0] temp = EXTI->EMR; - 800148c: 4b2d ldr r3, [pc, #180] ; (8001544 ) - 800148e: 685b ldr r3, [r3, #4] - 8001490: 61bb str r3, [r7, #24] + 8001480: 4b2d ldr r3, [pc, #180] ; (8001538 ) + 8001482: 685b ldr r3, [r3, #4] + 8001484: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 8001492: 693b ldr r3, [r7, #16] - 8001494: 43db mvns r3, r3 - 8001496: 69ba ldr r2, [r7, #24] - 8001498: 4013 ands r3, r2 - 800149a: 61bb str r3, [r7, #24] + 8001486: 693b ldr r3, [r7, #16] + 8001488: 43db mvns r3, r3 + 800148a: 69ba ldr r2, [r7, #24] + 800148c: 4013 ands r3, r2 + 800148e: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 800149c: 683b ldr r3, [r7, #0] - 800149e: 685b ldr r3, [r3, #4] - 80014a0: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80014a4: 2b00 cmp r3, #0 - 80014a6: d003 beq.n 80014b0 + 8001490: 683b ldr r3, [r7, #0] + 8001492: 685b ldr r3, [r3, #4] + 8001494: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8001498: 2b00 cmp r3, #0 + 800149a: d003 beq.n 80014a4 { temp |= iocurrent; - 80014a8: 69ba ldr r2, [r7, #24] - 80014aa: 693b ldr r3, [r7, #16] - 80014ac: 4313 orrs r3, r2 - 80014ae: 61bb str r3, [r7, #24] + 800149c: 69ba ldr r2, [r7, #24] + 800149e: 693b ldr r3, [r7, #16] + 80014a0: 4313 orrs r3, r2 + 80014a2: 61bb str r3, [r7, #24] } EXTI->EMR = temp; - 80014b0: 4a24 ldr r2, [pc, #144] ; (8001544 ) - 80014b2: 69bb ldr r3, [r7, #24] - 80014b4: 6053 str r3, [r2, #4] + 80014a4: 4a24 ldr r2, [pc, #144] ; (8001538 ) + 80014a6: 69bb ldr r3, [r7, #24] + 80014a8: 6053 str r3, [r2, #4] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 80014b6: 4b23 ldr r3, [pc, #140] ; (8001544 ) - 80014b8: 689b ldr r3, [r3, #8] - 80014ba: 61bb str r3, [r7, #24] + 80014aa: 4b23 ldr r3, [pc, #140] ; (8001538 ) + 80014ac: 689b ldr r3, [r3, #8] + 80014ae: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 80014bc: 693b ldr r3, [r7, #16] - 80014be: 43db mvns r3, r3 - 80014c0: 69ba ldr r2, [r7, #24] - 80014c2: 4013 ands r3, r2 - 80014c4: 61bb str r3, [r7, #24] + 80014b0: 693b ldr r3, [r7, #16] + 80014b2: 43db mvns r3, r3 + 80014b4: 69ba ldr r2, [r7, #24] + 80014b6: 4013 ands r3, r2 + 80014b8: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 80014c6: 683b ldr r3, [r7, #0] - 80014c8: 685b ldr r3, [r3, #4] - 80014ca: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 80014ce: 2b00 cmp r3, #0 - 80014d0: d003 beq.n 80014da + 80014ba: 683b ldr r3, [r7, #0] + 80014bc: 685b ldr r3, [r3, #4] + 80014be: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 80014c2: 2b00 cmp r3, #0 + 80014c4: d003 beq.n 80014ce { temp |= iocurrent; - 80014d2: 69ba ldr r2, [r7, #24] - 80014d4: 693b ldr r3, [r7, #16] - 80014d6: 4313 orrs r3, r2 - 80014d8: 61bb str r3, [r7, #24] + 80014c6: 69ba ldr r2, [r7, #24] + 80014c8: 693b ldr r3, [r7, #16] + 80014ca: 4313 orrs r3, r2 + 80014cc: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; - 80014da: 4a1a ldr r2, [pc, #104] ; (8001544 ) - 80014dc: 69bb ldr r3, [r7, #24] - 80014de: 6093 str r3, [r2, #8] + 80014ce: 4a1a ldr r2, [pc, #104] ; (8001538 ) + 80014d0: 69bb ldr r3, [r7, #24] + 80014d2: 6093 str r3, [r2, #8] temp = EXTI->FTSR; - 80014e0: 4b18 ldr r3, [pc, #96] ; (8001544 ) - 80014e2: 68db ldr r3, [r3, #12] - 80014e4: 61bb str r3, [r7, #24] + 80014d4: 4b18 ldr r3, [pc, #96] ; (8001538 ) + 80014d6: 68db ldr r3, [r3, #12] + 80014d8: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); - 80014e6: 693b ldr r3, [r7, #16] - 80014e8: 43db mvns r3, r3 - 80014ea: 69ba ldr r2, [r7, #24] - 80014ec: 4013 ands r3, r2 - 80014ee: 61bb str r3, [r7, #24] + 80014da: 693b ldr r3, [r7, #16] + 80014dc: 43db mvns r3, r3 + 80014de: 69ba ldr r2, [r7, #24] + 80014e0: 4013 ands r3, r2 + 80014e2: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 80014f0: 683b ldr r3, [r7, #0] - 80014f2: 685b ldr r3, [r3, #4] - 80014f4: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 80014f8: 2b00 cmp r3, #0 - 80014fa: d003 beq.n 8001504 + 80014e4: 683b ldr r3, [r7, #0] + 80014e6: 685b ldr r3, [r3, #4] + 80014e8: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 80014ec: 2b00 cmp r3, #0 + 80014ee: d003 beq.n 80014f8 { temp |= iocurrent; - 80014fc: 69ba ldr r2, [r7, #24] - 80014fe: 693b ldr r3, [r7, #16] - 8001500: 4313 orrs r3, r2 - 8001502: 61bb str r3, [r7, #24] + 80014f0: 69ba ldr r2, [r7, #24] + 80014f2: 693b ldr r3, [r7, #16] + 80014f4: 4313 orrs r3, r2 + 80014f6: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; - 8001504: 4a0f ldr r2, [pc, #60] ; (8001544 ) - 8001506: 69bb ldr r3, [r7, #24] - 8001508: 60d3 str r3, [r2, #12] + 80014f8: 4a0f ldr r2, [pc, #60] ; (8001538 ) + 80014fa: 69bb ldr r3, [r7, #24] + 80014fc: 60d3 str r3, [r2, #12] for(position = 0U; position < GPIO_NUMBER; position++) - 800150a: 69fb ldr r3, [r7, #28] - 800150c: 3301 adds r3, #1 - 800150e: 61fb str r3, [r7, #28] - 8001510: 69fb ldr r3, [r7, #28] - 8001512: 2b0f cmp r3, #15 - 8001514: f67f aea2 bls.w 800125c + 80014fe: 69fb ldr r3, [r7, #28] + 8001500: 3301 adds r3, #1 + 8001502: 61fb str r3, [r7, #28] + 8001504: 69fb ldr r3, [r7, #28] + 8001506: 2b0f cmp r3, #15 + 8001508: f67f aea2 bls.w 8001250 } } } } - 8001518: bf00 nop + 800150c: bf00 nop + 800150e: bf00 nop + 8001510: 3724 adds r7, #36 ; 0x24 + 8001512: 46bd mov sp, r7 + 8001514: f85d 7b04 ldr.w r7, [sp], #4 + 8001518: 4770 bx lr 800151a: bf00 nop - 800151c: 3724 adds r7, #36 ; 0x24 - 800151e: 46bd mov sp, r7 - 8001520: f85d 7b04 ldr.w r7, [sp], #4 - 8001524: 4770 bx lr - 8001526: bf00 nop - 8001528: 40023800 .word 0x40023800 - 800152c: 40013800 .word 0x40013800 - 8001530: 40020000 .word 0x40020000 - 8001534: 40020400 .word 0x40020400 - 8001538: 40020800 .word 0x40020800 - 800153c: 40020c00 .word 0x40020c00 - 8001540: 40021000 .word 0x40021000 - 8001544: 40013c00 .word 0x40013c00 - -08001548 : + 800151c: 40023800 .word 0x40023800 + 8001520: 40013800 .word 0x40013800 + 8001524: 40020000 .word 0x40020000 + 8001528: 40020400 .word 0x40020400 + 800152c: 40020800 .word 0x40020800 + 8001530: 40020c00 .word 0x40020c00 + 8001534: 40021000 .word 0x40021000 + 8001538: 40013c00 .word 0x40013c00 + +0800153c : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8001548: b480 push {r7} - 800154a: b083 sub sp, #12 - 800154c: af00 add r7, sp, #0 - 800154e: 6078 str r0, [r7, #4] - 8001550: 460b mov r3, r1 - 8001552: 807b strh r3, [r7, #2] - 8001554: 4613 mov r3, r2 - 8001556: 707b strb r3, [r7, #1] + 800153c: b480 push {r7} + 800153e: b083 sub sp, #12 + 8001540: af00 add r7, sp, #0 + 8001542: 6078 str r0, [r7, #4] + 8001544: 460b mov r3, r1 + 8001546: 807b strh r3, [r7, #2] + 8001548: 4613 mov r3, r2 + 800154a: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) - 8001558: 787b ldrb r3, [r7, #1] - 800155a: 2b00 cmp r3, #0 - 800155c: d003 beq.n 8001566 + 800154c: 787b ldrb r3, [r7, #1] + 800154e: 2b00 cmp r3, #0 + 8001550: d003 beq.n 800155a { GPIOx->BSRR = GPIO_Pin; - 800155e: 887a ldrh r2, [r7, #2] - 8001560: 687b ldr r3, [r7, #4] - 8001562: 619a str r2, [r3, #24] + 8001552: 887a ldrh r2, [r7, #2] + 8001554: 687b ldr r3, [r7, #4] + 8001556: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } - 8001564: e003 b.n 800156e + 8001558: e003 b.n 8001562 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; - 8001566: 887b ldrh r3, [r7, #2] - 8001568: 041a lsls r2, r3, #16 - 800156a: 687b ldr r3, [r7, #4] - 800156c: 619a str r2, [r3, #24] + 800155a: 887b ldrh r3, [r7, #2] + 800155c: 041a lsls r2, r3, #16 + 800155e: 687b ldr r3, [r7, #4] + 8001560: 619a str r2, [r3, #24] } - 800156e: bf00 nop - 8001570: 370c adds r7, #12 - 8001572: 46bd mov sp, r7 - 8001574: f85d 7b04 ldr.w r7, [sp], #4 - 8001578: 4770 bx lr + 8001562: bf00 nop + 8001564: 370c adds r7, #12 + 8001566: 46bd mov sp, r7 + 8001568: f85d 7b04 ldr.w r7, [sp], #4 + 800156c: 4770 bx lr ... -0800157c : +08001570 : * supported by this API. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 800157c: b580 push {r7, lr} - 800157e: b086 sub sp, #24 - 8001580: af00 add r7, sp, #0 - 8001582: 6078 str r0, [r7, #4] + 8001570: b580 push {r7, lr} + 8001572: b086 sub sp, #24 + 8001574: af00 add r7, sp, #0 + 8001576: 6078 str r0, [r7, #4] uint32_t tickstart, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8001584: 687b ldr r3, [r7, #4] - 8001586: 2b00 cmp r3, #0 - 8001588: d101 bne.n 800158e + 8001578: 687b ldr r3, [r7, #4] + 800157a: 2b00 cmp r3, #0 + 800157c: d101 bne.n 8001582 { return HAL_ERROR; - 800158a: 2301 movs r3, #1 - 800158c: e264 b.n 8001a58 + 800157e: 2301 movs r3, #1 + 8001580: e264 b.n 8001a4c } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 800158e: 687b ldr r3, [r7, #4] - 8001590: 681b ldr r3, [r3, #0] - 8001592: f003 0301 and.w r3, r3, #1 - 8001596: 2b00 cmp r3, #0 - 8001598: d075 beq.n 8001686 + 8001582: 687b ldr r3, [r7, #4] + 8001584: 681b ldr r3, [r3, #0] + 8001586: f003 0301 and.w r3, r3, #1 + 800158a: 2b00 cmp r3, #0 + 800158c: d075 beq.n 800167a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ - 800159a: 4ba3 ldr r3, [pc, #652] ; (8001828 ) + 800158e: 4ba3 ldr r3, [pc, #652] ; (800181c ) + 8001590: 689b ldr r3, [r3, #8] + 8001592: f003 030c and.w r3, r3, #12 + 8001596: 2b04 cmp r3, #4 + 8001598: d00c beq.n 80015b4 + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) + 800159a: 4ba0 ldr r3, [pc, #640] ; (800181c ) 800159c: 689b ldr r3, [r3, #8] 800159e: f003 030c and.w r3, r3, #12 - 80015a2: 2b04 cmp r3, #4 - 80015a4: d00c beq.n 80015c0 - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 80015a6: 4ba0 ldr r3, [pc, #640] ; (8001828 ) - 80015a8: 689b ldr r3, [r3, #8] - 80015aa: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ - 80015ae: 2b08 cmp r3, #8 - 80015b0: d112 bne.n 80015d8 + 80015a2: 2b08 cmp r3, #8 + 80015a4: d112 bne.n 80015cc ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) - 80015b2: 4b9d ldr r3, [pc, #628] ; (8001828 ) - 80015b4: 685b ldr r3, [r3, #4] - 80015b6: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80015ba: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 80015be: d10b bne.n 80015d8 + 80015a6: 4b9d ldr r3, [pc, #628] ; (800181c ) + 80015a8: 685b ldr r3, [r3, #4] + 80015aa: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 80015ae: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 80015b2: d10b bne.n 80015cc { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80015c0: 4b99 ldr r3, [pc, #612] ; (8001828 ) - 80015c2: 681b ldr r3, [r3, #0] - 80015c4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80015c8: 2b00 cmp r3, #0 - 80015ca: d05b beq.n 8001684 - 80015cc: 687b ldr r3, [r7, #4] - 80015ce: 685b ldr r3, [r3, #4] - 80015d0: 2b00 cmp r3, #0 - 80015d2: d157 bne.n 8001684 + 80015b4: 4b99 ldr r3, [pc, #612] ; (800181c ) + 80015b6: 681b ldr r3, [r3, #0] + 80015b8: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80015bc: 2b00 cmp r3, #0 + 80015be: d05b beq.n 8001678 + 80015c0: 687b ldr r3, [r7, #4] + 80015c2: 685b ldr r3, [r3, #4] + 80015c4: 2b00 cmp r3, #0 + 80015c6: d157 bne.n 8001678 { return HAL_ERROR; - 80015d4: 2301 movs r3, #1 - 80015d6: e23f b.n 8001a58 + 80015c8: 2301 movs r3, #1 + 80015ca: e23f b.n 8001a4c } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80015d8: 687b ldr r3, [r7, #4] - 80015da: 685b ldr r3, [r3, #4] - 80015dc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80015e0: d106 bne.n 80015f0 - 80015e2: 4b91 ldr r3, [pc, #580] ; (8001828 ) - 80015e4: 681b ldr r3, [r3, #0] - 80015e6: 4a90 ldr r2, [pc, #576] ; (8001828 ) - 80015e8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 80015ec: 6013 str r3, [r2, #0] - 80015ee: e01d b.n 800162c - 80015f0: 687b ldr r3, [r7, #4] - 80015f2: 685b ldr r3, [r3, #4] - 80015f4: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 80015f8: d10c bne.n 8001614 - 80015fa: 4b8b ldr r3, [pc, #556] ; (8001828 ) + 80015cc: 687b ldr r3, [r7, #4] + 80015ce: 685b ldr r3, [r3, #4] + 80015d0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80015d4: d106 bne.n 80015e4 + 80015d6: 4b91 ldr r3, [pc, #580] ; (800181c ) + 80015d8: 681b ldr r3, [r3, #0] + 80015da: 4a90 ldr r2, [pc, #576] ; (800181c ) + 80015dc: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 80015e0: 6013 str r3, [r2, #0] + 80015e2: e01d b.n 8001620 + 80015e4: 687b ldr r3, [r7, #4] + 80015e6: 685b ldr r3, [r3, #4] + 80015e8: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 80015ec: d10c bne.n 8001608 + 80015ee: 4b8b ldr r3, [pc, #556] ; (800181c ) + 80015f0: 681b ldr r3, [r3, #0] + 80015f2: 4a8a ldr r2, [pc, #552] ; (800181c ) + 80015f4: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 80015f8: 6013 str r3, [r2, #0] + 80015fa: 4b88 ldr r3, [pc, #544] ; (800181c ) 80015fc: 681b ldr r3, [r3, #0] - 80015fe: 4a8a ldr r2, [pc, #552] ; (8001828 ) - 8001600: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 80015fe: 4a87 ldr r2, [pc, #540] ; (800181c ) + 8001600: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8001604: 6013 str r3, [r2, #0] - 8001606: 4b88 ldr r3, [pc, #544] ; (8001828 ) - 8001608: 681b ldr r3, [r3, #0] - 800160a: 4a87 ldr r2, [pc, #540] ; (8001828 ) - 800160c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8001610: 6013 str r3, [r2, #0] - 8001612: e00b b.n 800162c - 8001614: 4b84 ldr r3, [pc, #528] ; (8001828 ) + 8001606: e00b b.n 8001620 + 8001608: 4b84 ldr r3, [pc, #528] ; (800181c ) + 800160a: 681b ldr r3, [r3, #0] + 800160c: 4a83 ldr r2, [pc, #524] ; (800181c ) + 800160e: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8001612: 6013 str r3, [r2, #0] + 8001614: 4b81 ldr r3, [pc, #516] ; (800181c ) 8001616: 681b ldr r3, [r3, #0] - 8001618: 4a83 ldr r2, [pc, #524] ; (8001828 ) - 800161a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8001618: 4a80 ldr r2, [pc, #512] ; (800181c ) + 800161a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800161e: 6013 str r3, [r2, #0] - 8001620: 4b81 ldr r3, [pc, #516] ; (8001828 ) - 8001622: 681b ldr r3, [r3, #0] - 8001624: 4a80 ldr r2, [pc, #512] ; (8001828 ) - 8001626: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 800162a: 6013 str r3, [r2, #0] /* Check the HSE State */ if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) - 800162c: 687b ldr r3, [r7, #4] - 800162e: 685b ldr r3, [r3, #4] - 8001630: 2b00 cmp r3, #0 - 8001632: d013 beq.n 800165c + 8001620: 687b ldr r3, [r7, #4] + 8001622: 685b ldr r3, [r3, #4] + 8001624: 2b00 cmp r3, #0 + 8001626: d013 beq.n 8001650 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001634: f7ff fcee bl 8001014 - 8001638: 6138 str r0, [r7, #16] + 8001628: f7ff fcee bl 8001008 + 800162c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800163a: e008 b.n 800164e + 800162e: e008 b.n 8001642 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 800163c: f7ff fcea bl 8001014 - 8001640: 4602 mov r2, r0 - 8001642: 693b ldr r3, [r7, #16] - 8001644: 1ad3 subs r3, r2, r3 - 8001646: 2b64 cmp r3, #100 ; 0x64 - 8001648: d901 bls.n 800164e + 8001630: f7ff fcea bl 8001008 + 8001634: 4602 mov r2, r0 + 8001636: 693b ldr r3, [r7, #16] + 8001638: 1ad3 subs r3, r2, r3 + 800163a: 2b64 cmp r3, #100 ; 0x64 + 800163c: d901 bls.n 8001642 { return HAL_TIMEOUT; - 800164a: 2303 movs r3, #3 - 800164c: e204 b.n 8001a58 + 800163e: 2303 movs r3, #3 + 8001640: e204 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800164e: 4b76 ldr r3, [pc, #472] ; (8001828 ) - 8001650: 681b ldr r3, [r3, #0] - 8001652: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8001656: 2b00 cmp r3, #0 - 8001658: d0f0 beq.n 800163c - 800165a: e014 b.n 8001686 + 8001642: 4b76 ldr r3, [pc, #472] ; (800181c ) + 8001644: 681b ldr r3, [r3, #0] + 8001646: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 800164a: 2b00 cmp r3, #0 + 800164c: d0f0 beq.n 8001630 + 800164e: e014 b.n 800167a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800165c: f7ff fcda bl 8001014 - 8001660: 6138 str r0, [r7, #16] + 8001650: f7ff fcda bl 8001008 + 8001654: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8001662: e008 b.n 8001676 + 8001656: e008 b.n 800166a { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8001664: f7ff fcd6 bl 8001014 - 8001668: 4602 mov r2, r0 - 800166a: 693b ldr r3, [r7, #16] - 800166c: 1ad3 subs r3, r2, r3 - 800166e: 2b64 cmp r3, #100 ; 0x64 - 8001670: d901 bls.n 8001676 + 8001658: f7ff fcd6 bl 8001008 + 800165c: 4602 mov r2, r0 + 800165e: 693b ldr r3, [r7, #16] + 8001660: 1ad3 subs r3, r2, r3 + 8001662: 2b64 cmp r3, #100 ; 0x64 + 8001664: d901 bls.n 800166a { return HAL_TIMEOUT; - 8001672: 2303 movs r3, #3 - 8001674: e1f0 b.n 8001a58 + 8001666: 2303 movs r3, #3 + 8001668: e1f0 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8001676: 4b6c ldr r3, [pc, #432] ; (8001828 ) - 8001678: 681b ldr r3, [r3, #0] - 800167a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 800167e: 2b00 cmp r3, #0 - 8001680: d1f0 bne.n 8001664 - 8001682: e000 b.n 8001686 + 800166a: 4b6c ldr r3, [pc, #432] ; (800181c ) + 800166c: 681b ldr r3, [r3, #0] + 800166e: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8001672: 2b00 cmp r3, #0 + 8001674: d1f0 bne.n 8001658 + 8001676: e000 b.n 800167a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8001684: bf00 nop + 8001678: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8001686: 687b ldr r3, [r7, #4] - 8001688: 681b ldr r3, [r3, #0] - 800168a: f003 0302 and.w r3, r3, #2 - 800168e: 2b00 cmp r3, #0 - 8001690: d063 beq.n 800175a + 800167a: 687b ldr r3, [r7, #4] + 800167c: 681b ldr r3, [r3, #0] + 800167e: f003 0302 and.w r3, r3, #2 + 8001682: 2b00 cmp r3, #0 + 8001684: d063 beq.n 800174e /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ - 8001692: 4b65 ldr r3, [pc, #404] ; (8001828 ) + 8001686: 4b65 ldr r3, [pc, #404] ; (800181c ) + 8001688: 689b ldr r3, [r3, #8] + 800168a: f003 030c and.w r3, r3, #12 + 800168e: 2b00 cmp r3, #0 + 8001690: d00b beq.n 80016aa + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) + 8001692: 4b62 ldr r3, [pc, #392] ; (800181c ) 8001694: 689b ldr r3, [r3, #8] 8001696: f003 030c and.w r3, r3, #12 - 800169a: 2b00 cmp r3, #0 - 800169c: d00b beq.n 80016b6 - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 800169e: 4b62 ldr r3, [pc, #392] ; (8001828 ) - 80016a0: 689b ldr r3, [r3, #8] - 80016a2: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ - 80016a6: 2b08 cmp r3, #8 - 80016a8: d11c bne.n 80016e4 + 800169a: 2b08 cmp r3, #8 + 800169c: d11c bne.n 80016d8 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) - 80016aa: 4b5f ldr r3, [pc, #380] ; (8001828 ) - 80016ac: 685b ldr r3, [r3, #4] - 80016ae: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80016b2: 2b00 cmp r3, #0 - 80016b4: d116 bne.n 80016e4 + 800169e: 4b5f ldr r3, [pc, #380] ; (800181c ) + 80016a0: 685b ldr r3, [r3, #4] + 80016a2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 80016a6: 2b00 cmp r3, #0 + 80016a8: d116 bne.n 80016d8 { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80016b6: 4b5c ldr r3, [pc, #368] ; (8001828 ) - 80016b8: 681b ldr r3, [r3, #0] - 80016ba: f003 0302 and.w r3, r3, #2 - 80016be: 2b00 cmp r3, #0 - 80016c0: d005 beq.n 80016ce - 80016c2: 687b ldr r3, [r7, #4] - 80016c4: 68db ldr r3, [r3, #12] - 80016c6: 2b01 cmp r3, #1 - 80016c8: d001 beq.n 80016ce + 80016aa: 4b5c ldr r3, [pc, #368] ; (800181c ) + 80016ac: 681b ldr r3, [r3, #0] + 80016ae: f003 0302 and.w r3, r3, #2 + 80016b2: 2b00 cmp r3, #0 + 80016b4: d005 beq.n 80016c2 + 80016b6: 687b ldr r3, [r7, #4] + 80016b8: 68db ldr r3, [r3, #12] + 80016ba: 2b01 cmp r3, #1 + 80016bc: d001 beq.n 80016c2 { return HAL_ERROR; - 80016ca: 2301 movs r3, #1 - 80016cc: e1c4 b.n 8001a58 + 80016be: 2301 movs r3, #1 + 80016c0: e1c4 b.n 8001a4c } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80016ce: 4b56 ldr r3, [pc, #344] ; (8001828 ) - 80016d0: 681b ldr r3, [r3, #0] - 80016d2: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 80016d6: 687b ldr r3, [r7, #4] - 80016d8: 691b ldr r3, [r3, #16] - 80016da: 00db lsls r3, r3, #3 - 80016dc: 4952 ldr r1, [pc, #328] ; (8001828 ) - 80016de: 4313 orrs r3, r2 - 80016e0: 600b str r3, [r1, #0] + 80016c2: 4b56 ldr r3, [pc, #344] ; (800181c ) + 80016c4: 681b ldr r3, [r3, #0] + 80016c6: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 80016ca: 687b ldr r3, [r7, #4] + 80016cc: 691b ldr r3, [r3, #16] + 80016ce: 00db lsls r3, r3, #3 + 80016d0: 4952 ldr r1, [pc, #328] ; (800181c ) + 80016d2: 4313 orrs r3, r2 + 80016d4: 600b str r3, [r1, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80016e2: e03a b.n 800175a + 80016d6: e03a b.n 800174e } } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) - 80016e4: 687b ldr r3, [r7, #4] - 80016e6: 68db ldr r3, [r3, #12] - 80016e8: 2b00 cmp r3, #0 - 80016ea: d020 beq.n 800172e + 80016d8: 687b ldr r3, [r7, #4] + 80016da: 68db ldr r3, [r3, #12] + 80016dc: 2b00 cmp r3, #0 + 80016de: d020 beq.n 8001722 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 80016ec: 4b4f ldr r3, [pc, #316] ; (800182c ) - 80016ee: 2201 movs r2, #1 - 80016f0: 601a str r2, [r3, #0] + 80016e0: 4b4f ldr r3, [pc, #316] ; (8001820 ) + 80016e2: 2201 movs r2, #1 + 80016e4: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80016f2: f7ff fc8f bl 8001014 - 80016f6: 6138 str r0, [r7, #16] + 80016e6: f7ff fc8f bl 8001008 + 80016ea: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80016f8: e008 b.n 800170c + 80016ec: e008 b.n 8001700 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80016fa: f7ff fc8b bl 8001014 - 80016fe: 4602 mov r2, r0 - 8001700: 693b ldr r3, [r7, #16] - 8001702: 1ad3 subs r3, r2, r3 - 8001704: 2b02 cmp r3, #2 - 8001706: d901 bls.n 800170c + 80016ee: f7ff fc8b bl 8001008 + 80016f2: 4602 mov r2, r0 + 80016f4: 693b ldr r3, [r7, #16] + 80016f6: 1ad3 subs r3, r2, r3 + 80016f8: 2b02 cmp r3, #2 + 80016fa: d901 bls.n 8001700 { return HAL_TIMEOUT; - 8001708: 2303 movs r3, #3 - 800170a: e1a5 b.n 8001a58 + 80016fc: 2303 movs r3, #3 + 80016fe: e1a5 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800170c: 4b46 ldr r3, [pc, #280] ; (8001828 ) - 800170e: 681b ldr r3, [r3, #0] - 8001710: f003 0302 and.w r3, r3, #2 - 8001714: 2b00 cmp r3, #0 - 8001716: d0f0 beq.n 80016fa + 8001700: 4b46 ldr r3, [pc, #280] ; (800181c ) + 8001702: 681b ldr r3, [r3, #0] + 8001704: f003 0302 and.w r3, r3, #2 + 8001708: 2b00 cmp r3, #0 + 800170a: d0f0 beq.n 80016ee } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8001718: 4b43 ldr r3, [pc, #268] ; (8001828 ) - 800171a: 681b ldr r3, [r3, #0] - 800171c: f023 02f8 bic.w r2, r3, #248 ; 0xf8 - 8001720: 687b ldr r3, [r7, #4] - 8001722: 691b ldr r3, [r3, #16] - 8001724: 00db lsls r3, r3, #3 - 8001726: 4940 ldr r1, [pc, #256] ; (8001828 ) - 8001728: 4313 orrs r3, r2 - 800172a: 600b str r3, [r1, #0] - 800172c: e015 b.n 800175a + 800170c: 4b43 ldr r3, [pc, #268] ; (800181c ) + 800170e: 681b ldr r3, [r3, #0] + 8001710: f023 02f8 bic.w r2, r3, #248 ; 0xf8 + 8001714: 687b ldr r3, [r7, #4] + 8001716: 691b ldr r3, [r3, #16] + 8001718: 00db lsls r3, r3, #3 + 800171a: 4940 ldr r1, [pc, #256] ; (800181c ) + 800171c: 4313 orrs r3, r2 + 800171e: 600b str r3, [r1, #0] + 8001720: e015 b.n 800174e } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 800172e: 4b3f ldr r3, [pc, #252] ; (800182c ) - 8001730: 2200 movs r2, #0 - 8001732: 601a str r2, [r3, #0] + 8001722: 4b3f ldr r3, [pc, #252] ; (8001820 ) + 8001724: 2200 movs r2, #0 + 8001726: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8001734: f7ff fc6e bl 8001014 - 8001738: 6138 str r0, [r7, #16] + 8001728: f7ff fc6e bl 8001008 + 800172c: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 800173a: e008 b.n 800174e + 800172e: e008 b.n 8001742 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800173c: f7ff fc6a bl 8001014 - 8001740: 4602 mov r2, r0 - 8001742: 693b ldr r3, [r7, #16] - 8001744: 1ad3 subs r3, r2, r3 - 8001746: 2b02 cmp r3, #2 - 8001748: d901 bls.n 800174e + 8001730: f7ff fc6a bl 8001008 + 8001734: 4602 mov r2, r0 + 8001736: 693b ldr r3, [r7, #16] + 8001738: 1ad3 subs r3, r2, r3 + 800173a: 2b02 cmp r3, #2 + 800173c: d901 bls.n 8001742 { return HAL_TIMEOUT; - 800174a: 2303 movs r3, #3 - 800174c: e184 b.n 8001a58 + 800173e: 2303 movs r3, #3 + 8001740: e184 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 800174e: 4b36 ldr r3, [pc, #216] ; (8001828 ) - 8001750: 681b ldr r3, [r3, #0] - 8001752: f003 0302 and.w r3, r3, #2 - 8001756: 2b00 cmp r3, #0 - 8001758: d1f0 bne.n 800173c + 8001742: 4b36 ldr r3, [pc, #216] ; (800181c ) + 8001744: 681b ldr r3, [r3, #0] + 8001746: f003 0302 and.w r3, r3, #2 + 800174a: 2b00 cmp r3, #0 + 800174c: d1f0 bne.n 8001730 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 800175a: 687b ldr r3, [r7, #4] - 800175c: 681b ldr r3, [r3, #0] - 800175e: f003 0308 and.w r3, r3, #8 - 8001762: 2b00 cmp r3, #0 - 8001764: d030 beq.n 80017c8 + 800174e: 687b ldr r3, [r7, #4] + 8001750: 681b ldr r3, [r3, #0] + 8001752: f003 0308 and.w r3, r3, #8 + 8001756: 2b00 cmp r3, #0 + 8001758: d030 beq.n 80017bc { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) - 8001766: 687b ldr r3, [r7, #4] - 8001768: 695b ldr r3, [r3, #20] - 800176a: 2b00 cmp r3, #0 - 800176c: d016 beq.n 800179c + 800175a: 687b ldr r3, [r7, #4] + 800175c: 695b ldr r3, [r3, #20] + 800175e: 2b00 cmp r3, #0 + 8001760: d016 beq.n 8001790 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 800176e: 4b30 ldr r3, [pc, #192] ; (8001830 ) - 8001770: 2201 movs r2, #1 - 8001772: 601a str r2, [r3, #0] + 8001762: 4b30 ldr r3, [pc, #192] ; (8001824 ) + 8001764: 2201 movs r2, #1 + 8001766: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8001774: f7ff fc4e bl 8001014 - 8001778: 6138 str r0, [r7, #16] + 8001768: f7ff fc4e bl 8001008 + 800176c: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800177a: e008 b.n 800178e + 800176e: e008 b.n 8001782 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 800177c: f7ff fc4a bl 8001014 - 8001780: 4602 mov r2, r0 - 8001782: 693b ldr r3, [r7, #16] - 8001784: 1ad3 subs r3, r2, r3 - 8001786: 2b02 cmp r3, #2 - 8001788: d901 bls.n 800178e + 8001770: f7ff fc4a bl 8001008 + 8001774: 4602 mov r2, r0 + 8001776: 693b ldr r3, [r7, #16] + 8001778: 1ad3 subs r3, r2, r3 + 800177a: 2b02 cmp r3, #2 + 800177c: d901 bls.n 8001782 { return HAL_TIMEOUT; - 800178a: 2303 movs r3, #3 - 800178c: e164 b.n 8001a58 + 800177e: 2303 movs r3, #3 + 8001780: e164 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800178e: 4b26 ldr r3, [pc, #152] ; (8001828 ) - 8001790: 6f5b ldr r3, [r3, #116] ; 0x74 - 8001792: f003 0302 and.w r3, r3, #2 - 8001796: 2b00 cmp r3, #0 - 8001798: d0f0 beq.n 800177c - 800179a: e015 b.n 80017c8 + 8001782: 4b26 ldr r3, [pc, #152] ; (800181c ) + 8001784: 6f5b ldr r3, [r3, #116] ; 0x74 + 8001786: f003 0302 and.w r3, r3, #2 + 800178a: 2b00 cmp r3, #0 + 800178c: d0f0 beq.n 8001770 + 800178e: e015 b.n 80017bc } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 800179c: 4b24 ldr r3, [pc, #144] ; (8001830 ) - 800179e: 2200 movs r2, #0 - 80017a0: 601a str r2, [r3, #0] + 8001790: 4b24 ldr r3, [pc, #144] ; (8001824 ) + 8001792: 2200 movs r2, #0 + 8001794: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80017a2: f7ff fc37 bl 8001014 - 80017a6: 6138 str r0, [r7, #16] + 8001796: f7ff fc37 bl 8001008 + 800179a: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80017a8: e008 b.n 80017bc + 800179c: e008 b.n 80017b0 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80017aa: f7ff fc33 bl 8001014 - 80017ae: 4602 mov r2, r0 - 80017b0: 693b ldr r3, [r7, #16] - 80017b2: 1ad3 subs r3, r2, r3 - 80017b4: 2b02 cmp r3, #2 - 80017b6: d901 bls.n 80017bc + 800179e: f7ff fc33 bl 8001008 + 80017a2: 4602 mov r2, r0 + 80017a4: 693b ldr r3, [r7, #16] + 80017a6: 1ad3 subs r3, r2, r3 + 80017a8: 2b02 cmp r3, #2 + 80017aa: d901 bls.n 80017b0 { return HAL_TIMEOUT; - 80017b8: 2303 movs r3, #3 - 80017ba: e14d b.n 8001a58 + 80017ac: 2303 movs r3, #3 + 80017ae: e14d b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80017bc: 4b1a ldr r3, [pc, #104] ; (8001828 ) - 80017be: 6f5b ldr r3, [r3, #116] ; 0x74 - 80017c0: f003 0302 and.w r3, r3, #2 - 80017c4: 2b00 cmp r3, #0 - 80017c6: d1f0 bne.n 80017aa + 80017b0: 4b1a ldr r3, [pc, #104] ; (800181c ) + 80017b2: 6f5b ldr r3, [r3, #116] ; 0x74 + 80017b4: f003 0302 and.w r3, r3, #2 + 80017b8: 2b00 cmp r3, #0 + 80017ba: d1f0 bne.n 800179e } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 80017c8: 687b ldr r3, [r7, #4] - 80017ca: 681b ldr r3, [r3, #0] - 80017cc: f003 0304 and.w r3, r3, #4 - 80017d0: 2b00 cmp r3, #0 - 80017d2: f000 80a0 beq.w 8001916 + 80017bc: 687b ldr r3, [r7, #4] + 80017be: 681b ldr r3, [r3, #0] + 80017c0: f003 0304 and.w r3, r3, #4 + 80017c4: 2b00 cmp r3, #0 + 80017c6: f000 80a0 beq.w 800190a { FlagStatus pwrclkchanged = RESET; - 80017d6: 2300 movs r3, #0 - 80017d8: 75fb strb r3, [r7, #23] + 80017ca: 2300 movs r3, #0 + 80017cc: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 80017da: 4b13 ldr r3, [pc, #76] ; (8001828 ) - 80017dc: 6c1b ldr r3, [r3, #64] ; 0x40 - 80017de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80017e2: 2b00 cmp r3, #0 - 80017e4: d10f bne.n 8001806 + 80017ce: 4b13 ldr r3, [pc, #76] ; (800181c ) + 80017d0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80017d2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80017d6: 2b00 cmp r3, #0 + 80017d8: d10f bne.n 80017fa { __HAL_RCC_PWR_CLK_ENABLE(); - 80017e6: 2300 movs r3, #0 - 80017e8: 60bb str r3, [r7, #8] - 80017ea: 4b0f ldr r3, [pc, #60] ; (8001828 ) + 80017da: 2300 movs r3, #0 + 80017dc: 60bb str r3, [r7, #8] + 80017de: 4b0f ldr r3, [pc, #60] ; (800181c ) + 80017e0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80017e2: 4a0e ldr r2, [pc, #56] ; (800181c ) + 80017e4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 80017e8: 6413 str r3, [r2, #64] ; 0x40 + 80017ea: 4b0c ldr r3, [pc, #48] ; (800181c ) 80017ec: 6c1b ldr r3, [r3, #64] ; 0x40 - 80017ee: 4a0e ldr r2, [pc, #56] ; (8001828 ) - 80017f0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 80017f4: 6413 str r3, [r2, #64] ; 0x40 - 80017f6: 4b0c ldr r3, [pc, #48] ; (8001828 ) - 80017f8: 6c1b ldr r3, [r3, #64] ; 0x40 - 80017fa: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 80017fe: 60bb str r3, [r7, #8] - 8001800: 68bb ldr r3, [r7, #8] + 80017ee: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80017f2: 60bb str r3, [r7, #8] + 80017f4: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8001802: 2301 movs r3, #1 - 8001804: 75fb strb r3, [r7, #23] + 80017f6: 2301 movs r3, #1 + 80017f8: 75fb strb r3, [r7, #23] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001806: 4b0b ldr r3, [pc, #44] ; (8001834 ) - 8001808: 681b ldr r3, [r3, #0] - 800180a: f403 7380 and.w r3, r3, #256 ; 0x100 - 800180e: 2b00 cmp r3, #0 - 8001810: d121 bne.n 8001856 + 80017fa: 4b0b ldr r3, [pc, #44] ; (8001828 ) + 80017fc: 681b ldr r3, [r3, #0] + 80017fe: f403 7380 and.w r3, r3, #256 ; 0x100 + 8001802: 2b00 cmp r3, #0 + 8001804: d121 bne.n 800184a { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8001812: 4b08 ldr r3, [pc, #32] ; (8001834 ) - 8001814: 681b ldr r3, [r3, #0] - 8001816: 4a07 ldr r2, [pc, #28] ; (8001834 ) - 8001818: f443 7380 orr.w r3, r3, #256 ; 0x100 - 800181c: 6013 str r3, [r2, #0] + 8001806: 4b08 ldr r3, [pc, #32] ; (8001828 ) + 8001808: 681b ldr r3, [r3, #0] + 800180a: 4a07 ldr r2, [pc, #28] ; (8001828 ) + 800180c: f443 7380 orr.w r3, r3, #256 ; 0x100 + 8001810: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800181e: f7ff fbf9 bl 8001014 - 8001822: 6138 str r0, [r7, #16] + 8001812: f7ff fbf9 bl 8001008 + 8001816: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001824: e011 b.n 800184a - 8001826: bf00 nop - 8001828: 40023800 .word 0x40023800 - 800182c: 42470000 .word 0x42470000 - 8001830: 42470e80 .word 0x42470e80 - 8001834: 40007000 .word 0x40007000 + 8001818: e011 b.n 800183e + 800181a: bf00 nop + 800181c: 40023800 .word 0x40023800 + 8001820: 42470000 .word 0x42470000 + 8001824: 42470e80 .word 0x42470e80 + 8001828: 40007000 .word 0x40007000 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8001838: f7ff fbec bl 8001014 - 800183c: 4602 mov r2, r0 - 800183e: 693b ldr r3, [r7, #16] - 8001840: 1ad3 subs r3, r2, r3 - 8001842: 2b02 cmp r3, #2 - 8001844: d901 bls.n 800184a + 800182c: f7ff fbec bl 8001008 + 8001830: 4602 mov r2, r0 + 8001832: 693b ldr r3, [r7, #16] + 8001834: 1ad3 subs r3, r2, r3 + 8001836: 2b02 cmp r3, #2 + 8001838: d901 bls.n 800183e { return HAL_TIMEOUT; - 8001846: 2303 movs r3, #3 - 8001848: e106 b.n 8001a58 + 800183a: 2303 movs r3, #3 + 800183c: e106 b.n 8001a4c while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800184a: 4b85 ldr r3, [pc, #532] ; (8001a60 ) - 800184c: 681b ldr r3, [r3, #0] - 800184e: f403 7380 and.w r3, r3, #256 ; 0x100 - 8001852: 2b00 cmp r3, #0 - 8001854: d0f0 beq.n 8001838 + 800183e: 4b85 ldr r3, [pc, #532] ; (8001a54 ) + 8001840: 681b ldr r3, [r3, #0] + 8001842: f403 7380 and.w r3, r3, #256 ; 0x100 + 8001846: 2b00 cmp r3, #0 + 8001848: d0f0 beq.n 800182c } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8001856: 687b ldr r3, [r7, #4] - 8001858: 689b ldr r3, [r3, #8] - 800185a: 2b01 cmp r3, #1 - 800185c: d106 bne.n 800186c - 800185e: 4b81 ldr r3, [pc, #516] ; (8001a64 ) - 8001860: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001862: 4a80 ldr r2, [pc, #512] ; (8001a64 ) - 8001864: f043 0301 orr.w r3, r3, #1 - 8001868: 6713 str r3, [r2, #112] ; 0x70 - 800186a: e01c b.n 80018a6 - 800186c: 687b ldr r3, [r7, #4] - 800186e: 689b ldr r3, [r3, #8] - 8001870: 2b05 cmp r3, #5 - 8001872: d10c bne.n 800188e - 8001874: 4b7b ldr r3, [pc, #492] ; (8001a64 ) + 800184a: 687b ldr r3, [r7, #4] + 800184c: 689b ldr r3, [r3, #8] + 800184e: 2b01 cmp r3, #1 + 8001850: d106 bne.n 8001860 + 8001852: 4b81 ldr r3, [pc, #516] ; (8001a58 ) + 8001854: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001856: 4a80 ldr r2, [pc, #512] ; (8001a58 ) + 8001858: f043 0301 orr.w r3, r3, #1 + 800185c: 6713 str r3, [r2, #112] ; 0x70 + 800185e: e01c b.n 800189a + 8001860: 687b ldr r3, [r7, #4] + 8001862: 689b ldr r3, [r3, #8] + 8001864: 2b05 cmp r3, #5 + 8001866: d10c bne.n 8001882 + 8001868: 4b7b ldr r3, [pc, #492] ; (8001a58 ) + 800186a: 6f1b ldr r3, [r3, #112] ; 0x70 + 800186c: 4a7a ldr r2, [pc, #488] ; (8001a58 ) + 800186e: f043 0304 orr.w r3, r3, #4 + 8001872: 6713 str r3, [r2, #112] ; 0x70 + 8001874: 4b78 ldr r3, [pc, #480] ; (8001a58 ) 8001876: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001878: 4a7a ldr r2, [pc, #488] ; (8001a64 ) - 800187a: f043 0304 orr.w r3, r3, #4 + 8001878: 4a77 ldr r2, [pc, #476] ; (8001a58 ) + 800187a: f043 0301 orr.w r3, r3, #1 800187e: 6713 str r3, [r2, #112] ; 0x70 - 8001880: 4b78 ldr r3, [pc, #480] ; (8001a64 ) - 8001882: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001884: 4a77 ldr r2, [pc, #476] ; (8001a64 ) - 8001886: f043 0301 orr.w r3, r3, #1 - 800188a: 6713 str r3, [r2, #112] ; 0x70 - 800188c: e00b b.n 80018a6 - 800188e: 4b75 ldr r3, [pc, #468] ; (8001a64 ) + 8001880: e00b b.n 800189a + 8001882: 4b75 ldr r3, [pc, #468] ; (8001a58 ) + 8001884: 6f1b ldr r3, [r3, #112] ; 0x70 + 8001886: 4a74 ldr r2, [pc, #464] ; (8001a58 ) + 8001888: f023 0301 bic.w r3, r3, #1 + 800188c: 6713 str r3, [r2, #112] ; 0x70 + 800188e: 4b72 ldr r3, [pc, #456] ; (8001a58 ) 8001890: 6f1b ldr r3, [r3, #112] ; 0x70 - 8001892: 4a74 ldr r2, [pc, #464] ; (8001a64 ) - 8001894: f023 0301 bic.w r3, r3, #1 + 8001892: 4a71 ldr r2, [pc, #452] ; (8001a58 ) + 8001894: f023 0304 bic.w r3, r3, #4 8001898: 6713 str r3, [r2, #112] ; 0x70 - 800189a: 4b72 ldr r3, [pc, #456] ; (8001a64 ) - 800189c: 6f1b ldr r3, [r3, #112] ; 0x70 - 800189e: 4a71 ldr r2, [pc, #452] ; (8001a64 ) - 80018a0: f023 0304 bic.w r3, r3, #4 - 80018a4: 6713 str r3, [r2, #112] ; 0x70 /* Check the LSE State */ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 80018a6: 687b ldr r3, [r7, #4] - 80018a8: 689b ldr r3, [r3, #8] - 80018aa: 2b00 cmp r3, #0 - 80018ac: d015 beq.n 80018da + 800189a: 687b ldr r3, [r7, #4] + 800189c: 689b ldr r3, [r3, #8] + 800189e: 2b00 cmp r3, #0 + 80018a0: d015 beq.n 80018ce { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 80018ae: f7ff fbb1 bl 8001014 - 80018b2: 6138 str r0, [r7, #16] + 80018a2: f7ff fbb1 bl 8001008 + 80018a6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80018b4: e00a b.n 80018cc + 80018a8: e00a b.n 80018c0 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 80018b6: f7ff fbad bl 8001014 - 80018ba: 4602 mov r2, r0 - 80018bc: 693b ldr r3, [r7, #16] - 80018be: 1ad3 subs r3, r2, r3 - 80018c0: f241 3288 movw r2, #5000 ; 0x1388 - 80018c4: 4293 cmp r3, r2 - 80018c6: d901 bls.n 80018cc + 80018aa: f7ff fbad bl 8001008 + 80018ae: 4602 mov r2, r0 + 80018b0: 693b ldr r3, [r7, #16] + 80018b2: 1ad3 subs r3, r2, r3 + 80018b4: f241 3288 movw r2, #5000 ; 0x1388 + 80018b8: 4293 cmp r3, r2 + 80018ba: d901 bls.n 80018c0 { return HAL_TIMEOUT; - 80018c8: 2303 movs r3, #3 - 80018ca: e0c5 b.n 8001a58 + 80018bc: 2303 movs r3, #3 + 80018be: e0c5 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80018cc: 4b65 ldr r3, [pc, #404] ; (8001a64 ) - 80018ce: 6f1b ldr r3, [r3, #112] ; 0x70 - 80018d0: f003 0302 and.w r3, r3, #2 - 80018d4: 2b00 cmp r3, #0 - 80018d6: d0ee beq.n 80018b6 - 80018d8: e014 b.n 8001904 + 80018c0: 4b65 ldr r3, [pc, #404] ; (8001a58 ) + 80018c2: 6f1b ldr r3, [r3, #112] ; 0x70 + 80018c4: f003 0302 and.w r3, r3, #2 + 80018c8: 2b00 cmp r3, #0 + 80018ca: d0ee beq.n 80018aa + 80018cc: e014 b.n 80018f8 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80018da: f7ff fb9b bl 8001014 - 80018de: 6138 str r0, [r7, #16] + 80018ce: f7ff fb9b bl 8001008 + 80018d2: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80018e0: e00a b.n 80018f8 + 80018d4: e00a b.n 80018ec { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 80018e2: f7ff fb97 bl 8001014 - 80018e6: 4602 mov r2, r0 - 80018e8: 693b ldr r3, [r7, #16] - 80018ea: 1ad3 subs r3, r2, r3 - 80018ec: f241 3288 movw r2, #5000 ; 0x1388 - 80018f0: 4293 cmp r3, r2 - 80018f2: d901 bls.n 80018f8 + 80018d6: f7ff fb97 bl 8001008 + 80018da: 4602 mov r2, r0 + 80018dc: 693b ldr r3, [r7, #16] + 80018de: 1ad3 subs r3, r2, r3 + 80018e0: f241 3288 movw r2, #5000 ; 0x1388 + 80018e4: 4293 cmp r3, r2 + 80018e6: d901 bls.n 80018ec { return HAL_TIMEOUT; - 80018f4: 2303 movs r3, #3 - 80018f6: e0af b.n 8001a58 + 80018e8: 2303 movs r3, #3 + 80018ea: e0af b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80018f8: 4b5a ldr r3, [pc, #360] ; (8001a64 ) - 80018fa: 6f1b ldr r3, [r3, #112] ; 0x70 - 80018fc: f003 0302 and.w r3, r3, #2 - 8001900: 2b00 cmp r3, #0 - 8001902: d1ee bne.n 80018e2 + 80018ec: 4b5a ldr r3, [pc, #360] ; (8001a58 ) + 80018ee: 6f1b ldr r3, [r3, #112] ; 0x70 + 80018f0: f003 0302 and.w r3, r3, #2 + 80018f4: 2b00 cmp r3, #0 + 80018f6: d1ee bne.n 80018d6 } } } /* Restore clock configuration if changed */ if(pwrclkchanged == SET) - 8001904: 7dfb ldrb r3, [r7, #23] - 8001906: 2b01 cmp r3, #1 - 8001908: d105 bne.n 8001916 + 80018f8: 7dfb ldrb r3, [r7, #23] + 80018fa: 2b01 cmp r3, #1 + 80018fc: d105 bne.n 800190a { __HAL_RCC_PWR_CLK_DISABLE(); - 800190a: 4b56 ldr r3, [pc, #344] ; (8001a64 ) - 800190c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800190e: 4a55 ldr r2, [pc, #340] ; (8001a64 ) - 8001910: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8001914: 6413 str r3, [r2, #64] ; 0x40 + 80018fe: 4b56 ldr r3, [pc, #344] ; (8001a58 ) + 8001900: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001902: 4a55 ldr r2, [pc, #340] ; (8001a58 ) + 8001904: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8001908: 6413 str r3, [r2, #64] ; 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8001916: 687b ldr r3, [r7, #4] - 8001918: 699b ldr r3, [r3, #24] - 800191a: 2b00 cmp r3, #0 - 800191c: f000 809b beq.w 8001a56 + 800190a: 687b ldr r3, [r7, #4] + 800190c: 699b ldr r3, [r3, #24] + 800190e: 2b00 cmp r3, #0 + 8001910: f000 809b beq.w 8001a4a { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - 8001920: 4b50 ldr r3, [pc, #320] ; (8001a64 ) - 8001922: 689b ldr r3, [r3, #8] - 8001924: f003 030c and.w r3, r3, #12 - 8001928: 2b08 cmp r3, #8 - 800192a: d05c beq.n 80019e6 + 8001914: 4b50 ldr r3, [pc, #320] ; (8001a58 ) + 8001916: 689b ldr r3, [r3, #8] + 8001918: f003 030c and.w r3, r3, #12 + 800191c: 2b08 cmp r3, #8 + 800191e: d05c beq.n 80019da { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 800192c: 687b ldr r3, [r7, #4] - 800192e: 699b ldr r3, [r3, #24] - 8001930: 2b02 cmp r3, #2 - 8001932: d141 bne.n 80019b8 + 8001920: 687b ldr r3, [r7, #4] + 8001922: 699b ldr r3, [r3, #24] + 8001924: 2b02 cmp r3, #2 + 8001926: d141 bne.n 80019ac assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8001934: 4b4c ldr r3, [pc, #304] ; (8001a68 ) - 8001936: 2200 movs r2, #0 - 8001938: 601a str r2, [r3, #0] + 8001928: 4b4c ldr r3, [pc, #304] ; (8001a5c ) + 800192a: 2200 movs r2, #0 + 800192c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800193a: f7ff fb6b bl 8001014 - 800193e: 6138 str r0, [r7, #16] + 800192e: f7ff fb6b bl 8001008 + 8001932: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001940: e008 b.n 8001954 + 8001934: e008 b.n 8001948 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001942: f7ff fb67 bl 8001014 - 8001946: 4602 mov r2, r0 - 8001948: 693b ldr r3, [r7, #16] - 800194a: 1ad3 subs r3, r2, r3 - 800194c: 2b02 cmp r3, #2 - 800194e: d901 bls.n 8001954 + 8001936: f7ff fb67 bl 8001008 + 800193a: 4602 mov r2, r0 + 800193c: 693b ldr r3, [r7, #16] + 800193e: 1ad3 subs r3, r2, r3 + 8001940: 2b02 cmp r3, #2 + 8001942: d901 bls.n 8001948 { return HAL_TIMEOUT; - 8001950: 2303 movs r3, #3 - 8001952: e081 b.n 8001a58 + 8001944: 2303 movs r3, #3 + 8001946: e081 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001954: 4b43 ldr r3, [pc, #268] ; (8001a64 ) - 8001956: 681b ldr r3, [r3, #0] - 8001958: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 800195c: 2b00 cmp r3, #0 - 800195e: d1f0 bne.n 8001942 + 8001948: 4b43 ldr r3, [pc, #268] ; (8001a58 ) + 800194a: 681b ldr r3, [r3, #0] + 800194c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8001950: 2b00 cmp r3, #0 + 8001952: d1f0 bne.n 8001936 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ - 8001960: 687b ldr r3, [r7, #4] - 8001962: 69da ldr r2, [r3, #28] - 8001964: 687b ldr r3, [r7, #4] - 8001966: 6a1b ldr r3, [r3, #32] - 8001968: 431a orrs r2, r3 - 800196a: 687b ldr r3, [r7, #4] - 800196c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800196e: 019b lsls r3, r3, #6 + 8001954: 687b ldr r3, [r7, #4] + 8001956: 69da ldr r2, [r3, #28] + 8001958: 687b ldr r3, [r7, #4] + 800195a: 6a1b ldr r3, [r3, #32] + 800195c: 431a orrs r2, r3 + 800195e: 687b ldr r3, [r7, #4] + 8001960: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001962: 019b lsls r3, r3, #6 + 8001964: 431a orrs r2, r3 + 8001966: 687b ldr r3, [r7, #4] + 8001968: 6a9b ldr r3, [r3, #40] ; 0x28 + 800196a: 085b lsrs r3, r3, #1 + 800196c: 3b01 subs r3, #1 + 800196e: 041b lsls r3, r3, #16 8001970: 431a orrs r2, r3 8001972: 687b ldr r3, [r7, #4] - 8001974: 6a9b ldr r3, [r3, #40] ; 0x28 - 8001976: 085b lsrs r3, r3, #1 - 8001978: 3b01 subs r3, #1 - 800197a: 041b lsls r3, r3, #16 - 800197c: 431a orrs r2, r3 - 800197e: 687b ldr r3, [r7, #4] - 8001980: 6adb ldr r3, [r3, #44] ; 0x2c - 8001982: 061b lsls r3, r3, #24 - 8001984: 4937 ldr r1, [pc, #220] ; (8001a64 ) - 8001986: 4313 orrs r3, r2 - 8001988: 604b str r3, [r1, #4] + 8001974: 6adb ldr r3, [r3, #44] ; 0x2c + 8001976: 061b lsls r3, r3, #24 + 8001978: 4937 ldr r1, [pc, #220] ; (8001a58 ) + 800197a: 4313 orrs r3, r2 + 800197c: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLM | \ (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 800198a: 4b37 ldr r3, [pc, #220] ; (8001a68 ) - 800198c: 2201 movs r2, #1 - 800198e: 601a str r2, [r3, #0] + 800197e: 4b37 ldr r3, [pc, #220] ; (8001a5c ) + 8001980: 2201 movs r2, #1 + 8001982: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001990: f7ff fb40 bl 8001014 - 8001994: 6138 str r0, [r7, #16] + 8001984: f7ff fb40 bl 8001008 + 8001988: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001996: e008 b.n 80019aa + 800198a: e008 b.n 800199e { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001998: f7ff fb3c bl 8001014 - 800199c: 4602 mov r2, r0 - 800199e: 693b ldr r3, [r7, #16] - 80019a0: 1ad3 subs r3, r2, r3 - 80019a2: 2b02 cmp r3, #2 - 80019a4: d901 bls.n 80019aa + 800198c: f7ff fb3c bl 8001008 + 8001990: 4602 mov r2, r0 + 8001992: 693b ldr r3, [r7, #16] + 8001994: 1ad3 subs r3, r2, r3 + 8001996: 2b02 cmp r3, #2 + 8001998: d901 bls.n 800199e { return HAL_TIMEOUT; - 80019a6: 2303 movs r3, #3 - 80019a8: e056 b.n 8001a58 + 800199a: 2303 movs r3, #3 + 800199c: e056 b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80019aa: 4b2e ldr r3, [pc, #184] ; (8001a64 ) - 80019ac: 681b ldr r3, [r3, #0] - 80019ae: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80019b2: 2b00 cmp r3, #0 - 80019b4: d0f0 beq.n 8001998 - 80019b6: e04e b.n 8001a56 + 800199e: 4b2e ldr r3, [pc, #184] ; (8001a58 ) + 80019a0: 681b ldr r3, [r3, #0] + 80019a2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80019a6: 2b00 cmp r3, #0 + 80019a8: d0f0 beq.n 800198c + 80019aa: e04e b.n 8001a4a } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80019b8: 4b2b ldr r3, [pc, #172] ; (8001a68 ) - 80019ba: 2200 movs r2, #0 - 80019bc: 601a str r2, [r3, #0] + 80019ac: 4b2b ldr r3, [pc, #172] ; (8001a5c ) + 80019ae: 2200 movs r2, #0 + 80019b0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80019be: f7ff fb29 bl 8001014 - 80019c2: 6138 str r0, [r7, #16] + 80019b2: f7ff fb29 bl 8001008 + 80019b6: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80019c4: e008 b.n 80019d8 + 80019b8: e008 b.n 80019cc { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80019c6: f7ff fb25 bl 8001014 - 80019ca: 4602 mov r2, r0 - 80019cc: 693b ldr r3, [r7, #16] - 80019ce: 1ad3 subs r3, r2, r3 - 80019d0: 2b02 cmp r3, #2 - 80019d2: d901 bls.n 80019d8 + 80019ba: f7ff fb25 bl 8001008 + 80019be: 4602 mov r2, r0 + 80019c0: 693b ldr r3, [r7, #16] + 80019c2: 1ad3 subs r3, r2, r3 + 80019c4: 2b02 cmp r3, #2 + 80019c6: d901 bls.n 80019cc { return HAL_TIMEOUT; - 80019d4: 2303 movs r3, #3 - 80019d6: e03f b.n 8001a58 + 80019c8: 2303 movs r3, #3 + 80019ca: e03f b.n 8001a4c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80019d8: 4b22 ldr r3, [pc, #136] ; (8001a64 ) - 80019da: 681b ldr r3, [r3, #0] - 80019dc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80019e0: 2b00 cmp r3, #0 - 80019e2: d1f0 bne.n 80019c6 - 80019e4: e037 b.n 8001a56 + 80019cc: 4b22 ldr r3, [pc, #136] ; (8001a58 ) + 80019ce: 681b ldr r3, [r3, #0] + 80019d0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80019d4: 2b00 cmp r3, #0 + 80019d6: d1f0 bne.n 80019ba + 80019d8: e037 b.n 8001a4a } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80019e6: 687b ldr r3, [r7, #4] - 80019e8: 699b ldr r3, [r3, #24] - 80019ea: 2b01 cmp r3, #1 - 80019ec: d101 bne.n 80019f2 + 80019da: 687b ldr r3, [r7, #4] + 80019dc: 699b ldr r3, [r3, #24] + 80019de: 2b01 cmp r3, #1 + 80019e0: d101 bne.n 80019e6 { return HAL_ERROR; - 80019ee: 2301 movs r3, #1 - 80019f0: e032 b.n 8001a58 + 80019e2: 2301 movs r3, #1 + 80019e4: e032 b.n 8001a4c } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; - 80019f2: 4b1c ldr r3, [pc, #112] ; (8001a64 ) - 80019f4: 685b ldr r3, [r3, #4] - 80019f6: 60fb str r3, [r7, #12] + 80019e6: 4b1c ldr r3, [pc, #112] ; (8001a58 ) + 80019e8: 685b ldr r3, [r3, #4] + 80019ea: 60fb str r3, [r7, #12] (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) #else if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 80019f8: 687b ldr r3, [r7, #4] - 80019fa: 699b ldr r3, [r3, #24] - 80019fc: 2b01 cmp r3, #1 - 80019fe: d028 beq.n 8001a52 + 80019ec: 687b ldr r3, [r7, #4] + 80019ee: 699b ldr r3, [r3, #24] + 80019f0: 2b01 cmp r3, #1 + 80019f2: d028 beq.n 8001a46 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8001a00: 68fb ldr r3, [r7, #12] - 8001a02: f403 0280 and.w r2, r3, #4194304 ; 0x400000 - 8001a06: 687b ldr r3, [r7, #4] - 8001a08: 69db ldr r3, [r3, #28] + 80019f4: 68fb ldr r3, [r7, #12] + 80019f6: f403 0280 and.w r2, r3, #4194304 ; 0x400000 + 80019fa: 687b ldr r3, [r7, #4] + 80019fc: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 8001a0a: 429a cmp r2, r3 - 8001a0c: d121 bne.n 8001a52 + 80019fe: 429a cmp r2, r3 + 8001a00: d121 bne.n 8001a46 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 8001a0e: 68fb ldr r3, [r7, #12] - 8001a10: f003 023f and.w r2, r3, #63 ; 0x3f - 8001a14: 687b ldr r3, [r7, #4] - 8001a16: 6a1b ldr r3, [r3, #32] + 8001a02: 68fb ldr r3, [r7, #12] + 8001a04: f003 023f and.w r2, r3, #63 ; 0x3f + 8001a08: 687b ldr r3, [r7, #4] + 8001a0a: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8001a18: 429a cmp r2, r3 - 8001a1a: d11a bne.n 8001a52 + 8001a0c: 429a cmp r2, r3 + 8001a0e: d11a bne.n 8001a46 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 8001a1c: 68fa ldr r2, [r7, #12] - 8001a1e: f647 73c0 movw r3, #32704 ; 0x7fc0 - 8001a22: 4013 ands r3, r2 - 8001a24: 687a ldr r2, [r7, #4] - 8001a26: 6a52 ldr r2, [r2, #36] ; 0x24 - 8001a28: 0192 lsls r2, r2, #6 + 8001a10: 68fa ldr r2, [r7, #12] + 8001a12: f647 73c0 movw r3, #32704 ; 0x7fc0 + 8001a16: 4013 ands r3, r2 + 8001a18: 687a ldr r2, [r7, #4] + 8001a1a: 6a52 ldr r2, [r2, #36] ; 0x24 + 8001a1c: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || - 8001a2a: 4293 cmp r3, r2 - 8001a2c: d111 bne.n 8001a52 + 8001a1e: 4293 cmp r3, r2 + 8001a20: d111 bne.n 8001a46 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 8001a2e: 68fb ldr r3, [r7, #12] - 8001a30: f403 3240 and.w r2, r3, #196608 ; 0x30000 - 8001a34: 687b ldr r3, [r7, #4] - 8001a36: 6a9b ldr r3, [r3, #40] ; 0x28 - 8001a38: 085b lsrs r3, r3, #1 - 8001a3a: 3b01 subs r3, #1 - 8001a3c: 041b lsls r3, r3, #16 + 8001a22: 68fb ldr r3, [r7, #12] + 8001a24: f403 3240 and.w r2, r3, #196608 ; 0x30000 + 8001a28: 687b ldr r3, [r7, #4] + 8001a2a: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001a2c: 085b lsrs r3, r3, #1 + 8001a2e: 3b01 subs r3, #1 + 8001a30: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || - 8001a3e: 429a cmp r2, r3 - 8001a40: d107 bne.n 8001a52 + 8001a32: 429a cmp r2, r3 + 8001a34: d107 bne.n 8001a46 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) - 8001a42: 68fb ldr r3, [r7, #12] - 8001a44: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 - 8001a48: 687b ldr r3, [r7, #4] - 8001a4a: 6adb ldr r3, [r3, #44] ; 0x2c - 8001a4c: 061b lsls r3, r3, #24 + 8001a36: 68fb ldr r3, [r7, #12] + 8001a38: f003 6270 and.w r2, r3, #251658240 ; 0xf000000 + 8001a3c: 687b ldr r3, [r7, #4] + 8001a3e: 6adb ldr r3, [r3, #44] ; 0x2c + 8001a40: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || - 8001a4e: 429a cmp r2, r3 - 8001a50: d001 beq.n 8001a56 + 8001a42: 429a cmp r2, r3 + 8001a44: d001 beq.n 8001a4a #endif { return HAL_ERROR; - 8001a52: 2301 movs r3, #1 - 8001a54: e000 b.n 8001a58 + 8001a46: 2301 movs r3, #1 + 8001a48: e000 b.n 8001a4c } } } } return HAL_OK; - 8001a56: 2300 movs r3, #0 + 8001a4a: 2300 movs r3, #0 } - 8001a58: 4618 mov r0, r3 - 8001a5a: 3718 adds r7, #24 - 8001a5c: 46bd mov sp, r7 - 8001a5e: bd80 pop {r7, pc} - 8001a60: 40007000 .word 0x40007000 - 8001a64: 40023800 .word 0x40023800 - 8001a68: 42470060 .word 0x42470060 - -08001a6c : + 8001a4c: 4618 mov r0, r3 + 8001a4e: 3718 adds r7, #24 + 8001a50: 46bd mov sp, r7 + 8001a52: bd80 pop {r7, pc} + 8001a54: 40007000 .word 0x40007000 + 8001a58: 40023800 .word 0x40023800 + 8001a5c: 42470060 .word 0x42470060 + +08001a60 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8001a6c: b580 push {r7, lr} - 8001a6e: b084 sub sp, #16 - 8001a70: af00 add r7, sp, #0 - 8001a72: 6078 str r0, [r7, #4] - 8001a74: 6039 str r1, [r7, #0] + 8001a60: b580 push {r7, lr} + 8001a62: b084 sub sp, #16 + 8001a64: af00 add r7, sp, #0 + 8001a66: 6078 str r0, [r7, #4] + 8001a68: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 8001a76: 687b ldr r3, [r7, #4] - 8001a78: 2b00 cmp r3, #0 - 8001a7a: d101 bne.n 8001a80 + 8001a6a: 687b ldr r3, [r7, #4] + 8001a6c: 2b00 cmp r3, #0 + 8001a6e: d101 bne.n 8001a74 { return HAL_ERROR; - 8001a7c: 2301 movs r3, #1 - 8001a7e: e0cc b.n 8001c1a + 8001a70: 2301 movs r3, #1 + 8001a72: e0cc b.n 8001c0e /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8001a80: 4b68 ldr r3, [pc, #416] ; (8001c24 ) - 8001a82: 681b ldr r3, [r3, #0] - 8001a84: f003 0307 and.w r3, r3, #7 - 8001a88: 683a ldr r2, [r7, #0] - 8001a8a: 429a cmp r2, r3 - 8001a8c: d90c bls.n 8001aa8 + 8001a74: 4b68 ldr r3, [pc, #416] ; (8001c18 ) + 8001a76: 681b ldr r3, [r3, #0] + 8001a78: f003 0307 and.w r3, r3, #7 + 8001a7c: 683a ldr r2, [r7, #0] + 8001a7e: 429a cmp r2, r3 + 8001a80: d90c bls.n 8001a9c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8001a8e: 4b65 ldr r3, [pc, #404] ; (8001c24 ) - 8001a90: 683a ldr r2, [r7, #0] - 8001a92: b2d2 uxtb r2, r2 - 8001a94: 701a strb r2, [r3, #0] + 8001a82: 4b65 ldr r3, [pc, #404] ; (8001c18 ) + 8001a84: 683a ldr r2, [r7, #0] + 8001a86: b2d2 uxtb r2, r2 + 8001a88: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001a96: 4b63 ldr r3, [pc, #396] ; (8001c24 ) - 8001a98: 681b ldr r3, [r3, #0] - 8001a9a: f003 0307 and.w r3, r3, #7 - 8001a9e: 683a ldr r2, [r7, #0] - 8001aa0: 429a cmp r2, r3 - 8001aa2: d001 beq.n 8001aa8 + 8001a8a: 4b63 ldr r3, [pc, #396] ; (8001c18 ) + 8001a8c: 681b ldr r3, [r3, #0] + 8001a8e: f003 0307 and.w r3, r3, #7 + 8001a92: 683a ldr r2, [r7, #0] + 8001a94: 429a cmp r2, r3 + 8001a96: d001 beq.n 8001a9c { return HAL_ERROR; - 8001aa4: 2301 movs r3, #1 - 8001aa6: e0b8 b.n 8001c1a + 8001a98: 2301 movs r3, #1 + 8001a9a: e0b8 b.n 8001c0e } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8001aa8: 687b ldr r3, [r7, #4] - 8001aaa: 681b ldr r3, [r3, #0] - 8001aac: f003 0302 and.w r3, r3, #2 - 8001ab0: 2b00 cmp r3, #0 - 8001ab2: d020 beq.n 8001af6 + 8001a9c: 687b ldr r3, [r7, #4] + 8001a9e: 681b ldr r3, [r3, #0] + 8001aa0: f003 0302 and.w r3, r3, #2 + 8001aa4: 2b00 cmp r3, #0 + 8001aa6: d020 beq.n 8001aea { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001ab4: 687b ldr r3, [r7, #4] - 8001ab6: 681b ldr r3, [r3, #0] - 8001ab8: f003 0304 and.w r3, r3, #4 - 8001abc: 2b00 cmp r3, #0 - 8001abe: d005 beq.n 8001acc + 8001aa8: 687b ldr r3, [r7, #4] + 8001aaa: 681b ldr r3, [r3, #0] + 8001aac: f003 0304 and.w r3, r3, #4 + 8001ab0: 2b00 cmp r3, #0 + 8001ab2: d005 beq.n 8001ac0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8001ac0: 4b59 ldr r3, [pc, #356] ; (8001c28 ) - 8001ac2: 689b ldr r3, [r3, #8] - 8001ac4: 4a58 ldr r2, [pc, #352] ; (8001c28 ) - 8001ac6: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 - 8001aca: 6093 str r3, [r2, #8] + 8001ab4: 4b59 ldr r3, [pc, #356] ; (8001c1c ) + 8001ab6: 689b ldr r3, [r3, #8] + 8001ab8: 4a58 ldr r2, [pc, #352] ; (8001c1c ) + 8001aba: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00 + 8001abe: 6093 str r3, [r2, #8] } if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8001acc: 687b ldr r3, [r7, #4] - 8001ace: 681b ldr r3, [r3, #0] - 8001ad0: f003 0308 and.w r3, r3, #8 - 8001ad4: 2b00 cmp r3, #0 - 8001ad6: d005 beq.n 8001ae4 + 8001ac0: 687b ldr r3, [r7, #4] + 8001ac2: 681b ldr r3, [r3, #0] + 8001ac4: f003 0308 and.w r3, r3, #8 + 8001ac8: 2b00 cmp r3, #0 + 8001aca: d005 beq.n 8001ad8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8001ad8: 4b53 ldr r3, [pc, #332] ; (8001c28 ) - 8001ada: 689b ldr r3, [r3, #8] - 8001adc: 4a52 ldr r2, [pc, #328] ; (8001c28 ) - 8001ade: f443 4360 orr.w r3, r3, #57344 ; 0xe000 - 8001ae2: 6093 str r3, [r2, #8] + 8001acc: 4b53 ldr r3, [pc, #332] ; (8001c1c ) + 8001ace: 689b ldr r3, [r3, #8] + 8001ad0: 4a52 ldr r2, [pc, #328] ; (8001c1c ) + 8001ad2: f443 4360 orr.w r3, r3, #57344 ; 0xe000 + 8001ad6: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8001ae4: 4b50 ldr r3, [pc, #320] ; (8001c28 ) - 8001ae6: 689b ldr r3, [r3, #8] - 8001ae8: f023 02f0 bic.w r2, r3, #240 ; 0xf0 - 8001aec: 687b ldr r3, [r7, #4] - 8001aee: 689b ldr r3, [r3, #8] - 8001af0: 494d ldr r1, [pc, #308] ; (8001c28 ) - 8001af2: 4313 orrs r3, r2 - 8001af4: 608b str r3, [r1, #8] + 8001ad8: 4b50 ldr r3, [pc, #320] ; (8001c1c ) + 8001ada: 689b ldr r3, [r3, #8] + 8001adc: f023 02f0 bic.w r2, r3, #240 ; 0xf0 + 8001ae0: 687b ldr r3, [r7, #4] + 8001ae2: 689b ldr r3, [r3, #8] + 8001ae4: 494d ldr r1, [pc, #308] ; (8001c1c ) + 8001ae6: 4313 orrs r3, r2 + 8001ae8: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8001af6: 687b ldr r3, [r7, #4] - 8001af8: 681b ldr r3, [r3, #0] - 8001afa: f003 0301 and.w r3, r3, #1 - 8001afe: 2b00 cmp r3, #0 - 8001b00: d044 beq.n 8001b8c + 8001aea: 687b ldr r3, [r7, #4] + 8001aec: 681b ldr r3, [r3, #0] + 8001aee: f003 0301 and.w r3, r3, #1 + 8001af2: 2b00 cmp r3, #0 + 8001af4: d044 beq.n 8001b80 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8001b02: 687b ldr r3, [r7, #4] - 8001b04: 685b ldr r3, [r3, #4] - 8001b06: 2b01 cmp r3, #1 - 8001b08: d107 bne.n 8001b1a + 8001af6: 687b ldr r3, [r7, #4] + 8001af8: 685b ldr r3, [r3, #4] + 8001afa: 2b01 cmp r3, #1 + 8001afc: d107 bne.n 8001b0e { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8001b0a: 4b47 ldr r3, [pc, #284] ; (8001c28 ) - 8001b0c: 681b ldr r3, [r3, #0] - 8001b0e: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8001b12: 2b00 cmp r3, #0 - 8001b14: d119 bne.n 8001b4a + 8001afe: 4b47 ldr r3, [pc, #284] ; (8001c1c ) + 8001b00: 681b ldr r3, [r3, #0] + 8001b02: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8001b06: 2b00 cmp r3, #0 + 8001b08: d119 bne.n 8001b3e { return HAL_ERROR; - 8001b16: 2301 movs r3, #1 - 8001b18: e07f b.n 8001c1a + 8001b0a: 2301 movs r3, #1 + 8001b0c: e07f b.n 8001c0e } } /* PLL is selected as System Clock Source */ else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 8001b1a: 687b ldr r3, [r7, #4] - 8001b1c: 685b ldr r3, [r3, #4] - 8001b1e: 2b02 cmp r3, #2 - 8001b20: d003 beq.n 8001b2a + 8001b0e: 687b ldr r3, [r7, #4] + 8001b10: 685b ldr r3, [r3, #4] + 8001b12: 2b02 cmp r3, #2 + 8001b14: d003 beq.n 8001b1e (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) - 8001b22: 687b ldr r3, [r7, #4] - 8001b24: 685b ldr r3, [r3, #4] + 8001b16: 687b ldr r3, [r7, #4] + 8001b18: 685b ldr r3, [r3, #4] else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || - 8001b26: 2b03 cmp r3, #3 - 8001b28: d107 bne.n 8001b3a + 8001b1a: 2b03 cmp r3, #3 + 8001b1c: d107 bne.n 8001b2e { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001b2a: 4b3f ldr r3, [pc, #252] ; (8001c28 ) - 8001b2c: 681b ldr r3, [r3, #0] - 8001b2e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8001b32: 2b00 cmp r3, #0 - 8001b34: d109 bne.n 8001b4a + 8001b1e: 4b3f ldr r3, [pc, #252] ; (8001c1c ) + 8001b20: 681b ldr r3, [r3, #0] + 8001b22: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8001b26: 2b00 cmp r3, #0 + 8001b28: d109 bne.n 8001b3e { return HAL_ERROR; - 8001b36: 2301 movs r3, #1 - 8001b38: e06f b.n 8001c1a + 8001b2a: 2301 movs r3, #1 + 8001b2c: e06f b.n 8001c0e } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8001b3a: 4b3b ldr r3, [pc, #236] ; (8001c28 ) - 8001b3c: 681b ldr r3, [r3, #0] - 8001b3e: f003 0302 and.w r3, r3, #2 - 8001b42: 2b00 cmp r3, #0 - 8001b44: d101 bne.n 8001b4a + 8001b2e: 4b3b ldr r3, [pc, #236] ; (8001c1c ) + 8001b30: 681b ldr r3, [r3, #0] + 8001b32: f003 0302 and.w r3, r3, #2 + 8001b36: 2b00 cmp r3, #0 + 8001b38: d101 bne.n 8001b3e { return HAL_ERROR; - 8001b46: 2301 movs r3, #1 - 8001b48: e067 b.n 8001c1a + 8001b3a: 2301 movs r3, #1 + 8001b3c: e067 b.n 8001c0e } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8001b4a: 4b37 ldr r3, [pc, #220] ; (8001c28 ) - 8001b4c: 689b ldr r3, [r3, #8] - 8001b4e: f023 0203 bic.w r2, r3, #3 - 8001b52: 687b ldr r3, [r7, #4] - 8001b54: 685b ldr r3, [r3, #4] - 8001b56: 4934 ldr r1, [pc, #208] ; (8001c28 ) - 8001b58: 4313 orrs r3, r2 - 8001b5a: 608b str r3, [r1, #8] + 8001b3e: 4b37 ldr r3, [pc, #220] ; (8001c1c ) + 8001b40: 689b ldr r3, [r3, #8] + 8001b42: f023 0203 bic.w r2, r3, #3 + 8001b46: 687b ldr r3, [r7, #4] + 8001b48: 685b ldr r3, [r3, #4] + 8001b4a: 4934 ldr r1, [pc, #208] ; (8001c1c ) + 8001b4c: 4313 orrs r3, r2 + 8001b4e: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001b5c: f7ff fa5a bl 8001014 - 8001b60: 60f8 str r0, [r7, #12] + 8001b50: f7ff fa5a bl 8001008 + 8001b54: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8001b62: e00a b.n 8001b7a + 8001b56: e00a b.n 8001b6e { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8001b64: f7ff fa56 bl 8001014 - 8001b68: 4602 mov r2, r0 - 8001b6a: 68fb ldr r3, [r7, #12] - 8001b6c: 1ad3 subs r3, r2, r3 - 8001b6e: f241 3288 movw r2, #5000 ; 0x1388 - 8001b72: 4293 cmp r3, r2 - 8001b74: d901 bls.n 8001b7a + 8001b58: f7ff fa56 bl 8001008 + 8001b5c: 4602 mov r2, r0 + 8001b5e: 68fb ldr r3, [r7, #12] + 8001b60: 1ad3 subs r3, r2, r3 + 8001b62: f241 3288 movw r2, #5000 ; 0x1388 + 8001b66: 4293 cmp r3, r2 + 8001b68: d901 bls.n 8001b6e { return HAL_TIMEOUT; - 8001b76: 2303 movs r3, #3 - 8001b78: e04f b.n 8001c1a + 8001b6a: 2303 movs r3, #3 + 8001b6c: e04f b.n 8001c0e while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8001b7a: 4b2b ldr r3, [pc, #172] ; (8001c28 ) - 8001b7c: 689b ldr r3, [r3, #8] - 8001b7e: f003 020c and.w r2, r3, #12 - 8001b82: 687b ldr r3, [r7, #4] - 8001b84: 685b ldr r3, [r3, #4] - 8001b86: 009b lsls r3, r3, #2 - 8001b88: 429a cmp r2, r3 - 8001b8a: d1eb bne.n 8001b64 + 8001b6e: 4b2b ldr r3, [pc, #172] ; (8001c1c ) + 8001b70: 689b ldr r3, [r3, #8] + 8001b72: f003 020c and.w r2, r3, #12 + 8001b76: 687b ldr r3, [r7, #4] + 8001b78: 685b ldr r3, [r3, #4] + 8001b7a: 009b lsls r3, r3, #2 + 8001b7c: 429a cmp r2, r3 + 8001b7e: d1eb bne.n 8001b58 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 8001b8c: 4b25 ldr r3, [pc, #148] ; (8001c24 ) - 8001b8e: 681b ldr r3, [r3, #0] - 8001b90: f003 0307 and.w r3, r3, #7 - 8001b94: 683a ldr r2, [r7, #0] - 8001b96: 429a cmp r2, r3 - 8001b98: d20c bcs.n 8001bb4 + 8001b80: 4b25 ldr r3, [pc, #148] ; (8001c18 ) + 8001b82: 681b ldr r3, [r3, #0] + 8001b84: f003 0307 and.w r3, r3, #7 + 8001b88: 683a ldr r2, [r7, #0] + 8001b8a: 429a cmp r2, r3 + 8001b8c: d20c bcs.n 8001ba8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8001b9a: 4b22 ldr r3, [pc, #136] ; (8001c24 ) - 8001b9c: 683a ldr r2, [r7, #0] - 8001b9e: b2d2 uxtb r2, r2 - 8001ba0: 701a strb r2, [r3, #0] + 8001b8e: 4b22 ldr r3, [pc, #136] ; (8001c18 ) + 8001b90: 683a ldr r2, [r7, #0] + 8001b92: b2d2 uxtb r2, r2 + 8001b94: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001ba2: 4b20 ldr r3, [pc, #128] ; (8001c24 ) - 8001ba4: 681b ldr r3, [r3, #0] - 8001ba6: f003 0307 and.w r3, r3, #7 - 8001baa: 683a ldr r2, [r7, #0] - 8001bac: 429a cmp r2, r3 - 8001bae: d001 beq.n 8001bb4 + 8001b96: 4b20 ldr r3, [pc, #128] ; (8001c18 ) + 8001b98: 681b ldr r3, [r3, #0] + 8001b9a: f003 0307 and.w r3, r3, #7 + 8001b9e: 683a ldr r2, [r7, #0] + 8001ba0: 429a cmp r2, r3 + 8001ba2: d001 beq.n 8001ba8 { return HAL_ERROR; - 8001bb0: 2301 movs r3, #1 - 8001bb2: e032 b.n 8001c1a + 8001ba4: 2301 movs r3, #1 + 8001ba6: e032 b.n 8001c0e } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001bb4: 687b ldr r3, [r7, #4] - 8001bb6: 681b ldr r3, [r3, #0] - 8001bb8: f003 0304 and.w r3, r3, #4 - 8001bbc: 2b00 cmp r3, #0 - 8001bbe: d008 beq.n 8001bd2 + 8001ba8: 687b ldr r3, [r7, #4] + 8001baa: 681b ldr r3, [r3, #0] + 8001bac: f003 0304 and.w r3, r3, #4 + 8001bb0: 2b00 cmp r3, #0 + 8001bb2: d008 beq.n 8001bc6 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8001bc0: 4b19 ldr r3, [pc, #100] ; (8001c28 ) - 8001bc2: 689b ldr r3, [r3, #8] - 8001bc4: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 8001bc8: 687b ldr r3, [r7, #4] - 8001bca: 68db ldr r3, [r3, #12] - 8001bcc: 4916 ldr r1, [pc, #88] ; (8001c28 ) - 8001bce: 4313 orrs r3, r2 - 8001bd0: 608b str r3, [r1, #8] + 8001bb4: 4b19 ldr r3, [pc, #100] ; (8001c1c ) + 8001bb6: 689b ldr r3, [r3, #8] + 8001bb8: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 8001bbc: 687b ldr r3, [r7, #4] + 8001bbe: 68db ldr r3, [r3, #12] + 8001bc0: 4916 ldr r1, [pc, #88] ; (8001c1c ) + 8001bc2: 4313 orrs r3, r2 + 8001bc4: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8001bd2: 687b ldr r3, [r7, #4] - 8001bd4: 681b ldr r3, [r3, #0] - 8001bd6: f003 0308 and.w r3, r3, #8 - 8001bda: 2b00 cmp r3, #0 - 8001bdc: d009 beq.n 8001bf2 + 8001bc6: 687b ldr r3, [r7, #4] + 8001bc8: 681b ldr r3, [r3, #0] + 8001bca: f003 0308 and.w r3, r3, #8 + 8001bce: 2b00 cmp r3, #0 + 8001bd0: d009 beq.n 8001be6 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - 8001bde: 4b12 ldr r3, [pc, #72] ; (8001c28 ) - 8001be0: 689b ldr r3, [r3, #8] - 8001be2: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 8001be6: 687b ldr r3, [r7, #4] - 8001be8: 691b ldr r3, [r3, #16] - 8001bea: 00db lsls r3, r3, #3 - 8001bec: 490e ldr r1, [pc, #56] ; (8001c28 ) - 8001bee: 4313 orrs r3, r2 - 8001bf0: 608b str r3, [r1, #8] + 8001bd2: 4b12 ldr r3, [pc, #72] ; (8001c1c ) + 8001bd4: 689b ldr r3, [r3, #8] + 8001bd6: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 8001bda: 687b ldr r3, [r7, #4] + 8001bdc: 691b ldr r3, [r3, #16] + 8001bde: 00db lsls r3, r3, #3 + 8001be0: 490e ldr r1, [pc, #56] ; (8001c1c ) + 8001be2: 4313 orrs r3, r2 + 8001be4: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8001bf2: f000 f821 bl 8001c38 - 8001bf6: 4602 mov r2, r0 - 8001bf8: 4b0b ldr r3, [pc, #44] ; (8001c28 ) - 8001bfa: 689b ldr r3, [r3, #8] - 8001bfc: 091b lsrs r3, r3, #4 - 8001bfe: f003 030f and.w r3, r3, #15 - 8001c02: 490a ldr r1, [pc, #40] ; (8001c2c ) - 8001c04: 5ccb ldrb r3, [r1, r3] - 8001c06: fa22 f303 lsr.w r3, r2, r3 - 8001c0a: 4a09 ldr r2, [pc, #36] ; (8001c30 ) - 8001c0c: 6013 str r3, [r2, #0] + 8001be6: f000 f821 bl 8001c2c + 8001bea: 4602 mov r2, r0 + 8001bec: 4b0b ldr r3, [pc, #44] ; (8001c1c ) + 8001bee: 689b ldr r3, [r3, #8] + 8001bf0: 091b lsrs r3, r3, #4 + 8001bf2: f003 030f and.w r3, r3, #15 + 8001bf6: 490a ldr r1, [pc, #40] ; (8001c20 ) + 8001bf8: 5ccb ldrb r3, [r1, r3] + 8001bfa: fa22 f303 lsr.w r3, r2, r3 + 8001bfe: 4a09 ldr r2, [pc, #36] ; (8001c24 ) + 8001c00: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick (uwTickPrio); - 8001c0e: 4b09 ldr r3, [pc, #36] ; (8001c34 ) - 8001c10: 681b ldr r3, [r3, #0] - 8001c12: 4618 mov r0, r3 - 8001c14: f7ff f9ba bl 8000f8c + 8001c02: 4b09 ldr r3, [pc, #36] ; (8001c28 ) + 8001c04: 681b ldr r3, [r3, #0] + 8001c06: 4618 mov r0, r3 + 8001c08: f7ff f9ba bl 8000f80 return HAL_OK; - 8001c18: 2300 movs r3, #0 + 8001c0c: 2300 movs r3, #0 } - 8001c1a: 4618 mov r0, r3 - 8001c1c: 3710 adds r7, #16 - 8001c1e: 46bd mov sp, r7 - 8001c20: bd80 pop {r7, pc} - 8001c22: bf00 nop - 8001c24: 40023c00 .word 0x40023c00 - 8001c28: 40023800 .word 0x40023800 - 8001c2c: 080035a4 .word 0x080035a4 - 8001c30: 20000000 .word 0x20000000 - 8001c34: 20000004 .word 0x20000004 - -08001c38 : + 8001c0e: 4618 mov r0, r3 + 8001c10: 3710 adds r7, #16 + 8001c12: 46bd mov sp, r7 + 8001c14: bd80 pop {r7, pc} + 8001c16: bf00 nop + 8001c18: 40023c00 .word 0x40023c00 + 8001c1c: 40023800 .word 0x40023800 + 8001c20: 080036cc .word 0x080036cc + 8001c24: 20000000 .word 0x20000000 + 8001c28: 20000004 .word 0x20000004 + +08001c2c : * * * @retval SYSCLK frequency */ __weak uint32_t HAL_RCC_GetSysClockFreq(void) { - 8001c38: b5b0 push {r4, r5, r7, lr} - 8001c3a: b084 sub sp, #16 - 8001c3c: af00 add r7, sp, #0 + 8001c2c: b5b0 push {r4, r5, r7, lr} + 8001c2e: b084 sub sp, #16 + 8001c30: af00 add r7, sp, #0 uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; - 8001c3e: 2100 movs r1, #0 - 8001c40: 6079 str r1, [r7, #4] - 8001c42: 2100 movs r1, #0 - 8001c44: 60f9 str r1, [r7, #12] - 8001c46: 2100 movs r1, #0 - 8001c48: 6039 str r1, [r7, #0] + 8001c32: 2100 movs r1, #0 + 8001c34: 6079 str r1, [r7, #4] + 8001c36: 2100 movs r1, #0 + 8001c38: 60f9 str r1, [r7, #12] + 8001c3a: 2100 movs r1, #0 + 8001c3c: 6039 str r1, [r7, #0] uint32_t sysclockfreq = 0U; - 8001c4a: 2100 movs r1, #0 - 8001c4c: 60b9 str r1, [r7, #8] + 8001c3e: 2100 movs r1, #0 + 8001c40: 60b9 str r1, [r7, #8] /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 8001c4e: 4952 ldr r1, [pc, #328] ; (8001d98 ) - 8001c50: 6889 ldr r1, [r1, #8] - 8001c52: f001 010c and.w r1, r1, #12 - 8001c56: 2908 cmp r1, #8 - 8001c58: d00d beq.n 8001c76 - 8001c5a: 2908 cmp r1, #8 - 8001c5c: f200 8094 bhi.w 8001d88 - 8001c60: 2900 cmp r1, #0 - 8001c62: d002 beq.n 8001c6a - 8001c64: 2904 cmp r1, #4 - 8001c66: d003 beq.n 8001c70 - 8001c68: e08e b.n 8001d88 + 8001c42: 4952 ldr r1, [pc, #328] ; (8001d8c ) + 8001c44: 6889 ldr r1, [r1, #8] + 8001c46: f001 010c and.w r1, r1, #12 + 8001c4a: 2908 cmp r1, #8 + 8001c4c: d00d beq.n 8001c6a + 8001c4e: 2908 cmp r1, #8 + 8001c50: f200 8094 bhi.w 8001d7c + 8001c54: 2900 cmp r1, #0 + 8001c56: d002 beq.n 8001c5e + 8001c58: 2904 cmp r1, #4 + 8001c5a: d003 beq.n 8001c64 + 8001c5c: e08e b.n 8001d7c { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; - 8001c6a: 4b4c ldr r3, [pc, #304] ; (8001d9c ) - 8001c6c: 60bb str r3, [r7, #8] + 8001c5e: 4b4c ldr r3, [pc, #304] ; (8001d90 ) + 8001c60: 60bb str r3, [r7, #8] break; - 8001c6e: e08e b.n 8001d8e + 8001c62: e08e b.n 8001d82 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; - 8001c70: 4b4b ldr r3, [pc, #300] ; (8001da0 ) - 8001c72: 60bb str r3, [r7, #8] + 8001c64: 4b4b ldr r3, [pc, #300] ; (8001d94 ) + 8001c66: 60bb str r3, [r7, #8] break; - 8001c74: e08b b.n 8001d8e + 8001c68: e08b b.n 8001d82 } case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - 8001c76: 4948 ldr r1, [pc, #288] ; (8001d98 ) - 8001c78: 6849 ldr r1, [r1, #4] - 8001c7a: f001 013f and.w r1, r1, #63 ; 0x3f - 8001c7e: 6079 str r1, [r7, #4] + 8001c6a: 4948 ldr r1, [pc, #288] ; (8001d8c ) + 8001c6c: 6849 ldr r1, [r1, #4] + 8001c6e: f001 013f and.w r1, r1, #63 ; 0x3f + 8001c72: 6079 str r1, [r7, #4] if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 8001c80: 4945 ldr r1, [pc, #276] ; (8001d98 ) - 8001c82: 6849 ldr r1, [r1, #4] - 8001c84: f401 0180 and.w r1, r1, #4194304 ; 0x400000 - 8001c88: 2900 cmp r1, #0 - 8001c8a: d024 beq.n 8001cd6 + 8001c74: 4945 ldr r1, [pc, #276] ; (8001d8c ) + 8001c76: 6849 ldr r1, [r1, #4] + 8001c78: f401 0180 and.w r1, r1, #4194304 ; 0x400000 + 8001c7c: 2900 cmp r1, #0 + 8001c7e: d024 beq.n 8001cca { /* HSE used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 8001c8c: 4942 ldr r1, [pc, #264] ; (8001d98 ) - 8001c8e: 6849 ldr r1, [r1, #4] - 8001c90: 0989 lsrs r1, r1, #6 - 8001c92: 4608 mov r0, r1 - 8001c94: f04f 0100 mov.w r1, #0 - 8001c98: f240 14ff movw r4, #511 ; 0x1ff - 8001c9c: f04f 0500 mov.w r5, #0 - 8001ca0: ea00 0204 and.w r2, r0, r4 - 8001ca4: ea01 0305 and.w r3, r1, r5 - 8001ca8: 493d ldr r1, [pc, #244] ; (8001da0 ) - 8001caa: fb01 f003 mul.w r0, r1, r3 - 8001cae: 2100 movs r1, #0 - 8001cb0: fb01 f102 mul.w r1, r1, r2 - 8001cb4: 1844 adds r4, r0, r1 - 8001cb6: 493a ldr r1, [pc, #232] ; (8001da0 ) - 8001cb8: fba2 0101 umull r0, r1, r2, r1 - 8001cbc: 1863 adds r3, r4, r1 - 8001cbe: 4619 mov r1, r3 - 8001cc0: 687b ldr r3, [r7, #4] - 8001cc2: 461a mov r2, r3 - 8001cc4: f04f 0300 mov.w r3, #0 - 8001cc8: f7fe fdbc bl 8000844 <__aeabi_uldivmod> - 8001ccc: 4602 mov r2, r0 - 8001cce: 460b mov r3, r1 - 8001cd0: 4613 mov r3, r2 - 8001cd2: 60fb str r3, [r7, #12] - 8001cd4: e04a b.n 8001d6c + 8001c80: 4942 ldr r1, [pc, #264] ; (8001d8c ) + 8001c82: 6849 ldr r1, [r1, #4] + 8001c84: 0989 lsrs r1, r1, #6 + 8001c86: 4608 mov r0, r1 + 8001c88: f04f 0100 mov.w r1, #0 + 8001c8c: f240 14ff movw r4, #511 ; 0x1ff + 8001c90: f04f 0500 mov.w r5, #0 + 8001c94: ea00 0204 and.w r2, r0, r4 + 8001c98: ea01 0305 and.w r3, r1, r5 + 8001c9c: 493d ldr r1, [pc, #244] ; (8001d94 ) + 8001c9e: fb01 f003 mul.w r0, r1, r3 + 8001ca2: 2100 movs r1, #0 + 8001ca4: fb01 f102 mul.w r1, r1, r2 + 8001ca8: 1844 adds r4, r0, r1 + 8001caa: 493a ldr r1, [pc, #232] ; (8001d94 ) + 8001cac: fba2 0101 umull r0, r1, r2, r1 + 8001cb0: 1863 adds r3, r4, r1 + 8001cb2: 4619 mov r1, r3 + 8001cb4: 687b ldr r3, [r7, #4] + 8001cb6: 461a mov r2, r3 + 8001cb8: f04f 0300 mov.w r3, #0 + 8001cbc: f7fe fdc2 bl 8000844 <__aeabi_uldivmod> + 8001cc0: 4602 mov r2, r0 + 8001cc2: 460b mov r3, r1 + 8001cc4: 4613 mov r3, r2 + 8001cc6: 60fb str r3, [r7, #12] + 8001cc8: e04a b.n 8001d60 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); - 8001cd6: 4b30 ldr r3, [pc, #192] ; (8001d98 ) - 8001cd8: 685b ldr r3, [r3, #4] - 8001cda: 099b lsrs r3, r3, #6 - 8001cdc: 461a mov r2, r3 - 8001cde: f04f 0300 mov.w r3, #0 - 8001ce2: f240 10ff movw r0, #511 ; 0x1ff - 8001ce6: f04f 0100 mov.w r1, #0 - 8001cea: ea02 0400 and.w r4, r2, r0 - 8001cee: ea03 0501 and.w r5, r3, r1 - 8001cf2: 4620 mov r0, r4 - 8001cf4: 4629 mov r1, r5 - 8001cf6: f04f 0200 mov.w r2, #0 - 8001cfa: f04f 0300 mov.w r3, #0 - 8001cfe: 014b lsls r3, r1, #5 - 8001d00: ea43 63d0 orr.w r3, r3, r0, lsr #27 - 8001d04: 0142 lsls r2, r0, #5 - 8001d06: 4610 mov r0, r2 - 8001d08: 4619 mov r1, r3 - 8001d0a: 1b00 subs r0, r0, r4 - 8001d0c: eb61 0105 sbc.w r1, r1, r5 - 8001d10: f04f 0200 mov.w r2, #0 - 8001d14: f04f 0300 mov.w r3, #0 - 8001d18: 018b lsls r3, r1, #6 - 8001d1a: ea43 6390 orr.w r3, r3, r0, lsr #26 - 8001d1e: 0182 lsls r2, r0, #6 - 8001d20: 1a12 subs r2, r2, r0 - 8001d22: eb63 0301 sbc.w r3, r3, r1 - 8001d26: f04f 0000 mov.w r0, #0 - 8001d2a: f04f 0100 mov.w r1, #0 - 8001d2e: 00d9 lsls r1, r3, #3 - 8001d30: ea41 7152 orr.w r1, r1, r2, lsr #29 - 8001d34: 00d0 lsls r0, r2, #3 - 8001d36: 4602 mov r2, r0 - 8001d38: 460b mov r3, r1 - 8001d3a: 1912 adds r2, r2, r4 - 8001d3c: eb45 0303 adc.w r3, r5, r3 - 8001d40: f04f 0000 mov.w r0, #0 - 8001d44: f04f 0100 mov.w r1, #0 - 8001d48: 0299 lsls r1, r3, #10 - 8001d4a: ea41 5192 orr.w r1, r1, r2, lsr #22 - 8001d4e: 0290 lsls r0, r2, #10 - 8001d50: 4602 mov r2, r0 - 8001d52: 460b mov r3, r1 - 8001d54: 4610 mov r0, r2 - 8001d56: 4619 mov r1, r3 - 8001d58: 687b ldr r3, [r7, #4] - 8001d5a: 461a mov r2, r3 - 8001d5c: f04f 0300 mov.w r3, #0 - 8001d60: f7fe fd70 bl 8000844 <__aeabi_uldivmod> - 8001d64: 4602 mov r2, r0 - 8001d66: 460b mov r3, r1 - 8001d68: 4613 mov r3, r2 - 8001d6a: 60fb str r3, [r7, #12] + 8001cca: 4b30 ldr r3, [pc, #192] ; (8001d8c ) + 8001ccc: 685b ldr r3, [r3, #4] + 8001cce: 099b lsrs r3, r3, #6 + 8001cd0: 461a mov r2, r3 + 8001cd2: f04f 0300 mov.w r3, #0 + 8001cd6: f240 10ff movw r0, #511 ; 0x1ff + 8001cda: f04f 0100 mov.w r1, #0 + 8001cde: ea02 0400 and.w r4, r2, r0 + 8001ce2: ea03 0501 and.w r5, r3, r1 + 8001ce6: 4620 mov r0, r4 + 8001ce8: 4629 mov r1, r5 + 8001cea: f04f 0200 mov.w r2, #0 + 8001cee: f04f 0300 mov.w r3, #0 + 8001cf2: 014b lsls r3, r1, #5 + 8001cf4: ea43 63d0 orr.w r3, r3, r0, lsr #27 + 8001cf8: 0142 lsls r2, r0, #5 + 8001cfa: 4610 mov r0, r2 + 8001cfc: 4619 mov r1, r3 + 8001cfe: 1b00 subs r0, r0, r4 + 8001d00: eb61 0105 sbc.w r1, r1, r5 + 8001d04: f04f 0200 mov.w r2, #0 + 8001d08: f04f 0300 mov.w r3, #0 + 8001d0c: 018b lsls r3, r1, #6 + 8001d0e: ea43 6390 orr.w r3, r3, r0, lsr #26 + 8001d12: 0182 lsls r2, r0, #6 + 8001d14: 1a12 subs r2, r2, r0 + 8001d16: eb63 0301 sbc.w r3, r3, r1 + 8001d1a: f04f 0000 mov.w r0, #0 + 8001d1e: f04f 0100 mov.w r1, #0 + 8001d22: 00d9 lsls r1, r3, #3 + 8001d24: ea41 7152 orr.w r1, r1, r2, lsr #29 + 8001d28: 00d0 lsls r0, r2, #3 + 8001d2a: 4602 mov r2, r0 + 8001d2c: 460b mov r3, r1 + 8001d2e: 1912 adds r2, r2, r4 + 8001d30: eb45 0303 adc.w r3, r5, r3 + 8001d34: f04f 0000 mov.w r0, #0 + 8001d38: f04f 0100 mov.w r1, #0 + 8001d3c: 0299 lsls r1, r3, #10 + 8001d3e: ea41 5192 orr.w r1, r1, r2, lsr #22 + 8001d42: 0290 lsls r0, r2, #10 + 8001d44: 4602 mov r2, r0 + 8001d46: 460b mov r3, r1 + 8001d48: 4610 mov r0, r2 + 8001d4a: 4619 mov r1, r3 + 8001d4c: 687b ldr r3, [r7, #4] + 8001d4e: 461a mov r2, r3 + 8001d50: f04f 0300 mov.w r3, #0 + 8001d54: f7fe fd76 bl 8000844 <__aeabi_uldivmod> + 8001d58: 4602 mov r2, r0 + 8001d5a: 460b mov r3, r1 + 8001d5c: 4613 mov r3, r2 + 8001d5e: 60fb str r3, [r7, #12] } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); - 8001d6c: 4b0a ldr r3, [pc, #40] ; (8001d98 ) - 8001d6e: 685b ldr r3, [r3, #4] - 8001d70: 0c1b lsrs r3, r3, #16 - 8001d72: f003 0303 and.w r3, r3, #3 - 8001d76: 3301 adds r3, #1 - 8001d78: 005b lsls r3, r3, #1 - 8001d7a: 603b str r3, [r7, #0] + 8001d60: 4b0a ldr r3, [pc, #40] ; (8001d8c ) + 8001d62: 685b ldr r3, [r3, #4] + 8001d64: 0c1b lsrs r3, r3, #16 + 8001d66: f003 0303 and.w r3, r3, #3 + 8001d6a: 3301 adds r3, #1 + 8001d6c: 005b lsls r3, r3, #1 + 8001d6e: 603b str r3, [r7, #0] sysclockfreq = pllvco/pllp; - 8001d7c: 68fa ldr r2, [r7, #12] - 8001d7e: 683b ldr r3, [r7, #0] - 8001d80: fbb2 f3f3 udiv r3, r2, r3 - 8001d84: 60bb str r3, [r7, #8] + 8001d70: 68fa ldr r2, [r7, #12] + 8001d72: 683b ldr r3, [r7, #0] + 8001d74: fbb2 f3f3 udiv r3, r2, r3 + 8001d78: 60bb str r3, [r7, #8] break; - 8001d86: e002 b.n 8001d8e + 8001d7a: e002 b.n 8001d82 } default: { sysclockfreq = HSI_VALUE; - 8001d88: 4b04 ldr r3, [pc, #16] ; (8001d9c ) - 8001d8a: 60bb str r3, [r7, #8] + 8001d7c: 4b04 ldr r3, [pc, #16] ; (8001d90 ) + 8001d7e: 60bb str r3, [r7, #8] break; - 8001d8c: bf00 nop + 8001d80: bf00 nop } } return sysclockfreq; - 8001d8e: 68bb ldr r3, [r7, #8] + 8001d82: 68bb ldr r3, [r7, #8] } - 8001d90: 4618 mov r0, r3 - 8001d92: 3710 adds r7, #16 - 8001d94: 46bd mov sp, r7 - 8001d96: bdb0 pop {r4, r5, r7, pc} - 8001d98: 40023800 .word 0x40023800 - 8001d9c: 00f42400 .word 0x00f42400 - 8001da0: 017d7840 .word 0x017d7840 - -08001da4 : + 8001d84: 4618 mov r0, r3 + 8001d86: 3710 adds r7, #16 + 8001d88: 46bd mov sp, r7 + 8001d8a: bdb0 pop {r4, r5, r7, pc} + 8001d8c: 40023800 .word 0x40023800 + 8001d90: 00f42400 .word 0x00f42400 + 8001d94: 017d7840 .word 0x017d7840 + +08001d98 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { - 8001da4: b580 push {r7, lr} - 8001da6: b082 sub sp, #8 - 8001da8: af00 add r7, sp, #0 - 8001daa: 6078 str r0, [r7, #4] + 8001d98: b580 push {r7, lr} + 8001d9a: b082 sub sp, #8 + 8001d9c: af00 add r7, sp, #0 + 8001d9e: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) - 8001dac: 687b ldr r3, [r7, #4] - 8001dae: 2b00 cmp r3, #0 - 8001db0: d101 bne.n 8001db6 + 8001da0: 687b ldr r3, [r7, #4] + 8001da2: 2b00 cmp r3, #0 + 8001da4: d101 bne.n 8001daa { return HAL_ERROR; - 8001db2: 2301 movs r3, #1 - 8001db4: e07b b.n 8001eae + 8001da6: 2301 movs r3, #1 + 8001da8: e07b b.n 8001ea2 assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); assert_param(IS_SPI_NSS(hspi->Init.NSS)); assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) - 8001db6: 687b ldr r3, [r7, #4] - 8001db8: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001dba: 2b00 cmp r3, #0 - 8001dbc: d108 bne.n 8001dd0 + 8001daa: 687b ldr r3, [r7, #4] + 8001dac: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001dae: 2b00 cmp r3, #0 + 8001db0: d108 bne.n 8001dc4 { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) - 8001dbe: 687b ldr r3, [r7, #4] - 8001dc0: 685b ldr r3, [r3, #4] - 8001dc2: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 8001dc6: d009 beq.n 8001ddc + 8001db2: 687b ldr r3, [r7, #4] + 8001db4: 685b ldr r3, [r3, #4] + 8001db6: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 8001dba: d009 beq.n 8001dd0 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 8001dc8: 687b ldr r3, [r7, #4] - 8001dca: 2200 movs r2, #0 - 8001dcc: 61da str r2, [r3, #28] - 8001dce: e005 b.n 8001ddc + 8001dbc: 687b ldr r3, [r7, #4] + 8001dbe: 2200 movs r2, #0 + 8001dc0: 61da str r2, [r3, #28] + 8001dc2: e005 b.n 8001dd0 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; - 8001dd0: 687b ldr r3, [r7, #4] - 8001dd2: 2200 movs r2, #0 - 8001dd4: 611a str r2, [r3, #16] + 8001dc4: 687b ldr r3, [r7, #4] + 8001dc6: 2200 movs r2, #0 + 8001dc8: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; - 8001dd6: 687b ldr r3, [r7, #4] - 8001dd8: 2200 movs r2, #0 - 8001dda: 615a str r2, [r3, #20] + 8001dca: 687b ldr r3, [r7, #4] + 8001dcc: 2200 movs r2, #0 + 8001dce: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8001ddc: 687b ldr r3, [r7, #4] - 8001dde: 2200 movs r2, #0 - 8001de0: 629a str r2, [r3, #40] ; 0x28 + 8001dd0: 687b ldr r3, [r7, #4] + 8001dd2: 2200 movs r2, #0 + 8001dd4: 629a str r2, [r3, #40] ; 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) - 8001de2: 687b ldr r3, [r7, #4] - 8001de4: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 - 8001de8: b2db uxtb r3, r3 - 8001dea: 2b00 cmp r3, #0 - 8001dec: d106 bne.n 8001dfc + 8001dd6: 687b ldr r3, [r7, #4] + 8001dd8: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 + 8001ddc: b2db uxtb r3, r3 + 8001dde: 2b00 cmp r3, #0 + 8001de0: d106 bne.n 8001df0 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; - 8001dee: 687b ldr r3, [r7, #4] - 8001df0: 2200 movs r2, #0 - 8001df2: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8001de2: 687b ldr r3, [r7, #4] + 8001de4: 2200 movs r2, #0 + 8001de6: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); - 8001df6: 6878 ldr r0, [r7, #4] - 8001df8: f7fe ffd0 bl 8000d9c + 8001dea: 6878 ldr r0, [r7, #4] + 8001dec: f7fe ffd0 bl 8000d90 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; - 8001dfc: 687b ldr r3, [r7, #4] - 8001dfe: 2202 movs r2, #2 - 8001e00: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 8001df0: 687b ldr r3, [r7, #4] + 8001df2: 2202 movs r2, #2 + 8001df4: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8001e04: 687b ldr r3, [r7, #4] - 8001e06: 681b ldr r3, [r3, #0] - 8001e08: 681a ldr r2, [r3, #0] - 8001e0a: 687b ldr r3, [r7, #4] - 8001e0c: 681b ldr r3, [r3, #0] - 8001e0e: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8001e12: 601a str r2, [r3, #0] + 8001df8: 687b ldr r3, [r7, #4] + 8001dfa: 681b ldr r3, [r3, #0] + 8001dfc: 681a ldr r2, [r3, #0] + 8001dfe: 687b ldr r3, [r7, #4] + 8001e00: 681b ldr r3, [r3, #0] + 8001e02: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8001e06: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | - 8001e14: 687b ldr r3, [r7, #4] - 8001e16: 685b ldr r3, [r3, #4] - 8001e18: f403 7282 and.w r2, r3, #260 ; 0x104 - 8001e1c: 687b ldr r3, [r7, #4] - 8001e1e: 689b ldr r3, [r3, #8] - 8001e20: f403 4304 and.w r3, r3, #33792 ; 0x8400 - 8001e24: 431a orrs r2, r3 - 8001e26: 687b ldr r3, [r7, #4] - 8001e28: 68db ldr r3, [r3, #12] - 8001e2a: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8001e2e: 431a orrs r2, r3 - 8001e30: 687b ldr r3, [r7, #4] - 8001e32: 691b ldr r3, [r3, #16] - 8001e34: f003 0302 and.w r3, r3, #2 - 8001e38: 431a orrs r2, r3 - 8001e3a: 687b ldr r3, [r7, #4] - 8001e3c: 695b ldr r3, [r3, #20] - 8001e3e: f003 0301 and.w r3, r3, #1 - 8001e42: 431a orrs r2, r3 - 8001e44: 687b ldr r3, [r7, #4] - 8001e46: 699b ldr r3, [r3, #24] - 8001e48: f403 7300 and.w r3, r3, #512 ; 0x200 - 8001e4c: 431a orrs r2, r3 - 8001e4e: 687b ldr r3, [r7, #4] - 8001e50: 69db ldr r3, [r3, #28] - 8001e52: f003 0338 and.w r3, r3, #56 ; 0x38 - 8001e56: 431a orrs r2, r3 + 8001e08: 687b ldr r3, [r7, #4] + 8001e0a: 685b ldr r3, [r3, #4] + 8001e0c: f403 7282 and.w r2, r3, #260 ; 0x104 + 8001e10: 687b ldr r3, [r7, #4] + 8001e12: 689b ldr r3, [r3, #8] + 8001e14: f403 4304 and.w r3, r3, #33792 ; 0x8400 + 8001e18: 431a orrs r2, r3 + 8001e1a: 687b ldr r3, [r7, #4] + 8001e1c: 68db ldr r3, [r3, #12] + 8001e1e: f403 6300 and.w r3, r3, #2048 ; 0x800 + 8001e22: 431a orrs r2, r3 + 8001e24: 687b ldr r3, [r7, #4] + 8001e26: 691b ldr r3, [r3, #16] + 8001e28: f003 0302 and.w r3, r3, #2 + 8001e2c: 431a orrs r2, r3 + 8001e2e: 687b ldr r3, [r7, #4] + 8001e30: 695b ldr r3, [r3, #20] + 8001e32: f003 0301 and.w r3, r3, #1 + 8001e36: 431a orrs r2, r3 + 8001e38: 687b ldr r3, [r7, #4] + 8001e3a: 699b ldr r3, [r3, #24] + 8001e3c: f403 7300 and.w r3, r3, #512 ; 0x200 + 8001e40: 431a orrs r2, r3 + 8001e42: 687b ldr r3, [r7, #4] + 8001e44: 69db ldr r3, [r3, #28] + 8001e46: f003 0338 and.w r3, r3, #56 ; 0x38 + 8001e4a: 431a orrs r2, r3 + 8001e4c: 687b ldr r3, [r7, #4] + 8001e4e: 6a1b ldr r3, [r3, #32] + 8001e50: f003 0380 and.w r3, r3, #128 ; 0x80 + 8001e54: ea42 0103 orr.w r1, r2, r3 8001e58: 687b ldr r3, [r7, #4] - 8001e5a: 6a1b ldr r3, [r3, #32] - 8001e5c: f003 0380 and.w r3, r3, #128 ; 0x80 - 8001e60: ea42 0103 orr.w r1, r2, r3 - 8001e64: 687b ldr r3, [r7, #4] - 8001e66: 6a9b ldr r3, [r3, #40] ; 0x28 - 8001e68: f403 5200 and.w r2, r3, #8192 ; 0x2000 - 8001e6c: 687b ldr r3, [r7, #4] - 8001e6e: 681b ldr r3, [r3, #0] - 8001e70: 430a orrs r2, r1 - 8001e72: 601a str r2, [r3, #0] + 8001e5a: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001e5c: f403 5200 and.w r2, r3, #8192 ; 0x2000 + 8001e60: 687b ldr r3, [r7, #4] + 8001e62: 681b ldr r3, [r3, #0] + 8001e64: 430a orrs r2, r1 + 8001e66: 601a str r2, [r3, #0] (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); /* Configure : NSS management, TI Mode */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF))); - 8001e74: 687b ldr r3, [r7, #4] - 8001e76: 699b ldr r3, [r3, #24] - 8001e78: 0c1b lsrs r3, r3, #16 - 8001e7a: f003 0104 and.w r1, r3, #4 - 8001e7e: 687b ldr r3, [r7, #4] - 8001e80: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001e82: f003 0210 and.w r2, r3, #16 - 8001e86: 687b ldr r3, [r7, #4] - 8001e88: 681b ldr r3, [r3, #0] - 8001e8a: 430a orrs r2, r1 - 8001e8c: 605a str r2, [r3, #4] + 8001e68: 687b ldr r3, [r7, #4] + 8001e6a: 699b ldr r3, [r3, #24] + 8001e6c: 0c1b lsrs r3, r3, #16 + 8001e6e: f003 0104 and.w r1, r3, #4 + 8001e72: 687b ldr r3, [r7, #4] + 8001e74: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001e76: f003 0210 and.w r2, r3, #16 + 8001e7a: 687b ldr r3, [r7, #4] + 8001e7c: 681b ldr r3, [r3, #0] + 8001e7e: 430a orrs r2, r1 + 8001e80: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); - 8001e8e: 687b ldr r3, [r7, #4] - 8001e90: 681b ldr r3, [r3, #0] - 8001e92: 69da ldr r2, [r3, #28] - 8001e94: 687b ldr r3, [r7, #4] - 8001e96: 681b ldr r3, [r3, #0] - 8001e98: f422 6200 bic.w r2, r2, #2048 ; 0x800 - 8001e9c: 61da str r2, [r3, #28] + 8001e82: 687b ldr r3, [r7, #4] + 8001e84: 681b ldr r3, [r3, #0] + 8001e86: 69da ldr r2, [r3, #28] + 8001e88: 687b ldr r3, [r7, #4] + 8001e8a: 681b ldr r3, [r3, #0] + 8001e8c: f422 6200 bic.w r2, r2, #2048 ; 0x800 + 8001e90: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 8001e9e: 687b ldr r3, [r7, #4] - 8001ea0: 2200 movs r2, #0 - 8001ea2: 655a str r2, [r3, #84] ; 0x54 + 8001e92: 687b ldr r3, [r7, #4] + 8001e94: 2200 movs r2, #0 + 8001e96: 655a str r2, [r3, #84] ; 0x54 hspi->State = HAL_SPI_STATE_READY; - 8001ea4: 687b ldr r3, [r7, #4] - 8001ea6: 2201 movs r2, #1 - 8001ea8: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 8001e98: 687b ldr r3, [r7, #4] + 8001e9a: 2201 movs r2, #1 + 8001e9c: f883 2051 strb.w r2, [r3, #81] ; 0x51 return HAL_OK; - 8001eac: 2300 movs r3, #0 + 8001ea0: 2300 movs r3, #0 } - 8001eae: 4618 mov r0, r3 - 8001eb0: 3708 adds r7, #8 - 8001eb2: 46bd mov sp, r7 - 8001eb4: bd80 pop {r7, pc} + 8001ea2: 4618 mov r0, r3 + 8001ea4: 3708 adds r7, #8 + 8001ea6: 46bd mov sp, r7 + 8001ea8: bd80 pop {r7, pc} -08001eb6 : +08001eaa : * @param Size amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8001eb6: b580 push {r7, lr} - 8001eb8: b088 sub sp, #32 - 8001eba: af00 add r7, sp, #0 - 8001ebc: 60f8 str r0, [r7, #12] - 8001ebe: 60b9 str r1, [r7, #8] - 8001ec0: 603b str r3, [r7, #0] - 8001ec2: 4613 mov r3, r2 - 8001ec4: 80fb strh r3, [r7, #6] + 8001eaa: b580 push {r7, lr} + 8001eac: b088 sub sp, #32 + 8001eae: af00 add r7, sp, #0 + 8001eb0: 60f8 str r0, [r7, #12] + 8001eb2: 60b9 str r1, [r7, #8] + 8001eb4: 603b str r3, [r7, #0] + 8001eb6: 4613 mov r3, r2 + 8001eb8: 80fb strh r3, [r7, #6] uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; - 8001ec6: 2300 movs r3, #0 - 8001ec8: 77fb strb r3, [r7, #31] + 8001eba: 2300 movs r3, #0 + 8001ebc: 77fb strb r3, [r7, #31] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); - 8001eca: 68fb ldr r3, [r7, #12] - 8001ecc: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 8001ed0: 2b01 cmp r3, #1 - 8001ed2: d101 bne.n 8001ed8 - 8001ed4: 2302 movs r3, #2 - 8001ed6: e126 b.n 8002126 - 8001ed8: 68fb ldr r3, [r7, #12] - 8001eda: 2201 movs r2, #1 - 8001edc: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8001ebe: 68fb ldr r3, [r7, #12] + 8001ec0: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 8001ec4: 2b01 cmp r3, #1 + 8001ec6: d101 bne.n 8001ecc + 8001ec8: 2302 movs r3, #2 + 8001eca: e126 b.n 800211a + 8001ecc: 68fb ldr r3, [r7, #12] + 8001ece: 2201 movs r2, #1 + 8001ed0: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - 8001ee0: f7ff f898 bl 8001014 - 8001ee4: 61b8 str r0, [r7, #24] + 8001ed4: f7ff f898 bl 8001008 + 8001ed8: 61b8 str r0, [r7, #24] initial_TxXferCount = Size; - 8001ee6: 88fb ldrh r3, [r7, #6] - 8001ee8: 82fb strh r3, [r7, #22] + 8001eda: 88fb ldrh r3, [r7, #6] + 8001edc: 82fb strh r3, [r7, #22] if (hspi->State != HAL_SPI_STATE_READY) - 8001eea: 68fb ldr r3, [r7, #12] - 8001eec: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 - 8001ef0: b2db uxtb r3, r3 - 8001ef2: 2b01 cmp r3, #1 - 8001ef4: d002 beq.n 8001efc + 8001ede: 68fb ldr r3, [r7, #12] + 8001ee0: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 + 8001ee4: b2db uxtb r3, r3 + 8001ee6: 2b01 cmp r3, #1 + 8001ee8: d002 beq.n 8001ef0 { errorcode = HAL_BUSY; - 8001ef6: 2302 movs r3, #2 - 8001ef8: 77fb strb r3, [r7, #31] + 8001eea: 2302 movs r3, #2 + 8001eec: 77fb strb r3, [r7, #31] goto error; - 8001efa: e10b b.n 8002114 + 8001eee: e10b b.n 8002108 } if ((pData == NULL) || (Size == 0U)) - 8001efc: 68bb ldr r3, [r7, #8] - 8001efe: 2b00 cmp r3, #0 - 8001f00: d002 beq.n 8001f08 - 8001f02: 88fb ldrh r3, [r7, #6] - 8001f04: 2b00 cmp r3, #0 - 8001f06: d102 bne.n 8001f0e + 8001ef0: 68bb ldr r3, [r7, #8] + 8001ef2: 2b00 cmp r3, #0 + 8001ef4: d002 beq.n 8001efc + 8001ef6: 88fb ldrh r3, [r7, #6] + 8001ef8: 2b00 cmp r3, #0 + 8001efa: d102 bne.n 8001f02 { errorcode = HAL_ERROR; - 8001f08: 2301 movs r3, #1 - 8001f0a: 77fb strb r3, [r7, #31] + 8001efc: 2301 movs r3, #1 + 8001efe: 77fb strb r3, [r7, #31] goto error; - 8001f0c: e102 b.n 8002114 + 8001f00: e102 b.n 8002108 } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; - 8001f0e: 68fb ldr r3, [r7, #12] - 8001f10: 2203 movs r2, #3 - 8001f12: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 8001f02: 68fb ldr r3, [r7, #12] + 8001f04: 2203 movs r2, #3 + 8001f06: f883 2051 strb.w r2, [r3, #81] ; 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 8001f16: 68fb ldr r3, [r7, #12] - 8001f18: 2200 movs r2, #0 - 8001f1a: 655a str r2, [r3, #84] ; 0x54 + 8001f0a: 68fb ldr r3, [r7, #12] + 8001f0c: 2200 movs r2, #0 + 8001f0e: 655a str r2, [r3, #84] ; 0x54 hspi->pTxBuffPtr = (uint8_t *)pData; - 8001f1c: 68fb ldr r3, [r7, #12] - 8001f1e: 68ba ldr r2, [r7, #8] - 8001f20: 631a str r2, [r3, #48] ; 0x30 + 8001f10: 68fb ldr r3, [r7, #12] + 8001f12: 68ba ldr r2, [r7, #8] + 8001f14: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferSize = Size; - 8001f22: 68fb ldr r3, [r7, #12] - 8001f24: 88fa ldrh r2, [r7, #6] - 8001f26: 869a strh r2, [r3, #52] ; 0x34 + 8001f16: 68fb ldr r3, [r7, #12] + 8001f18: 88fa ldrh r2, [r7, #6] + 8001f1a: 869a strh r2, [r3, #52] ; 0x34 hspi->TxXferCount = Size; - 8001f28: 68fb ldr r3, [r7, #12] - 8001f2a: 88fa ldrh r2, [r7, #6] - 8001f2c: 86da strh r2, [r3, #54] ; 0x36 + 8001f1c: 68fb ldr r3, [r7, #12] + 8001f1e: 88fa ldrh r2, [r7, #6] + 8001f20: 86da strh r2, [r3, #54] ; 0x36 /*Init field not used in handle to zero */ hspi->pRxBuffPtr = (uint8_t *)NULL; + 8001f22: 68fb ldr r3, [r7, #12] + 8001f24: 2200 movs r2, #0 + 8001f26: 639a str r2, [r3, #56] ; 0x38 + hspi->RxXferSize = 0U; + 8001f28: 68fb ldr r3, [r7, #12] + 8001f2a: 2200 movs r2, #0 + 8001f2c: 879a strh r2, [r3, #60] ; 0x3c + hspi->RxXferCount = 0U; 8001f2e: 68fb ldr r3, [r7, #12] 8001f30: 2200 movs r2, #0 - 8001f32: 639a str r2, [r3, #56] ; 0x38 - hspi->RxXferSize = 0U; + 8001f32: 87da strh r2, [r3, #62] ; 0x3e + hspi->TxISR = NULL; 8001f34: 68fb ldr r3, [r7, #12] 8001f36: 2200 movs r2, #0 - 8001f38: 879a strh r2, [r3, #60] ; 0x3c - hspi->RxXferCount = 0U; + 8001f38: 645a str r2, [r3, #68] ; 0x44 + hspi->RxISR = NULL; 8001f3a: 68fb ldr r3, [r7, #12] 8001f3c: 2200 movs r2, #0 - 8001f3e: 87da strh r2, [r3, #62] ; 0x3e - hspi->TxISR = NULL; - 8001f40: 68fb ldr r3, [r7, #12] - 8001f42: 2200 movs r2, #0 - 8001f44: 645a str r2, [r3, #68] ; 0x44 - hspi->RxISR = NULL; - 8001f46: 68fb ldr r3, [r7, #12] - 8001f48: 2200 movs r2, #0 - 8001f4a: 641a str r2, [r3, #64] ; 0x40 + 8001f3e: 641a str r2, [r3, #64] ; 0x40 /* Configure communication direction : 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - 8001f4c: 68fb ldr r3, [r7, #12] - 8001f4e: 689b ldr r3, [r3, #8] - 8001f50: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8001f54: d10f bne.n 8001f76 + 8001f40: 68fb ldr r3, [r7, #12] + 8001f42: 689b ldr r3, [r3, #8] + 8001f44: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8001f48: d10f bne.n 8001f6a { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); - 8001f56: 68fb ldr r3, [r7, #12] - 8001f58: 681b ldr r3, [r3, #0] - 8001f5a: 681a ldr r2, [r3, #0] - 8001f5c: 68fb ldr r3, [r7, #12] - 8001f5e: 681b ldr r3, [r3, #0] - 8001f60: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8001f64: 601a str r2, [r3, #0] + 8001f4a: 68fb ldr r3, [r7, #12] + 8001f4c: 681b ldr r3, [r3, #0] + 8001f4e: 681a ldr r2, [r3, #0] + 8001f50: 68fb ldr r3, [r7, #12] + 8001f52: 681b ldr r3, [r3, #0] + 8001f54: f022 0240 bic.w r2, r2, #64 ; 0x40 + 8001f58: 601a str r2, [r3, #0] SPI_1LINE_TX(hspi); - 8001f66: 68fb ldr r3, [r7, #12] - 8001f68: 681b ldr r3, [r3, #0] - 8001f6a: 681a ldr r2, [r3, #0] - 8001f6c: 68fb ldr r3, [r7, #12] - 8001f6e: 681b ldr r3, [r3, #0] - 8001f70: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 8001f74: 601a str r2, [r3, #0] + 8001f5a: 68fb ldr r3, [r7, #12] + 8001f5c: 681b ldr r3, [r3, #0] + 8001f5e: 681a ldr r2, [r3, #0] + 8001f60: 68fb ldr r3, [r7, #12] + 8001f62: 681b ldr r3, [r3, #0] + 8001f64: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 8001f68: 601a str r2, [r3, #0] SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - 8001f76: 68fb ldr r3, [r7, #12] - 8001f78: 681b ldr r3, [r3, #0] - 8001f7a: 681b ldr r3, [r3, #0] - 8001f7c: f003 0340 and.w r3, r3, #64 ; 0x40 - 8001f80: 2b40 cmp r3, #64 ; 0x40 - 8001f82: d007 beq.n 8001f94 + 8001f6a: 68fb ldr r3, [r7, #12] + 8001f6c: 681b ldr r3, [r3, #0] + 8001f6e: 681b ldr r3, [r3, #0] + 8001f70: f003 0340 and.w r3, r3, #64 ; 0x40 + 8001f74: 2b40 cmp r3, #64 ; 0x40 + 8001f76: d007 beq.n 8001f88 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); - 8001f84: 68fb ldr r3, [r7, #12] - 8001f86: 681b ldr r3, [r3, #0] - 8001f88: 681a ldr r2, [r3, #0] - 8001f8a: 68fb ldr r3, [r7, #12] - 8001f8c: 681b ldr r3, [r3, #0] - 8001f8e: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8001f92: 601a str r2, [r3, #0] + 8001f78: 68fb ldr r3, [r7, #12] + 8001f7a: 681b ldr r3, [r3, #0] + 8001f7c: 681a ldr r2, [r3, #0] + 8001f7e: 68fb ldr r3, [r7, #12] + 8001f80: 681b ldr r3, [r3, #0] + 8001f82: f042 0240 orr.w r2, r2, #64 ; 0x40 + 8001f86: 601a str r2, [r3, #0] } /* Transmit data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) - 8001f94: 68fb ldr r3, [r7, #12] - 8001f96: 68db ldr r3, [r3, #12] - 8001f98: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 8001f9c: d14b bne.n 8002036 + 8001f88: 68fb ldr r3, [r7, #12] + 8001f8a: 68db ldr r3, [r3, #12] + 8001f8c: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8001f90: d14b bne.n 800202a { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 8001f9e: 68fb ldr r3, [r7, #12] - 8001fa0: 685b ldr r3, [r3, #4] - 8001fa2: 2b00 cmp r3, #0 - 8001fa4: d002 beq.n 8001fac - 8001fa6: 8afb ldrh r3, [r7, #22] - 8001fa8: 2b01 cmp r3, #1 - 8001faa: d13e bne.n 800202a + 8001f92: 68fb ldr r3, [r7, #12] + 8001f94: 685b ldr r3, [r3, #4] + 8001f96: 2b00 cmp r3, #0 + 8001f98: d002 beq.n 8001fa0 + 8001f9a: 8afb ldrh r3, [r7, #22] + 8001f9c: 2b01 cmp r3, #1 + 8001f9e: d13e bne.n 800201e { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 8001fa0: 68fb ldr r3, [r7, #12] + 8001fa2: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001fa4: 881a ldrh r2, [r3, #0] + 8001fa6: 68fb ldr r3, [r7, #12] + 8001fa8: 681b ldr r3, [r3, #0] + 8001faa: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); 8001fac: 68fb ldr r3, [r7, #12] 8001fae: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001fb0: 881a ldrh r2, [r3, #0] + 8001fb0: 1c9a adds r2, r3, #2 8001fb2: 68fb ldr r3, [r7, #12] - 8001fb4: 681b ldr r3, [r3, #0] - 8001fb6: 60da str r2, [r3, #12] - hspi->pTxBuffPtr += sizeof(uint16_t); - 8001fb8: 68fb ldr r3, [r7, #12] - 8001fba: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001fbc: 1c9a adds r2, r3, #2 - 8001fbe: 68fb ldr r3, [r7, #12] - 8001fc0: 631a str r2, [r3, #48] ; 0x30 + 8001fb4: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 8001fc2: 68fb ldr r3, [r7, #12] - 8001fc4: 8edb ldrh r3, [r3, #54] ; 0x36 - 8001fc6: b29b uxth r3, r3 - 8001fc8: 3b01 subs r3, #1 - 8001fca: b29a uxth r2, r3 - 8001fcc: 68fb ldr r3, [r7, #12] - 8001fce: 86da strh r2, [r3, #54] ; 0x36 + 8001fb6: 68fb ldr r3, [r7, #12] + 8001fb8: 8edb ldrh r3, [r3, #54] ; 0x36 + 8001fba: b29b uxth r3, r3 + 8001fbc: 3b01 subs r3, #1 + 8001fbe: b29a uxth r2, r3 + 8001fc0: 68fb ldr r3, [r7, #12] + 8001fc2: 86da strh r2, [r3, #54] ; 0x36 } /* Transmit data in 16 Bit mode */ while (hspi->TxXferCount > 0U) - 8001fd0: e02b b.n 800202a + 8001fc4: e02b b.n 800201e { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) - 8001fd2: 68fb ldr r3, [r7, #12] - 8001fd4: 681b ldr r3, [r3, #0] - 8001fd6: 689b ldr r3, [r3, #8] - 8001fd8: f003 0302 and.w r3, r3, #2 - 8001fdc: 2b02 cmp r3, #2 - 8001fde: d112 bne.n 8002006 + 8001fc6: 68fb ldr r3, [r7, #12] + 8001fc8: 681b ldr r3, [r3, #0] + 8001fca: 689b ldr r3, [r3, #8] + 8001fcc: f003 0302 and.w r3, r3, #2 + 8001fd0: 2b02 cmp r3, #2 + 8001fd2: d112 bne.n 8001ffa { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 8001fd4: 68fb ldr r3, [r7, #12] + 8001fd6: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001fd8: 881a ldrh r2, [r3, #0] + 8001fda: 68fb ldr r3, [r7, #12] + 8001fdc: 681b ldr r3, [r3, #0] + 8001fde: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); 8001fe0: 68fb ldr r3, [r7, #12] 8001fe2: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001fe4: 881a ldrh r2, [r3, #0] + 8001fe4: 1c9a adds r2, r3, #2 8001fe6: 68fb ldr r3, [r7, #12] - 8001fe8: 681b ldr r3, [r3, #0] - 8001fea: 60da str r2, [r3, #12] - hspi->pTxBuffPtr += sizeof(uint16_t); - 8001fec: 68fb ldr r3, [r7, #12] - 8001fee: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001ff0: 1c9a adds r2, r3, #2 - 8001ff2: 68fb ldr r3, [r7, #12] - 8001ff4: 631a str r2, [r3, #48] ; 0x30 + 8001fe8: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 8001ff6: 68fb ldr r3, [r7, #12] - 8001ff8: 8edb ldrh r3, [r3, #54] ; 0x36 - 8001ffa: b29b uxth r3, r3 - 8001ffc: 3b01 subs r3, #1 - 8001ffe: b29a uxth r2, r3 - 8002000: 68fb ldr r3, [r7, #12] - 8002002: 86da strh r2, [r3, #54] ; 0x36 - 8002004: e011 b.n 800202a + 8001fea: 68fb ldr r3, [r7, #12] + 8001fec: 8edb ldrh r3, [r3, #54] ; 0x36 + 8001fee: b29b uxth r3, r3 + 8001ff0: 3b01 subs r3, #1 + 8001ff2: b29a uxth r2, r3 + 8001ff4: 68fb ldr r3, [r7, #12] + 8001ff6: 86da strh r2, [r3, #54] ; 0x36 + 8001ff8: e011 b.n 800201e } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 8002006: f7ff f805 bl 8001014 - 800200a: 4602 mov r2, r0 - 800200c: 69bb ldr r3, [r7, #24] - 800200e: 1ad3 subs r3, r2, r3 - 8002010: 683a ldr r2, [r7, #0] - 8002012: 429a cmp r2, r3 - 8002014: d803 bhi.n 800201e - 8002016: 683b ldr r3, [r7, #0] - 8002018: f1b3 3fff cmp.w r3, #4294967295 - 800201c: d102 bne.n 8002024 - 800201e: 683b ldr r3, [r7, #0] - 8002020: 2b00 cmp r3, #0 - 8002022: d102 bne.n 800202a + 8001ffa: f7ff f805 bl 8001008 + 8001ffe: 4602 mov r2, r0 + 8002000: 69bb ldr r3, [r7, #24] + 8002002: 1ad3 subs r3, r2, r3 + 8002004: 683a ldr r2, [r7, #0] + 8002006: 429a cmp r2, r3 + 8002008: d803 bhi.n 8002012 + 800200a: 683b ldr r3, [r7, #0] + 800200c: f1b3 3fff cmp.w r3, #4294967295 + 8002010: d102 bne.n 8002018 + 8002012: 683b ldr r3, [r7, #0] + 8002014: 2b00 cmp r3, #0 + 8002016: d102 bne.n 800201e { errorcode = HAL_TIMEOUT; - 8002024: 2303 movs r3, #3 - 8002026: 77fb strb r3, [r7, #31] + 8002018: 2303 movs r3, #3 + 800201a: 77fb strb r3, [r7, #31] goto error; - 8002028: e074 b.n 8002114 + 800201c: e074 b.n 8002108 while (hspi->TxXferCount > 0U) - 800202a: 68fb ldr r3, [r7, #12] - 800202c: 8edb ldrh r3, [r3, #54] ; 0x36 - 800202e: b29b uxth r3, r3 - 8002030: 2b00 cmp r3, #0 - 8002032: d1ce bne.n 8001fd2 - 8002034: e04c b.n 80020d0 + 800201e: 68fb ldr r3, [r7, #12] + 8002020: 8edb ldrh r3, [r3, #54] ; 0x36 + 8002022: b29b uxth r3, r3 + 8002024: 2b00 cmp r3, #0 + 8002026: d1ce bne.n 8001fc6 + 8002028: e04c b.n 80020c4 } } /* Transmit data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 8002036: 68fb ldr r3, [r7, #12] - 8002038: 685b ldr r3, [r3, #4] - 800203a: 2b00 cmp r3, #0 - 800203c: d002 beq.n 8002044 - 800203e: 8afb ldrh r3, [r7, #22] - 8002040: 2b01 cmp r3, #1 - 8002042: d140 bne.n 80020c6 + 800202a: 68fb ldr r3, [r7, #12] + 800202c: 685b ldr r3, [r3, #4] + 800202e: 2b00 cmp r3, #0 + 8002030: d002 beq.n 8002038 + 8002032: 8afb ldrh r3, [r7, #22] + 8002034: 2b01 cmp r3, #1 + 8002036: d140 bne.n 80020ba { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - 8002044: 68fb ldr r3, [r7, #12] - 8002046: 6b1a ldr r2, [r3, #48] ; 0x30 - 8002048: 68fb ldr r3, [r7, #12] - 800204a: 681b ldr r3, [r3, #0] - 800204c: 330c adds r3, #12 - 800204e: 7812 ldrb r2, [r2, #0] - 8002050: 701a strb r2, [r3, #0] + 8002038: 68fb ldr r3, [r7, #12] + 800203a: 6b1a ldr r2, [r3, #48] ; 0x30 + 800203c: 68fb ldr r3, [r7, #12] + 800203e: 681b ldr r3, [r3, #0] + 8002040: 330c adds r3, #12 + 8002042: 7812 ldrb r2, [r2, #0] + 8002044: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); - 8002052: 68fb ldr r3, [r7, #12] - 8002054: 6b1b ldr r3, [r3, #48] ; 0x30 - 8002056: 1c5a adds r2, r3, #1 - 8002058: 68fb ldr r3, [r7, #12] - 800205a: 631a str r2, [r3, #48] ; 0x30 + 8002046: 68fb ldr r3, [r7, #12] + 8002048: 6b1b ldr r3, [r3, #48] ; 0x30 + 800204a: 1c5a adds r2, r3, #1 + 800204c: 68fb ldr r3, [r7, #12] + 800204e: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 800205c: 68fb ldr r3, [r7, #12] - 800205e: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002060: b29b uxth r3, r3 - 8002062: 3b01 subs r3, #1 - 8002064: b29a uxth r2, r3 - 8002066: 68fb ldr r3, [r7, #12] - 8002068: 86da strh r2, [r3, #54] ; 0x36 + 8002050: 68fb ldr r3, [r7, #12] + 8002052: 8edb ldrh r3, [r3, #54] ; 0x36 + 8002054: b29b uxth r3, r3 + 8002056: 3b01 subs r3, #1 + 8002058: b29a uxth r2, r3 + 800205a: 68fb ldr r3, [r7, #12] + 800205c: 86da strh r2, [r3, #54] ; 0x36 } while (hspi->TxXferCount > 0U) - 800206a: e02c b.n 80020c6 + 800205e: e02c b.n 80020ba { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) - 800206c: 68fb ldr r3, [r7, #12] - 800206e: 681b ldr r3, [r3, #0] - 8002070: 689b ldr r3, [r3, #8] - 8002072: f003 0302 and.w r3, r3, #2 - 8002076: 2b02 cmp r3, #2 - 8002078: d113 bne.n 80020a2 + 8002060: 68fb ldr r3, [r7, #12] + 8002062: 681b ldr r3, [r3, #0] + 8002064: 689b ldr r3, [r3, #8] + 8002066: f003 0302 and.w r3, r3, #2 + 800206a: 2b02 cmp r3, #2 + 800206c: d113 bne.n 8002096 { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - 800207a: 68fb ldr r3, [r7, #12] - 800207c: 6b1a ldr r2, [r3, #48] ; 0x30 - 800207e: 68fb ldr r3, [r7, #12] - 8002080: 681b ldr r3, [r3, #0] - 8002082: 330c adds r3, #12 - 8002084: 7812 ldrb r2, [r2, #0] - 8002086: 701a strb r2, [r3, #0] + 800206e: 68fb ldr r3, [r7, #12] + 8002070: 6b1a ldr r2, [r3, #48] ; 0x30 + 8002072: 68fb ldr r3, [r7, #12] + 8002074: 681b ldr r3, [r3, #0] + 8002076: 330c adds r3, #12 + 8002078: 7812 ldrb r2, [r2, #0] + 800207a: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); - 8002088: 68fb ldr r3, [r7, #12] - 800208a: 6b1b ldr r3, [r3, #48] ; 0x30 - 800208c: 1c5a adds r2, r3, #1 - 800208e: 68fb ldr r3, [r7, #12] - 8002090: 631a str r2, [r3, #48] ; 0x30 + 800207c: 68fb ldr r3, [r7, #12] + 800207e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002080: 1c5a adds r2, r3, #1 + 8002082: 68fb ldr r3, [r7, #12] + 8002084: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 8002092: 68fb ldr r3, [r7, #12] - 8002094: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002096: b29b uxth r3, r3 - 8002098: 3b01 subs r3, #1 - 800209a: b29a uxth r2, r3 - 800209c: 68fb ldr r3, [r7, #12] - 800209e: 86da strh r2, [r3, #54] ; 0x36 - 80020a0: e011 b.n 80020c6 + 8002086: 68fb ldr r3, [r7, #12] + 8002088: 8edb ldrh r3, [r3, #54] ; 0x36 + 800208a: b29b uxth r3, r3 + 800208c: 3b01 subs r3, #1 + 800208e: b29a uxth r2, r3 + 8002090: 68fb ldr r3, [r7, #12] + 8002092: 86da strh r2, [r3, #54] ; 0x36 + 8002094: e011 b.n 80020ba } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 80020a2: f7fe ffb7 bl 8001014 - 80020a6: 4602 mov r2, r0 - 80020a8: 69bb ldr r3, [r7, #24] - 80020aa: 1ad3 subs r3, r2, r3 - 80020ac: 683a ldr r2, [r7, #0] - 80020ae: 429a cmp r2, r3 - 80020b0: d803 bhi.n 80020ba - 80020b2: 683b ldr r3, [r7, #0] - 80020b4: f1b3 3fff cmp.w r3, #4294967295 - 80020b8: d102 bne.n 80020c0 - 80020ba: 683b ldr r3, [r7, #0] - 80020bc: 2b00 cmp r3, #0 - 80020be: d102 bne.n 80020c6 + 8002096: f7fe ffb7 bl 8001008 + 800209a: 4602 mov r2, r0 + 800209c: 69bb ldr r3, [r7, #24] + 800209e: 1ad3 subs r3, r2, r3 + 80020a0: 683a ldr r2, [r7, #0] + 80020a2: 429a cmp r2, r3 + 80020a4: d803 bhi.n 80020ae + 80020a6: 683b ldr r3, [r7, #0] + 80020a8: f1b3 3fff cmp.w r3, #4294967295 + 80020ac: d102 bne.n 80020b4 + 80020ae: 683b ldr r3, [r7, #0] + 80020b0: 2b00 cmp r3, #0 + 80020b2: d102 bne.n 80020ba { errorcode = HAL_TIMEOUT; - 80020c0: 2303 movs r3, #3 - 80020c2: 77fb strb r3, [r7, #31] + 80020b4: 2303 movs r3, #3 + 80020b6: 77fb strb r3, [r7, #31] goto error; - 80020c4: e026 b.n 8002114 + 80020b8: e026 b.n 8002108 while (hspi->TxXferCount > 0U) - 80020c6: 68fb ldr r3, [r7, #12] - 80020c8: 8edb ldrh r3, [r3, #54] ; 0x36 - 80020ca: b29b uxth r3, r3 - 80020cc: 2b00 cmp r3, #0 - 80020ce: d1cd bne.n 800206c + 80020ba: 68fb ldr r3, [r7, #12] + 80020bc: 8edb ldrh r3, [r3, #54] ; 0x36 + 80020be: b29b uxth r3, r3 + 80020c0: 2b00 cmp r3, #0 + 80020c2: d1cd bne.n 8002060 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) - 80020d0: 69ba ldr r2, [r7, #24] - 80020d2: 6839 ldr r1, [r7, #0] - 80020d4: 68f8 ldr r0, [r7, #12] - 80020d6: f000 fbcb bl 8002870 - 80020da: 4603 mov r3, r0 - 80020dc: 2b00 cmp r3, #0 - 80020de: d002 beq.n 80020e6 + 80020c4: 69ba ldr r2, [r7, #24] + 80020c6: 6839 ldr r1, [r7, #0] + 80020c8: 68f8 ldr r0, [r7, #12] + 80020ca: f000 fbcb bl 8002864 + 80020ce: 4603 mov r3, r0 + 80020d0: 2b00 cmp r3, #0 + 80020d2: d002 beq.n 80020da { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - 80020e0: 68fb ldr r3, [r7, #12] - 80020e2: 2220 movs r2, #32 - 80020e4: 655a str r2, [r3, #84] ; 0x54 + 80020d4: 68fb ldr r3, [r7, #12] + 80020d6: 2220 movs r2, #32 + 80020d8: 655a str r2, [r3, #84] ; 0x54 } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - 80020e6: 68fb ldr r3, [r7, #12] - 80020e8: 689b ldr r3, [r3, #8] - 80020ea: 2b00 cmp r3, #0 - 80020ec: d10a bne.n 8002104 + 80020da: 68fb ldr r3, [r7, #12] + 80020dc: 689b ldr r3, [r3, #8] + 80020de: 2b00 cmp r3, #0 + 80020e0: d10a bne.n 80020f8 { __HAL_SPI_CLEAR_OVRFLAG(hspi); - 80020ee: 2300 movs r3, #0 - 80020f0: 613b str r3, [r7, #16] - 80020f2: 68fb ldr r3, [r7, #12] - 80020f4: 681b ldr r3, [r3, #0] - 80020f6: 68db ldr r3, [r3, #12] - 80020f8: 613b str r3, [r7, #16] - 80020fa: 68fb ldr r3, [r7, #12] - 80020fc: 681b ldr r3, [r3, #0] - 80020fe: 689b ldr r3, [r3, #8] - 8002100: 613b str r3, [r7, #16] - 8002102: 693b ldr r3, [r7, #16] + 80020e2: 2300 movs r3, #0 + 80020e4: 613b str r3, [r7, #16] + 80020e6: 68fb ldr r3, [r7, #12] + 80020e8: 681b ldr r3, [r3, #0] + 80020ea: 68db ldr r3, [r3, #12] + 80020ec: 613b str r3, [r7, #16] + 80020ee: 68fb ldr r3, [r7, #12] + 80020f0: 681b ldr r3, [r3, #0] + 80020f2: 689b ldr r3, [r3, #8] + 80020f4: 613b str r3, [r7, #16] + 80020f6: 693b ldr r3, [r7, #16] } if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - 8002104: 68fb ldr r3, [r7, #12] - 8002106: 6d5b ldr r3, [r3, #84] ; 0x54 - 8002108: 2b00 cmp r3, #0 - 800210a: d002 beq.n 8002112 + 80020f8: 68fb ldr r3, [r7, #12] + 80020fa: 6d5b ldr r3, [r3, #84] ; 0x54 + 80020fc: 2b00 cmp r3, #0 + 80020fe: d002 beq.n 8002106 { errorcode = HAL_ERROR; - 800210c: 2301 movs r3, #1 - 800210e: 77fb strb r3, [r7, #31] - 8002110: e000 b.n 8002114 + 8002100: 2301 movs r3, #1 + 8002102: 77fb strb r3, [r7, #31] + 8002104: e000 b.n 8002108 } error: - 8002112: bf00 nop + 8002106: bf00 nop hspi->State = HAL_SPI_STATE_READY; - 8002114: 68fb ldr r3, [r7, #12] - 8002116: 2201 movs r2, #1 - 8002118: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 8002108: 68fb ldr r3, [r7, #12] + 800210a: 2201 movs r2, #1 + 800210c: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); - 800211c: 68fb ldr r3, [r7, #12] - 800211e: 2200 movs r2, #0 - 8002120: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8002110: 68fb ldr r3, [r7, #12] + 8002112: 2200 movs r2, #0 + 8002114: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; - 8002124: 7ffb ldrb r3, [r7, #31] + 8002118: 7ffb ldrb r3, [r7, #31] } - 8002126: 4618 mov r0, r3 - 8002128: 3720 adds r7, #32 - 800212a: 46bd mov sp, r7 - 800212c: bd80 pop {r7, pc} + 800211a: 4618 mov r0, r3 + 800211c: 3720 adds r7, #32 + 800211e: 46bd mov sp, r7 + 8002120: bd80 pop {r7, pc} -0800212e : +08002122 : * @param Size amount of data to be received * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 800212e: b580 push {r7, lr} - 8002130: b088 sub sp, #32 - 8002132: af02 add r7, sp, #8 - 8002134: 60f8 str r0, [r7, #12] - 8002136: 60b9 str r1, [r7, #8] - 8002138: 603b str r3, [r7, #0] - 800213a: 4613 mov r3, r2 - 800213c: 80fb strh r3, [r7, #6] + 8002122: b580 push {r7, lr} + 8002124: b088 sub sp, #32 + 8002126: af02 add r7, sp, #8 + 8002128: 60f8 str r0, [r7, #12] + 800212a: 60b9 str r1, [r7, #8] + 800212c: 603b str r3, [r7, #0] + 800212e: 4613 mov r3, r2 + 8002130: 80fb strh r3, [r7, #6] #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; #endif /* USE_SPI_CRC */ uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; - 800213e: 2300 movs r3, #0 - 8002140: 75fb strb r3, [r7, #23] + 8002132: 2300 movs r3, #0 + 8002134: 75fb strb r3, [r7, #23] if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) - 8002142: 68fb ldr r3, [r7, #12] - 8002144: 685b ldr r3, [r3, #4] - 8002146: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 800214a: d112 bne.n 8002172 - 800214c: 68fb ldr r3, [r7, #12] - 800214e: 689b ldr r3, [r3, #8] - 8002150: 2b00 cmp r3, #0 - 8002152: d10e bne.n 8002172 + 8002136: 68fb ldr r3, [r7, #12] + 8002138: 685b ldr r3, [r3, #4] + 800213a: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 800213e: d112 bne.n 8002166 + 8002140: 68fb ldr r3, [r7, #12] + 8002142: 689b ldr r3, [r3, #8] + 8002144: 2b00 cmp r3, #0 + 8002146: d10e bne.n 8002166 { hspi->State = HAL_SPI_STATE_BUSY_RX; - 8002154: 68fb ldr r3, [r7, #12] - 8002156: 2204 movs r2, #4 - 8002158: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 8002148: 68fb ldr r3, [r7, #12] + 800214a: 2204 movs r2, #4 + 800214c: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); - 800215c: 88fa ldrh r2, [r7, #6] - 800215e: 683b ldr r3, [r7, #0] - 8002160: 9300 str r3, [sp, #0] - 8002162: 4613 mov r3, r2 - 8002164: 68ba ldr r2, [r7, #8] - 8002166: 68b9 ldr r1, [r7, #8] - 8002168: 68f8 ldr r0, [r7, #12] - 800216a: f000 f8f1 bl 8002350 - 800216e: 4603 mov r3, r0 - 8002170: e0ea b.n 8002348 + 8002150: 88fa ldrh r2, [r7, #6] + 8002152: 683b ldr r3, [r7, #0] + 8002154: 9300 str r3, [sp, #0] + 8002156: 4613 mov r3, r2 + 8002158: 68ba ldr r2, [r7, #8] + 800215a: 68b9 ldr r1, [r7, #8] + 800215c: 68f8 ldr r0, [r7, #12] + 800215e: f000 f8f1 bl 8002344 + 8002162: 4603 mov r3, r0 + 8002164: e0ea b.n 800233c } /* Process Locked */ __HAL_LOCK(hspi); - 8002172: 68fb ldr r3, [r7, #12] - 8002174: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 8002178: 2b01 cmp r3, #1 - 800217a: d101 bne.n 8002180 - 800217c: 2302 movs r3, #2 - 800217e: e0e3 b.n 8002348 - 8002180: 68fb ldr r3, [r7, #12] - 8002182: 2201 movs r2, #1 - 8002184: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8002166: 68fb ldr r3, [r7, #12] + 8002168: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 800216c: 2b01 cmp r3, #1 + 800216e: d101 bne.n 8002174 + 8002170: 2302 movs r3, #2 + 8002172: e0e3 b.n 800233c + 8002174: 68fb ldr r3, [r7, #12] + 8002176: 2201 movs r2, #1 + 8002178: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - 8002188: f7fe ff44 bl 8001014 - 800218c: 6138 str r0, [r7, #16] + 800217c: f7fe ff44 bl 8001008 + 8002180: 6138 str r0, [r7, #16] if (hspi->State != HAL_SPI_STATE_READY) - 800218e: 68fb ldr r3, [r7, #12] - 8002190: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 - 8002194: b2db uxtb r3, r3 - 8002196: 2b01 cmp r3, #1 - 8002198: d002 beq.n 80021a0 + 8002182: 68fb ldr r3, [r7, #12] + 8002184: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 + 8002188: b2db uxtb r3, r3 + 800218a: 2b01 cmp r3, #1 + 800218c: d002 beq.n 8002194 { errorcode = HAL_BUSY; - 800219a: 2302 movs r3, #2 - 800219c: 75fb strb r3, [r7, #23] + 800218e: 2302 movs r3, #2 + 8002190: 75fb strb r3, [r7, #23] goto error; - 800219e: e0ca b.n 8002336 + 8002192: e0ca b.n 800232a } if ((pData == NULL) || (Size == 0U)) - 80021a0: 68bb ldr r3, [r7, #8] - 80021a2: 2b00 cmp r3, #0 - 80021a4: d002 beq.n 80021ac - 80021a6: 88fb ldrh r3, [r7, #6] - 80021a8: 2b00 cmp r3, #0 - 80021aa: d102 bne.n 80021b2 + 8002194: 68bb ldr r3, [r7, #8] + 8002196: 2b00 cmp r3, #0 + 8002198: d002 beq.n 80021a0 + 800219a: 88fb ldrh r3, [r7, #6] + 800219c: 2b00 cmp r3, #0 + 800219e: d102 bne.n 80021a6 { errorcode = HAL_ERROR; - 80021ac: 2301 movs r3, #1 - 80021ae: 75fb strb r3, [r7, #23] + 80021a0: 2301 movs r3, #1 + 80021a2: 75fb strb r3, [r7, #23] goto error; - 80021b0: e0c1 b.n 8002336 + 80021a4: e0c1 b.n 800232a } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; - 80021b2: 68fb ldr r3, [r7, #12] - 80021b4: 2204 movs r2, #4 - 80021b6: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 80021a6: 68fb ldr r3, [r7, #12] + 80021a8: 2204 movs r2, #4 + 80021aa: f883 2051 strb.w r2, [r3, #81] ; 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 80021ba: 68fb ldr r3, [r7, #12] - 80021bc: 2200 movs r2, #0 - 80021be: 655a str r2, [r3, #84] ; 0x54 + 80021ae: 68fb ldr r3, [r7, #12] + 80021b0: 2200 movs r2, #0 + 80021b2: 655a str r2, [r3, #84] ; 0x54 hspi->pRxBuffPtr = (uint8_t *)pData; - 80021c0: 68fb ldr r3, [r7, #12] - 80021c2: 68ba ldr r2, [r7, #8] - 80021c4: 639a str r2, [r3, #56] ; 0x38 + 80021b4: 68fb ldr r3, [r7, #12] + 80021b6: 68ba ldr r2, [r7, #8] + 80021b8: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferSize = Size; - 80021c6: 68fb ldr r3, [r7, #12] - 80021c8: 88fa ldrh r2, [r7, #6] - 80021ca: 879a strh r2, [r3, #60] ; 0x3c + 80021ba: 68fb ldr r3, [r7, #12] + 80021bc: 88fa ldrh r2, [r7, #6] + 80021be: 879a strh r2, [r3, #60] ; 0x3c hspi->RxXferCount = Size; - 80021cc: 68fb ldr r3, [r7, #12] - 80021ce: 88fa ldrh r2, [r7, #6] - 80021d0: 87da strh r2, [r3, #62] ; 0x3e + 80021c0: 68fb ldr r3, [r7, #12] + 80021c2: 88fa ldrh r2, [r7, #6] + 80021c4: 87da strh r2, [r3, #62] ; 0x3e /*Init field not used in handle to zero */ hspi->pTxBuffPtr = (uint8_t *)NULL; + 80021c6: 68fb ldr r3, [r7, #12] + 80021c8: 2200 movs r2, #0 + 80021ca: 631a str r2, [r3, #48] ; 0x30 + hspi->TxXferSize = 0U; + 80021cc: 68fb ldr r3, [r7, #12] + 80021ce: 2200 movs r2, #0 + 80021d0: 869a strh r2, [r3, #52] ; 0x34 + hspi->TxXferCount = 0U; 80021d2: 68fb ldr r3, [r7, #12] 80021d4: 2200 movs r2, #0 - 80021d6: 631a str r2, [r3, #48] ; 0x30 - hspi->TxXferSize = 0U; + 80021d6: 86da strh r2, [r3, #54] ; 0x36 + hspi->RxISR = NULL; 80021d8: 68fb ldr r3, [r7, #12] 80021da: 2200 movs r2, #0 - 80021dc: 869a strh r2, [r3, #52] ; 0x34 - hspi->TxXferCount = 0U; + 80021dc: 641a str r2, [r3, #64] ; 0x40 + hspi->TxISR = NULL; 80021de: 68fb ldr r3, [r7, #12] 80021e0: 2200 movs r2, #0 - 80021e2: 86da strh r2, [r3, #54] ; 0x36 - hspi->RxISR = NULL; - 80021e4: 68fb ldr r3, [r7, #12] - 80021e6: 2200 movs r2, #0 - 80021e8: 641a str r2, [r3, #64] ; 0x40 - hspi->TxISR = NULL; - 80021ea: 68fb ldr r3, [r7, #12] - 80021ec: 2200 movs r2, #0 - 80021ee: 645a str r2, [r3, #68] ; 0x44 + 80021e2: 645a str r2, [r3, #68] ; 0x44 hspi->RxXferCount--; } #endif /* USE_SPI_CRC */ /* Configure communication direction: 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) - 80021f0: 68fb ldr r3, [r7, #12] - 80021f2: 689b ldr r3, [r3, #8] - 80021f4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 80021f8: d10f bne.n 800221a + 80021e4: 68fb ldr r3, [r7, #12] + 80021e6: 689b ldr r3, [r3, #8] + 80021e8: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 80021ec: d10f bne.n 800220e { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); - 80021fa: 68fb ldr r3, [r7, #12] - 80021fc: 681b ldr r3, [r3, #0] - 80021fe: 681a ldr r2, [r3, #0] - 8002200: 68fb ldr r3, [r7, #12] - 8002202: 681b ldr r3, [r3, #0] - 8002204: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8002208: 601a str r2, [r3, #0] + 80021ee: 68fb ldr r3, [r7, #12] + 80021f0: 681b ldr r3, [r3, #0] + 80021f2: 681a ldr r2, [r3, #0] + 80021f4: 68fb ldr r3, [r7, #12] + 80021f6: 681b ldr r3, [r3, #0] + 80021f8: f022 0240 bic.w r2, r2, #64 ; 0x40 + 80021fc: 601a str r2, [r3, #0] SPI_1LINE_RX(hspi); - 800220a: 68fb ldr r3, [r7, #12] - 800220c: 681b ldr r3, [r3, #0] - 800220e: 681a ldr r2, [r3, #0] - 8002210: 68fb ldr r3, [r7, #12] - 8002212: 681b ldr r3, [r3, #0] - 8002214: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 8002218: 601a str r2, [r3, #0] + 80021fe: 68fb ldr r3, [r7, #12] + 8002200: 681b ldr r3, [r3, #0] + 8002202: 681a ldr r2, [r3, #0] + 8002204: 68fb ldr r3, [r7, #12] + 8002206: 681b ldr r3, [r3, #0] + 8002208: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 800220c: 601a str r2, [r3, #0] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - 800221a: 68fb ldr r3, [r7, #12] - 800221c: 681b ldr r3, [r3, #0] - 800221e: 681b ldr r3, [r3, #0] - 8002220: f003 0340 and.w r3, r3, #64 ; 0x40 - 8002224: 2b40 cmp r3, #64 ; 0x40 - 8002226: d007 beq.n 8002238 + 800220e: 68fb ldr r3, [r7, #12] + 8002210: 681b ldr r3, [r3, #0] + 8002212: 681b ldr r3, [r3, #0] + 8002214: f003 0340 and.w r3, r3, #64 ; 0x40 + 8002218: 2b40 cmp r3, #64 ; 0x40 + 800221a: d007 beq.n 800222c { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); - 8002228: 68fb ldr r3, [r7, #12] - 800222a: 681b ldr r3, [r3, #0] - 800222c: 681a ldr r2, [r3, #0] - 800222e: 68fb ldr r3, [r7, #12] - 8002230: 681b ldr r3, [r3, #0] - 8002232: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8002236: 601a str r2, [r3, #0] + 800221c: 68fb ldr r3, [r7, #12] + 800221e: 681b ldr r3, [r3, #0] + 8002220: 681a ldr r2, [r3, #0] + 8002222: 68fb ldr r3, [r7, #12] + 8002224: 681b ldr r3, [r3, #0] + 8002226: f042 0240 orr.w r2, r2, #64 ; 0x40 + 800222a: 601a str r2, [r3, #0] } /* Receive data in 8 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_8BIT) - 8002238: 68fb ldr r3, [r7, #12] - 800223a: 68db ldr r3, [r3, #12] - 800223c: 2b00 cmp r3, #0 - 800223e: d162 bne.n 8002306 + 800222c: 68fb ldr r3, [r7, #12] + 800222e: 68db ldr r3, [r3, #12] + 8002230: 2b00 cmp r3, #0 + 8002232: d162 bne.n 80022fa { /* Transfer loop */ while (hspi->RxXferCount > 0U) - 8002240: e02e b.n 80022a0 + 8002234: e02e b.n 8002294 { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) - 8002242: 68fb ldr r3, [r7, #12] - 8002244: 681b ldr r3, [r3, #0] - 8002246: 689b ldr r3, [r3, #8] - 8002248: f003 0301 and.w r3, r3, #1 - 800224c: 2b01 cmp r3, #1 - 800224e: d115 bne.n 800227c + 8002236: 68fb ldr r3, [r7, #12] + 8002238: 681b ldr r3, [r3, #0] + 800223a: 689b ldr r3, [r3, #8] + 800223c: f003 0301 and.w r3, r3, #1 + 8002240: 2b01 cmp r3, #1 + 8002242: d115 bne.n 8002270 { /* read the received data */ (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; - 8002250: 68fb ldr r3, [r7, #12] - 8002252: 681b ldr r3, [r3, #0] - 8002254: f103 020c add.w r2, r3, #12 - 8002258: 68fb ldr r3, [r7, #12] - 800225a: 6b9b ldr r3, [r3, #56] ; 0x38 - 800225c: 7812 ldrb r2, [r2, #0] - 800225e: b2d2 uxtb r2, r2 - 8002260: 701a strb r2, [r3, #0] + 8002244: 68fb ldr r3, [r7, #12] + 8002246: 681b ldr r3, [r3, #0] + 8002248: f103 020c add.w r2, r3, #12 + 800224c: 68fb ldr r3, [r7, #12] + 800224e: 6b9b ldr r3, [r3, #56] ; 0x38 + 8002250: 7812 ldrb r2, [r2, #0] + 8002252: b2d2 uxtb r2, r2 + 8002254: 701a strb r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint8_t); - 8002262: 68fb ldr r3, [r7, #12] - 8002264: 6b9b ldr r3, [r3, #56] ; 0x38 - 8002266: 1c5a adds r2, r3, #1 - 8002268: 68fb ldr r3, [r7, #12] - 800226a: 639a str r2, [r3, #56] ; 0x38 + 8002256: 68fb ldr r3, [r7, #12] + 8002258: 6b9b ldr r3, [r3, #56] ; 0x38 + 800225a: 1c5a adds r2, r3, #1 + 800225c: 68fb ldr r3, [r7, #12] + 800225e: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; - 800226c: 68fb ldr r3, [r7, #12] - 800226e: 8fdb ldrh r3, [r3, #62] ; 0x3e - 8002270: b29b uxth r3, r3 - 8002272: 3b01 subs r3, #1 - 8002274: b29a uxth r2, r3 - 8002276: 68fb ldr r3, [r7, #12] - 8002278: 87da strh r2, [r3, #62] ; 0x3e - 800227a: e011 b.n 80022a0 + 8002260: 68fb ldr r3, [r7, #12] + 8002262: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8002264: b29b uxth r3, r3 + 8002266: 3b01 subs r3, #1 + 8002268: b29a uxth r2, r3 + 800226a: 68fb ldr r3, [r7, #12] + 800226c: 87da strh r2, [r3, #62] ; 0x3e + 800226e: e011 b.n 8002294 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 800227c: f7fe feca bl 8001014 - 8002280: 4602 mov r2, r0 - 8002282: 693b ldr r3, [r7, #16] - 8002284: 1ad3 subs r3, r2, r3 - 8002286: 683a ldr r2, [r7, #0] - 8002288: 429a cmp r2, r3 - 800228a: d803 bhi.n 8002294 - 800228c: 683b ldr r3, [r7, #0] - 800228e: f1b3 3fff cmp.w r3, #4294967295 - 8002292: d102 bne.n 800229a - 8002294: 683b ldr r3, [r7, #0] - 8002296: 2b00 cmp r3, #0 - 8002298: d102 bne.n 80022a0 + 8002270: f7fe feca bl 8001008 + 8002274: 4602 mov r2, r0 + 8002276: 693b ldr r3, [r7, #16] + 8002278: 1ad3 subs r3, r2, r3 + 800227a: 683a ldr r2, [r7, #0] + 800227c: 429a cmp r2, r3 + 800227e: d803 bhi.n 8002288 + 8002280: 683b ldr r3, [r7, #0] + 8002282: f1b3 3fff cmp.w r3, #4294967295 + 8002286: d102 bne.n 800228e + 8002288: 683b ldr r3, [r7, #0] + 800228a: 2b00 cmp r3, #0 + 800228c: d102 bne.n 8002294 { errorcode = HAL_TIMEOUT; - 800229a: 2303 movs r3, #3 - 800229c: 75fb strb r3, [r7, #23] + 800228e: 2303 movs r3, #3 + 8002290: 75fb strb r3, [r7, #23] goto error; - 800229e: e04a b.n 8002336 + 8002292: e04a b.n 800232a while (hspi->RxXferCount > 0U) - 80022a0: 68fb ldr r3, [r7, #12] - 80022a2: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80022a4: b29b uxth r3, r3 - 80022a6: 2b00 cmp r3, #0 - 80022a8: d1cb bne.n 8002242 - 80022aa: e031 b.n 8002310 + 8002294: 68fb ldr r3, [r7, #12] + 8002296: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8002298: b29b uxth r3, r3 + 800229a: 2b00 cmp r3, #0 + 800229c: d1cb bne.n 8002236 + 800229e: e031 b.n 8002304 { /* Transfer loop */ while (hspi->RxXferCount > 0U) { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) - 80022ac: 68fb ldr r3, [r7, #12] - 80022ae: 681b ldr r3, [r3, #0] - 80022b0: 689b ldr r3, [r3, #8] - 80022b2: f003 0301 and.w r3, r3, #1 - 80022b6: 2b01 cmp r3, #1 - 80022b8: d113 bne.n 80022e2 + 80022a0: 68fb ldr r3, [r7, #12] + 80022a2: 681b ldr r3, [r3, #0] + 80022a4: 689b ldr r3, [r3, #8] + 80022a6: f003 0301 and.w r3, r3, #1 + 80022aa: 2b01 cmp r3, #1 + 80022ac: d113 bne.n 80022d6 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - 80022ba: 68fb ldr r3, [r7, #12] - 80022bc: 681b ldr r3, [r3, #0] - 80022be: 68da ldr r2, [r3, #12] - 80022c0: 68fb ldr r3, [r7, #12] - 80022c2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80022c4: b292 uxth r2, r2 - 80022c6: 801a strh r2, [r3, #0] + 80022ae: 68fb ldr r3, [r7, #12] + 80022b0: 681b ldr r3, [r3, #0] + 80022b2: 68da ldr r2, [r3, #12] + 80022b4: 68fb ldr r3, [r7, #12] + 80022b6: 6b9b ldr r3, [r3, #56] ; 0x38 + 80022b8: b292 uxth r2, r2 + 80022ba: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); - 80022c8: 68fb ldr r3, [r7, #12] - 80022ca: 6b9b ldr r3, [r3, #56] ; 0x38 - 80022cc: 1c9a adds r2, r3, #2 - 80022ce: 68fb ldr r3, [r7, #12] - 80022d0: 639a str r2, [r3, #56] ; 0x38 + 80022bc: 68fb ldr r3, [r7, #12] + 80022be: 6b9b ldr r3, [r3, #56] ; 0x38 + 80022c0: 1c9a adds r2, r3, #2 + 80022c2: 68fb ldr r3, [r7, #12] + 80022c4: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; - 80022d2: 68fb ldr r3, [r7, #12] - 80022d4: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80022d6: b29b uxth r3, r3 - 80022d8: 3b01 subs r3, #1 - 80022da: b29a uxth r2, r3 - 80022dc: 68fb ldr r3, [r7, #12] - 80022de: 87da strh r2, [r3, #62] ; 0x3e - 80022e0: e011 b.n 8002306 + 80022c6: 68fb ldr r3, [r7, #12] + 80022c8: 8fdb ldrh r3, [r3, #62] ; 0x3e + 80022ca: b29b uxth r3, r3 + 80022cc: 3b01 subs r3, #1 + 80022ce: b29a uxth r2, r3 + 80022d0: 68fb ldr r3, [r7, #12] + 80022d2: 87da strh r2, [r3, #62] ; 0x3e + 80022d4: e011 b.n 80022fa } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) - 80022e2: f7fe fe97 bl 8001014 - 80022e6: 4602 mov r2, r0 - 80022e8: 693b ldr r3, [r7, #16] - 80022ea: 1ad3 subs r3, r2, r3 - 80022ec: 683a ldr r2, [r7, #0] - 80022ee: 429a cmp r2, r3 - 80022f0: d803 bhi.n 80022fa - 80022f2: 683b ldr r3, [r7, #0] - 80022f4: f1b3 3fff cmp.w r3, #4294967295 - 80022f8: d102 bne.n 8002300 - 80022fa: 683b ldr r3, [r7, #0] - 80022fc: 2b00 cmp r3, #0 - 80022fe: d102 bne.n 8002306 + 80022d6: f7fe fe97 bl 8001008 + 80022da: 4602 mov r2, r0 + 80022dc: 693b ldr r3, [r7, #16] + 80022de: 1ad3 subs r3, r2, r3 + 80022e0: 683a ldr r2, [r7, #0] + 80022e2: 429a cmp r2, r3 + 80022e4: d803 bhi.n 80022ee + 80022e6: 683b ldr r3, [r7, #0] + 80022e8: f1b3 3fff cmp.w r3, #4294967295 + 80022ec: d102 bne.n 80022f4 + 80022ee: 683b ldr r3, [r7, #0] + 80022f0: 2b00 cmp r3, #0 + 80022f2: d102 bne.n 80022fa { errorcode = HAL_TIMEOUT; - 8002300: 2303 movs r3, #3 - 8002302: 75fb strb r3, [r7, #23] + 80022f4: 2303 movs r3, #3 + 80022f6: 75fb strb r3, [r7, #23] goto error; - 8002304: e017 b.n 8002336 + 80022f8: e017 b.n 800232a while (hspi->RxXferCount > 0U) - 8002306: 68fb ldr r3, [r7, #12] - 8002308: 8fdb ldrh r3, [r3, #62] ; 0x3e - 800230a: b29b uxth r3, r3 - 800230c: 2b00 cmp r3, #0 - 800230e: d1cd bne.n 80022ac + 80022fa: 68fb ldr r3, [r7, #12] + 80022fc: 8fdb ldrh r3, [r3, #62] ; 0x3e + 80022fe: b29b uxth r3, r3 + 8002300: 2b00 cmp r3, #0 + 8002302: d1cd bne.n 80022a0 UNUSED(tmpreg); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) - 8002310: 693a ldr r2, [r7, #16] - 8002312: 6839 ldr r1, [r7, #0] - 8002314: 68f8 ldr r0, [r7, #12] - 8002316: f000 fa45 bl 80027a4 - 800231a: 4603 mov r3, r0 - 800231c: 2b00 cmp r3, #0 - 800231e: d002 beq.n 8002326 + 8002304: 693a ldr r2, [r7, #16] + 8002306: 6839 ldr r1, [r7, #0] + 8002308: 68f8 ldr r0, [r7, #12] + 800230a: f000 fa45 bl 8002798 + 800230e: 4603 mov r3, r0 + 8002310: 2b00 cmp r3, #0 + 8002312: d002 beq.n 800231a { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - 8002320: 68fb ldr r3, [r7, #12] - 8002322: 2220 movs r2, #32 - 8002324: 655a str r2, [r3, #84] ; 0x54 + 8002314: 68fb ldr r3, [r7, #12] + 8002316: 2220 movs r2, #32 + 8002318: 655a str r2, [r3, #84] ; 0x54 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); __HAL_SPI_CLEAR_CRCERRFLAG(hspi); } #endif /* USE_SPI_CRC */ if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) - 8002326: 68fb ldr r3, [r7, #12] - 8002328: 6d5b ldr r3, [r3, #84] ; 0x54 - 800232a: 2b00 cmp r3, #0 - 800232c: d002 beq.n 8002334 + 800231a: 68fb ldr r3, [r7, #12] + 800231c: 6d5b ldr r3, [r3, #84] ; 0x54 + 800231e: 2b00 cmp r3, #0 + 8002320: d002 beq.n 8002328 { errorcode = HAL_ERROR; - 800232e: 2301 movs r3, #1 - 8002330: 75fb strb r3, [r7, #23] - 8002332: e000 b.n 8002336 + 8002322: 2301 movs r3, #1 + 8002324: 75fb strb r3, [r7, #23] + 8002326: e000 b.n 800232a } error : - 8002334: bf00 nop + 8002328: bf00 nop hspi->State = HAL_SPI_STATE_READY; - 8002336: 68fb ldr r3, [r7, #12] - 8002338: 2201 movs r2, #1 - 800233a: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 800232a: 68fb ldr r3, [r7, #12] + 800232c: 2201 movs r2, #1 + 800232e: f883 2051 strb.w r2, [r3, #81] ; 0x51 __HAL_UNLOCK(hspi); - 800233e: 68fb ldr r3, [r7, #12] - 8002340: 2200 movs r2, #0 - 8002342: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8002332: 68fb ldr r3, [r7, #12] + 8002334: 2200 movs r2, #0 + 8002336: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; - 8002346: 7dfb ldrb r3, [r7, #23] + 800233a: 7dfb ldrb r3, [r7, #23] } - 8002348: 4618 mov r0, r3 - 800234a: 3718 adds r7, #24 - 800234c: 46bd mov sp, r7 - 800234e: bd80 pop {r7, pc} + 800233c: 4618 mov r0, r3 + 800233e: 3718 adds r7, #24 + 8002340: 46bd mov sp, r7 + 8002342: bd80 pop {r7, pc} -08002350 : +08002344 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { - 8002350: b580 push {r7, lr} - 8002352: b08c sub sp, #48 ; 0x30 - 8002354: af00 add r7, sp, #0 - 8002356: 60f8 str r0, [r7, #12] - 8002358: 60b9 str r1, [r7, #8] - 800235a: 607a str r2, [r7, #4] - 800235c: 807b strh r3, [r7, #2] + 8002344: b580 push {r7, lr} + 8002346: b08c sub sp, #48 ; 0x30 + 8002348: af00 add r7, sp, #0 + 800234a: 60f8 str r0, [r7, #12] + 800234c: 60b9 str r1, [r7, #8] + 800234e: 607a str r2, [r7, #4] + 8002350: 807b strh r3, [r7, #2] uint32_t tmp_mode; HAL_SPI_StateTypeDef tmp_state; uint32_t tickstart; /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; - 800235e: 2301 movs r3, #1 - 8002360: 62fb str r3, [r7, #44] ; 0x2c + 8002352: 2301 movs r3, #1 + 8002354: 62fb str r3, [r7, #44] ; 0x2c HAL_StatusTypeDef errorcode = HAL_OK; - 8002362: 2300 movs r3, #0 - 8002364: f887 302b strb.w r3, [r7, #43] ; 0x2b + 8002356: 2300 movs r3, #0 + 8002358: f887 302b strb.w r3, [r7, #43] ; 0x2b /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); - 8002368: 68fb ldr r3, [r7, #12] - 800236a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 800236e: 2b01 cmp r3, #1 - 8002370: d101 bne.n 8002376 - 8002372: 2302 movs r3, #2 - 8002374: e18a b.n 800268c - 8002376: 68fb ldr r3, [r7, #12] - 8002378: 2201 movs r2, #1 - 800237a: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 800235c: 68fb ldr r3, [r7, #12] + 800235e: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 8002362: 2b01 cmp r3, #1 + 8002364: d101 bne.n 800236a + 8002366: 2302 movs r3, #2 + 8002368: e18a b.n 8002680 + 800236a: 68fb ldr r3, [r7, #12] + 800236c: 2201 movs r2, #1 + 800236e: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); - 800237e: f7fe fe49 bl 8001014 - 8002382: 6278 str r0, [r7, #36] ; 0x24 + 8002372: f7fe fe49 bl 8001008 + 8002376: 6278 str r0, [r7, #36] ; 0x24 /* Init temporary variables */ tmp_state = hspi->State; - 8002384: 68fb ldr r3, [r7, #12] - 8002386: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 - 800238a: f887 3023 strb.w r3, [r7, #35] ; 0x23 + 8002378: 68fb ldr r3, [r7, #12] + 800237a: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 + 800237e: f887 3023 strb.w r3, [r7, #35] ; 0x23 tmp_mode = hspi->Init.Mode; - 800238e: 68fb ldr r3, [r7, #12] - 8002390: 685b ldr r3, [r3, #4] - 8002392: 61fb str r3, [r7, #28] + 8002382: 68fb ldr r3, [r7, #12] + 8002384: 685b ldr r3, [r3, #4] + 8002386: 61fb str r3, [r7, #28] initial_TxXferCount = Size; - 8002394: 887b ldrh r3, [r7, #2] - 8002396: 837b strh r3, [r7, #26] + 8002388: 887b ldrh r3, [r7, #2] + 800238a: 837b strh r3, [r7, #26] if (!((tmp_state == HAL_SPI_STATE_READY) || \ - 8002398: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 - 800239c: 2b01 cmp r3, #1 - 800239e: d00f beq.n 80023c0 - 80023a0: 69fb ldr r3, [r7, #28] - 80023a2: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 80023a6: d107 bne.n 80023b8 + 800238c: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 + 8002390: 2b01 cmp r3, #1 + 8002392: d00f beq.n 80023b4 + 8002394: 69fb ldr r3, [r7, #28] + 8002396: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 800239a: d107 bne.n 80023ac ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) - 80023a8: 68fb ldr r3, [r7, #12] - 80023aa: 689b ldr r3, [r3, #8] - 80023ac: 2b00 cmp r3, #0 - 80023ae: d103 bne.n 80023b8 - 80023b0: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 - 80023b4: 2b04 cmp r3, #4 - 80023b6: d003 beq.n 80023c0 + 800239c: 68fb ldr r3, [r7, #12] + 800239e: 689b ldr r3, [r3, #8] + 80023a0: 2b00 cmp r3, #0 + 80023a2: d103 bne.n 80023ac + 80023a4: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 + 80023a8: 2b04 cmp r3, #4 + 80023aa: d003 beq.n 80023b4 { errorcode = HAL_BUSY; - 80023b8: 2302 movs r3, #2 - 80023ba: f887 302b strb.w r3, [r7, #43] ; 0x2b + 80023ac: 2302 movs r3, #2 + 80023ae: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; - 80023be: e15b b.n 8002678 + 80023b2: e15b b.n 800266c } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) - 80023c0: 68bb ldr r3, [r7, #8] + 80023b4: 68bb ldr r3, [r7, #8] + 80023b6: 2b00 cmp r3, #0 + 80023b8: d005 beq.n 80023c6 + 80023ba: 687b ldr r3, [r7, #4] + 80023bc: 2b00 cmp r3, #0 + 80023be: d002 beq.n 80023c6 + 80023c0: 887b ldrh r3, [r7, #2] 80023c2: 2b00 cmp r3, #0 - 80023c4: d005 beq.n 80023d2 - 80023c6: 687b ldr r3, [r7, #4] - 80023c8: 2b00 cmp r3, #0 - 80023ca: d002 beq.n 80023d2 - 80023cc: 887b ldrh r3, [r7, #2] - 80023ce: 2b00 cmp r3, #0 - 80023d0: d103 bne.n 80023da + 80023c4: d103 bne.n 80023ce { errorcode = HAL_ERROR; - 80023d2: 2301 movs r3, #1 - 80023d4: f887 302b strb.w r3, [r7, #43] ; 0x2b + 80023c6: 2301 movs r3, #1 + 80023c8: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; - 80023d8: e14e b.n 8002678 + 80023cc: e14e b.n 800266c } /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) - 80023da: 68fb ldr r3, [r7, #12] - 80023dc: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 - 80023e0: b2db uxtb r3, r3 - 80023e2: 2b04 cmp r3, #4 - 80023e4: d003 beq.n 80023ee + 80023ce: 68fb ldr r3, [r7, #12] + 80023d0: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 + 80023d4: b2db uxtb r3, r3 + 80023d6: 2b04 cmp r3, #4 + 80023d8: d003 beq.n 80023e2 { hspi->State = HAL_SPI_STATE_BUSY_TX_RX; - 80023e6: 68fb ldr r3, [r7, #12] - 80023e8: 2205 movs r2, #5 - 80023ea: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 80023da: 68fb ldr r3, [r7, #12] + 80023dc: 2205 movs r2, #5 + 80023de: f883 2051 strb.w r2, [r3, #81] ; 0x51 } /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 80023ee: 68fb ldr r3, [r7, #12] - 80023f0: 2200 movs r2, #0 - 80023f2: 655a str r2, [r3, #84] ; 0x54 + 80023e2: 68fb ldr r3, [r7, #12] + 80023e4: 2200 movs r2, #0 + 80023e6: 655a str r2, [r3, #84] ; 0x54 hspi->pRxBuffPtr = (uint8_t *)pRxData; - 80023f4: 68fb ldr r3, [r7, #12] - 80023f6: 687a ldr r2, [r7, #4] - 80023f8: 639a str r2, [r3, #56] ; 0x38 + 80023e8: 68fb ldr r3, [r7, #12] + 80023ea: 687a ldr r2, [r7, #4] + 80023ec: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount = Size; - 80023fa: 68fb ldr r3, [r7, #12] - 80023fc: 887a ldrh r2, [r7, #2] - 80023fe: 87da strh r2, [r3, #62] ; 0x3e + 80023ee: 68fb ldr r3, [r7, #12] + 80023f0: 887a ldrh r2, [r7, #2] + 80023f2: 87da strh r2, [r3, #62] ; 0x3e hspi->RxXferSize = Size; - 8002400: 68fb ldr r3, [r7, #12] - 8002402: 887a ldrh r2, [r7, #2] - 8002404: 879a strh r2, [r3, #60] ; 0x3c + 80023f4: 68fb ldr r3, [r7, #12] + 80023f6: 887a ldrh r2, [r7, #2] + 80023f8: 879a strh r2, [r3, #60] ; 0x3c hspi->pTxBuffPtr = (uint8_t *)pTxData; - 8002406: 68fb ldr r3, [r7, #12] - 8002408: 68ba ldr r2, [r7, #8] - 800240a: 631a str r2, [r3, #48] ; 0x30 + 80023fa: 68fb ldr r3, [r7, #12] + 80023fc: 68ba ldr r2, [r7, #8] + 80023fe: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount = Size; - 800240c: 68fb ldr r3, [r7, #12] - 800240e: 887a ldrh r2, [r7, #2] - 8002410: 86da strh r2, [r3, #54] ; 0x36 + 8002400: 68fb ldr r3, [r7, #12] + 8002402: 887a ldrh r2, [r7, #2] + 8002404: 86da strh r2, [r3, #54] ; 0x36 hspi->TxXferSize = Size; - 8002412: 68fb ldr r3, [r7, #12] - 8002414: 887a ldrh r2, [r7, #2] - 8002416: 869a strh r2, [r3, #52] ; 0x34 + 8002406: 68fb ldr r3, [r7, #12] + 8002408: 887a ldrh r2, [r7, #2] + 800240a: 869a strh r2, [r3, #52] ; 0x34 /*Init field not used in handle to zero */ hspi->RxISR = NULL; - 8002418: 68fb ldr r3, [r7, #12] - 800241a: 2200 movs r2, #0 - 800241c: 641a str r2, [r3, #64] ; 0x40 + 800240c: 68fb ldr r3, [r7, #12] + 800240e: 2200 movs r2, #0 + 8002410: 641a str r2, [r3, #64] ; 0x40 hspi->TxISR = NULL; - 800241e: 68fb ldr r3, [r7, #12] - 8002420: 2200 movs r2, #0 - 8002422: 645a str r2, [r3, #68] ; 0x44 + 8002412: 68fb ldr r3, [r7, #12] + 8002414: 2200 movs r2, #0 + 8002416: 645a str r2, [r3, #68] ; 0x44 SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) - 8002424: 68fb ldr r3, [r7, #12] - 8002426: 681b ldr r3, [r3, #0] - 8002428: 681b ldr r3, [r3, #0] - 800242a: f003 0340 and.w r3, r3, #64 ; 0x40 - 800242e: 2b40 cmp r3, #64 ; 0x40 - 8002430: d007 beq.n 8002442 + 8002418: 68fb ldr r3, [r7, #12] + 800241a: 681b ldr r3, [r3, #0] + 800241c: 681b ldr r3, [r3, #0] + 800241e: f003 0340 and.w r3, r3, #64 ; 0x40 + 8002422: 2b40 cmp r3, #64 ; 0x40 + 8002424: d007 beq.n 8002436 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); - 8002432: 68fb ldr r3, [r7, #12] - 8002434: 681b ldr r3, [r3, #0] - 8002436: 681a ldr r2, [r3, #0] - 8002438: 68fb ldr r3, [r7, #12] - 800243a: 681b ldr r3, [r3, #0] - 800243c: f042 0240 orr.w r2, r2, #64 ; 0x40 - 8002440: 601a str r2, [r3, #0] + 8002426: 68fb ldr r3, [r7, #12] + 8002428: 681b ldr r3, [r3, #0] + 800242a: 681a ldr r2, [r3, #0] + 800242c: 68fb ldr r3, [r7, #12] + 800242e: 681b ldr r3, [r3, #0] + 8002430: f042 0240 orr.w r2, r2, #64 ; 0x40 + 8002434: 601a str r2, [r3, #0] } /* Transmit and Receive data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) - 8002442: 68fb ldr r3, [r7, #12] - 8002444: 68db ldr r3, [r3, #12] - 8002446: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 800244a: d178 bne.n 800253e + 8002436: 68fb ldr r3, [r7, #12] + 8002438: 68db ldr r3, [r3, #12] + 800243a: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 800243e: d178 bne.n 8002532 { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 800244c: 68fb ldr r3, [r7, #12] - 800244e: 685b ldr r3, [r3, #4] - 8002450: 2b00 cmp r3, #0 - 8002452: d002 beq.n 800245a - 8002454: 8b7b ldrh r3, [r7, #26] - 8002456: 2b01 cmp r3, #1 - 8002458: d166 bne.n 8002528 + 8002440: 68fb ldr r3, [r7, #12] + 8002442: 685b ldr r3, [r3, #4] + 8002444: 2b00 cmp r3, #0 + 8002446: d002 beq.n 800244e + 8002448: 8b7b ldrh r3, [r7, #26] + 800244a: 2b01 cmp r3, #1 + 800244c: d166 bne.n 800251c { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 800244e: 68fb ldr r3, [r7, #12] + 8002450: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002452: 881a ldrh r2, [r3, #0] + 8002454: 68fb ldr r3, [r7, #12] + 8002456: 681b ldr r3, [r3, #0] + 8002458: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); 800245a: 68fb ldr r3, [r7, #12] 800245c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800245e: 881a ldrh r2, [r3, #0] + 800245e: 1c9a adds r2, r3, #2 8002460: 68fb ldr r3, [r7, #12] - 8002462: 681b ldr r3, [r3, #0] - 8002464: 60da str r2, [r3, #12] - hspi->pTxBuffPtr += sizeof(uint16_t); - 8002466: 68fb ldr r3, [r7, #12] - 8002468: 6b1b ldr r3, [r3, #48] ; 0x30 - 800246a: 1c9a adds r2, r3, #2 - 800246c: 68fb ldr r3, [r7, #12] - 800246e: 631a str r2, [r3, #48] ; 0x30 + 8002462: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 8002470: 68fb ldr r3, [r7, #12] - 8002472: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002474: b29b uxth r3, r3 - 8002476: 3b01 subs r3, #1 - 8002478: b29a uxth r2, r3 - 800247a: 68fb ldr r3, [r7, #12] - 800247c: 86da strh r2, [r3, #54] ; 0x36 + 8002464: 68fb ldr r3, [r7, #12] + 8002466: 8edb ldrh r3, [r3, #54] ; 0x36 + 8002468: b29b uxth r3, r3 + 800246a: 3b01 subs r3, #1 + 800246c: b29a uxth r2, r3 + 800246e: 68fb ldr r3, [r7, #12] + 8002470: 86da strh r2, [r3, #54] ; 0x36 } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 800247e: e053 b.n 8002528 + 8002472: e053 b.n 800251c { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) - 8002480: 68fb ldr r3, [r7, #12] - 8002482: 681b ldr r3, [r3, #0] - 8002484: 689b ldr r3, [r3, #8] - 8002486: f003 0302 and.w r3, r3, #2 - 800248a: 2b02 cmp r3, #2 - 800248c: d11b bne.n 80024c6 - 800248e: 68fb ldr r3, [r7, #12] - 8002490: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002492: b29b uxth r3, r3 - 8002494: 2b00 cmp r3, #0 - 8002496: d016 beq.n 80024c6 - 8002498: 6afb ldr r3, [r7, #44] ; 0x2c - 800249a: 2b01 cmp r3, #1 - 800249c: d113 bne.n 80024c6 + 8002474: 68fb ldr r3, [r7, #12] + 8002476: 681b ldr r3, [r3, #0] + 8002478: 689b ldr r3, [r3, #8] + 800247a: f003 0302 and.w r3, r3, #2 + 800247e: 2b02 cmp r3, #2 + 8002480: d11b bne.n 80024ba + 8002482: 68fb ldr r3, [r7, #12] + 8002484: 8edb ldrh r3, [r3, #54] ; 0x36 + 8002486: b29b uxth r3, r3 + 8002488: 2b00 cmp r3, #0 + 800248a: d016 beq.n 80024ba + 800248c: 6afb ldr r3, [r7, #44] ; 0x2c + 800248e: 2b01 cmp r3, #1 + 8002490: d113 bne.n 80024ba { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 8002492: 68fb ldr r3, [r7, #12] + 8002494: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002496: 881a ldrh r2, [r3, #0] + 8002498: 68fb ldr r3, [r7, #12] + 800249a: 681b ldr r3, [r3, #0] + 800249c: 60da str r2, [r3, #12] + hspi->pTxBuffPtr += sizeof(uint16_t); 800249e: 68fb ldr r3, [r7, #12] 80024a0: 6b1b ldr r3, [r3, #48] ; 0x30 - 80024a2: 881a ldrh r2, [r3, #0] + 80024a2: 1c9a adds r2, r3, #2 80024a4: 68fb ldr r3, [r7, #12] - 80024a6: 681b ldr r3, [r3, #0] - 80024a8: 60da str r2, [r3, #12] - hspi->pTxBuffPtr += sizeof(uint16_t); - 80024aa: 68fb ldr r3, [r7, #12] - 80024ac: 6b1b ldr r3, [r3, #48] ; 0x30 - 80024ae: 1c9a adds r2, r3, #2 - 80024b0: 68fb ldr r3, [r7, #12] - 80024b2: 631a str r2, [r3, #48] ; 0x30 + 80024a6: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 80024b4: 68fb ldr r3, [r7, #12] - 80024b6: 8edb ldrh r3, [r3, #54] ; 0x36 - 80024b8: b29b uxth r3, r3 - 80024ba: 3b01 subs r3, #1 - 80024bc: b29a uxth r2, r3 - 80024be: 68fb ldr r3, [r7, #12] - 80024c0: 86da strh r2, [r3, #54] ; 0x36 + 80024a8: 68fb ldr r3, [r7, #12] + 80024aa: 8edb ldrh r3, [r3, #54] ; 0x36 + 80024ac: b29b uxth r3, r3 + 80024ae: 3b01 subs r3, #1 + 80024b0: b29a uxth r2, r3 + 80024b2: 68fb ldr r3, [r7, #12] + 80024b4: 86da strh r2, [r3, #54] ; 0x36 /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; - 80024c2: 2300 movs r3, #0 - 80024c4: 62fb str r3, [r7, #44] ; 0x2c + 80024b6: 2300 movs r3, #0 + 80024b8: 62fb str r3, [r7, #44] ; 0x2c } #endif /* USE_SPI_CRC */ } /* Check RXNE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) - 80024c6: 68fb ldr r3, [r7, #12] - 80024c8: 681b ldr r3, [r3, #0] - 80024ca: 689b ldr r3, [r3, #8] - 80024cc: f003 0301 and.w r3, r3, #1 - 80024d0: 2b01 cmp r3, #1 - 80024d2: d119 bne.n 8002508 - 80024d4: 68fb ldr r3, [r7, #12] - 80024d6: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80024d8: b29b uxth r3, r3 - 80024da: 2b00 cmp r3, #0 - 80024dc: d014 beq.n 8002508 + 80024ba: 68fb ldr r3, [r7, #12] + 80024bc: 681b ldr r3, [r3, #0] + 80024be: 689b ldr r3, [r3, #8] + 80024c0: f003 0301 and.w r3, r3, #1 + 80024c4: 2b01 cmp r3, #1 + 80024c6: d119 bne.n 80024fc + 80024c8: 68fb ldr r3, [r7, #12] + 80024ca: 8fdb ldrh r3, [r3, #62] ; 0x3e + 80024cc: b29b uxth r3, r3 + 80024ce: 2b00 cmp r3, #0 + 80024d0: d014 beq.n 80024fc { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; - 80024de: 68fb ldr r3, [r7, #12] - 80024e0: 681b ldr r3, [r3, #0] - 80024e2: 68da ldr r2, [r3, #12] - 80024e4: 68fb ldr r3, [r7, #12] - 80024e6: 6b9b ldr r3, [r3, #56] ; 0x38 - 80024e8: b292 uxth r2, r2 - 80024ea: 801a strh r2, [r3, #0] + 80024d2: 68fb ldr r3, [r7, #12] + 80024d4: 681b ldr r3, [r3, #0] + 80024d6: 68da ldr r2, [r3, #12] + 80024d8: 68fb ldr r3, [r7, #12] + 80024da: 6b9b ldr r3, [r3, #56] ; 0x38 + 80024dc: b292 uxth r2, r2 + 80024de: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); - 80024ec: 68fb ldr r3, [r7, #12] - 80024ee: 6b9b ldr r3, [r3, #56] ; 0x38 - 80024f0: 1c9a adds r2, r3, #2 - 80024f2: 68fb ldr r3, [r7, #12] - 80024f4: 639a str r2, [r3, #56] ; 0x38 + 80024e0: 68fb ldr r3, [r7, #12] + 80024e2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80024e4: 1c9a adds r2, r3, #2 + 80024e6: 68fb ldr r3, [r7, #12] + 80024e8: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; - 80024f6: 68fb ldr r3, [r7, #12] - 80024f8: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80024fa: b29b uxth r3, r3 - 80024fc: 3b01 subs r3, #1 - 80024fe: b29a uxth r2, r3 - 8002500: 68fb ldr r3, [r7, #12] - 8002502: 87da strh r2, [r3, #62] ; 0x3e + 80024ea: 68fb ldr r3, [r7, #12] + 80024ec: 8fdb ldrh r3, [r3, #62] ; 0x3e + 80024ee: b29b uxth r3, r3 + 80024f0: 3b01 subs r3, #1 + 80024f2: b29a uxth r2, r3 + 80024f4: 68fb ldr r3, [r7, #12] + 80024f6: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; - 8002504: 2301 movs r3, #1 - 8002506: 62fb str r3, [r7, #44] ; 0x2c + 80024f8: 2301 movs r3, #1 + 80024fa: 62fb str r3, [r7, #44] ; 0x2c } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) - 8002508: f7fe fd84 bl 8001014 - 800250c: 4602 mov r2, r0 - 800250e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002510: 1ad3 subs r3, r2, r3 - 8002512: 6bba ldr r2, [r7, #56] ; 0x38 - 8002514: 429a cmp r2, r3 - 8002516: d807 bhi.n 8002528 - 8002518: 6bbb ldr r3, [r7, #56] ; 0x38 - 800251a: f1b3 3fff cmp.w r3, #4294967295 - 800251e: d003 beq.n 8002528 + 80024fc: f7fe fd84 bl 8001008 + 8002500: 4602 mov r2, r0 + 8002502: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002504: 1ad3 subs r3, r2, r3 + 8002506: 6bba ldr r2, [r7, #56] ; 0x38 + 8002508: 429a cmp r2, r3 + 800250a: d807 bhi.n 800251c + 800250c: 6bbb ldr r3, [r7, #56] ; 0x38 + 800250e: f1b3 3fff cmp.w r3, #4294967295 + 8002512: d003 beq.n 800251c { errorcode = HAL_TIMEOUT; - 8002520: 2303 movs r3, #3 - 8002522: f887 302b strb.w r3, [r7, #43] ; 0x2b + 8002514: 2303 movs r3, #3 + 8002516: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; - 8002526: e0a7 b.n 8002678 + 800251a: e0a7 b.n 800266c while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 8002528: 68fb ldr r3, [r7, #12] - 800252a: 8edb ldrh r3, [r3, #54] ; 0x36 - 800252c: b29b uxth r3, r3 - 800252e: 2b00 cmp r3, #0 - 8002530: d1a6 bne.n 8002480 - 8002532: 68fb ldr r3, [r7, #12] - 8002534: 8fdb ldrh r3, [r3, #62] ; 0x3e - 8002536: b29b uxth r3, r3 - 8002538: 2b00 cmp r3, #0 - 800253a: d1a1 bne.n 8002480 - 800253c: e07c b.n 8002638 + 800251c: 68fb ldr r3, [r7, #12] + 800251e: 8edb ldrh r3, [r3, #54] ; 0x36 + 8002520: b29b uxth r3, r3 + 8002522: 2b00 cmp r3, #0 + 8002524: d1a6 bne.n 8002474 + 8002526: 68fb ldr r3, [r7, #12] + 8002528: 8fdb ldrh r3, [r3, #62] ; 0x3e + 800252a: b29b uxth r3, r3 + 800252c: 2b00 cmp r3, #0 + 800252e: d1a1 bne.n 8002474 + 8002530: e07c b.n 800262c } } /* Transmit and Receive data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) - 800253e: 68fb ldr r3, [r7, #12] - 8002540: 685b ldr r3, [r3, #4] - 8002542: 2b00 cmp r3, #0 - 8002544: d002 beq.n 800254c - 8002546: 8b7b ldrh r3, [r7, #26] - 8002548: 2b01 cmp r3, #1 - 800254a: d16b bne.n 8002624 + 8002532: 68fb ldr r3, [r7, #12] + 8002534: 685b ldr r3, [r3, #4] + 8002536: 2b00 cmp r3, #0 + 8002538: d002 beq.n 8002540 + 800253a: 8b7b ldrh r3, [r7, #26] + 800253c: 2b01 cmp r3, #1 + 800253e: d16b bne.n 8002618 { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); - 800254c: 68fb ldr r3, [r7, #12] - 800254e: 6b1a ldr r2, [r3, #48] ; 0x30 - 8002550: 68fb ldr r3, [r7, #12] - 8002552: 681b ldr r3, [r3, #0] - 8002554: 330c adds r3, #12 - 8002556: 7812 ldrb r2, [r2, #0] - 8002558: 701a strb r2, [r3, #0] + 8002540: 68fb ldr r3, [r7, #12] + 8002542: 6b1a ldr r2, [r3, #48] ; 0x30 + 8002544: 68fb ldr r3, [r7, #12] + 8002546: 681b ldr r3, [r3, #0] + 8002548: 330c adds r3, #12 + 800254a: 7812 ldrb r2, [r2, #0] + 800254c: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); - 800255a: 68fb ldr r3, [r7, #12] - 800255c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800255e: 1c5a adds r2, r3, #1 - 8002560: 68fb ldr r3, [r7, #12] - 8002562: 631a str r2, [r3, #48] ; 0x30 + 800254e: 68fb ldr r3, [r7, #12] + 8002550: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002552: 1c5a adds r2, r3, #1 + 8002554: 68fb ldr r3, [r7, #12] + 8002556: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 8002564: 68fb ldr r3, [r7, #12] - 8002566: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002568: b29b uxth r3, r3 - 800256a: 3b01 subs r3, #1 - 800256c: b29a uxth r2, r3 - 800256e: 68fb ldr r3, [r7, #12] - 8002570: 86da strh r2, [r3, #54] ; 0x36 + 8002558: 68fb ldr r3, [r7, #12] + 800255a: 8edb ldrh r3, [r3, #54] ; 0x36 + 800255c: b29b uxth r3, r3 + 800255e: 3b01 subs r3, #1 + 8002560: b29a uxth r2, r3 + 8002562: 68fb ldr r3, [r7, #12] + 8002564: 86da strh r2, [r3, #54] ; 0x36 } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 8002572: e057 b.n 8002624 + 8002566: e057 b.n 8002618 { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) - 8002574: 68fb ldr r3, [r7, #12] - 8002576: 681b ldr r3, [r3, #0] - 8002578: 689b ldr r3, [r3, #8] - 800257a: f003 0302 and.w r3, r3, #2 - 800257e: 2b02 cmp r3, #2 - 8002580: d11c bne.n 80025bc - 8002582: 68fb ldr r3, [r7, #12] - 8002584: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002586: b29b uxth r3, r3 - 8002588: 2b00 cmp r3, #0 - 800258a: d017 beq.n 80025bc - 800258c: 6afb ldr r3, [r7, #44] ; 0x2c - 800258e: 2b01 cmp r3, #1 - 8002590: d114 bne.n 80025bc + 8002568: 68fb ldr r3, [r7, #12] + 800256a: 681b ldr r3, [r3, #0] + 800256c: 689b ldr r3, [r3, #8] + 800256e: f003 0302 and.w r3, r3, #2 + 8002572: 2b02 cmp r3, #2 + 8002574: d11c bne.n 80025b0 + 8002576: 68fb ldr r3, [r7, #12] + 8002578: 8edb ldrh r3, [r3, #54] ; 0x36 + 800257a: b29b uxth r3, r3 + 800257c: 2b00 cmp r3, #0 + 800257e: d017 beq.n 80025b0 + 8002580: 6afb ldr r3, [r7, #44] ; 0x2c + 8002582: 2b01 cmp r3, #1 + 8002584: d114 bne.n 80025b0 { *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); - 8002592: 68fb ldr r3, [r7, #12] - 8002594: 6b1a ldr r2, [r3, #48] ; 0x30 - 8002596: 68fb ldr r3, [r7, #12] - 8002598: 681b ldr r3, [r3, #0] - 800259a: 330c adds r3, #12 - 800259c: 7812 ldrb r2, [r2, #0] - 800259e: 701a strb r2, [r3, #0] + 8002586: 68fb ldr r3, [r7, #12] + 8002588: 6b1a ldr r2, [r3, #48] ; 0x30 + 800258a: 68fb ldr r3, [r7, #12] + 800258c: 681b ldr r3, [r3, #0] + 800258e: 330c adds r3, #12 + 8002590: 7812 ldrb r2, [r2, #0] + 8002592: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; - 80025a0: 68fb ldr r3, [r7, #12] - 80025a2: 6b1b ldr r3, [r3, #48] ; 0x30 - 80025a4: 1c5a adds r2, r3, #1 - 80025a6: 68fb ldr r3, [r7, #12] - 80025a8: 631a str r2, [r3, #48] ; 0x30 + 8002594: 68fb ldr r3, [r7, #12] + 8002596: 6b1b ldr r3, [r3, #48] ; 0x30 + 8002598: 1c5a adds r2, r3, #1 + 800259a: 68fb ldr r3, [r7, #12] + 800259c: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; - 80025aa: 68fb ldr r3, [r7, #12] - 80025ac: 8edb ldrh r3, [r3, #54] ; 0x36 - 80025ae: b29b uxth r3, r3 - 80025b0: 3b01 subs r3, #1 - 80025b2: b29a uxth r2, r3 - 80025b4: 68fb ldr r3, [r7, #12] - 80025b6: 86da strh r2, [r3, #54] ; 0x36 + 800259e: 68fb ldr r3, [r7, #12] + 80025a0: 8edb ldrh r3, [r3, #54] ; 0x36 + 80025a2: b29b uxth r3, r3 + 80025a4: 3b01 subs r3, #1 + 80025a6: b29a uxth r2, r3 + 80025a8: 68fb ldr r3, [r7, #12] + 80025aa: 86da strh r2, [r3, #54] ; 0x36 /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; - 80025b8: 2300 movs r3, #0 - 80025ba: 62fb str r3, [r7, #44] ; 0x2c + 80025ac: 2300 movs r3, #0 + 80025ae: 62fb str r3, [r7, #44] ; 0x2c } #endif /* USE_SPI_CRC */ } /* Wait until RXNE flag is reset */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) - 80025bc: 68fb ldr r3, [r7, #12] - 80025be: 681b ldr r3, [r3, #0] - 80025c0: 689b ldr r3, [r3, #8] - 80025c2: f003 0301 and.w r3, r3, #1 - 80025c6: 2b01 cmp r3, #1 - 80025c8: d119 bne.n 80025fe - 80025ca: 68fb ldr r3, [r7, #12] - 80025cc: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80025ce: b29b uxth r3, r3 - 80025d0: 2b00 cmp r3, #0 - 80025d2: d014 beq.n 80025fe + 80025b0: 68fb ldr r3, [r7, #12] + 80025b2: 681b ldr r3, [r3, #0] + 80025b4: 689b ldr r3, [r3, #8] + 80025b6: f003 0301 and.w r3, r3, #1 + 80025ba: 2b01 cmp r3, #1 + 80025bc: d119 bne.n 80025f2 + 80025be: 68fb ldr r3, [r7, #12] + 80025c0: 8fdb ldrh r3, [r3, #62] ; 0x3e + 80025c2: b29b uxth r3, r3 + 80025c4: 2b00 cmp r3, #0 + 80025c6: d014 beq.n 80025f2 { (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR; - 80025d4: 68fb ldr r3, [r7, #12] - 80025d6: 681b ldr r3, [r3, #0] - 80025d8: 68da ldr r2, [r3, #12] - 80025da: 68fb ldr r3, [r7, #12] - 80025dc: 6b9b ldr r3, [r3, #56] ; 0x38 - 80025de: b2d2 uxtb r2, r2 - 80025e0: 701a strb r2, [r3, #0] + 80025c8: 68fb ldr r3, [r7, #12] + 80025ca: 681b ldr r3, [r3, #0] + 80025cc: 68da ldr r2, [r3, #12] + 80025ce: 68fb ldr r3, [r7, #12] + 80025d0: 6b9b ldr r3, [r3, #56] ; 0x38 + 80025d2: b2d2 uxtb r2, r2 + 80025d4: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; - 80025e2: 68fb ldr r3, [r7, #12] - 80025e4: 6b9b ldr r3, [r3, #56] ; 0x38 - 80025e6: 1c5a adds r2, r3, #1 - 80025e8: 68fb ldr r3, [r7, #12] - 80025ea: 639a str r2, [r3, #56] ; 0x38 + 80025d6: 68fb ldr r3, [r7, #12] + 80025d8: 6b9b ldr r3, [r3, #56] ; 0x38 + 80025da: 1c5a adds r2, r3, #1 + 80025dc: 68fb ldr r3, [r7, #12] + 80025de: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; - 80025ec: 68fb ldr r3, [r7, #12] - 80025ee: 8fdb ldrh r3, [r3, #62] ; 0x3e - 80025f0: b29b uxth r3, r3 - 80025f2: 3b01 subs r3, #1 - 80025f4: b29a uxth r2, r3 - 80025f6: 68fb ldr r3, [r7, #12] - 80025f8: 87da strh r2, [r3, #62] ; 0x3e + 80025e0: 68fb ldr r3, [r7, #12] + 80025e2: 8fdb ldrh r3, [r3, #62] ; 0x3e + 80025e4: b29b uxth r3, r3 + 80025e6: 3b01 subs r3, #1 + 80025e8: b29a uxth r2, r3 + 80025ea: 68fb ldr r3, [r7, #12] + 80025ec: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; - 80025fa: 2301 movs r3, #1 - 80025fc: 62fb str r3, [r7, #44] ; 0x2c + 80025ee: 2301 movs r3, #1 + 80025f0: 62fb str r3, [r7, #44] ; 0x2c } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) - 80025fe: f7fe fd09 bl 8001014 - 8002602: 4602 mov r2, r0 - 8002604: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002606: 1ad3 subs r3, r2, r3 - 8002608: 6bba ldr r2, [r7, #56] ; 0x38 - 800260a: 429a cmp r2, r3 - 800260c: d803 bhi.n 8002616 - 800260e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8002610: f1b3 3fff cmp.w r3, #4294967295 - 8002614: d102 bne.n 800261c - 8002616: 6bbb ldr r3, [r7, #56] ; 0x38 - 8002618: 2b00 cmp r3, #0 - 800261a: d103 bne.n 8002624 + 80025f2: f7fe fd09 bl 8001008 + 80025f6: 4602 mov r2, r0 + 80025f8: 6a7b ldr r3, [r7, #36] ; 0x24 + 80025fa: 1ad3 subs r3, r2, r3 + 80025fc: 6bba ldr r2, [r7, #56] ; 0x38 + 80025fe: 429a cmp r2, r3 + 8002600: d803 bhi.n 800260a + 8002602: 6bbb ldr r3, [r7, #56] ; 0x38 + 8002604: f1b3 3fff cmp.w r3, #4294967295 + 8002608: d102 bne.n 8002610 + 800260a: 6bbb ldr r3, [r7, #56] ; 0x38 + 800260c: 2b00 cmp r3, #0 + 800260e: d103 bne.n 8002618 { errorcode = HAL_TIMEOUT; - 800261c: 2303 movs r3, #3 - 800261e: f887 302b strb.w r3, [r7, #43] ; 0x2b + 8002610: 2303 movs r3, #3 + 8002612: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; - 8002622: e029 b.n 8002678 + 8002616: e029 b.n 800266c while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) - 8002624: 68fb ldr r3, [r7, #12] - 8002626: 8edb ldrh r3, [r3, #54] ; 0x36 - 8002628: b29b uxth r3, r3 - 800262a: 2b00 cmp r3, #0 - 800262c: d1a2 bne.n 8002574 - 800262e: 68fb ldr r3, [r7, #12] - 8002630: 8fdb ldrh r3, [r3, #62] ; 0x3e - 8002632: b29b uxth r3, r3 - 8002634: 2b00 cmp r3, #0 - 8002636: d19d bne.n 8002574 + 8002618: 68fb ldr r3, [r7, #12] + 800261a: 8edb ldrh r3, [r3, #54] ; 0x36 + 800261c: b29b uxth r3, r3 + 800261e: 2b00 cmp r3, #0 + 8002620: d1a2 bne.n 8002568 + 8002622: 68fb ldr r3, [r7, #12] + 8002624: 8fdb ldrh r3, [r3, #62] ; 0x3e + 8002626: b29b uxth r3, r3 + 8002628: 2b00 cmp r3, #0 + 800262a: d19d bne.n 8002568 errorcode = HAL_ERROR; } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) - 8002638: 6a7a ldr r2, [r7, #36] ; 0x24 - 800263a: 6bb9 ldr r1, [r7, #56] ; 0x38 - 800263c: 68f8 ldr r0, [r7, #12] - 800263e: f000 f917 bl 8002870 - 8002642: 4603 mov r3, r0 - 8002644: 2b00 cmp r3, #0 - 8002646: d006 beq.n 8002656 + 800262c: 6a7a ldr r2, [r7, #36] ; 0x24 + 800262e: 6bb9 ldr r1, [r7, #56] ; 0x38 + 8002630: 68f8 ldr r0, [r7, #12] + 8002632: f000 f917 bl 8002864 + 8002636: 4603 mov r3, r0 + 8002638: 2b00 cmp r3, #0 + 800263a: d006 beq.n 800264a { errorcode = HAL_ERROR; - 8002648: 2301 movs r3, #1 - 800264a: f887 302b strb.w r3, [r7, #43] ; 0x2b + 800263c: 2301 movs r3, #1 + 800263e: f887 302b strb.w r3, [r7, #43] ; 0x2b hspi->ErrorCode = HAL_SPI_ERROR_FLAG; - 800264e: 68fb ldr r3, [r7, #12] - 8002650: 2220 movs r2, #32 - 8002652: 655a str r2, [r3, #84] ; 0x54 + 8002642: 68fb ldr r3, [r7, #12] + 8002644: 2220 movs r2, #32 + 8002646: 655a str r2, [r3, #84] ; 0x54 goto error; - 8002654: e010 b.n 8002678 + 8002648: e010 b.n 800266c } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) - 8002656: 68fb ldr r3, [r7, #12] - 8002658: 689b ldr r3, [r3, #8] - 800265a: 2b00 cmp r3, #0 - 800265c: d10b bne.n 8002676 + 800264a: 68fb ldr r3, [r7, #12] + 800264c: 689b ldr r3, [r3, #8] + 800264e: 2b00 cmp r3, #0 + 8002650: d10b bne.n 800266a { __HAL_SPI_CLEAR_OVRFLAG(hspi); - 800265e: 2300 movs r3, #0 - 8002660: 617b str r3, [r7, #20] - 8002662: 68fb ldr r3, [r7, #12] - 8002664: 681b ldr r3, [r3, #0] - 8002666: 68db ldr r3, [r3, #12] - 8002668: 617b str r3, [r7, #20] - 800266a: 68fb ldr r3, [r7, #12] - 800266c: 681b ldr r3, [r3, #0] - 800266e: 689b ldr r3, [r3, #8] - 8002670: 617b str r3, [r7, #20] - 8002672: 697b ldr r3, [r7, #20] - 8002674: e000 b.n 8002678 + 8002652: 2300 movs r3, #0 + 8002654: 617b str r3, [r7, #20] + 8002656: 68fb ldr r3, [r7, #12] + 8002658: 681b ldr r3, [r3, #0] + 800265a: 68db ldr r3, [r3, #12] + 800265c: 617b str r3, [r7, #20] + 800265e: 68fb ldr r3, [r7, #12] + 8002660: 681b ldr r3, [r3, #0] + 8002662: 689b ldr r3, [r3, #8] + 8002664: 617b str r3, [r7, #20] + 8002666: 697b ldr r3, [r7, #20] + 8002668: e000 b.n 800266c } error : - 8002676: bf00 nop + 800266a: bf00 nop hspi->State = HAL_SPI_STATE_READY; - 8002678: 68fb ldr r3, [r7, #12] - 800267a: 2201 movs r2, #1 - 800267c: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 800266c: 68fb ldr r3, [r7, #12] + 800266e: 2201 movs r2, #1 + 8002670: f883 2051 strb.w r2, [r3, #81] ; 0x51 __HAL_UNLOCK(hspi); - 8002680: 68fb ldr r3, [r7, #12] - 8002682: 2200 movs r2, #0 - 8002684: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8002674: 68fb ldr r3, [r7, #12] + 8002676: 2200 movs r2, #0 + 8002678: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; - 8002688: f897 302b ldrb.w r3, [r7, #43] ; 0x2b + 800267c: f897 302b ldrb.w r3, [r7, #43] ; 0x2b } - 800268c: 4618 mov r0, r3 - 800268e: 3730 adds r7, #48 ; 0x30 - 8002690: 46bd mov sp, r7 - 8002692: bd80 pop {r7, pc} + 8002680: 4618 mov r0, r3 + 8002682: 3730 adds r7, #48 ; 0x30 + 8002684: 46bd mov sp, r7 + 8002686: bd80 pop {r7, pc} -08002694 : +08002688 : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, uint32_t Timeout, uint32_t Tickstart) { - 8002694: b580 push {r7, lr} - 8002696: b088 sub sp, #32 - 8002698: af00 add r7, sp, #0 - 800269a: 60f8 str r0, [r7, #12] - 800269c: 60b9 str r1, [r7, #8] - 800269e: 603b str r3, [r7, #0] - 80026a0: 4613 mov r3, r2 - 80026a2: 71fb strb r3, [r7, #7] + 8002688: b580 push {r7, lr} + 800268a: b088 sub sp, #32 + 800268c: af00 add r7, sp, #0 + 800268e: 60f8 str r0, [r7, #12] + 8002690: 60b9 str r1, [r7, #8] + 8002692: 603b str r3, [r7, #0] + 8002694: 4613 mov r3, r2 + 8002696: 71fb strb r3, [r7, #7] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); - 80026a4: f7fe fcb6 bl 8001014 - 80026a8: 4602 mov r2, r0 - 80026aa: 6abb ldr r3, [r7, #40] ; 0x28 - 80026ac: 1a9b subs r3, r3, r2 - 80026ae: 683a ldr r2, [r7, #0] - 80026b0: 4413 add r3, r2 - 80026b2: 61fb str r3, [r7, #28] + 8002698: f7fe fcb6 bl 8001008 + 800269c: 4602 mov r2, r0 + 800269e: 6abb ldr r3, [r7, #40] ; 0x28 + 80026a0: 1a9b subs r3, r3, r2 + 80026a2: 683a ldr r2, [r7, #0] + 80026a4: 4413 add r3, r2 + 80026a6: 61fb str r3, [r7, #28] tmp_tickstart = HAL_GetTick(); - 80026b4: f7fe fcae bl 8001014 - 80026b8: 61b8 str r0, [r7, #24] + 80026a8: f7fe fcae bl 8001008 + 80026ac: 61b8 str r0, [r7, #24] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); - 80026ba: 4b39 ldr r3, [pc, #228] ; (80027a0 ) - 80026bc: 681b ldr r3, [r3, #0] - 80026be: 015b lsls r3, r3, #5 - 80026c0: 0d1b lsrs r3, r3, #20 - 80026c2: 69fa ldr r2, [r7, #28] - 80026c4: fb02 f303 mul.w r3, r2, r3 - 80026c8: 617b str r3, [r7, #20] + 80026ae: 4b39 ldr r3, [pc, #228] ; (8002794 ) + 80026b0: 681b ldr r3, [r3, #0] + 80026b2: 015b lsls r3, r3, #5 + 80026b4: 0d1b lsrs r3, r3, #20 + 80026b6: 69fa ldr r2, [r7, #28] + 80026b8: fb02 f303 mul.w r3, r2, r3 + 80026bc: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - 80026ca: e054 b.n 8002776 + 80026be: e054 b.n 800276a { if (Timeout != HAL_MAX_DELAY) - 80026cc: 683b ldr r3, [r7, #0] - 80026ce: f1b3 3fff cmp.w r3, #4294967295 - 80026d2: d050 beq.n 8002776 + 80026c0: 683b ldr r3, [r7, #0] + 80026c2: f1b3 3fff cmp.w r3, #4294967295 + 80026c6: d050 beq.n 800276a { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) - 80026d4: f7fe fc9e bl 8001014 - 80026d8: 4602 mov r2, r0 - 80026da: 69bb ldr r3, [r7, #24] - 80026dc: 1ad3 subs r3, r2, r3 - 80026de: 69fa ldr r2, [r7, #28] - 80026e0: 429a cmp r2, r3 - 80026e2: d902 bls.n 80026ea - 80026e4: 69fb ldr r3, [r7, #28] - 80026e6: 2b00 cmp r3, #0 - 80026e8: d13d bne.n 8002766 + 80026c8: f7fe fc9e bl 8001008 + 80026cc: 4602 mov r2, r0 + 80026ce: 69bb ldr r3, [r7, #24] + 80026d0: 1ad3 subs r3, r2, r3 + 80026d2: 69fa ldr r2, [r7, #28] + 80026d4: 429a cmp r2, r3 + 80026d6: d902 bls.n 80026de + 80026d8: 69fb ldr r3, [r7, #28] + 80026da: 2b00 cmp r3, #0 + 80026dc: d13d bne.n 800275a /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); - 80026ea: 68fb ldr r3, [r7, #12] - 80026ec: 681b ldr r3, [r3, #0] - 80026ee: 685a ldr r2, [r3, #4] - 80026f0: 68fb ldr r3, [r7, #12] - 80026f2: 681b ldr r3, [r3, #0] - 80026f4: f022 02e0 bic.w r2, r2, #224 ; 0xe0 - 80026f8: 605a str r2, [r3, #4] + 80026de: 68fb ldr r3, [r7, #12] + 80026e0: 681b ldr r3, [r3, #0] + 80026e2: 685a ldr r2, [r3, #4] + 80026e4: 68fb ldr r3, [r7, #12] + 80026e6: 681b ldr r3, [r3, #0] + 80026e8: f022 02e0 bic.w r2, r2, #224 ; 0xe0 + 80026ec: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 80026fa: 68fb ldr r3, [r7, #12] - 80026fc: 685b ldr r3, [r3, #4] - 80026fe: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 8002702: d111 bne.n 8002728 - 8002704: 68fb ldr r3, [r7, #12] - 8002706: 689b ldr r3, [r3, #8] - 8002708: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 800270c: d004 beq.n 8002718 + 80026ee: 68fb ldr r3, [r7, #12] + 80026f0: 685b ldr r3, [r3, #4] + 80026f2: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 80026f6: d111 bne.n 800271c + 80026f8: 68fb ldr r3, [r7, #12] + 80026fa: 689b ldr r3, [r3, #8] + 80026fc: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8002700: d004 beq.n 800270c || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 800270e: 68fb ldr r3, [r7, #12] - 8002710: 689b ldr r3, [r3, #8] - 8002712: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8002716: d107 bne.n 8002728 + 8002702: 68fb ldr r3, [r7, #12] + 8002704: 689b ldr r3, [r3, #8] + 8002706: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 800270a: d107 bne.n 800271c { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8002718: 68fb ldr r3, [r7, #12] - 800271a: 681b ldr r3, [r3, #0] - 800271c: 681a ldr r2, [r3, #0] - 800271e: 68fb ldr r3, [r7, #12] - 8002720: 681b ldr r3, [r3, #0] - 8002722: f022 0240 bic.w r2, r2, #64 ; 0x40 - 8002726: 601a str r2, [r3, #0] + 800270c: 68fb ldr r3, [r7, #12] + 800270e: 681b ldr r3, [r3, #0] + 8002710: 681a ldr r2, [r3, #0] + 8002712: 68fb ldr r3, [r7, #12] + 8002714: 681b ldr r3, [r3, #0] + 8002716: f022 0240 bic.w r2, r2, #64 ; 0x40 + 800271a: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) - 8002728: 68fb ldr r3, [r7, #12] - 800272a: 6a9b ldr r3, [r3, #40] ; 0x28 - 800272c: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8002730: d10f bne.n 8002752 + 800271c: 68fb ldr r3, [r7, #12] + 800271e: 6a9b ldr r3, [r3, #40] ; 0x28 + 8002720: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8002724: d10f bne.n 8002746 { SPI_RESET_CRC(hspi); - 8002732: 68fb ldr r3, [r7, #12] - 8002734: 681b ldr r3, [r3, #0] - 8002736: 681a ldr r2, [r3, #0] - 8002738: 68fb ldr r3, [r7, #12] - 800273a: 681b ldr r3, [r3, #0] - 800273c: f422 5200 bic.w r2, r2, #8192 ; 0x2000 - 8002740: 601a str r2, [r3, #0] - 8002742: 68fb ldr r3, [r7, #12] - 8002744: 681b ldr r3, [r3, #0] - 8002746: 681a ldr r2, [r3, #0] - 8002748: 68fb ldr r3, [r7, #12] - 800274a: 681b ldr r3, [r3, #0] - 800274c: f442 5200 orr.w r2, r2, #8192 ; 0x2000 - 8002750: 601a str r2, [r3, #0] + 8002726: 68fb ldr r3, [r7, #12] + 8002728: 681b ldr r3, [r3, #0] + 800272a: 681a ldr r2, [r3, #0] + 800272c: 68fb ldr r3, [r7, #12] + 800272e: 681b ldr r3, [r3, #0] + 8002730: f422 5200 bic.w r2, r2, #8192 ; 0x2000 + 8002734: 601a str r2, [r3, #0] + 8002736: 68fb ldr r3, [r7, #12] + 8002738: 681b ldr r3, [r3, #0] + 800273a: 681a ldr r2, [r3, #0] + 800273c: 68fb ldr r3, [r7, #12] + 800273e: 681b ldr r3, [r3, #0] + 8002740: f442 5200 orr.w r2, r2, #8192 ; 0x2000 + 8002744: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; - 8002752: 68fb ldr r3, [r7, #12] - 8002754: 2201 movs r2, #1 - 8002756: f883 2051 strb.w r2, [r3, #81] ; 0x51 + 8002746: 68fb ldr r3, [r7, #12] + 8002748: 2201 movs r2, #1 + 800274a: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); - 800275a: 68fb ldr r3, [r7, #12] - 800275c: 2200 movs r2, #0 - 800275e: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 800274e: 68fb ldr r3, [r7, #12] + 8002750: 2200 movs r2, #0 + 8002752: f883 2050 strb.w r2, [r3, #80] ; 0x50 return HAL_TIMEOUT; - 8002762: 2303 movs r3, #3 - 8002764: e017 b.n 8002796 + 8002756: 2303 movs r3, #3 + 8002758: e017 b.n 800278a } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if(count == 0U) - 8002766: 697b ldr r3, [r7, #20] - 8002768: 2b00 cmp r3, #0 - 800276a: d101 bne.n 8002770 + 800275a: 697b ldr r3, [r7, #20] + 800275c: 2b00 cmp r3, #0 + 800275e: d101 bne.n 8002764 { tmp_timeout = 0U; - 800276c: 2300 movs r3, #0 - 800276e: 61fb str r3, [r7, #28] + 8002760: 2300 movs r3, #0 + 8002762: 61fb str r3, [r7, #28] } count--; - 8002770: 697b ldr r3, [r7, #20] - 8002772: 3b01 subs r3, #1 - 8002774: 617b str r3, [r7, #20] + 8002764: 697b ldr r3, [r7, #20] + 8002766: 3b01 subs r3, #1 + 8002768: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) - 8002776: 68fb ldr r3, [r7, #12] - 8002778: 681b ldr r3, [r3, #0] - 800277a: 689a ldr r2, [r3, #8] - 800277c: 68bb ldr r3, [r7, #8] - 800277e: 4013 ands r3, r2 - 8002780: 68ba ldr r2, [r7, #8] - 8002782: 429a cmp r2, r3 - 8002784: bf0c ite eq - 8002786: 2301 moveq r3, #1 - 8002788: 2300 movne r3, #0 - 800278a: b2db uxtb r3, r3 - 800278c: 461a mov r2, r3 - 800278e: 79fb ldrb r3, [r7, #7] - 8002790: 429a cmp r2, r3 - 8002792: d19b bne.n 80026cc + 800276a: 68fb ldr r3, [r7, #12] + 800276c: 681b ldr r3, [r3, #0] + 800276e: 689a ldr r2, [r3, #8] + 8002770: 68bb ldr r3, [r7, #8] + 8002772: 4013 ands r3, r2 + 8002774: 68ba ldr r2, [r7, #8] + 8002776: 429a cmp r2, r3 + 8002778: bf0c ite eq + 800277a: 2301 moveq r3, #1 + 800277c: 2300 movne r3, #0 + 800277e: b2db uxtb r3, r3 + 8002780: 461a mov r2, r3 + 8002782: 79fb ldrb r3, [r7, #7] + 8002784: 429a cmp r2, r3 + 8002786: d19b bne.n 80026c0 } } return HAL_OK; - 8002794: 2300 movs r3, #0 + 8002788: 2300 movs r3, #0 } - 8002796: 4618 mov r0, r3 - 8002798: 3720 adds r7, #32 - 800279a: 46bd mov sp, r7 - 800279c: bd80 pop {r7, pc} - 800279e: bf00 nop - 80027a0: 20000000 .word 0x20000000 - -080027a4 : + 800278a: 4618 mov r0, r3 + 800278c: 3720 adds r7, #32 + 800278e: 46bd mov sp, r7 + 8002790: bd80 pop {r7, pc} + 8002792: bf00 nop + 8002794: 20000000 .word 0x20000000 + +08002798 : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { - 80027a4: b580 push {r7, lr} - 80027a6: b086 sub sp, #24 - 80027a8: af02 add r7, sp, #8 - 80027aa: 60f8 str r0, [r7, #12] - 80027ac: 60b9 str r1, [r7, #8] - 80027ae: 607a str r2, [r7, #4] + 8002798: b580 push {r7, lr} + 800279a: b086 sub sp, #24 + 800279c: af02 add r7, sp, #8 + 800279e: 60f8 str r0, [r7, #12] + 80027a0: 60b9 str r1, [r7, #8] + 80027a2: 607a str r2, [r7, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) - 80027b0: 68fb ldr r3, [r7, #12] - 80027b2: 685b ldr r3, [r3, #4] - 80027b4: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 80027b8: d111 bne.n 80027de - 80027ba: 68fb ldr r3, [r7, #12] - 80027bc: 689b ldr r3, [r3, #8] - 80027be: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 80027c2: d004 beq.n 80027ce + 80027a4: 68fb ldr r3, [r7, #12] + 80027a6: 685b ldr r3, [r3, #4] + 80027a8: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 80027ac: d111 bne.n 80027d2 + 80027ae: 68fb ldr r3, [r7, #12] + 80027b0: 689b ldr r3, [r3, #8] + 80027b2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 80027b6: d004 beq.n 80027c2 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) - 80027c4: 68fb ldr r3, [r7, #12] - 80027c6: 689b ldr r3, [r3, #8] - 80027c8: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 80027cc: d107 bne.n 80027de + 80027b8: 68fb ldr r3, [r7, #12] + 80027ba: 689b ldr r3, [r3, #8] + 80027bc: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 80027c0: d107 bne.n 80027d2 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 80027ce: 68fb ldr r3, [r7, #12] - 80027d0: 681b ldr r3, [r3, #0] - 80027d2: 681a ldr r2, [r3, #0] - 80027d4: 68fb ldr r3, [r7, #12] - 80027d6: 681b ldr r3, [r3, #0] - 80027d8: f022 0240 bic.w r2, r2, #64 ; 0x40 - 80027dc: 601a str r2, [r3, #0] + 80027c2: 68fb ldr r3, [r7, #12] + 80027c4: 681b ldr r3, [r3, #0] + 80027c6: 681a ldr r2, [r3, #0] + 80027c8: 68fb ldr r3, [r7, #12] + 80027ca: 681b ldr r3, [r3, #0] + 80027cc: f022 0240 bic.w r2, r2, #64 ; 0x40 + 80027d0: 601a str r2, [r3, #0] } /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ if (hspi->Init.Mode == SPI_MODE_MASTER) - 80027de: 68fb ldr r3, [r7, #12] - 80027e0: 685b ldr r3, [r3, #4] - 80027e2: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 80027e6: d12a bne.n 800283e + 80027d2: 68fb ldr r3, [r7, #12] + 80027d4: 685b ldr r3, [r3, #4] + 80027d6: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 80027da: d12a bne.n 8002832 { if (hspi->Init.Direction != SPI_DIRECTION_2LINES_RXONLY) - 80027e8: 68fb ldr r3, [r7, #12] - 80027ea: 689b ldr r3, [r3, #8] - 80027ec: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 80027f0: d012 beq.n 8002818 + 80027dc: 68fb ldr r3, [r7, #12] + 80027de: 689b ldr r3, [r3, #8] + 80027e0: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 80027e4: d012 beq.n 800280c { /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - 80027f2: 687b ldr r3, [r7, #4] - 80027f4: 9300 str r3, [sp, #0] - 80027f6: 68bb ldr r3, [r7, #8] - 80027f8: 2200 movs r2, #0 - 80027fa: 2180 movs r1, #128 ; 0x80 - 80027fc: 68f8 ldr r0, [r7, #12] - 80027fe: f7ff ff49 bl 8002694 - 8002802: 4603 mov r3, r0 - 8002804: 2b00 cmp r3, #0 - 8002806: d02d beq.n 8002864 + 80027e6: 687b ldr r3, [r7, #4] + 80027e8: 9300 str r3, [sp, #0] + 80027ea: 68bb ldr r3, [r7, #8] + 80027ec: 2200 movs r2, #0 + 80027ee: 2180 movs r1, #128 ; 0x80 + 80027f0: 68f8 ldr r0, [r7, #12] + 80027f2: f7ff ff49 bl 8002688 + 80027f6: 4603 mov r3, r0 + 80027f8: 2b00 cmp r3, #0 + 80027fa: d02d beq.n 8002858 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8002808: 68fb ldr r3, [r7, #12] - 800280a: 6d5b ldr r3, [r3, #84] ; 0x54 - 800280c: f043 0220 orr.w r2, r3, #32 - 8002810: 68fb ldr r3, [r7, #12] - 8002812: 655a str r2, [r3, #84] ; 0x54 + 80027fc: 68fb ldr r3, [r7, #12] + 80027fe: 6d5b ldr r3, [r3, #84] ; 0x54 + 8002800: f043 0220 orr.w r2, r3, #32 + 8002804: 68fb ldr r3, [r7, #12] + 8002806: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; - 8002814: 2303 movs r3, #3 - 8002816: e026 b.n 8002866 + 8002808: 2303 movs r3, #3 + 800280a: e026 b.n 800285a } } else { /* Wait the RXNE reset */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK) - 8002818: 687b ldr r3, [r7, #4] - 800281a: 9300 str r3, [sp, #0] - 800281c: 68bb ldr r3, [r7, #8] - 800281e: 2200 movs r2, #0 - 8002820: 2101 movs r1, #1 - 8002822: 68f8 ldr r0, [r7, #12] - 8002824: f7ff ff36 bl 8002694 - 8002828: 4603 mov r3, r0 - 800282a: 2b00 cmp r3, #0 - 800282c: d01a beq.n 8002864 + 800280c: 687b ldr r3, [r7, #4] + 800280e: 9300 str r3, [sp, #0] + 8002810: 68bb ldr r3, [r7, #8] + 8002812: 2200 movs r2, #0 + 8002814: 2101 movs r1, #1 + 8002816: 68f8 ldr r0, [r7, #12] + 8002818: f7ff ff36 bl 8002688 + 800281c: 4603 mov r3, r0 + 800281e: 2b00 cmp r3, #0 + 8002820: d01a beq.n 8002858 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 800282e: 68fb ldr r3, [r7, #12] - 8002830: 6d5b ldr r3, [r3, #84] ; 0x54 - 8002832: f043 0220 orr.w r2, r3, #32 - 8002836: 68fb ldr r3, [r7, #12] - 8002838: 655a str r2, [r3, #84] ; 0x54 + 8002822: 68fb ldr r3, [r7, #12] + 8002824: 6d5b ldr r3, [r3, #84] ; 0x54 + 8002826: f043 0220 orr.w r2, r3, #32 + 800282a: 68fb ldr r3, [r7, #12] + 800282c: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; - 800283a: 2303 movs r3, #3 - 800283c: e013 b.n 8002866 + 800282e: 2303 movs r3, #3 + 8002830: e013 b.n 800285a } } else { /* Wait the RXNE reset */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK) - 800283e: 687b ldr r3, [r7, #4] - 8002840: 9300 str r3, [sp, #0] - 8002842: 68bb ldr r3, [r7, #8] - 8002844: 2200 movs r2, #0 - 8002846: 2101 movs r1, #1 - 8002848: 68f8 ldr r0, [r7, #12] - 800284a: f7ff ff23 bl 8002694 - 800284e: 4603 mov r3, r0 - 8002850: 2b00 cmp r3, #0 - 8002852: d007 beq.n 8002864 + 8002832: 687b ldr r3, [r7, #4] + 8002834: 9300 str r3, [sp, #0] + 8002836: 68bb ldr r3, [r7, #8] + 8002838: 2200 movs r2, #0 + 800283a: 2101 movs r1, #1 + 800283c: 68f8 ldr r0, [r7, #12] + 800283e: f7ff ff23 bl 8002688 + 8002842: 4603 mov r3, r0 + 8002844: 2b00 cmp r3, #0 + 8002846: d007 beq.n 8002858 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 8002854: 68fb ldr r3, [r7, #12] - 8002856: 6d5b ldr r3, [r3, #84] ; 0x54 - 8002858: f043 0220 orr.w r2, r3, #32 - 800285c: 68fb ldr r3, [r7, #12] - 800285e: 655a str r2, [r3, #84] ; 0x54 + 8002848: 68fb ldr r3, [r7, #12] + 800284a: 6d5b ldr r3, [r3, #84] ; 0x54 + 800284c: f043 0220 orr.w r2, r3, #32 + 8002850: 68fb ldr r3, [r7, #12] + 8002852: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; - 8002860: 2303 movs r3, #3 - 8002862: e000 b.n 8002866 + 8002854: 2303 movs r3, #3 + 8002856: e000 b.n 800285a } } return HAL_OK; - 8002864: 2300 movs r3, #0 + 8002858: 2300 movs r3, #0 } - 8002866: 4618 mov r0, r3 - 8002868: 3710 adds r7, #16 - 800286a: 46bd mov sp, r7 - 800286c: bd80 pop {r7, pc} + 800285a: 4618 mov r0, r3 + 800285c: 3710 adds r7, #16 + 800285e: 46bd mov sp, r7 + 8002860: bd80 pop {r7, pc} ... -08002870 : +08002864 : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { - 8002870: b580 push {r7, lr} - 8002872: b088 sub sp, #32 - 8002874: af02 add r7, sp, #8 - 8002876: 60f8 str r0, [r7, #12] - 8002878: 60b9 str r1, [r7, #8] - 800287a: 607a str r2, [r7, #4] + 8002864: b580 push {r7, lr} + 8002866: b088 sub sp, #32 + 8002868: af02 add r7, sp, #8 + 800286a: 60f8 str r0, [r7, #12] + 800286c: 60b9 str r1, [r7, #8] + 800286e: 607a str r2, [r7, #4] /* Timeout in µs */ __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U); - 800287c: 4b1b ldr r3, [pc, #108] ; (80028ec ) - 800287e: 681b ldr r3, [r3, #0] - 8002880: 4a1b ldr r2, [pc, #108] ; (80028f0 ) - 8002882: fba2 2303 umull r2, r3, r2, r3 - 8002886: 0d5b lsrs r3, r3, #21 - 8002888: f44f 727a mov.w r2, #1000 ; 0x3e8 - 800288c: fb02 f303 mul.w r3, r2, r3 - 8002890: 617b str r3, [r7, #20] + 8002870: 4b1b ldr r3, [pc, #108] ; (80028e0 ) + 8002872: 681b ldr r3, [r3, #0] + 8002874: 4a1b ldr r2, [pc, #108] ; (80028e4 ) + 8002876: fba2 2303 umull r2, r3, r2, r3 + 800287a: 0d5b lsrs r3, r3, #21 + 800287c: f44f 727a mov.w r2, #1000 ; 0x3e8 + 8002880: fb02 f303 mul.w r3, r2, r3 + 8002884: 617b str r3, [r7, #20] /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */ if (hspi->Init.Mode == SPI_MODE_MASTER) - 8002892: 68fb ldr r3, [r7, #12] - 8002894: 685b ldr r3, [r3, #4] - 8002896: f5b3 7f82 cmp.w r3, #260 ; 0x104 - 800289a: d112 bne.n 80028c2 + 8002886: 68fb ldr r3, [r7, #12] + 8002888: 685b ldr r3, [r3, #4] + 800288a: f5b3 7f82 cmp.w r3, #260 ; 0x104 + 800288e: d112 bne.n 80028b6 { /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) - 800289c: 687b ldr r3, [r7, #4] - 800289e: 9300 str r3, [sp, #0] - 80028a0: 68bb ldr r3, [r7, #8] - 80028a2: 2200 movs r2, #0 - 80028a4: 2180 movs r1, #128 ; 0x80 - 80028a6: 68f8 ldr r0, [r7, #12] - 80028a8: f7ff fef4 bl 8002694 - 80028ac: 4603 mov r3, r0 - 80028ae: 2b00 cmp r3, #0 - 80028b0: d016 beq.n 80028e0 + 8002890: 687b ldr r3, [r7, #4] + 8002892: 9300 str r3, [sp, #0] + 8002894: 68bb ldr r3, [r7, #8] + 8002896: 2200 movs r2, #0 + 8002898: 2180 movs r1, #128 ; 0x80 + 800289a: 68f8 ldr r0, [r7, #12] + 800289c: f7ff fef4 bl 8002688 + 80028a0: 4603 mov r3, r0 + 80028a2: 2b00 cmp r3, #0 + 80028a4: d016 beq.n 80028d4 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); - 80028b2: 68fb ldr r3, [r7, #12] - 80028b4: 6d5b ldr r3, [r3, #84] ; 0x54 - 80028b6: f043 0220 orr.w r2, r3, #32 - 80028ba: 68fb ldr r3, [r7, #12] - 80028bc: 655a str r2, [r3, #84] ; 0x54 + 80028a6: 68fb ldr r3, [r7, #12] + 80028a8: 6d5b ldr r3, [r3, #84] ; 0x54 + 80028aa: f043 0220 orr.w r2, r3, #32 + 80028ae: 68fb ldr r3, [r7, #12] + 80028b0: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; - 80028be: 2303 movs r3, #3 - 80028c0: e00f b.n 80028e2 + 80028b2: 2303 movs r3, #3 + 80028b4: e00f b.n 80028d6 * User have to calculate the timeout value to fit with the time of 1 byte transfer. * This time is directly link with the SPI clock from Master device. */ do { if (count == 0U) - 80028c2: 697b ldr r3, [r7, #20] - 80028c4: 2b00 cmp r3, #0 - 80028c6: d00a beq.n 80028de + 80028b6: 697b ldr r3, [r7, #20] + 80028b8: 2b00 cmp r3, #0 + 80028ba: d00a beq.n 80028d2 { break; } count--; - 80028c8: 697b ldr r3, [r7, #20] - 80028ca: 3b01 subs r3, #1 - 80028cc: 617b str r3, [r7, #20] + 80028bc: 697b ldr r3, [r7, #20] + 80028be: 3b01 subs r3, #1 + 80028c0: 617b str r3, [r7, #20] } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET); - 80028ce: 68fb ldr r3, [r7, #12] - 80028d0: 681b ldr r3, [r3, #0] - 80028d2: 689b ldr r3, [r3, #8] - 80028d4: f003 0380 and.w r3, r3, #128 ; 0x80 - 80028d8: 2b80 cmp r3, #128 ; 0x80 - 80028da: d0f2 beq.n 80028c2 - 80028dc: e000 b.n 80028e0 + 80028c2: 68fb ldr r3, [r7, #12] + 80028c4: 681b ldr r3, [r3, #0] + 80028c6: 689b ldr r3, [r3, #8] + 80028c8: f003 0380 and.w r3, r3, #128 ; 0x80 + 80028cc: 2b80 cmp r3, #128 ; 0x80 + 80028ce: d0f2 beq.n 80028b6 + 80028d0: e000 b.n 80028d4 break; - 80028de: bf00 nop + 80028d2: bf00 nop } return HAL_OK; - 80028e0: 2300 movs r3, #0 -} - 80028e2: 4618 mov r0, r3 - 80028e4: 3718 adds r7, #24 - 80028e6: 46bd mov sp, r7 - 80028e8: bd80 pop {r7, pc} - 80028ea: bf00 nop - 80028ec: 20000000 .word 0x20000000 - 80028f0: 165e9f81 .word 0x165e9f81 - -080028f4 : - * write_single_ak09916_reg(uint8_t reg, uint8_t val) - * - * read_multiple_ak09916_reg(uint8_t reg, uint8_t len) -*/ -static void cs_high() -{ - 80028f4: b580 push {r7, lr} - 80028f6: af00 add r7, sp, #0 - HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, SET); - 80028f8: 2201 movs r2, #1 - 80028fa: 2110 movs r1, #16 - 80028fc: 4802 ldr r0, [pc, #8] ; (8002908 ) - 80028fe: f7fe fe23 bl 8001548 + 80028d4: 2300 movs r3, #0 } - 8002902: bf00 nop - 8002904: bd80 pop {r7, pc} - 8002906: bf00 nop - 8002908: 40020000 .word 0x40020000 + 80028d6: 4618 mov r0, r3 + 80028d8: 3718 adds r7, #24 + 80028da: 46bd mov sp, r7 + 80028dc: bd80 pop {r7, pc} + 80028de: bf00 nop + 80028e0: 20000000 .word 0x20000000 + 80028e4: 165e9f81 .word 0x165e9f81 -0800290c : +080028e8 : +static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len); -static void cs_low() -{ - 800290c: b580 push {r7, lr} - 800290e: af00 add r7, sp, #0 - HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, RESET); - 8002910: 2200 movs r2, #0 - 8002912: 2110 movs r1, #16 - 8002914: 4802 ldr r0, [pc, #8] ; (8002920 ) - 8002916: f7fe fe17 bl 8001548 -} - 800291a: bf00 nop - 800291c: bd80 pop {r7, pc} - 800291e: bf00 nop - 8002920: 40020000 .word 0x40020000 -08002924 : - -static void select_user_bank(userbank ub) +/* Main Functions */ +void icm20948_init() { - 8002924: b580 push {r7, lr} - 8002926: b084 sub sp, #16 - 8002928: af00 add r7, sp, #0 - 800292a: 4603 mov r3, r0 - 800292c: 71fb strb r3, [r7, #7] - uint8_t write_reg[2]; - write_reg[0] = WRITE | REG_BANK_SEL; - 800292e: 237f movs r3, #127 ; 0x7f - 8002930: 733b strb r3, [r7, #12] - write_reg[1] = ub; - 8002932: 79fb ldrb r3, [r7, #7] - 8002934: 737b strb r3, [r7, #13] + 80028e8: b580 push {r7, lr} + 80028ea: af00 add r7, sp, #0 + while(!icm20948_who_am_i()); + 80028ec: bf00 nop + 80028ee: f000 f9db bl 8002ca8 + 80028f2: 4603 mov r3, r0 + 80028f4: f083 0301 eor.w r3, r3, #1 + 80028f8: b2db uxtb r3, r3 + 80028fa: 2b00 cmp r3, #0 + 80028fc: d1f7 bne.n 80028ee - cs_low(); - 8002936: f7ff ffe9 bl 800290c - HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 10); - 800293a: f107 010c add.w r1, r7, #12 - 800293e: 230a movs r3, #10 - 8002940: 2202 movs r2, #2 - 8002942: 4804 ldr r0, [pc, #16] ; (8002954 ) - 8002944: f7ff fab7 bl 8001eb6 - cs_high(); - 8002948: f7ff ffd4 bl 80028f4 -} - 800294c: bf00 nop - 800294e: 3710 adds r7, #16 - 8002950: 46bd mov sp, r7 - 8002952: bd80 pop {r7, pc} - 8002954: 20000078 .word 0x20000078 + icm20948_device_reset(); + 80028fe: f000 f9f8 bl 8002cf2 + icm20948_wakeup(); + 8002902: f000 fa0d bl 8002d20 -08002958 : + icm20948_clock_source(1); + 8002906: 2001 movs r0, #1 + 8002908: f000 fa85 bl 8002e16 + icm20948_odr_align_enable(); + 800290c: f000 fa9c bl 8002e48 + + icm20948_spi_slave_enable(); + 8002910: f000 fa20 bl 8002d54 + + icm20948_gyro_low_pass_filter(0); + 8002914: 2000 movs r0, #0 + 8002916: f000 faa0 bl 8002e5a + icm20948_accel_low_pass_filter(0); + 800291a: 2000 movs r0, #0 + 800291c: f000 faba bl 8002e94 -static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg) -{ - 8002958: b580 push {r7, lr} - 800295a: b084 sub sp, #16 - 800295c: af00 add r7, sp, #0 - 800295e: 4603 mov r3, r0 - 8002960: 460a mov r2, r1 - 8002962: 71fb strb r3, [r7, #7] - 8002964: 4613 mov r3, r2 - 8002966: 71bb strb r3, [r7, #6] - uint8_t read_reg = READ | reg; - 8002968: 79bb ldrb r3, [r7, #6] - 800296a: f063 037f orn r3, r3, #127 ; 0x7f - 800296e: b2db uxtb r3, r3 - 8002970: 73fb strb r3, [r7, #15] - uint8_t reg_val; - select_user_bank(ub); - 8002972: 79fb ldrb r3, [r7, #7] - 8002974: 4618 mov r0, r3 - 8002976: f7ff ffd5 bl 8002924 + icm20948_gyro_sample_rate_divider(0); + 8002920: 2000 movs r0, #0 + 8002922: f000 fad4 bl 8002ece + icm20948_accel_sample_rate_divider(0); + 8002926: 2000 movs r0, #0 + 8002928: f000 fae0 bl 8002eec - cs_low(); - 800297a: f7ff ffc7 bl 800290c - HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); - 800297e: f107 010f add.w r1, r7, #15 - 8002982: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8002986: 2201 movs r2, #1 - 8002988: 4808 ldr r0, [pc, #32] ; (80029ac ) - 800298a: f7ff fa94 bl 8001eb6 - HAL_SPI_Receive(ICM20948_SPI, ®_val, 1, 1000); - 800298e: f107 010e add.w r1, r7, #14 - 8002992: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8002996: 2201 movs r2, #1 - 8002998: 4804 ldr r0, [pc, #16] ; (80029ac ) - 800299a: f7ff fbc8 bl 800212e - cs_high(); - 800299e: f7ff ffa9 bl 80028f4 + icm20948_gyro_calibration(); + 800292c: f000 fb0e bl 8002f4c + icm20948_accel_calibration(); + 8002930: f000 fba8 bl 8003084 - return reg_val; - 80029a2: 7bbb ldrb r3, [r7, #14] + icm20948_gyro_full_scale_select(_2000dps); + 8002934: 2003 movs r0, #3 + 8002936: f000 fcb3 bl 80032a0 + icm20948_accel_full_scale_select(_16g); + 800293a: 2003 movs r0, #3 + 800293c: f000 fcfa bl 8003334 } - 80029a4: 4618 mov r0, r3 - 80029a6: 3710 adds r7, #16 - 80029a8: 46bd mov sp, r7 - 80029aa: bd80 pop {r7, pc} - 80029ac: 20000078 .word 0x20000078 + 8002940: bf00 nop + 8002942: bd80 pop {r7, pc} -080029b0 : +08002944 : -static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) +void ak09916_init() { - 80029b0: b580 push {r7, lr} - 80029b2: b084 sub sp, #16 - 80029b4: af00 add r7, sp, #0 - 80029b6: 4603 mov r3, r0 - 80029b8: 71fb strb r3, [r7, #7] - 80029ba: 460b mov r3, r1 - 80029bc: 71bb strb r3, [r7, #6] - 80029be: 4613 mov r3, r2 - 80029c0: 717b strb r3, [r7, #5] - uint8_t read_reg = READ | reg; - 80029c2: 79bb ldrb r3, [r7, #6] - 80029c4: f063 037f orn r3, r3, #127 ; 0x7f - 80029c8: b2db uxtb r3, r3 - 80029ca: 73fb strb r3, [r7, #15] - static uint8_t reg_val[6]; - select_user_bank(ub); - 80029cc: 79fb ldrb r3, [r7, #7] - 80029ce: 4618 mov r0, r3 - 80029d0: f7ff ffa8 bl 8002924 - - cs_low(); - 80029d4: f7ff ff9a bl 800290c - HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); - 80029d8: f107 010f add.w r1, r7, #15 - 80029dc: f44f 737a mov.w r3, #1000 ; 0x3e8 - 80029e0: 2201 movs r2, #1 - 80029e2: 4809 ldr r0, [pc, #36] ; (8002a08 ) - 80029e4: f7ff fa67 bl 8001eb6 - HAL_SPI_Receive(ICM20948_SPI, reg_val, len, 1000); - 80029e8: 797b ldrb r3, [r7, #5] - 80029ea: b29a uxth r2, r3 - 80029ec: f44f 737a mov.w r3, #1000 ; 0x3e8 - 80029f0: 4906 ldr r1, [pc, #24] ; (8002a0c ) - 80029f2: 4805 ldr r0, [pc, #20] ; (8002a08 ) - 80029f4: f7ff fb9b bl 800212e - cs_high(); - 80029f8: f7ff ff7c bl 80028f4 + 8002944: b580 push {r7, lr} + 8002946: af00 add r7, sp, #0 + icm20948_i2c_master_reset(); + 8002948: f000 fa1b bl 8002d82 + icm20948_i2c_master_enable(); + 800294c: f000 fa30 bl 8002db0 + icm20948_i2c_master_clk_frq(7); + 8002950: 2007 movs r0, #7 + 8002952: f000 fa47 bl 8002de4 + + while(!ak09916_who_am_i()); + 8002956: bf00 nop + 8002958: f000 f9b9 bl 8002cce + 800295c: 4603 mov r3, r0 + 800295e: f083 0301 eor.w r3, r3, #1 + 8002962: b2db uxtb r3, r3 + 8002964: 2b00 cmp r3, #0 + 8002966: d1f7 bne.n 8002958 - return reg_val; - 80029fc: 4b03 ldr r3, [pc, #12] ; (8002a0c ) + ak09916_soft_reset(); + 8002968: f000 f9cf bl 8002d0a + ak09916_operation_mode_setting(continuous_measurement_100hz); + 800296c: 2008 movs r0, #8 + 800296e: f000 fadb bl 8002f28 } - 80029fe: 4618 mov r0, r3 - 8002a00: 3710 adds r7, #16 - 8002a02: 46bd mov sp, r7 - 8002a04: bd80 pop {r7, pc} - 8002a06: bf00 nop - 8002a08: 20000078 .word 0x20000078 - 8002a0c: 20000030 .word 0x20000030 + 8002972: bf00 nop + 8002974: bd80 pop {r7, pc} -08002a10 : +08002976 : -static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) +void icm20948_gyro_read(axises* data) { - 8002a10: b580 push {r7, lr} - 8002a12: b084 sub sp, #16 - 8002a14: af00 add r7, sp, #0 - 8002a16: 4603 mov r3, r0 - 8002a18: 71fb strb r3, [r7, #7] - 8002a1a: 460b mov r3, r1 - 8002a1c: 71bb strb r3, [r7, #6] - 8002a1e: 4613 mov r3, r2 - 8002a20: 717b strb r3, [r7, #5] - uint8_t write_reg[2]; - write_reg[0] = WRITE | reg; - 8002a22: 79bb ldrb r3, [r7, #6] - 8002a24: 733b strb r3, [r7, #12] - write_reg[1] = val; - 8002a26: 797b ldrb r3, [r7, #5] - 8002a28: 737b strb r3, [r7, #13] - - select_user_bank(ub); - 8002a2a: 79fb ldrb r3, [r7, #7] - 8002a2c: 4618 mov r0, r3 - 8002a2e: f7ff ff79 bl 8002924 + 8002976: b580 push {r7, lr} + 8002978: b084 sub sp, #16 + 800297a: af00 add r7, sp, #0 + 800297c: 6078 str r0, [r7, #4] + uint8_t* temp = read_multiple_icm20948_reg(ub_0, B0_GYRO_XOUT_H, 6); + 800297e: 2206 movs r2, #6 + 8002980: 2133 movs r1, #51 ; 0x33 + 8002982: 2000 movs r0, #0 + 8002984: f000 fd9e bl 80034c4 + 8002988: 60f8 str r0, [r7, #12] - cs_low(); - 8002a32: f7ff ff6b bl 800290c - HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 1000); - 8002a36: f107 010c add.w r1, r7, #12 - 8002a3a: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8002a3e: 2202 movs r2, #2 - 8002a40: 4804 ldr r0, [pc, #16] ; (8002a54 ) - 8002a42: f7ff fa38 bl 8001eb6 - cs_high(); - 8002a46: f7ff ff55 bl 80028f4 + data->x = (int16_t)(temp[0] << 8 | temp[1]); + 800298a: 68fb ldr r3, [r7, #12] + 800298c: 781b ldrb r3, [r3, #0] + 800298e: 021b lsls r3, r3, #8 + 8002990: b21a sxth r2, r3 + 8002992: 68fb ldr r3, [r7, #12] + 8002994: 3301 adds r3, #1 + 8002996: 781b ldrb r3, [r3, #0] + 8002998: b21b sxth r3, r3 + 800299a: 4313 orrs r3, r2 + 800299c: b21b sxth r3, r3 + 800299e: ee07 3a90 vmov s15, r3 + 80029a2: eef8 7ae7 vcvt.f32.s32 s15, s15 + 80029a6: 687b ldr r3, [r7, #4] + 80029a8: edc3 7a00 vstr s15, [r3] + data->y = (int16_t)(temp[2] << 8 | temp[3]); + 80029ac: 68fb ldr r3, [r7, #12] + 80029ae: 3302 adds r3, #2 + 80029b0: 781b ldrb r3, [r3, #0] + 80029b2: 021b lsls r3, r3, #8 + 80029b4: b21a sxth r2, r3 + 80029b6: 68fb ldr r3, [r7, #12] + 80029b8: 3303 adds r3, #3 + 80029ba: 781b ldrb r3, [r3, #0] + 80029bc: b21b sxth r3, r3 + 80029be: 4313 orrs r3, r2 + 80029c0: b21b sxth r3, r3 + 80029c2: ee07 3a90 vmov s15, r3 + 80029c6: eef8 7ae7 vcvt.f32.s32 s15, s15 + 80029ca: 687b ldr r3, [r7, #4] + 80029cc: edc3 7a01 vstr s15, [r3, #4] + data->z = (int16_t)(temp[4] << 8 | temp[5]); + 80029d0: 68fb ldr r3, [r7, #12] + 80029d2: 3304 adds r3, #4 + 80029d4: 781b ldrb r3, [r3, #0] + 80029d6: 021b lsls r3, r3, #8 + 80029d8: b21a sxth r2, r3 + 80029da: 68fb ldr r3, [r7, #12] + 80029dc: 3305 adds r3, #5 + 80029de: 781b ldrb r3, [r3, #0] + 80029e0: b21b sxth r3, r3 + 80029e2: 4313 orrs r3, r2 + 80029e4: b21b sxth r3, r3 + 80029e6: ee07 3a90 vmov s15, r3 + 80029ea: eef8 7ae7 vcvt.f32.s32 s15, s15 + 80029ee: 687b ldr r3, [r7, #4] + 80029f0: edc3 7a02 vstr s15, [r3, #8] } - 8002a4a: bf00 nop - 8002a4c: 3710 adds r7, #16 - 8002a4e: 46bd mov sp, r7 - 8002a50: bd80 pop {r7, pc} - 8002a52: bf00 nop - 8002a54: 20000078 .word 0x20000078 + 80029f4: bf00 nop + 80029f6: 3710 adds r7, #16 + 80029f8: 46bd mov sp, r7 + 80029fa: bd80 pop {r7, pc} -08002a58 : +080029fc : -static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) +void icm20948_accel_read(axises* data) { - 8002a58: b580 push {r7, lr} - 8002a5a: b084 sub sp, #16 - 8002a5c: af00 add r7, sp, #0 - 8002a5e: 603a str r2, [r7, #0] - 8002a60: 461a mov r2, r3 - 8002a62: 4603 mov r3, r0 - 8002a64: 71fb strb r3, [r7, #7] - 8002a66: 460b mov r3, r1 - 8002a68: 71bb strb r3, [r7, #6] - 8002a6a: 4613 mov r3, r2 - 8002a6c: 717b strb r3, [r7, #5] - uint8_t write_reg = WRITE | reg; - 8002a6e: 79bb ldrb r3, [r7, #6] - 8002a70: 73fb strb r3, [r7, #15] - select_user_bank(ub); - 8002a72: 79fb ldrb r3, [r7, #7] - 8002a74: 4618 mov r0, r3 - 8002a76: f7ff ff55 bl 8002924 + 80029fc: b580 push {r7, lr} + 80029fe: b084 sub sp, #16 + 8002a00: af00 add r7, sp, #0 + 8002a02: 6078 str r0, [r7, #4] + uint8_t* temp = read_multiple_icm20948_reg(ub_0, B0_ACCEL_XOUT_H, 6); + 8002a04: 2206 movs r2, #6 + 8002a06: 212d movs r1, #45 ; 0x2d + 8002a08: 2000 movs r0, #0 + 8002a0a: f000 fd5b bl 80034c4 + 8002a0e: 60f8 str r0, [r7, #12] - cs_low(); - 8002a7a: f7ff ff47 bl 800290c - HAL_SPI_Transmit(ICM20948_SPI, &write_reg, 1, 1000); - 8002a7e: f107 010f add.w r1, r7, #15 - 8002a82: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8002a86: 2201 movs r2, #1 - 8002a88: 4808 ldr r0, [pc, #32] ; (8002aac ) - 8002a8a: f7ff fa14 bl 8001eb6 - HAL_SPI_Transmit(ICM20948_SPI, val, len, 1000); - 8002a8e: 797b ldrb r3, [r7, #5] - 8002a90: b29a uxth r2, r3 - 8002a92: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8002a96: 6839 ldr r1, [r7, #0] - 8002a98: 4804 ldr r0, [pc, #16] ; (8002aac ) - 8002a9a: f7ff fa0c bl 8001eb6 - cs_high(); - 8002a9e: f7ff ff29 bl 80028f4 + data->x = (int16_t)(temp[0] << 8 | temp[1]); + 8002a10: 68fb ldr r3, [r7, #12] + 8002a12: 781b ldrb r3, [r3, #0] + 8002a14: 021b lsls r3, r3, #8 + 8002a16: b21a sxth r2, r3 + 8002a18: 68fb ldr r3, [r7, #12] + 8002a1a: 3301 adds r3, #1 + 8002a1c: 781b ldrb r3, [r3, #0] + 8002a1e: b21b sxth r3, r3 + 8002a20: 4313 orrs r3, r2 + 8002a22: b21b sxth r3, r3 + 8002a24: ee07 3a90 vmov s15, r3 + 8002a28: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8002a2c: 687b ldr r3, [r7, #4] + 8002a2e: edc3 7a00 vstr s15, [r3] + data->y = (int16_t)(temp[2] << 8 | temp[3]); + 8002a32: 68fb ldr r3, [r7, #12] + 8002a34: 3302 adds r3, #2 + 8002a36: 781b ldrb r3, [r3, #0] + 8002a38: 021b lsls r3, r3, #8 + 8002a3a: b21a sxth r2, r3 + 8002a3c: 68fb ldr r3, [r7, #12] + 8002a3e: 3303 adds r3, #3 + 8002a40: 781b ldrb r3, [r3, #0] + 8002a42: b21b sxth r3, r3 + 8002a44: 4313 orrs r3, r2 + 8002a46: b21b sxth r3, r3 + 8002a48: ee07 3a90 vmov s15, r3 + 8002a4c: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8002a50: 687b ldr r3, [r7, #4] + 8002a52: edc3 7a01 vstr s15, [r3, #4] + data->z = (int16_t)(temp[4] << 8 | temp[5]) + accel_scale_factor; + 8002a56: 68fb ldr r3, [r7, #12] + 8002a58: 3304 adds r3, #4 + 8002a5a: 781b ldrb r3, [r3, #0] + 8002a5c: 021b lsls r3, r3, #8 + 8002a5e: b21a sxth r2, r3 + 8002a60: 68fb ldr r3, [r7, #12] + 8002a62: 3305 adds r3, #5 + 8002a64: 781b ldrb r3, [r3, #0] + 8002a66: b21b sxth r3, r3 + 8002a68: 4313 orrs r3, r2 + 8002a6a: b21b sxth r3, r3 + 8002a6c: ee07 3a90 vmov s15, r3 + 8002a70: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 8002a74: 4b05 ldr r3, [pc, #20] ; (8002a8c ) + 8002a76: edd3 7a00 vldr s15, [r3] + 8002a7a: ee77 7a27 vadd.f32 s15, s14, s15 + 8002a7e: 687b ldr r3, [r7, #4] + 8002a80: edc3 7a02 vstr s15, [r3, #8] + // Add scale factor because calibraiton function offset gravity acceleration. } - 8002aa2: bf00 nop - 8002aa4: 3710 adds r7, #16 - 8002aa6: 46bd mov sp, r7 - 8002aa8: bd80 pop {r7, pc} - 8002aaa: bf00 nop - 8002aac: 20000078 .word 0x20000078 + 8002a84: bf00 nop + 8002a86: 3710 adds r7, #16 + 8002a88: 46bd mov sp, r7 + 8002a8a: bd80 pop {r7, pc} + 8002a8c: 2000002c .word 0x2000002c -08002ab0 : +08002a90 : -static uint8_t read_single_ak09916_reg(uint8_t reg) +bool ak09916_mag_read(axises* data) { - 8002ab0: b580 push {r7, lr} - 8002ab2: b082 sub sp, #8 - 8002ab4: af00 add r7, sp, #0 - 8002ab6: 4603 mov r3, r0 - 8002ab8: 71fb strb r3, [r7, #7] - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); - 8002aba: 228c movs r2, #140 ; 0x8c - 8002abc: 2103 movs r1, #3 - 8002abe: 2030 movs r0, #48 ; 0x30 - 8002ac0: f7ff ffa6 bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - 8002ac4: 79fb ldrb r3, [r7, #7] - 8002ac6: 461a mov r2, r3 - 8002ac8: 2104 movs r1, #4 - 8002aca: 2030 movs r0, #48 ; 0x30 - 8002acc: f7ff ffa0 bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); - 8002ad0: 2281 movs r2, #129 ; 0x81 - 8002ad2: 2105 movs r1, #5 - 8002ad4: 2030 movs r0, #48 ; 0x30 - 8002ad6: f7ff ff9b bl 8002a10 + 8002a90: b580 push {r7, lr} + 8002a92: b086 sub sp, #24 + 8002a94: af00 add r7, sp, #0 + 8002a96: 6078 str r0, [r7, #4] + uint8_t* temp; + uint8_t drdy, hofl; // data ready, overflow - HAL_Delay(1); - 8002ada: 2001 movs r0, #1 - 8002adc: f7fe faa6 bl 800102c - return read_single_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00); - 8002ae0: 213b movs r1, #59 ; 0x3b - 8002ae2: 2000 movs r0, #0 - 8002ae4: f7ff ff38 bl 8002958 - 8002ae8: 4603 mov r3, r0 -} - 8002aea: 4618 mov r0, r3 - 8002aec: 3708 adds r7, #8 - 8002aee: 46bd mov sp, r7 - 8002af0: bd80 pop {r7, pc} + drdy = read_single_ak09916_reg(MAG_ST1) & 0x01; + 8002a98: 2010 movs r0, #16 + 8002a9a: f000 fd6f bl 800357c + 8002a9e: 4603 mov r3, r0 + 8002aa0: f003 0301 and.w r3, r3, #1 + 8002aa4: 75fb strb r3, [r7, #23] + if(!drdy) return false; + 8002aa6: 7dfb ldrb r3, [r7, #23] + 8002aa8: 2b00 cmp r3, #0 + 8002aaa: d101 bne.n 8002ab0 + 8002aac: 2300 movs r3, #0 + 8002aae: e046 b.n 8002b3e -08002af2 : + temp = read_multiple_ak09916_reg(MAG_HXL, 6); + 8002ab0: 2106 movs r1, #6 + 8002ab2: 2011 movs r0, #17 + 8002ab4: f000 fda5 bl 8003602 + 8002ab8: 6138 str r0, [r7, #16] -static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len) -{ - 8002af2: b580 push {r7, lr} - 8002af4: b082 sub sp, #8 - 8002af6: af00 add r7, sp, #0 - 8002af8: 4603 mov r3, r0 - 8002afa: 460a mov r2, r1 - 8002afc: 71fb strb r3, [r7, #7] - 8002afe: 4613 mov r3, r2 - 8002b00: 71bb strb r3, [r7, #6] - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); - 8002b02: 228c movs r2, #140 ; 0x8c - 8002b04: 2103 movs r1, #3 - 8002b06: 2030 movs r0, #48 ; 0x30 - 8002b08: f7ff ff82 bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - 8002b0c: 79fb ldrb r3, [r7, #7] - 8002b0e: 461a mov r2, r3 - 8002b10: 2104 movs r1, #4 - 8002b12: 2030 movs r0, #48 ; 0x30 - 8002b14: f7ff ff7c bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x80 | len); - 8002b18: 79bb ldrb r3, [r7, #6] - 8002b1a: f063 037f orn r3, r3, #127 ; 0x7f - 8002b1e: b2db uxtb r3, r3 - 8002b20: 461a mov r2, r3 - 8002b22: 2105 movs r1, #5 - 8002b24: 2030 movs r0, #48 ; 0x30 - 8002b26: f7ff ff73 bl 8002a10 + hofl = read_single_ak09916_reg(MAG_ST2) & 0x08; + 8002aba: 2018 movs r0, #24 + 8002abc: f000 fd5e bl 800357c + 8002ac0: 4603 mov r3, r0 + 8002ac2: f003 0308 and.w r3, r3, #8 + 8002ac6: 73fb strb r3, [r7, #15] + if(hofl) return false; + 8002ac8: 7bfb ldrb r3, [r7, #15] + 8002aca: 2b00 cmp r3, #0 + 8002acc: d001 beq.n 8002ad2 + 8002ace: 2300 movs r3, #0 + 8002ad0: e035 b.n 8002b3e - HAL_Delay(1); - 8002b2a: 2001 movs r0, #1 - 8002b2c: f7fe fa7e bl 800102c - return read_multiple_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00, len); - 8002b30: 79bb ldrb r3, [r7, #6] - 8002b32: 461a mov r2, r3 - 8002b34: 213b movs r1, #59 ; 0x3b - 8002b36: 2000 movs r0, #0 - 8002b38: f7ff ff3a bl 80029b0 - 8002b3c: 4603 mov r3, r0 + data->x = (int16_t)(temp[1] << 8 | temp[0]); + 8002ad2: 693b ldr r3, [r7, #16] + 8002ad4: 3301 adds r3, #1 + 8002ad6: 781b ldrb r3, [r3, #0] + 8002ad8: 021b lsls r3, r3, #8 + 8002ada: b21a sxth r2, r3 + 8002adc: 693b ldr r3, [r7, #16] + 8002ade: 781b ldrb r3, [r3, #0] + 8002ae0: b21b sxth r3, r3 + 8002ae2: 4313 orrs r3, r2 + 8002ae4: b21b sxth r3, r3 + 8002ae6: ee07 3a90 vmov s15, r3 + 8002aea: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8002aee: 687b ldr r3, [r7, #4] + 8002af0: edc3 7a00 vstr s15, [r3] + data->y = (int16_t)(temp[3] << 8 | temp[2]); + 8002af4: 693b ldr r3, [r7, #16] + 8002af6: 3303 adds r3, #3 + 8002af8: 781b ldrb r3, [r3, #0] + 8002afa: 021b lsls r3, r3, #8 + 8002afc: b21a sxth r2, r3 + 8002afe: 693b ldr r3, [r7, #16] + 8002b00: 3302 adds r3, #2 + 8002b02: 781b ldrb r3, [r3, #0] + 8002b04: b21b sxth r3, r3 + 8002b06: 4313 orrs r3, r2 + 8002b08: b21b sxth r3, r3 + 8002b0a: ee07 3a90 vmov s15, r3 + 8002b0e: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8002b12: 687b ldr r3, [r7, #4] + 8002b14: edc3 7a01 vstr s15, [r3, #4] + data->z = (int16_t)(temp[5] << 8 | temp[4]); + 8002b18: 693b ldr r3, [r7, #16] + 8002b1a: 3305 adds r3, #5 + 8002b1c: 781b ldrb r3, [r3, #0] + 8002b1e: 021b lsls r3, r3, #8 + 8002b20: b21a sxth r2, r3 + 8002b22: 693b ldr r3, [r7, #16] + 8002b24: 3304 adds r3, #4 + 8002b26: 781b ldrb r3, [r3, #0] + 8002b28: b21b sxth r3, r3 + 8002b2a: 4313 orrs r3, r2 + 8002b2c: b21b sxth r3, r3 + 8002b2e: ee07 3a90 vmov s15, r3 + 8002b32: eef8 7ae7 vcvt.f32.s32 s15, s15 + 8002b36: 687b ldr r3, [r7, #4] + 8002b38: edc3 7a02 vstr s15, [r3, #8] + + return true; + 8002b3c: 2301 movs r3, #1 } 8002b3e: 4618 mov r0, r3 - 8002b40: 3708 adds r7, #8 + 8002b40: 3718 adds r7, #24 8002b42: 46bd mov sp, r7 8002b44: bd80 pop {r7, pc} + ... -08002b46 : +08002b48 : -static void write_single_ak09916_reg(uint8_t reg, uint8_t val) +void icm20948_gyro_read_dps(axises* data) { - 8002b46: b580 push {r7, lr} - 8002b48: b082 sub sp, #8 - 8002b4a: af00 add r7, sp, #0 - 8002b4c: 4603 mov r3, r0 - 8002b4e: 460a mov r2, r1 - 8002b50: 71fb strb r3, [r7, #7] - 8002b52: 4613 mov r3, r2 - 8002b54: 71bb strb r3, [r7, #6] - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, WRITE | MAG_SLAVE_ADDR); - 8002b56: 220c movs r2, #12 - 8002b58: 2103 movs r1, #3 - 8002b5a: 2030 movs r0, #48 ; 0x30 - 8002b5c: f7ff ff58 bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - 8002b60: 79fb ldrb r3, [r7, #7] - 8002b62: 461a mov r2, r3 - 8002b64: 2104 movs r1, #4 - 8002b66: 2030 movs r0, #48 ; 0x30 - 8002b68: f7ff ff52 bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_DO, val); - 8002b6c: 79bb ldrb r3, [r7, #6] - 8002b6e: 461a mov r2, r3 - 8002b70: 2106 movs r1, #6 - 8002b72: 2030 movs r0, #48 ; 0x30 - 8002b74: f7ff ff4c bl 8002a10 - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); - 8002b78: 2281 movs r2, #129 ; 0x81 - 8002b7a: 2105 movs r1, #5 - 8002b7c: 2030 movs r0, #48 ; 0x30 - 8002b7e: f7ff ff47 bl 8002a10 + 8002b48: b580 push {r7, lr} + 8002b4a: b082 sub sp, #8 + 8002b4c: af00 add r7, sp, #0 + 8002b4e: 6078 str r0, [r7, #4] + icm20948_gyro_read(data); + 8002b50: 6878 ldr r0, [r7, #4] + 8002b52: f7ff ff10 bl 8002976 + + data->x /= gyro_scale_factor; + 8002b56: 687b ldr r3, [r7, #4] + 8002b58: edd3 6a00 vldr s13, [r3] + 8002b5c: 4b10 ldr r3, [pc, #64] ; (8002ba0 ) + 8002b5e: ed93 7a00 vldr s14, [r3] + 8002b62: eec6 7a87 vdiv.f32 s15, s13, s14 + 8002b66: 687b ldr r3, [r7, #4] + 8002b68: edc3 7a00 vstr s15, [r3] + data->y /= gyro_scale_factor; + 8002b6c: 687b ldr r3, [r7, #4] + 8002b6e: edd3 6a01 vldr s13, [r3, #4] + 8002b72: 4b0b ldr r3, [pc, #44] ; (8002ba0 ) + 8002b74: ed93 7a00 vldr s14, [r3] + 8002b78: eec6 7a87 vdiv.f32 s15, s13, s14 + 8002b7c: 687b ldr r3, [r7, #4] + 8002b7e: edc3 7a01 vstr s15, [r3, #4] + data->z /= gyro_scale_factor; + 8002b82: 687b ldr r3, [r7, #4] + 8002b84: edd3 6a02 vldr s13, [r3, #8] + 8002b88: 4b05 ldr r3, [pc, #20] ; (8002ba0 ) + 8002b8a: ed93 7a00 vldr s14, [r3] + 8002b8e: eec6 7a87 vdiv.f32 s15, s13, s14 + 8002b92: 687b ldr r3, [r7, #4] + 8002b94: edc3 7a02 vstr s15, [r3, #8] } - 8002b82: bf00 nop - 8002b84: 3708 adds r7, #8 - 8002b86: 46bd mov sp, r7 - 8002b88: bd80 pop {r7, pc} - -08002b8a : + 8002b98: bf00 nop + 8002b9a: 3708 adds r7, #8 + 8002b9c: 46bd mov sp, r7 + 8002b9e: bd80 pop {r7, pc} + 8002ba0: 20000028 .word 0x20000028 +08002ba4 : -/* ICM-20948 Main Functions */ -void icm20948_init() +void icm20948_accel_read_g(axises* data) { - 8002b8a: b580 push {r7, lr} - 8002b8c: af00 add r7, sp, #0 - icm20948_device_reset(); - 8002b8e: f000 f8a7 bl 8002ce0 - icm20948_wakeup(); - 8002b92: f000 f8b1 bl 8002cf8 + 8002ba4: b580 push {r7, lr} + 8002ba6: b082 sub sp, #8 + 8002ba8: af00 add r7, sp, #0 + 8002baa: 6078 str r0, [r7, #4] + icm20948_accel_read(data); + 8002bac: 6878 ldr r0, [r7, #4] + 8002bae: f7ff ff25 bl 80029fc + + data->x /= accel_scale_factor; + 8002bb2: 687b ldr r3, [r7, #4] + 8002bb4: edd3 6a00 vldr s13, [r3] + 8002bb8: 4b10 ldr r3, [pc, #64] ; (8002bfc ) + 8002bba: ed93 7a00 vldr s14, [r3] + 8002bbe: eec6 7a87 vdiv.f32 s15, s13, s14 + 8002bc2: 687b ldr r3, [r7, #4] + 8002bc4: edc3 7a00 vstr s15, [r3] + data->y /= accel_scale_factor; + 8002bc8: 687b ldr r3, [r7, #4] + 8002bca: edd3 6a01 vldr s13, [r3, #4] + 8002bce: 4b0b ldr r3, [pc, #44] ; (8002bfc ) + 8002bd0: ed93 7a00 vldr s14, [r3] + 8002bd4: eec6 7a87 vdiv.f32 s15, s13, s14 + 8002bd8: 687b ldr r3, [r7, #4] + 8002bda: edc3 7a01 vstr s15, [r3, #4] + data->z /= accel_scale_factor; + 8002bde: 687b ldr r3, [r7, #4] + 8002be0: edd3 6a02 vldr s13, [r3, #8] + 8002be4: 4b05 ldr r3, [pc, #20] ; (8002bfc ) + 8002be6: ed93 7a00 vldr s14, [r3] + 8002bea: eec6 7a87 vdiv.f32 s15, s13, s14 + 8002bee: 687b ldr r3, [r7, #4] + 8002bf0: edc3 7a02 vstr s15, [r3, #8] +} + 8002bf4: bf00 nop + 8002bf6: 3708 adds r7, #8 + 8002bf8: 46bd mov sp, r7 + 8002bfa: bd80 pop {r7, pc} + 8002bfc: 2000002c .word 0x2000002c - icm20948_clock_source(1); - 8002b96: 2001 movs r0, #1 - 8002b98: f000 f929 bl 8002dee - icm20948_odr_align_enable(); - 8002b9c: f000 f940 bl 8002e20 - - icm20948_spi_slave_enable(); - 8002ba0: f000 f8c4 bl 8002d2c - - icm20948_gyro_low_pass_filter(0); - 8002ba4: 2000 movs r0, #0 - 8002ba6: f000 f944 bl 8002e32 - icm20948_accel_low_pass_filter(0); - 8002baa: 2000 movs r0, #0 - 8002bac: f000 f95e bl 8002e6c +08002c00 : - icm20948_gyro_sample_rate_divider(0); - 8002bb0: 2000 movs r0, #0 - 8002bb2: f000 f978 bl 8002ea6 - icm20948_accel_sample_rate_divider(0); - 8002bb6: 2000 movs r0, #0 - 8002bb8: f000 f984 bl 8002ec4 +bool ak09916_mag_read_uT(axises* data) +{ + 8002c00: b580 push {r7, lr} + 8002c02: b086 sub sp, #24 + 8002c04: af00 add r7, sp, #0 + 8002c06: 6078 str r0, [r7, #4] + axises temp; + bool new_data = ak09916_mag_read(&temp); + 8002c08: f107 0308 add.w r3, r7, #8 + 8002c0c: 4618 mov r0, r3 + 8002c0e: f7ff ff3f bl 8002a90 + 8002c12: 4603 mov r3, r0 + 8002c14: 75fb strb r3, [r7, #23] + if(!new_data) return false; + 8002c16: 7dfb ldrb r3, [r7, #23] + 8002c18: f083 0301 eor.w r3, r3, #1 + 8002c1c: b2db uxtb r3, r3 + 8002c1e: 2b00 cmp r3, #0 + 8002c20: d001 beq.n 8002c26 + 8002c22: 2300 movs r3, #0 + 8002c24: e036 b.n 8002c94 - icm20948_gyro_calibration(); - 8002bbc: f000 f9a0 bl 8002f00 - icm20948_accel_calibration(); - 8002bc0: f000 fa3a bl 8003038 + data->x = (float)(temp.x * 0.15); + 8002c26: 68bb ldr r3, [r7, #8] + 8002c28: 4618 mov r0, r3 + 8002c2a: f7fd fd63 bl 80006f4 <__aeabi_f2d> + 8002c2e: a31c add r3, pc, #112 ; (adr r3, 8002ca0 ) + 8002c30: e9d3 2300 ldrd r2, r3, [r3] + 8002c34: f7fd fad0 bl 80001d8 <__aeabi_dmul> + 8002c38: 4602 mov r2, r0 + 8002c3a: 460b mov r3, r1 + 8002c3c: 4610 mov r0, r2 + 8002c3e: 4619 mov r1, r3 + 8002c40: f7fd fdb0 bl 80007a4 <__aeabi_d2f> + 8002c44: 4602 mov r2, r0 + 8002c46: 687b ldr r3, [r7, #4] + 8002c48: 601a str r2, [r3, #0] + data->y = (float)(temp.y * 0.15); + 8002c4a: 68fb ldr r3, [r7, #12] + 8002c4c: 4618 mov r0, r3 + 8002c4e: f7fd fd51 bl 80006f4 <__aeabi_f2d> + 8002c52: a313 add r3, pc, #76 ; (adr r3, 8002ca0 ) + 8002c54: e9d3 2300 ldrd r2, r3, [r3] + 8002c58: f7fd fabe bl 80001d8 <__aeabi_dmul> + 8002c5c: 4602 mov r2, r0 + 8002c5e: 460b mov r3, r1 + 8002c60: 4610 mov r0, r2 + 8002c62: 4619 mov r1, r3 + 8002c64: f7fd fd9e bl 80007a4 <__aeabi_d2f> + 8002c68: 4602 mov r2, r0 + 8002c6a: 687b ldr r3, [r7, #4] + 8002c6c: 605a str r2, [r3, #4] + data->z = (float)(temp.z * 0.15); + 8002c6e: 693b ldr r3, [r7, #16] + 8002c70: 4618 mov r0, r3 + 8002c72: f7fd fd3f bl 80006f4 <__aeabi_f2d> + 8002c76: a30a add r3, pc, #40 ; (adr r3, 8002ca0 ) + 8002c78: e9d3 2300 ldrd r2, r3, [r3] + 8002c7c: f7fd faac bl 80001d8 <__aeabi_dmul> + 8002c80: 4602 mov r2, r0 + 8002c82: 460b mov r3, r1 + 8002c84: 4610 mov r0, r2 + 8002c86: 4619 mov r1, r3 + 8002c88: f7fd fd8c bl 80007a4 <__aeabi_d2f> + 8002c8c: 4602 mov r2, r0 + 8002c8e: 687b ldr r3, [r7, #4] + 8002c90: 609a str r2, [r3, #8] - icm20948_gyro_full_scale_select(_2000dps); - 8002bc4: 2003 movs r0, #3 - 8002bc6: f000 fb45 bl 8003254 - icm20948_accel_full_scale_select(_16g); - 8002bca: 2003 movs r0, #3 - 8002bcc: f000 fb8c bl 80032e8 -} - 8002bd0: bf00 nop - 8002bd2: bd80 pop {r7, pc} + return true; + 8002c92: 2301 movs r3, #1 +} + 8002c94: 4618 mov r0, r3 + 8002c96: 3718 adds r7, #24 + 8002c98: 46bd mov sp, r7 + 8002c9a: bd80 pop {r7, pc} + 8002c9c: f3af 8000 nop.w + 8002ca0: 33333333 .word 0x33333333 + 8002ca4: 3fc33333 .word 0x3fc33333 -08002bd4 : +08002ca8 : -void icm20948_gyro_read(axises* data) -{ - 8002bd4: b580 push {r7, lr} - 8002bd6: b084 sub sp, #16 - 8002bd8: af00 add r7, sp, #0 - 8002bda: 6078 str r0, [r7, #4] - uint8_t* temp = read_multiple_icm20948_reg(ub_0, B0_GYRO_XOUT_H, 6); - 8002bdc: 2206 movs r2, #6 - 8002bde: 2133 movs r1, #51 ; 0x33 - 8002be0: 2000 movs r0, #0 - 8002be2: f7ff fee5 bl 80029b0 - 8002be6: 60f8 str r0, [r7, #12] - data->x = (int16_t)(temp[0] << 8 | temp[1]); - 8002be8: 68fb ldr r3, [r7, #12] - 8002bea: 781b ldrb r3, [r3, #0] - 8002bec: 021b lsls r3, r3, #8 - 8002bee: b21a sxth r2, r3 - 8002bf0: 68fb ldr r3, [r7, #12] - 8002bf2: 3301 adds r3, #1 - 8002bf4: 781b ldrb r3, [r3, #0] - 8002bf6: b21b sxth r3, r3 - 8002bf8: 4313 orrs r3, r2 - 8002bfa: b21b sxth r3, r3 - 8002bfc: ee07 3a90 vmov s15, r3 - 8002c00: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8002c04: 687b ldr r3, [r7, #4] - 8002c06: edc3 7a00 vstr s15, [r3] - data->y = (int16_t)(temp[2] << 8 | temp[3]); - 8002c0a: 68fb ldr r3, [r7, #12] - 8002c0c: 3302 adds r3, #2 - 8002c0e: 781b ldrb r3, [r3, #0] - 8002c10: 021b lsls r3, r3, #8 - 8002c12: b21a sxth r2, r3 - 8002c14: 68fb ldr r3, [r7, #12] - 8002c16: 3303 adds r3, #3 - 8002c18: 781b ldrb r3, [r3, #0] - 8002c1a: b21b sxth r3, r3 - 8002c1c: 4313 orrs r3, r2 - 8002c1e: b21b sxth r3, r3 - 8002c20: ee07 3a90 vmov s15, r3 - 8002c24: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8002c28: 687b ldr r3, [r7, #4] - 8002c2a: edc3 7a01 vstr s15, [r3, #4] - data->z = (int16_t)(temp[4] << 8 | temp[5]); - 8002c2e: 68fb ldr r3, [r7, #12] - 8002c30: 3304 adds r3, #4 - 8002c32: 781b ldrb r3, [r3, #0] - 8002c34: 021b lsls r3, r3, #8 - 8002c36: b21a sxth r2, r3 - 8002c38: 68fb ldr r3, [r7, #12] - 8002c3a: 3305 adds r3, #5 - 8002c3c: 781b ldrb r3, [r3, #0] - 8002c3e: b21b sxth r3, r3 - 8002c40: 4313 orrs r3, r2 - 8002c42: b21b sxth r3, r3 - 8002c44: ee07 3a90 vmov s15, r3 - 8002c48: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8002c4c: 687b ldr r3, [r7, #4] - 8002c4e: edc3 7a02 vstr s15, [r3, #8] +/* Sub Functions */ +bool icm20948_who_am_i() +{ + 8002ca8: b580 push {r7, lr} + 8002caa: b082 sub sp, #8 + 8002cac: af00 add r7, sp, #0 + uint8_t icm20948_id = read_single_icm20948_reg(ub_0, B0_WHO_AM_I); + 8002cae: 2100 movs r1, #0 + 8002cb0: 2000 movs r0, #0 + 8002cb2: f000 fbb7 bl 8003424 + 8002cb6: 4603 mov r3, r0 + 8002cb8: 71fb strb r3, [r7, #7] + + if(icm20948_id == ICM20948_ID) + 8002cba: 79fb ldrb r3, [r7, #7] + 8002cbc: 2bea cmp r3, #234 ; 0xea + 8002cbe: d101 bne.n 8002cc4 + return true; + 8002cc0: 2301 movs r3, #1 + 8002cc2: e000 b.n 8002cc6 + else + return false; + 8002cc4: 2300 movs r3, #0 } - 8002c52: bf00 nop - 8002c54: 3710 adds r7, #16 - 8002c56: 46bd mov sp, r7 - 8002c58: bd80 pop {r7, pc} + 8002cc6: 4618 mov r0, r3 + 8002cc8: 3708 adds r7, #8 + 8002cca: 46bd mov sp, r7 + 8002ccc: bd80 pop {r7, pc} -08002c5a : +08002cce : -void icm20948_accel_read(axises* data) +bool ak09916_who_am_i() { - 8002c5a: b580 push {r7, lr} - 8002c5c: b084 sub sp, #16 - 8002c5e: af00 add r7, sp, #0 - 8002c60: 6078 str r0, [r7, #4] - uint8_t* temp = read_multiple_icm20948_reg(ub_0, B0_ACCEL_XOUT_H, 6); - 8002c62: 2206 movs r2, #6 - 8002c64: 212d movs r1, #45 ; 0x2d - 8002c66: 2000 movs r0, #0 - 8002c68: f7ff fea2 bl 80029b0 - 8002c6c: 60f8 str r0, [r7, #12] - - data->x = (int16_t)(temp[0] << 8 | temp[1]); - 8002c6e: 68fb ldr r3, [r7, #12] - 8002c70: 781b ldrb r3, [r3, #0] - 8002c72: 021b lsls r3, r3, #8 - 8002c74: b21a sxth r2, r3 - 8002c76: 68fb ldr r3, [r7, #12] - 8002c78: 3301 adds r3, #1 - 8002c7a: 781b ldrb r3, [r3, #0] - 8002c7c: b21b sxth r3, r3 - 8002c7e: 4313 orrs r3, r2 - 8002c80: b21b sxth r3, r3 - 8002c82: ee07 3a90 vmov s15, r3 - 8002c86: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8002c8a: 687b ldr r3, [r7, #4] - 8002c8c: edc3 7a00 vstr s15, [r3] - data->y = (int16_t)(temp[2] << 8 | temp[3]); - 8002c90: 68fb ldr r3, [r7, #12] - 8002c92: 3302 adds r3, #2 - 8002c94: 781b ldrb r3, [r3, #0] - 8002c96: 021b lsls r3, r3, #8 - 8002c98: b21a sxth r2, r3 - 8002c9a: 68fb ldr r3, [r7, #12] - 8002c9c: 3303 adds r3, #3 - 8002c9e: 781b ldrb r3, [r3, #0] - 8002ca0: b21b sxth r3, r3 - 8002ca2: 4313 orrs r3, r2 - 8002ca4: b21b sxth r3, r3 - 8002ca6: ee07 3a90 vmov s15, r3 - 8002caa: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8002cae: 687b ldr r3, [r7, #4] - 8002cb0: edc3 7a01 vstr s15, [r3, #4] - data->z = (int16_t)(temp[4] << 8 | temp[5]); - 8002cb4: 68fb ldr r3, [r7, #12] - 8002cb6: 3304 adds r3, #4 - 8002cb8: 781b ldrb r3, [r3, #0] - 8002cba: 021b lsls r3, r3, #8 - 8002cbc: b21a sxth r2, r3 - 8002cbe: 68fb ldr r3, [r7, #12] - 8002cc0: 3305 adds r3, #5 - 8002cc2: 781b ldrb r3, [r3, #0] - 8002cc4: b21b sxth r3, r3 - 8002cc6: 4313 orrs r3, r2 - 8002cc8: b21b sxth r3, r3 - 8002cca: ee07 3a90 vmov s15, r3 - 8002cce: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8002cd2: 687b ldr r3, [r7, #4] - 8002cd4: edc3 7a02 vstr s15, [r3, #8] -} - 8002cd8: bf00 nop - 8002cda: 3710 adds r7, #16 - 8002cdc: 46bd mov sp, r7 - 8002cde: bd80 pop {r7, pc} - -08002ce0 : + 8002cce: b580 push {r7, lr} + 8002cd0: b082 sub sp, #8 + 8002cd2: af00 add r7, sp, #0 + uint8_t ak09916_id = read_single_ak09916_reg(MAG_WIA2); + 8002cd4: 2001 movs r0, #1 + 8002cd6: f000 fc51 bl 800357c + 8002cda: 4603 mov r3, r0 + 8002cdc: 71fb strb r3, [r7, #7] + + if(ak09916_id == AK09916_ID) + 8002cde: 79fb ldrb r3, [r7, #7] + 8002ce0: 2b09 cmp r3, #9 + 8002ce2: d101 bne.n 8002ce8 + return true; + 8002ce4: 2301 movs r3, #1 + 8002ce6: e000 b.n 8002cea else return false; + 8002ce8: 2300 movs r3, #0 } + 8002cea: 4618 mov r0, r3 + 8002cec: 3708 adds r7, #8 + 8002cee: 46bd mov sp, r7 + 8002cf0: bd80 pop {r7, pc} + +08002cf2 : void icm20948_device_reset() { - 8002ce0: b580 push {r7, lr} - 8002ce2: af00 add r7, sp, #0 + 8002cf2: b580 push {r7, lr} + 8002cf4: af00 add r7, sp, #0 write_single_icm20948_reg(ub_0, B0_PWR_MGMT_1, 0x80 | 0x41); - 8002ce4: 22c1 movs r2, #193 ; 0xc1 - 8002ce6: 2106 movs r1, #6 - 8002ce8: 2000 movs r0, #0 - 8002cea: f7ff fe91 bl 8002a10 + 8002cf6: 22c1 movs r2, #193 ; 0xc1 + 8002cf8: 2106 movs r1, #6 + 8002cfa: 2000 movs r0, #0 + 8002cfc: f000 fbbe bl 800347c + HAL_Delay(100); + 8002d00: 2064 movs r0, #100 ; 0x64 + 8002d02: f7fe f98d bl 8001020 +} + 8002d06: bf00 nop + 8002d08: bd80 pop {r7, pc} + +08002d0a : + +void ak09916_soft_reset() +{ + 8002d0a: b580 push {r7, lr} + 8002d0c: af00 add r7, sp, #0 + write_single_ak09916_reg(MAG_CNTL3, 0x01); + 8002d0e: 2101 movs r1, #1 + 8002d10: 2032 movs r0, #50 ; 0x32 + 8002d12: f000 fc54 bl 80035be HAL_Delay(100); - 8002cee: 2064 movs r0, #100 ; 0x64 - 8002cf0: f7fe f99c bl 800102c + 8002d16: 2064 movs r0, #100 ; 0x64 + 8002d18: f7fe f982 bl 8001020 } - 8002cf4: bf00 nop - 8002cf6: bd80 pop {r7, pc} + 8002d1c: bf00 nop + 8002d1e: bd80 pop {r7, pc} -08002cf8 : +08002d20 : void icm20948_wakeup() { - 8002cf8: b580 push {r7, lr} - 8002cfa: b082 sub sp, #8 - 8002cfc: af00 add r7, sp, #0 + 8002d20: b580 push {r7, lr} + 8002d22: b082 sub sp, #8 + 8002d24: af00 add r7, sp, #0 uint8_t new_val = read_single_icm20948_reg(ub_0, B0_PWR_MGMT_1); - 8002cfe: 2106 movs r1, #6 - 8002d00: 2000 movs r0, #0 - 8002d02: f7ff fe29 bl 8002958 - 8002d06: 4603 mov r3, r0 - 8002d08: 71fb strb r3, [r7, #7] + 8002d26: 2106 movs r1, #6 + 8002d28: 2000 movs r0, #0 + 8002d2a: f000 fb7b bl 8003424 + 8002d2e: 4603 mov r3, r0 + 8002d30: 71fb strb r3, [r7, #7] new_val &= 0xBF; - 8002d0a: 79fb ldrb r3, [r7, #7] - 8002d0c: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8002d10: 71fb strb r3, [r7, #7] + 8002d32: 79fb ldrb r3, [r7, #7] + 8002d34: f023 0340 bic.w r3, r3, #64 ; 0x40 + 8002d38: 71fb strb r3, [r7, #7] write_single_icm20948_reg(ub_0, B0_PWR_MGMT_1, new_val); - 8002d12: 79fb ldrb r3, [r7, #7] - 8002d14: 461a mov r2, r3 - 8002d16: 2106 movs r1, #6 - 8002d18: 2000 movs r0, #0 - 8002d1a: f7ff fe79 bl 8002a10 + 8002d3a: 79fb ldrb r3, [r7, #7] + 8002d3c: 461a mov r2, r3 + 8002d3e: 2106 movs r1, #6 + 8002d40: 2000 movs r0, #0 + 8002d42: f000 fb9b bl 800347c HAL_Delay(100); - 8002d1e: 2064 movs r0, #100 ; 0x64 - 8002d20: f7fe f984 bl 800102c + 8002d46: 2064 movs r0, #100 ; 0x64 + 8002d48: f7fe f96a bl 8001020 } - 8002d24: bf00 nop - 8002d26: 3708 adds r7, #8 - 8002d28: 46bd mov sp, r7 - 8002d2a: bd80 pop {r7, pc} + 8002d4c: bf00 nop + 8002d4e: 3708 adds r7, #8 + 8002d50: 46bd mov sp, r7 + 8002d52: bd80 pop {r7, pc} -08002d2c : +08002d54 : write_single_icm20948_reg(ub_0, B0_PWR_MGMT_1, new_val); HAL_Delay(100); } void icm20948_spi_slave_enable() { - 8002d2c: b580 push {r7, lr} - 8002d2e: b082 sub sp, #8 - 8002d30: af00 add r7, sp, #0 + 8002d54: b580 push {r7, lr} + 8002d56: b082 sub sp, #8 + 8002d58: af00 add r7, sp, #0 uint8_t new_val = read_single_icm20948_reg(ub_0, B0_USER_CTRL); - 8002d32: 2103 movs r1, #3 - 8002d34: 2000 movs r0, #0 - 8002d36: f7ff fe0f bl 8002958 - 8002d3a: 4603 mov r3, r0 - 8002d3c: 71fb strb r3, [r7, #7] + 8002d5a: 2103 movs r1, #3 + 8002d5c: 2000 movs r0, #0 + 8002d5e: f000 fb61 bl 8003424 + 8002d62: 4603 mov r3, r0 + 8002d64: 71fb strb r3, [r7, #7] new_val |= 0x10; - 8002d3e: 79fb ldrb r3, [r7, #7] - 8002d40: f043 0310 orr.w r3, r3, #16 - 8002d44: 71fb strb r3, [r7, #7] + 8002d66: 79fb ldrb r3, [r7, #7] + 8002d68: f043 0310 orr.w r3, r3, #16 + 8002d6c: 71fb strb r3, [r7, #7] write_single_icm20948_reg(ub_0, B0_USER_CTRL, new_val); - 8002d46: 79fb ldrb r3, [r7, #7] - 8002d48: 461a mov r2, r3 - 8002d4a: 2103 movs r1, #3 - 8002d4c: 2000 movs r0, #0 - 8002d4e: f7ff fe5f bl 8002a10 + 8002d6e: 79fb ldrb r3, [r7, #7] + 8002d70: 461a mov r2, r3 + 8002d72: 2103 movs r1, #3 + 8002d74: 2000 movs r0, #0 + 8002d76: f000 fb81 bl 800347c } - 8002d52: bf00 nop - 8002d54: 3708 adds r7, #8 - 8002d56: 46bd mov sp, r7 - 8002d58: bd80 pop {r7, pc} + 8002d7a: bf00 nop + 8002d7c: 3708 adds r7, #8 + 8002d7e: 46bd mov sp, r7 + 8002d80: bd80 pop {r7, pc} -08002d5a : +08002d82 : void icm20948_i2c_master_reset() { - 8002d5a: b580 push {r7, lr} - 8002d5c: b082 sub sp, #8 - 8002d5e: af00 add r7, sp, #0 + 8002d82: b580 push {r7, lr} + 8002d84: b082 sub sp, #8 + 8002d86: af00 add r7, sp, #0 uint8_t new_val = read_single_icm20948_reg(ub_0, B0_USER_CTRL); - 8002d60: 2103 movs r1, #3 - 8002d62: 2000 movs r0, #0 - 8002d64: f7ff fdf8 bl 8002958 - 8002d68: 4603 mov r3, r0 - 8002d6a: 71fb strb r3, [r7, #7] + 8002d88: 2103 movs r1, #3 + 8002d8a: 2000 movs r0, #0 + 8002d8c: f000 fb4a bl 8003424 + 8002d90: 4603 mov r3, r0 + 8002d92: 71fb strb r3, [r7, #7] new_val |= 0x02; - 8002d6c: 79fb ldrb r3, [r7, #7] - 8002d6e: f043 0302 orr.w r3, r3, #2 - 8002d72: 71fb strb r3, [r7, #7] + 8002d94: 79fb ldrb r3, [r7, #7] + 8002d96: f043 0302 orr.w r3, r3, #2 + 8002d9a: 71fb strb r3, [r7, #7] write_single_icm20948_reg(ub_0, B0_USER_CTRL, new_val); - 8002d74: 79fb ldrb r3, [r7, #7] - 8002d76: 461a mov r2, r3 - 8002d78: 2103 movs r1, #3 - 8002d7a: 2000 movs r0, #0 - 8002d7c: f7ff fe48 bl 8002a10 + 8002d9c: 79fb ldrb r3, [r7, #7] + 8002d9e: 461a mov r2, r3 + 8002da0: 2103 movs r1, #3 + 8002da2: 2000 movs r0, #0 + 8002da4: f000 fb6a bl 800347c } - 8002d80: bf00 nop - 8002d82: 3708 adds r7, #8 - 8002d84: 46bd mov sp, r7 - 8002d86: bd80 pop {r7, pc} + 8002da8: bf00 nop + 8002daa: 3708 adds r7, #8 + 8002dac: 46bd mov sp, r7 + 8002dae: bd80 pop {r7, pc} -08002d88 : +08002db0 : void icm20948_i2c_master_enable() { - 8002d88: b580 push {r7, lr} - 8002d8a: b082 sub sp, #8 - 8002d8c: af00 add r7, sp, #0 + 8002db0: b580 push {r7, lr} + 8002db2: b082 sub sp, #8 + 8002db4: af00 add r7, sp, #0 uint8_t new_val = read_single_icm20948_reg(ub_0, B0_USER_CTRL); - 8002d8e: 2103 movs r1, #3 - 8002d90: 2000 movs r0, #0 - 8002d92: f7ff fde1 bl 8002958 - 8002d96: 4603 mov r3, r0 - 8002d98: 71fb strb r3, [r7, #7] + 8002db6: 2103 movs r1, #3 + 8002db8: 2000 movs r0, #0 + 8002dba: f000 fb33 bl 8003424 + 8002dbe: 4603 mov r3, r0 + 8002dc0: 71fb strb r3, [r7, #7] new_val |= 0x20; - 8002d9a: 79fb ldrb r3, [r7, #7] - 8002d9c: f043 0320 orr.w r3, r3, #32 - 8002da0: 71fb strb r3, [r7, #7] + 8002dc2: 79fb ldrb r3, [r7, #7] + 8002dc4: f043 0320 orr.w r3, r3, #32 + 8002dc8: 71fb strb r3, [r7, #7] write_single_icm20948_reg(ub_0, B0_USER_CTRL, new_val); - 8002da2: 79fb ldrb r3, [r7, #7] - 8002da4: 461a mov r2, r3 - 8002da6: 2103 movs r1, #3 - 8002da8: 2000 movs r0, #0 - 8002daa: f7ff fe31 bl 8002a10 + 8002dca: 79fb ldrb r3, [r7, #7] + 8002dcc: 461a mov r2, r3 + 8002dce: 2103 movs r1, #3 + 8002dd0: 2000 movs r0, #0 + 8002dd2: f000 fb53 bl 800347c HAL_Delay(100); - 8002dae: 2064 movs r0, #100 ; 0x64 - 8002db0: f7fe f93c bl 800102c + 8002dd6: 2064 movs r0, #100 ; 0x64 + 8002dd8: f7fe f922 bl 8001020 } - 8002db4: bf00 nop - 8002db6: 3708 adds r7, #8 - 8002db8: 46bd mov sp, r7 - 8002dba: bd80 pop {r7, pc} + 8002ddc: bf00 nop + 8002dde: 3708 adds r7, #8 + 8002de0: 46bd mov sp, r7 + 8002de2: bd80 pop {r7, pc} -08002dbc : +08002de4 : void icm20948_i2c_master_clk_frq(uint8_t config) { - 8002dbc: b580 push {r7, lr} - 8002dbe: b084 sub sp, #16 - 8002dc0: af00 add r7, sp, #0 - 8002dc2: 4603 mov r3, r0 - 8002dc4: 71fb strb r3, [r7, #7] + 8002de4: b580 push {r7, lr} + 8002de6: b084 sub sp, #16 + 8002de8: af00 add r7, sp, #0 + 8002dea: 4603 mov r3, r0 + 8002dec: 71fb strb r3, [r7, #7] uint8_t new_val = read_single_icm20948_reg(ub_3, B3_I2C_MST_CTRL); - 8002dc6: 2101 movs r1, #1 - 8002dc8: 2030 movs r0, #48 ; 0x30 - 8002dca: f7ff fdc5 bl 8002958 - 8002dce: 4603 mov r3, r0 - 8002dd0: 73fb strb r3, [r7, #15] + 8002dee: 2101 movs r1, #1 + 8002df0: 2030 movs r0, #48 ; 0x30 + 8002df2: f000 fb17 bl 8003424 + 8002df6: 4603 mov r3, r0 + 8002df8: 73fb strb r3, [r7, #15] new_val |= config; - 8002dd2: 7bfa ldrb r2, [r7, #15] - 8002dd4: 79fb ldrb r3, [r7, #7] - 8002dd6: 4313 orrs r3, r2 - 8002dd8: 73fb strb r3, [r7, #15] + 8002dfa: 7bfa ldrb r2, [r7, #15] + 8002dfc: 79fb ldrb r3, [r7, #7] + 8002dfe: 4313 orrs r3, r2 + 8002e00: 73fb strb r3, [r7, #15] write_single_icm20948_reg(ub_3, B3_I2C_MST_CTRL, new_val); - 8002dda: 7bfb ldrb r3, [r7, #15] - 8002ddc: 461a mov r2, r3 - 8002dde: 2101 movs r1, #1 - 8002de0: 2030 movs r0, #48 ; 0x30 - 8002de2: f7ff fe15 bl 8002a10 + 8002e02: 7bfb ldrb r3, [r7, #15] + 8002e04: 461a mov r2, r3 + 8002e06: 2101 movs r1, #1 + 8002e08: 2030 movs r0, #48 ; 0x30 + 8002e0a: f000 fb37 bl 800347c } - 8002de6: bf00 nop - 8002de8: 3710 adds r7, #16 - 8002dea: 46bd mov sp, r7 - 8002dec: bd80 pop {r7, pc} + 8002e0e: bf00 nop + 8002e10: 3710 adds r7, #16 + 8002e12: 46bd mov sp, r7 + 8002e14: bd80 pop {r7, pc} -08002dee : +08002e16 : void icm20948_clock_source(uint8_t source) { - 8002dee: b580 push {r7, lr} - 8002df0: b084 sub sp, #16 - 8002df2: af00 add r7, sp, #0 - 8002df4: 4603 mov r3, r0 - 8002df6: 71fb strb r3, [r7, #7] + 8002e16: b580 push {r7, lr} + 8002e18: b084 sub sp, #16 + 8002e1a: af00 add r7, sp, #0 + 8002e1c: 4603 mov r3, r0 + 8002e1e: 71fb strb r3, [r7, #7] uint8_t new_val = read_single_icm20948_reg(ub_0, B0_PWR_MGMT_1); - 8002df8: 2106 movs r1, #6 - 8002dfa: 2000 movs r0, #0 - 8002dfc: f7ff fdac bl 8002958 - 8002e00: 4603 mov r3, r0 - 8002e02: 73fb strb r3, [r7, #15] + 8002e20: 2106 movs r1, #6 + 8002e22: 2000 movs r0, #0 + 8002e24: f000 fafe bl 8003424 + 8002e28: 4603 mov r3, r0 + 8002e2a: 73fb strb r3, [r7, #15] new_val |= source; - 8002e04: 7bfa ldrb r2, [r7, #15] - 8002e06: 79fb ldrb r3, [r7, #7] - 8002e08: 4313 orrs r3, r2 - 8002e0a: 73fb strb r3, [r7, #15] + 8002e2c: 7bfa ldrb r2, [r7, #15] + 8002e2e: 79fb ldrb r3, [r7, #7] + 8002e30: 4313 orrs r3, r2 + 8002e32: 73fb strb r3, [r7, #15] write_single_icm20948_reg(ub_0, B0_PWR_MGMT_1, new_val); - 8002e0c: 7bfb ldrb r3, [r7, #15] - 8002e0e: 461a mov r2, r3 - 8002e10: 2106 movs r1, #6 - 8002e12: 2000 movs r0, #0 - 8002e14: f7ff fdfc bl 8002a10 + 8002e34: 7bfb ldrb r3, [r7, #15] + 8002e36: 461a mov r2, r3 + 8002e38: 2106 movs r1, #6 + 8002e3a: 2000 movs r0, #0 + 8002e3c: f000 fb1e bl 800347c } - 8002e18: bf00 nop - 8002e1a: 3710 adds r7, #16 - 8002e1c: 46bd mov sp, r7 - 8002e1e: bd80 pop {r7, pc} + 8002e40: bf00 nop + 8002e42: 3710 adds r7, #16 + 8002e44: 46bd mov sp, r7 + 8002e46: bd80 pop {r7, pc} -08002e20 : +08002e48 : void icm20948_odr_align_enable() { - 8002e20: b580 push {r7, lr} - 8002e22: af00 add r7, sp, #0 + 8002e48: b580 push {r7, lr} + 8002e4a: af00 add r7, sp, #0 write_single_icm20948_reg(ub_2, B2_ODR_ALIGN_EN, 0x01); - 8002e24: 2201 movs r2, #1 - 8002e26: 2109 movs r1, #9 - 8002e28: 2020 movs r0, #32 - 8002e2a: f7ff fdf1 bl 8002a10 + 8002e4c: 2201 movs r2, #1 + 8002e4e: 2109 movs r1, #9 + 8002e50: 2020 movs r0, #32 + 8002e52: f000 fb13 bl 800347c } - 8002e2e: bf00 nop - 8002e30: bd80 pop {r7, pc} + 8002e56: bf00 nop + 8002e58: bd80 pop {r7, pc} -08002e32 : +08002e5a : void icm20948_gyro_low_pass_filter(uint8_t config) { - 8002e32: b580 push {r7, lr} - 8002e34: b084 sub sp, #16 - 8002e36: af00 add r7, sp, #0 - 8002e38: 4603 mov r3, r0 - 8002e3a: 71fb strb r3, [r7, #7] + 8002e5a: b580 push {r7, lr} + 8002e5c: b084 sub sp, #16 + 8002e5e: af00 add r7, sp, #0 + 8002e60: 4603 mov r3, r0 + 8002e62: 71fb strb r3, [r7, #7] uint8_t new_val = read_single_icm20948_reg(ub_2, B2_GYRO_CONFIG_1); - 8002e3c: 2101 movs r1, #1 - 8002e3e: 2020 movs r0, #32 - 8002e40: f7ff fd8a bl 8002958 - 8002e44: 4603 mov r3, r0 - 8002e46: 73fb strb r3, [r7, #15] + 8002e64: 2101 movs r1, #1 + 8002e66: 2020 movs r0, #32 + 8002e68: f000 fadc bl 8003424 + 8002e6c: 4603 mov r3, r0 + 8002e6e: 73fb strb r3, [r7, #15] new_val |= config << 3; - 8002e48: 79fb ldrb r3, [r7, #7] - 8002e4a: 00db lsls r3, r3, #3 - 8002e4c: b25a sxtb r2, r3 - 8002e4e: f997 300f ldrsb.w r3, [r7, #15] - 8002e52: 4313 orrs r3, r2 - 8002e54: b25b sxtb r3, r3 - 8002e56: 73fb strb r3, [r7, #15] + 8002e70: 79fb ldrb r3, [r7, #7] + 8002e72: 00db lsls r3, r3, #3 + 8002e74: b25a sxtb r2, r3 + 8002e76: f997 300f ldrsb.w r3, [r7, #15] + 8002e7a: 4313 orrs r3, r2 + 8002e7c: b25b sxtb r3, r3 + 8002e7e: 73fb strb r3, [r7, #15] write_single_icm20948_reg(ub_2, B2_GYRO_CONFIG_1, new_val); - 8002e58: 7bfb ldrb r3, [r7, #15] - 8002e5a: 461a mov r2, r3 - 8002e5c: 2101 movs r1, #1 - 8002e5e: 2020 movs r0, #32 - 8002e60: f7ff fdd6 bl 8002a10 + 8002e80: 7bfb ldrb r3, [r7, #15] + 8002e82: 461a mov r2, r3 + 8002e84: 2101 movs r1, #1 + 8002e86: 2020 movs r0, #32 + 8002e88: f000 faf8 bl 800347c } - 8002e64: bf00 nop - 8002e66: 3710 adds r7, #16 - 8002e68: 46bd mov sp, r7 - 8002e6a: bd80 pop {r7, pc} + 8002e8c: bf00 nop + 8002e8e: 3710 adds r7, #16 + 8002e90: 46bd mov sp, r7 + 8002e92: bd80 pop {r7, pc} -08002e6c : +08002e94 : void icm20948_accel_low_pass_filter(uint8_t config) { - 8002e6c: b580 push {r7, lr} - 8002e6e: b084 sub sp, #16 - 8002e70: af00 add r7, sp, #0 - 8002e72: 4603 mov r3, r0 - 8002e74: 71fb strb r3, [r7, #7] + 8002e94: b580 push {r7, lr} + 8002e96: b084 sub sp, #16 + 8002e98: af00 add r7, sp, #0 + 8002e9a: 4603 mov r3, r0 + 8002e9c: 71fb strb r3, [r7, #7] uint8_t new_val = read_single_icm20948_reg(ub_2, B2_ACCEL_CONFIG); - 8002e76: 2114 movs r1, #20 - 8002e78: 2020 movs r0, #32 - 8002e7a: f7ff fd6d bl 8002958 - 8002e7e: 4603 mov r3, r0 - 8002e80: 73fb strb r3, [r7, #15] + 8002e9e: 2114 movs r1, #20 + 8002ea0: 2020 movs r0, #32 + 8002ea2: f000 fabf bl 8003424 + 8002ea6: 4603 mov r3, r0 + 8002ea8: 73fb strb r3, [r7, #15] new_val |= config << 3; - 8002e82: 79fb ldrb r3, [r7, #7] - 8002e84: 00db lsls r3, r3, #3 - 8002e86: b25a sxtb r2, r3 - 8002e88: f997 300f ldrsb.w r3, [r7, #15] - 8002e8c: 4313 orrs r3, r2 - 8002e8e: b25b sxtb r3, r3 - 8002e90: 73fb strb r3, [r7, #15] + 8002eaa: 79fb ldrb r3, [r7, #7] + 8002eac: 00db lsls r3, r3, #3 + 8002eae: b25a sxtb r2, r3 + 8002eb0: f997 300f ldrsb.w r3, [r7, #15] + 8002eb4: 4313 orrs r3, r2 + 8002eb6: b25b sxtb r3, r3 + 8002eb8: 73fb strb r3, [r7, #15] write_single_icm20948_reg(ub_2, B2_GYRO_CONFIG_1, new_val); - 8002e92: 7bfb ldrb r3, [r7, #15] - 8002e94: 461a mov r2, r3 - 8002e96: 2101 movs r1, #1 - 8002e98: 2020 movs r0, #32 - 8002e9a: f7ff fdb9 bl 8002a10 + 8002eba: 7bfb ldrb r3, [r7, #15] + 8002ebc: 461a mov r2, r3 + 8002ebe: 2101 movs r1, #1 + 8002ec0: 2020 movs r0, #32 + 8002ec2: f000 fadb bl 800347c } - 8002e9e: bf00 nop - 8002ea0: 3710 adds r7, #16 - 8002ea2: 46bd mov sp, r7 - 8002ea4: bd80 pop {r7, pc} + 8002ec6: bf00 nop + 8002ec8: 3710 adds r7, #16 + 8002eca: 46bd mov sp, r7 + 8002ecc: bd80 pop {r7, pc} -08002ea6 : +08002ece : void icm20948_gyro_sample_rate_divider(uint8_t divider) { - 8002ea6: b580 push {r7, lr} - 8002ea8: b082 sub sp, #8 - 8002eaa: af00 add r7, sp, #0 - 8002eac: 4603 mov r3, r0 - 8002eae: 71fb strb r3, [r7, #7] + 8002ece: b580 push {r7, lr} + 8002ed0: b082 sub sp, #8 + 8002ed2: af00 add r7, sp, #0 + 8002ed4: 4603 mov r3, r0 + 8002ed6: 71fb strb r3, [r7, #7] write_single_icm20948_reg(ub_2, B2_GYRO_SMPLRT_DIV, divider); - 8002eb0: 79fb ldrb r3, [r7, #7] - 8002eb2: 461a mov r2, r3 - 8002eb4: 2100 movs r1, #0 - 8002eb6: 2020 movs r0, #32 - 8002eb8: f7ff fdaa bl 8002a10 + 8002ed8: 79fb ldrb r3, [r7, #7] + 8002eda: 461a mov r2, r3 + 8002edc: 2100 movs r1, #0 + 8002ede: 2020 movs r0, #32 + 8002ee0: f000 facc bl 800347c } - 8002ebc: bf00 nop - 8002ebe: 3708 adds r7, #8 - 8002ec0: 46bd mov sp, r7 - 8002ec2: bd80 pop {r7, pc} + 8002ee4: bf00 nop + 8002ee6: 3708 adds r7, #8 + 8002ee8: 46bd mov sp, r7 + 8002eea: bd80 pop {r7, pc} -08002ec4 : +08002eec : void icm20948_accel_sample_rate_divider(uint16_t divider) { - 8002ec4: b580 push {r7, lr} - 8002ec6: b084 sub sp, #16 - 8002ec8: af00 add r7, sp, #0 - 8002eca: 4603 mov r3, r0 - 8002ecc: 80fb strh r3, [r7, #6] + 8002eec: b580 push {r7, lr} + 8002eee: b084 sub sp, #16 + 8002ef0: af00 add r7, sp, #0 + 8002ef2: 4603 mov r3, r0 + 8002ef4: 80fb strh r3, [r7, #6] uint8_t divider_1 = (uint8_t)(divider >> 8); - 8002ece: 88fb ldrh r3, [r7, #6] - 8002ed0: 0a1b lsrs r3, r3, #8 - 8002ed2: b29b uxth r3, r3 - 8002ed4: 73fb strb r3, [r7, #15] + 8002ef6: 88fb ldrh r3, [r7, #6] + 8002ef8: 0a1b lsrs r3, r3, #8 + 8002efa: b29b uxth r3, r3 + 8002efc: 73fb strb r3, [r7, #15] uint8_t divider_2 = (uint8_t)(0x0F & divider); - 8002ed6: 88fb ldrh r3, [r7, #6] - 8002ed8: b2db uxtb r3, r3 - 8002eda: f003 030f and.w r3, r3, #15 - 8002ede: 73bb strb r3, [r7, #14] + 8002efe: 88fb ldrh r3, [r7, #6] + 8002f00: b2db uxtb r3, r3 + 8002f02: f003 030f and.w r3, r3, #15 + 8002f06: 73bb strb r3, [r7, #14] write_single_icm20948_reg(ub_2, B2_ACCEL_SMPLRT_DIV_1, divider_1); - 8002ee0: 7bfb ldrb r3, [r7, #15] - 8002ee2: 461a mov r2, r3 - 8002ee4: 2110 movs r1, #16 - 8002ee6: 2020 movs r0, #32 - 8002ee8: f7ff fd92 bl 8002a10 + 8002f08: 7bfb ldrb r3, [r7, #15] + 8002f0a: 461a mov r2, r3 + 8002f0c: 2110 movs r1, #16 + 8002f0e: 2020 movs r0, #32 + 8002f10: f000 fab4 bl 800347c write_single_icm20948_reg(ub_2, B2_ACCEL_SMPLRT_DIV_2, divider_2); - 8002eec: 7bbb ldrb r3, [r7, #14] - 8002eee: 461a mov r2, r3 - 8002ef0: 2111 movs r1, #17 - 8002ef2: 2020 movs r0, #32 - 8002ef4: f7ff fd8c bl 8002a10 + 8002f14: 7bbb ldrb r3, [r7, #14] + 8002f16: 461a mov r2, r3 + 8002f18: 2111 movs r1, #17 + 8002f1a: 2020 movs r0, #32 + 8002f1c: f000 faae bl 800347c } - 8002ef8: bf00 nop - 8002efa: 3710 adds r7, #16 - 8002efc: 46bd mov sp, r7 - 8002efe: bd80 pop {r7, pc} + 8002f20: bf00 nop + 8002f22: 3710 adds r7, #16 + 8002f24: 46bd mov sp, r7 + 8002f26: bd80 pop {r7, pc} -08002f00 : +08002f28 : + +void ak09916_operation_mode_setting(operation_mode mode) +{ + 8002f28: b580 push {r7, lr} + 8002f2a: b082 sub sp, #8 + 8002f2c: af00 add r7, sp, #0 + 8002f2e: 4603 mov r3, r0 + 8002f30: 71fb strb r3, [r7, #7] + write_single_ak09916_reg(MAG_CNTL2, mode); + 8002f32: 79fb ldrb r3, [r7, #7] + 8002f34: 4619 mov r1, r3 + 8002f36: 2031 movs r0, #49 ; 0x31 + 8002f38: f000 fb41 bl 80035be + HAL_Delay(100); + 8002f3c: 2064 movs r0, #100 ; 0x64 + 8002f3e: f7fe f86f bl 8001020 +} + 8002f42: bf00 nop + 8002f44: 3708 adds r7, #8 + 8002f46: 46bd mov sp, r7 + 8002f48: bd80 pop {r7, pc} + ... + +08002f4c : void icm20948_gyro_calibration() { - 8002f00: b580 push {r7, lr} - 8002f02: b08a sub sp, #40 ; 0x28 - 8002f04: af00 add r7, sp, #0 + 8002f4c: b580 push {r7, lr} + 8002f4e: b08a sub sp, #40 ; 0x28 + 8002f50: af00 add r7, sp, #0 axises temp; int32_t gyro_bias[3] = {0}; - 8002f06: f107 030c add.w r3, r7, #12 - 8002f0a: 2200 movs r2, #0 - 8002f0c: 601a str r2, [r3, #0] - 8002f0e: 605a str r2, [r3, #4] - 8002f10: 609a str r2, [r3, #8] + 8002f52: f107 030c add.w r3, r7, #12 + 8002f56: 2200 movs r2, #0 + 8002f58: 601a str r2, [r3, #0] + 8002f5a: 605a str r2, [r3, #4] + 8002f5c: 609a str r2, [r3, #8] uint8_t gyro_offset[6] = {0}; - 8002f12: 2300 movs r3, #0 - 8002f14: 607b str r3, [r7, #4] - 8002f16: 2300 movs r3, #0 - 8002f18: 813b strh r3, [r7, #8] + 8002f5e: 2300 movs r3, #0 + 8002f60: 607b str r3, [r7, #4] + 8002f62: 2300 movs r3, #0 + 8002f64: 813b strh r3, [r7, #8] for(int i = 0; i < 100; i++) - 8002f1a: 2300 movs r3, #0 - 8002f1c: 627b str r3, [r7, #36] ; 0x24 - 8002f1e: e031 b.n 8002f84 + 8002f66: 2300 movs r3, #0 + 8002f68: 627b str r3, [r7, #36] ; 0x24 + 8002f6a: e031 b.n 8002fd0 { icm20948_gyro_read(&temp); - 8002f20: f107 0318 add.w r3, r7, #24 - 8002f24: 4618 mov r0, r3 - 8002f26: f7ff fe55 bl 8002bd4 + 8002f6c: f107 0318 add.w r3, r7, #24 + 8002f70: 4618 mov r0, r3 + 8002f72: f7ff fd00 bl 8002976 gyro_bias[0] += temp.x; - 8002f2a: 68fb ldr r3, [r7, #12] - 8002f2c: ee07 3a90 vmov s15, r3 - 8002f30: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 8002f34: edd7 7a06 vldr s15, [r7, #24] - 8002f38: ee77 7a27 vadd.f32 s15, s14, s15 - 8002f3c: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8002f40: ee17 3a90 vmov r3, s15 - 8002f44: 60fb str r3, [r7, #12] + 8002f76: 68fb ldr r3, [r7, #12] + 8002f78: ee07 3a90 vmov s15, r3 + 8002f7c: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 8002f80: edd7 7a06 vldr s15, [r7, #24] + 8002f84: ee77 7a27 vadd.f32 s15, s14, s15 + 8002f88: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8002f8c: ee17 3a90 vmov r3, s15 + 8002f90: 60fb str r3, [r7, #12] gyro_bias[1] += temp.y; - 8002f46: 693b ldr r3, [r7, #16] - 8002f48: ee07 3a90 vmov s15, r3 - 8002f4c: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 8002f50: edd7 7a07 vldr s15, [r7, #28] - 8002f54: ee77 7a27 vadd.f32 s15, s14, s15 - 8002f58: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8002f5c: ee17 3a90 vmov r3, s15 - 8002f60: 613b str r3, [r7, #16] + 8002f92: 693b ldr r3, [r7, #16] + 8002f94: ee07 3a90 vmov s15, r3 + 8002f98: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 8002f9c: edd7 7a07 vldr s15, [r7, #28] + 8002fa0: ee77 7a27 vadd.f32 s15, s14, s15 + 8002fa4: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8002fa8: ee17 3a90 vmov r3, s15 + 8002fac: 613b str r3, [r7, #16] gyro_bias[2] += temp.z; - 8002f62: 697b ldr r3, [r7, #20] - 8002f64: ee07 3a90 vmov s15, r3 - 8002f68: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 8002f6c: edd7 7a08 vldr s15, [r7, #32] - 8002f70: ee77 7a27 vadd.f32 s15, s14, s15 - 8002f74: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8002f78: ee17 3a90 vmov r3, s15 - 8002f7c: 617b str r3, [r7, #20] + 8002fae: 697b ldr r3, [r7, #20] + 8002fb0: ee07 3a90 vmov s15, r3 + 8002fb4: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 8002fb8: edd7 7a08 vldr s15, [r7, #32] + 8002fbc: ee77 7a27 vadd.f32 s15, s14, s15 + 8002fc0: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8002fc4: ee17 3a90 vmov r3, s15 + 8002fc8: 617b str r3, [r7, #20] for(int i = 0; i < 100; i++) - 8002f7e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002f80: 3301 adds r3, #1 - 8002f82: 627b str r3, [r7, #36] ; 0x24 - 8002f84: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002f86: 2b63 cmp r3, #99 ; 0x63 - 8002f88: ddca ble.n 8002f20 + 8002fca: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002fcc: 3301 adds r3, #1 + 8002fce: 627b str r3, [r7, #36] ; 0x24 + 8002fd0: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002fd2: 2b63 cmp r3, #99 ; 0x63 + 8002fd4: ddca ble.n 8002f6c } gyro_bias[0] /= 100; - 8002f8a: 68fb ldr r3, [r7, #12] - 8002f8c: 4a29 ldr r2, [pc, #164] ; (8003034 ) - 8002f8e: fb82 1203 smull r1, r2, r2, r3 - 8002f92: 1152 asrs r2, r2, #5 - 8002f94: 17db asrs r3, r3, #31 - 8002f96: 1ad3 subs r3, r2, r3 - 8002f98: 60fb str r3, [r7, #12] + 8002fd6: 68fb ldr r3, [r7, #12] + 8002fd8: 4a29 ldr r2, [pc, #164] ; (8003080 ) + 8002fda: fb82 1203 smull r1, r2, r2, r3 + 8002fde: 1152 asrs r2, r2, #5 + 8002fe0: 17db asrs r3, r3, #31 + 8002fe2: 1ad3 subs r3, r2, r3 + 8002fe4: 60fb str r3, [r7, #12] gyro_bias[1] /= 100; - 8002f9a: 693b ldr r3, [r7, #16] - 8002f9c: 4a25 ldr r2, [pc, #148] ; (8003034 ) - 8002f9e: fb82 1203 smull r1, r2, r2, r3 - 8002fa2: 1152 asrs r2, r2, #5 - 8002fa4: 17db asrs r3, r3, #31 - 8002fa6: 1ad3 subs r3, r2, r3 - 8002fa8: 613b str r3, [r7, #16] + 8002fe6: 693b ldr r3, [r7, #16] + 8002fe8: 4a25 ldr r2, [pc, #148] ; (8003080 ) + 8002fea: fb82 1203 smull r1, r2, r2, r3 + 8002fee: 1152 asrs r2, r2, #5 + 8002ff0: 17db asrs r3, r3, #31 + 8002ff2: 1ad3 subs r3, r2, r3 + 8002ff4: 613b str r3, [r7, #16] gyro_bias[2] /= 100; - 8002faa: 697b ldr r3, [r7, #20] - 8002fac: 4a21 ldr r2, [pc, #132] ; (8003034 ) - 8002fae: fb82 1203 smull r1, r2, r2, r3 - 8002fb2: 1152 asrs r2, r2, #5 - 8002fb4: 17db asrs r3, r3, #31 - 8002fb6: 1ad3 subs r3, r2, r3 - 8002fb8: 617b str r3, [r7, #20] + 8002ff6: 697b ldr r3, [r7, #20] + 8002ff8: 4a21 ldr r2, [pc, #132] ; (8003080 ) + 8002ffa: fb82 1203 smull r1, r2, r2, r3 + 8002ffe: 1152 asrs r2, r2, #5 + 8003000: 17db asrs r3, r3, #31 + 8003002: 1ad3 subs r3, r2, r3 + 8003004: 617b str r3, [r7, #20] // Construct the gyro biases for push to the hardware gyro bias registers, // which are reset to zero upon device startup. // Divide by 4 to get 32.9 LSB per deg/s to conform to expected bias input format. // Biases are additive, so change sign on calculated average gyro biases gyro_offset[0] = (-gyro_bias[0] / 4 >> 8) & 0xFF; - 8002fba: 68fb ldr r3, [r7, #12] - 8002fbc: 425b negs r3, r3 - 8002fbe: 2b00 cmp r3, #0 - 8002fc0: da00 bge.n 8002fc4 - 8002fc2: 3303 adds r3, #3 - 8002fc4: 109b asrs r3, r3, #2 - 8002fc6: 121b asrs r3, r3, #8 - 8002fc8: b2db uxtb r3, r3 - 8002fca: 713b strb r3, [r7, #4] + 8003006: 68fb ldr r3, [r7, #12] + 8003008: 425b negs r3, r3 + 800300a: 2b00 cmp r3, #0 + 800300c: da00 bge.n 8003010 + 800300e: 3303 adds r3, #3 + 8003010: 109b asrs r3, r3, #2 + 8003012: 121b asrs r3, r3, #8 + 8003014: b2db uxtb r3, r3 + 8003016: 713b strb r3, [r7, #4] gyro_offset[1] = (-gyro_bias[0] / 4) & 0xFF; - 8002fcc: 68fb ldr r3, [r7, #12] - 8002fce: 425b negs r3, r3 - 8002fd0: 2b00 cmp r3, #0 - 8002fd2: da00 bge.n 8002fd6 - 8002fd4: 3303 adds r3, #3 - 8002fd6: 109b asrs r3, r3, #2 - 8002fd8: b2db uxtb r3, r3 - 8002fda: 717b strb r3, [r7, #5] + 8003018: 68fb ldr r3, [r7, #12] + 800301a: 425b negs r3, r3 + 800301c: 2b00 cmp r3, #0 + 800301e: da00 bge.n 8003022 + 8003020: 3303 adds r3, #3 + 8003022: 109b asrs r3, r3, #2 + 8003024: b2db uxtb r3, r3 + 8003026: 717b strb r3, [r7, #5] gyro_offset[2] = (-gyro_bias[1] / 4 >> 8) & 0xFF; - 8002fdc: 693b ldr r3, [r7, #16] - 8002fde: 425b negs r3, r3 - 8002fe0: 2b00 cmp r3, #0 - 8002fe2: da00 bge.n 8002fe6 - 8002fe4: 3303 adds r3, #3 - 8002fe6: 109b asrs r3, r3, #2 - 8002fe8: 121b asrs r3, r3, #8 - 8002fea: b2db uxtb r3, r3 - 8002fec: 71bb strb r3, [r7, #6] + 8003028: 693b ldr r3, [r7, #16] + 800302a: 425b negs r3, r3 + 800302c: 2b00 cmp r3, #0 + 800302e: da00 bge.n 8003032 + 8003030: 3303 adds r3, #3 + 8003032: 109b asrs r3, r3, #2 + 8003034: 121b asrs r3, r3, #8 + 8003036: b2db uxtb r3, r3 + 8003038: 71bb strb r3, [r7, #6] gyro_offset[3] = (-gyro_bias[1] / 4) & 0xFF; - 8002fee: 693b ldr r3, [r7, #16] - 8002ff0: 425b negs r3, r3 - 8002ff2: 2b00 cmp r3, #0 - 8002ff4: da00 bge.n 8002ff8 - 8002ff6: 3303 adds r3, #3 - 8002ff8: 109b asrs r3, r3, #2 - 8002ffa: b2db uxtb r3, r3 - 8002ffc: 71fb strb r3, [r7, #7] + 800303a: 693b ldr r3, [r7, #16] + 800303c: 425b negs r3, r3 + 800303e: 2b00 cmp r3, #0 + 8003040: da00 bge.n 8003044 + 8003042: 3303 adds r3, #3 + 8003044: 109b asrs r3, r3, #2 + 8003046: b2db uxtb r3, r3 + 8003048: 71fb strb r3, [r7, #7] gyro_offset[4] = (-gyro_bias[2] / 4 >> 8) & 0xFF; - 8002ffe: 697b ldr r3, [r7, #20] - 8003000: 425b negs r3, r3 - 8003002: 2b00 cmp r3, #0 - 8003004: da00 bge.n 8003008 - 8003006: 3303 adds r3, #3 - 8003008: 109b asrs r3, r3, #2 - 800300a: 121b asrs r3, r3, #8 - 800300c: b2db uxtb r3, r3 - 800300e: 723b strb r3, [r7, #8] + 800304a: 697b ldr r3, [r7, #20] + 800304c: 425b negs r3, r3 + 800304e: 2b00 cmp r3, #0 + 8003050: da00 bge.n 8003054 + 8003052: 3303 adds r3, #3 + 8003054: 109b asrs r3, r3, #2 + 8003056: 121b asrs r3, r3, #8 + 8003058: b2db uxtb r3, r3 + 800305a: 723b strb r3, [r7, #8] gyro_offset[5] = (-gyro_bias[2] / 4) & 0xFF; - 8003010: 697b ldr r3, [r7, #20] - 8003012: 425b negs r3, r3 - 8003014: 2b00 cmp r3, #0 - 8003016: da00 bge.n 800301a - 8003018: 3303 adds r3, #3 - 800301a: 109b asrs r3, r3, #2 - 800301c: b2db uxtb r3, r3 - 800301e: 727b strb r3, [r7, #9] + 800305c: 697b ldr r3, [r7, #20] + 800305e: 425b negs r3, r3 + 8003060: 2b00 cmp r3, #0 + 8003062: da00 bge.n 8003066 + 8003064: 3303 adds r3, #3 + 8003066: 109b asrs r3, r3, #2 + 8003068: b2db uxtb r3, r3 + 800306a: 727b strb r3, [r7, #9] write_multiple_icm20948_reg(ub_2, B2_XG_OFFS_USRH, gyro_offset, 6); - 8003020: 1d3a adds r2, r7, #4 - 8003022: 2306 movs r3, #6 - 8003024: 2103 movs r1, #3 - 8003026: 2020 movs r0, #32 - 8003028: f7ff fd16 bl 8002a58 + 800306c: 1d3a adds r2, r7, #4 + 800306e: 2306 movs r3, #6 + 8003070: 2103 movs r1, #3 + 8003072: 2020 movs r0, #32 + 8003074: f000 fa56 bl 8003524 } - 800302c: bf00 nop - 800302e: 3728 adds r7, #40 ; 0x28 - 8003030: 46bd mov sp, r7 - 8003032: bd80 pop {r7, pc} - 8003034: 51eb851f .word 0x51eb851f + 8003078: bf00 nop + 800307a: 3728 adds r7, #40 ; 0x28 + 800307c: 46bd mov sp, r7 + 800307e: bd80 pop {r7, pc} + 8003080: 51eb851f .word 0x51eb851f -08003038 : +08003084 : void icm20948_accel_calibration() { - 8003038: b580 push {r7, lr} - 800303a: b090 sub sp, #64 ; 0x40 - 800303c: af00 add r7, sp, #0 + 8003084: b580 push {r7, lr} + 8003086: b090 sub sp, #64 ; 0x40 + 8003088: af00 add r7, sp, #0 axises temp; uint8_t* temp2; uint8_t* temp3; uint8_t* temp4; int32_t accel_bias[3] = {0}; - 800303e: f107 0318 add.w r3, r7, #24 - 8003042: 2200 movs r2, #0 - 8003044: 601a str r2, [r3, #0] - 8003046: 605a str r2, [r3, #4] - 8003048: 609a str r2, [r3, #8] + 800308a: f107 0318 add.w r3, r7, #24 + 800308e: 2200 movs r2, #0 + 8003090: 601a str r2, [r3, #0] + 8003092: 605a str r2, [r3, #4] + 8003094: 609a str r2, [r3, #8] int32_t accel_bias_reg[3] = {0}; - 800304a: f107 030c add.w r3, r7, #12 - 800304e: 2200 movs r2, #0 - 8003050: 601a str r2, [r3, #0] - 8003052: 605a str r2, [r3, #4] - 8003054: 609a str r2, [r3, #8] + 8003096: f107 030c add.w r3, r7, #12 + 800309a: 2200 movs r2, #0 + 800309c: 601a str r2, [r3, #0] + 800309e: 605a str r2, [r3, #4] + 80030a0: 609a str r2, [r3, #8] uint8_t accel_offset[6] = {0}; - 8003056: 2300 movs r3, #0 - 8003058: 607b str r3, [r7, #4] - 800305a: 2300 movs r3, #0 - 800305c: 813b strh r3, [r7, #8] + 80030a2: 2300 movs r3, #0 + 80030a4: 607b str r3, [r7, #4] + 80030a6: 2300 movs r3, #0 + 80030a8: 813b strh r3, [r7, #8] for(int i = 0; i < 100; i++) - 800305e: 2300 movs r3, #0 - 8003060: 63fb str r3, [r7, #60] ; 0x3c - 8003062: e031 b.n 80030c8 + 80030aa: 2300 movs r3, #0 + 80030ac: 63fb str r3, [r7, #60] ; 0x3c + 80030ae: e031 b.n 8003114 { icm20948_accel_read(&temp); - 8003064: f107 0324 add.w r3, r7, #36 ; 0x24 - 8003068: 4618 mov r0, r3 - 800306a: f7ff fdf6 bl 8002c5a + 80030b0: f107 0324 add.w r3, r7, #36 ; 0x24 + 80030b4: 4618 mov r0, r3 + 80030b6: f7ff fca1 bl 80029fc accel_bias[0] += temp.x; - 800306e: 69bb ldr r3, [r7, #24] - 8003070: ee07 3a90 vmov s15, r3 - 8003074: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 8003078: edd7 7a09 vldr s15, [r7, #36] ; 0x24 - 800307c: ee77 7a27 vadd.f32 s15, s14, s15 - 8003080: eefd 7ae7 vcvt.s32.f32 s15, s15 - 8003084: ee17 3a90 vmov r3, s15 - 8003088: 61bb str r3, [r7, #24] + 80030ba: 69bb ldr r3, [r7, #24] + 80030bc: ee07 3a90 vmov s15, r3 + 80030c0: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 80030c4: edd7 7a09 vldr s15, [r7, #36] ; 0x24 + 80030c8: ee77 7a27 vadd.f32 s15, s14, s15 + 80030cc: eefd 7ae7 vcvt.s32.f32 s15, s15 + 80030d0: ee17 3a90 vmov r3, s15 + 80030d4: 61bb str r3, [r7, #24] accel_bias[1] += temp.y; - 800308a: 69fb ldr r3, [r7, #28] - 800308c: ee07 3a90 vmov s15, r3 - 8003090: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 8003094: edd7 7a0a vldr s15, [r7, #40] ; 0x28 - 8003098: ee77 7a27 vadd.f32 s15, s14, s15 - 800309c: eefd 7ae7 vcvt.s32.f32 s15, s15 - 80030a0: ee17 3a90 vmov r3, s15 - 80030a4: 61fb str r3, [r7, #28] + 80030d6: 69fb ldr r3, [r7, #28] + 80030d8: ee07 3a90 vmov s15, r3 + 80030dc: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 80030e0: edd7 7a0a vldr s15, [r7, #40] ; 0x28 + 80030e4: ee77 7a27 vadd.f32 s15, s14, s15 + 80030e8: eefd 7ae7 vcvt.s32.f32 s15, s15 + 80030ec: ee17 3a90 vmov r3, s15 + 80030f0: 61fb str r3, [r7, #28] accel_bias[2] += temp.z; - 80030a6: 6a3b ldr r3, [r7, #32] - 80030a8: ee07 3a90 vmov s15, r3 - 80030ac: eeb8 7ae7 vcvt.f32.s32 s14, s15 - 80030b0: edd7 7a0b vldr s15, [r7, #44] ; 0x2c - 80030b4: ee77 7a27 vadd.f32 s15, s14, s15 - 80030b8: eefd 7ae7 vcvt.s32.f32 s15, s15 - 80030bc: ee17 3a90 vmov r3, s15 - 80030c0: 623b str r3, [r7, #32] + 80030f2: 6a3b ldr r3, [r7, #32] + 80030f4: ee07 3a90 vmov s15, r3 + 80030f8: eeb8 7ae7 vcvt.f32.s32 s14, s15 + 80030fc: edd7 7a0b vldr s15, [r7, #44] ; 0x2c + 8003100: ee77 7a27 vadd.f32 s15, s14, s15 + 8003104: eefd 7ae7 vcvt.s32.f32 s15, s15 + 8003108: ee17 3a90 vmov r3, s15 + 800310c: 623b str r3, [r7, #32] for(int i = 0; i < 100; i++) - 80030c2: 6bfb ldr r3, [r7, #60] ; 0x3c - 80030c4: 3301 adds r3, #1 - 80030c6: 63fb str r3, [r7, #60] ; 0x3c - 80030c8: 6bfb ldr r3, [r7, #60] ; 0x3c - 80030ca: 2b63 cmp r3, #99 ; 0x63 - 80030cc: ddca ble.n 8003064 + 800310e: 6bfb ldr r3, [r7, #60] ; 0x3c + 8003110: 3301 adds r3, #1 + 8003112: 63fb str r3, [r7, #60] ; 0x3c + 8003114: 6bfb ldr r3, [r7, #60] ; 0x3c + 8003116: 2b63 cmp r3, #99 ; 0x63 + 8003118: ddca ble.n 80030b0 } accel_bias[0] /= 100; - 80030ce: 69bb ldr r3, [r7, #24] - 80030d0: 4a5e ldr r2, [pc, #376] ; (800324c ) - 80030d2: fb82 1203 smull r1, r2, r2, r3 - 80030d6: 1152 asrs r2, r2, #5 - 80030d8: 17db asrs r3, r3, #31 - 80030da: 1ad3 subs r3, r2, r3 - 80030dc: 61bb str r3, [r7, #24] + 800311a: 69bb ldr r3, [r7, #24] + 800311c: 4a5e ldr r2, [pc, #376] ; (8003298 ) + 800311e: fb82 1203 smull r1, r2, r2, r3 + 8003122: 1152 asrs r2, r2, #5 + 8003124: 17db asrs r3, r3, #31 + 8003126: 1ad3 subs r3, r2, r3 + 8003128: 61bb str r3, [r7, #24] accel_bias[1] /= 100; - 80030de: 69fb ldr r3, [r7, #28] - 80030e0: 4a5a ldr r2, [pc, #360] ; (800324c ) - 80030e2: fb82 1203 smull r1, r2, r2, r3 - 80030e6: 1152 asrs r2, r2, #5 - 80030e8: 17db asrs r3, r3, #31 - 80030ea: 1ad3 subs r3, r2, r3 - 80030ec: 61fb str r3, [r7, #28] + 800312a: 69fb ldr r3, [r7, #28] + 800312c: 4a5a ldr r2, [pc, #360] ; (8003298 ) + 800312e: fb82 1203 smull r1, r2, r2, r3 + 8003132: 1152 asrs r2, r2, #5 + 8003134: 17db asrs r3, r3, #31 + 8003136: 1ad3 subs r3, r2, r3 + 8003138: 61fb str r3, [r7, #28] accel_bias[2] /= 100; - 80030ee: 6a3b ldr r3, [r7, #32] - 80030f0: 4a56 ldr r2, [pc, #344] ; (800324c ) - 80030f2: fb82 1203 smull r1, r2, r2, r3 - 80030f6: 1152 asrs r2, r2, #5 - 80030f8: 17db asrs r3, r3, #31 - 80030fa: 1ad3 subs r3, r2, r3 - 80030fc: 623b str r3, [r7, #32] + 800313a: 6a3b ldr r3, [r7, #32] + 800313c: 4a56 ldr r2, [pc, #344] ; (8003298 ) + 800313e: fb82 1203 smull r1, r2, r2, r3 + 8003142: 1152 asrs r2, r2, #5 + 8003144: 17db asrs r3, r3, #31 + 8003146: 1ad3 subs r3, r2, r3 + 8003148: 623b str r3, [r7, #32] uint8_t mask_bit[3] = {0, 0, 0}; - 80030fe: 4a54 ldr r2, [pc, #336] ; (8003250 ) - 8003100: 463b mov r3, r7 - 8003102: 6812 ldr r2, [r2, #0] - 8003104: 4611 mov r1, r2 - 8003106: 8019 strh r1, [r3, #0] - 8003108: 3302 adds r3, #2 - 800310a: 0c12 lsrs r2, r2, #16 - 800310c: 701a strb r2, [r3, #0] + 800314a: 4a54 ldr r2, [pc, #336] ; (800329c ) + 800314c: 463b mov r3, r7 + 800314e: 6812 ldr r2, [r2, #0] + 8003150: 4611 mov r1, r2 + 8003152: 8019 strh r1, [r3, #0] + 8003154: 3302 adds r3, #2 + 8003156: 0c12 lsrs r2, r2, #16 + 8003158: 701a strb r2, [r3, #0] temp2 = read_multiple_icm20948_reg(ub_1, B1_XA_OFFS_H, 2); - 800310e: 2202 movs r2, #2 - 8003110: 2114 movs r1, #20 - 8003112: 2010 movs r0, #16 - 8003114: f7ff fc4c bl 80029b0 - 8003118: 63b8 str r0, [r7, #56] ; 0x38 + 800315a: 2202 movs r2, #2 + 800315c: 2114 movs r1, #20 + 800315e: 2010 movs r0, #16 + 8003160: f000 f9b0 bl 80034c4 + 8003164: 63b8 str r0, [r7, #56] ; 0x38 accel_bias_reg[0] = (int32_t)(temp2[0] << 8 | temp2[1]); - 800311a: 6bbb ldr r3, [r7, #56] ; 0x38 - 800311c: 781b ldrb r3, [r3, #0] - 800311e: 021b lsls r3, r3, #8 - 8003120: 6bba ldr r2, [r7, #56] ; 0x38 - 8003122: 3201 adds r2, #1 - 8003124: 7812 ldrb r2, [r2, #0] - 8003126: 4313 orrs r3, r2 - 8003128: 60fb str r3, [r7, #12] + 8003166: 6bbb ldr r3, [r7, #56] ; 0x38 + 8003168: 781b ldrb r3, [r3, #0] + 800316a: 021b lsls r3, r3, #8 + 800316c: 6bba ldr r2, [r7, #56] ; 0x38 + 800316e: 3201 adds r2, #1 + 8003170: 7812 ldrb r2, [r2, #0] + 8003172: 4313 orrs r3, r2 + 8003174: 60fb str r3, [r7, #12] mask_bit[0] = temp2[1] & 0x01; - 800312a: 6bbb ldr r3, [r7, #56] ; 0x38 - 800312c: 3301 adds r3, #1 - 800312e: 781b ldrb r3, [r3, #0] - 8003130: f003 0301 and.w r3, r3, #1 - 8003134: b2db uxtb r3, r3 - 8003136: 703b strb r3, [r7, #0] + 8003176: 6bbb ldr r3, [r7, #56] ; 0x38 + 8003178: 3301 adds r3, #1 + 800317a: 781b ldrb r3, [r3, #0] + 800317c: f003 0301 and.w r3, r3, #1 + 8003180: b2db uxtb r3, r3 + 8003182: 703b strb r3, [r7, #0] temp3 = read_multiple_icm20948_reg(ub_1, B1_YA_OFFS_H, 2); - 8003138: 2202 movs r2, #2 - 800313a: 2117 movs r1, #23 - 800313c: 2010 movs r0, #16 - 800313e: f7ff fc37 bl 80029b0 - 8003142: 6378 str r0, [r7, #52] ; 0x34 + 8003184: 2202 movs r2, #2 + 8003186: 2117 movs r1, #23 + 8003188: 2010 movs r0, #16 + 800318a: f000 f99b bl 80034c4 + 800318e: 6378 str r0, [r7, #52] ; 0x34 accel_bias_reg[1] = (int32_t)(temp3[0] << 8 | temp3[1]); - 8003144: 6b7b ldr r3, [r7, #52] ; 0x34 - 8003146: 781b ldrb r3, [r3, #0] - 8003148: 021b lsls r3, r3, #8 - 800314a: 6b7a ldr r2, [r7, #52] ; 0x34 - 800314c: 3201 adds r2, #1 - 800314e: 7812 ldrb r2, [r2, #0] - 8003150: 4313 orrs r3, r2 - 8003152: 613b str r3, [r7, #16] + 8003190: 6b7b ldr r3, [r7, #52] ; 0x34 + 8003192: 781b ldrb r3, [r3, #0] + 8003194: 021b lsls r3, r3, #8 + 8003196: 6b7a ldr r2, [r7, #52] ; 0x34 + 8003198: 3201 adds r2, #1 + 800319a: 7812 ldrb r2, [r2, #0] + 800319c: 4313 orrs r3, r2 + 800319e: 613b str r3, [r7, #16] mask_bit[1] = temp3[1] & 0x01; - 8003154: 6b7b ldr r3, [r7, #52] ; 0x34 - 8003156: 3301 adds r3, #1 - 8003158: 781b ldrb r3, [r3, #0] - 800315a: f003 0301 and.w r3, r3, #1 - 800315e: b2db uxtb r3, r3 - 8003160: 707b strb r3, [r7, #1] + 80031a0: 6b7b ldr r3, [r7, #52] ; 0x34 + 80031a2: 3301 adds r3, #1 + 80031a4: 781b ldrb r3, [r3, #0] + 80031a6: f003 0301 and.w r3, r3, #1 + 80031aa: b2db uxtb r3, r3 + 80031ac: 707b strb r3, [r7, #1] temp4 = read_multiple_icm20948_reg(ub_1, B1_ZA_OFFS_H, 2); - 8003162: 2202 movs r2, #2 - 8003164: 211a movs r1, #26 - 8003166: 2010 movs r0, #16 - 8003168: f7ff fc22 bl 80029b0 - 800316c: 6338 str r0, [r7, #48] ; 0x30 + 80031ae: 2202 movs r2, #2 + 80031b0: 211a movs r1, #26 + 80031b2: 2010 movs r0, #16 + 80031b4: f000 f986 bl 80034c4 + 80031b8: 6338 str r0, [r7, #48] ; 0x30 accel_bias_reg[2] = (int32_t)(temp4[0] << 8 | temp4[1]); - 800316e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8003170: 781b ldrb r3, [r3, #0] - 8003172: 021b lsls r3, r3, #8 - 8003174: 6b3a ldr r2, [r7, #48] ; 0x30 - 8003176: 3201 adds r2, #1 - 8003178: 7812 ldrb r2, [r2, #0] - 800317a: 4313 orrs r3, r2 - 800317c: 617b str r3, [r7, #20] + 80031ba: 6b3b ldr r3, [r7, #48] ; 0x30 + 80031bc: 781b ldrb r3, [r3, #0] + 80031be: 021b lsls r3, r3, #8 + 80031c0: 6b3a ldr r2, [r7, #48] ; 0x30 + 80031c2: 3201 adds r2, #1 + 80031c4: 7812 ldrb r2, [r2, #0] + 80031c6: 4313 orrs r3, r2 + 80031c8: 617b str r3, [r7, #20] mask_bit[2] = temp4[1] & 0x01; - 800317e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8003180: 3301 adds r3, #1 - 8003182: 781b ldrb r3, [r3, #0] - 8003184: f003 0301 and.w r3, r3, #1 - 8003188: b2db uxtb r3, r3 - 800318a: 70bb strb r3, [r7, #2] + 80031ca: 6b3b ldr r3, [r7, #48] ; 0x30 + 80031cc: 3301 adds r3, #1 + 80031ce: 781b ldrb r3, [r3, #0] + 80031d0: f003 0301 and.w r3, r3, #1 + 80031d4: b2db uxtb r3, r3 + 80031d6: 70bb strb r3, [r7, #2] accel_bias_reg[0] -= (accel_bias[0] / 8); - 800318c: 68fa ldr r2, [r7, #12] - 800318e: 69bb ldr r3, [r7, #24] - 8003190: 2b00 cmp r3, #0 - 8003192: da00 bge.n 8003196 - 8003194: 3307 adds r3, #7 - 8003196: 10db asrs r3, r3, #3 - 8003198: 425b negs r3, r3 - 800319a: 4413 add r3, r2 - 800319c: 60fb str r3, [r7, #12] + 80031d8: 68fa ldr r2, [r7, #12] + 80031da: 69bb ldr r3, [r7, #24] + 80031dc: 2b00 cmp r3, #0 + 80031de: da00 bge.n 80031e2 + 80031e0: 3307 adds r3, #7 + 80031e2: 10db asrs r3, r3, #3 + 80031e4: 425b negs r3, r3 + 80031e6: 4413 add r3, r2 + 80031e8: 60fb str r3, [r7, #12] accel_bias_reg[1] -= (accel_bias[1] / 8); - 800319e: 693a ldr r2, [r7, #16] - 80031a0: 69fb ldr r3, [r7, #28] - 80031a2: 2b00 cmp r3, #0 - 80031a4: da00 bge.n 80031a8 - 80031a6: 3307 adds r3, #7 - 80031a8: 10db asrs r3, r3, #3 - 80031aa: 425b negs r3, r3 - 80031ac: 4413 add r3, r2 - 80031ae: 613b str r3, [r7, #16] + 80031ea: 693a ldr r2, [r7, #16] + 80031ec: 69fb ldr r3, [r7, #28] + 80031ee: 2b00 cmp r3, #0 + 80031f0: da00 bge.n 80031f4 + 80031f2: 3307 adds r3, #7 + 80031f4: 10db asrs r3, r3, #3 + 80031f6: 425b negs r3, r3 + 80031f8: 4413 add r3, r2 + 80031fa: 613b str r3, [r7, #16] accel_bias_reg[2] -= (accel_bias[2] / 8); - 80031b0: 697a ldr r2, [r7, #20] - 80031b2: 6a3b ldr r3, [r7, #32] - 80031b4: 2b00 cmp r3, #0 - 80031b6: da00 bge.n 80031ba - 80031b8: 3307 adds r3, #7 - 80031ba: 10db asrs r3, r3, #3 - 80031bc: 425b negs r3, r3 - 80031be: 4413 add r3, r2 - 80031c0: 617b str r3, [r7, #20] + 80031fc: 697a ldr r2, [r7, #20] + 80031fe: 6a3b ldr r3, [r7, #32] + 8003200: 2b00 cmp r3, #0 + 8003202: da00 bge.n 8003206 + 8003204: 3307 adds r3, #7 + 8003206: 10db asrs r3, r3, #3 + 8003208: 425b negs r3, r3 + 800320a: 4413 add r3, r2 + 800320c: 617b str r3, [r7, #20] accel_offset[0] = (accel_bias_reg[0] >> 8) & 0xFF; - 80031c2: 68fb ldr r3, [r7, #12] - 80031c4: 121b asrs r3, r3, #8 - 80031c6: b2db uxtb r3, r3 - 80031c8: 713b strb r3, [r7, #4] + 800320e: 68fb ldr r3, [r7, #12] + 8003210: 121b asrs r3, r3, #8 + 8003212: b2db uxtb r3, r3 + 8003214: 713b strb r3, [r7, #4] accel_offset[1] = (accel_bias_reg[0]) & 0xFE; - 80031ca: 68fb ldr r3, [r7, #12] - 80031cc: b2db uxtb r3, r3 - 80031ce: f023 0301 bic.w r3, r3, #1 - 80031d2: b2db uxtb r3, r3 - 80031d4: 717b strb r3, [r7, #5] + 8003216: 68fb ldr r3, [r7, #12] + 8003218: b2db uxtb r3, r3 + 800321a: f023 0301 bic.w r3, r3, #1 + 800321e: b2db uxtb r3, r3 + 8003220: 717b strb r3, [r7, #5] accel_offset[1] = accel_offset[1] | mask_bit[0]; - 80031d6: 797a ldrb r2, [r7, #5] - 80031d8: 783b ldrb r3, [r7, #0] - 80031da: 4313 orrs r3, r2 - 80031dc: b2db uxtb r3, r3 - 80031de: 717b strb r3, [r7, #5] + 8003222: 797a ldrb r2, [r7, #5] + 8003224: 783b ldrb r3, [r7, #0] + 8003226: 4313 orrs r3, r2 + 8003228: b2db uxtb r3, r3 + 800322a: 717b strb r3, [r7, #5] accel_offset[2] = (accel_bias_reg[1] >> 8) & 0xFF; - 80031e0: 693b ldr r3, [r7, #16] - 80031e2: 121b asrs r3, r3, #8 - 80031e4: b2db uxtb r3, r3 - 80031e6: 71bb strb r3, [r7, #6] + 800322c: 693b ldr r3, [r7, #16] + 800322e: 121b asrs r3, r3, #8 + 8003230: b2db uxtb r3, r3 + 8003232: 71bb strb r3, [r7, #6] accel_offset[3] = (accel_bias_reg[1]) & 0xFE; - 80031e8: 693b ldr r3, [r7, #16] - 80031ea: b2db uxtb r3, r3 - 80031ec: f023 0301 bic.w r3, r3, #1 - 80031f0: b2db uxtb r3, r3 - 80031f2: 71fb strb r3, [r7, #7] + 8003234: 693b ldr r3, [r7, #16] + 8003236: b2db uxtb r3, r3 + 8003238: f023 0301 bic.w r3, r3, #1 + 800323c: b2db uxtb r3, r3 + 800323e: 71fb strb r3, [r7, #7] accel_offset[3] = accel_offset[3] | mask_bit[1]; - 80031f4: 79fa ldrb r2, [r7, #7] - 80031f6: 787b ldrb r3, [r7, #1] - 80031f8: 4313 orrs r3, r2 - 80031fa: b2db uxtb r3, r3 - 80031fc: 71fb strb r3, [r7, #7] + 8003240: 79fa ldrb r2, [r7, #7] + 8003242: 787b ldrb r3, [r7, #1] + 8003244: 4313 orrs r3, r2 + 8003246: b2db uxtb r3, r3 + 8003248: 71fb strb r3, [r7, #7] accel_offset[4] = (accel_bias_reg[2] >> 8) & 0xFF; - 80031fe: 697b ldr r3, [r7, #20] - 8003200: 121b asrs r3, r3, #8 - 8003202: b2db uxtb r3, r3 - 8003204: 723b strb r3, [r7, #8] + 800324a: 697b ldr r3, [r7, #20] + 800324c: 121b asrs r3, r3, #8 + 800324e: b2db uxtb r3, r3 + 8003250: 723b strb r3, [r7, #8] accel_offset[5] = (accel_bias_reg[2]) & 0xFE; - 8003206: 697b ldr r3, [r7, #20] - 8003208: b2db uxtb r3, r3 - 800320a: f023 0301 bic.w r3, r3, #1 - 800320e: b2db uxtb r3, r3 - 8003210: 727b strb r3, [r7, #9] + 8003252: 697b ldr r3, [r7, #20] + 8003254: b2db uxtb r3, r3 + 8003256: f023 0301 bic.w r3, r3, #1 + 800325a: b2db uxtb r3, r3 + 800325c: 727b strb r3, [r7, #9] accel_offset[5] = accel_offset[5] | mask_bit[2]; - 8003212: 7a7a ldrb r2, [r7, #9] - 8003214: 78bb ldrb r3, [r7, #2] - 8003216: 4313 orrs r3, r2 - 8003218: b2db uxtb r3, r3 - 800321a: 727b strb r3, [r7, #9] + 800325e: 7a7a ldrb r2, [r7, #9] + 8003260: 78bb ldrb r3, [r7, #2] + 8003262: 4313 orrs r3, r2 + 8003264: b2db uxtb r3, r3 + 8003266: 727b strb r3, [r7, #9] write_multiple_icm20948_reg(ub_1, B1_XA_OFFS_H, &accel_offset[0], 2); - 800321c: 1d3a adds r2, r7, #4 - 800321e: 2302 movs r3, #2 - 8003220: 2114 movs r1, #20 - 8003222: 2010 movs r0, #16 - 8003224: f7ff fc18 bl 8002a58 + 8003268: 1d3a adds r2, r7, #4 + 800326a: 2302 movs r3, #2 + 800326c: 2114 movs r1, #20 + 800326e: 2010 movs r0, #16 + 8003270: f000 f958 bl 8003524 write_multiple_icm20948_reg(ub_1, B1_YA_OFFS_H, &accel_offset[2], 2); - 8003228: 1d3b adds r3, r7, #4 - 800322a: 1c9a adds r2, r3, #2 - 800322c: 2302 movs r3, #2 - 800322e: 2117 movs r1, #23 - 8003230: 2010 movs r0, #16 - 8003232: f7ff fc11 bl 8002a58 + 8003274: 1d3b adds r3, r7, #4 + 8003276: 1c9a adds r2, r3, #2 + 8003278: 2302 movs r3, #2 + 800327a: 2117 movs r1, #23 + 800327c: 2010 movs r0, #16 + 800327e: f000 f951 bl 8003524 write_multiple_icm20948_reg(ub_1, B1_ZA_OFFS_H, &accel_offset[4], 2); - 8003236: 1d3b adds r3, r7, #4 - 8003238: 1d1a adds r2, r3, #4 - 800323a: 2302 movs r3, #2 - 800323c: 211a movs r1, #26 - 800323e: 2010 movs r0, #16 - 8003240: f7ff fc0a bl 8002a58 + 8003282: 1d3b adds r3, r7, #4 + 8003284: 1d1a adds r2, r3, #4 + 8003286: 2302 movs r3, #2 + 8003288: 211a movs r1, #26 + 800328a: 2010 movs r0, #16 + 800328c: f000 f94a bl 8003524 } - 8003244: bf00 nop - 8003246: 3740 adds r7, #64 ; 0x40 - 8003248: 46bd mov sp, r7 - 800324a: bd80 pop {r7, pc} - 800324c: 51eb851f .word 0x51eb851f - 8003250: 080035a0 .word 0x080035a0 + 8003290: bf00 nop + 8003292: 3740 adds r7, #64 ; 0x40 + 8003294: 46bd mov sp, r7 + 8003296: bd80 pop {r7, pc} + 8003298: 51eb851f .word 0x51eb851f + 800329c: 080036c8 .word 0x080036c8 -08003254 : +080032a0 : void icm20948_gyro_full_scale_select(gyro_full_scale full_scale) { - 8003254: b580 push {r7, lr} - 8003256: b084 sub sp, #16 - 8003258: af00 add r7, sp, #0 - 800325a: 4603 mov r3, r0 - 800325c: 71fb strb r3, [r7, #7] + 80032a0: b580 push {r7, lr} + 80032a2: b084 sub sp, #16 + 80032a4: af00 add r7, sp, #0 + 80032a6: 4603 mov r3, r0 + 80032a8: 71fb strb r3, [r7, #7] uint8_t new_val = read_single_icm20948_reg(ub_2, B2_GYRO_CONFIG_1); - 800325e: 2101 movs r1, #1 - 8003260: 2020 movs r0, #32 - 8003262: f7ff fb79 bl 8002958 - 8003266: 4603 mov r3, r0 - 8003268: 73fb strb r3, [r7, #15] + 80032aa: 2101 movs r1, #1 + 80032ac: 2020 movs r0, #32 + 80032ae: f000 f8b9 bl 8003424 + 80032b2: 4603 mov r3, r0 + 80032b4: 73fb strb r3, [r7, #15] switch(full_scale) - 800326a: 79fb ldrb r3, [r7, #7] - 800326c: 2b03 cmp r3, #3 - 800326e: d827 bhi.n 80032c0 - 8003270: a201 add r2, pc, #4 ; (adr r2, 8003278 ) - 8003272: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003276: bf00 nop - 8003278: 08003289 .word 0x08003289 - 800327c: 08003291 .word 0x08003291 - 8003280: 080032a1 .word 0x080032a1 - 8003284: 080032b1 .word 0x080032b1 + 80032b6: 79fb ldrb r3, [r7, #7] + 80032b8: 2b03 cmp r3, #3 + 80032ba: d827 bhi.n 800330c + 80032bc: a201 add r2, pc, #4 ; (adr r2, 80032c4 ) + 80032be: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80032c2: bf00 nop + 80032c4: 080032d5 .word 0x080032d5 + 80032c8: 080032dd .word 0x080032dd + 80032cc: 080032ed .word 0x080032ed + 80032d0: 080032fd .word 0x080032fd { case _250dps : new_val |= 0x00; gyro_scale_factor = 131.0; - 8003288: 4b12 ldr r3, [pc, #72] ; (80032d4 ) - 800328a: 4a13 ldr r2, [pc, #76] ; (80032d8 ) - 800328c: 601a str r2, [r3, #0] + 80032d4: 4b12 ldr r3, [pc, #72] ; (8003320 ) + 80032d6: 4a13 ldr r2, [pc, #76] ; (8003324 ) + 80032d8: 601a str r2, [r3, #0] break; - 800328e: e017 b.n 80032c0 + 80032da: e017 b.n 800330c case _500dps : new_val |= 0x02; - 8003290: 7bfb ldrb r3, [r7, #15] - 8003292: f043 0302 orr.w r3, r3, #2 - 8003296: 73fb strb r3, [r7, #15] + 80032dc: 7bfb ldrb r3, [r7, #15] + 80032de: f043 0302 orr.w r3, r3, #2 + 80032e2: 73fb strb r3, [r7, #15] gyro_scale_factor = 65.5; - 8003298: 4b0e ldr r3, [pc, #56] ; (80032d4 ) - 800329a: 4a10 ldr r2, [pc, #64] ; (80032dc ) - 800329c: 601a str r2, [r3, #0] + 80032e4: 4b0e ldr r3, [pc, #56] ; (8003320 ) + 80032e6: 4a10 ldr r2, [pc, #64] ; (8003328 ) + 80032e8: 601a str r2, [r3, #0] break; - 800329e: e00f b.n 80032c0 + 80032ea: e00f b.n 800330c case _1000dps : new_val |= 0x04; - 80032a0: 7bfb ldrb r3, [r7, #15] - 80032a2: f043 0304 orr.w r3, r3, #4 - 80032a6: 73fb strb r3, [r7, #15] + 80032ec: 7bfb ldrb r3, [r7, #15] + 80032ee: f043 0304 orr.w r3, r3, #4 + 80032f2: 73fb strb r3, [r7, #15] gyro_scale_factor = 32.8; - 80032a8: 4b0a ldr r3, [pc, #40] ; (80032d4 ) - 80032aa: 4a0d ldr r2, [pc, #52] ; (80032e0 ) - 80032ac: 601a str r2, [r3, #0] + 80032f4: 4b0a ldr r3, [pc, #40] ; (8003320 ) + 80032f6: 4a0d ldr r2, [pc, #52] ; (800332c ) + 80032f8: 601a str r2, [r3, #0] break; - 80032ae: e007 b.n 80032c0 + 80032fa: e007 b.n 800330c case _2000dps : new_val |= 0x06; - 80032b0: 7bfb ldrb r3, [r7, #15] - 80032b2: f043 0306 orr.w r3, r3, #6 - 80032b6: 73fb strb r3, [r7, #15] + 80032fc: 7bfb ldrb r3, [r7, #15] + 80032fe: f043 0306 orr.w r3, r3, #6 + 8003302: 73fb strb r3, [r7, #15] gyro_scale_factor = 16.4; - 80032b8: 4b06 ldr r3, [pc, #24] ; (80032d4 ) - 80032ba: 4a0a ldr r2, [pc, #40] ; (80032e4 ) - 80032bc: 601a str r2, [r3, #0] + 8003304: 4b06 ldr r3, [pc, #24] ; (8003320 ) + 8003306: 4a0a ldr r2, [pc, #40] ; (8003330 ) + 8003308: 601a str r2, [r3, #0] break; - 80032be: bf00 nop + 800330a: bf00 nop } write_single_icm20948_reg(ub_2, B2_GYRO_CONFIG_1, new_val); - 80032c0: 7bfb ldrb r3, [r7, #15] - 80032c2: 461a mov r2, r3 - 80032c4: 2101 movs r1, #1 - 80032c6: 2020 movs r0, #32 - 80032c8: f7ff fba2 bl 8002a10 + 800330c: 7bfb ldrb r3, [r7, #15] + 800330e: 461a mov r2, r3 + 8003310: 2101 movs r1, #1 + 8003312: 2020 movs r0, #32 + 8003314: f000 f8b2 bl 800347c } - 80032cc: bf00 nop - 80032ce: 3710 adds r7, #16 - 80032d0: 46bd mov sp, r7 - 80032d2: bd80 pop {r7, pc} - 80032d4: 20000028 .word 0x20000028 - 80032d8: 43030000 .word 0x43030000 - 80032dc: 42830000 .word 0x42830000 - 80032e0: 42033333 .word 0x42033333 - 80032e4: 41833333 .word 0x41833333 - -080032e8 : + 8003318: bf00 nop + 800331a: 3710 adds r7, #16 + 800331c: 46bd mov sp, r7 + 800331e: bd80 pop {r7, pc} + 8003320: 20000028 .word 0x20000028 + 8003324: 43030000 .word 0x43030000 + 8003328: 42830000 .word 0x42830000 + 800332c: 42033333 .word 0x42033333 + 8003330: 41833333 .word 0x41833333 + +08003334 : void icm20948_accel_full_scale_select(accel_full_scale full_scale) { - 80032e8: b580 push {r7, lr} - 80032ea: b084 sub sp, #16 - 80032ec: af00 add r7, sp, #0 - 80032ee: 4603 mov r3, r0 - 80032f0: 71fb strb r3, [r7, #7] + 8003334: b580 push {r7, lr} + 8003336: b084 sub sp, #16 + 8003338: af00 add r7, sp, #0 + 800333a: 4603 mov r3, r0 + 800333c: 71fb strb r3, [r7, #7] uint8_t new_val = read_single_icm20948_reg(ub_2, B2_ACCEL_CONFIG); - 80032f2: 2114 movs r1, #20 - 80032f4: 2020 movs r0, #32 - 80032f6: f7ff fb2f bl 8002958 - 80032fa: 4603 mov r3, r0 - 80032fc: 73fb strb r3, [r7, #15] + 800333e: 2114 movs r1, #20 + 8003340: 2020 movs r0, #32 + 8003342: f000 f86f bl 8003424 + 8003346: 4603 mov r3, r0 + 8003348: 73fb strb r3, [r7, #15] switch(full_scale) - 80032fe: 79fb ldrb r3, [r7, #7] - 8003300: 2b03 cmp r3, #3 - 8003302: d82b bhi.n 800335c - 8003304: a201 add r2, pc, #4 ; (adr r2, 800330c ) - 8003306: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800330a: bf00 nop - 800330c: 0800331d .word 0x0800331d - 8003310: 08003327 .word 0x08003327 - 8003314: 08003339 .word 0x08003339 - 8003318: 0800334b .word 0x0800334b + 800334a: 79fb ldrb r3, [r7, #7] + 800334c: 2b03 cmp r3, #3 + 800334e: d82b bhi.n 80033a8 + 8003350: a201 add r2, pc, #4 ; (adr r2, 8003358 ) + 8003352: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8003356: bf00 nop + 8003358: 08003369 .word 0x08003369 + 800335c: 08003373 .word 0x08003373 + 8003360: 08003385 .word 0x08003385 + 8003364: 08003397 .word 0x08003397 { case _2g : new_val |= 0x00; accel_scale_factor = 16384; - 800331c: 4b14 ldr r3, [pc, #80] ; (8003370 ) - 800331e: f04f 428d mov.w r2, #1182793728 ; 0x46800000 - 8003322: 601a str r2, [r3, #0] + 8003368: 4b14 ldr r3, [pc, #80] ; (80033bc ) + 800336a: f04f 428d mov.w r2, #1182793728 ; 0x46800000 + 800336e: 601a str r2, [r3, #0] break; - 8003324: e01a b.n 800335c + 8003370: e01a b.n 80033a8 case _4g : new_val |= 0x02; - 8003326: 7bfb ldrb r3, [r7, #15] - 8003328: f043 0302 orr.w r3, r3, #2 - 800332c: 73fb strb r3, [r7, #15] + 8003372: 7bfb ldrb r3, [r7, #15] + 8003374: f043 0302 orr.w r3, r3, #2 + 8003378: 73fb strb r3, [r7, #15] accel_scale_factor = 8192; - 800332e: 4b10 ldr r3, [pc, #64] ; (8003370 ) - 8003330: f04f 428c mov.w r2, #1174405120 ; 0x46000000 - 8003334: 601a str r2, [r3, #0] + 800337a: 4b10 ldr r3, [pc, #64] ; (80033bc ) + 800337c: f04f 428c mov.w r2, #1174405120 ; 0x46000000 + 8003380: 601a str r2, [r3, #0] break; - 8003336: e011 b.n 800335c + 8003382: e011 b.n 80033a8 case _8g : new_val |= 0x04; - 8003338: 7bfb ldrb r3, [r7, #15] - 800333a: f043 0304 orr.w r3, r3, #4 - 800333e: 73fb strb r3, [r7, #15] + 8003384: 7bfb ldrb r3, [r7, #15] + 8003386: f043 0304 orr.w r3, r3, #4 + 800338a: 73fb strb r3, [r7, #15] accel_scale_factor = 4096; - 8003340: 4b0b ldr r3, [pc, #44] ; (8003370 ) - 8003342: f04f 428b mov.w r2, #1166016512 ; 0x45800000 - 8003346: 601a str r2, [r3, #0] + 800338c: 4b0b ldr r3, [pc, #44] ; (80033bc ) + 800338e: f04f 428b mov.w r2, #1166016512 ; 0x45800000 + 8003392: 601a str r2, [r3, #0] break; - 8003348: e008 b.n 800335c + 8003394: e008 b.n 80033a8 case _16g : new_val |= 0x06; - 800334a: 7bfb ldrb r3, [r7, #15] - 800334c: f043 0306 orr.w r3, r3, #6 - 8003350: 73fb strb r3, [r7, #15] + 8003396: 7bfb ldrb r3, [r7, #15] + 8003398: f043 0306 orr.w r3, r3, #6 + 800339c: 73fb strb r3, [r7, #15] accel_scale_factor = 2048; - 8003352: 4b07 ldr r3, [pc, #28] ; (8003370 ) - 8003354: f04f 428a mov.w r2, #1157627904 ; 0x45000000 - 8003358: 601a str r2, [r3, #0] + 800339e: 4b07 ldr r3, [pc, #28] ; (80033bc ) + 80033a0: f04f 428a mov.w r2, #1157627904 ; 0x45000000 + 80033a4: 601a str r2, [r3, #0] break; - 800335a: bf00 nop + 80033a6: bf00 nop } write_single_icm20948_reg(ub_2, B2_ACCEL_CONFIG, new_val); - 800335c: 7bfb ldrb r3, [r7, #15] - 800335e: 461a mov r2, r3 - 8003360: 2114 movs r1, #20 - 8003362: 2020 movs r0, #32 - 8003364: f7ff fb54 bl 8002a10 + 80033a8: 7bfb ldrb r3, [r7, #15] + 80033aa: 461a mov r2, r3 + 80033ac: 2114 movs r1, #20 + 80033ae: 2020 movs r0, #32 + 80033b0: f000 f864 bl 800347c } - 8003368: bf00 nop - 800336a: 3710 adds r7, #16 - 800336c: 46bd mov sp, r7 - 800336e: bd80 pop {r7, pc} - 8003370: 2000002c .word 0x2000002c + 80033b4: bf00 nop + 80033b6: 3710 adds r7, #16 + 80033b8: 46bd mov sp, r7 + 80033ba: bd80 pop {r7, pc} + 80033bc: 2000002c .word 0x2000002c -08003374 : +080033c0 : -/* AK09916 Main Functions */ -void ak009916_init() +/* Static Functions */ +static void cs_high() { - 8003374: b580 push {r7, lr} - 8003376: af00 add r7, sp, #0 - icm20948_i2c_master_reset(); - 8003378: f7ff fcef bl 8002d5a - icm20948_i2c_master_enable(); - 800337c: f7ff fd04 bl 8002d88 - icm20948_i2c_master_clk_frq(7); - 8003380: 2007 movs r0, #7 - 8003382: f7ff fd1b bl 8002dbc + 80033c0: b580 push {r7, lr} + 80033c2: af00 add r7, sp, #0 + HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, SET); + 80033c4: 2201 movs r2, #1 + 80033c6: 2110 movs r1, #16 + 80033c8: 4802 ldr r0, [pc, #8] ; (80033d4 ) + 80033ca: f7fe f8b7 bl 800153c +} + 80033ce: bf00 nop + 80033d0: bd80 pop {r7, pc} + 80033d2: bf00 nop + 80033d4: 40020000 .word 0x40020000 - ak09916_soft_reset(); - 8003386: f000 f8b7 bl 80034f8 - ak09916_operation_mode_setting(continuous_measurement_100hz); - 800338a: 2008 movs r0, #8 - 800338c: f000 f8bf bl 800350e +080033d8 : + +static void cs_low() +{ + 80033d8: b580 push {r7, lr} + 80033da: af00 add r7, sp, #0 + HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, RESET); + 80033dc: 2200 movs r2, #0 + 80033de: 2110 movs r1, #16 + 80033e0: 4802 ldr r0, [pc, #8] ; (80033ec ) + 80033e2: f7fe f8ab bl 800153c } - 8003390: bf00 nop - 8003392: bd80 pop {r7, pc} + 80033e6: bf00 nop + 80033e8: bd80 pop {r7, pc} + 80033ea: bf00 nop + 80033ec: 40020000 .word 0x40020000 -08003394 : +080033f0 : -bool ak09916_mag_read(axises* data) +static void select_user_bank(userbank ub) { - 8003394: b580 push {r7, lr} - 8003396: b086 sub sp, #24 - 8003398: af00 add r7, sp, #0 - 800339a: 6078 str r0, [r7, #4] - uint8_t* temp; - uint8_t drdy, hofl; // data ready, overflow + 80033f0: b580 push {r7, lr} + 80033f2: b084 sub sp, #16 + 80033f4: af00 add r7, sp, #0 + 80033f6: 4603 mov r3, r0 + 80033f8: 71fb strb r3, [r7, #7] + uint8_t write_reg[2]; + write_reg[0] = WRITE | REG_BANK_SEL; + 80033fa: 237f movs r3, #127 ; 0x7f + 80033fc: 733b strb r3, [r7, #12] + write_reg[1] = ub; + 80033fe: 79fb ldrb r3, [r7, #7] + 8003400: 737b strb r3, [r7, #13] - drdy = read_single_ak09916_reg(MAG_ST1) & 0x01; - 800339c: 2010 movs r0, #16 - 800339e: f7ff fb87 bl 8002ab0 - 80033a2: 4603 mov r3, r0 - 80033a4: f003 0301 and.w r3, r3, #1 - 80033a8: 75fb strb r3, [r7, #23] - if(!drdy) return false; - 80033aa: 7dfb ldrb r3, [r7, #23] - 80033ac: 2b00 cmp r3, #0 - 80033ae: d101 bne.n 80033b4 - 80033b0: 2300 movs r3, #0 - 80033b2: e046 b.n 8003442 + cs_low(); + 8003402: f7ff ffe9 bl 80033d8 + HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 10); + 8003406: f107 010c add.w r1, r7, #12 + 800340a: 230a movs r3, #10 + 800340c: 2202 movs r2, #2 + 800340e: 4804 ldr r0, [pc, #16] ; (8003420 ) + 8003410: f7fe fd4b bl 8001eaa + cs_high(); + 8003414: f7ff ffd4 bl 80033c0 +} + 8003418: bf00 nop + 800341a: 3710 adds r7, #16 + 800341c: 46bd mov sp, r7 + 800341e: bd80 pop {r7, pc} + 8003420: 2000005c .word 0x2000005c - temp = read_multiple_ak09916_reg(MAG_HXL, 6); - 80033b4: 2106 movs r1, #6 - 80033b6: 2011 movs r0, #17 - 80033b8: f7ff fb9b bl 8002af2 - 80033bc: 6138 str r0, [r7, #16] +08003424 : - hofl = read_single_ak09916_reg(MAG_ST2) & 0x08; - 80033be: 2018 movs r0, #24 - 80033c0: f7ff fb76 bl 8002ab0 - 80033c4: 4603 mov r3, r0 - 80033c6: f003 0308 and.w r3, r3, #8 - 80033ca: 73fb strb r3, [r7, #15] - if(hofl) return false; - 80033cc: 7bfb ldrb r3, [r7, #15] - 80033ce: 2b00 cmp r3, #0 - 80033d0: d001 beq.n 80033d6 - 80033d2: 2300 movs r3, #0 - 80033d4: e035 b.n 8003442 +static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg) +{ + 8003424: b580 push {r7, lr} + 8003426: b084 sub sp, #16 + 8003428: af00 add r7, sp, #0 + 800342a: 4603 mov r3, r0 + 800342c: 460a mov r2, r1 + 800342e: 71fb strb r3, [r7, #7] + 8003430: 4613 mov r3, r2 + 8003432: 71bb strb r3, [r7, #6] + uint8_t read_reg = READ | reg; + 8003434: 79bb ldrb r3, [r7, #6] + 8003436: f063 037f orn r3, r3, #127 ; 0x7f + 800343a: b2db uxtb r3, r3 + 800343c: 73fb strb r3, [r7, #15] + uint8_t reg_val; + select_user_bank(ub); + 800343e: 79fb ldrb r3, [r7, #7] + 8003440: 4618 mov r0, r3 + 8003442: f7ff ffd5 bl 80033f0 - data->x = (int16_t)(temp[1] << 8 | temp[0]); - 80033d6: 693b ldr r3, [r7, #16] - 80033d8: 3301 adds r3, #1 - 80033da: 781b ldrb r3, [r3, #0] - 80033dc: 021b lsls r3, r3, #8 - 80033de: b21a sxth r2, r3 - 80033e0: 693b ldr r3, [r7, #16] - 80033e2: 781b ldrb r3, [r3, #0] - 80033e4: b21b sxth r3, r3 - 80033e6: 4313 orrs r3, r2 - 80033e8: b21b sxth r3, r3 - 80033ea: ee07 3a90 vmov s15, r3 - 80033ee: eef8 7ae7 vcvt.f32.s32 s15, s15 - 80033f2: 687b ldr r3, [r7, #4] - 80033f4: edc3 7a00 vstr s15, [r3] - data->y = (int16_t)(temp[3] << 8 | temp[2]); - 80033f8: 693b ldr r3, [r7, #16] - 80033fa: 3303 adds r3, #3 - 80033fc: 781b ldrb r3, [r3, #0] - 80033fe: 021b lsls r3, r3, #8 - 8003400: b21a sxth r2, r3 - 8003402: 693b ldr r3, [r7, #16] - 8003404: 3302 adds r3, #2 - 8003406: 781b ldrb r3, [r3, #0] - 8003408: b21b sxth r3, r3 - 800340a: 4313 orrs r3, r2 - 800340c: b21b sxth r3, r3 - 800340e: ee07 3a90 vmov s15, r3 - 8003412: eef8 7ae7 vcvt.f32.s32 s15, s15 - 8003416: 687b ldr r3, [r7, #4] - 8003418: edc3 7a01 vstr s15, [r3, #4] - data->z = (int16_t)(temp[5] << 8 | temp[4]); - 800341c: 693b ldr r3, [r7, #16] - 800341e: 3305 adds r3, #5 - 8003420: 781b ldrb r3, [r3, #0] - 8003422: 021b lsls r3, r3, #8 - 8003424: b21a sxth r2, r3 - 8003426: 693b ldr r3, [r7, #16] - 8003428: 3304 adds r3, #4 - 800342a: 781b ldrb r3, [r3, #0] - 800342c: b21b sxth r3, r3 - 800342e: 4313 orrs r3, r2 - 8003430: b21b sxth r3, r3 - 8003432: ee07 3a90 vmov s15, r3 - 8003436: eef8 7ae7 vcvt.f32.s32 s15, s15 - 800343a: 687b ldr r3, [r7, #4] - 800343c: edc3 7a02 vstr s15, [r3, #8] + cs_low(); + 8003446: f7ff ffc7 bl 80033d8 + HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); + 800344a: f107 010f add.w r1, r7, #15 + 800344e: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8003452: 2201 movs r2, #1 + 8003454: 4808 ldr r0, [pc, #32] ; (8003478 ) + 8003456: f7fe fd28 bl 8001eaa + HAL_SPI_Receive(ICM20948_SPI, ®_val, 1, 1000); + 800345a: f107 010e add.w r1, r7, #14 + 800345e: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8003462: 2201 movs r2, #1 + 8003464: 4804 ldr r0, [pc, #16] ; (8003478 ) + 8003466: f7fe fe5c bl 8002122 + cs_high(); + 800346a: f7ff ffa9 bl 80033c0 - return true; - 8003440: 2301 movs r3, #1 + return reg_val; + 800346e: 7bbb ldrb r3, [r7, #14] } - 8003442: 4618 mov r0, r3 - 8003444: 3718 adds r7, #24 - 8003446: 46bd mov sp, r7 - 8003448: bd80 pop {r7, pc} - 800344a: 0000 movs r0, r0 - 800344c: 0000 movs r0, r0 - ... + 8003470: 4618 mov r0, r3 + 8003472: 3710 adds r7, #16 + 8003474: 46bd mov sp, r7 + 8003476: bd80 pop {r7, pc} + 8003478: 2000005c .word 0x2000005c -08003450 : +0800347c : -bool ak09916_mag_read_uT(axises* data) +static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) { - 8003450: b580 push {r7, lr} - 8003452: b086 sub sp, #24 - 8003454: af00 add r7, sp, #0 - 8003456: 6078 str r0, [r7, #4] - axises temp; + 800347c: b580 push {r7, lr} + 800347e: b084 sub sp, #16 + 8003480: af00 add r7, sp, #0 + 8003482: 4603 mov r3, r0 + 8003484: 71fb strb r3, [r7, #7] + 8003486: 460b mov r3, r1 + 8003488: 71bb strb r3, [r7, #6] + 800348a: 4613 mov r3, r2 + 800348c: 717b strb r3, [r7, #5] + uint8_t write_reg[2]; + write_reg[0] = WRITE | reg; + 800348e: 79bb ldrb r3, [r7, #6] + 8003490: 733b strb r3, [r7, #12] + write_reg[1] = val; + 8003492: 797b ldrb r3, [r7, #5] + 8003494: 737b strb r3, [r7, #13] - bool new_data = ak09916_mag_read(&temp); - 8003458: f107 0308 add.w r3, r7, #8 - 800345c: 4618 mov r0, r3 - 800345e: f7ff ff99 bl 8003394 - 8003462: 4603 mov r3, r0 - 8003464: 75fb strb r3, [r7, #23] - if(!new_data) return false; - 8003466: 7dfb ldrb r3, [r7, #23] - 8003468: f083 0301 eor.w r3, r3, #1 - 800346c: b2db uxtb r3, r3 - 800346e: 2b00 cmp r3, #0 - 8003470: d001 beq.n 8003476 - 8003472: 2300 movs r3, #0 - 8003474: e036 b.n 80034e4 + select_user_bank(ub); + 8003496: 79fb ldrb r3, [r7, #7] + 8003498: 4618 mov r0, r3 + 800349a: f7ff ffa9 bl 80033f0 - data->x = (float)(temp.x * 0.15); - 8003476: 68bb ldr r3, [r7, #8] - 8003478: 4618 mov r0, r3 - 800347a: f7fd f93b bl 80006f4 <__aeabi_f2d> - 800347e: a31c add r3, pc, #112 ; (adr r3, 80034f0 ) - 8003480: e9d3 2300 ldrd r2, r3, [r3] - 8003484: f7fc fea8 bl 80001d8 <__aeabi_dmul> - 8003488: 4602 mov r2, r0 - 800348a: 460b mov r3, r1 - 800348c: 4610 mov r0, r2 - 800348e: 4619 mov r1, r3 - 8003490: f7fd f988 bl 80007a4 <__aeabi_d2f> - 8003494: 4602 mov r2, r0 - 8003496: 687b ldr r3, [r7, #4] - 8003498: 601a str r2, [r3, #0] - data->y = (float)(temp.y * 0.15); - 800349a: 68fb ldr r3, [r7, #12] - 800349c: 4618 mov r0, r3 - 800349e: f7fd f929 bl 80006f4 <__aeabi_f2d> - 80034a2: a313 add r3, pc, #76 ; (adr r3, 80034f0 ) - 80034a4: e9d3 2300 ldrd r2, r3, [r3] - 80034a8: f7fc fe96 bl 80001d8 <__aeabi_dmul> - 80034ac: 4602 mov r2, r0 - 80034ae: 460b mov r3, r1 - 80034b0: 4610 mov r0, r2 - 80034b2: 4619 mov r1, r3 - 80034b4: f7fd f976 bl 80007a4 <__aeabi_d2f> - 80034b8: 4602 mov r2, r0 - 80034ba: 687b ldr r3, [r7, #4] - 80034bc: 605a str r2, [r3, #4] - data->z = (float)(temp.z * 0.15); - 80034be: 693b ldr r3, [r7, #16] - 80034c0: 4618 mov r0, r3 - 80034c2: f7fd f917 bl 80006f4 <__aeabi_f2d> - 80034c6: a30a add r3, pc, #40 ; (adr r3, 80034f0 ) - 80034c8: e9d3 2300 ldrd r2, r3, [r3] - 80034cc: f7fc fe84 bl 80001d8 <__aeabi_dmul> - 80034d0: 4602 mov r2, r0 - 80034d2: 460b mov r3, r1 - 80034d4: 4610 mov r0, r2 - 80034d6: 4619 mov r1, r3 - 80034d8: f7fd f964 bl 80007a4 <__aeabi_d2f> - 80034dc: 4602 mov r2, r0 - 80034de: 687b ldr r3, [r7, #4] - 80034e0: 609a str r2, [r3, #8] + cs_low(); + 800349e: f7ff ff9b bl 80033d8 + HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 1000); + 80034a2: f107 010c add.w r1, r7, #12 + 80034a6: f44f 737a mov.w r3, #1000 ; 0x3e8 + 80034aa: 2202 movs r2, #2 + 80034ac: 4804 ldr r0, [pc, #16] ; (80034c0 ) + 80034ae: f7fe fcfc bl 8001eaa + cs_high(); + 80034b2: f7ff ff85 bl 80033c0 +} + 80034b6: bf00 nop + 80034b8: 3710 adds r7, #16 + 80034ba: 46bd mov sp, r7 + 80034bc: bd80 pop {r7, pc} + 80034be: bf00 nop + 80034c0: 2000005c .word 0x2000005c - return true; - 80034e2: 2301 movs r3, #1 -} - 80034e4: 4618 mov r0, r3 - 80034e6: 3718 adds r7, #24 - 80034e8: 46bd mov sp, r7 - 80034ea: bd80 pop {r7, pc} - 80034ec: f3af 8000 nop.w - 80034f0: 33333333 .word 0x33333333 - 80034f4: 3fc33333 .word 0x3fc33333 - -080034f8 : - else - return false; +080034c4 : + +static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) +{ + 80034c4: b580 push {r7, lr} + 80034c6: b084 sub sp, #16 + 80034c8: af00 add r7, sp, #0 + 80034ca: 4603 mov r3, r0 + 80034cc: 71fb strb r3, [r7, #7] + 80034ce: 460b mov r3, r1 + 80034d0: 71bb strb r3, [r7, #6] + 80034d2: 4613 mov r3, r2 + 80034d4: 717b strb r3, [r7, #5] + uint8_t read_reg = READ | reg; + 80034d6: 79bb ldrb r3, [r7, #6] + 80034d8: f063 037f orn r3, r3, #127 ; 0x7f + 80034dc: b2db uxtb r3, r3 + 80034de: 73fb strb r3, [r7, #15] + static uint8_t reg_val[6]; + select_user_bank(ub); + 80034e0: 79fb ldrb r3, [r7, #7] + 80034e2: 4618 mov r0, r3 + 80034e4: f7ff ff84 bl 80033f0 + + cs_low(); + 80034e8: f7ff ff76 bl 80033d8 + HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); + 80034ec: f107 010f add.w r1, r7, #15 + 80034f0: f44f 737a mov.w r3, #1000 ; 0x3e8 + 80034f4: 2201 movs r2, #1 + 80034f6: 4809 ldr r0, [pc, #36] ; (800351c ) + 80034f8: f7fe fcd7 bl 8001eaa + HAL_SPI_Receive(ICM20948_SPI, reg_val, len, 1000); + 80034fc: 797b ldrb r3, [r7, #5] + 80034fe: b29a uxth r2, r3 + 8003500: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8003504: 4906 ldr r1, [pc, #24] ; (8003520 ) + 8003506: 4805 ldr r0, [pc, #20] ; (800351c ) + 8003508: f7fe fe0b bl 8002122 + cs_high(); + 800350c: f7ff ff58 bl 80033c0 + + return reg_val; + 8003510: 4b03 ldr r3, [pc, #12] ; (8003520 ) } + 8003512: 4618 mov r0, r3 + 8003514: 3710 adds r7, #16 + 8003516: 46bd mov sp, r7 + 8003518: bd80 pop {r7, pc} + 800351a: bf00 nop + 800351c: 2000005c .word 0x2000005c + 8003520: 20000030 .word 0x20000030 -void ak09916_soft_reset() +08003524 : + +static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) { - 80034f8: b580 push {r7, lr} - 80034fa: af00 add r7, sp, #0 - write_single_ak09916_reg(MAG_CNTL3, 0x01); - 80034fc: 2101 movs r1, #1 - 80034fe: 2032 movs r0, #50 ; 0x32 - 8003500: f7ff fb21 bl 8002b46 - HAL_Delay(100); - 8003504: 2064 movs r0, #100 ; 0x64 - 8003506: f7fd fd91 bl 800102c + 8003524: b580 push {r7, lr} + 8003526: b084 sub sp, #16 + 8003528: af00 add r7, sp, #0 + 800352a: 603a str r2, [r7, #0] + 800352c: 461a mov r2, r3 + 800352e: 4603 mov r3, r0 + 8003530: 71fb strb r3, [r7, #7] + 8003532: 460b mov r3, r1 + 8003534: 71bb strb r3, [r7, #6] + 8003536: 4613 mov r3, r2 + 8003538: 717b strb r3, [r7, #5] + uint8_t write_reg = WRITE | reg; + 800353a: 79bb ldrb r3, [r7, #6] + 800353c: 73fb strb r3, [r7, #15] + select_user_bank(ub); + 800353e: 79fb ldrb r3, [r7, #7] + 8003540: 4618 mov r0, r3 + 8003542: f7ff ff55 bl 80033f0 + + cs_low(); + 8003546: f7ff ff47 bl 80033d8 + HAL_SPI_Transmit(ICM20948_SPI, &write_reg, 1, 1000); + 800354a: f107 010f add.w r1, r7, #15 + 800354e: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8003552: 2201 movs r2, #1 + 8003554: 4808 ldr r0, [pc, #32] ; (8003578 ) + 8003556: f7fe fca8 bl 8001eaa + HAL_SPI_Transmit(ICM20948_SPI, val, len, 1000); + 800355a: 797b ldrb r3, [r7, #5] + 800355c: b29a uxth r2, r3 + 800355e: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8003562: 6839 ldr r1, [r7, #0] + 8003564: 4804 ldr r0, [pc, #16] ; (8003578 ) + 8003566: f7fe fca0 bl 8001eaa + cs_high(); + 800356a: f7ff ff29 bl 80033c0 } - 800350a: bf00 nop - 800350c: bd80 pop {r7, pc} + 800356e: bf00 nop + 8003570: 3710 adds r7, #16 + 8003572: 46bd mov sp, r7 + 8003574: bd80 pop {r7, pc} + 8003576: bf00 nop + 8003578: 2000005c .word 0x2000005c -0800350e : +0800357c : -void ak09916_operation_mode_setting(operation_mode mode) +static uint8_t read_single_ak09916_reg(uint8_t reg) { - 800350e: b580 push {r7, lr} - 8003510: b082 sub sp, #8 - 8003512: af00 add r7, sp, #0 - 8003514: 4603 mov r3, r0 - 8003516: 71fb strb r3, [r7, #7] - write_single_ak09916_reg(MAG_CNTL2, mode); - 8003518: 79fb ldrb r3, [r7, #7] - 800351a: 4619 mov r1, r3 - 800351c: 2031 movs r0, #49 ; 0x31 - 800351e: f7ff fb12 bl 8002b46 - HAL_Delay(100); - 8003522: 2064 movs r0, #100 ; 0x64 - 8003524: f7fd fd82 bl 800102c + 800357c: b580 push {r7, lr} + 800357e: b082 sub sp, #8 + 8003580: af00 add r7, sp, #0 + 8003582: 4603 mov r3, r0 + 8003584: 71fb strb r3, [r7, #7] + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); + 8003586: 228c movs r2, #140 ; 0x8c + 8003588: 2103 movs r1, #3 + 800358a: 2030 movs r0, #48 ; 0x30 + 800358c: f7ff ff76 bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + 8003590: 79fb ldrb r3, [r7, #7] + 8003592: 461a mov r2, r3 + 8003594: 2104 movs r1, #4 + 8003596: 2030 movs r0, #48 ; 0x30 + 8003598: f7ff ff70 bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); + 800359c: 2281 movs r2, #129 ; 0x81 + 800359e: 2105 movs r1, #5 + 80035a0: 2030 movs r0, #48 ; 0x30 + 80035a2: f7ff ff6b bl 800347c + + HAL_Delay(1); + 80035a6: 2001 movs r0, #1 + 80035a8: f7fd fd3a bl 8001020 + return read_single_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00); + 80035ac: 213b movs r1, #59 ; 0x3b + 80035ae: 2000 movs r0, #0 + 80035b0: f7ff ff38 bl 8003424 + 80035b4: 4603 mov r3, r0 +} + 80035b6: 4618 mov r0, r3 + 80035b8: 3708 adds r7, #8 + 80035ba: 46bd mov sp, r7 + 80035bc: bd80 pop {r7, pc} + +080035be : + +static void write_single_ak09916_reg(uint8_t reg, uint8_t val) +{ + 80035be: b580 push {r7, lr} + 80035c0: b082 sub sp, #8 + 80035c2: af00 add r7, sp, #0 + 80035c4: 4603 mov r3, r0 + 80035c6: 460a mov r2, r1 + 80035c8: 71fb strb r3, [r7, #7] + 80035ca: 4613 mov r3, r2 + 80035cc: 71bb strb r3, [r7, #6] + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, WRITE | MAG_SLAVE_ADDR); + 80035ce: 220c movs r2, #12 + 80035d0: 2103 movs r1, #3 + 80035d2: 2030 movs r0, #48 ; 0x30 + 80035d4: f7ff ff52 bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + 80035d8: 79fb ldrb r3, [r7, #7] + 80035da: 461a mov r2, r3 + 80035dc: 2104 movs r1, #4 + 80035de: 2030 movs r0, #48 ; 0x30 + 80035e0: f7ff ff4c bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_DO, val); + 80035e4: 79bb ldrb r3, [r7, #6] + 80035e6: 461a mov r2, r3 + 80035e8: 2106 movs r1, #6 + 80035ea: 2030 movs r0, #48 ; 0x30 + 80035ec: f7ff ff46 bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); + 80035f0: 2281 movs r2, #129 ; 0x81 + 80035f2: 2105 movs r1, #5 + 80035f4: 2030 movs r0, #48 ; 0x30 + 80035f6: f7ff ff41 bl 800347c } - 8003528: bf00 nop - 800352a: 3708 adds r7, #8 - 800352c: 46bd mov sp, r7 - 800352e: bd80 pop {r7, pc} - -08003530 <__libc_init_array>: - 8003530: b570 push {r4, r5, r6, lr} - 8003532: 4d0d ldr r5, [pc, #52] ; (8003568 <__libc_init_array+0x38>) - 8003534: 4c0d ldr r4, [pc, #52] ; (800356c <__libc_init_array+0x3c>) - 8003536: 1b64 subs r4, r4, r5 - 8003538: 10a4 asrs r4, r4, #2 - 800353a: 2600 movs r6, #0 - 800353c: 42a6 cmp r6, r4 - 800353e: d109 bne.n 8003554 <__libc_init_array+0x24> - 8003540: 4d0b ldr r5, [pc, #44] ; (8003570 <__libc_init_array+0x40>) - 8003542: 4c0c ldr r4, [pc, #48] ; (8003574 <__libc_init_array+0x44>) - 8003544: f000 f820 bl 8003588 <_init> - 8003548: 1b64 subs r4, r4, r5 - 800354a: 10a4 asrs r4, r4, #2 - 800354c: 2600 movs r6, #0 - 800354e: 42a6 cmp r6, r4 - 8003550: d105 bne.n 800355e <__libc_init_array+0x2e> - 8003552: bd70 pop {r4, r5, r6, pc} - 8003554: f855 3b04 ldr.w r3, [r5], #4 - 8003558: 4798 blx r3 - 800355a: 3601 adds r6, #1 - 800355c: e7ee b.n 800353c <__libc_init_array+0xc> - 800355e: f855 3b04 ldr.w r3, [r5], #4 - 8003562: 4798 blx r3 - 8003564: 3601 adds r6, #1 - 8003566: e7f2 b.n 800354e <__libc_init_array+0x1e> - 8003568: 080035bc .word 0x080035bc - 800356c: 080035bc .word 0x080035bc - 8003570: 080035bc .word 0x080035bc - 8003574: 080035c0 .word 0x080035c0 - -08003578 : - 8003578: 4402 add r2, r0 - 800357a: 4603 mov r3, r0 - 800357c: 4293 cmp r3, r2 - 800357e: d100 bne.n 8003582 - 8003580: 4770 bx lr - 8003582: f803 1b01 strb.w r1, [r3], #1 - 8003586: e7f9 b.n 800357c - -08003588 <_init>: - 8003588: b5f8 push {r3, r4, r5, r6, r7, lr} - 800358a: bf00 nop - 800358c: bcf8 pop {r3, r4, r5, r6, r7} - 800358e: bc08 pop {r3} - 8003590: 469e mov lr, r3 - 8003592: 4770 bx lr - -08003594 <_fini>: - 8003594: b5f8 push {r3, r4, r5, r6, r7, lr} - 8003596: bf00 nop - 8003598: bcf8 pop {r3, r4, r5, r6, r7} - 800359a: bc08 pop {r3} - 800359c: 469e mov lr, r3 - 800359e: 4770 bx lr + 80035fa: bf00 nop + 80035fc: 3708 adds r7, #8 + 80035fe: 46bd mov sp, r7 + 8003600: bd80 pop {r7, pc} + +08003602 : + +static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len) +{ + 8003602: b580 push {r7, lr} + 8003604: b082 sub sp, #8 + 8003606: af00 add r7, sp, #0 + 8003608: 4603 mov r3, r0 + 800360a: 460a mov r2, r1 + 800360c: 71fb strb r3, [r7, #7] + 800360e: 4613 mov r3, r2 + 8003610: 71bb strb r3, [r7, #6] + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); + 8003612: 228c movs r2, #140 ; 0x8c + 8003614: 2103 movs r1, #3 + 8003616: 2030 movs r0, #48 ; 0x30 + 8003618: f7ff ff30 bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + 800361c: 79fb ldrb r3, [r7, #7] + 800361e: 461a mov r2, r3 + 8003620: 2104 movs r1, #4 + 8003622: 2030 movs r0, #48 ; 0x30 + 8003624: f7ff ff2a bl 800347c + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x80 | len); + 8003628: 79bb ldrb r3, [r7, #6] + 800362a: f063 037f orn r3, r3, #127 ; 0x7f + 800362e: b2db uxtb r3, r3 + 8003630: 461a mov r2, r3 + 8003632: 2105 movs r1, #5 + 8003634: 2030 movs r0, #48 ; 0x30 + 8003636: f7ff ff21 bl 800347c + + HAL_Delay(1); + 800363a: 2001 movs r0, #1 + 800363c: f7fd fcf0 bl 8001020 + return read_multiple_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00, len); + 8003640: 79bb ldrb r3, [r7, #6] + 8003642: 461a mov r2, r3 + 8003644: 213b movs r1, #59 ; 0x3b + 8003646: 2000 movs r0, #0 + 8003648: f7ff ff3c bl 80034c4 + 800364c: 4603 mov r3, r0 + 800364e: 4618 mov r0, r3 + 8003650: 3708 adds r7, #8 + 8003652: 46bd mov sp, r7 + 8003654: bd80 pop {r7, pc} + ... + +08003658 <__libc_init_array>: + 8003658: b570 push {r4, r5, r6, lr} + 800365a: 4d0d ldr r5, [pc, #52] ; (8003690 <__libc_init_array+0x38>) + 800365c: 4c0d ldr r4, [pc, #52] ; (8003694 <__libc_init_array+0x3c>) + 800365e: 1b64 subs r4, r4, r5 + 8003660: 10a4 asrs r4, r4, #2 + 8003662: 2600 movs r6, #0 + 8003664: 42a6 cmp r6, r4 + 8003666: d109 bne.n 800367c <__libc_init_array+0x24> + 8003668: 4d0b ldr r5, [pc, #44] ; (8003698 <__libc_init_array+0x40>) + 800366a: 4c0c ldr r4, [pc, #48] ; (800369c <__libc_init_array+0x44>) + 800366c: f000 f820 bl 80036b0 <_init> + 8003670: 1b64 subs r4, r4, r5 + 8003672: 10a4 asrs r4, r4, #2 + 8003674: 2600 movs r6, #0 + 8003676: 42a6 cmp r6, r4 + 8003678: d105 bne.n 8003686 <__libc_init_array+0x2e> + 800367a: bd70 pop {r4, r5, r6, pc} + 800367c: f855 3b04 ldr.w r3, [r5], #4 + 8003680: 4798 blx r3 + 8003682: 3601 adds r6, #1 + 8003684: e7ee b.n 8003664 <__libc_init_array+0xc> + 8003686: f855 3b04 ldr.w r3, [r5], #4 + 800368a: 4798 blx r3 + 800368c: 3601 adds r6, #1 + 800368e: e7f2 b.n 8003676 <__libc_init_array+0x1e> + 8003690: 080036e4 .word 0x080036e4 + 8003694: 080036e4 .word 0x080036e4 + 8003698: 080036e4 .word 0x080036e4 + 800369c: 080036e8 .word 0x080036e8 + +080036a0 : + 80036a0: 4402 add r2, r0 + 80036a2: 4603 mov r3, r0 + 80036a4: 4293 cmp r3, r2 + 80036a6: d100 bne.n 80036aa + 80036a8: 4770 bx lr + 80036aa: f803 1b01 strb.w r1, [r3], #1 + 80036ae: e7f9 b.n 80036a4 + +080036b0 <_init>: + 80036b0: b5f8 push {r3, r4, r5, r6, r7, lr} + 80036b2: bf00 nop + 80036b4: bcf8 pop {r3, r4, r5, r6, r7} + 80036b6: bc08 pop {r3} + 80036b8: 469e mov lr, r3 + 80036ba: 4770 bx lr + +080036bc <_fini>: + 80036bc: b5f8 push {r3, r4, r5, r6, r7, lr} + 80036be: bf00 nop + 80036c0: bcf8 pop {r3, r4, r5, r6, r7} + 80036c2: bc08 pop {r3} + 80036c4: 469e mov lr, r3 + 80036c6: 4770 bx lr diff --git a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.map b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.map index 64f9e79..3aa7296 100644 --- a/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.map +++ b/stm32f411_fw_icm20948/Debug/stm32f411_fw_icm20948.map @@ -26,16 +26,12 @@ c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externalt Allocating common symbols Common symbol size file -temp2 0x4 Core/Src/main.o uwTick 0x4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o pFlash 0x20 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o my_accel 0xc Core/Src/main.o -my_mag2 0xc Core/Src/main.o hspi1 0x58 Core/Src/spi.o my_mag 0xc Core/Src/main.o -mag_data 0x6 Core/Src/main.o my_gyro 0xc Core/Src/main.o -status 0x1 Core/Src/main.o Discarded input sections @@ -2518,16 +2514,8 @@ Discarded input sections .text 0x0000000000000000 0x0 ICM20948/icm20948.o .data 0x0000000000000000 0x0 ICM20948/icm20948.o .bss 0x0000000000000000 0x0 ICM20948/icm20948.o - .text.icm20948_gyro_read_dps - 0x0000000000000000 0x5c ICM20948/icm20948.o - .text.icm20948_accel_read_g - 0x0000000000000000 0x5c ICM20948/icm20948.o - .text.icm20948_who_am_i - 0x0000000000000000 0x26 ICM20948/icm20948.o .text.icm20948_sleep 0x0000000000000000 0x34 ICM20948/icm20948.o - .text.ak09916_who_am_i - 0x0000000000000000 0x24 ICM20948/icm20948.o .debug_macro 0x0000000000000000 0xaa8 ICM20948/icm20948.o .debug_macro 0x0000000000000000 0x295 ICM20948/icm20948.o .debug_macro 0x0000000000000000 0x2e ICM20948/icm20948.o @@ -2567,7 +2555,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x126 ICM20948/icm20948.o .debug_macro 0x0000000000000000 0x1c ICM20948/icm20948.o .debug_macro 0x0000000000000000 0x22 ICM20948/icm20948.o - .debug_macro 0x0000000000000000 0x3e1 ICM20948/icm20948.o + .debug_macro 0x0000000000000000 0x3df ICM20948/icm20948.o .text 0x0000000000000000 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-errno.o) .data 0x0000000000000000 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-errno.o) .bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-errno.o) @@ -2691,7 +2679,7 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000008000000 g_pfnVectors 0x0000000008000198 . = ALIGN (0x4) -.text 0x0000000008000198 0x3408 +.text 0x0000000008000198 0x3530 0x0000000008000198 . = ALIGN (0x4) *(.text) .text 0x0000000008000198 0x40 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -2728,365 +2716,379 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte .text.MX_GPIO_Init 0x0000000008000b3c 0xd0 Core/Src/gpio.o 0x0000000008000b3c MX_GPIO_Init - .text.main 0x0000000008000c0c 0x48 Core/Src/main.o + .text.main 0x0000000008000c0c 0x3c Core/Src/main.o 0x0000000008000c0c main .text.SystemClock_Config - 0x0000000008000c54 0xd0 Core/Src/main.o - 0x0000000008000c54 SystemClock_Config + 0x0000000008000c48 0xd0 Core/Src/main.o + 0x0000000008000c48 SystemClock_Config .text.Error_Handler - 0x0000000008000d24 0xa Core/Src/main.o - 0x0000000008000d24 Error_Handler - *fill* 0x0000000008000d2e 0x2 + 0x0000000008000d18 0xa Core/Src/main.o + 0x0000000008000d18 Error_Handler + *fill* 0x0000000008000d22 0x2 .text.MX_SPI1_Init - 0x0000000008000d30 0x6c Core/Src/spi.o - 0x0000000008000d30 MX_SPI1_Init + 0x0000000008000d24 0x6c Core/Src/spi.o + 0x0000000008000d24 MX_SPI1_Init .text.HAL_SPI_MspInit - 0x0000000008000d9c 0x90 Core/Src/spi.o - 0x0000000008000d9c HAL_SPI_MspInit + 0x0000000008000d90 0x90 Core/Src/spi.o + 0x0000000008000d90 HAL_SPI_MspInit .text.HAL_MspInit - 0x0000000008000e2c 0x50 Core/Src/stm32f4xx_hal_msp.o - 0x0000000008000e2c HAL_MspInit + 0x0000000008000e20 0x50 Core/Src/stm32f4xx_hal_msp.o + 0x0000000008000e20 HAL_MspInit .text.NMI_Handler - 0x0000000008000e7c 0x6 Core/Src/stm32f4xx_it.o - 0x0000000008000e7c NMI_Handler + 0x0000000008000e70 0x6 Core/Src/stm32f4xx_it.o + 0x0000000008000e70 NMI_Handler .text.HardFault_Handler - 0x0000000008000e82 0x6 Core/Src/stm32f4xx_it.o - 0x0000000008000e82 HardFault_Handler + 0x0000000008000e76 0x6 Core/Src/stm32f4xx_it.o + 0x0000000008000e76 HardFault_Handler .text.MemManage_Handler - 0x0000000008000e88 0x6 Core/Src/stm32f4xx_it.o - 0x0000000008000e88 MemManage_Handler + 0x0000000008000e7c 0x6 Core/Src/stm32f4xx_it.o + 0x0000000008000e7c MemManage_Handler .text.BusFault_Handler - 0x0000000008000e8e 0x6 Core/Src/stm32f4xx_it.o - 0x0000000008000e8e BusFault_Handler + 0x0000000008000e82 0x6 Core/Src/stm32f4xx_it.o + 0x0000000008000e82 BusFault_Handler .text.UsageFault_Handler - 0x0000000008000e94 0x6 Core/Src/stm32f4xx_it.o - 0x0000000008000e94 UsageFault_Handler + 0x0000000008000e88 0x6 Core/Src/stm32f4xx_it.o + 0x0000000008000e88 UsageFault_Handler .text.SVC_Handler - 0x0000000008000e9a 0xe Core/Src/stm32f4xx_it.o - 0x0000000008000e9a SVC_Handler + 0x0000000008000e8e 0xe Core/Src/stm32f4xx_it.o + 0x0000000008000e8e SVC_Handler .text.DebugMon_Handler - 0x0000000008000ea8 0xe Core/Src/stm32f4xx_it.o - 0x0000000008000ea8 DebugMon_Handler + 0x0000000008000e9c 0xe Core/Src/stm32f4xx_it.o + 0x0000000008000e9c DebugMon_Handler .text.PendSV_Handler - 0x0000000008000eb6 0xe Core/Src/stm32f4xx_it.o - 0x0000000008000eb6 PendSV_Handler + 0x0000000008000eaa 0xe Core/Src/stm32f4xx_it.o + 0x0000000008000eaa PendSV_Handler .text.SysTick_Handler - 0x0000000008000ec4 0xc Core/Src/stm32f4xx_it.o - 0x0000000008000ec4 SysTick_Handler + 0x0000000008000eb8 0xc Core/Src/stm32f4xx_it.o + 0x0000000008000eb8 SysTick_Handler .text.SystemInit - 0x0000000008000ed0 0x24 Core/Src/system_stm32f4xx.o - 0x0000000008000ed0 SystemInit + 0x0000000008000ec4 0x24 Core/Src/system_stm32f4xx.o + 0x0000000008000ec4 SystemInit .text.Reset_Handler - 0x0000000008000ef4 0x50 Core/Startup/startup_stm32f411ceux.o - 0x0000000008000ef4 Reset_Handler + 0x0000000008000ee8 0x50 Core/Startup/startup_stm32f411ceux.o + 0x0000000008000ee8 Reset_Handler .text.Default_Handler - 0x0000000008000f44 0x2 Core/Startup/startup_stm32f411ceux.o - 0x0000000008000f44 RTC_Alarm_IRQHandler - 0x0000000008000f44 EXTI2_IRQHandler - 0x0000000008000f44 SPI4_IRQHandler - 0x0000000008000f44 TIM1_CC_IRQHandler - 0x0000000008000f44 DMA2_Stream5_IRQHandler - 0x0000000008000f44 DMA1_Stream5_IRQHandler - 0x0000000008000f44 PVD_IRQHandler - 0x0000000008000f44 SDIO_IRQHandler - 0x0000000008000f44 TAMP_STAMP_IRQHandler - 0x0000000008000f44 EXTI3_IRQHandler - 0x0000000008000f44 TIM1_UP_TIM10_IRQHandler - 0x0000000008000f44 I2C3_ER_IRQHandler - 0x0000000008000f44 EXTI0_IRQHandler - 0x0000000008000f44 I2C2_EV_IRQHandler - 0x0000000008000f44 DMA1_Stream2_IRQHandler - 0x0000000008000f44 FPU_IRQHandler - 0x0000000008000f44 DMA2_Stream2_IRQHandler - 0x0000000008000f44 SPI1_IRQHandler - 0x0000000008000f44 TIM1_BRK_TIM9_IRQHandler - 0x0000000008000f44 DMA2_Stream3_IRQHandler - 0x0000000008000f44 USART6_IRQHandler - 0x0000000008000f44 DMA2_Stream0_IRQHandler - 0x0000000008000f44 TIM4_IRQHandler - 0x0000000008000f44 I2C1_EV_IRQHandler - 0x0000000008000f44 DMA1_Stream6_IRQHandler - 0x0000000008000f44 DMA1_Stream1_IRQHandler - 0x0000000008000f44 TIM3_IRQHandler - 0x0000000008000f44 RCC_IRQHandler - 0x0000000008000f44 Default_Handler - 0x0000000008000f44 EXTI15_10_IRQHandler - 0x0000000008000f44 ADC_IRQHandler - 0x0000000008000f44 DMA1_Stream7_IRQHandler - 0x0000000008000f44 SPI5_IRQHandler - 0x0000000008000f44 TIM5_IRQHandler - 0x0000000008000f44 DMA2_Stream7_IRQHandler - 0x0000000008000f44 I2C3_EV_IRQHandler - 0x0000000008000f44 EXTI9_5_IRQHandler - 0x0000000008000f44 RTC_WKUP_IRQHandler - 0x0000000008000f44 SPI2_IRQHandler - 0x0000000008000f44 DMA1_Stream0_IRQHandler - 0x0000000008000f44 EXTI4_IRQHandler - 0x0000000008000f44 WWDG_IRQHandler - 0x0000000008000f44 TIM2_IRQHandler - 0x0000000008000f44 OTG_FS_WKUP_IRQHandler - 0x0000000008000f44 TIM1_TRG_COM_TIM11_IRQHandler - 0x0000000008000f44 EXTI1_IRQHandler - 0x0000000008000f44 USART2_IRQHandler - 0x0000000008000f44 I2C2_ER_IRQHandler - 0x0000000008000f44 DMA2_Stream1_IRQHandler - 0x0000000008000f44 FLASH_IRQHandler - 0x0000000008000f44 DMA2_Stream4_IRQHandler - 0x0000000008000f44 USART1_IRQHandler - 0x0000000008000f44 OTG_FS_IRQHandler - 0x0000000008000f44 SPI3_IRQHandler - 0x0000000008000f44 DMA1_Stream4_IRQHandler - 0x0000000008000f44 I2C1_ER_IRQHandler - 0x0000000008000f44 DMA2_Stream6_IRQHandler - 0x0000000008000f44 DMA1_Stream3_IRQHandler - *fill* 0x0000000008000f46 0x2 + 0x0000000008000f38 0x2 Core/Startup/startup_stm32f411ceux.o + 0x0000000008000f38 RTC_Alarm_IRQHandler + 0x0000000008000f38 EXTI2_IRQHandler + 0x0000000008000f38 SPI4_IRQHandler + 0x0000000008000f38 TIM1_CC_IRQHandler + 0x0000000008000f38 DMA2_Stream5_IRQHandler + 0x0000000008000f38 DMA1_Stream5_IRQHandler + 0x0000000008000f38 PVD_IRQHandler + 0x0000000008000f38 SDIO_IRQHandler + 0x0000000008000f38 TAMP_STAMP_IRQHandler + 0x0000000008000f38 EXTI3_IRQHandler + 0x0000000008000f38 TIM1_UP_TIM10_IRQHandler + 0x0000000008000f38 I2C3_ER_IRQHandler + 0x0000000008000f38 EXTI0_IRQHandler + 0x0000000008000f38 I2C2_EV_IRQHandler + 0x0000000008000f38 DMA1_Stream2_IRQHandler + 0x0000000008000f38 FPU_IRQHandler + 0x0000000008000f38 DMA2_Stream2_IRQHandler + 0x0000000008000f38 SPI1_IRQHandler + 0x0000000008000f38 TIM1_BRK_TIM9_IRQHandler + 0x0000000008000f38 DMA2_Stream3_IRQHandler + 0x0000000008000f38 USART6_IRQHandler + 0x0000000008000f38 DMA2_Stream0_IRQHandler + 0x0000000008000f38 TIM4_IRQHandler + 0x0000000008000f38 I2C1_EV_IRQHandler + 0x0000000008000f38 DMA1_Stream6_IRQHandler + 0x0000000008000f38 DMA1_Stream1_IRQHandler + 0x0000000008000f38 TIM3_IRQHandler + 0x0000000008000f38 RCC_IRQHandler + 0x0000000008000f38 Default_Handler + 0x0000000008000f38 EXTI15_10_IRQHandler + 0x0000000008000f38 ADC_IRQHandler + 0x0000000008000f38 DMA1_Stream7_IRQHandler + 0x0000000008000f38 SPI5_IRQHandler + 0x0000000008000f38 TIM5_IRQHandler + 0x0000000008000f38 DMA2_Stream7_IRQHandler + 0x0000000008000f38 I2C3_EV_IRQHandler + 0x0000000008000f38 EXTI9_5_IRQHandler + 0x0000000008000f38 RTC_WKUP_IRQHandler + 0x0000000008000f38 SPI2_IRQHandler + 0x0000000008000f38 DMA1_Stream0_IRQHandler + 0x0000000008000f38 EXTI4_IRQHandler + 0x0000000008000f38 WWDG_IRQHandler + 0x0000000008000f38 TIM2_IRQHandler + 0x0000000008000f38 OTG_FS_WKUP_IRQHandler + 0x0000000008000f38 TIM1_TRG_COM_TIM11_IRQHandler + 0x0000000008000f38 EXTI1_IRQHandler + 0x0000000008000f38 USART2_IRQHandler + 0x0000000008000f38 I2C2_ER_IRQHandler + 0x0000000008000f38 DMA2_Stream1_IRQHandler + 0x0000000008000f38 FLASH_IRQHandler + 0x0000000008000f38 DMA2_Stream4_IRQHandler + 0x0000000008000f38 USART1_IRQHandler + 0x0000000008000f38 OTG_FS_IRQHandler + 0x0000000008000f38 SPI3_IRQHandler + 0x0000000008000f38 DMA1_Stream4_IRQHandler + 0x0000000008000f38 I2C1_ER_IRQHandler + 0x0000000008000f38 DMA2_Stream6_IRQHandler + 0x0000000008000f38 DMA1_Stream3_IRQHandler + *fill* 0x0000000008000f3a 0x2 .text.HAL_Init - 0x0000000008000f48 0x44 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008000f48 HAL_Init + 0x0000000008000f3c 0x44 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008000f3c HAL_Init .text.HAL_InitTick - 0x0000000008000f8c 0x60 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008000f8c HAL_InitTick + 0x0000000008000f80 0x60 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008000f80 HAL_InitTick .text.HAL_IncTick - 0x0000000008000fec 0x28 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008000fec HAL_IncTick + 0x0000000008000fe0 0x28 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008000fe0 HAL_IncTick .text.HAL_GetTick - 0x0000000008001014 0x18 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x0000000008001014 HAL_GetTick + 0x0000000008001008 0x18 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008001008 HAL_GetTick .text.HAL_Delay - 0x000000000800102c 0x48 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x000000000800102c HAL_Delay + 0x0000000008001020 0x48 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x0000000008001020 HAL_Delay .text.__NVIC_SetPriorityGrouping - 0x0000000008001074 0x48 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001068 0x48 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x00000000080010bc 0x1c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x00000000080010b0 0x1c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.__NVIC_SetPriority - 0x00000000080010d8 0x54 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x00000000080010cc 0x54 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.NVIC_EncodePriority - 0x000000000800112c 0x66 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - *fill* 0x0000000008001192 0x2 + 0x0000000008001120 0x66 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + *fill* 0x0000000008001186 0x2 .text.SysTick_Config - 0x0000000008001194 0x44 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x0000000008001188 0x44 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x00000000080011d8 0x16 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x00000000080011d8 HAL_NVIC_SetPriorityGrouping + 0x00000000080011cc 0x16 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x00000000080011cc HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x00000000080011ee 0x38 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x00000000080011ee HAL_NVIC_SetPriority + 0x00000000080011e2 0x38 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x00000000080011e2 HAL_NVIC_SetPriority .text.HAL_SYSTICK_Config - 0x0000000008001226 0x18 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - 0x0000000008001226 HAL_SYSTICK_Config - *fill* 0x000000000800123e 0x2 + 0x000000000800121a 0x18 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x000000000800121a HAL_SYSTICK_Config + *fill* 0x0000000008001232 0x2 .text.HAL_GPIO_Init - 0x0000000008001240 0x308 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x0000000008001240 HAL_GPIO_Init + 0x0000000008001234 0x308 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x0000000008001234 HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x0000000008001548 0x32 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - 0x0000000008001548 HAL_GPIO_WritePin - *fill* 0x000000000800157a 0x2 + 0x000000000800153c 0x32 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x000000000800153c HAL_GPIO_WritePin + *fill* 0x000000000800156e 0x2 .text.HAL_RCC_OscConfig - 0x000000000800157c 0x4f0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x000000000800157c HAL_RCC_OscConfig + 0x0000000008001570 0x4f0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008001570 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x0000000008001a6c 0x1cc Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008001a6c HAL_RCC_ClockConfig + 0x0000000008001a60 0x1cc Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008001a60 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x0000000008001c38 0x16c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - 0x0000000008001c38 HAL_RCC_GetSysClockFreq + 0x0000000008001c2c 0x16c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x0000000008001c2c HAL_RCC_GetSysClockFreq .text.HAL_SPI_Init - 0x0000000008001da4 0x112 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - 0x0000000008001da4 HAL_SPI_Init + 0x0000000008001d98 0x112 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + 0x0000000008001d98 HAL_SPI_Init .text.HAL_SPI_Transmit - 0x0000000008001eb6 0x278 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - 0x0000000008001eb6 HAL_SPI_Transmit + 0x0000000008001eaa 0x278 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + 0x0000000008001eaa HAL_SPI_Transmit .text.HAL_SPI_Receive - 0x000000000800212e 0x222 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - 0x000000000800212e HAL_SPI_Receive + 0x0000000008002122 0x222 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + 0x0000000008002122 HAL_SPI_Receive .text.HAL_SPI_TransmitReceive - 0x0000000008002350 0x344 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - 0x0000000008002350 HAL_SPI_TransmitReceive + 0x0000000008002344 0x344 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + 0x0000000008002344 HAL_SPI_TransmitReceive .text.SPI_WaitFlagStateUntilTimeout - 0x0000000008002694 0x110 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + 0x0000000008002688 0x110 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o .text.SPI_EndRxTransaction - 0x00000000080027a4 0xca Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - *fill* 0x000000000800286e 0x2 + 0x0000000008002798 0xca Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + *fill* 0x0000000008002862 0x2 .text.SPI_EndRxTxTransaction - 0x0000000008002870 0x84 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - .text.cs_high 0x00000000080028f4 0x18 ICM20948/icm20948.o - .text.cs_low 0x000000000800290c 0x18 ICM20948/icm20948.o - .text.select_user_bank - 0x0000000008002924 0x34 ICM20948/icm20948.o - .text.read_single_icm20948_reg - 0x0000000008002958 0x58 ICM20948/icm20948.o - .text.read_multiple_icm20948_reg - 0x00000000080029b0 0x60 ICM20948/icm20948.o - .text.write_single_icm20948_reg - 0x0000000008002a10 0x48 ICM20948/icm20948.o - .text.write_multiple_icm20948_reg - 0x0000000008002a58 0x58 ICM20948/icm20948.o - .text.read_single_ak09916_reg - 0x0000000008002ab0 0x42 ICM20948/icm20948.o - .text.read_multiple_ak09916_reg - 0x0000000008002af2 0x54 ICM20948/icm20948.o - .text.write_single_ak09916_reg - 0x0000000008002b46 0x44 ICM20948/icm20948.o + 0x0000000008002864 0x84 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o .text.icm20948_init - 0x0000000008002b8a 0x4a ICM20948/icm20948.o - 0x0000000008002b8a icm20948_init + 0x00000000080028e8 0x5c ICM20948/icm20948.o + 0x00000000080028e8 icm20948_init + .text.ak09916_init + 0x0000000008002944 0x32 ICM20948/icm20948.o + 0x0000000008002944 ak09916_init .text.icm20948_gyro_read - 0x0000000008002bd4 0x86 ICM20948/icm20948.o - 0x0000000008002bd4 icm20948_gyro_read + 0x0000000008002976 0x86 ICM20948/icm20948.o + 0x0000000008002976 icm20948_gyro_read .text.icm20948_accel_read - 0x0000000008002c5a 0x86 ICM20948/icm20948.o - 0x0000000008002c5a icm20948_accel_read + 0x00000000080029fc 0x94 ICM20948/icm20948.o + 0x00000000080029fc icm20948_accel_read + .text.ak09916_mag_read + 0x0000000008002a90 0xb6 ICM20948/icm20948.o + 0x0000000008002a90 ak09916_mag_read + *fill* 0x0000000008002b46 0x2 + .text.icm20948_gyro_read_dps + 0x0000000008002b48 0x5c ICM20948/icm20948.o + 0x0000000008002b48 icm20948_gyro_read_dps + .text.icm20948_accel_read_g + 0x0000000008002ba4 0x5c ICM20948/icm20948.o + 0x0000000008002ba4 icm20948_accel_read_g + .text.ak09916_mag_read_uT + 0x0000000008002c00 0xa8 ICM20948/icm20948.o + 0x0000000008002c00 ak09916_mag_read_uT + .text.icm20948_who_am_i + 0x0000000008002ca8 0x26 ICM20948/icm20948.o + 0x0000000008002ca8 icm20948_who_am_i + .text.ak09916_who_am_i + 0x0000000008002cce 0x24 ICM20948/icm20948.o + 0x0000000008002cce ak09916_who_am_i .text.icm20948_device_reset - 0x0000000008002ce0 0x18 ICM20948/icm20948.o - 0x0000000008002ce0 icm20948_device_reset + 0x0000000008002cf2 0x18 ICM20948/icm20948.o + 0x0000000008002cf2 icm20948_device_reset + .text.ak09916_soft_reset + 0x0000000008002d0a 0x16 ICM20948/icm20948.o + 0x0000000008002d0a ak09916_soft_reset .text.icm20948_wakeup - 0x0000000008002cf8 0x34 ICM20948/icm20948.o - 0x0000000008002cf8 icm20948_wakeup + 0x0000000008002d20 0x34 ICM20948/icm20948.o + 0x0000000008002d20 icm20948_wakeup .text.icm20948_spi_slave_enable - 0x0000000008002d2c 0x2e ICM20948/icm20948.o - 0x0000000008002d2c icm20948_spi_slave_enable + 0x0000000008002d54 0x2e ICM20948/icm20948.o + 0x0000000008002d54 icm20948_spi_slave_enable .text.icm20948_i2c_master_reset - 0x0000000008002d5a 0x2e ICM20948/icm20948.o - 0x0000000008002d5a icm20948_i2c_master_reset + 0x0000000008002d82 0x2e ICM20948/icm20948.o + 0x0000000008002d82 icm20948_i2c_master_reset .text.icm20948_i2c_master_enable - 0x0000000008002d88 0x34 ICM20948/icm20948.o - 0x0000000008002d88 icm20948_i2c_master_enable + 0x0000000008002db0 0x34 ICM20948/icm20948.o + 0x0000000008002db0 icm20948_i2c_master_enable .text.icm20948_i2c_master_clk_frq - 0x0000000008002dbc 0x32 ICM20948/icm20948.o - 0x0000000008002dbc icm20948_i2c_master_clk_frq + 0x0000000008002de4 0x32 ICM20948/icm20948.o + 0x0000000008002de4 icm20948_i2c_master_clk_frq .text.icm20948_clock_source - 0x0000000008002dee 0x32 ICM20948/icm20948.o - 0x0000000008002dee icm20948_clock_source + 0x0000000008002e16 0x32 ICM20948/icm20948.o + 0x0000000008002e16 icm20948_clock_source .text.icm20948_odr_align_enable - 0x0000000008002e20 0x12 ICM20948/icm20948.o - 0x0000000008002e20 icm20948_odr_align_enable + 0x0000000008002e48 0x12 ICM20948/icm20948.o + 0x0000000008002e48 icm20948_odr_align_enable .text.icm20948_gyro_low_pass_filter - 0x0000000008002e32 0x3a ICM20948/icm20948.o - 0x0000000008002e32 icm20948_gyro_low_pass_filter + 0x0000000008002e5a 0x3a ICM20948/icm20948.o + 0x0000000008002e5a icm20948_gyro_low_pass_filter .text.icm20948_accel_low_pass_filter - 0x0000000008002e6c 0x3a ICM20948/icm20948.o - 0x0000000008002e6c icm20948_accel_low_pass_filter + 0x0000000008002e94 0x3a ICM20948/icm20948.o + 0x0000000008002e94 icm20948_accel_low_pass_filter .text.icm20948_gyro_sample_rate_divider - 0x0000000008002ea6 0x1e ICM20948/icm20948.o - 0x0000000008002ea6 icm20948_gyro_sample_rate_divider + 0x0000000008002ece 0x1e ICM20948/icm20948.o + 0x0000000008002ece icm20948_gyro_sample_rate_divider .text.icm20948_accel_sample_rate_divider - 0x0000000008002ec4 0x3c ICM20948/icm20948.o - 0x0000000008002ec4 icm20948_accel_sample_rate_divider + 0x0000000008002eec 0x3c ICM20948/icm20948.o + 0x0000000008002eec icm20948_accel_sample_rate_divider + .text.ak09916_operation_mode_setting + 0x0000000008002f28 0x22 ICM20948/icm20948.o + 0x0000000008002f28 ak09916_operation_mode_setting + *fill* 0x0000000008002f4a 0x2 .text.icm20948_gyro_calibration - 0x0000000008002f00 0x138 ICM20948/icm20948.o - 0x0000000008002f00 icm20948_gyro_calibration + 0x0000000008002f4c 0x138 ICM20948/icm20948.o + 0x0000000008002f4c icm20948_gyro_calibration .text.icm20948_accel_calibration - 0x0000000008003038 0x21c ICM20948/icm20948.o - 0x0000000008003038 icm20948_accel_calibration + 0x0000000008003084 0x21c ICM20948/icm20948.o + 0x0000000008003084 icm20948_accel_calibration .text.icm20948_gyro_full_scale_select - 0x0000000008003254 0x94 ICM20948/icm20948.o - 0x0000000008003254 icm20948_gyro_full_scale_select + 0x00000000080032a0 0x94 ICM20948/icm20948.o + 0x00000000080032a0 icm20948_gyro_full_scale_select .text.icm20948_accel_full_scale_select - 0x00000000080032e8 0x8c ICM20948/icm20948.o - 0x00000000080032e8 icm20948_accel_full_scale_select - .text.ak009916_init - 0x0000000008003374 0x20 ICM20948/icm20948.o - 0x0000000008003374 ak009916_init - .text.ak09916_mag_read - 0x0000000008003394 0xb6 ICM20948/icm20948.o - 0x0000000008003394 ak09916_mag_read - *fill* 0x000000000800344a 0x6 - .text.ak09916_mag_read_uT - 0x0000000008003450 0xa8 ICM20948/icm20948.o - 0x0000000008003450 ak09916_mag_read_uT - .text.ak09916_soft_reset - 0x00000000080034f8 0x16 ICM20948/icm20948.o - 0x00000000080034f8 ak09916_soft_reset - .text.ak09916_operation_mode_setting - 0x000000000800350e 0x22 ICM20948/icm20948.o - 0x000000000800350e ak09916_operation_mode_setting + 0x0000000008003334 0x8c ICM20948/icm20948.o + 0x0000000008003334 icm20948_accel_full_scale_select + .text.cs_high 0x00000000080033c0 0x18 ICM20948/icm20948.o + .text.cs_low 0x00000000080033d8 0x18 ICM20948/icm20948.o + .text.select_user_bank + 0x00000000080033f0 0x34 ICM20948/icm20948.o + .text.read_single_icm20948_reg + 0x0000000008003424 0x58 ICM20948/icm20948.o + .text.write_single_icm20948_reg + 0x000000000800347c 0x48 ICM20948/icm20948.o + .text.read_multiple_icm20948_reg + 0x00000000080034c4 0x60 ICM20948/icm20948.o + .text.write_multiple_icm20948_reg + 0x0000000008003524 0x58 ICM20948/icm20948.o + .text.read_single_ak09916_reg + 0x000000000800357c 0x42 ICM20948/icm20948.o + .text.write_single_ak09916_reg + 0x00000000080035be 0x44 ICM20948/icm20948.o + .text.read_multiple_ak09916_reg + 0x0000000008003602 0x54 ICM20948/icm20948.o + *fill* 0x0000000008003656 0x2 .text.__libc_init_array - 0x0000000008003530 0x48 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-init.o) - 0x0000000008003530 __libc_init_array - .text.memset 0x0000000008003578 0x10 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-memset.o) - 0x0000000008003578 memset + 0x0000000008003658 0x48 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-init.o) + 0x0000000008003658 __libc_init_array + .text.memset 0x00000000080036a0 0x10 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(lib_a-memset.o) + 0x00000000080036a0 memset *(.glue_7) - .glue_7 0x0000000008003588 0x0 linker stubs + .glue_7 0x00000000080036b0 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0000000008003588 0x0 linker stubs + .glue_7t 0x00000000080036b0 0x0 linker stubs *(.eh_frame) - .eh_frame 0x0000000008003588 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .eh_frame 0x00000000080036b0 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x0000000008003588 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crti.o - 0x0000000008003588 _init - .init 0x000000000800358c 0x8 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x00000000080036b0 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crti.o + 0x00000000080036b0 _init + .init 0x00000000080036b4 0x8 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x0000000008003594 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crti.o - 0x0000000008003594 _fini - .fini 0x0000000008003598 0x8 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtn.o - 0x00000000080035a0 . = ALIGN (0x4) - 0x00000000080035a0 _etext = . + .fini 0x00000000080036bc 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crti.o + 0x00000000080036bc _fini + .fini 0x00000000080036c0 0x8 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x00000000080036c8 . = ALIGN (0x4) + 0x00000000080036c8 _etext = . -.vfp11_veneer 0x00000000080035a0 0x0 - .vfp11_veneer 0x00000000080035a0 0x0 linker stubs +.vfp11_veneer 0x00000000080036c8 0x0 + .vfp11_veneer 0x00000000080036c8 0x0 linker stubs -.v4_bx 0x00000000080035a0 0x0 - .v4_bx 0x00000000080035a0 0x0 linker stubs +.v4_bx 0x00000000080036c8 0x0 + .v4_bx 0x00000000080036c8 0x0 linker stubs -.iplt 0x00000000080035a0 0x0 - .iplt 0x00000000080035a0 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x00000000080036c8 0x0 + .iplt 0x00000000080036c8 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x00000000080035a0 0x14 - 0x00000000080035a0 . = ALIGN (0x4) +.rodata 0x00000000080036c8 0x14 + 0x00000000080036c8 . = ALIGN (0x4) *(.rodata) - .rodata 0x00000000080035a0 0x3 ICM20948/icm20948.o + .rodata 0x00000000080036c8 0x3 ICM20948/icm20948.o *(.rodata*) - *fill* 0x00000000080035a3 0x1 + *fill* 0x00000000080036cb 0x1 .rodata.AHBPrescTable - 0x00000000080035a4 0x10 Core/Src/system_stm32f4xx.o - 0x00000000080035a4 AHBPrescTable - 0x00000000080035b4 . = ALIGN (0x4) + 0x00000000080036cc 0x10 Core/Src/system_stm32f4xx.o + 0x00000000080036cc AHBPrescTable + 0x00000000080036dc . = ALIGN (0x4) -.ARM.extab 0x00000000080035b4 0x0 - 0x00000000080035b4 . = ALIGN (0x4) +.ARM.extab 0x00000000080036dc 0x0 + 0x00000000080036dc . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x00000000080035b4 . = ALIGN (0x4) + 0x00000000080036dc . = ALIGN (0x4) -.ARM 0x00000000080035b4 0x8 - 0x00000000080035b4 . = ALIGN (0x4) - 0x00000000080035b4 __exidx_start = . +.ARM 0x00000000080036dc 0x8 + 0x00000000080036dc . = ALIGN (0x4) + 0x00000000080036dc __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x00000000080035b4 0x8 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard\libgcc.a(_udivmoddi4.o) - 0x00000000080035bc __exidx_end = . - 0x00000000080035bc . = ALIGN (0x4) + .ARM.exidx 0x00000000080036dc 0x8 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard\libgcc.a(_udivmoddi4.o) + 0x00000000080036e4 __exidx_end = . + 0x00000000080036e4 . = ALIGN (0x4) -.rel.dyn 0x00000000080035bc 0x0 - .rel.iplt 0x00000000080035bc 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x00000000080036e4 0x0 + .rel.iplt 0x00000000080036e4 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.preinit_array 0x00000000080035bc 0x0 - 0x00000000080035bc . = ALIGN (0x4) - 0x00000000080035bc PROVIDE (__preinit_array_start = .) +.preinit_array 0x00000000080036e4 0x0 + 0x00000000080036e4 . = ALIGN (0x4) + 0x00000000080036e4 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x00000000080035bc PROVIDE (__preinit_array_end = .) - 0x00000000080035bc . = ALIGN (0x4) + 0x00000000080036e4 PROVIDE (__preinit_array_end = .) + 0x00000000080036e4 . = ALIGN (0x4) -.init_array 0x00000000080035bc 0x4 - 0x00000000080035bc . = ALIGN (0x4) - 0x00000000080035bc PROVIDE (__init_array_start = .) +.init_array 0x00000000080036e4 0x4 + 0x00000000080036e4 . = ALIGN (0x4) + 0x00000000080036e4 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x00000000080035bc 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x00000000080035c0 PROVIDE (__init_array_end = .) - 0x00000000080035c0 . = ALIGN (0x4) + .init_array 0x00000000080036e4 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x00000000080036e8 PROVIDE (__init_array_end = .) + 0x00000000080036e8 . = ALIGN (0x4) -.fini_array 0x00000000080035c0 0x4 - 0x00000000080035c0 . = ALIGN (0x4) +.fini_array 0x00000000080036e8 0x4 + 0x00000000080036e8 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x00000000080035c0 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .fini_array 0x00000000080036e8 0x4 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x00000000080035c4 . = ALIGN (0x4) - 0x00000000080035c4 _sidata = LOADADDR (.data) + 0x00000000080036ec . = ALIGN (0x4) + 0x00000000080036ec _sidata = LOADADDR (.data) -.data 0x0000000020000000 0xc load address 0x00000000080035c4 +.data 0x0000000020000000 0xc load address 0x00000000080036ec 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -3106,11 +3108,11 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte *fill* 0x0000000020000009 0x3 0x000000002000000c _edata = . -.igot.plt 0x000000002000000c 0x0 load address 0x00000000080035d0 +.igot.plt 0x000000002000000c 0x0 load address 0x00000000080036f8 .igot.plt 0x000000002000000c 0x0 c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard/crtbegin.o 0x000000002000000c . = ALIGN (0x4) -.bss 0x000000002000000c 0xc8 load address 0x00000000080035d0 +.bss 0x000000002000000c 0xac load address 0x00000000080036f8 0x000000002000000c _sbss = . 0x000000002000000c __bss_start__ = _sbss *(.bss) @@ -3120,38 +3122,32 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte 0x0000000020000028 0x4 ICM20948/icm20948.o .bss.accel_scale_factor 0x000000002000002c 0x4 ICM20948/icm20948.o - .bss.reg_val.7574 + .bss.reg_val.7738 0x0000000020000030 0x6 ICM20948/icm20948.o *(COMMON) *fill* 0x0000000020000036 0x2 - COMMON 0x0000000020000038 0x3d Core/Src/main.o - 0x0000000020000038 temp2 - 0x000000002000003c my_accel - 0x0000000020000048 my_mag2 - 0x0000000020000054 my_mag - 0x0000000020000060 mag_data - 0x0000000020000068 my_gyro - 0x0000000020000074 status - *fill* 0x0000000020000075 0x3 - COMMON 0x0000000020000078 0x58 Core/Src/spi.o - 0x0000000020000078 hspi1 - COMMON 0x00000000200000d0 0x4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - 0x00000000200000d0 uwTick - 0x00000000200000d4 . = ALIGN (0x4) - 0x00000000200000d4 _ebss = . - 0x00000000200000d4 __bss_end__ = _ebss + COMMON 0x0000000020000038 0x24 Core/Src/main.o + 0x0000000020000038 my_accel + 0x0000000020000044 my_mag + 0x0000000020000050 my_gyro + COMMON 0x000000002000005c 0x58 Core/Src/spi.o + 0x000000002000005c hspi1 + COMMON 0x00000000200000b4 0x4 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x00000000200000b4 uwTick + 0x00000000200000b8 . = ALIGN (0x4) + 0x00000000200000b8 _ebss = . + 0x00000000200000b8 __bss_end__ = _ebss ._user_heap_stack - 0x00000000200000d4 0x604 load address 0x00000000080035d0 - 0x00000000200000d8 . = ALIGN (0x8) - *fill* 0x00000000200000d4 0x4 + 0x00000000200000b8 0x600 load address 0x00000000080036f8 + 0x00000000200000b8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x00000000200000d8 PROVIDE (_end = .) - 0x00000000200002d8 . = (. + _Min_Heap_Size) - *fill* 0x00000000200000d8 0x200 - 0x00000000200006d8 . = (. + _Min_Stack_Size) - *fill* 0x00000000200002d8 0x400 - 0x00000000200006d8 . = ALIGN (0x8) + 0x00000000200000b8 PROVIDE (_end = .) + 0x00000000200002b8 . = (. + _Min_Heap_Size) + *fill* 0x00000000200000b8 0x200 + 0x00000000200006b8 . = (. + _Min_Stack_Size) + *fill* 0x00000000200002b8 0x400 + 0x00000000200006b8 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -3215,22 +3211,22 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libm.a LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7e-m+fp/hard\libgcc.a -.debug_info 0x0000000000000000 0x79b0 +.debug_info 0x0000000000000000 0x795f .debug_info 0x0000000000000000 0x521 Core/Src/gpio.o - .debug_info 0x0000000000000521 0xba4 Core/Src/main.o - .debug_info 0x00000000000010c5 0xa7e Core/Src/spi.o - .debug_info 0x0000000000001b43 0x3c0 Core/Src/stm32f4xx_hal_msp.o - .debug_info 0x0000000000001f03 0x222 Core/Src/stm32f4xx_it.o - .debug_info 0x0000000000002125 0x5d0 Core/Src/system_stm32f4xx.o - .debug_info 0x00000000000026f5 0x22 Core/Startup/startup_stm32f411ceux.o - .debug_info 0x0000000000002717 0x944 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_info 0x000000000000305b 0xe47 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_info 0x0000000000003ea2 0x862 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_info 0x0000000000004704 0x9be Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_info 0x00000000000050c2 0x17b8 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - .debug_info 0x000000000000687a 0x1136 ICM20948/icm20948.o + .debug_info 0x0000000000000521 0xb4c Core/Src/main.o + .debug_info 0x000000000000106d 0xa7e Core/Src/spi.o + .debug_info 0x0000000000001aeb 0x3c0 Core/Src/stm32f4xx_hal_msp.o + .debug_info 0x0000000000001eab 0x222 Core/Src/stm32f4xx_it.o + .debug_info 0x00000000000020cd 0x5d0 Core/Src/system_stm32f4xx.o + .debug_info 0x000000000000269d 0x22 Core/Startup/startup_stm32f411ceux.o + .debug_info 0x00000000000026bf 0x944 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_info 0x0000000000003003 0xe47 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_info 0x0000000000003e4a 0x862 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_info 0x00000000000046ac 0x9be Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_info 0x000000000000506a 0x17b8 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + .debug_info 0x0000000000006822 0x113d ICM20948/icm20948.o -.debug_abbrev 0x0000000000000000 0x1761 +.debug_abbrev 0x0000000000000000 0x172d .debug_abbrev 0x0000000000000000 0x14e Core/Src/gpio.o .debug_abbrev 0x000000000000014e 0x1ee Core/Src/main.o .debug_abbrev 0x000000000000033c 0x1bb Core/Src/spi.o @@ -3243,7 +3239,7 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte .debug_abbrev 0x0000000000000d97 0x1f1 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o .debug_abbrev 0x0000000000000f88 0x275 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o .debug_abbrev 0x00000000000011fd 0x26e Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - .debug_abbrev 0x000000000000146b 0x2f6 ICM20948/icm20948.o + .debug_abbrev 0x000000000000146b 0x2c2 ICM20948/icm20948.o .debug_aranges 0x0000000000000000 0x758 .debug_aranges @@ -3288,7 +3284,7 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte .debug_ranges 0x0000000000000390 0x1c0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o .debug_ranges 0x0000000000000550 0x140 ICM20948/icm20948.o -.debug_macro 0x0000000000000000 0x150d1 +.debug_macro 0x0000000000000000 0x150cf .debug_macro 0x0000000000000000 0x1d3 Core/Src/gpio.o .debug_macro 0x00000000000001d3 0xaa8 Core/Src/gpio.o .debug_macro 0x0000000000000c7b 0x295 Core/Src/gpio.o @@ -3330,60 +3326,60 @@ LOAD c:/st/stm32cubeide_1.6.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte .debug_macro 0x000000000001386a 0x1c Core/Src/gpio.o .debug_macro 0x0000000000013886 0x1f9 Core/Src/main.o .debug_macro 0x0000000000013a7f 0x22 Core/Src/main.o - .debug_macro 0x0000000000013aa1 0x3e1 Core/Src/main.o - .debug_macro 0x0000000000013e82 0x1d3 Core/Src/spi.o - .debug_macro 0x0000000000014055 0x1c9 Core/Src/stm32f4xx_hal_msp.o - .debug_macro 0x000000000001421e 0x1d3 Core/Src/stm32f4xx_it.o - .debug_macro 0x00000000000143f1 0x1ba Core/Src/system_stm32f4xx.o - .debug_macro 0x00000000000145ab 0x21a Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_macro 0x00000000000147c5 0x1ba Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_macro 0x000000000001497f 0x1c0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_macro 0x0000000000014b3f 0x1de Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_macro 0x0000000000014d1d 0x1c9 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - .debug_macro 0x0000000000014ee6 0x1eb ICM20948/icm20948.o + .debug_macro 0x0000000000013aa1 0x3df Core/Src/main.o + .debug_macro 0x0000000000013e80 0x1d3 Core/Src/spi.o + .debug_macro 0x0000000000014053 0x1c9 Core/Src/stm32f4xx_hal_msp.o + .debug_macro 0x000000000001421c 0x1d3 Core/Src/stm32f4xx_it.o + .debug_macro 0x00000000000143ef 0x1ba Core/Src/system_stm32f4xx.o + .debug_macro 0x00000000000145a9 0x21a Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_macro 0x00000000000147c3 0x1ba Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_macro 0x000000000001497d 0x1c0 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_macro 0x0000000000014b3d 0x1de Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_macro 0x0000000000014d1b 0x1c9 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + .debug_macro 0x0000000000014ee4 0x1eb ICM20948/icm20948.o -.debug_line 0x0000000000000000 0x8232 +.debug_line 0x0000000000000000 0x8264 .debug_line 0x0000000000000000 0x6b1 Core/Src/gpio.o - .debug_line 0x00000000000006b1 0x799 Core/Src/main.o - .debug_line 0x0000000000000e4a 0x706 Core/Src/spi.o - .debug_line 0x0000000000001550 0x695 Core/Src/stm32f4xx_hal_msp.o - .debug_line 0x0000000000001be5 0x757 Core/Src/stm32f4xx_it.o - .debug_line 0x000000000000233c 0x716 Core/Src/system_stm32f4xx.o - .debug_line 0x0000000000002a52 0x88 Core/Startup/startup_stm32f411ceux.o - .debug_line 0x0000000000002ada 0x97c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o - .debug_line 0x0000000000003456 0xc2b Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o - .debug_line 0x0000000000004081 0xab8 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o - .debug_line 0x0000000000004b39 0xcf6 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o - .debug_line 0x000000000000582f 0x1c04 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o - .debug_line 0x0000000000007433 0xdff ICM20948/icm20948.o + .debug_line 0x00000000000006b1 0x794 Core/Src/main.o + .debug_line 0x0000000000000e45 0x706 Core/Src/spi.o + .debug_line 0x000000000000154b 0x695 Core/Src/stm32f4xx_hal_msp.o + .debug_line 0x0000000000001be0 0x757 Core/Src/stm32f4xx_it.o + .debug_line 0x0000000000002337 0x716 Core/Src/system_stm32f4xx.o + .debug_line 0x0000000000002a4d 0x88 Core/Startup/startup_stm32f411ceux.o + .debug_line 0x0000000000002ad5 0x97c Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_line 0x0000000000003451 0xc2b Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_line 0x000000000000407c 0xab8 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_line 0x0000000000004b34 0xcf6 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_line 0x000000000000582a 0x1c04 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + .debug_line 0x000000000000742e 0xe36 ICM20948/icm20948.o -.debug_str 0x0000000000000000 0x81a62 +.debug_str 0x0000000000000000 0x81a50 .debug_str 0x0000000000000000 0x7eada Core/Src/gpio.o 0x7ed5d (size before relaxing) - .debug_str 0x000000000007eada 0x11fe Core/Src/main.o - 0x7ff14 (size before relaxing) - .debug_str 0x000000000007fcd8 0x4b Core/Src/spi.o + .debug_str 0x000000000007eada 0x11e7 Core/Src/main.o + 0x7fef6 (size before relaxing) + .debug_str 0x000000000007fcc1 0x4b Core/Src/spi.o 0x7f1ba (size before relaxing) - .debug_str 0x000000000007fd23 0x2c Core/Src/stm32f4xx_hal_msp.o + .debug_str 0x000000000007fd0c 0x2c Core/Src/stm32f4xx_hal_msp.o 0x7ecc0 (size before relaxing) - .debug_str 0x000000000007fd4f 0xbd Core/Src/stm32f4xx_it.o + .debug_str 0x000000000007fd38 0xbd Core/Src/stm32f4xx_it.o 0x7ec3c (size before relaxing) - .debug_str 0x000000000007fe0c 0xaf Core/Src/system_stm32f4xx.o + .debug_str 0x000000000007fdf5 0xaf Core/Src/system_stm32f4xx.o 0x7ecdb (size before relaxing) - .debug_str 0x000000000007febb 0x36 Core/Startup/startup_stm32f411ceux.o + .debug_str 0x000000000007fea4 0x36 Core/Startup/startup_stm32f411ceux.o 0x83 (size before relaxing) - .debug_str 0x000000000007fef1 0x90f Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_str 0x000000000007feda 0x90f Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o 0x7f665 (size before relaxing) - .debug_str 0x0000000000080800 0x399 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_str 0x00000000000807e9 0x399 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o 0x7f442 (size before relaxing) - .debug_str 0x0000000000080b99 0x15f Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_str 0x0000000000080b82 0x15f Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o 0x7ee82 (size before relaxing) - .debug_str 0x0000000000080cf8 0x259 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_str 0x0000000000080ce1 0x259 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o 0x7f0dd (size before relaxing) - .debug_str 0x0000000000080f51 0x584 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o + .debug_str 0x0000000000080f3a 0x584 Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o 0x7f56d (size before relaxing) - .debug_str 0x00000000000814d5 0x58d ICM20948/icm20948.o - 0x8023f (size before relaxing) + .debug_str 0x00000000000814be 0x592 ICM20948/icm20948.o + 0x8023e (size before relaxing) .comment 0x0000000000000000 0x53 .comment 0x0000000000000000 0x53 Core/Src/gpio.o diff --git a/stm32f411_fw_icm20948/ICM20948/icm20948.c b/stm32f411_fw_icm20948/ICM20948/icm20948.c index a58d8cb..c3791d1 100644 --- a/stm32f411_fw_icm20948/ICM20948/icm20948.c +++ b/stm32f411_fw_icm20948/ICM20948/icm20948.c @@ -13,128 +13,27 @@ static float gyro_scale_factor; static float accel_scale_factor; -/* Static Functions List */ -/** @note cs_high() - * cs_low() - * - * select_user_bank(userbank ub) - * - * read_single_icm20948_reg(userbank ub, uint8_t reg) - * write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) - * - * read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) - * write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) - * - * read_single_ak09916_reg(uint8_t reg); - * write_single_ak09916_reg(uint8_t reg, uint8_t val) - * - * read_multiple_ak09916_reg(uint8_t reg, uint8_t len) -*/ -static void cs_high() -{ - HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, SET); -} - -static void cs_low() -{ - HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, RESET); -} - -static void select_user_bank(userbank ub) -{ - uint8_t write_reg[2]; - write_reg[0] = WRITE | REG_BANK_SEL; - write_reg[1] = ub; - - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 10); - cs_high(); -} - -static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg) -{ - uint8_t read_reg = READ | reg; - uint8_t reg_val; - select_user_bank(ub); - - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); - HAL_SPI_Receive(ICM20948_SPI, ®_val, 1, 1000); - cs_high(); - - return reg_val; -} +/* Static Functions */ +static void cs_high(); +static void cs_low(); -static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) -{ - uint8_t write_reg[2]; - write_reg[0] = WRITE | reg; - write_reg[1] = val; +static void select_user_bank(userbank ub); - select_user_bank(ub); +static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg); +static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val); +static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len); +static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len); - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 1000); - cs_high(); -} +static uint8_t read_single_ak09916_reg(uint8_t reg); +static void write_single_ak09916_reg(uint8_t reg, uint8_t val); +static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len); -static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) -{ - uint8_t read_reg = READ | reg; - static uint8_t reg_val[6]; - select_user_bank(ub); - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); - HAL_SPI_Receive(ICM20948_SPI, reg_val, len, 1000); - cs_high(); - - return reg_val; -} - -static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) -{ - uint8_t write_reg = WRITE | reg; - select_user_bank(ub); - - cs_low(); - HAL_SPI_Transmit(ICM20948_SPI, &write_reg, 1, 1000); - HAL_SPI_Transmit(ICM20948_SPI, val, len, 1000); - cs_high(); -} - -static uint8_t read_single_ak09916_reg(uint8_t reg) -{ - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); - - HAL_Delay(1); - return read_single_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00); -} - -static void write_single_ak09916_reg(uint8_t reg, uint8_t val) -{ - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, WRITE | MAG_SLAVE_ADDR); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_DO, val); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); -} - -static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len) -{ - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); - write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x80 | len); - - HAL_Delay(1); - return read_multiple_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00, len); -} - - -/* ICM-20948 Main Functions */ +/* Main Functions */ void icm20948_init() { + while(!icm20948_who_am_i()); + icm20948_device_reset(); icm20948_wakeup(); @@ -156,6 +55,18 @@ void icm20948_init() icm20948_accel_full_scale_select(_16g); } +void ak09916_init() +{ + icm20948_i2c_master_reset(); + icm20948_i2c_master_enable(); + icm20948_i2c_master_clk_frq(7); + + while(!ak09916_who_am_i()); + + ak09916_soft_reset(); + ak09916_operation_mode_setting(continuous_measurement_100hz); +} + void icm20948_gyro_read(axises* data) { uint8_t* temp = read_multiple_icm20948_reg(ub_0, B0_GYRO_XOUT_H, 6); @@ -171,7 +82,28 @@ void icm20948_accel_read(axises* data) data->x = (int16_t)(temp[0] << 8 | temp[1]); data->y = (int16_t)(temp[2] << 8 | temp[3]); - data->z = (int16_t)(temp[4] << 8 | temp[5]); + data->z = (int16_t)(temp[4] << 8 | temp[5]) + accel_scale_factor; + // Add scale factor because calibraiton function offset gravity acceleration. +} + +bool ak09916_mag_read(axises* data) +{ + uint8_t* temp; + uint8_t drdy, hofl; // data ready, overflow + + drdy = read_single_ak09916_reg(MAG_ST1) & 0x01; + if(!drdy) return false; + + temp = read_multiple_ak09916_reg(MAG_HXL, 6); + + hofl = read_single_ak09916_reg(MAG_ST2) & 0x08; + if(hofl) return false; + + data->x = (int16_t)(temp[1] << 8 | temp[0]); + data->y = (int16_t)(temp[3] << 8 | temp[2]); + data->z = (int16_t)(temp[5] << 8 | temp[4]); + + return true; } void icm20948_gyro_read_dps(axises* data) @@ -192,8 +124,21 @@ void icm20948_accel_read_g(axises* data) data->z /= accel_scale_factor; } +bool ak09916_mag_read_uT(axises* data) +{ + axises temp; + bool new_data = ak09916_mag_read(&temp); + if(!new_data) return false; + + data->x = (float)(temp.x * 0.15); + data->y = (float)(temp.y * 0.15); + data->z = (float)(temp.z * 0.15); -/* ICM-20948 Sub Functions */ + return true; +} + + +/* Sub Functions */ bool icm20948_who_am_i() { uint8_t icm20948_id = read_single_icm20948_reg(ub_0, B0_WHO_AM_I); @@ -204,12 +149,28 @@ bool icm20948_who_am_i() return false; } +bool ak09916_who_am_i() +{ + uint8_t ak09916_id = read_single_ak09916_reg(MAG_WIA2); + + if(ak09916_id == AK09916_ID) + return true; + else + return false; +} + void icm20948_device_reset() { write_single_icm20948_reg(ub_0, B0_PWR_MGMT_1, 0x80 | 0x41); HAL_Delay(100); } +void ak09916_soft_reset() +{ + write_single_ak09916_reg(MAG_CNTL3, 0x01); + HAL_Delay(100); +} + void icm20948_wakeup() { uint8_t new_val = read_single_icm20948_reg(ub_0, B0_PWR_MGMT_1); @@ -304,6 +265,12 @@ void icm20948_accel_sample_rate_divider(uint16_t divider) write_single_icm20948_reg(ub_2, B2_ACCEL_SMPLRT_DIV_2, divider_2); } +void ak09916_operation_mode_setting(operation_mode mode) +{ + write_single_ak09916_reg(MAG_CNTL2, mode); + HAL_Delay(100); +} + void icm20948_gyro_calibration() { axises temp; @@ -449,70 +416,104 @@ void icm20948_accel_full_scale_select(accel_full_scale full_scale) } -/* AK09916 Main Functions */ -void ak009916_init() +/* Static Functions */ +static void cs_high() { - icm20948_i2c_master_reset(); - icm20948_i2c_master_enable(); - icm20948_i2c_master_clk_frq(7); - - ak09916_soft_reset(); - ak09916_operation_mode_setting(continuous_measurement_100hz); + HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, SET); } -bool ak09916_mag_read(axises* data) +static void cs_low() { - uint8_t* temp; - uint8_t drdy, hofl; // data ready, overflow + HAL_GPIO_WritePin(ICM20948_SPI_CS_PIN_PORT, ICM20948_SPI_CS_PIN_NUMBER, RESET); +} - drdy = read_single_ak09916_reg(MAG_ST1) & 0x01; - if(!drdy) return false; +static void select_user_bank(userbank ub) +{ + uint8_t write_reg[2]; + write_reg[0] = WRITE | REG_BANK_SEL; + write_reg[1] = ub; - temp = read_multiple_ak09916_reg(MAG_HXL, 6); + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 10); + cs_high(); +} - hofl = read_single_ak09916_reg(MAG_ST2) & 0x08; - if(hofl) return false; +static uint8_t read_single_icm20948_reg(userbank ub, uint8_t reg) +{ + uint8_t read_reg = READ | reg; + uint8_t reg_val; + select_user_bank(ub); - data->x = (int16_t)(temp[1] << 8 | temp[0]); - data->y = (int16_t)(temp[3] << 8 | temp[2]); - data->z = (int16_t)(temp[5] << 8 | temp[4]); + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); + HAL_SPI_Receive(ICM20948_SPI, ®_val, 1, 1000); + cs_high(); - return true; + return reg_val; } -bool ak09916_mag_read_uT(axises* data) +static void write_single_icm20948_reg(userbank ub, uint8_t reg, uint8_t val) { - axises temp; - bool new_data = ak09916_mag_read(&temp); - if(!new_data) return false; + uint8_t write_reg[2]; + write_reg[0] = WRITE | reg; + write_reg[1] = val; - data->x = (float)(temp.x * 0.15); - data->y = (float)(temp.y * 0.15); - data->z = (float)(temp.z * 0.15); + select_user_bank(ub); - return true; -} + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, write_reg, 2, 1000); + cs_high(); +} +static uint8_t* read_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t len) +{ + uint8_t read_reg = READ | reg; + static uint8_t reg_val[6]; + select_user_bank(ub); -/* AK09916 Sub Functions */ -bool ak09916_who_am_i() + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, &read_reg, 1, 1000); + HAL_SPI_Receive(ICM20948_SPI, reg_val, len, 1000); + cs_high(); + + return reg_val; +} + +static void write_multiple_icm20948_reg(userbank ub, uint8_t reg, uint8_t* val, uint8_t len) { - uint8_t ak09916_id = read_single_ak09916_reg(MAG_WIA2); + uint8_t write_reg = WRITE | reg; + select_user_bank(ub); - if(ak09916_id == AK09916_ID) - return true; - else - return false; + cs_low(); + HAL_SPI_Transmit(ICM20948_SPI, &write_reg, 1, 1000); + HAL_SPI_Transmit(ICM20948_SPI, val, len, 1000); + cs_high(); } -void ak09916_soft_reset() +static uint8_t read_single_ak09916_reg(uint8_t reg) { - write_single_ak09916_reg(MAG_CNTL3, 0x01); - HAL_Delay(100); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); + + HAL_Delay(1); + return read_single_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00); } -void ak09916_operation_mode_setting(operation_mode mode) +static void write_single_ak09916_reg(uint8_t reg, uint8_t val) { - write_single_ak09916_reg(MAG_CNTL2, mode); - HAL_Delay(100); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, WRITE | MAG_SLAVE_ADDR); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_DO, val); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x81); } + +static uint8_t* read_multiple_ak09916_reg(uint8_t reg, uint8_t len) +{ + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_ADDR, READ | MAG_SLAVE_ADDR); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_REG, reg); + write_single_icm20948_reg(ub_3, B3_I2C_SLV0_CTRL, 0x80 | len); + + HAL_Delay(1); + return read_multiple_icm20948_reg(ub_0, B0_EXT_SLV_SENS_DATA_00, len); +} \ No newline at end of file diff --git a/stm32f411_fw_icm20948/ICM20948/icm20948.h b/stm32f411_fw_icm20948/ICM20948/icm20948.h index 8c060d2..c5dea4b 100644 --- a/stm32f411_fw_icm20948/ICM20948/icm20948.h +++ b/stm32f411_fw_icm20948/ICM20948/icm20948.h @@ -15,11 +15,8 @@ /* User Configuration */ - -// SPI Interface #define ICM20948_SPI (&hspi1) -// CS Pin #define ICM20948_SPI_CS_PIN_PORT GPIOA #define ICM20948_SPI_CS_PIN_NUMBER GPIO_PIN_4 @@ -72,20 +69,30 @@ typedef enum } operation_mode; -/* ICM-20948 Main Functions */ +/* Main Functions */ + +// sensor init function. +// if sensor id is wrong, it is stuck in while. void icm20948_init(); +void ak09916_init(); -void icm20948_gyro_read(axises* data); // 16bits ADC value -void icm20948_accel_read(axises* data); // 16bits ADC value +// 16 bits ADC value. raw data. +void icm20948_gyro_read(axises* data); +void icm20948_accel_read(axises* data); +bool ak09916_mag_read(axises* data); -void icm20948_gyro_read_dps(axises* data); +// Convert 16 bits ADC value to their unit. +void icm20948_gyro_read_dps(axises* data); void icm20948_accel_read_g(axises* data); +bool ak09916_mag_read_uT(axises* data); -/* ICM-20948 Sub Functions */ +/* Sub Functions */ bool icm20948_who_am_i(); +bool ak09916_who_am_i(); void icm20948_device_reset(); +void ak09916_soft_reset(); void icm20948_wakeup(); void icm20948_sleep(); @@ -105,7 +112,9 @@ void icm20948_accel_low_pass_filter(uint8_t config); // 0 - 7 // Output Data Rate = 1.125kHz / (1 + divider) void icm20948_gyro_sample_rate_divider(uint8_t divider); void icm20948_accel_sample_rate_divider(uint16_t divider); +void ak09916_operation_mode_setting(operation_mode mode); +// Calibration before select full scale. void icm20948_gyro_calibration(); void icm20948_accel_calibration(); @@ -113,20 +122,6 @@ void icm20948_gyro_full_scale_select(gyro_full_scale full_scale); void icm20948_accel_full_scale_select(accel_full_scale full_scale); -/* AK09916 Main Functions */ -void ak009916_init(); - -bool ak09916_mag_read(axises* data); // 16bits ADC value -bool ak09916_mag_read_uT(axises* data); - - -/* AK09916 Sub Functions */ -bool ak09916_who_am_i(); - -void ak09916_soft_reset(); -void ak09916_operation_mode_setting(operation_mode mode); - - /* ICM-20948 Registers */ #define ICM20948_ID 0xEA #define REG_BANK_SEL 0x7F