Merge branch 'main' into networkfusion-ti-patch

nanoframework · Nov 20, 2023 · a13f12a · a13f12a
2 parents b3bd171 + 0edc862
commit a13f12a
Show file tree

Hide file tree

Showing 2 changed files with 104 additions and 6 deletions.
diff --git a/...ts/AzureRTOS/ST/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp b/...ts/AzureRTOS/ST/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp
@@ -980,10 +980,59 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeConfig___VOI
     // setup configuration
 
     // data bits @ CR1:M1&M0
-    // TODO
+    switch ((uint16_t)pThis[FIELD___dataBits].NumericByRef().s4)
+    {
+            // case 5:
+            //     // palUart->Uart_cfg.cr1 |= UART_DATA_5_BITS;
+            //     break;
+
+            // case 6:
+            //     // palUart->Uart_cfg.cr1 |= UART_DATA_6_BITS;
+            //     break;
+
+        case 7:
+            // FIXME
+            // palUart->Uart_cfg.cr1 |= USART_CR1_DATA7;
+            break;
+
+        case 8:
+            // FIXME
+            // palUart->Uart_cfg.cr1 |= USART_CR1_DATA8;
+            break;
+
+        default:
+            NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER);
+    }
 
-    // parity @ CR1:PS
-    // TODO
+    // parity
+    switch ((Parity)pThis[FIELD___parity].NumericByRef().s4)
+    {
+        case Parity_None:
+            palUart->Uart_cfg.cr1 &= ~(USART_CR1_PCE | USART_CR1_PS | USART_CR1_M);
+            break;
+        case Parity_Even:
+#ifdef USART_CR1_M0
+            // cope with F3 and F7 where there are 2 bits in CR1_M
+            palUart->Uart_cfg.cr1 |= USART_CR1_M0 | USART_CR1_PCE;
+#else
+            palUart->Uart_cfg.cr1 |= USART_CR1_M | USART_CR1_PCE;
+#endif
+            palUart->Uart_cfg.cr1 &= ~USART_CR1_PS;
+            break;
+        case Parity_Odd:
+            // setting USART_CR1_M ensures extra bit is used as parity
+            // not last bit of data
+#ifdef USART_CR1_M0
+            // cope with F3 and F7 where there are 2 bits in CR1_M
+            palUart->Uart_cfg.cr1 |= USART_CR1_M0 | USART_CR1_PCE;
+#else
+            palUart->Uart_cfg.cr1 |= USART_CR1_M | USART_CR1_PCE;
+#endif
+            palUart->Uart_cfg.cr1 |= USART_CR1_PS;
+            break;
+        default:
+            NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER);
+    }
 
     // Check RS485 mode is not selected as currently not supported
     if ((SerialMode)pThis[FIELD___mode].NumericByRef().s4 != SerialMode_Normal)

diff --git a/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp b/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp
@@ -983,10 +983,59 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeConfig___VOI
     // setup configuration
 
     // data bits @ CR1:M1&M0
-    // TODO
+    switch ((uint16_t)pThis[FIELD___dataBits].NumericByRef().s4)
+    {
+            // case 5:
+            //     // palUart->Uart_cfg.cr1 |= UART_DATA_5_BITS;
+            //     break;
+
+            // case 6:
+            //     // palUart->Uart_cfg.cr1 |= UART_DATA_6_BITS;
+            //     break;
+
+        case 7:
+            // FIXME
+            // palUart->Uart_cfg.cr1 |= USART_CR1_DATA7;
+            break;
+
+        case 8:
+            // FIXME
+            // palUart->Uart_cfg.cr1 |= USART_CR1_DATA8;
+            break;
+
+        default:
+            NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER);
+    }
 
-    // parity @ CR1:PS
-    // TODO
+    // parity
+    switch ((Parity)pThis[FIELD___parity].NumericByRef().s4)
+    {
+        case Parity_None:
+            palUart->Uart_cfg.cr1 &= ~(USART_CR1_PCE | USART_CR1_PS | USART_CR1_M);
+            break;
+        case Parity_Even:
+#ifdef USART_CR1_M0
+            // cope with F3 and F7 where there are 2 bits in CR1_M
+            palUart->Uart_cfg.cr1 |= USART_CR1_M0 | USART_CR1_PCE;
+#else
+            palUart->Uart_cfg.cr1 |= USART_CR1_M | USART_CR1_PCE;
+#endif
+            palUart->Uart_cfg.cr1 &= ~USART_CR1_PS;
+            break;
+        case Parity_Odd:
+            // setting USART_CR1_M ensures extra bit is used as parity
+            // not last bit of data
+#ifdef USART_CR1_M0
+            // cope with F3 and F7 where there are 2 bits in CR1_M
+            palUart->Uart_cfg.cr1 |= USART_CR1_M0 | USART_CR1_PCE;
+#else
+            palUart->Uart_cfg.cr1 |= USART_CR1_M | USART_CR1_PCE;
+#endif
+            palUart->Uart_cfg.cr1 |= USART_CR1_PS;
+            break;
+        default:
+            NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER);
+    }
 
     // Check RS485 mode is not selected as currently not supported
     if ((SerialMode)pThis[FIELD___mode].NumericByRef().s4 != SerialMode_Normal)