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#define HSIRDY_TIMEOUT HSERDY_TIMEOUT
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#define LSIRDY_TIMEOUT HSERDY_TIMEOUT
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+ #define CSIRDY_TIMEOUT HSERDY_TIMEOUT
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/* HSE divisor to yield ~1MHz RTC clock */
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@@ -942,7 +943,8 @@ void stm32_stdclockconfig(void)
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regval = getreg32 (STM32_RCC_CR );
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regval |= RCC_CR_HSION ; /* Enable HSI */
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- #if defined(STMT32H5_CR_HSIDIV )
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+ #if defined(STM32_CR_HSIDIV )
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+ regval &= ~RCC_CR_HSIDIV_MASK ;
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regval |= STM32_CR_HSIDIV ;
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#else
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/* Use default (32 MHz) */
@@ -979,10 +981,7 @@ void stm32_stdclockconfig(void)
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}
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#endif
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- #if defined(STM32_BOARD_USEHSI )
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- /* Already set above */
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-
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- #elif defined(STM32H5_BOARD_USECSI )
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+ #if defined(STM32_BOARD_USECSI )
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/* Enable Internal Low Power Internal Clock (CSI) */
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/* Wait until the CSI is either off or ready (or until a timeout elapsed) */
@@ -1015,8 +1014,9 @@ void stm32_stdclockconfig(void)
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break ;
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}
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}
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+ #endif
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- #elif defined(STM32H5_BOARD_USEHSE )
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+ #if defined(STM32_BOARD_USEHSE )
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/* Enable External High-Speed Clock (HSE) */
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regval = getreg32 (STM32_RCC_CR );
@@ -1036,10 +1036,10 @@ void stm32_stdclockconfig(void)
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break ;
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}
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}
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- #else
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-
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- # error stm32h5_stdclockconfig(), must have one of STM32_BOARD_USEHSI, STM32H5_BOARD_USECSI, STM32H5_BOARD_USEHSE defined
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+ #endif
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+ #if !defined(STM32_BOARD_USEHSE ) && !defined(STM32_BOARD_USEHSI ) && !defined(STM32_BOARD_USECSI )
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+ # error stm32h5_stdclockconfig(), must have one of STM32_BOARD_USEHSI, STM32_BOARD_USECSI, STM32_BOARD_USEHSE defined
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#endif
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/* Check for a timeout. If this timeout occurs, then we are hosed. We
@@ -1106,9 +1106,9 @@ void stm32_stdclockconfig(void)
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regval |= RCC_PLL1CFGR_PLL1SRC_HSE ;
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#elif defined(STM32_BOARD_USEHSI )
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regval |= RCC_PLL1CFGR_PLL1SRC_HSI ;
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- #elif defined(STM32H5_BOARD_USECSI )
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+ #elif defined(STM32_BOARD_USECSI )
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regval |= RCC_PLL1CFGR_PLL1SRC_CSI ;
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- #else /* if STM32H5_BOARD_USEHSE */
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+ #else /* if STM32_BOARD_USEHSE */
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regval |= RCC_PLL1CFGR_PLL1SRC_HSE ;
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#endif
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@@ -1174,9 +1174,9 @@ void stm32_stdclockconfig(void)
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regval |= RCC_PLL2CFGR_PLL2SRC_HSE ;
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#elif defined(STM32_BOARD_USEHSI )
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regval |= RCC_PLL2CFGR_PLL2SRC_HSI ;
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- #elif defined(STM32H5_BOARD_USECSI )
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+ #elif defined(STM32_BOARD_USECSI )
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regval |= RCC_PLL2CFGR_PLL2SRC_CSI ;
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- #else /* if STM32H5_BOARD_USEHSE */
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+ #else /* if STM32_BOARD_USEHSE */
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regval |= RCC_PLL2CFGR_PLL2SRC_HSE ;
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#endif
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@@ -1242,9 +1242,9 @@ void stm32_stdclockconfig(void)
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regval |= RCC_PLL3CFGR_PLL3SRC_HSE ;
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#elif defined(STM32_BOARD_USEHSI )
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regval |= RCC_PLL3CFGR_PLL3SRC_HSI ;
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- #elif defined(STM32H5_BOARD_USECSI )
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+ #elif defined(STM32_BOARD_USECSI )
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regval |= RCC_PLL3CFGR_PLL3SRC_CSI ;
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- #else /* if STM32H5_BOARD_USEHSE */
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+ #else /* if STM32_BOARD_USEHSE */
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regval |= RCC_PLL3CFGR_PLL3SRC_HSE ;
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#endif
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