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kywwilson11raiden00pl
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Update BOARD_USExxx naming, input clock selection, and setting of HSIDIV
The naming scheme in board.h changed from STM32H5_ to STM32_. As a result we needed to adjust the naming of the STM32H5_BOARD_USExxx variables in stm32h5xx_rcc.c. Also made changes to allow the enabling of all 3 of HSI, CSI, or HSE in stm32_stdclockconfig. Lastly, the HSIDIV bits in RCC_CR were not being cleared before being set. Added logic to clear these bits. defined CSIRDY_TIMEOUT
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Diff for: arch/arm/src/stm32h5/stm32h5xx_rcc.c

+15-15
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@
4646

4747
#define HSIRDY_TIMEOUT HSERDY_TIMEOUT
4848
#define LSIRDY_TIMEOUT HSERDY_TIMEOUT
49+
#define CSIRDY_TIMEOUT HSERDY_TIMEOUT
4950

5051
/* HSE divisor to yield ~1MHz RTC clock */
5152

@@ -942,7 +943,8 @@ void stm32_stdclockconfig(void)
942943
regval = getreg32(STM32_RCC_CR);
943944
regval |= RCC_CR_HSION; /* Enable HSI */
944945

945-
#if defined(STMT32H5_CR_HSIDIV)
946+
#if defined(STM32_CR_HSIDIV)
947+
regval &= ~RCC_CR_HSIDIV_MASK;
946948
regval |= STM32_CR_HSIDIV;
947949
#else
948950
/* Use default (32 MHz) */
@@ -979,10 +981,7 @@ void stm32_stdclockconfig(void)
979981
}
980982
#endif
981983

982-
#if defined(STM32_BOARD_USEHSI)
983-
/* Already set above */
984-
985-
#elif defined(STM32H5_BOARD_USECSI)
984+
#if defined(STM32_BOARD_USECSI)
986985
/* Enable Internal Low Power Internal Clock (CSI) */
987986

988987
/* Wait until the CSI is either off or ready (or until a timeout elapsed) */
@@ -1015,8 +1014,9 @@ void stm32_stdclockconfig(void)
10151014
break;
10161015
}
10171016
}
1017+
#endif
10181018

1019-
#elif defined(STM32H5_BOARD_USEHSE)
1019+
#if defined(STM32_BOARD_USEHSE)
10201020
/* Enable External High-Speed Clock (HSE) */
10211021

10221022
regval = getreg32(STM32_RCC_CR);
@@ -1036,10 +1036,10 @@ void stm32_stdclockconfig(void)
10361036
break;
10371037
}
10381038
}
1039-
#else
1040-
1041-
# error stm32h5_stdclockconfig(), must have one of STM32_BOARD_USEHSI, STM32H5_BOARD_USECSI, STM32H5_BOARD_USEHSE defined
1039+
#endif
10421040

1041+
#if !defined(STM32_BOARD_USEHSE) && !defined(STM32_BOARD_USEHSI) && !defined(STM32_BOARD_USECSI)
1042+
# error stm32h5_stdclockconfig(), must have one of STM32_BOARD_USEHSI, STM32_BOARD_USECSI, STM32_BOARD_USEHSE defined
10431043
#endif
10441044

10451045
/* Check for a timeout. If this timeout occurs, then we are hosed. We
@@ -1106,9 +1106,9 @@ void stm32_stdclockconfig(void)
11061106
regval |= RCC_PLL1CFGR_PLL1SRC_HSE;
11071107
#elif defined(STM32_BOARD_USEHSI)
11081108
regval |= RCC_PLL1CFGR_PLL1SRC_HSI;
1109-
#elif defined(STM32H5_BOARD_USECSI)
1109+
#elif defined(STM32_BOARD_USECSI)
11101110
regval |= RCC_PLL1CFGR_PLL1SRC_CSI;
1111-
#else /* if STM32H5_BOARD_USEHSE */
1111+
#else /* if STM32_BOARD_USEHSE */
11121112
regval |= RCC_PLL1CFGR_PLL1SRC_HSE;
11131113
#endif
11141114

@@ -1174,9 +1174,9 @@ void stm32_stdclockconfig(void)
11741174
regval |= RCC_PLL2CFGR_PLL2SRC_HSE;
11751175
#elif defined(STM32_BOARD_USEHSI)
11761176
regval |= RCC_PLL2CFGR_PLL2SRC_HSI;
1177-
#elif defined(STM32H5_BOARD_USECSI)
1177+
#elif defined(STM32_BOARD_USECSI)
11781178
regval |= RCC_PLL2CFGR_PLL2SRC_CSI;
1179-
#else /* if STM32H5_BOARD_USEHSE */
1179+
#else /* if STM32_BOARD_USEHSE */
11801180
regval |= RCC_PLL2CFGR_PLL2SRC_HSE;
11811181
#endif
11821182

@@ -1242,9 +1242,9 @@ void stm32_stdclockconfig(void)
12421242
regval |= RCC_PLL3CFGR_PLL3SRC_HSE;
12431243
#elif defined(STM32_BOARD_USEHSI)
12441244
regval |= RCC_PLL3CFGR_PLL3SRC_HSI;
1245-
#elif defined(STM32H5_BOARD_USECSI)
1245+
#elif defined(STM32_BOARD_USECSI)
12461246
regval |= RCC_PLL3CFGR_PLL3SRC_CSI;
1247-
#else /* if STM32H5_BOARD_USEHSE */
1247+
#else /* if STM32_BOARD_USEHSE */
12481248
regval |= RCC_PLL3CFGR_PLL3SRC_HSE;
12491249
#endif
12501250

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