+
+Figure 5: Example of footprint and interference channel (identified by the two circles)
+
diff --git a/doc/_docs/example/simpleKeystone/index.md b/doc/_docs/example/simpleKeystone/index.md
index e69de29..b9e9595 100644
--- a/doc/_docs/example/simpleKeystone/index.md
+++ b/doc/_docs/example/simpleKeystone/index.md
@@ -0,0 +1,12 @@
+---
+layout: index
+---
+
+This section provides a simple yet comprehensive example of a processor PML model composed of:
+* two cores,
+* one DMA (Direct Access Memory),
+* one Ethernet device,
+* one DDR and SRAM memory,
+* one SPI controller,
+* an interrupt controller (MPIC),
+* and a set of configuration registers reachable through a specific configuration bus.
diff --git a/doc/_docs/example/simpleKeystone/library.md b/doc/_docs/example/simpleKeystone/library.md
index e69de29..4aaaaf2 100644
--- a/doc/_docs/example/simpleKeystone/library.md
+++ b/doc/_docs/example/simpleKeystone/library.md
@@ -0,0 +1,33 @@
+---
+layout: doc-page
+title: "Transaction library"
+---
+
+The application layer is composed of five tasks:
+* app4 is an asynchronous microcode running on the Ethernet component.
+ Each time an Ethernet frame arrives, it transfers the payload of the frame to SRAM (transaction t41).
+* app21 and app22 are two periodic tasks running core1.
+* * At each period app21 reads the last Ethernet message from SRAM,
+ makes some input treatments on the message, and makes it available for app1 in DDR.
+* * Similarly, at each period app22 reads output data of app1 from DDR. It transforms them into SPI frames.
+ The frames are then store in SRAM. And finally app22 wakes up the DMA (app3)
+ by writing the address of the SPI frames into the DMA registers.
+* app3 is a microcode running on DMA. When woke up, app3 reads the SPI frame from
+ SRAM and transfers it to SPI.
+* app1 is an asynchronous applicative task running on core0 and activated each time a external interrupt arrives.
+ It begins by reading the interrupt code from MPIC (transaction t11).
+ It reads its input data from DDR (transaction t12).
+ Then it runs using the internal cache of core0 (transaction t13).
+ And finally it stores its output data in DDR (transaction t14).
+
+The transactions are drawn in Figure 2.
+
+
+
+Figure 2: Transactions of app1, app21 app22, app3,and app4.
+
+By design, app22 and app3 do not run simultaneously, as app22 wakes up app3 at the end of its execution.
+
+PML Encoding is provided in src/main/scala/pml/examples/simple/SimpleTransactionLibrary.scala
+
+In this example all defined transaction are used, the configuration of the library is provided in src/main/scala/examples/simple/SimpleLibraryConfiguration
diff --git a/doc/_docs/example/simpleKeystone/platform.md b/doc/_docs/example/simpleKeystone/platform.md
index e69de29..afa5a5f 100644
--- a/doc/_docs/example/simpleKeystone/platform.md
+++ b/doc/_docs/example/simpleKeystone/platform.md
@@ -0,0 +1,27 @@
+---
+layout: doc-page
+title: "Platform"
+---
+
+As shown in Figure 1 the two core are linked by an
+AXI bus. The IO devices (DMA, Ethernet controler and SPI) are
+linked through a dedicated peripheral bus. These two buses are
+connected to the memory subsystem (containing the DDR and
+the SRAM memories) through a dedicated controller
+called Memory Shared Multicore Controller (MSMC). This controller
+acts as a switch from the two buses to the two memories.
+
+All the resources necessary for executing program instructions are locally hosted by each core: ordinal counter, registers, computing units, etc.
+These resources are private to each core.
+They can be used simultaneously without interference by each core.
+Conversely, the memory hierarchy is composed of resources local
+to each core (the cache memories), and also global
+resources (such as DDR and SRAM) simultaneously reachable
+by the cores and the IO devices.
+These global memories are shared resources.
+
+
+
+Figure 1: Multicore processor
+
+PML Encoding is provided in src/main/scala/pml/examples/simpleKeystone/SimpleKeystonePlatform.scala
\ No newline at end of file
diff --git a/doc/_docs/example/simpleKeystone/routing.md b/doc/_docs/example/simpleKeystone/routing.md
index e69de29..46eff15 100644
--- a/doc/_docs/example/simpleKeystone/routing.md
+++ b/doc/_docs/example/simpleKeystone/routing.md
@@ -0,0 +1,12 @@
+---
+layout: doc-page
+title: "Routing"
+---
+
+
+In this example, as shown in Figure 1, there are multiple paths between the cores and the configuration registers.
+These registers can be reached from the core either through AXI-BUS, MSMC, PERIPH-BUS and CONFIG-BUS, or directly through CONFIG-BUS.
+The platform is configured such that the read and store accesses by the core to the configuration registers are routed through the
+the direct path.
+
+The PML routing rules are encoded in src/main/scala/pml/examples/simple/SimpleRoutingConfiguration.scala
diff --git a/doc/_docs/example/simpleKeystone/slicing.md b/doc/_docs/example/simpleKeystone/slicing.md
index e69de29..5d7f594 100644
--- a/doc/_docs/example/simpleKeystone/slicing.md
+++ b/doc/_docs/example/simpleKeystone/slicing.md
@@ -0,0 +1,22 @@
+---
+layout: doc-page
+title: "Temporal slices"
+---
+
+The tasks are scheduled into two periodic time slices as shown in Figure 3:
+app4 and app21 are scheduled in the first time slice;
+app22 and app3 are scheduled in the second time slice;
+and as app1 is asynchronous, it can run at any time, that is, possibly in the both slices.
+
+
+
+Figure 3: Temporal scheduling.
+
+The footprint of the transactions of these five tasks on the architecture is shown of each time slice in Figure 4.
+
+
+
+Figure 4: Footprint of the transactions on the HW architecture (the red, violet, blue, and green arrows represent respectively the transactions of app1, app2 (app21, app22), app3, and app3).
+
+The PML encoding of the first time slice is provided in src/main/scala/pml/examples/simple/SimpleKeystoneLibraryConfigurationPalnApp21.scala,
+and the second time slice is provided in src/main/scala/pml/examples/simple/SimpleKeystoneLibraryConfigurationPalnApp22.scala
diff --git a/doc/_docs/example/simpleKeystone/software.md b/doc/_docs/example/simpleKeystone/software.md
index e69de29..946c10b 100644
--- a/doc/_docs/example/simpleKeystone/software.md
+++ b/doc/_docs/example/simpleKeystone/software.md
@@ -0,0 +1,13 @@
+---
+layout: doc-page
+title: "Software Allocation"
+---
+
+The application layer is composed of five tasks:
+* app4 is an asynchronous microcode running on the eth component.
+* app21 is a periodic task running on core2.
+* app22 is a periodic task running on core2.
+* app3 a microcode running on DMA.
+* app1 is an asynchronous applicative task running on core1.
+
+PML Encoding is provided in src/main/scala/pml/examples/simple/SimpleSoftwareAllocation.scala
diff --git a/doc/_docs/example/simpleKeystone/specification.md b/doc/_docs/example/simpleKeystone/specification.md
index e69de29..e33ca38 100644
--- a/doc/_docs/example/simpleKeystone/specification.md
+++ b/doc/_docs/example/simpleKeystone/specification.md
@@ -0,0 +1,12 @@
+---
+layout: doc-page
+title: "Specifications"
+---
+
+In this example we consider that
+* bus services are independent
+* DMA and dma-reg services impacts each others
+* app21 and app22 are exclusive as they run on the same core
+* app22 and app3 are exclusive as app22 wakes up app3 at the en of its execution.
+
+PML encoding is provided in src/main/scala/views/interference/examples/simple/SimpleTableBasedInterferenceSpecification
diff --git a/doc/_docs/example/simpleT1042/index.md b/doc/_docs/example/simpleT1042/index.md
index e69de29..e1ce049 100644
--- a/doc/_docs/example/simpleT1042/index.md
+++ b/doc/_docs/example/simpleT1042/index.md
@@ -0,0 +1,106 @@
+---
+layout: index
+---
+
+## Platform
+
+This processor is composed of:
+* two cores,
+* one DMA (Direct Access Memory),
+* one Ethernet device,
+* two memory controllers (the memories behind the memory controllers are not represented),
+* one PCIe controller,
+* an interrupt controller (MPCI),
+* and a set of configuration registers reachable through a specific configuration bus.
+
+All the resources necessary for executing program instructions are locally hosted by each core: ordinal counter, registers, computing units, etc.
+These resources are private to each core.
+They can be used simultaneously without interference by each core.
+Conversely, the memory hierarchy is composed of resources local to each core (the cache memories), and two global memories reachable from the two cores.
+These global memories are shared resources.
+
+The cores, the Ethernet device, the DMA, and the memories are connected by a central bus as shown in Figure 1.
+This bus carries transactions, that is, requests from the cores, the Ethernet port, and the DMA to the memories and to the configuration bus.
+As such, the central bus is a shared resource that can be used asynchronously by the transactions.
+These transactions can collide when attempting to cross the bus at the same time.
+
+
+
+Figure 1: Multicore processor
+
+PML Encoding is provided in src/main/scala/pml/examples/simple/SimplePlatform.scala
+
+## Software Allocation
+
+The application layer is composed of five tasks:
+* app4 is an asynchronous microcode running on the eth component.
+* app21 is a periodic task running on core2.
+* app22 is a periodic task running on core2.
+* app3 a microcode running on DMA.
+* app1 is an asynchronous applicative task running on core1.
+
+PML Encoding is provided in src/main/scala/pml/examples/simple/SimpleSoftwareAllocation.scala
+
+## Transaction library
+
+The application layer is composed of five tasks:
+* app4 Each time an Ethernet frame arrives, it transfers the payload of the frame to mem2 (transaction t41).
+* app21 is a periodic task running on core2. At each period app21 reads the last Ethernet message from mem2, makes some input treatments on it, and makes it available for app1 in mem1.
+* app22 is a periodic task running on core2. Similarly, at each period app22 reads output data of app1 from mem1. It transforms them into PCIe frames. The frames are then store in mem2.
+* app22 wakes up the DMA (app3) by writing the address of the PCIe frames into the DMA registers.
+* app3 a microcode running on DMA. When woke up, app3 reads the PCIe frame from mem2 and transfers it to pcie.
+* app1 is an asynchronous applicative task running on core1 and activated each time an external interrupt arrives. It begins by reading the interrupt code from mpic (transaction t11). It reads its input data from mem1 (transaction t12). Then it runs using the internal cache of core1(transaction t13). And finally it stores its output data in mem1(transaction t14).
+
+
+
+Figure 2: Transactions of the HW architecture (the red, violet,blue, and green arrows represent respectively the transactions of app1,app2(app21 app22), app3,and app4).
+
+PML Encoding is provided in src/main/scala/pml/examples/simple/SimpleTransactionLibrary.scala
+
+In this example all defined transaction are used, the configuration of the library is provided in src/main/scala/examples/simple/SimpleLibraryConfiguration
+
+## Routing
+
+In this example there are not multiple paths between target and initiators so the routing configuration is optional (here empty)
+
+## Specifications
+
+In this example we consider that
+* bus services are independent
+* DMA and config_bus services impacts each others
+* app21 and app22 are exclusive
+
+PML encoding is provided in src/main/scala/views/interference/examples/simple/SimpleTableBasedInterferenceSpecification
+
+## Exports
+
+### Configured platform
+
+The file src/main/scala/pml/examples/simple/SimpleExport shows how graphical exports are produced (stored in export folder)
+from a platform:
+* graph of used SW and HW
+* graph of used services per application
+* table of transaction
+* table of data
+* table of SW allocation to HW
+* table of component activation
+* table of SW usage
+* routing table
+* transfert table
+
+### Interference analysis
+
+The file src/main/scala/views/interference/examples/SimpleInterferenceGeneration shows how interference analysis can be performed
+on a configured platform. The generated files are stored in analysis folder:
+* computation of n-itf
+* computation of n-free
+* computation of n-channels
+
+As an example the following interference is identified as a 3-itf
+
+< app1_rd_d1 || app21_wr_d1 || app4_wr_input_d >
+
+
+
+Figure 3: Footprint and interference channel (identified by the two circles)
+
diff --git a/doc/_docs/index.md b/doc/_docs/index.md
index e69de29..2bd15a1 100644
--- a/doc/_docs/index.md
+++ b/doc/_docs/index.md
@@ -0,0 +1,12 @@
+---
+layout: index
+---
+
+The PML analyzer is an open source API providing a simple DSL to build
+a description of the architecture of your chip based on the PHYLOG Model Language (PML).
+From this representation a set of safety and interference model templates can be generated to perfom safety and
+interference analyses of your platform.
+
+The only dependencies of the PML analyzer are:
++ The Java Runtime Environment version 8 [JRE 1.8](http://www.oracle.com/technetwork/java/javase/downloads/jre8-downloads-2133155.html) or newer.
++ The Simple Build Tool [SBT](https://www.scala-sbt.org/)
\ No newline at end of file
diff --git a/doc/_docs/reference/gettingStarted/external_dependency.md b/doc/_docs/reference/gettingStarted/external_dependency.md
index e69de29..c0b8b22 100644
--- a/doc/_docs/reference/gettingStarted/external_dependency.md
+++ b/doc/_docs/reference/gettingStarted/external_dependency.md
@@ -0,0 +1,19 @@
+---
+layout: doc-page
+title: "External Dependencies"
+---
+
+The PML modeling does not rely on any external dependency. Nevertheless, it is possible
+to connect some backend analysis tools to directly perform analyses out of your PML model:
+* for interference analysis: [IDP](https://dtai.cs.kuleuven.be/software/idp/try) or [Monosat](https://github.com/sambayless/monosat)
+* for the safety analysis: [CeciliaOCAS]() or [OpenAltarica](https://www.openaltarica.fr/docs-downloads/)
+
+The Monosat tool can be integrated as a dynamic library. To do so be sure that the library (.so for Linux,
+.dylib for Mac, .dll for Windows) is accessible from the java library path. If not update it by running sbt or the executable with the VM option:
+```shell
+# to run SBT with a given library path
+java -jar -Djava.library.path=yourPath sbt-launch.jar
+
+# to run a JAR
+java -jar -Djava.library.path=yourPath youJar.jar
+```
\ No newline at end of file
diff --git a/doc/_docs/reference/gettingStarted/getting_started_SBT.md b/doc/_docs/reference/gettingStarted/getting_started_SBT.md
index e69de29..83e9738 100644
--- a/doc/_docs/reference/gettingStarted/getting_started_SBT.md
+++ b/doc/_docs/reference/gettingStarted/getting_started_SBT.md
@@ -0,0 +1,26 @@
+---
+layout: doc-page
+title: "Installing dependencies"
+---
+
+The PML analyzer is an open source API providing a simple DSL to build
+a description of the architecture of your chip based on the PHYLOG Model Language (PML).
+From this representation a set of safety and interference model templates can be generated to perfom safety and
+interference analyses of your platform.
+
+The only dependencies of the PML analyzer are:
++ The Java Runtime Environment version 8 [JRE 1.8](http://www.oracle.com/technetwork/java/javase/downloads/jre8-downloads-2133155.html) or newer.
++ The Simple Build Tool [SBT](https://www.scala-sbt.org/)
+
+### Java 8
+
+You need a working installation of the Java Runtime Environment
+version 8 (either OpenJDK or Oracle will do). Installation procedures
+may vary depending on your system (Windows, OSX, Linux), please follow
+the official guidelines for your system.
+
+### SBT
+
+The compilation of a PML model can be easily performed
+with [SBT](https://www.scala-sbt.org/). Installation procedures may vary depending on your system (Windows, OSX, Linux),
+please follow the official guidelines for your system.
\ No newline at end of file
diff --git a/doc/_docs/reference/gettingStarted/getting_started_docker.md b/doc/_docs/reference/gettingStarted/getting_started_docker.md
index e69de29..80fe1b8 100644
--- a/doc/_docs/reference/gettingStarted/getting_started_docker.md
+++ b/doc/_docs/reference/gettingStarted/getting_started_docker.md
@@ -0,0 +1,111 @@
+---
+layout: doc-page
+title: "Getting started with Docker"
+---
+
+The simplest way to use PML Analyzer is to download a pre-configured Docker image to run interference analyses.
+The only dependency is the [Docker execution engine](https://docs.docker.com/get-docker/).
+Docker enables you to create from this image a container where all dependencies have been already resolved.
+### Container for a simple execution of PML examples
+The following commands create a simple container that can be used to run the examples provided in PML Analyzer.
+```shell
+# load directly the archive containing the image of the preconfigured PML Analyzer environment
+docker load < [IMAGE_NAME].tar.gz
+
+# The image has been configured to run as a non-root user
+# To share content between the container and the host, it is mandatory to create
+# the directories upfront with the write rights
+mkdir [PATH_TO_SHARED_FOLDER]/[SHARED_FOLDER_NAME]
+chmod -R a+w [PATH_TO_ANALYSIS_RESULT]/[SHARED_FOLDER_NAME]
+
+# In particular, it is interesting to share a folder to store the interference analysis results [PATH_TO_ANALYSIS_RESULT]
+# and to share a folder to store the export results [PATH_TO_EXPORT_RESULT]
+
+# To run a 'one-shot' container (removed after exit) from an image with shared directories for the results.
+# Note that directory sharing is not mandatory, one can just run the container without the -v options
+docker run -it --rm \
+-v [PATH_TO_ANALYSIS_RESULT]:/home/user/code/analysis \
+-v [PATH_TO_EXPORT_RESULT]:/home/user/code/export \
+[IMAGE_NAME]
+```
+
+### Container for platform modelling
+You can create a container that also share some source files describing your own platform [MY_PLATFORM]. Let us consider that the source files
+describing you platform are located in [PLATFORM_MODEL_PATH] and the interference specifications are located in
+[PLATFORM_INTERFERENCE_SPECIFICATION_PATH]. You can add these files as source code of the project by sharing them with the
+container as follows:
+```shell
+# In case the user wants to create its own platform [MY_PLATFORM],
+# Create share a folder to store the models [PATH_TO_MODEL]
+# Create share a folder to store the specification [PATH_TO_INTERFERENCE_SPECIFICATION]
+docker run -it --rm \
+-v [PATH_TO_MODEL]:/home/user/code/src/main/scala/pml/examples/[MY_PLATFORM] \
+-v [PATH_TO_INTERFERENCE_SPECIFICATION]:/home/user/code/src/main/scala/views/interference/examples/[MY_PLATFORM] \
+-v [PATH_TO_ANALYSIS_RESULT]:/home/user/code/analysis \
+-v [PATH_TO_EXPORT_RESULT]:/home/user/code/export \
+[IMAGE_NAME]
+```
+### Running PML Analyzer in Docker
+
+Once the container is run in an interactive mode, all the examples provided in the following sections can be run by using SBT.
+To display all the possible entry-points of the project, especially your models, just execute the following command
+```shell
+sbt run
+```
+Note that you can edit your code on the host and re-build it in the container by simply running again
+```shell
+sbt compile
+```
+
+You can also indicate the memory allocated to SBT using the `-J-XmxNG` option where N
+is the number of Go.
+```shell
+# Allocate 4Go to run SBT
+sbt -J-Xmx4G run
+```
+
+### Exchanging files between container and host
+
+The simplest way to retrieve files from the container or to modify internal files is to use the
+`docker cp` command.
+```shell
+# From the container to the host
+docker cp CONTAINER:SRC_PATH DEST_PATH
+
+# From the host to the container
+docker cp DEST_PATH CONTAINER:SRC_PATH
+```
+
+A more integrated sharing can be achieved thanks to docker volumes as shown in the previous sections.
+
+### Dealing with multiple images and containers
+Some useful commands for image and container management in Docker:
+```shell
+# to list all existing containers
+docker ps -a
+
+# to run an stopped container
+docker start [CONTAINER_NAME] -t
+
+# to remove a given container
+docker rm [CONTAINER_NAME]
+
+# remove all containers
+docker rm $(docker ps -a -q)
+
+# list images
+docker images
+
+# remove an image
+docker rmi [IMAGE NAME]
+```
+
+If you want to keep a container available after its creation please create the container as follows:
+```shell
+docker run -it -t [CONTAINER_NAME] [VOLUME_OPTIONS] [IMAGE_NAME]
+```
+
+You can then use it again by running
+```shell
+doker start -i [CONTAINER_NAME]
+```
\ No newline at end of file
diff --git a/doc/_docs/reference/gettingStarted/index.md b/doc/_docs/reference/gettingStarted/index.md
index e69de29..9cf9179 100644
--- a/doc/_docs/reference/gettingStarted/index.md
+++ b/doc/_docs/reference/gettingStarted/index.md
@@ -0,0 +1,5 @@
+---
+layout: index
+---
+
+TBD
diff --git a/doc/_docs/reference/usePML/editing_PML_model.md b/doc/_docs/reference/usePML/editing_PML_model.md
index e69de29..b24331d 100644
--- a/doc/_docs/reference/usePML/editing_PML_model.md
+++ b/doc/_docs/reference/usePML/editing_PML_model.md
@@ -0,0 +1,39 @@
+---
+layout: doc-page
+title: "Editing a PML Model"
+---
+
+The PML analyzer is based on a platform description provided in a Scala embedded Domain Specific Language
+called PML. Therefore, PML analyzer can be seen as an API to easily build your model and to carry out automatic analyses.
+
+Any IDE can be used to edit PML models, we can recommend [Intellij IDEA](https://www.jetbrains.com) that provides support plugins for Scala and SBT.
+
+Various benchmark systems for platform modeling are provided
+in the ``pml.examples`` package. These benchmarks can be used as a starting point to
+your modeling activity.
+
+#### Getting started with Intellij
+
+To edit PML model with Intellij please follow the installation steps given by [JetBrain](https://www.jetbrains.com).
+The installation can be made for any platform and does not require any administrator privilege.
+Once the Intellij is installed please download the Scala and SBT Executor plugins.
+
+#### Creating a project with Intellij
+
+The build specifications and project structure are provided with the PML source code.
+So to create a project you simply have to select "Open project" on the starting menu of Intellij and indicate the directory containing PML (where the file ``build.sbt`` is).
+
+The tool should then configure automatically your project.
+Please add all the library in ``lib`` as project libraries by right-clicking on them and select ``Add as library``
+
+The last step is to indicate the Java version of the project, to do so please go to ``File/Project Structure/Project/Project`` SDK and select ``Java 1.8``
+
+You are now able to build, run and debug your models with Intellij
+
+#### Troubleshooting
+
+**Connection error while loading project or running build** If your platform uses a proxy
+please indicate the connection credentials in ``File/Settings/Appearance & Behaviour/System Settings/HTTP Proxy``
+
+**No monosat library in path** If you want to use the integrated interference computation please indicate the path to the
+dynamic library of monosat by editing your run configuration and adding to VM options ``Djava.library.path=yourPath``
diff --git a/doc/_docs/reference/usePML/index.md b/doc/_docs/reference/usePML/index.md
index e69de29..d590a59 100644
--- a/doc/_docs/reference/usePML/index.md
+++ b/doc/_docs/reference/usePML/index.md
@@ -0,0 +1,22 @@
+---
+layout: index
+---
+
+There is no installation procedure for the PML analyzer itself, simply
+create your own model by importing the ``pml.model`` package containing the basic constructors
+of the PML language.
+
+The possible operation that can be performed on a PML model (such as linking
+or unlinking entities) are provided in the ``pml.operators`` package.
+
+Exporters to [yuml](https://yuml.me/diagram) and [graphviz](http://www.graphviz.org/) are provided in the ``pml.exporters`` package.
+
+The compilation of a PML model can be easily perform with [SBT](https://www.scala-sbt.org/)
++ First launch sbt in the project repository (this operation may take some time)
+```sbtshell
+ sbt
+```
++ Once sbt is ready to receive command launch the compilation and execution of your PML model
+```sbtshell
+ runMain pathToYourModel
+ ```
\ No newline at end of file
diff --git a/doc/_docs/reference/usePML/pml_examples.md b/doc/_docs/reference/usePML/pml_examples.md
index e69de29..981bbdc 100644
--- a/doc/_docs/reference/usePML/pml_examples.md
+++ b/doc/_docs/reference/usePML/pml_examples.md
@@ -0,0 +1,61 @@
+---
+layout: doc-page
+title: "Use PML by the examples"
+---
+
+#### Argumentation patterns
+
+The justification patterns considered for the CAST32-A are provided in the ``views.patterns`` package.
+These patterns can be used as a starting point to start your argumentation activity.
+
+To compile and run the PHYLOG patterns example please enter the following commands:
+```sbtshell
+ sbt runMain views.patterns.examples.PhylogPatterns
+```
+
+To compile and run the PHYLOG pattern instances example please enter the following commands:
+```sbtshell
+ sbt runMain views.patterns.examples.PhylogPatternsInstances
+```
+
+
+#### Modelling
+Various benchmark systems for platform modeling are provided
+in the ``pml.examples`` package. These benchmarks can be used as a starting point to
+your modeling activity.
+
+To compile and run the Keystone example please enter the following commands:
+```sbtshell
+ sbt runMain pml.examples.keystone.KeystoneExport
+```
+
+To compile and run the SimplePlatform example please enter the following commands:
+```sbtshell
+ sbt runMain pml.examples.simple.SimpleExport
+```
+
+Documentation is available [here](example/simpleKeystone/index.md)
+
+#### Analysis
+For each view (interference, patterns and dependability) examples are provided in the dedicated ``views.X.examples``.
+These benchmarks can be used as a starting point to
+your analysis activity. For instance, we can carry out the interference analysis of the Keystone platform with
+ ```sbtshell
+ # example of a PML model where an IDP interference model is generated
+ sbt runMain views.interference.examples.KeystoneExport
+
+ # example of a PML model where a Cecilia export is generated
+sbt runMain views.dependability.examples.KeystoneExport
+ ```
+
+If the tool is running on a Unix System you can use the Makefile to compile the DOT and LaTeX generated file:
+```shell
+# compile the DOT files
+make pml
+
+# compile the LaTeX Argumentation Patterns
+make patterns
+
+# transform PDF to PNG
+make png
+```
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