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[BUG] Incorrect handling of NaN-boxed value for Single-Precision Floating-Point SQRT #2450

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riscv914 opened this issue Aug 15, 2024 · 0 comments
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notCV32A65X It is not an CV32A65X issue PARAM:FPU Issue depends on the FPU parameter Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system

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@riscv914
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Is there an existing CVA6 bug for this?

  • I have searched the existing bug issues

Bug Description

Executing Single-Precision Floating-Point SQRT by an invalid NaN-boxed value (a value that most significant 32 bits are not set to 1) will result in boxed single precision floating point value 0xffffffff00000000 which is incorrect. Based on specification, the result should be a 32-bit canonical NaN.
Reference: https://github.com/riscv/riscv-isa-manual/blob/main/src/d-st-ext.adoc#nan-boxing-of-narrower-values

Execute following instruction:

int main(void){
    asm volatile ("lui  t0, 0x3d0f4"); // t0  :000000003d0f4000
    asm volatile ("fcvt.d.w ft5, t0"); // ft5 :41ce87a000000000 
    asm volatile ("fsqrt.s  fa5, ft5"); // fa5 :ffffffff00000000
    asm volatile ("csrr     gp, fflags");
}

However, if you execute same code on Spike you will get ft5=0xffffffff7fc00000.

- Spike version: `1.1.1-dev`
- version: `CVA6 commit: 7435cb310ee98c246edd15d00ec236ad2c6ff490`
- OS: `CentOS Linux release 7.9.2009 kernel: 5.15.0-78-generic`
- Simulator: `VCS_2023`
@riscv914 riscv914 added the Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system label Aug 15, 2024
@JeanRochCoulon JeanRochCoulon added the notCV32A65X It is not an CV32A65X issue label Aug 18, 2024
@JeanRochCoulon JeanRochCoulon added the PARAM:FPU Issue depends on the FPU parameter label Sep 22, 2024
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Labels
notCV32A65X It is not an CV32A65X issue PARAM:FPU Issue depends on the FPU parameter Type:Bug For bugs in the RTL, Documentation, Verification environment or Tool and Build system
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