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30 changes: 15 additions & 15 deletions src/hotspot/cpu/aarch64/aarch64.ad
Original file line number Diff line number Diff line change
Expand Up @@ -1266,20 +1266,20 @@ source %{
// adlc register classes to make AArch64 rheapbase (r27) and rfp (r29)
// registers conditionally reserved.

_ANY_REG32_mask = _ALL_REG32_mask;
_ANY_REG32_mask.assignFrom(_ALL_REG32_mask);
_ANY_REG32_mask.remove(OptoReg::as_OptoReg(r31_sp->as_VMReg()));

_ANY_REG_mask = _ALL_REG_mask;
_ANY_REG_mask.assignFrom(_ALL_REG_mask);

_PTR_REG_mask = _ALL_REG_mask;
_PTR_REG_mask.assignFrom(_ALL_REG_mask);

_NO_SPECIAL_REG32_mask = _ALL_REG32_mask;
_NO_SPECIAL_REG32_mask.assignFrom(_ALL_REG32_mask);
_NO_SPECIAL_REG32_mask.subtract(_NON_ALLOCATABLE_REG32_mask);

_NO_SPECIAL_REG_mask = _ALL_REG_mask;
_NO_SPECIAL_REG_mask.assignFrom(_ALL_REG_mask);
_NO_SPECIAL_REG_mask.subtract(_NON_ALLOCATABLE_REG_mask);

_NO_SPECIAL_PTR_REG_mask = _ALL_REG_mask;
_NO_SPECIAL_PTR_REG_mask.assignFrom(_ALL_REG_mask);
_NO_SPECIAL_PTR_REG_mask.subtract(_NON_ALLOCATABLE_REG_mask);

// r27 is not allocatable when compressed oops is on and heapbase is not
Expand All @@ -1297,7 +1297,7 @@ source %{
_NO_SPECIAL_PTR_REG_mask.remove(OptoReg::as_OptoReg(r29->as_VMReg()));
}

_NO_SPECIAL_NO_RFP_PTR_REG_mask = _NO_SPECIAL_PTR_REG_mask;
_NO_SPECIAL_NO_RFP_PTR_REG_mask.assignFrom(_NO_SPECIAL_PTR_REG_mask);
_NO_SPECIAL_NO_RFP_PTR_REG_mask.remove(OptoReg::as_OptoReg(r29->as_VMReg()));
}

Expand Down Expand Up @@ -2545,27 +2545,27 @@ bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
return false;
}

RegMask Matcher::divI_proj_mask() {
const RegMask& Matcher::divI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODI projection of divmodI.
RegMask Matcher::modI_proj_mask() {
const RegMask& Matcher::modI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for DIVL projection of divmodL.
RegMask Matcher::divL_proj_mask() {
const RegMask& Matcher::divL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODL projection of divmodL.
RegMask Matcher::modL_proj_mask() {
const RegMask& Matcher::modL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

bool size_fits_all_mem_uses(AddPNode* addp, int shift) {
Expand Down
16 changes: 8 additions & 8 deletions src/hotspot/cpu/arm/arm.ad
Original file line number Diff line number Diff line change
Expand Up @@ -1131,27 +1131,27 @@ bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
}

// Register for DIVI projection of divmodI
RegMask Matcher::divI_proj_mask() {
const RegMask& Matcher::divI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODI projection of divmodI
RegMask Matcher::modI_proj_mask() {
const RegMask& Matcher::modI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for DIVL projection of divmodL
RegMask Matcher::divL_proj_mask() {
const RegMask& Matcher::divL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODL projection of divmodL
RegMask Matcher::modL_proj_mask() {
const RegMask& Matcher::modL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

bool maybe_far_call(const CallNode *n) {
Expand Down
16 changes: 8 additions & 8 deletions src/hotspot/cpu/ppc/ppc.ad
Original file line number Diff line number Diff line change
Expand Up @@ -2450,27 +2450,27 @@ bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
}

// Register for DIVI projection of divmodI.
RegMask Matcher::divI_proj_mask() {
const RegMask& Matcher::divI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODI projection of divmodI.
RegMask Matcher::modI_proj_mask() {
const RegMask& Matcher::modI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for DIVL projection of divmodL.
RegMask Matcher::divL_proj_mask() {
const RegMask& Matcher::divL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODL projection of divmodL.
RegMask Matcher::modL_proj_mask() {
const RegMask& Matcher::modL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

%}
Expand Down
30 changes: 15 additions & 15 deletions src/hotspot/cpu/riscv/riscv.ad
Original file line number Diff line number Diff line change
Expand Up @@ -1092,22 +1092,22 @@ RegMask _NO_SPECIAL_NO_FP_PTR_REG_mask;

void reg_mask_init() {

_ANY_REG32_mask = _ALL_REG32_mask;
_ANY_REG32_mask.assignFrom(_ALL_REG32_mask);
_ANY_REG32_mask.remove(OptoReg::as_OptoReg(x0->as_VMReg()));

_ANY_REG_mask = _ALL_REG_mask;
_ANY_REG_mask.assignFrom(_ALL_REG_mask);
_ANY_REG_mask.subtract(_ZR_REG_mask);

_PTR_REG_mask = _ALL_REG_mask;
_PTR_REG_mask.assignFrom(_ALL_REG_mask);
_PTR_REG_mask.subtract(_ZR_REG_mask);

_NO_SPECIAL_REG32_mask = _ALL_REG32_mask;
_NO_SPECIAL_REG32_mask.assignFrom(_ALL_REG32_mask);
_NO_SPECIAL_REG32_mask.subtract(_NON_ALLOCATABLE_REG32_mask);

_NO_SPECIAL_REG_mask = _ALL_REG_mask;
_NO_SPECIAL_REG_mask.assignFrom(_ALL_REG_mask);
_NO_SPECIAL_REG_mask.subtract(_NON_ALLOCATABLE_REG_mask);

_NO_SPECIAL_PTR_REG_mask = _ALL_REG_mask;
_NO_SPECIAL_PTR_REG_mask.assignFrom(_ALL_REG_mask);
_NO_SPECIAL_PTR_REG_mask.subtract(_NON_ALLOCATABLE_REG_mask);

// x27 is not allocatable when compressed oops is on
Expand All @@ -1124,7 +1124,7 @@ void reg_mask_init() {
_NO_SPECIAL_PTR_REG_mask.remove(OptoReg::as_OptoReg(x8->as_VMReg()));
}

_NO_SPECIAL_NO_FP_PTR_REG_mask = _NO_SPECIAL_PTR_REG_mask;
_NO_SPECIAL_NO_FP_PTR_REG_mask.assignFrom(_NO_SPECIAL_PTR_REG_mask);
_NO_SPECIAL_NO_FP_PTR_REG_mask.remove(OptoReg::as_OptoReg(x8->as_VMReg()));
}

Expand Down Expand Up @@ -2129,27 +2129,27 @@ bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
return false;
}

RegMask Matcher::divI_proj_mask() {
const RegMask& Matcher::divI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODI projection of divmodI.
RegMask Matcher::modI_proj_mask() {
const RegMask& Matcher::modI_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for DIVL projection of divmodL.
RegMask Matcher::divL_proj_mask() {
const RegMask& Matcher::divL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

// Register for MODL projection of divmodL.
RegMask Matcher::modL_proj_mask() {
const RegMask& Matcher::modL_proj_mask() {
ShouldNotReachHere();
return RegMask();
return RegMask::EMPTY;
}

bool size_fits_all_mem_uses(AddPNode* addp, int shift) {
Expand Down
8 changes: 4 additions & 4 deletions src/hotspot/cpu/s390/s390.ad
Original file line number Diff line number Diff line change
Expand Up @@ -1961,22 +1961,22 @@ bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
}

// Register for DIVI projection of divmodI
RegMask Matcher::divI_proj_mask() {
const RegMask& Matcher::divI_proj_mask() {
return _Z_RARG4_INT_REG_mask;
}

// Register for MODI projection of divmodI
RegMask Matcher::modI_proj_mask() {
const RegMask& Matcher::modI_proj_mask() {
return _Z_RARG3_INT_REG_mask;
}

// Register for DIVL projection of divmodL
RegMask Matcher::divL_proj_mask() {
const RegMask& Matcher::divL_proj_mask() {
return _Z_RARG4_LONG_REG_mask;
}

// Register for MODL projection of divmodL
RegMask Matcher::modL_proj_mask() {
const RegMask& Matcher::modL_proj_mask() {
return _Z_RARG3_LONG_REG_mask;
}

Expand Down
42 changes: 21 additions & 21 deletions src/hotspot/cpu/x86/x86_64.ad
Original file line number Diff line number Diff line change
Expand Up @@ -497,7 +497,7 @@ void reg_mask_init() {

// _ALL_REG_mask is generated by adlc from the all_reg register class below.
// We derive a number of subsets from it.
_ANY_REG_mask = _ALL_REG_mask;
_ANY_REG_mask.assignFrom(_ALL_REG_mask);

if (PreserveFramePointer) {
_ANY_REG_mask.remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
Expand All @@ -508,7 +508,7 @@ void reg_mask_init() {
_ANY_REG_mask.remove(OptoReg::as_OptoReg(r12->as_VMReg()->next()));
}

_PTR_REG_mask = _ANY_REG_mask;
_PTR_REG_mask.assignFrom(_ANY_REG_mask);
_PTR_REG_mask.remove(OptoReg::as_OptoReg(rsp->as_VMReg()));
_PTR_REG_mask.remove(OptoReg::as_OptoReg(rsp->as_VMReg()->next()));
_PTR_REG_mask.remove(OptoReg::as_OptoReg(r15->as_VMReg()));
Expand All @@ -520,43 +520,43 @@ void reg_mask_init() {
}
}

_STACK_OR_PTR_REG_mask = _PTR_REG_mask;
_STACK_OR_PTR_REG_mask.assignFrom(_PTR_REG_mask);
_STACK_OR_PTR_REG_mask.or_with(STACK_OR_STACK_SLOTS_mask());

_PTR_REG_NO_RBP_mask = _PTR_REG_mask;
_PTR_REG_NO_RBP_mask.assignFrom(_PTR_REG_mask);
_PTR_REG_NO_RBP_mask.remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
_PTR_REG_NO_RBP_mask.remove(OptoReg::as_OptoReg(rbp->as_VMReg()->next()));

_PTR_NO_RAX_REG_mask = _PTR_REG_mask;
_PTR_NO_RAX_REG_mask.assignFrom(_PTR_REG_mask);
_PTR_NO_RAX_REG_mask.remove(OptoReg::as_OptoReg(rax->as_VMReg()));
_PTR_NO_RAX_REG_mask.remove(OptoReg::as_OptoReg(rax->as_VMReg()->next()));

_PTR_NO_RAX_RBX_REG_mask = _PTR_NO_RAX_REG_mask;
_PTR_NO_RAX_RBX_REG_mask.assignFrom(_PTR_NO_RAX_REG_mask);
_PTR_NO_RAX_RBX_REG_mask.remove(OptoReg::as_OptoReg(rbx->as_VMReg()));
_PTR_NO_RAX_RBX_REG_mask.remove(OptoReg::as_OptoReg(rbx->as_VMReg()->next()));


_LONG_REG_mask = _PTR_REG_mask;
_STACK_OR_LONG_REG_mask = _LONG_REG_mask;
_LONG_REG_mask.assignFrom(_PTR_REG_mask);
_STACK_OR_LONG_REG_mask.assignFrom(_LONG_REG_mask);
_STACK_OR_LONG_REG_mask.or_with(STACK_OR_STACK_SLOTS_mask());

_LONG_NO_RAX_RDX_REG_mask = _LONG_REG_mask;
_LONG_NO_RAX_RDX_REG_mask.assignFrom(_LONG_REG_mask);
_LONG_NO_RAX_RDX_REG_mask.remove(OptoReg::as_OptoReg(rax->as_VMReg()));
_LONG_NO_RAX_RDX_REG_mask.remove(OptoReg::as_OptoReg(rax->as_VMReg()->next()));
_LONG_NO_RAX_RDX_REG_mask.remove(OptoReg::as_OptoReg(rdx->as_VMReg()));
_LONG_NO_RAX_RDX_REG_mask.remove(OptoReg::as_OptoReg(rdx->as_VMReg()->next()));

_LONG_NO_RCX_REG_mask = _LONG_REG_mask;
_LONG_NO_RCX_REG_mask.assignFrom(_LONG_REG_mask);
_LONG_NO_RCX_REG_mask.remove(OptoReg::as_OptoReg(rcx->as_VMReg()));
_LONG_NO_RCX_REG_mask.remove(OptoReg::as_OptoReg(rcx->as_VMReg()->next()));

_LONG_NO_RBP_R13_REG_mask = _LONG_REG_mask;
_LONG_NO_RBP_R13_REG_mask.assignFrom(_LONG_REG_mask);
_LONG_NO_RBP_R13_REG_mask.remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
_LONG_NO_RBP_R13_REG_mask.remove(OptoReg::as_OptoReg(rbp->as_VMReg()->next()));
_LONG_NO_RBP_R13_REG_mask.remove(OptoReg::as_OptoReg(r13->as_VMReg()));
_LONG_NO_RBP_R13_REG_mask.remove(OptoReg::as_OptoReg(r13->as_VMReg()->next()));

_INT_REG_mask = _ALL_INT_REG_mask;
_INT_REG_mask.assignFrom(_ALL_INT_REG_mask);
if (!UseAPX) {
for (uint i = 0; i < sizeof(egprs)/sizeof(Register); i++) {
_INT_REG_mask.remove(OptoReg::as_OptoReg(egprs[i]->as_VMReg()));
Expand All @@ -570,23 +570,23 @@ void reg_mask_init() {
_INT_REG_mask.remove(OptoReg::as_OptoReg(r12->as_VMReg()));
}

_STACK_OR_INT_REG_mask = _INT_REG_mask;
_STACK_OR_INT_REG_mask.assignFrom(_INT_REG_mask);
_STACK_OR_INT_REG_mask.or_with(STACK_OR_STACK_SLOTS_mask());

_INT_NO_RAX_RDX_REG_mask = _INT_REG_mask;
_INT_NO_RAX_RDX_REG_mask.assignFrom(_INT_REG_mask);
_INT_NO_RAX_RDX_REG_mask.remove(OptoReg::as_OptoReg(rax->as_VMReg()));
_INT_NO_RAX_RDX_REG_mask.remove(OptoReg::as_OptoReg(rdx->as_VMReg()));

_INT_NO_RCX_REG_mask = _INT_REG_mask;
_INT_NO_RCX_REG_mask.assignFrom(_INT_REG_mask);
_INT_NO_RCX_REG_mask.remove(OptoReg::as_OptoReg(rcx->as_VMReg()));

_INT_NO_RBP_R13_REG_mask = _INT_REG_mask;
_INT_NO_RBP_R13_REG_mask.assignFrom(_INT_REG_mask);
_INT_NO_RBP_R13_REG_mask.remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
_INT_NO_RBP_R13_REG_mask.remove(OptoReg::as_OptoReg(r13->as_VMReg()));

// _FLOAT_REG_LEGACY_mask/_FLOAT_REG_EVEX_mask is generated by adlc
// from the float_reg_legacy/float_reg_evex register class.
_FLOAT_REG_mask = VM_Version::supports_evex() ? _FLOAT_REG_EVEX_mask : _FLOAT_REG_LEGACY_mask;
_FLOAT_REG_mask.assignFrom(VM_Version::supports_evex() ? _FLOAT_REG_EVEX_mask : _FLOAT_REG_LEGACY_mask);
}

static bool generate_vzeroupper(Compile* C) {
Expand Down Expand Up @@ -1678,22 +1678,22 @@ bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
}

// Register for DIVI projection of divmodI
RegMask Matcher::divI_proj_mask() {
const RegMask& Matcher::divI_proj_mask() {
return INT_RAX_REG_mask();
}

// Register for MODI projection of divmodI
RegMask Matcher::modI_proj_mask() {
const RegMask& Matcher::modI_proj_mask() {
return INT_RDX_REG_mask();
}

// Register for DIVL projection of divmodL
RegMask Matcher::divL_proj_mask() {
const RegMask& Matcher::divL_proj_mask() {
return LONG_RAX_REG_mask();
}

// Register for MODL projection of divmodL
RegMask Matcher::modL_proj_mask() {
const RegMask& Matcher::modL_proj_mask() {
return LONG_RDX_REG_mask();
}

Expand Down
2 changes: 1 addition & 1 deletion src/hotspot/share/opto/chaitin.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -128,7 +128,7 @@ class LRG : public ResourceObj {
// count of bits in the current mask.
int get_invalid_mask_size() const { return _mask_size; }
const RegMask &mask() const { return _mask; }
void set_mask( const RegMask &rm ) { _mask = rm; DEBUG_ONLY(_msize_valid=0;)}
void set_mask(const RegMask& rm) { _mask.assignFrom(rm); DEBUG_ONLY(_msize_valid = 0;) }
void init_mask(Arena* arena) { new (&_mask) RegMask(arena); }
void and_with( const RegMask &rm ) { _mask.and_with(rm); DEBUG_ONLY(_msize_valid=0;)}
void subtract( const RegMask &rm ) { _mask.subtract(rm); DEBUG_ONLY(_msize_valid=0;)}
Expand Down
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