diff --git a/cores/arduino/HardwareTimer.cpp b/cores/arduino/HardwareTimer.cpp new file mode 100644 index 0000000..78d6398 --- /dev/null +++ b/cores/arduino/HardwareTimer.cpp @@ -0,0 +1,1780 @@ +/* + Copyright (c) 2017 Daniel Fekete + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in all + copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + SOFTWARE. + + Copyright (c) 2019 STMicroelectronics + Modified to support Arduino_Core_STM32 + + Modified by TempersLee to support Adruino_Core_CH32 +*/ + +#include "Arduino.h" +#include "HardwareTimer.h" + +#if defined(TIM_MODULE_ENABLED) && !defined(TIM_MODULE_ONLY) + +/* Private Defines */ +#define PIN_NOT_USED 0xFF +#define MAX_RELOAD ((1 << 16) - 1) // Currently even 32b timers are used as 16b to have generic behavior + +/* Private Variables */ +timerObj_t *HardwareTimer_Handle[TIMER_NUM] = {NULL}; + +/** + * @brief HardwareTimer constructor: make uninitialized timer + * Before calling any methods, call setup to select and setup + * the timer to be used. + * @retval None + */ +HardwareTimer::HardwareTimer() +{ + _timerObj.handle.Instance = nullptr; +} + +/** + * @brief HardwareTimer constructor: set default configuration values + * The timer will be usable directly, there is no need to call + * setup(). Using this constructor is not recommended for + * global variables that are automatically initialized at + * startup, since this will happen to early to report any + * errors. Better use the argumentless constructor and call the + * setup() method during initialization later. + * @param Timer instance ex: TIM1, ... + * @retval None + */ +HardwareTimer::HardwareTimer(TIM_TypeDef *instance) +{ + _timerObj.handle.Instance = nullptr; + setup(instance); + +#ifdef TIM1_BASE + NVIC_EnableIRQ(TIM1_UP_IRQn); + NVIC_EnableIRQ(TIM1_CC_IRQn); +#endif + +#ifdef TIM2_BASE + NVIC_EnableIRQ(TIM2_IRQn); +#endif + +#ifdef TIM3_BASE + NVIC_EnableIRQ(TIM3_IRQn); +#endif + +#ifdef TIM4_BASE + NVIC_EnableIRQ(TIM4_IRQn); +#endif + +#ifdef CH32V30x + +#ifdef TIM5_BASE + NVIC_EnableIRQ(TIM5_IRQn); +#endif + +#ifdef TIM6_BASE + NVIC_EnableIRQ(TIM6_IRQn); +#endif + +#ifdef TIM7_BASE + NVIC_EnableIRQ(TIM7_IRQn); +#endif + +#ifdef TIM8_BASE + NVIC_EnableIRQ(TIM8_UP_IRQn); + NVIC_EnableIRQ(TIM8_CC_IRQn); +#endif + +#ifdef TIM9_BASE + NVIC_EnableIRQ(TIM9_UP_IRQn); + NVIC_EnableIRQ(TIM9_CC_IRQn); +#endif + +#ifdef TIM10_BASE + NVIC_EnableIRQ(TIM10_UP_IRQn); + NVIC_EnableIRQ(TIM10_CC_IRQn); +#endif + +#endif + +} + +/** + * @brief HardwareTimer setup: configuration values. Must be called + * exactly once before any other methods, except when an instance is + * passed to the constructor. + * @param Timer instance ex: TIM1, ... + * @retval None + */ +void HardwareTimer::setup(TIM_TypeDef *instance) +{ + uint32_t index = get_timer_index(instance); + if (index == UNKNOWN_TIMER) { + Error_Handler(); + } + + // Already initialized? + if (_timerObj.handle.Instance) { + Error_Handler(); + } + + HardwareTimer_Handle[index] = &_timerObj; + + _timerObj.handle.Instance = instance; + + _timerObj.__this = (void *)this; + _timerObj.preemptPriority = TIM_IRQ_PRIO; + _timerObj.subPriority = TIM_IRQ_SUBPRIO; + _timerObj.handle.Init={0}; + /* Enable timer clock. Even if it is also done in HAL_TIM_Base_MspInit(), + it is done there so that it is possible to write registers right now */ + enableTimerClock(&(_timerObj.handle)); + // Initialize NULL callbacks + for (int i = 0; i < TIMER_CHANNELS + 1 ; i++) { + callbacks[i] = NULL; + } + + // Initialize channel mode and complementary + for (int i = 0; i < TIMER_CHANNELS; i++) { +#if defined(TIM_CC1NE) + isComplementaryChannel[i] = false; //如果有互补通道定义 +#endif + _ChannelMode[i] = TIMER_DISABLED; + } + + /* Configure timer with some default values */ + + _timerObj.handle.Init.TIM_Prescaler = 0; + _timerObj.handle.Init.TIM_Period = MAX_RELOAD; + _timerObj.handle.Init.TIM_CounterMode = TIM_CounterMode_Up; + _timerObj.handle.Init.TIM_ClockDivision = TIM_CKD_DIV1; + + +#if defined(TIM_RCR_REP) + _timerObj.handle.Init.TIM_RepetitionCounter = 0; +#endif + TIM_ARRPreloadConfig( _timerObj.handle.Instance, ENABLE ); + TIM_TimeBaseInit( _timerObj.handle.Instance, &_timerObj.handle.Init); + +} + + +/** + * @brief Pause HardwareTimer: stop timer + * @param None + * @retval None + */ +void HardwareTimer::pause() +{ + // Disable all IT + TIM_ITConfig(_timerObj.handle.Instance, TIM_IT_Update|TIM_IT_CC1|TIM_IT_CC2|TIM_IT_CC3|TIM_IT_CC4, DISABLE); + // Stop timer. Required to restore HAL State: HAL_TIM_STATE_READY + TIM_Cmd(_timerObj.handle.Instance,DISABLE); +} + +/** + * @brief Pause only one channel. + * Timer is still running but channel is disabled (output and interrupt) + * @param Arduino channel [1..4] + * @retval None + */ +void HardwareTimer::pauseChannel(uint32_t channel) +{ + int timAssociatedInputChannel; + int LLChannel = getLLChannel(channel); + if (LLChannel == -1) { + Error_Handler(); + } + + int interrupt = getIT(channel); + if (interrupt == -1) { + Error_Handler(); + } + + // Disable channel and corresponding interrupt + TIM_ITConfig(_timerObj.handle.Instance, interrupt, DISABLE); + TIM_CCxCmd(_timerObj.handle.Instance,LLChannel,TIM_CCx_Disable); + +#if defined(TIM_CHANNEL_STATE_SET) + /* Starting from G4, new Channel state implementation prevents to restart a channel, + if the channel has not been explicitly be stopped with HAL interface */ +#if defined(TIM_CHANNEL_N_STATE_SET) + if (isComplementaryChannel[channel - 1]) + { + // TIM_CHANNEL_N_STATE_SET(&(_timerObj.handle), getChannel(channel), HAL_TIM_CHANNEL_STATE_READY); + } + else +#endif + { + // TIM_CHANNEL_STATE_SET(&(_timerObj.handle), getChannel(channel), HAL_TIM_CHANNEL_STATE_READY); + } +#endif + + // In case 2 channels are used, disable also the 2nd one + if (_ChannelMode[channel - 1] == TIMER_INPUT_FREQ_DUTY_MEASUREMENT) + { + // Identify and configure 2nd associated channel + timAssociatedInputChannel = getAssociatedChannel(channel); + TIM_ITConfig(_timerObj.handle.Instance, getIT(timAssociatedInputChannel), DISABLE); + TIM_CCxCmd(_timerObj.handle.Instance,getLLChannel(timAssociatedInputChannel),TIM_CCx_Disable); + } +} + +/** + * @brief Start or resume HardwareTimer: all channels are resumed, interrupts are enabled if necessary + * @param None + * @retval None + */ +void HardwareTimer::resume(void) +{ + // Clear flag and enable IT + if (callbacks[0]) // 0 for update + { + TIM_ClearFlag(_timerObj.handle.Instance,TIM_FLAG_Update ); + TIM_ITConfig(_timerObj.handle.Instance, TIM_IT_Update, ENABLE); + // Start timer in Time base mode. Required when there is no channel used but only update interrupt. + TIM_Cmd(_timerObj.handle.Instance, ENABLE ); + } + // Resume all channels + resumeChannel(1); + resumeChannel(2); + resumeChannel(3); + resumeChannel(4); +} + +/** + * @brief Convert arduino channel into HAL channel + * @param Arduino channel [1..4] + * @retval HAL channel. return -1 if arduino channel is invalid + */ + //CHANNEL +int HardwareTimer::getChannel(uint32_t channel) +{ + uint32_t return_value; + + switch (channel) { + case 1: + return_value = TIM_Channel_1; + break; + case 2: + return_value = TIM_Channel_2; + break; + case 3: + return_value = TIM_Channel_3; + break; + case 4: + return_value = TIM_Channel_4; + break; + default: + return_value = -1; + } + return return_value; +} + +/** + * @brief Convert arduino channel into LL channel + * @param Arduino channel [1..4] + * @retval LL channel. return -1 if arduino channel is invalid + */ + //CHANNEL P or N +int HardwareTimer::getLLChannel(uint32_t channel) +{ + uint32_t return_value; +#if defined(TIM_CC1NE) + if (isComplementaryChannel[channel - 1]) { + // Complementary channel + switch (channel) { + case 1: + return_value = TIM_CHANNEL_CH1N; + break; + case 2: + return_value = TIM_CHANNEL_CH2N; + break; + case 3: + return_value = TIM_CHANNEL_CH3N; + break; +#if defined(TIM_CHANNEL_CH4N) + case 4: + return_value = TIM_CHANNEL_CH4N; + break; +#endif + default: + return_value = -1; + } + } + else +#endif + { + // Regular channel not complementary + switch (channel) { + case 1: + return_value = TIM_CHANNEL_CH1; + break; + case 2: + return_value = TIM_CHANNEL_CH2; + break; + case 3: + return_value = TIM_CHANNEL_CH3; + break; + case 4: + return_value = TIM_CHANNEL_CH4; + break; + default: + return_value = -1; + } + } + return return_value; +} + +/** + * @brief Convert arduino channel into HAL Interrupt ID + * @param Arduino channel [1..4] + * @retval HAL channel. return -1 if arduino channel is invalid + */ +int HardwareTimer::getIT(uint32_t channel) +{ + uint32_t return_value; + + switch (channel) { + case 1: + return_value = TIM_IT_CC1; + break; + case 2: + return_value = TIM_IT_CC2; + break; + case 3: + return_value = TIM_IT_CC3; + break; + case 4: + return_value = TIM_IT_CC4; + break; + default: + return_value = -1; + } + return return_value; +} + +/** + * @brief Get input associated channel + * Channel 1 and 2 are associated; channel 3 and 4 are associated + * @param Arduino channel [1..4] + * @retval HAL channel. return -1 if arduino channel is invalid + */ +int HardwareTimer::getAssociatedChannel(uint32_t channel) +{ + int timAssociatedInputChannel = -1; + switch (channel) { + case 1: + timAssociatedInputChannel = 2; + break; + case 2: + timAssociatedInputChannel = 1; + break; + case 3: + timAssociatedInputChannel = 4; + break; + case 4: + timAssociatedInputChannel = 3; + break; + default: + break; + } + return timAssociatedInputChannel; +} + +/** + * @brief Configure specified channel and resume/start timer + * @param Arduino channel [1..4] + * @retval None + */ +void HardwareTimer::resumeChannel(uint32_t channel) +{ + int timChannel = getChannel(channel); + int timAssociatedInputChannel; + if (timChannel == -1) { + Error_Handler(); + } + + int interrupt = getIT(channel); + if (interrupt == -1) { + Error_Handler(); + } + + int LLChannel = getLLChannel(channel); + if (LLChannel == -1) { + Error_Handler(); + } + + // Clear flag and enable IT + if (callbacks[channel]) { + TIM_ClearFlag(_timerObj.handle.Instance,interrupt ); + TIM_ITConfig(_timerObj.handle.Instance, interrupt, ENABLE); + } + + switch (_ChannelMode[channel - 1]) + { + case TIMER_OUTPUT_COMPARE_PWM1: + case TIMER_OUTPUT_COMPARE_PWM2: + { +#if defined(TIM_CC1NE) + if (isComplementaryChannel[channel - 1]) + { + TIM_CCxNCmd( _timerObj.handle.Instance, timChannel, TIM_CCxN_Enable ); + _timerObj.handle.Instance->BDTR |= TIM_MOE; //MOE ENABLE + TIM_Cmd( _timerObj.handle.Instance, ENABLE ); + } + else +#endif + { + TIM_CCxCmd( _timerObj.handle.Instance, timChannel, TIM_CCx_Enable ); + _timerObj.handle.Instance->BDTR |= TIM_MOE; //MOE ENABLE + TIM_Cmd( _timerObj.handle.Instance, ENABLE ); + } + } + break; + case TIMER_OUTPUT_COMPARE_ACTIVE: + case TIMER_OUTPUT_COMPARE_INACTIVE: + case TIMER_OUTPUT_COMPARE_TOGGLE: + case TIMER_OUTPUT_COMPARE_FORCED_ACTIVE: + case TIMER_OUTPUT_COMPARE_FORCED_INACTIVE: + { +#if defined(TIM_CC1NE) + if (isComplementaryChannel[channel - 1]) + { + // HAL_TIMEx_OCN_Start(&(_timerObj.handle), timChannel); + TIM_CCxNCmd( _timerObj.handle.Instance, timChannel, TIM_CCxN_Enable ); + _timerObj.handle.Instance->BDTR |= TIM_MOE; //MOE ENABLE + TIM_Cmd( _timerObj.handle.Instance, ENABLE ); + } + else +#endif + { + // HAL_TIM_OC_Start(&(_timerObj.handle), timChannel); + TIM_CCxCmd( _timerObj.handle.Instance, timChannel, TIM_CCx_Enable ); + _timerObj.handle.Instance->BDTR |= TIM_MOE; //MOE ENABLE + TIM_Cmd( _timerObj.handle.Instance, ENABLE ); + } + } + break; + case TIMER_INPUT_FREQ_DUTY_MEASUREMENT: { + TIM_CCxCmd( _timerObj.handle.Instance, timChannel, TIM_CCx_Enable ); + // Enable 2nd associated channel + //两个关联通道，配置为捕获通道 1 & 2 / 3 & 4 + timAssociatedInputChannel = getAssociatedChannel(channel); + TIM_CCxCmd( _timerObj.handle.Instance, getLLChannel(timAssociatedInputChannel), TIM_CCx_Enable ); + + _timerObj.handle.Instance->BDTR |= TIM_MOE; //MOE ENABLE + + TIM_Cmd( _timerObj.handle.Instance, ENABLE ); + if (callbacks[channel]) + { + TIM_ClearFlag(_timerObj.handle.Instance,getIT(timAssociatedInputChannel)); + TIM_ITConfig(_timerObj.handle.Instance,getIT(timAssociatedInputChannel),ENABLE); + } + } + break; + case TIMER_INPUT_CAPTURE_RISING: + case TIMER_INPUT_CAPTURE_FALLING: + case TIMER_INPUT_CAPTURE_BOTHEDGE: { + + TIM_CCxCmd( _timerObj.handle.Instance, timChannel, TIM_CCx_Enable ); + _timerObj.handle.Instance->BDTR |= TIM_MOE; //MOE ENABLE + TIM_Cmd( _timerObj.handle.Instance, ENABLE ); + // HAL_TIM_IC_Start(&(_timerObj.handle), timChannel); + } + break; + case TIMER_OUTPUT_COMPARE: + case TIMER_DISABLED: + if (!(_timerObj.handle.Instance->CTLR1 & TIM_CEN) ) //if not enable + { + TIM_Cmd( _timerObj.handle.Instance, ENABLE ) ; + } + break; + case TIMER_NOT_USED: + default : + break; + } +} + + +/** + * @brief Configure comparison output channels + * @param timerX, TIM_OCInitTypeDef, Arduino channel [1..4] + * @retval None + */ +void HardwareTimer::TIM_OC_ConfigChannel_Static(TIM_TypeDef *tim, TIM_OCInitTypeDef *sConfig, uint32_t Channel) +{ + switch (Channel) + { + case TIM_Channel_1: + { + /* Configure the TIM Channel 1 in Output Compare */ + TIM_OC1Init(tim,sConfig); + break; + } + + case TIM_Channel_2: + { + /* Configure the TIM Channel 2 in Output Compare */ + TIM_OC2Init(tim,sConfig); + break; + } + + case TIM_Channel_3: + { + /* Configure the TIM Channel 3 in Output Compare */ + TIM_OC3Init(tim,sConfig); + break; + } + + case TIM_Channel_4: + { + /* Configure the TIM Channel 4 in Output Compare */ + TIM_OC4Init(tim,sConfig); + break; + } + + default: + break; + } +} + +/** + * @brief Configure input capture channels + * @param timerX, TIM_ICInitTypeDef, Arduino channel [1..4] + * @retval None + */ +void HardwareTimer::TIM_IC_ConfigChannel_Static(TIM_TypeDef *tim, TIM_ICInitTypeDef *sConfig, uint32_t Channel) +{ + + sConfig->TIM_Channel = Channel; + + TIM_ICInit( tim, sConfig); + + if(Channel == TIM_Channel_1) + { + TIM_SetIC1Prescaler(tim, sConfig->TIM_ICPrescaler); + } + else if(Channel == TIM_Channel_2) + { + TIM_SetIC2Prescaler(tim, sConfig->TIM_ICPrescaler); + } + else if(Channel == TIM_Channel_3) + { + TIM_SetIC3Prescaler(tim, sConfig->TIM_ICPrescaler); + } + else + { + TIM_SetIC4Prescaler(tim, sConfig->TIM_ICPrescaler); + } + +} + + +/** + * @brief Retrieve prescaler from hardware register + * @param None + * @retval prescaler factor + */ +uint32_t HardwareTimer::getPrescaleFactor() +{ + // Hardware register correspond to prescaler-1. Example PSC register value 0 means divided by 1 + return (TIM_GetPrescaler( _timerObj.handle.Instance )+1); +} + +/** + * @brief Configure hardwareTimer prescaler + * @param prescaler factor + * @retval None + */ +void HardwareTimer::setPrescaleFactor(uint32_t prescaler) +{ + // Hardware register correspond to prescaler-1. Example PSC register value 0 means divided by 1 + _timerObj.handle.Instance->PSC = prescaler - 1; + updateRegistersIfNotRunning(_timerObj.handle.Instance); +} + +/** + * @brief Retrieve overflow (rollover) value from hardware register + * @param format of returned value. If omitted default format is Tick + * @retval overflow depending on format value: + * TICK_FORMAT: return number of tick for overflow + * MICROSEC_FORMAT: return number of microsecondes for overflow + * HERTZ_FORMAT: return frequency in hertz for overflow + */ +uint32_t HardwareTimer::getOverflow(TimerFormat_t format) +{ + // Hardware register correspond to period count-1. Example ARR register value 9 means period of 10 timer cycle + uint32_t ARR_RegisterValue = _timerObj.handle.Instance->ATRLR; + + uint32_t Prescalerfactor = TIM_GetPrescaler(_timerObj.handle.Instance) + 1; + uint32_t return_value; + switch (format) { + case MICROSEC_FORMAT: + return_value = (uint32_t)(((ARR_RegisterValue + 1) * Prescalerfactor * 1000000.0) / getTimerClkFreq()); + break; + case HERTZ_FORMAT: + return_value = (uint32_t)(getTimerClkFreq() / ((ARR_RegisterValue + 1) * Prescalerfactor)); + break; + case TICK_FORMAT: + default : + return_value = ARR_RegisterValue + 1; + break; + } + return return_value; +} + +/** + * @brief Set overflow (rollover) + * + * Note that by default, the new value will not be applied + * immediately, but become effective at the next update event + * (usually the next timer overflow). See setPreloadEnable() + * for controlling this behaviour. + * @param overflow: depend on format parameter + * @param format of overflow parameter. If omitted default format is Tick + * TICK_FORMAT: overflow is the number of tick for overflow + * MICROSEC_FORMAT: overflow is the number of microsecondes for overflow + * HERTZ_FORMAT: overflow is the frequency in hertz for overflow + * @retval None + */ +void HardwareTimer::setOverflow(uint32_t overflow, TimerFormat_t format) +{ + uint32_t ARR_RegisterValue; + uint32_t PeriodTicks; + uint32_t Prescalerfactor; + uint32_t period_cyc; + // Remark: Hardware register correspond to period count-1. Example ARR register value 9 means period of 10 timer cycle + switch (format) { + case MICROSEC_FORMAT: + period_cyc = overflow * (getTimerClkFreq() / 1000000); + Prescalerfactor = (period_cyc / 0x10000) + 1; + _timerObj.handle.Instance->PSC = Prescalerfactor - 1; + PeriodTicks = period_cyc / Prescalerfactor; + break; + case HERTZ_FORMAT: + period_cyc = getTimerClkFreq() / overflow; + Prescalerfactor = (period_cyc / 0x10000) + 1; + _timerObj.handle.Instance->PSC = Prescalerfactor - 1; + PeriodTicks = period_cyc / Prescalerfactor; + break; + case TICK_FORMAT: + default : + PeriodTicks = overflow; + break; + } + + if (PeriodTicks > 0) { + // The register specifies the maximum value, so the period is really one tick longer + ARR_RegisterValue = PeriodTicks - 1; + } else { + // But do not underflow in case a zero period was given somehow. + ARR_RegisterValue = 0; + } + _timerObj.handle.Instance->ATRLR = ARR_RegisterValue; + updateRegistersIfNotRunning(_timerObj.handle.Instance); +} + +/** + * @brief Retrieve timer counter value + * @param format of returned value. If omitted default format is Tick + * @retval overflow depending on format value: + * TICK_FORMAT: return number of tick for counter + * MICROSEC_FORMAT: return number of microsecondes for counter + * HERTZ_FORMAT: return frequency in hertz for counter + */ +uint32_t HardwareTimer::getCount(TimerFormat_t format) +{ + uint32_t CNT_RegisterValue = TIM_GetCounter(_timerObj.handle.Instance); + uint32_t Prescalerfactor = TIM_GetPrescaler(_timerObj.handle.Instance) + 1; + uint32_t return_value; + switch (format) { + case MICROSEC_FORMAT: + return_value = (uint32_t)((CNT_RegisterValue * Prescalerfactor * 1000000.0) / getTimerClkFreq()); + break; + case HERTZ_FORMAT: + return_value = (uint32_t)(getTimerClkFreq() / (CNT_RegisterValue * Prescalerfactor)); + break; + case TICK_FORMAT: + default : + return_value = CNT_RegisterValue; + break; + } + return return_value; +} + +/** + * @brief Set timer counter value + * @param counter: depend on format parameter + * @param format of overflow parameter. If omitted default format is Tick + * TICK_FORMAT: counter is the number of tick + * MICROSEC_FORMAT: counter is the number of microsecondes + * HERTZ_FORMAT: counter is the frequency in hertz + * @retval None + */ +void HardwareTimer::setCount(uint32_t counter, TimerFormat_t format) +{ + uint32_t CNT_RegisterValue; + uint32_t Prescalerfactor = TIM_GetPrescaler(_timerObj.handle.Instance) + 1; + switch (format) { + case MICROSEC_FORMAT: + CNT_RegisterValue = ((counter * (getTimerClkFreq() / 1000000)) / Prescalerfactor); + break; + case HERTZ_FORMAT: + CNT_RegisterValue = (uint32_t)(getTimerClkFreq() / (counter * Prescalerfactor)); + break; + case TICK_FORMAT: + default : + CNT_RegisterValue = counter; + break; + } + TIM_SetCounter(_timerObj.handle.Instance, CNT_RegisterValue); +} + +/** + * @brief Set channel mode + * @param channel: Arduino channel [1..4] + * @param mode: mode configuration for the channel (see TimerModes_t) + * @param pin: Arduino pin number, ex: D1, 1 or PA1 + * @retval None + */ +void HardwareTimer::setMode(uint32_t channel, TimerModes_t mode, uint32_t pin) +{ + setMode(channel, mode, digitalPinToPinName(pin)); +} + +/** + * @brief Set channel mode + * @param channel: Arduino channel [1..4] + * @param mode: mode configuration for the channel (see TimerModes_t) + * @param pin: pin name, ex: PB_0 + * @retval None + */ +void HardwareTimer::setMode(uint32_t channel, TimerModes_t mode, PinName pin) +{ + int timChannel = getChannel(channel); //get arduino channel-->timer channel + int timAssociatedInputChannel; + TIM_OCInitTypeDef channelOC={0}; + TIM_ICInitTypeDef channelIC={0}; + + if (timChannel == -1) { + Error_Handler(); + } + + /* Configure some default values. Maybe overwritten later */ + channelOC.TIM_OCMode = TIMER_NOT_USED; //set default value 0xFFFF + + // channelOC.Pulse = __HAL_TIM_GET_COMPARE(&(_timerObj.handle), timChannel); // keep same value already written in hardware register + channelOC.TIM_Pulse = (((timChannel) == TIM_Channel_1) ? (_timerObj.handle.Instance->CH1CVR) :\ + ((timChannel) == TIM_Channel_2) ? (_timerObj.handle.Instance->CH2CVR) :\ + ((timChannel) == TIM_Channel_3) ? (_timerObj.handle.Instance->CH3CVR) :\ + (_timerObj.handle.Instance->CH4CVR)); + + channelOC.TIM_OCPolarity = TIM_OCPolarity_High; +#if defined(TIM_OIS1) + channelOC.TIM_OCIdleState = TIM_OSSIState_Disable; +#endif +#if defined(TIM_CC1NE) + channelOC.TIM_OCNPolarity = TIM_OCNPolarity_High; +#if defined(TIM_OIS1N) + channelOC.TIM_OCNIdleState = TIM_OCNIdleState_Reset; +#endif +#endif + channelIC.TIM_ICPolarity = TIM_ICPolarity_Rising; + channelIC.TIM_ICSelection = TIM_ICSelection_DirectTI; + channelIC.TIM_ICPrescaler = TIM_ICPSC_DIV1; + channelIC.TIM_ICFilter = 0; + + switch (mode) { + case TIMER_DISABLED: + channelOC.TIM_OCMode = TIM_OCMode_Timing; + + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + case TIMER_OUTPUT_COMPARE: + /* In case of TIMER_OUTPUT_COMPARE, there is no output and thus no pin to + * configure, and no channel. So nothing to do. For compatibility reason + * restore TIMER_DISABLED if necessary. + */ + if (_ChannelMode[channel - 1] != TIMER_DISABLED) { + _ChannelMode[channel - 1] = TIMER_DISABLED; + channelOC.TIM_OCMode = TIM_OCMode_Timing; + + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + } + return; + case TIMER_OUTPUT_COMPARE_ACTIVE: + channelOC.TIM_OCMode = TIM_OCMode_Active; + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + + break; + case TIMER_OUTPUT_COMPARE_INACTIVE: + channelOC.TIM_OCMode = TIM_OCMode_Inactive; + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + case TIMER_OUTPUT_COMPARE_TOGGLE: + channelOC.TIM_OCMode = TIM_OCMode_Toggle; + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + case TIMER_OUTPUT_COMPARE_PWM1: + channelOC.TIM_OCMode = TIM_OCMode_PWM1; + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + case TIMER_OUTPUT_COMPARE_PWM2: + channelOC.TIM_OCMode = TIM_OCMode_PWM2; + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + + case TIMER_OUTPUT_COMPARE_FORCED_ACTIVE: + channelOC.TIM_OCMode = 0x0050; //force high + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + case TIMER_OUTPUT_COMPARE_FORCED_INACTIVE: + channelOC.TIM_OCMode = 0x0040; //force low + TIM_OC_ConfigChannel_Static(_timerObj.handle.Instance, &channelOC, timChannel); + break; + case TIMER_INPUT_CAPTURE_RISING: + channelIC.TIM_ICPolarity = TIM_ICPolarity_Rising; + TIM_IC_ConfigChannel_Static(_timerObj.handle.Instance, &channelIC,timChannel); + break; + case TIMER_INPUT_CAPTURE_FALLING: + channelIC.TIM_ICPolarity = TIM_ICPolarity_Falling; + TIM_IC_ConfigChannel_Static(_timerObj.handle.Instance, &channelIC,timChannel); + break; + case TIMER_INPUT_CAPTURE_BOTHEDGE: + channelIC.TIM_ICPolarity = TIM_ICPolarity_BothEdge; + TIM_IC_ConfigChannel_Static(_timerObj.handle.Instance, &channelIC,timChannel); + break; + case TIMER_INPUT_FREQ_DUTY_MEASUREMENT: + // Configure 1st channel + channelIC.TIM_ICPolarity = TIM_ICPolarity_Rising; + channelIC.TIM_ICSelection = TIM_ICSelection_DirectTI; + TIM_IC_ConfigChannel_Static(_timerObj.handle.Instance, &channelIC, timChannel); + // // Identify and configure 2nd associated channel + timAssociatedInputChannel = getAssociatedChannel(channel); + _ChannelMode[timAssociatedInputChannel - 1] = mode; + channelIC.TIM_ICPolarity = TIM_ICPolarity_Falling; + channelIC.TIM_ICSelection = TIM_ICSelection_IndirectTI; + TIM_IC_ConfigChannel_Static(_timerObj.handle.Instance, &channelIC, timChannel); + break; + default: + break; + } + // Save channel selected mode to object attribute + _ChannelMode[channel - 1] = mode; + if (pin != NC) + { + if ((int)getTimerChannel(pin) == timChannel) + { + /* Configure PWM GPIO pins */ + pinmap_pinout(pin, PinMap_TIM); + if ((mode == TIMER_INPUT_CAPTURE_RISING) || (mode == TIMER_INPUT_CAPTURE_FALLING) \ + || (mode == TIMER_INPUT_CAPTURE_BOTHEDGE) || (mode == TIMER_INPUT_FREQ_DUTY_MEASUREMENT)) + { + //input alternate function must configure GPIO in input mode + pinMode(pinNametoDigitalPin(pin), INPUT); //set input + } + } + else + { + // Pin doesn't match with timer output channels + Error_Handler(); + } + +#if defined(TIM_CC1NE) + isComplementaryChannel[channel - 1] = CH_PIN_INVERTED(pinmap_function(pin, PinMap_TIM)); //(x>>20)&0x1 +#endif + } +} + +/** + * @brief Retrieves channel mode configured + * @param channel: Arduino channel [1..4] + * @retval returns configured mode + */ +TimerModes_t HardwareTimer::getMode(uint32_t channel) +{ + if ((1 <= channel) && (channel <= TIMER_CHANNELS)) { + return _ChannelMode[channel - 1]; + } else { + return TIMER_DISABLED; + } +} + +/** + * @brief Enable or disable preloading for overflow value + * When disabled, changes to the overflow value take effect + * immediately. When enabled (the default), the value takes + * effect only at the next update event (typically the next + * overflow). + * + * Note that the capture/compare register has its own preload + * enable bit, which is independent and enabled in PWM modes + * and disabled otherwise. If you need more control of that + * bit, you can use the HAL functions directly. + * @param value: true to enable preloading, false to disable + * @retval None + */ +void HardwareTimer::setPreloadEnable(bool value) +{ + if (value) { + TIM_ARRPreloadConfig( _timerObj.handle.Instance, ENABLE ); + + } else { + TIM_ARRPreloadConfig( _timerObj.handle.Instance, DISABLE ); + } +} + +/** + * @brief Set channel Capture/Compare register + * @param channel: Arduino channel [1..4] + * @param compare: compare value depending on format + * @param format of compare parameter. If omitted default format is Tick + * TICK_FORMAT: compare is the number of tick + * MICROSEC_FORMAT: compare is the number of microsecondes + * HERTZ_FORMAT: compare is the frequency in hertz + * @retval None + */ +void HardwareTimer::setCaptureCompare(uint32_t channel, uint32_t compare, TimerCompareFormat_t format) +{ + int timChannel = getChannel(channel); + uint32_t Prescalerfactor = TIM_GetPrescaler(_timerObj.handle.Instance) + 1; + uint32_t CCR_RegisterValue; + + if (timChannel == -1) { + Error_Handler(); + } + switch (format) { + case MICROSEC_COMPARE_FORMAT: + CCR_RegisterValue = ((compare * (getTimerClkFreq() / 1000000)) / Prescalerfactor); + break; + case HERTZ_COMPARE_FORMAT: + CCR_RegisterValue = getTimerClkFreq() / (compare * Prescalerfactor); + break; + // As per Reference Manual PWM reach 100% with CCRx value strictly greater than ARR (So ARR+1 in our case) + case PERCENT_COMPARE_FORMAT: + CCR_RegisterValue = ((_timerObj.handle.Instance->ATRLR + 1) * compare) / 100; + break; + case RESOLUTION_1B_COMPARE_FORMAT: + case RESOLUTION_2B_COMPARE_FORMAT: + case RESOLUTION_3B_COMPARE_FORMAT: + case RESOLUTION_4B_COMPARE_FORMAT: + case RESOLUTION_5B_COMPARE_FORMAT: + case RESOLUTION_6B_COMPARE_FORMAT: + case RESOLUTION_7B_COMPARE_FORMAT: + case RESOLUTION_8B_COMPARE_FORMAT: + case RESOLUTION_9B_COMPARE_FORMAT: + case RESOLUTION_10B_COMPARE_FORMAT: + case RESOLUTION_11B_COMPARE_FORMAT: + case RESOLUTION_12B_COMPARE_FORMAT: + case RESOLUTION_13B_COMPARE_FORMAT: + case RESOLUTION_14B_COMPARE_FORMAT: + case RESOLUTION_15B_COMPARE_FORMAT: + case RESOLUTION_16B_COMPARE_FORMAT: + CCR_RegisterValue = (( _timerObj.handle.Instance->ATRLR + 1 ) * compare ) / ( (1 << format) -1 ); + break; + case TICK_COMPARE_FORMAT: + default : + CCR_RegisterValue = compare; + break; + } + + // Special case when ARR is set to the max value, it is not possible to set CCRx to ARR+1 to reach 100% + // Then set CCRx to max value. PWM is then 1/0xFFFF = 99.998..% + if( (( _timerObj.handle.Instance->ATRLR ) == MAX_RELOAD) && (CCR_RegisterValue == MAX_RELOAD + 1)) + { + CCR_RegisterValue = MAX_RELOAD; + } + + switch (timChannel) + { + case TIM_Channel_1: + TIM_SetCompare1( _timerObj.handle.Instance, CCR_RegisterValue ); + break; + case TIM_Channel_2: + TIM_SetCompare2( _timerObj.handle.Instance, CCR_RegisterValue ); + break; + case TIM_Channel_3: + TIM_SetCompare3( _timerObj.handle.Instance, CCR_RegisterValue ); + break; + case TIM_Channel_4: + TIM_SetCompare4( _timerObj.handle.Instance, CCR_RegisterValue ); + break; + default: + break; + } + updateRegistersIfNotRunning(_timerObj.handle.Instance); +} + +/** + * @brief Retrieve Capture/Compare value + * @param channel: Arduino channel [1..4] + * @param format of return value. If omitted default format is Tick + * TICK_FORMAT: return value is the number of tick for Capture/Compare value + * MICROSEC_FORMAT: return value is the number of microsecondes for Capture/Compare value + * HERTZ_FORMAT: return value is the frequency in hertz for Capture/Compare value + * @retval Capture/Compare value + */ +uint32_t HardwareTimer::getCaptureCompare(uint32_t channel, TimerCompareFormat_t format) +{ + + int timChannel; + uint32_t return_value; + uint32_t CCR_RegisterValue; + uint32_t Prescalerfactor; + + timChannel = getChannel(channel); + Prescalerfactor = TIM_GetPrescaler(_timerObj.handle.Instance) + 1; + + if (timChannel == -1) { + Error_Handler(); + } + switch(timChannel) + { + case TIM_Channel_1: + CCR_RegisterValue = (_timerObj.handle.Instance->CH1CVR); + break; + case TIM_Channel_2: + CCR_RegisterValue = (_timerObj.handle.Instance->CH2CVR); + break; + case TIM_Channel_3: + CCR_RegisterValue = (_timerObj.handle.Instance->CH3CVR); + break; + case TIM_Channel_4: + CCR_RegisterValue = (_timerObj.handle.Instance->CH4CVR); + break; + default: + break; + } + + switch (format) { + case MICROSEC_COMPARE_FORMAT: + return_value = (uint32_t)((CCR_RegisterValue * Prescalerfactor * 1000000.0) / getTimerClkFreq()); + break; + case HERTZ_COMPARE_FORMAT: + return_value = (uint32_t)(getTimerClkFreq() / (CCR_RegisterValue * Prescalerfactor)); + break; + case PERCENT_COMPARE_FORMAT: + return_value = (CCR_RegisterValue * 100) / _timerObj.handle.Instance->ATRLR; + break; + case RESOLUTION_1B_COMPARE_FORMAT: + case RESOLUTION_2B_COMPARE_FORMAT: + case RESOLUTION_3B_COMPARE_FORMAT: + case RESOLUTION_4B_COMPARE_FORMAT: + case RESOLUTION_5B_COMPARE_FORMAT: + case RESOLUTION_6B_COMPARE_FORMAT: + case RESOLUTION_7B_COMPARE_FORMAT: + case RESOLUTION_8B_COMPARE_FORMAT: + case RESOLUTION_9B_COMPARE_FORMAT: + case RESOLUTION_10B_COMPARE_FORMAT: + case RESOLUTION_11B_COMPARE_FORMAT: + case RESOLUTION_12B_COMPARE_FORMAT: + case RESOLUTION_13B_COMPARE_FORMAT: + case RESOLUTION_14B_COMPARE_FORMAT: + case RESOLUTION_15B_COMPARE_FORMAT: + case RESOLUTION_16B_COMPARE_FORMAT: + return_value = (CCR_RegisterValue * ((1 << format) - 1)) / _timerObj.handle.Instance->ATRLR ; + break; + case TICK_COMPARE_FORMAT: + default : + return_value = CCR_RegisterValue; + break; + } + return return_value; +} + +/** + * @param channel: Arduino channel [1..4] + * @param pin: Arduino pin number, ex D1, 1 or PA1 + * @param frequency: PWM frequency expressed in hertz + * @param dutycycle: PWM dutycycle expressed in percentage + * @param PeriodCallback: timer period callback (timer rollover upon update event) + * @param CompareCallback: timer compare callback + * @retval None + */ +void HardwareTimer::setPWM(uint32_t channel, uint32_t pin, uint32_t frequency, uint32_t dutycycle, callback_function_t PeriodCallback, callback_function_t CompareCallback) +{ + setPWM(channel, digitalPinToPinName(pin), frequency, dutycycle, PeriodCallback, CompareCallback); +} + +/** + * @brief All in one function to configure PWM + * @param channel: Arduino channel [1..4] + * @param pin: pin name, ex PB_0 + * @param frequency: PWM frequency expressed in hertz + * @param dutycycle: PWM dutycycle expressed in percentage + * @param PeriodCallback: timer period callback (timer rollover upon update event) + * @param CompareCallback: timer compare callback + * @retval None + */ +void HardwareTimer::setPWM(uint32_t channel, PinName pin, uint32_t frequency, uint32_t dutycycle, callback_function_t PeriodCallback, callback_function_t CompareCallback) +{ + setMode(channel, TIMER_OUTPUT_COMPARE_PWM1, pin); + setOverflow(frequency, HERTZ_FORMAT); + setCaptureCompare(channel, dutycycle, PERCENT_COMPARE_FORMAT); + if (PeriodCallback) { + attachInterrupt(PeriodCallback); + } + if (CompareCallback) { + attachInterrupt(channel, CompareCallback); + } + resume(); +} + +/** + * @brief Set the priority of the interrupt + * @note Must be call before resume() + * @param preemptPriority: the pre-emption priority for the IRQn channel + * @param subPriority: the subpriority level for the IRQ channel. + * @retval None + */ +void HardwareTimer::setInterruptPriority(uint32_t preemptPriority, uint32_t subPriority) +{ + // Set Update interrupt priority for immediate use + NVIC_SetPriority( getTimerUpIrq(_timerObj.handle.Instance), ((preemptPriority & 0x1) << 7 ) | subPriority ); + // Set Capture/Compare interrupt priority if timer provides a unique IRQ + if (getTimerCCIrq(_timerObj.handle.Instance) != getTimerUpIrq(_timerObj.handle.Instance)) { + NVIC_SetPriority( getTimerCCIrq(_timerObj.handle.Instance), ((preemptPriority & 0x1) << 7 ) | subPriority ); + } + // Store priority for use if timer is re-initialized + _timerObj.preemptPriority = preemptPriority; + _timerObj.subPriority = subPriority; +} + +/** + * @brief Attach interrupt callback on update (rollover) event + * @param callback: interrupt callback + * @retval None + */ +void HardwareTimer::attachInterrupt(callback_function_t callback) +{ + if (callbacks[0]) { + // Callback previously configured : do not clear neither enable IT, it is just a change of callback + callbacks[0] = callback; + } else { + callbacks[0] = callback; + if (callback) { + // Clear flag before enabling IT + TIM_ClearFlag(_timerObj.handle.Instance,TIM_FLAG_Update); + TIM_ITConfig(_timerObj.handle.Instance,TIM_IT_Update,ENABLE); + } + } +} + +/** + * @brief Detach interrupt callback on update (rollover) event + * @retval None + */ +void HardwareTimer::detachInterrupt() +{ + // Disable update interrupt and clear callback + TIM_ITConfig(_timerObj.handle.Instance,TIM_IT_Update,DISABLE); + callbacks[0] = NULL; +} + +/** + * @brief Attach interrupt callback on Capture/Compare event + * @param channel: Arduino channel [1..4] + * @param callback: interrupt callback + * @retval None + */ +void HardwareTimer::attachInterrupt(uint32_t channel, callback_function_t callback) +{ + int interrupt = getIT(channel); + if (interrupt == -1) { + Error_Handler(); + } + + if ((channel == 0) || (channel > (TIMER_CHANNELS + 1))) { + Error_Handler(); // only channel 1..4 have an interrupt + } + if (callbacks[channel]) { + // Callback previously configured : do not clear neither enable IT, it is just a change of callback + callbacks[channel] = callback; + } else { + callbacks[channel] = callback; + if (callback) { + + // Clear flag before enabling IT + TIM_ClearFlag( _timerObj.handle.Instance, interrupt); + // Enable interrupt corresponding to channel, only if callback is valid + TIM_ITConfig(_timerObj.handle.Instance,interrupt,ENABLE); + } + } +} + +/** + * @brief Detach interrupt callback on Capture/Compare event + * @param channel: Arduino channel [1..4] + * @retval None + */ +void HardwareTimer::detachInterrupt(uint32_t channel) +{ + int interrupt = getIT(channel); + if (interrupt == -1) { + Error_Handler(); + } + + if ((channel == 0) || (channel > (TIMER_CHANNELS + 1))) { + Error_Handler(); // only channel 1..4 have an interrupt + } + + // Disable interrupt corresponding to channel and clear callback + TIM_ITConfig(_timerObj.handle.Instance,interrupt,DISABLE); + callbacks[channel] = NULL; +} + +/** + * @brief Checks if there's an interrupt callback attached on Rollover event + * @retval returns true if a timer rollover interrupt has already been set + */ +bool HardwareTimer::hasInterrupt() +{ + return callbacks[0] != NULL; +} + +/** + * @brief Checks if there's an interrupt callback attached on Capture/Compare event + * @param channel: Arduino channel [1..4] + * @retval returns true if a channel compare match interrupt has already been set + */ +bool HardwareTimer::hasInterrupt(uint32_t channel) +{ + if ((channel == 0) || (channel > (TIMER_CHANNELS + 1))) { + Error_Handler(); // only channel 1..4 have an interrupt + } + return callbacks[channel] != NULL; +} + +/** + * @brief Generate an update event to force all registers (Autoreload, prescaler, compare) to be taken into account + * @note @note Refresh() can only be called after timer has been initialized, + either by calling setup() function or thanks to constructor with TIM instance parameter. + * It is useful while timer is running after some registers update + * @retval None + */ +void HardwareTimer::refresh() +{ + TIM_GenerateEvent( _timerObj.handle.Instance,TIM_EventSource_Update ); +} + +/** + * @brief Return the timer object handle object for more advanced setup + * @note Using this function and editing the Timer handle is at own risk! No support will + * be provided whatsoever if the HardwareTimer does not work as expected when editing + * the handle using the HAL functionality or other custom coding. + * @retval TIM_HandleTypeDef address + */ +TIM_HandleTypeDef *HardwareTimer::getHandle() +{ + return &_timerObj.handle; +} + +/** + * @brief Generic Update (rollover) callback which will call user callback + * @param htim: HAL timer handle + * @retval None + */ +void HardwareTimer::updateCallback(TIM_HandleTypeDef *htim) +{ + + if (!htim) { + Error_Handler(); + } + + if(TIM_GetITStatus(htim->Instance, TIM_IT_Update) && (htim->Instance->DMAINTENR & TIM_IT_Update)) + { + + timerObj_t *obj = get_timer_obj(htim); + HardwareTimer *HT = (HardwareTimer *)(obj->__this); + + if (HT->callbacks[0]) { + HT->callbacks[0](); + } + TIM_ClearITPendingBit(htim->Instance, TIM_IT_Update); + } +} + +/** + * @brief Generic Capture and Compare callback which will call user callback + * @param htim: HAL timer handle + * @retval None + */ +void HardwareTimer::captureCompareCallback(TIM_HandleTypeDef *htim) +{ + if (!htim) { + Error_Handler(); + } + + uint32_t channel ; + +if( (htim->Instance->DMAINTENR & TIM_IT_CC1) || (htim->Instance->DMAINTENR & TIM_IT_CC2) \ + || (htim->Instance->DMAINTENR & TIM_IT_CC3) || (htim->Instance->DMAINTENR & TIM_IT_CC4) ) +{ + if( TIM_GetITStatus(htim->Instance, TIM_IT_CC1) ) + { + channel = 1; + TIM_ClearITPendingBit( htim->Instance, TIM_IT_CC1); + } + else if(TIM_GetITStatus(htim->Instance, TIM_IT_CC2) ) + { + channel = 2; + TIM_ClearITPendingBit( htim->Instance, TIM_IT_CC2); + } + else if(TIM_GetITStatus(htim->Instance, TIM_IT_CC3) ) + { + channel = 3; + TIM_ClearITPendingBit( htim->Instance, TIM_IT_CC3); + } + else if(TIM_GetITStatus(htim->Instance, TIM_IT_CC4) ) + { + channel = 4; + TIM_ClearITPendingBit( htim->Instance, TIM_IT_CC4); + } + + timerObj_t *obj = get_timer_obj(htim); + HardwareTimer *HT = (HardwareTimer *)(obj->__this); + if (HT->callbacks[channel]) { + HT->callbacks[channel](); + } +} +} + +/** + * @brief Check whether HardwareTimer is running (paused or resumed). + * @retval return true if the HardwareTimer is running + */ +bool HardwareTimer::isRunning() +{ + // return LL_TIM_IsEnabledCounter(_timerObj.handle.Instance); + return (((_timerObj.handle.Instance->CTLR1 & TIM_CEN) == TIM_CEN)? 1UL : 0UL) ; +} + +/** + * @brief Check whether channel is running (paused or resumed). + * @param channel: Arduino channel [1..4] + * @retval return true if HardwareTimer is running and the channel is enabled + */ +bool HardwareTimer::isRunningChannel(uint32_t channel) +{ + int LLChannel = getLLChannel(channel); + int interrupt = getIT(channel); + bool ret; + + if (LLChannel == -1) { + Error_Handler(); + } + + if (interrupt == -1) { + Error_Handler(); + } + + // channel is running if: timer is running, and either output channel is + // enabled or interrupt is set + ret = ((_timerObj.handle.Instance->CCER & LLChannel) == LLChannel ? 1UL : 0UL) \ + || ((_timerObj.handle.Instance->DMAINTENR & interrupt) == interrupt ? 1UL : 0UL) ; + + return (isRunning() && ret); +} + +/** + * @brief Take into account registers update immediately if timer is not running, + * (independently from Preload setting) + * @param TIMx Timer instance + * @retval None + */ +void HardwareTimer::updateRegistersIfNotRunning(TIM_TypeDef *TIMx) +{ + if (!isRunning()) { + if (_timerObj.handle.Instance->DMAINTENR & TIM_IT_Update) + { + // prevent Interrupt generation from refresh() + TIM_ITConfig(_timerObj.handle.Instance, TIM_IT_Update, DISABLE); + refresh( ); + TIM_ClearFlag(_timerObj.handle.Instance, TIM_IT_Update); + TIM_ITConfig(_timerObj.handle.Instance, TIM_IT_Update, ENABLE); + + } else { + refresh(); + } + } +} + +/** + * @brief HardwareTimer destructor + * @retval None + */ +HardwareTimer::~HardwareTimer() +{ + uint32_t index = get_timer_index(_timerObj.handle.Instance); + disableTimerClock(&(_timerObj.handle)); + HardwareTimer_Handle[index] = NULL; + _timerObj.__this = NULL; +} + +/** + * @brief return timer index from timer handle + * @param htim : one of the defined timer + * @retval timer index + */ +timer_index_t get_timer_index(TIM_TypeDef *instance) +{ + timer_index_t index = UNKNOWN_TIMER; + +#if defined(TIM1_BASE) + if (instance == TIM1) { + index = TIMER1_INDEX; + } +#endif +#if defined(TIM2_BASE) + if (instance == TIM2) { + index = TIMER2_INDEX; + } +#endif +#if defined(TIM3_BASE) + if (instance == TIM3) { + index = TIMER3_INDEX; + } +#endif +#if defined(TIM4_BASE) + if (instance == TIM4) { + index = TIMER4_INDEX; + } +#endif +#if defined(TIM5_BASE) + if (instance == TIM5) { + index = TIMER5_INDEX; + } +#endif +#if defined(TIM6_BASE) + if (instance == TIM6) { + index = TIMER6_INDEX; + } +#endif +#if defined(TIM7_BASE) + if (instance == TIM7) { + index = TIMER7_INDEX; + } +#endif +#if defined(TIM8_BASE) + if (instance == TIM8) { + index = TIMER8_INDEX; + } +#endif +#if defined(TIM9_BASE) + if (instance == TIM9) { + index = TIMER9_INDEX; + } +#endif +#if defined(TIM10_BASE) + if (instance == TIM10) { + index = TIMER10_INDEX; + } +#endif + + return index; +} + +/** + * @brief This function return the timer clock frequency. + * @param None + * @retval frequency in Hz + */ +uint32_t HardwareTimer::getTimerClkFreq() +{ + RCC_ClocksTypeDef RCC_ClocksStatus={}; + uint32_t uwTimclock = 0U, uwAPBxPrescaler = 0U; + + /* Get clock configuration */ + RCC_GetClocksFreq(&RCC_ClocksStatus); + +#if !defined(CH32V00x) && !defined(CH32X035) + switch (getTimerClkSrc(_timerObj.handle.Instance)) + { + case 1: + uwAPBxPrescaler = (RCC->CFGR0 & RCC_PPRE1) >> 8; + uwTimclock = RCC_ClocksStatus.PCLK1_Frequency; + break; + case 2: + uwAPBxPrescaler = (RCC->CFGR0 & RCC_PPRE2) >> 11; + uwTimclock = RCC_ClocksStatus.PCLK2_Frequency; + break; + default: + case 0: // Unknown timer clock source + Error_Handler(); + break; + } + + switch(uwAPBxPrescaler & 0x7) + { + case 0x4: + uwAPBxPrescaler = 2; + break; + case 0x5: + uwAPBxPrescaler = 4; + break; + case 0x6: + uwAPBxPrescaler = 8; + break; + case 0x7: + uwAPBxPrescaler = 16; + break; + default: + uwAPBxPrescaler = 1; + break; + } + +#else //CH32V003 and CH32X035 are equal to AHB CLOCK + uwAPBxPrescaler = 1; + uwTimclock = RCC_ClocksStatus.HCLK_Frequency; + +#endif + + switch (uwAPBxPrescaler) + { + default: + case 1: + uwTimclock*=1; + break; + case 2: + case 4: + case 8: + case 16: + uwTimclock *= 2; + break; + } + + return uwTimclock; +} + +/** + * @brief This function will reset the timer + * @param None + * @retval None + */ +void HardwareTimer::timerHandleDeinit() +{ + TIM_Cmd(_timerObj.handle.Instance, DISABLE); + TIM_DeInit(_timerObj.handle.Instance); +} + + + + + +/******************************************************************************/ +/* TIMx IRQ HANDLER */ +/******************************************************************************/ +extern "C" { + +#if defined(TIM1_BASE) + /** + * @brief TIM1 IRQHandler + * @param None + * @retval None + */ + void TIM1_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM1_UP_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER1_INDEX]) { + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER1_INDEX]->handle); + } + } + void TIM1_CC_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM1_CC_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER1_INDEX]) { + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER1_INDEX]->handle); + } + } +#endif //TIM1_BASE + +#if defined(TIM2_BASE) + /** + * @brief TIM2 IRQHandler + * @param None + * @retval None + */ + void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM2_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER2_INDEX]) + { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER2_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER2_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER2_INDEX]->handle); + } + } +#endif //TIM2_BASE + +#if defined(TIM3_BASE) + /** + * @brief TIM3 IRQHandler + * @param None + * @retval None + */ + void TIM3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM3_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER3_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER3_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER3_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER3_INDEX]->handle); + } + } +#endif //TIM3_BASE + +#if defined(TIM4_BASE) + /** + * @brief TIM4 IRQHandler + * @param None + * @retval None + */ + void TIM4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM4_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER4_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER4_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER4_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER4_INDEX]->handle); + } + } +#endif //TIM4_BASE + +#if defined(TIM5_BASE) + /** + * @brief TIM5 IRQHandler + * @param None + * @retval None + */ + void TIM5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM5_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER5_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER5_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER5_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER5_INDEX]->handle); + } + } +#endif //TIM5_BASE + +#if defined(TIM6_BASE) + /** + * @brief TIM6 IRQHandler + * @param None + * @retval None + */ + void TIM6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM6_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER6_INDEX]) { + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER6_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER6_INDEX]->handle); + } + } +#endif //TIM6_BASE + +#if defined(TIM7_BASE) + /** + * @brief TIM7 IRQHandler + * @param None + * @retval None + */ + void TIM7_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM7_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER7_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER7_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER7_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER7_INDEX]->handle); + } + } +#endif //TIM7_BASE + +#if defined(TIM8_BASE) + /** + * @brief TIM8 IRQHandler + * @param None + * @retval None + */ + void TIM8_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM8_UP_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER8_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER8_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER8_INDEX]->handle); + } + } + void TIM8_CC_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM8_CC_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER8_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER8_INDEX]->handle); + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER8_INDEX]->handle); + } + } +#endif //TIM8_BASE + +#if defined(TIM9_BASE) + /** + * @brief TIM9 IRQHandler + * @param None + * @retval None + */ + void TIM9_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM9_UP_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER9_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER9_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER9_INDEX]->handle); + } + } + void TIM9_CC_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM9_CC_IRQHandler(void) + { + if(HardwareTimer_Handle[TIMER9_INDEX]){ + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER9_INDEX]->handle); + } + } +#endif //TIM9_BASE + +#if defined(TIM10_BASE) + /** + * @brief TIM10 IRQHandler + * @param None + * @retval None + */ + void TIM10_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM10_UP_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER10_INDEX]) { + // HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER10_INDEX]->handle); + HardwareTimer::updateCallback(&HardwareTimer_Handle[TIMER10_INDEX]->handle); + } + } + void TIM10_CC_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + void TIM10_CC_IRQHandler(void) + { + if (HardwareTimer_Handle[TIMER10_INDEX]){ + HardwareTimer::captureCompareCallback(&HardwareTimer_Handle[TIMER10_INDEX]->handle); + } + } +#endif //TIM10_BASE +} + +#endif // TIM_MODULE_ENABLED && !TIM_MODULE_ONLY diff --git a/cores/arduino/HardwareTimer.h b/cores/arduino/HardwareTimer.h new file mode 100644 index 0000000..ce4fe9b --- /dev/null +++ b/cores/arduino/HardwareTimer.h @@ -0,0 +1,197 @@ +/* + Copyright (c) 2017 Daniel Fekete + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in all + copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + SOFTWARE. + + Copyright (c) 2019 STMicroelectronics + Modified to support Arduino_Core_STM32 + + Modified by TempersLee to support Adruino_Core_CH32 +*/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef HARDWARETIMER_H_ +#define HARDWARETIMER_H_ + +/* Includes ------------------------------------------------------------------*/ +#include "timer.h" +#include "ch32yyxx_tim.h" + +#if defined(TIM_MODULE_ENABLED) && !defined(TIM_MODULE_ONLY) + +#define TIMER_CHANNELS 4 // channel5 and channel 6 are not considered here has they don't have gpio output and they don't have interrupt + + +#define TIM_CHANNEL_CH1 TIM_CC1E /*!< Timer input/output channel 1 */ +#define TIM_CHANNEL_CH1N TIM_CC1NE /*!< Timer complementary output channel 1 */ +#define TIM_CHANNEL_CH2 TIM_CC2E /*!< Timer input/output channel 2 */ +#define TIM_CHANNEL_CH2N TIM_CC2NE /*!< Timer complementary output channel 2 */ +#define TIM_CHANNEL_CH3 TIM_CC3E /*!< Timer input/output channel 3 */ +#define TIM_CHANNEL_CH3N TIM_CC3NE /*!< Timer complementary output channel 3 */ +#define TIM_CHANNEL_CH4 TIM_CC4E /*!< Timer input/output channel 4 */ + + + +typedef enum { + TIMER_DISABLED, // == TIM_OCMODE_TIMING no output, useful for only-interrupt + // Output Compare + TIMER_OUTPUT_COMPARE, // == Obsolete, use TIMER_DISABLED instead. Kept for compatibility reason + TIMER_OUTPUT_COMPARE_ACTIVE, // == TIM_OCMODE_ACTIVE pin is set high when counter == channel compare + TIMER_OUTPUT_COMPARE_INACTIVE, // == TIM_OCMODE_INACTIVE pin is set low when counter == channel compare + TIMER_OUTPUT_COMPARE_TOGGLE, // == TIM_OCMODE_TOGGLE pin toggles when counter == channel compare + TIMER_OUTPUT_COMPARE_PWM1, // == TIM_OCMODE_PWM1 pin high when counter < channel compare, low otherwise + TIMER_OUTPUT_COMPARE_PWM2, // == TIM_OCMODE_PWM2 pin low when counter < channel compare, high otherwise + TIMER_OUTPUT_COMPARE_FORCED_ACTIVE, // == TIM_OCMODE_FORCED_ACTIVE pin always high + TIMER_OUTPUT_COMPARE_FORCED_INACTIVE, // == TIM_OCMODE_FORCED_INACTIVE pin always low + + //Input capture + TIMER_INPUT_CAPTURE_RISING, // == TIM_INPUTCHANNELPOLARITY_RISING + TIMER_INPUT_CAPTURE_FALLING, // == TIM_INPUTCHANNELPOLARITY_FALLING + TIMER_INPUT_CAPTURE_BOTHEDGE, // == TIM_INPUTCHANNELPOLARITY_BOTHEDGE + + // Used 2 channels for a single pin. One channel in TIM_INPUTCHANNELPOLARITY_RISING another channel in TIM_INPUTCHANNELPOLARITY_FALLING. + // Channels must be used by pair: CH1 with CH2, or CH3 with CH4 + // This mode is very useful for Frequency and Dutycycle measurement + TIMER_INPUT_FREQ_DUTY_MEASUREMENT, + + TIMER_NOT_USED = 0xFFFF // This must be the last item of this enum +} TimerModes_t; + +typedef enum { + TICK_FORMAT, // default + MICROSEC_FORMAT, + HERTZ_FORMAT, +} TimerFormat_t; + +typedef enum { + RESOLUTION_1B_COMPARE_FORMAT = 1, // used for Dutycycle: [0 .. 1] + RESOLUTION_2B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 3] + RESOLUTION_3B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 7] + RESOLUTION_4B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 15] + RESOLUTION_5B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 31] + RESOLUTION_6B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 63] + RESOLUTION_7B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 127] + RESOLUTION_8B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 255] + RESOLUTION_9B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 511] + RESOLUTION_10B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 1023] + RESOLUTION_11B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 2047] + RESOLUTION_12B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 4095] + RESOLUTION_13B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 8191] + RESOLUTION_14B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 16383] + RESOLUTION_15B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 32767] + RESOLUTION_16B_COMPARE_FORMAT, // used for Dutycycle: [0 .. 65535] + + TICK_COMPARE_FORMAT = 0x80, // default + MICROSEC_COMPARE_FORMAT, + HERTZ_COMPARE_FORMAT, + PERCENT_COMPARE_FORMAT, // used for Dutycycle +} TimerCompareFormat_t; + +#ifdef __cplusplus + +#include +using callback_function_t = std::function; + +/* Class --------------------------------------------------------*/ +class HardwareTimer { + public: + HardwareTimer(); + HardwareTimer(TIM_TypeDef *instance); + ~HardwareTimer(); // destructor + + void setup(TIM_TypeDef *instance); // Setup, only needed if no instance was passed to the constructor + + void pause(void); // Pause counter and all output channels + void pauseChannel(uint32_t channel); // Timer is still running but channel (output and interrupt) is disabled + void resume(void); // Resume counter and all output channels + void resumeChannel(uint32_t channel); // Resume only one channel + + void setPrescaleFactor(uint32_t prescaler); // set prescaler register (which is factor value - 1) + uint32_t getPrescaleFactor(); + + void setOverflow(uint32_t val, TimerFormat_t format = TICK_FORMAT); // set AutoReload register depending on format provided + uint32_t getOverflow(TimerFormat_t format = TICK_FORMAT); // return overflow depending on format provided + + void setPWM(uint32_t channel, PinName pin, uint32_t frequency, uint32_t dutycycle, callback_function_t PeriodCallback = nullptr, callback_function_t CompareCallback = nullptr); // Set all in one command freq in HZ, Duty in percentage. Including both interrupt. + void setPWM(uint32_t channel, uint32_t pin, uint32_t frequency, uint32_t dutycycle, callback_function_t PeriodCallback = nullptr, callback_function_t CompareCallback = nullptr); + + void setCount(uint32_t val, TimerFormat_t format = TICK_FORMAT); // set timer counter to value 'val' depending on format provided + uint32_t getCount(TimerFormat_t format = TICK_FORMAT); // return current counter value of timer depending on format provided + + void setMode(uint32_t channel, TimerModes_t mode, PinName pin = NC); // Configure timer channel with specified mode on specified pin if available + void setMode(uint32_t channel, TimerModes_t mode, uint32_t pin); + + TimerModes_t getMode(uint32_t channel); // Retrieve configured mode + + void setPreloadEnable(bool value); // Configure overflow preload enable setting + + uint32_t getCaptureCompare(uint32_t channel, TimerCompareFormat_t format = TICK_COMPARE_FORMAT); // return Capture/Compare register value of specified channel depending on format provided + void setCaptureCompare(uint32_t channel, uint32_t compare, TimerCompareFormat_t format = TICK_COMPARE_FORMAT); // set Compare register value of specified channel depending on format provided + + void setInterruptPriority(uint32_t preemptPriority, uint32_t subPriority); // set interrupt priority + + //Add interrupt to period update + void attachInterrupt(callback_function_t callback); // Attach interrupt callback which will be called upon update event (timer rollover) + void detachInterrupt(); // remove interrupt callback which was attached to update event + bool hasInterrupt(); //returns true if a timer rollover interrupt has already been set + //Add interrupt to capture/compare channel + void attachInterrupt(uint32_t channel, callback_function_t callback); // Attach interrupt callback which will be called upon compare match event of specified channel + void detachInterrupt(uint32_t channel); // remove interrupt callback which was attached to compare match event of specified channel + bool hasInterrupt(uint32_t channel); //returns true if an interrupt has already been set on the channel compare match + void timerHandleDeinit(); // Timer deinitialization + + // Refresh() is useful while timer is running after some registers update + void refresh(void); // Generate update event to force all registers (Autoreload, prescaler, compare) to be taken into account + + uint32_t getTimerClkFreq(); // return timer clock frequency in Hz. + + static void captureCompareCallback(TIM_HandleTypeDef *htim); // Generic Capture and Compare callback which will call user callback + static void updateCallback(TIM_HandleTypeDef *htim); // Generic Update (rollover) callback which will call user callback + + void updateRegistersIfNotRunning(TIM_TypeDef *TIMx); // Take into account registers update immediately if timer is not running, + + bool isRunning(); // return true if HardwareTimer is running + bool isRunningChannel(uint32_t channel); // return true if channel is running + + // The following function(s) are available for more advanced timer options + TIM_HandleTypeDef *getHandle(); // return the handle address for HAL related configuration + int getChannel(uint32_t channel); + int getLLChannel(uint32_t channel); + int getIT(uint32_t channel); + int getAssociatedChannel(uint32_t channel); +#if defined(TIM_CC1NE) + bool isComplementaryChannel[TIMER_CHANNELS]; +#endif + void TIM_OC_ConfigChannel_Static(TIM_TypeDef *htim, TIM_OCInitTypeDef *sConfig, uint32_t Channel); + void TIM_IC_ConfigChannel_Static(TIM_TypeDef *htim, TIM_ICInitTypeDef *sConfig, uint32_t Channel); + + private: + TimerModes_t _ChannelMode[TIMER_CHANNELS]; + timerObj_t _timerObj; + callback_function_t callbacks[1 + TIMER_CHANNELS]; //Callbacks: 0 for update, 1-4 for channels. (channel5/channel6, if any, doesn't have interrupt) +}; + +extern timerObj_t *HardwareTimer_Handle[TIMER_NUM]; + +extern timer_index_t get_timer_index(TIM_TypeDef *htim); + +#endif /* __cplusplus */ + +#endif // TIM_MODULE_ENABLED && TIM_MODULE_ONLY +#endif // HARDWARETIMER_H_ diff --git a/cores/arduino/board.h b/cores/arduino/board.h index 3621565..a876475 100644 --- a/cores/arduino/board.h +++ b/cores/arduino/board.h @@ -11,7 +11,7 @@ // #include "dwt.h" #include "hw_config.h" // #include "otp.h" -// #include "timer.h" +#include "timer.h" #include "uart.h" diff --git a/cores/arduino/ch32/PinNamesTypes.h b/cores/arduino/ch32/PinNamesTypes.h index 62073a4..a6e2e58 100644 --- a/cores/arduino/ch32/PinNamesTypes.h +++ b/cores/arduino/ch32/PinNamesTypes.h @@ -88,7 +88,7 @@ extern "C" { #define CH_PIN_SPEED_MASK 0x03 #define CH_PIN_SPEED_SHIFT 6 #define CH_PIN_SPEED_BITS (CH_PIN_SPEED_MASK << CH_PIN_SPEED_SHIFT) - +*/ #define CH_PIN_INV_MASK 0x01 #define CH_PIN_INV_SHIFT 20 #define CH_PIN_INV_BIT (CH_PIN_INV_MASK << CH_PIN_INV_SHIFT) @@ -97,6 +97,7 @@ extern "C" { #define CH_PIN_AN_CTRL_SHIFT 21 #define CH_PIN_ANALOG_CONTROL_BIT (CH_PIN_AN_CTRL_MASK << CH_PIN_AN_CTRL_SHIFT) +/* #define CH_PIN_AN_CHAN_BANK_B_MASK 0x01 #define CH_PIN_AN_CHAN_BANK_B_SHIFT 22 #define CH_PIN_ANALOG_CHAN_BANK_B_BIT (CH_PIN_AN_CHAN_BANK_B_MASK << CH_PIN_AN_CHAN_BANK_B_SHIFT) @@ -115,8 +116,10 @@ extern "C" { #define CH_PIN_SPEED(X) (((X) >> CH_PIN_SPEED_SHIFT) & CH_PIN_SPEED_MASK) #define CH_PIN_AFNUM(X) (((X) >> CH_PIN_AFNUM_SHIFT) & CH_PIN_AFNUM_MASK) #define CH_PIN_CHANNEL(X) (((X) >> CH_PIN_CHAN_SHIFT) & CH_PIN_CHAN_MASK) +*/ #define CH_PIN_INVERTED(X) (((X) >> CH_PIN_INV_SHIFT) & CH_PIN_INV_MASK) #define CH_PIN_ANALOG_CONTROL(X) (((X) >> CH_PIN_AN_CTRL_SHIFT) & CH_PIN_AN_CTRL_MASK) +/* #define CH_PIN_ANALOG_CHANNEL_BANK_B(X) (((X) >> CH_PIN_AN_CHAN_BANK_B_SHIFT) & CH_PIN_AN_CHAN_BANK_B_MASK) #define CH_PIN_MODE(X) ((CH_PIN_OD((X)) << 4) | \ (CH_PIN_FUNCTION((X)) & (~CH_PIN_OD_BITS))) diff --git a/cores/arduino/ch32/analog.h b/cores/arduino/ch32/analog.h index 6aee463..632cafa 100644 --- a/cores/arduino/ch32/analog.h +++ b/cores/arduino/ch32/analog.h @@ -44,8 +44,7 @@ #include "ch32_def.h" #include "PeripheralPins.h" #include "variant.h" - -// #include "HardwareTimer.h" +#include "HardwareTimer.h" #ifdef __cplusplus extern "C" { diff --git a/cores/arduino/ch32/timer.c b/cores/arduino/ch32/timer.c new file mode 100644 index 0000000..ac36aac --- /dev/null +++ b/cores/arduino/ch32/timer.c @@ -0,0 +1,473 @@ +/** + ******************************************************************************* + * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. + * All rights reserved. + * + * This software component is licensed by WCH under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* +modified by TempersLee + */ +#include "core_debug.h" +#include "timer.h" +#include "board.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(TIM_MODULE_ENABLED) + +/* Private Functions */ +/* Aim of the function is to get _timerObj pointer using htim pointer */ +/* Highly inspired from magical linux kernel's "container_of" */ +/* (which was not directly used since not compatible with IAR toolchain) */ +timerObj_t *get_timer_obj(TIM_HandleTypeDef *htim) +{ + timerObj_t *obj; + obj = (timerObj_t *)((char *)htim - offsetof(timerObj_t, handle)); + return (obj); +} + +/** + * @brief TIMER Initialization - clock init and nvic init + * @param htim_base: TIM handle + * @retval None + */ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base) +{ + timerObj_t *obj = get_timer_obj(htim_base); + enableTimerClock(htim_base); + + // configure Update interrupt + NVIC_SetPriority(getTimerUpIrq(htim_base->Instance), obj->preemptPriority | obj->subPriority); + NVIC_EnableIRQ(getTimerUpIrq(htim_base->Instance)); + + if (getTimerCCIrq(htim_base->Instance) != getTimerUpIrq(htim_base->Instance)) { + // configure Capture Compare interrupt + NVIC_SetPriority(getTimerCCIrq(htim_base->Instance), obj->preemptPriority | obj->subPriority); + NVIC_EnableIRQ(getTimerCCIrq(htim_base->Instance)); + } +} + +/** + * @brief TIMER Deinitialization - clock and nvic + * @param htim_base: TIM handle + * @retval None + */ +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim_base) +{ + disableTimerClock(htim_base); + NVIC_DisableIRQ(getTimerUpIrq(htim_base->Instance)); + NVIC_DisableIRQ(getTimerCCIrq(htim_base->Instance)); +} + +/** + * @brief Initializes the TIM Output Compare MSP. + * @param htim: TIM handle + * @retval None + */ +void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) +{ + timerObj_t *obj = get_timer_obj(htim); + enableTimerClock(htim); + + // configure Update interrupt + NVIC_SetPriority(getTimerUpIrq(htim->Instance), obj->preemptPriority | obj->subPriority); + NVIC_EnableIRQ(getTimerUpIrq(htim->Instance)); + + if (getTimerCCIrq(htim->Instance) != getTimerUpIrq(htim->Instance)) { + // configure Capture Compare interrupt + NVIC_SetPriority(getTimerCCIrq(htim->Instance), obj->preemptPriority | obj->subPriority); + NVIC_EnableIRQ(getTimerCCIrq(htim->Instance)); + } +} + +/** + * @brief DeInitialize TIM Output Compare MSP. + * @param htim: TIM handle + * @retval None + */ +void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) +{ + disableTimerClock(htim); + NVIC_DisableIRQ(getTimerUpIrq(htim->Instance)); + NVIC_DisableIRQ(getTimerCCIrq(htim->Instance)); +} + +/** + * @brief Initializes the TIM Input Capture MSP. + * @param htim: TIM handle + * @retval None + */ +void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) +{ + enableTimerClock(htim); +} + +/** + * @brief DeInitialize TIM Input Capture MSP. + * @param htim: TIM handle + * @retval None + */ +void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) +{ + disableTimerClock(htim); +} + +/* Exported functions */ +/** + * @brief Enable the timer clock + * @param htim: TIM handle + * @retval None + */ +void enableTimerClock(TIM_HandleTypeDef *htim) +{ + // Enable TIM clock +#if defined(TIM1_BASE) + if (htim->Instance == TIM1) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); + } +#endif +#if defined(TIM2_BASE) + if (htim->Instance == TIM2) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); + } +#endif +#if defined(TIM3_BASE) + if (htim->Instance == TIM3) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); + } +#endif +#if defined(TIM4_BASE) + if (htim->Instance == TIM4) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); + } +#endif +#if defined(TIM5_BASE) + if (htim->Instance == TIM5) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE); + } +#endif +#if defined(TIM6_BASE) + if (htim->Instance == TIM6) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE); + } +#endif +#if defined(TIM7_BASE) + if (htim->Instance == TIM7) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM7, ENABLE); + } +#endif +#if defined(TIM8_BASE) + if (htim->Instance == TIM8) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE); + } +#endif +#if defined(TIM9_BASE) + if (htim->Instance == TIM9) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM9, ENABLE); + } +#endif +#if defined(TIM10_BASE) + if (htim->Instance == TIM10) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM10, ENABLE); + } +#endif + +} + +/** + * @brief Disable the timer clock + * @param htim: TIM handle + * @retval None + */ +void disableTimerClock(TIM_HandleTypeDef *htim) +{ + // Enable TIM clock +#if defined(TIM1_BASE) + if (htim->Instance == TIM1) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, DISABLE); + } +#endif +#if defined(TIM2_BASE) + if (htim->Instance == TIM2) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, DISABLE); + } +#endif +#if defined(TIM3_BASE) + if (htim->Instance == TIM3) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, DISABLE); + } +#endif +#if defined(TIM4_BASE) + if (htim->Instance == TIM4) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, DISABLE); + } +#endif +#if defined(TIM5_BASE) + if (htim->Instance == TIM5) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, DISABLE); + } +#endif +#if defined(TIM6_BASE) + if (htim->Instance == TIM6) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, DISABLE); + } +#endif +#if defined(TIM7_BASE) + if (htim->Instance == TIM7) { + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM7, DISABLE); + } +#endif +#if defined(TIM8_BASE) + if (htim->Instance == TIM8) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, DISABLE); + } +#endif +#if defined(TIM9_BASE) + if (htim->Instance == TIM9) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM9, DISABLE); + } +#endif +#if defined(TIM10_BASE) + if (htim->Instance == TIM10) { + RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM10, DISABLE); + } +#endif +} + +/** + * @brief This function return IRQ number corresponding to update interrupt event of timer instance. + * @param tim: timer instance + * @retval IRQ number + */ +IRQn_Type getTimerUpIrq(TIM_TypeDef *tim) +{ + IRQn_Type IRQn = NonMaskableInt_IRQn; + + if (tim != (TIM_TypeDef *)NC) { + /* Get IRQn depending on TIM instance */ + switch ((uint32_t)tim) { +#if defined(TIM1_BASE) + case (uint32_t)TIM1_BASE: + IRQn = TIM1_UP_IRQn; + break; +#endif +#if defined(TIM2_BASE) + case (uint32_t)TIM2_BASE: + IRQn = TIM2_IRQn; + break; +#endif +#if defined(TIM3_BASE) + case (uint32_t)TIM3_BASE: + IRQn = TIM3_IRQn; + break; +#endif +#if defined(TIM4_BASE) + case (uint32_t)TIM4_BASE: + IRQn = TIM4_IRQn; + break; +#endif +#if defined(TIM5_BASE) && !defined(CH32V10x) && !defined(CH32V20x) + case (uint32_t)TIM5_BASE: + IRQn = TIM5_IRQn; + break; +#endif +#if defined(TIM6_BASE) && !defined(CH32V10x) && !defined(CH32V20x) + case (uint32_t)TIM6_BASE: + IRQn = TIM6_IRQn; + break; +#endif +#if defined(TIM7_BASE) && !defined(CH32V10x) && !defined(CH32V20x) + case (uint32_t)TIM7_BASE: + IRQn = TIM7_IRQn; + break; +#endif +#if defined(TIM8_BASE) && !defined(CH32V10x) && !defined(CH32V20x) + case (uint32_t)TIM8_BASE: + IRQn = TIM8_UP_IRQn; + break; +#endif +#if defined(TIM9_BASE) && !defined(CH32V10x) && !defined(CH32V20x) + case (uint32_t)TIM9_BASE: + IRQn = TIM9_UP_IRQn; + break; +#endif +#if defined(TIM10_BASE) && !defined(CH32V10x) && !defined(CH32V20x) + case (uint32_t)TIM10_BASE: + IRQn = TIM10_UP_IRQn; + break; +#endif + default: + _Error_Handler("TIM: Unknown timer IRQn", (int)tim); + break; + } + } + return IRQn; +} + +/** + * @brief This function return IRQ number corresponding to Capture or Compare interrupt event of timer instance. + * @param tim: timer instance + * @retval IRQ number + */ +IRQn_Type getTimerCCIrq(TIM_TypeDef *tim) +{ + IRQn_Type IRQn = NonMaskableInt_IRQn; + + if (tim != (TIM_TypeDef *)NC) { + /* Get IRQn depending on TIM instance */ + switch ((uint32_t)tim) { +#if defined(TIM1_BASE) + case (uint32_t)TIM1_BASE: + IRQn = TIM1_CC_IRQn; + break; +#endif +#if defined(TIM2_BASE) + case (uint32_t)TIM2_BASE: + IRQn = TIM2_IRQn; + break; +#endif +#if defined(TIM3_BASE) + case (uint32_t)TIM3_BASE: + IRQn = TIM3_IRQn; + break; +#endif +#if defined(TIM4_BASE) + case (uint32_t)TIM4_BASE: + IRQn = TIM4_IRQn; + break; +#endif +#if defined(TIM5_BASE) && !defined(CH32V20x) && !defined(CH32V10x) + case (uint32_t)TIM5_BASE: + IRQn = TIM5_IRQn; + break; +#endif +#if defined(TIM6_BASE) && !defined(CH32V20x) && !defined(CH32V10x) + case (uint32_t)TIM6_BASE: + IRQn = TIM6_IRQn; + break; +#endif +#if defined(TIM7_BASE) && !defined(CH32V20x) && !defined(CH32V10x) + case (uint32_t)TIM7_BASE: + IRQn = TIM7_IRQn; + break; +#endif +#if defined(TIM8_BASE) && !defined(CH32V20x) && !defined(CH32V10x) + case (uint32_t)TIM8_BASE: + IRQn = TIM8_CC_IRQn; + break; +#endif +#if defined(TIM9_BASE) && !defined(CH32V20x) && !defined(CH32V10x) + case (uint32_t)TIM9_BASE: + IRQn = TIM9_CC_IRQn; + break; +#endif +#if defined(TIM10_BASE) && !defined(CH32V20x) && !defined(CH32V10x) + case (uint32_t)TIM10_BASE: + IRQn = TIM10_CC_IRQn; + break; +#endif + default: + _Error_Handler("TIM: Unknown timer IRQn", (int)tim); + break; + } + } + return IRQn; +} + +/** + * @brief This function return the timer clock source. + * @param tim: timer instance + * @retval 1 = PCLK1 or 2 = PCLK2 + */ +uint8_t getTimerClkSrc(TIM_TypeDef *tim) +{ + uint8_t clkSrc = 0; + + if (tim != (TIM_TypeDef *)NC) + { + /* Get source clock depending on TIM instance */ + switch ((uint32_t)tim) { +#if defined(TIM2_BASE) + case (uint32_t)TIM2: +#endif +#if defined(TIM3_BASE) + case (uint32_t)TIM3: +#endif +#if defined(TIM4_BASE) + case (uint32_t)TIM4: +#endif +#if defined(TIM5_BASE) + case (uint32_t)TIM5: +#endif +#if defined(TIM6_BASE) + case (uint32_t)TIM6: +#endif +#if defined(TIM7_BASE) + case (uint32_t)TIM7: +#endif + clkSrc = 1; + break; +#if defined(TIM1_BASE) + case (uint32_t)TIM1: +#endif +#if defined(TIM8_BASE) + case (uint32_t)TIM8: +#endif +#if defined(TIM9_BASE) + case (uint32_t)TIM9: +#endif +#if defined(TIM10_BASE) + case (uint32_t)TIM10: +#endif + clkSrc = 2; + break; + default: + _Error_Handler("TIM: Unknown timer instance", (int)tim); + break; + } + } + return clkSrc; +} + +/** + * @brief Return HAL timer channel linked to a PinName + * @param pin: PinName + * @retval Valid HAL channel + */ +uint32_t getTimerChannel(PinName pin) +{ + uint32_t function = pinmap_function(pin, PinMap_TIM); + uint32_t channel = 0; + switch (CH_PIN_CHANNEL(function)) { + case 1: + channel = TIM_Channel_1; + break; + case 2: + channel = TIM_Channel_2; + break; + case 3: + channel = TIM_Channel_3; + break; + case 4: + channel = TIM_Channel_4; + break; + default: + _Error_Handler("TIM: Unknown timer channel", (int)(CH_PIN_CHANNEL(function))); + break; + } + return channel; +} + +#endif /* TIM_MODULE_ENABLED */ + +#ifdef __cplusplus +} +#endif + + diff --git a/cores/arduino/ch32/timer.h b/cores/arduino/ch32/timer.h index f3bb170..eb54d95 100644 --- a/cores/arduino/ch32/timer.h +++ b/cores/arduino/ch32/timer.h @@ -18,177 +18,27 @@ /* Includes ------------------------------------------------------------------*/ #include "ch32_def.h" #include "PinNames.h" +#include "variant.h" + #ifdef __cplusplus extern "C" { #endif -#if defined(HAL_TIM_MODULE_ENABLED) && !defined(HAL_TIM_MODULE_ONLY) + +#if defined(TIM_MODULE_ENABLED) /* Exported constants --------------------------------------------------------*/ #ifndef TIM_IRQ_PRIO -#if (__CORTEX_M == 0x00U) -#define TIM_IRQ_PRIO 3 -#else -#define TIM_IRQ_PRIO 14 -#endif /* __CORTEX_M */ +#define TIM_IRQ_PRIO 0x80 #endif /* TIM_IRQ_PRIO */ -#ifndef TIM_IRQ_SUBPRIO -#define TIM_IRQ_SUBPRIO 0 -#endif -#if defined(TIM1_BASE) && !defined(TIM1_IRQn) -#if defined(CH32F0xx) || defined(CH32G0xx) -#define TIM1_IRQn TIM1_BRK_UP_TRG_COM_IRQn -#define TIM1_IRQHandler TIM1_BRK_UP_TRG_COM_IRQHandler -#elif defined(CH32F1xx) ||defined(CH32G4xx) -#define TIM1_IRQn TIM1_UP_TIM16_IRQn -#if !defined (TIM10_BASE) -#define TIM1_IRQHandler TIM1_UP_TIM16_IRQHandler -#elif defined (TIM10_BASE) -#define TIM1_IRQHandler TIM1_UP_TIM10_IRQHandler -#endif -#elif defined(CH32F3xx) || defined(CH32L4xx) || defined(CH32WBxx) -#define TIM1_IRQn TIM1_UP_TIM16_IRQn -#define TIM1_IRQHandler TIM1_UP_TIM16_IRQHandler -#elif defined(CH32F2xx) || defined(CH32F4xx) || defined(CH32F7xx) -#if !defined (TIM10_BASE) -#define TIM1_IRQn TIM1_UP_IRQn -#define TIM1_IRQHandler TIM1_UP_IRQHandler -#else -#define TIM1_IRQn TIM1_UP_TIM10_IRQn -#define TIM1_IRQHandler TIM1_UP_TIM10_IRQHandler -#endif -#elif defined(CH32H7xx) || defined(CH32L5xx) || defined(CH32MP1xx) ||\ - defined(CH32U5xx) || defined(CH32WLxx) -#define TIM1_IRQn TIM1_UP_IRQn -#define TIM1_IRQHandler TIM1_UP_IRQHandler -#endif -#endif -#if defined(TIM3_BASE) && !defined(TIM3_IRQn) -#if defined(CH32G0xx) && defined(TIM4_BASE) -#define TIM3_IRQn TIM3_TIM4_IRQn -#define TIM3_IRQHandler TIM3_TIM4_IRQHandler -#endif -#endif - -#if defined(TIM4_BASE) && !defined(TIM4_IRQn) -#if defined(CH32G0xx) -#define TIM4_IRQn TIM3_TIM4_IRQn -#endif +#ifndef TIM_IRQ_SUBPRIO +#define TIM_IRQ_SUBPRIO 0x40 #endif -#if defined(TIM6_BASE) && !defined(TIM6_IRQn) -#if defined(DAC_BASE) || defined(DAC1_BASE) -#if defined(CH32G0xx) -#define TIM6_IRQn TIM6_DAC_LPTIM1_IRQn -#define TIM6_IRQHandler TIM6_DAC_LPTIM1_IRQHandler -#elif !defined(CH32F1xx) && !defined(CH32L1xx) && !defined(CH32L5xx) &&\ - !defined(CH32MP1xx) && !defined(CH32U5xx) -#define TIM6_IRQn TIM6_DAC_IRQn -#define TIM6_IRQHandler TIM6_DAC_IRQHandler -#endif -#endif -#endif -#if defined(TIM7_BASE) && !defined(TIM7_IRQn) -#if defined(CH32G0xx) && defined(LPTIM2_BASE) -#define TIM7_IRQn TIM7_LPTIM2_IRQn -#define TIM7_IRQHandler TIM7_LPTIM2_IRQHandler -#elif defined(CH32G4xx) -#define TIM7_IRQn TIM7_DAC_IRQn -#define TIM7_IRQHandler TIM7_DAC_IRQHandler -#endif -#endif -#if defined(TIM8_BASE) && !defined(TIM8_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx)\ - || defined(CH32H7xx) -#define TIM8_IRQn TIM8_UP_TIM13_IRQn -#define TIM8_IRQHandler TIM8_UP_TIM13_IRQHandler -#elif defined(CH32F3xx) || defined(CH32G4xx) || defined(CH32L4xx) ||\ - defined(CH32L5xx) || defined(CH32MP1xx) || defined(CH32U5xx) -#define TIM8_IRQn TIM8_UP_IRQn -#define TIM8_IRQHandler TIM8_UP_IRQHandler -#endif -#endif - -#if defined(TIM9_BASE) && !defined(TIM9_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx) -#define TIM9_IRQn TIM1_BRK_TIM9_IRQn -#define TIM9_IRQHandler TIM1_BRK_TIM9_IRQHandler -#endif -#endif -#if defined(TIM10_BASE) && !defined(TIM10_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx) -#define TIM10_IRQn TIM1_UP_TIM10_IRQn -//TIM10_IRQHandler is mapped on TIM1_IRQHandler when TIM10_IRQn is not defined -#endif -#endif -#if defined(TIM11_BASE) && !defined(TIM11_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx) -#define TIM11_IRQn TIM1_TRG_COM_TIM11_IRQn -#define TIM11_IRQHandler TIM1_TRG_COM_TIM11_IRQHandler -#endif -#endif -#if defined(TIM12_BASE) && !defined(TIM12_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx)\ - || defined(CH32H7xx) -#define TIM12_IRQn TIM8_BRK_TIM12_IRQn -#define TIM12_IRQHandler TIM8_BRK_TIM12_IRQHandler -#endif -#endif -#if defined(TIM13_BASE) && !defined(TIM13_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx)\ - || defined(CH32H7xx) -#define TIM13_IRQn TIM8_UP_TIM13_IRQn -#endif -#endif -#if defined(TIM14_BASE) && !defined(TIM14_IRQn) -#if defined(CH32F1xx) || defined(CH32F2xx) ||defined(CH32F4xx) || defined(CH32F7xx)\ - || defined(CH32H7xx) -#define TIM14_IRQn TIM8_TRG_COM_TIM14_IRQn -#define TIM14_IRQHandler TIM8_TRG_COM_TIM14_IRQHandler -#endif -#endif -#if defined(TIM15_BASE) && !defined(TIM15_IRQn) -#if defined(CH32F1xx) || defined(CH32F3xx) || defined(CH32G4xx) || defined(CH32L4xx) -#define TIM15_IRQn TIM1_BRK_TIM15_IRQn -#define TIM15_IRQHandler TIM1_BRK_TIM15_IRQHandler -#endif -#endif -#if defined(TIM16_BASE) && !defined(TIM16_IRQn) -#if defined(CH32F1xx) || defined(CH32F3xx) || defined(CH32G4xx) || defined(CH32L4xx) || \ - defined(CH32WBxx) -#define TIM16_IRQn TIM1_UP_TIM16_IRQn -//TIM16_IRQHandler is mapped on TIM1_IRQHandler when TIM16_IRQn is not defined -#elif defined(CH32G0xx) && defined(FDCAN1_BASE) -#define TIM16_IRQn TIM16_FDCAN_IT0_IRQn -#define TIM16_IRQHandler TIM16_FDCAN_IT0_IRQHandler -#endif -#endif -#if defined(TIM17_BASE) && !defined(TIM17_IRQn) -#if defined(CH32F1xx) || defined(CH32F3xx) || defined(CH32G4xx) || defined(CH32L4xx) || \ - defined(CH32WBxx) -#define TIM17_IRQn TIM1_TRG_COM_TIM17_IRQn -#define TIM17_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler -#elif defined(CH32G0xx) && defined(FDCAN1_BASE) -#define TIM17_IRQn TIM17_FDCAN_IT1_IRQn -#define TIM17_IRQHandler TIM17_FDCAN_IT1_IRQHandler -#endif -#endif -#if defined(TIM18_BASE) && !defined(TIM18_IRQn) -#if defined(CH32F3xx) -#define TIM18_IRQn TIM18_DAC2_IRQn -#define TIM18_IRQHandler TIM18_DAC2_IRQHandler -#endif -#endif -#if defined(TIM20_BASE) && !defined(TIM20_IRQn) -#if defined(CH32F3xx) || defined(CH32G4xx) -#define TIM20_IRQn TIM20_UP_IRQn -#define TIM20_IRQHandler TIM20_UP_IRQHandler -#endif -#endif typedef enum { #if defined(TIM1_BASE) @@ -220,48 +70,36 @@ typedef enum { #endif #if defined(TIM10_BASE) TIMER10_INDEX, -#endif -#if defined(TIM11_BASE) - TIMER11_INDEX, -#endif -#if defined(TIM12_BASE) - TIMER12_INDEX, -#endif -#if defined(TIM13_BASE) - TIMER13_INDEX, -#endif -#if defined(TIM14_BASE) - TIMER14_INDEX, -#endif -#if defined(TIM15_BASE) - TIMER15_INDEX, -#endif -#if defined(TIM16_BASE) - TIMER16_INDEX, -#endif -#if defined(TIM17_BASE) - TIMER17_INDEX, -#endif -#if defined(TIM18_BASE) - TIMER18_INDEX, -#endif -#if defined(TIM19_BASE) - TIMER19_INDEX, -#endif -#if defined(TIM20_BASE) - TIMER20_INDEX, -#endif -#if defined(TIM21_BASE) - TIMER21_INDEX, -#endif -#if defined(TIM22_BASE) - TIMER22_INDEX, #endif TIMER_NUM, UNKNOWN_TIMER = 0XFFFF } timer_index_t; +typedef enum +{ + HAL_TIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */ + HAL_TIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */ + HAL_TIM_ACTIVE_CHANNEL_3 = 0x04U, /*!< The active channel is 3 */ + HAL_TIM_ACTIVE_CHANNEL_4 = 0x08U, /*!< The active channel is 4 */ + HAL_TIM_ACTIVE_CHANNEL_5 = 0x10U, /*!< The active channel is 5 */ + HAL_TIM_ACTIVE_CHANNEL_6 = 0x20U, /*!< The active channel is 6 */ + HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */ +} TIM_ActiveChannel; + + +typedef struct +{ + TIM_TypeDef *Instance; + TIM_TimeBaseInitTypeDef Init; + TIM_ActiveChannel Channel; //ǷҪ + /* //Not yet considered + TIM_OCInitTypeDef OC_Init; + TIM_ICInitTypeDef IC_Init; + */ +}TIM_HandleTypeDef; + + // This structure is used to be able to get HardwareTimer instance (C++ class) // from handler (C structure) specially for interrupt management typedef struct { @@ -286,7 +124,7 @@ IRQn_Type getTimerCCIrq(TIM_TypeDef *tim); uint32_t getTimerChannel(PinName pin); -#endif /* HAL_TIM_MODULE_ENABLED && !HAL_TIM_MODULE_ONLY */ +#endif /* TIM_MODULE_ENABLED && TIM_MODULE_ONLY */ #ifdef __cplusplus } diff --git a/variants/CH32V00x/CH32V003F4/PeripheralPins.c b/variants/CH32V00x/CH32V003F4/PeripheralPins.c index 1b86c53..0840b0c 100644 --- a/variants/CH32V00x/CH32V003F4/PeripheralPins.c +++ b/variants/CH32V00x/CH32V003F4/PeripheralPins.c @@ -62,18 +62,18 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PD_4, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PD_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PC_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PC_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - - {PD_2, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PC_3, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PC_4, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PD_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PA_2, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PD_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N + {PD_4, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PD_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PC_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PD_7, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PD_2, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PC_3, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PC_4, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + {PD_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PA_2, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PD_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V00x/CH32V003F4/variant_CH32V003F4.h b/variants/CH32V00x/CH32V003F4/variant_CH32V003F4.h index 7959637..453d6f9 100644 --- a/variants/CH32V00x/CH32V003F4/variant_CH32V003F4.h +++ b/variants/CH32V00x/CH32V003F4/variant_CH32V003F4.h @@ -13,10 +13,11 @@ #pragma once /* ENABLE Peripherals */ -// #define ADC_MODULE_ENABLED +#define ADC_MODULE_ENABLED #define UART_MODULE_ENABLED -// #define SPI_MODULE_ENABLED +#define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED /* CH32V003F4 Pins */ #define PA1 PIN_A1 diff --git a/variants/CH32V10x/CH32V103R8T6/PeripheralPins.c b/variants/CH32V10x/CH32V103R8T6/PeripheralPins.c index 872e8a6..5ad7b1b 100644 --- a/variants/CH32V10x/CH32V103R8T6/PeripheralPins.c +++ b/variants/CH32V10x/CH32V103R8T6/PeripheralPins.c @@ -66,44 +66,29 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PA_0_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 - {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PA_1_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 - {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PA_2_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - {PA_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 - {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N - {PA_7_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 - {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_8_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 - {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PA_9_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 - {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 - {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 - {PA_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 - {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 - {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N - {PB_0_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 - {PB_0_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 - {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N - {PB_1_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 - {PB_1_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 - {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 - {PB_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 - {PB_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 - {PB_5, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 - {PB_10, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 - {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 - {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 - {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 - {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PB_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1 + {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2 + {PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3 + {PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4 + + {PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1 + {PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2 + {PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3 + {PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4 + + {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + + {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V10x/CH32V103R8T6/variant_CH32V103R8T6.h b/variants/CH32V10x/CH32V103R8T6/variant_CH32V103R8T6.h index b5f3172..498a6f8 100644 --- a/variants/CH32V10x/CH32V103R8T6/variant_CH32V103R8T6.h +++ b/variants/CH32V10x/CH32V103R8T6/variant_CH32V103R8T6.h @@ -17,6 +17,7 @@ #define UART_MODULE_ENABLED #define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED /* CH32V307VCT6 Pins */ diff --git a/variants/CH32V20x/CH32V203C6/PeripheralPins.c b/variants/CH32V20x/CH32V203C6/PeripheralPins.c index d033661..c8e7e26 100644 --- a/variants/CH32V20x/CH32V203C6/PeripheralPins.c +++ b/variants/CH32V20x/CH32V203C6/PeripheralPins.c @@ -76,45 +76,30 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PA_0_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 - {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PA_1_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 - {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PA_2_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - {PA_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 - {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N - {PA_7_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 - {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_8_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 - {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PA_9_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 - {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 - {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 - {PA_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 - {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 - {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N - {PB_0_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 - {PB_0_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 - {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N - {PB_1_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 - {PB_1_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 - {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 - {PB_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 - {PB_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 - {PB_5, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 - {PB_10, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 - {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 - {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 - {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 - {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PB_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N - {NC, NP, 0} + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1 + {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2 + {PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3 + {PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4 + + {PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1 + {PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2 + {PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3 + {PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4 + + {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + + {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N + {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h b/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h index 91f0398..b493095 100644 --- a/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h +++ b/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h @@ -17,7 +17,7 @@ #define UART_MODULE_ENABLED #define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED - +#define TIM_MODULE_ENABLED /* CH32V203C6 Pins */ #define PA0 PIN_A0 #define PA1 PIN_A1 diff --git a/variants/CH32V20x/CH32V203C8/PeripheralPins.c b/variants/CH32V20x/CH32V203C8/PeripheralPins.c index 1826aad..f0e964c 100644 --- a/variants/CH32V20x/CH32V203C8/PeripheralPins.c +++ b/variants/CH32V20x/CH32V203C8/PeripheralPins.c @@ -78,45 +78,30 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PA_0_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 - {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PA_1_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 - {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PA_2_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - {PA_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 - {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N - {PA_7_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 - {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_8_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 - {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PA_9_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 - {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 - {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 - {PA_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 - {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 - {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N - {PB_0_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 - {PB_0_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 - {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N - {PB_1_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 - {PB_1_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 - {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 - {PB_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 - {PB_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 - {PB_5, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 - {PB_10, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 - {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 - {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 - {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 - {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PB_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N - {NC, NP, 0, 0} + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1 + {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2 + {PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3 + {PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4 + + {PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1 + {PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2 + {PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3 + {PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4 + + {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + + {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N + {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h b/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h index 45ce6d5..cebfacb 100644 --- a/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h +++ b/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h @@ -17,7 +17,7 @@ #define UART_MODULE_ENABLED #define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED - +#define TIM_MODULE_ENABLED /* CH32V203C8 Pins */ #define PA0 PIN_A0 #define PA1 PIN_A1 diff --git a/variants/CH32V20x/CH32V203G8/PeripheralPins.c b/variants/CH32V20x/CH32V203G8/PeripheralPins.c index 0f826f2..c15290c 100644 --- a/variants/CH32V20x/CH32V203G8/PeripheralPins.c +++ b/variants/CH32V20x/CH32V203G8/PeripheralPins.c @@ -76,44 +76,29 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PA_0_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 - {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PA_1_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 - {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PA_2_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - {PA_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 - {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N - {PA_7_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 - {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_8_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 - {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PA_9_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 - {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 - {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 - {PA_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 - {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 - {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N - {PB_0_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 - {PB_0_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 - {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N - {PB_1_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 - {PB_1_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 - {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 - {PB_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 - {PB_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 - {PB_5, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 - {PB_10, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 - {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 - {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 - {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 - {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PB_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1 + {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2 + {PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3 + {PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4 + + {PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1 + {PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2 + {PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3 + {PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4 + + {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + + {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V20x/CH32V203G8/variant_CH32V203G8.h b/variants/CH32V20x/CH32V203G8/variant_CH32V203G8.h index 8f2aa7b..850044e 100644 --- a/variants/CH32V20x/CH32V203G8/variant_CH32V203G8.h +++ b/variants/CH32V20x/CH32V203G8/variant_CH32V203G8.h @@ -17,6 +17,7 @@ #define UART_MODULE_ENABLED #define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED /* CH32V203G8 Pins */ #define PA0 PIN_A0 diff --git a/variants/CH32V20x/CH32V203RB/PeripheralPins.c b/variants/CH32V20x/CH32V203RB/PeripheralPins.c index 9f8ffa9..a2178a6 100644 --- a/variants/CH32V20x/CH32V203RB/PeripheralPins.c +++ b/variants/CH32V20x/CH32V203RB/PeripheralPins.c @@ -76,45 +76,30 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PA_0_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 - {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PA_1_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 - {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PA_2_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - {PA_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 - {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N - {PA_7_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 - {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_8_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 - {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PA_9_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 - {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 - {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 - {PA_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 - {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 - {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N - {PB_0_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 - {PB_0_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 - {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N - {PB_1_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 - {PB_1_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 - {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 - {PB_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 - {PB_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 - {PB_5, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 - {PB_10, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 - {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 - {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 - {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 - {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PB_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N - {NC, NP, 0} + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1 + {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2 + {PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3 + {PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4 + + {PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1 + {PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2 + {PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3 + {PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4 + + {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + + {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N + {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V20x/CH32V203RB/variant_CH32V203RB.h b/variants/CH32V20x/CH32V203RB/variant_CH32V203RB.h index ea3eaf9..d90fed2 100644 --- a/variants/CH32V20x/CH32V203RB/variant_CH32V203RB.h +++ b/variants/CH32V20x/CH32V203RB/variant_CH32V203RB.h @@ -17,7 +17,7 @@ #define UART_MODULE_ENABLED #define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED - +#define TIM_MODULE_ENABLED /* CH32V203RB Pins */ #define PA0 PIN_A0 #define PA1 PIN_A1 diff --git a/variants/CH32V30x/CH32V307VCT6/PeripheralPins.c b/variants/CH32V30x/CH32V307VCT6/PeripheralPins.c index 9317480..8813d39 100644 --- a/variants/CH32V30x/CH32V307VCT6/PeripheralPins.c +++ b/variants/CH32V30x/CH32V307VCT6/PeripheralPins.c @@ -73,44 +73,29 @@ WEAK const PinMap PinMap_I2C_SCL[] = { //*** TIM *** #ifdef TIM_MODULE_ENABLED WEAK const PinMap PinMap_TIM[] = { - {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 - {PA_0_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 - {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 - {PA_1_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 - {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 - {PA_2_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 - {PA_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 - {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N - {PA_7_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 - {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 - {PA_8_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 - {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 - {PA_9_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 - {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 - {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 - {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 - {PA_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 - {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 - {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N - {PB_0_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 - {PB_0_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 - {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N - {PB_1_ALT1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 - {PB_1_ALT2, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 - {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 - {PB_3_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 - {PB_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 - {PB_5, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 - {PB_10, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 - {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 - {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 - {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 - {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N - {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N - {PB_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1 + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2 + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3 + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4 + + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1 + {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2 + {PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3 + {PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4 + + {PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1 + {PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2 + {PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3 + {PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4 + + {PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1 + {PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2 + {PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3 + {PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4 + + {PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N + {PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N + {PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N {NC, NP, 0, 0, 0} }; #endif diff --git a/variants/CH32V30x/CH32V307VCT6/variant_CH32V307VCT6.h b/variants/CH32V30x/CH32V307VCT6/variant_CH32V307VCT6.h index 4f549be..be69f44 100644 --- a/variants/CH32V30x/CH32V307VCT6/variant_CH32V307VCT6.h +++ b/variants/CH32V30x/CH32V307VCT6/variant_CH32V307VCT6.h @@ -18,9 +18,9 @@ #define DAC_MODULE_ENABLED #define SPI_MODULE_ENABLED #define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED /* CH32V307VCT6 Pins */ - #define PA0 PIN_A0 #define PA1 PIN_A1 #define PA2 PIN_A2 diff --git a/variants/CH32X035/CH32X035G8U/variant_CH32X035G8U.h b/variants/CH32X035/CH32X035G8U/variant_CH32X035G8U.h index 9eef4f3..73e4f61 100644 --- a/variants/CH32X035/CH32X035G8U/variant_CH32X035G8U.h +++ b/variants/CH32X035/CH32X035G8U/variant_CH32X035G8U.h @@ -16,7 +16,8 @@ #define ADC_MODULE_ENABLED #define UART_MODULE_ENABLED #define SPI_MODULE_ENABLED -// #define I2C_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED /* CH32VX035G8 Pins */ #define PA0 PIN_A0