diff --git a/docs/source/backends/nxp/nxp-mcuxpresso-example.md b/docs/source/backends/nxp/nxp-mcuxpresso-example.md
new file mode 100644
index 00000000000..ae6f51c9546
--- /dev/null
+++ b/docs/source/backends/nxp/nxp-mcuxpresso-example.md
@@ -0,0 +1,103 @@
+# Using the MCUXpresso Example
+
+This example demonstrates how to build and run the ExecuTorch CIFARNet application for the NXP RT700 platform using the MCUXpresso SDK and the GNU Arm Embedded Toolchain. Before building the project, make sure that all required dependencies are installed and that the necessary environment variables are configured correctly.
+
+## 1. Install the Arm GNU Toolchain
+
+First, download the Arm GCC cross-compilation toolchain that is supported by the RT700 platform:
+
+```text
+https://developer.arm.com/-/media/Files/downloads/gnu/15.2.rel1/binrel/arm-gnu-toolchain-15.2.rel1-x86_64-arm-none-eabi.tar.xz
+```
+
+After extracting the archive, create an environment variable called `ARMGCC_DIR` that points to the root directory of the toolchain installation. The build scripts use this variable to locate the compiler, linker, and other required tools.
+
+Example on Linux:
+
+```bash
+export ARMGCC_DIR=/path/to/arm-gnu-toolchain-15.2.rel1-x86_64-arm-none-eabi
+```
+
+To verify the installation, you can run:
+
+```bash
+$ARMGCC_DIR/bin/arm-none-eabi-gcc --version
+```
+
+The command should print the installed compiler version.
+
+## 2. Download the MCUXpresso SDK
+
+Next, download MCUXpresso SDK version **26.06** for the RT700 device family:
+
+```text
+https://mcuxpresso.nxp.com/builder?hw=MIMXRT700-EVK
+```
+
+When generating the SDK package, make sure that you select:
+
+- **Toolchain:** ARMGCC
+- **SDK Layout:** Classic Layout
+- **Target Board:** MIMXRT700-EVK
+
+After extracting the SDK package, configure the `SdkRootDirPath` environment variable to point to the SDK root directory.
+
+Example on Linux:
+
+```bash
+export SdkRootDirPath=/path/to/SDK_26_06
+```
+
+The build system relies on this variable to locate board support packages, middleware components, startup code, linker scripts, and device-specific libraries.
+
+## 3. Build the Application
+
+Once both environment variables have been configured, build the project by executing the provided build script:
+
+```bash
+cd examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet
+./run.sh
+```
+
+The script configures the build environment, compiles the source code, links the application, and generates the executable image:
+
+```text
+executorch_cifarnet.elf
+```
+
+If the build completes successfully, the ELF file will be available in the build output directory and ready for programming onto the target board.
+
+## 4. Flash the Application
+
+The generated application can be programmed onto the RT700 device using SEGGER J-Link tools.
+
+### Linux
+
+```bash
+echo "loadfile executorch_cifarnet.elf" | \
+/opt/SEGGER/JLink_V796k/JLinkExe \
+    -IF SWD \
+    -speed auto \
+    -Device MIMXRT798S_M33_0
+```
+
+Before flashing, ensure that:
+
+- The board is powered on.
+- The J-Link debugger is connected to the target.
+- The SWD interface is available and correctly wired.
+- No other debugging application is currently using the J-Link connection.
+
+The programming process typically takes only a few seconds. Once the image has been loaded successfully, the application can be started directly from flash memory.
+
+## 5. Running the Example
+
+After the firmware is programmed, reset the board and open a serial terminal connected to the device's debug UART interface. The application will initialize the hardware, load the embedded CIFARNet model, and begin performing image inference.
+
+During execution, inference results and diagnostic messages are printed to the terminal. The included demonstration image contains a cat, and the model is expected to classify the image accordingly.
+
+A successful run produces output similar to the following:
+
+![example](terminal.png "Example")
+
+This example serves as a basic validation that the ExecuTorch runtime, model integration, SDK configuration, and hardware platform are all functioning correctly. It can also be used as a starting point for evaluating custom neural network models and experimenting with on-device machine learning workloads on the RT700 platform.
diff --git a/docs/source/backends/nxp/nxp-overview.md b/docs/source/backends/nxp/nxp-overview.md
index 0539af881e7..342f31b1707 100644
--- a/docs/source/backends/nxp/nxp-overview.md
+++ b/docs/source/backends/nxp/nxp-overview.md
@@ -52,6 +52,11 @@ For more finegrained tutorial, visit [this manual page](https://mcuxpresso.nxp.c
 For guideline how to update the eIQ Neutron Runtime on MCUXpresso SDK, follow the instructions from the eIQ Neutron SDK package `docs/NeutronSDKUserGuide.md` available
 here https://www.nxp.com/design/design-center/software/eiq-ai-development-environment/eiq-toolkit-for-end-to-end-model-development-and-deployment:EIQ-TOOLKIT.
 
+## Using the MCUXpresso Example
+
+[This page](nxp-mcuxpresso-example.md) demonstrates how to build and run the ExecuTorch CIFARNet example from MCUXpresso SDK.
+
+
 ## Reference
 
 **→{doc}`nxp-partitioner` — Partitioner options.**
diff --git a/docs/source/backends/nxp/terminal.png b/docs/source/backends/nxp/terminal.png
new file mode 100644
index 00000000000..9a4f1d70ee8
Binary files /dev/null and b/docs/source/backends/nxp/terminal.png differ
diff --git a/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/CMakeLists.txt b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/CMakeLists.txt
new file mode 100644
index 00000000000..e144fb9921a
--- /dev/null
+++ b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/CMakeLists.txt
@@ -0,0 +1,83 @@
+# Copyright 2026 NXP
+#
+# This source code is licensed under the BSD-style license found in the
+# LICENSE file in the root directory of this source tree.
+
+cmake_minimum_required(VERSION 3.10.0)
+
+# THE VERSION NUMBER
+set(MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION 2)
+set(MCUXPRESSO_CMAKE_FORMAT_MINOR_VERSION 0)
+
+set(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
+set(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
+
+# CURRENT DIRECTORY
+set(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
+
+set(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
+set(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
+
+project(executorch_cifarnet)
+
+enable_language(ASM)
+
+set(MCUX_BUILD_TYPES flash_debug flash_release)
+
+set(MCUX_SDK_PROJECT_NAME executorch_cifarnet.elf)
+
+set(EXECUTORCH_ROOT_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
+
+file(
+  GLOB
+  example_sources
+  ${SdkRootDirPath}/boards/mimxrt700evk/eiq_examples/executorch_cifarnet/cm33_core0/*
+)
+
+add_executable(
+  ${MCUX_SDK_PROJECT_NAME}
+  ${example_sources}
+  ${EXECUTORCH_ROOT_DIR}/backends/nxp/runtime/NeutronBackend.cpp
+  ${SdkRootDirPath}/middleware/tfm/tf-m/platform/ext/common/syscalls_stub.c
+)
+
+add_config_file(
+  ${SdkRootDirPath}/devices/MIMXRT798S/mcuxpresso/startup_MIMXRT798S_cm33_core0.c
+  ""
+  device_startup.MIMXRT798S
+)
+
+include(${SdkRootDirPath}/tools/cmake_toolchain_files/mcux_config.cmake)
+include(config.cmake)
+include(flags.cmake)
+include(${SdkRootDirPath}/devices/MIMXRT798S/all_lib_device.cmake)
+
+set(EXECUTORCH_BUILD_PYBIND OFF)
+set(EXECUTORCH_BUILD_TESTS OFF)
+set(EXECUTORCH_BUILD_DEVTOOLS OFF)
+set(EXECUTORCH_BUILD_EXECUTOR_RUNNER OFF)
+set(EXECUTORCH_BUILD_CPUINFO OFF)
+set(EXECUTORCH_BUILD_PTHREADPOOL OFF)
+set(EXECUTORCH_BUILD_EXTENSION_RUNNER_UTIL ON)
+set(EXECUTORCH_BUILD_PORTABLE_OPS ON)
+set(EXECUTORCH_BUILD_KERNELS_QUANTIZED ON)
+set(CMAKE_POSITION_INDEPENDENT_CODE OFF)
+add_subdirectory(${EXECUTORCH_ROOT_DIR} EXCLUDE_FROM_ALL executorch)
+
+target_link_libraries(
+  ${MCUX_SDK_PROJECT_NAME}
+  PRIVATE
+    -Wl,--start-group
+    executorch
+    executorch_core
+    extension_runner_util
+    quantized_kernels
+    portable_kernels
+    ${SdkRootDirPath}/middleware/eiq/neutron/rt700/cm33/libNeutronDriver.a
+    ${SdkRootDirPath}/middleware/eiq/neutron/rt700/cm33/libNeutronFirmware.a
+    -Wl,--end-group
+)
+
+# wrap all libraries with -Wl,--start-group -Wl,--end-group to prevent link
+# order issue
+group_link_libraries()
diff --git a/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/MIMXRT798Sxxxx_cm33_core0_flash.ld b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/MIMXRT798Sxxxx_cm33_core0_flash.ld
new file mode 100644
index 00000000000..94e386c0e72
--- /dev/null
+++ b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/MIMXRT798Sxxxx_cm33_core0_flash.ld
@@ -0,0 +1,269 @@
+/*
+** ###################################################################
+**     Processors:          MIMXRT798SGAWAR_cm33_core0
+**                          MIMXRT798SGFOA_cm33_core0
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    iMXRT700RM Rev.1, 06/2023
+**     Version:             rev. 1.0, 2022-08-01
+**     Build:               b231012
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2026 NXP
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x10000;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x10000;
+M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000300 : 0;
+
+/* Specify the memory areas */
+/* The SRAM region [0x0-0x7FFFF] is reserved for Non-cached shared memory between M33 and DSP. */
+MEMORY
+{
+  m_flash_config        (RX)  : ORIGIN = 0x28000000, LENGTH = 0x00004000
+  m_interrupts          (RX)  : ORIGIN = 0x28004000, LENGTH = 0x00000300
+  m_text                (RX)  : ORIGIN = 0x28004300, LENGTH = 0x011FBD00
+  m_data                (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00230000
+  m_ncache              (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00200000
+  m_model               (RW)  : ORIGIN = 0x20430000, LENGTH = 0x00100000
+}
+
+/* Define output sections */
+SECTIONS
+{
+  .flash_config :
+  {
+    . = ALIGN(4);
+    __FLASH_BASE = .;
+    KEEP(* (.flash_conf))     /* flash config section */
+    . = ALIGN(4);
+  } > m_flash_config
+
+  /* The startup code goes first into internal ram */
+  .interrupts :
+  {
+    . = ALIGN(4);
+    __VECTOR_TABLE = .;
+    __Vectors = .;
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  /* The program code and other data goes into internal ram */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+
+ .ctors :
+  {
+    __CTOR_LIST__ = .;
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __CTOR_END__ = .;
+  } > m_text
+
+  .dtors :
+  {
+    __DTOR_LIST__ = .;
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    __DTOR_END__ = .;
+  } > m_text
+
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  .interrupts_ram :
+  {
+    . = ALIGN(4);
+    __VECTOR_RAM__ = .;
+    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
+    *(.m_interrupts_ram)     /* This is a user defined section */
+    . += M_VECTOR_RAM_SIZE;
+    . = ALIGN(4);
+    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
+  } > m_data
+
+  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
+  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(CodeQuickAccess)       /* CodeQuickAccess sections */
+    *(DataQuickAccess)       /* DataQuickAccess sections */
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_data
+
+  __NCACHE_REGION_START = ORIGIN(m_ncache);
+  __NCACHE_REGION_SIZE  = LENGTH(m_ncache);
+  __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for ncache data initialization */
+
+  .ncache.init : AT(__NDATA_ROM)
+  {
+    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
+    *(NonCacheable.init)
+    . = ALIGN(4);
+    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
+  } > m_ncache
+  . = __noncachedata_init_end__;
+  .ncache :
+  {
+    *(NonCacheable)
+    . = ALIGN(4);
+    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
+  } > m_ncache
+
+  __MDATA_REGION_START = ORIGIN(m_model);
+  __MDATA_REGION_SIZE  = LENGTH(m_model);
+  __MDATA_ROM = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); /* Symbol is used by startup for model data initialization */
+  .model.init : AT(__MDATA_ROM)
+  {
+    __modeldata_start__ = .;   /* create a global symbol at model data start */
+    . = ALIGN(4);
+    __modeldata_init_end__ = .;   /* create a global symbol at initialized model data end */
+  } > m_model
+  . = __modeldata_init_end__;
+  .model :
+  {
+    . = ALIGN(4);
+    *(.modeldata)
+    *(.modeldata*)
+    __modeldata_end__ = .;
+  } > m_model
+
+  __DATA_END = __MDATA_ROM + (__modeldata_init_end__ - __modeldata_start__);
+
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+  _image_size = __DATA_END - __VECTOR_TABLE;
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_data
+
+  .heap :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE(end = .);
+    __HeapBase = .;
+    . += HEAP_SIZE;
+    __HeapLimit = .;
+    __heap_limit = .; /* Add for _sbrk */
+  } > m_data
+
+  .stack :
+  {
+    . = ALIGN(8);
+    . += STACK_SIZE;
+  } > m_data
+
+  /* Initializes stack on the end of block */
+  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
+  __StackLimit = __StackTop - STACK_SIZE;
+  PROVIDE(__stack = __StackTop);
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
+}
diff --git a/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/config.cmake b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/config.cmake
new file mode 100644
index 00000000000..c3a833e1984
--- /dev/null
+++ b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/config.cmake
@@ -0,0 +1,46 @@
+# Copyright 2026 NXP
+#
+# This source code is licensed under the BSD-style license found in the
+# LICENSE file in the root directory of this source tree.
+
+# config to select component, the format is CONFIG_USE_${component} Please refer
+# to cmake files below to get available components:
+# ${SdkRootDirPath}/devices/MIMXRT798S/all_lib_device.cmake
+
+set(CONFIG_COMPILER gcc)
+set(CONFIG_TOOLCHAIN armgcc)
+set(CONFIG_USE_COMPONENT_CONFIGURATION false)
+set(CONFIG_USE_driver_flash_config true)
+set(CONFIG_USE_CMSIS_Include_core_cm true)
+set(CONFIG_USE_device_CMSIS true)
+set(CONFIG_USE_device_system true)
+set(CONFIG_USE_device_startup true)
+set(CONFIG_USE_driver_clock true)
+set(CONFIG_USE_driver_dsp true)
+set(CONFIG_USE_driver_iopctl_soc true)
+set(CONFIG_USE_driver_power true)
+set(CONFIG_USE_driver_reset true)
+set(CONFIG_USE_driver_cache_xcache true)
+set(CONFIG_USE_driver_common true)
+set(CONFIG_USE_driver_glikey true)
+set(CONFIG_USE_driver_gpio true)
+set(CONFIG_USE_driver_lpflexcomm true)
+set(CONFIG_USE_driver_lpflexcomm_lpuart true)
+set(CONFIG_USE_driver_lpflexcomm_lpi2c true)
+set(CONFIG_USE_driver_xspi true)
+set(CONFIG_USE_utility_assert_lite true)
+set(CONFIG_USE_utilities_misc_utilities true)
+set(CONFIG_USE_utility_str true)
+set(CONFIG_USE_utility_debug_console_lite true)
+set(CONFIG_USE_component_lpuart_adapter true)
+set(CONFIG_USE_driver_pca9422 true)
+set(CONFIG_CORE cm33)
+set(CONFIG_DEVICE MIMXRT798S)
+set(CONFIG_BOARD mimxrt700evk)
+set(CONFIG_KIT mimxrt700evk)
+set(CONFIG_DEVICE_ID MIMXRT798S)
+set(CONFIG_FPU SP_FPU)
+set(CONFIG_DSP DSP)
+set(CONFIG_CORE_ID cm33_core0)
+set(CONFIG_TRUSTZONE TZ)
+set(CONFIG_USE_driver_mu1 true)
diff --git a/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/flags.cmake b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/flags.cmake
new file mode 100644
index 00000000000..e1767b826d1
--- /dev/null
+++ b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/flags.cmake
@@ -0,0 +1,213 @@
+# Copyright 2026 NXP
+#
+# This source code is licensed under the BSD-style license found in the
+# LICENSE file in the root directory of this source tree.
+
+if(NOT DEFINED FPU)
+  set(FPU "-mfloat-abi=hard -mfpu=fpv5-sp-d16")
+endif()
+
+if(NOT DEFINED SPECS)
+  set(SPECS "--specs=nano.specs --specs=nosys.specs")
+endif()
+
+if(NOT DEFINED DEBUG_CONSOLE_CONFIG)
+  set(DEBUG_CONSOLE_CONFIG "-DSDK_DEBUGCONSOLE=1")
+endif()
+
+set(CMAKE_ASM_FLAGS_FLASH_DEBUG
+    " \
+    ${CMAKE_ASM_FLAGS_FLASH_DEBUG} \
+    -D__STARTUP_INITIALIZE_NONCACHEDATA \
+    -D__STARTUP_CLEAR_BSS \
+    -DDSP_IMAGE_COPY_TO_RAM=1 \
+    -DMCUXPRESSO_SDK \
+    -DCPU_MIMXRT798SGFOA_cm33_core0 \
+    -DCPU_MIMXRT798SGFOB_cm33_core0 \
+    -DMIMXRT798S_cm33_core0_SERIES \
+    -g \
+    -mthumb \
+    -mcpu=cortex-m33 \
+    ${FPU} \
+"
+)
+set(CMAKE_ASM_FLAGS_FLASH_RELEASE
+    " \
+    ${CMAKE_ASM_FLAGS_FLASH_RELEASE} \
+    -D__STARTUP_INITIALIZE_NONCACHEDATA \
+    -D__STARTUP_CLEAR_BSS \
+    -DDSP_IMAGE_COPY_TO_RAM=1 \
+    -DMCUXPRESSO_SDK \
+    -DCPU_MIMXRT798SGFOA_cm33_core0 \
+    -DCPU_MIMXRT798SGFOB_cm33_core0 \
+    -DMIMXRT798S_cm33_core0_SERIES \
+    -mthumb \
+    -mcpu=cortex-m33 \
+    ${FPU} \
+"
+)
+set(CMAKE_C_FLAGS_FLASH_DEBUG
+    " \
+    ${CMAKE_C_FLAGS_FLASH_DEBUG} \
+    -DDEBUG \
+    -D__STARTUP_INITIALIZE_NONCACHEDATA \
+    -D__STARTUP_CLEAR_BSS \
+    -DDSP_IMAGE_COPY_TO_RAM=1 \
+    -DEIQ_EXAMPLE_HSRUN_CLOCK \
+    -DMCUX_META_BUILD \
+    -DMCUXPRESSO_SDK \
+    -DCPU_MIMXRT798SGFOA_cm33_core0 \
+    -DCPU_MIMXRT798SGFOB_cm33_core0 \
+    -DMIMXRT798S_cm33_core0_SERIES \
+    -DBOOT_HEADER_ENABLE=1 \
+    -DSDK_I2C_BASED_COMPONENT_USED=1 \
+    -g \
+    -O0 \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -std=gnu99 \
+    -mcpu=cortex-m33 \
+    -DPRINTF_ADVANCED_ENABLE=1 \
+    -DPRINTF_FLOAT_ENABLE=1 \
+    -DNO_HEAP_USAGE=1 \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+"
+)
+set(CMAKE_C_FLAGS_FLASH_RELEASE
+    " \
+    ${CMAKE_C_FLAGS_FLASH_RELEASE} \
+    -DNDEBUG \
+    -D__STARTUP_INITIALIZE_NONCACHEDATA \
+    -D__STARTUP_CLEAR_BSS \
+    -DDSP_IMAGE_COPY_TO_RAM=1 \
+    -DEIQ_EXAMPLE_HSRUN_CLOCK \
+    -DMCUX_META_BUILD \
+    -DMCUXPRESSO_SDK \
+    -DCPU_MIMXRT798SGFOA_cm33_core0 \
+    -DCPU_MIMXRT798SGFOB_cm33_core0 \
+    -DMIMXRT798S_cm33_core0_SERIES \
+    -DBOOT_HEADER_ENABLE=1 \
+    -DSDK_I2C_BASED_COMPONENT_USED=1 \
+    -Os \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -std=gnu99 \
+    -mcpu=cortex-m33 \
+    -DPRINTF_ADVANCED_ENABLE=1 \
+    -DPRINTF_FLOAT_ENABLE=1 \
+    -DNO_HEAP_USAGE=1 \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+"
+)
+set(CMAKE_CXX_FLAGS_FLASH_DEBUG
+    " \
+    ${CMAKE_CXX_FLAGS_FLASH_DEBUG} \
+    -DDEBUG \
+    -DMCUX_META_BUILD \
+    -DMCUXPRESSO_SDK \
+    -DCPU_MIMXRT798SGFOA_cm33_core0 \
+    -DCPU_MIMXRT798SGFOB_cm33_core0 \
+    -DMIMXRT798S_cm33_core0_SERIES \
+    -DBOOT_HEADER_ENABLE=1 \
+    -g \
+    -O0 \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -fno-rtti \
+    -fno-exceptions \
+    -mcpu=cortex-m33 \
+    -DPRINTF_ADVANCED_ENABLE=1 \
+    -DPRINTF_FLOAT_ENABLE=1 \
+    -DNO_HEAP_USAGE=1 \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+"
+)
+set(CMAKE_CXX_FLAGS_FLASH_RELEASE
+    " \
+    ${CMAKE_CXX_FLAGS_FLASH_RELEASE} \
+    -DNDEBUG \
+    -DMCUX_META_BUILD \
+    -DMCUXPRESSO_SDK \
+    -DCPU_MIMXRT798SGFOA_cm33_core0 \
+    -DCPU_MIMXRT798SGFOB_cm33_core0 \
+    -DMIMXRT798S_cm33_core0_SERIES \
+    -DBOOT_HEADER_ENABLE=1 \
+    -Os \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -fno-rtti \
+    -fno-exceptions \
+    -mcpu=cortex-m33 \
+    -DPRINTF_ADVANCED_ENABLE=1 \
+    -DPRINTF_FLOAT_ENABLE=1 \
+    -DNO_HEAP_USAGE=1 \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+"
+)
+set(CMAKE_EXE_LINKER_FLAGS_FLASH_DEBUG
+    " \
+    ${CMAKE_EXE_LINKER_FLAGS_FLASH_DEBUG} \
+    -g \
+    -Xlinker \
+    -Map=output.map \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -Wl,--gc-sections \
+    -Wl,-static \
+    -Wl,--print-memory-usage \
+    -mcpu=cortex-m33 \
+    ${FPU} \
+    ${SPECS} \
+    -T\"${ProjDirPath}/MIMXRT798Sxxxx_cm33_core0_flash.ld\" -static \
+"
+)
+set(CMAKE_EXE_LINKER_FLAGS_FLASH_RELEASE
+    " \
+    ${CMAKE_EXE_LINKER_FLAGS_FLASH_RELEASE} \
+    -Xlinker \
+    -Map=output.map \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -Wl,--gc-sections \
+    -Wl,-static \
+    -Wl,--print-memory-usage \
+    -mcpu=cortex-m33 \
+    ${FPU} \
+    ${SPECS} \
+    -T\"${ProjDirPath}/MIMXRT798Sxxxx_cm33_core0_flash.ld\" -static \
+"
+)
diff --git a/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/run.sh b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/run.sh
new file mode 100755
index 00000000000..06e3401ed49
--- /dev/null
+++ b/examples/nxp/mcuxpresso/imxrt700/executorch_cifarnet/run.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+# Copyright 2026 NXP
+#
+# This source code is licensed under the BSD-style license found in the
+# LICENSE file in the root directory of this source tree.
+
+if [ -z ${ARMGCC_DIR+x} ]; then
+    echo "ARMGCC_DIR needs to be set in the environment!"
+    exit 1;
+fi
+
+if [ -z ${SdkRootDirPath+x} ]; then
+    echo "SdkRootDirPath needs to be set in the environment!"
+    exit 1;
+fi
+
+mkdir cmake-out
+cd cmake-out
+cmake -DSdkRootDirPath=${SdkRootDirPath} \
+      -DCMAKE_TOOLCHAIN_FILE=${SdkRootDirPath}/tools/cmake_toolchain_files/armgcc.cmake \
+      -DCMAKE_BUILD_TYPE=flash_release \
+      -G "Unix Makefiles" \
+      -DINTTYPES_FORMAT:STRING=C99 \
+      ..
+make -j 6 executorch_cifarnet.elf
\ No newline at end of file