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57 | 57 | "C.ADDI16SP","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","ADD immediate to stack pointer in {cheri_int_mode_name}, CADD in {cheri_cap_mode_name}","","","","","","","",""
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58 | 58 | "C.ADDI4SPN","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C0","","","","ADD immediate to stack pointer in {cheri_int_mode_name}, CADD in {cheri_cap_mode_name}","","","","","","","",""
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59 | 59 | "C.MV","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Integer register move in {cheri_int_mode_name}, capability register move in {cheri_cap_mode_name}","","","","","","","",""
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60 |
| -"C.J","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Jump to PC+offset, bounds check minimum size target instruction","mode==D (optional)","","","","","","","" |
61 |
| -"C.JAL","✔","","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Jump to PC+offset, bounds check minimum size target instruction, link to cd","mode==D (optional)","","","","","","","" |
62 |
| -"JAL","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","JAL","","","","Jump to PC+offset, bounds check minimum size target instruction, link to cd","mode==D (optional)","","","","","","","" |
63 |
| -"JALR","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","JALR","","","","Indirect jump and link, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1),cd=seal(nextPCC)","mode==D (optional)","","","","","","","" |
64 |
| -"C.JALR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect jump and link, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1),cd=seal(nextPCC)","mode==D (optional)","","","","","","","" |
65 |
| -"C.JR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect jump, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1)","mode==D (optional)","","","","","","","" |
| 60 | +"C.J","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Jump to PC+offset, bounds check minimum size target instruction","MODE==D (optional)","","","","","","","" |
| 61 | +"C.JAL","✔","","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Jump to PC+offset, bounds check minimum size target instruction, link to cd","MODE==D (optional)","","","","","","","" |
| 62 | +"JAL","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","JAL","","","","Jump to PC+offset, bounds check minimum size target instruction, link to cd","MODE==D (optional)","","","","","","","" |
| 63 | +"JALR","✔","✔","","","","✔","✔","Both","","","","","","","","","","","","","","","","","JALR","","","","Indirect jump and link, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1),cd=seal(nextPCC)","MODE==D (optional)","","","","","","","" |
| 64 | +"C.JALR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect jump and link, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1),cd=seal(nextPCC)","MODE==D (optional)","","","","","","","" |
| 65 | +"C.JR","✔","✔","","","","✔","✔","Both","","","","✔","","","","","","","","","","","","","C2","","","","Indirect jump, bounds check minimum size target instruction. In {cheri_cap_mode_name} set PCC=unseal(cs1)","MODE==D (optional)","","","","","","","" |
66 | 66 | "DRET","✔","✔","✔","","","✔","✔","Both","","","","","","","","","","","","","","","","","SYSTEM","","","","Return from debug mode, sets <<ddc>> from <<dddc>> and <<pcc>> from <<dpcc>>","MODE<D","","","","","","",""
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67 | 67 | "MRET","✔","✔","✔","","","✔","✔","Both","","","","","","","","","","","","","","","","","SYSTEM","","","","Return from machine mode handler, sets <<pcc>> from <<mtvecc>> , needs <<asr_perm>>","MODE<M","PCC.ASR==0","","","","","",""
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68 | 68 | "SRET","✔","✔","✔","","","✔","✔","Both","","","","","","","","","","","","","","","","","SYSTEM","","","","Return from supervisor mode handler, sets <<pcc>> from <<stvecc>>, needs <<asr_perm>>","MODE<S","PCC.ASR==0","mstatus.TSR==1 AND MODE==S","","","","",""
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