From 6ac5f46669157ea9e2ad710a4743a1928da37a07 Mon Sep 17 00:00:00 2001 From: SiYu Wu Date: Tue, 8 Jun 2021 10:25:36 +0800 Subject: [PATCH] [crypto]: add testcase for K-ext Co-authored-by: Shihua Liao --- gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c | 15 +++++++ gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c | 21 ++++++++++ gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c | 15 +++++++ gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c | 27 +++++++++++++ gcc/testsuite/gcc.target/riscv/Zknh-sha256.c | 27 +++++++++++++ .../gcc.target/riscv/Zknh-sha512-01.c | 40 +++++++++++++++++++ .../gcc.target/riscv/Zknh-sha512-02.c | 28 +++++++++++++ .../gcc.target/riscv/Zkr-pollentropy.c | 15 +++++++ gcc/testsuite/gcc.target/riscv/Zksed-sm4.c | 17 ++++++++ gcc/testsuite/gcc.target/riscv/Zksh-sm3.c | 15 +++++++ 10 files changed, 220 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zkr-pollentropy.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zksed-sm4.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zksh-sm3.c diff --git a/gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c b/gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c new file mode 100644 index 000000000000..4ddfa764d23c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc_zknd -mabi=ilp32 -O2" } */ + +int foo1(int rs1) +{ + return __builtin_riscv_aes32dsi(rs1, 1); +} + +int foo2(int rs1) +{ + return __builtin_riscv_aes32dsmi(rs1, 0); +} + +/* { dg-final { scan-assembler-times "aes32dsi" 1 } } */ +/* { dg-final { scan-assembler-times "aes32dsmi" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c b/gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c new file mode 100644 index 000000000000..3abe8342f9ff --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zknd -mabi=lp64 -O2" } */ + +long foo1(long rs1, long rs2) +{ + return __builtin_riscv_aes64ds(rs1, rs2); +} + +long foo2(long rs1, long rs2) +{ + return __builtin_riscv_aes64dsm(rs1, rs2); +} + +long foo3(long rs1) +{ + return __builtin_riscv_aes64im(rs1); +} + +/* { dg-final { scan-assembler-times "aes64ds" 2 } } */ +/* { dg-final { scan-assembler-times "aes64dsm" 1 } } */ +/* { dg-final { scan-assembler-times "aes64im" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c b/gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c new file mode 100644 index 000000000000..a574a49dee87 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc_zkne -mabi=ilp32 -O2" } */ + +int foo1(int rs1) +{ + return __builtin_riscv_aes32esi(rs1, 1); +} + +int foo2(int rs1) +{ + return __builtin_riscv_aes32esmi(rs1, 1); +} + +/* { dg-final { scan-assembler-times "aes32esi" 1 } } */ +/* { dg-final { scan-assembler-times "aes32esmi" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c b/gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c new file mode 100644 index 000000000000..8c8bf43b6804 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zkne -mabi=lp64 -O2" } */ + +long foo1(long rs1, long rs2) +{ + return __builtin_riscv_aes64es(rs1, rs2); +} + +long foo2(long rs1, long rs2) +{ + return __builtin_riscv_aes64esm(rs1, rs2); +} + +long foo3(long rs1) +{ + return __builtin_riscv_aes64ks1i(rs1, 1); +} + +long foo4(long rs1, long rs2) +{ + return __builtin_riscv_aes64ks2(rs1, rs2); +} + +/* { dg-final { scan-assembler-times "aes64es" 2 } } */ +/* { dg-final { scan-assembler-times "aes64esm" 1 } } */ +/* { dg-final { scan-assembler-times "aes64ks1i" 1 } } */ +/* { dg-final { scan-assembler-times "aes64ks2" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c b/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c new file mode 100644 index 000000000000..1c1cb7be5d0d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { riscv64*-*-* } } } */ +/* { dg-options "-march=rv64gc_zknh -mabi=lp64 -O2" } */ + +long foo1(long rs1) +{ + return __builtin_riscv_sha256sig0(rs1); +} + +long foo2(long rs1) +{ + return __builtin_riscv_sha256sig1(rs1); +} + +long foo3(long rs1) +{ + return __builtin_riscv_sha256sum0(rs1); +} + +long foo4(long rs1) +{ + return __builtin_riscv_sha256sum1(rs1); +} + +/* { dg-final { scan-assembler-times "sha256sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum1" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c new file mode 100644 index 000000000000..ef1f6dafe60b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc_zknh -mabi=ilp32 -O2" } */ + +int foo1(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig0h(rs1, rs2); +} + +int foo2(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig0l(rs1, rs2); +} + +int foo3(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig1h(rs1, rs2); +} + +int foo4(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig1l(rs1, rs2); +} + +int foo5(int rs1, int rs2) +{ + return __builtin_riscv_sha512sum0r(rs1, rs2); +} + +int foo6(int rs1, int rs2) +{ + return __builtin_riscv_sha512sum1r(rs1, rs2); +} + +/* { dg-final { scan-assembler-times "sha512sig0h" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig0l" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1h" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1l" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum0r" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum1r" 1 } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c new file mode 100644 index 000000000000..f25cbcfb75b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zknh -mabi=lp64 -O2" } */ + +long foo1(long rs1) +{ + return __builtin_riscv_sha512sig0(rs1); +} + +long foo2(long rs1) +{ + return __builtin_riscv_sha512sig1(rs1); +} + + +long foo3(long rs1) +{ + return __builtin_riscv_sha512sum0(rs1); +} + +long foo4(long rs1) +{ + return __builtin_riscv_sha512sum1(rs1); +} + +/* { dg-final { scan-assembler-times "sha512sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum1" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zkr-pollentropy.c b/gcc/testsuite/gcc.target/riscv/Zkr-pollentropy.c new file mode 100644 index 000000000000..6208e88ebfeb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zkr-pollentropy.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zkr -mabi=lp64 -O2" } */ + +long foo1() +{ + return __builtin_riscv_pollentropy(); +} + +long foo2() +{ + return __builtin_riscv_getnoise(); +} + +/* { dg-final { scan-assembler-times "pollentropy" 2 } } */ +/* { dg-final { scan-assembler-times "getnoise" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zksed-sm4.c b/gcc/testsuite/gcc.target/riscv/Zksed-sm4.c new file mode 100644 index 000000000000..f7bb3e8dc0b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zksed-sm4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zksed -mabi=lp64 -O2" } */ + +long foo1(long rs1) +{ + return __builtin_riscv_sm4ed(rs1, 1); +} + +long foo2(long rs1) +{ + return __builtin_riscv_sm4ks(rs1, 2); +} + + + +/* { dg-final { scan-assembler-times "sm4ed" 1 } } */ +/* { dg-final { scan-assembler-times "sm4ks" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zksh-sm3.c b/gcc/testsuite/gcc.target/riscv/Zksh-sm3.c new file mode 100644 index 000000000000..88ef5a558164 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zksh-sm3.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zksh -mabi=lp64 -O2" } */ + +long foo1(long rs1) +{ + return __builtin_riscv_sm3p0(rs1); +} + +long foo2(long rs1) +{ + return __builtin_riscv_sm3p1(rs1); +} + +/* { dg-final { scan-assembler-times "sm3p0" 1 } } */ +/* { dg-final { scan-assembler-times "sm3p1" 1 } } */ \ No newline at end of file