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Commit 82035e7

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[Hook] Add even-odd pair of register support in TARGET_HARD_REGNO_MODE_OK hook
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gcc/config/riscv/riscv.c

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@@ -4516,6 +4516,14 @@ riscv_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
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!= call_used_or_fixed_reg_p (regno + i))
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return false;
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/* use even/odd pair of registers in rv32 zpsf subset */
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if (TARGET_ZPSF && !TARGET_64BIT)
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{
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if ((GET_MODE_CLASS (mode) == MODE_INT ||
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GET_MODE_CLASS (mode) == MODE_VECTOR_INT) &&
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GET_MODE_UNIT_SIZE (mode) == GET_MODE_SIZE (DImode))
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return !(regno & 1);
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}
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return true;
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}
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