JTAG with FTDI C232HM DDHSL-0 on Raspberry Pi 400 - Error: JTAG scan chain interrogation failed: all ones #524

petemoore · 2024-12-17T00:23:39Z

petemoore
Dec 17, 2024

Hi. I'm having difficulties setting up JTAG debugging. I have the FTDI C232HM DDHSL-0 USB 2.0 Hi-Speed to MPSSE Cable.

I've built openocd from source with two additional fixes for macOS (8653 and 8660).

I've triple checked my wiring, and it looks correct to me:

JTAG Function	GPIO Index	Physical Pin	Wire colour
TCK	GPIO 25	Pin 22	Orange
TDI	GPIO 26	Pin 37	Yellow
TDO	GPIO 24	Pin 18	Green
TMS	GPIO 27	Pin 13	Brown
GND	GND	Pin 6	Black

The mapping from wire colour to JTAG function is was found in the file tcl/interface/ftdi/c232hm.cfg below, and also matches the official datasheet linked above.

My openocd version seems correct (the version I built today):

pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $ openocd --version
Open On-Chip Debugger 0.12.0+dev-03383-ge8aaa767f-dirty (2024-12-16-14:56)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $

The output I am getting:

pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $ openocd -f tcl/interface/ftdi/c232hm.cfg -f rpi4.cfg
Open On-Chip Debugger 0.12.0+dev-03383-ge8aaa767f-dirty (2024-12-16-14:56)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
DEPRECATED! use 'adapter speed' not 'adapter_khz'
Warn : DEPRECATED! use '-baseaddr' not '-ctibase'
Warn : DEPRECATED! use '-baseaddr' not '-ctibase'
Warn : DEPRECATED! use '-baseaddr' not '-ctibase'
Warn : DEPRECATED! use '-baseaddr' not '-ctibase'
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Warn : libusb_detach_kernel_driver() failed with LIBUSB_ERROR_ACCESS, trying to continue anyway
Info : clock speed 1000 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: rpi4.tap: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: Invalid ACK (7) in DAP response
Error: JTAG-DP STICKY ERROR


pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $

The configs I reference are the patched rpi4.cfg file documented in doc/debug-jtag.txt file, plus the tcl/interface/ftdi/c232hm.cfg found in the latest source version of openocd... I also tried with openocd -f tcl/interface/ftdi/c232hm.cfg -f ./tcl/board/rpi4b.cfg (i.e. using the rpi4b.cfg in openocd itself now, rather than the patched version in doc/debug-jtag.txt) but that gave the same result.

pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $ cat tcl/interface/ftdi/c232hm.cfg
# SPDX-License-Identifier: GPL-2.0-or-later

# FTDI USB Hi-Speed to MPSSE Cable
#
# http://www.ftdichip.com/Products/Cables/USBMPSSE.htm
#
# C232HM-DDHSL-0 and C232HM-EDSL-0 provide 3.3V and 5V on pin 1 (Red),
# respectively.
#
# Adapter: http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_C232HM_MPSSE_CABLE.PDF
# Chip: http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT232H.pdf
# See pinout/colors at end of this file.
#
# Tech notes:
# http://www.ftdichip.com/Support/Documents/AppNotes/AN_135_MPSSE_Basics.pdf
# http://www.ftdichip.com/Support/Documents/AppNotes/AN_129_FTDI_Hi_Speed_USB_To_JTAG_Example.pdf

adapter driver ftdi
ftdi device_desc "C232HM-DDHSL-0"
#ftdi device_desc "C232HM-EDHSL-0"

# Common PID for FT232H
ftdi vid_pid 0x0403 0x6014

# Layout
# High data byte 0x40 configures red LED on ACBUS6 initially high (unlit, since active-low)
# Low data byte 0x08 configures TMS on ACBUS3 initially high (asserted); TCK, TDI low
# High direction byte 0x40 configures red LED on ACBUS6 as high (output)
# Low direction byte 0x0b configures TDO on ACBUS2 as low (input)
ftdi layout_init 0x4008 0x400b

# ---A*BUS-------CCCCCCCC|DDDDDDDD
# --------\______76543210|76543210
# LED	0x4000 = 01000000|00000000 = ACBUS6
#GPIOL0	0x0010 = 00000000|00010000 = ADBUS4
#GPIOL1	0x0020 = 00000000|00100000 = ADBUS5
#GPIOL2	0x0040 = 00000000|01000000 = ADBUS6
#GPIOL3	0x0080 = 00000000|10000000 = ADBUS7
# -ndata treats the LED as active-low for expected behavior (toggle when transferring)
ftdi layout_signal LED -ndata 0x4000
# Available for aliasing as desired
ftdi layout_signal GPIOL0 -data 0x0010 -oe 0x0010
ftdi layout_signal GPIOL1 -data 0x0020 -oe 0x0020
ftdi layout_signal GPIOL2 -data 0x0040 -oe 0x0040
ftdi layout_signal GPIOL3 -data 0x0080 -oe 0x0080

# C232HM		FT232H	JTAG/Other
# Num	Color	Name	Func
# 1		Red		VCC		Optionally, can power the board if it is not using its own power supply.
# 2		Orange	ADBUS0	TCK
# 3		Yellow  ADBUS1	TDI
# 4		Green	ADBUS2	TDO
# 5		Brown   ADBUS3	TMS
# 6		Grey	ADBUS4	GPIOL0
# 7		Purple	ADBUS5	GPIOL1
# 8		White	ADBUS6	GPIOL2
# 9		Blue	ADBUS7	GPIOL3
# 10	Black	GND		Connect to ground
pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $

pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $ cat rpi4.cfg
transport select jtag

# we need to enable srst even though we don't connect it
reset_config trst_and_srst

adapter_khz 1000
jtag_ntrst_delay 500

if { [info exists CHIPNAME] } {
  set _CHIPNAME $CHIPNAME
} else {
  set _CHIPNAME rpi4
}

#
# Main DAP
#
if { [info exists DAP_TAPID] } {
   set _DAP_TAPID $DAP_TAPID
} else {
   set _DAP_TAPID 0x4ba00477
}

jtag newtap $_CHIPNAME tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -enable
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap

set _TARGETNAME $_CHIPNAME.a72
set _CTINAME $_CHIPNAME.cti

set CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
set DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
set _cores 4

for { set _core 0 } { $_core < $_cores } { incr _core } {

    cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 0 \
        -ctibase [lindex $CTIBASE $_core]

    target create $_TARGETNAME.$_core aarch64 \
        -dap $_CHIPNAME.dap -coreid $_core \
        -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core

    $_TARGETNAME.$_core configure -event reset-assert-post "aarch64 dbginit"
    $_TARGETNAME.$_core configure -event gdb-attach { halt }
}
pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $

I have enable_jtag_gpio=1 in my config.txt:

pmoore@rpimaster:/tftpboot $ cat config.txt 
#
# Enable 64-bit mode (AArch64)
#
# This file must be copied along with the generated kernel image
# onto a SDHC card with FAT file system, if 64-bit mode is used.
#
# This file also enables the possibility to use two displays with
# the Raspberry Pi 4 and selects the required mode for the USB host
# controller of the Compute Module 4.
#

arm_64bit=1
kernel_address=0x80000

# Enable this for JTAG / SWD debugging!
enable_jtag_gpio=1

[pi02]
kernel=kernel8.img

[pi2]
kernel=kernel8.img

[pi3]
kernel=kernel8.img

[pi3+]
kernel=kernel8.img

[pi4]
armstub=armstub8-rpi4.bin
kernel=kernel8-rpi4.img
max_framebuffers=2

[cm4]
otg_mode=1

[pi5]
kernel=kernel_2712.img

pmoore@rpimaster:/tftpboot $

Finally, I'm running the bootloader from the bootloader-pl011 branch:

pmoore@rpimaster:/tftpboot $ find . -type f -exec shasum -a 256 {} + | sort -k2
aa08182481bfd98788e66633795aef1b6b8af065c525395141f9e5c61716015e  ./armstub8-rpi4.bin
770fb160f58fadedb170685a772f9318b2aa13c481e0246f81f6a0ba64de137c  ./bcm2710-rpi-zero-2-w.dtb
6c50cc760edcdee5c355970da683a4d81d1f04ddde0d52996ac927cf6c8b0d15  ./bcm2711-rpi-400.dtb
5bc13e0f663531c374cbf4645e511708e40a0774fc7771ae869c5504dc9e39b3  ./bcm2711-rpi-4-b.dtb
a7c1333d1b2272f674a1f0ccd0471b232d8fe09992616d52a59f2dacf79d05fa  ./bcm2711-rpi-cm4.dtb
16672ed78def8a8721cbe78031ac91cb2e7f88165078137d8cffc0eb0f5c015f  ./bcm2712d0-rpi-5-b.dtb
4ed671a505f1df45161bd84234cb2f224438e9b8e0ce9b6791686202c8e39d1e  ./bcm2712-rpi-5-b.dtb
af603ebd97e7b692c30195563f7b25656eb05d57838cf1a715ebb470d1614ce4  ./bootcode.bin
7ae1ad95b83669a1d0fa4585543252d5d0285c237a4d106790a94b46672f7023  ./config.txt
af8067302947c01fd9eee72befa54c7e3ef8a48fecde7fd71277f2290b2bf0f7  ./COPYING.linux
ead1e410073a3773af48fb25b1a8691250d553624aaa3e2345c0147c2a68fd1d  ./fixup4cd.dat
21e37b0402974a64779c23621787a37de4706877b78931c94e964db864e8565d  ./fixup4.dat
ead1e410073a3773af48fb25b1a8691250d553624aaa3e2345c0147c2a68fd1d  ./fixup_cd.dat
77129a82097fd05cd66d1a4f458f23b94a07d7b0ed1c5d64b2558f2aaad29aa5  ./fixup.dat
77ffdb1e3b2eba4a9707a317aadabae0cbccced1e0bb64ca9b12f835775727e6  ./kernel_2712.img
538addaa5ee5324fc1e7e7e2ba34bb11d30cbdb0240dbc8f8047f5ee2cb38975  ./kernel8.img
9215e4a3ceeaf42b3ea7d65ffc947cd2c36864695ac104e91c612a94496869a2  ./kernel8-rpi4.img
c7283ff51f863d93a275c66e3b4cb08021a5dd4d8c1e7acc47d872fbe52d3d6b  ./LICENCE.broadcom
ed21003ca15a3938d9e05f412ed18113c83abaefe8e1ca3276e3091273ae2e94  ./overlays/bcm2712d0.dtbo
9b7055722b062ac2c56367fba328caecd73033d7a4a09a0fff7813399fe62816  ./start4cd.elf
451e4320cd2390c28e5c0e79e6e5a704f98fa11670ba57d840d16bcae5aeec2e  ./start4.elf
ffe5e339f77e599fa450e274f30a6de57f066559452c33deb8011904f49d9aac  ./start_cd.elf
5b6d7f52d821010f54bfdc2e5b94944b459f493fd59b41ec94544930793aa9a7  ./start.elf
pmoore@rpimaster:/tftpboot $

At this point, I don't know if it is a macOS issue, or if my JTAG device is broken, or I have misconfigured something. Any help appreciated! I'm not really sure how to debug further.

Many thanks
Pete

petemoore · 2024-12-17T10:25:39Z

petemoore
Dec 17, 2024
Author

I realised of course, I can run in debug mode...

pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $ openocd -f tcl/interface/ftdi/c232hm.cfg -f rpi4.cfg -d4
Open On-Chip Debugger 0.12.0+dev-03383-ge8aaa767f-dirty (2024-12-16-14:56)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
User : 3 1 options.c:52 configuration_output_handler(): debug_level: 4User : 4 1 options.c:52 configuration_output_handler(): 
Debug: 5 1 options.c:346 parse_cmdline_args(): ARGV[0] = "openocd"
Debug: 6 1 options.c:346 parse_cmdline_args(): ARGV[1] = "-f"
Debug: 7 1 options.c:346 parse_cmdline_args(): ARGV[2] = "tcl/interface/ftdi/c232hm.cfg"
Debug: 8 1 options.c:346 parse_cmdline_args(): ARGV[3] = "-f"
Debug: 9 1 options.c:346 parse_cmdline_args(): ARGV[4] = "rpi4.cfg"
Debug: 10 1 options.c:346 parse_cmdline_args(): ARGV[5] = "-d4"
Debug: 11 1 options.c:233 add_default_dirs(): bindir=/usr/local/bin
Debug: 12 1 options.c:234 add_default_dirs(): pkgdatadir=/usr/local/share/openocd
Debug: 13 1 options.c:235 add_default_dirs(): exepath=/usr/local/bin
Debug: 14 1 options.c:236 add_default_dirs(): bin2data=../share/openocd
Debug: 15 1 configuration.c:33 add_script_search_dir(): adding /Users/pmoore/Library/Preferences/org.openocd
Debug: 16 1 configuration.c:33 add_script_search_dir(): adding /Users/pmoore/.config/openocd
Debug: 17 1 configuration.c:33 add_script_search_dir(): adding /Users/pmoore/.openocd
Debug: 18 1 configuration.c:33 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site
Debug: 19 1 configuration.c:33 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts
Debug: 20 1 command.c:153 script_debug(): command - ocd_find tcl/interface/ftdi/c232hm.cfg
Debug: 21 2 configuration.c:88 find_file(): found tcl/interface/ftdi/c232hm.cfg
Debug: 22 2 command.c:153 script_debug(): command - adapter driver ftdi
Debug: 23 2 command.c:153 script_debug(): command - ftdi device_desc C232HM-DDHSL-0
Debug: 24 4 command.c:153 script_debug(): command - ftdi vid_pid 0x0403 0x6014
Debug: 25 4 command.c:153 script_debug(): command - ftdi layout_init 0x4008 0x400b
Debug: 26 4 command.c:153 script_debug(): command - ftdi layout_signal LED -ndata 0x4000
Debug: 27 4 command.c:153 script_debug(): command - ftdi layout_signal GPIOL0 -data 0x0010 -oe 0x0010
Debug: 28 4 command.c:153 script_debug(): command - ftdi layout_signal GPIOL1 -data 0x0020 -oe 0x0020
Debug: 29 4 command.c:153 script_debug(): command - ftdi layout_signal GPIOL2 -data 0x0040 -oe 0x0040
Debug: 30 4 command.c:153 script_debug(): command - ftdi layout_signal GPIOL3 -data 0x0080 -oe 0x0080
Debug: 31 4 command.c:153 script_debug(): command - ocd_find rpi4.cfg
Debug: 32 4 configuration.c:88 find_file(): found rpi4.cfg
Debug: 33 4 command.c:153 script_debug(): command - transport select jtag
Debug: 34 4 command.c:153 script_debug(): command - reset_config trst_and_srst
Debug: 35 4 command.c:153 script_debug(): command - echo DEPRECATED! use 'adapter speed' not 'adapter_khz'
User : 36 4 command.c:678 handle_echo(): DEPRECATED! use 'adapter speed' not 'adapter_khz'
Debug: 37 4 command.c:153 script_debug(): command - adapter speed 1000
Debug: 38 4 adapter.c:253 adapter_config_khz(): handle adapter khz
Debug: 39 4 adapter.c:216 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 40 4 adapter.c:216 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 41 4 command.c:153 script_debug(): command - jtag_ntrst_delay 500
Debug: 42 4 command.c:153 script_debug(): command - jtag newtap rpi4 tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477 -enable
Debug: 43 4 tcl.c:405 handle_jtag_newtap_args(): Creating New Tap, Chip: rpi4, Tap: tap, Dotted: rpi4.tap, 9 params
Debug: 44 4 core.c:1484 jtag_tap_init(): Created Tap: rpi4.tap @ abs position 0, irlen 4, capture: 0x1 mask: 0xf
Debug: 45 4 command.c:153 script_debug(): command - dap create rpi4.dap -chain-position rpi4.tap
Debug: 46 4 command.c:153 script_debug(): command - cti create rpi4.cti.0 -dap rpi4.dap -ap-num 0 -ctibase 0x80420000
Warn : 47 4 arm_adi_v5.c:2415 adiv5_jim_spot_configure(): DEPRECATED! use '-baseaddr' not '-ctibase'
Debug: 48 4 arm_adi_v5.c:1193 dap_get_ap(): refcount AP#0x0 get 1
Debug: 49 4 command.c:153 script_debug(): command - target create rpi4.a72.0 aarch64 -dap rpi4.dap -coreid 0 -dbgbase 0x80410000 -cti rpi4.cti.0
Debug: 50 6 command.c:153 script_debug(): command - rpi4.a72.0 configure -event reset-assert-post aarch64 dbginit
Debug: 51 6 command.c:153 script_debug(): command - rpi4.a72.0 configure -event gdb-attach  halt 
Debug: 52 6 command.c:153 script_debug(): command - cti create rpi4.cti.1 -dap rpi4.dap -ap-num 0 -ctibase 0x80520000
Warn : 53 6 arm_adi_v5.c:2415 adiv5_jim_spot_configure(): DEPRECATED! use '-baseaddr' not '-ctibase'
Debug: 54 6 arm_adi_v5.c:1193 dap_get_ap(): refcount AP#0x0 get 2
Debug: 55 6 command.c:153 script_debug(): command - target create rpi4.a72.1 aarch64 -dap rpi4.dap -coreid 1 -dbgbase 0x80510000 -cti rpi4.cti.1
Debug: 56 6 command.c:259 register_command(): command 'arm' is already registered
Debug: 57 6 command.c:259 register_command(): command 'arm semihosting' is already registered
Debug: 58 6 command.c:259 register_command(): command 'arm semihosting_redirect' is already registered
Debug: 59 6 command.c:259 register_command(): command 'arm semihosting_cmdline' is already registered
Debug: 60 6 command.c:259 register_command(): command 'arm semihosting_fileio' is already registered
Debug: 61 6 command.c:259 register_command(): command 'arm semihosting_resexit' is already registered
Debug: 62 6 command.c:259 register_command(): command 'arm semihosting_read_user_param' is already registered
Debug: 63 6 command.c:259 register_command(): command 'arm semihosting_basedir' is already registered
Debug: 64 6 command.c:259 register_command(): command 'catch_exc' is already registered
Debug: 65 6 command.c:259 register_command(): command 'pauth' is already registered
Debug: 66 6 command.c:259 register_command(): command 'aarch64' is already registered
Debug: 67 6 command.c:259 register_command(): command 'aarch64 cache_info' is already registered
Debug: 68 6 command.c:259 register_command(): command 'aarch64 dbginit' is already registered
Debug: 69 6 command.c:259 register_command(): command 'aarch64 disassemble' is already registered
Debug: 70 6 command.c:259 register_command(): command 'aarch64 maskisr' is already registered
Debug: 71 6 command.c:259 register_command(): command 'aarch64 mcr' is already registered
Debug: 72 6 command.c:259 register_command(): command 'aarch64 mrc' is already registered
Debug: 73 6 command.c:259 register_command(): command 'aarch64 smp' is already registered
Debug: 74 6 command.c:259 register_command(): command 'aarch64 smp_gdb' is already registered
Debug: 75 6 command.c:153 script_debug(): command - rpi4.a72.1 configure -event reset-assert-post aarch64 dbginit
Debug: 76 6 command.c:153 script_debug(): command - rpi4.a72.1 configure -event gdb-attach  halt 
Debug: 77 6 command.c:153 script_debug(): command - cti create rpi4.cti.2 -dap rpi4.dap -ap-num 0 -ctibase 0x80620000
Warn : 78 6 arm_adi_v5.c:2415 adiv5_jim_spot_configure(): DEPRECATED! use '-baseaddr' not '-ctibase'
Debug: 79 6 arm_adi_v5.c:1193 dap_get_ap(): refcount AP#0x0 get 3
Debug: 80 6 command.c:153 script_debug(): command - target create rpi4.a72.2 aarch64 -dap rpi4.dap -coreid 2 -dbgbase 0x80610000 -cti rpi4.cti.2
Debug: 81 6 command.c:259 register_command(): command 'arm' is already registered
Debug: 82 6 command.c:259 register_command(): command 'arm semihosting' is already registered
Debug: 83 6 command.c:259 register_command(): command 'arm semihosting_redirect' is already registered
Debug: 84 6 command.c:259 register_command(): command 'arm semihosting_cmdline' is already registered
Debug: 85 6 command.c:259 register_command(): command 'arm semihosting_fileio' is already registered
Debug: 86 6 command.c:259 register_command(): command 'arm semihosting_resexit' is already registered
Debug: 87 6 command.c:259 register_command(): command 'arm semihosting_read_user_param' is already registered
Debug: 88 6 command.c:259 register_command(): command 'arm semihosting_basedir' is already registered
Debug: 89 6 command.c:259 register_command(): command 'catch_exc' is already registered
Debug: 90 6 command.c:259 register_command(): command 'pauth' is already registered
Debug: 91 6 command.c:259 register_command(): command 'aarch64' is already registered
Debug: 92 6 command.c:259 register_command(): command 'aarch64 cache_info' is already registered
Debug: 93 6 command.c:259 register_command(): command 'aarch64 dbginit' is already registered
Debug: 94 6 command.c:259 register_command(): command 'aarch64 disassemble' is already registered
Debug: 95 6 command.c:259 register_command(): command 'aarch64 maskisr' is already registered
Debug: 96 6 command.c:259 register_command(): command 'aarch64 mcr' is already registered
Debug: 97 6 command.c:259 register_command(): command 'aarch64 mrc' is already registered
Debug: 98 6 command.c:259 register_command(): command 'aarch64 smp' is already registered
Debug: 99 6 command.c:259 register_command(): command 'aarch64 smp_gdb' is already registered
Debug: 100 6 command.c:153 script_debug(): command - rpi4.a72.2 configure -event reset-assert-post aarch64 dbginit
Debug: 101 6 command.c:153 script_debug(): command - rpi4.a72.2 configure -event gdb-attach  halt 
Debug: 102 6 command.c:153 script_debug(): command - cti create rpi4.cti.3 -dap rpi4.dap -ap-num 0 -ctibase 0x80720000
Warn : 103 6 arm_adi_v5.c:2415 adiv5_jim_spot_configure(): DEPRECATED! use '-baseaddr' not '-ctibase'
Debug: 104 6 arm_adi_v5.c:1193 dap_get_ap(): refcount AP#0x0 get 4
Debug: 105 6 command.c:153 script_debug(): command - target create rpi4.a72.3 aarch64 -dap rpi4.dap -coreid 3 -dbgbase 0x80710000 -cti rpi4.cti.3
Debug: 106 6 command.c:259 register_command(): command 'arm' is already registered
Debug: 107 6 command.c:259 register_command(): command 'arm semihosting' is already registered
Debug: 108 6 command.c:259 register_command(): command 'arm semihosting_redirect' is already registered
Debug: 109 6 command.c:259 register_command(): command 'arm semihosting_cmdline' is already registered
Debug: 110 6 command.c:259 register_command(): command 'arm semihosting_fileio' is already registered
Debug: 111 6 command.c:259 register_command(): command 'arm semihosting_resexit' is already registered
Debug: 112 6 command.c:259 register_command(): command 'arm semihosting_read_user_param' is already registered
Debug: 113 6 command.c:259 register_command(): command 'arm semihosting_basedir' is already registered
Debug: 114 6 command.c:259 register_command(): command 'catch_exc' is already registered
Debug: 115 6 command.c:259 register_command(): command 'pauth' is already registered
Debug: 116 6 command.c:259 register_command(): command 'aarch64' is already registered
Debug: 117 6 command.c:259 register_command(): command 'aarch64 cache_info' is already registered
Debug: 118 6 command.c:259 register_command(): command 'aarch64 dbginit' is already registered
Debug: 119 6 command.c:259 register_command(): command 'aarch64 disassemble' is already registered
Debug: 120 6 command.c:259 register_command(): command 'aarch64 maskisr' is already registered
Debug: 121 6 command.c:259 register_command(): command 'aarch64 mcr' is already registered
Debug: 122 6 command.c:259 register_command(): command 'aarch64 mrc' is already registered
Debug: 123 6 command.c:259 register_command(): command 'aarch64 smp' is already registered
Debug: 124 6 command.c:259 register_command(): command 'aarch64 smp_gdb' is already registered
Debug: 125 7 command.c:153 script_debug(): command - rpi4.a72.3 configure -event reset-assert-post aarch64 dbginit
Debug: 126 7 command.c:153 script_debug(): command - rpi4.a72.3 configure -event gdb-attach  halt 
Info : 127 7 server.c:299 add_service(): Listening on port 6666 for tcl connections
Info : 128 7 server.c:299 add_service(): Listening on port 4444 for telnet connections
Debug: 129 7 command.c:153 script_debug(): command - init
Debug: 130 7 command.c:153 script_debug(): command - target init
Debug: 131 7 command.c:153 script_debug(): command - target names
Debug: 132 7 command.c:153 script_debug(): command - rpi4.a72.0 cget -event gdb-flash-erase-start
Debug: 133 7 command.c:153 script_debug(): command - rpi4.a72.0 configure -event gdb-flash-erase-start reset init
Debug: 134 7 command.c:153 script_debug(): command - rpi4.a72.0 cget -event gdb-flash-write-end
Debug: 135 7 command.c:153 script_debug(): command - rpi4.a72.0 configure -event gdb-flash-write-end reset halt
Debug: 136 7 command.c:153 script_debug(): command - rpi4.a72.0 cget -event gdb-attach
Debug: 137 7 command.c:153 script_debug(): command - rpi4.a72.1 cget -event gdb-flash-erase-start
Debug: 138 7 command.c:153 script_debug(): command - rpi4.a72.1 configure -event gdb-flash-erase-start reset init
Debug: 139 7 command.c:153 script_debug(): command - rpi4.a72.1 cget -event gdb-flash-write-end
Debug: 140 7 command.c:153 script_debug(): command - rpi4.a72.1 configure -event gdb-flash-write-end reset halt
Debug: 141 7 command.c:153 script_debug(): command - rpi4.a72.1 cget -event gdb-attach
Debug: 142 7 command.c:153 script_debug(): command - rpi4.a72.2 cget -event gdb-flash-erase-start
Debug: 143 7 command.c:153 script_debug(): command - rpi4.a72.2 configure -event gdb-flash-erase-start reset init
Debug: 144 7 command.c:153 script_debug(): command - rpi4.a72.2 cget -event gdb-flash-write-end
Debug: 145 7 command.c:153 script_debug(): command - rpi4.a72.2 configure -event gdb-flash-write-end reset halt
Debug: 146 7 command.c:153 script_debug(): command - rpi4.a72.2 cget -event gdb-attach
Debug: 147 7 command.c:153 script_debug(): command - rpi4.a72.3 cget -event gdb-flash-erase-start
Debug: 148 7 command.c:153 script_debug(): command - rpi4.a72.3 configure -event gdb-flash-erase-start reset init
Debug: 149 7 command.c:153 script_debug(): command - rpi4.a72.3 cget -event gdb-flash-write-end
Debug: 150 7 command.c:153 script_debug(): command - rpi4.a72.3 configure -event gdb-flash-write-end reset halt
Debug: 151 7 command.c:153 script_debug(): command - rpi4.a72.3 cget -event gdb-attach
Debug: 152 7 target.c:1588 handle_target_init_command(): Initializing targets...
Debug: 153 7 semihosting_common.c:109 semihosting_common_init():  
Debug: 154 7 semihosting_common.c:109 semihosting_common_init():  
Debug: 155 7 semihosting_common.c:109 semihosting_common_init():  
Debug: 156 7 semihosting_common.c:109 semihosting_common_init():  
Debug: 157 7 ftdi.c:654 ftdi_initialize(): ftdi interface using shortest path jtag state transitions
Warn : 158 18 mpsse.c:239 open_matching_device(): libusb_detach_kernel_driver() failed with LIBUSB_ERROR_ACCESS, trying to continue anyway
Debug: 159 19 mpsse.c:429 mpsse_purge(): -
Debug: 160 19 mpsse.c:630 mpsse_set_data_bits_low_byte(): -
Debug: 161 19 mpsse.c:462 buffer_write_byte(): 80
Debug: 162 19 mpsse.c:462 buffer_write_byte(): 08
Debug: 163 19 mpsse.c:462 buffer_write_byte(): 0b
Debug: 164 19 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 165 19 mpsse.c:462 buffer_write_byte(): 82
Debug: 166 19 mpsse.c:462 buffer_write_byte(): 40
Debug: 167 19 mpsse.c:462 buffer_write_byte(): 40
Debug: 168 19 mpsse.c:710 mpsse_loopback_config(): off
Debug: 169 19 mpsse.c:462 buffer_write_byte(): 85
Debug: 170 19 mpsse.c:755 mpsse_set_frequency(): target 1000000 Hz
Debug: 171 19 mpsse.c:747 mpsse_rtck_config(): off
Debug: 172 19 mpsse.c:462 buffer_write_byte(): 97
Debug: 173 19 mpsse.c:736 mpsse_divide_by_5_config(): off
Debug: 174 19 mpsse.c:462 buffer_write_byte(): 8a
Debug: 175 19 mpsse.c:716 mpsse_set_divisor(): 29
Debug: 176 19 mpsse.c:462 buffer_write_byte(): 86
Debug: 177 19 mpsse.c:462 buffer_write_byte(): 1d
Debug: 178 19 mpsse.c:462 buffer_write_byte(): 00
Debug: 179 19 mpsse.c:779 mpsse_set_frequency(): actually 1000000 Hz
Debug: 180 19 mpsse.c:862 mpsse_flush(): write 12, read 0
Debug: 181 19 mpsse.c:836 write_cb(): transferred 12 of 12
Debug: 182 19 mpsse.c:838 write_cb():  80 08 0b 82 40 40 85 97 8a 86 1d 00
Debug: 183 19 adapter.c:216 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 184 19 adapter.c:220 adapter_khz_to_speed(): have adapter set up
Debug: 185 19 mpsse.c:755 mpsse_set_frequency(): target 1000000 Hz
Debug: 186 19 mpsse.c:747 mpsse_rtck_config(): off
Debug: 187 19 mpsse.c:462 buffer_write_byte(): 97
Debug: 188 19 mpsse.c:736 mpsse_divide_by_5_config(): off
Debug: 189 19 mpsse.c:462 buffer_write_byte(): 8a
Debug: 190 19 mpsse.c:716 mpsse_set_divisor(): 29
Debug: 191 19 mpsse.c:462 buffer_write_byte(): 86
Debug: 192 19 mpsse.c:462 buffer_write_byte(): 1d
Debug: 193 19 mpsse.c:462 buffer_write_byte(): 00
Debug: 194 19 mpsse.c:779 mpsse_set_frequency(): actually 1000000 Hz
Debug: 195 19 adapter.c:216 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 196 19 adapter.c:220 adapter_khz_to_speed(): have adapter set up
Info : 197 19 adapter.c:180 adapter_init(): clock speed 1000 kHz
Debug: 198 19 openocd.c:133 handle_init_command(): Debug Adapter init complete
Debug: 199 19 command.c:153 script_debug(): command - transport init
Debug: 200 19 transport.c:219 handle_transport_init(): handle_transport_init
Debug: 201 19 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 202 19 mpsse.c:462 buffer_write_byte(): 82
Debug: 203 19 mpsse.c:462 buffer_write_byte(): 00
Debug: 204 19 mpsse.c:462 buffer_write_byte(): 40
Debug: 205 19 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 206 19 mpsse.c:462 buffer_write_byte(): 82
Debug: 207 19 mpsse.c:462 buffer_write_byte(): 40
Debug: 208 19 mpsse.c:462 buffer_write_byte(): 40
Debug: 209 19 mpsse.c:862 mpsse_flush(): write 11, read 0
Debug: 210 19 mpsse.c:836 write_cb(): transferred 11 of 11
Debug: 211 19 mpsse.c:838 write_cb():  97 8a 86 1d 00 82 00 40 82 40 40
Debug: 212 19 ftdi.c:529 ftdi_reset(): reset trst: 0 srst 0
Debug: 213 19 mpsse.c:862 mpsse_flush(): write 0, read 0
Debug: 214 19 core.c:836 jtag_add_reset(): SRST line released
Debug: 215 19 core.c:861 jtag_add_reset(): TRST line released
Debug: 216 19 core.c:334 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 217 19 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 218 19 mpsse.c:462 buffer_write_byte(): 82
Debug: 219 19 mpsse.c:462 buffer_write_byte(): 00
Debug: 220 19 mpsse.c:462 buffer_write_byte(): 40
Debug: 221 19 ftdi.c:564 ftdi_execute_sleep(): sleep 500000
Debug: 222 19 mpsse.c:862 mpsse_flush(): write 3, read 0
Debug: 223 20 mpsse.c:836 write_cb(): transferred 3 of 3
Debug: 224 20 mpsse.c:838 write_cb():  82 00 40
Debug: 225 622 ftdi.c:570 ftdi_execute_sleep(): sleep 500000 usec while in RESET
Debug: 226 622 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 227 622 mpsse.c:462 buffer_write_byte(): 82
Debug: 228 622 mpsse.c:462 buffer_write_byte(): 40
Debug: 229 622 mpsse.c:462 buffer_write_byte(): 40
Debug: 230 622 mpsse.c:862 mpsse_flush(): write 3, read 0
Debug: 231 623 mpsse.c:836 write_cb(): transferred 3 of 3
Debug: 232 623 mpsse.c:838 write_cb():  82 40 40
Debug: 233 623 core.c:1006 default_interface_jtag_execute_queue(): JTAG SLEEP (TODO)
Debug: 234 623 command.c:153 script_debug(): command - jtag arp_init
Debug: 235 623 core.c:1515 jtag_init_inner(): Init JTAG chain
Debug: 236 623 core.c:334 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 237 623 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 238 623 mpsse.c:462 buffer_write_byte(): 82
Debug: 239 623 mpsse.c:462 buffer_write_byte(): 00
Debug: 240 623 mpsse.c:462 buffer_write_byte(): 40
Debug: 241 623 ftdi.c:345 ftdi_execute_statemove(): statemove end in RESET
Debug: 242 623 ftdi.c:255 move_to_state(): start=RESET goal=RESET
Debug: 243 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 244 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 245 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 246 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 247 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 248 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 249 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 250 623 mpsse.c:580 mpsse_clock_tms_cs(): out 7 bits, tdi=0
Debug: 251 623 mpsse.c:462 buffer_write_byte(): 4b
Debug: 252 623 mpsse.c:462 buffer_write_byte(): 06
Debug: 253 623 mpsse.c:462 buffer_write_byte(): 7f
Debug: 254 623 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 255 623 mpsse.c:462 buffer_write_byte(): 82
Debug: 256 623 mpsse.c:462 buffer_write_byte(): 40
Debug: 257 623 mpsse.c:462 buffer_write_byte(): 40
Debug: 258 623 mpsse.c:862 mpsse_flush(): write 9, read 0
Debug: 259 623 mpsse.c:836 write_cb(): transferred 9 of 9
Debug: 260 623 mpsse.c:838 write_cb():  82 00 40 4b 06 7f 82 40 40
Debug: 261 623 core.c:985 default_interface_jtag_execute_queue(): JTAG TLR RESET to RESET
Debug: 262 623 core.c:1241 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 263 623 core.c:334 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 264 623 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 265 623 mpsse.c:462 buffer_write_byte(): 82
Debug: 266 623 mpsse.c:462 buffer_write_byte(): 00
Debug: 267 623 mpsse.c:462 buffer_write_byte(): 40
Debug: 268 623 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 269 623 ftdi.c:255 move_to_state(): start=RESET goal=DRSHIFT
Debug: 270 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 271 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 272 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 273 623 ftdi.c:259 move_to_state(): tap_set_state(RUN/IDLE)
Debug: 274 623 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 275 623 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 276 623 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 277 623 mpsse.c:580 mpsse_clock_tms_cs(): out 7 bits, tdi=0
Debug: 278 623 mpsse.c:462 buffer_write_byte(): 4b
Debug: 279 623 mpsse.c:462 buffer_write_byte(): 06
Debug: 280 623 mpsse.c:462 buffer_write_byte(): 17
Debug: 281 623 ftdi.c:459 ftdi_execute_scan(): inout field 0/1 672 bits
Debug: 282 623 mpsse.c:504 mpsse_clock_data(): inout 671 bits
Debug: 283 623 mpsse.c:462 buffer_write_byte(): 39
Debug: 284 623 mpsse.c:462 buffer_write_byte(): 52
Debug: 285 623 mpsse.c:462 buffer_write_byte(): 00
Debug: 286 623 mpsse.c:470 buffer_write(): 664 bits
Debug: 287 623 mpsse.c:480 buffer_add_read(): 664 bits, offset 0
Debug: 288 623 mpsse.c:462 buffer_write_byte(): 3b
Debug: 289 623 mpsse.c:462 buffer_write_byte(): 06
Debug: 290 623 mpsse.c:470 buffer_write(): 7 bits
Debug: 291 623 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 292 623 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=1
Debug: 293 623 mpsse.c:462 buffer_write_byte(): 6b
Debug: 294 623 mpsse.c:462 buffer_write_byte(): 00
Debug: 295 623 mpsse.c:462 buffer_write_byte(): 81
Debug: 296 623 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 297 623 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 298 623 mpsse.c:580 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 299 623 mpsse.c:462 buffer_write_byte(): 4b
Debug: 300 623 mpsse.c:462 buffer_write_byte(): 00
Debug: 301 623 mpsse.c:462 buffer_write_byte(): 80
Debug: 302 623 ftdi.c:504 ftdi_execute_scan(): tap_set_state(DRPAUSE)
Debug: 303 623 ftdi.c:521 ftdi_execute_scan(): DR scan, 672 bits, end in DRPAUSE
Debug: 304 623 ftdi.c:345 ftdi_execute_statemove(): statemove end in RESET
Debug: 305 623 ftdi.c:255 move_to_state(): start=DRPAUSE goal=RESET
Debug: 306 623 ftdi.c:259 move_to_state(): tap_set_state(DREXIT2)
Debug: 307 623 ftdi.c:259 move_to_state(): tap_set_state(DRUPDATE)
Debug: 308 623 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 309 623 ftdi.c:259 move_to_state(): tap_set_state(IRSELECT)
Debug: 310 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 311 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 312 623 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 313 623 mpsse.c:580 mpsse_clock_tms_cs(): out 7 bits, tdi=0
Debug: 314 623 mpsse.c:462 buffer_write_byte(): 4b
Debug: 315 623 mpsse.c:462 buffer_write_byte(): 06
Debug: 316 623 mpsse.c:462 buffer_write_byte(): 7f
Debug: 317 623 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 318 623 mpsse.c:462 buffer_write_byte(): 82
Debug: 319 623 mpsse.c:462 buffer_write_byte(): 40
Debug: 320 623 mpsse.c:462 buffer_write_byte(): 40
Debug: 321 623 mpsse.c:862 mpsse_flush(): write 107+1, read 85
Debug: 322 623 mpsse.c:462 buffer_write_byte(): 87
Debug: 323 623 mpsse.c:836 write_cb(): transferred 108 of 108
Debug: 324 623 mpsse.c:838 write_cb():  82 00 40 4b 06 17 39 52 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 325 623 mpsse.c:838 write_cb():  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 326 623 mpsse.c:838 write_cb():  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 3b 06 7f 6b
Debug: 327 623 mpsse.c:838 write_cb():  00 81 4b 00 80 4b 06 7f 82 40 40 87
Debug: 328 623 mpsse.c:798 read_cb():  32 00
Debug: 329 623 mpsse.c:822 read_cb(): raw chunk 2, transferred 0 of 85
Debug: 330 623 mpsse.c:798 read_cb():  32 00
Debug: 331 623 mpsse.c:822 read_cb(): raw chunk 2, transferred 0 of 85
Debug: 332 624 mpsse.c:798 read_cb():  32 60 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 333 624 mpsse.c:798 read_cb():  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 334 624 mpsse.c:798 read_cb():  ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 335 624 mpsse.c:822 read_cb(): raw chunk 87, transferred 85 of 85
Debug: 336 624 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to DRPAUSE
Debug: 337 624 core.c:973 default_interface_jtag_execute_queue():   672b out: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
Debug: 338 624 core.c:978 default_interface_jtag_execute_queue():   672b  in: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
Debug: 339 624 core.c:985 default_interface_jtag_execute_queue(): JTAG TLR RESET to RESET
Error: 340 624 core.c:1129 jtag_examine_chain_check(): JTAG scan chain interrogation failed: all ones
Error: 341 624 core.c:1130 jtag_examine_chain_check(): Check JTAG interface, timings, target power, etc.
Error: 342 624 core.c:1560 jtag_init_inner(): Trying to use configured scan chain anyway...
Debug: 343 624 core.c:1371 jtag_validate_ircapture(): IR capture validation scan
Debug: 344 624 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 345 624 mpsse.c:462 buffer_write_byte(): 82
Debug: 346 624 mpsse.c:462 buffer_write_byte(): 00
Debug: 347 624 mpsse.c:462 buffer_write_byte(): 40
Debug: 348 624 ftdi.c:425 ftdi_execute_scan(): IRSCAN type:3
Debug: 349 624 ftdi.c:255 move_to_state(): start=RESET goal=IRSHIFT
Debug: 350 624 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 351 624 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 352 624 ftdi.c:259 move_to_state(): tap_set_state(RUN/IDLE)
Debug: 353 624 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 354 624 ftdi.c:259 move_to_state(): tap_set_state(IRSELECT)
Debug: 355 624 ftdi.c:259 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 356 624 ftdi.c:259 move_to_state(): tap_set_state(IRSHIFT)
Debug: 357 624 mpsse.c:580 mpsse_clock_tms_cs(): out 7 bits, tdi=0
Debug: 358 624 mpsse.c:462 buffer_write_byte(): 4b
Debug: 359 624 mpsse.c:462 buffer_write_byte(): 06
Debug: 360 624 mpsse.c:462 buffer_write_byte(): 1b
Debug: 361 624 ftdi.c:459 ftdi_execute_scan(): inout field 0/1 6 bits
Debug: 362 624 mpsse.c:504 mpsse_clock_data(): inout 5 bits
Debug: 363 624 mpsse.c:462 buffer_write_byte(): 3b
Debug: 364 624 mpsse.c:462 buffer_write_byte(): 04
Debug: 365 624 mpsse.c:470 buffer_write(): 5 bits
Debug: 366 624 mpsse.c:480 buffer_add_read(): 5 bits, offset 3
Debug: 367 624 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=1
Debug: 368 624 mpsse.c:462 buffer_write_byte(): 6b
Debug: 369 624 mpsse.c:462 buffer_write_byte(): 00
Debug: 370 624 mpsse.c:462 buffer_write_byte(): 81
Debug: 371 624 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 372 624 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 373 624 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 374 624 mpsse.c:462 buffer_write_byte(): 4b
Debug: 375 624 mpsse.c:462 buffer_write_byte(): 01
Debug: 376 624 mpsse.c:462 buffer_write_byte(): 81
Debug: 377 624 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 378 624 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 379 624 ftdi.c:521 ftdi_execute_scan(): IR scan, 6 bits, end in RUN/IDLE
Debug: 380 624 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 381 624 mpsse.c:462 buffer_write_byte(): 82
Debug: 382 624 mpsse.c:462 buffer_write_byte(): 40
Debug: 383 624 mpsse.c:462 buffer_write_byte(): 40
Debug: 384 624 mpsse.c:862 mpsse_flush(): write 18+1, read 2
Debug: 385 624 mpsse.c:462 buffer_write_byte(): 87
Debug: 386 624 mpsse.c:836 write_cb(): transferred 19 of 19
Debug: 387 624 mpsse.c:838 write_cb():  82 00 40 4b 06 1b 3b 04 1f 6b 00 81 4b 01 81 82 40 40 87
Debug: 388 624 mpsse.c:798 read_cb():  32 60 ff ff
Debug: 389 624 mpsse.c:822 read_cb(): raw chunk 4, transferred 2 of 2
Debug: 390 624 core.c:968 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 391 624 core.c:973 default_interface_jtag_execute_queue():   6b out: 3f
Debug: 392 624 core.c:978 default_interface_jtag_execute_queue():   6b  in: 3f
Error: 393 624 core.c:1423 jtag_validate_ircapture(): rpi4.tap: IR capture error; saw 0x0f not 0x01
Debug: 394 625 core.c:334 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 395 625 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 396 625 mpsse.c:462 buffer_write_byte(): 82
Debug: 397 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 398 625 mpsse.c:462 buffer_write_byte(): 40
Debug: 399 625 ftdi.c:345 ftdi_execute_statemove(): statemove end in RESET
Debug: 400 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=RESET
Debug: 401 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 402 625 ftdi.c:259 move_to_state(): tap_set_state(IRSELECT)
Debug: 403 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 404 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 405 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 406 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 407 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 408 625 mpsse.c:580 mpsse_clock_tms_cs(): out 7 bits, tdi=0
Debug: 409 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 410 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 411 625 mpsse.c:462 buffer_write_byte(): 7f
Debug: 412 625 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 413 625 mpsse.c:462 buffer_write_byte(): 82
Debug: 414 625 mpsse.c:462 buffer_write_byte(): 40
Debug: 415 625 mpsse.c:462 buffer_write_byte(): 40
Debug: 416 625 mpsse.c:862 mpsse_flush(): write 9, read 0
Debug: 417 625 mpsse.c:836 write_cb(): transferred 9 of 9
Debug: 418 625 mpsse.c:838 write_cb():  82 00 40 4b 06 7f 82 40 40
Debug: 419 625 core.c:985 default_interface_jtag_execute_queue(): JTAG TLR RESET to RESET
Warn : 420 625 core.c:1583 jtag_init_inner(): Bypassing JTAG setup events due to errors
Debug: 421 625 command.c:153 script_debug(): command - dap init
Debug: 422 625 arm_dap.c:96 dap_init_all(): Initializing all DAPs ...
Debug: 423 625 arm_dap.c:120 dap_init_all(): DAP rpi4.tap configured by default to use ADIv5 protocol
Debug: 424 625 arm_adi_v5.c:783 dap_dp_init(): rpi4.dap
Debug: 425 625 adi_v5_jtag.c:364 adi_jtag_dp_scan_u32(): DP BANK SELECT: 0
Debug: 426 625 arm_adi_v5.c:816 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 427 625 arm_adi_v5.h:683 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
Debug: 428 625 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 429 625 mpsse.c:462 buffer_write_byte(): 82
Debug: 430 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 431 625 mpsse.c:462 buffer_write_byte(): 40
Debug: 432 625 ftdi.c:425 ftdi_execute_scan(): IRSCAN type:2
Debug: 433 625 ftdi.c:255 move_to_state(): start=RESET goal=IRSHIFT
Debug: 434 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 435 625 ftdi.c:259 move_to_state(): tap_set_state(RESET)
Debug: 436 625 ftdi.c:259 move_to_state(): tap_set_state(RUN/IDLE)
Debug: 437 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 438 625 ftdi.c:259 move_to_state(): tap_set_state(IRSELECT)
Debug: 439 625 ftdi.c:259 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 440 625 ftdi.c:259 move_to_state(): tap_set_state(IRSHIFT)
Debug: 441 625 mpsse.c:580 mpsse_clock_tms_cs(): out 7 bits, tdi=0
Debug: 442 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 443 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 444 625 mpsse.c:462 buffer_write_byte(): 1b
Debug: 445 625 ftdi.c:459 ftdi_execute_scan(): out field 0/1 4 bits
Debug: 446 625 mpsse.c:504 mpsse_clock_data(): out 3 bits
Debug: 447 625 mpsse.c:462 buffer_write_byte(): 1b
Debug: 448 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 449 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 450 625 mpsse.c:580 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 451 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 452 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 453 625 mpsse.c:462 buffer_write_byte(): 81
Debug: 454 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 455 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 456 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 457 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 458 625 mpsse.c:462 buffer_write_byte(): 81
Debug: 459 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 460 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 461 625 ftdi.c:521 ftdi_execute_scan(): IR scan, 4 bits, end in RUN/IDLE
Debug: 462 625 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 463 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 464 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 465 625 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 466 625 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 467 625 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 468 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 469 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 470 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 471 625 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 472 625 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 473 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 474 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 475 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 476 625 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 477 625 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 478 625 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 479 625 mpsse.c:462 buffer_write_byte(): 39
Debug: 480 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 481 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 482 625 mpsse.c:470 buffer_write(): 24 bits
Debug: 483 625 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 484 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 485 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 486 625 mpsse.c:470 buffer_write(): 7 bits
Debug: 487 625 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 488 625 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 489 625 mpsse.c:462 buffer_write_byte(): 6b
Debug: 490 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 491 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 492 625 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 493 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 494 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 495 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 496 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 497 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 498 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 499 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 500 625 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 501 625 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 502 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 503 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 504 625 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 505 625 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 506 625 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 507 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 508 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 509 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 510 625 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 511 625 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 512 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 513 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 514 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 515 625 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 516 625 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 517 625 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 518 625 mpsse.c:462 buffer_write_byte(): 39
Debug: 519 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 520 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 521 625 mpsse.c:470 buffer_write(): 24 bits
Debug: 522 625 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 523 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 524 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 525 625 mpsse.c:470 buffer_write(): 7 bits
Debug: 526 625 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 527 625 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 528 625 mpsse.c:462 buffer_write_byte(): 6b
Debug: 529 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 530 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 531 625 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 532 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 533 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 534 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 535 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 536 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 537 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 538 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 539 625 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 540 625 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 541 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 542 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 543 625 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 544 625 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 545 625 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 546 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 547 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 548 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 549 625 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 550 625 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 551 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 552 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 553 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 554 625 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 555 625 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 556 625 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 557 625 mpsse.c:462 buffer_write_byte(): 39
Debug: 558 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 559 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 560 625 mpsse.c:470 buffer_write(): 24 bits
Debug: 561 625 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 562 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 563 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 564 625 mpsse.c:470 buffer_write(): 7 bits
Debug: 565 625 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 566 625 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 567 625 mpsse.c:462 buffer_write_byte(): 6b
Debug: 568 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 569 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 570 625 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 571 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 572 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 573 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 574 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 575 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 576 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 577 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 578 625 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 579 625 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 580 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 581 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 582 625 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 583 625 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 584 625 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 585 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 586 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 587 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 588 625 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 589 625 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 590 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 591 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 592 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 593 625 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 594 625 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 595 625 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 596 625 mpsse.c:462 buffer_write_byte(): 39
Debug: 597 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 598 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 599 625 mpsse.c:470 buffer_write(): 24 bits
Debug: 600 625 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 601 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 602 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 603 625 mpsse.c:470 buffer_write(): 7 bits
Debug: 604 625 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 605 625 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 606 625 mpsse.c:462 buffer_write_byte(): 6b
Debug: 607 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 608 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 609 625 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 610 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 611 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 612 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 613 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 614 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 615 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 616 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 617 625 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 618 625 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 619 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 620 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 621 625 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 622 625 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 623 625 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 624 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 625 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 626 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 627 625 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 628 625 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 629 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 630 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 631 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 632 625 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 633 625 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 634 625 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 635 625 mpsse.c:462 buffer_write_byte(): 39
Debug: 636 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 637 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 638 625 mpsse.c:470 buffer_write(): 24 bits
Debug: 639 625 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 640 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 641 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 642 625 mpsse.c:470 buffer_write(): 7 bits
Debug: 643 625 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 644 625 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 645 625 mpsse.c:462 buffer_write_byte(): 6b
Debug: 646 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 647 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 648 625 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 649 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 650 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 651 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 652 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 653 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 654 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 655 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 656 625 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 657 625 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 658 625 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 659 625 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 660 625 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 661 625 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 662 625 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 663 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 664 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 665 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 666 625 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 667 625 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 668 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 669 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 670 625 mpsse.c:470 buffer_write(): 3 bits
Debug: 671 625 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 672 625 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 673 625 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 674 625 mpsse.c:462 buffer_write_byte(): 39
Debug: 675 625 mpsse.c:462 buffer_write_byte(): 02
Debug: 676 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 677 625 mpsse.c:470 buffer_write(): 24 bits
Debug: 678 625 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 679 625 mpsse.c:462 buffer_write_byte(): 3b
Debug: 680 625 mpsse.c:462 buffer_write_byte(): 06
Debug: 681 625 mpsse.c:470 buffer_write(): 7 bits
Debug: 682 625 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 683 625 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 684 625 mpsse.c:462 buffer_write_byte(): 6b
Debug: 685 625 mpsse.c:462 buffer_write_byte(): 00
Debug: 686 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 687 625 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 688 625 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 689 625 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 690 625 mpsse.c:462 buffer_write_byte(): 4b
Debug: 691 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 692 625 mpsse.c:462 buffer_write_byte(): 01
Debug: 693 625 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 694 625 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 695 625 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 696 625 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 697 625 mpsse.c:462 buffer_write_byte(): 82
Debug: 698 625 mpsse.c:462 buffer_write_byte(): 40
Debug: 699 625 mpsse.c:462 buffer_write_byte(): 40
Debug: 700 625 mpsse.c:862 mpsse_flush(): write 144+1, read 36
Debug: 701 625 mpsse.c:462 buffer_write_byte(): 87
Debug: 702 626 mpsse.c:836 write_cb(): transferred 145 of 145
Debug: 703 626 mpsse.c:838 write_cb():  82 00 40 4b 06 1b 1b 02 42 4b 00 81 4b 01 81 4b 02 01 3b 02 fc 39 02 00 00 00 00 3b 06 80 6b 00
Debug: 704 626 mpsse.c:838 write_cb():  01 4b 01 01 4b 02 01 3b 02 fa 39 02 00 22 00 00 3b 06 d0 6b 00 01 4b 01 01 4b 02 01 3b 02 fb 39
Debug: 705 626 mpsse.c:838 write_cb():  02 00 00 00 00 3b 06 80 6b 00 01 4b 01 01 4b 02 01 3b 02 fa 39 02 00 00 00 00 3b 06 50 6b 00 01
Debug: 706 626 mpsse.c:838 write_cb():  4b 01 01 4b 02 01 3b 02 83 39 02 00 00 00 00 3b 06 00 6b 00 01 4b 01 01 4b 02 01 3b 02 07 39 02
Debug: 707 626 mpsse.c:838 write_cb():  00 00 00 00 3b 06 00 6b 00 01 4b 01 01 82 40 40 87
Debug: 708 626 mpsse.c:798 read_cb():  32 60 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 709 626 mpsse.c:798 read_cb():  ff ff ff ff ff ff
Debug: 710 626 mpsse.c:822 read_cb(): raw chunk 38, transferred 36 of 36
Debug: 711 626 core.c:968 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 712 626 core.c:973 default_interface_jtag_execute_queue():   4b out: 0a
Debug: 713 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 714 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 04
Debug: 715 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 716 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 00000000
Debug: 717 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 718 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 719 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 02
Debug: 720 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 721 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 50000022
Debug: 722 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 723 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 724 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 03
Debug: 725 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 726 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 00000000
Debug: 727 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 728 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 729 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 02
Debug: 730 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 731 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 50000000
Debug: 732 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 733 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 734 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 03
Debug: 735 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 736 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 00000000
Debug: 737 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 738 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 739 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 07
Debug: 740 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 741 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 00000000
Debug: 742 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Error: 743 626 adi_v5_jtag.c:454 jtagdp_overrun_check(): Invalid ACK (7) in DAP response
Debug: 744 626 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 745 626 mpsse.c:462 buffer_write_byte(): 82
Debug: 746 626 mpsse.c:462 buffer_write_byte(): 00
Debug: 747 626 mpsse.c:462 buffer_write_byte(): 40
Debug: 748 626 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 749 626 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 750 626 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 751 626 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 752 626 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 753 626 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 754 626 mpsse.c:462 buffer_write_byte(): 4b
Debug: 755 626 mpsse.c:462 buffer_write_byte(): 02
Debug: 756 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 757 626 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 758 626 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 759 626 mpsse.c:462 buffer_write_byte(): 3b
Debug: 760 626 mpsse.c:462 buffer_write_byte(): 02
Debug: 761 626 mpsse.c:470 buffer_write(): 3 bits
Debug: 762 626 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 763 626 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 764 626 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 765 626 mpsse.c:462 buffer_write_byte(): 39
Debug: 766 626 mpsse.c:462 buffer_write_byte(): 02
Debug: 767 626 mpsse.c:462 buffer_write_byte(): 00
Debug: 768 626 mpsse.c:470 buffer_write(): 24 bits
Debug: 769 626 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 770 626 mpsse.c:462 buffer_write_byte(): 3b
Debug: 771 626 mpsse.c:462 buffer_write_byte(): 06
Debug: 772 626 mpsse.c:470 buffer_write(): 7 bits
Debug: 773 626 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 774 626 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 775 626 mpsse.c:462 buffer_write_byte(): 6b
Debug: 776 626 mpsse.c:462 buffer_write_byte(): 00
Debug: 777 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 778 626 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 779 626 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 780 626 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 781 626 mpsse.c:462 buffer_write_byte(): 4b
Debug: 782 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 783 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 784 626 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 785 626 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 786 626 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 787 626 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 788 626 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 789 626 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 790 626 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 791 626 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 792 626 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 793 626 mpsse.c:462 buffer_write_byte(): 4b
Debug: 794 626 mpsse.c:462 buffer_write_byte(): 02
Debug: 795 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 796 626 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 797 626 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 798 626 mpsse.c:462 buffer_write_byte(): 3b
Debug: 799 626 mpsse.c:462 buffer_write_byte(): 02
Debug: 800 626 mpsse.c:470 buffer_write(): 3 bits
Debug: 801 626 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 802 626 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 803 626 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 804 626 mpsse.c:462 buffer_write_byte(): 39
Debug: 805 626 mpsse.c:462 buffer_write_byte(): 02
Debug: 806 626 mpsse.c:462 buffer_write_byte(): 00
Debug: 807 626 mpsse.c:470 buffer_write(): 24 bits
Debug: 808 626 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 809 626 mpsse.c:462 buffer_write_byte(): 3b
Debug: 810 626 mpsse.c:462 buffer_write_byte(): 06
Debug: 811 626 mpsse.c:470 buffer_write(): 7 bits
Debug: 812 626 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 813 626 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 814 626 mpsse.c:462 buffer_write_byte(): 6b
Debug: 815 626 mpsse.c:462 buffer_write_byte(): 00
Debug: 816 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 817 626 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 818 626 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 819 626 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 820 626 mpsse.c:462 buffer_write_byte(): 4b
Debug: 821 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 822 626 mpsse.c:462 buffer_write_byte(): 01
Debug: 823 626 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 824 626 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 825 626 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 826 626 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 827 626 mpsse.c:462 buffer_write_byte(): 82
Debug: 828 626 mpsse.c:462 buffer_write_byte(): 40
Debug: 829 626 mpsse.c:462 buffer_write_byte(): 40
Debug: 830 626 mpsse.c:862 mpsse_flush(): write 48+1, read 12
Debug: 831 626 mpsse.c:462 buffer_write_byte(): 87
Debug: 832 626 mpsse.c:836 write_cb(): transferred 49 of 49
Debug: 833 626 mpsse.c:838 write_cb():  82 00 40 4b 02 01 3b 02 43 39 02 00 00 00 00 3b 06 00 6b 00 01 4b 01 01 4b 02 01 3b 02 87 39 02
Debug: 834 626 mpsse.c:838 write_cb():  00 00 00 00 3b 06 00 6b 00 01 4b 01 01 82 40 40 87
Debug: 835 626 mpsse.c:798 read_cb():  32 60 ff ff ff ff ff ff ff ff ff ff ff ff
Debug: 836 626 mpsse.c:822 read_cb(): raw chunk 14, transferred 12 of 12
Debug: 837 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 838 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 03
Debug: 839 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 840 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 00000000
Debug: 841 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 842 626 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 843 626 core.c:973 default_interface_jtag_execute_queue():   3b out: 07
Debug: 844 626 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 845 626 core.c:973 default_interface_jtag_execute_queue():   32b out: 00000000
Debug: 846 626 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 847 626 adi_v5_jtag.c:671 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT 0xffffffff
Error: 848 627 adi_v5_jtag.c:682 jtagdp_transaction_endcheck(): JTAG-DP STICKY ERROR
Debug: 849 627 adi_v5_jtag.c:684 jtagdp_transaction_endcheck(): JTAG-DP STICKY OVERRUN
Debug: 850 627 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 851 627 mpsse.c:462 buffer_write_byte(): 82
Debug: 852 627 mpsse.c:462 buffer_write_byte(): 00
Debug: 853 627 mpsse.c:462 buffer_write_byte(): 40
Debug: 854 627 ftdi.c:425 ftdi_execute_scan(): DRSCAN type:3
Debug: 855 627 ftdi.c:255 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 856 627 ftdi.c:259 move_to_state(): tap_set_state(DRSELECT)
Debug: 857 627 ftdi.c:259 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 858 627 ftdi.c:259 move_to_state(): tap_set_state(DRSHIFT)
Debug: 859 627 mpsse.c:580 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 860 627 mpsse.c:462 buffer_write_byte(): 4b
Debug: 861 627 mpsse.c:462 buffer_write_byte(): 02
Debug: 862 627 mpsse.c:462 buffer_write_byte(): 01
Debug: 863 627 ftdi.c:459 ftdi_execute_scan(): inout field 0/2 3 bits
Debug: 864 627 mpsse.c:504 mpsse_clock_data(): inout 3 bits
Debug: 865 627 mpsse.c:462 buffer_write_byte(): 3b
Debug: 866 627 mpsse.c:462 buffer_write_byte(): 02
Debug: 867 627 mpsse.c:470 buffer_write(): 3 bits
Debug: 868 627 mpsse.c:480 buffer_add_read(): 3 bits, offset 5
Debug: 869 627 ftdi.c:459 ftdi_execute_scan(): inout field 1/2 32 bits
Debug: 870 627 mpsse.c:504 mpsse_clock_data(): inout 31 bits
Debug: 871 627 mpsse.c:462 buffer_write_byte(): 39
Debug: 872 627 mpsse.c:462 buffer_write_byte(): 02
Debug: 873 627 mpsse.c:462 buffer_write_byte(): 00
Debug: 874 627 mpsse.c:470 buffer_write(): 24 bits
Debug: 875 627 mpsse.c:480 buffer_add_read(): 24 bits, offset 0
Debug: 876 627 mpsse.c:462 buffer_write_byte(): 3b
Debug: 877 627 mpsse.c:462 buffer_write_byte(): 06
Debug: 878 627 mpsse.c:470 buffer_write(): 7 bits
Debug: 879 627 mpsse.c:480 buffer_add_read(): 7 bits, offset 1
Debug: 880 627 mpsse.c:580 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 881 627 mpsse.c:462 buffer_write_byte(): 6b
Debug: 882 627 mpsse.c:462 buffer_write_byte(): 00
Debug: 883 627 mpsse.c:462 buffer_write_byte(): 01
Debug: 884 627 mpsse.c:480 buffer_add_read(): 1 bits, offset 7
Debug: 885 627 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 886 627 mpsse.c:580 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 887 627 mpsse.c:462 buffer_write_byte(): 4b
Debug: 888 627 mpsse.c:462 buffer_write_byte(): 01
Debug: 889 627 mpsse.c:462 buffer_write_byte(): 01
Debug: 890 627 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 891 627 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 892 627 ftdi.c:521 ftdi_execute_scan(): DR scan, 35 bits, end in RUN/IDLE
Debug: 893 627 mpsse.c:647 mpsse_set_data_bits_high_byte(): -
Debug: 894 627 mpsse.c:462 buffer_write_byte(): 82
Debug: 895 627 mpsse.c:462 buffer_write_byte(): 40
Debug: 896 627 mpsse.c:462 buffer_write_byte(): 40
Debug: 897 627 mpsse.c:862 mpsse_flush(): write 27+1, read 6
Debug: 898 627 mpsse.c:462 buffer_write_byte(): 87
Debug: 899 627 mpsse.c:836 write_cb(): transferred 28 of 28
Debug: 900 627 mpsse.c:838 write_cb():  82 00 40 4b 02 01 3b 02 42 39 02 00 22 00 00 3b 06 50 6b 00 01 4b 01 01 82 40 40 87
Debug: 901 627 mpsse.c:798 read_cb():  32 60 ff ff ff ff ff ff
Debug: 902 627 mpsse.c:822 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 903 627 core.c:968 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 904 627 core.c:973 default_interface_jtag_execute_queue():   3b out: 02
Debug: 905 627 core.c:978 default_interface_jtag_execute_queue():   3b  in: 07
Debug: 906 627 core.c:973 default_interface_jtag_execute_queue():   32b out: 50000022
Debug: 907 627 core.c:978 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 908 627 command.c:529 exec_command(): Command 'dap init' failed with error code -107
User : 909 627 command.c:601 command_run_line(): 
Debug: 910 627 command.c:529 exec_command(): Command 'init' failed with error code -4
User : 911 627 command.c:601 command_run_line(): 
Debug: 912 629 breakpoints.c:328 breakpoint_remove_all_internal(): [rpi4.a72.0] Delete all breakpoints
Debug: 913 629 target.c:2130 target_free_all_working_areas_restore(): freeing all working areas
Debug: 914 629 breakpoints.c:328 breakpoint_remove_all_internal(): [rpi4.a72.1] Delete all breakpoints
Debug: 915 629 target.c:2130 target_free_all_working_areas_restore(): freeing all working areas
Debug: 916 629 breakpoints.c:328 breakpoint_remove_all_internal(): [rpi4.a72.2] Delete all breakpoints
Debug: 917 629 target.c:2130 target_free_all_working_areas_restore(): freeing all working areas
Debug: 918 629 breakpoints.c:328 breakpoint_remove_all_internal(): [rpi4.a72.3] Delete all breakpoints
Debug: 919 629 target.c:2130 target_free_all_working_areas_restore(): freeing all working areas
Debug: 920 630 arm_adi_v5.c:1218 dap_put_ap(): refcount AP#0x0 put 3
Debug: 921 630 arm_adi_v5.c:1218 dap_put_ap(): refcount AP#0x0 put 2
Debug: 922 630 arm_adi_v5.c:1218 dap_put_ap(): refcount AP#0x0 put 1
Debug: 923 630 arm_adi_v5.c:1218 dap_put_ap(): refcount AP#0x0 put 0

0 replies

petemoore · 2024-12-17T10:33:17Z

petemoore
Dec 17, 2024
Author

These seem to be the bad lines:

pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $ openocd -f tcl/interface/ftdi/c232hm.cfg -f rpi4.cfg -d4 2>&1 | grep -i error
Warn : 158 12 mpsse.c:239 open_matching_device(): libusb_detach_kernel_driver() failed with LIBUSB_ERROR_ACCESS, trying to continue anyway
Error: 340 614 core.c:1129 jtag_examine_chain_check(): JTAG scan chain interrogation failed: all ones
Error: 341 614 core.c:1130 jtag_examine_chain_check(): Check JTAG interface, timings, target power, etc.
Error: 342 614 core.c:1560 jtag_init_inner(): Trying to use configured scan chain anyway...
Error: 393 614 core.c:1423 jtag_validate_ircapture(): rpi4.tap: IR capture error; saw 0x0f not 0x01
Warn : 420 615 core.c:1583 jtag_init_inner(): Bypassing JTAG setup events due to errors
Error: 743 616 adi_v5_jtag.c:454 jtagdp_overrun_check(): Invalid ACK (7) in DAP response
Error: 848 616 adi_v5_jtag.c:682 jtagdp_transaction_endcheck(): JTAG-DP STICKY ERROR
Debug: 908 617 command.c:529 exec_command(): Command 'dap init' failed with error code -107
Debug: 910 617 command.c:529 exec_command(): Command 'init' failed with error code -4
pmoore@Petes-iMac:~/git/openocd-code fix-unsigned-char $

0 replies

rsta2 · 2024-12-17T10:51:09Z

rsta2
Dec 17, 2024
Maintainer

Pete, I have currently no idea, but will have a closer look at this later today.

1 reply

rsta2 Dec 17, 2024
Maintainer

I'm wondering about this message:

Warn : 158 12 mpsse.c:239 open_matching_device(): libusb_detach_kernel_driver() failed with LIBUSB_ERROR_ACCESS, trying to continue anyway

Does this mean, that libusb is not properly installed on the system or cannot be accessed? Can you please check, if libusb is available? Or maybe openocd must be run as root to get the proper access?

Your wiring seems to be OK to me. The reset signal /TRST is not connected, but perhaps it is not really necessary, because there is no notice on this in the config file for the interface.

petemoore · 2024-12-17T22:51:43Z

petemoore
Dec 17, 2024
Author

Many thanks Rene! I tried lots of things this evening. I installed OpenOCD from brew (I had built it from source), to make sure it had all the required dependencies, I tried running with sudo and without, I tried lowering the adapter speed, disabling TRST. I also booted into Linux to check alt4 was selected on all the required pins. I also checked libusb was installed and working etc. I even checked the brew formula. I can see that it finds the device, because if I change the name of the device, it fails to find it. At this point I think I will probably give up, and order a second JTAG device, and see if I can get it to work. Another thing I could try is using a different host computer. Anyway, thanks very much for trying to help, and no worries, I'm sure I'll be able to resolve it with a different JTAG device, and they are pretty cheap these days. :-)

0 replies

NyanSatan · 2024-12-27T22:35:27Z

NyanSatan
Dec 27, 2024

I came across of a similar problem - my FT232H-based probe doesn't work on latest macOS. I believe the issue is it being locked by Apple's own driver, which was moved from kernel into userspace (DriverKit). This far I'm failing to unload the extension miserably - kextunload - the tool to unload kernel level drivers - returns success, but the processes wouldn't even change their PID:

➜  ~ sudo kextunload -b com.apple.DriverKit-AppleUSBFTDI
Executing: /usr/bin/kmutil unload -b com.apple.DriverKit-AppleUSBFTDI

➜  ~ ps aux | grep -i ftdi                               
...
_driverkit       71772   0.0  0.0 426851584   1440   ??  Ss   10:16PM   0:00.02 /System/Library/DriverExtensions/com.apple.DriverKit-AppleUSBFTDI.dext/com.apple.DriverKit-AppleUSBFTDI com.apple.DriverKit.AppleUSBFTDI 0x1004fd3b1 com.apple.DriverKit-AppleUSBFTDI
_driverkit       71771   0.0  0.0 426851584   1440   ??  Ss   10:16PM   0:00.03 /System/Library/DriverExtensions/com.apple.DriverKit-AppleUSBFTDI.dext/com.apple.DriverKit-AppleUSBFTDI com.apple.DriverKit.AppleUSBFTDI 0x1004fd3b0 com.apple.DriverKit-AppleUSBFTDI

0 replies

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JTAG with FTDI C232HM DDHSL-0 on Raspberry Pi 400 - Error: JTAG scan chain interrogation failed: all ones #524

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JTAG with FTDI C232HM DDHSL-0 on Raspberry Pi 400 - Error: JTAG scan chain interrogation failed: all ones #524

petemoore Dec 17, 2024

Replies: 5 comments · 1 reply

petemoore Dec 17, 2024 Author

petemoore Dec 17, 2024 Author

rsta2 Dec 17, 2024 Maintainer

rsta2 Dec 17, 2024 Maintainer

petemoore Dec 17, 2024 Author

NyanSatan Dec 27, 2024

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petemoore
Dec 17, 2024
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petemoore
Dec 17, 2024
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rsta2
Dec 17, 2024
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rsta2 Dec 17, 2024
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petemoore
Dec 17, 2024
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NyanSatan
Dec 27, 2024