Should _mm_clflush be under the SSE2 target feature?

[thomcc]

_mm_clflush is provided by the sse2 feature, even though CLFLUSH has a distinct separate CPUID feature bit, independent of SSE2. Additionally, according to https://www.felixcloutier.com/x86/clflush, it is legal for a chip to implement SSE2 but not CLFLUSH (and vice versa):

Also, detecting the presence of the SSE2 extensions with the CPUID instruction does not guarantee that the CLFLUSH instruction is implemented in the processor.

That said, https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=clflush&ig_expand=769,768 does list it as provided by SSE2, but I don't know how normative this is.

We have a few options here

1. Do nothing, i.e. treat the information on the intel intrinsic guide website as correct.
2. Add a clflush target feature to x86 and x86_64.
3. Decide that clflush must be present for us to claim that SSE2 is enabled.

My preference is 1 if we can confirm that SSE2 guarantees presence of clflush. Otherwise, my preference is 2.

I think 3 would be bad, since whether or not SSE2 is supported is important for a lot of things. (If it were some other less critical target feature I might feel differently here)

[Amanieu]

On all current and future CPUs, CLFLUSH is going to be tied to SSE2, so it doesn't make sense to use a separate target feature. I would just go with option 1.