Skip to content

Latest commit

 

History

History
23 lines (19 loc) · 412 Bytes

README.md

File metadata and controls

23 lines (19 loc) · 412 Bytes
Raw

RISCV Bare Metal

A RISC-V bare-metal example with uart, exception, interrupt and kvmmap.

The tutorial is at https://mullerlee.cyou/2020/07/09/riscv-exception-interrupt/

Requirement

  • qemu
  • riscv64-linux-gnu-*

Run

mkdir build
make
make run

Debug

mkdir build
make
make debug
riscv64-linux-gnu-gdb -x debug.txt