From 75ebe3d6cb5d6e7f890c8102ff1ebddd228bf633 Mon Sep 17 00:00:00 2001 From: Saurabh Singh Date: Tue, 26 Dec 2023 19:28:34 -0500 Subject: [PATCH] Refactor makefiles; use print funcs from common.mk --- Makefile | 145 +++++++++++-------------- common.mk | 36 ++++--- scripts/genmkhelp.py | 82 ++++++++++++++ sim/Makefile | 64 ++++------- sw/bootloader/Makefile | 11 +- sw/examples/Makefile | 161 +++++++--------------------- sw/examples/banner/banner.c | 4 +- sw/lib/Makefile | 138 +++++++++--------------- sw/lib/libcatom/start.S | 4 +- synth/altera/de0-cv/Makefile | 30 ++++-- synth/xilinx/spartan6-mini/Makefile | 29 +++-- synth/yosys/Makefile | 54 ++++++---- 12 files changed, 360 insertions(+), 398 deletions(-) create mode 100755 scripts/genmkhelp.py diff --git a/Makefile b/Makefile index 4710f069..e41bb750 100644 --- a/Makefile +++ b/Makefile @@ -1,10 +1,10 @@ #====================================================================# -# ____ _________ _______ __ __ # -# / __ \/ _/ ___// ____/ | / / ____ _/ /_____ ____ ___ # -# / /_/ // / \__ \/ / | | / / / __ `/ __/ __ \/ __ `__ \ # -# / _, _// / ___/ / /___ | |/ / / /_/ / /_/ /_/ / / / / / / # -# /_/ |_/___//____/\____/ |___/ \__,_/\__/\____/_/ /_/ /_/ # -# # +#h#. ____ _________ _______ __ __ +#h#. / __ \/ _/ ___// ____/ | / / ____ _/ /_____ ____ ___ +#h#. / /_/ // / \__ \/ / | | / / / __ `/ __/ __ \/ __ `__ \ +#h#. / _, _// / ___/ / /___ | |/ / / /_/ / /_/ /_/ / / / / / / +#h#. /_/ |_/___//____/\____/ |___/ \__,_/\__/\____/_/ /_/ /_/ +#h# #====================================================================# # README: # This is the root makefile for the RISC-V Atom project. It @@ -13,19 +13,24 @@ # on how to usage instructions and available targets # #====================================================================# -# About this makefile: -# This is a self-documenting Makefile. It parses the target -# descriptions from the makefile autoimetically to display when -# `$ make help` is called. To enable this, One-line target -# description should be prefixed with double hash(#), and should -# placed be in same line as target recepie. lines prefixed with -# #h and #f will be placed at the header abnd footer of help page -# respectively. -#====================================================================# -include common.mk +#h# ***** RISC-V Atom Root Makefile ***** + +#v# Specify soctarget +soctarget?= atombones + +#v# Build for simulation +sim?=1 + +#v# Enable debug build of atomsim +debug?=1 + + +# Flags to the makefiles +MKFLAGS := -s -# soctarget variable (should be overridden using CLI) -soctarget ?= atombones +_mk_check_env:=1 +include common.mk +####################################################################### # Directories sim_dir := sim @@ -35,141 +40,111 @@ bootloader_dir := sw/bootloader lib_dir := sw/lib doxy_dir := sim/docs -# Flags to the makefiles -MKFLAGS := -s - -# Check if RVATOM env variable is set -ifeq ($(RVATOM),) - $(error RVATOM environment variable not set; did you forget to source the sourceme script?) -endif - #====================================================================== # Recepies #====================================================================== -default: sim lib boot ## Build sim, elfdump, and libs +default: sim lib boot #t# Build atomsim, libcatom and bootloader @printf "\n$(CLR_GR)==============================\n" @printf " Build Succesful!\n" @printf "==============================$(CLR_NC)\n" - @printf " - atomsim [$(soctarget)]\n" - @printf " - software libraries\n" - @printf " - bootloader [$(soctarget)]\n" - -all : doxy-pdf default ## Build default with docs - @printf " - doxygen-docs in latex, html & pdf\n" - - -#======== Help ======== -.PHONY : help -help : Makefile ## Show help message - @printf "****** RISC-V Atom Makefile ******\n" - @printf "Usage:\n" - @printf " $$ make soctarget=[SOCTARGET] [TARGET]\n" - @printf "\n" - - @printf "SOCTARGETs:\n" - @printf "\t$(CLR_CY)%-20s$(CLR_NC) %s\n" "atombones" "A barebone Atom based SoC with simulated memories" - @printf "\t$(CLR_CY)%-20s$(CLR_NC) %s\n" "hydrogensoc" "A minimal Atom based SoC" - - @printf "\n" - @printf "TARGETs:\n" - @grep -E -h '\s##\s' $(MAKEFILE_LIST) | awk 'BEGIN {FS = ":.*?## "}; {printf "\t$(CLR_CY)%-20s$(CLR_NC) %s\n", $$1, $$2}' - @printf "\n" - @sed -n 's/^#f //p' Makefile + @printf " soctarget: $(soctarget), sim: $(sim), debug: $(debug)\n" +all : doxy-pdf default #t# Build default with docs # ======== AtomSim ======== .PHONY : sim -sim: boot ## Build atomsim for given target [default: atombones] - @printf "$(CLR_GR)>> Building Atomsim [soctarget:$(soctarget)] $(CLR_NC)\n" - make $(MKFLAGS) -C $(sim_dir) soctarget=$(soctarget) DEBUG=1 +sim: boot #t# Build atomsim for given soctarget + $(call print_msg_root,Building AtomSim) + make $(MKFLAGS) -C $(sim_dir) soctarget=$(soctarget) DEBUG=$(debug) .PHONY: clean-sim -clean-sim: ## Clean atomsim build files - @printf "$(CLR_GR)>> Cleaning atomsim build files $(CLR_NC)\n" +clean-sim: #t# Clean atomsim build files + $(call print_msg_root,Cleaning AtomSim build files) make $(MKFLAGS) -C $(sim_dir) soctarget=$(soctarget) clean .PHONY: test -test: sim lib ## Test the build using banner example - cd sw/examples && make ex=banner sim=1 clean compile run +test: sim lib #t# Test the build using banner example + $(call print_msg_root,Running example on Atomsim) + make $(MKFLAGS) -C $(RVATOM)/sw/examples soctarget=$(soctarget) ex=banner sim=1 clean compile run # ======== Bootloader ======== .PHONY : boot -boot: lib ## Build bootloader for given target [default: atombones] - @printf "$(CLR_GR)>> Building bootloader [soctarget:$(soctarget)] $(CLR_NC)\n" - make $(MKFLAGS) -C $(bootloader_dir) soctarget=$(soctarget) sim=1 +boot: lib #t# Build bootloader for given target + $(call print_msg_root,Building bootloader) + make $(MKFLAGS) -C $(bootloader_dir) soctarget=$(soctarget) sim=$(sim) .PHONY: clean-boot -clean-boot: ## Clean bootloader build files - @printf "$(CLR_GR)>> Cleaning bootloader build files $(CLR_NC)\n" +clean-boot: #t# Clean bootloader build files + $(call print_msg_root,Cleaning bootloader build files) make $(MKFLAGS) -C $(bootloader_dir) soctarget=$(soctarget) clean # ======== SCAR ======== .PHONY: scar -scar: sim ## Verify target using scar - @printf "$(CLR_GR)>> Running SCAR $(CLR_NC)\n" +scar: sim #t# Verify target using scar + $(call print_msg_root,Running SCAR) make $(MKFLAGS) -C $(scar_dir) .PHONY: clean-scar -clean-scar: ## Clean scar directory - @printf "$(CLR_GR)>> Cleaning scar working directory$(CLR_NC)\n" +clean-scar: #t# Clean scar directory + $(call print_msg_root,Cleaning SCAR working directory) make $(MKFLAGS) -C $(scar_dir) clean # ======== ElfDump ======== .PHONY: elfdump -elfdump: ## Build elfdump utility - @printf "$(CLR_GR)>> Building elfdump $(CLR_NC)\n" +elfdump: #t# Build elfdump utility + $(call print_msg_root,Building ELFDump) make $(MKFLAGS) -C $(elfdump_dir) .PHONY: clean-elfdump -clean-elfdump: ## Clean elfdump directory - @printf "$(CLR_GR)>> Cleaning elfdump directory [tools/elfdump/bin/*]$(CLR_NC)\n" +clean-elfdump: #t# Clean elfdump directory + $(call print_msg_root,Cleaning ELFDump build files) make $(MKFLAGS) -C $(elfdump_dir) clean # ======== SW libs ======== .PHONY: lib -lib: ## compile software libraries - @printf "$(CLR_GR)>> Compiling software libraries $(CLR_NC)\n" - make $(MKFLAGS) -C $(lib_dir) soctarget=$(soctarget) +lib: #t# compile software libraries + $(call print_msg_root,Building libcatom) + make $(MKFLAGS) -C $(lib_dir) soctarget=$(soctarget) sim=$(sim) .PHONY: clean-lib -clean-lib: ## Clean software libs - @printf "$(CLR_GR)>> Cleaning build files for lib $(CLR_NC)\n" +clean-lib: #t# Clean software libs + $(call print_msg_root,Cleaning libcatom build files) make $(MKFLAGS) -C $(lib_dir) clean # ======== Documentation ======== .PHONY: doxy -doxy: ## Generate atomsim C++ source documentation - @printf "$(CLR_GR)>> Generating Doxygen C++ documentation [latex & html]$(CLR_NC)\n" +doxy: #t# Generate atomsim C++ source documentation + $(call print_msg_root,Generating docs for AtomSim,LATEX & HTML) make $(MKFLAGS) -C $(doxy_dir) .PHONY: doxy-pdf -doxy-pdf: doxy ## Generate atomsim C++ source documentation (pdf) - @printf "$(CLR_GR)>> Generating Doxygen C++ documentation [pdf]$(CLR_NC)\n" +doxy-pdf: doxy #t# Generate atomsim C++ source documentation (pdf) + $(call print_msg_root,Generating docs for AtomSim,PDF) make $(MKFLAGS) -C $(doxy_dir) pdf .PHONY: clean-doxy -clean-doxy: ## Clean build files for Atomsim docs - @printf "$(CLR_GR)>> Cleaning docs $(CLR_NC)\n" +clean-doxy: #t# Clean build files for Atomsim docs + $(call print_msg_root,Cleaning docs build files) make $(MKFLAGS) -C $(doxy_dir) clean # ======== clean ======== .PHONY: clean -clean: clean-sim clean-boot clean-lib ## Alias for clean-sim, clean-lib +clean: clean-sim clean-boot clean-lib #t# Alias for clean-sim, clean-lib .PHONY: clean-all -clean-all: clean-sim clean-boot clean-scar clean-elfdump clean-lib clean-doxy ## Clean all build files \ No newline at end of file +clean-all: clean-sim clean-boot clean-scar clean-elfdump clean-lib clean-doxy #t# Clean all build files \ No newline at end of file diff --git a/common.mk b/common.mk index 5b152941..a2bb4352 100644 --- a/common.mk +++ b/common.mk @@ -40,19 +40,33 @@ endif ############################################################################## # common functions -# $1 level -# $2 msg +# Print a formatted message +define print_msg_root + @printf "$(CLR_GR)$(CLR_B)❖ %-30b$(CLR_NB)%s$(CLR_NC)\n" "$(1)" "$(2)" +endef +define print_msg + @printf "$(CLR_CY)$(CLR_B)► %-30b$(CLR_NB)%s$(CLR_NC)\n" "$(1)" "$(2)" +endef + +# Print a formatted message with target information +define print_msgt_root + @printf "$(CLR_GR)$(CLR_B)❖ %-30b$(CLR_NB)%s$(CLR_NC)\n" "$(1)" "$(@F)" +endef +define print_msgt + @printf "$(CLR_CY)$(CLR_B)► %-30b$(CLR_NB)%s$(CLR_NC)\n" "$(1)" "$(@F)" +endef + define print_info - @printf "$(CLR_GR)>$(1)$(CLR_NC)\n" + @printf "$(CLR_CY)$(CLR_B)INFO:$(CLR_NB)$(CLR_NC)$(1)\n" endef define print_warn - @printf "$(CLR_YL)> WARNING:$(CLR_NC)$(1)\n" + @printf "$(CLR_YL)$(CLR_B)WARN:$(CLR_NB)$(CLR_NC)$(1)\n" endef define print_error - @printf "$(CLR_RD)> ERROR:$(CLR_NC)$(1)\n" - $(error "Exiting...") + @printf "$(CLR_RD)$(CLR_B)ERROR:$(CLR_NB)$(CLR_NC)$(1)\n" + @printf "Exiting..."; exit 1 endef ############################################################################## @@ -60,12 +74,4 @@ endef .PHONY: help help: Makefile -# Print Header comments '#h#' - @sed -n 's/^#h# //p' $< - -# Print Target descriptions '#t#' - @printf "\nTARGETs:\n" - @grep -E -h '\s#t#\s' $< | awk 'BEGIN {FS = ":.*?#t# "}; {printf "\t$(CLR_CY)%-20s$(CLR_NC) %s\n", $$1, $$2}' - -# Print footer '#f#' - @sed -n 's/^#f# //p' $< + @python3 $(RVATOM)/scripts/genmkhelp.py $< diff --git a/scripts/genmkhelp.py b/scripts/genmkhelp.py new file mode 100755 index 00000000..b0b65171 --- /dev/null +++ b/scripts/genmkhelp.py @@ -0,0 +1,82 @@ +import sys +import re +from colorama import init, Fore, Style + +if len(sys.argv) != 2: + print("ERROR: Invalid Args") + sys.exit(1) + +lines = [] +with open(sys.argv[1], 'r') as mkfile: + lines = mkfile.readlines() + +header = [] +variables = [] +targets = [] +footer = [] + +header_tag_re = re.compile(r'^.*#h#(.*)$') +variable_tag_re = re.compile(r'^.*#v#(.*)$') +variable_decl_re = re.compile(r'^\s*(.*)[?!:+]=(.*)$') +target_tag_re = re.compile(r'^^\s*(.*):.*#t#(.*)$') +footer_tag_re = re.compile(r'^.*#f#(.*)$') + + +var_tag = None +for l in lines: + match = None + + # parse variable declaration, if last line had a var tag #v# + if var_tag is not None: + match = variable_decl_re.match(l) + if match: + variables += [[match.group(1).strip(), match.group(2).strip(), var_tag]] + var_tag = None + continue + + # Header tag: #h# + match = header_tag_re.match(l) + if match: + header += [match.group(1).strip()] + continue + + # Variable tag: #v# + match = variable_tag_re.match(l) + if match: + var_tag = match.group(1).strip() + continue + + match = target_tag_re.match(l) + if match: + targets += [[match.group(1).strip(), match.group(2).strip()]] + continue + + # Footer + match = footer_tag_re.match(l) + if match: + footer += [match.group(1).strip()] + continue + +# ==================== Print Help ==================== +# Header +if len(header) > 0: + print(f'{Fore.GREEN}'+'\n'.join(header)+f'{Fore.RESET}\n') + +print('Usage: make', '[VARs]' if len(variables) > 0 else '', 'TARGETs' if len(targets) > 0 else '') + +# variables +if len(variables) > 0: + print('\nVARs:') + for v in variables: + print(Fore.CYAN+'\t{:<15s}{}{:<15s}'.format(v[0], Fore.RESET, v[2]), end='') + print(f' (default: {v[1]})' if v[1] else '') + +# targets +if len(targets) > 0: + print('\nTARGETs:') + for t in targets: + print(Fore.CYAN+'\t{:<15s}{}{:<15s}'.format(t[0], Fore.RESET, t[1])) + +# footer +if len(footer)>0: + print(f'\n'+'\n'.join(footer)) diff --git a/sim/Makefile b/sim/Makefile index 07e58e91..d83946a6 100755 --- a/sim/Makefile +++ b/sim/Makefile @@ -1,19 +1,18 @@ #################################################### -#h ********* Makefile for Building AtomSim ********* +#h# ******* Makefile for Building AtomSim ******* #################################################### -# To configure build, override the following -# vaiables from command line while calling make, -# like so: -# $ make soctarget=hydrogensoc +#v# Specify soctarget soctarget ?= None + +#v# Enable debug build DEBUG ?= 0 -DPI ?= 0 -# Uncomment/define while calling make to disable colors -# NO_COLOR = 1 +#v# Enable DPI support in RTL +DPI ?= 0 include ../common.mk +#################################################### # use default soctarget if not specified DEFAULT_SOCTARGET := atombones @@ -107,20 +106,20 @@ VSRCS := $(shell $(RVATOM)/scripts/cfgparse.py $(JSONCFG) --vsrcs) #################################################### # Recepies -default: sim #t Alias for sim -sim: lib_verilated $(EXE) #t Build atomsim +default: sim #t# Alias for sim +sim: lib_verilated $(EXE) #t# Build atomsim lib_verilated: $(VERILATED_DIR)/V$(VTOPMODULE)__ALL.a # Verilate verilog $(VERILATED_DIR)/V$(VTOPMODULE)__ALL.a: $(VSRCS) - @printf "$(CLR_CY)> Verilating Verilog files$(CLR_NC)\n" + $(call print_msg,Verilating Verilog) $(VC) $(VFLAGS) `$(RVATOM)/scripts/cfgparse.py $(JSONCFG) -f --tool=verilator` - @printf "$(CLR_CY)> Generating shared object$(CLR_NC)\n" - make -s -C $(VERILATED_DIR) -f V$(VTOPMODULE).mk + $(call print_msgt,Generating library) + make -s -C $(VERILATED_DIR) -f V$(VTOPMODULE).mk > /dev/null - @printf "$(CLR_CY)> Generating combined header$(CLR_NC)\n" + $(call print_msg,Generating combined header,V$(VTOPMODULE)_headers.h) printf "#ifndef __V$(VTOPMODULE)_headers__\n" > $(VERILATED_DIR)/V$(VTOPMODULE)_headers.h printf "#define __V$(VTOPMODULE)_headers__\n" >> $(VERILATED_DIR)/V$(VTOPMODULE)_headers.h find $(VERILATED_DIR) -type f -name "*.h" -exec echo '#include "{}"' \; >> $(VERILATED_DIR)/V$(VTOPMODULE)_headers.h @@ -129,27 +128,27 @@ $(VERILATED_DIR)/V$(VTOPMODULE)__ALL.a: $(VSRCS) # Generic rule to compile Cpp Files in . (prerequisite: complete verilate step first) $(OBJ_DIR)/%.o: %.cpp $(OBJ_DIR)/%.o: %.cpp $(DEPDIR)/%.Td $(VERILATED_DIR)/V$(VTOPMODULE)__ALL.a - @printf "$(CLR_CY)> Compiling %-35s <- %s$(CLR_NC)\n" $@ $< + $(call print_msgt,Compiling) $(COMPILE_CPP_MACRO) $< # Generic rule to compile Cpp Files in VERILATOR_INCLUDE_PATH (verilated.cpp & verilated.vcd_c.cpp) $(OBJ_DIR)/%.o: $(VERILATOR_INCLUDE_PATH)/%.cpp $(OBJ_DIR)/%.o: $(VERILATOR_INCLUDE_PATH)/%.cpp $(DEPDIR)/%.Td - @printf "$(CLR_CY)> Compiling %-35s <- %s$(CLR_NC)\n" $@ $< + $(call print_msgt,Compiling) $(COMPILE_CPP_MACRO) $< # Generic rule to compile Cpp Files rtl/dpi $(OBJ_DIR)/%.o: $(RTL_DIR)/dpi/%.cpp $(OBJ_DIR)/%.o: $(RTL_DIR)/dpi/%.cpp $(DEPDIR)/%.Td - @printf "$(CLR_CY)> Compiling %-35s <- %s$(CLR_NC)\n" $@ $< + $(call print_msgt,Compiling) $(COMPILE_CPP_MACRO) $< # Link & Create executable $(EXE): $(OBJS) - @printf "$(CLR_CY)> Linking shared object and driver to create executable $(CLR_NC)\n" + $(call print_msgt,Linking) $(CC) $^ -o $@ $(LDLIBS) $(LDFLAGS) - @printf "$(CLR_CY)> Build successful! [soctarget: $(soctarget)] $(CLR_NC)\n" + $(call print_msg,Atomsim build successful!) .PRECIOUS: $(DEPDIR)/%.Td $(DEPDIR)/%.Td: ; @@ -159,32 +158,7 @@ $(DEPDIR)/%.Td: ; # Cleanup Recepies .PHONY: clean -clean: #t Clean build files +clean: #t# Clean build files rm -rf $(BIN_DIR)/* $(OBJ_DIR)/* $(VERILATED_DIR)/* $(DEPDIR)/* - -.PHONY: help -help: #t Show help - @sed -n 's/^#h //p' Makefile - @echo "" - @echo "Usage:" - @echo " $$ make soctarget=[SOCTARGET] [TARGET]" - @echo "" - @echo "TARGETs:" - @grep -E -h '\s#t\s' $(MAKEFILE_LIST) | awk 'BEGIN {FS = ":.*?#t "}; {printf "\t\033[36m%-20s\033[0m %s\n", $$1, $$2}' - @echo "" - @sed -n 's/^#f //p' Makefile - - -# Extra to be printed in make help -#f -#f SOCTARGETs: -#f atombones -#f hydrogensoc -#f -#f Note: -#f - Use DEBUG=1/2/3 to build debug binary (also sets debug level) -#f - Use DPI=1 to enable DPI support in RTL -#f - Use NO_COLOR=1 to disable coloured output -#################################################### -include $(DEPS) diff --git a/sw/bootloader/Makefile b/sw/bootloader/Makefile index 2c98c20d..8bcb1a9e 100644 --- a/sw/bootloader/Makefile +++ b/sw/bootloader/Makefile @@ -1,13 +1,12 @@ #h# ***** Makefile to build RISC-V Atom bootloader ***** -#h# Usage: make soctarget=[SOCTARGET] [TARGET] -# soctarget to build for +#v# Specify soctarget soctarget?= atombones -# Build for simulation +#v# Build for simulation sim?=1 -# Build with prints enabled (if SoC has console) +#v# Enable prints in bootloader prints?=1 _mk_check_env:=1 @@ -49,12 +48,12 @@ default: build build: $(EXEC).elf #t# Build bootloader $(EXEC).elf: $(SRCS) - $(call print_info, Building bootloader for soctarget: $(soctarget)) + $(call print_msgt,Compiling) $(RVPREFIX)-gcc $(CFLAGS) -o $@ $^ $(LFLAGS) $(RVPREFIX)-objdump -htd $@ > $(basename $@).lst + $(call print_msg,Generating hex,$(basename $@).hex) convelf.py -t elf -c -m="BOOTROM:0x00010000:8192:h:$(basename $@).hex" $@ .PHONY: clean clean: #t# Clean build files - $(call print_info, Cleaning bootloader) rm -f *.o *.lst *.map *.elf *.hex *.bin diff --git a/sw/examples/Makefile b/sw/examples/Makefile index 55aea8ef..14a48de4 100644 --- a/sw/examples/Makefile +++ b/sw/examples/Makefile @@ -1,57 +1,37 @@ -.DEFAULT_GOAL := help +#h# ***** RISC-V Atom Examples Makefile ***** -# Bash color codes -COLOR_RED := \033[0;31m -COLOR_GREEN := \033[0;32m -COLOR_YELLOW := \033[0;33m -COLOR_CYAN := \033[0;36m -COLOR_NC := \033[0m +#v# Specify soctarget (autodetected if not provided) +soctarget?= None -# SoC target to compile for (to be oerridden) -soctarget ?= None +#v# Specify example to build (compulsory) +ex?= None -# example to compile (to be overridden) -ex ?= None +#v# Build for simulation +sim?= 1 -# Compile for simulation (may be overridden) -sim ?= 0 +#v# Vuart for make run example +vuart?= None -# Compile for use with bootloader (may be overridden) -boot ?= 0 - -# Vuart for make run example (may be overridden) -vuart ?= None - -# Save objdump while compiling (may be overridden) -objdump ?= 1 - -# Save binary while compiling (may be overridden) -bin ?= 1 - -# Save map file while compiling (may be overridden) -map ?= 1 +#v# Save map file while compiling +map?= 1 ######################################################################## # Checks -__check_env = true __check_soctarget = true __check_eg = true ifeq ($(MAKECMDGOALS),) # default target = help - __check_env = false __check_soctarget = false __check_eg = false endif ifeq ($(MAKECMDGOALS),help) - __check_env = false __check_soctarget = false __check_eg = false endif ifeq ($(MAKECMDGOALS),clean) - __check_env = false __check_soctarget = false endif @@ -61,7 +41,6 @@ ifeq ($(MAKECMDGOALS),all) endif ifeq ($(MAKECMDGOALS),clean-all) - __check_env = false __check_soctarget = false __check_eg = false endif @@ -71,21 +50,15 @@ ifeq ($(MAKECMDGOALS),run-all) __check_eg = false endif -#### check environment ##### -ifeq ($(__check_env),true) - # check if RVATOM env variable is set - ifeq ($(RVATOM),) - $(error RVATOM environment variable not set; did you forget to source the sourceme script?) - endif -endif - - +_mk_check_env = 1 +include ../../common.mk +######################################################################## RVPREFIX := riscv64-unknown-elf CFLAGS += -Wall LINKERSCRIPT := None #### check soctarget #### -ifeq ($(__check_soctarget),true) +ifeq ($(__check_soctarget), true) ifeq (${soctarget},None) # if soctarget not overridden # check if atomsim exists @@ -98,29 +71,13 @@ ifeq ($(__check_soctarget),true) $(info Autodetected soctarget from atomsim: $(soctarget)) endif - - # check for validity of soctarget & select compile script - ifeq ($(soctarget),atombones) - CFLAGS += -DTARGET_ATOMBONES - LINKERSCRIPT:= $(RVATOM_LIB)/link/link_atombones.ld - else - ifeq ($(soctarget),hydrogensoc) - CFLAGS += -DTARGET_HYDROGENSOC - LINKERSCRIPT:= $(RVATOM_LIB)/link/link_hydrogensoc.ld - else - $(error Invalid SoC target target $(soctarget)) - endif - endif - - ifeq ($(boot), 1) - LINKERSCRIPT:= ../flashboot/link_app.lds - endif - + CFLAGS+= -DTARGET_$(shell echo $(soctarget) | tr 'a-z' 'A-Z') + LINKERSCRIPT:= $(RVATOM_LIB)/link/link_$(soctarget).ld + ISA:=$(shell $(RVATOM)/scripts/cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a isa) + ABI:=$(shell $(RVATOM)/scripts/cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a abi) endif -ISA:=$(shell $(RVATOM)/scripts/cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a isa) -ABI:=$(shell $(RVATOM)/scripts/cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a abi) -CFLAGS += -march=$(ISA) -mabi=$(ABI) -nostartfiles -ffreestanding -O0 -g +CFLAGS += -march=$(ISA) -mabi=$(ABI) -nostartfiles -ffreestanding -Os CFLAGS += -I $(RVATOM_LIB)/include -L $(RVATOM_LIB) LFLAGS := -T $(LINKERSCRIPT) -lcatom -Wl,--gc-sections @@ -167,84 +124,48 @@ ifeq ($(sim), 1) CFLAGS += -DSIM endif -.DEFAULT_GOAL := help -# Query the default goal. -ifeq ($(.DEFAULT_GOAL),) - $(warning no default goal is set) -endif - -.PHONY: help -help: ## Show help - @printf "*** Makefile for compiling & running examples ***\n" - @printf "Usage:" - @printf " $$ make soctarget= ex= [TARGET]\n" - @printf "\n" - @printf "TARGETs:\n" - @egrep -h '\s##\s' $(MAKEFILE_LIST) | awk 'BEGIN {FS = ":.*?## "}; {printf "\t$(COLOR_CYAN)%-20s$(COLOR_NC) %s\n", $$1, $$2}' - @printf "\n" - @printf "SOCTARGETs:\n" - @printf "\t$(COLOR_CYAN)%-20s$(COLOR_NC) %s\n" atombones "" - @printf "\t$(COLOR_CYAN)%-20s$(COLOR_NC) %s\n" hydrogensoc "" - @printf "\n" - @printf "EXAMPLEs (auto-detected):\n" - @printf " $(patsubst %/,%,${EXAMPLE_DIRS})\n" - @printf "\n" - @printf "Note:\n" - @printf " - Following TARGETs can be run without overriding \"ex\" & \"soctarget\" variables\n" - @printf " help, all, clean-all\n" - @printf " - To save objdump,, set the \"objdump\" variable to \"1\" in the CLI.\n" - @printf " - To save run using vuart, set the vuart variable to the path of the simport\n" - - - .PHONY: compile -compile: $(ex)/$(executable) ## Compile specified example +compile: $(ex)/$(executable) #t# Compile specified example $(ex)/$(executable): $(SRC_FILES) - @printf "$(COLOR_CYAN)%-15s | Compiling %-35s <- %s$(COLOR_NC)\n" ${ex} $@ $< + $(call print_msgt,Building) cd $(ex) && $(RVPREFIX)-gcc $(CFLAGS) $(src_files) -o $(executable) $(LFLAGS) - -ifeq ($(objdump), 1) - $(RVPREFIX)-objdump -Shtd $@ > $@.objdump -endif - -ifeq ($(bin), 1) - $(RVPREFIX)-objcopy -O binary $@ $@.bin - @printf "Binary size: %s bytes\n" $$(stat --format=%s "$@.bin") -endif - + $(RVPREFIX)-objdump -Shtd $@ > $(basename $@).lst + $(RVPREFIX)-objcopy -O binary $@ $(basename $@).bin + @printf "$(CLR_BL)$(CLR_B) Binary size:$(CLR_NB) %s bytes$(CLR_NC)\n" $$(stat --format=%s "$(basename $@).bin") .PHONY: run -run: $(ex)/$(executable) ## Run example - @printf "${COLOR_CYAN}Running \"${ex}\" example ${COLOR_NC}\n" +run: $(ex)/$(executable) #t# Run example + $(call print_msg,Running, $<) atomsim $(ATOMSIM_ARGS) $^ -.PHONY: objdump -objdump: $(ex)/$(executable) ## Dump disassembly - riscv64-unknown-elf-objdump -htd $^ > $^.objdump +.PHONY: dism +dism: $(ex)/$(executable) #t# Dump disassembly + $(call print_msg,Generating disassembly,$(basename $^).lst) + riscv64-unknown-elf-objdump -htd $^ > $(basename $^).lst -.PHONY: prog -prog: $(ex)/$(executable).bin ## Program fpga flash - prog_firmware.sh $^ +# .PHONY: prog +# prog: $(ex)/$(executable).bin #t# Program fpga flash +# prog_firmware.sh $^ .PHONY: clean -clean: ## Clean executable - @printf "${COLOR_CYAN}Cleaning \"${ex}\" example binaries ${COLOR_NC}\n" - rm -f $(ex)/$(executable) $(ex)/*.o $(ex)/*.map $(ex)/*.objdump +clean: #t# Clean executable + $(call print_msg,Cleaning,$(ex)) + rm -f $(ex)/$(executable) $(ex)/*.o $(ex)/*.map $(ex)/*.lst -all: ## Build all examples +all: #t# Build all examples @$(patsubst %/, make -s ex=% sim=1 compile;,${EXAMPLE_DIRS}) -run-all: ## Build & run all examples - @$(patsubst %/, printf "${COLOR_CYAN}----------------------------------------------------${COLOR_NC}\n"; make -s ex=% sim=1 run;,${EXAMPLE_DIRS}) +run-all: #t# Build & run all examples + @$(patsubst %/, printf "${CLR_CY}----------------------------------------------------${CLR_NC}\n"; make -s ex=% sim=1 run;,${EXAMPLE_DIRS}) .PHONY: clean-all -clean-all: ## Clean all executables +clean-all: #t# Clean all executables @$(patsubst %/, make -s ex=% clean;,${EXAMPLE_DIRS}) diff --git a/sw/examples/banner/banner.c b/sw/examples/banner/banner.c index 30a5164d..ceed21c7 100644 --- a/sw/examples/banner/banner.c +++ b/sw/examples/banner/banner.c @@ -30,7 +30,7 @@ char * banner = " /_/ |_/___//____/\\____/ |___/ \\__,_/\\__/\\____/_/ /_/ /_/ \n" "/=========By: Saurabh Singh (saurabh.s99100@gmail.com)====/\n\n"; -print_isastring(){ +void print_isastring(){ uint32_t misa = CSR_read(CSR_MISA); puts("RV32I"); if(bitcheck(misa, 12)) putchar('M'); @@ -49,5 +49,5 @@ int main() printf("CODE RAM : 0x%08x (%d bytes)\n", (unsigned)CODERAM_BASE, (unsigned)CODERAM_SIZE); printf("DATA RAM : 0x%08x (%d bytes)\n", (unsigned)DATARAM_BASE, (unsigned)DATARAM_SIZE); puts("Exiting...\n"); - return 0; + return 134; } diff --git a/sw/lib/Makefile b/sw/lib/Makefile index ae78557c..a3866b7c 100644 --- a/sw/lib/Makefile +++ b/sw/lib/Makefile @@ -1,68 +1,53 @@ -################################################## -# ******** Makefile for Building libcatom ******** +#h# ***** Makefile for Building libcatom ***** -include ../../common.mk -################################################## -soctarget?=atombones +#v# Compile for simulation +soctarget?= atombones + +#v# Compile for simulation +sim?= 1 + +#v# Enable debug build +debug?= 0 # enable this to generate one section per function, # this allows these sections(functions) to be removed # if unused when linking with user application. # NOTE: use `-Wl,--gc-sections` while linking with # user application to enable gcc garbage collection -OPT = true -DEBUG ?= 1 +#v# Enable optimizable code generation +optimizable?= 1 +_mk_check_env=1 +# _mk_check_soctarget=1 +include ../../common.mk ################################################## -# targets for which we don't need soctarget to be defined -__check_soctarget := true - -ifeq ($(MAKECMDGOALS), help) -__check_soctarget := false -else -ifeq ($(MAKECMDGOALS), clean) -__check_soctarget := false -else -ifeq ($(soctarget), None) -$(error soctarget not defined) -endif -endif -endif - - -# select compile script -TARGET_SPECIFIC_SRC_DIR := None -ifeq ($(__check_soctarget), true) -ifeq ($(soctarget), atombones) -TARGET_SPECIFIC_SRC_DIR := libcatom/atombones -else -ifeq ($(soctarget), hydrogensoc) -TARGET_SPECIFIC_SRC_DIR := libcatom/hydrogensoc -else -$(error Invalid SoC target: $(soctarget)) -endif -endif -endif - -soctarget_ALLCAPS = $(shell echo $(soctarget) | tr '[:lower:]' '[:upper:]') -RVPREFIX := riscv64-unknown-elf -CC := $(RVPREFIX)-gcc -ISA:=$(shell $(RVATOM)/scripts/cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a isa) -ABI:=$(shell $(RVATOM)/scripts/cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a abi) -CFLAGS = -march=$(ISA) -mabi=$(ABI) -ffreestanding -nostartfiles -nostdlib -Wall -I include -DTARGET_$(soctarget_ALLCAPS) SRC_DIR = libcatom OBJ_DIR = obj +$(shell mkdir -p $(OBJ_DIR)) + +RVPREFIX:= riscv64-unknown-elf +CFLAGS:= -march=$(shell cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a isa) +CFLAGS+= -mabi=$(shell cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -a abi) +CFLAGS+= -Wall -ffreestanding -nostartfiles -nostdlib -I include +CFLAGS+= -DTARGET_$(shell echo $(soctarget) | tr 'a-z' 'A-Z') +ifeq ($(optimizable), 1) # For optimizable code + CFLAGS+= -fdata-sections -ffunction-sections +endif -ifeq ($(OPT), true) # For optimized code - CFLAGS+= -fdata-sections -ffunction-sections +ifeq ($(sim), 1) + CFLAGS+= -DSIM endif -ifeq ($(DEBUG), 1) -CFLAGS += -g -O0 +ifeq ($(debug), 1) + CFLAGS+= -g -O0 +else + CFLAGS+= -Os endif +TARGET_SPECIFIC_SRC_DIR:= libcatom/$(soctarget) + # Common sources C_SRCS := $(wildcard $(SRC_DIR)/*.c) S_SRCS := $(wildcard $(SRC_DIR)/*.S) @@ -74,63 +59,42 @@ S_SRCS += $(wildcard $(TARGET_SPECIFIC_SRC_DIR)/*.S) C_OBJS := $(patsubst %.c,$(OBJ_DIR)/%.o,$(notdir $(C_SRCS))) S_OBJS := $(patsubst %.S,$(OBJ_DIR)/%.o,$(notdir $(S_SRCS))) - SRCS := $(C_SRCS) $(S_SRCS) OBJS := $(C_OBJS) $(S_OBJS) +# Output library LIB = libcatom.a - -default: $(OBJ_DIR) $(LIB) #t Build library - -.PHONY: help -help: - @printf " **** Makefile to build Atom software library **** \n" - @printf "\n" - @printf "Usage:\n" - @printf " $$ make soctarget=[SOCTARGET] [TARGET]\n" - @printf "\n" - @printf "TARGETs:\n" - @grep -E -h '\s#t\s' $(MAKEFILE_LIST) | awk 'BEGIN {FS = ":.*?#t "}; {printf "\t\033[36m%-20s\033[0m %s\n", $$1, $$2}' - @printf "\n" - @printf "SOCTARGETs:\n" - @printf "\t$(CLR_CY)%-20s$(CLR_NC) %s\n" atombones "" - @printf "\t$(CLR_CY)%-20s$(CLR_NC) %s\n" hydrogensoc "" - @printf "" - - -# create obj directory -$(OBJ_DIR): - mkdir $(OBJ_DIR) +default: build +build: $(LIB) #t# Build libcatom # Create libcatom.a $(LIB): $(OBJS) - @printf "${CLR_CY}Generating $(LIB)$(CLR_NC)\n" + $(call print_msgt,Building) ar rcs $@ $^ - $(RVPREFIX)-objdump -htd $@ > $@.objdump - @printf "$(CLR_CY)Build successful! $(CLR_NC)\n" - - -COMPILE_CMD = @printf "${CLR_CY}Compiling %-25s <- %s$(CLR_NC)\n" $@ $<; $(CC) -c $(CFLAGS) $< -o $@ - - + $(RVPREFIX)-objdump -htd $@ > $(basename $@).lst # Compile all c files $(OBJ_DIR)/%.o: $(TARGET_SPECIFIC_SRC_DIR)/%.c - $(COMPILE_CMD) + $(call print_msgt,Compiling) + $(RVPREFIX)-gcc -c $(CFLAGS) $< -o $@ $(OBJ_DIR)/%.o: $(SRC_DIR)/%.c - $(COMPILE_CMD) + $(call print_msgt,Compiling) + $(RVPREFIX)-gcc -c $(CFLAGS) $< -o $@ + # Compile S files $(OBJ_DIR)/%.o: $(TARGET_SPECIFIC_SRC_DIR)/%.S - $(COMPILE_CMD) - -$(OBJ_DIR)/%.o: $(SRC_DIR)/%.S - $(COMPILE_CMD) + $(call print_msgt,Compiling) + $(RVPREFIX)-gcc -c $(CFLAGS) $< -o $@ +$(OBJ_DIR)/%.o: $(SRC_DIR)/%.S + $(call print_msgt,Compiling) + $(RVPREFIX)-gcc -c $(CFLAGS) $< -o $@ + .PHONY: clean -clean: #t Clean Build files - rm -f $(OBJ_DIR)/*.o - rm -f $(LIB) +clean: #t# Clean Build files + rm -rf $(OBJ_DIR)/* $(LIB) *.lst + diff --git a/sw/lib/libcatom/start.S b/sw/lib/libcatom/start.S index 866162df..ff9b57c4 100644 --- a/sw/lib/libcatom/start.S +++ b/sw/lib/libcatom/start.S @@ -50,7 +50,9 @@ _start: jal main _exit: - ebreak # Exit simulation +#ifdef SIM + ebreak # Exit simulation +#endif j _exit diff --git a/synth/altera/de0-cv/Makefile b/synth/altera/de0-cv/Makefile index 4239b901..e21f84e5 100644 --- a/synth/altera/de0-cv/Makefile +++ b/synth/altera/de0-cv/Makefile @@ -1,37 +1,45 @@ +#h# ***** Makefile to run FPGA flow ***** + +#v# Specify soctarget soctarget?=hydrogensoc + +#v# Specify build directory build_dir?=build +_mk_check_env=1 include ../../../common.mk +# Flags to the makefiles +MKFLAGS := -s + $(shell mkdir -p $(build_dir)) default: build $(build_dir)/bootloader.hex: - @printf "$(CLR_GR)>> Rebuilding libcatom and bootloader$(CLR_NC)\n" - make -C $(RVATOM)/sw/lib soctarget=$(soctarget) sim=0 clean default - make -C $(RVATOM)/sw/bootloader soctarget=$(soctarget) sim=0 clean build + $(call print_msg_root,Rebuilding libcatom and bootloader) + make $(MKFLAGS) -C $(RVATOM)/sw/lib soctarget=$(soctarget) sim=0 clean build + make $(MKFLAGS) -C $(RVATOM)/sw/bootloader soctarget=$(soctarget) sim=0 clean build cp $(RVATOM)/sw/bootloader/bootloader.hex $@ $(build_dir)/HydrogenSoC.v: - @printf "$(CLR_GR)>> Generating verilog$(CLR_NC)\n" + $(call print_msgt_root,Generating verilog) verilator -E -P `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -T verilator -f` -DSOC_BOOTROM_INIT_FILE='"bootloader.hex"' -DSOC_INVERT_RST > $@ verilator --lint-only $@ -top-module `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -T verilator -t` -build: $(build_dir)/bootloader.hex $(build_dir)/HydrogenSoC.v - @printf "$(CLR_GR)>> Starting FPGA build$(CLR_NC)\n" +build: $(build_dir)/bootloader.hex $(build_dir)/HydrogenSoC.v #t# Build FPGA Bitstream + $(call print_msg_root,Starting FPGA Flow) cp -f HydrogenSoC.tcl $(build_dir)/ verilator -E -P `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -d` HydrogenSoC.sdc > $(build_dir)/HydrogenSoC.sdc cd $(build_dir) && time quartus_sh -t HydrogenSoC.tcl 2>&1 > build.log .PHONY: prog -prog: - @printf "$(CLR_GR)>> Programming FPGA$(CLR_NC)\n" +prog: #t# Program FPGA + $(call print_msg_root,Programming FPGA,$(build_dir)/output_files/HydrogenSoC.sof) quartus_pgm -m jtag -o "p;$(build_dir)/output_files/HydrogenSoC.sof" - .PHONY: clean -clean: - @printf "$(CLR_GR)>> Cleaning build files$(CLR_NC)\n" +clean: #t# Clean build files + $(call print_msg_root,Cleaning build files) rm -rf $(build_dir)/* \ No newline at end of file diff --git a/synth/xilinx/spartan6-mini/Makefile b/synth/xilinx/spartan6-mini/Makefile index 7ea7d91c..15a87dcd 100644 --- a/synth/xilinx/spartan6-mini/Makefile +++ b/synth/xilinx/spartan6-mini/Makefile @@ -1,31 +1,46 @@ +#h# ***** Makefile to run FPGA flow ***** + +#v# Specify soctarget soctarget?=hydrogensoc + +#v# Specify build directory build_dir?=build +_mk_check_env=1 include ../../../common.mk +# Flags to the makefiles +MKFLAGS := -s + $(shell mkdir -p $(build_dir)) default: build $(build_dir)/bootloader.hex: - @printf "$(CLR_GR)>> Rebuilding libcatom and bootloader$(CLR_NC)\n" - make -C $(RVATOM)/sw/lib soctarget=$(soctarget) sim=0 clean default - make -C $(RVATOM)/sw/bootloader soctarget=$(soctarget) sim=0 clean build + $(call print_msg_root,Rebuilding libcatom and bootloader) + make $(MKFLAGS) -C $(RVATOM)/sw/lib soctarget=$(soctarget) sim=0 clean build + make $(MKFLAGS) -C $(RVATOM)/sw/bootloader soctarget=$(soctarget) sim=0 clean build cp $(RVATOM)/sw/bootloader/bootloader.hex $@ $(build_dir)/HydrogenSoC.v: + $(call print_msgt_root,Generating verilog) @printf "$(CLR_GR)>> Generating verilog$(CLR_NC)\n" verilator -E -P `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -T verilator -f` -DSOC_BOOTROM_INIT_FILE='"bootloader.hex"' > $@ verilator --lint-only $@ -top-module `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -T verilator -t` -build: $(build_dir)/bootloader.hex $(build_dir)/HydrogenSoC.v - @printf "$(CLR_GR)>> Starting FPGA build$(CLR_NC)\n" +build: $(build_dir)/bootloader.hex $(build_dir)/HydrogenSoC.v #t# Build FPGA Bitstream + $(call print_msg_root,Starting FPGA Flow) cp -f spartan6-mini.tcl $(build_dir)/ verilator -E -P `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -d` HydrogenSoC.ucf > $(build_dir)/HydrogenSoC.ucf cd $(build_dir) && time xtclsh spartan6-mini.tcl rebuild_project 2>&1 > build.log +.PHONY: prog +prog: #t# Program FPGA + $(call print_msg_root,Programming FPGA,$(build_dir)/HydrogenSoC.bit) + openFPGALoader --fpga-part xc6slx9tqg144 -f --verify $(build_dir)/HydrogenSoC.bit -r + .PHONY: clean -clean: - @printf "$(CLR_GR)>> Cleaning build files$(CLR_NC)\n" +clean: #t# Clean build files + $(call print_msg_root,Cleaning build files) rm -rf $(build_dir)/* \ No newline at end of file diff --git a/synth/yosys/Makefile b/synth/yosys/Makefile index 3e626739..f05339c9 100644 --- a/synth/yosys/Makefile +++ b/synth/yosys/Makefile @@ -1,38 +1,54 @@ -include ../../common.mk +#h# ***** Makefile to run Yosys synthesis ***** -######################################### -# Config - Common +#v# Specify soctarget soctarget?=hydrogensoc + +#v# Specify build directory build_dir?=build + +# ----- Config - Common ----- log_file?=$(build_dir)/synth.log build_info_file=$(build_dir)/build.info sources_tcl_script=$(build_dir)/sources.tcl -# Config - FPGA +# ----- Config - FPGA ----- +#v# Specify FPGA Vendor fpga_vendor?=xilinx + +#v# Specify FPGA Family fpga_family?=xc6s + fpga_synth_tcl_script?=synth_fpga.tcl -# Config - ASIC +# ----- Config - ASIC ----- +#v# Specify ASIC PDK asic_pdk?=freepdk45 + asic_synth_tcl_script?=synth_asic.tcl -######################################### -$(shell mkdir -p $(build_dir)) asic_pdk_file:=$(build_dir)/$(asic_pdk)_stdcells.lib -default: fpga ## alias for fpga target +_mk_check_env=1 +include ../../common.mk + +# Flags to the makefiles +MKFLAGS := -s + +$(shell mkdir -p $(build_dir)) + +default: fpga #t# alias for fpga target $(build_dir)/bootloader.hex: - make -C $(RVATOM)/sw/lib soctarget=$(soctarget) sim=0 clean build - make -C $(RVATOM)/sw/bootloader soctarget=$(soctarget) sim=0 clean build + $(call print_msg_root,Rebuilding libcatom and bootloader) + make $(MKFLAGS) -C $(RVATOM)/sw/lib soctarget=$(soctarget) sim=0 clean build + make $(MKFLAGS) -C $(RVATOM)/sw/bootloader soctarget=$(soctarget) sim=0 clean build cp $(RVATOM)/sw/bootloader/bootloader.hex $@ $(build_dir)/HydrogenSoC.v: - @printf "$(CLR_GR)>> Generating verilog$(CLR_NC)\n" + $(call print_msgt_root,Generating verilog) verilator -E -P `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -T verilator -f` -DSOC_BOOTROM_INIT_FILE='"bootloader.hex"' > $@ verilator --lint-only $@ -top-module `cfgparse.py $(RVATOM)/rtl/config/$(soctarget).json -T verilator -t` - @printf "$(CLR_GR)>> Dumping build info: $(build_info_file)$(CLR_NC)\n" + $(call print_msg_root,Dumping buildinfo,$(build_info_file)) @echo "timestamp: `date +\"%m-%d-%Y %H:%M:%S\"`" > $(build_info_file); @echo "commit: `git rev-parse HEAD`" >> $(build_info_file); @echo "soctarget: $(soctarget)" >> $(build_info_file); @@ -41,7 +57,7 @@ $(build_dir)/HydrogenSoC.v: $(asic_pdk_file): - @printf "$(CLR_GR)>> Downloading PDK: $(asic_pdk) $(CLR_NC)\n" + $(call print_msgt_root,Downloading PDK) ifeq ($(asic_pdk), freepdk45) wget https://raw.githubusercontent.com/mflowgen/freepdk-45nm/master/stdcells.lib -O $(asic_pdk_file) else @@ -51,24 +67,24 @@ endif ######################################### # FPGA .PHONY: fpga -fpga: $(build_dir)/bootloader.hex $(build_dir)/HydrogenSoC.v ## run fpga synthesis +fpga: $(build_dir)/bootloader.hex $(build_dir)/HydrogenSoC.v #t# run fpga synthesis @echo "fpga: $(fpga_vendor)::$(fpga_family)" >> $(build_info_file); - @printf "$(CLR_GR)>> Running Yosys: FPGA$(CLR_NC)\n" + $(call print_msg_root,Running Yosys synth: FPGA) yosys -p 'tcl $(fpga_synth_tcl_script) $(fpga_vendor) $(fpga_family) $(build_dir)' 2>&1 > $(log_file) ######################################### # ASIC .PHONY: asic -asic: $(build_dir)/bootloader.hex $(asic_pdk_file) $(build_dir)/HydrogenSoC.v ## run asic synthesis +asic: $(build_dir)/bootloader.hex $(asic_pdk_file) $(build_dir)/HydrogenSoC.v #t# run asic synthesis @echo "liberty: $(asic_pdk)" >> $(build_info_file) - @printf "$(CLR_GR)>> Running Yosys: ASIC$(CLR_NC)\n" + $(call print_msg_root,Running Yosys synth: ASIC) yosys -p 'tcl $(asic_synth_tcl_script) $(asic_pdk_file) $(build_dir)' 2>&1 > $(log_file) .PHONY: clean -clean: ## clean build dir - @printf "$(CLR_GR)>> Cleaning build dir $(CLR_NC)\n" +clean: #t# clean build dir + $(call print_msg_root,Cleaning build files) rm -rf $(build_dir) \ No newline at end of file