From 7daaeac96bc02bd5055cebb031ec1f08a67edb8c Mon Sep 17 00:00:00 2001 From: Saurabh Singh Date: Tue, 26 Dec 2023 19:32:26 -0500 Subject: [PATCH] update readme --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 7caa9134..e07d0d25 100644 --- a/README.md +++ b/README.md @@ -9,7 +9,7 @@ RISC-V Atom is an open-source soft-core processor platform targeted for FPGAs. I Key highlights of the RISC-V Atom projects are are listed below: -- Atom processor implements `RV32I_Zicsr` ISA as defined in the [RISC-V unprivileged ISA manual](https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf). +- Atom processor implements `RV32IC_Zicsr` ISA as defined in the [RISC-V unprivileged ISA manual](https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf). - Simple 2-stage pipelined architecture, ideal for smaller FPGAs. - Wishbone ready CPU interface. - Support for RISC-V interrupts and exceptions.