From 0b76798c074da59bdf79b8c88aac8975131e8b5c Mon Sep 17 00:00:00 2001 From: Saurabh Singh Date: Fri, 16 Jul 2021 15:07:22 +0530 Subject: [PATCH 1/2] Makefile: Throw error if unrecognized target is selected --- Makefile | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/Makefile b/Makefile index 5f19fe18..f5b70007 100644 --- a/Makefile +++ b/Makefile @@ -64,20 +64,24 @@ INCLUDES = -I $(vobject_dir) -I /usr/share/verilator/include -I /usr/share/veril cpp_driver = $(sim_dir)/AtomSim.cpp sim_executable = atomsim -sim_cpp_backend = $(sim_dir)/Backend_AtomBones.hpp Target = atombones # Verilog Configs VC = verilator VFLAGS = -cc -Wall --relative-includes --trace +# Target Specific definitions ifeq ($(Target), atombones) - verilog_topmodule = AtomBones - verilog_topmodule_file = $(rtl_dir)/AtomBones.v - verilog_files = rtl/AtomBones.v rtl/Timescale.vh rtl/Config.vh rtl/core/AtomRV.v rtl/core/Alu.v rtl/core/Decode.v rtl/core/RegisterFile.v +verilog_topmodule = AtomBones +verilog_topmodule_file = $(rtl_dir)/AtomBones.v +verilog_files = rtl/AtomBones.v rtl/Timescale.vh rtl/Config.vh rtl/core/AtomRV.v rtl/core/Alu.v rtl/core/Decode.v rtl/core/RegisterFile.v + +sim_cpp_backend = $(sim_dir)/Backend_AtomBones.hpp +CFLAGS += -DTARGET_ATOMBONES +else + +$(error Unknown Target : $(Target)) - CFLAGS += -DTARGET_ATOMBONES - endif #====================================================================== From a06218e6dee1c4aed8d1a049cdbd032973620a8f Mon Sep 17 00:00:00 2001 From: Saurabh Singh Date: Fri, 16 Jul 2021 15:21:55 +0530 Subject: [PATCH 2/2] Readme Update --- README.md | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/README.md b/README.md index 2eb0ec28..2814b8a7 100644 --- a/README.md +++ b/README.md @@ -25,10 +25,9 @@ Key highlights of Atom are listed below: 1. [Atom Architecture](Atom-Architecture) 2. [Targets](Targets) 3. [Prerequisites](Prerequisites) -4. [Getting Started](Getting-Started) -5. [Simulation](Simulation) -6. [FPGA Implementation](FPGA-Implementation) -7. [License](License) +4. [Build Instructions](Build-Instructions) +5. [AtomSim](AtomSim) +6. [License](License) ## Atom Architecture @@ -77,7 +76,7 @@ It is a basic SoC which contains atom core interfaced to instruction memory, dat | 0x00014001 | UART_TX | | 0x00014002 | UART_SREG | -### Prerequisites +## Prerequisites Run apt update @@ -175,7 +174,7 @@ Now run the generated elf file using atomsim $ atomsim banner.elf ``` -## Generating atomsim code documentation using doxygen +### Generating atomsim code documentation using doxygen Run make from the parent directory