CHB:MIPS: add support for some trap instructions

sipma · sipma · commit f303317b44a2 · 2025-08-05T17:58:55.000-07:00
diff --git a/CodeHawk/CHB/bchlib/bCHVersion.ml b/CodeHawk/CHB/bchlib/bCHVersion.ml
@@ -95,8 +95,8 @@ end
 
 
 let version = new version_info_t 
-  ~version:"0.6.0_20250804"
-  ~date:"2025-08-04"
+  ~version:"0.6.0_20250805"
+  ~date:"2025-08-05"
   ~licensee: None
   ~maxfilesize: None
   ()
diff --git a/CodeHawk/CHB/bchlibmips32/bCHDisassembleMIPSInstruction.ml b/CodeHawk/CHB/bchlibmips32/bCHDisassembleMIPSInstruction.ml
@@ -77,6 +77,7 @@ let parse_branch
   | 2 -> BranchLTZeroLikely (r_op rs RD, tgtop)
   | 3 -> BranchGEZeroLikely (r_op rs RD, tgtop)
   | 12 -> TrapIfEqualImmediate (r_op rs RD, mips_immediate_op true 2 imm)
+  | 14 -> TrapIfNotEqualImmediate (r_op rs RD, mips_immediate_op true 2 imm)
   | 16 -> BranchLTZeroLink (r_op rs RD, tgtop)
   | 17 when rrs = 0 -> BranchLink tgtop
   | 17 -> BranchGEZeroLink (r_op rs RD, tgtop)
@@ -213,6 +214,7 @@ let parse_R_opcode
   | 39 -> Nor (r_op rd WR, r_op rs RD, r_op rt RD)
   | 42 -> SetLT (r_op rd WR, r_op rs RD, r_op rt RD)
   | 43 -> SetLTUnsigned (r_op rd WR,r_op rs RD,r_op rt RD)
+  | 51 -> TrapIfLessThanUnsigned ((rrd lsl 5) + samt, r_op rs RD, r_op rt RD)
   | 52 -> TrapIfEqual ((rrd lsl 5) + samt, r_op rs RD, r_op rt RD)
   | _ -> NotRecognized ("parse_R_opcode:" ^ (stri fnct), instr)
 
diff --git a/CodeHawk/CHB/bchlibmips32/bCHFnMIPSDictionary.ml b/CodeHawk/CHB/bchlibmips32/bCHFnMIPSDictionary.ml
@@ -6,7 +6,7 @@
 
    Copyright (c) 2005-2020 Kestrel Technology LLC
    Copyright (c) 2020-2021 Henny Sipma
-   Copyright (c) 2021-2024 Aarno Labs LLC
+   Copyright (c) 2021-2025 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
@@ -2022,6 +2022,26 @@ object (self)
            mk_instrx_data ~xprs:[xrs; ximm; result; rresult] ~rdefs () in
          ([tagstring], args)
 
+      | TrapIfLessThanUnsigned (_, rs, rt) ->
+         let xrs = rs#to_expr floc in
+         let xrt = rt#to_expr floc in
+         let result = XOp (XLt, [xrs; xrt]) in
+         let rresult = rewrite_expr result in
+         let rdefs = [get_rdef xrs; get_rdef xrt] @ (get_all_rdefs rresult) in
+         let (tagstring, args) =
+           mk_instrx_data ~xprs:[xrs; xrt; result; rresult] ~rdefs () in
+         ([tagstring], args)
+
+      | TrapIfNotEqualImmediate (rs, imm) ->
+         let xrs = rs#to_expr floc in
+         let ximm = imm#to_expr floc in
+         let result = XOp (XNe, [xrs; ximm]) in
+         let rresult = rewrite_expr result in
+         let rdefs = [get_rdef xrs] @ (get_all_rdefs rresult) in
+         let (tagstring, args) =
+           mk_instrx_data ~xprs:[xrs; ximm; result; rresult] ~rdefs () in
+         ([tagstring], args)
+
       | WordSwapBytesHalfwords (rd, rt) ->
          let vrd = rd#to_variable floc in
          let xrt = rt#to_expr floc in
diff --git a/CodeHawk/CHB/bchlibmips32/bCHMIPSDictionary.ml b/CodeHawk/CHB/bchlibmips32/bCHMIPSDictionary.ml
@@ -6,7 +6,7 @@
 
    Copyright (c) 2005-2020 Kestrel Technology LLC
    Copyright (c) 2020      Henny Sipma
-   Copyright (c) 2021-2024 Aarno Labs LLC
+   Copyright (c) 2021-2025 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
@@ -183,7 +183,8 @@ object (self)
         | MoveWordToFP (op1, op2)
         | ControlWordFromFP (op1,op2)
         | ControlWordToFP (op1,op2)
-        | TrapIfEqualImmediate (op1,op2)
+        | TrapIfEqualImmediate (op1, op2)
+        | TrapIfNotEqualImmediate (op1, op2)
       -> (tags, [oi op1; oi op2])
       (* 3 operands *)
       | BranchEqual (op1,op2,op3)
@@ -236,6 +237,7 @@ object (self)
       | MovF (cc,op1,op2)
         | MovT (cc,op1,op2)
         | TrapIfEqual (cc, op1, op2)
+        | TrapIfLessThanUnsigned (cc, op1, op2)
         -> (tags, [cc; oi op1; oi op2])
       (* fmt, 2 operands  *)
       | FPSqrtfmt (fmt,op1,op2)
diff --git a/CodeHawk/CHB/bchlibmips32/bCHMIPSOpcodeRecords.ml b/CodeHawk/CHB/bchlibmips32/bCHMIPSOpcodeRecords.ml
diff --git a/CodeHawk/CHB/bchlibmips32/bCHMIPSTypes.mli b/CodeHawk/CHB/bchlibmips32/bCHMIPSTypes.mli
@@ -649,6 +649,13 @@ type mips_opcode_t =
   | TrapIfEqualImmediate of                           (* TEQI; I-type: memory *)
       mips_operand_int   (* rs: source *)
       * mips_operand_int (* imm: constant to compare against *)
+  | TrapIfLessThanUnsigned of
+      int                (* code: ignored by hardware *)
+      * mips_operand_int (* rs: source 1 *)
+      * mips_operand_int (* rt: source 2 *)
+  | TrapIfNotEqualImmediate of
+      mips_operand_int   (* rs: source *)
+      * mips_operand_int (* imm: constant to compare against *)
   | Xor of                                                     (* XOR; R-type *)
       mips_operand_int   (* rd: destination *)
       * mips_operand_int (* rs: source 1 *)
diff --git a/CodeHawk/CHB/bchlibmips32/bCHTranslateMIPSToCHIF.ml b/CodeHawk/CHB/bchlibmips32/bCHTranslateMIPSToCHIF.ml
@@ -1584,6 +1584,23 @@ let translate_mips_instruction
      let defcmds = floc#get_vardef_commands ~use ~usehigh ctxtiaddr in
      default defcmds
 
+  (* TODO: add an ASSERT on the condition *)
+  | TrapIfLessThanUnsigned (_, rs, rt) ->
+     let use = get_register_vars [rs; rt] in
+     let xrs = rs#to_expr floc in
+     let xrt = rt#to_expr floc in
+     let usehigh = get_use_high_vars [xrs; xrt] in
+     let defcmds = floc#get_vardef_commands ~use ~usehigh ctxtiaddr in
+     default defcmds
+
+  (* TODO: add an ASSERT on the condition *)
+  | TrapIfNotEqualImmediate (rs, _imm) ->
+     let use = get_register_vars [rs] in
+     let xrs = rs#to_expr floc in
+     let usehigh = get_use_high_vars [xrs] in
+     let defcmds = floc#get_vardef_commands ~use ~usehigh ctxtiaddr in
+     default defcmds
+
   | Xor (rd, rs, rt) ->
      let rdreg = rd#to_register in
      let use = get_register_vars [rs; rt] in
diff --git a/CodeHawk/CHT/CHB_tests/bchlibmips32_tests/txbchlibmips32/bCHDisassembleMIPSInstructionTest.ml b/CodeHawk/CHT/CHB_tests/bchlibmips32_tests/txbchlibmips32/bCHDisassembleMIPSInstructionTest.ml
@@ -5,7 +5,7 @@
    ------------------------------------------------------------------------------
    The MIT License (MIT)
 
-   Copyright (c) 2022-2024  Aarno Labs LLC
+   Copyright (c) 2022-2025  Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
@@ -47,7 +47,7 @@ module TR = CHTraceResult
 
 
 let testname = "bCHDisassembleMIPSInstructionTest"
-let lastupdated = "2023-03-10"
+let lastupdated = "2025-08-05"
 
 
 let make_dw (s: string) = TR.tget_ok (D.string_to_doubleword s)
@@ -68,7 +68,6 @@ let _missing_I_opcodes = [
 let _missing_I_opcode_branches = [
     "bgezal";
     "bltzal";
-    "teqi";
     "blezl";
   ]
 
@@ -156,6 +155,8 @@ let mips_I_opcode_be_branch () =
       ("bltzl", "0x46d864", "04620005", "bltzl    $v1, 0x46d87c");
       ("bne",   "0x405560", "1615ffdf", "bne      $s0, $s5, 0x4054e0");
       ("bnel",  "0x46dd90", "5462000a", "bnel     $v1, $v0, 0x46ddbc");
+      ("teqi",  "0x105f8",  "046c0000", "teqi     $v1, 0");
+      ("tnei",  "0x10810",  "06ce0000", "tnei     $s6, 0");
     ] in
   begin
     TS.new_testsuite (testname ^ "_mips_I_opcode_be_branch") lastupdated;
@@ -225,6 +226,7 @@ let mips_R_opcode_be () =
       ("srl",     "0x40b290", "00032e02", "srl      $a1, $v1, 0x18");
       ("srlv",    "0x46d804", "00851806", "srlv     $v1, $a1, $a0");
       ("teq",     "0x415748", "006001f4", "teq      $v1, $zero");
+      ("tltu",    "0xc7c8",   "02820033", "tltu     $s4, $v0");
       ("xor",     "0x40b29c", "00451026", "xor      $v0, $v0, $a1");
     ] in
   begin
